From 0a7790e52b543b9100a8d561888719533fe8f19a Mon Sep 17 00:00:00 2001
From: gitee-bot <no-reply@git.oschina.net>
Date: Sun, 3 Aug 2025 13:47:55 +0000
Subject: [PATCH] Update README.md

---
 README.en.md | 72 +++++++++++++++++++++++++++++++++++++++++++++++++
 README.md    | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 148 insertions(+)
 create mode 100644 README.en.md
 create mode 100644 README.md

diff --git a/README.en.md b/README.en.md
new file mode 100644
index 0000000..ea35b4f
--- /dev/null
+++ b/README.en.md
@@ -0,0 +1,72 @@
+
+
+# RV-Sim - RISC-V Instruction Set Simulator
+
+## Introduction
+
+`RV-Sim` is an instruction simulator based on the RISC-V RV32I instruction set, written in C. It aims to help developers understand the low-level operation of the RISC-V architecture. The project also includes auxiliary scripts and test programs to facilitate quick setup and functionality verification.
+
+## Project Structure
+
+- `RV-Sim.c` - Core simulator code, including CPU structure definitions and instruction execution logic.
+- `RV-Sim.exe` - Executable file for the Windows platform (generated after compilation).
+- `test_program.c` - A simple test program used to verify the simulator.
+- `test_program.bin` - Compiled binary file of the test program.
+- `isp.py` - Python script, possibly used for programming the program or interacting with the simulator.
+- `RISC-V-RV32I.xlsx` - May contain instruction set documentation or register configuration details.
+
+## Features
+
+- Supports simulation of the RV32I base instruction set.
+- Provides functionality to view register and memory states.
+- Supports loading and executing programs from binary files.
+- Cross-platform support (can run on different systems by compiling the source code).
+
+## Usage
+
+### Compile the Simulator
+
+Ensure that a C compiler (such as GCC) is installed, then run the following command:
+
+```bash
+gcc -o RV-Sim RV-Sim.c
+```
+
+### Run the Test Program
+
+1. Compile the test program (if necessary):
+
+   ```bash
+   gcc -o test_program.bin test_program.c
+   ```
+
+2. Run the simulator and load the test program:
+
+   ```bash
+   ./RV-Sim test_program.bin
+   ```
+
+### Use the Python Script
+
+If `isp.py` is used for programming or interaction, refer to its internal comments or run the help command:
+
+```bash
+python isp.py --help
+```
+
+## Notes
+
+- The file `RISC-V-RV32I.xlsx` may contain important instruction set documentation. It is recommended to review it to understand which instructions are supported by the simulator.
+- `RV-Sim.exe` is a Windows executable file and is only compatible with the Windows platform.
+
+## Contributing
+
+Feel free to open Issues and submit Pull Requests. Please ensure that your code style matches the existing codebase and provide clear commit messages.
+
+## License
+
+This project is licensed under the MIT License. Please refer to the `LICENSE` file for more details.
+
+---
+
+For further assistance, please consult the project Wiki or contact the project maintainers.
\ No newline at end of file
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..9abd746
--- /dev/null
+++ b/README.md
@@ -0,0 +1,76 @@
+Given the information available, it appears that the repository contains a mix of C, Python, and possibly other resource files. The primary components include an RISC-V simulator written in C (`RV-Sim.c`), a Python script (`isp.py`), and supporting files such as a test program in binary and C form (`test_program.bin`, `test_program.c`). There is also an Excel file (`RISC-V-RV32I.xlsx`) which may contain documentation or configuration details.
+
+Since no detailed code content could be retrieved, the README will be generated based on the filenames and typical structures observed.
+
+---
+
+# RV-Sim - RISC-V Instruction Set Simulator
+
+## 简介
+
+`RV-Sim` 是一个基于 RISC-V RV32I 指令集的指令模拟器，使用 C 语言编写，旨在帮助开发者理解 RISC-V 架构的底层运行机制。该项目还包含辅助脚本和测试程序，便于快速上手和验证功能。
+
+## 项目结构
+
+- `RV-Sim.c` - 模拟器核心代码，包含 CPU 结构体定义、指令执行逻辑等。
+- `RV-Sim.exe` - Windows 平台下的可执行文件（编译后生成）。
+- `test_program.c` - 用于测试模拟器的简单测试程序。
+- `test_program.bin` - 编译后的测试程序二进制文件。
+- `isp.py` - Python 脚本，可能用于烧录程序或与模拟器交互。
+- `RISC-V-RV32I.xlsx` - 可能包含指令集说明或寄存器配置信息。
+
+## 功能特性
+
+- 支持 RV32I 基础指令集模拟。
+- 提供寄存器和内存状态查看功能。
+- 支持从二进制文件加载程序并执行。
+- 跨平台支持（通过编译源码可在不同系统上运行）。
+
+## 使用方法
+
+### 编译模拟器
+
+确保已安装 C 编译器（如 GCC），然后执行以下命令：
+
+```bash
+gcc -o RV-Sim RV-Sim.c
+```
+
+### 运行测试程序
+
+1. 编译测试程序（如需要）：
+
+   ```bash
+   gcc -o test_program.bin test_program.c
+   ```
+
+2. 运行模拟器并加载测试程序：
+
+   ```bash
+   ./RV-Sim test_program.bin
+   ```
+
+### 使用 Python 脚本
+
+如果 `isp.py` 用于程序烧录或交互，请参考其内部注释或执行帮助信息：
+
+```bash
+python isp.py --help
+```
+
+## 注意事项
+
+- `RISC-V-RV32I.xlsx` 文件可能包含关键的指令集文档，建议查看以理解模拟器支持的指令。
+- `RV-Sim.exe` 是 Windows 可执行文件，仅适用于 Windows 平台。
+
+## 贡献指南
+
+欢迎提交 Issue 和 Pull Request。请确保代码风格与现有代码保持一致，并提供清晰的提交信息。
+
+## 许可证
+
+本项目采用 MIT License，请参阅 `LICENSE` 文件获取详细信息。
+
+---
+
+如需进一步帮助，请查看项目 Wiki 或联系项目维护者。
\ No newline at end of file
-- 
Gitee