diff --git a/docs/pic/071d611d0eacd10171186faea859aff.png b/docs/pic/071d611d0eacd10171186faea859aff.png new file mode 100644 index 0000000000000000000000000000000000000000..68c8ea6f72a5cdfdcc7894d893735103a5bb2111 Binary files /dev/null and b/docs/pic/071d611d0eacd10171186faea859aff.png differ diff --git a/docs/pic/1726194739756.jpg b/docs/pic/1726194739756.jpg new file mode 100644 index 0000000000000000000000000000000000000000..87c9fbfdea4dc6247aeb31b6a98b34c87fa4529c Binary files /dev/null and b/docs/pic/1726194739756.jpg differ diff --git a/docs/pic/1726194776437.jpg b/docs/pic/1726194776437.jpg new file mode 100644 index 0000000000000000000000000000000000000000..b2e65222c5c6d75b18735b085fcb877735051025 Binary files /dev/null and b/docs/pic/1726194776437.jpg differ diff --git a/docs/pic/1726194794028.jpg b/docs/pic/1726194794028.jpg new file mode 100644 index 0000000000000000000000000000000000000000..49a62d44b2f9a1fe31f5e2a58b719b7f515e9615 Binary files /dev/null and b/docs/pic/1726194794028.jpg differ diff --git a/docs/pic/1726194824764.jpg b/docs/pic/1726194824764.jpg new file mode 100644 index 0000000000000000000000000000000000000000..c1d00f900fead58a74aacac439be0464c28f9616 Binary files /dev/null and b/docs/pic/1726194824764.jpg differ diff --git a/docs/pic/1726194869607.jpg b/docs/pic/1726194869607.jpg new file mode 100644 index 0000000000000000000000000000000000000000..c978f4388baf02d13b40ab41b536751acf75ac03 Binary files /dev/null and b/docs/pic/1726194869607.jpg differ diff --git a/docs/pic/1726194906962.jpg b/docs/pic/1726194906962.jpg new file mode 100644 index 0000000000000000000000000000000000000000..bf758c8f9cc35e8a42926f8951b587d87d028817 Binary files /dev/null and b/docs/pic/1726194906962.jpg differ diff --git a/docs/pic/1726194945180.jpg b/docs/pic/1726194945180.jpg new file mode 100644 index 0000000000000000000000000000000000000000..809eae5969a3599451a2a92cbafc6f8b0d13806b Binary files /dev/null and b/docs/pic/1726194945180.jpg differ diff --git a/docs/pic/1726194962547.jpg b/docs/pic/1726194962547.jpg new file mode 100644 index 0000000000000000000000000000000000000000..9468da025f2bccc563aa4faf201c2aceefe0af51 Binary files /dev/null and b/docs/pic/1726194962547.jpg differ diff --git a/docs/pic/1726194980430.jpg b/docs/pic/1726194980430.jpg new file mode 100644 index 0000000000000000000000000000000000000000..c2b2db55a5a8e9d5a9d5a50eb189c64315ec58c3 Binary files /dev/null and b/docs/pic/1726194980430.jpg differ diff --git a/docs/pic/1726195007716.jpg b/docs/pic/1726195007716.jpg new file mode 100644 index 0000000000000000000000000000000000000000..800d00c0999bcc27b0becd6a908faecdb8536392 Binary files /dev/null and b/docs/pic/1726195007716.jpg differ diff --git a/docs/pic/1726195033006.jpg b/docs/pic/1726195033006.jpg new file mode 100644 index 0000000000000000000000000000000000000000..af33c5de91e2d83e733a2c4f81247a692b441802 Binary files /dev/null and b/docs/pic/1726195033006.jpg differ diff --git a/docs/pic/1726195055385.jpg b/docs/pic/1726195055385.jpg new file mode 100644 index 0000000000000000000000000000000000000000..c198edde07ba2b0113453e4fd27ce67e490ae850 Binary files /dev/null and b/docs/pic/1726195055385.jpg differ diff --git a/docs/pic/1726195173004.jpg b/docs/pic/1726195173004.jpg new file mode 100644 index 0000000000000000000000000000000000000000..42f1f757263a5a4ee1d41c6f8436a67c27ea09be Binary files /dev/null and b/docs/pic/1726195173004.jpg differ diff --git a/docs/pic/1726195185553.jpg b/docs/pic/1726195185553.jpg new file mode 100644 index 0000000000000000000000000000000000000000..d5e854c9146b31d5214ba175f4803576c49474b0 Binary files /dev/null and b/docs/pic/1726195185553.jpg differ diff --git a/docs/pic/1726212673803.jpg b/docs/pic/1726212673803.jpg new file mode 100644 index 0000000000000000000000000000000000000000..e1b736beffba597d5a796923a08efbfb3f45362b Binary files /dev/null and b/docs/pic/1726212673803.jpg differ diff --git a/docs/pic/1726295359409.jpg b/docs/pic/1726295359409.jpg new file mode 100644 index 0000000000000000000000000000000000000000..75e6e2fd7089cfc919902693022a5a12ea3b2d85 Binary files /dev/null and b/docs/pic/1726295359409.jpg differ diff --git a/docs/pic/1726625374530.jpg b/docs/pic/1726625374530.jpg new file mode 100644 index 0000000000000000000000000000000000000000..3191541225fbdf1b93d6216728b4cf84b31b0c81 Binary files /dev/null and b/docs/pic/1726625374530.jpg differ diff --git a/docs/pic/1726630394671.jpg b/docs/pic/1726630394671.jpg new file mode 100644 index 0000000000000000000000000000000000000000..7efb837f5f20a14fe070506f99297842afe6bc7e Binary files /dev/null and b/docs/pic/1726630394671.jpg differ diff --git a/docs/pic/1726630452801.jpg b/docs/pic/1726630452801.jpg new file mode 100644 index 0000000000000000000000000000000000000000..271003246b62efeffa29d90347a2f0dac43a2e02 Binary files /dev/null and b/docs/pic/1726630452801.jpg differ diff --git a/docs/pic/1726638820911.jpg b/docs/pic/1726638820911.jpg new file mode 100644 index 0000000000000000000000000000000000000000..bd76af2c6e0e9205896623388ff534154af1582a Binary files /dev/null and b/docs/pic/1726638820911.jpg differ diff --git a/docs/pic/1726638933153.png b/docs/pic/1726638933153.png new file mode 100644 index 0000000000000000000000000000000000000000..5f24fae3e69f235521c8b5900206e2300219122e Binary files /dev/null and b/docs/pic/1726638933153.png differ diff --git a/docs/pic/1726641165140.png b/docs/pic/1726641165140.png new file mode 100644 index 0000000000000000000000000000000000000000..c6545e2b226f69ec9c8365d61ecf0ddf182776ca Binary files /dev/null and b/docs/pic/1726641165140.png differ diff --git a/docs/pic/1726641355806(1).jpg b/docs/pic/1726641355806(1).jpg new file mode 100644 index 0000000000000000000000000000000000000000..75e0995c2d589fc893da0f479cb58b2f5e330f8b Binary files /dev/null and b/docs/pic/1726641355806(1).jpg differ diff --git a/docs/pic/1726643724134.png b/docs/pic/1726643724134.png new file mode 100644 index 0000000000000000000000000000000000000000..6c70c5c7d545f0ace89be0f15fa713cb5c4c3bb4 Binary files /dev/null and b/docs/pic/1726643724134.png differ diff --git a/docs/pic/1726726305937.jpg b/docs/pic/1726726305937.jpg new file mode 100644 index 0000000000000000000000000000000000000000..ebeb94d8cc8744348f60dad8424e8f44955c320c Binary files /dev/null and b/docs/pic/1726726305937.jpg differ diff --git a/docs/pic/1726733706495.jpg b/docs/pic/1726733706495.jpg new file mode 100644 index 0000000000000000000000000000000000000000..05c682cd22980a61a8eb933fea0cc7bd86e9a19e Binary files /dev/null and b/docs/pic/1726733706495.jpg differ diff --git a/docs/pic/1726738087431.jpg b/docs/pic/1726738087431.jpg new file mode 100644 index 0000000000000000000000000000000000000000..82d00f8ac0fc046553511730cfbce97bb2fde33c Binary files /dev/null and b/docs/pic/1726738087431.jpg differ diff --git a/docs/pic/1726798955072.jpg b/docs/pic/1726798955072.jpg new file mode 100644 index 0000000000000000000000000000000000000000..054b1417576b07343f2ca8e63c1a0f5ae3469ed9 Binary files /dev/null and b/docs/pic/1726798955072.jpg differ diff --git a/docs/pic/1726815257210.jpg b/docs/pic/1726815257210.jpg new file mode 100644 index 0000000000000000000000000000000000000000..4a3140b809d037cb12716a7b5574878793fa2faa Binary files /dev/null and b/docs/pic/1726815257210.jpg differ diff --git a/docs/pic/1726815312053.jpg b/docs/pic/1726815312053.jpg new file mode 100644 index 0000000000000000000000000000000000000000..f127a749c10f8e3cd23950f4e03e7dafc6eeea8f Binary files /dev/null and b/docs/pic/1726815312053.jpg differ diff --git a/docs/pic/1726821386031.jpg b/docs/pic/1726821386031.jpg new file mode 100644 index 0000000000000000000000000000000000000000..4971a296b2d3a29450bdba1163b1cd741c04f779 Binary files /dev/null and b/docs/pic/1726821386031.jpg differ diff --git a/docs/pic/1726824735521.jpg b/docs/pic/1726824735521.jpg new file mode 100644 index 0000000000000000000000000000000000000000..e9c2af573e484c5738e253a9a7e73b7355c5b006 Binary files /dev/null and b/docs/pic/1726824735521.jpg differ diff --git a/docs/pic/1727057648326.jpg b/docs/pic/1727057648326.jpg new file mode 100644 index 0000000000000000000000000000000000000000..27b208b9555aa93935373fb3277cf928a6b70aa3 Binary files /dev/null and b/docs/pic/1727057648326.jpg differ diff --git a/docs/pic/1727080322988.png b/docs/pic/1727080322988.png new file mode 100644 index 0000000000000000000000000000000000000000..7b86d0e732b095e378dfdc94dc49c92148f928f1 Binary files /dev/null and b/docs/pic/1727080322988.png differ diff --git a/docs/pic/1727236640408.png b/docs/pic/1727236640408.png new file mode 100644 index 0000000000000000000000000000000000000000..a1e23c0ee7eb62b3641807ba1269801df885b407 Binary files /dev/null and b/docs/pic/1727236640408.png differ diff --git a/docs/pic/1727334986111.png b/docs/pic/1727334986111.png new file mode 100644 index 0000000000000000000000000000000000000000..d58a449d447115024d4997015e08d2b56c8a2d83 Binary files /dev/null and b/docs/pic/1727334986111.png differ diff --git a/docs/pic/1727335298342.png b/docs/pic/1727335298342.png new file mode 100644 index 0000000000000000000000000000000000000000..b0693ac8dcc25398c1c03ed1dfbf8506199cbd27 Binary files /dev/null and b/docs/pic/1727335298342.png differ diff --git a/docs/pic/1727335415629.png b/docs/pic/1727335415629.png new file mode 100644 index 0000000000000000000000000000000000000000..6569479ec95925d96b9e9afaa9a24fdd392b62e9 Binary files /dev/null and b/docs/pic/1727335415629.png differ diff --git a/docs/pic/1727347239030.png b/docs/pic/1727347239030.png new file mode 100644 index 0000000000000000000000000000000000000000..7847121c3d6b68b14205dca7deccf7b37eb81125 Binary files /dev/null and b/docs/pic/1727347239030.png differ diff --git a/docs/pic/1727348074534.png b/docs/pic/1727348074534.png new file mode 100644 index 0000000000000000000000000000000000000000..2c682a99cba52532c6d7a5c15e30867d074d642b Binary files /dev/null and b/docs/pic/1727348074534.png differ diff --git a/docs/pic/1727348096035.png b/docs/pic/1727348096035.png new file mode 100644 index 0000000000000000000000000000000000000000..8c9d72645829751f868a09d9bcb8a1b017d61363 Binary files /dev/null and b/docs/pic/1727348096035.png differ diff --git a/docs/pic/1728349708823.png b/docs/pic/1728349708823.png new file mode 100644 index 0000000000000000000000000000000000000000..7579970bfb17aba21d2a24e65cd7aeed01a47ded Binary files /dev/null and b/docs/pic/1728349708823.png differ diff --git a/docs/pic/1728349735379(1).jpg b/docs/pic/1728349735379(1).jpg new file mode 100644 index 0000000000000000000000000000000000000000..ece2437d7a292f8f1b39f6da4a945e7480c4ec96 Binary files /dev/null and b/docs/pic/1728349735379(1).jpg differ diff --git a/docs/pic/1728349751741.png b/docs/pic/1728349751741.png new file mode 100644 index 0000000000000000000000000000000000000000..63df3704669b021af685113e98e4a859e3fe1866 Binary files /dev/null and b/docs/pic/1728349751741.png differ diff --git a/docs/pic/1728350254414(1).jpg b/docs/pic/1728350254414(1).jpg new file mode 100644 index 0000000000000000000000000000000000000000..fd38ee7134769e68e6bfa22b271b2a515ecfd143 Binary files /dev/null and b/docs/pic/1728350254414(1).jpg differ diff --git a/docs/pic/1728366087056.png b/docs/pic/1728366087056.png new file mode 100644 index 0000000000000000000000000000000000000000..24a87c51c67f674dc1ec13d2f7101f422654cb47 Binary files /dev/null and b/docs/pic/1728366087056.png differ diff --git a/docs/pic/1728366261828.png b/docs/pic/1728366261828.png new file mode 100644 index 0000000000000000000000000000000000000000..f5c3824021120f35b6e09f80b636bb4632fbfeae Binary files /dev/null and b/docs/pic/1728366261828.png differ diff --git a/docs/pic/1728366653229.png b/docs/pic/1728366653229.png new file mode 100644 index 0000000000000000000000000000000000000000..9f4ef877cd5c76027d1656b430495e0fff02c930 Binary files /dev/null and b/docs/pic/1728366653229.png differ diff --git a/docs/pic/1728367351847.png b/docs/pic/1728367351847.png new file mode 100644 index 0000000000000000000000000000000000000000..6b79fee885f0b238fd6b2e7cf2711aa47fe371be Binary files /dev/null and b/docs/pic/1728367351847.png differ diff --git a/docs/pic/1728379696289.jpg b/docs/pic/1728379696289.jpg new file mode 100644 index 0000000000000000000000000000000000000000..ef0cbca276461aabd7f467ae0ee9e8ca0f0b8df9 Binary files /dev/null and b/docs/pic/1728379696289.jpg differ diff --git a/docs/pic/1728380911855.png b/docs/pic/1728380911855.png new file mode 100644 index 0000000000000000000000000000000000000000..70d0036084badd8982e0559699ce1b536dfc2ef0 Binary files /dev/null and b/docs/pic/1728380911855.png differ diff --git a/docs/pic/1728380940373.png b/docs/pic/1728380940373.png new file mode 100644 index 0000000000000000000000000000000000000000..f573122e3d5b695fc7ad2dd18c1e6dd1cbe8baa9 Binary files /dev/null and b/docs/pic/1728380940373.png differ diff --git a/docs/pic/2184d50a74a46c4b3f78d540e615810.png b/docs/pic/2184d50a74a46c4b3f78d540e615810.png new file mode 100644 index 0000000000000000000000000000000000000000..d023ceacee69e607d70e31058a43e000b2c34a2d Binary files /dev/null and b/docs/pic/2184d50a74a46c4b3f78d540e615810.png differ diff --git a/docs/pic/23b272bd88d2dffb2c3662efe0e70ef.png b/docs/pic/23b272bd88d2dffb2c3662efe0e70ef.png new file mode 100644 index 0000000000000000000000000000000000000000..f5bc931c7031d51684ef0b634a3ec6012791840e Binary files /dev/null and b/docs/pic/23b272bd88d2dffb2c3662efe0e70ef.png differ diff --git a/docs/pic/2d23b1fa3489f9f9ad2d2d1e76fbec4.png b/docs/pic/2d23b1fa3489f9f9ad2d2d1e76fbec4.png new file mode 100644 index 0000000000000000000000000000000000000000..3c29966493bce662b0af5a65c8daee31e47af2b2 Binary files /dev/null and b/docs/pic/2d23b1fa3489f9f9ad2d2d1e76fbec4.png differ diff --git a/docs/pic/a5139bc14c11c2d67487ee49bbb402c.png b/docs/pic/a5139bc14c11c2d67487ee49bbb402c.png new file mode 100644 index 0000000000000000000000000000000000000000..6f524664be7f3d0ad323b88a75df656de65cc511 Binary files /dev/null and b/docs/pic/a5139bc14c11c2d67487ee49bbb402c.png differ diff --git a/docs/pic/a80ebf7e8a9c613542d5fb01b7fa19b.png b/docs/pic/a80ebf7e8a9c613542d5fb01b7fa19b.png new file mode 100644 index 0000000000000000000000000000000000000000..fdc3eb39fdda46ebb0e74c5877c3ac9e3f961145 Binary files /dev/null and b/docs/pic/a80ebf7e8a9c613542d5fb01b7fa19b.png differ diff --git a/docs/pic/image-20240528173107958.png b/docs/pic/image-20240528173107958.png new file mode 100644 index 0000000000000000000000000000000000000000..2464629e8bd518ed5203662406316e8b7e12331a Binary files /dev/null and b/docs/pic/image-20240528173107958.png differ diff --git a/docs/pic/image-20240530173305431.png b/docs/pic/image-20240530173305431.png new file mode 100644 index 0000000000000000000000000000000000000000..16c63a569d6924a30214eb5c823244b633882811 Binary files /dev/null and b/docs/pic/image-20240530173305431.png differ diff --git a/docs/pic/image-20240829165616356.png b/docs/pic/image-20240829165616356.png new file mode 100644 index 0000000000000000000000000000000000000000..999d9e571fca4fabec1e82927d6d2f6c21c36330 Binary files /dev/null and b/docs/pic/image-20240829165616356.png differ diff --git a/open_mcu b/open_mcu new file mode 160000 index 0000000000000000000000000000000000000000..2ace59d0bba392179b1897da88d751baf6f81d6f --- /dev/null +++ b/open_mcu @@ -0,0 +1 @@ +Subproject commit 2ace59d0bba392179b1897da88d751baf6f81d6f diff --git a/vendor/yibaina_3061M/demo/pic/1726195055385.jpg b/vendor/yibaina_3061M/demo/pic/1726195055385.jpg new file mode 100644 index 0000000000000000000000000000000000000000..c198edde07ba2b0113453e4fd27ce67e490ae850 Binary files /dev/null and b/vendor/yibaina_3061M/demo/pic/1726195055385.jpg differ diff --git a/vendor/yibaina_3061M/demo/pic/1726798955072.jpg b/vendor/yibaina_3061M/demo/pic/1726798955072.jpg new file mode 100644 index 0000000000000000000000000000000000000000..054b1417576b07343f2ca8e63c1a0f5ae3469ed9 Binary files /dev/null and b/vendor/yibaina_3061M/demo/pic/1726798955072.jpg differ diff --git a/vendor/yibaina_3061M/demo/pic/1728350254414(1).jpg b/vendor/yibaina_3061M/demo/pic/1728350254414(1).jpg new file mode 100644 index 0000000000000000000000000000000000000000..fd38ee7134769e68e6bfa22b271b2a515ecfd143 Binary files /dev/null and b/vendor/yibaina_3061M/demo/pic/1728350254414(1).jpg differ diff --git a/vendor/yibaina_3061M/demo/pic/1728366087056.png b/vendor/yibaina_3061M/demo/pic/1728366087056.png new file mode 100644 index 0000000000000000000000000000000000000000..24a87c51c67f674dc1ec13d2f7101f422654cb47 Binary files /dev/null and b/vendor/yibaina_3061M/demo/pic/1728366087056.png differ diff --git a/vendor/yibaina_3061M/demo/pic/image-20241008172804303.png b/vendor/yibaina_3061M/demo/pic/image-20241008172804303.png new file mode 100644 index 0000000000000000000000000000000000000000..766c624bbe0363f013d20cb8f3091835e0942978 Binary files /dev/null and b/vendor/yibaina_3061M/demo/pic/image-20241008172804303.png differ diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/inc/sample_acmp_interrupt.h b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/inc/sample_acmp_interrupt.h new file mode 100644 index 0000000000000000000000000000000000000000..40fc5e55f67c33e46d623977fdb10ddf1514819b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/inc/sample_acmp_interrupt.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_acmp_interrupt.h + * @author MCU Driver Team + * @brief acmp sample module. + * @details This file provides sample code for users to help use + * the interrupt function of the acmp. + */ + +#ifndef SAMPLE_ACMP_INTERRUPT_H +#define SAMPLE_ACMP_INTERRUPT_H + +#include "main.h" +/* ACMP interrupt caller function. */ +void ACMP_CompareInt(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/feature.h b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.c b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c9f921f0336343847d8611c8a6fcfabd0f94e160 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.c @@ -0,0 +1,56 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_acmp_interrupt.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +ACMP_Handle g_acmp0; +DAC_Handle g_dac0; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + ACMP_CompareInt(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.h b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..fd633ecfbfccc9dbaf18bb793c70a94190ce7fef --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/main.h @@ -0,0 +1,63 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "acmp.h" +#include "acmp_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "dac.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern ACMP_Handle g_acmp0; +extern DAC_Handle g_dac0; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void ACMP0PositveCallFunc(void *handle); +void ACMP0NegativeCallFunc(void *handle); +void ACMP0EdgedCallFunc(void *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/system_init.c b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..cac67856c3ae758f0a748278bbb56140d4f799e3 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/init/system_init.c @@ -0,0 +1,157 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void ACMP0PositveCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0PositveCallFunc */ + /* USER CODE END ACMP0PositveCallFunc */ +} + +__weak void ACMP0NegativeCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0NegativeCallFunc */ + /* USER CODE END ACMP0NegativeCallFunc */ +} + +__weak void ACMP0EdgedCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0EdgedCallFunc */ + /* USER CODE END ACMP0EdgedCallFunc */ +} + +static void ACMP0_Init(void) +{ + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_SET; + HAL_ACMP_Init(&g_acmp0); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_POS_INT, ACMP0PositveCallFunc); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_NEG_INT, ACMP0NegativeCallFunc); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_EDGE_INT, ACMP0EdgedCallFunc); + IRQ_Register(IRQ_ACMP_INT, HAL_ACMP_IrqHandler, &g_acmp0); + IRQ_SetPriority(IRQ_ACMP_INT, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_ACMP_INT); +} + +static void DAC0_Init(void) +{ + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + g_dac0.dacValue = 250; + HAL_DAC_Init(&g_dac0); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN4 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_ACMP_N3); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_ACMP_N3, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_ACMP_N3, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_ACMP_N3, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_ACMP_N3, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN1 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_ACMP0_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_ACMP0_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_ACMP0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_ACMP0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_ACMP0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + ACMP0_Init(); + DAC0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/readme.md b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..f66fcc0bdd5e0d6a6e1c0fb6c50d455f923180e0 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/readme.md @@ -0,0 +1,20 @@ +# 比较器 -- 比较器中断使用样例 +## 关键字: ACMP比较器, 比较器中断使用样例 + +**【功能描述】** ++ ACMP输出比较结果,会根据ACMP比较结果, 触发不同类型的中断回调函数。 + ++ 输出比较结果为上升沿时,会触发上升沿回调函数,输出结果为下降沿时,会触发下降沿回调函数。 + +**【示例配置】** ++ 初始化ACMP,配置ACMP的N端和P端口输入,配置ACMP比较结果输出,管脚配置可以在ACMP配置界面中,配置“Input And Output Setting”进行更改。 + ++ ACMP的比较结果输出,当配置的正端的电压值高于负端的电压值时输出高,反之则输出低。示例中输入源、输出的配置,可以通过ACMP的配置界面,或在“system_init.c”文件中修改ACMP初始化代码实现。 + +**【示例效果】** ++ 当用户烧录编译后的示例代码后,ACMP初始化和配置完成后,会在IOCMG_26输出输入源的比较结果,并调用触发相应的回调函数,用户可以通过交换输入源信号,并测量输出端的电压,比较输入源的电压大小。 + +**【注意事项】** ++ 输入的比较电压不能超过0V~输入电源大小(3.3V)。 + ++ 最小可识别有效差分输入电压为20mV。 \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_interrupt/src/sample_acmp_interrupt.c b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/src/sample_acmp_interrupt.c new file mode 100644 index 0000000000000000000000000000000000000000..39aaf5ea8c0443360852689c61e169ece5ca3674 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_interrupt/src/sample_acmp_interrupt.c @@ -0,0 +1,78 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_acmp_interrupt.c + * @author MCU Driver Team + * @brief can sample module. + * @details This file provides sample code for users to help use + * the interrupt function of the acmp. + */ +#include "sample_acmp_interrupt.h" +#include "main.h" +#include "debug.h" + +/** + * @brief ACMP Positve Callback function. + * @param handle ACMP handle. + * @retval None. + */ +void ACMP0PositveCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0PositveCallFunc */ + DBG_PRINTF("ACMP positive callback function.\r\n"); + /* USER CODE END ACMP0PositveCallFunc */ +} + +/** + * @brief ACMP Negative Callback function. + * @param handle ACMP handle. + * @retval None. + */ +void ACMP0NegativeCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0NegativeCallFunc */ + DBG_PRINTF("ACMP negative callback function.\r\n"); + /* USER CODE END ACMP0NegativeCallFunc */ +} + +/** + * @brief ACMP Edge callback function. + * @param handle ACMP handle. + * @retval None. + */ +void ACMP0EdgedCallFunc(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0EdgedCallFunc */ + DBG_PRINTF("ACMP edge callback funtion.\r\n"); + /* USER CODE END ACMP0EdgedCallFunc */ +} + +/** + * @brief Example of comparing ACMP results + * @param None. + * @retval None. + */ +void ACMP_CompareInt(void) +{ + SystemInit(); + DBG_PRINTF("Example: ACMP comparison result interrupt. The ACMP output comparison result triggers different types\ + of interrupts, such as rising edge triggle positve call back function, falling edge triggle negative\ + callback function, and flip edge triggle edge callback funtion.\r\n"); +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/inc/sample_acmp_out_result.h b/vendor/yibaina_3061M/demo/sample_acmp_out_result/inc/sample_acmp_out_result.h new file mode 100644 index 0000000000000000000000000000000000000000..00dc659db8fddec527b939334102708426ec64f3 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/inc/sample_acmp_out_result.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_acmp_out_result.h + * @author MCU Driver Team + * @brief acmp sample module. + * @details This file provides sample code for users to help use + * the compare function of the acmp. + */ + +#ifndef SAMPLE_ACMP_OUT_RESULT_H +#define SAMPLE_ACMP_OUT_RESULT_H + +#include "main.h" +/* ACMP interrupt caller function. */ +void ACMP_CompareResultOutput(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/feature.h b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.c b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..ff8f2443c84604adbf6d35120e3c47183f145b0c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.c @@ -0,0 +1,56 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_acmp_out_result.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +ACMP_Handle g_acmp0; +DAC_Handle g_dac0; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + ACMP_CompareResultOutput(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.h b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..3f9acb527da02e152345974670ac993cd2cdefd9 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "acmp.h" +#include "acmp_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "dac.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern ACMP_Handle g_acmp0; +extern DAC_Handle g_dac0; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/system_init.c b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..b171e1edb5a35ca19f6692fe168ed8340bdc56ae --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/init/system_init.c @@ -0,0 +1,130 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void ACMP0_Init(void) +{ + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_UNSET; + HAL_ACMP_Init(&g_acmp0); +} + +static void DAC0_Init(void) +{ + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + g_dac0.dacValue = 250; + HAL_DAC_Init(&g_dac0); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN4 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_ACMP_N3); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_ACMP_N3, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_ACMP_N3, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_ACMP_N3, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_ACMP_N3, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN1 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_ACMP0_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_ACMP0_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_ACMP0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_ACMP0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_ACMP0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + ACMP0_Init(); + DAC0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/readme.md b/vendor/yibaina_3061M/demo/sample_acmp_out_result/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..7992f5e80a8cfa77ec3c6112f15c2bc0881627e7 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/readme.md @@ -0,0 +1,18 @@ +# 模拟比较器基本使用 - 内部DAC输出电压和外部输入电压比较 +## 关键字: ACMP, DAC内部输入 + +**【功能描述】** ++ 对两个输入源进行电压比较,输出比较结果。输入和输出信号都可配,本示例中的输入的N端信号为DAC的内部输出,输入的P端信号为GPIO2_6,在GPIO0_7中输出比较结 果。 + +**【示例配置】** ++ ACMP的输入比较信号,可在ACMP配置界面中,配置“Input And Output Setting”进行更改。 + ++ 当配置的正端的电压值高于负端的电压值时输出高,反之则输出低。示例中输入源、输出的配置,可以通过ACMP的配置界面,或在“system_init.c”文件中修改ACMP初始化代码实现。 + +**【示例效果】** ++ 当用户烧录编译后的示例代码后,ACMP初始化和配置完成后,会在GPIO0_7输出输入源的比较结果。用户可以通过交换N端口输入电压,并测量输出端的电压,比较输入源的电压大小。 + +**【注意事项】** ++ 输入的比较电压不能超过0V~输入电源大小(3.3V)。 + ++ 最小可识别有效差分输入电压为20mV。 \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_acmp_out_result/src/sample_acmp_out_result.c b/vendor/yibaina_3061M/demo/sample_acmp_out_result/src/sample_acmp_out_result.c new file mode 100644 index 0000000000000000000000000000000000000000..70dee0f49ac97bd2c93cbf5f81927c5769e0124d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_acmp_out_result/src/sample_acmp_out_result.c @@ -0,0 +1,38 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_acmp_out_result.c + * @author MCU Driver Team + * @brief can sample module. + * @details This file provides sample code for users to help use + * the compare function of the acmp. + */ +#include "sample_acmp_out_result.h" +#include "main.h" +#include "debug.h" + +/** + * @brief Example of comparing ACMP results + * @param None. + * @retval None. + */ +void ACMP_CompareResultOutput(void) +{ + SystemInit(); + DBG_PRINTF("Example: ACMP comparison result output, N pole requires an external input of the voltage to be\ + compared. P pole input source from DAC out(0.8V), ACMP result is output GPIO0_7.\r\n"); +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..fea2fcb0e2964a061997126edf2b28cd94388b89 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "adc.h" +#include "adc_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; +extern ADC_Handle g_adc; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void ADC_ContinueInt(ADC_Handle *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..9185591932f6d5396ab4600c93334678d2a2ab94 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/generatecode/system_init.c @@ -0,0 +1,132 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void ADC_ContinueInt(ADC_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ADC0_CALLBACK_INT2 */ + /* USER CODE END ADC0_CALLBACK_INT2 */ +} + +static void ADC0_Init(void) +{ + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + + HAL_ADC_Init(&g_adc); + + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_ENABLE; + socParam.finishMode = ADC_SOCFINISH_INT2; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); + HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT2, (ADC_CallbackType)ADC_ContinueInt); + IRQ_Register(IRQ_ADC0_INT2, HAL_ADC_IrqHandlerInt2, &g_adc); + IRQ_SetPriority(IRQ_ADC0_INT2, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_ADC0_INT2); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN47 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_5_AS_ADC_AIN2); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_5_AS_ADC_AIN2, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_5_AS_ADC_AIN2, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_5_AS_ADC_AIN2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_5_AS_ADC_AIN2, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + ADC0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/main.c b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/main.c new file mode 100644 index 0000000000000000000000000000000000000000..cfed19152869b33c187655dfd131d4eab65a2b1d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_adc_continue_trigger.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +ADC_Handle g_adc; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + ADC_ContinueSample(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.c b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.c new file mode 100644 index 0000000000000000000000000000000000000000..8ad708b05aceed536c9469cf45070e9cc2c21273 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.c @@ -0,0 +1,65 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_adc_continue_trigger.c + * @author MCU Driver Team + * @brief adc sample module. + * @details In continuous mode, the ADC uses its internal interrupts to continuously trigger ADC sampling. After + * sampling is complete, an ADC interrupt is triggered. The ADC conversion result can be read in the + * interrupt callback function. ADC Continuous Sampling Function: The first time is triggered by software, + * and the subsequent consecutive sampling is triggered by interrupts. + * (1) ADC strigger source is ADC1 interrupt2(IRQ_ADC1_INT2). Select the ADC trigger source in + * "socParam.intTrigSource" of SystemInit(). + * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" and "ADC_SOC_NUM1" + * of SystemInit(). External input source: GPIO2_2/GPIO2_3 + * (3) The ADC conversion result is read from the interrupt callback function ADC_ContinueInt interface. + * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to obtain result. + * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface. + */ +#include "sample_adc_continue_trigger.h" + +/** + * @brief User callback function of ADC interrupt one. + * @param adcHandle ADC handle. + * @retval None. + */ +void ADC_ContinueInt(ADC_Handle *adcHandle) +{ + DBG_PRINTF("ADC_Int1Finish\r\n"); + unsigned int ret = HAL_ADC_GetConvResult(adcHandle, ADC_SOC_NUM1); + float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("result: %d, voltage: %f\r\n", ret, voltage); +} + +/** + * @brief Continuous sample function by using internal interrupt. + * @param None. + * @retval None. + */ +void ADC_ContinueSample(void) +{ + SystemInit(); + DBG_PRINTF("ADC_ContinueSample begin\r\n"); + HAL_ADC_StartIt(&g_adc); /* Enable ADC interrupt */ + /* The first trigger, then internal interrupt triggered continuous sampling */ + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); + /* + To disable the continuous sampling function, perform the following sampling methods: + (1) Disable the ADC interrupt and use IRQ_DisableN(). + (2) Configure the SOC trigger source and remove interrupt triggering. + */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.h b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.h new file mode 100644 index 0000000000000000000000000000000000000000..0227a13c84e0b0e209a7b63229c07c53d444504e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_continue_trigger/sample_adc_continue_trigger.h @@ -0,0 +1,33 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_adc_continue_trigger.h + * @author MCU Driver Team + * @brief adc sample module. + * @details This file provides users with sample code to help use ADC function: + * ADC Continuous Sampling Function: The first time is triggered by software, + * and the subsequent consecutive sampling is triggered by interrupts. + */ +#ifndef SAMPLE_ADC_CONTINUESAMPLE_H +#define SAMPLE_ADC_CONTINUESAMPLE_H + +#include "debug.h" +#include "adc.h" +#include "main.h" + +void ADC_ContinueSample(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..ba7409092f6f3aa5b28fb1e0b276fcc3d1c61ec6 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/main.h @@ -0,0 +1,63 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "adc.h" +#include "adc_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "dma.h" +#include "dma_ex.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; +extern ADC_Handle g_adc; + +extern DMA_Handle g_dmac; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void ADC_DMACallback(ADC_Handle *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..1c0cde8bd3e6b5cab2df95aa0f59479b20fa09ea --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/generatecode/system_init.c @@ -0,0 +1,161 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void DMA_Channel0Init(void *handle) +{ + DMA_ChannelParam dma_param; + dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_UNALTERED; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_ADC0; + dma_param.destPeriph = DMA_REQUEST_MEM; + dma_param.srcWidth = DMA_TRANSWIDTH_WORD; + dma_param.destWidth = DMA_TRANSWIDTH_WORD; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO); +} + +static void DMA_Init(void) +{ + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel0Init((void *)(&g_adc)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST); +} + +__weak void ADC_DMACallback(ADC_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ADC0_CALLBACK_DMA */ + /* USER CODE END ADC0_CALLBACK_DMA */ +} + +static void ADC0_Init(void) +{ + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + + g_adc.dmaHandle = &g_dmac; + g_adc.adcDmaChn = 0; /* DMA Channel 0 */ + HAL_ADC_Init(&g_adc); + + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_ENABLE; + socParam.finishMode = ADC_SOCFINISH_DMA; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); + HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_DMA, (ADC_CallbackType)ADC_DMACallback); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN47 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_5_AS_ADC_AIN2); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_5_AS_ADC_AIN2, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_5_AS_ADC_AIN2, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_5_AS_ADC_AIN2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_5_AS_ADC_AIN2, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + DMA_Init(); + UART0_Init(); + ADC0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/main.c b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/main.c new file mode 100644 index 0000000000000000000000000000000000000000..c83928a805ccb6f6326c0ed91f3fdec18336134e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/main.c @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_adc_single_trigger_dma.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +ADC_Handle g_adc; +DMA_Handle g_dmac; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + ADC_SingleTriggerDma(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.c b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.c new file mode 100644 index 0000000000000000000000000000000000000000..d5495585f3d34933482065d8a1db4985f6f2a46b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.c @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_adc_single_trigger_dma.c + * @author MCU Driver Team + * @brief adc sample module. + * @details In single sampling mode, the ADC sampling is triggered by software. After the sampling is complete, + * the DMA is triggered to transfer the result. + * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigSample() to configure software tirgger SOC1. + * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" of SystemInit(), + * "ADC_SOC_NUM3" can be Modified. External input source: GPIO2_2/GPIO2_3 + * (3) The ADC conversion result is read from DMA interrupt callback function ADC1DMACallback(). + */ + +#include "sample_adc_single_trigger_dma.h" +#include "adc.h" +#include "main.h" +static unsigned int g_adcRet[10] = {0}; +/** + * @brief User callback function of ADC interrupt one. + * @param adcHandle ADC handle. + * @retval None. + */ +void ADC_DMACallback(ADC_Handle *adcHandle) +{ + BASE_FUNC_UNUSED(adcHandle); + DBG_PRINTF("DMACallback\r\n"); + DBG_PRINTF("result: %d\r\n", g_adcRet[0]); + float voltage = (float)g_adcRet[0] / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("voltage: %f\r\n", voltage); +} + +/** + * @brief ADC channels sample with DMA. Transfers four SOC conversion results in one DMA request. + * @param None. + * @retval None. + */ +void ADC_SingleTriggerDma(void) +{ + SystemInit(); + DBG_PRINTF("ADC_SingleTriggerDma begin\r\n"); + + HAL_ADC_StartDma(&g_adc, ADC_SOC_NUM1, ADC_SOC_NUM1, g_adcRet); /* Transfer converted data of SOC1 */ + + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software triggers SOC1 */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.h b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.h new file mode 100644 index 0000000000000000000000000000000000000000..0242aafc453f6fd84656ccc0ddf1c6242537bf61 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_adc_single_trigger_dma/sample_adc_single_trigger_dma.h @@ -0,0 +1,32 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_adc_single_trigger_dma.h + * @author MCU Driver Team + * @brief adc sample module. + * @details This file provides users with sample code to help use ADC function: + * ADC sampling by software trigger with dma + */ +#ifndef SAMPLE_ADC_SINGLETRIGGER_DMA_H +#define SAMPLE_ADC_SINGLETRIGGER_DMA_H + +#include "debug.h" +#include "adc.h" +#include "main.h" + +void ADC_SingleTriggerDma(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/inc/sample_apt_single_resistor.h b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/inc/sample_apt_single_resistor.h new file mode 100644 index 0000000000000000000000000000000000000000..6ec216fa16274064f5c697fd8daeb43b0e5308f1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/inc/sample_apt_single_resistor.h @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file apt_hal_sample.h + * @author MCU Driver Team + * @brief Header file containing functions prototypes of APT module HAL sample. + */ + +#ifndef McuMagicTag_APT_HAL_SAMPLE_H +#define McuMagicTag_APT_HAL_SAMPLE_H + +#include "apt_ip.h" +#include "interrupt.h" + +/** + * @brief ADC current sample mode. + */ +typedef enum { + ADC_SINGLE_RESISTOR = 0x00000000U, + ADC_THREE_RESISTORS = 0x00000001U, +} ADC_SampleMode; + +void APT_PWMInitHALSample(void); +void APT_SetPWMDutyU(unsigned int duty); +void APT_SetPWMDutyV(unsigned int duty); +void APT_SetPWMDutyW(unsigned int duty); +void APT_SetADCTrgTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB, ADC_SampleMode mode); +void APT_PhaseOut(bool enable); +void APT_RunAllPwm(void); +void APT_StopAllPwm(void); +#endif /* McuMagicTag_APT_HAL_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/feature.h b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.c b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..528c579f0e3813b011ab441da697a22f7614eac1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.c @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_apt_single_resistor.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +UART_Handle g_uart0Handle; +APT_Handle g_hAptU; +APT_Handle g_hAptV; +APT_Handle g_hAptW; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + APT_PWMInitHALSample(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.h b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..2c9109f5c4e24bc5934dd6ea1d41b876f2ed6238 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/main.h @@ -0,0 +1,61 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "apt.h" +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0Handle; +extern APT_Handle g_hAptU; +extern APT_Handle g_hAptV; +extern APT_Handle g_hAptW; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void AptUTimerCallback(void *aptHandle); +void AptUEventCallback(void *aptHandle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/system_init.c b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..82dff9d90f4edc82d13d834e660b824458a04d65 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/init/system_init.c @@ -0,0 +1,310 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void AptUEventCallback(void *aptHandle) +{ + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_EVENT_INTERRUPT */ + /* USER CODE END APT0_EVENT_INTERRUPT */ +} + +__weak void AptUTimerCallback(void *aptHandle) +{ + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_TIMER_INTERRUPT */ + /* USER CODE END APT0_TIMER_INTERRUPT */ +} + +static void APT0_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_ENABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptU, &protectApt); +} + +static void APT0_Init(void) +{ + HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE); + + g_hAptU.baseAddress = APT0; + + /* Clock Settings */ + g_hAptU.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptU.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptU.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_hAptU.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptU.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptU.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptU.waveform.divInitVal = 0; + g_hAptU.waveform.cntInitVal = 0; + g_hAptU.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptU.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptU.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptU.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptU.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + + /* ADC Trigger SOCA */ + g_hAptU.adcTrg.trgEnSOCA = BASE_CFG_ENABLE; + g_hAptU.adcTrg.cntCmpSOCA = 1; /* 1 is count compare point of ADC trigger source SOCA when using CMPA */ + g_hAptU.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_UP; + g_hAptU.adcTrg.trgScaleSOCA = 1; + + /* ADC Trigger SOCB */ + g_hAptU.adcTrg.trgEnSOCB = BASE_CFG_ENABLE; + g_hAptU.adcTrg.cntCmpSOCB = 1; + g_hAptU.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_UP; + g_hAptU.adcTrg.trgScaleSOCB = 1; + + g_hAptU.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptU.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + + /* Timer Trigger */ + g_hAptU.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE; + g_hAptU.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO_PERIOD; + g_hAptU.tmrInterrupt.tmrInterruptScale = 1; + + APT0_ProtectInit(); + + HAL_APT_PWMInit(&g_hAptU); + HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback); + IRQ_SetPriority(IRQ_APT0_EVT, 1); /* 1 is priority value */ + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU); + IRQ_EnableN(IRQ_APT0_EVT); + HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback); + IRQ_SetPriority(IRQ_APT0_TMR, 1); /* 1 is priority value */ + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU); + IRQ_EnableN(IRQ_APT0_TMR); +} + +static void APT1_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptV, &protectApt); +} + +static void APT1_Init(void) +{ + HAL_CRG_IpEnableSet(APT1_BASE, IP_CLK_ENABLE); + + g_hAptV.baseAddress = APT1; + + /* Clock Settings */ + g_hAptV.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptV.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptV.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_hAptV.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptV.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptV.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptV.waveform.divInitVal = 0; + g_hAptV.waveform.cntInitVal = 0; + g_hAptV.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptV.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptV.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptV.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptV.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + + APT1_ProtectInit(); + + HAL_APT_PWMInit(&g_hAptV); +} + +static void APT2_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptW, &protectApt); +} + +static void APT2_Init(void) +{ + HAL_CRG_IpEnableSet(APT2_BASE, IP_CLK_ENABLE); + + g_hAptW.baseAddress = APT2; + + /* Clock Settings */ + g_hAptW.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptW.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptW.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_hAptW.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptW.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptW.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptW.waveform.divInitVal = 0; + g_hAptW.waveform.cntInitVal = 0; + g_hAptW.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptW.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptW.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptW.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptW.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + + APT2_ProtectInit(); + + HAL_APT_PWMInit(&g_hAptW); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0Handle.baseAddress = UART0; + + g_uart0Handle.baudRate = UART0_BAND_RATE; + g_uart0Handle.dataLength = UART_DATALENGTH_8BIT; + g_uart0Handle.stopBits = UART_STOPBITS_ONE; + g_uart0Handle.parity = UART_PARITY_NONE; + g_uart0Handle.txMode = UART_MODE_BLOCKING; + g_uart0Handle.rxMode = UART_MODE_BLOCKING; + g_uart0Handle.fifoMode = BASE_CFG_ENABLE; + g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0Handle); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN19 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_0_AS_APT0_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_0_AS_APT0_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_0_AS_APT0_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_0_AS_APT0_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_0_AS_APT0_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN23 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_0_AS_APT0_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_0_AS_APT0_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_0_AS_APT0_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_0_AS_APT0_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_0_AS_APT0_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN21 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_2_AS_APT2_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_2_AS_APT2_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_2_AS_APT2_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_2_AS_APT2_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_2_AS_APT2_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN25 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_APT2_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_APT2_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_APT2_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_APT2_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_APT2_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN20 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_1_AS_APT1_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_1_AS_APT1_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_1_AS_APT1_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_1_AS_APT1_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_1_AS_APT1_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN24 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_1_AS_APT1_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_1_AS_APT1_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_1_AS_APT1_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_1_AS_APT1_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_1_AS_APT1_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN1 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_POE0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_POE0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_POE0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_POE0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_POE0, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + APT0_Init(); + APT1_Init(); + APT2_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/readme.md b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..3d4224711ba365124e554a4db8b9ba712609cab6 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/readme.md @@ -0,0 +1,29 @@ +# 高级脉宽调制PWM-单电阻采样电机控制 +## 关键字: 互补PWM波, 电机控制, 单电阻采样 + +**【功能描述】** ++ 该示例为单电阻采样的电机控制样例,输出U,V和W相的带死区的互补PWM波。 + ++ 在U相配置有触发ADC采样的SOC信号。 + +**【示例配置】** ++ 通过配置APT0,APT1和APT2来配置U,V,W相的互补PWM波。APT0、APT1、APT2的配置分别对应U、V、W相的互补PWM波。 + ++ PWM输出保护,三相PWM输出都配置了保护时间,分别为指定管脚拉高保护,调试模式保护,时钟错误保护,内存泄漏保护。 + ++ 以上配置可通过APT配置界面进行更改,或在“system_init.c”中更改APT对应的配置。 + +**【示例效果】** ++ 若保护事件来临,APT模块会停止PWM波的输出,保护电机等硬件设备。 + +**【注意事项】** ++ 占空比可通过“HAL_APT_SetPWMDutyByNumber”进行更改。 + ++ 分频器的分频系数的范围为 0到4095,计数器的计数周期值的范围为 0到65535。死区延时计数值范围 0到65535。 + ++ PWM 波的频率: +```c +①递增/递减计时模式,PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值+1)); +②先增后减计时模式,PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值*2))。 +``` ++ 死区的宽度:插入死区的宽度 = 工作时钟周期 * 死区延时计数值。 \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_apt_single_resistor/src/sample_apt_single_resistor.c b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/src/sample_apt_single_resistor.c new file mode 100644 index 0000000000000000000000000000000000000000..5b8d57a2511fe58f902b7c90b91d9f313bef9e21 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_apt_single_resistor/src/sample_apt_single_resistor.c @@ -0,0 +1,244 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_apt_single_resistor.c + * @author MCU Driver Team + * @brief APT module sample of HAL API. + * This file provides some configuration example of APT module HAL API. + * + PWM waveform configuration and ADC trigger time configuration sample. + * + Output control protection configuration sample. + * + Interrupt callback function and user registration function sample. + * + APT module synchronization sample. + */ + +#include "sample_apt_single_resistor.h" +#include "apt.h" +#include "debug.h" +#include "crg.h" +#include "gpio.h" +#include "main.h" +#include "debug.h" + +/** + * APTx module base definition of three phases. + */ +#define APT_U APT0 /* Base address of U phase APT module */ +#define APT_V APT1 /* Base address of V phase APT module */ +#define APT_W APT2 /* Base address of W phase APT module */ + +/** + * APT module run control definition. + */ +#define APT_RUN_U RUN_APT0 +#define APT_RUN_V RUN_APT1 +#define APT_RUN_W RUN_APT2 + +/** + * APT interrupt number definition of three phases. + * IGBT - APT2, APT3, APT4 (U, V, W phase) + * IPM - APT5, APT6, ATP7 (U, V, W phase) + */ +#define APT_U_EVT_IRQ IRQ_APT0_EVT +#define APT_U_TMR_IRQ IRQ_APT0_TMR +#define APT_V_EVT_IRQ IRQ_APT1_EVT +#define APT_V_TMR_IRQ IRQ_APT1_TMR +#define APT_W_EVT_IRQ IRQ_APT2_EVT +#define APT_W_TMR_IRQ IRQ_APT2_TMR + +/* APT module interrupt priority. */ +#define EVT_INTERRUPT_PRIORITY 7 +#define TMR_INTERRUPT_PRIORITY 6 + +/* Use sync-out pulse from APT_U as the sync-in source for slave APT module. */ +#define APT_SYNC_IN_SRC APT_SYNCIN_SRC_APT0_SYNCOUT + +/* Some configuration values of APT modules. */ +/* You can also use HAL_CRG_GetIpFreq(APT_U) to get the CPU clock frequency (In units of Hz). */ +#define APT_CLK_FREQ HAL_CRG_GetIpFreq((void *)APT_U) +#define APT_PWM_FREQ 5000U /* Set PWM frequency to 5000Hz. */ +#define APT_TIMER_PERIOD (APT_CLK_FREQ / (APT_PWM_FREQ * 2)) /* Period value when using APT_COUNT_MODE_UP_DOWN. */ +#define APT_DIVIDER_FACTOR 1U /* The APT clock is not divided. */ +#define DB_CNT_PER_US (APT_CLK_FREQ / 1000000) /* Dead-Band delay counter period when Dead-Band time is 1us */ +#define DB_US 3U /* Dead-Band time, in units of us */ + + +/** + * @brief Timer interrupt callback function of U phase APT module. + * @param aptHandle APT module handle. + * @retval None. + */ +void AptUTimerCallback(void *aptHandle) +{ + APT_Handle *handle = (APT_Handle *)aptHandle; + /* read counter direction */ + if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_DOWN) { + DBG_PRINTF("Count Down\r\n"); + } else if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_UP) { + DBG_PRINTF("Count Up\r\n"); + } +} + +/** + * @brief Event interrupt callback function of U phase APT module. + * @param aptHandle APT module handle. + * @retval None. + */ +void AptUEventCallback(void *aptHandle) +{ + BASE_FUNC_UNUSED(aptHandle); +} + +/** + * @brief Interrupt initialization of U phase APT. + * @retval None. + */ +static void InterruptInitAptU(void) +{ + /* Timer interrupt and event interrupt of U phase APT module. */ + IRQ_SetPriority(APT_U_EVT_IRQ, EVT_INTERRUPT_PRIORITY); + IRQ_SetPriority(APT_U_TMR_IRQ, TMR_INTERRUPT_PRIORITY); + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU); + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU); + IRQ_EnableN(APT_U_EVT_IRQ); + IRQ_EnableN(APT_U_TMR_IRQ); + HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback); + HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback); +} + +/** + * @brief APT Synchronize initialize. + * @retval None. + */ +static void APT_SyncMasterInit(APT_Handle *aptHandle) +{ + HAL_APT_MasterSyncInit(aptHandle, APT_SYNC_OUT_ON_CNTR_ZERO); +} + + +static void APT_SyncSlaveInit(APT_Handle *aptHandle) +{ + APT_SlaveSyncIn aptSlave; + aptSlave.divPhase = 0; /* divide phase value */ + aptSlave.cntPhase = 0; /* counter phase value */ + aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + aptSlave.syncInSrc = APT_SYNC_IN_SRC; /* sync source selection */ + aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(aptHandle, &aptSlave); +} + +/** + * @brief Initialize and start the APT modules of U, V, W phases. + * @param mode: ADC sampling mode. + * @retval None. + */ +void APT_PWMInitHALSample(void) +{ + /* Initialize GPIO pin for timer interrupt test. */ + SystemInit(); + IRQ_Enable(); + InterruptInitAptU(); + /* Initial APT module synchronization. */ + APT_SyncMasterInit(&g_hAptU); + APT_SyncSlaveInit(&g_hAptV); + APT_SyncSlaveInit(&g_hAptW); + + /* Start APT module of U, V, W phases. */ + HAL_APT_StartModule(APT_RUN_U | APT_RUN_V | APT_RUN_W); +} + +/** + * @brief Modify the duty ratio of PWM waveform for U phase APT. + * @param duty Duty of PWM waveform. + * @retval None. + */ +void APT_SetPWMDutyU(unsigned int duty) +{ + HAL_APT_SetPWMDutyByNumber(&g_hAptU, duty); +} + +/** + * @brief Modify the duty ratio of PWM waveform for V phase APT. + * @param duty Duty of PWM waveform. + * @retval None. + */ +void APT_SetPWMDutyV(unsigned int duty) +{ + HAL_APT_SetPWMDutyByNumber(&g_hAptV, duty); +} + +/** + * @brief Modify the duty ratio of PWM waveform for W phase APT. + * @param duty Duty of PWM waveform. + * @retval None. + */ +void APT_SetPWMDutyW(unsigned int duty) +{ + HAL_APT_SetPWMDutyByNumber(&g_hAptW, duty); +} + +/** + * @brief Modify the ADC trigger time of master APT module (U phase). + * @param cntCmpSOCA Count compare value of SOCA. + * @param cntCmpSOCB Counnt compare value of SOCB. + * @retval None. + */ +void APT_SetADCTrgTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB, ADC_SampleMode mode) +{ + /* AptU use CMPA and CMPB as the trigger source of SOCA and SOCB. */ + /* SOCA is used to trigger 1st ADC sampling when using single resistor sampling. */ + /* SOCB is used to trigger 2nd ADC sampling when using single resistor sampling. */ + if (mode == ADC_SINGLE_RESISTOR) { + HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB); + } else { + HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB); + HAL_APT_SetADCTriggerTime(&g_hAptV, cntCmpSOCA, cntCmpSOCB); + HAL_APT_SetADCTriggerTime(&g_hAptW, cntCmpSOCA, cntCmpSOCB); + } +} + +/** + * @brief PWM waveform output control. + * @param enable pwm waveform output enable. + * @retval None. + */ +void APT_PhaseOut(bool enable) +{ + if (enable == true) { + /* Enable PWM U waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B); + /* Enable PWM V waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B); + /* Enable PWM W waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B); + } else { + /* Disable PWM U waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_U); + /* Disable PWM V waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_V); + /* Disable PWM W waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_W); + } +} diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/inc/sample_can_send_receive.h b/vendor/yibaina_3061M/demo/sample_can_send_receive/inc/sample_can_send_receive.h new file mode 100644 index 0000000000000000000000000000000000000000..378ee15a097f1700723f6e2610169486901c2d0b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/inc/sample_can_send_receive.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_can_send_receive.h + * @author MCU Driver Team + * @brief can sample module. + * @details This file provides sample code for users to help use + * the filtering function of the CAN. + */ + +#ifndef SAMPLE_CAN_SEND_RECEIVE_H +#define SAMPLE_CAN_SEND_RECEIVE_H + +#include "main.h" + +int CAN_ReceiveFilter(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/init/feature.h b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.c b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..08142ef2db05d5fbb111070e22db10a37c3d972f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.c @@ -0,0 +1,49 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_can_send_receive.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE END 0 */ +CAN_Handle g_can; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ +/* USER CODE END 1 */ +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CAN_ReceiveFilter(); + /* USER CODE BEGIN 3 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} +/* USER CODE BEGIN 6 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.h b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..ae1c13877551f6b3adc20b938a6ef83fee90f0f4 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/main.h @@ -0,0 +1,55 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "can.h" +#include "crg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern CAN_Handle g_can; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + + +void CAN_ReadFinish(void *handle); +void CAN_WriteFinish(void *handle); +void CAN_Transmit_Error(void *handle); +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/init/system_init.c b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..d4409cb628f01e839929649e254429ed24360d35 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/init/system_init.c @@ -0,0 +1,140 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void CAN_ReadFinish(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_READ_FINISH */ + /* USER CODE END CAN_READ_FINISH */ +} + +__weak void CAN_WriteFinish(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_WRITE_FINISH */ + /* USER CODE END CAN_WRITE_FINISH */ +} + +__weak void CAN_Transmit_Error(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_TRANSMIT_ERROR */ + /* USER CODE END CAN_TRANSMIT_ERROR */ +} + +static void CAN_Init(void) +{ + HAL_CRG_IpEnableSet(CAN_BASE, IP_CLK_ENABLE); + + g_can.baseAddress = CAN; + + g_can.typeMode = CAN_MODE_NORMAL; + g_can.seg1Phase = CAN_SEG1_6TQ; + g_can.seg2Phase = CAN_SEG2_3TQ; + g_can.sjw = CAN_SJW_2TQ; + g_can.prescalser = 25; /* 25 is frequency division coefficient */ + g_can.rxFIFODepth = 3; /* A maximum of 3 packet objects are in RX FIFO */ + g_can.autoRetrans = BASE_CFG_ENABLE; + HAL_CAN_Init(&g_can); + HAL_CAN_RegisterCallBack(&g_can, CAN_READ_FINISH, CAN_ReadFinish); + HAL_CAN_RegisterCallBack(&g_can, CAN_WRITE_FINISH, CAN_WriteFinish); + HAL_CAN_RegisterCallBack(&g_can, CAN_TRNS_ERROR, CAN_Transmit_Error); + IRQ_Register(IRQ_CAN, HAL_CAN_IrqHandler, &g_can); + IRQ_SetPriority(IRQ_CAN, 1); + IRQ_EnableN(IRQ_CAN); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); + + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_5_AS_CAN_TX); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_5_AS_CAN_TX, PULL_NONE); /* Pull-up and pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_5_AS_CAN_TX, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_5_AS_CAN_TX, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_5_AS_CAN_TX, DRIVER_RATE_2); /* Output signal edge fast/slow */ + + HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + + HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + CAN_Init(); + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/readme.md b/vendor/yibaina_3061M/demo/sample_can_send_receive/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..0d83947848602ef505e1b6332e4e031f4e564527 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/readme.md @@ -0,0 +1,26 @@ +# 控制局域网-发送扩展数据帧和接收符合过滤规则的扩展帧数据 +## 关键字: CAN, 总线 + +**【功能描述】** ++ CAN向总线发送扩展帧数据,并从总线上接收符合过滤规则的扩展帧数据。 + ++ CAN模块数据的发送和接收采用的都是中断形式。 + +**【示例配置】** ++ 初始化CAN:通过g_can.typeMode配置CAN的工作模式,配置CAN的传输波特率,接收FIFO的深度以及否开启自动重传。这些配置可以通过CAN的配置界面进行更改。默认配置参数可以通过CAN的配置界面或“system_init.c”文件中的进行查看。 + ++ 发送数据帧g_sendFrame:分配发送数据帧的类型为扩展帧,指定发送帧的ID,填入需要发送的数据和长度,调用“HAL_CAN_Write”函数进行数据的发送。发送成功之后会调用回调函数“Can_WriteFinish”,此回调函数可以通过“HAL_CAN_RegisterCallBack”进行注册。 + ++ 接收数据帧g_receiveFrame: 存储接收到的数据,会存入接收到的帧类型,帧ID,帧数据域。 + ++ 过滤条件rxFilter:配置过滤的帧类型和过滤ID和过滤掩码。并通过“HAL_CAN_ReadIT”使过滤规则生效,接收成功之后,会调用接收成功回调函数“Can_ReadFinish”,此回调函数也可以通过“HAL_CAN_RegisterCallBack”进行注册。 + +**【示例效果】** ++ 编译烧录此示例,此示例会向总线发送ID为0x1314的扩展数据帧,数据内容为字符‘0’。接收总线上ID为0x1X14的扩展帧(X代表任意0-F的数字)。 + ++ 串口0打印提示信息:CAN发送给总线的数据和接收到总线的数据。 + +**【注意事项】** ++ 发送给总线的数据帧为扩展帧类型,且满足过滤条件,才会被接收,其他数据默认会被总线丢弃。 + ++ 此示例默认开启自动重发,数据发送失败,会重新发送。若不想重发,需在配置中关闭“Auto Retransmission”项,或在“system_init.c”中关闭“g_can.autoRetrans”配置项。 \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_can_send_receive/src/sample_can_send_receive.c b/vendor/yibaina_3061M/demo/sample_can_send_receive/src/sample_can_send_receive.c new file mode 100644 index 0000000000000000000000000000000000000000..2ecbb6b9ad64834ab08b8ba4ae3e8caf9d49b99f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_can_send_receive/src/sample_can_send_receive.c @@ -0,0 +1,123 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_can_send_receive.c + * @author MCU Driver Team + * @brief can sample module. + * @details This file provides sample code for users to help use + * the filtering function of the CAN. + */ +#include "sample_can_send_receive.h" +#include "main.h" +#include "debug.h" + +/** + * @brief User-defined read completion callback function. + * @param UART_Handle UART handle. + * @retval None. + */ +void CAN_ReadFinish(void *handle) +{ + CAN_Handle *canHandle = (CAN_Handle *)handle; + DBG_PRINTF("CAN Read Finish\r\n"); + DBG_PRINTF("data[0]: %d \r\n", canHandle->rxFrame->frame[0]); /* frame[0] data */ + DBG_PRINTF("data[1]: %d \r\n", canHandle->rxFrame->frame[1]); /* frame[1] data */ + DBG_PRINTF("data[2]: %d \r\n", canHandle->rxFrame->frame[2]); /* frame[2] data */ + DBG_PRINTF("data[3]: %d \r\n", canHandle->rxFrame->frame[3]); /* frame[3] data */ + DBG_PRINTF("data[4]: %d \r\n", canHandle->rxFrame->frame[4]); /* frame[4] data */ + DBG_PRINTF("data[5]: %d \r\n", canHandle->rxFrame->frame[5]); /* frame[5] data */ + DBG_PRINTF("data[6]: %d \r\n", canHandle->rxFrame->frame[6]); /* frame[6] data */ + DBG_PRINTF("data[7]: %d \r\n", canHandle->rxFrame->frame[7]); /* frame[7] data */ + DBG_PRINTF("ID: 0x%x \r\n", canHandle->rxFrame->CANId); + DBG_PRINTF("len: %d \r\n", canHandle->rxFrame->dataLength); + DBG_PRINTF("type: %d \r\n", canHandle->rxFrame->type); + BASE_FUNC_UNUSED(canHandle); + return; +} + +/** + * @brief User-defined write completion callback function. + * @param CAN_Handle CAN handle. + * @retval None. + */ +void CAN_WriteFinish(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("CAN Write Finish\r\n"); + return; +} +/** + * Sample Note: + * baund rate : 100k Bit/s + * To-be-received data frame : Extended Data Frame, ID = 0x1314 + * + * There are two filtering methods: + * 1. Receive only the specified ID: + * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA; + * rxFilter.filterID = 0x1314; + * rxFilter.filterMask = 0xFFFFFFFF; + * + * 2. Use mask to receive: + * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA; + * rxFilter.filterID = 0x131_; + * rxFilter.filterMask = 0xFFFFFFF0; + * + * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA; + * rxFilter.filterID = 0x13_4; + * rxFilter.filterMask = 0xFFFFFF0F; + * + * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA; + * rxFilter.filterID = 0x1_14; + * rxFilter.filterMask = 0xFFFFF0FF; + * + * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA; + * rxFilter.filterID = 0x_314; + * rxFilter.filterMask = 0xFFFF0FFF; + * + * The value of the ID mask bit, which is not used for filtering. + * + * Do not filter by ID: + * rxFilter.filterMask = 0x00000000; + * + * Both standard frames and extended frames can be received: + * rxFilter.receiveType = CAN_FilterFrame_STD_EXT_DATA; + */ +/** + * @brief CAN sample code for configuring the filtering function and can send and receive packets. + * @param None. + * @retval None. + */ +CANFrame g_sendFrame; +CANFrame g_receiveFrame; +int CAN_ReceiveFilter(void) +{ + SystemInit(); + DBG_PRINTF("CAN Init \r\n"); + CAN_FilterConfigure rxFilter; + g_can.rxFrame = &g_receiveFrame; /* Address for storing received frame data */ + DBG_PRINTF("CAN interrupt register \r\n"); + g_sendFrame.type = CAN_TYPEFRAME_EXT_DATA; /* Transmit extended data frame */ + g_sendFrame.CANId = 0x1314; /* 0x1314 is ID of transmitted data frames */ + g_sendFrame.dataLength = 1; /* 1 is length of the sent frame */ + g_sendFrame.frame[0] = '0'; + HAL_CAN_Write(&g_can, &g_sendFrame); + rxFilter.receiveType = CAN_FILTERFRAME_EXT_DATA; + rxFilter.filterID = 0x1014; /* 0x1014 and 0xFFFFF0FF constitute filtering rules */ + rxFilter.filterMask = 0xFFFFF0FF; /* 0xFFFFF0FF is filter ID mask */ + HAL_CAN_ReadIT(&g_can, &g_receiveFrame, &rxFilter); + return 0; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/inc/capm_hall_sample.h b/vendor/yibaina_3061M/demo/sample_capm/inc/capm_hall_sample.h new file mode 100644 index 0000000000000000000000000000000000000000..a106aa41d55166358a0dbc5e0f591a4f5282f415 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/inc/capm_hall_sample.h @@ -0,0 +1,41 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file capm_hall_sample.h + * @author MCU Driver Team + * @brief CAPM HAL level module driver head file. + * This file shows a sample to get hall position information + */ +#ifndef McuMagicTag_CAPM_HALL_SAMPLE_H +#define McuMagicTag_CAPM_HALL_SAMPLE_H +#include "baseinc.h" +#include "capm_ip.h" +#include "capm.h" + +#define CAPM_PART_A 1 +#define CAPM_PART_B 5 +#define CAPM_PART_C 4 +#define CAPM_PART_D 6 +#define CAPM_PART_E 2 +#define CAPM_PART_F 3 + +#define CAPM_HIGH 0 +#define CAPM_LOW 1 + +unsigned char CAPM_GetHallValue(void); +void CAPM_HallSample(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/init/feature.h b/vendor/yibaina_3061M/demo/sample_capm/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/init/main.c b/vendor/yibaina_3061M/demo/sample_capm/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..5c87670ea75c82c44e2caf4086a0375bfbf8c4a2 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/init/main.c @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "capm_hall_sample.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +CAPM_Handle g_capmAConfig; +CAPM_Handle g_capmBConfig; +CAPM_Handle g_capmCConfig; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CAPM_HallSample(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/init/main.h b/vendor/yibaina_3061M/demo/sample_capm/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..ff3e7293e46465011306c118a591c237b60d5bb9 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/init/main.h @@ -0,0 +1,58 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "capm.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern CAPM_Handle g_capmAConfig; +extern CAPM_Handle g_capmBConfig; +extern CAPM_Handle g_capmCConfig; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/init/system_init.c b/vendor/yibaina_3061M/demo/sample_capm/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..6169207669a17d8e90f458c9301a39b3d5e833c6 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/init/system_init.c @@ -0,0 +1,170 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void CAPM0_Init(void) +{ + HAL_CRG_IpEnableSet(CAPM0_BASE, IP_CLK_ENABLE); + + g_capmAConfig.baseAddress = CAPM0; + + g_capmAConfig.deburrNum = 0; + g_capmAConfig.capMode = CAPM_CONTINUECAP; + g_capmAConfig.preScale = 0; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmAConfig.useCapNum = 2; + g_capmAConfig.tscntDiv = 1 - 1; + g_capmAConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmAConfig); +} + +static void CAPM1_Init(void) +{ + HAL_CRG_IpEnableSet(CAPM1_BASE, IP_CLK_ENABLE); + + g_capmBConfig.baseAddress = CAPM1; + + g_capmBConfig.deburrNum = 0; + g_capmBConfig.capMode = CAPM_CONTINUECAP; + g_capmBConfig.preScale = 0; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmBConfig.useCapNum = 2; + g_capmBConfig.tscntDiv = 1 - 1; + g_capmBConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmBConfig); +} + +static void CAPM2_Init(void) +{ + HAL_CRG_IpEnableSet(CAPM2_BASE, IP_CLK_ENABLE); + + g_capmCConfig.baseAddress = CAPM2; + + g_capmCConfig.deburrNum = 0; + g_capmCConfig.capMode = CAPM_CONTINUECAP; + g_capmCConfig.preScale = 0; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmCConfig.useCapNum = 2; + g_capmCConfig.tscntDiv = 1 - 1; + g_capmCConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmCConfig); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN33 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO5_0_AS_CAPM0_IN); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO5_0_AS_CAPM0_IN, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO5_0_AS_CAPM0_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO5_0_AS_CAPM0_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO5_0_AS_CAPM0_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN32 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_1_AS_CAPM1_IN); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_1_AS_CAPM1_IN, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_1_AS_CAPM1_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_1_AS_CAPM1_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_1_AS_CAPM1_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN31 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_0_AS_CAPM2_IN); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_0_AS_CAPM2_IN, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_0_AS_CAPM2_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_0_AS_CAPM2_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_0_AS_CAPM2_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + CAPM0_Init(); + CAPM1_Init(); + CAPM2_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_capm/readme.md b/vendor/yibaina_3061M/demo/sample_capm/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..063867325627f281d23fb038e87fec2fc27c560d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/readme.md @@ -0,0 +1,18 @@ +# CAPM读取电机HALL位置传感器 +## 关键字: CAPM, HALL传感器 + +**【功能描述】** ++ 使用三个CAPM捕获三个HALL传感器的电平信息 + +**【示例配置】** ++ 捕获模式:可通过“g_capmAConfig.capMode”进行配置,默认为连续捕获CAPM_CONTINUECAP + ++ 预分频:对CAPM输入信号进行预分频,可通过”g_capmAConfig.preScale“进行配置,默认为不分频 + ++ 捕获寄存器配置:可通过”g_capmAConfig.capRegConfig“进行配置,默认为上升沿捕获,每次复位 + +**【示例效果】** ++ 在IOCMG_15、IOCMG_18和IOCMG_19输入HALL传感器的输入信号。在串口打印的数据中的每一位表示当前时刻的对应的HALL传感器的电平状态。 + +**【注意事项】** ++ 需要转动电机才能进行CAPM捕获霍尔传感器信号 diff --git a/vendor/yibaina_3061M/demo/sample_capm/src/capm_hall_sample.c b/vendor/yibaina_3061M/demo/sample_capm/src/capm_hall_sample.c new file mode 100644 index 0000000000000000000000000000000000000000..98721f9b940d288bcc16b44ab1f45e0746ae4b44 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_capm/src/capm_hall_sample.c @@ -0,0 +1,79 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file capm_hall_sample.c + * @author MCU Driver Team + * @brief CAPM use HALL sensor implementation sample. + * @details This file provides CAPM use HALL sensor implementation sample. + */ +#include "capm_hall_sample.h" +#include "interrupt.h" +#include "debug.h" +#include "main.h" + +#define FIRST_BIT_SHIFT 1 +#define SECOND_BIT_SHIFT 2 + +/** + * @brief Calculate current level + * @param handle: CAPM handle. + * @retval none + */ +static unsigned char CAPM_CalculateLevel(CAPM_Handle *handle) +{ + unsigned char hallNextECR; + + CAPM_ASSERT_PARAM(handle != NULL); + hallNextECR = HAL_CAPM_GetNextLoadECRNum(handle); /* get next ECR number */ + if (hallNextECR == CAPM_NEXT_LOAD_ECR1 || hallNextECR == CAPM_NEXT_LOAD_ECR3) { + return CAPM_LOW; /* current level is low */ + } else { + return CAPM_HIGH; /* current level is high */ + } +} + +/** + * @brief Get current Hall position value. + * @param None. + * @retval current position:CAPM_PART_A~F. + */ +unsigned char CAPM_GetHallValue(void) +{ + unsigned char hallALevel, hallBLevel, hallCLevel; + unsigned char hallPosition; + hallALevel = CAPM_CalculateLevel(&g_capmAConfig); /* get A phase's level */ + hallBLevel = CAPM_CalculateLevel(&g_capmBConfig); /* get B phase's level */ + hallCLevel = CAPM_CalculateLevel(&g_capmCConfig); /* get C phase's level */ + hallPosition = hallALevel << SECOND_BIT_SHIFT; /* move to the 2nd bit */ + hallPosition |= hallBLevel << FIRST_BIT_SHIFT; /* move to the 1st bit */ + hallPosition |= hallCLevel; + return hallPosition; +} + +/** + * @brief Sample of reading hall sensor value. + * @param None. + * @retval None. + */ +void CAPM_HallSample(void) +{ + SystemInit(); + while (1) { + unsigned char data = CAPM_GetHallValue(); /* get hall sensor value */ + DBG_PRINTF("hall = 0x%x\r\n", data); + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/inc/cfd_check_error_sample.h b/vendor/yibaina_3061M/demo/sample_cfd_check_error/inc/cfd_check_error_sample.h new file mode 100644 index 0000000000000000000000000000000000000000..8c11fcf38a1bf3d47439a34d381a2be9a198c165 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/inc/cfd_check_error_sample.h @@ -0,0 +1,32 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cfd_check_error_sample.h + * @author MCU Driver Team + * @brief cfd sample module. + * @details This file provides sample code for users to test using the CFD module. + */ + +#ifndef McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H +#define McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H + +/* Includes ------------------------------------------------------------------*/ +#include "baseinc.h" + +BASE_StatusType CFD_SampleMain(void); + +#endif /* McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H */ diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/feature.h b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.c b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..01587d8b003a45cefa9419efcfaeb76990db46ea --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.c @@ -0,0 +1,55 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "cfd_check_error_sample.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +CFD_Handle g_cfd; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CFD_SampleMain(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.h b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..5edd2c7ffd33f53181beff5e92a4ad2ed9e61eea --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "cfd.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern CFD_Handle g_cfd; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void CFDCheckEndCallback(CFD_Handle *handle); +void CFD_CheckErrorCallback(CFD_Handle *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/system_init.c b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..0db784208f2f24f599b3b14954c1f022cb6c26e1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/init/system_init.c @@ -0,0 +1,124 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void CFDCheckEndCallback(CFD_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CFD_INT_CHECK_END_MASK */ + /* USER CODE END CFD_INT_CHECK_END_MASK */ +} + +__weak void CFD_CheckErrorCallback(CFD_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CFD_INT_PLL_REF_CLOCK_STOP_MASK */ + /* USER CODE END CFD_INT_PLL_REF_CLOCK_STOP_MASK */ +} + +static BASE_StatusType CFD_Init(void) +{ + HAL_CRG_IpEnableSet(CFD_BASE, IP_CLK_ENABLE); + + g_cfd.baseAddress = CFD; + g_cfd.upperBound = 12; + g_cfd.interruptType = CFD_INT_PLL_REF_CLOCK_STOP_MASK; + + HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_CHECK_END_MASK, (CFD_CallBackFuncType)CFDCheckEndCallback); + HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_PLL_REF_CLOCK_STOP_MASK, (CFD_CallBackFuncType)CFD_CheckErrorCallback); + + IRQ_Register(IRQ_CFD, HAL_CFD_IrqHandler, &g_cfd); + IRQ_SetPriority(IRQ_CFD, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_CFD); + return HAL_CFD_Init(&g_cfd); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + CFD_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/readme.md b/vendor/yibaina_3061M/demo/sample_cfd_check_error/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..80ba155fa21ef614371697bef72e2167cd44822a --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/readme.md @@ -0,0 +1,21 @@ +# 验证CFD的时钟失效保护功能 +## 关键字: CFD, 时钟失效, 中断 + +**【功能描述】** ++ 监测目标时钟(HOSC或TCXO)是否失效,每隔5s分别注入时钟失效中断和解除时钟失效中断,用于验证CFD的时钟失效保护功能。 + +**【示例配置】** ++ CFD参考时钟源:参考时钟源固定为内部低速时钟CLK_LOSC,默认为不分频。 + ++ CFD目标时钟源:目标时钟源固定为HOSC或TCXO,分频比固定为2048。 + ++ CFD上限值: 上限值可通过“g_cfd.upperBound”配置。 + ++ CFD中断类型:中断类型可通过“g_cfd.interruptType”进行配置,默认为时钟失效中断。 + +**【示例效果】** ++ Debug串口首先每隔1s打印出监测目标时钟频率的CFDCNTLOCK锁存值,在注入时钟失效中断后每隔1s分别打印时钟失效回调函数中的log, 5s后解除时钟失效中断后再每隔1s打印CFDCNTLOCK锁存值,循环往复。 + +**【注意事项】** ++ 时钟失效中断触发硬件系统事件2会自动关闭APT并将主时钟切换为LOSC进行保护,用户可在中断服务函数中进行时钟恢复或者复位等安全操作; ++ 每次中断触发后自行判断计数值是否在门限内,非门限内则判定为异常时钟;该模块目标时钟分配比固化为2048分频,参考时钟不分频。 diff --git a/vendor/yibaina_3061M/demo/sample_cfd_check_error/src/cfd_check_error_sample.c b/vendor/yibaina_3061M/demo/sample_cfd_check_error/src/cfd_check_error_sample.c new file mode 100644 index 0000000000000000000000000000000000000000..fb43875a8085aecb6475a2d092c1be8db4b73448 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cfd_check_error/src/cfd_check_error_sample.c @@ -0,0 +1,94 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cfd_check_error_sample.c + * @author MCU Driver Team + * @brief The CFD module monitors abnormal clocks, inject clock error after loop times in cycles. + * @details Check whether the PLL reference clock (TCXO or HOSC) fails by using \ + * the LOSC = 32Khz clock. If the clock fails, the interrupt service function \ + * is triggered for processing, and the hardware system event 2 is triggered to \ + * disable the APT and switch the master clock to the LOSC for protection. \ + * Users can perform secure operations such as clock recovery or reset in the \ + * interrupt service function. If the interrupt trigger mode is set to non-clock failure mode, \ + * the user needs to determine whether the count value is within the threshold after each interrupt \ + * is triggered. If the count value is not within the threshold, the clock is considered abnormal. + * For details about the PLL reference clock recovery mechanism, see the chip technical guide. \ + * The interrupt type can be configured by users. Only the upper threshold is available. \ + * For details about the calculation method, see the chip technical guide. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "interrupt.h" +#include "debug.h" +#include "cfd.h" +#include "cfd_check_error_sample.h" +#include "main.h" +#include "crg.h" + +#define LOOP_TIMES 5 + +unsigned int g_loopTimes = 0; + +void CFD_CheckErrorCallback(CFD_Handle *handle); + +/** + * @brief Sample main function. + * @param None. + * @return @ref BASE_StatusType + */ +BASE_StatusType CFD_SampleMain(void) +{ + SystemInit(); + HAL_CFD_Start(&g_cfd); + + while (1) { + /* If ref clk cnt value bigger than upperbound, then junp to callback */ + BASE_FUNC_DELAY_S(1); + DBG_PRINTF("main loop, ref clk cnt value = %d\r\n", DCL_CFD_GetCntValue(g_cfd.baseAddress)); + if (g_loopTimes++ >= LOOP_TIMES) { + g_loopTimes = 0; + /* Inject interrupt type error, trig int jump to callback */ + DBG_PRINTF("Inject interrupt type error\r\n"); + DCL_CFD_EnableInterruptInject(g_cfd.baseAddress, g_cfd.interruptType); + } + } + return BASE_STATUS_OK; +} + +/** + * @brief Interrupt callback function triggered by module check errors. + * @param handle CFD handle. + * @return None. + */ +void CFD_CheckErrorCallback(CFD_Handle *handle) +{ + CFD_Handle* cfdHandle = (CFD_Handle*)handle; + while (1) { + /* after inject error, core freq switch to losc = 32khz */ + DBG_PRINTF("In CFD interrupt function : clock frequency error and \ + core freq = %dhz\r\n", HAL_CRG_GetCoreClkFreq()); + BASE_FUNC_DELAY_S(1); + /* loop control */ + if (g_loopTimes++ >= LOOP_TIMES) { + g_loopTimes = 0; + /* Disable Inject interrupt type error, jump to main loop */ + DBG_PRINTF("Disable inject interrupt type error\r\n"); + DCL_CFD_DisableInterruptInject(cfdHandle->baseAddress, cfdHandle->interruptType); + return; + } + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/inc/cmm_check_error_sample.h b/vendor/yibaina_3061M/demo/sample_cmm_check_error/inc/cmm_check_error_sample.h new file mode 100644 index 0000000000000000000000000000000000000000..21bca7e0ba5601fc191b9c72694d29bbdc2a37d8 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/inc/cmm_check_error_sample.h @@ -0,0 +1,32 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cmm_check_error_sample.h + * @author MCU Driver Team + * @brief cmm module sample + * @details This file provides sample code for users to test using the CMM module. + */ + +#ifndef McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H +#define McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H + +/* Includes ------------------------------------------------------------------*/ +#include "baseinc.h" + +BASE_StatusType CMM_SampleMain(void); + +#endif /* McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H */ diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/feature.h b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.c b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..09c8ab1ea19765a41685ff53be88c2cfd90b6379 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.c @@ -0,0 +1,55 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "cmm_check_error_sample.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +CMM_Handle g_cmm; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CMM_SampleMain(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.h b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..792bdb13f3c44a984eb790557adc93f0ff706a1d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/main.h @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "cmm.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern CMM_Handle g_cmm; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void CMMCounterOverFlowCallback(CMM_Handle *handle); +void CMMCheckEndCallback(CMM_Handle *handle); +void CMM_CheckErrorCallback(CMM_Handle *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/system_init.c b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..32d1f2a93db3fbb6501a82245225c940ead158c1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/init/system_init.c @@ -0,0 +1,136 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void CMMCounterOverFlowCallback(CMM_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_COUNTER_OVERFLOW_MASK */ + /* USER CODE END CMM_INT_COUNTER_OVERFLOW_MASK */ +} + +__weak void CMMCheckEndCallback(CMM_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_CHECK_END_MASK */ + /* USER CODE END CMM_INT_CHECK_END_MASK */ +} + +__weak void CMM_CheckErrorCallback(CMM_Handle *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_FREQ_ERR_MASK */ + /* USER CODE END CMM_INT_FREQ_ERR_MASK */ +} + +static BASE_StatusType CMM_Init(void) +{ + HAL_CRG_IpEnableSet(CMM_BASE, IP_CLK_ENABLE); + + g_cmm.baseAddress = CMM; + g_cmm.targetFreqDivision = CMM_TARGET_FREQ_DIV_8192; + g_cmm.refFreqDivision = CMM_REF_FREQ_DIV_0; + g_cmm.targetClockSource = CMM_TARGET_CLK_LOSC; + g_cmm.refClockSource = CMM_REF_CLK_LOSC; + g_cmm.upperBound = 12; + g_cmm.lowerBound = 8; + g_cmm.interruptType = CMM_INT_FREQ_ERR_MASK; + + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_COUNTER_OVERFLOW_MASK, (CMM_CallBackFuncType)CMMCounterOverFlowCallback); + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_CHECK_END_MASK, (CMM_CallBackFuncType)CMMCheckEndCallback); + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_FREQ_ERR_MASK, (CMM_CallBackFuncType)CMM_CheckErrorCallback); + IRQ_Register(IRQ_CMM, HAL_CMM_IrqHandler, &g_cmm); + IRQ_SetPriority(IRQ_CMM, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_CMM); + return HAL_CMM_Init(&g_cmm); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + CMM_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/readme.md b/vendor/yibaina_3061M/demo/sample_cmm_check_error/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..1d4198cfdcd4d178e1aa502a4daf954144ee86f9 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/readme.md @@ -0,0 +1,20 @@ +# 验证CMM时钟频率监测功能,同时验证CMM频率错误中断功能 +## 关键字: CMM, 时钟频率监测, 中断 + +**【功能描述】** ++ 用于检查目标时钟(LOSC/HOSC/TCXO/HS_CLK/LS_CLK)频率是否发生错误。每隔5s分别注入频率错误中断,用于验证CMM的频率中断处理函数。 + +**【示例配置】** ++ CMM参考时钟源:参考时钟源可通过“g_cmm.refClockSource”配置,默认为内部低速时钟CMM_REF_CLK_LOSC,分频比可通过“g_cmm.refFreqDivision”配置,默认为不分频CMM_REF_FREQ_DIV_0。 + ++ CMM目标时钟源:目标时钟源可通过“g_cmm.targetClockSource”配置,默认为内部低速时钟CMM_TARGET_CLK_LOSC,分频比可通过“g_cmm.targetFreqDivision”配置,默认为8192分频CMM_TARGET_FREQ_DIV_8192。 + ++ CMM上下限值: 上限值可通过“g_cmm.upperBound”配置,下限值可通过“g_cmm.lowerBound”配置。 + ++ CMM中断类型:中断类型可通过“g_cmm.interruptType”进行配置,默认为频率错误中断。 + +**【示例效果】** ++ Debug串口首先每隔1s打印出监测目标时钟频率的CMCNTLOCK锁存值,在注入频率错误中断后每隔1s分别打印频率错误回调函数中的log, 5s后解除频率错误中断后再每隔1s打印CMCNTLOCK锁存值,循环往复。 + +**【注意事项】** ++ 上下限值的范围可反应系统对目标时钟偏差的冗余度,可自行设计门限值和时钟分频比,门限值具体计算方法请参照芯片技术指南。 diff --git a/vendor/yibaina_3061M/demo/sample_cmm_check_error/src/cmm_check_error_sample.c b/vendor/yibaina_3061M/demo/sample_cmm_check_error/src/cmm_check_error_sample.c new file mode 100644 index 0000000000000000000000000000000000000000..7a54a84a91383d74213052ec9bf84c3a13338b6e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_cmm_check_error/src/cmm_check_error_sample.c @@ -0,0 +1,88 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cmm_check_error_sample.c + * @author MCU Driver Team + * @brief The CMM module monitors abnormal clocks and inject error after loop times in circle. + * @details Use the reference clock (LOSC/HOSC/TCXO/HS_CLK) to check whether the target target \ + * clock (LOSC/HOSC/TCXO/HS_CLK/LS_CLK) is invalid. If the (LOSC/HOSC/TCXO/HS_CLK/LS_CLK) is invalid, \ + * the interrupt service function is triggered for processing. You can design security protection \ + * measures for the interrupt service function. If the interrupt trigger mode is set to non-clock \ + * failure mode, the user needs to determine whether the count value is within the threshold after \ + * each interrupt is triggered. If the count value is not within the threshold, the clock is \ + * considered abnormal. + * The threshold includes the upper and lower thresholds. The upper and lower thresholds reflect \ + * the redundancy of the system for the target clock offset. You can design the thresholds by yourself. \ + * For details about how to calculate the thresholds, see the chip technical guide. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "interrupt.h" +#include "debug.h" +#include "cmm.h" +#include "cmm_check_error_sample.h" +#include "main.h" + +#define LOOP_TIMES 5 + +unsigned int g_loopTimes = 0; + +void CMM_CheckErrorCallback(CMM_Handle *handle); + +/** + * @brief Sample main function. + * @param None. + * @return @ref BASE_StatusType + */ +BASE_StatusType CMM_SampleMain(void) +{ + SystemInit(); + HAL_CMM_Start(&g_cmm); + while (1) { + /* If ref clk cnt value bigger than upperbound, then junp to callback */ + BASE_FUNC_DELAY_S(1); + DBG_PRINTF("main loop, CMM count value = %d\r\n", DCL_CMM_GetCntValue(g_cmm.baseAddress)); + if (g_loopTimes++ >= LOOP_TIMES - 1) { + g_loopTimes = 0; + /* Inject error, trig int jump to callback */ + DBG_PRINTF("\r\n Inject interrupt type error !\r\n"); + DCL_CMM_EnableInterruptInject(g_cmm.baseAddress, g_cmm.interruptType); + } + } + return BASE_STATUS_OK; +} + +/** + * @brief Interrupt callback function triggered by module check errors. + * @param handle CMM handle. + * @return None. + */ +void CMM_CheckErrorCallback(CMM_Handle *handle) +{ + CMM_Handle *cmmHandle = (CMM_Handle*)handle; + while (1) { + DBG_PRINTF("In CMM interrupt function : clock frequency error\r\n"); + BASE_FUNC_DELAY_S(1); + if (g_loopTimes++ >= LOOP_TIMES - 1) { + g_loopTimes = 0; + /* Disable Inject interrupt type error, trig int jump to callback */ + DBG_PRINTF("\r\n Disable inject interrupt type error\r\n"); + DCL_CMM_DisableInterruptInject(cmmHandle->baseAddress, cmmHandle->interruptType); + return; + } + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/inc/sample_crc_gen_algo.h b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/inc/sample_crc_gen_algo.h new file mode 100644 index 0000000000000000000000000000000000000000..8a7d9a8e61cc109dbfcd36e0ca22ac95f74d4df1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/inc/sample_crc_gen_algo.h @@ -0,0 +1,30 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_crc_gen_algo.h + * @author MCU Driver Team + * @brief CRC module sample + * @details The header file contains the following declaration: + * crc to generate crc check value of input data. + */ + +#ifndef CRC_GEN_SAMPLE_H +#define CRC_GEN_SAMPLE_H + +BASE_StatusType CRC_GenerateSample(void); + +#endif /* CRC_GEN_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/feature.h b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.c b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..2fa0b75b2503eac8239d8834ce5aae266dcf4636 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.c @@ -0,0 +1,54 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_crc_gen_algo.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CRC_GenerateSample(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.h b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..d059d7d88546489111a34fdcd3c9e14467f4fe88 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/main.h @@ -0,0 +1,54 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/system_init.c b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..2d6c1013f4f1bf18f4b167e234cad5d9d41f1fae --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/init/system_init.c @@ -0,0 +1,92 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/readme.md b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..04177085c0a9417959d2a4763cfba669c16205df --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/readme.md @@ -0,0 +1,16 @@ +# 配置CRC参数,运用CRC16_XMODEM算法对一组数据进行运算生成CRC值 +## 关键字: CRC, CRC16_XMODEM + +**【功能描述】** ++ 示例代码基于HAL接口完成时钟、CRC初始化和功能配置。CRC计算方式有两种:1.运用CRC16_XMODEM算法模式对一组数据进行运算生成CRC值;2.根据CRC16_XMODEM算法属性配置对一组数据进行运算生成CRC值。 + +**【示例配置】** ++ 算法模式计算:配置算法模式CRC16_XMODEM,对长度为1024数组中的数据进行CRC累计计算,调用“HAL_CRC_Init()”进行初始化配置,之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。 + ++ 算法属性配置计算:配置CRC16_XMODEM算法属性,对长度为1024数组中的数据进行CRC累计计算,调用“HAL_CRC_Init()”进行初始化配置,之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。 + +**【示例效果】** ++ 当用户烧录编译后的示例代码后,初始化和配置完成后,Debug串口打印根据算法模式配置生成的CRC值和已运算数据的大小,然后打印根据算法属性配置生成的CRC值和已运算数据的大小。 + +**【注意事项】** ++ NA \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_gen_algo/src/sample_crc_gen_algo.c b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/src/sample_crc_gen_algo.c new file mode 100644 index 0000000000000000000000000000000000000000..0f1116983b50c7685cd818b9718ce7d0c6dd884f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_gen_algo/src/sample_crc_gen_algo.c @@ -0,0 +1,91 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_crc_gen_algo.c + * @author MCU Driver Team + * @brief Generates the CRC value. + * @details Setting a group of unsigned short values increasing from 0 and performing CRC accumulation \ + * operation on the grouping values to generate a CRC value; + */ + +/* Includes ------------------------------------------------------------------*/ +#include "debug.h" +#include "crc.h" +#include "main.h" +#include "sample_crc_gen_algo.h" + +#define TABLE_SIZE 1024 + +static unsigned short g_crcTempData[TABLE_SIZE] = {0}; + +/** + * @brief To test the function of generating a CRC value By Algorithm. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +static BASE_StatusType CRC_GenerateByAlgorithm(void) +{ + CRC_Handle genAlgo = {0}; + genAlgo.handleEx.algoMode = CRC16_XMODEM; /* crc algorithm mode CRC16_XMODEM */ + genAlgo.baseAddress = CRC; + genAlgo.inputDataFormat = CRC_MODE_BIT16; /* crc data size */ + HAL_CRC_Init(&genAlgo); + unsigned int res = HAL_CRC_Accumulate(&genAlgo, g_crcTempData, TABLE_SIZE); + DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE); + return BASE_STATUS_OK; +} + +/** + * @brief To test the function of generating a CRC value By Algorithm Attribute. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +static BASE_StatusType CRC_GenerateByAlgorithmAttr(void) +{ + CRC_Handle genAlgoAttr = {0}; + genAlgoAttr.baseAddress = CRC; + genAlgoAttr.inputDataFormat = CRC_MODE_BIT16; /* crc input data size */ + genAlgoAttr.initValueType = TYPE_CRC_INIT_VALUE_0000; + genAlgoAttr.polyMode = CRC16_1021_POLY_MODE; + genAlgoAttr.xorEndianEnbaleType = ENABLE_XOR_ENABLE_LSB; /* enabel xor and enable lsb */ + genAlgoAttr.reverseEnableType = REVERSE_INPUT_FALSE_OUTPUT_FALSE; + genAlgoAttr.resultXorValueType = TYPE_CRC_XOR_VALUE_0000; + HAL_CRC_Init(&genAlgoAttr); + unsigned int res = HAL_CRC_Accumulate(&genAlgoAttr, g_crcTempData, TABLE_SIZE); + DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE); + return BASE_STATUS_OK; +} + +/** + * @brief To test the function of generating a CRC value. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +BASE_StatusType CRC_GenerateSample(void) +{ + SystemInit(); + HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE); + for (unsigned int i = 0 ; i < TABLE_SIZE; i++) { + g_crcTempData[i] = i; + } + DBG_PRINTF("GenerateByAlgorithm:------ \r\n"); + CRC_GenerateByAlgorithm(); /* crc gen by algorithm */ + DBG_PRINTF("GenerateByAlgorithmAttr:------ \r\n"); + CRC_GenerateByAlgorithmAttr(); /* crc gen by algorithm attr */ + return BASE_STATUS_OK; +} + diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/inc/sample_crc_load_algo.h b/vendor/yibaina_3061M/demo/sample_crc_load_algo/inc/sample_crc_load_algo.h new file mode 100644 index 0000000000000000000000000000000000000000..2b8889bdc80c47f1ca9aaa0d80e2041b8c35f1cd --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/inc/sample_crc_load_algo.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_crc_load_algo.h + * @author MCU Driver Team + * @brief CRC module sample + * @details The header file contains the following declaration: + * This file provides sample code for users to help use crc to + * set and load crc init value. + */ + +#ifndef CRC_LOAD_SAMPLE_H +#define CRC_LOAD_SAMPLE_H + +BASE_StatusType CRC_LoadSample(void); + +#endif /* CRC_LOAD_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/feature.h b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.c b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.c new file mode 100644 index 0000000000000000000000000000000000000000..257d4717d28814a02c560f836ffee79621838bde --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.c @@ -0,0 +1,55 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_crc_load_algo.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +CRC_Handle g_loadCrcHandle; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + CRC_LoadSample(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.h b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.h new file mode 100644 index 0000000000000000000000000000000000000000..226ebae9740df0709f583b9ff0f5915b59eed731 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/main.h @@ -0,0 +1,56 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crc.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern CRC_Handle g_loadCrcHandle; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/system_init.c b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..06b14eff5098c36aefb8a8c97808b92e58c20b72 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/init/system_init.c @@ -0,0 +1,104 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void CRC_Init(void) +{ + HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE); + + g_loadCrcHandle.baseAddress = CRC; + + g_loadCrcHandle.inputDataFormat = CRC_MODE_BIT16; + g_loadCrcHandle.handleEx.algoMode = CRC16_XMODEM; + HAL_CRC_Init(&g_loadCrcHandle); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + CRC_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/readme.md b/vendor/yibaina_3061M/demo/sample_crc_load_algo/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..16d1b1822d1743443c549f8cec7cdf5793f51195 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/readme.md @@ -0,0 +1,18 @@ +# 通过改变初始值配置,对同一组数据进行不同CRC算法运算验证 +## 关键字: CRC算法,初始值 + +**【功能描述】** ++ 示例代码基于HAL接口完成时钟、CRC初始化和功能配置。通过load初始值配置,不改变其他配置CRC16_XMODEM算法修改为CRC16_CCIT-FALSE,并对同一组数据进行CRC运算验证。 + +**【示例配置】** ++ 在"SystemInit()”接口中配置CRC输入数据长度、算法模式等参数。 + ++ 在进行load初始值配置之前,根据CRC16_XMODEM算法对输入数据0x5678调用“HAL_CRC_SetInputDataGetCheck()”进行CRC计算对比结果。 + ++ 调用“HAL_CRC_SetCheckInData()”修改初始值0xFFFF,再调用"HAL_CRC_SetInputDataGetCheck()"对输入数据0x5678进行CRC计算对比结果。加载初始值后,CRC16_XMODEM算法修改为CRC16_CCIT-FALSE算法。 + +**【示例效果】** ++ 当用户烧录编译后的示例代码后,初始化和配置完成后,串口打印原始算法对数据运算生成的CRC数值,并与CRC16_XMODEM算法运算的标准值对比验证正确性;load初始值后,打印load后的初始值,并对同一组数据运算生成CRC数值,并与CRC16_CCIT-FALSE算法运算的标准值对比验证正确性。 + +**【注意事项】** ++ NA \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_crc_load_algo/src/sample_crc_load_algo.c b/vendor/yibaina_3061M/demo/sample_crc_load_algo/src/sample_crc_load_algo.c new file mode 100644 index 0000000000000000000000000000000000000000..c9db4fa09fb9fe8c375c5f816fd5047a1d75a747 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_crc_load_algo/src/sample_crc_load_algo.c @@ -0,0 +1,69 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_crc_load_algo.c + * @author MCU Driver Team + * @brief CRC module load init data config sample + * @details Perform the CRC16_XMODEM algorithm operation on the 16-bit data of 0x5678 to obtain a CRC value. \ + * Compare the CRC value with the standard value to determine whether the value is correct. Then load \ + * the initial value 0x0000 to the CRC module. Therefore, the CRC16_XMODEM algorithm is configured as \ + * the CRC16_CCIT-FALSE algorithm, and then the value 0x5678 is calculated. The CRC value generated \ + * after the calculation is compared with the standard value to determine whether the value of the \ + * initial load value is correct. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "debug.h" +#include "crc.h" +#include "main.h" +#include "sample_crc_load_algo.h" + +#define CRC_XMODEM_REF_VALUE 0x5b86 +#define CRC_CCITFALSE_REF_VALUE 0xDF46 + +/** + * @brief To test the function of loading the check_in value to crc_data register. + * The load value is read from crc_out. + * The value is reversed and the original crc_out is overwritten. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +BASE_StatusType CRC_LoadSample(void) +{ + SystemInit(); + /* CRC16_XMODEM Algrithem, init data = 0x0000 */ + unsigned int preLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678); + DBG_PRINTF("preLoadCrcValue: 0x%x \r\n", preLoadCrcValue); + if (preLoadCrcValue == CRC_XMODEM_REF_VALUE) { + DBG_PRINTF("CRC Algrithem is CRC16_XMODEM, inputData is 0x5678 \r\n"); + } else { + DBG_PRINTF("CRC Algrithem is not right for this sample! \r\n"); + } + /* load init data 0xffff, crc algrithem from CRC16_XMODEM to CRC16_CCIT-FALSE */ + HAL_CRC_SetCheckInData(&g_loadCrcHandle, 0xFFFF); + unsigned int initData = HAL_CRC_LoadCheckInData(&g_loadCrcHandle); + /* CRC16_CCIT-FALSE Algrithem, init data = 0xffff */ + unsigned int afterLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678); + DBG_PRINTF("initData: 0x%x \r\n", initData); + DBG_PRINTF("afterLoadCrcValue: 0x%x \r\n", afterLoadCrcValue); + if (afterLoadCrcValue == CRC_CCITFALSE_REF_VALUE) { + DBG_PRINTF("CRC Algrithem is CRC16_CCIT-FALSE, load init data success! \r\n"); + } else { + DBG_PRINTF("load init data fail ! \r\n"); + } + return BASE_STATUS_OK; +} diff --git a/vendor/yibaina_3061M/demo/sample_dac/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_dac/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dac/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dac/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_dac/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..8bed840393e2fe0ad291a1414ee649260e66a824 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dac/generatecode/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "acmp.h" +#include "acmp_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "dac.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + + +extern DAC_Handle g_dac0; + + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dac/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_dac/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..2c5dfb8296687a3a4e0845a5a29282db3d699d8c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dac/generatecode/system_init.c @@ -0,0 +1,83 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + + + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + + + +static void DAC0_Init(void) +{ + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + + g_dac0.dacValue =128; /* 128: output 1.65v at 3.3v power supply */ + HAL_DAC_Init(&g_dac0); +} + + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN14 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_7_AS_DAC_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_7_AS_DAC_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_7_AS_DAC_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_7_AS_DAC_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_7_AS_DAC_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ + +} + +void SystemInit(void) +{ + IOConfig(); + + DAC0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dac/main.c b/vendor/yibaina_3061M/demo/sample_dac/main.c new file mode 100644 index 0000000000000000000000000000000000000000..cb9147c2905bd3aba04fb5f960ba34410f370c4e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dac/main.c @@ -0,0 +1,56 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" + +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ + +DAC_Handle g_dac0; + +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + SystemInit(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_dma/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_dma/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..dd1e0ea080220892b715bf35af3a6d03e3a49bf2 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/generatecode/main.h @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "dma.h" +#include "dma_ex.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; + +extern DMA_Handle g_dmac; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void MemoryDMACallback(void *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_dma/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..54e1322224c30ce97e26545d881ad7ed8251568c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/generatecode/system_init.c @@ -0,0 +1,121 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void DMA_Channel2Init(void) +{ + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_INCREASE; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_MEM; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = NULL; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_TWO); +} + +static void DMA_Init(void) +{ + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel2Init(); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + DMA_Init(); + UART0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/main.c b/vendor/yibaina_3061M/demo/sample_dma/main.c new file mode 100644 index 0000000000000000000000000000000000000000..721d42d34b903acca02f039bdea61a4eefdb2c7d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_dma_mem_to_mem.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +DMA_Handle g_dmac; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + DMA_MemoryToMemory(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.c b/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.c new file mode 100644 index 0000000000000000000000000000000000000000..bddb05d0f8322cfdc105403a321d6759263abcfc --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.c @@ -0,0 +1,61 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_dma_mem_to_mem.c + * @author MCU Driver Team + * @brief dma sample module, memory-to-memory transfer. + * @details The DMA is used to transfer data from the memory to the memory. + * After the transfer is complete, the DMA interrupt is triggered. + * (1) Transfer configuration: Transfer the source and destination addresses to the HAL_DMA_StartIT() API. + * Transfer the length of the transferred data and the DMA channel number as input parameters. + * (2) Result judgment: After the DMA transfer is complete, in the interrupt callback function, check whether + * the source and destination data are consistent. + */ +#include "sample_dma_mem_to_mem.h" + +static unsigned char g_str1[10] = "12345678"; +static unsigned char g_str2[10] = ""; +void DMA_MemToMemCallBack(void *handle); +/** + * @brief User-defined callback function for completing the transfer of memory to the memory. + * @param handle callback handle. + * @retval None. + */ +void DMA_MemToMemCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("DMA_MemToMemCallBack\r\n"); + DBG_PRINTF("After transmission, src: %s\r\n", g_str1); + DBG_PRINTF("After transmission, dest: %s\r\n", g_str2); +} + +/** + * @brief DMA sample code for the transfer of memory to the memory. + * @param None. + * @retval None. + */ +void DMA_MemoryToMemory(void) +{ + SystemInit(); + DBG_PRINTF("MemoryToMemory Begin: \r\n"); + DBG_PRINTF("Before transmission, src: %s\r\n", g_str1); + DBG_PRINTF("Before transmission, dest: %s\r\n", g_str2); + unsigned int channel = 2; /* select transfer channel 2 */ + HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_MemToMemCallBack); + /* The transmission length is defined as 8 */ + HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)g_str2, 8, channel); +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.h b/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.h new file mode 100644 index 0000000000000000000000000000000000000000..c83928d60c69e9bc77c7d0035eecd41e8e8c288c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_dma/sample_dma_mem_to_mem.h @@ -0,0 +1,33 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_dma_mem_to_mem.h + * @author MCU Driver Team + * @brief adc sample module. + * @brief dma sample module, memory-to-memory transfer. + * @details This file provides sample code for users to help use + * the data transfer function of the dma. + */ +#ifndef SAMPLE_DMA_MEMTOPER_H +#define SAMPLE_DMA_MEMTOPER_H + +#include "debug.h" +#include "dma.h" +#include "main.h" + +void DMA_MemoryToMemory(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_flash/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_flash/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..d059d7d88546489111a34fdcd3c9e14467f4fe88 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/generatecode/main.h @@ -0,0 +1,54 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_flash/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..2d6c1013f4f1bf18f4b167e234cad5d9d41f1fae --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/generatecode/system_init.c @@ -0,0 +1,92 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/main.c b/vendor/yibaina_3061M/demo/sample_flash/main.c new file mode 100644 index 0000000000000000000000000000000000000000..ae0ffaeb761462803d729521c56f3df0dcaf2b64 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/main.c @@ -0,0 +1,58 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_flash_interrupt_mode.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + FlashInterruptProcessing(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.c b/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.c new file mode 100644 index 0000000000000000000000000000000000000000..e2656c49f5abe8077e1c23ec1bb3928788d17592 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.c @@ -0,0 +1,151 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_flash_interrupt_mode.c + * @author MCU Driver Team + * @brief Sample for Flash Module Interrupt. + * @details This file provides sample code for users to operate the flash memory in Interrupt mode. + * This example code operates on page58-page61 of the flash memory. (Be careful when + * performing the flash erasing operation to avoid damaging the running program code). + * This sample code demonstrates how to use the module initialization, read, write, and erase interfaces by + * operating on page58-page61 of the flash memory. The operation data is printed + * and output through the serial port. + */ +#include "main.h" +#include "flash.h" +#include "debug.h" +#include "sample_flash_interrupt_mode.h" + +#define FLASH_SAMPLE_FLAG_UNSET 0 +#define FLASH_SAMPLE_FLAG_SET 1 + +#define FLASH_TEMP_DATA_SIZE 4096 + +#define FLASH_SAMPLE_ERASE_NUM 4 /* Number of flash pages erased at a time */ +#define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_58 /* The erase address must be 1k aligned. */ +#define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_58 /* The read address must be byte-aligned. */ +#define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_58 /* The write address must be 16-byte aligned. */ + +static FLASH_Handle g_flashInterruptHandle; +static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0}; +static volatile unsigned int g_eraseDoneFlag = FLASH_SAMPLE_FLAG_UNSET; +static volatile unsigned int g_writeDoneFlag = FLASH_SAMPLE_FLAG_UNSET; + +/** + * @brief Flash interrupt sample handle. + * @param handle Flash handle. + * @param event Flash callback event. + * @param opAddr Current operation address. + * @retval None + */ +static void FlashInterruptHandle(void *handle, FLASH_CallBackEvent event, unsigned int opAddr) +{ + BASE_FUNC_UNUSED(handle); + switch (event) { + case FLASH_WRITE_EVENT_SUCCESS : /* One-time write success callback. */ + DBG_PRINTF("write success \r\n 0x%x \r\n", opAddr); + break; + case FLASH_WRITE_EVENT_DONE : /* All content is written. */ + g_writeDoneFlag = FLASH_SAMPLE_FLAG_SET; + DBG_PRINTF("write done \r\n"); + break; + case FLASH_WRITE_EVENT_FAIL : /* Write failed. */ + DBG_PRINTF("wtite failed\r\n 0x%x \r\n", opAddr); + break; + case FLASH_ERASE_EVENT_SUCCESS : /* One-time erase success callback. */ + DBG_PRINTF("erase success \r\n 0x%x \r\n", opAddr); + break; + case FLASH_ERASE_EVENT_DONE: /* All erase operations are complete. */ + g_eraseDoneFlag = FLASH_SAMPLE_FLAG_SET; + DBG_PRINTF("erase done \r\n"); + break; + case FLASH_ERASE_EVENT_FAIL : /* Erase failed. */ + DBG_PRINTF("erase failed\r\n 0x%x \r\n", opAddr); + break; + default : + break; + } +} + +/** + * @brief Flash interrupt sample init. + * @param None + * @retval None + */ +static void FlashInterruptInit(void) +{ + g_flashInterruptHandle.baseAddress = EFC; + g_flashInterruptHandle.peMode = FLASH_PE_OP_IT; + HAL_FLASH_Init(&g_flashInterruptHandle); + HAL_FLASH_RegisterCallback(&g_flashInterruptHandle, FlashInterruptHandle); + + IRQ_Register(IRQ_EFC, HAL_FLASH_IrqHandler, &g_flashInterruptHandle); + IRQ_Register(IRQ_EFC_ERR, HAL_FLASH_IrqHandlerError, &g_flashInterruptHandle); + IRQ_SetPriority(IRQ_EFC_ERR, 1); /* set gpio1 interrupt priority to 1, 1~15 */ + IRQ_SetPriority(IRQ_EFC, 1); /* set gpio1 interrupt priority to 1, 1~15 */ + IRQ_EnableN(IRQ_EFC); + IRQ_EnableN(IRQ_EFC_ERR); +} + +/** + * @brief Flash interrupt sample processing. + * @param None + * @retval None + */ +void FlashInterruptProcessing(void) +{ + BASE_StatusType ret; + unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0}; + + SystemInit(); + FlashInterruptInit(); + /* Configure data to be written. */ + for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) { + g_tempData[i] = 0x5A; + } + /* Perform the erase operation. */ + ret = HAL_FLASH_EraseIT(&g_flashInterruptHandle, FLASH_ERASE_MODE_PAGE, + FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR); + } + while (g_eraseDoneFlag == FLASH_SAMPLE_FLAG_UNSET) { + ; + } + /* Perform the programe operation. */ + ret = HAL_FLASH_WriteIT(&g_flashInterruptHandle, (uintptr_t)g_tempData, + FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR); + } + while (g_writeDoneFlag == FLASH_SAMPLE_FLAG_UNSET) { + ; + } + /* Perform the read operation. */ + ret = HAL_FLASH_Read(&g_flashInterruptHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE, + dataBuff, FLASH_TEMP_DATA_SIZE); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE); + } + /* Printf the contents read from the flash memory. */ + DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR); + for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) { + DBG_PRINTF("%x ", dataBuff[i]); + } + DBG_PRINTF("\r\n"); + return; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.h b/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.h new file mode 100644 index 0000000000000000000000000000000000000000..8ae6d560927ff227cbf7dd4a339367ed5a1e0a70 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_flash/sample_flash_interrupt_mode.h @@ -0,0 +1,29 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_flash_interrupt_mode.h + * @author MCU Driver Team + * @brief FLASH module sample. + * @details This file provides sample code for users to help use + * the functionalities of the FLASH. + */ +#ifndef McuMagicTag_SAMPLE_EFLASH_INTERRUPT_MODE_H +#define McuMagicTag_SAMPLE_EFLASH_INTERRUPT_MODE_H + +void FlashInterruptProcessing(void); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.c b/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.c index 83fc35d9c5af63bfa3c3f3d20e59a10d8f819ab0..6ec5c721cb51ed609b4e1d4c7aceb547175fc950 100644 --- a/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.c +++ b/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.c @@ -1,65 +1,65 @@ -/** - * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. - * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the - * following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the - * following disclaimer in the documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * @file gpio_key_sample.c - * @author MCU Driver Team - * @brief GPIO module realize a key function sample - * @details GPIO Capturing Key Triggered Interrupt Service Function. If the hardware environment does \ - * not support this function, you need to set up an environment for verification. - */ - -/* Includes ------------------------------------------------------------------*/ -#include "debug.h" -#include "gpio.h" -#include "main.h" -#include "gpio_key_sample.h" - -#define PREVENT_SWIPE_SCREEN_TIME 50 -#define CYCLE_INTERVAL_TIME 500 - -/* prototype functions -------------------------------------------------------*/ -void GPIO_CallBackFunc(void *param); - -/* ---------------------------------- Sample Parameters ---------------------- */ -/** - * @brief GPIO key test sample. - * @param None - * @retval Value of @ref BASE_StatusType. - */ -BASE_StatusType GPIO_KeySample(void) -{ - SystemInit(); - /* Waiting for the key to come. */ - while (1) { - DBG_PRINTF("Wait key \r\n"); - BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); - } - - return BASE_STATUS_OK; -} - -/** - * @brief GPIO register interrupt callback function. - * @param param Value of @ref GPIO_Handle. - * @retval None - */ -void GPIO_CallBackFunc(void *param) -{ - BASE_FUNC_UNUSED(param); - DBG_PRINTF("in GPIO Key Handler \r\n"); - BASE_FUNC_DELAY_MS(PREVENT_SWIPE_SCREEN_TIME); +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file gpio_key_sample.c + * @author MCU Driver Team + * @brief GPIO module realize a key function sample + * @details GPIO Capturing Key Triggered Interrupt Service Function. If the hardware environment does \ + * not support this function, you need to set up an environment for verification. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "debug.h" +#include "gpio.h" +#include "main.h" +#include "gpio_key_sample.h" + +#define PREVENT_SWIPE_SCREEN_TIME 50 +#define CYCLE_INTERVAL_TIME 500 + +/* prototype functions -------------------------------------------------------*/ +void GPIO_CallBackFunc(void *param); + +/* ---------------------------------- Sample Parameters ---------------------- */ +/** + * @brief GPIO key test sample. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +BASE_StatusType GPIO_KeySample(void) +{ + SystemInit(); + /* Waiting for the key to come. */ + while (1) { + DBG_PRINTF("Wait key \r\n"); + BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); + } + + return BASE_STATUS_OK; +} + +/** + * @brief GPIO register interrupt callback function. + * @param param Value of @ref GPIO_Handle. + * @retval None + */ +void GPIO_CallBackFunc(void *param) +{ + BASE_FUNC_UNUSED(param); + DBG_PRINTF("in GPIO Key Handler \r\n"); + BASE_FUNC_DELAY_MS(PREVENT_SWIPE_SCREEN_TIME); } \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.h b/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.h index 17ff5146931f2a3e009ca4ae8363316a4d240653..e490c9de98fea22505d6e7c3d81031aa2537b812 100644 --- a/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.h +++ b/vendor/yibaina_3061M/demo/sample_gpio_key/gpio_key_sample.h @@ -1,30 +1,30 @@ -/** - * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. - * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the - * following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the - * following disclaimer in the documentation and/or other materials provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * @file gpio_key_sample.h - * @author MCU Driver Team - * @brief GPIO module sample - * @details This file provides sample code for users to help use - * the trigger an interrupt based on the key connected to the GPIO. - */ - -#ifndef GPIO_KEY_SAMPLE_H -#define GPIO_KEY_SAMPLE_H - -BASE_StatusType GPIO_KeySample(void); - +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file gpio_key_sample.h + * @author MCU Driver Team + * @brief GPIO module sample + * @details This file provides sample code for users to help use + * the trigger an interrupt based on the key connected to the GPIO. + */ + +#ifndef GPIO_KEY_SAMPLE_H +#define GPIO_KEY_SAMPLE_H + +BASE_StatusType GPIO_KeySample(void); + #endif /* GPIO_KEY_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..3430145ce85a3056d039cc7a0da40eaac5dc4b62 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/main.h @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "gpio.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +#define LED_PIN GPIO_PIN_6 +#define LED_HANDLE g_gpio4 + +extern UART_Handle g_uart0; + +extern GPIO_Handle g_gpio4; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..d3dfbfa3165a01ebd705097e5c18ed7301b7efd1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/generatecode/system_init.c @@ -0,0 +1,113 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void GPIO_Init(void) +{ + HAL_CRG_IpEnableSet(GPIO4_BASE, IP_CLK_ENABLE); + g_gpio4.baseAddress = GPIO4; + + g_gpio4.pins = GPIO_PIN_6; + HAL_GPIO_Init(&g_gpio4); + HAL_GPIO_SetDirection(&g_gpio4, g_gpio4.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio4, g_gpio4.pins, GPIO_LOW_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio4, g_gpio4.pins, GPIO_INT_TYPE_NONE); + + return; +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN16 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_GPIO4_6); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_GPIO4_6, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_GPIO4_6, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_GPIO4_6, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_GPIO4_6, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + GPIO_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.c b/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.c new file mode 100644 index 0000000000000000000000000000000000000000..67ee9be6c086e7d2f09d60c05eedd06575458951 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.c @@ -0,0 +1,49 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file gpio_led_sample.c + * @author MCU Driver Team + * @brief GPIO module realize a led on/off function sample + * @details Controls the LED to turn on and off. The status is reversed every 50 ms. If the hardware environment \ + * does not support this function, you need to set up an environment for verification. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "debug.h" +#include "gpio.h" +#include "main.h" +#include "gpio_led_sample.h" + +#define CYCLE_INTERVAL_TIME 500 + +/* ---------------------------------- Sample Parameters -------------------------------- */ +/** + * @brief Test GPIO PIN control LED. + * @param None + * @retval Value of @ref BASE_StatusType. + */ +BASE_StatusType GPIO_LedSample(void) +{ + SystemInit(); + /* Cycle control LED on and off. */ + while (1) { + BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); + HAL_GPIO_TogglePin(&LED_HANDLE, LED_PIN); + DBG_PRINTF("LED Stata reverse! \r\n"); + } + return BASE_STATUS_OK; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.h b/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.h new file mode 100644 index 0000000000000000000000000000000000000000..c5ddef433adc8c7b7dbb99d3a090df8bba47b992 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/gpio_led_sample.h @@ -0,0 +1,30 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file gpio_led_sample.h + * @author MCU Driver Team + * @brief GPIO module sample + * @details This file provides sample code for users to help use + * the GPIO flashing LEDs. + */ + +#ifndef GPIO_LED_SAMPLE_H +#define GPIO_LED_SAMPLE_H + +BASE_StatusType GPIO_LedSample(void); + +#endif /* GPIO_LED_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/main.c b/vendor/yibaina_3061M/demo/sample_gpio_led/main.c new file mode 100644 index 0000000000000000000000000000000000000000..bb9b185db0d24c3f68aac9dbd2846090fb318d48 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "gpio_led_sample.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +GPIO_Handle g_gpio4; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + GPIO_LedSample(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpio_led/readme.md b/vendor/yibaina_3061M/demo/sample_gpio_led/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..048b5964410aba12da1c2a2be7d990c2923a3280 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpio_led/readme.md @@ -0,0 +1,19 @@ +# 配置GPIO管脚的电平反转功能,实现GPIO管脚控制LED灯的亮灭 +## 关键字: GPIO, 电平反转,LED + +**【功能描述】** ++ 示例代码基于HAL接口完成时钟、GPIO控制器初始化和功能配置。在示例代码中通过控制GPIO管脚的电平翻转实现控制LED灯的亮灭控制。 + +**【示例配置】** ++ GPIO管脚选择:示例代码中选择GPIO管脚用于控制LED灯亮灭。也可以选择其他GPIO管脚用于控制LED的功能,在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX,g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。 + ++ GPIO管脚初始化:调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO管脚的方向、电平、中断模式配置。 + ++ GPIO管脚实现对LED灯控制:对于输出管脚调用接口"HAL_GPIO_TogglePin()"实现管脚电平翻转,结合延时函数实现GPIO管脚控制LED灯每50ms亮灭状态反转一次。 + +**【示例效果】** ++ 当用户烧录编译后的示例代码后,初始化和配置完成后,示例代码中会控制GPIO管脚连接的LED每50ms进行一次亮灭,每反转一次电平Debug串口会打印一条信息。 + +**【注意事项】** ++ 示例代码使用UART0进行结果打印输出,需要对UART0配置。 ++ 示例代码中使用的GPIO管脚需和LED灯连接在一起。 \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..1e8331dc3060e84d7aeff4e361c01c89a64f344f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/feature.h @@ -0,0 +1,119 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +#define MCS_PARAM_CHECK MACRO_ENABLE +#define APT_PARAM_CHECK MACRO_ENABLE +#define ADC_PARAM_CHECK MACRO_ENABLE +#define CAPM_PARAM_CHECK MACRO_ENABLE +#define CRG_PARAM_CHECK MACRO_ENABLE +#define I2C_PARAM_CHECK MACRO_ENABLE +#define UART_PARAM_CHECK MACRO_ENABLE +#define SPI_PARAM_CHECK MACRO_ENABLE +#define TIMER_PARAM_CHECK MACRO_ENABLE +#define IWDG_PARAM_CHECK MACRO_ENABLE +#define WWDG_PARAM_CHECK MACRO_ENABLE +#define GPIO_PARAM_CHECK MACRO_ENABLE +#define GPT_PARAM_CHECK MACRO_ENABLE +#define DMA_PARAM_CHECK MACRO_ENABLE +#define CRC_PARAM_CHECK MACRO_ENABLE +#define CFD_PARAM_CHECK MACRO_ENABLE +#define CMM_PARAM_CHECK MACRO_ENABLE +#define CAN_PARAM_CHECK MACRO_ENABLE +#define FLASH_PARAM_CHECK MACRO_ENABLE +#define PMC_PARAM_CHECK MACRO_ENABLE +#define ACMP_PARAM_CHECK MACRO_ENABLE +#define DAC_PARAM_CHECK MACRO_ENABLE +#define PGA_PARAM_CHECK MACRO_ENABLE +#define IOCMG_PARAM_CHECK MACRO_ENABLE +#define QDM_PARAM_CHECK MACRO_ENABLE + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..ca26e01c5ac3f797232003459a6bdaf680c7b963 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/main.h @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "gpt.h" +#include "gpt_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern GPT_Handle g_gptHandle; +extern UART_Handle g_uart0Handle; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..23eed90e15041160123ac4f79d0ea13bf79369d3 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/generatecode/system_init.c @@ -0,0 +1,121 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void GPT2_Init(void) +{ + HAL_CRG_IpEnableSet(GPT2_BASE, IP_CLK_ENABLE); + + g_gptHandle.baseAddress = GPT2; + g_gptHandle.clockDiv = 10 - 1; /* 10 is the internal frequency division of GPT */ + g_gptHandle.period = 49999; /* 49999 is the number of GPT counting cycles. */ + g_gptHandle.refA0.refdot = 10000; /* 10000 is the value of PWM reference point A. */ + g_gptHandle.refA0.refAction = GPT_ACTION_OUTPUT_HIGH; /* GPT Action High */ + g_gptHandle.refB0.refdot = 30000; /* 30000 is the value of PWM reference point B. */ + g_gptHandle.refB0.refAction = GPT_ACTION_OUTPUT_LOW; /* GPT Action Low */ + g_gptHandle.bufLoad = BASE_CFG_ENABLE; + g_gptHandle.pwmKeep = BASE_CFG_ENABLE; + g_gptHandle.handleEx.periodIntEnable = BASE_CFG_DISABLE; + g_gptHandle.handleEx.outputFinIntEnable = BASE_CFG_DISABLE; + g_gptHandle.triggleAdcOutFinish = BASE_CFG_DISABLE; + g_gptHandle.triggleAdcPeriod = BASE_CFG_DISABLE; + + HAL_GPT_Init(&g_gptHandle); + +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0Handle.baseAddress = UART0; + + g_uart0Handle.baudRate = UART0_BAND_RATE; + g_uart0Handle.dataLength = UART_DATALENGTH_8BIT; + g_uart0Handle.stopBits = UART_STOPBITS_ONE; + g_uart0Handle.parity = UART_PARITY_NONE; + g_uart0Handle.txMode = UART_MODE_BLOCKING; + g_uart0Handle.rxMode = UART_MODE_BLOCKING; + g_uart0Handle.fifoMode = BASE_CFG_ENABLE; + g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0Handle); +} + +static void IOConfig(void) +{ + /* Config PIN6 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO5_2_AS_GPT2_PWM); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO5_2_AS_GPT2_PWM, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO5_2_AS_GPT2_PWM, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO5_2_AS_GPT2_PWM, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO5_2_AS_GPT2_PWM, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + GPT2_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/main.c b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/main.c new file mode 100644 index 0000000000000000000000000000000000000000..0986809242e931eebf32e8086ed268dfc6636d54 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_gpt_pwm_output.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +GPT_Handle g_gptHandle; +UART_Handle g_uart0Handle; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + GPT_SampleMain(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.c b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.c new file mode 100644 index 0000000000000000000000000000000000000000..10f03685e491677b8d445286d5fb68f8e4c537a5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.c @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_gpt_pwm_output.c + * @author MCU Driver Team + * @brief gpt sample module. + * @details This file provides users with sample code to help use GPT function: + * 1) Generate a continuous square wave with period and duty set in the function SystemInit. + * 2) Change the period and duty. + */ +#include "sample_gpt_pwm_output.h" + +/** + * @brief GPT run and modify period and duty during running. + * @param None. + * @retval None. + */ +void GPT_SampleMain(void) +{ + SystemInit(); + DBG_PRINTF("GPT Continued Run begin\r\n"); + HAL_GPT_Start(&g_gptHandle); + BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */ + DBG_PRINTF("Change the duty to 50%%\r\n"); + + HAL_GPT_GetConfig(&g_gptHandle); + g_gptHandle.period = 59999; /* 59999 is the number of GPT counting cycles. */ + g_gptHandle.refA0.refdot = 20000; /* 20000 is the value of PWM reference point A. */ + g_gptHandle.refB0.refdot = 50000; /* 50000 is the value of PWM reference point A. */ + HAL_GPT_Config(&g_gptHandle); +} diff --git a/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.h b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.h new file mode 100644 index 0000000000000000000000000000000000000000..d6ffdd89c775b34fb755101961a6fd126a82c56f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_gpt_pwm_output/sample_gpt_pwm_output.h @@ -0,0 +1,32 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_gpt_pwm_output.h + * @author MCU Driver Team + * @brief gpt sample module. + * @details This file provides users with sample code to help use GPT function: + * GPT runs. + */ +#ifndef SAMPLE_GPT_PWM_OUTPUT_H +#define SAMPLE_GPT_PWM_OUTPUT_H + +#include "debug.h" +#include "gpt.h" +#include "main.h" + +void GPT_SampleMain(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..200c5fedaeadd1a6f924a9da5a4f646f00579828 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/main.h @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "i2c.h" +#include "i2c_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; +extern I2C_Handle g_i2c0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..e5a82801b994d41db06f8f9f87178e8efea39ba1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/generatecode/system_init.c @@ -0,0 +1,123 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void I2C0_Init(void) +{ + HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE); /* I2C0 clock enable. */ + g_i2c0.baseAddress = I2C0; + + g_i2c0.functionMode = I2C_MODE_SELECT_MASTER_ONLY; + g_i2c0.addrMode = I2C_7_BITS; + g_i2c0.sdaHoldTime = 10; /* 10 is sda Hold Time */ + g_i2c0.freq = 400000; /* freqence is 400000 */ + g_i2c0.transferBuff = NULL; + g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE; + g_i2c0.handleEx.spikeFilterTime = 0; + g_i2c0.handleEx.sdaDelayTime = 0; + g_i2c0.timeout = 10000; /* 10000 is time out */ + g_i2c0.state = I2C_STATE_RESET; + HAL_I2C_Init(&g_i2c0); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN25 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_I2C0_SCL); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_I2C0_SCL, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN26 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_3_AS_I2C0_SDA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_3_AS_I2C0_SDA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_3_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_3_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_3_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + I2C0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/main.c b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/main.c new file mode 100644 index 0000000000000000000000000000000000000000..21b050881c2c85145af6dc4687a4af16beb9258f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/main.c @@ -0,0 +1,55 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_i2c_master_blocking_at24c64.h" +#include "main.h" +/* USER CODE BEGIN 0 */ + //APT_PWMInitHALSample(); + /* USER CODE END 0 */ +UART_Handle g_uart0; +I2C_Handle g_i2c0; +/* USER CODE BEGIN 1 */ + /* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* USER CODE END 2 */ + I2cBlocking24c64Processing(); + /* USER CODE BEGIN 3 */ +/* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.c b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.c new file mode 100644 index 0000000000000000000000000000000000000000..5ffe39d070cf046ad2664a974811f885e7844f8c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.c @@ -0,0 +1,202 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_i2c_master_blocking_at24c64.c + * @author MCU Driver Team + * @brief Sample for I2C module blocking as master. + * @details This sample demonstrates how to use the I2C master blocking interface to read and write the EEPROM. + * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip. + */ +#include "i2c.h" +#include "main.h" +#include "debug.h" +#include "sample_i2c_master_blocking_at24c64.h" + +#define DEV_24C64_ADDRESS_WRITE 0xA0 +#define DEV_24C64_ADDRESS_READ 0xA1 +#define I2C_SAMPLE_24C64_OPT_LEN 8 +#define I2C_SAMPLE_24C64_OPT_START_ADDR 0x0 +#define I2C_SAMPLE_24C64_DATA_OFFSET 2 +#define I2C_SAMPLE_24C64_PAGE_SIZE 32 +#define I2C_SAMPLE_24C64_ADDR_SIZE 2 +#define I2C_SAMPLE_24C64_OPT_ONCE_LEN 255 +#define I2C_SAMPLE_24C64_ADDRESS_POS 8 +#define I2C_SAMPLE_24C64_ADDRESS_MASK 0xFF + +#define I2C_SAMPLE_24C64_TEST_NUM 200 +#define I2C_SAMPLE_MAX_TIMEOUT 10000 + +/** + * @brief Copy data. + * @param destBuffer dest buffer. + * @param srcBuffer source buffer. + * @param len Number of the data to be copy. + * @retval None. + */ +static void CopyData(unsigned char *destBuffer, unsigned char *srcBuffer, unsigned int len) +{ + for (unsigned int i = 0; i < len; i++) { + destBuffer[i] = srcBuffer[i]; /* Copy the srcBuffer data to the destBuffer. */ + } +} + +/** + * @brief Read data from eeprom. + * @param addr The memory address of eeprom. + * @param buffer Address of buff to be receive data. + * @param len Number of the data to be read. + * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT. + */ +static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len) +{ + BASE_StatusType ret = BASE_STATUS_OK; + /* Define variables for internal use. */ + unsigned char tempAddr[I2C_SAMPLE_24C64_ADDR_SIZE]; + unsigned int currentLen = len; + unsigned int currentAddr = addr; + unsigned int tempReadLen; + unsigned char *tempBuffer = buffer; + + /* Start read data from the 24c64 eeprom. */ + while (1) { + if (currentLen == 0) { + break; + } + /* Set the memory address of eeprom. */ + tempAddr[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK; + tempAddr[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK; + + tempReadLen = currentLen; + if (currentLen > I2C_SAMPLE_24C64_OPT_ONCE_LEN) { + tempReadLen = I2C_SAMPLE_24C64_OPT_ONCE_LEN; + } + /* Send the memory address of eeprom. */ + ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempAddr, + I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret); + return ret; + } + /* Read data from eeprom. */ + ret = HAL_I2C_MasterReadBlocking(&g_i2c0, DEV_24C64_ADDRESS_READ, tempBuffer, + tempReadLen, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret); + return ret; + } + /* Updata the destAddress, srcAddress and len. */ + currentAddr += tempReadLen; + currentLen -= tempReadLen; + tempBuffer += tempReadLen; + } + return ret; +} + +/** + * @brief Read data from eeprom. + * @param addr The memory address of eeprom. + * @param buffer Address of buff to be send. + * @param len Number of the data to be send. + * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT. + */ +static BASE_StatusType Sample24c64WriteData(unsigned int addr, unsigned char *buffer, unsigned int len) +{ + unsigned char tempWrite[I2C_SAMPLE_24C64_PAGE_SIZE + I2C_SAMPLE_24C64_ADDR_SIZE]; + unsigned int currentLen = len; + unsigned int currentAddr = addr; + unsigned int tempWriteLen; + unsigned char *tempBuffer = buffer; + BASE_StatusType ret = BASE_STATUS_OK; + + /* Start send data to eeprom. */ + while (1) { + if (currentLen == 0) { + break; + } + tempWriteLen = I2C_SAMPLE_24C64_PAGE_SIZE - (currentAddr % I2C_SAMPLE_24C64_PAGE_SIZE); + if (tempWriteLen > currentLen) { + tempWriteLen = currentLen; + } + /* Set the memory address of eeprom. */ + tempWrite[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK; + tempWrite[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK; + CopyData(&tempWrite[I2C_SAMPLE_24C64_ADDR_SIZE], tempBuffer, tempWriteLen); + /* Send data to eeprom. */ + ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempWrite, + tempWriteLen + I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret); + break; + } + /* Updata the destAddress, srcAddress and len. */ + currentAddr += tempWriteLen; + currentLen -= tempWriteLen; + tempBuffer += tempWriteLen; + } + return ret; +} + +/** + * @brief Send and receive data with the 24c64 eeprom in interrupt mode as master. + * @retval None. + */ +void I2cBlocking24c64Processing(void) +{ + BASE_StatusType ret; + unsigned int i; + unsigned int dataFlag; + unsigned char tempWriteBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0}; + unsigned int successCnt = 0; + + SystemInit(); + DBG_PRINTF("I2C Blocking 24C64 Start\r\n"); + for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) { + tempWriteBuff[i] = 0x5A; /* The written data. */ + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + for (int j = 0; j < I2C_SAMPLE_24C64_TEST_NUM; j++) { + unsigned char tempReadBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0}; + /* Write 24c64 data */ + ret = Sample24c64WriteData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempWriteBuff, I2C_SAMPLE_24C64_OPT_LEN); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret); + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + /* Read 24c64 data */ + ret = Sample24c64ReadData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempReadBuff, I2C_SAMPLE_24C64_OPT_LEN); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret); + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + /* Compare read and write data */ + dataFlag = 0; + for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) { + if (tempReadBuff[i] != tempWriteBuff[i]) { + DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i, + tempReadBuff[i], tempWriteBuff[i]); + dataFlag = 1; + break; + } + } + /* The read data is exactly the same as the written data. */ + if (dataFlag == 0) { + successCnt++; + DBG_PRINTF("I2C Data Success\r\n"); + } + } + DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt); +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.h b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.h new file mode 100644 index 0000000000000000000000000000000000000000..68042bda910113b564b419f295348491334b41ca --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_i2c_master_blocking_at24c64/sample_i2c_master_blocking_at24c64.h @@ -0,0 +1,29 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_i2c_master_blocking_at24c64.c + * @author MCU Driver Team + * @brief Sample for I2C module blocking as master. + * @details This sample demonstrates how to use the I2C master blocking interface to read and write the EEPROM. + * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip. + */ +#ifndef McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H +#define McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H + +void I2cBlocking24c64Processing(void); + +#endif /* #ifndef McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..7880c74a1410af58942b8ed29b76d1affd212ff4 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/main.h @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iwdg.h" +#include "iwdg_ex.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern IWDG_Handle g_iwdg; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..76a5dd69567e373c093f518749e33fd532b0a6b5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/generatecode/system_init.c @@ -0,0 +1,107 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IWDG_Init(void) +{ + HAL_CRG_IpEnableSet(IWDG_BASE, IP_CLK_ENABLE); /* IWDG clock enable. */ + g_iwdg.baseAddress = IWDG; + + g_iwdg.timeValue = 1000; /* 1000 is time value */ + g_iwdg.timeType = IWDG_TIME_UNIT_MS; + g_iwdg.freqDivValue = IWDG_FREQ_DIV_128; + HAL_IWDG_Init(&g_iwdg); + HAL_IWDG_EnableWindowModeEx(&g_iwdg); + HAL_IWDG_SetWindowValueEx(&g_iwdg, 500, IWDG_TIME_UNIT_MS); /* 500 is window value */ + +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + IWDG_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/main.c b/vendor/yibaina_3061M/demo/sample_iwdg/main.c new file mode 100644 index 0000000000000000000000000000000000000000..5a0682bbb632c71312be49ce2cff94944acaf750 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_iwdg_refresh.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +IWDG_Handle g_iwdg; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + IWDG_RefreshSample(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.c b/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.c new file mode 100644 index 0000000000000000000000000000000000000000..d32dd61359db0c48bc8dcfd77ebe8b01ad22660e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.c @@ -0,0 +1,58 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_iwdg_refresh.c + * @author MCU Driver Team + * @brief IWDG module realize reset function sample + * @details The watchdog timeout reset function is used to set the time when the watchdog feeds the watchdog. + * When the window mode is enabled and the corresponding window value is set, + * an interrupt is generated when the count value is equal to the window value. + * When the watchdog is fed beyond the window value, a reset signal is generated. + * When the count value is 0 and the interrupt is not cleared, a reset signal is also generated. + * When the window mode is disabled, an interrupt is generated when the count value is reduced to half. + * The reset signal is generated only when the count value is 0 and the interrupt is not cleared. + */ + +/* Includes ------------------------------------------------------------------*/ +#include "baseinc.h" +#include "debug.h" +#include "iwdg.h" +#include "main.h" +#include "sample_iwdg_refresh.h" + +#define CYCLE_INTERVAL_TIME 600 + +/* prototype functions -------------------------------------------------------*/ +/** + * @brief IWDG refresh sample function + * @param None + * @return BASE_StatusType + */ +BASE_StatusType IWDG_RefreshSample(void) +{ + SystemInit(); + HAL_IWDG_Start(&g_iwdg); /* iwdg start */ + DBG_PRINTF("\r\n START : test iwdg sample \r\n"); + while (1) { + DBG_PRINTF("test iwdg sample \r\n"); + BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); + /* User can Add HAL_IWDG_Refresh() API here, iwdg not reset because refresh period, \ + if not refresh, next time reset. */ + HAL_IWDG_Refresh(&g_iwdg); /* The dog feeding time is determined by the user. */ + } + return BASE_STATUS_OK; +} diff --git a/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.h b/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.h new file mode 100644 index 0000000000000000000000000000000000000000..09f66fab72f94f85b04a6129c58e96e6f1c26610 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_iwdg/sample_iwdg_refresh.h @@ -0,0 +1,30 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_iwdg_refresh.h + * @author MCU Driver Team + * @brief IWDG module sample + * @details This file provides sample code for users to help + * register iwdg interrupt and feed iwdg. + */ + +#ifndef IWDG_REFRESH_SAMPLE_H +#define IWDG_REFRESH_SAMPLE_H + +BASE_StatusType IWDG_RefreshSample(void); + +#endif /* IWDG_REFRESH_SAMPLE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_pag/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_pag/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..05c54852e92d116c7aac033b0cc67a0c1a692558 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/generatecode/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "adc.h" +#include "adc_ex.h" +#include "uart.h" +#include "uart_ex.h" +#include "pga.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern PGA_Handle g_pga0; +extern UART_Handle g_uart0; +extern ADC_Handle g_adc; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_pag/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..2262bd0b459a18a744773c9d025deb43e059df5e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/generatecode/system_init.c @@ -0,0 +1,136 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void ADC0_Init(void) +{ + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + + HAL_ADC_Init(&g_adc); + + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA0; /* PGA0_OUT(ADC AIN0) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); +} + +static void PGA0_Init(void) +{ + HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE); + + g_pga0.baseAddress = PGA0_BASE; + g_pga0.externalResistorMode = BASE_CFG_DISABLE; + g_pga0.gain = PGA_GAIN_2X; + HAL_PGA_Init(&g_pga0); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN4 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_PGA0_N0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_PGA0_N0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_PGA0_N0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_PGA0_N0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_PGA0_N0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN5 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_5_AS_PGA0_P0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_5_AS_PGA0_P0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_5_AS_PGA0_P0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_5_AS_PGA0_P0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_5_AS_PGA0_P0, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + ADC0_Init(); + PGA0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/main.c b/vendor/yibaina_3061M/demo/sample_pag/main.c new file mode 100644 index 0000000000000000000000000000000000000000..e6219e1fc7b9b78f3b3ab747ebb5b8aacbfcb128 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/main.c @@ -0,0 +1,60 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_pga_result_sampling.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +PGA_Handle g_pga0; +UART_Handle g_uart0; +ADC_Handle g_adc; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + PGA_ReultSampling(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.c b/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.c new file mode 100644 index 0000000000000000000000000000000000000000..1ead4584ec0175a3d10059fb7629c7408782205d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.c @@ -0,0 +1,51 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_pga_result_sampling.c + * @author MCU Driver Team + * @brief pga sample module. + * @details (1) In this example, the internal resistor mode of the PGA is used. The voltage is output to PGA through + * the DAC, the PGA is amplified by 2 times, and the last sampled result is output through the ADC. + * (2) the internal resistor mode is used, and the gain magnification value is X2. + * The gain value can be changed on the PGA module configuration interface. + */ + +#include "sample_pga_result_sampling.h" + +/** + * @brief The PGA amplifies the DAC voltage and uses the ADC to sample the output of the PGA. + * @param None. + * @retval None. + */ +void PGA_ReultSampling(void) +{ + SystemInit(); + DBG_PRINTF("The PGA amplifies the output of the DAC and uses the ADC to sample the result.\r\n"); + /* Configure ADC software triggering. */ + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); + BASE_FUNC_DELAY_MS(10); /* delay 10 ms */ + if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM1) == BASE_STATUS_ERROR) { + DBG_PRINTF("ADC sampling error output.\r\n"); + return; + } + /* Software trigger ADC sampling */ + unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1); + DBG_PRINTF("Sampling completed, result: %x\r\n", ret); + float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("Output voltage of the PGA: %f\r\n", voltage); + return; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.h b/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.h new file mode 100644 index 0000000000000000000000000000000000000000..ea4867a413448760ba9716965fe5177f2546c4a8 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pag/sample_pga_result_sampling.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_pga_result_sampling.h + * @author MCU Driver Team + * @brief pga sample module. + * @details This file provides users with sample code to help use pga function. + */ +#ifndef SAMPLE_PGA_RESULT_SAMPLING_H +#define SAMPLE_PGA_RESULT_SAMPLING_H + +#include "debug.h" +#include "adc.h" +#include "main.h" + +void PGA_ReultSampling(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..2e9c579ff41ca0e28403a0752820221d46be1b0f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/main.h @@ -0,0 +1,56 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "pmc.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern PMC_Handle g_pmc; +extern UART_Handle g_uart0; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..1203f4df0e8da5d168e4d5ee33810539e1d0225b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/generatecode/system_init.c @@ -0,0 +1,103 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void PMC_Init(void) +{ + HAL_CRG_IpEnableSet(PMC_BASE, IP_CLK_ENABLE); + g_pmc.baseAddress = PMC_BASE; + g_pmc.wakeupSrc = PMC_WAKEUP_CNT; + g_pmc.wakeupTime = 100000; + g_pmc.pvdEnable = BASE_CFG_DISABLE; + HAL_PMC_Init(&g_pmc); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + PMC_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/main.c b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/main.c new file mode 100644 index 0000000000000000000000000000000000000000..4002c619005431cafa5d0235c1f912ead6643933 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_pmc_wakeup.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +PMC_Handle g_pmc; +UART_Handle g_uart0; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + PmcWakeupSample(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.c b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.c new file mode 100644 index 0000000000000000000000000000000000000000..dc7bcfd92fac4468708f318764d65849fd2f7d64 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.c @@ -0,0 +1,68 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file acmp_hal_sample.c + * @author MCU Driver Team + * @brief This file shows a sample of PMC. + */ +#include "pmc_ip.h" +#include "sample_pmc_wakeup.h" +#include "debug.h" +#include "crg.h" +#include "main.h" + +#define PMC_UART_BAUDRATE 115200 + +/** + * @brief User callbaclk after wakeup from deepsleep. + * @param handle pmc handle. + * @retval None + */ +static void UserFuncAfterWakeup(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* Open uart's clock */ + HAL_UART_Init(&g_uart0); /* initialize uart */ + DBG_PRINTF("wakeup from deepsleep.\r\n"); +} + +/** + * @brief A sample of PMC's HAL layer. + * @param None. + * @retval None + */ +void PmcWakeupSample(void) +{ + int count = 0; + PMC_LowpowerType wakeupType; + SystemInit(); + wakeupType = HAL_PMC_GetWakeupType(&g_pmc); + if (wakeupType == PMC_LP_DEEPSLEEP) { + UserFuncAfterWakeup(); + } + while (1) { + if (count == 1000) { /* 1000: Enter lowpower mode every 1 second */ + count = 0; + DBG_PRINTF("Enter deep sleep mode.\r\n"); + BASE_FUNC_DELAY_MS(100); /* Delay 100ms to wait for uart output all data */ + HAL_UART_DeInit(&g_uart0); /* deinitialize uart */ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_DISABLE); /* Close uart's clock */ + HAL_PMC_EnterDeepSleepMode(&g_pmc); /* Enter deep sleep mode */ + } + BASE_FUNC_DELAY_MS(1); /* Delay 1ms */ + count++; + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.h b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.h new file mode 100644 index 0000000000000000000000000000000000000000..df2050f7f292c22e5dabe8cda525e3833bd8f071 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_pmc_wakeup/sample_pmc_wakeup.h @@ -0,0 +1,31 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file pmc_hal_sample.h + * @author MCU Driver Team + * @brief This file shows a sample of PMC. + */ +#ifndef McuMagicTag_PMC_HAL_SAMPLE_H +#define McuMagicTag_PMC_HAL_SAMPLE_H +#include "pmc.h" +#include "uart.h" + +extern PMC_Handle g_pmc; +extern UART_Handle g_uart0;; +void PmcWakeupSample(void); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..dfcd7529fe04b02940f549c217cfdb6696ac26b5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/main.h @@ -0,0 +1,97 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "adc.h" +#include "adc_ex.h" +#include "acmp.h" +#include "acmp_ex.h" +#include "apt.h" +#include "uart.h" +#include "uart_ex.h" +#include "gpio.h" +#include "timer.h" +#include "timer_ex.h" +#include "pga.h" +#include "crg.h" +#include "dma.h" +#include "dma_ex.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +#define GpioStartStop_PIN GPIO_PIN_4 +#define GpioStartStop_HANDLE g_gpio2 + +extern ACMP_Handle g_acmp0; +extern PGA_Handle g_pga0; +extern PGA_Handle g_pga1; +extern TIMER_Handle g_timer0; +extern TIMER_Handle g_timer1; +extern UART_Handle g_uart0; +extern APT_Handle g_apt0; +extern APT_Handle g_apt1; +extern APT_Handle g_apt2; +extern ADC_Handle g_adc0; + +extern DMA_Handle g_dmac; + +extern GPIO_Handle g_gpio2; +extern GPIO_Handle g_gpio1; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void UART0WriteInterruptCallback(void *handle); +void UART0ReadInterruptCallback(void *handle); + +void UART0InterruptErrorCallback(void *handle); +void MotorStatemachineCallBack(void *handle); +void TIMER1_DMAOverFlow_InterruptProcess(void *handle); +void CheckPotentiometerValueCallback(void *handle); +void TIMER0_DMAOverFlow_InterruptProcess(void *handle); +void MotorCarrierProcessCallback(void *aptHandle); +void MotorSysErrCallback(void *aptHandle); + +void UART0_TXDMACallback(void *handle); + +void MotorStartStopKeyCallback(void *param); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..168e1979a3a7edf0b3182bc6af84ff494b14197d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/generatecode/system_init.c @@ -0,0 +1,676 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 1843200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void DMA_Channel0Init(void *handle) +{ + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_UART0_TX; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO); +} + +static void DMA_Init(void) +{ + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel0Init((void *)(&g_uart0)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST); +} + +static void ACMP0_Init(void) +{ + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT2; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT2; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_UNSET; + HAL_ACMP_Init(&g_acmp0); +} + +static void ADC0_Init(void) +{ + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + + g_adc0.baseAddress = ADC0; + g_adc0.socPriority = ADC_PRIMODE_ALL_ROUND; + + HAL_ADC_Init(&g_adc0); + + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA0; /* PGA0_OUT(ADC AIN0) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_APT0_SOCA; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM1, &socParam); + + socParam.adcInput = ADC_CH_ADCINA1; /* PGA1_OUT(ADC AIN1) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_APT0_SOCA; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM6, &socParam); + + socParam.adcInput = ADC_CH_ADCINA9; /* PIN7(ADC AIN9) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM0, &socParam); + + socParam.adcInput = ADC_CH_ADCINA5; /* PIN2(ADC AIN5) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM3, &socParam); + + socParam.adcInput = ADC_CH_ADCINA15; /* PIN14(ADC AIN15) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM4, &socParam); +} + +__weak void MotorSysErrCallback(void *aptHandle) +{ + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_EVENT_INTERRUPT */ + /* USER CODE END APT0_EVENT_INTERRUPT */ +} + +__weak void MotorCarrierProcessCallback(void *aptHandle) +{ + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_TIMER_INTERRUPT */ + /* USER CODE END APT0_TIMER_INTERRUPT */ +} + +static void APT0_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_ENABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt0, &protectApt); +} + +static void APT0_Init(void) +{ + HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE); + + g_apt0.baseAddress = APT0; + + /* Clock Settings */ + g_apt0.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt0.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt0.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_apt0.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt0.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt0.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt0.waveform.divInitVal = 0; + g_apt0.waveform.cntInitVal = 0; + g_apt0.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt0.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt0.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt0.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt0.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + + /* ADC Trigger SOCA */ + g_apt0.adcTrg.trgEnSOCA = BASE_CFG_ENABLE; + g_apt0.adcTrg.cntCmpSOCA = 375; /* 375 is count compare point of ADC trigger source SOCA when using CMPA */ + g_apt0.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_DOWN; + g_apt0.adcTrg.trgScaleSOCA = 1; + + /* ADC Trigger SOCB */ + g_apt0.adcTrg.trgEnSOCB = BASE_CFG_ENABLE; + g_apt0.adcTrg.cntCmpSOCB = 1; + g_apt0.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_DOWN; + g_apt0.adcTrg.trgScaleSOCB = 1; + + g_apt0.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt0.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + + /* Timer Trigger */ + g_apt0.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE; + g_apt0.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO; + g_apt0.tmrInterrupt.tmrInterruptScale = 1; + + APT0_ProtectInit(); + + HAL_APT_PWMInit(&g_apt0); + HAL_APT_RegisterCallBack(&g_apt0, APT_EVENT_INTERRUPT, MotorSysErrCallback); + IRQ_SetPriority(IRQ_APT0_EVT, 7); /* 7 is priority value */ + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_apt0); + IRQ_EnableN(IRQ_APT0_EVT); + HAL_APT_RegisterCallBack(&g_apt0, APT_TIMER_INTERRUPT, MotorCarrierProcessCallback); + IRQ_SetPriority(IRQ_APT0_TMR, 5); /* 5 is priority value */ + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_apt0); + IRQ_EnableN(IRQ_APT0_TMR); +} + +static void APT1_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt1, &protectApt); +} + +static void APT1_Init(void) +{ + HAL_CRG_IpEnableSet(APT1_BASE, IP_CLK_ENABLE); + + g_apt1.baseAddress = APT1; + + /* Clock Settings */ + g_apt1.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt1.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt1.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_apt1.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt1.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt1.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt1.waveform.divInitVal = 0; + g_apt1.waveform.cntInitVal = 0; + g_apt1.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt1.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt1.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt1.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt1.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + + APT1_ProtectInit(); + + HAL_APT_PWMInit(&g_apt1); +} + +static void APT2_ProtectInit(void) +{ + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt2, &protectApt); +} + +static void APT2_Init(void) +{ + HAL_CRG_IpEnableSet(APT2_BASE, IP_CLK_ENABLE); + + g_apt2.baseAddress = APT2; + + /* Clock Settings */ + g_apt2.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt2.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt2.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + + /* Wave Form */ + g_apt2.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt2.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt2.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt2.waveform.divInitVal = 0; + g_apt2.waveform.cntInitVal = 0; + g_apt2.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt2.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt2.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt2.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt2.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + + APT2_ProtectInit(); + + HAL_APT_PWMInit(&g_apt2); +} + +__weak void MotorStartStopKeyCallback(void *param) +{ + GPIO_Handle *handle = (GPIO_Handle *)param; + BASE_FUNC_UNUSED(handle); +} + +static void GPIO_Init(void) +{ + HAL_CRG_IpEnableSet(GPIO2_BASE, IP_CLK_ENABLE); + g_gpio2.baseAddress = GPIO2; + + g_gpio2.pins = GPIO_PIN_3; + HAL_GPIO_Init(&g_gpio2); + HAL_GPIO_SetDirection(&g_gpio2, g_gpio2.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio2, g_gpio2.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio2, g_gpio2.pins, GPIO_INT_TYPE_NONE); + + g_gpio2.pins = GPIO_PIN_4; + HAL_GPIO_Init(&g_gpio2); + HAL_GPIO_SetDirection(&g_gpio2, g_gpio2.pins, GPIO_INPUT_MODE); + HAL_GPIO_SetValue(&g_gpio2, g_gpio2.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio2, g_gpio2.pins, GPIO_INT_TYPE_LOW_LEVEL); + + HAL_CRG_IpEnableSet(GPIO1_BASE, IP_CLK_ENABLE); + g_gpio1.baseAddress = GPIO1; + + g_gpio1.pins = GPIO_PIN_0; + HAL_GPIO_Init(&g_gpio1); + HAL_GPIO_SetDirection(&g_gpio1, g_gpio1.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio1, g_gpio1.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio1, g_gpio1.pins, GPIO_INT_TYPE_NONE); + + HAL_GPIO_RegisterCallBack(&g_gpio2, GPIO_PIN_4, MotorStartStopKeyCallback); + IRQ_Register(IRQ_GPIO2, HAL_GPIO_IrqHandler, &g_gpio2); + IRQ_SetPriority(IRQ_GPIO2, 1); /* set gpio1 interrupt priority to 1, 1~15. 1 is priority value */ + IRQ_EnableN(IRQ_GPIO2); /* gpio interrupt enable */ + + return; +} + +static void PGA0_Init(void) +{ + HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE); + + g_pga0.baseAddress = PGA0_BASE; + g_pga0.externalResistorMode = BASE_CFG_ENABLE; + g_pga0.handleEx.extCapCompensation = PGA_EXT_COMPENSATION_2X; + HAL_PGA_Init(&g_pga0); +} + +static void PGA1_Init(void) +{ + HAL_CRG_IpEnableSet(PGA1_BASE, IP_CLK_ENABLE); + + g_pga1.baseAddress = PGA1_BASE; + g_pga1.externalResistorMode = BASE_CFG_ENABLE; + g_pga1.handleEx.extCapCompensation = PGA_EXT_COMPENSATION_2X; + HAL_PGA_Init(&g_pga1); +} + +__weak void CheckPotentiometerValueCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CheckPotentiometerValueCallback */ + /* USER CODE END CheckPotentiometerValueCallback */ +} + +static void TIMER0_Init(void) +{ + HAL_CRG_IpEnableSet(TIMER0_BASE, IP_CLK_ENABLE); /* TIMER0 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER0) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 1000000; + + g_timer0.baseAddress = TIMER0; + g_timer0.load = load - 1; /* Set timer value immediately */ + g_timer0.bgLoad = load - 1; /* Set timer value */ + g_timer0.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timer0.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timer0.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timer0.interruptEn = BASE_CFG_ENABLE; + g_timer0.adcSocReqEnable = BASE_CFG_DISABLE; + g_timer0.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timer0); + IRQ_Register(IRQ_TIMER0, HAL_TIMER_IrqHandler, &g_timer0); + + HAL_TIMER_RegisterCallback(&g_timer0, TIMER_PERIOD_FIN, CheckPotentiometerValueCallback); + IRQ_SetPriority(IRQ_TIMER0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER0); +} + +__weak void MotorStatemachineCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN MotorStatemachineCallBack */ + /* USER CODE END MotorStatemachineCallBack */ +} + +static void TIMER1_Init(void) +{ + HAL_CRG_IpEnableSet(TIMER1_BASE, IP_CLK_ENABLE); /* TIMER1 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER1) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 500; + + g_timer1.baseAddress = TIMER1; + g_timer1.load = load - 1; /* Set timer value immediately */ + g_timer1.bgLoad = load - 1; /* Set timer value */ + g_timer1.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timer1.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timer1.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timer1.interruptEn = BASE_CFG_ENABLE; + g_timer1.adcSocReqEnable = BASE_CFG_DISABLE; + g_timer1.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timer1); + IRQ_Register(IRQ_TIMER1, HAL_TIMER_IrqHandler, &g_timer1); + + HAL_TIMER_RegisterCallback(&g_timer1, TIMER_PERIOD_FIN, MotorStatemachineCallBack); + IRQ_SetPriority(IRQ_TIMER1, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER1); +} + +__weak void UART0InterruptErrorCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ +} + +__weak void UART0_TXDMACallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + /* USER CODE END UART0_WRITE_DMA_FINISH */ +} + +__weak void UART0WriteInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ +} + +__weak void UART0ReadInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_DMA; + g_uart0.rxMode = UART_MODE_INTERRUPT; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); + HAL_UART_RegisterCallBack(&g_uart0, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart0, UART_READ_IT_FINISH, (UART_CallbackType)UART0ReadInterruptCallback); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart0); + IRQ_SetPriority(IRQ_UART0, 6); /* 6 is priority value */ + IRQ_EnableN(IRQ_UART0); + g_uart0.dmaHandle = &g_dmac; + g_uart0.uartDmaTxChn = 0; + HAL_UART_RegisterCallBack(&g_uart0, UART_WRITE_DMA_FINISH, (UART_CallbackType)UART0_TXDMACallback); + HAL_UART_RegisterCallBack(&g_uart0, UART_WRITE_IT_FINISH, (UART_CallbackType)UART0WriteInterruptCallback); +} + +static void IOConfig(void) +{ + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN1 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_ACMP0_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_ACMP0_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_ACMP0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_ACMP0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_ACMP0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN48 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_6_AS_ACMP_N2); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_6_AS_ACMP_N2, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_6_AS_ACMP_N2, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_6_AS_ACMP_N2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_6_AS_ACMP_N2, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN47 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_5_AS_ACMP_P2); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_5_AS_ACMP_P2, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_5_AS_ACMP_P2, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_5_AS_ACMP_P2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_5_AS_ACMP_P2, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN4 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_PGA0_N0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_PGA0_N0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_PGA0_N0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_PGA0_N0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_PGA0_N0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN5 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_5_AS_PGA0_P0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_5_AS_PGA0_P0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_5_AS_PGA0_P0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_5_AS_PGA0_P0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_5_AS_PGA0_P0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN3 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_7_AS_PGA0_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_7_AS_PGA0_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_7_AS_PGA0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_7_AS_PGA0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_7_AS_PGA0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN7 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_7_AS_ADC_AIN9); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_7_AS_ADC_AIN9, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_7_AS_ADC_AIN9, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_7_AS_ADC_AIN9, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_7_AS_ADC_AIN9, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN2 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO5_1_AS_ADC_AIN5); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO5_1_AS_ADC_AIN5, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO5_1_AS_ADC_AIN5, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO5_1_AS_ADC_AIN5, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO5_1_AS_ADC_AIN5, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN14 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_7_AS_ADC_AIN15); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_7_AS_ADC_AIN15, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_7_AS_ADC_AIN15, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_7_AS_ADC_AIN15, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_7_AS_ADC_AIN15, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN11 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO1_5_AS_PGA1_P0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO1_5_AS_PGA1_P0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO1_5_AS_PGA1_P0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO1_5_AS_PGA1_P0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO1_5_AS_PGA1_P0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN12 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO1_6_AS_PGA1_N0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO1_6_AS_PGA1_N0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO1_6_AS_PGA1_N0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO1_6_AS_PGA1_N0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO1_6_AS_PGA1_N0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN13 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO1_7_AS_PGA1_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO1_7_AS_PGA1_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO1_7_AS_PGA1_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO1_7_AS_PGA1_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO1_7_AS_PGA1_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN35 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_GPIO2_3); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_GPIO2_3, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_GPIO2_3, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_GPIO2_3, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_GPIO2_3, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN27 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO1_0_AS_GPIO1_0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO1_0_AS_GPIO1_0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO1_0_AS_GPIO1_0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO1_0_AS_GPIO1_0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO1_0_AS_GPIO1_0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN41 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_4_AS_GPIO2_4); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_4_AS_GPIO2_4, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_4_AS_GPIO2_4, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_4_AS_GPIO2_4, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_4_AS_GPIO2_4, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN19 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_0_AS_APT0_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_0_AS_APT0_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_0_AS_APT0_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_0_AS_APT0_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_0_AS_APT0_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN23 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_0_AS_APT0_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_0_AS_APT0_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_0_AS_APT0_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_0_AS_APT0_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_0_AS_APT0_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN20 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_1_AS_APT1_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_1_AS_APT1_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_1_AS_APT1_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_1_AS_APT1_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_1_AS_APT1_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN24 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_1_AS_APT1_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_1_AS_APT1_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_1_AS_APT1_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_1_AS_APT1_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_1_AS_APT1_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN21 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO3_2_AS_APT2_PWMA); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO3_2_AS_APT2_PWMA, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO3_2_AS_APT2_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO3_2_AS_APT2_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO3_2_AS_APT2_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN25 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_APT2_PWMB); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_APT2_PWMB, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_APT2_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_APT2_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_APT2_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +static void APT_SyncMasterInit(void) +{ + HAL_APT_MasterSyncInit(&g_apt0, APT_SYNC_OUT_ON_CNTR_ZERO); +} + +static void APT_SyncSlaveInit(void) +{ + APT_SlaveSyncIn aptSlave; + + aptSlave.cntPhase = 0; /* counter phase value */ + aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + aptSlave.syncInSrc = APT_SYNCIN_SRC_APT0_SYNCOUT; /* sync source selection */ + aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(&g_apt1, &aptSlave); + + aptSlave.cntPhase = 0; /* counter phase value */ + aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + aptSlave.syncInSrc = APT_SYNCIN_SRC_APT0_SYNCOUT; /* sync source selection */ + aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(&g_apt2, &aptSlave); + +} + +void SystemInit(void) +{ + IOConfig(); + DMA_Init(); + UART0_Init(); + ACMP0_Init(); + APT0_Init(); + APT1_Init(); + APT2_Init(); + ADC0_Init(); + PGA0_Init(); + PGA1_Init(); + TIMER0_Init(); + TIMER1_Init(); + GPIO_Init(); + + APT_SyncMasterInit(); + APT_SyncSlaveInit(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_carrier.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_carrier.h new file mode 100644 index 0000000000000000000000000000000000000000..627f41c6d62a40b3b7ae4cc2a4e0a9217cd19ca0 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_carrier.h @@ -0,0 +1,142 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_carrier.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration for carrier interrupt processing function. + */ +#ifndef McuMagicTag_MCS_CARRIER_H +#define McuMagicTag_MCS_CARRIER_H + +#include "mcs_status.h" +#include "mcs_mtr_param.h" +#include "mcs_svpwm.h" +#include "mcs_curr_ctrl.h" +#include "mcs_if_ctrl.h" +#include "mcs_ramp_mgmt.h" +#include "mcs_spd_ctrl.h" +#include "mcs_fosmo.h" +#include "mcs_smo_4th.h" +#include "mcs_pll.h" +#include "mcs_startup.h" +#include "mcs_r1_svpwm.h" +#include "mcs_fw_ctrl.h" +#include "mcs_prot_user.h" + +typedef void (*MCS_ReadCurrUvwCb)(UvwAxis *CurrUvw); +typedef void (*MCS_SetPwmDutyCb)(UvwAxis *dutyUvwLeft, UvwAxis *dutyUvwRight); +typedef void (*MCS_SetADCTriggerTimeCb)(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB); + +/** + * @brief motor control FSM state define. + * @details motor control FSM state type: + * + FSM_IDLE -- IDLE state, system startup default. + * + FSM_OFFSET_CALIB -- Self calibrate, for ADC init. + * + FSM_CAP_CHARGE -- IPM cap charge. + * + FSM_CLEAR -- Clear before every run. + * + FSM_LOCATE -- Rotor position pre-locate. + * + FSM_STARTUP -- Start up. + * + FSM_SWITCH -- Transition state, control from open to closed loop. + * + FSM_RUN -- Normal running state. + * + FSM_WAIT_STOP -- Wait stopping. + * + FSM_STOP -- Normal stop. + * + FSM_FAULT -- Fault state, waiting for user process. + */ +typedef enum { + FSM_IDLE = 0, + FSM_OFFSET_CALIB, + FSM_CAP_CHARGE, + FSM_CLEAR, + FSM_LOCATE, + FSM_STARTUP, + FSM_SWITCH, + FSM_RUN, + FSM_WAIT_STOP, + FSM_STOP, + FSM_FAULT +} FsmState; + +/** + * @brief Sampling mode. + */ +typedef enum { + DUAL_RESISTORS = 0, + SINGLE_RESISTOR = 1 +} SampleMode; + +/** + * @brief Motor control data structure + */ +typedef struct { + unsigned char motorStateFlag; + float spdCmdHz; /**< External input speed command value */ + float axisAngle; /**< Angle of the synchronous coordinate system */ + float spdRefHz; /**< Command value after speed ramp management */ + float currCtrlPeriod; /**< current loop control period */ + float adc0Compensate; /**< ADC0 softwaretrim compensate value */ + float adc1Compensate; /**< ADC1 softwaretrim compensate value */ + float udc; /**< Bus voltage */ + float powerBoardTemp; /**< Power boart surface temperature */ + unsigned short aptMaxcntCmp; /**< Apt Maximum Comparison Count */ + float adcCurrCofe; /**< Adc current sampling cofeature */ + + unsigned short sysTickCnt; /**< System Timer Tick Count */ + unsigned short capChargeTickNum; /**< Bootstrap Capacitor Charge Tick Count */ + volatile unsigned int msTickCnt; /**< Millisecond-level counter, which can be used in 1-ms and 5-ms tasks. */ + unsigned short msTickNum; /**< Number of ticks corresponding to 1 ms */ + char obserType; /**< Set Observer Type */ + char controlMode; /**< Set foc control or sixstep bldc control mode or others */ + char spdAdjustMode; /**< Set speed adjust mode */ + char uartConnectFlag; /**< Uart connect success flag */ + short uartHeartDetCnt; /**< Uart connect heart detect count */ + float uartTimeStamp; /**< Uart data time stamp */ + SysStatusReg statusReg; /**< System status */ + FsmState stateMachine; /**< Motor Control State Machine */ + + SampleMode sampleMode; /**< sample mode */ + MOTOR_Param mtrParam; /**< Motor parameters */ + FOSMO_Handle smo; /**< SMO observer handle */ + SMO4TH_Handle smo4th; /**< SMO 4th observer handle */ + IF_Handle ifCtrl; /**< I/F control handle */ + SVPWM_Handle sv; /**< SVPWM Handle */ + R1SVPWM_Handle r1Sv; /**< Single-resistance phase-shifted SVPWM handld */ + RMG_Handle spdRmg; /**< Ramp management struct for the speed controller input reference */ + SPDCTRL_Handle spdCtrl; /**< Speed loop Control Handle */ + CURRCTRL_Handle currCtrl; /**< Current loop control handle */ + STARTUP_Handle startup; /**< Startup Switch Handle */ + FW_Handle fw; /**< Flux-Weakening Handle */ + + DqAxis idqRef; /**< Command value of the dq axis current */ + UvwAxis currUvw; /**< Three-phase current sampling value */ + AlbeAxis iabFbk; /**< αβ-axis current feedback value */ + DqAxis idqFbk; /**< Current feedback value of the dq axis */ + DqAxis vdqRef; /**< Current loop output dq voltage */ + AlbeAxis vabRef; /**< Current loop output voltage αβ */ + UvwAxis dutyUvw; /**< UVW three-phase duty cycle */ + UvwAxis dutyUvwLeft; /**< Single Resistor UVW Three-Phase Left Duty Cycle */ + UvwAxis dutyUvwRight; /**< Single Resistor UVW Three-Phase Right Duty Cycle*/ + + MCS_ReadCurrUvwCb readCurrUvwCb; /**< Read current callback function */ + MCS_SetPwmDutyCb setPwmDutyCb; /**< Set the duty cycle callback function. */ + MCS_SetADCTriggerTimeCb setADCTriggerTimeCb; /**< Sets the ADC trigger point callback function. */ + + MotorProtStatus_Handle prot; /**< Protection handle. */ +} MTRCTRL_Handle; + +void MCS_CarrierProcess(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_chip_config.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_chip_config.h new file mode 100644 index 0000000000000000000000000000000000000000..fbb9682691af7c2e32dc9fb164a97c84859b5cdf --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_chip_config.h @@ -0,0 +1,73 @@ +/** + * @ Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2023. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_chip_config.h + * @author MCU Algorithm Team + * @brief This file provides config macros for ECMCU105H/ECBMCU201MPC app. + */ + +#ifndef McuMagicTag_MCS_CHIPCONFIG_H +#define McuMagicTag_MCS_CHIPCONFIG_H + +#include "feature.h" + +#ifdef CHIP_3061MNPICA + + #define ADCPTT_HANDLE g_adc0 + #define ADCRESIS_HANDLE g_adc0 + #define ADCUDC_HANDLE g_adc0 + #define ADCU_HANDLE g_adc0 + #define ADCW_HANDLE g_adc0 + #define LED1_HANDLE g_gpio2 + #define LED2_HANDLE g_gpio1 + #define LED2_PIN GPIO_PIN_0 + #define LED1_PIN GPIO_PIN_3 + #define ADCPTTSOCNUM ADC_SOC_NUM0 + #define ADCUSOCNUM ADC_SOC_NUM1 + #define ADCRESISSOCNUM ADC_SOC_NUM3 + #define ADCUDCSOCNUM ADC_SOC_NUM4 + #define ADCWSOCNUM ADC_SOC_NUM6 + + #define ADC0COMPENSATE 2037.0f + #define ADC1COMPENSATE 2027.0f + +#endif + +#if defined (CHIP_3065HRPIRZ) || defined (CHIP_3065ARPIRZ) + + #define ADCU_HANDLE g_adc0 + #define ADCW_HANDLE g_adc1 + #define ADCRESIS_HANDLE g_adc2 + #define ADCUDC_HANDLE g_adc2 + #define ADCPTT_HANDLE g_adc2 + #define LED1_HANDLE g_gpio0 + #define LED2_HANDLE g_gpio0 + #define LED2_PIN GPIO_PIN_6 + #define LED1_PIN GPIO_PIN_7 + #define ADCPTTSOCNUM ADC_SOC_NUM0 + #define ADCRESISSOCNUM ADC_SOC_NUM1 + #define ADCUSOCNUM ADC_SOC_NUM8 + #define ADCWSOCNUM ADC_SOC_NUM8 + #define ADCUDCSOCNUM ADC_SOC_NUM14 + + #define ADC0COMPENSATE 2033.0f + #define ADC1COMPENSATE 2070.0f + +#endif + + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_ctlmode_config.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_ctlmode_config.h new file mode 100644 index 0000000000000000000000000000000000000000..2a6f38cccf3fb92d52b4874390805a520e255b2f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_ctlmode_config.h @@ -0,0 +1,73 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_ctlmode_config.h + * @author MCU Algorithm Team + * @brief This file provides config macros for ECMCU105H app. + */ + + /* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_CTLMODECONFIG_H +#define McuMagicTag_MCS_CTLMODECONFIG_H + +#include "debug.h" +#include "typedefs.h" + +typedef enum { + FOC_STARTUP_IF = 0, + FOC_STARTUP_VF, + FOC_STARTUP_HFI +} MOTOR_STARTUPMODE_CONFIG; + +typedef enum { + FOC_OBSERVERTYPE_SMO1TH = 0, + FOC_OBSERVERTYPE_SMO1TH_PLL, + FOC_OBSERVERTYPE_SMO4TH, + FOC_OBSERVERTYPE_SMO4TH_PLL, + FOC_OBSERVERTYPE_LUNBORG, + FOC_OBSERVERTYPE_FLUX +} MOTOR_OBSERVERTYPE_CONFIG; + +typedef enum { + FOC_CONTROLMODE_SPEED = 0, + FOC_CONTROLMODE_TORQUE +} MOTOR_CONTROLMODE_CONFIG; + +typedef enum { + FOC_CURQAXISPID_PARAMS = 0, + FOC_CURDAXISPID_PARAMS, + FOC_SPDPID_PARAMS +} MOTOR_PID_SET; + +typedef enum { + MOTOR_PARAMS_BASE = 0, + MOTOR_PARAMS_SPECIAL, + MOTOR_PARAMS_BOARD +} MOTOR_PARAMS_SET; + +typedef enum { + CUST_SPEED_ADJUST = 0, + HOST_SPEED_ADJUST +} MODE_ADSPEED_CONFIG; + +typedef enum { + CONNECTING = 0, + CONNECTED, + DISCONNECT +} UART_STATUS; + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_motor_process.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_motor_process.h new file mode 100644 index 0000000000000000000000000000000000000000..783bf21402d5d3f5d4bdc8dc5bd9ee425d0fbf21 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_motor_process.h @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_process.h + * @author MCU Algorithm Team + * @brief This file provides motor sample functions declaration for ECMCU105H board. + */ +#ifndef McuMagicTag_MCS_MOTOR_PROCESS_H +#define McuMagicTag_MCS_MOTOR_PROCESS_H + +/** + * @brief phase sequence. + */ +typedef enum { + PHASE_U = 0, + PHASE_V, + PHASE_W, + PHASE_MAX_NUM +} MCS_PhaseEnum; + +/** + * @brief key state. + */ +typedef enum { + KEY_DOWN = 0, + KEY_UP = 1, +} KEY_State; + +int MotorMainProcess(void); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_status.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_status.h new file mode 100644 index 0000000000000000000000000000000000000000..19510c78b2d63a46ca51495d8ad028e351574d1d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_status.h @@ -0,0 +1,188 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_status.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_STATUS_H +#define McuMagicTag_MCS_STATUS_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "typedefs.h" +#include "mcs_assert.h" + +/* Typedef definitions ------------------------------------------------------------------------- */ +/** + * @brief System status define + */ +typedef union { + unsigned short all; + struct { + unsigned short cmdStart : 1; /**< Indicates that a start system command has been received. */ + unsigned short cmdStop : 1; /**< Indicates that a stop system command has been received. */ + unsigned short isRunning : 1; /**< Indicates that the system is running (enable signal) */ + unsigned short sysError : 1; /**< Indicates that the system reports an error. */ + unsigned short poweron : 1; /**< Indicates that the power-on initialization phase is complete. */ + unsigned short capcharge : 1; /**< Indicates that the bootstrap capacitor charging phase is complete. */ + unsigned short adczero : 1; /**< The current sampling point is reset to zero after power-on. */ + } Bit; +} SysStatusReg; + +/** + * @brief Get status of Bit cmdStart. + * @param sysStatus System status register handle. + * @retval Status of Bit cmdStart. + */ +static inline bool SysGetCmdStart(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.cmdStart == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit cmdStart. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStartSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStart = 1; +} + +/** + * @brief Clear Bit cmdStart. + * @param handle System status register handle. + * @retval None. + */ +static inline void SysCmdStartClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStart = 0; +} + +/** + * @brief Get status of Bit cmdStop. + * @param sysStatus System status register handle. + * @retval Status of Bit cmdStart. + */ +static inline bool SysGetCmdStop(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.cmdStop == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit cmdStop. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStopSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStop = 1; +} + +/** + * @brief Clear Bit cmdStop. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStopClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStop = 0; +} + +/** + * @brief Get status of Bit isRunning. + * @param sysStatus System status register handle. + * @retval Status of Bit isRunning. + */ +static inline bool SysIsRunning(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.isRunning == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit isRuning. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysRunningSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.isRunning = 1; +} + +/** + * @brief Clear Bit isRuning. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysRunningClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.isRunning = 0; +} + +/** + * @brief Get status of Bit sysError. + * @param sysStatus System status register handle. + * @retval Status of Bit sysError. + */ +static inline bool SysIsError(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.sysError == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit sysError. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysErrorSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.sysError = 1; +} + +/** + * @brief Clear Bit sysError. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysErrorClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.sysError = 0; +} + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_user_config.h b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_user_config.h new file mode 100644 index 0000000000000000000000000000000000000000..4eff5446d903abd905e17fc0c34cd2f59094d668 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/inc/mcs_user_config.h @@ -0,0 +1,106 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_user_config.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of user config parameters. + */ +#ifndef McuMagicTag_MCS_CONFIG_H +#define McuMagicTag_MCS_CONFIG_H + +#include "debug.h" +#include "typedefs.h" + +#define SMO4TH + +#define SYSTICK_PERIOD_US 500u /* systick period */ + +#define INV_CAP_CHARGE_MS 3u + +#define INV_VOLTAGE_BUS 12.0f /* Bus voltage, V */ + +#define CTRL_CURR_PERIOD 0.0001f /* carrier ISR period, 100us */ +#define CTRL_SYSTICK_PERIOD 0.0005f /* systick control period, 500us */ + +/* Duty of sample window, the real time is 0.06*50us = 3us. */ +#define SAMPLE_WINDOW_DUTY 0.06f + +/* Duty of sample point shift as flip point, the real time is 0.008*50us = 0.4us. */ +#define SAMPLE_POINT_SHIFT 0.008f + +/* Sampling resistance 200mOhm 0.0013295 */ +#define ADC_CURR_COFFI 0.0013295f /* 3.3/4096/3.03/0.2 pga: 3.03, 200mohm */ +/* APT */ +#define APT_SYNC_IN_SRC APT_SYNCIN_SRC_APT0_SYNCOUT + +#define APT_U APT0_BASE /* Base address of U phase APT module */ +#define APT_V APT1_BASE /* Base address of V phase APT module */ +#define APT_W APT2_BASE /* Base address of W phase APT module */ + +/* FOSMO */ +#define FOSMO_GAIN 4.0f /* SMO gain */ +#define FOSMO_LAMBDA 2.0f /* SMO coefficient of cut-off frequency, its value = lambda * we */ +#define FOSMO_EMF_CUTOFF_FREQ 2.0f /* SMO back emf cutoff frequency. */ +#define SPEED_FILTER_CUTOFF_FREQUENCY 40.0f /* SMO speed cutoff frequency. of speed filter. */ +#define FOSMO_PLL_BDW 30.0f /* SMO PLL bandwidth. */ + +/* SMO4TH */ +#define SMO4TH_PLL_BDW 30.0f +#define SMO4TH_KD 300.0f +#define SMO4TH_KQ 600.0f +#define SMO4TH_SPD_FILTER_CUTOFF_FREQ 40.0f + +/* User_Commond */ +#define CTRL_IF_CURR_AMP_A 0.07f /* IF control current amplitude */ +#define USER_TARGET_SPD_HZ 100.0f /* Parentheses are used to enter negative instructions */ +#define USER_SWITCH_SPDBEGIN_HZ 30.0f /* Start of handover interval */ +#define USER_SWITCH_SPDEND_HZ (USER_SWITCH_SPDBEGIN_HZ + 3.0f) /* End of handover period */ +#define USER_MAX_SPD_HZ 180.25f +#define USER_MIN_SPD_HZ 35.0f +#define USER_SPD_SLOPE 50.0f /* slope of velocity change */ +#define USER_CURR_SLOPE (CTRL_IF_CURR_AMP_A * 10.0f) /* Current change slope */ + +/* PID PARAMS */ +#define CURRQAXIS_KP 5.023202f +#define CURRQAXIS_KI 20612.84f +#define CURRDAXIS_KP 3.477114f +#define CURRDAXIS_KI 20612.84f +#define CURR_LOWERLIM (-INV_VOLTAGE_BUS * ONE_DIV_SQRT3 * 0.95f) +#define CURR_UPPERLIM (INV_VOLTAGE_BUS * ONE_DIV_SQRT3 * 0.95f) + +#define SPD_KP 0.00505f +#define SPD_KI 0.012f +#define SPD_LOWERLIM -0.105f +#define SPD_UPPERLIM 0.105f + +/* MOTOR PARAMS */ +/* Np, Rs, Ld, Lq, Psif, J, Nmax, Currmax, PPMR, zShift */ +/* mtrPsif & mtrJ parameter is not used in this project, temporarily set to 0 */ +#define MOTORPARAM_DEFAULTS { \ + .mtrNp = 7, \ + .mtrRs = 5.1f, \ + .mtrLd = 0.00133f, \ + .mtrLq = 0.00133f, \ + .mtrPsif = 0.0f, \ + .mtrJ = 0.0f, \ + .maxElecSpd = 180.25f, \ + .maxCurr = 0.105f, \ +} + +#define ADC_UDC_COFFI 0.01289f /* 0.01289 = 3.3/4096*192/12 */ + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/main.c b/vendor/yibaina_3061M/demo/sample_qdm/main.c new file mode 100644 index 0000000000000000000000000000000000000000..afffe03c74efa3a6fe274065bb3b424052b261fd --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/main.c @@ -0,0 +1,70 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "mcs_motor_process.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +ACMP_Handle g_acmp0; +PGA_Handle g_pga0; +PGA_Handle g_pga1; +TIMER_Handle g_timer0; +TIMER_Handle g_timer1; +UART_Handle g_uart0; +APT_Handle g_apt0; +APT_Handle g_apt1; +APT_Handle g_apt2; +ADC_Handle g_adc0; +DMA_Handle g_dmac; +GPIO_Handle g_gpio2; +GPIO_Handle g_gpio1; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + MotorMainProcess(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_carrier.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_carrier.h new file mode 100644 index 0000000000000000000000000000000000000000..627f41c6d62a40b3b7ae4cc2a4e0a9217cd19ca0 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_carrier.h @@ -0,0 +1,142 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_carrier.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration for carrier interrupt processing function. + */ +#ifndef McuMagicTag_MCS_CARRIER_H +#define McuMagicTag_MCS_CARRIER_H + +#include "mcs_status.h" +#include "mcs_mtr_param.h" +#include "mcs_svpwm.h" +#include "mcs_curr_ctrl.h" +#include "mcs_if_ctrl.h" +#include "mcs_ramp_mgmt.h" +#include "mcs_spd_ctrl.h" +#include "mcs_fosmo.h" +#include "mcs_smo_4th.h" +#include "mcs_pll.h" +#include "mcs_startup.h" +#include "mcs_r1_svpwm.h" +#include "mcs_fw_ctrl.h" +#include "mcs_prot_user.h" + +typedef void (*MCS_ReadCurrUvwCb)(UvwAxis *CurrUvw); +typedef void (*MCS_SetPwmDutyCb)(UvwAxis *dutyUvwLeft, UvwAxis *dutyUvwRight); +typedef void (*MCS_SetADCTriggerTimeCb)(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB); + +/** + * @brief motor control FSM state define. + * @details motor control FSM state type: + * + FSM_IDLE -- IDLE state, system startup default. + * + FSM_OFFSET_CALIB -- Self calibrate, for ADC init. + * + FSM_CAP_CHARGE -- IPM cap charge. + * + FSM_CLEAR -- Clear before every run. + * + FSM_LOCATE -- Rotor position pre-locate. + * + FSM_STARTUP -- Start up. + * + FSM_SWITCH -- Transition state, control from open to closed loop. + * + FSM_RUN -- Normal running state. + * + FSM_WAIT_STOP -- Wait stopping. + * + FSM_STOP -- Normal stop. + * + FSM_FAULT -- Fault state, waiting for user process. + */ +typedef enum { + FSM_IDLE = 0, + FSM_OFFSET_CALIB, + FSM_CAP_CHARGE, + FSM_CLEAR, + FSM_LOCATE, + FSM_STARTUP, + FSM_SWITCH, + FSM_RUN, + FSM_WAIT_STOP, + FSM_STOP, + FSM_FAULT +} FsmState; + +/** + * @brief Sampling mode. + */ +typedef enum { + DUAL_RESISTORS = 0, + SINGLE_RESISTOR = 1 +} SampleMode; + +/** + * @brief Motor control data structure + */ +typedef struct { + unsigned char motorStateFlag; + float spdCmdHz; /**< External input speed command value */ + float axisAngle; /**< Angle of the synchronous coordinate system */ + float spdRefHz; /**< Command value after speed ramp management */ + float currCtrlPeriod; /**< current loop control period */ + float adc0Compensate; /**< ADC0 softwaretrim compensate value */ + float adc1Compensate; /**< ADC1 softwaretrim compensate value */ + float udc; /**< Bus voltage */ + float powerBoardTemp; /**< Power boart surface temperature */ + unsigned short aptMaxcntCmp; /**< Apt Maximum Comparison Count */ + float adcCurrCofe; /**< Adc current sampling cofeature */ + + unsigned short sysTickCnt; /**< System Timer Tick Count */ + unsigned short capChargeTickNum; /**< Bootstrap Capacitor Charge Tick Count */ + volatile unsigned int msTickCnt; /**< Millisecond-level counter, which can be used in 1-ms and 5-ms tasks. */ + unsigned short msTickNum; /**< Number of ticks corresponding to 1 ms */ + char obserType; /**< Set Observer Type */ + char controlMode; /**< Set foc control or sixstep bldc control mode or others */ + char spdAdjustMode; /**< Set speed adjust mode */ + char uartConnectFlag; /**< Uart connect success flag */ + short uartHeartDetCnt; /**< Uart connect heart detect count */ + float uartTimeStamp; /**< Uart data time stamp */ + SysStatusReg statusReg; /**< System status */ + FsmState stateMachine; /**< Motor Control State Machine */ + + SampleMode sampleMode; /**< sample mode */ + MOTOR_Param mtrParam; /**< Motor parameters */ + FOSMO_Handle smo; /**< SMO observer handle */ + SMO4TH_Handle smo4th; /**< SMO 4th observer handle */ + IF_Handle ifCtrl; /**< I/F control handle */ + SVPWM_Handle sv; /**< SVPWM Handle */ + R1SVPWM_Handle r1Sv; /**< Single-resistance phase-shifted SVPWM handld */ + RMG_Handle spdRmg; /**< Ramp management struct for the speed controller input reference */ + SPDCTRL_Handle spdCtrl; /**< Speed loop Control Handle */ + CURRCTRL_Handle currCtrl; /**< Current loop control handle */ + STARTUP_Handle startup; /**< Startup Switch Handle */ + FW_Handle fw; /**< Flux-Weakening Handle */ + + DqAxis idqRef; /**< Command value of the dq axis current */ + UvwAxis currUvw; /**< Three-phase current sampling value */ + AlbeAxis iabFbk; /**< αβ-axis current feedback value */ + DqAxis idqFbk; /**< Current feedback value of the dq axis */ + DqAxis vdqRef; /**< Current loop output dq voltage */ + AlbeAxis vabRef; /**< Current loop output voltage αβ */ + UvwAxis dutyUvw; /**< UVW three-phase duty cycle */ + UvwAxis dutyUvwLeft; /**< Single Resistor UVW Three-Phase Left Duty Cycle */ + UvwAxis dutyUvwRight; /**< Single Resistor UVW Three-Phase Right Duty Cycle*/ + + MCS_ReadCurrUvwCb readCurrUvwCb; /**< Read current callback function */ + MCS_SetPwmDutyCb setPwmDutyCb; /**< Set the duty cycle callback function. */ + MCS_SetADCTriggerTimeCb setADCTriggerTimeCb; /**< Sets the ADC trigger point callback function. */ + + MotorProtStatus_Handle prot; /**< Protection handle. */ +} MTRCTRL_Handle; + +void MCS_CarrierProcess(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_chip_config.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_chip_config.h new file mode 100644 index 0000000000000000000000000000000000000000..fbb9682691af7c2e32dc9fb164a97c84859b5cdf --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_chip_config.h @@ -0,0 +1,73 @@ +/** + * @ Copyright (c) HiSilicon (Shanghai) Technologies Co., Ltd. 2022-2023. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_chip_config.h + * @author MCU Algorithm Team + * @brief This file provides config macros for ECMCU105H/ECBMCU201MPC app. + */ + +#ifndef McuMagicTag_MCS_CHIPCONFIG_H +#define McuMagicTag_MCS_CHIPCONFIG_H + +#include "feature.h" + +#ifdef CHIP_3061MNPICA + + #define ADCPTT_HANDLE g_adc0 + #define ADCRESIS_HANDLE g_adc0 + #define ADCUDC_HANDLE g_adc0 + #define ADCU_HANDLE g_adc0 + #define ADCW_HANDLE g_adc0 + #define LED1_HANDLE g_gpio2 + #define LED2_HANDLE g_gpio1 + #define LED2_PIN GPIO_PIN_0 + #define LED1_PIN GPIO_PIN_3 + #define ADCPTTSOCNUM ADC_SOC_NUM0 + #define ADCUSOCNUM ADC_SOC_NUM1 + #define ADCRESISSOCNUM ADC_SOC_NUM3 + #define ADCUDCSOCNUM ADC_SOC_NUM4 + #define ADCWSOCNUM ADC_SOC_NUM6 + + #define ADC0COMPENSATE 2037.0f + #define ADC1COMPENSATE 2027.0f + +#endif + +#if defined (CHIP_3065HRPIRZ) || defined (CHIP_3065ARPIRZ) + + #define ADCU_HANDLE g_adc0 + #define ADCW_HANDLE g_adc1 + #define ADCRESIS_HANDLE g_adc2 + #define ADCUDC_HANDLE g_adc2 + #define ADCPTT_HANDLE g_adc2 + #define LED1_HANDLE g_gpio0 + #define LED2_HANDLE g_gpio0 + #define LED2_PIN GPIO_PIN_6 + #define LED1_PIN GPIO_PIN_7 + #define ADCPTTSOCNUM ADC_SOC_NUM0 + #define ADCRESISSOCNUM ADC_SOC_NUM1 + #define ADCUSOCNUM ADC_SOC_NUM8 + #define ADCWSOCNUM ADC_SOC_NUM8 + #define ADCUDCSOCNUM ADC_SOC_NUM14 + + #define ADC0COMPENSATE 2033.0f + #define ADC1COMPENSATE 2070.0f + +#endif + + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_ctlmode_config.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_ctlmode_config.h new file mode 100644 index 0000000000000000000000000000000000000000..2a6f38cccf3fb92d52b4874390805a520e255b2f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_ctlmode_config.h @@ -0,0 +1,73 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_ctlmode_config.h + * @author MCU Algorithm Team + * @brief This file provides config macros for ECMCU105H app. + */ + + /* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_CTLMODECONFIG_H +#define McuMagicTag_MCS_CTLMODECONFIG_H + +#include "debug.h" +#include "typedefs.h" + +typedef enum { + FOC_STARTUP_IF = 0, + FOC_STARTUP_VF, + FOC_STARTUP_HFI +} MOTOR_STARTUPMODE_CONFIG; + +typedef enum { + FOC_OBSERVERTYPE_SMO1TH = 0, + FOC_OBSERVERTYPE_SMO1TH_PLL, + FOC_OBSERVERTYPE_SMO4TH, + FOC_OBSERVERTYPE_SMO4TH_PLL, + FOC_OBSERVERTYPE_LUNBORG, + FOC_OBSERVERTYPE_FLUX +} MOTOR_OBSERVERTYPE_CONFIG; + +typedef enum { + FOC_CONTROLMODE_SPEED = 0, + FOC_CONTROLMODE_TORQUE +} MOTOR_CONTROLMODE_CONFIG; + +typedef enum { + FOC_CURQAXISPID_PARAMS = 0, + FOC_CURDAXISPID_PARAMS, + FOC_SPDPID_PARAMS +} MOTOR_PID_SET; + +typedef enum { + MOTOR_PARAMS_BASE = 0, + MOTOR_PARAMS_SPECIAL, + MOTOR_PARAMS_BOARD +} MOTOR_PARAMS_SET; + +typedef enum { + CUST_SPEED_ADJUST = 0, + HOST_SPEED_ADJUST +} MODE_ADSPEED_CONFIG; + +typedef enum { + CONNECTING = 0, + CONNECTED, + DISCONNECT +} UART_STATUS; + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_motor_process.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_motor_process.h new file mode 100644 index 0000000000000000000000000000000000000000..783bf21402d5d3f5d4bdc8dc5bd9ee425d0fbf21 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_motor_process.h @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_process.h + * @author MCU Algorithm Team + * @brief This file provides motor sample functions declaration for ECMCU105H board. + */ +#ifndef McuMagicTag_MCS_MOTOR_PROCESS_H +#define McuMagicTag_MCS_MOTOR_PROCESS_H + +/** + * @brief phase sequence. + */ +typedef enum { + PHASE_U = 0, + PHASE_V, + PHASE_W, + PHASE_MAX_NUM +} MCS_PhaseEnum; + +/** + * @brief key state. + */ +typedef enum { + KEY_DOWN = 0, + KEY_UP = 1, +} KEY_State; + +int MotorMainProcess(void); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_status.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_status.h new file mode 100644 index 0000000000000000000000000000000000000000..19510c78b2d63a46ca51495d8ad028e351574d1d --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_status.h @@ -0,0 +1,188 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_status.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_STATUS_H +#define McuMagicTag_MCS_STATUS_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "typedefs.h" +#include "mcs_assert.h" + +/* Typedef definitions ------------------------------------------------------------------------- */ +/** + * @brief System status define + */ +typedef union { + unsigned short all; + struct { + unsigned short cmdStart : 1; /**< Indicates that a start system command has been received. */ + unsigned short cmdStop : 1; /**< Indicates that a stop system command has been received. */ + unsigned short isRunning : 1; /**< Indicates that the system is running (enable signal) */ + unsigned short sysError : 1; /**< Indicates that the system reports an error. */ + unsigned short poweron : 1; /**< Indicates that the power-on initialization phase is complete. */ + unsigned short capcharge : 1; /**< Indicates that the bootstrap capacitor charging phase is complete. */ + unsigned short adczero : 1; /**< The current sampling point is reset to zero after power-on. */ + } Bit; +} SysStatusReg; + +/** + * @brief Get status of Bit cmdStart. + * @param sysStatus System status register handle. + * @retval Status of Bit cmdStart. + */ +static inline bool SysGetCmdStart(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.cmdStart == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit cmdStart. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStartSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStart = 1; +} + +/** + * @brief Clear Bit cmdStart. + * @param handle System status register handle. + * @retval None. + */ +static inline void SysCmdStartClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStart = 0; +} + +/** + * @brief Get status of Bit cmdStop. + * @param sysStatus System status register handle. + * @retval Status of Bit cmdStart. + */ +static inline bool SysGetCmdStop(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.cmdStop == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit cmdStop. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStopSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStop = 1; +} + +/** + * @brief Clear Bit cmdStop. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysCmdStopClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.cmdStop = 0; +} + +/** + * @brief Get status of Bit isRunning. + * @param sysStatus System status register handle. + * @retval Status of Bit isRunning. + */ +static inline bool SysIsRunning(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.isRunning == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit isRuning. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysRunningSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.isRunning = 1; +} + +/** + * @brief Clear Bit isRuning. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysRunningClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.isRunning = 0; +} + +/** + * @brief Get status of Bit sysError. + * @param sysStatus System status register handle. + * @retval Status of Bit sysError. + */ +static inline bool SysIsError(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + bool ret; + ret = (sysStatus->Bit.sysError == 1) ? true : false; + return ret; +} + +/** + * @brief Set Bit sysError. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysErrorSet(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.sysError = 1; +} + +/** + * @brief Clear Bit sysError. + * @param sysStatus System status register handle. + * @retval None. + */ +static inline void SysErrorClr(SysStatusReg *sysStatus) +{ + MCS_ASSERT_PARAM(sysStatus != NULL); + sysStatus->Bit.sysError = 0; +} + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_user_config.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_user_config.h new file mode 100644 index 0000000000000000000000000000000000000000..4eff5446d903abd905e17fc0c34cd2f59094d668 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/inc/mcs_user_config.h @@ -0,0 +1,106 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_user_config.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of user config parameters. + */ +#ifndef McuMagicTag_MCS_CONFIG_H +#define McuMagicTag_MCS_CONFIG_H + +#include "debug.h" +#include "typedefs.h" + +#define SMO4TH + +#define SYSTICK_PERIOD_US 500u /* systick period */ + +#define INV_CAP_CHARGE_MS 3u + +#define INV_VOLTAGE_BUS 12.0f /* Bus voltage, V */ + +#define CTRL_CURR_PERIOD 0.0001f /* carrier ISR period, 100us */ +#define CTRL_SYSTICK_PERIOD 0.0005f /* systick control period, 500us */ + +/* Duty of sample window, the real time is 0.06*50us = 3us. */ +#define SAMPLE_WINDOW_DUTY 0.06f + +/* Duty of sample point shift as flip point, the real time is 0.008*50us = 0.4us. */ +#define SAMPLE_POINT_SHIFT 0.008f + +/* Sampling resistance 200mOhm 0.0013295 */ +#define ADC_CURR_COFFI 0.0013295f /* 3.3/4096/3.03/0.2 pga: 3.03, 200mohm */ +/* APT */ +#define APT_SYNC_IN_SRC APT_SYNCIN_SRC_APT0_SYNCOUT + +#define APT_U APT0_BASE /* Base address of U phase APT module */ +#define APT_V APT1_BASE /* Base address of V phase APT module */ +#define APT_W APT2_BASE /* Base address of W phase APT module */ + +/* FOSMO */ +#define FOSMO_GAIN 4.0f /* SMO gain */ +#define FOSMO_LAMBDA 2.0f /* SMO coefficient of cut-off frequency, its value = lambda * we */ +#define FOSMO_EMF_CUTOFF_FREQ 2.0f /* SMO back emf cutoff frequency. */ +#define SPEED_FILTER_CUTOFF_FREQUENCY 40.0f /* SMO speed cutoff frequency. of speed filter. */ +#define FOSMO_PLL_BDW 30.0f /* SMO PLL bandwidth. */ + +/* SMO4TH */ +#define SMO4TH_PLL_BDW 30.0f +#define SMO4TH_KD 300.0f +#define SMO4TH_KQ 600.0f +#define SMO4TH_SPD_FILTER_CUTOFF_FREQ 40.0f + +/* User_Commond */ +#define CTRL_IF_CURR_AMP_A 0.07f /* IF control current amplitude */ +#define USER_TARGET_SPD_HZ 100.0f /* Parentheses are used to enter negative instructions */ +#define USER_SWITCH_SPDBEGIN_HZ 30.0f /* Start of handover interval */ +#define USER_SWITCH_SPDEND_HZ (USER_SWITCH_SPDBEGIN_HZ + 3.0f) /* End of handover period */ +#define USER_MAX_SPD_HZ 180.25f +#define USER_MIN_SPD_HZ 35.0f +#define USER_SPD_SLOPE 50.0f /* slope of velocity change */ +#define USER_CURR_SLOPE (CTRL_IF_CURR_AMP_A * 10.0f) /* Current change slope */ + +/* PID PARAMS */ +#define CURRQAXIS_KP 5.023202f +#define CURRQAXIS_KI 20612.84f +#define CURRDAXIS_KP 3.477114f +#define CURRDAXIS_KI 20612.84f +#define CURR_LOWERLIM (-INV_VOLTAGE_BUS * ONE_DIV_SQRT3 * 0.95f) +#define CURR_UPPERLIM (INV_VOLTAGE_BUS * ONE_DIV_SQRT3 * 0.95f) + +#define SPD_KP 0.00505f +#define SPD_KI 0.012f +#define SPD_LOWERLIM -0.105f +#define SPD_UPPERLIM 0.105f + +/* MOTOR PARAMS */ +/* Np, Rs, Ld, Lq, Psif, J, Nmax, Currmax, PPMR, zShift */ +/* mtrPsif & mtrJ parameter is not used in this project, temporarily set to 0 */ +#define MOTORPARAM_DEFAULTS { \ + .mtrNp = 7, \ + .mtrRs = 5.1f, \ + .mtrLd = 0.00133f, \ + .mtrLq = 0.00133f, \ + .mtrPsif = 0.0f, \ + .mtrJ = 0.0f, \ + .maxElecSpd = 180.25f, \ + .maxCurr = 0.105f, \ +} + +#define ADC_UDC_COFFI 0.01289f /* 0.01289 = 3.3/4096*192/12 */ + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.c new file mode 100644 index 0000000000000000000000000000000000000000..99766bdf9b3d4f161b1902708696cb0e75a4fc9c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.c @@ -0,0 +1,43 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_cmm.c + * @author MCU Algorithm Team + * @brief This file contains protection common api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt.h" +#include "mcs_assert.h" + +/** + * @brief Safty-pulse-off function execution to turn off all the power devices. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void ProtSpo_Exec(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /**< Turn off all the six power devices of the inverter. */ + for (unsigned int i = 0; i < MOTOR_PHASE_NUMBER; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + DCL_APT_EnableSwContPWMAction(aptx, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(aptx, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(aptx); + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.h new file mode 100644 index 0000000000000000000000000000000000000000..104a5decba9eeb22375b63e4def4278af37d3573 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_cmm.h @@ -0,0 +1,136 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_cmm.h + * @author MCU Algorithm Team + * @brief This file contains protection function common data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_CMM_H +#define McuMagicTag_MCS_PROT_CMM_H + +#include "typedefs.h" +#include "apt_ip.h" + +/* Macro definitions --------------------------------------------------------------------------- */ +#define MOTOR_PHASE_NUMBER (3) + +#define PROT_VAL_THRESHOLD_NUMS (4) +#define PROT_VAL_THRESHOLD_0 (0) +#define PROT_VAL_THRESHOLD_1 (1) +#define PROT_VAL_THRESHOLD_2 (2) +#define PROT_VAL_THRESHOLD_3 (3) + +#define PROT_LIMIT_TIME_NUMS (3) +#define PROT_LIMIT_TIME_0 (0) +#define PROT_LIMIT_TIME_1 (1) +#define PROT_LIMIT_TIME_2 (2) + +#define MOTOR_PHASE_NUMBER (3) + +/**< Motor error status definition. */ +typedef union { + int all; + struct { + unsigned short overCurrErr : 1; /**< Indicates that phase current(s) is over protected value. */ + unsigned short overVoltErr : 1; /**< Indicates that dc-link voltage is over protected value. */ + unsigned short lowerVoltErr : 1; /**< Indicates that dc-link voltage is lower than protected value */ + unsigned short overIpmTempErr : 1; /**< Indicates that IPM temperature is over protected value. */ + unsigned short revRotErr : 1; /**< Indicates that motor negtive direction. */ + unsigned short motorStalling : 1; /**< Indicates that rotor is stalling. */ + unsigned short overMotorTempErr : 1; /**< Indicates that three phase currents is out-of-balance. */ + unsigned short posSnsrCommsErr : 1; /**< Indicates that position sensor communication is lost with MCU. */ + unsigned short posSnsrFuncErr : 1; /**< Indicates that position sensor reports function error. */ + unsigned short posSnsrCalibrErr : 1; /**< Indicates that position sensor fails to calibrate itself. */ + unsigned short currOutOfBalance : 1; /**< Indicates that the rotor is reverse rotation.*/ + unsigned short phsOpenErr : 1; /**< Indicates that phase winding(s) is open. */ + unsigned short phsU : 1; /**< Indicates that u phase fails when phsOpenErr occurs. */ + unsigned short phsV : 1; /**< Indicates that v phase fails when phsOpenErr occurs. */ + unsigned short phsW : 1; /**< Indicates that w phase fails when phsOpenErr occurs. */ + unsigned short multiPhs : 1; /**< Indicates that multi-phases fail when phsOpenErr occurs.*/ + } Bit; +} MotorErrStatusReg; + +/**< Protection Status Bit Definition */ +typedef enum { + OCP_ERR_BIT, + OVP_ERR_BIT, + LVP_ERR_BIT, + OTP_IPM_ERR_BIT, + OTP_MOTOR_ERR_BIT, + STALLING_ERR_BIT, + CURR_OUT_BALANCE_ERR_BIT, + POS_COMMS_ERR_BIT, + POS_FUNC_ERR_BIT, + POS_CALIB_ERR_BIT, + REV_ROT_ERR_BIT, + PHS_OPEN_ERR_BIT, + PHS_U_ERR_BIT, + PHS_V_ERR_BIT, + PHS_W_ERR_BIT, + PHS_MULTI_ERR_BIT, +} PROT_ErrBit; + +/**< Motor error protection level. */ +typedef enum { + PROT_LEVEL_0 = 0, + PROT_LEVEL_1, + PROT_LEVEL_2, + PROT_LEVEL_3, + PROT_LEVEL_4 /**< The greater level number, the severe error is. */ +} PROT_Level; + +/** + * @brief Obtains the status of a bit of data. + * @param data data. + * @param bits Number of digits. + * @retval Bit status. + */ +static inline bool GetBit(int data, unsigned short bit) +{ + bool ret; + ret = ((data >> bit) & 1); + return ret; +} + +/** + * @brief Sets the status of a bit of data. + * @param data data. + * @param bit The setted bit. + * @retval None. + */ +static inline void SetBit(int *data, unsigned char bit) +{ + *data |= (1 << bit); +} + +/** + * @brief Clear the status of a bit of data. + * @param data data. + * @param bit The Clear bit. + * @retval None. + */ +static inline void ClearBit(int *data, unsigned char bit) +{ + *data &= ~(1 << bit); +} + +/**< Protection action. */ +void ProtSpo_Exec(APT_RegStruct **aptAddr); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.c new file mode 100644 index 0000000000000000000000000000000000000000..e97876b7c6ec522fa82c30cbe503e2ab8de288db --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.c @@ -0,0 +1,137 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user.c + * @author MCU Algorithm Team + * @brief This file contains user protection data struct, inquiry api and initialization api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_user.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Get motor over current error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorOverCurrErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overCurrErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over dc-link voltage error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsDcLinkOverVoltErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overVoltErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor lower dc-link voltage error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsDcLinkLowerVoltErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.lowerVoltErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over Ipm temperature error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsIpmOverTempErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overIpmTempErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over Motor temperature error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorOverTempErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overMotorTempErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor stalling error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorStallingErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.motorStalling) { + return true; + } else { + return false; + } +} + +/** + * @brief Clear the motor error status. + * @param motorProt Motor protection handle. + * @retval Error status. + */ +void ClearMotorErrStatus(MotorProtStatus_Handle *motorProt) +{ + MCS_ASSERT_PARAM(motorProt != NULL); + /* Clear the motor error status. */ + motorProt->motorErrStatus.all = 0x00; + OCP_Clear(&motorProt->ocp); + OVP_Clear(&motorProt->ovp); + LVP_Clear(&motorProt->lvp); + OTP_Clear(&motorProt->otp); +} + +/** + * @brief Motor protection function initialization. + * @param motorProt Motor protection handle. + * @retval Error status. + */ +void MotorProt_Init(MotorProtStatus_Handle *motorProt) +{ + MCS_ASSERT_PARAM(motorProt != NULL); + motorProt->motorErrStatus.all = 0x00; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.h new file mode 100644 index 0000000000000000000000000000000000000000..365110e10c6cd8bd5207af61f0a87b6df226fa91 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user.h @@ -0,0 +1,54 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user.h + * @author MCU Algorithm Team + * @brief This file contains user protection data struct, inquiry api and initialization api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_USER_H +#define McuMagicTag_MCS_PROT_USER_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "mcs_curr_prot.h" +#include "mcs_dc_volt_prot.h" +#include "mcs_temp_prot.h" +#include "mcs_motor_stalling.h" +#include "typedefs.h" + +typedef struct { + MotorErrStatusReg motorErrStatus; /**< Motor error status. */ + OCP_Handle ocp; /**< Over current protection. */ + OVP_Handle ovp; /**< Over dc-link voltage protection. */ + LVP_Handle lvp; /**< Lower dc-link voltage protection. */ + OTP_Handle otp; /**< Over IPM temperature protection. */ + STP_Handle stall; /**< Motor stalling protection. */ +} MotorProtStatus_Handle; + +void MotorProt_Init(MotorProtStatus_Handle *motorProt); + +/**< Inquiry motor error status */ +bool IsMotorOverCurrErr(MotorErrStatusReg motorErrStatus); +bool IsDcLinkOverVoltErr(MotorErrStatusReg motorErrStatus); +bool IsDcLinkLowerVoltErr(MotorErrStatusReg motorErrStatus); +bool IsIpmOverTempErr(MotorErrStatusReg motorErrStatus); +bool IsMotorOverTempErr(MotorErrStatusReg motorErrStatus); +bool IsMotorStallingErr(MotorErrStatusReg motorErrStatus); +void ClearMotorErrStatus(MotorProtStatus_Handle *motorProt); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user_config.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user_config.h new file mode 100644 index 0000000000000000000000000000000000000000..3f43e7736e6f4d6a7e7377b5c2689be1755690da --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/common/mcs_prot_user_config.h @@ -0,0 +1,125 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user_config.h + * @author MCU Algorithm Team + * @brief This file contans user macro definition of the protection function. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_USER_CONFIG_H +#define McuMagicTag_MCS_PROT_USER_CONFIG_H + +/* Macro definitions --------------------------------------------------------------------------- */ +/**< COMMON */ +/**< Peak phase current (A) of the motor or IPM under continuous operations. */ +#define PROT_MOTOR_RATED_CURR (0.07f) +/**< Only several continuous fault detection can trigger error status. */ +#define PROT_CNT_LIMIT (100) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define RECY_CNT_LIMIT (10000) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define OVER_VOLT_RECY_CNT_LIMIT (100) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define LOWER_VOLT_RECY_CNT_LIMIT (100) + +/**< Over current protection */ +/**< Over current trigger value (A) when in level 1. */ +#define PROT_OVER_CURR_POW_DN1 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 2. */ +#define PROT_OVER_CURR_POW_DN2 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 3. */ +#define PROT_OVER_CURR_POW_DN3 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 4. */ +#define PROT_OVER_CURR_POW_OFF (2.0f * PROT_MOTOR_RATED_CURR) +#define PROT_OVER_CURR_RECY_DELTA (0.0035f) /**< Current gap (A) when recovers from protection status. */ +#define PROT_OVER_CURR_LIMIT1_TIME_SEC (30.0f) /**< 20% overload can last maximum time: 30 sec. */ +#define PROT_OVER_CURR_LIMIT2_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_CURR_LIMIT3_TIME_SEC (2.0f) /**< 20% overload can last maximum time: 2 sec. */ + +/**< Over voltage protection */ +#define PROT_OVER_VOLT_BRK_ON1 (15.0f) /**< Over dc-link voltage trigger value (V) when in level 1. */ +#define PROT_OVER_VOLT_BRK_ON2 (16.0f) /**< Over dc-link voltage trigger value (V) when in level 2. */ +#define PROT_OVER_VOLT_BRK_ON3 (17.0f) /**< Over dc-link voltage trigger value (V) when in level 3. */ +#define PROT_OVER_VOLT_BRK_ALL (18.0f) /**< Over dc-link voltage trigger value (V) when in level 4. */ +#define PROT_OVER_VOLT_RECY_DELTA (0.5f) /**< Voltage gap (V) when recovers from protection status. */ +#define PROT_OVER_VOLT_LIMIT1_TIME_SEC (5.0f) /**< overload1 can last maximum time (sec). */ +#define PROT_OVER_VOLT_LIMIT2_TIME_SEC (3.0f) /**< overload2 can last maximum time (sec). */ +#define PROT_OVER_VOLT_LIMIT3_TIME_SEC (1.0f) /**< overload3 can last maximum time (sec). */ +#define PROT_POW_DN1_PCT (1.0f) /* Power down level in level 1. */ +#define PROT_POW_DN2_PCT (1.0f) /* Power down level in level 2. */ +#define PROT_POW_DN3_PCT (1.0f) /* Power down level in level 3. */ + +/**< Conduction duty needs to be calibrated with the power of the brake loop. */ +#define PROT_OVER_VOLT_BRK_DUTY1 (0.25f) /**< Conduction duty of the brake loop in level 1. */ +#define PROT_OVER_VOLT_BRK_DUTY2 (0.50f) /**< Conduction duty of the brake loop in level 2. */ +#define PROT_OVER_VOLT_BRK_DUTY3 (0.75f) /**< Conduction duty of the brake loop in level 3. */ +#define PROT_OVER_VOLT_BRK_DUTY4 (1.00f) /**< Conduction duty of the brake loop in level 4. */ + +/**< Lower voltage protection */ +#define PROT_LOWER_VOLT_POW_DN1 (10.3f) /**< Lower dc-link voltage trigger value (V) when in level 1. */ +#define PROT_LOWER_VOLT_POW_DN2 (10.0f) /**< Lower dc-link voltage trigger value (V) when in level 2. */ +#define PROT_LOWER_VOLT_POW_DN3 (9.0f) /**< Lower dc-link voltage trigger value (V) when in level 3. */ +#define PROT_LOWER_VOLT_POW_OFF (8.0f) /**< Lower dc-link voltage trigger value (V) when in level 4. */ +#define PROT_LOWER_VOLT_RECY_DELTA (0.5f) /**< Voltage gap (A) when recovers from protection status. */ +#define PROT_LOWER_VOLT_LIMIT1_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ +#define PROT_LOWER_VOLT_LIMIT2_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ +#define PROT_LOWER_VOLT_LIMIT3_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ + +/**< Over IPM temperature protection */ +#define PROT_OVER_IPM_TEMP_POW_DN1 (40.0f) /**< Over IPM temperature trigger value (celsius) when in level 1. */ +#define PROT_OVER_IPM_TEMP_POW_DN2 (42.0f) /**< Over IPM temperature trigger value (celsius) when in level 2. */ +#define PROT_OVER_IPM_TEMP_POW_DN3 (44.0f) /**< Over IPM temperature trigger value (celsius) when in level 3. */ +#define PROT_OVER_IPM_TEMP_POW_OFF (45.0f) /**< Over IPM temperature trigger value (celsius) when in level 4. */ +#define PROT_OVER_IPM_TEMP_RECY_DELTA (0.5f) /**< Temperature gap (celsius) when recovers from protection status. */ +#define PROT_OVER_TEMP_LIMIT1_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_TEMP_LIMIT2_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_TEMP_LIMIT3_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ + +/**< Motor stalling detection */ +/**< Feedback current higher than this value triggers fault. (A). */ +#define PROT_STALLING_CURR_AMP_LIMIT (PROT_MOTOR_RATED_CURR * 1.2f) +/**< Feedback speed lower than this value triggers fault (Hz). */ +#define PROT_STALLING_SPD_LIMIT 30 +/**< The threshold time that current and speed feedback over ranges (s). */ +#define PROT_STALLING_TIME_LIMIT (1.5f) + +/**< Current out-of-balance detection */ +#define UNBAL_STARTUP_DETECT_TIME_SEC (0.5f) /**< Start detection delay (s) */ +#define UNBAL_PROT_CNT_LIMIT (50000) +#define UNBAL_RECY_CNT_LIMIT (50000) +#define UNBAL_CURRENT_DELTA (1.5f) /**< Used to detect zero crossings in the current cycle. */ +#define UNBAL_DEGREE_LIMIT (0.035f) /**< unbalance degree threshold. */ +#define UNBAL_DEGREE_AVG_FLT_COFFI (0.03f) /**< unbalance degree average Filter coefficient. */ + +/**< Position sensor detection */ +#define POS_SNSR_FAULT_CNT (100000) /* Number of consecutive fault times */ +#define POS_SNSR_RECY_CNT (10000) /* Number of consecutive communication loss times */ + +/**< Phase winding integrity detection */ +#define OPEN_PHS_CURR_THR_A (0.1f) /* Threshold to determine open phase no current (A). */ + +/**< Position sensor zero position detection */ +#define POS_SNSR_CALIBR_UD_REF (15.0f) /* V */ +#define POS_SNSR_CALIBR_UD_SLOPE (15.0f) /* (V/S) */ +#define POS_SNSR_CALIBR_DETECT_TIME (2.0f) /* S */ +#define POS_SNSR_RECORD_TIMES (2000) /* 2000 * TS */ + +/* Multi-cycle mode: > 1; One-cycle mode: < 0.5 */ +#define POS_SNSR_IPD_INJ_PERIOD (4) + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..da4e56f89a51d39053fad4511bb799c91070df65 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.c @@ -0,0 +1,267 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_curr_prot.c + * @author MCU Algorithm Team + * @brief This file contains current protecion api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_curr_prot.h" +#include "mcs_math.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over current protection function. + * @param ocp Over current protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void OCP_Init(OCP_Handle *ocp, float ts) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + ocp->ts = ts; + OCP_Clear(ocp); + + ocp->protCntLimit = PROT_CNT_LIMIT; + ocp->recyCntLimit = RECY_CNT_LIMIT; + /* Configuring four levels of current protection thresholds. */ + ocp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_CURR_POW_DN1; + ocp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_CURR_POW_DN2; + ocp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_CURR_POW_DN3; + ocp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_CURR_POW_OFF; + /* Configure the protection limit time. */ + ocp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_CURR_LIMIT1_TIME_SEC; + ocp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_CURR_LIMIT2_TIME_SEC; + ocp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_CURR_LIMIT3_TIME_SEC; + ocp->recyDelta = PROT_OVER_CURR_RECY_DELTA; +} + +/** + * @brief Over current protection detection. + * @param ocp Over current protection handle. + * @param motorErrStatus Motor error status. + * @param idq DQ-axis feedback currents. + * @retval None. + */ +void OCP_Det(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus, DqAxis idq) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + /* Calculate current amplitude. */ + ocp->currAmp = Sqrt(idq.d * idq.d + idq.q * idq.q); + + /* Check if value goes over threshold for continuous cycles. */ + if (ocp->currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_0]) { + ocp->protCnt = 0; + return; + } + + if (ocp->protCnt < ocp->protCntLimit) { + ocp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_3] && ocp->protLevel < PROT_LEVEL_4) { + ocp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_2] && ocp->protLevel < PROT_LEVEL_3) { + ocp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_1] && ocp->protLevel < PROT_LEVEL_2) { + ocp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_0] && ocp->protLevel < PROT_LEVEL_1) { + ocp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } +} + +/** + * @brief Over current protection execution. + * @param ocp Over current protection handle. + * @param idqRef DQ-axis current references. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OCP_Exec(OCP_Handle *ocp, DqAxis *idqRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(idqRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + + float id = idqRef->d; + float iq = idqRef->q; + float idqAmp = ocp->currAmp; + /* According to protect level, take corresponding action. */ + switch (ocp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + idqRef->d = 0.0f; + idqRef->q = 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_2]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_1]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 1: derate speed reference. */ + case PROT_LEVEL_1: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_0]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } +} + +/** + * @brief Over current protection recovery. + * @param ocp Over current protection handle. + * @param motorErrStatus Motor error status. + * @retval None. + */ +void OCP_Recy(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus) +{ + MCS_ASSERT_PARAM(ocp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.overCurrErr) { + return; + } + + /* Calculate current amplitude. */ + float currAmp = ocp->currAmp; + + /* According to protection level, take corresponding recovery action. */ + switch (ocp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_3] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_3; + ocp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_2] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_2; + ocp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_1] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_1; + ocp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_0] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_0; + ocp->recyCnt = 0; + } + } + break; + + /* level 0 */ + case PROT_LEVEL_0: + motorErrStatus->Bit.overCurrErr = 0; + break; + + default: + break; + } +} + +/** + * @brief Over current protection error status clear. + * @param ocp Over current protection handle. + * @retval None. + */ +void OCP_Clear(OCP_Handle *ocp) +{ + MCS_ASSERT_PARAM(ocp != NULL); + /* Clear the history value. */ + ocp->protCnt = 0; + ocp->protLevel = PROT_LEVEL_0; + ocp->recyCnt = 0; + ocp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..e9916fe491699bff3373bbc68b175b6db16d7cd7 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_curr_prot.h @@ -0,0 +1,52 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_curr_prot.h + * @author MCU Algorithm Team + * @brief This file contains current protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_CURR_PROT_H +#define McuMagicTag_MCS_CURR_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "mcs_typedef.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float currAmp; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low current level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} OCP_Handle; + +void OCP_Init(OCP_Handle *ocp, float ts); +void OCP_Det(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus, DqAxis idq); +void OCP_Exec(OCP_Handle *ocp, DqAxis *idqRef, APT_RegStruct **aptAddr); +void OCP_Recy(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus); +void OCP_Clear(OCP_Handle *ocp); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..b0541a2e2e37ba98e8b92e6334ab2cc940b72b6c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.c @@ -0,0 +1,495 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_dc_volt_prot.c + * @author MCU Algorithm Team + * @brief This file contains dc-link voltage protection api declaration. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_dc_volt_prot.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over dc-link voltage protection function. + * @param ovp Over dc-link voltage protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void OVP_Init(OVP_Handle *ovp, float ts) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + ovp->ts = ts; + OVP_Clear(ovp); + ovp->protCntLimit = PROT_CNT_LIMIT; + ovp->recyCntLimit = OVER_VOLT_RECY_CNT_LIMIT; + /* Configuring four levels of overvoltage protection thresholds. */ + ovp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_VOLT_BRK_ON1; + ovp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_VOLT_BRK_ON2; + ovp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_VOLT_BRK_ON3; + ovp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_VOLT_BRK_ALL; + /* Configure the protection limit time. */ + ovp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_VOLT_LIMIT1_TIME_SEC; + ovp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_VOLT_LIMIT2_TIME_SEC; + ovp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_VOLT_LIMIT3_TIME_SEC; + ovp->recyDelta = PROT_OVER_VOLT_RECY_DELTA; +} + +/** + * @brief Initilization lower dc-link voltage protection function. + * @param lvp Lower dc-link voltage protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void LVP_Init(LVP_Handle *lvp, float ts) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + + lvp->ts = ts; + LVP_Clear(lvp); + + lvp->protCntLimit = PROT_CNT_LIMIT; + lvp->recyCntLimit = LOWER_VOLT_RECY_CNT_LIMIT; + /* Configuring four levels of lower voltage protection thresholds. */ + lvp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_LOWER_VOLT_POW_DN1; + lvp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_LOWER_VOLT_POW_DN2; + lvp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_LOWER_VOLT_POW_DN3; + lvp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_LOWER_VOLT_POW_OFF; + /* Configure the protection limit time. */ + lvp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_LOWER_VOLT_LIMIT1_TIME_SEC; + lvp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_LOWER_VOLT_LIMIT2_TIME_SEC; + lvp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_LOWER_VOLT_LIMIT3_TIME_SEC; + lvp->recyDelta = PROT_OVER_VOLT_RECY_DELTA; +} + +/** + * @brief Over dc-link voltage protection detection. + * @param ovp Over dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage feedback (V). + * @retval None. + */ +void OVP_Det(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(udc > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_0]) { + ovp->protCnt = 0; + return; + } + + if (ovp->protCnt < ovp->protCntLimit) { + ovp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_3] && ovp->protLevel < PROT_LEVEL_4) { + ovp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_2] && ovp->protLevel < PROT_LEVEL_3) { + ovp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_1] && ovp->protLevel < PROT_LEVEL_2) { + ovp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_0] && ovp->protLevel < PROT_LEVEL_1) { + ovp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } +} + +/** + * @brief Lower dc-link voltage protection detection. + * @param lvp Lower dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage feedback (V). + * @retval None. + */ +void LVP_Det(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(udc > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_0]) { + lvp->protCnt = 0; + return; + } + + if (lvp->protCnt < lvp->protCntLimit) { + lvp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_3] && lvp->protLevel < PROT_LEVEL_4) { + lvp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_2] && lvp->protLevel < PROT_LEVEL_3) { + lvp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_1] && lvp->protLevel < PROT_LEVEL_2) { + lvp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_0] && lvp->protLevel < PROT_LEVEL_1) { + lvp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } +} + +/** + * @brief Over dc-link voltage protection execution. + * @param ovp Over dc-link voltage protection handle. + * @param duty Brake loop output duty (0-1). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OVP_Exec(OVP_Handle *ovp, float *duty, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(duty != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (ovp->protLevel) { + /* level 4: brake loop duty maximum. */ + case PROT_LEVEL_4: + *duty = PROT_OVER_VOLT_BRK_DUTY4; + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + break; + + /* level 3: brake loop duty level 3. */ + case PROT_LEVEL_3: + *duty = PROT_OVER_VOLT_BRK_DUTY2; + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_2]) { + *duty = PROT_OVER_VOLT_BRK_DUTY3; + } + break; + + /* level 2: brake loop duty level 2. */ + case PROT_LEVEL_2: + *duty = PROT_OVER_VOLT_BRK_DUTY1; + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_1]) { + *duty = PROT_OVER_VOLT_BRK_DUTY2; + } + break; + + /* level 1: brake loop duty level 1. */ + case PROT_LEVEL_1: + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_0]) { + *duty = PROT_OVER_VOLT_BRK_DUTY1; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } + return; +} + +/** + * @brief Lower dc-link voltage protection execution. + * @param lvp Lower dc-link voltage protection handle. + * @param spdRef Speed Reference (Hz). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void LVP_Exec(LVP_Handle *lvp, float *spdRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(spdRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (lvp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + *spdRef *= 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + *spdRef *= PROT_POW_DN2_PCT; + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_2]) { + *spdRef *= PROT_POW_DN3_PCT; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + *spdRef *= PROT_POW_DN1_PCT; + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_1]) { + *spdRef *= PROT_POW_DN2_PCT; + } + break; + + /* level 1: derate speed reference. */ + case PROT_LEVEL_1: + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_0]) { + *spdRef *= PROT_POW_DN1_PCT; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } + return; +} + +/** + * @brief Over dc-link voltage protection recovery. + * @param ovp Over dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage (V). + * @retval None. + */ +void OVP_Recy(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(ovp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.overVoltErr) { + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (ovp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_3] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_3; + ovp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the dc-link voltage is less than threshold 2, level-2 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_2] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_2; + ovp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the dc-link voltage is less than threshold 1, level-1 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_1] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_1; + ovp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the dc-link voltage is less than threshold 0, level-0 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_0] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_0; + ovp->recyCnt = 0; + } + } + break; + /* level 0 Fault-free state. */ + case PROT_LEVEL_0: + motorErrStatus->Bit.overVoltErr = 0; + break; + + default: + break; + } + return; +} + +/** + * @brief Lower dc-link voltage protection recovery. + * @param lvp Lower dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage (V). + * @retval None. + */ +void LVP_Recy(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(lvp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.lowerVoltErr) { + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (lvp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + /* If the dc-link voltage is greater than threshold 3, level-3 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_3] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_3; + lvp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the dc-link voltage is greater than threshold 2, level-2 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_2] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_2; + lvp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the dc-link voltage is greater than threshold 1, level-1 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_1] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_1; + lvp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the dc-link voltage is greater than threshold 0, level-0 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_0] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_0; + lvp->recyCnt = 0; + } + } + break; + /* level 0 Fault-free state. */ + case PROT_LEVEL_0: + motorErrStatus->Bit.lowerVoltErr = 0; + break; + + default: + break; + } + return; +} + +/** + * @brief Over dc-link voltage protection error status clear. + * @param ovp Over voltage protection handle. + * @retval None. + */ +void OVP_Clear(OVP_Handle *ovp) +{ + MCS_ASSERT_PARAM(ovp != NULL); + /* Clear the history value. */ + ovp->protCnt = 0; + ovp->protLevel = PROT_LEVEL_0; + ovp->recyCnt = 0; + ovp->timer = 0.0f; +} + +/** + * @brief Lower dc-link voltage protection error status clear. + * @param lvp Lower voltage protection handle. + * @retval None. + */ +void LVP_Clear(LVP_Handle *lvp) +{ + MCS_ASSERT_PARAM(lvp != NULL); + /* Clear the history value. */ + lvp->protCnt = 0; + lvp->protLevel = PROT_LEVEL_0; + lvp->recyCnt = 0; + lvp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..0435156a0add386ec4b783f4d003f4178baa2ecf --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_dc_volt_prot.h @@ -0,0 +1,69 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_dc_volt_prot.h + * @author MCU Algorithm Team + * @brief This file contains dc-link voltage protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_DC_VOLT_PROT_H +#define McuMagicTag_MCS_DC_VOLT_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low voltage level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} OVP_Handle; + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from high voltage level to low. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} LVP_Handle; + +void OVP_Init(OVP_Handle *ovp, float ts); +void OVP_Det(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc); +void OVP_Exec(OVP_Handle *ovp, float *duty, APT_RegStruct **aptAddr); +void OVP_Recy(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc); +void OVP_Clear(OVP_Handle *ovp); + +void LVP_Init(LVP_Handle *lvp, float ts); +void LVP_Det(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc); +void LVP_Exec(LVP_Handle *lvp, float *spdRef, APT_RegStruct **aptAddr); +void LVP_Recy(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc); +void LVP_Clear(LVP_Handle *lvp); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.c new file mode 100644 index 0000000000000000000000000000000000000000..9dee4d2d240e66f7cfb0528b2d42d4c32ada0078 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.c @@ -0,0 +1,112 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_stalling.c + * @author MCU Algorithm Team + * @brief This file contains motor stalling protection data struct and api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_motor_stalling.h" +#include "mcs_prot_user_config.h" +#include "mcs_math.h" +#include "mcs_math_const.h" +#include "mcs_assert.h" + +/** + * @brief Initilization motor stalling protection function. + * @param stall Motor stalling handle. + * @param ts Ctrl period (s). + * @param currLimit The current amplitude that triggers fault. (A). + * @param spdLimit The speed amplitude that triggers fault. (Hz). + * @param timeLimit The threshold time that current amplitude over the limit (s). + * @retval None. + */ +void STP_Init(STP_Handle *stall, float ts, float currLimit, float spdLimit, float timeLimit) +{ + MCS_ASSERT_PARAM(stall != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + MCS_ASSERT_PARAM(currLimit > 0.0f); + MCS_ASSERT_PARAM(spdLimit > 0.0f); + MCS_ASSERT_PARAM(timeLimit > 0.0f); + /* Configuring parameters for stalling detection. */ + stall->ts = ts; + /* Current threshold and speed threshold for stalling fault. */ + stall->currAmpLimit = currLimit; + stall->spdLimit = spdLimit; + stall->timeLimit = timeLimit; + stall->timer = 0.0f; +} + +/** + * @brief Motor stalling detection. + * @param stall Motor stalling handle. + * @param motorErrStatus Motor error status. + * @param spd Speed feedback (Hz). + * @param idq Dq-axis current feedback (A). + * @retval None. + */ +void STP_Det_ByCurrSpd(STP_Handle *stall, MotorErrStatusReg *motorErrStatus, float spd, DqAxis idq) +{ + MCS_ASSERT_PARAM(stall != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(Abs(spd) >= 0.0f); + /* Calculate current amplitude. */ + float currAmp = Sqrt(idq.d * idq.d + idq.q * idq.q); + float spdAbs = Abs(spd); + /* Check if value goes over threshold for continuous cycles. */ + if (currAmp < stall->currAmpLimit || spdAbs > stall->spdLimit) { + stall->timer = 0.0f; + return; + } + /* Time accumulation. */ + if (stall->timer < stall->timeLimit) { + stall->timer += stall->ts; + return; + } + motorErrStatus->Bit.motorStalling = 1; +} + +/** + * @brief Motor stalling protection execution. + * @param motorErrStatus Motor error status. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void STP_Exec(MotorErrStatusReg *motorErrStatus, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + if (motorErrStatus->Bit.motorStalling == 0) { + return; + } + + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + return; +} + +/** + * @brief Motor stalling protection error status clear. + * @param stall Motor stalling handle. + * @retval None. + */ +void STP_Clear(STP_Handle *stall) +{ + MCS_ASSERT_PARAM(stall != NULL); + stall->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.h new file mode 100644 index 0000000000000000000000000000000000000000..a1d1e4bed11bec0d6d73aee54de36c365588898e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_motor_stalling.h @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_stalling.h + * @author MCU Algorithm Team + * @brief This file contains motor stalling protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_MOTOR_STALLING_PROT_H +#define McuMagicTag_MCS_MOTOR_STALLING_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" +#include "mcs_typedef.h" + +typedef struct { + float currAmpLimit; /**< Feedback current higher than this value triggers fault. (A). */ + float spdLimit; /**< Feedback speed lower than this value triggers fault (Hz). */ + float timeLimit; /**< The threshold time that current and speed feedback over ranges (s). */ + float timer; /**< Timer to get speed and current over range time. */ + float ts; /**< Ctrl period (s). */ +} STP_Handle; + +void STP_Init(STP_Handle *stall, float ts, float currLimit, float spdLimit, float timeLimit); +void STP_Det_ByCurrSpd(STP_Handle *stall, MotorErrStatusReg *motorErrStatus, float spd, DqAxis idq); +void STP_Exec(MotorErrStatusReg *motorErrStatus, APT_RegStruct **aptAddr); +void STP_Clear(STP_Handle *stall); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..184ba4a3ac712690e4f808f1464a65c74a387b52 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.c @@ -0,0 +1,262 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_temp_prot.c + * @author MCU Algorithm Team + * @brief This file contains over temperature protection api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_temp_prot.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over temperation protection function. + * @param otp Over temperature protection handle. + * @param ts Ctrl period. + * @retval None. + */ +void OTP_Init(OTP_Handle *otp, float ts) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + otp->ts = ts; + otp->protCntLimit = PROT_CNT_LIMIT; + otp->recyCntLimit = RECY_CNT_LIMIT; + /* Configuring the temperature protection threshold. */ + otp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_IPM_TEMP_POW_DN1; + otp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_IPM_TEMP_POW_DN2; + otp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_IPM_TEMP_POW_DN3; + otp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_IPM_TEMP_POW_OFF; + /* Configuring the protection limiting time. */ + otp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_TEMP_LIMIT1_TIME_SEC; + otp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_TEMP_LIMIT2_TIME_SEC; + otp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_TEMP_LIMIT3_TIME_SEC; + otp->recyDelta = PROT_OVER_IPM_TEMP_RECY_DELTA; + OTP_Clear(otp); +} + +/** + * @brief Over temperatre protection detection. + * @param otp Over temperature protection handle. + * @param tempErrBit Temperature error status bit. + * @param idq DQ-axis feedback currents. + * @retval None. + */ +void OTP_Det(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(temp > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_0]) { + otp->protCnt = 0; + ClearBit(&motorErrStatus->all, protBit); + return; + } + + if (otp->protCnt < otp->protCntLimit) { + otp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_3] && otp->protLevel < PROT_LEVEL_4) { + otp->protLevel = PROT_LEVEL_4; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_2] && otp->protLevel < PROT_LEVEL_3) { + otp->protLevel = PROT_LEVEL_3; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_1] && otp->protLevel < PROT_LEVEL_2) { + otp->protLevel = PROT_LEVEL_2; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_0] && otp->protLevel < PROT_LEVEL_1) { + otp->protLevel = PROT_LEVEL_1; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } +} + +/** + * @brief Over temperature protection execution. + * @param otp Over temperature protection handle. + * @param spdRef Speed reference (Hz). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OTP_Exec(OTP_Handle *otp, float *spdRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(spdRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (otp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + *spdRef *= 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + *spdRef *= PROT_POW_DN2_PCT; + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_2]) { + *spdRef *= PROT_POW_DN3_PCT; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + /* Reducte motor speed to level 2 */ + *spdRef *= PROT_POW_DN1_PCT; + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_1]) { + *spdRef *= PROT_POW_DN2_PCT; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + case PROT_LEVEL_1: + /* Reducte motor speed to level 0 */ + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_0]) { + /* level 1: derate speed reference. */ + *spdRef *= PROT_POW_DN1_PCT; + } + break; + + default: + break; + } + return; +} + +/** + * @brief Over temperature protection recovery. + * @param otp Over temperature protection handle. + * @param tempErrBit Temperature error status bit. + * @param temp Temperature (celsius). + * @retval None. + */ +void OTP_Recy(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(temp > 0.0f); + /* If not under error state, just return without any operation. */ + if (otp->protLevel == PROT_LEVEL_0) { + motorErrStatus->all &= (~(1 >> protBit)); + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (otp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + /* If the temperature is less than threshold 3, level-3 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_3] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_3; + otp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the temperature is less than threshold 2, level-2 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_2] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_2; + otp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the temperature is less than threshold 1, level-1 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_1] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_1; + otp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the temperature is less than threshold 0, level-0 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_0] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_0; + otp->recyCnt = 0; + } + } + break; + + default: + break; + } + return; +} + +/** + * @brief Over temperature protection error status clear. + * @param otp Over temperature protection handle. + * @retval None. + */ +void OTP_Clear(OTP_Handle *otp) +{ + MCS_ASSERT_PARAM(otp != NULL); + /* Clear the history value. */ + otp->protCnt = 0; + otp->protLevel = PROT_LEVEL_0; + otp->recyCnt = 0; + otp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..2b9d99a76c19f53a78ccc1257287eccfd1fc972c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/protection/mcs_temp_prot.h @@ -0,0 +1,49 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_temp_prot.h + * @author MCU Algorithm Team + * @brief his file contains over temperature protection api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_TEMP_PROT_H +#define McuMagicTag_MCS_TEMP_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low current level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float ts; + float timer; + PROT_Level protLevel; +} OTP_Handle; + +void OTP_Init(OTP_Handle *otp, float ts); +void OTP_Det(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp); +void OTP_Exec(OTP_Handle *otp, float *spdRef, APT_RegStruct **aptAddr); +void OTP_Recy(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp); +void OTP_Clear(OTP_Handle *otp); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/readme.md b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/readme.md new file mode 100644 index 0000000000000000000000000000000000000000..98b2a068ddfaef196002273aaedc90123a0cd0de --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/readme.md @@ -0,0 +1,10 @@ +# pmsm_sensorless_2shunt_foc + +**【功能描述】** ++ 基于ECMCU105H/ECBMCU201MPC单板的单电机双电阻采样Foc应用 + +**【环境要求】** ++ 所有单板电源改制为演示用的12V低压,电机选用Gimbal GBM2804H-100T + +**【IDE配置方法】** ++ chipConfig中的Sample栏目里面选中pmsm sensorless 2shunt foc示例,然后点击生成代码即可 diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_carrier.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_carrier.c new file mode 100644 index 0000000000000000000000000000000000000000..9fc8afac32ecb5810db6758fb6acbca42a4c0f69 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_carrier.c @@ -0,0 +1,144 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_carrier.c + * @author MCU Algorithm Team + * @brief This file provides carrier interrupt application for motor control. + */ + +#include "mcs_carrier.h" +#include "mcs_math.h" +#include "typedefs.h" +#include "mcs_assert.h" +#include "mcs_user_config.h" +#include "mcs_ctlmode_config.h" + +/** + * @brief Synchronous rotation coordinate system angle. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_SyncCoorAngle(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + /* Synchronous rotation coordinate system angle. */ + switch (mtrCtrl->stateMachine) { + case FSM_STARTUP: + /* Current ramp angle is 0. */ + if (mtrCtrl->startup.stage == STARTUP_STAGE_CURR) { + mtrCtrl->axisAngle = 0; + } else if (mtrCtrl->startup.stage == STARTUP_STAGE_SPD) { /* IF control phase angle self-addition. */ + mtrCtrl->axisAngle = IF_CurrAngleCalc(&mtrCtrl->ifCtrl, mtrCtrl->spdRefHz); + } else if (mtrCtrl->startup.stage == STARTUP_STAGE_SWITCH) { /* Switch Angle */ + mtrCtrl->axisAngle = mtrCtrl->smo.elecAngle; + } + break; + + case FSM_RUN: + mtrCtrl->axisAngle = mtrCtrl->smo.elecAngle; + break; + + default: + mtrCtrl->axisAngle = 0; + break; + } +} + +/** + * @brief PWM waveform setting and sampling point setting for a single resistors and dual resistors. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_PwmAdcSet(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + SampleMode sampleMode = mtrCtrl->sampleMode; + /* Set the duty cycle according to the sampling mode. */ + if (sampleMode == DUAL_RESISTORS) { + SVPWM_Exec(&mtrCtrl->sv, &mtrCtrl->vabRef, &mtrCtrl->dutyUvw); + mtrCtrl->setPwmDutyCb(&mtrCtrl->dutyUvw, &mtrCtrl->dutyUvw); + } else if (sampleMode == SINGLE_RESISTOR) { + R1SVPWM_Exec(&mtrCtrl->r1Sv, &mtrCtrl->vabRef, &mtrCtrl->dutyUvwLeft, &mtrCtrl->dutyUvwRight); + mtrCtrl->setPwmDutyCb(&mtrCtrl->dutyUvwLeft, &mtrCtrl->dutyUvwRight); + /* The ADC sampling point position needs to be set based on the phase shift of a single resistors. */ + mtrCtrl->setADCTriggerTimeCb(mtrCtrl->r1Sv.samplePoint[0] * mtrCtrl->aptMaxcntCmp, \ + mtrCtrl->r1Sv.samplePoint[1] * mtrCtrl->aptMaxcntCmp); + } +} + +/** + * @brief Carrier interrupt function. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +void MCS_CarrierProcess(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UvwAxis *currUvw = &mtrCtrl->currUvw; + AlbeAxis *currAlbe = &mtrCtrl->iabFbk; + AlbeAxis *vab = &mtrCtrl->vabRef; + SampleMode sampleMode = mtrCtrl->sampleMode; + /* sample mode verify */ + if (sampleMode > SINGLE_RESISTOR || mtrCtrl->setADCTriggerTimeCb == NULL) { + return; + } + /* param verify */ + if (mtrCtrl->setPwmDutyCb == NULL || mtrCtrl->readCurrUvwCb == NULL) { + return; + } + /* Read the three-phase current value. */ + mtrCtrl->readCurrUvwCb(currUvw); + /* Clark Calc */ + ClarkeCalc(currUvw, currAlbe); + /* Smo observation */ + if (mtrCtrl->obserType == FOC_OBSERVERTYPE_SMO1TH) { + /* Smo observation */ + FOSMO_Exec(&mtrCtrl->smo, currAlbe, vab, mtrCtrl->spdRefHz); + } else if (mtrCtrl->obserType == FOC_OBSERVERTYPE_SMO4TH) { + /* Smo4th observation */ + SMO4TH_Exec(&mtrCtrl->smo4th, currAlbe, vab); + mtrCtrl->smo.spdEst = mtrCtrl->smo4th.spdEst; + mtrCtrl->smo.elecAngle = mtrCtrl->smo4th.elecAngle; + } + /* Synchronization angle */ + MCS_SyncCoorAngle(mtrCtrl); + + /* Park transformation */ + ParkCalc(currAlbe, mtrCtrl->axisAngle, &mtrCtrl->idqFbk); + + /* statemachine */ + switch (mtrCtrl->stateMachine) { + case FSM_STARTUP: + case FSM_RUN: + CURRCTRL_Exec(&mtrCtrl->currCtrl, &mtrCtrl->vdqRef, mtrCtrl->smo.spdEst, 0); + InvParkCalc(&mtrCtrl->vdqRef, mtrCtrl->axisAngle, vab); + MCS_PwmAdcSet(mtrCtrl); + break; + + case FSM_CAP_CHARGE: + case FSM_CLEAR: + case FSM_IDLE: + mtrCtrl->smo4th.spdEst = 0.0f; + break; + + default: + vab->alpha = 0.0f; + vab->beta = 0.0f; + MCS_PwmAdcSet(mtrCtrl); + break; + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_motor_process.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_motor_process.c new file mode 100644 index 0000000000000000000000000000000000000000..feac3798ba91e651b736b4d0ff2eeb56f35c1c90 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/src/mcs_motor_process.c @@ -0,0 +1,986 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_process.c + * @author MCU Algorithm Team + * @brief This file provides motor application. + * @details Single FOC application based on the ECMCU105H/ECBMCU201MPC board + * 1) Motor model is Gimbal GBM2804H-100T. + * 2) Select the pmsm sensorless 2shunt foc example in the sample column + of chipConfig and click Generate Code. + * 3) It's power supply must be changed to 12V. + */ +#include "main.h" +#include "mcs_user_config.h" +#include "mcs_math.h" +#include "hmi_module.h" +#include "mcs_ctlmode_config.h" +#include "mcs_prot_user.h" +#include "mcs_prot_user_config.h" +#include "mcs_math_const.h" +#include "mcs_motor_process.h" +#include "mcs_chip_config.h" +#include + + +/*------------------------------- Macro Definition -----------------------------------------------*/ +#define US_PER_MS 1000 +#define ANGLE_RANGE_ABS 65536 +#define ANGLE_360_F 65536.0f /* 0 - 65536 indicates 0 to 360. */ +#define APT_FULL_DUTY 1.0f +#define TEMP_3 3.0f +#define TEMP_15 15.0f +#define TEMP_30 30.0f +#define TEMP_45 45.0f +#define TEMP_60 60.0f +#define TEMP_RES_15 78.327f +#define TEMP_RES_30 36.776f +#define TEMP_RES_45 18.301f +#define TEMP_RES_60 9.607f +#define CNT_10 10 +#define CNT_5000 5000 +#define LEVEL_4 4 +#define MOTOR_START_DELAY 2 +#define ADC_READINIT_DELAY 1 +#define ADC_READINIT_TIMES 20 +#define ADC_TRIMVALUE_MIN 1800.0f +#define ADC_TRIMVALUE_MAX 2200.0f +/*------------------------------- Param Definition -----------------------------------------------*/ +/* Motor parameters. */ +/* Np, Rs, Ld, Lq, Psif, J, Nmax, Currmax, PPMR, zShift */ +static MOTOR_Param g_motorParam = MOTORPARAM_DEFAULTS; +static APT_RegStruct* g_apt[PHASE_MAX_NUM] = {APT_U, APT_V, APT_W}; +/* Motor control handle */ +static MTRCTRL_Handle g_mc = {0}; + +/* Motor speed loop PI param. */ +static void SPDCTRL_InitWrapper(SPDCTRL_Handle *spdHandle, float ts) +{ + /* Speed loop param assignment. */ + PI_Param spdPi = { + .kp = SPD_KP, + .ki = SPD_KI, + .lowerLim = SPD_LOWERLIM, + .upperLim = SPD_UPPERLIM, + }; + /* Speed loop param init. */ + SPDCTRL_Init(spdHandle, &g_motorParam, spdPi, ts); +} + +/* Motor current Loop PI param. */ +static void CURRCTRL_InitWrapper(CURRCTRL_Handle *currHandle, DqAxis *idqRef, DqAxis *idqFbk, float ts) +{ + /* Axis-D current loop param assignment. */ + PI_Param dCurrPi = { + .kp = CURRDAXIS_KP, + .ki = CURRDAXIS_KI, + .lowerLim = CURR_LOWERLIM, + .upperLim = CURR_UPPERLIM, + }; + /* Axis-Q current loop param assignment. */ + PI_Param qCurrPi = { + .kp = CURRQAXIS_KP, + .ki = CURRQAXIS_KI, + .lowerLim = CURR_LOWERLIM, + .upperLim = CURR_UPPERLIM, + }; + /* Current loop param init. */ + CURRCTRL_Init(currHandle, &g_motorParam, idqRef, idqFbk, dCurrPi, qCurrPi, ts); +} + +/* First order smo param. */ +static void FOSMO_InitWrapper(FOSMO_Handle *fosmo, float ts) +{ + /* Smo param assignment. */ + FOSMO_Param fosmoParam = { + .gain = FOSMO_GAIN, + .lambda = FOSMO_LAMBDA, + .fcEmf = FOSMO_EMF_CUTOFF_FREQ, + .fcLpf = SPEED_FILTER_CUTOFF_FREQUENCY, + .pllBdw = FOSMO_PLL_BDW, + }; + /* Init smo param. */ + FOSMO_Init(fosmo, fosmoParam, g_motorParam, ts); +} + +/* Smo4th param. */ +static void SMO4TH_InitWrapper(SMO4TH_Handle *smo4TH) +{ + /* Smo4th param assignment. */ + SMO4TH_Param smo4thParam = { + .kd = SMO4TH_KD, + .kq = SMO4TH_KQ, + .pllBdw = SMO4TH_PLL_BDW, + .fcLpf = SMO4TH_SPD_FILTER_CUTOFF_FREQ, + }; + /* Init smo param. */ + SMO4TH_Init(smo4TH, smo4thParam, g_motorParam, CTRL_CURR_PERIOD); +} + +/*------------------------------- Function Definition -----------------------------------------------*/ +/** + * @brief Initialzer of system tick. + * @param mtrCtrl Motor control struct handle. + * @retval None. + */ +static void TimerTickInit(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + mtrCtrl->sysTickCnt = 0; + mtrCtrl->msTickNum = US_PER_MS / SYSTICK_PERIOD_US; + mtrCtrl->capChargeTickNum = (INV_CAP_CHARGE_MS * US_PER_MS / SYSTICK_PERIOD_US); +} + +/** + * @brief Init motor control task. + * @retval None. + */ +static void TSK_Init(void) +{ + g_mc.motorStateFlag = 0; + g_mc.uartHeartDetCnt = 0; + g_mc.uartTimeStamp = 0; + g_mc.stateMachine = FSM_IDLE; + g_mc.currCtrlPeriod = CTRL_CURR_PERIOD; /* Init current controller */ + g_mc.aptMaxcntCmp = g_apt0.waveform.timerPeriod; + g_mc.sampleMode = DUAL_RESISTORS; + g_mc.obserType = FOC_OBSERVERTYPE_SMO4TH; /* Init foc observe mode */ + g_mc.controlMode = FOC_CONTROLMODE_SPEED; /* Init motor control mode */ + g_mc.adcCurrCofe = ADC_CURR_COFFI; + g_mc.spdAdjustMode = CUST_SPEED_ADJUST; + g_mc.uartConnectFlag = DISCONNECT; + g_mc.spdCmdHz = USER_MIN_SPD_HZ; /* Motor initialization speed */ + + g_mc.adc0Compensate = ADC0COMPENSATE; /* Phase-u current init adc shift trim value */ + g_mc.adc1Compensate = ADC1COMPENSATE; /* Phase-w current init adc shift trim value */ + + IF_Init(&g_mc.ifCtrl, CTRL_IF_CURR_AMP_A, USER_CURR_SLOPE, CTRL_SYSTICK_PERIOD, CTRL_CURR_PERIOD); + RMG_Init(&g_mc.spdRmg, CTRL_SYSTICK_PERIOD, USER_SPD_SLOPE); /* Init speed slope */ + MtrParamInit(&g_mc.mtrParam, g_motorParam); + + TimerTickInit(&g_mc); + SVPWM_Init(&g_mc.sv, INV_VOLTAGE_BUS * ONE_DIV_SQRT3); + R1SVPWM_Init(&g_mc.r1Sv, INV_VOLTAGE_BUS * ONE_DIV_SQRT3, SAMPLE_POINT_SHIFT, SAMPLE_WINDOW_DUTY); + + SPDCTRL_InitWrapper(&g_mc.spdCtrl, CTRL_SYSTICK_PERIOD); + CURRCTRL_InitWrapper(&g_mc.currCtrl, &g_mc.idqRef, &g_mc.idqFbk, CTRL_CURR_PERIOD); + FOSMO_InitWrapper(&g_mc.smo, CTRL_CURR_PERIOD); + SMO4TH_InitWrapper(&g_mc.smo4th); + + STARTUP_Init(&g_mc.startup, USER_SWITCH_SPDBEGIN_HZ, USER_SWITCH_SPDBEGIN_HZ + TEMP_3); + + MotorProt_Init(&g_mc.prot); /* Init protect state comond */ + OCP_Init(&g_mc.prot.ocp, CTRL_CURR_PERIOD); + OVP_Init(&g_mc.prot.ovp, CTRL_SYSTICK_PERIOD); + LVP_Init(&g_mc.prot.lvp, CTRL_SYSTICK_PERIOD); + OTP_Init(&g_mc.prot.otp, CTRL_SYSTICK_PERIOD); + STP_Init(&g_mc.prot.stall, CTRL_SYSTICK_PERIOD, PROT_STALLING_CURR_AMP_LIMIT, + PROT_STALLING_SPD_LIMIT, PROT_STALLING_TIME_LIMIT); +} + +/** + * @brief Clear historical values of all controller before start-up. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void ClearBeforeStartup(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + /* The initial angle is 0. */ + mtrCtrl->axisAngle = 0; + + mtrCtrl->spdRefHz = 0.0f; + /* The initial dq-axis reference current is 0. */ + mtrCtrl->idqRef.d = 0.0f; + mtrCtrl->idqRef.q = 0.0f; + + mtrCtrl->vdqRef.d = 0.0f; + mtrCtrl->vdqRef.q = 0.0f; + /* Clear Duty Cycle Value. The initial duty cycle is 0.5. */ + mtrCtrl->dutyUvwLeft.u = 0.5f; + mtrCtrl->dutyUvwLeft.v = 0.5f; + mtrCtrl->dutyUvwLeft.w = 0.5f; + mtrCtrl->dutyUvwRight.u = 0.5f; + mtrCtrl->dutyUvwRight.v = 0.5f; + mtrCtrl->dutyUvwRight.w = 0.5f; + + mtrCtrl->prot.motorErrStatus.all = 0x00; + + RMG_Clear(&mtrCtrl->spdRmg); /* Clear the history value of speed slope control */ + CURRCTRL_Clear(&mtrCtrl->currCtrl); + IF_Clear(&mtrCtrl->ifCtrl); + SPDCTRL_Clear(&mtrCtrl->spdCtrl); + FOSMO_Clear(&mtrCtrl->smo); + SMO4TH_Clear(&mtrCtrl->smo4th); + STARTUP_Clear(&mtrCtrl->startup); + R1SVPWM_Clear(&mtrCtrl->r1Sv); + + OTP_Clear(&mtrCtrl->prot.otp); + OCP_Clear(&mtrCtrl->prot.ocp); + OVP_Clear(&mtrCtrl->prot.ovp); + LVP_Clear(&mtrCtrl->prot.lvp); +} + +/** + * @brief To set the comparison value of the IGBT single-resistance ADC sampling trigger position. + * @param aptx The APT register struct handle. + * @param cntCmpA A Count compare reference of time-base counter. + * @param cntCmpB B Count compare reference of time-base counter. + * @param maxCntCmp Maximum Comparison Value + * @retval None. + */ +static void MCS_SetAdcCompareR1(APT_RegStruct *aptx, unsigned short cntCmpA, + unsigned short cntCmpB, unsigned short maxCntCmp) +{ + unsigned short tmp; + /* Sets the A Count compare reference of time-base counter. */ + tmp = (unsigned short)Clamp((float)(cntCmpA), (float)(maxCntCmp - 1), 1.0f); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_A, tmp); + /* Sets the B Count compare reference of time-base counter. */ + tmp = (unsigned short)Clamp((float)(cntCmpB), (float)(maxCntCmp - 1), 1.0f); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_B, tmp); +} + +/** + * @brief Open the three-phase lower pipe. + * @param aptAddr Three-phase APT address pointer. + * @param maxDutyCnt Max duty count. + * @retval None. + */ +static void AptTurnOnLowSidePwm(APT_RegStruct **aptAddr, unsigned short maxDutyCnt) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + MCS_ASSERT_PARAM(maxDutyCnt != 0); + unsigned short dutyCnt; + dutyCnt = (unsigned short)(maxDutyCnt * APT_FULL_DUTY); + /* Open the three-phase lower pipe */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_C, dutyCnt); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_D, dutyCnt); + } +} + +/** + * @brief Enable three-phase pwm output. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void MotorPwmOutputEnable(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /* Enable three-phase pwm output */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + aptx->PG_OUT_FRC.BIT.rg_pga_frc_en = BASE_CFG_UNSET; + aptx->PG_OUT_FRC.BIT.rg_pgb_frc_en = BASE_CFG_UNSET; + } +} + +/** + * @brief Disable three-phase pwm output. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void MotorPwmOutputDisable(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /* Disable three-phase pwm output. */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + aptx->PG_OUT_FRC.BIT.rg_pga_frc_en = BASE_CFG_SET; + aptx->PG_OUT_FRC.BIT.rg_pgb_frc_en = BASE_CFG_SET; + DCL_APT_ForcePWMOutputLow(aptx); + } +} + +/** + * @brief Smo IF angle difference calculation. + * @param smoElecAngle Smo electrical angle. + * @param ifCtrlAngle IF control angle. + * @retval signed short angle difference. + */ +static float SmoIfAngleDiffCalc(float smoElecAngle, float ifCtrlAngle) +{ + float diff = AngleSub(smoElecAngle, ifCtrlAngle); + /* Smo IF angle difference calculation */ + return diff; +} + +/** + * @brief Construct a new mcs startupswitch object. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_StartupSwitch(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + STARTUP_Handle *startup = &mtrCtrl->startup; + DqAxis *idqRef = &mtrCtrl->idqRef; + float iftargetAmp = mtrCtrl->ifCtrl.targetAmp; + float spdRefHz = mtrCtrl->spdRefHz; + + switch (startup->stage) { + case STARTUP_STAGE_CURR: + if (mtrCtrl->ifCtrl.curAmp >= iftargetAmp) { + /* Stage change */ + idqRef->q = iftargetAmp; + startup->stage = STARTUP_STAGE_SPD; + } else { + /* current amplitude increase */ + idqRef->q = IF_CurrAmpCalc(&mtrCtrl->ifCtrl); + spdRefHz = 0.0f; + } + break; + case STARTUP_STAGE_SPD: + /* current frequency increase */ + if (Abs(spdRefHz) >= startup->spdBegin) { + /* Stage change */ + startup->stage = STARTUP_STAGE_SWITCH; + TrigVal localTrigVal; + TrigCalc(&localTrigVal, SmoIfAngleDiffCalc(mtrCtrl->smo.elecAngle, mtrCtrl->ifCtrl.angle)); + idqRef->d = 0.0f; + mtrCtrl->spdCtrl.spdPi.integral = iftargetAmp * localTrigVal.cos; + } else { + /* Speed rmg */ + spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + } + break; + + case STARTUP_STAGE_SWITCH: + /* Switch from IF to SMO */ + spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + idqRef->q = SPDCTRL_Exec(&mtrCtrl->spdCtrl, mtrCtrl->spdRefHz, mtrCtrl->smo.spdEst); + /* Transitional stage, if current reference speed > critical speed, change to next stage */ + if (spdRefHz >= startup->spdBegin + TEMP_3) { + /* Stage change */ + mtrCtrl->stateMachine = FSM_RUN; + } + break; + + default: + break; + } + mtrCtrl->spdRefHz = spdRefHz; +} + +/** + * @brief Pre-processing of motor status. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void MotorStatePerProc(SysStatusReg *statusReg, volatile FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* Get system status */ + if (SysIsError(statusReg)) { + *stateMachine = FSM_FAULT; + } + if (SysGetCmdStop(statusReg)) { + SysCmdStopClr(statusReg); + *stateMachine = FSM_STOP; + } +} + +/** + * @brief Check over current status. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckOverCurrentState(SysStatusReg *statusReg, FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* check systerm error status */ + if (SysIsError(statusReg) == false) { + *stateMachine = FSM_IDLE; + } +} + +/** + * @brief Check bootstrap capacitor charge time. + * @param mtrCtrl The motor control handle. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckBootstrpCapChargeTime(MTRCTRL_Handle *mtrCtrl, FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + mtrCtrl->sysTickCnt++; + /* check bootstrap capacitor charge time */ + if (mtrCtrl->sysTickCnt == mtrCtrl->capChargeTickNum) { + *stateMachine = FSM_CLEAR; + } +} + +/** + * @brief Check systerm cmd start signal. + * @param mtrCtrl The motor control handle. + * @param aptAddr Three-phase APT address pointer. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckSysCmdStart(MTRCTRL_Handle *mtrCtrl, + APT_RegStruct **aptAddr, + SysStatusReg *statusReg, + FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* check start cmd */ + if (SysGetCmdStart(statusReg)) { + SysRunningSet(statusReg); + SysCmdStartClr(statusReg); + mtrCtrl->sysTickCnt = 0; + *stateMachine = FSM_CAP_CHARGE; + /* Preparation for charging the bootstrap capacitor. */ + AptTurnOnLowSidePwm(aptAddr, mtrCtrl->aptMaxcntCmp); + /* Out put pwm */ + MotorPwmOutputEnable(aptAddr); + } +} + +/** + * @brief System timer tick task. + * @param mtrCtrl The motor control handle. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void TSK_SystickIsr(MTRCTRL_Handle *mtrCtrl, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + SysStatusReg *statusReg = &mtrCtrl->statusReg; + FsmState *stateMachine = &mtrCtrl->stateMachine; + mtrCtrl->msTickCnt++; + /* Pre-processing of motor status. */ + MotorStatePerProc(statusReg, stateMachine); + /* statemachine */ + switch (*stateMachine) { + case FSM_IDLE: + /* Set smo estimate speed before motor start-up */ + g_mc.smo.spdEst = 0.0f; + CheckSysCmdStart(mtrCtrl, aptAddr, statusReg, stateMachine); + break; + case FSM_CAP_CHARGE: + /* Bootstrap Capacitor Charging Timing */ + CheckBootstrpCapChargeTime(mtrCtrl, stateMachine); + break; + /* Clear parameter before start */ + case FSM_CLEAR: + ClearBeforeStartup(mtrCtrl); + *stateMachine = FSM_STARTUP; + break; + case FSM_STARTUP: + MCS_StartupSwitch(mtrCtrl); + break; + case FSM_RUN: + /* Speed ramp control */ + mtrCtrl->spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + /* Speed loop control */ + mtrCtrl->idqRef.q = SPDCTRL_Exec(&mtrCtrl->spdCtrl, mtrCtrl->spdRefHz, mtrCtrl->smo.spdEst); + break; + case FSM_STOP: + mtrCtrl->spdRefHz = 0.0f; + MotorPwmOutputDisable(aptAddr); + SysRunningClr(statusReg); + *stateMachine = FSM_IDLE; + break; + case FSM_FAULT: /* Overcurrent state */ + CheckOverCurrentState(statusReg, stateMachine); + break; + default: + break; + } +} + +/** + * @brief Read the ADC initialize bias trim value. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void TrimInitAdcShiftValue(MTRCTRL_Handle *mtrCtrl) +{ + float adc0SampleTemp = 0.0f; /* Current bias value for temp store */ + float adc1SampleTemp = 0.0f; + float adc0TempSum = 0.0f; + float adc1TempSum = 0.0f; /* Current bias sum value for 20 times */ + float adcSampleTimes = 0.0f; /* ADC sample times */ + for (int i = 0; i < ADC_READINIT_TIMES; i++) { + adc0SampleTemp = (float)HAL_ADC_GetConvResult(&ADCU_HANDLE, ADCUSOCNUM); + adc1SampleTemp = (float)HAL_ADC_GetConvResult(&ADCW_HANDLE, ADCWSOCNUM); + BASE_FUNC_DELAY_US(200); /* 200 is delay count, delay 200us triger adc sampling */ + if (adc0SampleTemp > 1000.0f && adc1SampleTemp > 1000.0f) { + adcSampleTimes++; + adc0TempSum += adc0SampleTemp; + adc1TempSum += adc1SampleTemp; + } + } + adc0SampleTemp = adc0TempSum / adcSampleTimes; + adc1SampleTemp = adc1TempSum / adcSampleTimes; + /* Force convert to float */ + mtrCtrl->adc0Compensate = (float) adc0SampleTemp; + mtrCtrl->adc1Compensate = (float) adc1SampleTemp; + /* The normal value scope: 1800 < adc0Compensate < 2200 */ + if(g_mc.adc0Compensate < ADC_TRIMVALUE_MIN || g_mc.adc0Compensate > ADC_TRIMVALUE_MAX \ + || g_mc.adc1Compensate < ADC_TRIMVALUE_MIN || g_mc.adc1Compensate > ADC_TRIMVALUE_MAX) { + DBG_PRINTF("ADC trim value error,please reset!"); + HAL_GPIO_SetValue(&LED2_HANDLE, LED2_PIN, GPIO_LOW_LEVEL); + } + adcSampleTimes = 0; + adc0TempSum = 0; + adc1TempSum = 0; +} + +/** + * @brief Read the ADC current sampling value. + * @param CurrUvw Three-phase current. + * @retval None. + */ +static void ReadCurrUvw(UvwAxis *CurrUvw) +{ + MCS_ASSERT_PARAM(CurrUvw != NULL); + float adc0 = (float)HAL_ADC_GetConvResult(&ADCU_HANDLE, ADCUSOCNUM); + float adc1 = (float)HAL_ADC_GetConvResult(&ADCW_HANDLE, ADCWSOCNUM); + /* Convert adc sample value to current value */ + CurrUvw->u = -(adc0 - g_mc.adc0Compensate) * g_mc.adcCurrCofe; + CurrUvw->w = -(adc1 - g_mc.adc1Compensate) * g_mc.adcCurrCofe; + CurrUvw->v = -CurrUvw->u - CurrUvw->w; +} + +/** + * @brief Setting the APT Output Duty Cycle. + * @param aptx APT register base address. + * @param leftDuty Left duty cycle. + * @param rightDuty Right duty cycle. + * @retval None. + */ +static void SetPwmDuty(APT_Handle *aptx, float leftDuty, float rightDuty) +{ + MCS_ASSERT_PARAM(aptx != NULL); + MCS_ASSERT_PARAM(leftDuty > 0); + MCS_ASSERT_PARAM(rightDuty > 0); + unsigned short maxPeriodCnt = aptx->waveform.timerPeriod; + unsigned short cntCmpLeftEdge = (unsigned short)(leftDuty * maxPeriodCnt); + unsigned short cntCmpRightEdge = (unsigned short)(rightDuty * maxPeriodCnt); + /* avoid overflowing */ + cntCmpLeftEdge = (cntCmpLeftEdge > maxPeriodCnt) ? maxPeriodCnt : cntCmpLeftEdge; + cntCmpRightEdge = (cntCmpRightEdge > maxPeriodCnt) ? maxPeriodCnt : cntCmpRightEdge; + HAL_APT_SetPWMDuty(aptx, cntCmpLeftEdge, cntCmpRightEdge); +} + +/** + * @brief Duty Cycle Setting. + * @param dutyUvwLeft Three-phase left duty cycle. + * @param dutyUvwRight Three-phase right duty cycle. + * @retval None. + */ +static void SetPwmDutyCp(UvwAxis *dutyUvwLeft, UvwAxis *dutyUvwRight) +{ + MCS_ASSERT_PARAM(dutyUvwLeft != NULL); + MCS_ASSERT_PARAM(dutyUvwRight != NULL); + /* Setting the Three-Phase Duty Cycle */ + SetPwmDuty(&g_apt0, dutyUvwLeft->u, dutyUvwRight->u); + SetPwmDuty(&g_apt1, dutyUvwLeft->v, dutyUvwRight->v); + SetPwmDuty(&g_apt2, dutyUvwLeft->w, dutyUvwRight->w); +} + +/** + * @brief To set the ADC sampling trigger comparison value. + * @param cntCmpSOCA Soca Compare Count Value. + * @param cntCmpSOCB Socb Compare Count Value. + * @retval None. + */ +static void SetADCTriggerTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB) +{ + MCS_SetAdcCompareR1(g_apt[PHASE_U], cntCmpSOCA, cntCmpSOCB, g_mc.aptMaxcntCmp); +} + +/** + * @brief Temprature table, the temprature detect range is 15 ~ 60 degree. + * @param tempResisValue Temperature sensor resistance. + * @retval None. + */ +static float TempTable(float tempResisValue) +{ + float boardTemp; + /* Temperatures between 15 and 30. */ + if (tempResisValue > TEMP_RES_30 && tempResisValue <= TEMP_RES_15) { + boardTemp = TEMP_15 + (TEMP_30 - TEMP_15) * (TEMP_RES_15 - tempResisValue) / (TEMP_RES_15 - TEMP_RES_30); + } else if (tempResisValue > TEMP_RES_45 && tempResisValue <= TEMP_RES_30) { /* Temperature between 30 and 45. */ + boardTemp = TEMP_30 + (TEMP_45 - TEMP_30) * (TEMP_RES_30 - tempResisValue) / (TEMP_RES_30 - TEMP_RES_45); + } else if (tempResisValue > TEMP_RES_60 && tempResisValue <= TEMP_RES_45) { /* Temperature between 45 and 50. */ + boardTemp = TEMP_45 + (TEMP_60 - TEMP_45) * (TEMP_RES_45 - tempResisValue) / (TEMP_RES_45 - TEMP_RES_60); + } else if (tempResisValue <= TEMP_RES_60) { + boardTemp = TEMP_60; /* If temperature is over 60, set temperature as 60. */ + } else if (tempResisValue >= TEMP_RES_15) { + boardTemp = TEMP_15; /* If temperature is lower 15, set temperature as 15. */ + } + return boardTemp; +} + +/** + * @brief Read power board temperature and udc. + * @retval None. + */ +static void ReadBoardTempAndUdc(void) +{ + HAL_ADC_SoftTrigSample(&ADCRESIS_HANDLE, ADCRESISSOCNUM); + HAL_ADC_SoftTrigSample(&ADCUDC_HANDLE, ADCUDCSOCNUM); + BASE_FUNC_DELAY_US(CNT_10); /* Delay 10 us. */ + /* Force convert to float type. */ + float resisAdcValue = (float)HAL_ADC_GetConvResult(&ADCRESIS_HANDLE, ADCRESISSOCNUM); + /* 10 / (x + 10) * 3.3 = resisAdcValue / 4096 * 3.3, x is resisValue, 10kohm is resistor divider value. */ + float resisValue = (4096.0f * 10.0f - 10.0f * resisAdcValue) / resisAdcValue; + g_mc.powerBoardTemp = TempTable(resisValue); + g_mc.udc = ((float)HAL_ADC_GetConvResult(&ADCUDC_HANDLE, ADCUDCSOCNUM)) * ADC_UDC_COFFI; +} + +/** + * @brief Execut abnormal feedback speed protect motion. + * @retval None. + */ +static void SpdFbkErrorProt_Exec(void) +{ + if (g_mc.prot.motorErrStatus.Bit.motorStalling == 0 && + g_mc.prot.motorErrStatus.Bit.overVoltErr == 0 && + g_mc.prot.motorErrStatus.Bit.lowerVoltErr == 0 && + g_mc.prot.motorErrStatus.Bit.overIpmTempErr == 0 && + g_mc.prot.motorErrStatus.Bit.overCurrErr == 0) { + g_mc.prot.motorErrStatus.Bit.revRotErr = 1; + /* If revRotErr, execute protect motion. */ + ProtSpo_Exec(g_apt); + } +} + +/** + * @brief Execut nan data protect motion. + * @retval None. + */ +static void NanDataDetect(void) +{ + static short errorSpdStatus = 0; + /* Detect the nan observer speed or current value. */ + if (isnan(g_mc.smo.spdEst) || isnan(g_mc.idqRef.q)) { + errorSpdStatus++; + } else { + errorSpdStatus = 0; + } + /* If the data is nan & continuous counting value is over 500 times, execute protect motion. + the detect time is 500 * 500us = 250ms. */ + if (errorSpdStatus >= 500) { + errorSpdStatus = 0; + SpdFbkErrorProt_Exec(); + } +} + +/** + * @brief Check abnormal feedback speed. + * @retval None. + */ +static void CheckSpdFbkStatus(void) +{ + static short errorCurrStatus = 0; + static short errorDeltaSpdStatus = 0; + NanDataDetect(); + if (g_mc.stateMachine == FSM_RUN) { + /* Detect the abnormal idq feedback current. */ + if (Abs(g_mc.idqRef.q - g_mc.idqFbk.q) >= CTRL_IF_CURR_AMP_A) { + errorCurrStatus++; + } else { + errorCurrStatus = 0; + } + /* Detect the abnormal feedback speed, the normal speed is > 0, if smo.spdEst < -10 && + delta speed error > USER_MIN_SPD_HZ + 10.0f at FSM_RUN stage, set the motor motion as error */ + if (g_mc.smo.spdEst < -10.0f && (g_mc.spdRefHz - g_mc.smo.spdEst > USER_MIN_SPD_HZ + 10.0f)) { + errorDeltaSpdStatus++; + } + } + /* Execute protect motion if count over 500 times, this error status caused by abnormal speed + or cabnormal urrent feedback, the detect time is 500 * 500us = 250ms. */ + if (errorCurrStatus >= 500) { + errorCurrStatus = 0; + SpdFbkErrorProt_Exec(); + } + /* This error statu caused by motor stalling, the detect time is 2 * 500us = 1ms. */ + if (errorDeltaSpdStatus >= 2) { + errorDeltaSpdStatus = 0; + g_mc.prot.motorErrStatus.Bit.motorStalling = 1; + } +} + +/** + * @brief Check Potentiometer Value callback function. + * @param param The TIMER_Handle. + * @retval None. + */ +void CheckPotentiometerValueCallback(void *param) +{ + MCS_ASSERT_PARAM(param != NULL); + BASE_FUNC_UNUSED(param); + static float potentiomitorAdcValue = 0.0f; + static float spdCmdHz = 0; + static float spdCmdHzLast = USER_MIN_SPD_HZ; /* 35.0 is spdCmdHzLast init value */ + HAL_ADC_SoftTrigSample(&ADCPTT_HANDLE, ADCPTTSOCNUM); + BASE_FUNC_DELAY_US(10); /* Delay 10 us. */ + potentiomitorAdcValue = (float)HAL_ADC_GetConvResult(&ADCPTT_HANDLE, ADCPTTSOCNUM); + /* 4045.0 is adc sample max value of potentiomitor, convert max spd to 180.25Hz */ + spdCmdHz = potentiomitorAdcValue / 4045.0f * USER_MAX_SPD_HZ; + if (Abs(spdCmdHzLast - spdCmdHz) < 1.0f) { /* Ignore changes less than 1. */ + return; + } + spdCmdHzLast = spdCmdHz; + if (spdCmdHz < USER_MIN_SPD_HZ) { /* 35.0 is spdCmdHz lower limit */ + spdCmdHz = USER_MIN_SPD_HZ; /* 35.0 is spdCmdHz lower limit */ + } + if (spdCmdHz > g_mc.mtrParam.maxElecSpd) { /* spdCmdHz upper limit */ + spdCmdHz = g_mc.mtrParam.maxElecSpd; /* spdCmdHz upper limit */ + } + if (g_mc.spdAdjustMode == CUST_SPEED_ADJUST) { + g_mc.spdCmdHz = spdCmdHz; + } +} + +/** + * @brief System timer ISR for Motor Statemachine CallBack function. + * @param param The systick timer handle. + * @retval None. + */ +void MotorStatemachineCallBack(void *param) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(param != NULL); + BASE_FUNC_UNUSED(param); + /* Read power board temprature and voltage. */ + ReadBoardTempAndUdc(); + /* Motor speed loop state machine. */ + TSK_SystickIsr(&g_mc, g_apt); + + /* Motor error speed feedback check. */ + CheckSpdFbkStatus(); + /* Motor stalling detect. */ + STP_Det_ByCurrSpd(&g_mc.prot.stall, &g_mc.prot.motorErrStatus, g_mc.smo.spdEst, g_mc.idqFbk); + STP_Exec(&g_mc.prot.motorErrStatus, g_apt); + + /* Motor over voltage detect. */ + OVP_Det(&g_mc.prot.ovp, &g_mc.prot.motorErrStatus, g_mc.udc); + OVP_Exec(&g_mc.prot.ovp, &g_mc.spdRefHz, g_apt); + OVP_Recy(&g_mc.prot.ovp, &g_mc.prot.motorErrStatus, g_mc.udc); + /* Motor lower voltage detect. */ + LVP_Det(&g_mc.prot.lvp, &g_mc.prot.motorErrStatus, g_mc.udc); + LVP_Exec(&g_mc.prot.lvp, &g_mc.spdRefHz, g_apt); + LVP_Recy(&g_mc.prot.lvp, &g_mc.prot.motorErrStatus, g_mc.udc); + /* Power board over temperature detect. */ + OTP_Det(&g_mc.prot.otp, &g_mc.prot.motorErrStatus, OTP_IPM_ERR_BIT, g_mc.powerBoardTemp); + OTP_Exec(&g_mc.prot.otp, &g_mc.spdRefHz, g_apt); + OTP_Recy(&g_mc.prot.otp, &g_mc.prot.motorErrStatus, OTP_IPM_ERR_BIT, g_mc.powerBoardTemp); + + /* If protect level == 4, set motor state as stop. */ + if (g_mc.prot.ovp.protLevel == LEVEL_4 || g_mc.prot.lvp.protLevel == LEVEL_4 \ + || g_mc.prot.otp.protLevel == LEVEL_4) { + SysCmdStopSet(&g_mc.statusReg); + } +} + +/** + * @brief The carrier ISR wrapper function. + * @param aptHandle The APT handle. + * @retval None. + */ +void MotorCarrierProcessCallback(void *aptHandle) +{ + MCS_ASSERT_PARAM(aptHandle != NULL); + BASE_FUNC_UNUSED(aptHandle); + /* the carrierprocess of motor */ + MCS_CarrierProcess(&g_mc); + /* Over current protect */ + if (g_mc.stateMachine == FSM_RUN || g_mc.stateMachine == FSM_STARTUP) { + OCP_Det(&g_mc.prot.ocp, &g_mc.prot.motorErrStatus, g_mc.idqFbk); + OCP_Exec(&g_mc.prot.ocp, &g_mc.idqFbk, g_apt); /* Execute over current protect motion */ + if (g_mc.prot.ocp.protLevel < LEVEL_4) { + OCP_Recy(&g_mc.prot.ocp, &g_mc.prot.motorErrStatus); + } + } +} + +/** + * @brief Event interrupt callback function of APT module. + * @param para APT module handle. + * @retval None. + */ +void MotorSysErrCallback(void *para) +{ + MCS_ASSERT_PARAM(para != NULL); + APT_Handle *handle = (APT_Handle *)para; + /* The IPM overcurrent triggers and disables the three-phase PWM output. */ + MotorPwmOutputDisable(g_apt); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_U], APT_OC_COMBINE_EVENT_A1); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_V], APT_OC_COMBINE_EVENT_A1); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_W], APT_OC_COMBINE_EVENT_A1); + /* Status setting error */ + SysErrorSet(&g_mc.statusReg); + DBG_PRINTF("APT error! \r\n"); + HAL_GPIO_SetValue(&LED2_HANDLE, LED2_PIN, GPIO_LOW_LEVEL); + BASE_FUNC_UNUSED(handle); +} + +/** + * @brief Init motor controller's data structure. + * @retval None. + */ +static void InitSoftware(void) +{ + /* Initializing motor control param */ + TSK_Init(); + /* Read phase-uvw current */ + g_mc.readCurrUvwCb = ReadCurrUvw; + g_mc.setPwmDutyCb = SetPwmDutyCp; + g_mc.setADCTriggerTimeCb = SetADCTriggerTime; +} + +/** + * @brief Config the master APT. + * @param aptx The master APT handle. + * @retval None. + */ +static void AptMasterSet(APT_Handle *aptx) +{ + MCS_ASSERT_PARAM(aptx != NULL); + /* Config the master APT. */ + HAL_APT_MasterSyncInit(aptx, APT_SYNC_OUT_ON_CNTR_ZERO); +} + +/** + * @brief Config the slave APT. + * @param aptx The slave APT handle. + * @retval None. + */ +static void AptSalveSet(APT_Handle *aptx) +{ + MCS_ASSERT_PARAM(aptx != NULL); + APT_SlaveSyncIn slave; + /* Config the slave APT. */ + slave.divPhase = 0; + slave.cntPhase = 0; + slave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + slave.syncInSrc = APT_SYNC_IN_SRC; + slave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(aptx, &slave); +} +/** + * @brief Configuring Master and Slave APTs. + * @retval None. + */ +static void AptMasterSalveSet(void) +{ + /* motor APT master/slave synchronization */ + AptMasterSet(&g_apt0); + AptSalveSet(&g_apt1); + AptSalveSet(&g_apt2); +} + +/** + * @brief Config the KEY func. + * @param handle The GPIO handle. + * @retval None. + */ +static KEY_State Key_StateRead(GPIO_Handle *handle) +{ + if (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + BASE_FUNC_DELAY_MS(30); /* delay 30ms for deshake */ + if (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + while (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + } + return KEY_DOWN; + } + } + return KEY_UP; +} + +/** + * @brief Control motor start and stop state by key func. + * @param param The GPIO handle. + * @retval None. + */ +void MotorStartStopKeyCallback(void *param) +{ + GPIO_Handle *handle = (GPIO_Handle *)param; + if (Key_StateRead(handle) == KEY_DOWN) { + if (g_mc.motorStateFlag == 0) { /* start motor */ + g_mc.motorStateFlag = 1; + SysCmdStartSet(&g_mc.statusReg); + } else if (g_mc.motorStateFlag == 1) { /* stop motor */ + g_mc.motorStateFlag = 0; + SysCmdStopSet(&g_mc.statusReg); + } + } +} + +/** + * @brief User application main entry function. + * @retval BSP_OK. + */ +int MotorMainProcess(void) +{ + unsigned int tickNum1Ms = 2; /* 1ms tick */ + static unsigned int tickCnt1Ms = 0; + unsigned int tickNum500Ms = 1000; /* 500ms tick */ + static unsigned int tickCnt500Ms = 0; + SystemInit(); + HMI_Init(); /* Init uart interrupt */ + HAL_TIMER_Start(&g_timer0); + HAL_TIMER_Start(&g_timer1); + + AptMasterSalveSet(); + /* Disable PWM output before startup. */ + MotorPwmOutputDisable(g_apt); + /* Software initialization. */ + InitSoftware(); + /* Start the PWM clock. */ + HAL_APT_StartModule(RUN_APT0 | RUN_APT1 | RUN_APT2); + /* System Timer clock. */ + BASE_FUNC_DELAY_MS(ADC_READINIT_DELAY); + TrimInitAdcShiftValue(&g_mc); + BASE_FUNC_DELAY_MS(MOTOR_START_DELAY); + while (1) { + /* Cycling send data to host */ + HMI_Process_Tx(&g_mc); + if (g_mc.msTickCnt - tickCnt1Ms >= tickNum1Ms) { + tickCnt1Ms = g_mc.msTickCnt; + /* User Code 1ms Event */ + HMI_Process_Rx(&g_mc); + /* User Code 1ms Event */ + } + + if (g_mc.msTickCnt - tickCnt500Ms >= tickNum500Ms) { + if (SysIsError(&g_mc.statusReg) != true) { + /* LED toggle in normal status. */ + HAL_GPIO_TogglePin(&LED1_HANDLE, LED1_PIN); + } + tickCnt500Ms = g_mc.msTickCnt; + } + } + return 0; +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.c new file mode 100644 index 0000000000000000000000000000000000000000..9836dc765691d2163bf75a2356653eb8eecf5981 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.c @@ -0,0 +1,718 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cust_process.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of cust process interface. + */ + +#include "cust_process.h" +#include "mcs_ctlmode_config.h" +#include "mcs_math_const.h" +#include "mcs_user_config.h" +#include "mcs_assert.h" +#include "main.h" +#include "uart_module.h" +#include "mcs_mtr_param.h" +/* Macro definitions --------------------------------------------------------------------------- */ +/* Constant value. */ +#define CONST_VALUE_60 60.0f /* Constant value 60. */ +#define CONST_VALUE_DIV_1000 0.001f /* Constant value 1/1000. */ + +/* Data array index. */ +#define DATA_SEGMENT_ONE 0 /* First element of the data segment */ +#define DATA_SEGMENT_TWO 1 /* Second element of the data segment */ +#define DATA_SEGMENT_THREE 2 /* Third element of the data segment */ +#define DATA_SEGMENT_FOUR 3 /* Fourth element of the data segment */ +#define CUSTACKCODELEN 10 /* Ack code length */ + +/* Command code. */ +#define SET_PID_KP 0x01 /* Set Pid Kp Command Params */ +#define SET_PID_KI 0x02 /* Set Pid Ki Command Params */ +#define SET_PID_LIMIT 0x03 /* Set Pid limit Command Params */ + +#define SET_SMO1TH_PLL_BDW 0x01 /* Set Smo1th Pll BandWidth Command Params */ +#define SET_SMO1TH_SPDFLITER_FC 0x02 /* Set Smo1th Fc Command Params */ +#define SET_SMO1TH_FILCOMPANGLE 0x03 /* Set Smo1th FillComp Command Params */ + +#define SET_SMO4TH_KD 0x01 /* Set Smo4th Kd Command Params */ +#define SET_SMO4TH_KP 0x02 /* Set Smo4th Kq Command Params */ + +#define SET_SPD_COMMAND_HZ 0x01 /* Set Target Speed Command Params */ +#define SET_SPD_RMG_SLOPE 0x02 /* Set Speed Slope Command Params */ + +#define SET_MAX_ELEC_SPD 0x01 /* Set Max Motor Speed Command Params */ +#define SET_MOTOR_NUM_OF_PAIRS 0x02 /* Set Motor Command Params */ + +#define SET_MOTOR_RES_OF_STATOR 0x01 /* Set Motor Res Command Params */ +#define SET_MOTOR_DAXIS_INDUCTANCE 0x02 /* Set Motor Daxis Inductance Command Params */ +#define SET_MOTOR_QAXIS_INDUCTANCE 0x03 /* Set Motor Qaxis Inductance Command Params */ + +#define SET_SVPWM_VOLTAGE_PER_UNIT 0x01 /* Set Svpwm Voltage Params */ +#define SET_ADC_CURRENT_SAMPLE_COFE 0x02 /* Set Adc coffe Params */ +#define SET_CURRENT_LOOP_CONTROL_PERIOD 0x03 /* Set Current loop period Command Params */ + +#define SET_IF_TARGET_CURRENT_VALUE 0x01 /* Set If Target Params */ +#define SET_INCREMENT_OF_IF_CURRENT 0x02 /* Set If Step Command Params */ +#define SET_SPEED_RING_BEGIN_SPEED 0x03 /* Set If to Smo Start Speed Command Params */ + +static unsigned char ackCode = 0; +static unsigned char g_uartTxBuf[CUSTACKCODELEN] = {0}; + +/** + * @brief Set observer type. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetObserverType(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + if (funcCode == FOC_OBSERVERTYPE_SMO1TH) { + ackCode = 0X01; + mtrCtrl->obserType = FOC_OBSERVERTYPE_SMO1TH; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->obserType); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH) { + ackCode = 0X02; + mtrCtrl->obserType = FOC_OBSERVERTYPE_SMO4TH; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->obserType); + } +} + +/** + * @brief Set pid parameter ack code. + * @param funcCode Received data funccode. + */ +static unsigned char SetPidAckCode(int funcCode) +{ + switch (funcCode) { + /* Set current loop D-Axis PID parameter ack code. */ + case FOC_CURDAXISPID_PARAMS: + ackCode = 0xE0; + break; + /* Set current loop Q-Axis PID parameter ack code. */ + case FOC_CURQAXISPID_PARAMS: + ackCode = 0xE3; + break; + /* Set speed loop PID parameter ack code. */ + case FOC_SPDPID_PARAMS: + ackCode = 0xE6; + break; + default: + break; + } + return ackCode; +} + +/** + * @brief Set pid parameters. + * @param pidHandle The pid control handle. + * @param rxData Receive buffer + */ +static void SetPidParams(PID_Handle *pidHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + switch (cmdCode) { + case SET_PID_KP: /* Set the P parameter. */ + PID_SetKp(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_KP), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_PID_KI: /* Set the I parameter. */ + PID_SetKi(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_KI), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_PID_LIMIT: /* Set the pid limit. */ + PID_SetLimit(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_LIMIT), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set motor pid parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorPidParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_CURDAXISPID_PARAMS) { + SetPidParams(&mtrCtrl->currCtrl.dAxisPi, rxData); /* Set Curr loop Daxis pid params */ + } else if (funcCode == FOC_CURQAXISPID_PARAMS) { + SetPidParams(&mtrCtrl->currCtrl.qAxisPi, rxData); /* Set Curr loop Qaxis pid params */ + mtrCtrl->currCtrl.dAxisPi.upperLimit = mtrCtrl->currCtrl.qAxisPi.upperLimit; + mtrCtrl->currCtrl.dAxisPi.lowerLimit = mtrCtrl->currCtrl.qAxisPi.lowerLimit; + } else if (funcCode == FOC_SPDPID_PARAMS) { + SetPidParams(&mtrCtrl->spdCtrl.spdPi, rxData); /* Set Speed loop params */ + } +} + +/** + * @brief Set first order sliding mode observer parameters. + * @param smoHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo1thParams(FOSMO_Handle *smoHandle, CUSTDATATYPE_DEF *rxData) +{ + smoHandle->kSmo = rxData->data[DATA_SEGMENT_TWO].typeF; + ackCode = 0X09; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->kSmo); +} + +/** + * @brief Set first order sliding mode observer's phase-locked loop parameters. + * @param smoHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo1thPLLParams(FOSMO_Handle *smoHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SMO1TH_PLL_BDW: /* Set the bandwidth. */ + smoHandle->pll.pllBdw = rxData->data[DATA_SEGMENT_THREE].typeF; + smoHandle->pll.pi.kp = 2.0f * smoHandle->pll.pllBdw; /* kp = 2.0f * pllBdw */ + smoHandle->pll.pi.ki = smoHandle->pll.pllBdw * smoHandle->pll.pllBdw; /* ki = pllBdw * pllBdw */ + ackCode = 0X0A; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->pll.pllBdw); + break; + case SET_SMO1TH_SPDFLITER_FC: /* Set the cutoff frequency. */ + smoHandle->spdFilter.fc = rxData->data[DATA_SEGMENT_THREE].typeF; + smoHandle->spdFilter.a1 = 1.0f / (1.0f + DOUBLE_PI * smoHandle->spdFilter.fc * CTRL_CURR_PERIOD); + smoHandle->spdFilter.b1 = 1.0f - smoHandle->spdFilter.a1; + ackCode = 0X0B; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->spdFilter.fc); + break; + case SET_SMO1TH_FILCOMPANGLE: /* Set the compensation angle. */ + smoHandle->filCompAngle = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0C; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->filCompAngle); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set fourth order sliding mode observer parameters. + * @param smo4thHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo4thParams(SMO4TH_Handle *smo4thHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SMO4TH_KD: /* Set d axis gain. */ + smo4thHandle->kd = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0D; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->kd); + break; + case SET_SMO4TH_KP: /* Set q axis gain. */ + smo4thHandle->kq = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0E; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->kq); + break; + default: + break; + } +} + +/** + * @brief Set fourth order sliding mode observer's phase-locked loop parameters. + * @param smo4thHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo4thPLLParams(SMO4TH_Handle *smo4thHandle, CUSTDATATYPE_DEF *rxData) +{ + smo4thHandle->pll.pllBdw = rxData->data[DATA_SEGMENT_TWO].typeF; + smo4thHandle->pll.pi.kp = (2.0f) * smo4thHandle->pll.pllBdw; /* kp = 2.0f * pllBdw */ + smo4thHandle->pll.pi.ki = smo4thHandle->pll.pllBdw * smo4thHandle->pll.pllBdw; + ackCode = 0X11; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->pll.pllBdw); +} + +/** + * @brief Set observer parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetObserverParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_OBSERVERTYPE_SMO1TH) { + SetObserverSmo1thParams(&mtrCtrl->smo, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO1TH_PLL) { + SetObserverSmo1thPLLParams(&mtrCtrl->smo, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH) { + SetObserverSmo4thParams(&mtrCtrl->smo4th, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH_PLL) { + SetObserverSmo4thPLLParams(&mtrCtrl->smo4th, rxData); + } +} + +/** + * @brief Set motor speed and speed slope. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorSpdAndSlope(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SPD_COMMAND_HZ: /* Set target speed(hz). */ + mtrCtrl->spdCmdHz = rxData->data[DATA_SEGMENT_THREE].typeF * mtrCtrl->mtrParam.mtrNp / CONST_VALUE_60; + /* Judgement the value > 0.00001, make sure denominator != 0 */ + if (rxData->data[DATA_SEGMENT_FOUR].typeF > 0.00001f) { + mtrCtrl->spdRmg.delta = mtrCtrl->spdCmdHz / rxData->data[DATA_SEGMENT_FOUR].typeF * CTRL_SYSTICK_PERIOD; + } + ackCode = 0X16; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->spdCmdHz); + break; + case SET_SPD_RMG_SLOPE: /* Set speed slope. */ + mtrCtrl->spdRmg.delta = mtrCtrl->spdCmdHz / rxData->data[DATA_SEGMENT_THREE].typeF * CTRL_SYSTICK_PERIOD; + ackCode = 0X17; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set motor base parameters. + * @param mtrParamHandle The motor parameters handle. + * @param rxData Receive buffer + */ +static void SetMotorBaseParams(MOTOR_Param *mtrParamHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_MAX_ELEC_SPD: /* Set max electric speed. */ + mtrParamHandle->maxElecSpd = rxData->data[DATA_SEGMENT_THREE].typeF / + CONST_VALUE_60 * mtrParamHandle->mtrNp; + ackCode = 0X18; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_MOTOR_NUM_OF_PAIRS: /* Set the number of motor pole pairs. */ + mtrParamHandle->mtrNp = (unsigned short)(rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = 0X19; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrParamHandle->mtrNp); + break; + default: + break; + } +} + +/** + * @brief Set motor special parameters. + * @param mtrParamHandle The motor parameters handle. + * @param rxData Receive buffer + */ +static void SetMotorSpecialParams(MOTOR_Param *mtrParamHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_MOTOR_RES_OF_STATOR: /* Set the resistor of stator. */ + mtrParamHandle->mtrRs = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1A; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrRs); + break; + case SET_MOTOR_DAXIS_INDUCTANCE: /* Set the d axis inductance. */ + mtrParamHandle->mtrLd = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1B; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrLd); + break; + case SET_MOTOR_QAXIS_INDUCTANCE: /* Set the q axis inductance. */ + mtrParamHandle->mtrLq = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1C; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrLq); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set motor board parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void SetMotorBoardParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SVPWM_VOLTAGE_PER_UNIT: /* Set svpwm voltage per unit. */ + mtrCtrl->sv.voltPu = rxData->data[DATA_SEGMENT_THREE].typeF * ONE_DIV_SQRT3; + mtrCtrl->currCtrl.outLimit = mtrCtrl->sv.voltPu * ONE_DIV_SQRT3; + ackCode = 0X1D; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_ADC_CURRENT_SAMPLE_COFE: /* Set adc current sample cofeature. */ + mtrCtrl->adcCurrCofe = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1E; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->adcCurrCofe); + break; + case SET_CURRENT_LOOP_CONTROL_PERIOD: /* Set current loop control period. */ + mtrCtrl->currCtrlPeriod = 1 / rxData->data[DATA_SEGMENT_THREE].typeF * CONST_VALUE_DIV_1000; + ackCode = 0X1F; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set motor parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == MOTOR_PARAMS_BASE) { + SetMotorBaseParams(&mtrCtrl->mtrParam, rxData); + } else if (funcCode == MOTOR_PARAMS_SPECIAL) { + SetMotorSpecialParams(&mtrCtrl->mtrParam, rxData); + } else if (funcCode == MOTOR_PARAMS_BOARD) { + SetMotorBoardParams(mtrCtrl, rxData); + } +} + +/** + * @brief Motor start. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorStart(MTRCTRL_Handle *mtrCtrl) +{ + if (mtrCtrl->stateMachine != FSM_RUN) { + SysCmdStartSet(&mtrCtrl->statusReg); /* start motor. */ + mtrCtrl->motorStateFlag = 1; + ackCode = 0X24; /* send ackcode to host. */ + CUST_AckCode(g_uartTxBuf, ackCode, 1); + } +} + +/** + * @brief Motor stop. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorStop(MTRCTRL_Handle *mtrCtrl) +{ + SysCmdStopSet(&mtrCtrl->statusReg); + mtrCtrl->motorStateFlag = 0; + ackCode = 0X25; + CUST_AckCode(g_uartTxBuf, ackCode, 0); +} + +/** + * @brief Motor state reset. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorReset(MTRCTRL_Handle *mtrCtrl) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_SoftReset(); +} + +/** + * @brief Set IF-Startup parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void SetStartupIFParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_IF_TARGET_CURRENT_VALUE: /* Set I/F start up target current value. */ + mtrCtrl->ifCtrl.targetAmp = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X26; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->ifCtrl.targetAmp); + break; + case SET_INCREMENT_OF_IF_CURRENT: /* Set increment of I/F start up current. */ + mtrCtrl->ifCtrl.stepAmp = mtrCtrl->ifCtrl.targetAmp / rxData->data[DATA_SEGMENT_THREE].typeF * + CTRL_SYSTICK_PERIOD; + ackCode = 0X27; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->ifCtrl.stepAmp); + break; + case SET_SPEED_RING_BEGIN_SPEED: /* Set speed ring begin speed. */ + mtrCtrl->startup.spdBegin = rxData->data[DATA_SEGMENT_THREE].typeF / + CONST_VALUE_60 * mtrCtrl->mtrParam.mtrNp; + ackCode = 0X28; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set start up parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetStartupParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_STARTUP_IF) { + SetStartupIFParams(mtrCtrl, rxData); + } +} + +/** + * @brief Set adjust speed mode. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetAdjustSpdMode(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + /* Get commond code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + if (funcCode == HOST_SPEED_ADJUST) { + mtrCtrl->spdAdjustMode = HOST_SPEED_ADJUST; + /* Uart connect success. */ + mtrCtrl->uartConnectFlag = CONNECTING; + ackCode = 0X2A; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrCtrl->spdAdjustMode); + } else if (funcCode == CUST_SPEED_ADJUST) { + if (cmdCode == 1) { /* If uart connection disconnected & stop motor commond. */ + SysCmdStopSet(&mtrCtrl->statusReg); + mtrCtrl->motorStateFlag = 0; + } + mtrCtrl->spdAdjustMode = CUST_SPEED_ADJUST; + ackCode = 0X2B; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrCtrl->spdAdjustMode); + /* Uart disconnect. */ + mtrCtrl->uartConnectFlag = DISCONNECT; + } +} + +/** + * @brief Check uart connect. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_UartHandShake(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + CMDCODE_SetAdjustSpdMode(mtrCtrl, rxData); +} + +/** + * @brief Set Motor Initial Status Parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetMotorInitParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + switch (code) { + case CMDCODE_SET_OBSERVER_TYPE: { /* Set observer type. */ + CMDCODE_SetObserverType(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_PID_PARAMS: { /* Set motor pid parameters. */ + CMDCODE_SetMotorPidParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_OBSERVER_PARAMS: { /* Set observer parameters. */ + CMDCODE_SetObserverParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_MOTOR_TARGETSPD: { /* Set motor speed and speed slope. */ + CMDCODE_SetMotorSpdAndSlope(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_MOTOR_PARAMS: { /* Set motor parameters. */ + CMDCODE_SetMotorParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_ADJUSTSPD_MODE: /* Set adjust speed mode. */ + CMDCODE_SetAdjustSpdMode(mtrCtrl, rxData); + break; + default: + break; + } +} + +/** + * @brief Set Motor Control System Status. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetMotorState(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + BASE_FUNC_UNUSED(rxData); + switch (code) { + case CMDCODE_MOTOR_START: { /* Motor start command */ + CMDCODE_MotorStart(mtrCtrl); + } + break; + case CMDCODE_MOTOR_STOP: { /* Motor stop command */ + CMDCODE_MotorStop(mtrCtrl); + } + break; + case CMDCODE_MOTORSTATE_RESET: { /* Motor reset command */ + CMDCODE_MotorReset(mtrCtrl); + } + break; + default: + break; + } +} + +/** + * @brief Set Startup and Uart Link Handshake Flag Parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetOtherParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + switch (code) { + case CMDCODE_SET_STARTUP_PARAMS: /* Set start up parameters. */ + CMDCODE_SetStartupParams(mtrCtrl, rxData); + break; + case CMDCODE_UART_HANDSHAKE: { /* Check uart hand shake. */ + CMDCODE_UartHandShake(mtrCtrl, rxData); + } + break; + case CMDCODE_UART_HEARTDETECT: { /* Check uart hand shake. */ + mtrCtrl->uartHeartDetCnt++; + } + break; + default: + break; + } +} +/** + * @brief Instruction code executor. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_Process(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + CMDCODE_EXE_SetMotorInitParams(mtrCtrl, rxData, code); + CMDCODE_EXE_SetMotorState(mtrCtrl, rxData, code); + CMDCODE_EXE_SetOtherParams(mtrCtrl, rxData, code); +} + +/** + * @brief Host data download callback and data parsing. + * @param mtrCtrl The motor control handle. + * @param rxBuf Receive buffer + */ +void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(rxBuf != NULL); + + /* Uart data storage struct */ + CUSTDATATYPE_DEF data; + volatile unsigned char *ptrCnt = &rxBuf[FRAME_CHECK_BEGIN + 1]; + volatile unsigned char *strCnt = &data.data[0].typeCh[0]; + for (unsigned int j = 0; j < FRAME_RECV_DATA_LENTH * FRAME_ONE_DATA_LENTH; j++) { + *strCnt++ = *ptrCnt++; + } + /* Message function code. */ + data.code = rxBuf[FRAME_CHECK_BEGIN]; + CMDCODE_EXE_Process(mtrCtrl, &data, data.code); +} + +/** + * @brief The host computer displays data transmission. + * @param mtrCtrl The motor control handle. + * @param txData Message content. + * @param stage Message status function code. + */ +void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(txData != NULL); + if (mtrCtrl->stateMachine == FSM_IDLE) { + mtrCtrl->smo.spdEst = 0.0f; + } + /* Data send to host. */ + txData->data[CURRDQ_Q].typeF = mtrCtrl->idqFbk.q; + txData->data[CURRDQ_D].typeF = mtrCtrl->idqFbk.d; + txData->data[CURRREFDQ_Q].typeF = mtrCtrl->idqRef.q; + txData->data[CURRREFDQ_D].typeF = mtrCtrl->idqRef.d; + /* Motor current speed. */ + txData->data[CURRSPD].typeF = mtrCtrl->smo.spdEst * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + /* Motor commond speed. */ + txData->data[SPDCMDHZ].typeF = mtrCtrl->spdCmdHz * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + /* Bus voltage. */ + txData->data[UDC].typeF = mtrCtrl->udc; + /* Power board temprature. */ + txData->data[POWERBOARDTEMP].typeF = mtrCtrl->powerBoardTemp; + /* Motor protection status flag. */ + txData->data[CUST_ERR_CODE].typeI = mtrCtrl->prot.motorErrStatus.all; + /* Three phase current. */ + txData->data[CURRUVW_U].typeF = mtrCtrl->currUvw.u; + txData->data[CURRUVW_V].typeF = mtrCtrl->currUvw.v; + txData->data[CURRUVW_W].typeF = mtrCtrl->currUvw.w; + /* Three phase pwm duty. */ + txData->data[PWMDUTYUVW_U].typeF = mtrCtrl->dutyUvw.u; + txData->data[PWMDUTYUVW_V].typeF = mtrCtrl->dutyUvw.v; + txData->data[PWMDUTYUVW_W].typeF = mtrCtrl->dutyUvw.w; + /* Motor electric angle. */ + txData->data[AXISANGLE].typeF = mtrCtrl->axisAngle; + txData->data[VDQ_Q].typeF = mtrCtrl->vdqRef.q; + txData->data[VDQ_D].typeF = mtrCtrl->vdqRef.d; + txData->data[SPDREFHZ].typeF = mtrCtrl->spdRefHz * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + txData->data[SENDTIMESTAMP].typeF = mtrCtrl->uartTimeStamp; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.h new file mode 100644 index 0000000000000000000000000000000000000000..60fe69bb966d5f398468c8093e266796391de4e5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/cust_process.h @@ -0,0 +1,36 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cust_process.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McsMagicTag_HMI_MOUDLE_H +#define McsMagicTag_HMI_MOUDLE_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "protocol.h" +/* Typedef definitions ------------------------------------------------------------------------- */ + + +void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf); + +void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.c new file mode 100644 index 0000000000000000000000000000000000000000..58bf15a7071e2dbfbea0a799bfd5eebe2d9f8403 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.c @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file hmi_module.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of human-machine interface. + */ + +#include "hmi_module.h" +#include "mcs_assert.h" + +/** + * @brief HMI Initializatio. + * @retval None. + */ +void HMI_Init(void) +{ + UartRecvInit(); +} + +/** + * @brief HMI processing. + * @param mtrCtrl The motor control handle.. + * @retval None. + */ +void HMI_Process_Rx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UartModuleProcess_Rx(mtrCtrl); +} + +/** + * @brief HMI processing. + * @param mtrCtrl The motor control handle.. + * @retval None. + */ +void HMI_Process_Tx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UartModuleProcess_Tx(mtrCtrl); +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.h new file mode 100644 index 0000000000000000000000000000000000000000..056f8d7310eb14335c256933e8d998bf09919cc6 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/hmi_module.h @@ -0,0 +1,37 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file hmi_module.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McsMagicTag_HMI_MOUDLE_H +#define McsMagicTag_HMI_MOUDLE_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "uart_module.h" +/* Typedef definitions ------------------------------------------------------------------------- */ + + +void HMI_Init(void); + +void HMI_Process_Rx(MTRCTRL_Handle *mtrCtrl); +void HMI_Process_Tx(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.c new file mode 100644 index 0000000000000000000000000000000000000000..f655ada5ea8933139bd474281337ea5360a24fa4 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.c @@ -0,0 +1,174 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file protocol.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of port communication. + */ + +#include "protocol.h" +#include "apt.h" +#include "typedefs.h" +#include "main.h" +#include "mcs_assert.h" +#include "cust_process.h" + +/** + * @brief Callback function for receiving data analysis and processing. + * @param rxBuf Receive buffer. + */ +__weak void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_UNUSED(rxBuf); +} +/** + * @brief User-defined protocol message sending function (weak function). + * @param rxData Sending Messages.. + */ +__weak void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_UNUSED(*txData); +} + +static void (*g_ptrDataProcess)(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) = CUST_UartDataProcess; + +/** + * @brief Frame checksum. + * @param ptr Pointer to the data to be checked + * @param num Number of bytes + * @retval unsigned char Checksum + */ +static unsigned char CheckSum(unsigned char *ptr, unsigned char num) +{ + unsigned char sum = 0; + unsigned char *p = ptr; + /* Calculate the sum of received data. */ + for (unsigned char i = 0; i < num; i++) { + sum += (unsigned char)*p; + p++; + } + return sum; +} + +/** + * @brief Transmitting Data Frames. + * @param mtrCtrl The motor control handle. + * @param txBuf Sending Messages. + */ +unsigned int CUST_TransmitData(MTRCTRL_Handle *mtrCtrl, unsigned char *txBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(txBuf != NULL); + unsigned int dataLen = FRAME_ONE_DATA_LENTH * SEND_FRAME_DATA_NUM; + unsigned char i = 0; + CUSTDATATYPE_DEF txData = {0}; + CUST_SetTxMsg(mtrCtrl, &txData); + txBuf[i++] = FRAME_START; + /* Message function code */ + txBuf[i++] = FRAME_SENT; + /* Message data */ + for (unsigned char x = 0; x < SEND_FRAME_DATA_NUM; x++) { + unsigned char floatIndex = 0; + unsigned char byteOffset = i; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + } + /* Message verification domain */ + txBuf[dataLen + i++] = CheckSum((unsigned char*)&txBuf[FRAME_CHECK_BEGIN], dataLen + 1); + /* End of Message */ + txBuf[dataLen + i++] = FRAME_END; + return dataLen + i; +} + +/** + * @brief Transmitting Data Frames. + * @param txBuf Sending Cust Ack Code. + * @param ackCode Ack Code. + * @param varParams Host set parameter. + */ +void CUST_AckCode(unsigned char *txBuf, unsigned char ackCode, float varParams) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(txBuf != NULL); + CUSTDATATYPE_DEF txData = {0}; + int dataIndex = 0; + unsigned int i = 0; + unsigned int txLen = 0; + unsigned char dataLen = FRAME_ONE_CHAR_LENTH + FRAME_ONE_DATA_LENTH; + + txData.data[0].typeF = varParams; + txBuf[i++] = FRAME_START; + /* Message function code */ + txBuf[i++] = FRAME_CUSTACK; + /* Message ack code */ + txBuf[i++] = ackCode; + /* Message data */ + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + + /* Message verification domain */ + txBuf[FRAME_ONE_CHAR_LENTH + i++] = CheckSum((unsigned char*)&txBuf[FRAME_CHECK_BEGIN], dataLen + 1); + /* End of Message */ + txBuf[FRAME_ONE_CHAR_LENTH + i++] = FRAME_END; + txLen = FRAME_ONE_CHAR_LENTH + i++; + HAL_UART_WriteIT(&g_uart0, txBuf, txLen); +} + +/** + * @brief Cust receive data process. + * @param mtrCtrl The motor control handle. + * @param rxBuf Receive buffer + */ +void CUST_DataReceProcss(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(rxBuf != NULL); + unsigned char g_uartTxBuf[10] = {0}; + unsigned char ackCode = 0; + /* Frame header check */ + if (rxBuf[0] != FRAME_START) { + ackCode = 0X78; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } + /* Frame trailer check */ + if (rxBuf[FRAME_LENTH - 1] != FRAME_END) { + ackCode = 0X79; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } + /* Checksum */ + if (CheckSum((unsigned char*)&rxBuf[FRAME_CHECK_BEGIN], FRAME_CHECK_NUM) != rxBuf[FRAME_CHECKSUM]) { + ackCode = 0X7A; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } else { + if (g_ptrDataProcess == NULL) { + return; + } else { + g_ptrDataProcess(mtrCtrl, rxBuf); + } + } +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.h new file mode 100644 index 0000000000000000000000000000000000000000..900a00d8065b0154f3883d213be12f63610d0be1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/protocol.h @@ -0,0 +1,121 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file protocol.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of port communication. + */ +#ifndef McsMagicTag_PORTOCOL_H +#define McsMagicTag_PORTOCOL_H + +#include "uart.h" +#include "mcs_carrier.h" + +#define RS485_SEND_ENABLE GPIO6->GPIO_DATA[GPIO_PIN_7].reg = GPIO_PIN_7 +#define RS485_SEND_DISABLE GPIO6->GPIO_DATA[GPIO_PIN_7].reg = BASE_CFG_UNSET + +#define RX_BUF_LEN (16) +#define SEND_FRAME_DATA_NUM (CUSTDATA_MAX) +/* Service Uart0 Communication Deal */ +#define FRAME_ONE_DATA_LENTH 4 +#define FRAME_ONE_CHAR_LENTH 1 +#define FRAME_RECV_DATA_LENTH 4 +#define FRAME_LENTH 20 /* Data length */ +#define FRAME_SENT 0X8F +#define FRAME_CUSTACK 0X8A +#define FRAME_START 0x0F /* Start frame */ +#define FRAME_END '/' /* StOP frame */ +#define FRAME_CHECK_BEGIN 1 /* Check frame */ +#define FRAME_CHECKSUM 18 /* Check sum */ +#define FRAME_CHECK_NUM 17 +#define CMDCODE_IDLE_FRAME 0x55 /* Fill frame */ +#define CMDCODE_GET_MOTOR_PARAMS 0x01 +#define CMDCODE_SEND_MOTOR_PARAMS 0x02 +#define CMDCODE_SET_MOTOR_CTLMODE 0x03 +#define CMDCODE_SET_OBSERVER_TYPE 0x04 +#define CMDCODE_SET_STARTUP_MODE 0x05 +#define CMDCODE_SET_PID_PARAMS 0x06 +#define CMDCODE_SET_STARTUP_PARAMS 0x07 +#define CMDCODE_SET_OBSERVER_PARAMS 0x08 +#define CMDCODE_SET_MOTOR_TARGETSPD 0x09 +#define CMDCODE_SET_MOTOR_PARAMS 0x0A +#define CMDCODE_MOTOR_START 0x0B +#define CMDCODE_MOTOR_STOP 0x0C +#define CMDCODE_MOTORSTATE_RESET 0x0D +#define CMDCODE_SEND_FIRMVERSION 0x0E +#define CMDCODE_SET_ADJUSTSPD_MODE 0x11 +#define CMDCODE_UART_HANDSHAKE 0x12 +#define CMDCODE_UART_HEARTDETECT 0x13 + +typedef union { + unsigned char typeCh[4]; + float typeF; + int typeI; +} UNIONDATATYPE_DEF; + +typedef enum { + OFFLINE_RES = 0, + OFFLINE_LD, + OFFLINE_LQ, + OFFLINE_PSIF, + OFFLINE_JS, + OFFLINE_NP, + OFFLINE_B, + OFFLINE_KPD, + OFFLINE_KID, + OFFLINE_KPQ, + OFFLINE_KIQ, + OFFLINE_KPS, + OFFLINE_KIS, + OFFLINE_SPEED, + OFLINE_MAX +} OFFLINE_IDEN_TYPE; + +typedef enum { + CURRDQ_Q = 0, + CURRDQ_D, + CURRREFDQ_Q, + CURRREFDQ_D, + CURRSPD, + SPDCMDHZ, + UDC, + POWERBOARDTEMP, + CUST_ERR_CODE, + CURRUVW_U, + CURRUVW_V, + CURRUVW_W, + PWMDUTYUVW_U, + PWMDUTYUVW_V, + PWMDUTYUVW_W, + AXISANGLE, + VDQ_Q, + VDQ_D, + SPDREFHZ, + SENDTIMESTAMP, + CUSTDATA_MAX +} SENDTOHOSTPARAMS; + +typedef struct { + volatile unsigned char code; + volatile UNIONDATATYPE_DEF data[SEND_FRAME_DATA_NUM]; +} CUSTDATATYPE_DEF; + + +void CUST_DataReceProcss(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf); +unsigned int CUST_TransmitData(MTRCTRL_Handle *mtrCtrl, unsigned char *txBuf); +void CUST_AckCode(unsigned char *txBuf, unsigned char ackCode, float varParams); +#endif /* McsMagicTag_PORTOCOL_H */ diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.c b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.c new file mode 100644 index 0000000000000000000000000000000000000000..6b231c02a247ba3ffc0c25cb9f5f680b2b3b92dd --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.c @@ -0,0 +1,198 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the + * following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file uart_module.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of Serial port communication. + */ +#include "uart_module.h" +#include "debug.h" +#include "main.h" +#include "baseinc.h" + +/* Buffer size */ +#define UI_TX_BUF_LEN (96) +#define UI_RX_BUF_LEN (96) + +/* Receiving Timeout Interval */ +#define UART_TIME_OUT_MS (100) + +/* Start sending data to host delay after uart connect success */ +#define UART_UPDATA_DELAY_TIME_MS (50) + +/* Uart baudrate */ +#define UART0BAUDRATE (1843200) + +/* Data buffer */ +unsigned char g_uartRxBuf[UI_RX_BUF_LEN] = {0}; +unsigned char g_uartTxBuf[UI_TX_BUF_LEN] = {0}; +static unsigned int getdeltaSystickCnt = 0; +static FRAME_Handle g_uartFrame; +/** + * @brief Receive Data Clear. + * @param uartFrame Receice Data. + */ +static void FrameRecvClear(FRAME_Handle *uartFrame) +{ + /* Clear buffer lenth. */ + uartFrame->buffLen = 0; + uartFrame->timeOutCnt = 0; + uartFrame->frameFlag = 0; + /* Clear received data lenth. */ + uartFrame->rxLen = 0; + /* Clear received flag. */ + uartFrame->rxFlag = 0; + uartFrame->upDataCnt = 0; +} + +/** + * @brief Set Dma status. + * @param mtrCtrl The motor control handle. + */ +static void SetUartDmaStatus(MTRCTRL_Handle *mtrCtrl) +{ + /* Delay 50ms start uart Tx DMA . */ + if (mtrCtrl->uartConnectFlag == CONNECTING && g_uartFrame.upDataDelayCnt++ > UART_UPDATA_DELAY_TIME_MS) { + g_uartFrame.txFlag = 1; /* Start send data flag. */ + mtrCtrl->uartConnectFlag = CONNECTED; + g_uartFrame.upDataDelayCnt = 0; + } + if (mtrCtrl->uartConnectFlag == DISCONNECT) { + g_uartFrame.txFlag = 0; /* Stop send data flag. */ + mtrCtrl->uartTimeStamp = 0; + } +} + +/** + * @brief Set uart baudRate. + * @param baudrate Uart baudRate. + */ +static void SetUartBaudRate(unsigned int baudrate) +{ + /* Re_Write uart0 baudrate. */ + g_uart0.baudRate = baudrate; + HAL_UART_Init(&g_uart0); +} + +/** + * @brief Uart Dma interupt callback func. + * @param null. + */ +void UART0_TXDMACallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + unsigned int getCurSystickCnt = 0; + static unsigned int getlastSystickCnt = 0; + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + g_uartFrame.txFlag = 1; + getCurSystickCnt = DCL_SYSTICK_GetTick(); + if (getlastSystickCnt != 0) { + /* Calculate unit frame data send time */ + getdeltaSystickCnt = getCurSystickCnt - getlastSystickCnt; + } + getlastSystickCnt = getCurSystickCnt; + /* USER CODE END UART0_WRITE_DMA_FINISH */ +} + +/** + * @brief Uart0 interruput Write CallBack Function. + * @param handle Uart handle. + */ +void UART0WriteInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + g_uartFrame.uartItTxFlag = 1; + g_uartFrame.txFlag = 1; + /* USER CODE END UART0_WRITE_IT_FINISH */ +} + +/** + * @brief Uart0 Interruput Read CallBack Function. + * @param handle Uart handle. + */ +void UART0ReadInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + if (g_uartFrame.rxLen >= UI_RX_BUF_LEN - 1) { + g_uartFrame.rxLen = 0; + } + HAL_UART_ReadIT(handle, &g_uartFrame.rxData, 1); + g_uartRxBuf[g_uartFrame.rxLen] = g_uartFrame.rxData; + g_uartFrame.rxLen++; + g_uartFrame.rxFlag = 1; + g_uartFrame.uartItTxFlag = 0; + return; + /* USER CODE END UART0_READ_IT_FINISH */ +} + +/** + * @brief Uart Read Data Init Function. + * @param void. + */ +void UartRecvInit(void) +{ + /* Uart reception initialization */ + FrameRecvClear(&g_uartFrame); + SetUartBaudRate(UART0BAUDRATE); + HAL_UART_ReadIT(&g_uart0, &g_uartFrame.rxData, 1); +} + +/** + * @brief Uart Read Data Process Function. + * @param mtrCtrl The motor control handle. + */ +void UartModuleProcess_Rx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + SetUartDmaStatus(mtrCtrl); + if (g_uartFrame.rxFlag == 1) { /* Receive data flag. */ + if (g_uartFrame.timeOutCnt++ > UART_TIME_OUT_MS) { + /* Received data from the host. */ + g_uartFrame.frameFlag = 1; + g_uartFrame.rxFlag = 0; + g_uartFrame.timeOutCnt = 0; + /* Execute data process. */ + CUST_DataReceProcss(mtrCtrl, g_uartRxBuf); + g_uartFrame.rxLen = 0; + } + } + g_uartFrame.frameFlag = 0; +} + +/** + * @brief Uart Write Data Process Function. + * @param mtrCtrl The motor control handle. + */ +void UartModuleProcess_Tx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + if (g_uartFrame.txFlag == 1) { /* Send data flag. */ + mtrCtrl->uartTimeStamp = (float)getdeltaSystickCnt; /* Unit data time stamp */ + g_uartFrame.upDataCnt = 0; + g_uartFrame.txFlag = 0; + /* Send data to host. */ + unsigned int txLen = CUST_TransmitData(mtrCtrl, g_uartTxBuf); + /* If txIT mode send data finish, convert to DMA mode */ + if (g_uartFrame.uartItTxFlag == 1) { + HAL_UART_WriteDMA(&g_uart0, g_uartTxBuf, txLen); + } + } +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.h b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.h new file mode 100644 index 0000000000000000000000000000000000000000..1b3588ea132e4bafdfa4e831b9e4e8b0ad4efdd2 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/pmsm_sensorless_2shunt_foc/user_interface/uart_module.h @@ -0,0 +1,46 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file uart_module.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of Serial port communication. + */ +#ifndef McsMagicTag_UART_MODULE_H +#define McsMagicTag_UART_MODULE_H + +#include "protocol.h" +#include "mcs_ctlmode_config.h" + +typedef struct { + unsigned int buffLen; + unsigned int timeOutCnt; + unsigned char frameFlag; + unsigned int rxLen; + unsigned char rxFlag; + unsigned char txFlag; + unsigned char rxData; + unsigned int upDataCnt; + unsigned int upDataDelayCnt; + unsigned char uartItTxFlag; +} FRAME_Handle; + + +void UartRecvInit(void); +void UartModuleProcess_Rx(MTRCTRL_Handle *mtrCtrl); +void UartModuleProcess_Tx(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.c new file mode 100644 index 0000000000000000000000000000000000000000..99766bdf9b3d4f161b1902708696cb0e75a4fc9c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.c @@ -0,0 +1,43 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_cmm.c + * @author MCU Algorithm Team + * @brief This file contains protection common api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt.h" +#include "mcs_assert.h" + +/** + * @brief Safty-pulse-off function execution to turn off all the power devices. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void ProtSpo_Exec(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /**< Turn off all the six power devices of the inverter. */ + for (unsigned int i = 0; i < MOTOR_PHASE_NUMBER; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + DCL_APT_EnableSwContPWMAction(aptx, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(aptx, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(aptx); + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.h new file mode 100644 index 0000000000000000000000000000000000000000..104a5decba9eeb22375b63e4def4278af37d3573 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_cmm.h @@ -0,0 +1,136 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_cmm.h + * @author MCU Algorithm Team + * @brief This file contains protection function common data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_CMM_H +#define McuMagicTag_MCS_PROT_CMM_H + +#include "typedefs.h" +#include "apt_ip.h" + +/* Macro definitions --------------------------------------------------------------------------- */ +#define MOTOR_PHASE_NUMBER (3) + +#define PROT_VAL_THRESHOLD_NUMS (4) +#define PROT_VAL_THRESHOLD_0 (0) +#define PROT_VAL_THRESHOLD_1 (1) +#define PROT_VAL_THRESHOLD_2 (2) +#define PROT_VAL_THRESHOLD_3 (3) + +#define PROT_LIMIT_TIME_NUMS (3) +#define PROT_LIMIT_TIME_0 (0) +#define PROT_LIMIT_TIME_1 (1) +#define PROT_LIMIT_TIME_2 (2) + +#define MOTOR_PHASE_NUMBER (3) + +/**< Motor error status definition. */ +typedef union { + int all; + struct { + unsigned short overCurrErr : 1; /**< Indicates that phase current(s) is over protected value. */ + unsigned short overVoltErr : 1; /**< Indicates that dc-link voltage is over protected value. */ + unsigned short lowerVoltErr : 1; /**< Indicates that dc-link voltage is lower than protected value */ + unsigned short overIpmTempErr : 1; /**< Indicates that IPM temperature is over protected value. */ + unsigned short revRotErr : 1; /**< Indicates that motor negtive direction. */ + unsigned short motorStalling : 1; /**< Indicates that rotor is stalling. */ + unsigned short overMotorTempErr : 1; /**< Indicates that three phase currents is out-of-balance. */ + unsigned short posSnsrCommsErr : 1; /**< Indicates that position sensor communication is lost with MCU. */ + unsigned short posSnsrFuncErr : 1; /**< Indicates that position sensor reports function error. */ + unsigned short posSnsrCalibrErr : 1; /**< Indicates that position sensor fails to calibrate itself. */ + unsigned short currOutOfBalance : 1; /**< Indicates that the rotor is reverse rotation.*/ + unsigned short phsOpenErr : 1; /**< Indicates that phase winding(s) is open. */ + unsigned short phsU : 1; /**< Indicates that u phase fails when phsOpenErr occurs. */ + unsigned short phsV : 1; /**< Indicates that v phase fails when phsOpenErr occurs. */ + unsigned short phsW : 1; /**< Indicates that w phase fails when phsOpenErr occurs. */ + unsigned short multiPhs : 1; /**< Indicates that multi-phases fail when phsOpenErr occurs.*/ + } Bit; +} MotorErrStatusReg; + +/**< Protection Status Bit Definition */ +typedef enum { + OCP_ERR_BIT, + OVP_ERR_BIT, + LVP_ERR_BIT, + OTP_IPM_ERR_BIT, + OTP_MOTOR_ERR_BIT, + STALLING_ERR_BIT, + CURR_OUT_BALANCE_ERR_BIT, + POS_COMMS_ERR_BIT, + POS_FUNC_ERR_BIT, + POS_CALIB_ERR_BIT, + REV_ROT_ERR_BIT, + PHS_OPEN_ERR_BIT, + PHS_U_ERR_BIT, + PHS_V_ERR_BIT, + PHS_W_ERR_BIT, + PHS_MULTI_ERR_BIT, +} PROT_ErrBit; + +/**< Motor error protection level. */ +typedef enum { + PROT_LEVEL_0 = 0, + PROT_LEVEL_1, + PROT_LEVEL_2, + PROT_LEVEL_3, + PROT_LEVEL_4 /**< The greater level number, the severe error is. */ +} PROT_Level; + +/** + * @brief Obtains the status of a bit of data. + * @param data data. + * @param bits Number of digits. + * @retval Bit status. + */ +static inline bool GetBit(int data, unsigned short bit) +{ + bool ret; + ret = ((data >> bit) & 1); + return ret; +} + +/** + * @brief Sets the status of a bit of data. + * @param data data. + * @param bit The setted bit. + * @retval None. + */ +static inline void SetBit(int *data, unsigned char bit) +{ + *data |= (1 << bit); +} + +/** + * @brief Clear the status of a bit of data. + * @param data data. + * @param bit The Clear bit. + * @retval None. + */ +static inline void ClearBit(int *data, unsigned char bit) +{ + *data &= ~(1 << bit); +} + +/**< Protection action. */ +void ProtSpo_Exec(APT_RegStruct **aptAddr); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.c new file mode 100644 index 0000000000000000000000000000000000000000..e97876b7c6ec522fa82c30cbe503e2ab8de288db --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.c @@ -0,0 +1,137 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user.c + * @author MCU Algorithm Team + * @brief This file contains user protection data struct, inquiry api and initialization api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_user.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Get motor over current error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorOverCurrErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overCurrErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over dc-link voltage error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsDcLinkOverVoltErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overVoltErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor lower dc-link voltage error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsDcLinkLowerVoltErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.lowerVoltErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over Ipm temperature error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsIpmOverTempErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overIpmTempErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor over Motor temperature error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorOverTempErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.overMotorTempErr) { + return true; + } else { + return false; + } +} + +/** + * @brief Get motor stalling error status. + * @param motorErrStatus Motor error status. + * @retval Error status. + */ +bool IsMotorStallingErr(MotorErrStatusReg motorErrStatus) +{ + if (motorErrStatus.Bit.motorStalling) { + return true; + } else { + return false; + } +} + +/** + * @brief Clear the motor error status. + * @param motorProt Motor protection handle. + * @retval Error status. + */ +void ClearMotorErrStatus(MotorProtStatus_Handle *motorProt) +{ + MCS_ASSERT_PARAM(motorProt != NULL); + /* Clear the motor error status. */ + motorProt->motorErrStatus.all = 0x00; + OCP_Clear(&motorProt->ocp); + OVP_Clear(&motorProt->ovp); + LVP_Clear(&motorProt->lvp); + OTP_Clear(&motorProt->otp); +} + +/** + * @brief Motor protection function initialization. + * @param motorProt Motor protection handle. + * @retval Error status. + */ +void MotorProt_Init(MotorProtStatus_Handle *motorProt) +{ + MCS_ASSERT_PARAM(motorProt != NULL); + motorProt->motorErrStatus.all = 0x00; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.h new file mode 100644 index 0000000000000000000000000000000000000000..365110e10c6cd8bd5207af61f0a87b6df226fa91 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user.h @@ -0,0 +1,54 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user.h + * @author MCU Algorithm Team + * @brief This file contains user protection data struct, inquiry api and initialization api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_USER_H +#define McuMagicTag_MCS_PROT_USER_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "mcs_curr_prot.h" +#include "mcs_dc_volt_prot.h" +#include "mcs_temp_prot.h" +#include "mcs_motor_stalling.h" +#include "typedefs.h" + +typedef struct { + MotorErrStatusReg motorErrStatus; /**< Motor error status. */ + OCP_Handle ocp; /**< Over current protection. */ + OVP_Handle ovp; /**< Over dc-link voltage protection. */ + LVP_Handle lvp; /**< Lower dc-link voltage protection. */ + OTP_Handle otp; /**< Over IPM temperature protection. */ + STP_Handle stall; /**< Motor stalling protection. */ +} MotorProtStatus_Handle; + +void MotorProt_Init(MotorProtStatus_Handle *motorProt); + +/**< Inquiry motor error status */ +bool IsMotorOverCurrErr(MotorErrStatusReg motorErrStatus); +bool IsDcLinkOverVoltErr(MotorErrStatusReg motorErrStatus); +bool IsDcLinkLowerVoltErr(MotorErrStatusReg motorErrStatus); +bool IsIpmOverTempErr(MotorErrStatusReg motorErrStatus); +bool IsMotorOverTempErr(MotorErrStatusReg motorErrStatus); +bool IsMotorStallingErr(MotorErrStatusReg motorErrStatus); +void ClearMotorErrStatus(MotorProtStatus_Handle *motorProt); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user_config.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user_config.h new file mode 100644 index 0000000000000000000000000000000000000000..3f43e7736e6f4d6a7e7377b5c2689be1755690da --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/common/mcs_prot_user_config.h @@ -0,0 +1,125 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_prot_user_config.h + * @author MCU Algorithm Team + * @brief This file contans user macro definition of the protection function. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_PROT_USER_CONFIG_H +#define McuMagicTag_MCS_PROT_USER_CONFIG_H + +/* Macro definitions --------------------------------------------------------------------------- */ +/**< COMMON */ +/**< Peak phase current (A) of the motor or IPM under continuous operations. */ +#define PROT_MOTOR_RATED_CURR (0.07f) +/**< Only several continuous fault detection can trigger error status. */ +#define PROT_CNT_LIMIT (100) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define RECY_CNT_LIMIT (10000) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define OVER_VOLT_RECY_CNT_LIMIT (100) +/**< Only several contunuous none fault dectection can trigger elimination of error status. */ +#define LOWER_VOLT_RECY_CNT_LIMIT (100) + +/**< Over current protection */ +/**< Over current trigger value (A) when in level 1. */ +#define PROT_OVER_CURR_POW_DN1 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 2. */ +#define PROT_OVER_CURR_POW_DN2 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 3. */ +#define PROT_OVER_CURR_POW_DN3 (2.0f * PROT_MOTOR_RATED_CURR) +/**< Over current trigger value (A) when in level 4. */ +#define PROT_OVER_CURR_POW_OFF (2.0f * PROT_MOTOR_RATED_CURR) +#define PROT_OVER_CURR_RECY_DELTA (0.0035f) /**< Current gap (A) when recovers from protection status. */ +#define PROT_OVER_CURR_LIMIT1_TIME_SEC (30.0f) /**< 20% overload can last maximum time: 30 sec. */ +#define PROT_OVER_CURR_LIMIT2_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_CURR_LIMIT3_TIME_SEC (2.0f) /**< 20% overload can last maximum time: 2 sec. */ + +/**< Over voltage protection */ +#define PROT_OVER_VOLT_BRK_ON1 (15.0f) /**< Over dc-link voltage trigger value (V) when in level 1. */ +#define PROT_OVER_VOLT_BRK_ON2 (16.0f) /**< Over dc-link voltage trigger value (V) when in level 2. */ +#define PROT_OVER_VOLT_BRK_ON3 (17.0f) /**< Over dc-link voltage trigger value (V) when in level 3. */ +#define PROT_OVER_VOLT_BRK_ALL (18.0f) /**< Over dc-link voltage trigger value (V) when in level 4. */ +#define PROT_OVER_VOLT_RECY_DELTA (0.5f) /**< Voltage gap (V) when recovers from protection status. */ +#define PROT_OVER_VOLT_LIMIT1_TIME_SEC (5.0f) /**< overload1 can last maximum time (sec). */ +#define PROT_OVER_VOLT_LIMIT2_TIME_SEC (3.0f) /**< overload2 can last maximum time (sec). */ +#define PROT_OVER_VOLT_LIMIT3_TIME_SEC (1.0f) /**< overload3 can last maximum time (sec). */ +#define PROT_POW_DN1_PCT (1.0f) /* Power down level in level 1. */ +#define PROT_POW_DN2_PCT (1.0f) /* Power down level in level 2. */ +#define PROT_POW_DN3_PCT (1.0f) /* Power down level in level 3. */ + +/**< Conduction duty needs to be calibrated with the power of the brake loop. */ +#define PROT_OVER_VOLT_BRK_DUTY1 (0.25f) /**< Conduction duty of the brake loop in level 1. */ +#define PROT_OVER_VOLT_BRK_DUTY2 (0.50f) /**< Conduction duty of the brake loop in level 2. */ +#define PROT_OVER_VOLT_BRK_DUTY3 (0.75f) /**< Conduction duty of the brake loop in level 3. */ +#define PROT_OVER_VOLT_BRK_DUTY4 (1.00f) /**< Conduction duty of the brake loop in level 4. */ + +/**< Lower voltage protection */ +#define PROT_LOWER_VOLT_POW_DN1 (10.3f) /**< Lower dc-link voltage trigger value (V) when in level 1. */ +#define PROT_LOWER_VOLT_POW_DN2 (10.0f) /**< Lower dc-link voltage trigger value (V) when in level 2. */ +#define PROT_LOWER_VOLT_POW_DN3 (9.0f) /**< Lower dc-link voltage trigger value (V) when in level 3. */ +#define PROT_LOWER_VOLT_POW_OFF (8.0f) /**< Lower dc-link voltage trigger value (V) when in level 4. */ +#define PROT_LOWER_VOLT_RECY_DELTA (0.5f) /**< Voltage gap (A) when recovers from protection status. */ +#define PROT_LOWER_VOLT_LIMIT1_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ +#define PROT_LOWER_VOLT_LIMIT2_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ +#define PROT_LOWER_VOLT_LIMIT3_TIME_SEC (3.0f) /**< 20% overload can last maximum time: 3 sec. */ + +/**< Over IPM temperature protection */ +#define PROT_OVER_IPM_TEMP_POW_DN1 (40.0f) /**< Over IPM temperature trigger value (celsius) when in level 1. */ +#define PROT_OVER_IPM_TEMP_POW_DN2 (42.0f) /**< Over IPM temperature trigger value (celsius) when in level 2. */ +#define PROT_OVER_IPM_TEMP_POW_DN3 (44.0f) /**< Over IPM temperature trigger value (celsius) when in level 3. */ +#define PROT_OVER_IPM_TEMP_POW_OFF (45.0f) /**< Over IPM temperature trigger value (celsius) when in level 4. */ +#define PROT_OVER_IPM_TEMP_RECY_DELTA (0.5f) /**< Temperature gap (celsius) when recovers from protection status. */ +#define PROT_OVER_TEMP_LIMIT1_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_TEMP_LIMIT2_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ +#define PROT_OVER_TEMP_LIMIT3_TIME_SEC (10.0f) /**< 20% overload can last maximum time: 10 sec. */ + +/**< Motor stalling detection */ +/**< Feedback current higher than this value triggers fault. (A). */ +#define PROT_STALLING_CURR_AMP_LIMIT (PROT_MOTOR_RATED_CURR * 1.2f) +/**< Feedback speed lower than this value triggers fault (Hz). */ +#define PROT_STALLING_SPD_LIMIT 30 +/**< The threshold time that current and speed feedback over ranges (s). */ +#define PROT_STALLING_TIME_LIMIT (1.5f) + +/**< Current out-of-balance detection */ +#define UNBAL_STARTUP_DETECT_TIME_SEC (0.5f) /**< Start detection delay (s) */ +#define UNBAL_PROT_CNT_LIMIT (50000) +#define UNBAL_RECY_CNT_LIMIT (50000) +#define UNBAL_CURRENT_DELTA (1.5f) /**< Used to detect zero crossings in the current cycle. */ +#define UNBAL_DEGREE_LIMIT (0.035f) /**< unbalance degree threshold. */ +#define UNBAL_DEGREE_AVG_FLT_COFFI (0.03f) /**< unbalance degree average Filter coefficient. */ + +/**< Position sensor detection */ +#define POS_SNSR_FAULT_CNT (100000) /* Number of consecutive fault times */ +#define POS_SNSR_RECY_CNT (10000) /* Number of consecutive communication loss times */ + +/**< Phase winding integrity detection */ +#define OPEN_PHS_CURR_THR_A (0.1f) /* Threshold to determine open phase no current (A). */ + +/**< Position sensor zero position detection */ +#define POS_SNSR_CALIBR_UD_REF (15.0f) /* V */ +#define POS_SNSR_CALIBR_UD_SLOPE (15.0f) /* (V/S) */ +#define POS_SNSR_CALIBR_DETECT_TIME (2.0f) /* S */ +#define POS_SNSR_RECORD_TIMES (2000) /* 2000 * TS */ + +/* Multi-cycle mode: > 1; One-cycle mode: < 0.5 */ +#define POS_SNSR_IPD_INJ_PERIOD (4) + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..da4e56f89a51d39053fad4511bb799c91070df65 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.c @@ -0,0 +1,267 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_curr_prot.c + * @author MCU Algorithm Team + * @brief This file contains current protecion api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_curr_prot.h" +#include "mcs_math.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over current protection function. + * @param ocp Over current protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void OCP_Init(OCP_Handle *ocp, float ts) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + ocp->ts = ts; + OCP_Clear(ocp); + + ocp->protCntLimit = PROT_CNT_LIMIT; + ocp->recyCntLimit = RECY_CNT_LIMIT; + /* Configuring four levels of current protection thresholds. */ + ocp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_CURR_POW_DN1; + ocp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_CURR_POW_DN2; + ocp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_CURR_POW_DN3; + ocp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_CURR_POW_OFF; + /* Configure the protection limit time. */ + ocp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_CURR_LIMIT1_TIME_SEC; + ocp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_CURR_LIMIT2_TIME_SEC; + ocp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_CURR_LIMIT3_TIME_SEC; + ocp->recyDelta = PROT_OVER_CURR_RECY_DELTA; +} + +/** + * @brief Over current protection detection. + * @param ocp Over current protection handle. + * @param motorErrStatus Motor error status. + * @param idq DQ-axis feedback currents. + * @retval None. + */ +void OCP_Det(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus, DqAxis idq) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + /* Calculate current amplitude. */ + ocp->currAmp = Sqrt(idq.d * idq.d + idq.q * idq.q); + + /* Check if value goes over threshold for continuous cycles. */ + if (ocp->currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_0]) { + ocp->protCnt = 0; + return; + } + + if (ocp->protCnt < ocp->protCntLimit) { + ocp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_3] && ocp->protLevel < PROT_LEVEL_4) { + ocp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_2] && ocp->protLevel < PROT_LEVEL_3) { + ocp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_1] && ocp->protLevel < PROT_LEVEL_2) { + ocp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (ocp->currAmp >= ocp->protValThr[PROT_VAL_THRESHOLD_0] && ocp->protLevel < PROT_LEVEL_1) { + ocp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.overCurrErr = 1; + ocp->protCnt = 0; + ocp->timer = 0.0f; + return; + } +} + +/** + * @brief Over current protection execution. + * @param ocp Over current protection handle. + * @param idqRef DQ-axis current references. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OCP_Exec(OCP_Handle *ocp, DqAxis *idqRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(ocp != NULL); + MCS_ASSERT_PARAM(idqRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + + float id = idqRef->d; + float iq = idqRef->q; + float idqAmp = ocp->currAmp; + /* According to protect level, take corresponding action. */ + switch (ocp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + idqRef->d = 0.0f; + idqRef->q = 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_2]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_1]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 1: derate speed reference. */ + case PROT_LEVEL_1: + ocp->timer += ocp->ts; + if (ocp->timer > ocp->protLimitTime[PROT_LIMIT_TIME_0]) { + idqRef->d = id / idqAmp * PROT_MOTOR_RATED_CURR; + idqRef->q = iq / idqAmp * PROT_MOTOR_RATED_CURR; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } +} + +/** + * @brief Over current protection recovery. + * @param ocp Over current protection handle. + * @param motorErrStatus Motor error status. + * @retval None. + */ +void OCP_Recy(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus) +{ + MCS_ASSERT_PARAM(ocp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.overCurrErr) { + return; + } + + /* Calculate current amplitude. */ + float currAmp = ocp->currAmp; + + /* According to protection level, take corresponding recovery action. */ + switch (ocp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_3] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_3; + ocp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_2] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_2; + ocp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_1] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_1; + ocp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + if (currAmp < ocp->protValThr[PROT_VAL_THRESHOLD_0] - ocp->recyDelta) { + ocp->recyCnt++; + if (ocp->recyCnt > ocp->recyCntLimit) { + ocp->protLevel = PROT_LEVEL_0; + ocp->recyCnt = 0; + } + } + break; + + /* level 0 */ + case PROT_LEVEL_0: + motorErrStatus->Bit.overCurrErr = 0; + break; + + default: + break; + } +} + +/** + * @brief Over current protection error status clear. + * @param ocp Over current protection handle. + * @retval None. + */ +void OCP_Clear(OCP_Handle *ocp) +{ + MCS_ASSERT_PARAM(ocp != NULL); + /* Clear the history value. */ + ocp->protCnt = 0; + ocp->protLevel = PROT_LEVEL_0; + ocp->recyCnt = 0; + ocp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..e9916fe491699bff3373bbc68b175b6db16d7cd7 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_curr_prot.h @@ -0,0 +1,52 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_curr_prot.h + * @author MCU Algorithm Team + * @brief This file contains current protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_CURR_PROT_H +#define McuMagicTag_MCS_CURR_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "mcs_typedef.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float currAmp; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low current level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} OCP_Handle; + +void OCP_Init(OCP_Handle *ocp, float ts); +void OCP_Det(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus, DqAxis idq); +void OCP_Exec(OCP_Handle *ocp, DqAxis *idqRef, APT_RegStruct **aptAddr); +void OCP_Recy(OCP_Handle *ocp, MotorErrStatusReg *motorErrStatus); +void OCP_Clear(OCP_Handle *ocp); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..b0541a2e2e37ba98e8b92e6334ab2cc940b72b6c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.c @@ -0,0 +1,495 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_dc_volt_prot.c + * @author MCU Algorithm Team + * @brief This file contains dc-link voltage protection api declaration. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_dc_volt_prot.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over dc-link voltage protection function. + * @param ovp Over dc-link voltage protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void OVP_Init(OVP_Handle *ovp, float ts) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + ovp->ts = ts; + OVP_Clear(ovp); + ovp->protCntLimit = PROT_CNT_LIMIT; + ovp->recyCntLimit = OVER_VOLT_RECY_CNT_LIMIT; + /* Configuring four levels of overvoltage protection thresholds. */ + ovp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_VOLT_BRK_ON1; + ovp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_VOLT_BRK_ON2; + ovp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_VOLT_BRK_ON3; + ovp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_VOLT_BRK_ALL; + /* Configure the protection limit time. */ + ovp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_VOLT_LIMIT1_TIME_SEC; + ovp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_VOLT_LIMIT2_TIME_SEC; + ovp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_VOLT_LIMIT3_TIME_SEC; + ovp->recyDelta = PROT_OVER_VOLT_RECY_DELTA; +} + +/** + * @brief Initilization lower dc-link voltage protection function. + * @param lvp Lower dc-link voltage protection handle. + * @param ts Ctrl period (s). + * @retval None. + */ +void LVP_Init(LVP_Handle *lvp, float ts) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + + lvp->ts = ts; + LVP_Clear(lvp); + + lvp->protCntLimit = PROT_CNT_LIMIT; + lvp->recyCntLimit = LOWER_VOLT_RECY_CNT_LIMIT; + /* Configuring four levels of lower voltage protection thresholds. */ + lvp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_LOWER_VOLT_POW_DN1; + lvp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_LOWER_VOLT_POW_DN2; + lvp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_LOWER_VOLT_POW_DN3; + lvp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_LOWER_VOLT_POW_OFF; + /* Configure the protection limit time. */ + lvp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_LOWER_VOLT_LIMIT1_TIME_SEC; + lvp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_LOWER_VOLT_LIMIT2_TIME_SEC; + lvp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_LOWER_VOLT_LIMIT3_TIME_SEC; + lvp->recyDelta = PROT_OVER_VOLT_RECY_DELTA; +} + +/** + * @brief Over dc-link voltage protection detection. + * @param ovp Over dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage feedback (V). + * @retval None. + */ +void OVP_Det(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(udc > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_0]) { + ovp->protCnt = 0; + return; + } + + if (ovp->protCnt < ovp->protCntLimit) { + ovp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_3] && ovp->protLevel < PROT_LEVEL_4) { + ovp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_2] && ovp->protLevel < PROT_LEVEL_3) { + ovp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_1] && ovp->protLevel < PROT_LEVEL_2) { + ovp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (udc >= ovp->protValThr[PROT_VAL_THRESHOLD_0] && ovp->protLevel < PROT_LEVEL_1) { + ovp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.overVoltErr = 1; + ovp->protCnt = 0; + ovp->timer = 0.0f; + return; + } +} + +/** + * @brief Lower dc-link voltage protection detection. + * @param lvp Lower dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage feedback (V). + * @retval None. + */ +void LVP_Det(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(udc > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_0]) { + lvp->protCnt = 0; + return; + } + + if (lvp->protCnt < lvp->protCntLimit) { + lvp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_3] && lvp->protLevel < PROT_LEVEL_4) { + lvp->protLevel = PROT_LEVEL_4; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_2] && lvp->protLevel < PROT_LEVEL_3) { + lvp->protLevel = PROT_LEVEL_3; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_1] && lvp->protLevel < PROT_LEVEL_2) { + lvp->protLevel = PROT_LEVEL_2; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (udc <= lvp->protValThr[PROT_VAL_THRESHOLD_0] && lvp->protLevel < PROT_LEVEL_1) { + lvp->protLevel = PROT_LEVEL_1; + motorErrStatus->Bit.lowerVoltErr = 1; + lvp->protCnt = 0; + lvp->timer = 0.0f; + return; + } +} + +/** + * @brief Over dc-link voltage protection execution. + * @param ovp Over dc-link voltage protection handle. + * @param duty Brake loop output duty (0-1). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OVP_Exec(OVP_Handle *ovp, float *duty, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(ovp != NULL); + MCS_ASSERT_PARAM(duty != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (ovp->protLevel) { + /* level 4: brake loop duty maximum. */ + case PROT_LEVEL_4: + *duty = PROT_OVER_VOLT_BRK_DUTY4; + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + break; + + /* level 3: brake loop duty level 3. */ + case PROT_LEVEL_3: + *duty = PROT_OVER_VOLT_BRK_DUTY2; + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_2]) { + *duty = PROT_OVER_VOLT_BRK_DUTY3; + } + break; + + /* level 2: brake loop duty level 2. */ + case PROT_LEVEL_2: + *duty = PROT_OVER_VOLT_BRK_DUTY1; + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_1]) { + *duty = PROT_OVER_VOLT_BRK_DUTY2; + } + break; + + /* level 1: brake loop duty level 1. */ + case PROT_LEVEL_1: + ovp->timer += ovp->ts; + if (ovp->timer > ovp->protLimitTime[PROT_LIMIT_TIME_0]) { + *duty = PROT_OVER_VOLT_BRK_DUTY1; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } + return; +} + +/** + * @brief Lower dc-link voltage protection execution. + * @param lvp Lower dc-link voltage protection handle. + * @param spdRef Speed Reference (Hz). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void LVP_Exec(LVP_Handle *lvp, float *spdRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(lvp != NULL); + MCS_ASSERT_PARAM(spdRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (lvp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + *spdRef *= 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + *spdRef *= PROT_POW_DN2_PCT; + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_2]) { + *spdRef *= PROT_POW_DN3_PCT; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + *spdRef *= PROT_POW_DN1_PCT; + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_1]) { + *spdRef *= PROT_POW_DN2_PCT; + } + break; + + /* level 1: derate speed reference. */ + case PROT_LEVEL_1: + lvp->timer += lvp->ts; + if (lvp->timer > lvp->protLimitTime[PROT_LIMIT_TIME_0]) { + *spdRef *= PROT_POW_DN1_PCT; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + default: + break; + } + return; +} + +/** + * @brief Over dc-link voltage protection recovery. + * @param ovp Over dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage (V). + * @retval None. + */ +void OVP_Recy(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(ovp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.overVoltErr) { + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (ovp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_3] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_3; + ovp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the dc-link voltage is less than threshold 2, level-2 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_2] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_2; + ovp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the dc-link voltage is less than threshold 1, level-1 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_1] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_1; + ovp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the dc-link voltage is less than threshold 0, level-0 protection is restored. */ + if (udc < ovp->protValThr[PROT_VAL_THRESHOLD_0] - ovp->recyDelta) { + ovp->recyCnt++; + if (ovp->recyCnt > ovp->recyCntLimit) { + ovp->protLevel = PROT_LEVEL_0; + ovp->recyCnt = 0; + } + } + break; + /* level 0 Fault-free state. */ + case PROT_LEVEL_0: + motorErrStatus->Bit.overVoltErr = 0; + break; + + default: + break; + } + return; +} + +/** + * @brief Lower dc-link voltage protection recovery. + * @param lvp Lower dc-link voltage protection handle. + * @param motorErrStatus Motor error status. + * @param udc DC-link voltage (V). + * @retval None. + */ +void LVP_Recy(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc) +{ + MCS_ASSERT_PARAM(lvp != NULL); + /* If not under error state, just return without any operation. */ + if (!motorErrStatus->Bit.lowerVoltErr) { + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (lvp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + /* If the dc-link voltage is greater than threshold 3, level-3 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_3] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_3; + lvp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the dc-link voltage is greater than threshold 2, level-2 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_2] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_2; + lvp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the dc-link voltage is greater than threshold 1, level-1 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_1] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_1; + lvp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the dc-link voltage is greater than threshold 0, level-0 protection is restored. */ + if (udc > lvp->protValThr[PROT_VAL_THRESHOLD_0] + lvp->recyDelta) { + lvp->recyCnt++; + if (lvp->recyCnt > lvp->recyCntLimit) { + lvp->protLevel = PROT_LEVEL_0; + lvp->recyCnt = 0; + } + } + break; + /* level 0 Fault-free state. */ + case PROT_LEVEL_0: + motorErrStatus->Bit.lowerVoltErr = 0; + break; + + default: + break; + } + return; +} + +/** + * @brief Over dc-link voltage protection error status clear. + * @param ovp Over voltage protection handle. + * @retval None. + */ +void OVP_Clear(OVP_Handle *ovp) +{ + MCS_ASSERT_PARAM(ovp != NULL); + /* Clear the history value. */ + ovp->protCnt = 0; + ovp->protLevel = PROT_LEVEL_0; + ovp->recyCnt = 0; + ovp->timer = 0.0f; +} + +/** + * @brief Lower dc-link voltage protection error status clear. + * @param lvp Lower voltage protection handle. + * @retval None. + */ +void LVP_Clear(LVP_Handle *lvp) +{ + MCS_ASSERT_PARAM(lvp != NULL); + /* Clear the history value. */ + lvp->protCnt = 0; + lvp->protLevel = PROT_LEVEL_0; + lvp->recyCnt = 0; + lvp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..0435156a0add386ec4b783f4d003f4178baa2ecf --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_dc_volt_prot.h @@ -0,0 +1,69 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_dc_volt_prot.h + * @author MCU Algorithm Team + * @brief This file contains dc-link voltage protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McuMagicTag_MCS_DC_VOLT_PROT_H +#define McuMagicTag_MCS_DC_VOLT_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low voltage level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} OVP_Handle; + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from high voltage level to low. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float timer; + float ts; + PROT_Level protLevel; +} LVP_Handle; + +void OVP_Init(OVP_Handle *ovp, float ts); +void OVP_Det(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc); +void OVP_Exec(OVP_Handle *ovp, float *duty, APT_RegStruct **aptAddr); +void OVP_Recy(OVP_Handle *ovp, MotorErrStatusReg *motorErrStatus, float udc); +void OVP_Clear(OVP_Handle *ovp); + +void LVP_Init(LVP_Handle *lvp, float ts); +void LVP_Det(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc); +void LVP_Exec(LVP_Handle *lvp, float *spdRef, APT_RegStruct **aptAddr); +void LVP_Recy(LVP_Handle *lvp, MotorErrStatusReg *motorErrStatus, float udc); +void LVP_Clear(LVP_Handle *lvp); + +#endif diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.c new file mode 100644 index 0000000000000000000000000000000000000000..9dee4d2d240e66f7cfb0528b2d42d4c32ada0078 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.c @@ -0,0 +1,112 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_stalling.c + * @author MCU Algorithm Team + * @brief This file contains motor stalling protection data struct and api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_motor_stalling.h" +#include "mcs_prot_user_config.h" +#include "mcs_math.h" +#include "mcs_math_const.h" +#include "mcs_assert.h" + +/** + * @brief Initilization motor stalling protection function. + * @param stall Motor stalling handle. + * @param ts Ctrl period (s). + * @param currLimit The current amplitude that triggers fault. (A). + * @param spdLimit The speed amplitude that triggers fault. (Hz). + * @param timeLimit The threshold time that current amplitude over the limit (s). + * @retval None. + */ +void STP_Init(STP_Handle *stall, float ts, float currLimit, float spdLimit, float timeLimit) +{ + MCS_ASSERT_PARAM(stall != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + MCS_ASSERT_PARAM(currLimit > 0.0f); + MCS_ASSERT_PARAM(spdLimit > 0.0f); + MCS_ASSERT_PARAM(timeLimit > 0.0f); + /* Configuring parameters for stalling detection. */ + stall->ts = ts; + /* Current threshold and speed threshold for stalling fault. */ + stall->currAmpLimit = currLimit; + stall->spdLimit = spdLimit; + stall->timeLimit = timeLimit; + stall->timer = 0.0f; +} + +/** + * @brief Motor stalling detection. + * @param stall Motor stalling handle. + * @param motorErrStatus Motor error status. + * @param spd Speed feedback (Hz). + * @param idq Dq-axis current feedback (A). + * @retval None. + */ +void STP_Det_ByCurrSpd(STP_Handle *stall, MotorErrStatusReg *motorErrStatus, float spd, DqAxis idq) +{ + MCS_ASSERT_PARAM(stall != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(Abs(spd) >= 0.0f); + /* Calculate current amplitude. */ + float currAmp = Sqrt(idq.d * idq.d + idq.q * idq.q); + float spdAbs = Abs(spd); + /* Check if value goes over threshold for continuous cycles. */ + if (currAmp < stall->currAmpLimit || spdAbs > stall->spdLimit) { + stall->timer = 0.0f; + return; + } + /* Time accumulation. */ + if (stall->timer < stall->timeLimit) { + stall->timer += stall->ts; + return; + } + motorErrStatus->Bit.motorStalling = 1; +} + +/** + * @brief Motor stalling protection execution. + * @param motorErrStatus Motor error status. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void STP_Exec(MotorErrStatusReg *motorErrStatus, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + if (motorErrStatus->Bit.motorStalling == 0) { + return; + } + + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + return; +} + +/** + * @brief Motor stalling protection error status clear. + * @param stall Motor stalling handle. + * @retval None. + */ +void STP_Clear(STP_Handle *stall) +{ + MCS_ASSERT_PARAM(stall != NULL); + stall->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.h new file mode 100644 index 0000000000000000000000000000000000000000..a1d1e4bed11bec0d6d73aee54de36c365588898e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_motor_stalling.h @@ -0,0 +1,45 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_stalling.h + * @author MCU Algorithm Team + * @brief This file contains motor stalling protection data struct and api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_MOTOR_STALLING_PROT_H +#define McuMagicTag_MCS_MOTOR_STALLING_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" +#include "mcs_typedef.h" + +typedef struct { + float currAmpLimit; /**< Feedback current higher than this value triggers fault. (A). */ + float spdLimit; /**< Feedback speed lower than this value triggers fault (Hz). */ + float timeLimit; /**< The threshold time that current and speed feedback over ranges (s). */ + float timer; /**< Timer to get speed and current over range time. */ + float ts; /**< Ctrl period (s). */ +} STP_Handle; + +void STP_Init(STP_Handle *stall, float ts, float currLimit, float spdLimit, float timeLimit); +void STP_Det_ByCurrSpd(STP_Handle *stall, MotorErrStatusReg *motorErrStatus, float spd, DqAxis idq); +void STP_Exec(MotorErrStatusReg *motorErrStatus, APT_RegStruct **aptAddr); +void STP_Clear(STP_Handle *stall); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.c b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.c new file mode 100644 index 0000000000000000000000000000000000000000..184ba4a3ac712690e4f808f1464a65c74a387b52 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.c @@ -0,0 +1,262 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_temp_prot.c + * @author MCU Algorithm Team + * @brief This file contains over temperature protection api definition. + */ + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_temp_prot.h" +#include "mcs_prot_user_config.h" +#include "mcs_assert.h" + +/** + * @brief Initilization over temperation protection function. + * @param otp Over temperature protection handle. + * @param ts Ctrl period. + * @retval None. + */ +void OTP_Init(OTP_Handle *otp, float ts) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(ts > 0.0f); + otp->ts = ts; + otp->protCntLimit = PROT_CNT_LIMIT; + otp->recyCntLimit = RECY_CNT_LIMIT; + /* Configuring the temperature protection threshold. */ + otp->protValThr[PROT_VAL_THRESHOLD_0] = PROT_OVER_IPM_TEMP_POW_DN1; + otp->protValThr[PROT_VAL_THRESHOLD_1] = PROT_OVER_IPM_TEMP_POW_DN2; + otp->protValThr[PROT_VAL_THRESHOLD_2] = PROT_OVER_IPM_TEMP_POW_DN3; + otp->protValThr[PROT_VAL_THRESHOLD_3] = PROT_OVER_IPM_TEMP_POW_OFF; + /* Configuring the protection limiting time. */ + otp->protLimitTime[PROT_LIMIT_TIME_0] = PROT_OVER_TEMP_LIMIT1_TIME_SEC; + otp->protLimitTime[PROT_LIMIT_TIME_1] = PROT_OVER_TEMP_LIMIT2_TIME_SEC; + otp->protLimitTime[PROT_LIMIT_TIME_2] = PROT_OVER_TEMP_LIMIT3_TIME_SEC; + otp->recyDelta = PROT_OVER_IPM_TEMP_RECY_DELTA; + OTP_Clear(otp); +} + +/** + * @brief Over temperatre protection detection. + * @param otp Over temperature protection handle. + * @param tempErrBit Temperature error status bit. + * @param idq DQ-axis feedback currents. + * @retval None. + */ +void OTP_Det(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(temp > 0.0f); + /* Check if value goes over threshold for continuous cycles. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_0]) { + otp->protCnt = 0; + ClearBit(&motorErrStatus->all, protBit); + return; + } + + if (otp->protCnt < otp->protCntLimit) { + otp->protCnt++; + return; + } + + /* Check which protection level should be activated. */ + /* Once enter error status, error status can only be changed by recover api. */ + /* protect level: level 4. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_3] && otp->protLevel < PROT_LEVEL_4) { + otp->protLevel = PROT_LEVEL_4; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + return; + } + + /* Protect level: level 3. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_2] && otp->protLevel < PROT_LEVEL_3) { + otp->protLevel = PROT_LEVEL_3; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } + + /* Protect level: level 2. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_1] && otp->protLevel < PROT_LEVEL_2) { + otp->protLevel = PROT_LEVEL_2; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } + + /* Protect level: level 1. */ + if (temp >= otp->protValThr[PROT_VAL_THRESHOLD_0] && otp->protLevel < PROT_LEVEL_1) { + otp->protLevel = PROT_LEVEL_1; + SetBit(&motorErrStatus->all, protBit); + otp->protCnt = 0; + otp->timer = 0.0f; + return; + } +} + +/** + * @brief Over temperature protection execution. + * @param otp Over temperature protection handle. + * @param spdRef Speed reference (Hz). + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +void OTP_Exec(OTP_Handle *otp, float *spdRef, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(spdRef != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + /* According to protect level, take corresponding action. */ + switch (otp->protLevel) { + /* level 4: disable all PWM output. */ + case PROT_LEVEL_4: + /* Disable three-phase pwm output. */ + ProtSpo_Exec(aptAddr); + *spdRef *= 0.0f; + break; + + /* level 3: derate speed reference. */ + case PROT_LEVEL_3: + *spdRef *= PROT_POW_DN2_PCT; + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_2]) { + *spdRef *= PROT_POW_DN3_PCT; + } + break; + + /* level 2: derate speed reference. */ + case PROT_LEVEL_2: + /* Reducte motor speed to level 2 */ + *spdRef *= PROT_POW_DN1_PCT; + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_1]) { + *spdRef *= PROT_POW_DN2_PCT; + } + break; + + /* level 0: take no protection action. */ + case PROT_LEVEL_0: + break; + + case PROT_LEVEL_1: + /* Reducte motor speed to level 0 */ + otp->timer += otp->ts; + if (otp->timer > otp->protLimitTime[PROT_LIMIT_TIME_0]) { + /* level 1: derate speed reference. */ + *spdRef *= PROT_POW_DN1_PCT; + } + break; + + default: + break; + } + return; +} + +/** + * @brief Over temperature protection recovery. + * @param otp Over temperature protection handle. + * @param tempErrBit Temperature error status bit. + * @param temp Temperature (celsius). + * @retval None. + */ +void OTP_Recy(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp) +{ + MCS_ASSERT_PARAM(otp != NULL); + MCS_ASSERT_PARAM(motorErrStatus != NULL); + MCS_ASSERT_PARAM(temp > 0.0f); + /* If not under error state, just return without any operation. */ + if (otp->protLevel == PROT_LEVEL_0) { + motorErrStatus->all &= (~(1 >> protBit)); + return; + } + + /* According to protection level, take corresponding recovery action. */ + switch (otp->protLevel) { + /* level 4 */ + case PROT_LEVEL_4: + /* If the temperature is less than threshold 3, level-3 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_3] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_3; + otp->recyCnt = 0; + } + } + break; + + /* level 3 */ + case PROT_LEVEL_3: + /* If the temperature is less than threshold 2, level-2 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_2] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_2; + otp->recyCnt = 0; + } + } + break; + + /* level 2 */ + case PROT_LEVEL_2: + /* If the temperature is less than threshold 1, level-1 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_1] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_1; + otp->recyCnt = 0; + } + } + break; + + /* level 1 */ + case PROT_LEVEL_1: + /* If the temperature is less than threshold 0, level-0 protection is restored. */ + if (temp < otp->protValThr[PROT_VAL_THRESHOLD_0] - otp->recyDelta) { + otp->recyCnt++; + if (otp->recyCnt > otp->recyCntLimit) { + otp->protLevel = PROT_LEVEL_0; + otp->recyCnt = 0; + } + } + break; + + default: + break; + } + return; +} + +/** + * @brief Over temperature protection error status clear. + * @param otp Over temperature protection handle. + * @retval None. + */ +void OTP_Clear(OTP_Handle *otp) +{ + MCS_ASSERT_PARAM(otp != NULL); + /* Clear the history value. */ + otp->protCnt = 0; + otp->protLevel = PROT_LEVEL_0; + otp->recyCnt = 0; + otp->timer = 0.0f; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.h b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.h new file mode 100644 index 0000000000000000000000000000000000000000..2b9d99a76c19f53a78ccc1257287eccfd1fc972c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/protection/mcs_temp_prot.h @@ -0,0 +1,49 @@ +/** + * @copyright Copyright (c) 2023, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_temp_prot.h + * @author MCU Algorithm Team + * @brief his file contains over temperature protection api declaration. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_MCS_TEMP_PROT_H +#define McuMagicTag_MCS_TEMP_PROT_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "mcs_prot_cmm.h" +#include "apt_ip.h" + +typedef struct { + unsigned int protCnt; + unsigned int recyCnt; + unsigned int protCntLimit; + unsigned int recyCntLimit; + float protValThr[PROT_VAL_THRESHOLD_NUMS]; /* from low current level to high. */ + float protLimitTime[PROT_LIMIT_TIME_NUMS]; /* from level 3 to level 1. */ + float recyDelta; + float ts; + float timer; + PROT_Level protLevel; +} OTP_Handle; + +void OTP_Init(OTP_Handle *otp, float ts); +void OTP_Det(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp); +void OTP_Exec(OTP_Handle *otp, float *spdRef, APT_RegStruct **aptAddr); +void OTP_Recy(OTP_Handle *otp, MotorErrStatusReg *motorErrStatus, PROT_ErrBit protBit, float temp); +void OTP_Clear(OTP_Handle *otp); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_carrier.c b/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_carrier.c new file mode 100644 index 0000000000000000000000000000000000000000..9fc8afac32ecb5810db6758fb6acbca42a4c0f69 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_carrier.c @@ -0,0 +1,144 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_carrier.c + * @author MCU Algorithm Team + * @brief This file provides carrier interrupt application for motor control. + */ + +#include "mcs_carrier.h" +#include "mcs_math.h" +#include "typedefs.h" +#include "mcs_assert.h" +#include "mcs_user_config.h" +#include "mcs_ctlmode_config.h" + +/** + * @brief Synchronous rotation coordinate system angle. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_SyncCoorAngle(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + /* Synchronous rotation coordinate system angle. */ + switch (mtrCtrl->stateMachine) { + case FSM_STARTUP: + /* Current ramp angle is 0. */ + if (mtrCtrl->startup.stage == STARTUP_STAGE_CURR) { + mtrCtrl->axisAngle = 0; + } else if (mtrCtrl->startup.stage == STARTUP_STAGE_SPD) { /* IF control phase angle self-addition. */ + mtrCtrl->axisAngle = IF_CurrAngleCalc(&mtrCtrl->ifCtrl, mtrCtrl->spdRefHz); + } else if (mtrCtrl->startup.stage == STARTUP_STAGE_SWITCH) { /* Switch Angle */ + mtrCtrl->axisAngle = mtrCtrl->smo.elecAngle; + } + break; + + case FSM_RUN: + mtrCtrl->axisAngle = mtrCtrl->smo.elecAngle; + break; + + default: + mtrCtrl->axisAngle = 0; + break; + } +} + +/** + * @brief PWM waveform setting and sampling point setting for a single resistors and dual resistors. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_PwmAdcSet(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + SampleMode sampleMode = mtrCtrl->sampleMode; + /* Set the duty cycle according to the sampling mode. */ + if (sampleMode == DUAL_RESISTORS) { + SVPWM_Exec(&mtrCtrl->sv, &mtrCtrl->vabRef, &mtrCtrl->dutyUvw); + mtrCtrl->setPwmDutyCb(&mtrCtrl->dutyUvw, &mtrCtrl->dutyUvw); + } else if (sampleMode == SINGLE_RESISTOR) { + R1SVPWM_Exec(&mtrCtrl->r1Sv, &mtrCtrl->vabRef, &mtrCtrl->dutyUvwLeft, &mtrCtrl->dutyUvwRight); + mtrCtrl->setPwmDutyCb(&mtrCtrl->dutyUvwLeft, &mtrCtrl->dutyUvwRight); + /* The ADC sampling point position needs to be set based on the phase shift of a single resistors. */ + mtrCtrl->setADCTriggerTimeCb(mtrCtrl->r1Sv.samplePoint[0] * mtrCtrl->aptMaxcntCmp, \ + mtrCtrl->r1Sv.samplePoint[1] * mtrCtrl->aptMaxcntCmp); + } +} + +/** + * @brief Carrier interrupt function. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +void MCS_CarrierProcess(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UvwAxis *currUvw = &mtrCtrl->currUvw; + AlbeAxis *currAlbe = &mtrCtrl->iabFbk; + AlbeAxis *vab = &mtrCtrl->vabRef; + SampleMode sampleMode = mtrCtrl->sampleMode; + /* sample mode verify */ + if (sampleMode > SINGLE_RESISTOR || mtrCtrl->setADCTriggerTimeCb == NULL) { + return; + } + /* param verify */ + if (mtrCtrl->setPwmDutyCb == NULL || mtrCtrl->readCurrUvwCb == NULL) { + return; + } + /* Read the three-phase current value. */ + mtrCtrl->readCurrUvwCb(currUvw); + /* Clark Calc */ + ClarkeCalc(currUvw, currAlbe); + /* Smo observation */ + if (mtrCtrl->obserType == FOC_OBSERVERTYPE_SMO1TH) { + /* Smo observation */ + FOSMO_Exec(&mtrCtrl->smo, currAlbe, vab, mtrCtrl->spdRefHz); + } else if (mtrCtrl->obserType == FOC_OBSERVERTYPE_SMO4TH) { + /* Smo4th observation */ + SMO4TH_Exec(&mtrCtrl->smo4th, currAlbe, vab); + mtrCtrl->smo.spdEst = mtrCtrl->smo4th.spdEst; + mtrCtrl->smo.elecAngle = mtrCtrl->smo4th.elecAngle; + } + /* Synchronization angle */ + MCS_SyncCoorAngle(mtrCtrl); + + /* Park transformation */ + ParkCalc(currAlbe, mtrCtrl->axisAngle, &mtrCtrl->idqFbk); + + /* statemachine */ + switch (mtrCtrl->stateMachine) { + case FSM_STARTUP: + case FSM_RUN: + CURRCTRL_Exec(&mtrCtrl->currCtrl, &mtrCtrl->vdqRef, mtrCtrl->smo.spdEst, 0); + InvParkCalc(&mtrCtrl->vdqRef, mtrCtrl->axisAngle, vab); + MCS_PwmAdcSet(mtrCtrl); + break; + + case FSM_CAP_CHARGE: + case FSM_CLEAR: + case FSM_IDLE: + mtrCtrl->smo4th.spdEst = 0.0f; + break; + + default: + vab->alpha = 0.0f; + vab->beta = 0.0f; + MCS_PwmAdcSet(mtrCtrl); + break; + } +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_motor_process.c b/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_motor_process.c new file mode 100644 index 0000000000000000000000000000000000000000..feac3798ba91e651b736b4d0ff2eeb56f35c1c90 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/src/mcs_motor_process.c @@ -0,0 +1,986 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file mcs_motor_process.c + * @author MCU Algorithm Team + * @brief This file provides motor application. + * @details Single FOC application based on the ECMCU105H/ECBMCU201MPC board + * 1) Motor model is Gimbal GBM2804H-100T. + * 2) Select the pmsm sensorless 2shunt foc example in the sample column + of chipConfig and click Generate Code. + * 3) It's power supply must be changed to 12V. + */ +#include "main.h" +#include "mcs_user_config.h" +#include "mcs_math.h" +#include "hmi_module.h" +#include "mcs_ctlmode_config.h" +#include "mcs_prot_user.h" +#include "mcs_prot_user_config.h" +#include "mcs_math_const.h" +#include "mcs_motor_process.h" +#include "mcs_chip_config.h" +#include + + +/*------------------------------- Macro Definition -----------------------------------------------*/ +#define US_PER_MS 1000 +#define ANGLE_RANGE_ABS 65536 +#define ANGLE_360_F 65536.0f /* 0 - 65536 indicates 0 to 360. */ +#define APT_FULL_DUTY 1.0f +#define TEMP_3 3.0f +#define TEMP_15 15.0f +#define TEMP_30 30.0f +#define TEMP_45 45.0f +#define TEMP_60 60.0f +#define TEMP_RES_15 78.327f +#define TEMP_RES_30 36.776f +#define TEMP_RES_45 18.301f +#define TEMP_RES_60 9.607f +#define CNT_10 10 +#define CNT_5000 5000 +#define LEVEL_4 4 +#define MOTOR_START_DELAY 2 +#define ADC_READINIT_DELAY 1 +#define ADC_READINIT_TIMES 20 +#define ADC_TRIMVALUE_MIN 1800.0f +#define ADC_TRIMVALUE_MAX 2200.0f +/*------------------------------- Param Definition -----------------------------------------------*/ +/* Motor parameters. */ +/* Np, Rs, Ld, Lq, Psif, J, Nmax, Currmax, PPMR, zShift */ +static MOTOR_Param g_motorParam = MOTORPARAM_DEFAULTS; +static APT_RegStruct* g_apt[PHASE_MAX_NUM] = {APT_U, APT_V, APT_W}; +/* Motor control handle */ +static MTRCTRL_Handle g_mc = {0}; + +/* Motor speed loop PI param. */ +static void SPDCTRL_InitWrapper(SPDCTRL_Handle *spdHandle, float ts) +{ + /* Speed loop param assignment. */ + PI_Param spdPi = { + .kp = SPD_KP, + .ki = SPD_KI, + .lowerLim = SPD_LOWERLIM, + .upperLim = SPD_UPPERLIM, + }; + /* Speed loop param init. */ + SPDCTRL_Init(spdHandle, &g_motorParam, spdPi, ts); +} + +/* Motor current Loop PI param. */ +static void CURRCTRL_InitWrapper(CURRCTRL_Handle *currHandle, DqAxis *idqRef, DqAxis *idqFbk, float ts) +{ + /* Axis-D current loop param assignment. */ + PI_Param dCurrPi = { + .kp = CURRDAXIS_KP, + .ki = CURRDAXIS_KI, + .lowerLim = CURR_LOWERLIM, + .upperLim = CURR_UPPERLIM, + }; + /* Axis-Q current loop param assignment. */ + PI_Param qCurrPi = { + .kp = CURRQAXIS_KP, + .ki = CURRQAXIS_KI, + .lowerLim = CURR_LOWERLIM, + .upperLim = CURR_UPPERLIM, + }; + /* Current loop param init. */ + CURRCTRL_Init(currHandle, &g_motorParam, idqRef, idqFbk, dCurrPi, qCurrPi, ts); +} + +/* First order smo param. */ +static void FOSMO_InitWrapper(FOSMO_Handle *fosmo, float ts) +{ + /* Smo param assignment. */ + FOSMO_Param fosmoParam = { + .gain = FOSMO_GAIN, + .lambda = FOSMO_LAMBDA, + .fcEmf = FOSMO_EMF_CUTOFF_FREQ, + .fcLpf = SPEED_FILTER_CUTOFF_FREQUENCY, + .pllBdw = FOSMO_PLL_BDW, + }; + /* Init smo param. */ + FOSMO_Init(fosmo, fosmoParam, g_motorParam, ts); +} + +/* Smo4th param. */ +static void SMO4TH_InitWrapper(SMO4TH_Handle *smo4TH) +{ + /* Smo4th param assignment. */ + SMO4TH_Param smo4thParam = { + .kd = SMO4TH_KD, + .kq = SMO4TH_KQ, + .pllBdw = SMO4TH_PLL_BDW, + .fcLpf = SMO4TH_SPD_FILTER_CUTOFF_FREQ, + }; + /* Init smo param. */ + SMO4TH_Init(smo4TH, smo4thParam, g_motorParam, CTRL_CURR_PERIOD); +} + +/*------------------------------- Function Definition -----------------------------------------------*/ +/** + * @brief Initialzer of system tick. + * @param mtrCtrl Motor control struct handle. + * @retval None. + */ +static void TimerTickInit(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + mtrCtrl->sysTickCnt = 0; + mtrCtrl->msTickNum = US_PER_MS / SYSTICK_PERIOD_US; + mtrCtrl->capChargeTickNum = (INV_CAP_CHARGE_MS * US_PER_MS / SYSTICK_PERIOD_US); +} + +/** + * @brief Init motor control task. + * @retval None. + */ +static void TSK_Init(void) +{ + g_mc.motorStateFlag = 0; + g_mc.uartHeartDetCnt = 0; + g_mc.uartTimeStamp = 0; + g_mc.stateMachine = FSM_IDLE; + g_mc.currCtrlPeriod = CTRL_CURR_PERIOD; /* Init current controller */ + g_mc.aptMaxcntCmp = g_apt0.waveform.timerPeriod; + g_mc.sampleMode = DUAL_RESISTORS; + g_mc.obserType = FOC_OBSERVERTYPE_SMO4TH; /* Init foc observe mode */ + g_mc.controlMode = FOC_CONTROLMODE_SPEED; /* Init motor control mode */ + g_mc.adcCurrCofe = ADC_CURR_COFFI; + g_mc.spdAdjustMode = CUST_SPEED_ADJUST; + g_mc.uartConnectFlag = DISCONNECT; + g_mc.spdCmdHz = USER_MIN_SPD_HZ; /* Motor initialization speed */ + + g_mc.adc0Compensate = ADC0COMPENSATE; /* Phase-u current init adc shift trim value */ + g_mc.adc1Compensate = ADC1COMPENSATE; /* Phase-w current init adc shift trim value */ + + IF_Init(&g_mc.ifCtrl, CTRL_IF_CURR_AMP_A, USER_CURR_SLOPE, CTRL_SYSTICK_PERIOD, CTRL_CURR_PERIOD); + RMG_Init(&g_mc.spdRmg, CTRL_SYSTICK_PERIOD, USER_SPD_SLOPE); /* Init speed slope */ + MtrParamInit(&g_mc.mtrParam, g_motorParam); + + TimerTickInit(&g_mc); + SVPWM_Init(&g_mc.sv, INV_VOLTAGE_BUS * ONE_DIV_SQRT3); + R1SVPWM_Init(&g_mc.r1Sv, INV_VOLTAGE_BUS * ONE_DIV_SQRT3, SAMPLE_POINT_SHIFT, SAMPLE_WINDOW_DUTY); + + SPDCTRL_InitWrapper(&g_mc.spdCtrl, CTRL_SYSTICK_PERIOD); + CURRCTRL_InitWrapper(&g_mc.currCtrl, &g_mc.idqRef, &g_mc.idqFbk, CTRL_CURR_PERIOD); + FOSMO_InitWrapper(&g_mc.smo, CTRL_CURR_PERIOD); + SMO4TH_InitWrapper(&g_mc.smo4th); + + STARTUP_Init(&g_mc.startup, USER_SWITCH_SPDBEGIN_HZ, USER_SWITCH_SPDBEGIN_HZ + TEMP_3); + + MotorProt_Init(&g_mc.prot); /* Init protect state comond */ + OCP_Init(&g_mc.prot.ocp, CTRL_CURR_PERIOD); + OVP_Init(&g_mc.prot.ovp, CTRL_SYSTICK_PERIOD); + LVP_Init(&g_mc.prot.lvp, CTRL_SYSTICK_PERIOD); + OTP_Init(&g_mc.prot.otp, CTRL_SYSTICK_PERIOD); + STP_Init(&g_mc.prot.stall, CTRL_SYSTICK_PERIOD, PROT_STALLING_CURR_AMP_LIMIT, + PROT_STALLING_SPD_LIMIT, PROT_STALLING_TIME_LIMIT); +} + +/** + * @brief Clear historical values of all controller before start-up. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void ClearBeforeStartup(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + /* The initial angle is 0. */ + mtrCtrl->axisAngle = 0; + + mtrCtrl->spdRefHz = 0.0f; + /* The initial dq-axis reference current is 0. */ + mtrCtrl->idqRef.d = 0.0f; + mtrCtrl->idqRef.q = 0.0f; + + mtrCtrl->vdqRef.d = 0.0f; + mtrCtrl->vdqRef.q = 0.0f; + /* Clear Duty Cycle Value. The initial duty cycle is 0.5. */ + mtrCtrl->dutyUvwLeft.u = 0.5f; + mtrCtrl->dutyUvwLeft.v = 0.5f; + mtrCtrl->dutyUvwLeft.w = 0.5f; + mtrCtrl->dutyUvwRight.u = 0.5f; + mtrCtrl->dutyUvwRight.v = 0.5f; + mtrCtrl->dutyUvwRight.w = 0.5f; + + mtrCtrl->prot.motorErrStatus.all = 0x00; + + RMG_Clear(&mtrCtrl->spdRmg); /* Clear the history value of speed slope control */ + CURRCTRL_Clear(&mtrCtrl->currCtrl); + IF_Clear(&mtrCtrl->ifCtrl); + SPDCTRL_Clear(&mtrCtrl->spdCtrl); + FOSMO_Clear(&mtrCtrl->smo); + SMO4TH_Clear(&mtrCtrl->smo4th); + STARTUP_Clear(&mtrCtrl->startup); + R1SVPWM_Clear(&mtrCtrl->r1Sv); + + OTP_Clear(&mtrCtrl->prot.otp); + OCP_Clear(&mtrCtrl->prot.ocp); + OVP_Clear(&mtrCtrl->prot.ovp); + LVP_Clear(&mtrCtrl->prot.lvp); +} + +/** + * @brief To set the comparison value of the IGBT single-resistance ADC sampling trigger position. + * @param aptx The APT register struct handle. + * @param cntCmpA A Count compare reference of time-base counter. + * @param cntCmpB B Count compare reference of time-base counter. + * @param maxCntCmp Maximum Comparison Value + * @retval None. + */ +static void MCS_SetAdcCompareR1(APT_RegStruct *aptx, unsigned short cntCmpA, + unsigned short cntCmpB, unsigned short maxCntCmp) +{ + unsigned short tmp; + /* Sets the A Count compare reference of time-base counter. */ + tmp = (unsigned short)Clamp((float)(cntCmpA), (float)(maxCntCmp - 1), 1.0f); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_A, tmp); + /* Sets the B Count compare reference of time-base counter. */ + tmp = (unsigned short)Clamp((float)(cntCmpB), (float)(maxCntCmp - 1), 1.0f); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_B, tmp); +} + +/** + * @brief Open the three-phase lower pipe. + * @param aptAddr Three-phase APT address pointer. + * @param maxDutyCnt Max duty count. + * @retval None. + */ +static void AptTurnOnLowSidePwm(APT_RegStruct **aptAddr, unsigned short maxDutyCnt) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + MCS_ASSERT_PARAM(maxDutyCnt != 0); + unsigned short dutyCnt; + dutyCnt = (unsigned short)(maxDutyCnt * APT_FULL_DUTY); + /* Open the three-phase lower pipe */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_C, dutyCnt); + DCL_APT_SetCounterCompare(aptx, APT_COMPARE_REFERENCE_D, dutyCnt); + } +} + +/** + * @brief Enable three-phase pwm output. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void MotorPwmOutputEnable(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /* Enable three-phase pwm output */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + aptx->PG_OUT_FRC.BIT.rg_pga_frc_en = BASE_CFG_UNSET; + aptx->PG_OUT_FRC.BIT.rg_pgb_frc_en = BASE_CFG_UNSET; + } +} + +/** + * @brief Disable three-phase pwm output. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void MotorPwmOutputDisable(APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(aptAddr != NULL); + /* Disable three-phase pwm output. */ + for (unsigned int i = 0; i < PHASE_MAX_NUM; i++) { + APT_RegStruct *aptx = (APT_RegStruct *)(aptAddr[i]); + aptx->PG_OUT_FRC.BIT.rg_pga_frc_en = BASE_CFG_SET; + aptx->PG_OUT_FRC.BIT.rg_pgb_frc_en = BASE_CFG_SET; + DCL_APT_ForcePWMOutputLow(aptx); + } +} + +/** + * @brief Smo IF angle difference calculation. + * @param smoElecAngle Smo electrical angle. + * @param ifCtrlAngle IF control angle. + * @retval signed short angle difference. + */ +static float SmoIfAngleDiffCalc(float smoElecAngle, float ifCtrlAngle) +{ + float diff = AngleSub(smoElecAngle, ifCtrlAngle); + /* Smo IF angle difference calculation */ + return diff; +} + +/** + * @brief Construct a new mcs startupswitch object. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void MCS_StartupSwitch(MTRCTRL_Handle *mtrCtrl) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + STARTUP_Handle *startup = &mtrCtrl->startup; + DqAxis *idqRef = &mtrCtrl->idqRef; + float iftargetAmp = mtrCtrl->ifCtrl.targetAmp; + float spdRefHz = mtrCtrl->spdRefHz; + + switch (startup->stage) { + case STARTUP_STAGE_CURR: + if (mtrCtrl->ifCtrl.curAmp >= iftargetAmp) { + /* Stage change */ + idqRef->q = iftargetAmp; + startup->stage = STARTUP_STAGE_SPD; + } else { + /* current amplitude increase */ + idqRef->q = IF_CurrAmpCalc(&mtrCtrl->ifCtrl); + spdRefHz = 0.0f; + } + break; + case STARTUP_STAGE_SPD: + /* current frequency increase */ + if (Abs(spdRefHz) >= startup->spdBegin) { + /* Stage change */ + startup->stage = STARTUP_STAGE_SWITCH; + TrigVal localTrigVal; + TrigCalc(&localTrigVal, SmoIfAngleDiffCalc(mtrCtrl->smo.elecAngle, mtrCtrl->ifCtrl.angle)); + idqRef->d = 0.0f; + mtrCtrl->spdCtrl.spdPi.integral = iftargetAmp * localTrigVal.cos; + } else { + /* Speed rmg */ + spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + } + break; + + case STARTUP_STAGE_SWITCH: + /* Switch from IF to SMO */ + spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + idqRef->q = SPDCTRL_Exec(&mtrCtrl->spdCtrl, mtrCtrl->spdRefHz, mtrCtrl->smo.spdEst); + /* Transitional stage, if current reference speed > critical speed, change to next stage */ + if (spdRefHz >= startup->spdBegin + TEMP_3) { + /* Stage change */ + mtrCtrl->stateMachine = FSM_RUN; + } + break; + + default: + break; + } + mtrCtrl->spdRefHz = spdRefHz; +} + +/** + * @brief Pre-processing of motor status. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void MotorStatePerProc(SysStatusReg *statusReg, volatile FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* Get system status */ + if (SysIsError(statusReg)) { + *stateMachine = FSM_FAULT; + } + if (SysGetCmdStop(statusReg)) { + SysCmdStopClr(statusReg); + *stateMachine = FSM_STOP; + } +} + +/** + * @brief Check over current status. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckOverCurrentState(SysStatusReg *statusReg, FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* check systerm error status */ + if (SysIsError(statusReg) == false) { + *stateMachine = FSM_IDLE; + } +} + +/** + * @brief Check bootstrap capacitor charge time. + * @param mtrCtrl The motor control handle. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckBootstrpCapChargeTime(MTRCTRL_Handle *mtrCtrl, FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + mtrCtrl->sysTickCnt++; + /* check bootstrap capacitor charge time */ + if (mtrCtrl->sysTickCnt == mtrCtrl->capChargeTickNum) { + *stateMachine = FSM_CLEAR; + } +} + +/** + * @brief Check systerm cmd start signal. + * @param mtrCtrl The motor control handle. + * @param aptAddr Three-phase APT address pointer. + * @param statusReg System status. + * @param stateMachine Motor Control Status. + * @retval None. + */ +static void CheckSysCmdStart(MTRCTRL_Handle *mtrCtrl, + APT_RegStruct **aptAddr, + SysStatusReg *statusReg, + FsmState *stateMachine) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + MCS_ASSERT_PARAM(statusReg != NULL); + MCS_ASSERT_PARAM(stateMachine != NULL); + /* check start cmd */ + if (SysGetCmdStart(statusReg)) { + SysRunningSet(statusReg); + SysCmdStartClr(statusReg); + mtrCtrl->sysTickCnt = 0; + *stateMachine = FSM_CAP_CHARGE; + /* Preparation for charging the bootstrap capacitor. */ + AptTurnOnLowSidePwm(aptAddr, mtrCtrl->aptMaxcntCmp); + /* Out put pwm */ + MotorPwmOutputEnable(aptAddr); + } +} + +/** + * @brief System timer tick task. + * @param mtrCtrl The motor control handle. + * @param aptAddr Three-phase APT address pointer. + * @retval None. + */ +static void TSK_SystickIsr(MTRCTRL_Handle *mtrCtrl, APT_RegStruct **aptAddr) +{ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(aptAddr != NULL); + SysStatusReg *statusReg = &mtrCtrl->statusReg; + FsmState *stateMachine = &mtrCtrl->stateMachine; + mtrCtrl->msTickCnt++; + /* Pre-processing of motor status. */ + MotorStatePerProc(statusReg, stateMachine); + /* statemachine */ + switch (*stateMachine) { + case FSM_IDLE: + /* Set smo estimate speed before motor start-up */ + g_mc.smo.spdEst = 0.0f; + CheckSysCmdStart(mtrCtrl, aptAddr, statusReg, stateMachine); + break; + case FSM_CAP_CHARGE: + /* Bootstrap Capacitor Charging Timing */ + CheckBootstrpCapChargeTime(mtrCtrl, stateMachine); + break; + /* Clear parameter before start */ + case FSM_CLEAR: + ClearBeforeStartup(mtrCtrl); + *stateMachine = FSM_STARTUP; + break; + case FSM_STARTUP: + MCS_StartupSwitch(mtrCtrl); + break; + case FSM_RUN: + /* Speed ramp control */ + mtrCtrl->spdRefHz = RMG_Exec(&mtrCtrl->spdRmg, mtrCtrl->spdCmdHz); + /* Speed loop control */ + mtrCtrl->idqRef.q = SPDCTRL_Exec(&mtrCtrl->spdCtrl, mtrCtrl->spdRefHz, mtrCtrl->smo.spdEst); + break; + case FSM_STOP: + mtrCtrl->spdRefHz = 0.0f; + MotorPwmOutputDisable(aptAddr); + SysRunningClr(statusReg); + *stateMachine = FSM_IDLE; + break; + case FSM_FAULT: /* Overcurrent state */ + CheckOverCurrentState(statusReg, stateMachine); + break; + default: + break; + } +} + +/** + * @brief Read the ADC initialize bias trim value. + * @param mtrCtrl The motor control handle. + * @retval None. + */ +static void TrimInitAdcShiftValue(MTRCTRL_Handle *mtrCtrl) +{ + float adc0SampleTemp = 0.0f; /* Current bias value for temp store */ + float adc1SampleTemp = 0.0f; + float adc0TempSum = 0.0f; + float adc1TempSum = 0.0f; /* Current bias sum value for 20 times */ + float adcSampleTimes = 0.0f; /* ADC sample times */ + for (int i = 0; i < ADC_READINIT_TIMES; i++) { + adc0SampleTemp = (float)HAL_ADC_GetConvResult(&ADCU_HANDLE, ADCUSOCNUM); + adc1SampleTemp = (float)HAL_ADC_GetConvResult(&ADCW_HANDLE, ADCWSOCNUM); + BASE_FUNC_DELAY_US(200); /* 200 is delay count, delay 200us triger adc sampling */ + if (adc0SampleTemp > 1000.0f && adc1SampleTemp > 1000.0f) { + adcSampleTimes++; + adc0TempSum += adc0SampleTemp; + adc1TempSum += adc1SampleTemp; + } + } + adc0SampleTemp = adc0TempSum / adcSampleTimes; + adc1SampleTemp = adc1TempSum / adcSampleTimes; + /* Force convert to float */ + mtrCtrl->adc0Compensate = (float) adc0SampleTemp; + mtrCtrl->adc1Compensate = (float) adc1SampleTemp; + /* The normal value scope: 1800 < adc0Compensate < 2200 */ + if(g_mc.adc0Compensate < ADC_TRIMVALUE_MIN || g_mc.adc0Compensate > ADC_TRIMVALUE_MAX \ + || g_mc.adc1Compensate < ADC_TRIMVALUE_MIN || g_mc.adc1Compensate > ADC_TRIMVALUE_MAX) { + DBG_PRINTF("ADC trim value error,please reset!"); + HAL_GPIO_SetValue(&LED2_HANDLE, LED2_PIN, GPIO_LOW_LEVEL); + } + adcSampleTimes = 0; + adc0TempSum = 0; + adc1TempSum = 0; +} + +/** + * @brief Read the ADC current sampling value. + * @param CurrUvw Three-phase current. + * @retval None. + */ +static void ReadCurrUvw(UvwAxis *CurrUvw) +{ + MCS_ASSERT_PARAM(CurrUvw != NULL); + float adc0 = (float)HAL_ADC_GetConvResult(&ADCU_HANDLE, ADCUSOCNUM); + float adc1 = (float)HAL_ADC_GetConvResult(&ADCW_HANDLE, ADCWSOCNUM); + /* Convert adc sample value to current value */ + CurrUvw->u = -(adc0 - g_mc.adc0Compensate) * g_mc.adcCurrCofe; + CurrUvw->w = -(adc1 - g_mc.adc1Compensate) * g_mc.adcCurrCofe; + CurrUvw->v = -CurrUvw->u - CurrUvw->w; +} + +/** + * @brief Setting the APT Output Duty Cycle. + * @param aptx APT register base address. + * @param leftDuty Left duty cycle. + * @param rightDuty Right duty cycle. + * @retval None. + */ +static void SetPwmDuty(APT_Handle *aptx, float leftDuty, float rightDuty) +{ + MCS_ASSERT_PARAM(aptx != NULL); + MCS_ASSERT_PARAM(leftDuty > 0); + MCS_ASSERT_PARAM(rightDuty > 0); + unsigned short maxPeriodCnt = aptx->waveform.timerPeriod; + unsigned short cntCmpLeftEdge = (unsigned short)(leftDuty * maxPeriodCnt); + unsigned short cntCmpRightEdge = (unsigned short)(rightDuty * maxPeriodCnt); + /* avoid overflowing */ + cntCmpLeftEdge = (cntCmpLeftEdge > maxPeriodCnt) ? maxPeriodCnt : cntCmpLeftEdge; + cntCmpRightEdge = (cntCmpRightEdge > maxPeriodCnt) ? maxPeriodCnt : cntCmpRightEdge; + HAL_APT_SetPWMDuty(aptx, cntCmpLeftEdge, cntCmpRightEdge); +} + +/** + * @brief Duty Cycle Setting. + * @param dutyUvwLeft Three-phase left duty cycle. + * @param dutyUvwRight Three-phase right duty cycle. + * @retval None. + */ +static void SetPwmDutyCp(UvwAxis *dutyUvwLeft, UvwAxis *dutyUvwRight) +{ + MCS_ASSERT_PARAM(dutyUvwLeft != NULL); + MCS_ASSERT_PARAM(dutyUvwRight != NULL); + /* Setting the Three-Phase Duty Cycle */ + SetPwmDuty(&g_apt0, dutyUvwLeft->u, dutyUvwRight->u); + SetPwmDuty(&g_apt1, dutyUvwLeft->v, dutyUvwRight->v); + SetPwmDuty(&g_apt2, dutyUvwLeft->w, dutyUvwRight->w); +} + +/** + * @brief To set the ADC sampling trigger comparison value. + * @param cntCmpSOCA Soca Compare Count Value. + * @param cntCmpSOCB Socb Compare Count Value. + * @retval None. + */ +static void SetADCTriggerTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB) +{ + MCS_SetAdcCompareR1(g_apt[PHASE_U], cntCmpSOCA, cntCmpSOCB, g_mc.aptMaxcntCmp); +} + +/** + * @brief Temprature table, the temprature detect range is 15 ~ 60 degree. + * @param tempResisValue Temperature sensor resistance. + * @retval None. + */ +static float TempTable(float tempResisValue) +{ + float boardTemp; + /* Temperatures between 15 and 30. */ + if (tempResisValue > TEMP_RES_30 && tempResisValue <= TEMP_RES_15) { + boardTemp = TEMP_15 + (TEMP_30 - TEMP_15) * (TEMP_RES_15 - tempResisValue) / (TEMP_RES_15 - TEMP_RES_30); + } else if (tempResisValue > TEMP_RES_45 && tempResisValue <= TEMP_RES_30) { /* Temperature between 30 and 45. */ + boardTemp = TEMP_30 + (TEMP_45 - TEMP_30) * (TEMP_RES_30 - tempResisValue) / (TEMP_RES_30 - TEMP_RES_45); + } else if (tempResisValue > TEMP_RES_60 && tempResisValue <= TEMP_RES_45) { /* Temperature between 45 and 50. */ + boardTemp = TEMP_45 + (TEMP_60 - TEMP_45) * (TEMP_RES_45 - tempResisValue) / (TEMP_RES_45 - TEMP_RES_60); + } else if (tempResisValue <= TEMP_RES_60) { + boardTemp = TEMP_60; /* If temperature is over 60, set temperature as 60. */ + } else if (tempResisValue >= TEMP_RES_15) { + boardTemp = TEMP_15; /* If temperature is lower 15, set temperature as 15. */ + } + return boardTemp; +} + +/** + * @brief Read power board temperature and udc. + * @retval None. + */ +static void ReadBoardTempAndUdc(void) +{ + HAL_ADC_SoftTrigSample(&ADCRESIS_HANDLE, ADCRESISSOCNUM); + HAL_ADC_SoftTrigSample(&ADCUDC_HANDLE, ADCUDCSOCNUM); + BASE_FUNC_DELAY_US(CNT_10); /* Delay 10 us. */ + /* Force convert to float type. */ + float resisAdcValue = (float)HAL_ADC_GetConvResult(&ADCRESIS_HANDLE, ADCRESISSOCNUM); + /* 10 / (x + 10) * 3.3 = resisAdcValue / 4096 * 3.3, x is resisValue, 10kohm is resistor divider value. */ + float resisValue = (4096.0f * 10.0f - 10.0f * resisAdcValue) / resisAdcValue; + g_mc.powerBoardTemp = TempTable(resisValue); + g_mc.udc = ((float)HAL_ADC_GetConvResult(&ADCUDC_HANDLE, ADCUDCSOCNUM)) * ADC_UDC_COFFI; +} + +/** + * @brief Execut abnormal feedback speed protect motion. + * @retval None. + */ +static void SpdFbkErrorProt_Exec(void) +{ + if (g_mc.prot.motorErrStatus.Bit.motorStalling == 0 && + g_mc.prot.motorErrStatus.Bit.overVoltErr == 0 && + g_mc.prot.motorErrStatus.Bit.lowerVoltErr == 0 && + g_mc.prot.motorErrStatus.Bit.overIpmTempErr == 0 && + g_mc.prot.motorErrStatus.Bit.overCurrErr == 0) { + g_mc.prot.motorErrStatus.Bit.revRotErr = 1; + /* If revRotErr, execute protect motion. */ + ProtSpo_Exec(g_apt); + } +} + +/** + * @brief Execut nan data protect motion. + * @retval None. + */ +static void NanDataDetect(void) +{ + static short errorSpdStatus = 0; + /* Detect the nan observer speed or current value. */ + if (isnan(g_mc.smo.spdEst) || isnan(g_mc.idqRef.q)) { + errorSpdStatus++; + } else { + errorSpdStatus = 0; + } + /* If the data is nan & continuous counting value is over 500 times, execute protect motion. + the detect time is 500 * 500us = 250ms. */ + if (errorSpdStatus >= 500) { + errorSpdStatus = 0; + SpdFbkErrorProt_Exec(); + } +} + +/** + * @brief Check abnormal feedback speed. + * @retval None. + */ +static void CheckSpdFbkStatus(void) +{ + static short errorCurrStatus = 0; + static short errorDeltaSpdStatus = 0; + NanDataDetect(); + if (g_mc.stateMachine == FSM_RUN) { + /* Detect the abnormal idq feedback current. */ + if (Abs(g_mc.idqRef.q - g_mc.idqFbk.q) >= CTRL_IF_CURR_AMP_A) { + errorCurrStatus++; + } else { + errorCurrStatus = 0; + } + /* Detect the abnormal feedback speed, the normal speed is > 0, if smo.spdEst < -10 && + delta speed error > USER_MIN_SPD_HZ + 10.0f at FSM_RUN stage, set the motor motion as error */ + if (g_mc.smo.spdEst < -10.0f && (g_mc.spdRefHz - g_mc.smo.spdEst > USER_MIN_SPD_HZ + 10.0f)) { + errorDeltaSpdStatus++; + } + } + /* Execute protect motion if count over 500 times, this error status caused by abnormal speed + or cabnormal urrent feedback, the detect time is 500 * 500us = 250ms. */ + if (errorCurrStatus >= 500) { + errorCurrStatus = 0; + SpdFbkErrorProt_Exec(); + } + /* This error statu caused by motor stalling, the detect time is 2 * 500us = 1ms. */ + if (errorDeltaSpdStatus >= 2) { + errorDeltaSpdStatus = 0; + g_mc.prot.motorErrStatus.Bit.motorStalling = 1; + } +} + +/** + * @brief Check Potentiometer Value callback function. + * @param param The TIMER_Handle. + * @retval None. + */ +void CheckPotentiometerValueCallback(void *param) +{ + MCS_ASSERT_PARAM(param != NULL); + BASE_FUNC_UNUSED(param); + static float potentiomitorAdcValue = 0.0f; + static float spdCmdHz = 0; + static float spdCmdHzLast = USER_MIN_SPD_HZ; /* 35.0 is spdCmdHzLast init value */ + HAL_ADC_SoftTrigSample(&ADCPTT_HANDLE, ADCPTTSOCNUM); + BASE_FUNC_DELAY_US(10); /* Delay 10 us. */ + potentiomitorAdcValue = (float)HAL_ADC_GetConvResult(&ADCPTT_HANDLE, ADCPTTSOCNUM); + /* 4045.0 is adc sample max value of potentiomitor, convert max spd to 180.25Hz */ + spdCmdHz = potentiomitorAdcValue / 4045.0f * USER_MAX_SPD_HZ; + if (Abs(spdCmdHzLast - spdCmdHz) < 1.0f) { /* Ignore changes less than 1. */ + return; + } + spdCmdHzLast = spdCmdHz; + if (spdCmdHz < USER_MIN_SPD_HZ) { /* 35.0 is spdCmdHz lower limit */ + spdCmdHz = USER_MIN_SPD_HZ; /* 35.0 is spdCmdHz lower limit */ + } + if (spdCmdHz > g_mc.mtrParam.maxElecSpd) { /* spdCmdHz upper limit */ + spdCmdHz = g_mc.mtrParam.maxElecSpd; /* spdCmdHz upper limit */ + } + if (g_mc.spdAdjustMode == CUST_SPEED_ADJUST) { + g_mc.spdCmdHz = spdCmdHz; + } +} + +/** + * @brief System timer ISR for Motor Statemachine CallBack function. + * @param param The systick timer handle. + * @retval None. + */ +void MotorStatemachineCallBack(void *param) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(param != NULL); + BASE_FUNC_UNUSED(param); + /* Read power board temprature and voltage. */ + ReadBoardTempAndUdc(); + /* Motor speed loop state machine. */ + TSK_SystickIsr(&g_mc, g_apt); + + /* Motor error speed feedback check. */ + CheckSpdFbkStatus(); + /* Motor stalling detect. */ + STP_Det_ByCurrSpd(&g_mc.prot.stall, &g_mc.prot.motorErrStatus, g_mc.smo.spdEst, g_mc.idqFbk); + STP_Exec(&g_mc.prot.motorErrStatus, g_apt); + + /* Motor over voltage detect. */ + OVP_Det(&g_mc.prot.ovp, &g_mc.prot.motorErrStatus, g_mc.udc); + OVP_Exec(&g_mc.prot.ovp, &g_mc.spdRefHz, g_apt); + OVP_Recy(&g_mc.prot.ovp, &g_mc.prot.motorErrStatus, g_mc.udc); + /* Motor lower voltage detect. */ + LVP_Det(&g_mc.prot.lvp, &g_mc.prot.motorErrStatus, g_mc.udc); + LVP_Exec(&g_mc.prot.lvp, &g_mc.spdRefHz, g_apt); + LVP_Recy(&g_mc.prot.lvp, &g_mc.prot.motorErrStatus, g_mc.udc); + /* Power board over temperature detect. */ + OTP_Det(&g_mc.prot.otp, &g_mc.prot.motorErrStatus, OTP_IPM_ERR_BIT, g_mc.powerBoardTemp); + OTP_Exec(&g_mc.prot.otp, &g_mc.spdRefHz, g_apt); + OTP_Recy(&g_mc.prot.otp, &g_mc.prot.motorErrStatus, OTP_IPM_ERR_BIT, g_mc.powerBoardTemp); + + /* If protect level == 4, set motor state as stop. */ + if (g_mc.prot.ovp.protLevel == LEVEL_4 || g_mc.prot.lvp.protLevel == LEVEL_4 \ + || g_mc.prot.otp.protLevel == LEVEL_4) { + SysCmdStopSet(&g_mc.statusReg); + } +} + +/** + * @brief The carrier ISR wrapper function. + * @param aptHandle The APT handle. + * @retval None. + */ +void MotorCarrierProcessCallback(void *aptHandle) +{ + MCS_ASSERT_PARAM(aptHandle != NULL); + BASE_FUNC_UNUSED(aptHandle); + /* the carrierprocess of motor */ + MCS_CarrierProcess(&g_mc); + /* Over current protect */ + if (g_mc.stateMachine == FSM_RUN || g_mc.stateMachine == FSM_STARTUP) { + OCP_Det(&g_mc.prot.ocp, &g_mc.prot.motorErrStatus, g_mc.idqFbk); + OCP_Exec(&g_mc.prot.ocp, &g_mc.idqFbk, g_apt); /* Execute over current protect motion */ + if (g_mc.prot.ocp.protLevel < LEVEL_4) { + OCP_Recy(&g_mc.prot.ocp, &g_mc.prot.motorErrStatus); + } + } +} + +/** + * @brief Event interrupt callback function of APT module. + * @param para APT module handle. + * @retval None. + */ +void MotorSysErrCallback(void *para) +{ + MCS_ASSERT_PARAM(para != NULL); + APT_Handle *handle = (APT_Handle *)para; + /* The IPM overcurrent triggers and disables the three-phase PWM output. */ + MotorPwmOutputDisable(g_apt); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_U], APT_OC_COMBINE_EVENT_A1); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_V], APT_OC_COMBINE_EVENT_A1); + DCL_APT_ClearOutCtrlEventFlag((APT_RegStruct *)g_apt[PHASE_W], APT_OC_COMBINE_EVENT_A1); + /* Status setting error */ + SysErrorSet(&g_mc.statusReg); + DBG_PRINTF("APT error! \r\n"); + HAL_GPIO_SetValue(&LED2_HANDLE, LED2_PIN, GPIO_LOW_LEVEL); + BASE_FUNC_UNUSED(handle); +} + +/** + * @brief Init motor controller's data structure. + * @retval None. + */ +static void InitSoftware(void) +{ + /* Initializing motor control param */ + TSK_Init(); + /* Read phase-uvw current */ + g_mc.readCurrUvwCb = ReadCurrUvw; + g_mc.setPwmDutyCb = SetPwmDutyCp; + g_mc.setADCTriggerTimeCb = SetADCTriggerTime; +} + +/** + * @brief Config the master APT. + * @param aptx The master APT handle. + * @retval None. + */ +static void AptMasterSet(APT_Handle *aptx) +{ + MCS_ASSERT_PARAM(aptx != NULL); + /* Config the master APT. */ + HAL_APT_MasterSyncInit(aptx, APT_SYNC_OUT_ON_CNTR_ZERO); +} + +/** + * @brief Config the slave APT. + * @param aptx The slave APT handle. + * @retval None. + */ +static void AptSalveSet(APT_Handle *aptx) +{ + MCS_ASSERT_PARAM(aptx != NULL); + APT_SlaveSyncIn slave; + /* Config the slave APT. */ + slave.divPhase = 0; + slave.cntPhase = 0; + slave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + slave.syncInSrc = APT_SYNC_IN_SRC; + slave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(aptx, &slave); +} +/** + * @brief Configuring Master and Slave APTs. + * @retval None. + */ +static void AptMasterSalveSet(void) +{ + /* motor APT master/slave synchronization */ + AptMasterSet(&g_apt0); + AptSalveSet(&g_apt1); + AptSalveSet(&g_apt2); +} + +/** + * @brief Config the KEY func. + * @param handle The GPIO handle. + * @retval None. + */ +static KEY_State Key_StateRead(GPIO_Handle *handle) +{ + if (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + BASE_FUNC_DELAY_MS(30); /* delay 30ms for deshake */ + if (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + while (HAL_GPIO_GetPinValue(handle, handle->pins) == 0) { + } + return KEY_DOWN; + } + } + return KEY_UP; +} + +/** + * @brief Control motor start and stop state by key func. + * @param param The GPIO handle. + * @retval None. + */ +void MotorStartStopKeyCallback(void *param) +{ + GPIO_Handle *handle = (GPIO_Handle *)param; + if (Key_StateRead(handle) == KEY_DOWN) { + if (g_mc.motorStateFlag == 0) { /* start motor */ + g_mc.motorStateFlag = 1; + SysCmdStartSet(&g_mc.statusReg); + } else if (g_mc.motorStateFlag == 1) { /* stop motor */ + g_mc.motorStateFlag = 0; + SysCmdStopSet(&g_mc.statusReg); + } + } +} + +/** + * @brief User application main entry function. + * @retval BSP_OK. + */ +int MotorMainProcess(void) +{ + unsigned int tickNum1Ms = 2; /* 1ms tick */ + static unsigned int tickCnt1Ms = 0; + unsigned int tickNum500Ms = 1000; /* 500ms tick */ + static unsigned int tickCnt500Ms = 0; + SystemInit(); + HMI_Init(); /* Init uart interrupt */ + HAL_TIMER_Start(&g_timer0); + HAL_TIMER_Start(&g_timer1); + + AptMasterSalveSet(); + /* Disable PWM output before startup. */ + MotorPwmOutputDisable(g_apt); + /* Software initialization. */ + InitSoftware(); + /* Start the PWM clock. */ + HAL_APT_StartModule(RUN_APT0 | RUN_APT1 | RUN_APT2); + /* System Timer clock. */ + BASE_FUNC_DELAY_MS(ADC_READINIT_DELAY); + TrimInitAdcShiftValue(&g_mc); + BASE_FUNC_DELAY_MS(MOTOR_START_DELAY); + while (1) { + /* Cycling send data to host */ + HMI_Process_Tx(&g_mc); + if (g_mc.msTickCnt - tickCnt1Ms >= tickNum1Ms) { + tickCnt1Ms = g_mc.msTickCnt; + /* User Code 1ms Event */ + HMI_Process_Rx(&g_mc); + /* User Code 1ms Event */ + } + + if (g_mc.msTickCnt - tickCnt500Ms >= tickNum500Ms) { + if (SysIsError(&g_mc.statusReg) != true) { + /* LED toggle in normal status. */ + HAL_GPIO_TogglePin(&LED1_HANDLE, LED1_PIN); + } + tickCnt500Ms = g_mc.msTickCnt; + } + } + return 0; +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.c b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.c new file mode 100644 index 0000000000000000000000000000000000000000..9836dc765691d2163bf75a2356653eb8eecf5981 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.c @@ -0,0 +1,718 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cust_process.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of cust process interface. + */ + +#include "cust_process.h" +#include "mcs_ctlmode_config.h" +#include "mcs_math_const.h" +#include "mcs_user_config.h" +#include "mcs_assert.h" +#include "main.h" +#include "uart_module.h" +#include "mcs_mtr_param.h" +/* Macro definitions --------------------------------------------------------------------------- */ +/* Constant value. */ +#define CONST_VALUE_60 60.0f /* Constant value 60. */ +#define CONST_VALUE_DIV_1000 0.001f /* Constant value 1/1000. */ + +/* Data array index. */ +#define DATA_SEGMENT_ONE 0 /* First element of the data segment */ +#define DATA_SEGMENT_TWO 1 /* Second element of the data segment */ +#define DATA_SEGMENT_THREE 2 /* Third element of the data segment */ +#define DATA_SEGMENT_FOUR 3 /* Fourth element of the data segment */ +#define CUSTACKCODELEN 10 /* Ack code length */ + +/* Command code. */ +#define SET_PID_KP 0x01 /* Set Pid Kp Command Params */ +#define SET_PID_KI 0x02 /* Set Pid Ki Command Params */ +#define SET_PID_LIMIT 0x03 /* Set Pid limit Command Params */ + +#define SET_SMO1TH_PLL_BDW 0x01 /* Set Smo1th Pll BandWidth Command Params */ +#define SET_SMO1TH_SPDFLITER_FC 0x02 /* Set Smo1th Fc Command Params */ +#define SET_SMO1TH_FILCOMPANGLE 0x03 /* Set Smo1th FillComp Command Params */ + +#define SET_SMO4TH_KD 0x01 /* Set Smo4th Kd Command Params */ +#define SET_SMO4TH_KP 0x02 /* Set Smo4th Kq Command Params */ + +#define SET_SPD_COMMAND_HZ 0x01 /* Set Target Speed Command Params */ +#define SET_SPD_RMG_SLOPE 0x02 /* Set Speed Slope Command Params */ + +#define SET_MAX_ELEC_SPD 0x01 /* Set Max Motor Speed Command Params */ +#define SET_MOTOR_NUM_OF_PAIRS 0x02 /* Set Motor Command Params */ + +#define SET_MOTOR_RES_OF_STATOR 0x01 /* Set Motor Res Command Params */ +#define SET_MOTOR_DAXIS_INDUCTANCE 0x02 /* Set Motor Daxis Inductance Command Params */ +#define SET_MOTOR_QAXIS_INDUCTANCE 0x03 /* Set Motor Qaxis Inductance Command Params */ + +#define SET_SVPWM_VOLTAGE_PER_UNIT 0x01 /* Set Svpwm Voltage Params */ +#define SET_ADC_CURRENT_SAMPLE_COFE 0x02 /* Set Adc coffe Params */ +#define SET_CURRENT_LOOP_CONTROL_PERIOD 0x03 /* Set Current loop period Command Params */ + +#define SET_IF_TARGET_CURRENT_VALUE 0x01 /* Set If Target Params */ +#define SET_INCREMENT_OF_IF_CURRENT 0x02 /* Set If Step Command Params */ +#define SET_SPEED_RING_BEGIN_SPEED 0x03 /* Set If to Smo Start Speed Command Params */ + +static unsigned char ackCode = 0; +static unsigned char g_uartTxBuf[CUSTACKCODELEN] = {0}; + +/** + * @brief Set observer type. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetObserverType(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + if (funcCode == FOC_OBSERVERTYPE_SMO1TH) { + ackCode = 0X01; + mtrCtrl->obserType = FOC_OBSERVERTYPE_SMO1TH; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->obserType); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH) { + ackCode = 0X02; + mtrCtrl->obserType = FOC_OBSERVERTYPE_SMO4TH; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->obserType); + } +} + +/** + * @brief Set pid parameter ack code. + * @param funcCode Received data funccode. + */ +static unsigned char SetPidAckCode(int funcCode) +{ + switch (funcCode) { + /* Set current loop D-Axis PID parameter ack code. */ + case FOC_CURDAXISPID_PARAMS: + ackCode = 0xE0; + break; + /* Set current loop Q-Axis PID parameter ack code. */ + case FOC_CURQAXISPID_PARAMS: + ackCode = 0xE3; + break; + /* Set speed loop PID parameter ack code. */ + case FOC_SPDPID_PARAMS: + ackCode = 0xE6; + break; + default: + break; + } + return ackCode; +} + +/** + * @brief Set pid parameters. + * @param pidHandle The pid control handle. + * @param rxData Receive buffer + */ +static void SetPidParams(PID_Handle *pidHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + switch (cmdCode) { + case SET_PID_KP: /* Set the P parameter. */ + PID_SetKp(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_KP), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_PID_KI: /* Set the I parameter. */ + PID_SetKi(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_KI), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_PID_LIMIT: /* Set the pid limit. */ + PID_SetLimit(pidHandle, rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = SetPidAckCode(funcCode); + CUST_AckCode(g_uartTxBuf, (unsigned char)(ackCode + SET_PID_LIMIT), rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set motor pid parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorPidParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_CURDAXISPID_PARAMS) { + SetPidParams(&mtrCtrl->currCtrl.dAxisPi, rxData); /* Set Curr loop Daxis pid params */ + } else if (funcCode == FOC_CURQAXISPID_PARAMS) { + SetPidParams(&mtrCtrl->currCtrl.qAxisPi, rxData); /* Set Curr loop Qaxis pid params */ + mtrCtrl->currCtrl.dAxisPi.upperLimit = mtrCtrl->currCtrl.qAxisPi.upperLimit; + mtrCtrl->currCtrl.dAxisPi.lowerLimit = mtrCtrl->currCtrl.qAxisPi.lowerLimit; + } else if (funcCode == FOC_SPDPID_PARAMS) { + SetPidParams(&mtrCtrl->spdCtrl.spdPi, rxData); /* Set Speed loop params */ + } +} + +/** + * @brief Set first order sliding mode observer parameters. + * @param smoHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo1thParams(FOSMO_Handle *smoHandle, CUSTDATATYPE_DEF *rxData) +{ + smoHandle->kSmo = rxData->data[DATA_SEGMENT_TWO].typeF; + ackCode = 0X09; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->kSmo); +} + +/** + * @brief Set first order sliding mode observer's phase-locked loop parameters. + * @param smoHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo1thPLLParams(FOSMO_Handle *smoHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SMO1TH_PLL_BDW: /* Set the bandwidth. */ + smoHandle->pll.pllBdw = rxData->data[DATA_SEGMENT_THREE].typeF; + smoHandle->pll.pi.kp = 2.0f * smoHandle->pll.pllBdw; /* kp = 2.0f * pllBdw */ + smoHandle->pll.pi.ki = smoHandle->pll.pllBdw * smoHandle->pll.pllBdw; /* ki = pllBdw * pllBdw */ + ackCode = 0X0A; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->pll.pllBdw); + break; + case SET_SMO1TH_SPDFLITER_FC: /* Set the cutoff frequency. */ + smoHandle->spdFilter.fc = rxData->data[DATA_SEGMENT_THREE].typeF; + smoHandle->spdFilter.a1 = 1.0f / (1.0f + DOUBLE_PI * smoHandle->spdFilter.fc * CTRL_CURR_PERIOD); + smoHandle->spdFilter.b1 = 1.0f - smoHandle->spdFilter.a1; + ackCode = 0X0B; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->spdFilter.fc); + break; + case SET_SMO1TH_FILCOMPANGLE: /* Set the compensation angle. */ + smoHandle->filCompAngle = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0C; + CUST_AckCode(g_uartTxBuf, ackCode, smoHandle->filCompAngle); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set fourth order sliding mode observer parameters. + * @param smo4thHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo4thParams(SMO4TH_Handle *smo4thHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SMO4TH_KD: /* Set d axis gain. */ + smo4thHandle->kd = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0D; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->kd); + break; + case SET_SMO4TH_KP: /* Set q axis gain. */ + smo4thHandle->kq = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X0E; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->kq); + break; + default: + break; + } +} + +/** + * @brief Set fourth order sliding mode observer's phase-locked loop parameters. + * @param smo4thHandle The observer control handle. + * @param rxData Receive buffer + */ +static void SetObserverSmo4thPLLParams(SMO4TH_Handle *smo4thHandle, CUSTDATATYPE_DEF *rxData) +{ + smo4thHandle->pll.pllBdw = rxData->data[DATA_SEGMENT_TWO].typeF; + smo4thHandle->pll.pi.kp = (2.0f) * smo4thHandle->pll.pllBdw; /* kp = 2.0f * pllBdw */ + smo4thHandle->pll.pi.ki = smo4thHandle->pll.pllBdw * smo4thHandle->pll.pllBdw; + ackCode = 0X11; + CUST_AckCode(g_uartTxBuf, ackCode, smo4thHandle->pll.pllBdw); +} + +/** + * @brief Set observer parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetObserverParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_OBSERVERTYPE_SMO1TH) { + SetObserverSmo1thParams(&mtrCtrl->smo, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO1TH_PLL) { + SetObserverSmo1thPLLParams(&mtrCtrl->smo, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH) { + SetObserverSmo4thParams(&mtrCtrl->smo4th, rxData); + } else if (funcCode == FOC_OBSERVERTYPE_SMO4TH_PLL) { + SetObserverSmo4thPLLParams(&mtrCtrl->smo4th, rxData); + } +} + +/** + * @brief Set motor speed and speed slope. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorSpdAndSlope(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SPD_COMMAND_HZ: /* Set target speed(hz). */ + mtrCtrl->spdCmdHz = rxData->data[DATA_SEGMENT_THREE].typeF * mtrCtrl->mtrParam.mtrNp / CONST_VALUE_60; + /* Judgement the value > 0.00001, make sure denominator != 0 */ + if (rxData->data[DATA_SEGMENT_FOUR].typeF > 0.00001f) { + mtrCtrl->spdRmg.delta = mtrCtrl->spdCmdHz / rxData->data[DATA_SEGMENT_FOUR].typeF * CTRL_SYSTICK_PERIOD; + } + ackCode = 0X16; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->spdCmdHz); + break; + case SET_SPD_RMG_SLOPE: /* Set speed slope. */ + mtrCtrl->spdRmg.delta = mtrCtrl->spdCmdHz / rxData->data[DATA_SEGMENT_THREE].typeF * CTRL_SYSTICK_PERIOD; + ackCode = 0X17; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set motor base parameters. + * @param mtrParamHandle The motor parameters handle. + * @param rxData Receive buffer + */ +static void SetMotorBaseParams(MOTOR_Param *mtrParamHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_MAX_ELEC_SPD: /* Set max electric speed. */ + mtrParamHandle->maxElecSpd = rxData->data[DATA_SEGMENT_THREE].typeF / + CONST_VALUE_60 * mtrParamHandle->mtrNp; + ackCode = 0X18; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_MOTOR_NUM_OF_PAIRS: /* Set the number of motor pole pairs. */ + mtrParamHandle->mtrNp = (unsigned short)(rxData->data[DATA_SEGMENT_THREE].typeF); + ackCode = 0X19; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrParamHandle->mtrNp); + break; + default: + break; + } +} + +/** + * @brief Set motor special parameters. + * @param mtrParamHandle The motor parameters handle. + * @param rxData Receive buffer + */ +static void SetMotorSpecialParams(MOTOR_Param *mtrParamHandle, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_MOTOR_RES_OF_STATOR: /* Set the resistor of stator. */ + mtrParamHandle->mtrRs = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1A; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrRs); + break; + case SET_MOTOR_DAXIS_INDUCTANCE: /* Set the d axis inductance. */ + mtrParamHandle->mtrLd = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1B; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrLd); + break; + case SET_MOTOR_QAXIS_INDUCTANCE: /* Set the q axis inductance. */ + mtrParamHandle->mtrLq = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1C; + CUST_AckCode(g_uartTxBuf, ackCode, mtrParamHandle->mtrLq); + break; + default: + ackCode = 0X77; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + break; + } +} + +/** + * @brief Set motor board parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void SetMotorBoardParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_SVPWM_VOLTAGE_PER_UNIT: /* Set svpwm voltage per unit. */ + mtrCtrl->sv.voltPu = rxData->data[DATA_SEGMENT_THREE].typeF * ONE_DIV_SQRT3; + mtrCtrl->currCtrl.outLimit = mtrCtrl->sv.voltPu * ONE_DIV_SQRT3; + ackCode = 0X1D; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + case SET_ADC_CURRENT_SAMPLE_COFE: /* Set adc current sample cofeature. */ + mtrCtrl->adcCurrCofe = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X1E; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->adcCurrCofe); + break; + case SET_CURRENT_LOOP_CONTROL_PERIOD: /* Set current loop control period. */ + mtrCtrl->currCtrlPeriod = 1 / rxData->data[DATA_SEGMENT_THREE].typeF * CONST_VALUE_DIV_1000; + ackCode = 0X1F; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set motor parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetMotorParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == MOTOR_PARAMS_BASE) { + SetMotorBaseParams(&mtrCtrl->mtrParam, rxData); + } else if (funcCode == MOTOR_PARAMS_SPECIAL) { + SetMotorSpecialParams(&mtrCtrl->mtrParam, rxData); + } else if (funcCode == MOTOR_PARAMS_BOARD) { + SetMotorBoardParams(mtrCtrl, rxData); + } +} + +/** + * @brief Motor start. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorStart(MTRCTRL_Handle *mtrCtrl) +{ + if (mtrCtrl->stateMachine != FSM_RUN) { + SysCmdStartSet(&mtrCtrl->statusReg); /* start motor. */ + mtrCtrl->motorStateFlag = 1; + ackCode = 0X24; /* send ackcode to host. */ + CUST_AckCode(g_uartTxBuf, ackCode, 1); + } +} + +/** + * @brief Motor stop. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorStop(MTRCTRL_Handle *mtrCtrl) +{ + SysCmdStopSet(&mtrCtrl->statusReg); + mtrCtrl->motorStateFlag = 0; + ackCode = 0X25; + CUST_AckCode(g_uartTxBuf, ackCode, 0); +} + +/** + * @brief Motor state reset. + * @param mtrCtrl The motor control handle. + */ +static void CMDCODE_MotorReset(MTRCTRL_Handle *mtrCtrl) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_SoftReset(); +} + +/** + * @brief Set IF-Startup parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void SetStartupIFParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get command code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + + switch (cmdCode) { + case SET_IF_TARGET_CURRENT_VALUE: /* Set I/F start up target current value. */ + mtrCtrl->ifCtrl.targetAmp = rxData->data[DATA_SEGMENT_THREE].typeF; + ackCode = 0X26; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->ifCtrl.targetAmp); + break; + case SET_INCREMENT_OF_IF_CURRENT: /* Set increment of I/F start up current. */ + mtrCtrl->ifCtrl.stepAmp = mtrCtrl->ifCtrl.targetAmp / rxData->data[DATA_SEGMENT_THREE].typeF * + CTRL_SYSTICK_PERIOD; + ackCode = 0X27; + CUST_AckCode(g_uartTxBuf, ackCode, mtrCtrl->ifCtrl.stepAmp); + break; + case SET_SPEED_RING_BEGIN_SPEED: /* Set speed ring begin speed. */ + mtrCtrl->startup.spdBegin = rxData->data[DATA_SEGMENT_THREE].typeF / + CONST_VALUE_60 * mtrCtrl->mtrParam.mtrNp; + ackCode = 0X28; + CUST_AckCode(g_uartTxBuf, ackCode, rxData->data[DATA_SEGMENT_THREE].typeF); + break; + default: + break; + } +} + +/** + * @brief Set start up parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetStartupParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + + if (funcCode == FOC_STARTUP_IF) { + SetStartupIFParams(mtrCtrl, rxData); + } +} + +/** + * @brief Set adjust speed mode. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_SetAdjustSpdMode(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + /* Get function code. */ + int funcCode = (int)(rxData->data[DATA_SEGMENT_ONE].typeF); + /* Get commond code. */ + int cmdCode = (int)(rxData->data[DATA_SEGMENT_TWO].typeF); + if (funcCode == HOST_SPEED_ADJUST) { + mtrCtrl->spdAdjustMode = HOST_SPEED_ADJUST; + /* Uart connect success. */ + mtrCtrl->uartConnectFlag = CONNECTING; + ackCode = 0X2A; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrCtrl->spdAdjustMode); + } else if (funcCode == CUST_SPEED_ADJUST) { + if (cmdCode == 1) { /* If uart connection disconnected & stop motor commond. */ + SysCmdStopSet(&mtrCtrl->statusReg); + mtrCtrl->motorStateFlag = 0; + } + mtrCtrl->spdAdjustMode = CUST_SPEED_ADJUST; + ackCode = 0X2B; + CUST_AckCode(g_uartTxBuf, ackCode, (float)mtrCtrl->spdAdjustMode); + /* Uart disconnect. */ + mtrCtrl->uartConnectFlag = DISCONNECT; + } +} + +/** + * @brief Check uart connect. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + */ +static void CMDCODE_UartHandShake(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData) +{ + CMDCODE_SetAdjustSpdMode(mtrCtrl, rxData); +} + +/** + * @brief Set Motor Initial Status Parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetMotorInitParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + switch (code) { + case CMDCODE_SET_OBSERVER_TYPE: { /* Set observer type. */ + CMDCODE_SetObserverType(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_PID_PARAMS: { /* Set motor pid parameters. */ + CMDCODE_SetMotorPidParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_OBSERVER_PARAMS: { /* Set observer parameters. */ + CMDCODE_SetObserverParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_MOTOR_TARGETSPD: { /* Set motor speed and speed slope. */ + CMDCODE_SetMotorSpdAndSlope(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_MOTOR_PARAMS: { /* Set motor parameters. */ + CMDCODE_SetMotorParams(mtrCtrl, rxData); + } + break; + case CMDCODE_SET_ADJUSTSPD_MODE: /* Set adjust speed mode. */ + CMDCODE_SetAdjustSpdMode(mtrCtrl, rxData); + break; + default: + break; + } +} + +/** + * @brief Set Motor Control System Status. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetMotorState(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + BASE_FUNC_UNUSED(rxData); + switch (code) { + case CMDCODE_MOTOR_START: { /* Motor start command */ + CMDCODE_MotorStart(mtrCtrl); + } + break; + case CMDCODE_MOTOR_STOP: { /* Motor stop command */ + CMDCODE_MotorStop(mtrCtrl); + } + break; + case CMDCODE_MOTORSTATE_RESET: { /* Motor reset command */ + CMDCODE_MotorReset(mtrCtrl); + } + break; + default: + break; + } +} + +/** + * @brief Set Startup and Uart Link Handshake Flag Parameters. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_SetOtherParams(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + switch (code) { + case CMDCODE_SET_STARTUP_PARAMS: /* Set start up parameters. */ + CMDCODE_SetStartupParams(mtrCtrl, rxData); + break; + case CMDCODE_UART_HANDSHAKE: { /* Check uart hand shake. */ + CMDCODE_UartHandShake(mtrCtrl, rxData); + } + break; + case CMDCODE_UART_HEARTDETECT: { /* Check uart hand shake. */ + mtrCtrl->uartHeartDetCnt++; + } + break; + default: + break; + } +} +/** + * @brief Instruction code executor. + * @param mtrCtrl The motor control handle. + * @param rxData Receive buffer + * @param code Instruction code. + */ +static void CMDCODE_EXE_Process(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *rxData, unsigned char code) +{ + CMDCODE_EXE_SetMotorInitParams(mtrCtrl, rxData, code); + CMDCODE_EXE_SetMotorState(mtrCtrl, rxData, code); + CMDCODE_EXE_SetOtherParams(mtrCtrl, rxData, code); +} + +/** + * @brief Host data download callback and data parsing. + * @param mtrCtrl The motor control handle. + * @param rxBuf Receive buffer + */ +void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(rxBuf != NULL); + + /* Uart data storage struct */ + CUSTDATATYPE_DEF data; + volatile unsigned char *ptrCnt = &rxBuf[FRAME_CHECK_BEGIN + 1]; + volatile unsigned char *strCnt = &data.data[0].typeCh[0]; + for (unsigned int j = 0; j < FRAME_RECV_DATA_LENTH * FRAME_ONE_DATA_LENTH; j++) { + *strCnt++ = *ptrCnt++; + } + /* Message function code. */ + data.code = rxBuf[FRAME_CHECK_BEGIN]; + CMDCODE_EXE_Process(mtrCtrl, &data, data.code); +} + +/** + * @brief The host computer displays data transmission. + * @param mtrCtrl The motor control handle. + * @param txData Message content. + * @param stage Message status function code. + */ +void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(txData != NULL); + if (mtrCtrl->stateMachine == FSM_IDLE) { + mtrCtrl->smo.spdEst = 0.0f; + } + /* Data send to host. */ + txData->data[CURRDQ_Q].typeF = mtrCtrl->idqFbk.q; + txData->data[CURRDQ_D].typeF = mtrCtrl->idqFbk.d; + txData->data[CURRREFDQ_Q].typeF = mtrCtrl->idqRef.q; + txData->data[CURRREFDQ_D].typeF = mtrCtrl->idqRef.d; + /* Motor current speed. */ + txData->data[CURRSPD].typeF = mtrCtrl->smo.spdEst * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + /* Motor commond speed. */ + txData->data[SPDCMDHZ].typeF = mtrCtrl->spdCmdHz * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + /* Bus voltage. */ + txData->data[UDC].typeF = mtrCtrl->udc; + /* Power board temprature. */ + txData->data[POWERBOARDTEMP].typeF = mtrCtrl->powerBoardTemp; + /* Motor protection status flag. */ + txData->data[CUST_ERR_CODE].typeI = mtrCtrl->prot.motorErrStatus.all; + /* Three phase current. */ + txData->data[CURRUVW_U].typeF = mtrCtrl->currUvw.u; + txData->data[CURRUVW_V].typeF = mtrCtrl->currUvw.v; + txData->data[CURRUVW_W].typeF = mtrCtrl->currUvw.w; + /* Three phase pwm duty. */ + txData->data[PWMDUTYUVW_U].typeF = mtrCtrl->dutyUvw.u; + txData->data[PWMDUTYUVW_V].typeF = mtrCtrl->dutyUvw.v; + txData->data[PWMDUTYUVW_W].typeF = mtrCtrl->dutyUvw.w; + /* Motor electric angle. */ + txData->data[AXISANGLE].typeF = mtrCtrl->axisAngle; + txData->data[VDQ_Q].typeF = mtrCtrl->vdqRef.q; + txData->data[VDQ_D].typeF = mtrCtrl->vdqRef.d; + txData->data[SPDREFHZ].typeF = mtrCtrl->spdRefHz * CONST_VALUE_60 / mtrCtrl->mtrParam.mtrNp; + txData->data[SENDTIMESTAMP].typeF = mtrCtrl->uartTimeStamp; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.h b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.h new file mode 100644 index 0000000000000000000000000000000000000000..60fe69bb966d5f398468c8093e266796391de4e5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/cust_process.h @@ -0,0 +1,36 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file cust_process.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McsMagicTag_HMI_MOUDLE_H +#define McsMagicTag_HMI_MOUDLE_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "protocol.h" +/* Typedef definitions ------------------------------------------------------------------------- */ + + +void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf); + +void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.c b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.c new file mode 100644 index 0000000000000000000000000000000000000000..58bf15a7071e2dbfbea0a799bfd5eebe2d9f8403 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.c @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file hmi_module.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of human-machine interface. + */ + +#include "hmi_module.h" +#include "mcs_assert.h" + +/** + * @brief HMI Initializatio. + * @retval None. + */ +void HMI_Init(void) +{ + UartRecvInit(); +} + +/** + * @brief HMI processing. + * @param mtrCtrl The motor control handle.. + * @retval None. + */ +void HMI_Process_Rx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UartModuleProcess_Rx(mtrCtrl); +} + +/** + * @brief HMI processing. + * @param mtrCtrl The motor control handle.. + * @retval None. + */ +void HMI_Process_Tx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + UartModuleProcess_Tx(mtrCtrl); +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.h b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.h new file mode 100644 index 0000000000000000000000000000000000000000..056f8d7310eb14335c256933e8d998bf09919cc6 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/hmi_module.h @@ -0,0 +1,37 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file hmi_module.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of system status. + */ + +/* Define to prevent recursive inclusion ------------------------------------------------------- */ +#ifndef McsMagicTag_HMI_MOUDLE_H +#define McsMagicTag_HMI_MOUDLE_H + +/* Includes ------------------------------------------------------------------------------------ */ +#include "uart_module.h" +/* Typedef definitions ------------------------------------------------------------------------- */ + + +void HMI_Init(void); + +void HMI_Process_Rx(MTRCTRL_Handle *mtrCtrl); +void HMI_Process_Tx(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.c b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.c new file mode 100644 index 0000000000000000000000000000000000000000..f655ada5ea8933139bd474281337ea5360a24fa4 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.c @@ -0,0 +1,174 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file protocol.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of port communication. + */ + +#include "protocol.h" +#include "apt.h" +#include "typedefs.h" +#include "main.h" +#include "mcs_assert.h" +#include "cust_process.h" + +/** + * @brief Callback function for receiving data analysis and processing. + * @param rxBuf Receive buffer. + */ +__weak void CUST_UartDataProcess(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_UNUSED(rxBuf); +} +/** + * @brief User-defined protocol message sending function (weak function). + * @param rxData Sending Messages.. + */ +__weak void CUST_SetTxMsg(MTRCTRL_Handle *mtrCtrl, CUSTDATATYPE_DEF *txData) +{ + BASE_FUNC_UNUSED(mtrCtrl); + BASE_FUNC_UNUSED(*txData); +} + +static void (*g_ptrDataProcess)(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) = CUST_UartDataProcess; + +/** + * @brief Frame checksum. + * @param ptr Pointer to the data to be checked + * @param num Number of bytes + * @retval unsigned char Checksum + */ +static unsigned char CheckSum(unsigned char *ptr, unsigned char num) +{ + unsigned char sum = 0; + unsigned char *p = ptr; + /* Calculate the sum of received data. */ + for (unsigned char i = 0; i < num; i++) { + sum += (unsigned char)*p; + p++; + } + return sum; +} + +/** + * @brief Transmitting Data Frames. + * @param mtrCtrl The motor control handle. + * @param txBuf Sending Messages. + */ +unsigned int CUST_TransmitData(MTRCTRL_Handle *mtrCtrl, unsigned char *txBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(txBuf != NULL); + unsigned int dataLen = FRAME_ONE_DATA_LENTH * SEND_FRAME_DATA_NUM; + unsigned char i = 0; + CUSTDATATYPE_DEF txData = {0}; + CUST_SetTxMsg(mtrCtrl, &txData); + txBuf[i++] = FRAME_START; + /* Message function code */ + txBuf[i++] = FRAME_SENT; + /* Message data */ + for (unsigned char x = 0; x < SEND_FRAME_DATA_NUM; x++) { + unsigned char floatIndex = 0; + unsigned char byteOffset = i; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + txBuf[x * FRAME_ONE_DATA_LENTH + byteOffset++] = txData.data[x].typeCh[floatIndex++]; + } + /* Message verification domain */ + txBuf[dataLen + i++] = CheckSum((unsigned char*)&txBuf[FRAME_CHECK_BEGIN], dataLen + 1); + /* End of Message */ + txBuf[dataLen + i++] = FRAME_END; + return dataLen + i; +} + +/** + * @brief Transmitting Data Frames. + * @param txBuf Sending Cust Ack Code. + * @param ackCode Ack Code. + * @param varParams Host set parameter. + */ +void CUST_AckCode(unsigned char *txBuf, unsigned char ackCode, float varParams) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(txBuf != NULL); + CUSTDATATYPE_DEF txData = {0}; + int dataIndex = 0; + unsigned int i = 0; + unsigned int txLen = 0; + unsigned char dataLen = FRAME_ONE_CHAR_LENTH + FRAME_ONE_DATA_LENTH; + + txData.data[0].typeF = varParams; + txBuf[i++] = FRAME_START; + /* Message function code */ + txBuf[i++] = FRAME_CUSTACK; + /* Message ack code */ + txBuf[i++] = ackCode; + /* Message data */ + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + txBuf[i++] = txData.data[0].typeCh[dataIndex++]; + + /* Message verification domain */ + txBuf[FRAME_ONE_CHAR_LENTH + i++] = CheckSum((unsigned char*)&txBuf[FRAME_CHECK_BEGIN], dataLen + 1); + /* End of Message */ + txBuf[FRAME_ONE_CHAR_LENTH + i++] = FRAME_END; + txLen = FRAME_ONE_CHAR_LENTH + i++; + HAL_UART_WriteIT(&g_uart0, txBuf, txLen); +} + +/** + * @brief Cust receive data process. + * @param mtrCtrl The motor control handle. + * @param rxBuf Receive buffer + */ +void CUST_DataReceProcss(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + MCS_ASSERT_PARAM(rxBuf != NULL); + unsigned char g_uartTxBuf[10] = {0}; + unsigned char ackCode = 0; + /* Frame header check */ + if (rxBuf[0] != FRAME_START) { + ackCode = 0X78; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } + /* Frame trailer check */ + if (rxBuf[FRAME_LENTH - 1] != FRAME_END) { + ackCode = 0X79; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } + /* Checksum */ + if (CheckSum((unsigned char*)&rxBuf[FRAME_CHECK_BEGIN], FRAME_CHECK_NUM) != rxBuf[FRAME_CHECKSUM]) { + ackCode = 0X7A; + CUST_AckCode(g_uartTxBuf, ackCode, 0); + return; + } else { + if (g_ptrDataProcess == NULL) { + return; + } else { + g_ptrDataProcess(mtrCtrl, rxBuf); + } + } +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.h b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.h new file mode 100644 index 0000000000000000000000000000000000000000..900a00d8065b0154f3883d213be12f63610d0be1 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/protocol.h @@ -0,0 +1,121 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file protocol.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of port communication. + */ +#ifndef McsMagicTag_PORTOCOL_H +#define McsMagicTag_PORTOCOL_H + +#include "uart.h" +#include "mcs_carrier.h" + +#define RS485_SEND_ENABLE GPIO6->GPIO_DATA[GPIO_PIN_7].reg = GPIO_PIN_7 +#define RS485_SEND_DISABLE GPIO6->GPIO_DATA[GPIO_PIN_7].reg = BASE_CFG_UNSET + +#define RX_BUF_LEN (16) +#define SEND_FRAME_DATA_NUM (CUSTDATA_MAX) +/* Service Uart0 Communication Deal */ +#define FRAME_ONE_DATA_LENTH 4 +#define FRAME_ONE_CHAR_LENTH 1 +#define FRAME_RECV_DATA_LENTH 4 +#define FRAME_LENTH 20 /* Data length */ +#define FRAME_SENT 0X8F +#define FRAME_CUSTACK 0X8A +#define FRAME_START 0x0F /* Start frame */ +#define FRAME_END '/' /* StOP frame */ +#define FRAME_CHECK_BEGIN 1 /* Check frame */ +#define FRAME_CHECKSUM 18 /* Check sum */ +#define FRAME_CHECK_NUM 17 +#define CMDCODE_IDLE_FRAME 0x55 /* Fill frame */ +#define CMDCODE_GET_MOTOR_PARAMS 0x01 +#define CMDCODE_SEND_MOTOR_PARAMS 0x02 +#define CMDCODE_SET_MOTOR_CTLMODE 0x03 +#define CMDCODE_SET_OBSERVER_TYPE 0x04 +#define CMDCODE_SET_STARTUP_MODE 0x05 +#define CMDCODE_SET_PID_PARAMS 0x06 +#define CMDCODE_SET_STARTUP_PARAMS 0x07 +#define CMDCODE_SET_OBSERVER_PARAMS 0x08 +#define CMDCODE_SET_MOTOR_TARGETSPD 0x09 +#define CMDCODE_SET_MOTOR_PARAMS 0x0A +#define CMDCODE_MOTOR_START 0x0B +#define CMDCODE_MOTOR_STOP 0x0C +#define CMDCODE_MOTORSTATE_RESET 0x0D +#define CMDCODE_SEND_FIRMVERSION 0x0E +#define CMDCODE_SET_ADJUSTSPD_MODE 0x11 +#define CMDCODE_UART_HANDSHAKE 0x12 +#define CMDCODE_UART_HEARTDETECT 0x13 + +typedef union { + unsigned char typeCh[4]; + float typeF; + int typeI; +} UNIONDATATYPE_DEF; + +typedef enum { + OFFLINE_RES = 0, + OFFLINE_LD, + OFFLINE_LQ, + OFFLINE_PSIF, + OFFLINE_JS, + OFFLINE_NP, + OFFLINE_B, + OFFLINE_KPD, + OFFLINE_KID, + OFFLINE_KPQ, + OFFLINE_KIQ, + OFFLINE_KPS, + OFFLINE_KIS, + OFFLINE_SPEED, + OFLINE_MAX +} OFFLINE_IDEN_TYPE; + +typedef enum { + CURRDQ_Q = 0, + CURRDQ_D, + CURRREFDQ_Q, + CURRREFDQ_D, + CURRSPD, + SPDCMDHZ, + UDC, + POWERBOARDTEMP, + CUST_ERR_CODE, + CURRUVW_U, + CURRUVW_V, + CURRUVW_W, + PWMDUTYUVW_U, + PWMDUTYUVW_V, + PWMDUTYUVW_W, + AXISANGLE, + VDQ_Q, + VDQ_D, + SPDREFHZ, + SENDTIMESTAMP, + CUSTDATA_MAX +} SENDTOHOSTPARAMS; + +typedef struct { + volatile unsigned char code; + volatile UNIONDATATYPE_DEF data[SEND_FRAME_DATA_NUM]; +} CUSTDATATYPE_DEF; + + +void CUST_DataReceProcss(MTRCTRL_Handle *mtrCtrl, unsigned char *rxBuf); +unsigned int CUST_TransmitData(MTRCTRL_Handle *mtrCtrl, unsigned char *txBuf); +void CUST_AckCode(unsigned char *txBuf, unsigned char ackCode, float varParams); +#endif /* McsMagicTag_PORTOCOL_H */ diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.c b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.c new file mode 100644 index 0000000000000000000000000000000000000000..6b231c02a247ba3ffc0c25cb9f5f680b2b3b92dd --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.c @@ -0,0 +1,198 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the + * following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file uart_module.c + * @author MCU Algorithm Team + * @brief This file provides functions declaration of Serial port communication. + */ +#include "uart_module.h" +#include "debug.h" +#include "main.h" +#include "baseinc.h" + +/* Buffer size */ +#define UI_TX_BUF_LEN (96) +#define UI_RX_BUF_LEN (96) + +/* Receiving Timeout Interval */ +#define UART_TIME_OUT_MS (100) + +/* Start sending data to host delay after uart connect success */ +#define UART_UPDATA_DELAY_TIME_MS (50) + +/* Uart baudrate */ +#define UART0BAUDRATE (1843200) + +/* Data buffer */ +unsigned char g_uartRxBuf[UI_RX_BUF_LEN] = {0}; +unsigned char g_uartTxBuf[UI_TX_BUF_LEN] = {0}; +static unsigned int getdeltaSystickCnt = 0; +static FRAME_Handle g_uartFrame; +/** + * @brief Receive Data Clear. + * @param uartFrame Receice Data. + */ +static void FrameRecvClear(FRAME_Handle *uartFrame) +{ + /* Clear buffer lenth. */ + uartFrame->buffLen = 0; + uartFrame->timeOutCnt = 0; + uartFrame->frameFlag = 0; + /* Clear received data lenth. */ + uartFrame->rxLen = 0; + /* Clear received flag. */ + uartFrame->rxFlag = 0; + uartFrame->upDataCnt = 0; +} + +/** + * @brief Set Dma status. + * @param mtrCtrl The motor control handle. + */ +static void SetUartDmaStatus(MTRCTRL_Handle *mtrCtrl) +{ + /* Delay 50ms start uart Tx DMA . */ + if (mtrCtrl->uartConnectFlag == CONNECTING && g_uartFrame.upDataDelayCnt++ > UART_UPDATA_DELAY_TIME_MS) { + g_uartFrame.txFlag = 1; /* Start send data flag. */ + mtrCtrl->uartConnectFlag = CONNECTED; + g_uartFrame.upDataDelayCnt = 0; + } + if (mtrCtrl->uartConnectFlag == DISCONNECT) { + g_uartFrame.txFlag = 0; /* Stop send data flag. */ + mtrCtrl->uartTimeStamp = 0; + } +} + +/** + * @brief Set uart baudRate. + * @param baudrate Uart baudRate. + */ +static void SetUartBaudRate(unsigned int baudrate) +{ + /* Re_Write uart0 baudrate. */ + g_uart0.baudRate = baudrate; + HAL_UART_Init(&g_uart0); +} + +/** + * @brief Uart Dma interupt callback func. + * @param null. + */ +void UART0_TXDMACallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + unsigned int getCurSystickCnt = 0; + static unsigned int getlastSystickCnt = 0; + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + g_uartFrame.txFlag = 1; + getCurSystickCnt = DCL_SYSTICK_GetTick(); + if (getlastSystickCnt != 0) { + /* Calculate unit frame data send time */ + getdeltaSystickCnt = getCurSystickCnt - getlastSystickCnt; + } + getlastSystickCnt = getCurSystickCnt; + /* USER CODE END UART0_WRITE_DMA_FINISH */ +} + +/** + * @brief Uart0 interruput Write CallBack Function. + * @param handle Uart handle. + */ +void UART0WriteInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + g_uartFrame.uartItTxFlag = 1; + g_uartFrame.txFlag = 1; + /* USER CODE END UART0_WRITE_IT_FINISH */ +} + +/** + * @brief Uart0 Interruput Read CallBack Function. + * @param handle Uart handle. + */ +void UART0ReadInterruptCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + if (g_uartFrame.rxLen >= UI_RX_BUF_LEN - 1) { + g_uartFrame.rxLen = 0; + } + HAL_UART_ReadIT(handle, &g_uartFrame.rxData, 1); + g_uartRxBuf[g_uartFrame.rxLen] = g_uartFrame.rxData; + g_uartFrame.rxLen++; + g_uartFrame.rxFlag = 1; + g_uartFrame.uartItTxFlag = 0; + return; + /* USER CODE END UART0_READ_IT_FINISH */ +} + +/** + * @brief Uart Read Data Init Function. + * @param void. + */ +void UartRecvInit(void) +{ + /* Uart reception initialization */ + FrameRecvClear(&g_uartFrame); + SetUartBaudRate(UART0BAUDRATE); + HAL_UART_ReadIT(&g_uart0, &g_uartFrame.rxData, 1); +} + +/** + * @brief Uart Read Data Process Function. + * @param mtrCtrl The motor control handle. + */ +void UartModuleProcess_Rx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + SetUartDmaStatus(mtrCtrl); + if (g_uartFrame.rxFlag == 1) { /* Receive data flag. */ + if (g_uartFrame.timeOutCnt++ > UART_TIME_OUT_MS) { + /* Received data from the host. */ + g_uartFrame.frameFlag = 1; + g_uartFrame.rxFlag = 0; + g_uartFrame.timeOutCnt = 0; + /* Execute data process. */ + CUST_DataReceProcss(mtrCtrl, g_uartRxBuf); + g_uartFrame.rxLen = 0; + } + } + g_uartFrame.frameFlag = 0; +} + +/** + * @brief Uart Write Data Process Function. + * @param mtrCtrl The motor control handle. + */ +void UartModuleProcess_Tx(MTRCTRL_Handle *mtrCtrl) +{ + /* Verify Parameters */ + MCS_ASSERT_PARAM(mtrCtrl != NULL); + if (g_uartFrame.txFlag == 1) { /* Send data flag. */ + mtrCtrl->uartTimeStamp = (float)getdeltaSystickCnt; /* Unit data time stamp */ + g_uartFrame.upDataCnt = 0; + g_uartFrame.txFlag = 0; + /* Send data to host. */ + unsigned int txLen = CUST_TransmitData(mtrCtrl, g_uartTxBuf); + /* If txIT mode send data finish, convert to DMA mode */ + if (g_uartFrame.uartItTxFlag == 1) { + HAL_UART_WriteDMA(&g_uart0, g_uartTxBuf, txLen); + } + } +} diff --git a/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.h b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.h new file mode 100644 index 0000000000000000000000000000000000000000..1b3588ea132e4bafdfa4e831b9e4e8b0ad4efdd2 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_qdm/user_interface/uart_module.h @@ -0,0 +1,46 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file uart_module.h + * @author MCU Algorithm Team + * @brief This file provides functions declaration of Serial port communication. + */ +#ifndef McsMagicTag_UART_MODULE_H +#define McsMagicTag_UART_MODULE_H + +#include "protocol.h" +#include "mcs_ctlmode_config.h" + +typedef struct { + unsigned int buffLen; + unsigned int timeOutCnt; + unsigned char frameFlag; + unsigned int rxLen; + unsigned char rxFlag; + unsigned char txFlag; + unsigned char rxData; + unsigned int upDataCnt; + unsigned int upDataDelayCnt; + unsigned char uartItTxFlag; +} FRAME_Handle; + + +void UartRecvInit(void); +void UartModuleProcess_Rx(MTRCTRL_Handle *mtrCtrl); +void UartModuleProcess_Tx(MTRCTRL_Handle *mtrCtrl); + +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a277dbdbabf26c12ab43e311c057956672b6bf62 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/feature.h @@ -0,0 +1,95 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +#define SPI_PARAM_CHECK MACRO_ENABLE + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..8f83557e573d81b81186d0e0ccfdad46695a4d19 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/main.h @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "spi.h" +#include "spi_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; +extern SPI_Handle g_spiSampleHandle; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..df36360ff147a0e3f16c28a088495f734327bf6f --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/generatecode/system_init.c @@ -0,0 +1,157 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +#define SPI1_FREQ_SCR 2 +#define SPI1_FREQ_CPSDVSR 50 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void SPI1_Init(void) +{ + HAL_CRG_IpEnableSet(SPI1_BASE, IP_CLK_ENABLE); /* SPI1 clock enable. */ + g_spiSampleHandle.baseAddress = SPI1; + + g_spiSampleHandle.mode = HAL_SPI_MASTER; + g_spiSampleHandle.csMode = SPI_CHIP_SELECT_MODE_INTERNAL; + g_spiSampleHandle.xFerMode = HAL_XFER_MODE_BLOCKING; + g_spiSampleHandle.clkPolarity = HAL_SPI_CLKPOL_0; + g_spiSampleHandle.clkPhase = HAL_SPI_CLKPHA_0; + g_spiSampleHandle.endian = HAL_SPI_BIG_ENDIAN; + g_spiSampleHandle.frameFormat = HAL_SPI_MODE_MOTOROLA; + g_spiSampleHandle.dataWidth = SPI_DATA_WIDTH_16BIT; + g_spiSampleHandle.freqScr = SPI1_FREQ_SCR; + g_spiSampleHandle.freqCpsdvsr = SPI1_FREQ_CPSDVSR; + g_spiSampleHandle.waitEn = BASE_CFG_DISABLE; + g_spiSampleHandle.waitVal = 127; /* 127 is microwire wait time */ + g_spiSampleHandle.rxBuff = NULL; + g_spiSampleHandle.txBuff = NULL; + g_spiSampleHandle.transferSize = 0; + g_spiSampleHandle.txCount = 0; + g_spiSampleHandle.rxCount = 0; + g_spiSampleHandle.state = HAL_SPI_STATE_RESET; + g_spiSampleHandle.rxIntSize = SPI_RX_INTERRUPT_SIZE_1; + g_spiSampleHandle.txIntSize = SPI_TX_INTERRUPT_SIZE_1; + g_spiSampleHandle.rxDMABurstSize = SPI_RX_DMA_BURST_SIZE_1; + g_spiSampleHandle.txDMABurstSize = SPI_TX_DMA_BURST_SIZE_1; + HAL_SPI_Init(&g_spiSampleHandle); + HAL_SPI_ChipSelectChannelSet(&g_spiSampleHandle, SPI_CHIP_SELECT_CHANNEL_1); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN15 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_SPI1_CSN0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_SPI1_CSN0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_SPI1_CSN0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_SPI1_CSN0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_SPI1_CSN0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN23 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_0_AS_SPI1_CLK); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_0_AS_SPI1_CLK, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_0_AS_SPI1_CLK, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_0_AS_SPI1_CLK, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_0_AS_SPI1_CLK, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN25 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_SPI1_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_SPI1_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_SPI1_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_SPI1_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_SPI1_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN24 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_1_AS_SPI1_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_1_AS_SPI1_RXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_1_AS_SPI1_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_1_AS_SPI1_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_1_AS_SPI1_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN26 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_3_AS_SPI1_CSN1); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_3_AS_SPI1_CSN1, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_3_AS_SPI1_CSN1, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_3_AS_SPI1_CSN1, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_3_AS_SPI1_CSN1, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + SPI1_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/main.c b/vendor/yibaina_3061M/demo/sample_spi_master/main.c new file mode 100644 index 0000000000000000000000000000000000000000..dd81830e629435cbaa3da7d920340ac64ed05389 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_spi_master.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +SPI_Handle g_spiSampleHandle; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + MasterTestSampleProcessing(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.c b/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.c new file mode 100644 index 0000000000000000000000000000000000000000..8929dd5c106de8fe2ebbfb798d4d5372b3087037 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.c @@ -0,0 +1,97 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_spi_master.c + * @author MCU Driver Team + * @brief Sample for SPI Module master. + * @details This sample demonstrates the use of HAL interfaces in the master mode. This sample uses the blocking mode. + * This sample must be connected to the slave device. + * This sample code corresponds to sample_spi_slave.c code. + * This sample sends 0x1001, 0x1002, 0x1003, 0x1004, 0x1005, 0x1006, and 0x1007 in polling mode. + * Print the received and sent data through the serial port. + */ +#include "main.h" +#include "spi.h" +#include "debug.h" +#include "sample_spi_master.h" + +#define MASTER_READ_TESE +#define MASTER_READ_WRITE_TESE +#define MASTER_WRITE_TESE + +#define USER_TIMEOUT 0x400 + +#define MANUAL_MODE_SET_CH0 0x1001 +#define MANUAL_MODE_SET_CH1 0x1002 +#define MANUAL_MODE_SET_CH2 0x1003 +#define MANUAL_MODE_SET_CH3 0x1004 +#define MANUAL_MODE_SET_CH4 0x1005 +#define MANUAL_MODE_SET_CH5 0x1006 +#define MANUAL_MODE_SET_CH6 0x1007 + +#define MAX_TIMEOUT_VAL 5000 + + +/** + * @brief Spi master sample processing. + * @param None. + * @retval None. + */ +void MasterTestSampleProcessing(void) +{ + unsigned short tempWdata[] = { + MANUAL_MODE_SET_CH0, + MANUAL_MODE_SET_CH1, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4, + MANUAL_MODE_SET_CH5, + MANUAL_MODE_SET_CH6, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4 + }; + unsigned short tempRdata[10] = {0}; + + SystemInit(); + while (1) { +#ifdef MASTER_WRITE_TESE + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempWdata[%d] = 0x%x \r\n", i, tempWdata[i]); + } + HAL_SPI_WriteBlocking(&g_spiSampleHandle, (unsigned char *)tempWdata, sizeof(tempWdata), MAX_TIMEOUT_VAL); +#endif + BASE_FUNC_DELAY_MS(300); /* Delay 300ms */ +#ifdef MASTER_READ_TESE + HAL_SPI_ReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, sizeof(tempRdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x \r\n", i, tempRdata[i]); + } +#endif + BASE_FUNC_DELAY_MS(20); /* Delay 20ms */ +#ifdef MASTER_READ_WRITE_TESE + HAL_SPI_WriteReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, + (unsigned char *)tempWdata, + sizeof(tempWdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x tempWdata[%d] = 0x%x \r\n", i, tempRdata[i], i, tempWdata[i]); + BASE_FUNC_DELAY_MS(10); /* Delay 10ms */ + } +#endif + BASE_FUNC_DELAY_MS(20); /* Delay 20ms */ + } +} diff --git a/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.h b/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.h new file mode 100644 index 0000000000000000000000000000000000000000..c354689127493d5297141084909266ac39695beb --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_master/sample_spi_master.h @@ -0,0 +1,28 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_spi_master.h + * @author MCU Driver Team + * @brief SPI module driver. + * @details This file provides sample code for users to help use + * the functionalities of the SPI. + */ +#ifndef McuMagicTag_SAMPLE_SPI_MASTER_H +#define McuMagicTag_SAMPLE_SPI_MASTER_H + +void MasterTestSampleProcessing(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a277dbdbabf26c12ab43e311c057956672b6bf62 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/feature.h @@ -0,0 +1,95 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +#define SPI_PARAM_CHECK MACRO_ENABLE + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..8f83557e573d81b81186d0e0ccfdad46695a4d19 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/main.h @@ -0,0 +1,57 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "spi.h" +#include "spi_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart0; +extern SPI_Handle g_spiSampleHandle; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..cbfca4eea47fd8229955904c03b0028819e5486b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/generatecode/system_init.c @@ -0,0 +1,157 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +#define SPI1_FREQ_SCR 2 +#define SPI1_FREQ_CPSDVSR 50 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void SPI1_Init(void) +{ + HAL_CRG_IpEnableSet(SPI1_BASE, IP_CLK_ENABLE); /* SPI1 clock enable. */ + g_spiSampleHandle.baseAddress = SPI1; + + g_spiSampleHandle.mode = HAL_SPI_SLAVE; + g_spiSampleHandle.csMode = SPI_CHIP_SELECT_MODE_INTERNAL; + g_spiSampleHandle.xFerMode = HAL_XFER_MODE_BLOCKING; + g_spiSampleHandle.clkPolarity = HAL_SPI_CLKPOL_0; + g_spiSampleHandle.clkPhase = HAL_SPI_CLKPHA_0; + g_spiSampleHandle.endian = HAL_SPI_BIG_ENDIAN; + g_spiSampleHandle.frameFormat = HAL_SPI_MODE_MOTOROLA; + g_spiSampleHandle.dataWidth = SPI_DATA_WIDTH_16BIT; + g_spiSampleHandle.freqScr = SPI1_FREQ_SCR; + g_spiSampleHandle.freqCpsdvsr = SPI1_FREQ_CPSDVSR; + g_spiSampleHandle.waitEn = BASE_CFG_DISABLE; + g_spiSampleHandle.waitVal = 127; /* 127 is microwire wait time */ + g_spiSampleHandle.rxBuff = NULL; + g_spiSampleHandle.txBuff = NULL; + g_spiSampleHandle.transferSize = 0; + g_spiSampleHandle.txCount = 0; + g_spiSampleHandle.rxCount = 0; + g_spiSampleHandle.state = HAL_SPI_STATE_RESET; + g_spiSampleHandle.rxIntSize = SPI_RX_INTERRUPT_SIZE_1; + g_spiSampleHandle.txIntSize = SPI_TX_INTERRUPT_SIZE_1; + g_spiSampleHandle.rxDMABurstSize = SPI_RX_DMA_BURST_SIZE_1; + g_spiSampleHandle.txDMABurstSize = SPI_TX_DMA_BURST_SIZE_1; + HAL_SPI_Init(&g_spiSampleHandle); + HAL_SPI_ChipSelectChannelSet(&g_spiSampleHandle, SPI_CHIP_SELECT_CHANNEL_1); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN15 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_SPI1_CSN0); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_SPI1_CSN0, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_SPI1_CSN0, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_SPI1_CSN0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_SPI1_CSN0, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN23 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_0_AS_SPI1_CLK); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_0_AS_SPI1_CLK, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_0_AS_SPI1_CLK, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_0_AS_SPI1_CLK, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_0_AS_SPI1_CLK, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN25 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_SPI1_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_SPI1_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_SPI1_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_SPI1_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_SPI1_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN24 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_1_AS_SPI1_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_1_AS_SPI1_RXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_1_AS_SPI1_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_1_AS_SPI1_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_1_AS_SPI1_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN26 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_3_AS_SPI1_CSN1); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_3_AS_SPI1_CSN1, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_3_AS_SPI1_CSN1, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_3_AS_SPI1_CSN1, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_3_AS_SPI1_CSN1, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + SPI1_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/main.c b/vendor/yibaina_3061M/demo/sample_spi_slave/main.c new file mode 100644 index 0000000000000000000000000000000000000000..0dbecf1375fa65e6cdf948070b22e93cfd7dcf18 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_spi_slave.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart0; +SPI_Handle g_spiSampleHandle; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + SlaveTestSampleProcessing(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.c b/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.c new file mode 100644 index 0000000000000000000000000000000000000000..e6957a578faa169caf3683166e43c9de479336a5 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.c @@ -0,0 +1,97 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_spi_slave.c + * @author MCU Driver Team + * @brief Sample for SPI Module slave. + * @details This sample demonstrates the use of HAL interfaces in the salve mode. This sample uses the blocking mode. + * This sample must be connected to the master device. + * This sample sends 0x1105, 0x1c20, 0x1183, 0x1285, 0x1240, 0x12c0, and 0x1340 in polling mode. + * Print the received and sent data through the serial port. + */ +#include "main.h" +#include "spi.h" +#include "debug.h" +#include "sample_spi_slave.h" + +#define SLAVE_READ_TESE +#define SLAVE_READ_WRITE_TESE +#define SLAVE_WRITE_TESE + +#define USER_TIMEOUT 0x400 + +#define MANUAL_MODE_SET_CH0 0x1105 +#define MANUAL_MODE_SET_CH1 0x1c20 +#define MANUAL_MODE_SET_CH2 0x1183 +#define MANUAL_MODE_SET_CH3 0x1285 +#define MANUAL_MODE_SET_CH4 0x1240 +#define MANUAL_MODE_SET_CH5 0x12C0 +#define MANUAL_MODE_SET_CH6 0x1340 + +#define MAX_TIMEOUT_VAL 5000 + + +/** + * @brief Spi slave sample processing. + * @param None. + * @retval None. + */ +void SlaveTestSampleProcessing(void) +{ + unsigned short tempWdata[] = { + MANUAL_MODE_SET_CH0, + MANUAL_MODE_SET_CH1, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4, + MANUAL_MODE_SET_CH5, + MANUAL_MODE_SET_CH6, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4 + }; + unsigned short tempRdata[10] = {0}; + + SystemInit(); + while (1) { +#ifdef SLAVE_READ_TESE + HAL_SPI_ReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, sizeof(tempRdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x \r\n", i, tempRdata[i]); + BASE_FUNC_DELAY_MS(10); /* Delay 10ms */ + } +#endif + +#ifdef SLAVE_WRITE_TESE + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempWdata[%d] = 0x%x \r\n", i, tempWdata[i]); + BASE_FUNC_DELAY_MS(10); /* Delay 10ms */ + } + HAL_SPI_WriteBlocking(&g_spiSampleHandle, (unsigned char *)tempWdata, sizeof(tempWdata), MAX_TIMEOUT_VAL); +#endif + +#ifdef SLAVE_READ_WRITE_TESE + HAL_SPI_WriteReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, + (unsigned char *)tempWdata, + sizeof(tempWdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x tempWdata[%d] = 0x%x \r\n", i, tempRdata[i], i, tempWdata[i]); + BASE_FUNC_DELAY_MS(10); /* Delay 10ms */ + } +#endif + } +} diff --git a/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.h b/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.h new file mode 100644 index 0000000000000000000000000000000000000000..d8995810a8db256734189d15488999d29b4d028e --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_spi_slave/sample_spi_slave.h @@ -0,0 +1,28 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_spi_slave.h + * @author MCU Driver Team + * @brief SPI module driver. + * @details This file provides sample code for users to help use + * the functionalities of the SPI. + */ +#ifndef McuMagicTag_SAMPLE_SPI_SLAVE_H +#define McuMagicTag_SAMPLE_SPI_SLAVE_H + +void SlaveTestSampleProcessing(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..641b1dde4ed4df6d8c1973284da377ba6ad0bfcb --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "timer.h" +#include "timer_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern TIMER_Handle g_timerHandle; +extern UART_Handle g_uart0Handle; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void TIMER0_InterruptProcess(void *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..de764ee880f18082c84fb67b220322d17b205d01 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/generatecode/system_init.c @@ -0,0 +1,122 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void TIMER0_InterruptProcess(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN TIMER0_InterruptProcess */ + /* USER CODE END TIMER0_InterruptProcess */ +} + +static void TIMER0_Init(void) +{ + HAL_CRG_IpEnableSet(TIMER0_BASE, IP_CLK_ENABLE); /* TIMER0 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER0) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 1000000; + + g_timerHandle.baseAddress = TIMER0; + g_timerHandle.load = load - 1; /* Set timer value immediately */ + g_timerHandle.bgLoad = load - 1; /* Set timer value */ + g_timerHandle.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timerHandle.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timerHandle.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timerHandle.interruptEn = BASE_CFG_ENABLE; + g_timerHandle.adcSocReqEnable = BASE_CFG_DISABLE; + g_timerHandle.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timerHandle); + IRQ_Register(IRQ_TIMER0, HAL_TIMER_IrqHandler, &g_timerHandle); + + HAL_TIMER_RegisterCallback(&g_timerHandle, TIMER_PERIOD_FIN, TIMER0_InterruptProcess); + IRQ_SetPriority(IRQ_TIMER0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER0); +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0Handle.baseAddress = UART0; + + g_uart0Handle.baudRate = UART0_BAND_RATE; + g_uart0Handle.dataLength = UART_DATALENGTH_8BIT; + g_uart0Handle.stopBits = UART_STOPBITS_ONE; + g_uart0Handle.parity = UART_PARITY_NONE; + g_uart0Handle.txMode = UART_MODE_BLOCKING; + g_uart0Handle.rxMode = UART_MODE_BLOCKING; + g_uart0Handle.fifoMode = BASE_CFG_ENABLE; + g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0Handle); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + TIMER0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/main.c b/vendor/yibaina_3061M/demo/sample_timer_interrupt/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b13509157258755e8ba1cb7369a5c9e92996307c --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_timer_interrupt.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +TIMER_Handle g_timerHandle; +UART_Handle g_uart0Handle; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + TIMER_SampleMain(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.c b/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.c new file mode 100644 index 0000000000000000000000000000000000000000..fb37568962d4e8801ff478e73aeb7fb877e52007 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.c @@ -0,0 +1,65 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_timer_interrupt.c + * @author MCU Driver Team + * @brief timer sample module. + * @details This file provides users with sample code to help use TIMER function: + * 1) TIMER runs period and triggers an interrupt every second. + * 2) Change the period during TIMER running + * Phenomenon: + * The interrupt handler is executed every 1 second, after 10 second, the interrupt handler execute + * every 0.5 second and print "In interrupt" on the serial port. + */ +#include "sample_timer_interrupt.h" + +void TIMER0_InterruptProcess(void *handle); + +/** + * @brief Timer run and triggers an interrupt. + * @param None. + * @retval None. + */ +void TIMER_SampleMain(void) +{ + TIMER_Handle timerHandle; + + SystemInit(); + DBG_PRINTF("TIMER_SampleMain begin\r\n"); + HAL_TIMER_Start(&g_timerHandle); + + BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */ + DBG_PRINTF("Change period of timer\r\n"); + timerHandle.baseAddress = g_timerHandle.baseAddress; + HAL_TIMER_GetConfig(&timerHandle); + timerHandle.bgLoad = HAL_CRG_GetIpFreq((void *)TIMER0) >> 1; + HAL_TIMER_Config(&timerHandle, TIMER_CFG_BGLOAD); +} + +/** + * @brief Timer Interrupt callback function + * @param handle Handle of Timer + * @retval None. + */ +void TIMER0_InterruptProcess(void *handle) +{ + /* USER CODE BEGIN TIMER0_InterruptProcess */ + TIMER_Handle *timerHandle = (TIMER_Handle *)handle; + BASE_FUNC_UNUSED(timerHandle); + DBG_PRINTF("In interrupt\r\n"); + /* USER CODE END TIMER0_InterruptProcess */ +} diff --git a/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.h b/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.h new file mode 100644 index 0000000000000000000000000000000000000000..d7beb574acc73bfdda6df2396f81d46b4d736f8a --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_timer_interrupt/sample_timer_interrupt.h @@ -0,0 +1,32 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_timer_interrupt.h + * @author MCU Driver Team + * @brief timer sample module. + * @details This file provides users with sample code to help use TIMER function: + * TIMER runs and triggers an interrupt. + */ +#ifndef SAMPLE_TIMER_INTERRUPT_H +#define SAMPLE_TIMER_INTERRUPT_H + +#include "debug.h" +#include "timer.h" +#include "main.h" + +void TIMER_SampleMain(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_uart/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_uart/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..4bf31e94802c8de9c395e44a493e2dd32bcf3053 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/generatecode/main.h @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void WriteCallBack(void *handle); +void ReadCallBack(void *handle); + +void UART0InterruptErrorCallback(void *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_uart/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..4ab870b7576c44223a29093d8e5abfbf4262ad06 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/generatecode/system_init.c @@ -0,0 +1,119 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +__weak void UART0InterruptErrorCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ +} + +__weak void WriteCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ +} + +__weak void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart.baseAddress = UART0; + + g_uart.baudRate = UART0_BAND_RATE; + g_uart.dataLength = UART_DATALENGTH_8BIT; + g_uart.stopBits = UART_STOPBITS_ONE; + g_uart.parity = UART_PARITY_NONE; + g_uart.txMode = UART_MODE_INTERRUPT; + g_uart.rxMode = UART_MODE_INTERRUPT; + g_uart.fifoMode = BASE_CFG_ENABLE; + g_uart.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart.hwFlowCtr = BASE_CFG_DISABLE; + g_uart.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart); + HAL_UART_RegisterCallBack(&g_uart, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_IT_FINISH, (UART_CallbackType)WriteCallBack); + HAL_UART_RegisterCallBack(&g_uart, UART_READ_IT_FINISH, (UART_CallbackType)ReadCallBack); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart); + IRQ_SetPriority(IRQ_UART0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_UART0); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + UART0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/main.c b/vendor/yibaina_3061M/demo/sample_uart/main.c new file mode 100644 index 0000000000000000000000000000000000000000..9b7f01cc4cdf7baa8a9a712e070054c887a7001b --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/main.c @@ -0,0 +1,58 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_uart_interrupt_tx_after_rx.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + UART_InterruptTxAfterRx(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.c b/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.c new file mode 100644 index 0000000000000000000000000000000000000000..51d36c033703549f462bedc51ab33b0058290fce --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.c @@ -0,0 +1,115 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_uart_interrupt_tx_after_rx.c + * @author MCU Driver Team + * @brief uart sample module. + * @details In interrupt mode, when the UART receives data from the peer end, the UART sends the received data to the + * peer end. The UART interrupt is triggered during the entire process of receiving and transmitting data. + * (1) Receive: The user needs to open the memory space. The start address of the memory and the length of + * character to be received are used as input parameters and transferred to HAL_UART_ReadIT(). The received + * data is stored in the cache. + * (2) Transmit: After receiving an interrupt, the data in the buffer is used as the data to be transmitted + * and is filled in HAL_UART_WriteIT(). + */ +#include "sample_uart_interrupt_tx_after_rx.h" + +static unsigned char g_str[15] = {0}; +static volatile unsigned int g_flag; +static unsigned int CountString(unsigned char *str); +static void ClearString(unsigned char *str); + +/** + * @brief User-defined read completion interrupt callback function. + * @param UART_Handle UART handle. + * @retval None. + */ +void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("Read Finish: %s\r\n", g_str); + g_flag = true; + return; +} + +/** + * @brief User-defined write completion interrupt callback function. + * @param UART_Handle UART handle. + * @retval None. + */ +void WriteCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("\r\nWrite Finish\r\n"); + return; +} + +/** + * @brief Count length of string. + * @param str, String to be cleared. + * @retval unsigned int, Character length. + */ +static unsigned int CountString(unsigned char *str) +{ + unsigned int ret; + if (str == NULL) { + return 0; + } + unsigned char *tmpStr = str; /* Cycle Count */ + for (ret = 0; *tmpStr != 0; tmpStr++) { + ret++; + } + return ret; +} + +/** + * @brief Clear string. + * @param str, String to be cleared. + * @retval None. + */ +static void ClearString(unsigned char *str) +{ + unsigned int len = CountString(str); + for (unsigned int i = 0; i < len; ++i) { + str[i] = 0; + } +} + +/** + * @brief UART interrupt receive sample code. + * @param None. + * @retval None. + */ +void UART_InterruptTxAfterRx(void) +{ + SystemInit(); + DBG_PRINTF("UART Init finish, please enter characters(length no more than 10):\r\n"); + unsigned int rxDataLength = 10; /* The receive length is 10 */ + g_flag = false; + HAL_UART_ReadIT(&g_uart, g_str, rxDataLength); + + while (1) { + if (g_flag == true) { + g_flag = false; + unsigned int txDataLength = CountString(g_str); /* string length of the data to be sent after receiving */ + HAL_UART_WriteIT(&g_uart, g_str, txDataLength); + ClearString(g_str); + HAL_UART_ReadIT(&g_uart, g_str, rxDataLength); + } + } + return; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.h b/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.h new file mode 100644 index 0000000000000000000000000000000000000000..f8f23aae865b352e8984a969ef93d7f42b5be417 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart/sample_uart_interrupt_tx_after_rx.h @@ -0,0 +1,33 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_uart_interrupt_tx_after_rx.h + * @author MCU Driver Team + * @brief uart sample module. + * @details This file provides sample code for users to help use + * the transmission of the UART in interrupt mode. + */ +#ifndef SAMPLE_UART_INTERRUPT_TX_AFTER_RX_H +#define SAMPLE_UART_INTERRUPT_TX_AFTER_RX_H + +#include "debug.h" +#include "uart.h" +#include "interrupt.h" +#include "main.h" + +void UART_InterruptTxAfterRx(void); +#endif \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/feature.h b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/feature.h new file mode 100644 index 0000000000000000000000000000000000000000..a1f9eb276a05eee970c2b38cac5d189c83d50342 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/feature.h @@ -0,0 +1,93 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file feature.h + * @author MCU Driver Team + * @brief This file contains macro configurations related to the project. This file is generated by the IDE tool. + */ + +#ifndef McuMagicTag_FEATURE_H +#define McuMagicTag_FEATURE_H + +/* Macro definitions --------------------------------------------------------- */ +#define CHIP_3061MNPICA MACRO_ENABLE + +#define MACRO_ENABLE 1 +#define MACRO_DISABLE 0 + +/* Macro switch */ +#define BASE_DEFINE_USE_ASSERT MACRO_ENABLE +#ifndef FLASH_CRC_CONFIG +#define FLASH_CRC_CONFIG +#endif /* #ifndef FLASH_CRC_CONFIG */ +#define BASE_MATH_SINCOS_MIDDLE_TABLE MACRO_ENABLE /**< This macro is used to control the table type when the + BASE_MATH_GetSinCos() queries the table. When the value of + this macro is MACRO_ENABLE, the error value obtained by the + BASE_MATH_GetSinCos() is relatively small, and the return + value of the function may be greater than or less than the + actual value. When the value of this macro is MACRO_DISABLE, + the error value obtained by the BASE_MATH_GetSinCos() is + relatively large. However, in the range [0°, 180°) and + [180°, 360°), the return value of the function is either + greater than or less than the actual value. */ + +/* Peripheral module macro switch--------------------------------------------- */ +#define BOARD_DIM_NUM 1 /**< Number of dimming handle arrays. */ + +#define BOARD_KEY_NUM 10 /**< Number of key handle arrays. */ +#define BOARD_KEY_PRESS_ON GPIO_HIGH_LEVEL /**< GPIO status corresponding to long press valid. */ +#define BOARD_KEY_PRESS_OFF GPIO_LOW_LEVEL /**< GPIO status corresponding to short press valid. */ + +#define BOARD_LED_SEG_NUM 4 /**< Number of segments. */ +#define BOARD_LED_SEGMENT_ON GPIO_HIGH_LEVEL /**< GPIO level status corresponding to valid segments. */ +#define BOARD_LED_SEGMENT_OFF GPIO_LOW_LEVEL /**< GPIO level status corresponding to invalid segments. */ + +#define BOARD_MKEY_SCHEME_NUMBER BOARD_MKEY_SCHEME_NUMBER_ONE /**< Define the scheme to be adopted. */ +#define BOARD_MKEY_OUT_NUM 4 /**< Number of GPIO pins used as output during scanning. */ +#define BOARD_MKEY_IN_NUM 4 /**< Number of GPIO pins used as input during scanning. */ +#define BOARD_MKEY_OUT_PIN_VALID GPIO_LOW_LEVEL /**< GPIO level status corresponding to the valid \ + status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_OUT_PIN_INVALID GPIO_HIGH_LEVEL /**< GPIO level status corresponding to the \ + invalid status of the output GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_VALID GPIO_LOW_LEVEL /**< Indicates the GPIO level corresponding to the \ + valid status of the input GPIO in the key matrix. */ +#define BOARD_MKEY_IN_PIN_INVALID GPIO_HIGH_LEVEL /**< Indicates the GPIO level corresponding to the \ + invalid status of the input GPIO in the key matrix. */ + +#define BOARD_PULSES_NUM 2 /**< Number of pulse handles. */ + +#define BASE_DEFINE_SLIPAVERAGE_NUM 2 /**< Sliding average array length. */ + +#define LISTNODE_MAX 20 + +#define BASE_DEFINE_DMA_QUICKSTART + +#define XTRAIL_FREQ 30000000U + +#define DBG_USE_NO_PRINTF 0U +#define DBG_USE_UART_PRINTF 1U + +#define DBG_PRINTF_USE DBG_USE_UART_PRINTF +#if (DBG_PRINTF_USE == DBG_USE_UART_PRINTF) +#define DBG_PRINTF_UART_PORT UART0 +#endif + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_FEATURE_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/main.h b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/main.h new file mode 100644 index 0000000000000000000000000000000000000000..61e2a3a4ecd467a3eaf04cef8d74c5ac855e1ae7 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/main.h @@ -0,0 +1,65 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.h + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +/* Define to prevent recursive inclusion ------------------------------------- */ +#ifndef McuMagicTag_SYSTEM_INIT_H +#define McuMagicTag_SYSTEM_INIT_H + +#include "uart.h" +#include "uart_ex.h" +#include "crg.h" +#include "dma.h" +#include "dma_ex.h" +#include "iocmg.h" + +#define IO_SPEED_FAST 0x00U +#define IO_SPEED_SLOW 0x01U + +#define IO_DRV_LEVEL4 0x00U +#define IO_DRV_LEVEL3 0x01U +#define IO_DRV_LEVEL2 0x02U +#define IO_DRV_LEVEL1 0x03U + +#define XTAL_DRV_LEVEL4 0x03U +#define XTAL_DRV_LEVEL3 0x02U +#define XTAL_DRV_LEVEL2 0x01U +#define XTAL_DRV_LEVEL1 0x00U + +extern UART_Handle g_uart; + +extern DMA_Handle g_dmac; + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect); +void SystemInit(void); + +void WriteFinish(void *handle); +void ReadCallBack(void *handle); + +void UART0InterruptErrorCallback(void *handle); + +void DMA_Channel3CallBack(void *handle); + +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* USER CODE END 0 */ + +#endif /* McuMagicTag_SYSTEM_INIT_H */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/system_init.c b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/system_init.c new file mode 100644 index 0000000000000000000000000000000000000000..99319ab38b3af8875618ab04c1df66f069322d56 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/generatecode/system_init.c @@ -0,0 +1,159 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file system_init.c + * @author MCU Driver Team + * @brief This file contains driver init functions. + */ + +#include "main.h" +#include "ioconfig.h" +#include "iocmg_ip.h" + +#define UART0_BAND_RATE 115200 + +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} + +static void DMA_Channel3Init(void *handle) +{ + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_UART0_TX; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_THREE); +} + +static void DMA_Init(void) +{ + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel3Init((void *)(&g_uart)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_THREE, DMA_PRIORITY_LOW); +} + +__weak void UART0InterruptErrorCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ +} + +__weak void DMA_Channel3CallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + /* USER CODE END UART0_WRITE_DMA_FINISH */ +} + +__weak void WriteFinish(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ +} + +__weak void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ +} + +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart.baseAddress = UART0; + + g_uart.baudRate = UART0_BAND_RATE; + g_uart.dataLength = UART_DATALENGTH_8BIT; + g_uart.stopBits = UART_STOPBITS_ONE; + g_uart.parity = UART_PARITY_NONE; + g_uart.txMode = UART_MODE_DMA; + g_uart.rxMode = UART_MODE_INTERRUPT; + g_uart.fifoMode = BASE_CFG_ENABLE; + g_uart.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart.hwFlowCtr = BASE_CFG_DISABLE; + g_uart.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart); + HAL_UART_RegisterCallBack(&g_uart, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart, UART_READ_IT_FINISH, (UART_CallbackType)ReadCallBack); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart); + IRQ_SetPriority(IRQ_UART0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_UART0); + g_uart.dmaHandle = &g_dmac; + g_uart.uartDmaTxChn = 3; + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_DMA_FINISH, (UART_CallbackType)DMA_Channel3CallBack); + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_IT_FINISH, (UART_CallbackType)WriteFinish); +} + +static void IOConfig(void) +{ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ +} + +void SystemInit(void) +{ + IOConfig(); + DMA_Init(); + UART0_Init(); + + /* USER CODE BEGIN system_init */ + /* USER CODE END system_init */ +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/main.c b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/main.c new file mode 100644 index 0000000000000000000000000000000000000000..55625e805566673a3292b398cc52237f7873cc83 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/main.c @@ -0,0 +1,59 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file main.c + * @author MCU Driver Team + * @brief Main program body. + */ + +#include "typedefs.h" +#include "feature.h" +#include "sample_uart_dma_tx_int_rx_simultaneously.h" +#include "main.h" +/* USER CODE BEGIN 0 */ +/* USER CODE 区域内代码不会被覆盖,区域外会被生成的默认代码覆盖(其余USER CODE 区域同理) */ +/* 建议用户放置头文件 */ +/* USER CODE END 0 */ +UART_Handle g_uart; +DMA_Handle g_dmac; +/* USER CODE BEGIN 1 */ +/* 建议用户定义全局变量、结构体、宏定义或函数声明等 */ +/* USER CODE END 1 */ + +int main(void) +{ + /* USER CODE BEGIN 2 */ + /* 建议用户放置初始化代码或启动代码等 */ + /* USER CODE END 2 */ + UART_DMATxAndINTRxSimultaneously(); + /* USER CODE BEGIN 3 */ + /* 建议用户放置初始配置代码 */ + /* USER CODE END 3 */ + while (1) { + /* USER CODE BEGIN 4 */ + /* 建议用户放置周期性执行代码 */ + /* USER CODE END 4 */ + } + /* USER CODE BEGIN 5 */ + /* 建议用户放置代码流程 */ + /* USER CODE END 5 */ + return BASE_STATUS_OK; +} + +/* USER CODE BEGIN 6 */ +/* 建议用户放置自定义函数 */ +/* USER CODE END 6 */ \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.c b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.c new file mode 100644 index 0000000000000000000000000000000000000000..890da75ca34d120dd73573ba9a594cbdfac91d68 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.c @@ -0,0 +1,115 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_uart_dma_tx_int_rx_simultaneously.c + * @author MCU Driver Team + * @brief uart sample module. + * @details Implements the interrupt and UART_DAM transmit and receive data simultaneously. + * During UART_DMA write, the interrupt can be read. + * (1) UART_DMA transmit data: The to-be-sent start address and character length are used as input + * parameters and transferred to HAL_UART_WriteDMA(). + * (2) Interrupt receive data: The start address and receive length are used as input parameters to + * HAL_UART_ReadIT(). + * (3) The example program continuously transmits UART_DMA and interrupts data reception. + * During the UART_DMA transmission process, interrupts can be received data. + */ + +#include "sample_uart_dma_tx_int_rx_simultaneously.h" + +#define RX_DATA_LENGTH 10 +#define TX_DATA_LENGTH 15 +#define REQUIRE_TIME 30 + +static unsigned char g_txStr[TX_DATA_LENGTH] = "123456789012345"; /* The transmit data length is 15 */ +static unsigned char g_rxStr[RX_DATA_LENGTH] = {0}; /* The receive data length is 10 */ +volatile bool txFlag = false; /* This parameter is frequently changed in + the main function and callback function, + indicating whether transmission is complete */ + +volatile bool rxFlag = false; /* This parameter is frequently changed in + the main function and callback function, + indicating whether reception is complete */ + +/** + * @brief Clear string. + * @param str, String to be cleared. + * @retval None. + */ +static void ClearString(unsigned char *str) +{ + for (unsigned int i = 0; i < RX_DATA_LENGTH; ++i) { + str[i] = 0; + } +} + +/** + * @brief User-defined write completion interrupt callback function. + * @param UART_Handle UART handle. + * @retval None. + */ +void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("\r\nRead Finish: %s\r\n", g_rxStr); + rxFlag = true; + return; +} + +/** + * @brief User-defined write completion DMA callback function. + * @param handle UART handle. + * @retval None. + */ +void DMA_Channel3CallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("\r\nwrite_finish\r\n"); + txFlag = true; + return; +} + +/** + * @brief UART DMA Tx and interrupt Rx simultaneously. + * @param None. + * @retval None. + */ +void UART_DMATxAndINTRxSimultaneously(void) +{ + SystemInit(); + DBG_PRINTF("UART Init finish, UART DMA Tx interrupt Rx simultaneously mode:\r\n"); + DBG_PRINTF("Tx transmits data 123456789012345, and Rx receives data with the length of 10 \r\n"); + + txFlag = true; /* Enable DMA transmission */ + rxFlag = true; /* Enable IT reception */ + while (1) { + if (txFlag) { + txFlag = false; + /* DMA transmit data */ + HAL_UART_WriteDMA(&g_uart, g_txStr, TX_DATA_LENGTH); + } + + if (rxFlag) { + rxFlag = false; + /* Clear the received data */ + ClearString(g_rxStr); + /* UART IT read: Length of the received data must be equal to the RX_DATA_LENGTH */ + HAL_UART_ReadIT(&g_uart, g_rxStr, RX_DATA_LENGTH); + } + BASE_FUNC_DELAY_MS(REQUIRE_TIME); /* Add a deletion delay as required */ + } + return; +} \ No newline at end of file diff --git a/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.h b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.h new file mode 100644 index 0000000000000000000000000000000000000000..b42b3ff96764e70951b7f361e67539f738ffd181 --- /dev/null +++ b/vendor/yibaina_3061M/demo/sample_uart_dmatx_intrx/sample_uart_dma_tx_int_rx_simultaneously.h @@ -0,0 +1,33 @@ +/** + * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved. + * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the + * following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the + * following disclaimer in the documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * @file sample_uart_dma_tx_int_rx_simultaneously.h + * @author MCU Driver Team + * @brief uart sample module. + * @details This file provides sample code for users to help use + * the transmission of the UART in DMA tx and interrupt rx simultaneously. + */ +#ifndef SAMPLE_UART_DMA_TX_INT_RX_SIMULTANEOUSLY_H +#define SAMPLE_UART_DMA_TX_INT_RX_SIMULTANEOUSLY_H + +#include "debug.h" +#include "uart.h" +#include "interrupt.h" +#include "main.h" + +void UART_DMATxAndINTRxSimultaneously(void); +#endif \ No newline at end of file diff --git "a/vendor/yibaina_3061M/demo/\345\256\236\351\252\214\346\214\207\345\257\274\346\211\213\345\206\214.md" "b/vendor/yibaina_3061M/demo/\345\256\236\351\252\214\346\214\207\345\257\274\346\211\213\345\206\214.md" new file mode 100644 index 0000000000000000000000000000000000000000..c99fd22fe0b980a04b899b3849b216d1eda72fee --- /dev/null +++ "b/vendor/yibaina_3061M/demo/\345\256\236\351\252\214\346\214\207\345\257\274\346\211\213\345\206\214.md" @@ -0,0 +1,4689 @@ +## 1、ACMP驱动章节 + +### 1.1比较器中断实验 + +#### 1.1.1实验目的 + +- 本实验主要通过会在ACMP0_OUT(GPIO0_7)输出输入源的比较结果,并调用触发相应的回调函数,通过串口输出触发的回调函数。 + + +#### 1.1.2实验要求 + +- 1.原理:ACMP即模拟比较器,基于比较两个模拟信号的大小,并输出一个数字信号来表示它们之间的关系。当输入信号大于参考信号时,模拟比较器输出高电平;反之,则输出低电平。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + + +#### 1.1.3接口函数说明 + +1.1.3.1HAL_ACMP_Init() + +| 定义: | BASE_StatusType HAL_ACMP_Init(ACMP_Handle *acmpHandle) | +| -------- | ------------------------------------------------------ | +| 功能: | 比较器HAL初始化 | +| 参数: | acmpHandle: ACMP 句柄,详细参考ACMP_Handle | +| 返回值: | BASE_StatusType | +| 依赖: | acmp.h | + +1.1.3.2HAL_ACMP_RegisterCallBack() + +| 定义: | BASE_StatusType HAL_ACMP_RegisterCallBack(ACMP_Handle *acmpHandle, ACMP_CallBackFun_Type typeID, ACMP_CallBackType callBackFunc) | +| :------- | ------------------------------------------------------------ | +| 功能: | 注册ACMP handle的回调函数 | +| 参数: | acmpHandle: ACMP 句柄,详细参考ACMP_Handle
typeID:用户回调函数类型
callBackFunc:用户回调功能 | +| 返回值: | BASE_STATUS_OK 成功
BASE_STATUS_ERROR 参数检查失败 | +| 依赖: | acmp.h
iocmg_ip.h | + +1.1.3.3HAL_ACMP_SetHystVol() + +| 定义: | void HAL_ACMP_SetHystVol(ACMP_Handle *acmpHandle, ACMP_HystVol voltage) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置迟滞电压 | +| 参数: | dacHandle: ACMP 句柄,详细参考ACMP_Handle
voltage:要设置迟滞电压,详细参考ACMP_HystVol | +| 返回值: | BASE_StatusType: OK, ERROR | +| 依赖: | acmp.h | + +1.1.3.4 HAL_ACMP_BlkingValid() + +| 定义: | void HAL_ACMP_BlkingValid(ACMP_Handle *acmpHandle) | +| -------- | -------------------------------------------------- | +| 功能: | 屏蔽使能配置 | +| 参数: | dacHandle: ACMP 句柄,详细参考ACMP_Handle | +| 返回值: | 无 | +| 依赖: | acmp.h | + +1.1.3.5 HAL_ACMP_ResultSelect() + +| 定义: | BASE_StatusType HAL_ACMP_ResultSelect(ACMP_Handle *acmpHandle, ACMP_ResultSelect resultSelect) | +| -------- | ------------------------------------------------------------ | +| 功能: | 比较输出结果选择 | +| 参数: | dacHandle: ACMP 句柄,详细参考ACMP_Handle
resultSelect:ACMP结果输出选项 | +| 返回值: | BASE_StatusType: OK, ERROR. | +| 依赖: | acmp.h | + + + +#### 1.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_acmp_interrupt文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 初始化ACMP,配置ACMP的N端和P端口输入,配置ACMP比较结果输出,管脚配置可以在ACMP配置界面中,配置“Input And Output Setting”进行更改。 + +- ACMP的比较结果输出,当配置的正端的电压值高于负端的电压值时输出高,反之则输出低。示例中输入源、输出的配置,可以通过ACMP的配置界面,或在“system_init.c”文件中修改ACMP初始化代码实现。 + +- 从原理图和用户手册可以分析出ACMP0_OUT对应的是GPIO0_7,ACMP_N3对应的是GPIO2_6,通过ACMP模拟比较器会在IOCMG_26输出输入源的比较结果,并调用触发相应的回调函数,核心代码如下方所示。 + + ``` + + static void ACMP0_Init(void) + { + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_SET; + HAL_ACMP_Init(&g_acmp0); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_POS_INT, ACMP0PositveCallFunc); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_NEG_INT, ACMP0NegativeCallFunc); + HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_EDGE_INT, ACMP0EdgedCallFunc); + IRQ_Register(IRQ_ACMP_INT, HAL_ACMP_IrqHandler, &g_acmp0); + IRQ_SetPriority(IRQ_ACMP_INT, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_ACMP_INT); + } + static void DAC0_Init(void) + { + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + g_dac0.dacValue = 250; + HAL_DAC_Init(&g_dac0); + } + void ACMP0PositveCallFunc(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0PositveCallFunc */ + DBG_PRINTF("ACMP positive callback function.\r\n"); + /* USER CODE END ACMP0PositveCallFunc */ + } + + /** + * @brief ACMP Negative Callback function. + * @param handle ACMP handle. + * @retval None. + */ + void ACMP0NegativeCallFunc(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0NegativeCallFunc */ + DBG_PRINTF("ACMP negative callback function.\r\n"); + /* USER CODE END ACMP0NegativeCallFunc */ + } + /** + * @brief ACMP Edge callback function. + * @param handle ACMP handle. + * @retval None. + */ + void ACMP0EdgedCallFunc(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ACMP0EdgedCallFunc */ + DBG_PRINTF("ACMP edge callback funtion.\r\n"); + /* USER CODE END ACMP0EdgedCallFunc */ + } + + + + + ``` + +- 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 1.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据。N极对应的是GPIO2_6,将N极接地,P极由内部DAC提供电压(0.8v),P极就大于N极,会触发正向回调函数。通过串口输出“ACMP positive callback function”与“ACMP edge callback funtion”,可以看出成功调用了正向回调函数和边缘回调函数,输出比较结果为上升沿。说明ACMP比较器中断驱动实验成功。 + +#### 1.1.6扩展实验 + +- 本实验学习使用ACMP比较器中断实验,请学生做如下实验: + - 将GPIO2_6接3.3V,查看是否会触发回调函数。 + - 提示: + + - 输入的比较电压不能超过0V~输入电源大小(3.3V)。 + - 最小可识别有效差分输入电压为20mV。 + + + +### 1.2模拟比较器基本使用 - 内部DAC输出电压和外部输入电压比较 + +#### 1.2.1实验目的 + +- 通过设置输入的P端信号为DAC的内部输出来,设置N端输入端的信号为GPIO2_6,对两个输入源进行电压比较,最后GPIO0_7输出比较结果。 + + +#### 1.2.2实验要求 + +- 1.原理:ACMP即模拟比较器,基于比较两个模拟信号的大小,并输出一个数字信号来表示它们之间的关系。当输入信号大于参考信号时,模拟比较器输出高电平;反之,则输出低电平 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +- 3.工具要求:万用表 + + ![](../../../docs/pic/2184d50a74a46c4b3f78d540e615810.png) + + + +#### 1.2.3核心函数说明 + +ACMP接口说明请参考该手册1.1.3.1、1.1.3.2、1.1.3.3、1.1.3.4、1.1.3.5。 + +#### 1.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_acmp_out_result文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- ACMP的输入比较信号,可在ACMP配置界面中,配置“Input And Output Setting”进行更改。 + +- 当配置的正端的电压值高于负端的电压值时输出高,反之则输出低。示例中输入源、输出的配置,可以通过ACMP的配置界面,或在“system_init.c”文件中修改ACMP初始化代码实现。 + +- 从原理图和用户手册可以分析出ACMP0_OUT对应的是GPIO0_7,ACMP_N3对应的是GPIO2_6,通过ACMP模拟比较器会在输入的N端信号为DAC的内部输出,输入的P端信号为GPIO2_6,在GPIO0_7中输出比较结 果。核心代码如下方所示。 + + ``` + + static void ACMP0_Init(void) + { + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_UNSET; + HAL_ACMP_Init(&g_acmp0); + } + + static void DAC0_Init(void) + { + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + g_dac0.dacValue = 250; + HAL_DAC_Init(&g_dac0); + } + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + - 步骤五:用万用表检测GPIO0_7引脚的电压 + + +#### 1.2.5实验结果 + +- 烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据。N极接地,P极输入源从DAC输出(0.8V),P极电压大于N极电压,最后GPIO0_7结果输出3.3V电压。 + + +![1726194824764](../../../docs/pic/1726194824764.jpg) + +![1726194869607](../../../docs/pic/1726194869607.jpg) + + + +#### 1.2.6扩展实验 + +- 本实验学习使用ACMP比较器中断实验,请学生做如下实验: + - 交换N端口输入电压,并测量输出端的电压,比较输入源的电压大小。 + + 提示: + + - 输入的比较电压不能超过0V~输入电源大小(3.3V)。 + - 最小可识别有效差分输入电压为20mV。 + +## 2、APT驱动章节 + +### 2.1高级脉宽调制PWM-单电阻采样电机控制 + +#### 2.1.1实验目的 + +- 通过配置APT模块来控制PWM波的输出,查看其生成的波形,并观察其计数方向的变化,还有死区的时间。 + +#### 2.1.2实验要求 + +- 1.原理:APT 为高级 PWM 定时器模块,APT模块通过高级PWM信号的产生与调节,结合单电阻采样技术,实现对电机的精确速度控制和电流采样,从而优化电机的性能和效率。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + - 3.工具需求:示波器 + + +#### 2.1.3核心函数说明 + +2.1.3.1 HAL_APT_MasterSyncInit() + +| 定义: | BASE_StatusType HAL_APT_MasterSyncInit(APT_Handle *aptHandle, unsigned short syncOutSrc) | +| -------- | ------------------------------------------------------------ | +| 功能: | 使用多重同步模式时,初始化主APT模块。 | +| 参数: | aptHandle:APT_Handle句柄,详细参考APT_Handle
syncOutSrc:主APT模块同步源。 | +| 返回值: | BASE_StatusType: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | apt.h | + +2.1.3.2 HAL_APT_SlaveSyncInit() + +| 定义: | BASE_StatusType HAL_APT_SlaveSyncInit(APT_Handle *aptHandle, APT_SlaveSyncIn *slaveSyncIn) | +| -------- | ------------------------------------------------------------ | +| 功能: | 初始化从属APT模块。 | +| 参数: | aptHandle:APT_Handle句柄,详细参考APT_Handle
slaveSyncIn:从属APT模块同步handle | +| 返回值: | BASE_StatusType: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | apt.h | + +2.1.3.3 HAL_APT_StopModule() + +| 定义: | void HAL_APT_StopModule(unsigned int aptRunMask) | +| -------- | -------------------------------------------------- | +| 功能: | 同时停止所有已使用的APT模块。 | +| 参数: | aptRunMask:可以作为aptRunMask传递的有效值的逻辑OR | +| 返回值: | void | +| 依赖: | apt.h | + +2.1.3.4 HAL_APT_SetPWMDutyByNumber() + +| 定义: | BASE_StatusType HAL_APT_SetPWMDutyByNumber(APT_Handle *aptHandle, unsigned int duty) | +| -------- | ------------------------------------------------------------ | +| 功能: | 沿PWM波形的左右边缘设置计数比较点。修改占空比 | +| 参数: | aptHandle:APT_Handle句柄,详细参考APT_Handle
duty:PWM占空比。范围:1~99。 | +| 返回值: | BASE_StatusType: OK, ERROR, BUSY, TIMEOUT | +| 依赖: | apt.h | + +2.1.3.5 HAL_APT_ProtectInitEx() + +| 定义: | BASE_StatusType HAL_APT_ProtectInitEx(APT_Handle *aptHandle, APT_OutCtrlProtectEx *protect) | +| -------- | ------------------------------------------------------------ | +| 功能: | 初始化APT模块(扩展接口)的输出控制保护事件。 | +| 参数: | aptHandle:APT_Handle句柄,详细参考APT_Handle
protect:输出控制保护事件数据。 | +| 返回值: | BASE_StatusType: OK, ERROR, BUSY, TIMEOUT | +| 依赖: | apt.h
apt_ip.h | + +#### 2.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_apt_single_resistor文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 通过配置APT0,APT1和APT2来配置U,V,W相的互补PWM波。APT0、APT1、APT2的配置分别对应U、V、W相的互补PWM波。 + +- PWM输出保护,三相PWM输出都配置了保护时间,分别为指定管脚拉高保护,调试模式保护,时钟错误保护,内存泄漏保护。 + +- 以上配置可通过APT配置界面进行更改,或在“system_init.c”中更改APT对应的配置。 + + - 从原理图和用户手册可以分析出APT 分 A、B 两组,GPIO3_0对应的是APT0_PWMA,GPIO3_1对应的是APT1_PWMA,GPIO3_2对应的是APT2_PWMA,GPIO4_0对应的是APT0_PWMB,GPIO4_1对应的是APT1_PWMB,GPIO4_2对应的是APT2_PWMB。同一对 APT(如 APT0_PWMA 和 APT0_PWMB)接同一相电源控制,便于死区时间控制,核心代码如下方所示。 + + ``` + + __weak void AptUEventCallback(void *aptHandle) + { + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_EVENT_INTERRUPT */ + /* USER CODE END APT0_EVENT_INTERRUPT */ + } + __weak void AptUTimerCallback(void *aptHandle) + { + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_TIMER_INTERRUPT */ + /* USER CODE END APT0_TIMER_INTERRUPT */ + } + static void APT0_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_ENABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptU, &protectApt); + } + static void APT0_Init(void) + { + HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE); + g_hAptU.baseAddress = APT0; + /* Clock Settings */ + g_hAptU.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptU.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptU.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_hAptU.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptU.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptU.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptU.waveform.divInitVal = 0; + g_hAptU.waveform.cntInitVal = 0; + g_hAptU.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptU.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptU.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptU.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptU.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + /* ADC Trigger SOCA */ + g_hAptU.adcTrg.trgEnSOCA = BASE_CFG_ENABLE; + g_hAptU.adcTrg.cntCmpSOCA = 1; /* 1 is count compare point of ADC trigger source SOCA when using CMPA */ + g_hAptU.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_UP; + g_hAptU.adcTrg.trgScaleSOCA = 1; + /* ADC Trigger SOCB */ + g_hAptU.adcTrg.trgEnSOCB = BASE_CFG_ENABLE; + g_hAptU.adcTrg.cntCmpSOCB = 1; + g_hAptU.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_UP; + g_hAptU.adcTrg.trgScaleSOCB = 1; + g_hAptU.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptU.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + /* Timer Trigger */ + g_hAptU.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE; + g_hAptU.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO_PERIOD; + g_hAptU.tmrInterrupt.tmrInterruptScale = 1; + APT0_ProtectInit(); + HAL_APT_PWMInit(&g_hAptU); + HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback); + IRQ_SetPriority(IRQ_APT0_EVT, 1); /* 1 is priority value */ + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU); + IRQ_EnableN(IRQ_APT0_EVT); + HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback); + IRQ_SetPriority(IRQ_APT0_TMR, 1); /* 1 is priority value */ + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU); + IRQ_EnableN(IRQ_APT0_TMR); + } + static void APT1_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptV, &protectApt); + } + static void APT1_Init(void) + { + HAL_CRG_IpEnableSet(APT1_BASE, IP_CLK_ENABLE); + g_hAptV.baseAddress = APT1; + /* Clock Settings */ + g_hAptV.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptV.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptV.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_hAptV.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptV.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptV.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptV.waveform.divInitVal = 0; + g_hAptV.waveform.cntInitVal = 0; + g_hAptV.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptV.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptV.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptV.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptV.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + APT1_ProtectInit(); + HAL_APT_PWMInit(&g_hAptV); + } + static void APT2_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_hAptW, &protectApt); + } + static void APT2_Init(void) + { + HAL_CRG_IpEnableSet(APT2_BASE, IP_CLK_ENABLE); + g_hAptW.baseAddress = APT2; + /* Clock Settings */ + g_hAptW.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_hAptW.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */ + g_hAptW.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_hAptW.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH; + g_hAptW.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptW.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_hAptW.waveform.divInitVal = 0; + g_hAptW.waveform.cntInitVal = 0; + g_hAptW.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */ + g_hAptW.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */ + g_hAptW.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_hAptW.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_hAptW.waveform.deadBandCnt = 10; /* 10 is dead-band value */ + APT2_ProtectInit(); + HAL_APT_PWMInit(&g_hAptW); + } + + void AptUTimerCallback(void *aptHandle) + { + APT_Handle *handle = (APT_Handle *)aptHandle; + /* read counter direction */ + if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_DOWN) { + DBG_PRINTF("Count Down\r\n"); + } else if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_UP) { + DBG_PRINTF("Count Up\r\n"); + } + } + + /** + * @brief Interrupt initialization of U phase APT. + * @retval None. + */ + static void InterruptInitAptU(void) + { + /* Timer interrupt and event interrupt of U phase APT module. */ + IRQ_SetPriority(APT_U_EVT_IRQ, EVT_INTERRUPT_PRIORITY); + IRQ_SetPriority(APT_U_TMR_IRQ, TMR_INTERRUPT_PRIORITY); + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU); + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU); + IRQ_EnableN(APT_U_EVT_IRQ); + IRQ_EnableN(APT_U_TMR_IRQ); + HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback); + HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback); + } + + /** + * @brief Modify the ADC trigger time of master APT module (U phase). + * @param cntCmpSOCA Count compare value of SOCA. + * @param cntCmpSOCB Counnt compare value of SOCB. + * @retval None. + */ + void APT_SetADCTrgTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB, ADC_SampleMode mode) + { + /* AptU use CMPA and CMPB as the trigger source of SOCA and SOCB. */ + /* SOCA is used to trigger 1st ADC sampling when using single resistor sampling. */ + /* SOCB is used to trigger 2nd ADC sampling when using single resistor sampling. */ + if (mode == ADC_SINGLE_RESISTOR) { + HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB); + } else { + HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB); + HAL_APT_SetADCTriggerTime(&g_hAptV, cntCmpSOCA, cntCmpSOCB); + HAL_APT_SetADCTriggerTime(&g_hAptW, cntCmpSOCA, cntCmpSOCB); + } + } + + /** + * @brief PWM waveform output control. + * @param enable pwm waveform output enable. + * @retval None. + */ + void APT_PhaseOut(bool enable) + { + if (enable == true) { + /* Enable PWM U waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B); + /* Enable PWM V waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B); + /* Enable PWM W waveform output. */ + DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A); + DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B); + } else { + /* Disable PWM U waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_U); + /* Disable PWM V waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_V); + /* Disable PWM W waveform output. */ + DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A); + DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B); + DCL_APT_ForcePWMOutputLow(APT_W); + } + } + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + - 步骤五:用示波器接APT0_PWMA(GPIO3_0)、APT1_PWMA(GPIO3_1)、APT2_PWMA(GPIO3_2). + + ![](../../../docs/pic/1728366653229.png) + + +#### 2.1.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据。通过串口打印可以看出U相APT模块的定时器中断回调一直在触发,然后判断计数方向是向上还是向下,上升就触发ADC采样然后打印"Count Up",下降就打印"Count Dowm"。通过示波器能够观察到,APT0/1/2的A/B两路都有PWM波的输出,且A/B两路输出的波形互补,死区的宽度:插入死区的宽度 = 工作时钟周期 * 死区延时计数值,计算出来是66.7ns,示波器测试出来是65ns,在合理误差内,实验成功。 + +![1726194906962](../../../docs/pic/1726194906962.jpg) ![](./pic/1728366087056.png) + + ![](../../../docs/pic/1728366261828.png) ![](../../../docs/pic/1728367351847.png) + +#### 2.1.6扩展实验 + +本实验学习使用高级脉宽调制PWM-单电阻采样电机控制实验,请学生做如下实验: + +- 修改占空比,观察其现象。 + + 提示: + + - 占空比可通过“HAL_APT_SetPWMDutyByNumber”进行更改 + - 分频器的分频系数的范围为 0到4095,计数器的计数周期值的范围为 0到65535。死区延时计数值范围 0到65535。 + - PWM 波的频率: + + ```c + ①递增/递减计时模式,PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值+1)); + ②先增后减计时模式,PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值*2))。 + ``` + + - 死区的宽度:插入死区的宽度 = 工作时钟周期 * 死区延时计数值。 + + + +## 3、CAN驱动章节 + +### 3.1 控制局域网-发送扩展数据帧和接收符合过滤规则的扩展帧数据 + +#### 3.1.1实验目的 + +- 测试和验证CAN总线通信的硬件接口和软件驱动程序是否能够正确地发送和接收数据 + +#### 3.1.2实验要求 + +- 1.原理:CAN总线是一种用于实时应用的串行通信协议总线,CAN总线中的数据传输通过帧的方式进行,帧类型包括数据帧、远程帧、错误帧和过载帧。数据帧负责数据从发送器到接收器的传输,远程帧用于请求相同数据,错误帧在检测到总线错误时发出,过载帧提供两数据帧或远程帧之间的延时。 + +- 2.硬件要求:Hi3061M核心板;CAN接收器;CAN transceiver; + + ![](../../../docs/pic/image-20240829165616356.png) + + ![](../../../docs/pic/1728380911855.png) + + + +![](../../../docs/pic/1728380940373.png) + +#### 3.1.3核心函数说明 + +3.1.3.1 HAL_CAN_Write() + +| 定义: | BASE_StatusType HAL_CAN_Write(CAN_Handle *canHandle, CANFrame *data) | +| -------- | ------------------------------------------------------------ | +| 功能: | 立即发送数据 | +| 参数: | canHandle:CAN_Handle类型变量
data:待发送CAN数据帧的指针地址 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT | +| 依赖: | can.h | + +3.1.3.2 HAL_CAN_ReadIT() + +| 定义: | BASE_StatusType HAL_CAN_ReadIT(CAN_Handle *canHandle, CANFrame *data, CAN_FilterConfigure *filterConfigure) | +| -------- | ------------------------------------------------------------ | +| 功能: | 异步接收CAN数据帧 | +| 参数: | canHandle:CAN_Handle类型变量
data:用于存储CAN数据帧的地址
filterConfigure:过滤配置的处理, | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT | +| 依赖: | can.h | + +#### 3.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_can_send_receive文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体流程:通过g_can.typeMode配置CAN的工作模式,配置CAN的传输波特率,接收FIFO的深度以及否开启自动重传 + +- 发送数据帧g_sendFrame:分配发送数据帧的类型为扩展帧,指定发送帧的ID,填入需要发送的数据和长度,调用“HAL_CAN_Write”函数进行数据的发送。发送成功之后会调用回调函数“Can_WriteFinish”,此回调函数可以通过“HAL_CAN_RegisterCallBack”进行注册。 + +- 接收数据帧g_receiveFrame: 存储接收到的数据,会存入接收到的帧类型,帧ID,帧数据域。 + +- 过滤条件rxFilter:配置过滤的帧类型和过滤ID和过滤掩码。并通过“HAL_CAN_ReadIT”使过滤规则生效,接收成功之后,会调用接收成功回调函数“Can_ReadFinish”,此回调函数也可以通过“HAL_CAN_RegisterCallBack”进行注册。 + +- 核心代码如下方所示。 + + ``` + + __weak void CAN_ReadFinish(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_READ_FINISH */ + /* USER CODE END CAN_READ_FINISH */ + } + __weak void CAN_WriteFinish(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_WRITE_FINISH */ + /* USER CODE END CAN_WRITE_FINISH */ + } + __weak void CAN_Transmit_Error(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CAN_TRANSMIT_ERROR */ + /* USER CODE END CAN_TRANSMIT_ERROR */ + } + static void CAN_Init(void){ + HAL_CRG_IpEnableSet(CAN_BASE, IP_CLK_ENABLE); + g_can.baseAddress = CAN; + g_can.typeMode = CAN_MODE_NORMAL; + g_can.seg1Phase = CAN_SEG1_6TQ; + g_can.seg2Phase = CAN_SEG2_3TQ; + g_can.sjw = CAN_SJW_2TQ; + g_can.prescalser = 25; /* 25 is frequency division coefficient */ + g_can.rxFIFODepth = 3; /* A maximum of 3 packet objects are in RX FIFO */ + g_can.autoRetrans = BASE_CFG_ENABLE; + HAL_CAN_Init(&g_can); + HAL_CAN_RegisterCallBack(&g_can, CAN_READ_FINISH, CAN_ReadFinish); + HAL_CAN_RegisterCallBack(&g_can, CAN_WRITE_FINISH, CAN_WriteFinish); + HAL_CAN_RegisterCallBack(&g_can, CAN_TRNS_ERROR, CAN_Transmit_Error); + IRQ_Register(IRQ_CAN, HAL_CAN_IrqHandler, &g_can); + IRQ_SetPriority(IRQ_CAN, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_CAN); + } + + + CANFrame g_sendFrame; + CANFrame g_receiveFrame; + int CAN_ReceiveFilter(void) + { + SystemInit(); + DBG_PRINTF("CAN Init \r\n"); + CAN_FilterConfigure rxFilter; + g_can.rxFrame = &g_receiveFrame; /* Address for storing received frame data */ + DBG_PRINTF("CAN interrupt register \r\n"); + g_sendFrame.type = CAN_TYPEFRAME_EXT_DATA; /* Transmit extended data frame */ + g_sendFrame.CANId = 0x1314; /* 0x1314 is ID of transmitted data frames */ + g_sendFrame.dataLength = 1; /* 1 is length of the sent frame */ + g_sendFrame.frame[0] = '0'; + HAL_CAN_Write(&g_can, &g_sendFrame); + rxFilter.receiveType = CAN_FILTERFRAME_EXT_DATA; + rxFilter.filterID = 0x1014; /* 0x1014 and 0xFFFFF0FF constitute filtering rules */ + rxFilter.filterMask = 0xFFFFF0FF; /* 0xFFFFF0FF is filter ID mask */ + HAL_CAN_ReadIT(&g_can, &g_receiveFrame, &rxFilter); + return 0; + } + ``` + +步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194776437](../../../docs/pic/1726194776437.jpg) + +- 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194794028](../../../docs/pic/1726194794028.jpg) + +- 步骤五:CAN transceiver的tx和rx对应接开发板的CAN_TX(GPIO3_5)和CAN_RX(GPIO3_6),CAN transceiver的H与L对接CAN收发器的H与L,CAN transceiver接电和接地,最后CAN收发器与上位机通过USB连接。 + + ![](../../../docs/pic/a5139bc14c11c2d67487ee49bbb402c.png) + +#### 3.1.5实验结果 + +打开GCAN Tools调试分析软件和串口调试助手,先开发板发送数据,串口打印“CAN Write Finish”,上位机接收数据,然后通过上位机发送数据,开发板接收数据并打印数据。证明实验成功。 + +![](../../../docs/pic/1728379696289.jpg) + + + +## 4、CAPM驱动章节 + +### 4.1 CAPM读取电机HALL位置传感器 + +#### 4.1.1实验目的 + +- 转动电机,通过CAPM来实现捕获电机上HALL位置传感器的电平。 + +#### 4.1.2实验要求 + +- 1.软件要求:原理:通过检测霍尔元件的状态变化,可以确定电机转子的角度和位置 + +- 2.硬件要求:Hi3061M核心板,电机; + + ![](../../../docs/pic/image-20240829165616356.png) + + ![](../../../docs/pic/1726212673803.jpg) + + +#### 4.1.3核心函数说明 + +3.1.3.1 CAPM_CalculateLevel() + +| 定义: | static unsigned char CAPM_CalculateLevel(CAPM_Handle *handle) | +| -------- | ------------------------------------------------------------ | +| 功能: | 计算当前水平 | +| 参数: | canHandle:CAPM参数句柄 | +| 返回值: | unsigned char类型变量 | +| 依赖: | can.h | + +3.1.3.2 HAL_CAPM_GetNextLoadECRNum() + +| 定义: | unsigned char HAL_CAPM_GetNextLoadECRNum(CAPM_Handle *handle) | +| -------- | ------------------------------------------------------------ | +| 功能: | 获取下一个要加载的ECR的编号。 | +| 参数: | canHandle:CAPM参数句柄 | +| 返回值: | 下一个ECR编号:Next_LOAD_ECR0、Next_LOAD-ECR1、Next_LAND_ECR2、Next_LOAD_ECR3。 | +| 依赖: | can.h | + +3.1.3.3 HAL_CAPM_GetECRValue() + +| 定义: | unsigned int HAL_CAPM_GetECRValue(CAPM_Handle *handle, CAPM_ECRNum ecrNum) | +| -------- | ------------------------------------------------------------ | +| 功能: | 获取ECR的编号。 | +| 参数: | canHandle:CAPM参数句柄
ecrNum:ECR编号 | +| 返回值: | unsigned char类型变量 | +| 依赖: | can.h | + +3.1.3.3 HAL_CAPM_GetECRValue() + +| 定义: | unsigned int HAL_CAPM_GetECRValue(CAPM_Handle *handle, CAPM_ECRNum ecrNum) | +| -------- | ------------------------------------------------------------ | +| 功能: | 获取ECR的编号。 | +| 参数: | canHandle:CAPM参数句柄
ecrNum:ECR编号 | +| 返回值: | unsigned char类型变量 | +| 依赖: | can.h | + +#### 4.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\capm_hall_sample文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 捕获模式:可通过“g_capmAConfig.capMode”进行配置,默认为连续捕获CAPM_CONTINUECAP + +- 预分频:对CAPM输入信号进行预分频,可通过”g_capmAConfig.preScale“进行配置,默认为不分频 + +- 捕获寄存器配置:可通过”g_capmAConfig.capRegConfig“进行配置,默认为上升沿捕获,每次复位 + +- 从原理图和用户手册可以分析出开发板通过CAPM0_IN(GPIO5_0)获取电机一个HALL传感器的电平信息,然后通过串口打印出数据,核心代码如下方所示。 + + ``` + + /** + * @brief Get current Hall position value. + * @param None. + * @retval current position:CAPM_PART_A~F. + */ + unsigned char CAPM_GetHallValue(void) + { + unsigned char hallALevel, hallBLevel, hallCLevel; + unsigned char hallPosition; + hallALevel = CAPM_CalculateLevel(&g_capmAConfig); /* get A phase's level */ + hallBLevel = CAPM_CalculateLevel(&g_capmBConfig); /* get B phase's level */ + hallCLevel = CAPM_CalculateLevel(&g_capmCConfig); /* get C phase's level */ + hallPosition = hallALevel << SECOND_BIT_SHIFT; /* move to the 2nd bit */ + hallPosition |= hallBLevel << FIRST_BIT_SHIFT; /* move to the 1st bit */ + hallPosition |= hallCLevel; + return hallPosition; + } + + + /** + * @brief Calculate current level + * @param handle: CAPM handle. + * @retval none + */ + static unsigned char CAPM_CalculateLevel(CAPM_Handle *handle) + { + unsigned char hallNextECR; + + CAPM_ASSERT_PARAM(handle != NULL); + hallNextECR = HAL_CAPM_GetNextLoadECRNum(handle); /* get next ECR number */ + if (hallNextECR == CAPM_NEXT_LOAD_ECR1 || hallNextECR == CAPM_NEXT_LOAD_ECR3) { + return CAPM_LOW; /* current level is low */ + } else { + return CAPM_HIGH; /* current level is high */ + } + } + + + + + static void CAPM0_Init(void) + { + HAL_CRG_IpEnableSet(CAPM0_BASE, IP_CLK_ENABLE); + g_capmAConfig.baseAddress = CAPM0; + g_capmAConfig.deburrNum = 0; + g_capmAConfig.capMode = CAPM_CONTINUECAP; + g_capmAConfig.preScale = 0; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmAConfig.useCapNum = 2; + g_capmAConfig.tscntDiv = 1 - 1; + g_capmAConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmAConfig); + } + static void CAPM1_Init(void) + { + HAL_CRG_IpEnableSet(CAPM1_BASE, IP_CLK_ENABLE); + g_capmBConfig.baseAddress = CAPM1; + g_capmBConfig.deburrNum = 0; + g_capmBConfig.capMode = CAPM_CONTINUECAP; + g_capmBConfig.preScale = 0; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmBConfig.useCapNum = 2; + g_capmBConfig.tscntDiv = 1 - 1; + g_capmBConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmBConfig); + } + static void CAPM2_Init(void) + { + HAL_CRG_IpEnableSet(CAPM2_BASE, IP_CLK_ENABLE); + g_capmCConfig.baseAddress = CAPM2; + g_capmCConfig.deburrNum = 0; + g_capmCConfig.capMode = CAPM_CONTINUECAP; + g_capmCConfig.preScale = 0; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING; + g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET; + g_capmCConfig.useCapNum = 2; + g_capmCConfig.tscntDiv = 1 - 1; + g_capmCConfig.inputSrc = CAPM_INPUT; + HAL_CAPM_Init(&g_capmCConfig); + } + + + + ``` + +- 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +- 步骤五:电机接线如下图所示: + + ![](../../../docs/pic/2d23b1fa3489f9f9ad2d2d1e76fbec4.png) + + + + + +#### 4.1.5实验结果 + +- 烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,在没转动电机时,串口不断输出0x3,当转动电机时,串口输出0x7,说CAPM0_IN(GPIO0_5)获取到了一个HALL传感器的电平信息,说明实验成功。 + +![1726194962547](../../../docs/pic/1726194962547.jpg) + + + +#### 4.1.6扩展实验 + +- 本实验学习了用CAPM0_IN获取电平信息,请学生做如下实验: + +- 切换CAPM1_IN或者CAPM2_IN与电机连接,查看串口输出数据的变化。 + + + +## 5、CFD驱动章节 + +### 5.1 验证CFD的时钟失效保护功能 + +#### 5.1.1实验目的 + +- 验证CFD的时钟失效保护功能,监测目标时钟(HOSC或TCXO)是否失效,通过每隔5s分别注入时钟失效中断和解除时钟失效中断, + +#### 5.1.2实验要求 + +- 1.原理:CFD的时钟失效保护功能原理主要依赖于电路的内部逻辑、备用时钟以及优化算法,以确保在时钟信号丢失或不稳定的情况下,CFD电路仍然能够正确地处理和传输数据,从而保证系统的稳定运行和数据的有效性‌。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + +#### 5.1.3核心函数说明 + +5.1.3.1 DCL_CFD_GetCntValue() + +| 定义: | static inline unsigned int DCL_CFD_GetCntValue(CFD_RegStruct *cfdx) | +| -------- | ------------------------------------------------------------ | +| 功能: | 内部计数器计数锁存值。 | +| 参数: | cfdx:CFD寄存器基址 | +| 返回值: | unsigned int 类型的锁存值。 | +| 依赖: | cfd_ip.h | + +5.1.3.2 DCL_CFD_EnableInterruptInject() + +| 定义: | static inline void DCL_CFD_EnableInterruptInject(CFD_RegStruct *cfdx, CFD_Interrupt_Type type) | +| -------- | ------------------------------------------------------------ | +| 功能: | 注入指定类型的中断。 | +| 参数: | cfdx: CFD寄存器基址
type: 中断类型的掩码。 | +| 返回值: | None | +| 依赖: | cfd_ip.h | + +5.1.3.2 DCL_CFD_DisableInterruptInject() + +| 定义: | static inline void DCL_CFD_DisableInterruptInject(CFD_RegStruct *cfdx, CFD_Interrupt_Type type) | +| -------- | ------------------------------------------------------------ | +| 功能: | 停止注入指定类型的中断。 | +| 参数: | cfdx: CFD寄存器基址
type: 中断类型的掩码。 | +| 返回值: | None | +| 依赖: | cfd_ip.h | + +#### 5.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_cfd_check_error文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- CFD参考时钟源:参考时钟源固定为内部低速时钟CLK_LOSC,默认为不分频。 + +- CFD目标时钟源:目标时钟源固定为HOSC或TCXO,分频比固定为2048。 + +- CFD上限值: 上限值可通过“g_cfd.upperBound”配置。 + +- CFD中断类型:中断类型可通过“g_cfd.interruptType”进行配置,默认为时钟失效中断。 + +- CFD注入错误前后监测目标时钟异常功能,核心代码如下方所示。 + + ``` + + + __weak void CFDCheckEndCallback(CFD_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CFD_INT_CHECK_END_MASK */ + /* USER CODE END CFD_INT_CHECK_END_MASK */ + } + __weak void CFD_CheckErrorCallback(CFD_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CFD_INT_PLL_REF_CLOCK_STOP_MASK */ + /* USER CODE END CFD_INT_PLL_REF_CLOCK_STOP_MASK */ + } + static BASE_StatusType CFD_Init(void) + { + HAL_CRG_IpEnableSet(CFD_BASE, IP_CLK_ENABLE); + g_cfd.baseAddress = CFD; + g_cfd.upperBound = 12; + g_cfd.interruptType = CFD_INT_PLL_REF_CLOCK_STOP_MASK; + HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_CHECK_END_MASK, (CFD_CallBackFuncType)CFDCheckEndCallback); + HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_PLL_REF_CLOCK_STOP_MASK, (CFD_CallBackFuncType)CFD_CheckErrorCallback); + IRQ_Register(IRQ_CFD, HAL_CFD_IrqHandler, &g_cfd); + IRQ_SetPriority(IRQ_CFD, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_CFD); + return HAL_CFD_Init(&g_cfd); + } + /** + * @brief Sample main function. + * @param None. + * @return @ref BASE_StatusType + */ + BASE_StatusType CFD_SampleMain(void) + { + SystemInit(); + HAL_CFD_Start(&g_cfd); + + while (1) { + /* If ref clk cnt value bigger than upperbound, then junp to callback */ + BASE_FUNC_DELAY_S(1); + DBG_PRINTF("main loop, ref clk cnt value = %d\r\n", DCL_CFD_GetCntValue(g_cfd.baseAddress)); + if (g_loopTimes++ >= LOOP_TIMES) { + g_loopTimes = 0; + /* Inject interrupt type error, trig int jump to callback */ + DBG_PRINTF("Inject interrupt type error\r\n"); + DCL_CFD_EnableInterruptInject(g_cfd.baseAddress, g_cfd.interruptType); + } + } + return BASE_STATUS_OK; + } + + /** + * @brief Interrupt callback function triggered by module check errors. + * @param handle CFD handle. + * @return None. + */ + void CFD_CheckErrorCallback(CFD_Handle *handle) + { + CFD_Handle* cfdHandle = (CFD_Handle*)handle; + while (1) { + /* after inject error, core freq switch to losc = 32khz */ + DBG_PRINTF("In CFD interrupt function : clock frequency error and \ + core freq = %dhz\r\n", HAL_CRG_GetCoreClkFreq()); + BASE_FUNC_DELAY_S(1); + /* loop control */ + if (g_loopTimes++ >= LOOP_TIMES) { + g_loopTimes = 0; + /* Disable Inject interrupt type error, jump to main loop */ + DBG_PRINTF("Disable inject interrupt type error\r\n"); + DCL_CFD_DisableInterruptInject(cfdHandle->baseAddress, cfdHandle->interruptType); + return; + } + } + } + + ``` + +- - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + + + + +#### 5.1.5实验结果 + +- 烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,打印6次正常的CFD计数值,注入错误后,打印6次中断回调,后重新打印正常CFD计数值,循环进行。这现象说明实验成功。 + + ![1726194980430](../../../docs/pic/1726194980430.jpg) + + 提示: + +- 时钟失效中断触发硬件系统事件2会自动关闭APT并将主时钟切换为LOSC进行保护,用户可在中断服务函数中进行时钟恢复或者复位等安全操作; +- 每次中断触发后自行判断计数值是否在门限内,非门限内则判定为异常时钟;该模块目标时钟分配比固化为2048分频,参考时钟不分频。 + +## 6、CMM驱动章节 + +### 6.1 验证CMM时钟频率监测功能,同时验证CMM频率错误中断功能 + +#### 6.1.1实验目的 + +- 检查目标时钟(LOSC/HOSC/TCXO/HS_CLK/LS_CLK)频率是否发生错误。每隔5s分别注入频率错误中断,验证CMM的频率中断处理函数。 + +#### 6.1.2实验要求 + +- 1.原理:CMM时钟的频率监测功能通过高精度时钟同步技术和先进的频率测量技术,实现了对时钟频率的高精度测量和同步,cmm注入错误前后监测目标时钟异常功能 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + +#### 6.1.3核心函数说明 + +6.1.3.1 DCL_CMM_GetCntValue() + +| 定义: | static inline unsigned short DCL_CMM_GetCntValue(CMM_RegStruct *cmmx) | +| -------- | ------------------------------------------------------------ | +| 功能: | 内部计数器计数锁存值。 | +| 参数: | cmmx:CMM寄存器基址 | +| 返回值: | unsigned short.类型的锁存值。 | +| 依赖: | cmm_ip.h | + +6.1.3.2 DCL_CMM_EnableInterruptInject() + +| 定义: | static inline void DCL_CMM_EnableInterruptInject(CMM_RegStruct *cmmx, CMM_Interrupt_Type type) | +| -------- | ------------------------------------------------------------ | +| 功能: | 注入指定类型的中断。 | +| 参数: | cmmx: CMM寄存器基址
type: 中断类型的掩码。 | +| 返回值: | None | +| 依赖: | cmm_ip.h | + +6.1.3.2 DCL_CMM_DisableInterruptInject() + +| 定义: | static inline void DCL_CMM_DisableInterruptInject(CMM_RegStruct *cmmx, CMM_Interrupt_Type type) | +| -------- | ------------------------------------------------------------ | +| 功能: | 停止注入指定类型的中断。 | +| 参数: | cmmx: CMM寄存器基址
type: 中断类型的掩码。 | +| 返回值: | None | +| 依赖: | cmm_ip.h | + +#### 6.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_cmm_check_error文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- CMM参考时钟源:参考时钟源可通过“g_cmm.refClockSource”配置,默认为内部低速时钟CMM_REF_CLK_LOSC,分频比可通过“g_cmm.refFreqDivision”配置,默认为不分频CMM_REF_FREQ_DIV_0。 + +- CMM目标时钟源:目标时钟源可通过“g_cmm.targetClockSource”配置,默认为内部低速时钟CMM_TARGET_CLK_LOSC,分频比可通过“g_cmm.targetFreqDivision”配置,默认为8192分频CMM_TARGET_FREQ_DIV_8192。 + +- CMM上下限值: 上限值可通过“g_cmm.upperBound”配置,下限值可通过“g_cmm.lowerBound”配置。 + +- CMM中断类型:中断类型可通过“g_cmm.interruptType”进行配置,默认为频率错误中断。 + +- 核心代码如下方所示。 + + ``` + + __weak void CMMCounterOverFlowCallback(CMM_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_COUNTER_OVERFLOW_MASK */ + /* USER CODE END CMM_INT_COUNTER_OVERFLOW_MASK */ + } + __weak void CMMCheckEndCallback(CMM_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_CHECK_END_MASK */ + /* USER CODE END CMM_INT_CHECK_END_MASK */ + } + __weak void CMM_CheckErrorCallback(CMM_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CMM_INT_FREQ_ERR_MASK */ + /* USER CODE END CMM_INT_FREQ_ERR_MASK */ + } + static BASE_StatusType CMM_Init(void) + { + HAL_CRG_IpEnableSet(CMM_BASE, IP_CLK_ENABLE); + g_cmm.baseAddress = CMM; + g_cmm.targetFreqDivision = CMM_TARGET_FREQ_DIV_8192; + g_cmm.refFreqDivision = CMM_REF_FREQ_DIV_0; + g_cmm.targetClockSource = CMM_TARGET_CLK_LOSC; + g_cmm.refClockSource = CMM_REF_CLK_LOSC; + g_cmm.upperBound = 12; + g_cmm.lowerBound = 8; + g_cmm.interruptType = CMM_INT_FREQ_ERR_MASK; + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_COUNTER_OVERFLOW_MASK, (CMM_CallBackFuncType)CMMCounterOverFlowCallback); + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_CHECK_END_MASK, (CMM_CallBackFuncType)CMMCheckEndCallback); + HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_FREQ_ERR_MASK, (CMM_CallBackFuncType)CMM_CheckErrorCallback); + IRQ_Register(IRQ_CMM, HAL_CMM_IrqHandler, &g_cmm); + IRQ_SetPriority(IRQ_CMM, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_CMM); + return HAL_CMM_Init(&g_cmm); + } + + + /** + * @brief Sample main function. + * @param None. + * @return @ref BASE_StatusType + */ + BASE_StatusType CMM_SampleMain(void) + { + SystemInit(); + HAL_CMM_Start(&g_cmm); + while (1) { + /* If ref clk cnt value bigger than upperbound, then junp to callback */ + BASE_FUNC_DELAY_S(1); + DBG_PRINTF("main loop, CMM count value = %d\r\n", DCL_CMM_GetCntValue(g_cmm.baseAddress)); + if (g_loopTimes++ >= LOOP_TIMES - 1) { + g_loopTimes = 0; + /* Inject error, trig int jump to callback */ + DBG_PRINTF("\r\n Inject interrupt type error !\r\n"); + DCL_CMM_EnableInterruptInject(g_cmm.baseAddress, g_cmm.interruptType); + } + } + return BASE_STATUS_OK; + } + + /** + * @brief Interrupt callback function triggered by module check errors. + * @param handle CMM handle. + * @return None. + */ + void CMM_CheckErrorCallback(CMM_Handle *handle) + { + CMM_Handle *cmmHandle = (CMM_Handle*)handle; + while (1) { + DBG_PRINTF("In CMM interrupt function : clock frequency error\r\n"); + BASE_FUNC_DELAY_S(1); + if (g_loopTimes++ >= LOOP_TIMES - 1) { + g_loopTimes = 0; + /* Disable Inject interrupt type error, trig int jump to callback */ + DBG_PRINTF("\r\n Disable inject interrupt type error\r\n"); + DCL_CMM_DisableInterruptInject(cmmHandle->baseAddress, cmmHandle->interruptType); + return; + } + } + } + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/1726195173004.jpg)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + +#### 6.1.5实验结果 + +- 烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,打印5次正常的CMM计数器锁存值(目标分频为8192),接着打印1遍“ Inject interrupt type error !”,注入错误后,打印5次“In CMM interrupt function : clock frequency error”,再打印一遍“Disable inject interrupt type error”,后重新打印正常CMM计数器锁存值,循环进行。这现象说明实验成功。 + + ![1726195007716](../../../docs/pic/1726195007716.jpg) + +#### 6.1.6扩展实验 + +- 本实验学习验证CMM时钟频率监测功能,并验证CMM频率错误中断功能,请学生做如下实验: + +- 改变目标时钟源和分频比,测试其现象。 + +提示:上下限值的范围可反应系统对目标时钟偏差的冗余度,可自行设计门限值和时钟分频比,门限值具体计算方法请参照芯片技术指南 + + + +## 7、CRC驱动章节 + +### 7.1 配置CRC参数,运用CRC16_XMODEM算法对一组数据进行运算生成CRC值 + +#### 7.1.1实验目的 + +- 运用CRC的两种运行方式:1.运用CRC16_XMODEM算法模式对一组数据进行运算生成CRC值;2.根据CRC16_XMODEM算法属性配置对一组数据进行运算生成CRC值。 + +#### 7.1.2实验要求 + +- 1.原理:CRC是一种用于检测数据传输或存储后可能出现的错误的校验方法,然后CRC16_XMODEM算法的具体步骤包括初始化CRC寄存器、逐字节处理数据、应用多项式进行运算,并最终生成一个16位的CRC值,这个值被附加到数据后面,以便接收方进行校验。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + +#### 7.1.3核心函数说明 + +7.1.3.1 HAL_CRC_Accumulate() + +| 定义: | unsigned int HAL_CRC_Accumulate(CRC_Handle *handle, const void *pData, unsigned int length) | +| -------- | ------------------------------------------------------------ | +| 功能: | 计算8、16或32位CRC值
以先前计算的CRC作为初始化值开始的32位数据缓冲区。 | +| 参数: | handle:CRC参数句柄
pData: 指向输入数据缓冲区的指针。
length: pData数组长度。 | +| 返回值: | unsigned int类型的CRC输出数据。 | +| 依赖: | crc.h | + +7.1.3.2 DCL_CRC_GetOutputData() + +| 定义: | static inline unsigned int DCL_CRC_GetOutputData(CRC_RegStruct *crcx) | +| -------- | ------------------------------------------------------------ | +| 功能: | 在值函数中获取CRC数据。 | +| 参数: | crcx:CRC寄存器基地址 | +| 返回值: | unsigned int类型的CRC输出数据。 | +| 依赖: | crc_ip.h | + +#### 7.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_crc_gen_algo文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 算法模式计算:配置算法模式CRC16_XMODEM,对长度为1024数组中的数据进行CRC累计计算,调用“HAL_CRC_Init()”进行初始化配置,之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。 + +- 算法属性配置计算:配置CRC16_XMODEM算法属性,对长度为1024数组中的数据进行CRC累计计算,调用“HAL_CRC_Init()”进行初始化配置,之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。 + +- 核心代码如下方所示。 + + ``` + + /** + * @brief To test the function of generating a CRC value By Algorithm. + * @param None + * @retval Value of @ref BASE_StatusType. + */ + static BASE_StatusType CRC_GenerateByAlgorithm(void) + { + CRC_Handle genAlgo = {0}; + genAlgo.handleEx.algoMode = CRC16_XMODEM; /* crc algorithm mode CRC16_XMODEM */ + genAlgo.baseAddress = CRC; + genAlgo.inputDataFormat = CRC_MODE_BIT16; /* crc data size */ + HAL_CRC_Init(&genAlgo); + unsigned int res = HAL_CRC_Accumulate(&genAlgo, g_crcTempData, TABLE_SIZE); + DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE); + return BASE_STATUS_OK; + } + + /** + * @brief To test the function of generating a CRC value By Algorithm Attribute. + * @param None + * @retval Value of @ref BASE_StatusType. + */ + static BASE_StatusType CRC_GenerateByAlgorithmAttr(void) + { + CRC_Handle genAlgoAttr = {0}; + genAlgoAttr.baseAddress = CRC; + genAlgoAttr.inputDataFormat = CRC_MODE_BIT16; /* crc input data size */ + genAlgoAttr.initValueType = TYPE_CRC_INIT_VALUE_0000; + genAlgoAttr.polyMode = CRC16_1021_POLY_MODE; + genAlgoAttr.xorEndianEnbaleType = ENABLE_XOR_ENABLE_LSB; /* enabel xor and enable lsb */ + genAlgoAttr.reverseEnableType = REVERSE_INPUT_FALSE_OUTPUT_FALSE; + genAlgoAttr.resultXorValueType = TYPE_CRC_XOR_VALUE_0000; + HAL_CRC_Init(&genAlgoAttr); + unsigned int res = HAL_CRC_Accumulate(&genAlgoAttr, g_crcTempData, TABLE_SIZE); + DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE); + return BASE_STATUS_OK; + } + + /** + * @brief To test the function of generating a CRC value. + * @param None + * @retval Value of @ref BASE_StatusType. + */ + BASE_StatusType CRC_GenerateSample(void) + { + SystemInit(); + HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE); + for (unsigned int i = 0 ; i < TABLE_SIZE; i++) { + g_crcTempData[i] = i; + } + DBG_PRINTF("GenerateByAlgorithm:------ \r\n"); + CRC_GenerateByAlgorithm(); /* crc gen by algorithm */ + DBG_PRINTF("GenerateByAlgorithmAttr:------ \r\n"); + CRC_GenerateByAlgorithmAttr(); /* crc gen by algorithm attr */ + return BASE_STATUS_OK; + } + + + + + ``` + +- 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + + +#### 7.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,生成的16位CRC数值为F1A1,数据大小为1024. + +![1726195033006](../../../docs/pic/1726195033006.jpg) + +#### 7.1.6扩展实验 + +- 本实验学习配置CRC参数,运用CRC16_XMODEM算法对一组数据进行运算生成CRC值,请学生做如下实验: + - 运用其他算法生成CRC值,并测试其现象。 + + + + +### 7.2 通过改变初始值配置,对同一组数据进行不同CRC算法运算验证 + +#### 7.2.1实验目的 + +- 通过load初始值配置,配置算法修改为CRC16_CCIT-FALSE,并对同一组数据进行CRC运算验证 + +#### 7.2.2实验要求 + +- 1.原理:CRC(循环冗余校验)是一种用于检测数据传输或存储后可能出现的错误的校验方法,然后CRC16_XMODEM算法的具体步骤包括初始化CRC寄存器、逐字节处理数据、应用多项式进行运算,并最终生成一个16位的CRC值,这个值被附加到数据后面,以便接收方进行校验。在CRC16_CCITT-FALSE算法中,输入数据在计算之前会进行预处理,通常是将初始值设为0xFFFF。生成多项式为x^16^ + x^12^+x^5^+1,这个多项式用于与输入数据进行模2除法运算,以生成16位的CRC值。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + +#### 7.2.3核心函数说明 + +7.2.3.1 HAL_CRC_SetInputDataGetCheck() + +| 定义: | unsigned int HAL_CRC_SetInputDataGetCheck(CRC_Handle *handle, unsigned int data) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置CRC输入数据并获得CRC输出。 | +| 参数: | handle:CRC参数句柄
data:CRC输入数据。 | +| 返回值: | unsigned int类型的CRC输出数据。 | +| 依赖: | crc.h | + +7.2.3.2 HAL_CRC_SetCheckInData() + +| 定义: | void HAL_CRC_SetCheckInData(CRC_Handle *handle, unsigned int data) | +| -------- | ------------------------------------------------------------ | +| 功能: | 将CRC check_in数据设置为注册。 | +| 参数: | handle:CRC参数句柄
data:CRC输入数据。 | +| 返回值: | None | +| 依赖: | crc.h | + +7.2.3.3 HAL_CRC_LoadCheckInData() + +| 定义: | unsigned int HAL_CRC_LoadCheckInData(CRC_Handle *handle) | +| -------- | -------------------------------------------------------- | +| 功能: | 将CRC校验输入寄存器数据加载到CRC_out寄存器。 | +| 参数: | handle:CRC参数句柄 | +| 返回值: | unsigned int 类型 反转check_in数据。 | +| 依赖: | crc.h | + +#### 7.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_crc_load_algo文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 在"SystemInit()”接口中配置CRC输入数据长度、算法模式等参数。 + +- 在进行load初始值配置之前,根据CRC16_XMODEM算法对输入数据0x5678调用“HAL_CRC_SetInputDataGetCheck()”进行CRC计算对比结果。 + +- 调用“HAL_CRC_SetCheckInData()”修改初始值0xFFFF,再调用"HAL_CRC_SetInputDataGetCheck()"对输入数据0x5678进行CRC计算对比结果。加载初始值后,CRC16_XMODEM算法修改为CRC16_CCIT-FALSE算法。 + +- 核心代码如下方所示。 + + ``` + + /** + * @brief To test the function of loading the check_in value to crc_data register. + * The load value is read from crc_out. + * The value is reversed and the original crc_out is overwritten. + * @param None + * @retval Value of @ref BASE_StatusType. + */ + BASE_StatusType CRC_LoadSample(void) + { + SystemInit(); + /* CRC16_XMODEM Algrithem, init data = 0x0000 */ + unsigned int preLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678); + DBG_PRINTF("preLoadCrcValue: 0x%x \r\n", preLoadCrcValue); + if (preLoadCrcValue == CRC_XMODEM_REF_VALUE) { + DBG_PRINTF("CRC Algrithem is CRC16_XMODEM, inputData is 0x5678 \r\n"); + } else { + DBG_PRINTF("CRC Algrithem is not right for this sample! \r\n"); + } + /* load init data 0xffff, crc algrithem from CRC16_XMODEM to CRC16_CCIT-FALSE */ + HAL_CRC_SetCheckInData(&g_loadCrcHandle, 0xFFFF); + unsigned int initData = HAL_CRC_LoadCheckInData(&g_loadCrcHandle); + /* CRC16_CCIT-FALSE Algrithem, init data = 0xffff */ + unsigned int afterLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678); + DBG_PRINTF("initData: 0x%x \r\n", initData); + DBG_PRINTF("afterLoadCrcValue: 0x%x \r\n", afterLoadCrcValue); + if (afterLoadCrcValue == CRC_CCITFALSE_REF_VALUE) { + DBG_PRINTF("CRC Algrithem is CRC16_CCIT-FALSE, load init data success! \r\n"); + } else { + DBG_PRINTF("load init data fail ! \r\n"); + } + return BASE_STATUS_OK; + } + + static void CRC_Init(void) + { + HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE); + g_loadCrcHandle.baseAddress = CRC; + g_loadCrcHandle.inputDataFormat = CRC_MODE_BIT16; + g_loadCrcHandle.handleEx.algoMode = CRC16_XMODEM; + HAL_CRC_Init(&g_loadCrcHandle); + } + static void UART0_Init(void) + { + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_BLOCKING; + g_uart0.rxMode = UART_MODE_BLOCKING; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); + } + + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + + +#### 7.2.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,CRC16_XMODEM算法输出的数据是0x5B86, + +修改后的初始值为0xFFFF,修改成CRC16_CCIT-FALSE算法后输出数据是0xDF46,证明验证成功。 + +![1726195055385](./pic/1726195055385.jpg) + +#### 7.2.6扩展实验 + +- 本实验学习通过改变初始值配置,对同一组数据进行不同CRC算法运算验证,请学生做如下实验: + +- 用同一组数据用CRC16_CCITT算法与CRC16_XMODEM算法运算认证。 +- 调用“HAL_CRC_CheckInputData()”检查接收到的数据CRC值是否与预期值相同。 + + + +## 8、DAC驱动章节 + +### 8.1数模转换-将数字信号转换成对应的模拟电压量 + +#### 8.1.1实验目的 + +将软件配置的数字信号,转换成对应的模拟电压量,实现数字到模拟的转换,转换成的模拟信号可便于模拟运算 + +#### 8.1.2实验要求 + +- 1.原理:DAC(‌[数字模拟转换器](https://www.baidu.com/s?rsv_idx=1&wd=数字模拟转换器&fenlei=256&usm=6&ie=utf-8&rsv_pq=af0b4a9e00362222&oq=DAC原理&rsv_t=22e5rztBNwFwYxXtGiZwOKdFv4EckM7IsVbPoYkWPqqyGbu7eJZXlS7XypM&sa=re_dqa_generate))的工作原理基于输入的数字信号,通过一系列电子元件将数字信号转换为模拟信号。 + +- 2.版本要求:本示例支持版本号:SolarA2_1.0.1.3(1.0.1.2版本不支持DAC_OUT输出,只能内部输出) + +- 3.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + 4.工具要求:万用表 + + ![](../../../docs/pic/2184d50a74a46c4b3f78d540e615810.png) + +#### 8.1.3核心函数说明 + +8.1.3.1 HAL_DAC_Init() + +| 定义: | BASE_StatusType HAL_DAC_Init(DAC_Handle *dacHandle) | +| -------- | --------------------------------------------------- | +| 功能: | 初始化DAC | +| 参数: | handle:DAC参数句柄 | +| 返回值: | BASE_StatusType | +| 依赖: | dac.h | + +8.1.3.2 HAL_DAC_SetValue() + +| 定义: | void HAL_DAC_SetValue(DAC_Handle *dacHandle, unsigned int value) | +| -------- | ------------------------------------------------------------ | +| 功能: | 转换值配置 | +| 参数: | handle:DAC参数句柄
value:DAC的值 | +| 返回值: | None | +| 依赖: | dac.h | + + + +#### 1.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\smaple_dac文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- DAC输出的模拟电压期望值为: V = ( DAC.value * ( VDDA – VSSA )) / 1024。 + +- 本示例中DAC.value的值为52,其值可在DAC模块的配置界面中进行更改,可以在“system_init.c”文件中进行更改,以满足输出不同的电压值。 + +- 核心代码如下方所示。 + + ``` + + + + static void DAC0_Init(void) + { + HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */ + + g_dac0.baseAddress = DAC0; + + g_dac0.dacValue =52; /* 52: output 1.65v at 3.3v power supply */ + HAL_DAC_Init(&g_dac0); + } + + + static void IOConfig(void) + { + SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0; + SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1; + /* Config PIN14 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_7_AS_DAC_OUT); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_7_AS_DAC_OUT, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_7_AS_DAC_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_7_AS_DAC_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_7_AS_DAC_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */ + + } + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + + +#### 1.2.5实验结果 + +烧录成果后,通过万用表可以测出GPIO4_7引脚输出0.166V,按公式计算出来的结果是0.167V,在正常测量误差内,所以实验成功。 + +![](../../../docs/pic/23b272bd88d2dffb2c3662efe0e70ef.png) + + + +#### 1.2.6扩展实验 + +本实验学习通过配置数模转换-将数字信号转换成对应的模拟电压量,请学生做如下实验: + +- 改变DAC.value值,测试DAC_OUT引脚输出。 + + + + + +## 9、DMA驱动章节 + +### 9.1 配置DMA内存到内存传输功能,中断回调中读取搬运结果 + +#### 9.1.1实验目的 + +用DMA传输,从内存搬运到内存,DMA搬运结束后触发DMA中断,在中断回调函数中读取搬运后的结果。 + +#### 9.1.2实验要求 + +- 1.原理:DMA(内存直接访问)控制器负责设置数据的源地址和目的地址,以及数据的传输量,然后启动传输过程。传输完成后,DMA控制器会发送一个信号给CPU,通知它可以恢复之前的工作。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 9.1.3核心函数说明 + +9.1.3.1 HAL_DMA_RegisterCallback() + +| 定义: | void HAL_DMA_RegisterCallback(DMA_Handle *dmaHandle, DMA_CallbackFun_Type typeID, DMA_ChannelNum channel, DMA_CallbackType pCallback) | +| -------- | ------------------------------------------------------------ | +| 功能: | 用户回调函数注册界面。 | +| 参数: | dmaHandle:DMA_Handle类型的变量
typeID:回调函数类型的Id。
channel:所选DMA通道的ID
pCallback:指定callbcak函数的指针 | +| 返回值: | None. | +| 依赖: | dma.h | + +9.1.3.2 HAL_DMA_StartIT() + +| 定义: | BASE_StatusType HAL_DMA_StartIT(DMA_Handle *dmaHandle, unsigned int srcAddr, unsigned int destAddr, unsigned int dataLength, unsigned int channel) | +| -------- | ------------------------------------------------------------ | +| 功能: | DMA在启用中断的情况下开始数据传输。 | +| 参数: | dmaHandle:DMA_Handle类型的变量
srcAddr:数据源地址
destAddr:数据目标地址
dataLength:要传输的数据长度
channel:DMA通道编号 | +| 返回值: | BASE_StatusType: BASE_STATUS_OK, BASE_STATUS_ERROR, BASE_STATUS_BUSY, BASE_STATUS_TIMEOUT. | +| 依赖: | dma.h | + +#### 9.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\smaple_dma文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体 + +- 配置: + +- 在“SystemInit()”中配置DMA源和目的大小端、中断、配置通道相关参数进行初始化。 + +- 将搬运的源端地址和目的端地址传入“HAL_DMA_StartIT()”接口,搬运的数据长度和DMA的通道号也作为入参传递进去。 + +- 实现“DMA_MemToMemCallBack()”中断回调函数。 + +- 核心代码如下方所示。 + +- ``` + + + + static void DMA_Channel2Init(void) + { + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_INCREASE; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_MEM; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = NULL; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_TWO); + } + static void DMA_Init(void) + { + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel2Init(); + } + static unsigned char g_str1[10] = "12345678"; + static unsigned char g_str2[10] = ""; + void DMA_MemToMemCallBack(void *handle); + /** + * @brief User-defined callback function for completing the transfer of memory to the memory. + * @param handle callback handle. + * @retval None. + */ + void DMA_MemToMemCallBack(void *handle) + { + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("DMA_MemToMemCallBack\r\n"); + DBG_PRINTF("After transmission, src: %s\r\n", g_str1); + DBG_PRINTF("After transmission, dest: %s\r\n", g_str2); + } + + /** + * @brief DMA sample code for the transfer of memory to the memory. + * @param None. + * @retval None. + */ + void DMA_MemoryToMemory(void) + { + SystemInit(); + DBG_PRINTF("MemoryToMemory Begin: \r\n"); + DBG_PRINTF("Before transmission, src: %s\r\n", g_str1); + DBG_PRINTF("Before transmission, dest: %s\r\n", g_str2); + unsigned int channel = 2; /* select transfer channel 2 */ + HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_MemToMemCallBack); + /* The transmission length is defined as 8 */ + HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)g_str2, 8, channel); + } + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 9.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,通过数据可以看出传输开始时,目标地址里的数据是空的,启动动DMA传输,触发DMA中断读取数据后,输出dest里数据是12345678,源地址的数据src传输到了的dest目标地址里。证明实验成功。 + +![](../../../docs/pic/1726295359409.jpg) + +#### 9.1.6扩展实验 + +本实验学习通过配置DMA内存到内存传输功能,中断回调中读取搬运结果,请学生做如下实验: + +- 尝试指针类型和结构体类型的数据进行传输,查看其现象。 + + + +## 10、FLASH驱动章节 + +### 10.1 配置FLASH以中断方式进行擦除、写入,通过Debug串口打印读取操作数据 + +#### 10.1.1实验目的 + +通过中断方式对FLASH的PAGE 58-61区域进行擦除、写入,通过Debug串口打印读取的操作数据。 + +#### 10.1.2实验要求 + +- 1.原理:Flash存储器属于[EEPROM](https://www.baidu.com/s?sa=re_dqa_generate&wd=EEPROM&rsv_pq=cd542fe800a8d193&oq=FLASH基本操作原理&rsv_t=15752OAtQ1lt5V8N/+UkwFYtgIeZSfxIx/NPFkGET4HviYXp7A7rSIxx+C4&tn=baidu&ie=utf-8)的一种,可以通过电擦除,Flash的分层结构包括页、扇区和块,其中页是最小的可擦除单元,而读操作的最小单元为字节。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 10.1.3核心函数说明 + +10.1.3.1 HAL_FLASH_RegisterCallback() + +| 定义: | BASE_StatusType HAL_FLASH_RegisterCallback(FLASH_Handle *handle, FLASH_CallbackFunType pcallback) | +| -------- | ------------------------------------------------------------ | +| 功能: | 注册Flash模块的回调函数。 | +| 参数: | handle:FLASH_Handle类型的变量
pcallback:指向回调函数的指针。 | +| 返回值: | BASE_StatusType: BASE_STATUS_OK, BASE_STATUS_ERROR, BASE_STATUS_BUSY, BASE_STATUS_TIMEOUT. | +| 依赖: | flash.h | + +10.1.3.2 FlashInterruptHandle() + +| 定义: | static void FlashInterruptHandle(void *handle, FLASH_CallBackEvent event, unsigned int opAddr) | +| -------- | ------------------------------------------------------------ | +| 功能: | Flash中断,判断事件并输出数据 | +| 参数: | handle:Flash handle
event: Flash回调事件。
opAddr: 当前操作地址。 | +| 返回值: | None | +| 依赖: | flash.h | + +10.1.3.3 HAL_FLASH_EraseIT() + +| 定义: | BASE_StatusType HAL_FLASH_EraseIT(FLASH_Handle *handle, FLASH_EraseMode eraseMode,FLASH_SectorAddr startAddr, unsigned int eraseNum) | +| -------- | ------------------------------------------------------------ | +| 功能: | 写入在中断模式下擦除flash。 | +| 参数: | handle:Flash handle
eraseMode: 擦除模式。选项包括芯片擦除和页面擦除。
startAddr: 要擦除的flash的起始地址。地址必须与最小可擦除单位对齐。
eraseNum:要擦除的页数 | +| 返回值: | None | +| 依赖: | flash.h | + +10.1.3.4 HAL_FLASH_WriteIT() + +| 定义: | BASE_StatusType HAL_FLASH_WriteIT(FLASH_Handle *handle, unsigned int srcAddr,unsigned int destAddr, unsigned int srcLen) | +| -------- | ------------------------------------------------------------ | +| 功能: | 在中断模式下写入flash。 | +| 参数: | handle:Flash handle
srcAddr: 要写入的数据缓冲区的起始地址。
destAddr: 要写入的flash的起始地址。地址必须与最小可写单位对齐。
srcLen:要写入的数据长度,单位:字节。 | +| 返回值: | BASE_StatusType: BASE_STATUS_OK, BASE_STATUS_ERROR, BASE_STATUS_BUSY, BASE_STATUS_TIMEOUT. | +| 依赖: | flash.h | + +10.1.3.5 HAL_FLASH_Read() + +| 定义: | BASE_StatusType HAL_FLASH_Read(FLASH_Handle *handle,unsigned int srcAddr,unsigned int readLen,unsigned char *dataBuff, unsigned int buffLen) | +| -------- | ------------------------------------------------------------ | +| 功能: | 用于从flash读取数据的接口。 | +| 参数: | handle:Flash handle
srcAddr: 要读取的数据的flash地址。地址必须与最小可读单位对齐。
readLen: 读取数据长度,单位:字节。
dataBuff:用于存储读取数据的缓冲区。
buffLen:用于存储读取数据的缓冲区大小,单位:字节。 | +| 返回值: | BASE_StatusType: BASE_STATUS_OK, BASE_STATUS_ERROR, BASE_STATUS_BUSY, BASE_STATUS_TIMEOUT. | +| 依赖: | flash.h | + +. + +#### 10.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_flash文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- FLASH操作内存选择:示例代码中选择了FLASH的PAGE 58-61区域进行操作,也可以选择其他FLASH的其它PAGE X进行操作。 + +- FLASH初始化:调用接口"HAL_GPIO_Init()”完成对示例代码中FLASH的基地址、PE(擦除、写入方式)方式、回调函数、中断号进行配置。 + +- 操作FLASH PAGE 58-61进行擦除、写入、读取操作:通过调用 "HAL_FLASH_EraseIT()"接口以中断方式实现对目标页的擦除;通过调用"HAL_FLASH_WriteIT()"接口以中断方式实现将数据写入到目标页中;通过调用"HAL_FLASH_Read()"接口实现对目标页内容的读取。 + +- 核心代码如下方所示。 + + ``` + + #define FLASH_SAMPLE_ERASE_NUM 4 /* Number of flash pages erased at a time */ + #define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_58 /* The erase address must be 1k aligned. */ + #define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_58 /* The read address must be byte-aligned. */ + #define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_58 /* The write address must be 16-byte aligned. */ + + static FLASH_Handle g_flashInterruptHandle; + static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0}; + static volatile unsigned int g_eraseDoneFlag = FLASH_SAMPLE_FLAG_UNSET; + static volatile unsigned int g_writeDoneFlag = FLASH_SAMPLE_FLAG_UNSET; + + /** + * @brief Flash interrupt sample handle. + * @param handle Flash handle. + * @param event Flash callback event. + * @param opAddr Current operation address. + * @retval None + */ + static void FlashInterruptHandle(void *handle, FLASH_CallBackEvent event, unsigned int opAddr) + { + BASE_FUNC_UNUSED(handle); + switch (event) { + case FLASH_WRITE_EVENT_SUCCESS : /* One-time write success callback. */ + DBG_PRINTF("write success \r\n 0x%x \r\n", opAddr); + break; + case FLASH_WRITE_EVENT_DONE : /* All content is written. */ + g_writeDoneFlag = FLASH_SAMPLE_FLAG_SET; + DBG_PRINTF("write done \r\n"); + break; + case FLASH_WRITE_EVENT_FAIL : /* Write failed. */ + DBG_PRINTF("wtite failed\r\n 0x%x \r\n", opAddr); + break; + case FLASH_ERASE_EVENT_SUCCESS : /* One-time erase success callback. */ + DBG_PRINTF("erase success \r\n 0x%x \r\n", opAddr); + break; + case FLASH_ERASE_EVENT_DONE: /* All erase operations are complete. */ + g_eraseDoneFlag = FLASH_SAMPLE_FLAG_SET; + DBG_PRINTF("erase done \r\n"); + break; + case FLASH_ERASE_EVENT_FAIL : /* Erase failed. */ + DBG_PRINTF("erase failed\r\n 0x%x \r\n", opAddr); + break; + default : + break; + } + } + + /** + * @brief Flash interrupt sample init. + * @param None + * @retval None + */ + static void FlashInterruptInit(void) + { + g_flashInterruptHandle.baseAddress = EFC; + g_flashInterruptHandle.peMode = FLASH_PE_OP_IT; + HAL_FLASH_Init(&g_flashInterruptHandle); + HAL_FLASH_RegisterCallback(&g_flashInterruptHandle, FlashInterruptHandle); + + IRQ_Register(IRQ_EFC, HAL_FLASH_IrqHandler, &g_flashInterruptHandle); + IRQ_Register(IRQ_EFC_ERR, HAL_FLASH_IrqHandlerError, &g_flashInterruptHandle); + IRQ_SetPriority(IRQ_EFC_ERR, 1); /* set gpio1 interrupt priority to 1, 1~15 */ + IRQ_SetPriority(IRQ_EFC, 1); /* set gpio1 interrupt priority to 1, 1~15 */ + IRQ_EnableN(IRQ_EFC); + IRQ_EnableN(IRQ_EFC_ERR); + } + + /** + * @brief Flash interrupt sample processing. + * @param None + * @retval None + */ + void FlashInterruptProcessing(void) + { + BASE_StatusType ret; + unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0}; + + SystemInit(); + FlashInterruptInit(); + /* Configure data to be written. */ + for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) { + g_tempData[i] = 0x5A; + } + /* Perform the erase operation. */ + ret = HAL_FLASH_EraseIT(&g_flashInterruptHandle, FLASH_ERASE_MODE_PAGE, + FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR); + } + while (g_eraseDoneFlag == FLASH_SAMPLE_FLAG_UNSET) { + ; + } + /* Perform the programe operation. */ + ret = HAL_FLASH_WriteIT(&g_flashInterruptHandle, (uintptr_t)g_tempData, + FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR); + } + while (g_writeDoneFlag == FLASH_SAMPLE_FLAG_UNSET) { + ; + } + /* Perform the read operation. */ + ret = HAL_FLASH_Read(&g_flashInterruptHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE, + dataBuff, FLASH_TEMP_DATA_SIZE); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE); + } + /* Printf the contents read from the flash memory. */ + DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR); + for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) { + DBG_PRINTF("%x ", dataBuff[i]); + } + DBG_PRINTF("\r\n"); + return; + } + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 10.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,该示例擦除、写入、读取4页,擦除成功串口输出"erase success",写入成功输出"write success".,读取成功输出"read addr :0x5A(4096个)",由此可见实验成功。 + +![](../../../docs/pic/1726630394671.jpg) ![](../../../docs/pic/1726630452801.jpg) + +#### 10.1.6扩展实验 + +本实验学习通过配置FLASH以中断方式进行擦除、写入,通过Debug串口打印读取操作数据,请学生做如下实验 + +- 擦除、写、读的块和字节,并串口打印出现象。 + + + +## 11、GPIO驱动章节 + +### 11.1 配置GPIO管脚的中断功能,实现GPIO对按键检测 + +#### 11.1.1实验目的 + +完成GPIO控制器初始化和功能配置,通过中断来实现对按键的检测。 + +#### 11.1.2实验要求 + +- 1.原理:GPIO,即通用输入输出端口,是计算机或其他电子设备中用于与外部设备进行通信和控制的一种接口,从原理图分析出,该开发板的按键接入的是GPIO2_4。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 11.1.3核心函数说明 + +10.1.3.1 HAL_GPIO_Init() + +| 定义: | void HAL_GPIO_Init(GPIO_Handle *handle) | +| -------- | --------------------------------------- | +| 功能: | 初始化GPIO寄存器值 | +| 参数: | handle:GPIO_Handle类型的变量 | +| 返回值: | None | +| 依赖: | gpio.h | + +10.1.3.2 HAL_GPIO_SetDirection() + +| 定义: | void HAL_GPIO_SetDirection(GPIO_Handle *handle, unsigned int pins, GPIO_Direction dir) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置GPIO引脚方向。 | +| 参数: | handle:GPIO_Handle类型的变量
pins:或引脚的逻辑组合
dir:GPIO引脚方向 | +| 返回值: | None | +| 依赖: | gpio.h | + +10.1.3.3 HAL_GPIO_SetValue() + +| 定义: | void HAL_GPIO_SetValue(GPIO_Handle *handle, unsigned int pins, GPIO_Value value) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置GPIO引脚电平 | +| 参数: | handle:GPIO_Handle类型的变量
pins:或引脚的逻辑组合
value:GPIO引脚电平 | +| 返回值: | None | +| 依赖: | gpio.h | + +10.1.3.4 HAL_GPIO_SetIrqType() + +| 定义: | BASE_StatusType HAL_GPIO_SetIrqType(GPIO_Handle *handle, unsigned int pins, GPIO_InterruptMode mode) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置GPIO中断模式。 | +| 参数: | handle:GPIO_Handle类型的变量
pins:或引脚的逻辑组合
mode:中断模式 | +| 返回值: | BASE_StatusType类型变量 | +| 依赖: | gpio.h | + +10.1.3.5 HAL_GPIO_RegisterCallBack() + +| 定义: | void HAL_GPIO_RegisterCallBack(GPIO_Handle *handle, GPIO_PIN pin, GPIO_CallbackType pCallback) | +| -------- | ------------------------------------------------------------ | +| 功能: | 处理GPIO中断请求。 | +| 参数: | handle:GPIO_Handle类型的变量
pins:或引脚的逻辑组合
GPIO_CallbackType:中断服务函数 | +| 返回值: | BASE_StatusType类型变量 | +| 依赖: | gpio.h | + +#### 11.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_gpio_key文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- GPIO管脚选择:示例代码中选择GPIO管脚用于通过中断方式进行按键检测。也可以选择其他GPIO管脚用于按键检测功能测试,在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX,g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。 + +- GPIO管脚初始化:调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO管脚的方向、电平、中断模式配置 + +- 核心代码如下方所示。 + +- ``` + + + __weak void GPIO_CallBackFunc(void *param) + { + GPIO_Handle *handle = (GPIO_Handle *)param; + BASE_FUNC_UNUSED(handle); + } + + static void GPIO_Init(void) + { + HAL_CRG_IpEnableSet(GPIO2_BASE, IP_CLK_ENABLE); + g_gpio2.baseAddress = GPIO2; + + g_gpio2.pins = GPIO_PIN_4; + HAL_GPIO_Init(&g_gpio2); + HAL_GPIO_SetDirection(&g_gpio2, g_gpio2.pins, GPIO_INPUT_MODE); + HAL_GPIO_SetValue(&g_gpio2, g_gpio2.pins, GPIO_LOW_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio2, g_gpio2.pins, GPIO_INT_TYPE_RISE_EDGE); + + HAL_GPIO_RegisterCallBack(&g_gpio2, GPIO_PIN_4, GPIO_CallBackFunc); + IRQ_Register(IRQ_GPIO2, HAL_GPIO_IrqHandler, &g_gpio2); + IRQ_SetPriority(IRQ_GPIO2, 1); /* set gpio1 interrupt priority to 1, 1~15. 1 is priority value */ + IRQ_EnableN(IRQ_GPIO2); /* gpio interrupt enable */ + + return; + } + + + static void IOConfig(void) + { + /* Config PIN21 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO2_4_AS_GPIO2_4); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO2_4_AS_GPIO2_4, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO2_4_AS_GPIO2_4, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO2_4_AS_GPIO2_4, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO2_4_AS_GPIO2_4, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + } + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 11.1.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,串口会一直打印"wait key"当按下按键时,会触发中断回调函数串口输出打印“in GPIO Key Handler”.可见实验成功。 + +![](../../../docs/pic/1726625374530.jpg) + +#### 11.1.6扩展实验 + +本实验学习通过配置GPIO管脚的中断功能,实现GPIO对按键检测,请学生做如下实验: + +- 用其他GPIO口外接其他外设按键,初始化其GPIO口,观察其现象。 + + + + + +### 11.2 配置GPIO管脚的电平反转功能,实现GPIO管脚控制LED灯的亮灭 + +#### 11.2.1实验目的 + +通过HAL接口完成时钟、GPIO控制器初始化和功能配置。在示例代码中通过控制GPIO管脚的电平翻转实现控制LED灯的亮灭控制。 + +#### 11.2.2实验要求 + +- 1.原理:GPIO,即通用输入输出端口,是计算机或其他电子设备中用于与外部设备进行通信和控制的一种接口,从原理图分析出,该开发板的LED接入的是GPIO4_6。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 11.2.3核心函数说明 + +接口函数请参考10.1.3.1-10.1.3.4 + +11.1.3.1 HAL_GPIO_TogglePin() + +| 定义: | void HAL_GPIO_TogglePin(GPIO_Handle *handle, unsigned int pins) | +| -------- | ------------------------------------------------------------ | +| 功能: | 切换GPIO电平 | +| 参数: | handle:GPIO_Handle类型的变量
pins:GPIO引脚 | +| 返回值: | None | +| 依赖: | gpio.h | + +#### 11.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_gpio_led文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- GPIO管脚选择:示例代码中选择GPIO管脚用于控制LED灯亮灭。也可以选择其他GPIO管脚用于控制LED的功能,在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX,g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。 + +- GPIO管脚初始化:调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO管脚的方向、电平、中断模式配置。 + +- GPIO管脚实现对LED灯控制:对于输出管脚调用接口"HAL_GPIO_TogglePin()"实现管脚电平翻转,结合延时函数实现GPIO管脚控制LED灯每50ms亮灭状态反转一次 + +- 核心代码如下方所示。 + +- ``` + + /** + * @brief Test GPIO PIN control LED. + * @param None + * @retval Value of @ref BASE_StatusType. + */ + BASE_StatusType GPIO_LedSample(void) + { + SystemInit(); + /* Cycle control LED on and off. */ + while (1) { + BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); + HAL_GPIO_TogglePin(&LED_HANDLE, LED_PIN); + DBG_PRINTF("LED Stata reverse! \r\n"); + } + return BASE_STATUS_OK; + } + + static void GPIO_Init(void) + { + HAL_CRG_IpEnableSet(GPIO4_BASE, IP_CLK_ENABLE); + g_gpio4.baseAddress = GPIO4; + g_gpio4.pins = GPIO_PIN_6; + HAL_GPIO_Init(&g_gpio4); + HAL_GPIO_SetDirection(&g_gpio4, g_gpio4.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio4, g_gpio4.pins, GPIO_LOW_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio4, g_gpio4.pins, GPIO_INT_TYPE_NONE); + return; + } + + static void IOConfig(void) + { + /* Config PIN16 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_GPIO4_6); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_GPIO4_6, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_GPIO4_6, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_GPIO4_6, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_GPIO4_6, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + } + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 11.2.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,串口会一直打印"LED Stata reverse!“,并且LED灯50ms秒亮一次。证明实验成功。 + +![](../../../docs/pic/1726638933153.png) ![](../../../docs/pic/1726638820911.jpg) + +#### 11.2.6扩展实验 + +本实验学习通过配置GPIO管脚的电平反转功能,实现GPIO管脚控制LED灯的亮灭,请学生做如下实验: + +- 配置开发板的其余LED灯(查看原理图),编写代码, 展示流水灯的现象。 + + + +## 12、GPT 驱动章节 + +### 12.1 通用脉宽调制PWM-输出频率和占空比可配的PWM波 + +#### 12.1.1实验目的 + +持续输出10s的PWM波之后,然后更改PWM的周期和占空比,查看其变化 + +#### 12.1.2实验要求 + +- 1.原理:GPT(通用脉冲定时器)通过其32位计数器、可配置的分频器、输入捕获和输出比较功能,以及支持两种运行模式和中断生成能力。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + + 3.工具:蜂鸣器或者示波器 + + ![](../../../docs/pic/1726643724134.png) + +#### 12.1.3核心函数说明 + +12.1.3.1 HAL_GPT_Start() + +| 定义: | void HAL_GPT_Start(GPT_Handle *handle) | +| -------- | -------------------------------------- | +| 功能: | 启动GPT | +| 参数: | handle:GPT_Handle类型的变量 | +| 返回值: | None | +| 依赖: | gpt.h | + +12.1.3.2 HAL_GPT_GetConfig() + +| 定义: | BASE_StatusType HAL_GPT_GetConfig(GPT_Handle *handle) | +| -------- | ----------------------------------------------------- | +| 功能: | 获取GPT配置参数。 | +| 参数: | handle:GPT_Handle类型的变量 | +| 返回值: | BASE_STATUS_OK BASE_STATUS_ERROR | +| 依赖: | gpt.h | + +12.1.3.3 HAL_GPT_Config() + +| 定义: | BASE_StatusType HAL_GPT_Config(GPT_Handle *handle) | +| -------- | -------------------------------------------------- | +| 功能: | GPT配置 | +| 参数: | handle:GPT_Handle类型的变量 | +| 返回值: | BASE_STATUS_OK BASE_STATUS_ERROR | +| 依赖: | gpt.h | + + + +#### 12.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_gpt_pwm_output文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 示例默认输出频率50Hz,占空比为40%的PWM波,其中周期可通过配置Period项更改,占空比可通过refA0和RefB0的参考值进行更改。 + +- 定时器计时10s之后,通过“HAL_GPT_Config”函数,更改GPT输出PWM波的周期和占空比。 + +- 核心代码如下方所示。 + + ``` + + /** + * @brief GPT run and modify period and duty during running. + * @param None. + * @retval None. + */ + void GPT_SampleMain(void) + { + SystemInit(); + DBG_PRINTF("GPT Continued Run begin\r\n"); + HAL_GPT_Start(&g_gptHandle); + BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */ + DBG_PRINTF("Change the duty to 50%%\r\n"); + + HAL_GPT_GetConfig(&g_gptHandle); + g_gptHandle.period = 59999; /* 59999 is the number of GPT counting cycles. */ + g_gptHandle.refA0.refdot = 20000; /* 20000 is the value of PWM reference point A. */ + g_gptHandle.refB0.refdot = 50000; /* 50000 is the value of PWM reference point A. */ + HAL_GPT_Config(&g_gptHandle); + } + + + + static void GPT2_Init(void) + { + HAL_CRG_IpEnableSet(GPT2_BASE, IP_CLK_ENABLE); + + g_gptHandle.baseAddress = GPT2; + g_gptHandle.clockDiv = 10 - 1; /* 10 is the internal frequency division of GPT */ + g_gptHandle.period = 49999; /* 49999 is the number of GPT counting cycles. */ + g_gptHandle.refA0.refdot = 10000; /* 10000 is the value of PWM reference point A. */ + g_gptHandle.refA0.refAction = GPT_ACTION_OUTPUT_HIGH; /* GPT Action High */ + g_gptHandle.refB0.refdot = 30000; /* 30000 is the value of PWM reference point B. */ + g_gptHandle.refB0.refAction = GPT_ACTION_OUTPUT_LOW; /* GPT Action Low */ + g_gptHandle.bufLoad = BASE_CFG_ENABLE; + g_gptHandle.pwmKeep = BASE_CFG_ENABLE; + g_gptHandle.handleEx.periodIntEnable = BASE_CFG_DISABLE; + g_gptHandle.handleEx.outputFinIntEnable = BASE_CFG_DISABLE; + g_gptHandle.triggleAdcOutFinish = BASE_CFG_DISABLE; + g_gptHandle.triggleAdcPeriod = BASE_CFG_DISABLE; + + HAL_GPT_Init(&g_gptHandle); + + } + + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 12.1.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,首先打印“GPT Continued Run begin”,蜂鸣器的BEEP口接GPIO5_2引脚持续输出PWM波,蜂鸣器持续发出声音,过10s后,串口打印“Change the duty to 50%”,蜂鸣器声音发生变化,则实验成功。 + +![](../../../docs/pic/1726641165140.png) ![](../../../docs/pic/1726641355806(1).jpg) + +#### 12.1.6扩展实验 + +本实验学习通过通用脉宽调制PWM-输出频率和占空比可配的PWM波,请学生做如下实验: + +- 改变PWM波的周期和占空比,并用示波器或者其他外设测试结果和现象。 + + + +## 13、I2C 驱动章节 + +### 13.1 配置I2C作为主机以阻塞方式进行数据的接收、发送,通过Debug串口打印数据收发的结果 + +#### 13.1.1实验目的 + +通过配置开发板的I2C控制器与外设AT24C64做通信,通过串口打印出通信信息。 + +#### 13.1.2实验要求 + +- 1.原理:I2C是双向通讯的,由两根线完成,分别是:SDA(串行数据线)、SCL(串行时钟线),接口输出模式为开漏输出,其总线接口已经集成到SOC内部,我们只需要通过原理图找到它的接口,在用外设的杜邦线或者其它方法连接到此接口上就可以实现I2C的通讯。 + + SDA与SCL都外接了上拉电阻,所以当SDA空闲时刻输出的永远是高电平,它对外设也有一定要求,要求外设的输出模式也是开漏输出,因为这跟它本身的电路实现有关,若两个电路接口模式不一则是无法完成正常通讯的。 + +- 2.硬件要求:Hi3061M核心板,AT24C64模块; + + ![](../../../docs/pic/image-20240829165616356.png) + + + + ![](../../../docs/pic/1727347239030.png) + +#### 13.1.3核心函数说明 + +13.1.3.1 HAL_I2C_MasterWriteBlocking() + +| 定义: | BASE_StatusType HAL_I2C_MasterWriteBlocking(I2C_Handle *handle, unsigned short devAddr, unsigned char *wData,unsigned int dataSize, unsigned int timeout) | +| -------- | ------------------------------------------------------------ | +| 功能: | 以阻塞模式发送数据。 | +| 参数: | handle:I2C句柄指针,详细请参考I2CI2C_Handle定义。
devAddr:从属设备地址。
wData要发送的数据缓冲区的地址:。
dataSize:发送数据大小
timeout:超时时间。 | +| 返回值: | BASE status type | +| 依赖: | i2c.h | + +13.1.3.2 HAL_I2C_MasterReadBlocking() + +| 定义: | BASE_StatusType HAL_I2C_MasterReadBlocking(I2C_Handle *handle, unsigned short devAddr, unsigned char *rData,unsigned int dataSize, unsigned int timeout) | +| -------- | ------------------------------------------------------------ | +| 功能: | 以阻塞模式接收数据。 | +| 参数: | handle:I2C句柄指针,详细请参考I2CI2C_Handle定义。
devAddr:从属设备地址。
rData:要接收的数据缓冲区的地址:。
dataSize:发送数据大小
timeout:超时时间。 | +| 返回值: | BASE status type | +| 依赖: | i2c.h | + +13.1.3.2 Sample24c64ReadData() + +| 定义: | static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len) | +| -------- | ------------------------------------------------------------ | +| 功能: | 从24c64 EEPROM读取数据。 | +| 参数: | addr:EEPROM的内存地址。
buffer:待接收数据的缓冲区地址。
len:要读取的数据大小。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | sample_i2c_master_interrupt_at24c64.h | + +#### 13.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_i2c_master_blocking_at24c64文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 2C控制器选择:可选择I2C0或I2C1实现与EEPROM的数据接收和发送。 + +- I2C初始化:调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式(7bit寻址或10bit寻址)、通讯速率等参数进行配置。 + +- 操作I2C写入和读取EEPROM的内容:通过调用 "HAL_I2C_MasterWriteBlocking()"接口以阻塞方式向EEPROM目标内存地址写入数据;通过调用"HAL_I2C_MasterReadBlocking()"接口以阻塞方式实现从EEPROM的目标地址中接收数据。 + +- 核心代码如下方所示。 + +- ``` + #define DEV_24C64_ADDRESS_WRITE 0xA0 + #define DEV_24C64_ADDRESS_READ 0xA1 + #define I2C_SAMPLE_24C64_OPT_LEN 8 + #define I2C_SAMPLE_24C64_OPT_START_ADDR 0x0 + #define I2C_SAMPLE_24C64_DATA_OFFSET 2 + #define I2C_SAMPLE_24C64_PAGE_SIZE 32 + #define I2C_SAMPLE_24C64_ADDR_SIZE 2 + #define I2C_SAMPLE_24C64_OPT_ONCE_LEN 255 + #define I2C_SAMPLE_24C64_ADDRESS_POS 8 + #define I2C_SAMPLE_24C64_ADDRESS_MASK 0xFF + + #define I2C_SAMPLE_24C64_TEST_NUM 200 + #define I2C_SAMPLE_MAX_TIMEOUT 10000 + + /** + * @brief Copy data. + * @param destBuffer dest buffer. + * @param srcBuffer source buffer. + * @param len Number of the data to be copy. + * @retval None. + */ + static void CopyData(unsigned char *destBuffer, unsigned char *srcBuffer, unsigned int len) + { + for (unsigned int i = 0; i < len; i++) { + destBuffer[i] = srcBuffer[i]; /* Copy the srcBuffer data to the destBuffer. */ + } + } + + /** + * @brief Read data from eeprom. + * @param addr The memory address of eeprom. + * @param buffer Address of buff to be receive data. + * @param len Number of the data to be read. + * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT. + */ + static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len) + { + BASE_StatusType ret = BASE_STATUS_OK; + /* Define variables for internal use. */ + unsigned char tempAddr[I2C_SAMPLE_24C64_ADDR_SIZE]; + unsigned int currentLen = len; + unsigned int currentAddr = addr; + unsigned int tempReadLen; + unsigned char *tempBuffer = buffer; + + /* Start read data from the 24c64 eeprom. */ + while (1) { + if (currentLen == 0) { + break; + } + /* Set the memory address of eeprom. */ + tempAddr[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK; + tempAddr[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK; + + tempReadLen = currentLen; + if (currentLen > I2C_SAMPLE_24C64_OPT_ONCE_LEN) { + tempReadLen = I2C_SAMPLE_24C64_OPT_ONCE_LEN; + } + /* Send the memory address of eeprom. */ + ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempAddr, + I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret); + return ret; + } + /* Read data from eeprom. */ + ret = HAL_I2C_MasterReadBlocking(&g_i2c0, DEV_24C64_ADDRESS_READ, tempBuffer, + tempReadLen, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret); + return ret; + } + /* Updata the destAddress, srcAddress and len. */ + currentAddr += tempReadLen; + currentLen -= tempReadLen; + tempBuffer += tempReadLen; + } + return ret; + } + + /** + * @brief Read data from eeprom. + * @param addr The memory address of eeprom. + * @param buffer Address of buff to be send. + * @param len Number of the data to be send. + * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT. + */ + static BASE_StatusType Sample24c64WriteData(unsigned int addr, unsigned char *buffer, unsigned int len) + { + unsigned char tempWrite[I2C_SAMPLE_24C64_PAGE_SIZE + I2C_SAMPLE_24C64_ADDR_SIZE]; + unsigned int currentLen = len; + unsigned int currentAddr = addr; + unsigned int tempWriteLen; + unsigned char *tempBuffer = buffer; + BASE_StatusType ret = BASE_STATUS_OK; + + /* Start send data to eeprom. */ + while (1) { + if (currentLen == 0) { + break; + } + tempWriteLen = I2C_SAMPLE_24C64_PAGE_SIZE - (currentAddr % I2C_SAMPLE_24C64_PAGE_SIZE); + if (tempWriteLen > currentLen) { + tempWriteLen = currentLen; + } + /* Set the memory address of eeprom. */ + tempWrite[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK; + tempWrite[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK; + CopyData(&tempWrite[I2C_SAMPLE_24C64_ADDR_SIZE], tempBuffer, tempWriteLen); + /* Send data to eeprom. */ + ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempWrite, + tempWriteLen + I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret); + break; + } + /* Updata the destAddress, srcAddress and len. */ + currentAddr += tempWriteLen; + currentLen -= tempWriteLen; + tempBuffer += tempWriteLen; + } + return ret; + } + + /** + * @brief Send and receive data with the 24c64 eeprom in interrupt mode as master. + * @retval None. + */ + void I2cBlocking24c64Processing(void) + { + BASE_StatusType ret; + unsigned int i; + unsigned int dataFlag; + unsigned char tempWriteBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0}; + unsigned int successCnt = 0; + + SystemInit(); + DBG_PRINTF("I2C Blocking 24C64 Start\r\n"); + for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) { + tempWriteBuff[i] = 0x5A; /* The written data. */ + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + for (int j = 0; j < I2C_SAMPLE_24C64_TEST_NUM; j++) { + unsigned char tempReadBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0}; + /* Write 24c64 data */ + ret = Sample24c64WriteData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempWriteBuff, I2C_SAMPLE_24C64_OPT_LEN); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret); + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + /* Read 24c64 data */ + ret = Sample24c64ReadData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempReadBuff, I2C_SAMPLE_24C64_OPT_LEN); + if (ret != BASE_STATUS_OK) { + DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret); + } + BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */ + /* Compare read and write data */ + dataFlag = 0; + for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) { + if (tempReadBuff[i] != tempWriteBuff[i]) { + DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i, + tempReadBuff[i], tempWriteBuff[i]); + dataFlag = 1; + break; + } + } + /* The read data is exactly the same as the written data. */ + if (dataFlag == 0) { + successCnt++; + DBG_PRINTF("I2C Data Success\r\n"); + } + } + DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt); + } + + + + static void I2C0_Init(void) + { + HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE); /* I2C0 clock enable. */ + g_i2c0.baseAddress = I2C0; + g_i2c0.functionMode = I2C_MODE_SELECT_MASTER_ONLY; + g_i2c0.addrMode = I2C_7_BITS; + g_i2c0.sdaHoldTime = 10; /* 10 is sda Hold Time */ + g_i2c0.freq = 400000; /* freqence is 400000 */ + g_i2c0.transferBuff = NULL; + g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE; + g_i2c0.handleEx.spikeFilterTime = 0; + g_i2c0.handleEx.sdaDelayTime = 0; + g_i2c0.timeout = 10000; /* 10000 is time out */ + g_i2c0.state = I2C_STATE_RESET; + HAL_I2C_Init(&g_i2c0); + } + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + - 步骤五:将AT24C64的SCL和SDA分别接入开发板的I2C0_SCL(GPIO4_2)、I2C0_SDA(GPIO4_3),然后接3.3V或者5V再接地。 + - ![](../../../docs/pic/1727348074534.png) + +#### 13.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,可以看到开发板与AT24C64通信成功。 + +![](../../../docs/pic/1727348096035.png) + +#### 13.1.6扩展实验 + +- 试着用中断进行IIC的接收和发送通信。 + + + +## 14、IWDG驱动章节 + +### 14.1 配置IWDG参数,验证看门狗复位功能,软件进行喂狗操作 + +#### 14.1.1实验目的 + +通过设置开发板内的看门狗模块的窗口值和时间,在计数器减到窗口值还没喂狗,则复位复位,反之则不复位。 + +#### 14.1.2实验要求 + +- 1.原理:IWDG(独立看门狗)的工作原理主要基于一个12位的递减计数器,该计数器由一个独立的RC振荡器提供时钟信号。这个计数器在启动后会开始递减计数,当计数器的值递减到0时,就会触发一个复位信号,从而强制系统进行复位。然而,通过在计数器达到0之前对其进行“喂狗”操作(即重新加载计数器的值),可以避免产生复位信号,从而保持系统的正常运行。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 14.1.3核心函数说明 + +14.1.3.1 HAL_IWDG_Start() + +| 定义: | void HAL_IWDG_Start(IWDG_Handle *handle) | +| -------- | ---------------------------------------- | +| 功能: | 开始IWDG计数。 | +| 参数: | handle:IWDG_Handlel类型数据 | +| 返回值: | None | +| 依赖: | iwdg.h | + +14.1.3.2 HAL_IWDG_Refresh() + +| 定义: | void HAL_IWDG_Refresh(IWDG_Handle *handle) | +| -------- | ------------------------------------------ | +| 功能: | 刷新IWDG计数器。(喂狗) | +| 参数: | handle:IWDG_Handlel类型数据 | +| 返回值: | None | +| 依赖: | iwdg.h | + +14.1.3.3 HAL_IWDG_SetWindowValueEx() + +| 定义: | void HAL_IWDG_SetWindowValueEx(IWDG_Handle *handle, unsigned int windowValue, IWDG_TimeType timeType) | +| -------- | ------------------------------------------------------------ | +| 功能: | 设置IWDG计数器的窗口值。 | +| 参数: | handle:IWDG_Handlel类型数据
windowValue:IWDG计数器的负载值。
timeType:IWDG时间类型。 | +| 返回值: | None | +| 依赖: | iwdg_ex.h | + +#### 14.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_iwdg文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 在"SystemInit()”接口中配置IWDG的初始值、窗口值和窗口使能、分频系数等参数。 + +- 调用"HAL_IWDG_Start()"启动看门狗。 + +- 设置调用"HAL_IWDG_Refresh()"进行喂狗操作,如果调用喂狗操作则不复位,否则计数为0没喂狗则系统复位,程序重新执行。 + +- 核心代码如下方所示。 + +- ``` + #define CYCLE_INTERVAL_TIME 600 + + /** + * @brief IWDG refresh sample function + * @param None + * @return BASE_StatusType + */ + BASE_StatusType IWDG_RefreshSample(void) + { + SystemInit(); + HAL_IWDG_Start(&g_iwdg); /* iwdg start */ + DBG_PRINTF("\r\n START : test iwdg sample \r\n"); + while (1) { + DBG_PRINTF("test iwdg sample \r\n"); + BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME); + /* User can Add HAL_IWDG_Refresh() API here, iwdg not reset because refresh period, \ + if not refresh, next time reset. */ + HAL_IWDG_Refresh(&g_iwdg); /* The dog feeding time is determined by the user. */ + } + return BASE_STATUS_OK; + } + + static void IWDG_Init(void) + { + HAL_CRG_IpEnableSet(IWDG_BASE, IP_CLK_ENABLE); /* IWDG clock enable. */ + g_iwdg.baseAddress = IWDG; + g_iwdg.timeValue = 1000; /* 1000 is time value */ + g_iwdg.timeType = IWDG_TIME_UNIT_MS; + g_iwdg.freqDivValue = IWDG_FREQ_DIV_128; + HAL_IWDG_Init(&g_iwdg); + HAL_IWDG_EnableWindowModeEx(&g_iwdg); + HAL_IWDG_SetWindowValueEx(&g_iwdg, 500, IWDG_TIME_UNIT_MS); /* 500 is window value */ + } + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 14.1.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据.,可以看出程序开始“ START : test iwdg sample”,喂一次狗输出一次“test iwdg sample”,可以看出通过不断的喂狗系统没有复位。证明实验成功。 + +![](../../../docs/pic/1726726305937.jpg) + +#### 14.1.6扩展实验 + +本实验学习通过配置IWDG参数,验证看门狗复位功能,软件进行喂狗操作,请学生做如下实验: + +- 尝试设置窗口值,使其喂狗失败,查看其现象。 + + + +## 15、PGA驱动章节 + +### 15.1 运放的基本使用 - ADC采样PGA的输出电压 + +#### 15.1.1实验目的 + +测试PGA的放大电压功能,向PGA0_P0(GPIO2_5)注入0-3.3V的电压,并用ADC采样PGA的电压。 + +#### 15.1.2实验要求 + +- 1.原理:PGA(可编程增益放大器)‌是一种通用性很强的放大器,其放大倍数可以根据需要用程序进行控制。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 15.1.3核心函数说明 + +15.1.3.1 HAL_ADC_SoftTrigSample() + +| 定义: | BASE_StatusType HAL_ADC_SoftTrigSample(ADC_Handle *adcHandle, unsigned int soc) | +| -------- | ------------------------------------------------------------ | +| 功能: | 该软件只触发一个soc。 | +| 参数: | adcHandle:ADC_Handle
soc:SOC的ID | +| 返回值: | BASE status type: OK, ERROR. | +| 依赖: | adc.h | + +15.1.3.2 HAL_ADC_CheckSocFinish() + +| 定义: | BASE_StatusType HAL_ADC_CheckSocFinish(ADC_Handle *adcHandle, unsigned int soc) | +| -------- | ------------------------------------------------------------ | +| 功能: | 检查SOC完成标志。 | +| 参数: | adcHandle:ADC_Handle
soc:SOC的ID | +| 返回值: | BASE_STATUS_ERROR BASE_STATUS_OK | +| 依赖: | adc.h | + +15.1.3.3 HAL_ADC_GetConvResult() + +| 定义: | unsigned int HAL_ADC_GetConvResult(ADC_Handle *adcHandle, unsigned int soc) | +| -------- | ------------------------------------------------------------ | +| 功能: | 获取SOC转换后的采样结果。 | +| 参数: | adcHandle:ADC_Handle
soc:SOC的ID | +| 返回值: | unsigned int类型ADC转换结果 | +| 依赖: | adc.h | + +15.1.3.4 HAL_ADC_ConfigureSoc() + +| 定义: | BASE_StatusType HAL_ADC_ConfigureSoc(ADC_Handle *adcHandle, ADC_SOCNumber soc, SOC_Param *socParam) | +| -------- | ------------------------------------------------------------ | +| 功能: | 配置指定的SOC参数。 | +| 参数: | adcHandle:ADC_Handle
soc:SOC的ID(转换开始),管理特定的样本输入。
socParam:SOC的参数结构。这与外围电路设计有关, | +| 返回值: | BASE status type: OK, ERROR. | +| 依赖: | adc.h | + + + +#### 15.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_pag文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 使用了PGA的内部电阻模式,电压输出到PGA端,通过PGA进行2倍的放大,并通过ADC将最后采样结果输出。 + +- 采用内部电阻模式, 增益放大值为X2倍,增益值可在PGA模块的配置界面中进行更改,其对应的设置选项为“g_pga.gain”。 + +- 核心代码如下方所示。 + +- ``` + + /** + * @brief The PGA amplifies the DAC voltage and uses the ADC to sample the output of the PGA. + * @param None. + * @retval None. + */ + void PGA_ReultSampling(void) + { + SystemInit(); + DBG_PRINTF("The PGA amplifies the output of the DAC and uses the ADC to sample the result.\r\n"); + /* Configure ADC software triggering. */ + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); + BASE_FUNC_DELAY_MS(10); /* delay 10 ms */ + if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM1) == BASE_STATUS_ERROR) { + DBG_PRINTF("ADC sampling error output.\r\n"); + return; + } + /* Software trigger ADC sampling */ + unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1); + DBG_PRINTF("Sampling completed, result: %x\r\n", ret); + float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("Output voltage of the PGA: %f\r\n", voltage); + return; + } + static void ADC0_Init(void) + { + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + HAL_ADC_Init(&g_adc); + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA0; /* PGA0_OUT(ADC AIN0) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); + } + static void PGA0_Init(void) + { + HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE); + g_pga0.baseAddress = PGA0_BASE; + g_pga0.externalResistorMode = BASE_CFG_DISABLE; + g_pga0.gain = PGA_GAIN_2X; + HAL_PGA_Init(&g_pga0); + } + + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 15.1.5实验结果 + +烧录成功后,打开串口工具,将PGA0_N0(GPIO2_6)接地,PGA0_P0(GPIO2_5)接0.3V的电压,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,可以看出0.3V被放大2倍,证明实验成功。 + +![](../../../docs/pic/1726733706495.jpg) + +#### 15.1.6扩展实验 + +本实验学习通过运放的基本使用 - ADC采样PGA的输出电压,请学生做如下实验: + +- 改变增益放大值,改为x4、x8、x16查看其放大后的电压。 + + + +## 16、PMC驱动章节 + +### 16.1 配置PMC模块的定时唤醒功能,实现对深度睡眠芯片的唤醒 + +#### 16.1.1实验目的 + +测试PMC模块的睡眠模式,进入睡眠模式后,通过定时唤醒方式实现对深度睡眠芯片唤醒,唤醒后串口打印消息。 + +#### 16.1.2实验要求 + +- 1.原理:PMC模块的定时唤醒功能通过内置的定时器实现,这些定时器可以根据用户需求进行设置,并在达到预设时间后触发PMC的唤醒或执行相应的操作。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 16.1.3核心函数说明 + +16.1.3.1 HAL_PMC_GetWakeupType() + +| 定义: | PMC_LowpowerType HAL_PMC_GetWakeupType(PMC_Handle *handle) | +| -------- | ---------------------------------------------------------- | +| 功能: | 获取唤醒源类型。 | +| 参数: | handle:PMC handle | +| 返回值: | PMC_LowpowerType 类型变量 | +| 依赖: | pmc.h | + +16.1.3.2 HAL_PMC_EnterDeepSleepMode() + +| 定义: | void HAL_PMC_EnterDeepSleepMode(PMC_Handle *handle) | +| -------- | --------------------------------------------------- | +| 功能: | 进入深度睡眠界面。 | +| 参数: | handle:PMC handle | +| 返回值: | None | +| 依赖: | pmc.h | + +#### 16.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_pmc_wakeup文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- PMC初始化:调用接口"HAL_PMC_Init()”完成对示例代码中PMC的基地址、唤醒模式(包括定时唤醒、管脚唤醒)、唤醒时间配置。 + +- 操作PMC模块进行定时唤醒:在完成PMC初始化操作以后,调用"HAL_PMC_EnterDeepSleepMode()"实现芯片进入深入睡眠模式;在经过设定的唤醒时间后,芯片会唤醒程序复位重新运行,调用"HAL_PMC_GetWakeupType()"获取芯片是从何种模式唤醒,当从深度睡眠中定时唤醒时Debug串口会打印"wakeup from deepsleep."提示信息。 + +- 核心代码如下方所示。 + +- ``` + + + static void PMC_Init(void) + { + HAL_CRG_IpEnableSet(PMC_BASE, IP_CLK_ENABLE); + g_pmc.baseAddress = PMC_BASE; + g_pmc.wakeupSrc = PMC_WAKEUP_CNT; + g_pmc.wakeupTime = 100000; + g_pmc.pvdEnable = BASE_CFG_DISABLE; + HAL_PMC_Init(&g_pmc); + } + #define PMC_UART_BAUDRATE 115200 + + /** + * @brief User callbaclk after wakeup from deepsleep. + * @param handle pmc handle. + * @retval None + */ + static void UserFuncAfterWakeup(void) + { + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* Open uart's clock */ + HAL_UART_Init(&g_uart0); /* initialize uart */ + DBG_PRINTF("wakeup from deepsleep.\r\n"); + } + + /** + * @brief A sample of PMC's HAL layer. + * @param None. + * @retval None + */ + void PmcWakeupSample(void) + { + int count = 0; + PMC_LowpowerType wakeupType; + SystemInit(); + wakeupType = HAL_PMC_GetWakeupType(&g_pmc); + if (wakeupType == PMC_LP_DEEPSLEEP) { + UserFuncAfterWakeup(); + } + while (1) { + if (count == 1000) { /* 1000: Enter lowpower mode every 1 second */ + count = 0; + DBG_PRINTF("Enter deep sleep mode.\r\n"); + BASE_FUNC_DELAY_MS(100); /* Delay 100ms to wait for uart output all data */ + HAL_UART_DeInit(&g_uart0); /* deinitialize uart */ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_DISABLE); /* Close uart's clock */ + HAL_PMC_EnterDeepSleepMode(&g_pmc); /* Enter deep sleep mode */ + } + BASE_FUNC_DELAY_MS(1); /* Delay 1ms */ + count++; + } + } + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 16.1.5实验结果 + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,程序进入死循环,串口打印“Enter deep sleep mode”进入深入睡眠模式,经过设定的唤醒时间后,芯片会唤醒程序复位重新运行,串口会打印"wakeup from deepsleep“程序继续循环。证明实验成功 + +![](../../../docs/pic/1726738087431.jpg) + +#### 16.1.6扩展实验 + +本实验学习配置PMC模块的定时唤醒功能,实现对深度睡眠芯片的唤醒,请学生做如下实验: + +- 改写设定唤醒时间,查看其现象。 + + + +## 17、UART 驱动章节 + +### 17.1 UART-中断模式下环回发送数据 + +#### 17.1.1实验目的 + +测试开发板UART控制器的中断发送接收功能,与终端做相互通信。 + +#### 17.1.2实验要求 + +- 1.原理:‌UART(通用异步收发传输器)是一种异步串行通信协议,它使用两根线(一根发送,一根接收)进行全双工通信。UART通信是异步的,意味着数据的发送和接收不需要一个持续的时钟信号来同步,而是通过特定的起始、数据、停止位来进行数据的发送和接收。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 17.1.3核心函数说明 + +17.1.3.1 HAL_UART_ReadIT() + +| 定义: | BASE_StatusType HAL_UART_ReadIT(UART_Handle *uartHandle, unsigned char *saveData, unsigned int dataLength) | +| :------- | ------------------------------------------------------------ | +| 功能: | 在中断模式下接收数据。 | +| 参数: | uartHandle:UART handle
saveData:要保存的数据缓冲区的地址。
dataLength:存储缓冲区中的数据长度。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | uart.h | + +17.1.3.1 HAL_UART_WriteIT() + +| 定义: | BASE_StatusType HAL_UART_WriteIT(UART_Handle *uartHandle, unsigned char *srcData, unsigned int dataLength) | +| -------- | ------------------------------------------------------------ | +| 功能: | 在中断模式下接收数据。 | +| 参数: | uartHandle:UART handle
saveData:要保存的数据缓冲区的地址。
dataLength:存储缓冲区中的数据长度。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | uart.h | + +17.1.3.1 HAL_UART_RegisterCallBack() + +| 定义: | BASE_StatusType HAL_UART_RegisterCallBack(UART_Handle *uartHandle, UART_CallbackFun_Type typeID,UART_CallbackType pCallback) | +| -------- | ------------------------------------------------------------ | +| 功能: | 用户回调函数注册界面。 | +| 参数: | uartHandle:UART handle
typeID:回调函数类型的Id。
pCallback:指定callbcak函数的指针。 | +| 返回值: | BASE_StatusType: OK, ERROR. | +| 依赖: | uart.h | + +#### 17.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_uart文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 接收:需要使用者自行开辟内存空间,将内存首地址和需要接收的字符长度作为入参传入HAL_UART_ReadIT(),接收到的数据会存到缓存中。 + +- 发送:在接收中断上报后,将缓存中的数据作为待发送数据,填入HAL_UART_WriteIT()。 + +- 发送数据完成之后,会调用发送完成中断回调函数,默认为“UART0ReadInterruptCallback”, 可通过“HAL_UART_RegisterCallBack”函数进行更改。 + +- 接收数据完成之后,会调用接收完成中断回调函数,默认为“ReadCallBack”, 用户可通过“HAL_UART_RegisterCallBack”函数进行更改。 + +- 核心代码如下方所示。 + + ``` + /** + * @brief User callbaclk after wakeup from deepsleep. + * @param handle pmc handle. + * @retval None + */ + static void UserFuncAfterWakeup(void) + { + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* Open uart's clock */ + HAL_UART_Init(&g_uart0); /* initialize uart */ + DBG_PRINTF("wakeup from deepsleep.\r\n"); + } + + /** + * @brief A sample of PMC's HAL layer. + * @param None. + * @retval None + */ + void PmcWakeupSample(void) + { + int count = 0; + PMC_LowpowerType wakeupType; + SystemInit(); + wakeupType = HAL_PMC_GetWakeupType(&g_pmc); + if (wakeupType == PMC_LP_DEEPSLEEP) { + UserFuncAfterWakeup(); + } + while (1) { + if (count == 1000) { /* 1000: Enter lowpower mode every 1 second */ + count = 0; + DBG_PRINTF("Enter deep sleep mode.\r\n"); + BASE_FUNC_DELAY_MS(100); /* Delay 100ms to wait for uart output all data */ + HAL_UART_DeInit(&g_uart0); /* deinitialize uart */ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_DISABLE); /* Close uart's clock */ + HAL_PMC_EnterDeepSleepMode(&g_pmc); /* Enter deep sleep mode */ + } + BASE_FUNC_DELAY_MS(1); /* Delay 1ms */ + count++; + } + } + + __weak void UART0InterruptErrorCallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ + } + __weak void WriteCallBack(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ + } + __weak void ReadCallBack(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ + } + static void UART0_Init(void) + { + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart.baseAddress = UART0; + g_uart.baudRate = UART0_BAND_RATE; + g_uart.dataLength = UART_DATALENGTH_8BIT; + g_uart.stopBits = UART_STOPBITS_ONE; + g_uart.parity = UART_PARITY_NONE; + g_uart.txMode = UART_MODE_INTERRUPT; + g_uart.rxMode = UART_MODE_INTERRUPT; + g_uart.fifoMode = BASE_CFG_ENABLE; + g_uart.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart.hwFlowCtr = BASE_CFG_DISABLE; + g_uart.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart); + HAL_UART_RegisterCallBack(&g_uart, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_IT_FINISH, (UART_CallbackType)WriteCallBack); + HAL_UART_RegisterCallBack(&g_uart, UART_READ_IT_FINISH, (UART_CallbackType)ReadCallBack); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart); + IRQ_SetPriority(IRQ_UART0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_UART0); + } + static void IOConfig(void) + { + /* Config PIN39 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + /* Config PIN40 */ + HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */ + HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */ + HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */ + HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */ + HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */ + } + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 17.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,串口打印“UART Init finish, please enter characters(length no more than 10):”后,在串口调试助手发送“hello!!!”给开发板,最后开发板发送回电脑端打印出“Read Finish: hello!!! Write Finish”。证明实验成功。 + +![](../../../docs/pic/1726798955072.jpg) + +#### 17.1.6扩展实验 + +本实验学习 UART-中断模式下环回发送数据,请学生做如下实验: + +- 有两开发板的话,试着两个开发板相互通信,通过串口通信。 + + + + + +### 17.2 UART-Tx在DMA模式下发送数据Rx在中断模式下接收数据 + +#### 17.2.1实验目的 + +通过配置开发板UART控制器,通过DMA搬运发送数据给中断,再通过中断接收数据。 + +#### 17.2.2实验要求 + +- 1.原理:UART_DMA(串行通信总线DMA传输)是指在微控制器(MCU)上使用通用异步收发传输器(UART)和直接内存访问(DMA)控制器进行数据传输的方法。UART用于串行通信,而DMA用于在不占用CPU资源的情况下进行高速数据传输。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 17.2.3核心函数说明 + +17.1.3.1 HAL_UART_WriteDMA() + +| 定义: | BASE_StatusType HAL_UART_WriteDMA(UART_Handle *uartHandle, unsigned char *srcData, unsigned int dataLength) | +| :------- | ------------------------------------------------------------ | +| 功能: | 在DMA模式发送数据。 | +| 参数: | uartHandle:UART handle
srcData:要发送的数据缓冲区的地址。
dataLength:要发送的数据大小。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT | +| 依赖: | uart.h | + + + +#### 17.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_uart_dmatx_intrx文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 配置UART接收中断以及中断回调函数,默认接收中断回调函数为“ReadCallBack”, 可通过函数“HAL_UART_RegisterCallBack”进行更改。 + +- UART_DMA发送数据:将待发送首地址和字符长度作为入参传入HAL_UART_WriteDMA()。 +- 中断接收数据:将存放接收的首地址,和接收长度作为入参传入到HAL_UART_ReadIT()中。 +- 核心代码如下方所示。 + +``` + +/** + * @brief User-defined write completion interrupt callback function. + * @param UART_Handle UART handle. + * @retval None. + */ +void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("\r\nRead Finish: %s\r\n", g_rxStr); + rxFlag = true; + return; +} + +/** + * @brief User-defined write completion DMA callback function. + * @param handle UART handle. + * @retval None. + */ +void DMA_Channel3CallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + DBG_PRINTF("\r\nwrite_finish\r\n"); + txFlag = true; + return; +} + +/** + * @brief UART DMA Tx and interrupt Rx simultaneously. + * @param None. + * @retval None. + */ +void UART_DMATxAndINTRxSimultaneously(void) +{ + SystemInit(); + DBG_PRINTF("UART Init finish, UART DMA Tx interrupt Rx simultaneously mode:\r\n"); + DBG_PRINTF("Tx transmits data 123456789012345, and Rx receives data with the length of 10 \r\n"); + + txFlag = true; /* Enable DMA transmission */ + rxFlag = true; /* Enable IT reception */ + while (1) { + if (txFlag) { + txFlag = false; + /* DMA transmit data */ + HAL_UART_WriteDMA(&g_uart, g_txStr, TX_DATA_LENGTH); + } + + if (rxFlag) { + rxFlag = false; + /* Clear the received data */ + ClearString(g_rxStr); + /* UART IT read: Length of the received data must be equal to the RX_DATA_LENGTH */ + HAL_UART_ReadIT(&g_uart, g_rxStr, RX_DATA_LENGTH); + } + BASE_FUNC_DELAY_MS(REQUIRE_TIME); /* Add a deletion delay as required */ + } + return; +} + +#define UART0_BAND_RATE 115200 +BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) +{ + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; +} +static void DMA_Channel3Init(void *handle) +{ + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_UART0_TX; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_THREE); +} +static void DMA_Init(void) +{ + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel3Init((void *)(&g_uart)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_THREE, DMA_PRIORITY_LOW); +} +__weak void UART0InterruptErrorCallback(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ +} +__weak void DMA_Channel3CallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + /* USER CODE END UART0_WRITE_DMA_FINISH */ +} +__weak void WriteFinish(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ +} +__weak void ReadCallBack(void *handle) +{ + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ +} +static void UART0_Init(void) +{ + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart.baseAddress = UART0; + g_uart.baudRate = UART0_BAND_RATE; + g_uart.dataLength = UART_DATALENGTH_8BIT; + g_uart.stopBits = UART_STOPBITS_ONE; + g_uart.parity = UART_PARITY_NONE; + g_uart.txMode = UART_MODE_DMA; + g_uart.rxMode = UART_MODE_INTERRUPT; + g_uart.fifoMode = BASE_CFG_ENABLE; + g_uart.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart.hwFlowCtr = BASE_CFG_DISABLE; + g_uart.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart); + HAL_UART_RegisterCallBack(&g_uart, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart, UART_READ_IT_FINISH, (UART_CallbackType)ReadCallBack); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart); + IRQ_SetPriority(IRQ_UART0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_UART0); + g_uart.dmaHandle = &g_dmac; + g_uart.uartDmaTxChn = 3; + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_DMA_FINISH, (UART_CallbackType)DMA_Channel3CallBack); + HAL_UART_RegisterCallBack(&g_uart, UART_WRITE_IT_FINISH, (UART_CallbackType)WriteFinish); +} + +``` + +- 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194776437](../../../docs/pic/1726194776437.jpg) + +- 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 17.2.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,开发板不断的进行UART_DMA发送“write_finish 123456789012345”,在串口调试助手发送数据,开发板串口中断接收数据并打印。证明实验成功。 + +![](../../../docs/pic/1726815312053.jpg) ![](../../../docs/pic/1726815257210.jpg) + +#### 17.2.6扩展实验 + +本实验学习 UART-Tx在DMA模式下发送数据Rx在中断模式下接收数据,请学生做如下实验: + +- 尝试UART-Tx在中断模式下发送数据Rx在DMA模式下接收数据。 + +## 18、 ADC 驱动章节 + +### 18.1 配置ADC的单次采样功能,利用DMA搬运结果 + +#### 18.1.1实验目的 + +配置开发板的ADC模块,使用软件触发ADC采样,采样GPIO0_5的电压,采样结束后触发DMA搬运结果。搬运结束产生中断,在ADC的DMA完成回调函数中读出结果。 + +#### 18.1.2实验要求 + +- 1.原理:‌**ADC**‌(模数转换器)是将模拟信号转换为数字信号的设备。它的基本工作原理包括‌[采样](https://www.baidu.com/s?rsv_idx=1&wd=采样&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=7a32zwvyXvd90SKrPo8%2BRbxYYSAf45mmuf1AcpnNjKlTpCi%2FEJZVi%2B6hBJQ&sa=re_dqa_generate)、保持、‌[量化](https://www.baidu.com/s?rsv_idx=1&wd=量化&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=1918Y8g70q7Qv2DiqjCWgxcvsRN4i7YKC2AhrTy0oR5wc93ygOEhoZs8Prs&sa=re_dqa_generate)和‌[编码](https://www.baidu.com/s?rsv_idx=1&wd=编码&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=1918Y8g70q7Qv2DiqjCWgxcvsRN4i7YKC2AhrTy0oR5wc93ygOEhoZs8Prs&sa=re_dqa_generate)四个步骤。采样是将连续时间信号变成离散时间信号的过程;保持是将采样得到的信号保持在一个恒定的电压水平;量化是将连续的模拟信号离散化,将其分为不同的等级;编码则是将量化后的等级转换为二进制代码。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 18.1.3核心函数说明 + +18.1.3.1 HAL_ADC_StartDma() + +| 定义: | BASE_StatusType HAL_ADC_StartDma(ADC_Handle *adcHandle, unsigned int startSoc, unsigned int endSoc, unsigned int *saveData) | +| :------- | ------------------------------------------------------------ | +| 功能: | 启动ADC转换并启用ADC DMA。使用DMA完成SOC转换后,使用DMA可以传输连续SOC的采样结果。DMA传输的开始和结束由startSoc和endSoc决定。 | +| 参数: | adcHandleADC参数句柄指针
startSoc:DMA传输的第一个SOC结果。
endSoc:DMA传输的最后SOC结果。
saveData:保存转换结果的地址。 | +| 返回值: | BASE status type: OK, ERROR. | +| 依赖: | adc.h | + +18.1.3.2 HAL_ADC_Init() + +| 定义: | BASE_StatusType HAL_ADC_Init(ADC_Handle *adcHandle) | +| :------- | ------------------------------------------------------------ | +| 功能: | 初始化ADC硬件控制器。控制器初始化后,ADC采样后来至少触发了100次。 | +| 参数: | adcHandle:ADC参数句柄指针 | +| 返回值: | BASE status type: OK, ERROR. | +| 依赖: | adc.h | + +#### 18.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_adc_single_trigger_dma文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- ADC触发源:软件。使用接口"HAL_ADC_SoftTrigSample()”完成软件触发。“HAL_ADC_StartDma()”用于配置DMA搬运的源目地址。 + +- ADC采样源: 挂载到SOC1 外部采样源。SOC的在文件“system_init.c”中配置,SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个。 + +- ADC采样结果:DMA完成的回调函数中读取结果。DMA配置请见"SystemInit()”。示例代码中,提前开辟了保存ADC采样结果的内存,DMA搬运结束后,直接从内存读取结果。 + +- 核心代码如下方所示。 + +- ``` + + #define UART0_BAND_RATE 115200 + + static void DMA_Channel0Init(void *handle) + { + DMA_ChannelParam dma_param; + dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_UNALTERED; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_ADC0; + dma_param.destPeriph = DMA_REQUEST_MEM; + dma_param.srcWidth = DMA_TRANSWIDTH_WORD; + dma_param.destWidth = DMA_TRANSWIDTH_WORD; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO); + } + static void DMA_Init(void) + { + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel0Init((void *)(&g_adc)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST); + } + __weak void ADC_DMACallback(ADC_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ADC0_CALLBACK_DMA */ + /* USER CODE END ADC0_CALLBACK_DMA */ + } + static void ADC0_Init(void) + { + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + g_adc.dmaHandle = &g_dmac; + g_adc.adcDmaChn = 0; /* DMA Channel 0 */ + HAL_ADC_Init(&g_adc); + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_ENABLE; + socParam.finishMode = ADC_SOCFINISH_DMA; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); + HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_DMA, (ADC_CallbackType)ADC_DMACallback); + } + + + static unsigned int g_adcRet[10] = {0}; + /** + * @brief User callback function of ADC interrupt one. + * @param adcHandle ADC handle. + * @retval None. + */ + void ADC_DMACallback(ADC_Handle *adcHandle) + { + BASE_FUNC_UNUSED(adcHandle); + DBG_PRINTF("DMACallback\r\n"); + DBG_PRINTF("result: %d\r\n", g_adcRet[0]); + float voltage = (float)g_adcRet[0] / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("voltage: %f\r\n", voltage); + } + + /** + * @brief ADC channels sample with DMA. Transfers four SOC conversion results in one DMA request. + * @param None. + * @retval None. + */ + void ADC_SingleTriggerDma(void) + { + SystemInit(); + DBG_PRINTF("ADC_SingleTriggerDma begin\r\n"); + + HAL_ADC_StartDma(&g_adc, ADC_SOC_NUM1, ADC_SOC_NUM1, g_adcRet); /* Transfer converted data of SOC1 */ + + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software triggers SOC1 */ + } + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 18.1.5实验结果 + +烧录成功后,向ADC_AIN2(GPIO0_5)输入电压来检测ADC采样电压,此次测试ADC_AIN2(GPIO0_5)接入3.3V电压,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,最后测量出电压值“voltage: 3.25247”,在正常误差内,证明实验成功。 + +![](../../../docs/pic/1726821386031.jpg) + +#### 18.1.6扩展实验 + +本实验学习 配置ADC的单次采样功能,利用DMA搬运结果,请学生做如下实验: + +- 尝试用中断回调读取ADC采样结果。 + + + +### 18.2 单次触发ADC,可以产生连续的采样效果 + +#### 18.2.1实验目的 + +配置开发板的ADC模块,使用软件触发ADC开始采样,采样GPIO0_5的电压,采样结束后触发ADC中断,并在中断回调函数中读取ADC转换结果。在每次完成采样结束后,内部会自动产生触发请求,实现连续采样功能。 + +#### 18.2.2实验要求 + +- 1.原理:‌**ADC**‌(模数转换器)是将模拟信号转换为数字信号的设备。它的基本工作原理包括‌[采样](https://www.baidu.com/s?rsv_idx=1&wd=采样&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=7a32zwvyXvd90SKrPo8%2BRbxYYSAf45mmuf1AcpnNjKlTpCi%2FEJZVi%2B6hBJQ&sa=re_dqa_generate)、保持、‌[量化](https://www.baidu.com/s?rsv_idx=1&wd=量化&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=1918Y8g70q7Qv2DiqjCWgxcvsRN4i7YKC2AhrTy0oR5wc93ygOEhoZs8Prs&sa=re_dqa_generate)和‌[编码](https://www.baidu.com/s?rsv_idx=1&wd=编码&fenlei=256&usm=5&ie=utf-8&rsv_pq=dbeebec200edd8a2&oq=ADC原理&rsv_t=1918Y8g70q7Qv2DiqjCWgxcvsRN4i7YKC2AhrTy0oR5wc93ygOEhoZs8Prs&sa=re_dqa_generate)四个步骤。采样是将连续时间信号变成离散时间信号的过程;保持是将采样得到的信号保持在一个恒定的电压水平;量化是将连续的模拟信号离散化,将其分为不同的等级;编码则是将量化后的等级转换为二进制代码。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 18.2.3核心函数说明 + +请参考15.1.3.1-15.1.3.4 + +#### 18.2.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_adc_continue_trigger文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- ADC触发源:软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。连续采样功能中,首次触发来自软件或者其他触发源,后面持续的请求来自ADC内部。 + +- ADC采样源:挂载到SOC1 “adcInput”的外部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个 + +- ADC采样结果:ADC中断回调函数中读取结果。中断回调函数的配置请见"System_Init()”内ADC初始化内容。在回调函数中调用“HAL_ADC_GetConvResult()”获取结果。 + +- 核心代码如下方所示。 + +- ``` + + /** + * @brief User callback function of ADC interrupt one. + * @param adcHandle ADC handle. + * @retval None. + */ + void ADC_ContinueInt(ADC_Handle *adcHandle) + { + DBG_PRINTF("ADC_Int1Finish\r\n"); + unsigned int ret = HAL_ADC_GetConvResult(adcHandle, ADC_SOC_NUM1); + float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */ + DBG_PRINTF("result: %d, voltage: %f\r\n", ret, voltage); + } + + /** + * @brief Continuous sample function by using internal interrupt. + * @param None. + * @retval None. + */ + void ADC_ContinueSample(void) + { + SystemInit(); + DBG_PRINTF("ADC_ContinueSample begin\r\n"); + HAL_ADC_StartIt(&g_adc); /* Enable ADC interrupt */ + /* The first trigger, then internal interrupt triggered continuous sampling */ + HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); + /* + To disable the continuous sampling function, perform the following sampling methods: + (1) Disable the ADC interrupt and use IRQ_DisableN(). + (2) Configure the SOC trigger source and remove interrupt triggering. + */ + } + + __weak void ADC_ContinueInt(ADC_Handle *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN ADC0_CALLBACK_INT2 */ + /* USER CODE END ADC0_CALLBACK_INT2 */ + } + static void ADC0_Init(void) + { + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + g_adc.baseAddress = ADC0; + g_adc.socPriority = ADC_PRIMODE_ALL_ROUND; + HAL_ADC_Init(&g_adc); + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_ENABLE; + socParam.finishMode = ADC_SOCFINISH_INT2; + HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); + HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT2, (ADC_CallbackType)ADC_ContinueInt); + IRQ_Register(IRQ_ADC0_INT2, HAL_ADC_IrqHandlerInt2, &g_adc); + IRQ_SetPriority(IRQ_ADC0_INT2, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_ADC0_INT2); + } + + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 18.2.5实验结果 + +烧录成功后,向ADC_AIN2(GPIO0_5)输入电压来检测ADC采样电压,此次测试ADC_AIN2(GPIO0_5)接入3.3V电压,打开串口工具,可以看到串口一直打印出来出电压值,在正常误差内,证明实验成功。 + +![](../../../docs/pic/1726824735521.jpg) + +#### 18.2.6扩展实验 + +本实验学习单次触发ADC,可以产生连续的采样效果,请学生做如下实验: + +- 尝试用DNA搬运ADC采样结果 + + + +## 19、 TIMER驱动章节 + +### 19.1 周期为1秒的定时器 + +#### 19.1.1实验目的 + +测试开发板的定时器的定时中断功能,每秒产生一次中断,然后中断中串口打印。 + +#### 19.1.2实验要求 + +- 1.原理:基于时钟信号源提供稳定的时钟信号作为计时器的基准。计数器从预设值开始计数,每当时钟信号到达时计数器递增。当计数器达到预设值时,定时器会触发一个中断信号通知中断控制器处理相应的中断服务程序,从而执行预定的操作。 + +- 2.硬件要求:Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 19.1.3核心函数说明 + +19.1.3.1 HAL_TIMER_Config() + +| 定义: | BASE_StatusType HAL_TIMER_Config(TIMER_Handle *handle, TIMER_CFG_TYPE cfgType) | +| :------- | ------------------------------------------------------------ | +| 功能: | 配置定时器 | +| 参数: | handle:Timer Handle
cfgType:定时器配置。 | +| 返回值: | BASE_STATUS_OK BASE_STATUS_ERROR | +| 依赖: | timer.h | + +#### 19.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_timer_interrupt文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 示例默认配置定时周期为1秒,对应的IDE配置参数为“Period(us)”,用户可通过更改此参数,设定定时器的周期。 + +- 定时器计时10s之后,通过“HAL_TIMER_Config”函数,将定时器的周期减半。 + +- 核心代码如下方所示。 + +- ``` + + /** + * @brief Timer run and triggers an interrupt. + * @param None. + * @retval None. + */ + void TIMER_SampleMain(void) + { + TIMER_Handle timerHandle; + + SystemInit(); + DBG_PRINTF("TIMER_SampleMain begin\r\n"); + HAL_TIMER_Start(&g_timerHandle); + + BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */ + DBG_PRINTF("Change period of timer\r\n"); + timerHandle.baseAddress = g_timerHandle.baseAddress; + HAL_TIMER_GetConfig(&timerHandle); + timerHandle.bgLoad = HAL_CRG_GetIpFreq((void *)TIMER0) >> 1; + HAL_TIMER_Config(&timerHandle, TIMER_CFG_BGLOAD); + } + + /** + * @brief Timer Interrupt callback function + * @param handle Handle of Timer + * @retval None. + */ + void TIMER0_InterruptProcess(void *handle) + { + /* USER CODE BEGIN TIMER0_InterruptProcess */ + TIMER_Handle *timerHandle = (TIMER_Handle *)handle; + BASE_FUNC_UNUSED(timerHandle); + DBG_PRINTF("In interrupt\r\n"); + /* USER CODE END TIMER0_InterruptProcess */ + } + + __weak void TIMER0_InterruptProcess(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN TIMER0_InterruptProcess */ + /* USER CODE END TIMER0_InterruptProcess */ + } + static void TIMER0_Init(void) + { + HAL_CRG_IpEnableSet(TIMER0_BASE, IP_CLK_ENABLE); /* TIMER0 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER0) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 1000000; + g_timerHandle.baseAddress = TIMER0; + g_timerHandle.load = load - 1; /* Set timer value immediately */ + g_timerHandle.bgLoad = load - 1; /* Set timer value */ + g_timerHandle.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timerHandle.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timerHandle.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timerHandle.interruptEn = BASE_CFG_ENABLE; + g_timerHandle.adcSocReqEnable = BASE_CFG_DISABLE; + g_timerHandle.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timerHandle); + IRQ_Register(IRQ_TIMER0, HAL_TIMER_IrqHandler, &g_timerHandle); + HAL_TIMER_RegisterCallback(&g_timerHandle, TIMER_PERIOD_FIN, TIMER0_InterruptProcess); + IRQ_SetPriority(IRQ_TIMER0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER0); + } + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + +#### 19.1.5实验结果 + +烧录成功后,打开串口工具,按一下开发板RESET按键复位开发板,可以看到串口打印出来了写入UART0的数据,打印“TIMER_SampleMain begin”,定时器开启,然后1s触发一次定时器中断,打印“In interrupt”,10秒后改变定时器周期,改为0.5s触发一次定时器中断,证明实验成功。 + +![](../../../docs/pic/1727057648326.jpg) + +#### 19.1.6扩展实验 + +本实验学习配置周期为1秒的定时器,请学生做如下实验: + +- 配置周期为2秒的定时器,10秒后改周期为1秒。 + + + +## 20、SPI 驱动章节 + +### 20.1 SPI使用阻塞方式进行主从通信 + +#### 20.1.1实验目的 + +配置开发板的SPI控制器,一个配置主机模式,一个配置从机模式,通过阻塞方式实现两个开发板通信。 + +#### 20.1.2实验要求 + +- 1.原理:SPI是一种高速、全双工、同步的通信总线。它使用四根线进行通信:串行时钟线(‌[SCK](https://www.baidu.com/s?rsv_idx=1&wd=SCK&fenlei=256&usm=2&ie=utf-8&rsv_pq=c75fda3e020e1720&oq=spi原理&rsv_t=75c06nCXNfJjbIxZ3PpLIfBHVlFtnOHtEz7magED0y9UUo9WwbsTuutdFRY&sa=re_dqa_generate))、主机输入/从机输出数据线(‌[MISO](https://www.baidu.com/s?rsv_idx=1&wd=MISO&fenlei=256&usm=2&ie=utf-8&rsv_pq=c75fda3e020e1720&oq=spi原理&rsv_t=b8b6%2FlOR5xcgbIipPZdPnMxLsiwdllxUWPWoSc%2FRotd%2FDiqUsM%2FSktjImtA&sa=re_dqa_generate))、主机输出/从机输入数据线(MOSI)和低电平有效的从机选择线(‌[CS](https://www.baidu.com/s?rsv_idx=1&wd=CS&fenlei=256&usm=2&ie=utf-8&rsv_pq=c75fda3e020e1720&oq=spi原理&rsv_t=b8b6%2FlOR5xcgbIipPZdPnMxLsiwdllxUWPWoSc%2FRotd%2FDiqUsM%2FSktjImtA&sa=re_dqa_generate))。SPI通信协议允许一个主设备启动与一个或多个从设备的同步通信,完成数据的交换。主设备通过SCK提供时钟脉冲,MISO和MOSI用于数据的串行传输。 + +- 2.硬件要求:两个Hi3061M核心板; + + ![](../../../docs/pic/image-20240829165616356.png) + +#### 20.1.3核心函数说明 + +20.1.3.1 HAL_SPI_WriteBlocking() + +| 定义: | BASE_StatusType HAL_SPI_WriteBlocking(SPI_Handle *handle, unsigned char *wData,unsigned int dataSize,unsigned int timeout) | +| :------- | ------------------------------------------------------------ | +| 功能: | 以阻塞模式发送数据。 | +| 参数: | handle:SPI handle
wData:要发送的数据缓冲区的地址
dataSize:要发送的数据数量。
timeout:超时时间,单位:毫秒。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | spi.h | + +20.1.3.2 HAL_SPI_ReadBlocking() + +| 定义: | BASE_StatusType HAL_SPI_ReadBlocking(SPI_Handle *handle,unsigned char *rData,unsigned int dataSize,unsigned int timeout) | +| :------- | ------------------------------------------------------------ | +| 功能: | 以阻塞模式接收数据。 | +| 参数: | handle:SPI handle
rData:要接收的数据缓冲区的地址。
dataSize:要接收的数据数量。
timeout:超时时间,单位:毫秒。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | spi.h | + +20.1.3.3 HAL_SPI_WriteReadBlocking() + +| 定义: | BASE_StatusType HAL_SPI_WriteReadBlocking(SPI_Handle *handle,unsigned char *rData,unsigned char *wData,unsigned int dataSize,unsigned int timeout) | +| :------- | ------------------------------------------------------------ | +| 功能: | 以阻塞模式接收和发送数据。 | +| 参数: | handle:SPI handle
rData:要接收的数据缓冲区的地址。
wData:要发送的数据缓冲区的地址。
dataSize:要接收和发送的数据数量。
timeout:超时时间,单位:毫秒。 | +| 返回值: | BASE status type: OK, ERROR, BUSY, TIMEOUT. | +| 依赖: | spi.h | + +20.1.3.4 HAL_SPI_ChipSelectChannelSet() + +| 定义: | BASE_StatusType HAL_SPI_ChipSelectChannelSet(SPI_Handle *handle, SPI_ChipSelectChannel channel) | +| :------- | ------------------------------------------------------------ | +| 功能: | CS信道配置。 | +| 参数: | handle:SPI handle
channel:SPI CS通道。有关详细信息,请参阅SPI_ChipSelectChannel的枚举定义。 | +| 返回值: | BASE status type: OK, ERROR. | +| 依赖: | spi.h | + +#### 20.1.4实验流程 + +- 步骤一:主机:open_mcu\vendor\yibaina_3061M\demo\sample_spi_master文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 从机:open_mcu\vendor\yibaina_3061M\demo\sample_spi_slave文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- + +- 步骤二:具体配置: + +- 主机: + +- 在"SystemInit()”接口中配置SPI时钟极性、时钟相位、帧格式等参数。 + +- 定义数组,数组中存放主机需要发送的数据。 +- 首先主机调用“HAL_SPI_WriteBlocking()”向从机发送10个数据,之后调用“HAL_SPI_ReadBlocking()”读10个数据,最后调用“HAL_SPI_WriteReadBlocking()”边写边读10个数据,不断循环。。 + +- 从机: +- 在"SystemInit()”接口中配置SPI时钟极性、时钟相位、帧格式等参数。 +- 定义数组,数组中存放从机需要发送的数据。 +- 首先从机调用“HAL_SPI_ReadBlocking()”读取主机发过来的10个数据,之后调用“HAL_SPI_WriteBlocking()”写10个数据,最后调用“HAL_SPI_WriteReadBlocking()”边写边读10个数据,不断循环 + +- 核心代码如下方所示。 + +- ``` + + #define UART0_BAND_RATE 115200 + #define SPI1_FREQ_SCR 2 + #define SPI1_FREQ_CPSDVSR 50 + + #define MASTER_READ_TESE + #define MASTER_READ_WRITE_TESE + #define MASTER_WRITE_TESE + + #define USER_TIMEOUT 0x400 + + #define MANUAL_MODE_SET_CH0 0x1001 + #define MANUAL_MODE_SET_CH1 0x1002 + #define MANUAL_MODE_SET_CH2 0x1003 + #define MANUAL_MODE_SET_CH3 0x1004 + #define MANUAL_MODE_SET_CH4 0x1005 + #define MANUAL_MODE_SET_CH5 0x1006 + #define MANUAL_MODE_SET_CH6 0x1007 + + #define MAX_TIMEOUT_VAL 5000 + + + /** + * @brief Spi master sample processing. + * @param None. + * @retval None. + */ + void MasterTestSampleProcessing(void) + { + unsigned short tempWdata[] = { + MANUAL_MODE_SET_CH0, + MANUAL_MODE_SET_CH1, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4, + MANUAL_MODE_SET_CH5, + MANUAL_MODE_SET_CH6, + MANUAL_MODE_SET_CH2, + MANUAL_MODE_SET_CH3, + MANUAL_MODE_SET_CH4 + }; + unsigned short tempRdata[10] = {0}; + + SystemInit(); + while (1) { + #ifdef MASTER_WRITE_TESE + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempWdata[%d] = 0x%x \r\n", i, tempWdata[i]); + } + HAL_SPI_WriteBlocking(&g_spiSampleHandle, (unsigned char *)tempWdata, sizeof(tempWdata), MAX_TIMEOUT_VAL); + #endif + BASE_FUNC_DELAY_MS(300); /* Delay 300ms */ + #ifdef MASTER_READ_TESE + HAL_SPI_ReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, sizeof(tempRdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x \r\n", i, tempRdata[i]); + } + #endif + BASE_FUNC_DELAY_MS(20); /* Delay 20ms */ + #ifdef MASTER_READ_WRITE_TESE + HAL_SPI_WriteReadBlocking(&g_spiSampleHandle, (unsigned char *)tempRdata, + (unsigned char *)tempWdata, + sizeof(tempWdata), MAX_TIMEOUT_VAL); + for (int i = 0; i < 10; i++) { /* Print the test data for 10 times. */ + DBG_PRINTF("tempRdata[%d] = 0x%x tempWdata[%d] = 0x%x \r\n", i, tempRdata[i], i, tempWdata[i]); + BASE_FUNC_DELAY_MS(10); /* Delay 10ms */ + } + #endif + BASE_FUNC_DELAY_MS(20); /* Delay 20ms */ + } + } + + static void SPI1_Init(void) + { + HAL_CRG_IpEnableSet(SPI1_BASE, IP_CLK_ENABLE); /* SPI1 clock enable. */ + g_spiSampleHandle.baseAddress = SPI1; + g_spiSampleHandle.mode = HAL_SPI_MASTER; + g_spiSampleHandle.csMode = SPI_CHIP_SELECT_MODE_INTERNAL; + g_spiSampleHandle.xFerMode = HAL_XFER_MODE_BLOCKING; + g_spiSampleHandle.clkPolarity = HAL_SPI_CLKPOL_0; + g_spiSampleHandle.clkPhase = HAL_SPI_CLKPHA_0; + g_spiSampleHandle.endian = HAL_SPI_BIG_ENDIAN; + g_spiSampleHandle.frameFormat = HAL_SPI_MODE_MOTOROLA; + g_spiSampleHandle.dataWidth = SPI_DATA_WIDTH_16BIT; + g_spiSampleHandle.freqScr = SPI1_FREQ_SCR; + g_spiSampleHandle.freqCpsdvsr = SPI1_FREQ_CPSDVSR; + g_spiSampleHandle.waitEn = BASE_CFG_DISABLE; + g_spiSampleHandle.waitVal = 127; /* 127 is microwire wait time */ + g_spiSampleHandle.rxBuff = NULL; + g_spiSampleHandle.txBuff = NULL; + g_spiSampleHandle.transferSize = 0; + g_spiSampleHandle.txCount = 0; + g_spiSampleHandle.rxCount = 0; + g_spiSampleHandle.state = HAL_SPI_STATE_RESET; + g_spiSampleHandle.rxIntSize = SPI_RX_INTERRUPT_SIZE_1; + g_spiSampleHandle.txIntSize = SPI_TX_INTERRUPT_SIZE_1; + g_spiSampleHandle.rxDMABurstSize = SPI_RX_DMA_BURST_SIZE_1; + g_spiSampleHandle.txDMABurstSize = SPI_TX_DMA_BURST_SIZE_1; + HAL_SPI_Init(&g_spiSampleHandle); + HAL_SPI_ChipSelectChannelSet(&g_spiSampleHandle, SPI_CHIP_SELECT_CHANNEL_1); + } + + + ``` + +- 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194776437](../../../docs/pic/1726194776437.jpg) + +- 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + +![1726194794028](../../../docs/pic/1726194794028.jpg) + +- 步骤五:SPI1_TXD(GPIO4_2)、SPI1_RXD(GPIO4_1)两个接口两个开发板交叉相连,SPI1_CSN1(GPIO4_3)、SPI1_CLK(GPIO4_0)、SPI1_CSN0(GPIO4_5)这三个接口,两开发板对应连接。 + + ![](../../../docs/pic/1727080322988.png) + +#### 20.1.5实验结果 + +主机: + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,打印主机接收从机的数据“tempRdata[0] = 0x1105....”,打印主机发送的数据 “tempWdata[0] = 0x1001....”,证明实验成功。 + +![](../../../docs/pic/a80ebf7e8a9c613542d5fb01b7fa19b.png) + +从机: + +烧录成功后,打开串口工具,可以看到串口打印出来了写入UART0的数据,打印从机接收主机的数据“tempRdata[0] = 0x1001....”,打印从机发送的数据 “tempWdata[0] = 0x1105....”,证明实验成功。 + +![](../../../docs/pic/071d611d0eacd10171186faea859aff.png) + + + +#### 20.1.6扩展实验 + +本实验学习配置 SPI使用阻塞方式进行主从通信,请学生做如下实验: + +- 配置中断方式进行主从通信。 + + + + + +## 21、QDM驱动章节 + +### 21.单电机双电阻采样的有感Foc应用 + +#### 21.1.1实验目的 + +基于ECMCU105H/ECBMCU201MPC单板的单电机双电阻采样的有感Foc应用,控制电机转动,并调速。 + +#### 21.1.2实验要求 + +- 1.原理:QDM是正交解码模块用于解码增量编码器,针对增量编码器输出的A/B/Z三相信号进行解码,记录位置信息,方向信息和时间信息。 + +- 2.硬件要求:两个Hi3061M核心板加扩展板,24V杰美康电机; + + ![](../../../docs/pic/image-20240530173305431.png) + + ![](../../../docs/pic/1727236640408.png) + + + +#### 21.1.3核心函数说明 + +21.1.3 MCS_QdmInit() + +| 定义: | void MCS_QdmInit(MCS_QdmInitStru *qdmInit) | +| :------- | ------------------------------------------ | +| 功能: | QDM初始化 | +| 参数: | qdmInit:MCS_QdmInitStru类型变量 | +| 返回值: | None | +| 依赖: | msc_inc_enc.c | + +#### 21.1.4实验流程 + +- 步骤一:open_mcu\vendor\yibaina_3061M\demo\sample_qdm文件夹复制到workspace\demo\user目录下(workspace自己建的该项目的工作路径) + +- 步骤二:具体配置: + +- 所有单板电源改制为演示用的24V低压,电机选用42JSF630AS-1000 + +- 电机ABZ编码器线序分别对应功率板上ABZ通道接口 + +- 电机(绿蓝黄)相线分别对应功率板上U/V/W通道接口 + + ``` + + #define UART0_BAND_RATE 1843200 + BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect) + { + CRG_Handle crg; + crg.baseAddress = CRG; + crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC; + crg.pllPreDiv = CRG_PLL_PREDIV_4; + crg.pllFbDiv = 48; /* PLL Multiplier 48 */ + crg.pllPostDiv = CRG_PLL_POSTDIV_2; + crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL; + crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3; + crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; + crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */ + if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { + return BASE_STATUS_ERROR; + } + *coreClkSelect = crg.coreClkSelect; + return BASE_STATUS_OK; + } + static void DMA_Channel0Init(void *handle) + { + DMA_ChannelParam dma_param; + dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC; + dma_param.srcAddrInc = DMA_ADDR_INCREASE; + dma_param.destAddrInc = DMA_ADDR_UNALTERED; + dma_param.srcPeriph = DMA_REQUEST_MEM; + dma_param.destPeriph = DMA_REQUEST_UART0_TX; + dma_param.srcWidth = DMA_TRANSWIDTH_BYTE; + dma_param.destWidth = DMA_TRANSWIDTH_BYTE; + dma_param.srcBurst = DMA_BURST_LENGTH_1; + dma_param.destBurst = DMA_BURST_LENGTH_1; + dma_param.pHandle = handle; + HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO); + } + static void DMA_Init(void) + { + HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE); + g_dmac.baseAddress = DMA; + IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac); + IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac); + IRQ_EnableN(IRQ_DMA_TC); + IRQ_EnableN(IRQ_DMA_ERR); + HAL_DMA_Init(&g_dmac); + DMA_Channel0Init((void *)(&g_uart0)); + HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST); + } + static void ACMP0_Init(void) + { + HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */ + g_acmp0.baseAddress = ACMP0_BASE; + g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT2; + g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT2; + g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT; + g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE; + g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV; + g_acmp0.interruptEn = BASE_CFG_UNSET; + HAL_ACMP_Init(&g_acmp0); + } + static void ADC0_Init(void) + { + HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); + HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV); + HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_1); + g_adc0.baseAddress = ADC0; + g_adc0.socPriority = ADC_PRIMODE_ALL_ROUND; + HAL_ADC_Init(&g_adc0); + SOC_Param socParam = {0}; + socParam.adcInput = ADC_CH_ADCINA0; /* PGA0_OUT(ADC AIN0) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_APT0_SOCA; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM1, &socParam); + socParam.adcInput = ADC_CH_ADCINA1; /* PGA1_OUT(ADC AIN1) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_APT0_SOCA; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM6, &socParam); + socParam.adcInput = ADC_CH_ADCINA9; /* PIN7(ADC AIN9) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM0, &socParam); + socParam.adcInput = ADC_CH_ADCINA5; /* PIN2(ADC AIN5) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM3, &socParam); + socParam.adcInput = ADC_CH_ADCINA15; /* PIN14(ADC AIN15) */ + socParam.sampleTotalTime = ADC_SOCSAMPLE_22CLK; /* adc sample total time 22 adc_clk */ + socParam.trigSource = ADC_TRIGSOC_SOFT; + socParam.continueMode = BASE_CFG_DISABLE; + socParam.finishMode = ADC_SOCFINISH_NONE; + HAL_ADC_ConfigureSoc(&g_adc0, ADC_SOC_NUM4, &socParam); + } + __weak void MotorSysErrCallback(void *aptHandle) + { + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_EVENT_INTERRUPT */ + /* USER CODE END APT0_EVENT_INTERRUPT */ + } + __weak void MotorCarrierProcessCallback(void *aptHandle) + { + BASE_FUNC_UNUSED(aptHandle); + /* USER CODE BEGIN APT0_TIMER_INTERRUPT */ + /* USER CODE END APT0_TIMER_INTERRUPT */ + } + static void APT0_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_ENABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt0, &protectApt); + } + static void APT0_Init(void) + { + HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE); + g_apt0.baseAddress = APT0; + /* Clock Settings */ + g_apt0.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt0.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt0.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_apt0.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt0.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt0.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt0.waveform.divInitVal = 0; + g_apt0.waveform.cntInitVal = 0; + g_apt0.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt0.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt0.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt0.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt0.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + /* ADC Trigger SOCA */ + g_apt0.adcTrg.trgEnSOCA = BASE_CFG_ENABLE; + g_apt0.adcTrg.cntCmpSOCA = 375; /* 375 is count compare point of ADC trigger source SOCA when using CMPA */ + g_apt0.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_DOWN; + g_apt0.adcTrg.trgScaleSOCA = 1; + /* ADC Trigger SOCB */ + g_apt0.adcTrg.trgEnSOCB = BASE_CFG_ENABLE; + g_apt0.adcTrg.cntCmpSOCB = 1; + g_apt0.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_DOWN; + g_apt0.adcTrg.trgScaleSOCB = 1; + g_apt0.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt0.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + /* Timer Trigger */ + g_apt0.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE; + g_apt0.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO; + g_apt0.tmrInterrupt.tmrInterruptScale = 1; + APT0_ProtectInit(); + HAL_APT_PWMInit(&g_apt0); + HAL_APT_RegisterCallBack(&g_apt0, APT_EVENT_INTERRUPT, MotorSysErrCallback); + IRQ_SetPriority(IRQ_APT0_EVT, 7); /* 7 is priority value */ + IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_apt0); + IRQ_EnableN(IRQ_APT0_EVT); + HAL_APT_RegisterCallBack(&g_apt0, APT_TIMER_INTERRUPT, MotorCarrierProcessCallback); + IRQ_SetPriority(IRQ_APT0_TMR, 5); /* 5 is priority value */ + IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_apt0); + IRQ_EnableN(IRQ_APT0_TMR); + } + static void APT1_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt1, &protectApt); + } + static void APT1_Init(void) + { + HAL_CRG_IpEnableSet(APT1_BASE, IP_CLK_ENABLE); + g_apt1.baseAddress = APT1; + /* Clock Settings */ + g_apt1.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt1.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt1.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_apt1.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt1.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt1.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt1.waveform.divInitVal = 0; + g_apt1.waveform.cntInitVal = 0; + g_apt1.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt1.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt1.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt1.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt1.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + APT1_ProtectInit(); + HAL_APT_PWMInit(&g_apt1); + } + static void APT2_ProtectInit(void) + { + APT_OutCtrlProtectEx protectApt = {0}; + protectApt.ocEventEnEx = BASE_CFG_ENABLE; + protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT; + protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW; + protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE; + protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM; + protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_ACMP0; + protectApt.evtPolarityMaskEx = APT_EM_ACMP0_INVERT_BIT; + protectApt.filterCycleNumEx = 0; + HAL_APT_ProtectInitEx(&g_apt2, &protectApt); + } + static void APT2_Init(void) + { + HAL_CRG_IpEnableSet(APT2_BASE, IP_CLK_ENABLE); + g_apt2.baseAddress = APT2; + /* Clock Settings */ + g_apt2.waveform.dividerFactor = 1 - 1; + /* Timer Settings */ + g_apt2.waveform.timerPeriod = 7500; /* 7500 is count period of APT time-base timer */ + g_apt2.waveform.cntMode = APT_COUNT_MODE_UP_DOWN; + /* Wave Form */ + g_apt2.waveform.basicType = APT_PWM_BASIC_A_HIGH_B_LOW; + g_apt2.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt2.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE; + g_apt2.waveform.divInitVal = 0; + g_apt2.waveform.cntInitVal = 0; + g_apt2.waveform.cntCmpLeftEdge = 500; /* 500 is count compare point of the left edge of PWM waveform */ + g_apt2.waveform.cntCmpRightEdge = 4000; /* 4000 is count compare point of the right edge of PWM waveform */ + g_apt2.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD; + g_apt2.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO; + g_apt2.waveform.deadBandCnt = 225; /* 225 is dead-band value */ + APT2_ProtectInit(); + HAL_APT_PWMInit(&g_apt2); + } + __weak void MotorStartStopKeyCallback(void *param) + { + GPIO_Handle *handle = (GPIO_Handle *)param; + BASE_FUNC_UNUSED(handle); + } + static void GPIO_Init(void) + { + HAL_CRG_IpEnableSet(GPIO2_BASE, IP_CLK_ENABLE); + g_gpio2.baseAddress = GPIO2; + g_gpio2.pins = GPIO_PIN_3; + HAL_GPIO_Init(&g_gpio2); + HAL_GPIO_SetDirection(&g_gpio2, g_gpio2.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio2, g_gpio2.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio2, g_gpio2.pins, GPIO_INT_TYPE_NONE); + g_gpio2.pins = GPIO_PIN_4; + HAL_GPIO_Init(&g_gpio2); + HAL_GPIO_SetDirection(&g_gpio2, g_gpio2.pins, GPIO_INPUT_MODE); + HAL_GPIO_SetValue(&g_gpio2, g_gpio2.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio2, g_gpio2.pins, GPIO_INT_TYPE_LOW_LEVEL); + HAL_CRG_IpEnableSet(GPIO1_BASE, IP_CLK_ENABLE); + g_gpio1.baseAddress = GPIO1; + g_gpio1.pins = GPIO_PIN_0; + HAL_GPIO_Init(&g_gpio1); + HAL_GPIO_SetDirection(&g_gpio1, g_gpio1.pins, GPIO_OUTPUT_MODE); + HAL_GPIO_SetValue(&g_gpio1, g_gpio1.pins, GPIO_HIGH_LEVEL); + HAL_GPIO_SetIrqType(&g_gpio1, g_gpio1.pins, GPIO_INT_TYPE_NONE); + HAL_GPIO_RegisterCallBack(&g_gpio2, GPIO_PIN_4, MotorStartStopKeyCallback); + IRQ_Register(IRQ_GPIO2, HAL_GPIO_IrqHandler, &g_gpio2); + IRQ_SetPriority(IRQ_GPIO2, 1); /* set gpio1 interrupt priority to 1, 1~15. 1 is priority value */ + IRQ_EnableN(IRQ_GPIO2); /* gpio interrupt enable */ + return; + } + static void PGA0_Init(void) + { + HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE); + g_pga0.baseAddress = PGA0_BASE; + g_pga0.externalResistorMode = BASE_CFG_ENABLE; + g_pga0.handleEx.extCapCompensation = PGA_EXT_COMPENSATION_2X; + HAL_PGA_Init(&g_pga0); + } + static void PGA1_Init(void) + { + HAL_CRG_IpEnableSet(PGA1_BASE, IP_CLK_ENABLE); + g_pga1.baseAddress = PGA1_BASE; + g_pga1.externalResistorMode = BASE_CFG_ENABLE; + g_pga1.handleEx.extCapCompensation = PGA_EXT_COMPENSATION_2X; + HAL_PGA_Init(&g_pga1); + } + static void QDM1_Init(void) + { + HAL_CRG_IpEnableSet(QDM1_BASE, IP_CLK_ENABLE); + g_qdm1.baseAddress = QDM1_BASE; + /* emulation config */ + g_qdm1.emuMode = QDM_EMULATION_MODE_RUN_FREE; + /* input config */ + g_qdm1.ctrlConfig.decoderMode = QDM_QUADRATURE_COUNT; + g_qdm1.motorLineNum = 16384; + g_qdm1.inputFilter.qdmAFilterLevel = 100; + g_qdm1.inputFilter.qdmBFilterLevel = 100; + g_qdm1.inputFilter.qdmZFilterLevel = 100; + g_qdm1.ctrlConfig.polarity = 0; + g_qdm1.ctrlConfig.swap = QDM_SWAP_DISABLE; + g_qdm1.ctrlConfig.resolution = QDM_4X_RESOLUTION; + g_qdm1.pcntMode = QDM_PCNT_MODE_BY_DIR; + g_qdm1.pcntRstMode = QDM_PCNT_RST_OVF; + g_qdm1.posInit = 0; + g_qdm1.pcntIdxInitMode = QDM_IDX_INIT_DISABLE; + g_qdm1.lock_mode = QDM_LOCK_RISING_INDEX; + g_qdm1.posMax = 4294967295; + g_qdm1.tsuPrescaler = 0; + g_qdm1.cevtPrescaler = QDM_CEVT_PRESCALER_DIVI1; + g_qdm1.qcMax = 65535; + g_qdm1.ctrlConfig.ptuMode = QDM_PTU_MODE_CYCLE; + g_qdm1.period = 1; + g_qdm1.ctrlConfig.trgLockMode = QDM_TRG_BY_READ; + g_qdm1.subModeEn = true; + HAL_QDM_Init(&g_qdm1); + } + __weak void CheckPotentiometerValueCallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN CheckPotentiometerValueCallback */ + /* USER CODE END CheckPotentiometerValueCallback */ + } + static void TIMER0_Init(void) + { + HAL_CRG_IpEnableSet(TIMER0_BASE, IP_CLK_ENABLE); /* TIMER0 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER0) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 1000000; + g_timer0.baseAddress = TIMER0; + g_timer0.load = load - 1; /* Set timer value immediately */ + g_timer0.bgLoad = load - 1; /* Set timer value */ + g_timer0.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timer0.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timer0.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timer0.interruptEn = BASE_CFG_ENABLE; + g_timer0.adcSocReqEnable = BASE_CFG_DISABLE; + g_timer0.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timer0); + IRQ_Register(IRQ_TIMER0, HAL_TIMER_IrqHandler, &g_timer0); + HAL_TIMER_RegisterCallback(&g_timer0, TIMER_PERIOD_FIN, CheckPotentiometerValueCallback); + IRQ_SetPriority(IRQ_TIMER0, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER0); + } + __weak void MotorStatemachineCallBack(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN MotorStatemachineCallBack */ + /* USER CODE END MotorStatemachineCallBack */ + } + static void TIMER1_Init(void) + { + HAL_CRG_IpEnableSet(TIMER1_BASE, IP_CLK_ENABLE); /* TIMER1 clock enable. */ + unsigned int load = (HAL_CRG_GetIpFreq((void *)TIMER1) / (1u << (TIMERPRESCALER_NO_DIV * 4)) / 1000000u) * 500; + g_timer1.baseAddress = TIMER1; + g_timer1.load = load - 1; /* Set timer value immediately */ + g_timer1.bgLoad = load - 1; /* Set timer value */ + g_timer1.mode = TIMER_MODE_RUN_PERIODIC; /* Run in period mode */ + g_timer1.prescaler = TIMERPRESCALER_NO_DIV; /* Don't frequency division */ + g_timer1.size = TIMER_SIZE_32BIT; /* 1 for 32bit, 0 for 16bit */ + g_timer1.interruptEn = BASE_CFG_ENABLE; + g_timer1.adcSocReqEnable = BASE_CFG_DISABLE; + g_timer1.dmaReqEnable = BASE_CFG_DISABLE; + HAL_TIMER_Init(&g_timer1); + IRQ_Register(IRQ_TIMER1, HAL_TIMER_IrqHandler, &g_timer1); + HAL_TIMER_RegisterCallback(&g_timer1, TIMER_PERIOD_FIN, MotorStatemachineCallBack); + IRQ_SetPriority(IRQ_TIMER1, 1); /* 1 is priority value */ + IRQ_EnableN(IRQ_TIMER1); + } + __weak void UART0InterruptErrorCallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_TRNS_IT_ERROR */ + /* USER CODE END UART0_TRNS_IT_ERROR */ + } + __weak void UART0_TXDMACallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_DMA_FINISH */ + /* USER CODE END UART0_WRITE_DMA_FINISH */ + } + __weak void UART0WriteInterruptCallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_WRITE_IT_FINISH */ + /* USER CODE END UART0_WRITE_IT_FINISH */ + } + __weak void UART0ReadInterruptCallback(void *handle) + { + BASE_FUNC_UNUSED(handle); + /* USER CODE BEGIN UART0_READ_IT_FINISH */ + /* USER CODE END UART0_READ_IT_FINISH */ + } + static void UART0_Init(void) + { + HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */ + g_uart0.baseAddress = UART0; + g_uart0.baudRate = UART0_BAND_RATE; + g_uart0.dataLength = UART_DATALENGTH_8BIT; + g_uart0.stopBits = UART_STOPBITS_ONE; + g_uart0.parity = UART_PARITY_NONE; + g_uart0.txMode = UART_MODE_DMA; + g_uart0.rxMode = UART_MODE_INTERRUPT; + g_uart0.fifoMode = BASE_CFG_ENABLE; + g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; + g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8; + g_uart0.hwFlowCtr = BASE_CFG_DISABLE; + g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; + g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE; + HAL_UART_Init(&g_uart0); + HAL_UART_RegisterCallBack(&g_uart0, UART_TRNS_IT_ERROR, (UART_CallbackType)UART0InterruptErrorCallback); + HAL_UART_RegisterCallBack(&g_uart0, UART_READ_IT_FINISH, (UART_CallbackType)UART0ReadInterruptCallback); + IRQ_Register(IRQ_UART0, HAL_UART_IrqHandler, &g_uart0); + IRQ_SetPriority(IRQ_UART0, 6); /* 6 is priority value */ + IRQ_EnableN(IRQ_UART0); + g_uart0.dmaHandle = &g_dmac; + g_uart0.uartDmaTxChn = 0; + HAL_UART_RegisterCallBack(&g_uart0, UART_WRITE_DMA_FINISH, (UART_CallbackType)UART0_TXDMACallback); + HAL_UART_RegisterCallBack(&g_uart0, UART_WRITE_IT_FINISH, (UART_CallbackType)UART0WriteInterruptCallback); + } + + static void APT_SyncMasterInit(void) + { + HAL_APT_MasterSyncInit(&g_apt0, APT_SYNC_OUT_ON_CNTR_ZERO); + } + static void APT_SyncSlaveInit(void) + { + APT_SlaveSyncIn aptSlave; + aptSlave.cntPhase = 0; /* counter phase value */ + aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + aptSlave.syncInSrc = APT_SYNCIN_SRC_APT0_SYNCOUT; /* sync source selection */ + aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(&g_apt1, &aptSlave); + aptSlave.cntPhase = 0; /* counter phase value */ + aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP; + aptSlave.syncInSrc = APT_SYNCIN_SRC_APT0_SYNCOUT; /* sync source selection */ + aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN; + HAL_APT_SlaveSyncInit(&g_apt2, &aptSlave); + } + + + + ``` + + - 步骤三:点击![1726195173004](../../../docs/pic/image-20240528173107958.png)编译代码,具体编译步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194776437](../../../docs/pic/1726194776437.jpg) + + - 步骤四:点击![1726195185553](../../../docs/pic/1726195185553.jpg)烧录代码,具体烧录步骤"[参考tools目录README搭建环境](https://gitee.com/HiSpark/open_mcu/tree/master/tools)" + + ![1726194794028](../../../docs/pic/1726194794028.jpg) + + - 步骤五:电机黄绿蓝3根线分别接u、v、w接口 + + - ![](../../../docs/pic/1727334986111.png) + + - 步骤六:电机编码器五个接口,分别对应接Z、B、A、GND、VCC接口 + + ![](../../../docs/pic/1727335298342.png) + + - 步骤七:点击![](./pic/1728350254414(1).jpg)变量跟踪功能来查看elecSpeed速度变量的变化, + + ![](../../../docs/pic/1728349751741.png) + +#### 21.1.5实验结果 + +烧录成功后,电机转动,可以通过蓝色枢纽旋转调速,通过HiSpark studio软件里的变量跟踪功能来测试速度变量的变化,证明实验成功 + +![](../../../docs/pic/1727335415629.png) + + ![](../../../docs/pic/1728349708823.png) ![](../../../docs/pic/1728349735379(1).jpg) + +​ +