From f7b8df78b031b46c22501c27d1f86036d0d3af2d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E6=B8=A9=E5=A3=AE=E4=BC=9F?=
<14858320+wen-zhuangwei@user.noreply.gitee.com>
Date: Fri, 13 Sep 2024 11:54:28 +0800
Subject: [PATCH 01/10] 12111
---
.../inc/sample_acmp_interrupt.h | 31 +
.../acmp/sample_acmp_interrupt/init/main.c | 56 +
.../acmp/sample_acmp_interrupt/init/main.h | 63 +
.../sample_acmp_interrupt/init/system_init.c | 157 ++
.../acmp/sample_acmp_interrupt/readme.md | 20 +
.../src/sample_acmp_interrupt.c | 78 +
.../inc/sample_acmp_out_result.h | 31 +
.../acmp/sample_acmp_out_result/init/main.c | 56 +
.../acmp/sample_acmp_out_result/init/main.h | 59 +
.../sample_acmp_out_result/init/system_init.c | 130 ++
.../acmp/sample_acmp_out_result/readme.md | 18 +
.../src/sample_acmp_out_result.c | 38 +
.../inc/sample_adc_associative_trigger_apt.h | 33 +
.../init/main.c | 37 +
.../init/main.h | 52 +
.../init/system_init.c | 214 ++
.../readme.md | 18 +
.../src/sample_adc_associative_trigger_apt.c | 59 +
.../inc/sample_adc_continue_trigger.h | 33 +
.../sample_adc_continue_trigger/init/main.c | 36 +
.../sample_adc_continue_trigger/init/main.h | 48 +
.../init/system_init.c | 140 ++
.../adc/sample_adc_continue_trigger/readme.md | 18 +
.../src/sample_adc_continue_trigger.c | 65 +
.../inc/sample_adc_over_sample.h | 31 +
.../adc/sample_adc_over_sample/init/main.c | 36 +
.../adc/sample_adc_over_sample/init/main.h | 46 +
.../sample_adc_over_sample/init/system_init.c | 138 ++
.../adc/sample_adc_over_sample/readme.md | 18 +
.../src/sample_adc_over_sample.c | 61 +
.../inc/sample_adc_oversampling_it.h | 31 +
.../sample_adc_oversampling_it/init/main.c | 51 +
.../sample_adc_oversampling_it/init/main.h | 55 +
.../init/system_init.c | 138 ++
.../adc/sample_adc_oversampling_it/readme.md | 18 +
.../src/sample_adc_oversampling_it.c | 58 +
.../inc/sample_adc_single_trigger.h | 31 +
.../adc/sample_adc_single_trigger/init/main.c | 35 +
.../adc/sample_adc_single_trigger/init/main.h | 46 +
.../init/system_init.c | 128 ++
.../adc/sample_adc_single_trigger/readme.md | 18 +
.../src/sample_adc_single_trigger.c | 55 +
.../inc/sample_adc_single_trigger_dma.h | 32 +
.../sample_adc_single_trigger_dma/init/main.c | 37 +
.../sample_adc_single_trigger_dma/init/main.h | 51 +
.../init/system_init.c | 170 ++
.../sample_adc_single_trigger_dma/readme.md | 18 +
.../src/sample_adc_single_trigger_dma.c | 59 +
.../inc/sample_adc_single_trigger_it.h | 32 +
.../sample_adc_single_trigger_it/init/main.c | 35 +
.../sample_adc_single_trigger_it/init/main.h | 48 +
.../init/system_init.c | 140 ++
.../sample_adc_single_trigger_it/readme.md | 18 +
.../src/sample_adc_single_trigger_it.c | 57 +
.../inc/sample_adc_single_with_ppb.h | 30 +
.../sample_adc_single_with_ppb/init/main.c | 51 +
.../sample_adc_single_with_ppb/init/main.h | 56 +
.../init/system_init.c | 144 ++
.../adc/sample_adc_single_with_ppb/readme.md | 20 +
.../src/sample_adc_single_with_ppb.c | 131 ++
.../inc/sample_adc_sync_sample.h | 32 +
.../adc/sample_adc_sync_sample/init/main.c | 35 +
.../adc/sample_adc_sync_sample/init/main.h | 46 +
.../sample_adc_sync_sample/init/system_init.c | 137 ++
.../adc/sample_adc_sync_sample/readme.md | 18 +
.../src/sample_adc_sync_sample.c | 63 +
.../inc/sample_adc_sync_sample_dma.h | 32 +
.../sample_adc_sync_sample_dma/init/main.c | 37 +
.../sample_adc_sync_sample_dma/init/main.h | 51 +
.../init/system_init.c | 180 ++
.../adc/sample_adc_sync_sample_dma/readme.md | 18 +
.../src/sample_adc_sync_sample_dma.c | 62 +
.../inc/sample_adc_sync_sample_it.h | 32 +
.../adc/sample_adc_sync_sample_it/init/main.c | 35 +
.../adc/sample_adc_sync_sample_it/init/main.h | 48 +
.../init/system_init.c | 142 ++
.../adc/sample_adc_sync_sample_it/readme.md | 18 +
.../src/sample_adc_sync_sample_it.c | 58 +
.../inc/sample_apt_single_resistor.h | 45 +
.../sample_apt_single_resistor/init/main.c | 57 +
.../sample_apt_single_resistor/init/main.h | 61 +
.../init/system_init.c | 310 +++
.../apt/sample_apt_single_resistor/readme.md | 29 +
.../src/sample_apt_single_resistor.c | 244 ++
.../inc/sample_can_send_receive.h | 31 +
.../can/sample_can_send_receive/init/main.c | 49 +
.../can/sample_can_send_receive/init/main.h | 55 +
.../init/system_init.c | 140 ++
.../can/sample_can_send_receive/readme.md | 26 +
.../src/sample_can_send_receive.c | 123 ++
.../capm_hall_sample/inc/capm_hall_sample.h | 41 +
.../capm/capm_hall_sample/init/main.c | 57 +
.../capm/capm_hall_sample/init/main.h | 58 +
.../capm/capm_hall_sample/init/system_init.c | 170 ++
.../capm/capm_hall_sample/readme.md | 18 +
.../capm_hall_sample/src/capm_hall_sample.c | 79 +
.../inc/cfd_check_error_sample.h | 32 +
.../cfd/sample_cfd_check_error/init/main.c | 55 +
.../cfd/sample_cfd_check_error/init/main.h | 59 +
.../sample_cfd_check_error/init/system_init.c | 124 ++
.../cfd/sample_cfd_check_error/readme.md | 21 +
.../src/cfd_check_error_sample.c | 94 +
.../inc/cmm_check_error_sample.h | 32 +
.../cmm/sample_cmm_check_error/init/main.c | 55 +
.../cmm/sample_cmm_check_error/init/main.h | 60 +
.../sample_cmm_check_error/init/system_init.c | 136 ++
.../cmm/sample_cmm_check_error/readme.md | 20 +
.../src/cmm_check_error_sample.c | 88 +
.../inc/sample_crc_gen_algo.h | 30 +
.../crc/sample_crc_gen_algo/init/main.c | 54 +
.../crc/sample_crc_gen_algo/init/main.h | 54 +
.../sample_crc_gen_algo/init/system_init.c | 92 +
.../crc/sample_crc_gen_algo/readme.md | 16 +
.../src/sample_crc_gen_algo.c | 91 +
.../inc/sample_crc_load_algo.h | 31 +
.../crc/sample_crc_load_algo/init/main.c | 55 +
.../crc/sample_crc_load_algo/init/main.h | 56 +
.../sample_crc_load_algo/init/system_init.c | 104 +
.../crc/sample_crc_load_algo/readme.md | 18 +
.../src/sample_crc_load_algo.c | 69 +
drivers_sample/dac/sample_dac/init/main.c | 33 +
drivers_sample/dac/sample_dac/init/main.h | 43 +
.../dac/sample_dac/init/system_init.c | 70 +
drivers_sample/dac/sample_dac/readme.md | 18 +
.../inc/sample_dma_list_transfer.h | 32 +
.../dma/sample_dma_list_transfer/readme.md | 18 +
.../src/sample_dma_list_transfer.c | 117 +
.../inc/sample_dma_list_transfer_continue.h | 32 +
.../readme.md | 19 +
.../src/sample_dma_list_transfer_continue.c | 70 +
.../sysinit/main.c | 37 +
.../sysinit/main.h | 48 +
.../sysinit/system_init.c | 123 ++
.../inc/sample_dma_mem_to_mem.h | 33 +
.../dma/sample_dma_mem_to_mem/init/main.c | 36 +
.../dma/sample_dma_mem_to_mem/init/main.h | 48 +
.../sample_dma_mem_to_mem/init/system_init.c | 133 ++
.../dma/sample_dma_mem_to_mem/readme.md | 18 +
.../src/sample_dma_mem_to_mem.c | 61 +
.../inc/sample_dma_mem_to_per.h | 32 +
.../dma/sample_dma_mem_to_per/readme.md | 18 +
.../src/sample_dma_mem_to_per.c | 118 +
.../inc/sample_dma_per_to_mem.h | 32 +
.../dma/sample_dma_per_to_mem/readme.md | 18 +
.../src/sample_dma_per_to_mem.c | 128 ++
.../inc/sample_dma_per_to_per.h | 32 +
.../dma/sample_dma_per_to_per/readme.md | 18 +
.../src/sample_dma_per_to_per.c | 127 ++
.../inc/sample_flash_blocking.h | 29 +
.../flash/sample_flash_blocking/init/main.c | 34 +
.../flash/sample_flash_blocking/init/main.h | 43 +
.../sample_flash_blocking/init/system_init.c | 91 +
.../flash/sample_flash_blocking/readme.md | 19 +
.../src/sample_flash_blocking.c | 95 +
.../inc/sample_flash_blocking_mode.h | 29 +
.../sample_flash_blocking_mode/init/main.c | 51 +
.../sample_flash_blocking_mode/init/main.h | 48 +
.../init/system_init.c | 95 +
.../sample_flash_blocking_mode/readme.md | 19 +
.../src/sample_flash_blocking_mode.c | 95 +
.../inc/sample_flash_interrupt.h | 29 +
.../flash/sample_flash_interrupt/init/main.c | 34 +
.../flash/sample_flash_interrupt/init/main.h | 43 +
.../sample_flash_interrupt/init/system_init.c | 91 +
.../flash/sample_flash_interrupt/readme.md | 19 +
.../src/sample_flash_interrupt.c | 149 ++
.../inc/sample_flash_interrupt_mode.h | 29 +
.../sample_flash_interrupt_mode/init/main.c | 51 +
.../sample_flash_interrupt_mode/init/main.h | 48 +
.../init/system_init.c | 94 +
.../sample_flash_interrupt_mode/readme.md | 19 +
.../src/sample_flash_interrupt_mode.c | 151 ++
.../inc/gpio_circle_sample.h | 30 +
.../gpio/sample_gpio_circle/init/main.c | 37 +
.../gpio/sample_gpio_circle/init/main.h | 47 +
.../sample_gpio_circle/init/system_init.c | 123 ++
.../gpio/sample_gpio_circle/readme.md | 22 +
.../src/gpio_circle_sample.c | 99 +
.../inc/gpio_interrupt_sample.h | 30 +
.../gpio/sample_gpio_interrupt/init/main.c | 37 +
.../gpio/sample_gpio_interrupt/init/main.h | 49 +
.../sample_gpio_interrupt/init/system_init.c | 137 ++
.../gpio/sample_gpio_interrupt/readme.md | 22 +
.../src/gpio_interrupt_sample.c | 126 ++
.../sample_gpio_key/inc/gpio_key_sample.h | 30 +
.../gpio/sample_gpio_key/init/main.c | 36 +
.../gpio/sample_gpio_key/init/main.h | 48 +
.../gpio/sample_gpio_key/init/system_init.c | 121 +
drivers_sample/gpio/sample_gpio_key/readme.md | 17 +
.../sample_gpio_key/src/gpio_key_sample.c | 65 +
.../sample_gpio_led/inc/gpio_led_sample.h | 30 +
.../gpio/sample_gpio_led/init/main.c | 36 +
.../gpio/sample_gpio_led/init/main.h | 46 +
.../gpio/sample_gpio_led/init/system_init.c | 109 +
drivers_sample/gpio/sample_gpio_led/readme.md | 19 +
.../sample_gpio_led/src/gpio_led_sample.c | 49 +
.../inc/sample_gpt_period_interrupt.h | 32 +
.../sample_gpt_period_interrupt/init/main.c | 51 +
.../sample_gpt_period_interrupt/init/main.h | 53 +
.../init/system_init.c | 137 ++
.../gpt/sample_gpt_period_interrupt/readme.md | 24 +
.../src/sample_gpt_period_interrupt.c | 51 +
.../inc/sample_gpt_pwm_output.h | 32 +
.../gpt/sample_gpt_pwm_output/init/main.c | 51 +
.../gpt/sample_gpt_pwm_output/init/main.h | 52 +
.../sample_gpt_pwm_output/init/system_init.c | 118 +
.../gpt/sample_gpt_pwm_output/readme.md | 24 +
.../src/sample_gpt_pwm_output.c | 45 +
.../inc/sample_gpt_simplerun.h | 32 +
.../gpt/sample_gpt_simplerun/init/main.c | 36 +
.../gpt/sample_gpt_simplerun/init/main.h | 46 +
.../sample_gpt_simplerun/init/system_init.c | 112 +
.../gpt/sample_gpt_simplerun/readme.md | 18 +
.../src/sample_gpt_simplerun.c | 53 +
.../inc/sample_i2c_blocking_stlm75.h | 29 +
.../sample_i2c_blocking_stlm75/init/main.c | 35 +
.../sample_i2c_blocking_stlm75/init/main.h | 46 +
.../init/system_init.c | 127 ++
.../i2c/sample_i2c_blocking_stlm75/readme.md | 18 +
.../src/sample_i2c_blocking_stlm75.c | 80 +
.../inc/sample_i2c_dma_stlm75.h | 29 +
.../i2c/sample_i2c_dma_stlm75/init/main.c | 37 +
.../i2c/sample_i2c_dma_stlm75/init/main.h | 53 +
.../sample_i2c_dma_stlm75/init/system_init.c | 192 ++
.../i2c/sample_i2c_dma_stlm75/readme.md | 18 +
.../src/sample_i2c_dma_stlm75.c | 110 +
.../inc/sample_i2c_interrupt_stlm75.h | 29 +
.../sample_i2c_interrupt_stlm75/init/main.c | 35 +
.../sample_i2c_interrupt_stlm75/init/main.h | 50 +
.../init/system_init.c | 157 ++
.../i2c/sample_i2c_interrupt_stlm75/readme.md | 18 +
.../src/sample_i2c_interrupt_stlm75.c | 110 +
.../inc/sample_i2c_master_blocking_at24c64.h | 29 +
.../init/main.c | 52 +
.../init/main.h | 51 +
.../init/system_init.c | 125 ++
.../readme.md | 19 +
.../src/sample_i2c_master_blocking_at24c64.c | 202 ++
.../inc/sample_i2c_master_dma_at24c64.h | 29 +
.../sample_i2c_master_dma_at24c64/init/main.c | 53 +
.../sample_i2c_master_dma_at24c64/init/main.h | 54 +
.../init/system_init.c | 212 ++
.../sample_i2c_master_dma_at24c64/readme.md | 19 +
.../src/sample_i2c_master_dma_at24c64.c | 286 +++
.../inc/sample_i2c_master_interrupt_at24c64.h | 29 +
.../init/main.c | 51 +
.../init/main.h | 55 +
.../init/system_init.c | 156 ++
.../readme.md | 19 +
.../src/sample_i2c_master_interrupt_at24c64.c | 293 +++
.../inc/sample_i2c_slave_blocking.h | 29 +
.../i2c/sample_i2c_slave_blocking/init/main.c | 51 +
.../i2c/sample_i2c_slave_blocking/init/main.h | 51 +
.../init/system_init.c | 129 ++
.../i2c/sample_i2c_slave_blocking/readme.md | 23 +
.../src/sample_i2c_slave_blocking.c | 148 ++
.../inc/sample_i2c_slave_dma.h | 29 +
.../i2c/sample_i2c_slave_dma/init/main.c | 53 +
.../i2c/sample_i2c_slave_dma/init/main.h | 54 +
.../sample_i2c_slave_dma/init/system_init.c | 216 ++
.../i2c/sample_i2c_slave_dma/readme.md | 23 +
.../src/sample_i2c_slave_dma.c | 208 ++
.../inc/sample_i2c_slave_interrupt.h | 29 +
.../sample_i2c_slave_interrupt/init/main.c | 52 +
.../sample_i2c_slave_interrupt/init/main.h | 55 +
.../init/system_init.c | 159 ++
.../i2c/sample_i2c_slave_interrupt/readme.md | 23 +
.../src/sample_i2c_slave_interrupt.c | 206 ++
.../iocmg/iolist_sample/inc/iolist_sample.h | 30 +
.../iocmg/iolist_sample/init/main.c | 34 +
.../iocmg/iolist_sample/init/main.h | 47 +
.../iocmg/iolist_sample/init/system_init.c | 86 +
drivers_sample/iocmg/iolist_sample/readme.md | 14 +
.../iocmg/iolist_sample/src/iolist_sample.c | 103 +
.../sample_iocfg_list/inc/sample_iocfg_list.h | 30 +
.../iocmg/sample_iocfg_list/init/main.c | 50 +
.../iocmg/sample_iocfg_list/init/main.h | 49 +
.../sample_iocfg_list/init/system_init.c | 92 +
.../iocmg/sample_iocfg_list/readme.rd | 14 +
.../sample_iocfg_list/src/sample_iocfg_list.c | 106 +
drivers_sample/open_mcu | 1 +
drivers_sample/open_mcu_1 | 1 +
drivers_sample/pga/sample_pga/init/main.c | 33 +
drivers_sample/pga/sample_pga/init/main.h | 43 +
.../pga/sample_pga/init/system_init.c | 88 +
drivers_sample/pga/sample_pga/readme.md | 14 +
.../pga/sample_pga_extra_resistor/init/main.c | 34 +
.../pga/sample_pga_extra_resistor/init/main.h | 43 +
.../init/system_init.c | 88 +
.../pga/sample_pga_extra_resistor/readme.md | 14 +
.../inc/sample_pga_result_sampling.h | 31 +
.../sample_pga_result_sampling/init/main.c | 52 +
.../sample_pga_result_sampling/init/main.h | 54 +
.../init/system_init.c | 143 ++
.../pga/sample_pga_result_sampling/readme.md | 16 +
.../src/sample_pga_result_sampling.c | 51 +
drivers_sample/pic/1726194739756.jpg | Bin 0 -> 5782 bytes
drivers_sample/pic/1726194776437.jpg | Bin 0 -> 29480 bytes
drivers_sample/pic/1726194794028.jpg | Bin 0 -> 62232 bytes
drivers_sample/pic/1726194824764.jpg | Bin 0 -> 2866 bytes
drivers_sample/pic/1726194869607.jpg | Bin 0 -> 166495 bytes
.../pic/1726194906962-1726195658552-18.jpg | Bin 0 -> 4937 bytes
drivers_sample/pic/1726194906962.jpg | Bin 0 -> 4937 bytes
drivers_sample/pic/1726194945180.jpg | Bin 0 -> 171355 bytes
.../pic/1726194962547-1726195476280-9.jpg | Bin 0 -> 7234 bytes
drivers_sample/pic/1726194962547.jpg | Bin 0 -> 7234 bytes
drivers_sample/pic/1726194980430.jpg | Bin 0 -> 10987 bytes
drivers_sample/pic/1726195007716.jpg | Bin 0 -> 5702 bytes
drivers_sample/pic/1726195033006.jpg | Bin 0 -> 2418 bytes
drivers_sample/pic/1726195055385.jpg | Bin 0 -> 4448 bytes
drivers_sample/pic/1726195173004.jpg | Bin 0 -> 538 bytes
drivers_sample/pic/1726195185553.jpg | Bin 0 -> 538 bytes
.../pmc/sample_pmc_pvd/inc/sample_pmc_pvd.h | 27 +
drivers_sample/pmc/sample_pmc_pvd/init/main.c | 42 +
drivers_sample/pmc/sample_pmc_pvd/init/main.h | 48 +
.../pmc/sample_pmc_pvd/init/system_init.c | 120 +
drivers_sample/pmc/sample_pmc_pvd/readme.md | 17 +
.../pmc/sample_pmc_pvd/src/sample_pmc_pvd.c | 53 +
.../sample_pmc_wakeup/inc/sample_pmc_wakeup.h | 31 +
.../pmc/sample_pmc_wakeup/init/main.c | 42 +
.../pmc/sample_pmc_wakeup/init/main.h | 46 +
.../pmc/sample_pmc_wakeup/init/system_init.c | 107 +
.../pmc/sample_pmc_wakeup/readme.md | 17 +
.../sample_pmc_wakeup/src/sample_pmc_wakeup.c | 68 +
.../qdm/sample_qdm_m/inc/sample_qdm_m.h | 26 +
drivers_sample/qdm/sample_qdm_m/init/main.c | 37 +
drivers_sample/qdm/sample_qdm_m/init/main.h | 49 +
.../qdm/sample_qdm_m/init/system_init.c | 175 ++
drivers_sample/qdm/sample_qdm_m/readme.md | 24 +
.../qdm/sample_qdm_m/src/sample_qdm_m.c | 41 +
.../qdm/sample_qdm_mt/inc/sample_qdm_mt.h | 26 +
drivers_sample/qdm/sample_qdm_mt/init/main.c | 37 +
drivers_sample/qdm/sample_qdm_mt/init/main.h | 46 +
.../qdm/sample_qdm_mt/init/system_init.c | 154 ++
drivers_sample/qdm/sample_qdm_mt/readme.md | 13 +
.../qdm/sample_qdm_mt/src/sample_qdm_mt.c | 42 +
.../inc/sample_spi_blocking_kta7953.h | 28 +
.../sample_spi_blocking_kta7953/init/main.c | 35 +
.../sample_spi_blocking_kta7953/init/main.h | 46 +
.../init/system_init.c | 163 ++
.../spi/sample_spi_blocking_kta7953/readme.md | 18 +
.../src/sample_spi_blocking_kta7953.c | 95 +
.../inc/sample_spi_blocking_w25q32.h | 28 +
.../sample_spi_blocking_w25q32/init/main.c | 50 +
.../sample_spi_blocking_w25q32/init/main.h | 50 +
.../init/system_init.c | 157 ++
.../spi/sample_spi_blocking_w25q32/readme.md | 20 +
.../src/sample_spi_blocking_w25q32.c | 244 ++
.../inc/sample_spi_blocking_w25q32_internal.h | 28 +
.../init/main.c | 51 +
.../init/main.h | 50 +
.../init/system_init.c | 157 ++
.../readme.md | 20 +
.../src/sample_spi_blocking_w25q32_internal.c | 224 ++
.../inc/sample_spi_dma_kta7953.h | 28 +
.../spi/sample_spi_dma_kta7953/init/main.c | 37 +
.../spi/sample_spi_dma_kta7953/init/main.h | 55 +
.../sample_spi_dma_kta7953/init/system_init.c | 256 +++
.../spi/sample_spi_dma_kta7953/readme.md | 20 +
.../src/sample_spi_dma_kta7953.c | 164 ++
.../inc/sample_spi_dma_w25q32.h | 28 +
.../spi/sample_spi_dma_w25q32/init/main.c | 51 +
.../spi/sample_spi_dma_w25q32/init/main.h | 59 +
.../sample_spi_dma_w25q32/init/system_init.c | 250 +++
.../spi/sample_spi_dma_w25q32/readme.md | 20 +
.../src/sample_spi_dma_w25q32.c | 288 +++
.../inc/sample_spi_dma_w25q32_internal.h | 28 +
.../init/main.c | 52 +
.../init/main.h | 59 +
.../init/system_init.c | 250 +++
.../sample_spi_dma_w25q32_internal/readme.md | 20 +
.../src/sample_spi_dma_w25q32_internal.c | 269 +++
.../inc/sample_spi_interrupt_kta7953.h | 28 +
.../sample_spi_interrupt_kta7953/init/main.c | 35 +
.../sample_spi_interrupt_kta7953/init/main.h | 52 +
.../init/system_init.c | 207 ++
.../sample_spi_interrupt_kta7953/readme.md | 20 +
.../src/sample_spi_interrupt_kta7953.c | 163 ++
.../inc/sample_spi_interrupt_w25q32.h | 28 +
.../sample_spi_interrupt_w25q32/init/main.c | 50 +
.../sample_spi_interrupt_w25q32/init/main.h | 56 +
.../init/system_init.c | 203 ++
.../spi/sample_spi_interrupt_w25q32/readme.md | 20 +
.../src/sample_spi_interrupt_w25q32.c | 286 +++
.../sample_spi_interrupt_w25q32_internal.h | 28 +
.../init/main.c | 51 +
.../init/main.h | 56 +
.../init/system_init.c | 203 ++
.../readme.md | 20 +
.../sample_spi_interrupt_w25q32_internal.c | 268 +++
.../sample_spi_master/inc/sample_spi_master.h | 28 +
.../spi/sample_spi_master/init/main.c | 50 +
.../spi/sample_spi_master/init/main.h | 50 +
.../spi/sample_spi_master/init/system_init.c | 157 ++
.../spi/sample_spi_master/readme.md | 18 +
.../sample_spi_master/src/sample_spi_master.c | 97 +
.../inc/sample_spi_microwire_master.h | 28 +
.../sample_spi_microwire_master/init/main.c | 34 +
.../sample_spi_microwire_master/init/main.h | 43 +
.../init/system_init.c | 125 ++
.../spi/sample_spi_microwire_master/readme.md | 26 +
.../src/sample_spi_microwire_master.c | 84 +
.../inc/sample_spi_microwire_slave.h | 28 +
.../sample_spi_microwire_slave/init/main.c | 35 +
.../sample_spi_microwire_slave/init/main.h | 46 +
.../init/system_init.c | 163 ++
.../spi/sample_spi_microwire_slave/readme.md | 26 +
.../src/sample_spi_microwire_slave.c | 118 +
.../sample_spi_slave/inc/sample_spi_slave.h | 28 +
.../spi/sample_spi_slave/init/main.c | 35 +
.../spi/sample_spi_slave/init/main.h | 46 +
.../spi/sample_spi_slave/init/system_init.c | 163 ++
drivers_sample/spi/sample_spi_slave/readme.md | 18 +
.../sample_spi_slave/src/sample_spi_slave.c | 97 +
.../inc/sample_timer_interrupt.h | 32 +
.../timer/sample_timer_interrupt/init/main.c | 48 +
.../timer/sample_timer_interrupt/init/main.h | 52 +
.../sample_timer_interrupt/init/system_init.c | 123 ++
.../timer/sample_timer_interrupt/readme.md | 18 +
.../src/sample_timer_interrupt.c | 65 +
.../sample_tsensor/inc/sample_tsensor.h | 32 +
.../tsensor/sample_tsensor/readme.txt | 6 +
.../sample_tsensor/src/sample_tsensor.c | 48 +
.../inc/sample_uart_baud_detect.h | 33 +
.../uart/sample_uart_baud_detect/init/main.c | 50 +
.../uart/sample_uart_baud_detect/init/main.h | 55 +
.../init/system_init.c | 136 ++
.../uart/sample_uart_baud_detect/readme.md | 19 +
.../src/sample_uart_baud_detect.c | 67 +
.../inc/sample_uart_blocking_rx.h | 35 +
.../uart/sample_uart_blocking_rx/init/main.c | 34 +
.../uart/sample_uart_blocking_rx/init/main.h | 43 +
.../init/system_init.c | 90 +
.../uart/sample_uart_blocking_rx/readme.md | 23 +
.../src/sample_uart_blocking_rx.c | 53 +
.../inc/sample_uart_blocking_tx.h | 35 +
.../uart/sample_uart_blocking_tx/init/main.c | 34 +
.../uart/sample_uart_blocking_tx/init/main.h | 48 +
.../init/system_init.c | 91 +
.../uart/sample_uart_blocking_tx/readme.md | 22 +
.../src/sample_uart_blocking_tx.c | 53 +
.../inc/sample_uart_character_match.h | 35 +
.../sample_uart_character_match/init/main.c | 50 +
.../sample_uart_character_match/init/main.h | 53 +
.../init/system_init.c | 129 ++
.../sample_uart_character_match/readme.md | 16 +
.../src/sample_uart_character_match.c | 67 +
.../inc/sample_uart_dma_rx.h | 33 +
.../uart/sample_uart_dma_rx/init/main.c | 48 +
.../uart/sample_uart_dma_rx/init/main.h | 58 +
.../sample_uart_dma_rx/init/system_init.c | 142 ++
.../uart/sample_uart_dma_rx/readme.md | 22 +
.../src/sample_uart_dma_rx.c | 59 +
.../sample_uart_dma_rx_cyclically_stored.h | 34 +
.../init/main.c | 51 +
.../init/main.h | 54 +
.../init/system_init.c | 131 ++
.../readme.md | 21 +
.../sample_uart_dma_rx_cyclically_stored.c | 65 +
.../inc/sample_uart_dma_tx.h | 33 +
.../uart/sample_uart_dma_tx/init/main.c | 48 +
.../uart/sample_uart_dma_tx/init/main.h | 57 +
.../sample_uart_dma_tx/init/system_init.c | 144 ++
.../uart/sample_uart_dma_tx/readme.md | 22 +
.../src/sample_uart_dma_tx.c | 58 +
...sample_uart_dma_tx_dma_rx_simultaneously.h | 33 +
.../init/main.c | 48 +
.../init/main.h | 54 +
.../init/system_init.c | 158 ++
.../readme.md | 22 +
...sample_uart_dma_tx_dma_rx_simultaneously.c | 113 +
...sample_uart_dma_tx_int_rx_simultaneously.h | 33 +
.../init/main.c | 48 +
.../init/main.h | 57 +
.../init/system_init.c | 150 ++
.../readme.md | 22 +
...sample_uart_dma_tx_int_rx_simultaneously.c | 115 +
...sample_uart_int_tx_dma_rx_simultaneously.h | 34 +
.../init/main.c | 48 +
.../init/main.h | 57 +
.../init/system_init.c | 150 ++
.../readme.md | 22 +
...sample_uart_int_tx_dma_rx_simultaneously.c | 115 +
...sample_uart_int_tx_int_rx_simultaneously.h | 33 +
.../init/main.c | 47 +
.../init/main.h | 53 +
.../init/system_init.c | 118 +
.../readme.md | 22 +
...sample_uart_int_tx_int_rx_simultaneously.c | 114 +
.../inc/sample_uart_interrupt_rx.h | 33 +
.../uart/sample_uart_interrupt_rx/init/main.c | 47 +
.../uart/sample_uart_interrupt_rx/init/main.h | 53 +
.../init/system_init.c | 119 +
.../uart/sample_uart_interrupt_rx/readme.md | 22 +
.../src/sample_uart_interrupt_rx.c | 64 +
.../inc/sample_uart_interrupt_tx.h | 33 +
.../uart/sample_uart_interrupt_tx/init/main.c | 47 +
.../uart/sample_uart_interrupt_tx/init/main.h | 53 +
.../init/system_init.c | 118 +
.../uart/sample_uart_interrupt_tx/readme.md | 20 +
.../src/sample_uart_interrupt_tx.c | 58 +
.../inc/sample_uart_interrupt_tx_after_rx.h | 33 +
.../init/main.c | 47 +
.../init/main.h | 52 +
.../init/system_init.c | 118 +
.../readme.md | 22 +
.../src/sample_uart_interrupt_tx_after_rx.c | 114 +
.../sample_uart_single_wire_communication.h | 55 +
.../init/main.c | 51 +
.../init/main.h | 60 +
.../init/system_init.c | 268 +++
.../readme.md | 28 +
.../sample_uart_single_wire_communication.c | 354 +++
.../inc/sample_iwdg_refresh.h | 30 +
.../wdg/sample_iwdg_refresh/init/main.c | 52 +
.../wdg/sample_iwdg_refresh/init/main.h | 59 +
.../sample_iwdg_refresh/init/system_init.c | 112 +
.../wdg/sample_iwdg_refresh/readme.md | 18 +
.../src/sample_iwdg_refresh.c | 58 +
.../sample_iwdg_reset/inc/iwdg_reset_sample.h | 30 +
.../wdg/sample_iwdg_reset/init/main.c | 51 +
.../wdg/sample_iwdg_reset/init/main.h | 47 +
.../wdg/sample_iwdg_reset/init/system_init.c | 118 +
.../wdg/sample_iwdg_reset/readme.md | 18 +
.../sample_iwdg_reset/src/iwdg_reset_sample.c | 78 +
.../sample_wdg_reset/inc/wdg_reset_sample.h | 30 +
.../wdg/sample_wdg_reset/init/main.c | 35 +
.../wdg/sample_wdg_reset/init/main.h | 48 +
.../wdg/sample_wdg_reset/init/system_init.c | 116 +
drivers_sample/wdg/sample_wdg_reset/readme.md | 18 +
.../sample_wdg_reset/src/wdg_reset_sample.c | 77 +
.../inc/sample_wwdg_refresh.h | 30 +
.../wdg/sample_wwdg_refresh/init/main.c | 50 +
.../wdg/sample_wwdg_refresh/init/main.h | 52 +
.../sample_wwdg_refresh/init/system_init.c | 119 +
.../wdg/sample_wwdg_refresh/readme.md | 18 +
.../src/sample_wwdg_refresh.c | 76 +
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...07\345\257\274\346\211\213\345\206\214.md" | 1967 +++++++++++++++++
552 files changed, 36371 insertions(+)
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/inc/sample_acmp_interrupt.h
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/init/main.c
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/init/main.h
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/init/system_init.c
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/readme.md
create mode 100644 drivers_sample/acmp/sample_acmp_interrupt/src/sample_acmp_interrupt.c
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/inc/sample_acmp_out_result.h
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/init/main.c
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/init/main.h
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/init/system_init.c
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/readme.md
create mode 100644 drivers_sample/acmp/sample_acmp_out_result/src/sample_acmp_out_result.c
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/inc/sample_adc_associative_trigger_apt.h
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/readme.md
create mode 100644 drivers_sample/adc/sample_adc_associative_trigger_of_apt/src/sample_adc_associative_trigger_apt.c
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/inc/sample_adc_continue_trigger.h
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/readme.md
create mode 100644 drivers_sample/adc/sample_adc_continue_trigger/src/sample_adc_continue_trigger.c
create mode 100644 drivers_sample/adc/sample_adc_over_sample/inc/sample_adc_over_sample.h
create mode 100644 drivers_sample/adc/sample_adc_over_sample/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_over_sample/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_over_sample/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_over_sample/readme.md
create mode 100644 drivers_sample/adc/sample_adc_over_sample/src/sample_adc_over_sample.c
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/inc/sample_adc_oversampling_it.h
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/readme.md
create mode 100644 drivers_sample/adc/sample_adc_oversampling_it/src/sample_adc_oversampling_it.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/inc/sample_adc_single_trigger.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/readme.md
create mode 100644 drivers_sample/adc/sample_adc_single_trigger/src/sample_adc_single_trigger.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/inc/sample_adc_single_trigger_dma.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/readme.md
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_dma/src/sample_adc_single_trigger_dma.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/inc/sample_adc_single_trigger_it.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/readme.md
create mode 100644 drivers_sample/adc/sample_adc_single_trigger_it/src/sample_adc_single_trigger_it.c
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/inc/sample_adc_single_with_ppb.h
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/readme.md
create mode 100644 drivers_sample/adc/sample_adc_single_with_ppb/src/sample_adc_single_with_ppb.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/inc/sample_adc_sync_sample.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/readme.md
create mode 100644 drivers_sample/adc/sample_adc_sync_sample/src/sample_adc_sync_sample.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/inc/sample_adc_sync_sample_dma.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/readme.md
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_dma/src/sample_adc_sync_sample_dma.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/inc/sample_adc_sync_sample_it.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/init/main.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/init/main.h
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/init/system_init.c
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/readme.md
create mode 100644 drivers_sample/adc/sample_adc_sync_sample_it/src/sample_adc_sync_sample_it.c
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/inc/sample_apt_single_resistor.h
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/init/main.c
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/init/main.h
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/init/system_init.c
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/readme.md
create mode 100644 drivers_sample/apt/sample_apt_single_resistor/src/sample_apt_single_resistor.c
create mode 100644 drivers_sample/can/sample_can_send_receive/inc/sample_can_send_receive.h
create mode 100644 drivers_sample/can/sample_can_send_receive/init/main.c
create mode 100644 drivers_sample/can/sample_can_send_receive/init/main.h
create mode 100644 drivers_sample/can/sample_can_send_receive/init/system_init.c
create mode 100644 drivers_sample/can/sample_can_send_receive/readme.md
create mode 100644 drivers_sample/can/sample_can_send_receive/src/sample_can_send_receive.c
create mode 100644 drivers_sample/capm/capm_hall_sample/inc/capm_hall_sample.h
create mode 100644 drivers_sample/capm/capm_hall_sample/init/main.c
create mode 100644 drivers_sample/capm/capm_hall_sample/init/main.h
create mode 100644 drivers_sample/capm/capm_hall_sample/init/system_init.c
create mode 100644 drivers_sample/capm/capm_hall_sample/readme.md
create mode 100644 drivers_sample/capm/capm_hall_sample/src/capm_hall_sample.c
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/inc/cfd_check_error_sample.h
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/init/main.c
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/init/main.h
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/init/system_init.c
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/readme.md
create mode 100644 drivers_sample/cfd/sample_cfd_check_error/src/cfd_check_error_sample.c
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/inc/cmm_check_error_sample.h
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/init/main.c
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/init/main.h
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/init/system_init.c
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/readme.md
create mode 100644 drivers_sample/cmm/sample_cmm_check_error/src/cmm_check_error_sample.c
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/inc/sample_crc_gen_algo.h
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/init/main.c
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/init/main.h
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/init/system_init.c
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/readme.md
create mode 100644 drivers_sample/crc/sample_crc_gen_algo/src/sample_crc_gen_algo.c
create mode 100644 drivers_sample/crc/sample_crc_load_algo/inc/sample_crc_load_algo.h
create mode 100644 drivers_sample/crc/sample_crc_load_algo/init/main.c
create mode 100644 drivers_sample/crc/sample_crc_load_algo/init/main.h
create mode 100644 drivers_sample/crc/sample_crc_load_algo/init/system_init.c
create mode 100644 drivers_sample/crc/sample_crc_load_algo/readme.md
create mode 100644 drivers_sample/crc/sample_crc_load_algo/src/sample_crc_load_algo.c
create mode 100644 drivers_sample/dac/sample_dac/init/main.c
create mode 100644 drivers_sample/dac/sample_dac/init/main.h
create mode 100644 drivers_sample/dac/sample_dac/init/system_init.c
create mode 100644 drivers_sample/dac/sample_dac/readme.md
create mode 100644 drivers_sample/dma/sample_dma_list_transfer/inc/sample_dma_list_transfer.h
create mode 100644 drivers_sample/dma/sample_dma_list_transfer/readme.md
create mode 100644 drivers_sample/dma/sample_dma_list_transfer/src/sample_dma_list_transfer.c
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/inc/sample_dma_list_transfer_continue.h
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/readme.md
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/src/sample_dma_list_transfer_continue.c
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.c
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.h
create mode 100644 drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/system_init.c
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/inc/sample_dma_mem_to_mem.h
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/init/main.c
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/init/main.h
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/init/system_init.c
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/readme.md
create mode 100644 drivers_sample/dma/sample_dma_mem_to_mem/src/sample_dma_mem_to_mem.c
create mode 100644 drivers_sample/dma/sample_dma_mem_to_per/inc/sample_dma_mem_to_per.h
create mode 100644 drivers_sample/dma/sample_dma_mem_to_per/readme.md
create mode 100644 drivers_sample/dma/sample_dma_mem_to_per/src/sample_dma_mem_to_per.c
create mode 100644 drivers_sample/dma/sample_dma_per_to_mem/inc/sample_dma_per_to_mem.h
create mode 100644 drivers_sample/dma/sample_dma_per_to_mem/readme.md
create mode 100644 drivers_sample/dma/sample_dma_per_to_mem/src/sample_dma_per_to_mem.c
create mode 100644 drivers_sample/dma/sample_dma_per_to_per/inc/sample_dma_per_to_per.h
create mode 100644 drivers_sample/dma/sample_dma_per_to_per/readme.md
create mode 100644 drivers_sample/dma/sample_dma_per_to_per/src/sample_dma_per_to_per.c
create mode 100644 drivers_sample/flash/sample_flash_blocking/inc/sample_flash_blocking.h
create mode 100644 drivers_sample/flash/sample_flash_blocking/init/main.c
create mode 100644 drivers_sample/flash/sample_flash_blocking/init/main.h
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create mode 100644 drivers_sample/flash/sample_flash_blocking/src/sample_flash_blocking.c
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/inc/sample_flash_blocking_mode.h
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/init/main.c
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/init/main.h
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/init/system_init.c
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/readme.md
create mode 100644 drivers_sample/flash/sample_flash_blocking_mode/src/sample_flash_blocking_mode.c
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create mode 100644 drivers_sample/uart/sample_uart_int_tx_int_rx_simultaneously/src/sample_uart_int_tx_int_rx_simultaneously.c
create mode 100644 drivers_sample/uart/sample_uart_interrupt_rx/inc/sample_uart_interrupt_rx.h
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create mode 100644 drivers_sample/uart/sample_uart_interrupt_rx/src/sample_uart_interrupt_rx.c
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create mode 100644 drivers_sample/uart/sample_uart_interrupt_tx/src/sample_uart_interrupt_tx.c
create mode 100644 drivers_sample/uart/sample_uart_interrupt_tx_after_rx/inc/sample_uart_interrupt_tx_after_rx.h
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create mode 100644 drivers_sample/uart/sample_uart_interrupt_tx_after_rx/readme.md
create mode 100644 drivers_sample/uart/sample_uart_interrupt_tx_after_rx/src/sample_uart_interrupt_tx_after_rx.c
create mode 100644 drivers_sample/uart/sample_uart_single_wire_communication/inc/sample_uart_single_wire_communication.h
create mode 100644 drivers_sample/uart/sample_uart_single_wire_communication/init/main.c
create mode 100644 drivers_sample/uart/sample_uart_single_wire_communication/init/main.h
create mode 100644 drivers_sample/uart/sample_uart_single_wire_communication/init/system_init.c
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create mode 100644 drivers_sample/uart/sample_uart_single_wire_communication/src/sample_uart_single_wire_communication.c
create mode 100644 drivers_sample/wdg/sample_iwdg_refresh/inc/sample_iwdg_refresh.h
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create mode 100644 drivers_sample/wdg/sample_iwdg_refresh/readme.md
create mode 100644 drivers_sample/wdg/sample_iwdg_refresh/src/sample_iwdg_refresh.c
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/inc/iwdg_reset_sample.h
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/init/main.c
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/init/main.h
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/init/system_init.c
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/readme.md
create mode 100644 drivers_sample/wdg/sample_iwdg_reset/src/iwdg_reset_sample.c
create mode 100644 drivers_sample/wdg/sample_wdg_reset/inc/wdg_reset_sample.h
create mode 100644 drivers_sample/wdg/sample_wdg_reset/init/main.c
create mode 100644 drivers_sample/wdg/sample_wdg_reset/init/main.h
create mode 100644 drivers_sample/wdg/sample_wdg_reset/init/system_init.c
create mode 100644 drivers_sample/wdg/sample_wdg_reset/readme.md
create mode 100644 drivers_sample/wdg/sample_wdg_reset/src/wdg_reset_sample.c
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/inc/sample_wwdg_refresh.h
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/init/main.c
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/init/main.h
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/init/system_init.c
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/readme.md
create mode 100644 drivers_sample/wdg/sample_wwdg_refresh/src/sample_wwdg_refresh.c
create mode 100644 "drivers_sample/\345\233\276\347\211\207/1726194739756.jpg"
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create mode 100644 "drivers_sample/\345\256\236\351\252\214\346\214\207\345\257\274\346\211\213\345\206\214.md"
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/inc/sample_acmp_interrupt.h b/drivers_sample/acmp/sample_acmp_interrupt/inc/sample_acmp_interrupt.h
new file mode 100644
index 000000000..40fc5e55f
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/inc/sample_acmp_interrupt.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_acmp_interrupt.h
+ * @author MCU Driver Team
+ * @brief acmp sample module.
+ * @details This file provides sample code for users to help use
+ * the interrupt function of the acmp.
+ */
+
+#ifndef SAMPLE_ACMP_INTERRUPT_H
+#define SAMPLE_ACMP_INTERRUPT_H
+
+#include "main.h"
+/* ACMP interrupt caller function. */
+void ACMP_CompareInt(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/init/main.c b/drivers_sample/acmp/sample_acmp_interrupt/init/main.c
new file mode 100644
index 000000000..c9f921f03
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/init/main.c
@@ -0,0 +1,56 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_acmp_interrupt.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+ACMP_Handle g_acmp0;
+DAC_Handle g_dac0;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ ACMP_CompareInt();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/init/main.h b/drivers_sample/acmp/sample_acmp_interrupt/init/main.h
new file mode 100644
index 000000000..fd633ecfb
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/init/main.h
@@ -0,0 +1,63 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "acmp.h"
+#include "acmp_ex.h"
+#include "uart.h"
+#include "uart_ex.h"
+#include "dac.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern ACMP_Handle g_acmp0;
+extern DAC_Handle g_dac0;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ACMP0PositveCallFunc(void *handle);
+void ACMP0NegativeCallFunc(void *handle);
+void ACMP0EdgedCallFunc(void *handle);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/init/system_init.c b/drivers_sample/acmp/sample_acmp_interrupt/init/system_init.c
new file mode 100644
index 000000000..cac67856c
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/init/system_init.c
@@ -0,0 +1,157 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ACMP0PositveCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0PositveCallFunc */
+ /* USER CODE END ACMP0PositveCallFunc */
+}
+
+__weak void ACMP0NegativeCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0NegativeCallFunc */
+ /* USER CODE END ACMP0NegativeCallFunc */
+}
+
+__weak void ACMP0EdgedCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0EdgedCallFunc */
+ /* USER CODE END ACMP0EdgedCallFunc */
+}
+
+static void ACMP0_Init(void)
+{
+ HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */
+ g_acmp0.baseAddress = ACMP0_BASE;
+ g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3;
+ g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5;
+ g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT;
+ g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE;
+ g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV;
+ g_acmp0.interruptEn = BASE_CFG_SET;
+ HAL_ACMP_Init(&g_acmp0);
+ HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_POS_INT, ACMP0PositveCallFunc);
+ HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_NEG_INT, ACMP0NegativeCallFunc);
+ HAL_ACMP_RegisterCallBack(&g_acmp0, ACMP_EDGE_INT, ACMP0EdgedCallFunc);
+ IRQ_Register(IRQ_ACMP_INT, HAL_ACMP_IrqHandler, &g_acmp0);
+ IRQ_SetPriority(IRQ_ACMP_INT, 1); /* 1 is priority value */
+ IRQ_EnableN(IRQ_ACMP_INT);
+}
+
+static void DAC0_Init(void)
+{
+ HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */
+
+ g_dac0.baseAddress = DAC0;
+ g_dac0.dacValue = 250;
+ HAL_DAC_Init(&g_dac0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0;
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1;
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN4 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_ACMP_N3); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_ACMP_N3, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_ACMP_N3, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_ACMP_N3, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_ACMP_N3, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN1 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_ACMP0_OUT); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_ACMP0_OUT, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_ACMP0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_ACMP0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_ACMP0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ACMP0_Init();
+ DAC0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/readme.md b/drivers_sample/acmp/sample_acmp_interrupt/readme.md
new file mode 100644
index 000000000..f66fcc0bd
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/readme.md
@@ -0,0 +1,20 @@
+# 比较器 -- 比较器中断使用样例
+## 关键字: ACMP比较器, 比较器中断使用样例
+
+**【功能描述】**
++ ACMP输出比较结果，会根据ACMP比较结果， 触发不同类型的中断回调函数。
+
++ 输出比较结果为上升沿时，会触发上升沿回调函数，输出结果为下降沿时，会触发下降沿回调函数。
+
+**【示例配置】**
++ 初始化ACMP，配置ACMP的N端和P端口输入，配置ACMP比较结果输出，管脚配置可以在ACMP配置界面中，配置“Input And Output Setting”进行更改。
+
++ ACMP的比较结果输出，当配置的正端的电压值高于负端的电压值时输出高，反之则输出低。示例中输入源、输出的配置，可以通过ACMP的配置界面，或在“system_init.c”文件中修改ACMP初始化代码实现。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，ACMP初始化和配置完成后，会在IOCMG_26输出输入源的比较结果，并调用触发相应的回调函数，用户可以通过交换输入源信号，并测量输出端的电压，比较输入源的电压大小。
+
+**【注意事项】**
++ 输入的比较电压不能超过0V~输入电源大小（3.3V）。
+
++ 最小可识别有效差分输入电压为20mV。
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_interrupt/src/sample_acmp_interrupt.c b/drivers_sample/acmp/sample_acmp_interrupt/src/sample_acmp_interrupt.c
new file mode 100644
index 000000000..39aaf5ea8
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_interrupt/src/sample_acmp_interrupt.c
@@ -0,0 +1,78 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_acmp_interrupt.c
+ * @author MCU Driver Team
+ * @brief can sample module.
+ * @details This file provides sample code for users to help use
+ * the interrupt function of the acmp.
+ */
+#include "sample_acmp_interrupt.h"
+#include "main.h"
+#include "debug.h"
+
+/**
+ * @brief ACMP Positve Callback function.
+ * @param handle ACMP handle.
+ * @retval None.
+ */
+void ACMP0PositveCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0PositveCallFunc */
+ DBG_PRINTF("ACMP positive callback function.\r\n");
+ /* USER CODE END ACMP0PositveCallFunc */
+}
+
+/**
+ * @brief ACMP Negative Callback function.
+ * @param handle ACMP handle.
+ * @retval None.
+ */
+void ACMP0NegativeCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0NegativeCallFunc */
+ DBG_PRINTF("ACMP negative callback function.\r\n");
+ /* USER CODE END ACMP0NegativeCallFunc */
+}
+
+/**
+ * @brief ACMP Edge callback function.
+ * @param handle ACMP handle.
+ * @retval None.
+ */
+void ACMP0EdgedCallFunc(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ACMP0EdgedCallFunc */
+ DBG_PRINTF("ACMP edge callback funtion.\r\n");
+ /* USER CODE END ACMP0EdgedCallFunc */
+}
+
+/**
+ * @brief Example of comparing ACMP results
+ * @param None.
+ * @retval None.
+ */
+void ACMP_CompareInt(void)
+{
+ SystemInit();
+ DBG_PRINTF("Example: ACMP comparison result interrupt. The ACMP output comparison result triggers different types\
+ of interrupts, such as rising edge triggle positve call back function, falling edge triggle negative\
+ callback function, and flip edge triggle edge callback funtion.\r\n");
+}
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/inc/sample_acmp_out_result.h b/drivers_sample/acmp/sample_acmp_out_result/inc/sample_acmp_out_result.h
new file mode 100644
index 000000000..00dc659db
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/inc/sample_acmp_out_result.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_acmp_out_result.h
+ * @author MCU Driver Team
+ * @brief acmp sample module.
+ * @details This file provides sample code for users to help use
+ * the compare function of the acmp.
+ */
+
+#ifndef SAMPLE_ACMP_OUT_RESULT_H
+#define SAMPLE_ACMP_OUT_RESULT_H
+
+#include "main.h"
+/* ACMP interrupt caller function. */
+void ACMP_CompareResultOutput(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/init/main.c b/drivers_sample/acmp/sample_acmp_out_result/init/main.c
new file mode 100644
index 000000000..ff8f2443c
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/init/main.c
@@ -0,0 +1,56 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_acmp_out_result.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+ACMP_Handle g_acmp0;
+DAC_Handle g_dac0;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ ACMP_CompareResultOutput();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/init/main.h b/drivers_sample/acmp/sample_acmp_out_result/init/main.h
new file mode 100644
index 000000000..3f9acb527
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/init/main.h
@@ -0,0 +1,59 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "acmp.h"
+#include "acmp_ex.h"
+#include "uart.h"
+#include "uart_ex.h"
+#include "dac.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern ACMP_Handle g_acmp0;
+extern DAC_Handle g_dac0;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/init/system_init.c b/drivers_sample/acmp/sample_acmp_out_result/init/system_init.c
new file mode 100644
index 000000000..b171e1edb
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/init/system_init.c
@@ -0,0 +1,130 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void ACMP0_Init(void)
+{
+ HAL_CRG_IpEnableSet(ACMP0_BASE, IP_CLK_ENABLE); /* ACMP clock bit reset. */
+ g_acmp0.baseAddress = ACMP0_BASE;
+ g_acmp0.inOutConfig.inputNNum = ACMP_INPUT_N_SELECT3;
+ g_acmp0.inOutConfig.inputPNum = ACMP_INPUT_P_SELECT5;
+ g_acmp0.inOutConfig.polarity = ACMP_OUT_NOT_INVERT;
+ g_acmp0.filterCtrl.filterMode = ACMP_FILTER_NONE;
+ g_acmp0.hysteresisVol = ACMP_HYS_VOL_30MV;
+ g_acmp0.interruptEn = BASE_CFG_UNSET;
+ HAL_ACMP_Init(&g_acmp0);
+}
+
+static void DAC0_Init(void)
+{
+ HAL_CRG_IpEnableSet(DAC0_BASE, IP_CLK_ENABLE); /* DAC0 clock enable. */
+
+ g_dac0.baseAddress = DAC0;
+ g_dac0.dacValue = 250;
+ HAL_DAC_Init(&g_dac0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0;
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1;
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN4 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_ACMP_N3); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_ACMP_N3, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_ACMP_N3, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_ACMP_N3, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_ACMP_N3, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN1 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_ACMP0_OUT); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_ACMP0_OUT, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_ACMP0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_ACMP0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_ACMP0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ACMP0_Init();
+ DAC0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/readme.md b/drivers_sample/acmp/sample_acmp_out_result/readme.md
new file mode 100644
index 000000000..7992f5e80
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/readme.md
@@ -0,0 +1,18 @@
+# 模拟比较器基本使用 - 内部DAC输出电压和外部输入电压比较
+## 关键字: ACMP, DAC内部输入
+
+**【功能描述】**
++ 对两个输入源进行电压比较，输出比较结果。输入和输出信号都可配，本示例中的输入的N端信号为DAC的内部输出，输入的P端信号为GPIO2_6，在GPIO0_7中输出比较结 果。
+
+**【示例配置】**
++ ACMP的输入比较信号，可在ACMP配置界面中，配置“Input And Output Setting”进行更改。
+
++ 当配置的正端的电压值高于负端的电压值时输出高，反之则输出低。示例中输入源、输出的配置，可以通过ACMP的配置界面，或在“system_init.c”文件中修改ACMP初始化代码实现。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，ACMP初始化和配置完成后，会在GPIO0_7输出输入源的比较结果。用户可以通过交换N端口输入电压，并测量输出端的电压，比较输入源的电压大小。
+
+**【注意事项】**
++ 输入的比较电压不能超过0V~输入电源大小（3.3V）。
+
++ 最小可识别有效差分输入电压为20mV。
\ No newline at end of file
diff --git a/drivers_sample/acmp/sample_acmp_out_result/src/sample_acmp_out_result.c b/drivers_sample/acmp/sample_acmp_out_result/src/sample_acmp_out_result.c
new file mode 100644
index 000000000..70dee0f49
--- /dev/null
+++ b/drivers_sample/acmp/sample_acmp_out_result/src/sample_acmp_out_result.c
@@ -0,0 +1,38 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_acmp_out_result.c
+ * @author MCU Driver Team
+ * @brief can sample module.
+ * @details This file provides sample code for users to help use
+ * the compare function of the acmp.
+ */
+#include "sample_acmp_out_result.h"
+#include "main.h"
+#include "debug.h"
+
+/**
+ * @brief Example of comparing ACMP results
+ * @param None.
+ * @retval None.
+ */
+void ACMP_CompareResultOutput(void)
+{
+ SystemInit();
+ DBG_PRINTF("Example: ACMP comparison result output, N pole requires an external input of the voltage to be\
+ compared. P pole input source from DAC out(0.8V), ACMP result is output GPIO0_7.\r\n");
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/inc/sample_adc_associative_trigger_apt.h b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/inc/sample_adc_associative_trigger_apt.h
new file mode 100644
index 000000000..4b69d63a4
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/inc/sample_adc_associative_trigger_apt.h
@@ -0,0 +1,33 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_associative_trigger_apt.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC sampling by software trigger
+ */
+#ifndef SAMPLE_ADC_SINGLETRIGGER_H
+#define SAMPLE_ADC_SINGLETRIGGER_H
+
+#include "debug.h"
+#include "adc.h"
+#include "apt.h"
+#include "main.h"
+
+void ADC_AptTrigger(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.c b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.c
new file mode 100644
index 000000000..f4ccb25a4
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_associative_trigger_apt.h"
+
+UART_Handle g_uart0;
+APT_Handle g_hAptU;
+APT_OutCtrlProtect g_hProtectU;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_AptTrigger();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.h b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.h
new file mode 100644
index 000000000..b54e8e573
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/main.h
@@ -0,0 +1,52 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "apt.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern APT_Handle g_hAptU;
+
+extern APT_OutCtrlProtect g_hProtectU;
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC_Init2FromApt(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/system_init.c b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/system_init.c
new file mode 100644
index 000000000..ca9b70076
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/init/system_init.c
@@ -0,0 +1,214 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC_Init2FromApt(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC_Init2FromApt */
+ /* USER CODE END ADC_Init2FromApt */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_NONESOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_APT0_SOCA;
+ socParam.finishMode = ADC_SOCFINISH_INT2;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT2, ADC_Init2FromApt);
+ IRQ_SetPriority(IRQ_ADC1_INT2, 4); /* Set the priority to level 4 */
+ IRQ_EnableN(IRQ_ADC1_INT2);
+ HAL_ADC_IrqService(&g_adc);
+}
+
+static void APT0_Init(void)
+{
+ HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE);
+
+ g_hAptU.baseAddress = APT0;
+ g_hAptU.irqNumEvt = IRQ_APT0_EVT;
+ g_hAptU.irqNumTmr = IRQ_APT0_TMR;
+
+ /* Clock Settings */
+ g_hAptU.waveform.dividerFactor = 1 - 1;
+ /* Timer Settings */
+ g_hAptU.waveform.timerPeriod = 20000; /* timerPeriod is 20000 */
+ g_hAptU.waveform.cntMode = APT_COUNT_MODE_UP_DOWN;
+
+ /* Wave Form */
+ g_hAptU.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH;
+ g_hAptU.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptU.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptU.waveform.divInitVal = 0U;
+ g_hAptU.waveform.cntInitVal = 0U;
+ g_hAptU.waveform.cntCmpLeftEdge = 1;
+ g_hAptU.waveform.cntCmpRightEdge = 19999; /* cntCmpRightEdge is 19999 */
+ g_hAptU.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptU.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+ g_hAptU.waveform.deadBandCnt = 60; /* deadBandCnt is 60 */
+
+ /* ADC Triggle SOCA */
+ g_hAptU.adcTrg.trgEnSOCA = BASE_CFG_ENABLE;
+ g_hAptU.adcTrg.cntCmpSOCA = 1;
+ g_hAptU.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_UP;
+ g_hAptU.adcTrg.trgScaleSOCA = 1;
+
+ /* ADC Triggle SOCB */
+ g_hAptU.adcTrg.trgEnSOCB = BASE_CFG_ENABLE;
+ g_hAptU.adcTrg.cntCmpSOCB = 1;
+ g_hAptU.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_UP;
+ g_hAptU.adcTrg.trgScaleSOCB = 1;
+
+ g_hAptU.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptU.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+
+ /* Timer Triggle */
+ g_hAptU.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE;
+ g_hAptU.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO_PERIOD;
+ g_hAptU.tmrInterrupt.tmrInterruptScale = 1;
+
+ /* Output Protect */
+ g_hProtectU.ocEventEn = BASE_CFG_ENABLE;
+ g_hProtectU.ocEventMode = APT_OUT_CTRL_ONE_SHOT;
+ g_hProtectU.evtPolarity = APT_EM_EVENT_POLARITY_INVERT;
+ g_hProtectU.ocEvent = APT_OC_GPIO_EVENT_1;
+ g_hProtectU.cbcClrMode = APT_CLEAR_CBC_ON_CNTR_ZERO;
+ g_hProtectU.ocAction = APT_OUT_CTRL_ACTION_LOW;
+ g_hProtectU.ocEvtInterruptEn = true;
+ HAL_APT_ProtectInit(&g_hAptU, &g_hProtectU);
+
+ HAL_APT_PWMInit(&g_hAptU);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_32.BIT.func = 0x3; /* 0x3 is APT0_PWMA */
+ iconfig->iocmg_32.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_32.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_32.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_32.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_32.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_35.BIT.func = 0x3; /* 0x3 is APT0_PWMB */
+ iconfig->iocmg_35.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_35.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_35.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_35.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_35.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ APT0_Init();
+ ADC1_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/readme.md b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/readme.md
new file mode 100644
index 000000000..5792eef52
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/readme.md
@@ -0,0 +1,18 @@
+# 使用APT对ADC进行周期采样功能
+## 关键字: ADC, APT触发
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。示例中使用APT触发ADC采样，采样结束后触发ADC中断，并在中断回调函数中读取ADC转换结果。
+
+**【示例配置】**
++ ADC触发源：APT。在"SystemInit()”中配置了APT的SOCA可以触发ADC采样。使用接口"HAL_APT_StartModule()”启动APT，在APT的每个周期中都会产生对ADC的触发请求。APT的触发配置请见"System_Init()”内APT初始化的部分。
+
++ ADC采样源：挂载到SOC0“adcInput”的外部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个。
+
++ ADC采样结果：ADC中断回调函数中读取结果。中断回调函数的配置请见"System_Init()”内ADC初始化的部分。在回调函数中调用“HAL_ADC_GetConvResult()”获取结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中APT会周期性的对ADC进行触发采样。采样成功后，会通过串口打印中断服务函数内读取到的ADC采样结果。在串口打印输出中，会不断打印中断回调函数中读出的ADC采样结果。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_associative_trigger_of_apt/src/sample_adc_associative_trigger_apt.c b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/src/sample_adc_associative_trigger_apt.c
new file mode 100644
index 000000000..05180c45f
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_associative_trigger_of_apt/src/sample_adc_associative_trigger_apt.c
@@ -0,0 +1,59 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_associative_trigger_apt.c
+ * @author MCU Driver Team
+ * @brief adc sample sampling by apt trigger.
+ * @details Use APT to trigger ADC sampling, trigger an ADC interrupt after sampling, and read the ADC conversion
+ * result in the interrupt callback function.
+ * (1) ADC strigger source is APT0_SOCA. Select the ADC trigger source in "socParam.periphTrigSource"
+ * from SystemInit() and modify the initialization interface of the APT.
+ * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" and "ADC_SOC_NUM1"
+ * from SystemInit(). External input source: GPIO2_2/GPIO2_3
+ * (3) The ADC conversion result is read from the interrupt callback function ADC_Init2FromApt interface.
+ * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to obtain result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+#include "sample_adc_associative_trigger_apt.h"
+
+/**
+ * @brief ADC sampling interrupt callback triggered by APT.
+ * @param None.
+ * @retval None.
+ */
+void ADC_Init2FromApt(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1); /* Read ADC sample result */
+ DBG_PRINTF("APT trigger sampling completed, result: %x\r\n", ret);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+}
+
+/**
+ * @brief ADC single channel sample by trigger from apt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_AptTrigger(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_AptTrigger begin\r\n");
+ HAL_ADC_StartIt(&g_adc);
+ HAL_APT_StartModule(RUN_APT0); /* APT0 is enable and generates the APT0_SOCA trigger signal */
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/inc/sample_adc_continue_trigger.h b/drivers_sample/adc/sample_adc_continue_trigger/inc/sample_adc_continue_trigger.h
new file mode 100644
index 000000000..0227a13c8
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/inc/sample_adc_continue_trigger.h
@@ -0,0 +1,33 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_continue_trigger.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC Continuous Sampling Function: The first time is triggered by software,
+ * and the subsequent consecutive sampling is triggered by interrupts.
+ */
+#ifndef SAMPLE_ADC_CONTINUESAMPLE_H
+#define SAMPLE_ADC_CONTINUESAMPLE_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_ContinueSample(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/init/main.c b/drivers_sample/adc/sample_adc_continue_trigger/init/main.c
new file mode 100644
index 000000000..5e269fbde
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_continue_trigger.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_ContinueSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/init/main.h b/drivers_sample/adc/sample_adc_continue_trigger/init/main.h
new file mode 100644
index 000000000..9df26b874
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC_ContinueInt(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/init/system_init.c b/drivers_sample/adc/sample_adc_continue_trigger/init/system_init.c
new file mode 100644
index 000000000..d94418ac1
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/init/system_init.c
@@ -0,0 +1,140 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC_ContinueInt(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC_ContinueInt */
+ /* USER CODE END ADC_ContinueInt */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_INT2;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_INT2;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT2, ADC_ContinueInt);
+ IRQ_SetPriority(IRQ_ADC1_INT2, 4); /* Set the priority to level 4 */
+ IRQ_EnableN(IRQ_ADC1_INT2);
+ HAL_ADC_IrqService(&g_adc);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/readme.md b/drivers_sample/adc/sample_adc_continue_trigger/readme.md
new file mode 100644
index 000000000..8de1d26e8
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/readme.md
@@ -0,0 +1,18 @@
+# 单次触发ADC，可以产生连续的采样效果
+## 关键字: ADC, 连续采样
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。示例中使用软件触发ADC开始采样，采样结束后触发ADC中断，并在中断回调函数中读取ADC转换结果。在每次完成采样结束后，内部会自动产生触发请求，实现连续采样功能。
+
+**【示例配置】**
++ ADC触发源：软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。连续采样功能中，首次触发来自软件或者其他触发源，后面持续的请求来自ADC内部。
+
++ ADC采样源：挂载到SOC1 “adcInput”的外部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个
+
++ ADC采样结果：ADC中断回调函数中读取结果。中断回调函数的配置请见"System_Init()”内ADC初始化内容。在回调函数中调用“HAL_ADC_GetConvResult()”获取结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，软件触发后，ADC进行连续触发采样，持续产生中断。采样成功后，会通过串口打印中断服务函数内读取到的ADC采样结果。在串口打印输出中，会不断打印中断回调函数中读出的ADC采样结果。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_continue_trigger/src/sample_adc_continue_trigger.c b/drivers_sample/adc/sample_adc_continue_trigger/src/sample_adc_continue_trigger.c
new file mode 100644
index 000000000..8ad708b05
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_continue_trigger/src/sample_adc_continue_trigger.c
@@ -0,0 +1,65 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_continue_trigger.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In continuous mode, the ADC uses its internal interrupts to continuously trigger ADC sampling. After
+ * sampling is complete, an ADC interrupt is triggered. The ADC conversion result can be read in the
+ * interrupt callback function. ADC Continuous Sampling Function: The first time is triggered by software,
+ * and the subsequent consecutive sampling is triggered by interrupts.
+ * (1) ADC strigger source is ADC1 interrupt2(IRQ_ADC1_INT2). Select the ADC trigger source in
+ * "socParam.intTrigSource" of SystemInit().
+ * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" and "ADC_SOC_NUM1"
+ * of SystemInit(). External input source: GPIO2_2/GPIO2_3
+ * (3) The ADC conversion result is read from the interrupt callback function ADC_ContinueInt interface.
+ * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to obtain result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+#include "sample_adc_continue_trigger.h"
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param adcHandle ADC handle.
+ * @retval None.
+ */
+void ADC_ContinueInt(ADC_Handle *adcHandle)
+{
+ DBG_PRINTF("ADC_Int1Finish\r\n");
+ unsigned int ret = HAL_ADC_GetConvResult(adcHandle, ADC_SOC_NUM1);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("result: %d, voltage: %f\r\n", ret, voltage);
+}
+
+/**
+ * @brief Continuous sample function by using internal interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_ContinueSample(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_ContinueSample begin\r\n");
+ HAL_ADC_StartIt(&g_adc); /* Enable ADC interrupt */
+ /* The first trigger, then internal interrupt triggered continuous sampling */
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1);
+ /*
+ To disable the continuous sampling function, perform the following sampling methods:
+ (1) Disable the ADC interrupt and use IRQ_DisableN().
+ (2) Configure the SOC trigger source and remove interrupt triggering.
+ */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/inc/sample_adc_over_sample.h b/drivers_sample/adc/sample_adc_over_sample/inc/sample_adc_over_sample.h
new file mode 100644
index 000000000..435baa6ca
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/inc/sample_adc_over_sample.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_over_sample.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function.
+ */
+#ifndef SAMPLE_ADC_OVERSAMPLE_H
+#define SAMPLE_ADC_OVERSAMPLE_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_OverSample(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/init/main.c b/drivers_sample/adc/sample_adc_over_sample/init/main.c
new file mode 100644
index 000000000..b276dd494
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_over_sample.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_OverSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/init/main.h b/drivers_sample/adc/sample_adc_over_sample/init/main.h
new file mode 100644
index 000000000..0289e7961
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/init/system_init.c b/drivers_sample/adc/sample_adc_over_sample/init/system_init.c
new file mode 100644
index 000000000..c379b76aa
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/init/system_init.c
@@ -0,0 +1,138 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM3, &socParam);
+
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM5, &socParam);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/readme.md b/drivers_sample/adc/sample_adc_over_sample/readme.md
new file mode 100644
index 000000000..161013de9
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/readme.md
@@ -0,0 +1,18 @@
+# 同时对同一采样源采样，实现过采样功能
+## 关键字: ADC, 过采样
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。过采样示例中，ADC对同一条通道使用两个SOC来采样两次，使用软件触发ADC采样，触发采样后自行判断ADC转换完成后，再自行读取两个结果，此时结果为两倍过采样。
+
+**【示例配置】**
++ ADC触发源：软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。连续采样功能中，首次触发来自软件或者其他触发源，后面持续的请求来自ADC内部。
+
++ ADC采样源：挂载到SOC3和SOC5外部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任意两个。过采样中需要保证SOC3和SOC5采样源一致，要配置“SystemInit()”中“adcInput”参数一致。
+
++ ADC采样结果：自行判断转换完成后，再读取结果。使用接口“HAL_ADC_CheckSocFinish()”判断是否转换完成，返回值OK表示转换结束，再使用“HAL_ADC_GetConvResult()”接口，读取采样结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发后，ADC进行同时对同一个采样源采样两次。等待5ms后检查ADC采样结是否转换完成，若转换完成串口打印出采样结果，若采样未完成打印未完成提示字符串。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_over_sample/src/sample_adc_over_sample.c b/drivers_sample/adc/sample_adc_over_sample/src/sample_adc_over_sample.c
new file mode 100644
index 000000000..b51705ae9
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_over_sample/src/sample_adc_over_sample.c
@@ -0,0 +1,61 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_over_sample.c
+ * @author MCU Driver Team
+ * @brief adc over sample module.
+ * @details In the oversampling example, the ADC samples the same channel twice and uses software to trigger ADC
+ * sampling. After the sampling is triggered, determines the ADC conversion is complete and reads the result.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigMultiSample() to configure software tirgger SOC3
+ * and SOC5.
+ * (2) ADC sample source is ADC1_SOC3 and ADC1_SOC5. Select sample source in "g_adc.baseAddress" of
+ * SystemInit(), "ADC_SOC_NUM3" and "ADC_SOC_NUM5" can be Modified. External input source: GPIO2_2/GPIO2_3.
+ * (3) The ADC conversion result is read from HAL_ADC_GetConvResult interface.
+ * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to obtain result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+
+#include "sample_adc_over_sample.h"
+/**
+ * @brief ADC over sample.
+ * @param None.
+ * @retval None.
+ */
+void ADC_OverSample(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_overSample begin\r\n");
+
+ ADC_SoftMultiTrig softTrig = {0};
+ softTrig.BIT.trigSoc3 = BASE_CFG_ENABLE;
+ softTrig.BIT.trigSoc5 = BASE_CFG_ENABLE;
+ HAL_ADC_SoftTrigMultiSample(&g_adc, softTrig); /* Trigger both SOC3 and SOC5 */
+
+ BASE_FUNC_DELAY_MS(5); /* delay 5 ms */
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM3) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("SOC3 did not complete sampling and conversion\r\n");
+ return;
+ }
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM5) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("SOC5 did not complete sampling and conversion\r\n");
+ return;
+ }
+ /* Read sampling results */
+ unsigned ret1 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM3);
+ unsigned ret2 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM5);
+ DBG_PRINTF("ret1: %x, ret2: %x\r\n", ret1, ret2);
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/inc/sample_adc_oversampling_it.h b/drivers_sample/adc/sample_adc_oversampling_it/inc/sample_adc_oversampling_it.h
new file mode 100644
index 000000000..f5bb2399c
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/inc/sample_adc_oversampling_it.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_oversampling_it.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function.
+ */
+#ifndef SAMPLE_ADC_OVERSAMPLING_IT_H
+#define SAMPLE_ADC_OVERSAMPLING_IT_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_OverSamplingIt(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/init/main.c b/drivers_sample/adc/sample_adc_oversampling_it/init/main.c
new file mode 100644
index 000000000..c73cfd047
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_adc_oversampling_it.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ ADC_OverSamplingIt();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/init/main.h b/drivers_sample/adc/sample_adc_oversampling_it/init/main.h
new file mode 100644
index 000000000..1e369a07d
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/init/main.h
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "adc_ex.h"
+#include "uart.h"
+#include "uart_ex.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC_OversamplingCalBack(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/init/system_init.c b/drivers_sample/adc/sample_adc_oversampling_it/init/system_init.c
new file mode 100644
index 000000000..f99f4aeaf
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/init/system_init.c
@@ -0,0 +1,138 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG; /* crg address */
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { /* crg initialization */
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC_OversamplingCalBack(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC_OversamplingCalBack */
+ /* USER CODE END ADC_OversamplingCalBack */
+}
+
+static void ADC0_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_2);
+
+ g_adc.baseAddress = ADC0;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+
+ HAL_ADC_Init(&g_adc); /* adc initialization */
+ ADC_OversamplingParam over = {0};
+ over.multiple = ADC_OVERSAMPLING_64X; /* 64x oversampling */
+ over.rightShift = ADC_RIGHTSHIFT_BIT3; /* The sampling result is shifted rightwards by 3 bits */
+ over.oversamplingInt = BASE_CFG_ENABLE;
+ HAL_ADC_ConfigureOversamplingEx(&g_adc, ADC_SOC_NUM1, &over);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */
+ socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */
+ socParam.trigSource = ADC_TRIGSOC_SOFT;
+ socParam.continueMode = BASE_CFG_DISABLE;
+ socParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_OVERSAMPLING, (ADC_CallbackType)ADC_OversamplingCalBack);
+
+ IRQ_Register(IRQ_ADC0_EVENT, HAL_ADC_IrqHandlerAllEvent, &g_adc);
+ IRQ_SetPriority(IRQ_ADC0_EVENT, 1); /* The priority is 1 */
+ IRQ_EnableN(IRQ_ADC0_EVENT);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ g_uart0.baseAddress = UART0; /* uart address */
+ /* UART parameter settings */
+ g_uart0.baudRate = UART0_BAND_RATE; /* uart baud rate */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT; /* uart datalength */
+ g_uart0.stopBits = UART_STOPBITS_ONE; /* uart stop bit */
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0); /* uart initialization */
+}
+
+static void IOConfig(void)
+{
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0;
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1;
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_5_AS_ADC_AIN2); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_5_AS_ADC_AIN2, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_5_AS_ADC_AIN2, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_5_AS_ADC_AIN2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_5_AS_ADC_AIN2, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ADC0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/readme.md b/drivers_sample/adc/sample_adc_oversampling_it/readme.md
new file mode 100644
index 000000000..45e4a1cf3
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/readme.md
@@ -0,0 +1,18 @@
+# 配置过采样精度，实现过采样功能，在中断中读取结果
+## 关键字: ADC, 过采样配置，中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。过采样示例中，ADC对同一条通道使用两个SOC来采样两次，使用软件触发ADC采样，触发采样后自行判断ADC转换完成后，再自行读取两个结果，此时结果为两倍过采样。
+
+**【示例配置】**
++ ADC触发源：软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。
+
++ ADC采样源：挂载到SOC1部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任意一个个。配置过采样的参数请见“HAL_ADC_ConfigureOversamplingEx()”接口。通过选择过采样倍数和结果右移比特数来共同决定过采样精度。
+
++ ADC采样结果：在过采样的中断中读出过采样的结果。过采样结果有单独的寄存器读取，需要使用“HAL_ADC_GetOversamplingResultEx()”进行读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发。过采样全过程结束后，会在过采样的中断回调函数中打印出过采样的结果。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_oversampling_it/src/sample_adc_oversampling_it.c b/drivers_sample/adc/sample_adc_oversampling_it/src/sample_adc_oversampling_it.c
new file mode 100644
index 000000000..22b635c30
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_oversampling_it/src/sample_adc_oversampling_it.c
@@ -0,0 +1,58 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_oversampling_it.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In oversampling mode, the ADC uses software triggers oversampling on the same channel.
+ * the ADC interrupt is triggered and conversion result is read in Oversampling event interrupt function.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigSample() to configure software tirgger SOC1.
+ * (2) ADC sample source is SOC1. Select sample source in "g_adc.baseAddress" of SystemInit(),
+ * "ADC_SOC_NUM1" can be Modified.
+ * (3) The ADC conversion result is read from interrupt callback function ADC_OversamplingCalBack interface.
+ * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetOversamplingResultEx() to obtain
+ * result. Check whether ADC conversion is complete through the HAL_ADC_CheckOversamplingFinishEx() interface.
+ */
+#include "adc_ex.h"
+#include "sample_adc_oversampling_it.h"
+
+/**
+ * @brief ADC Oversampling callback function.
+ * @param handle.
+ * @retval None.
+ */
+void ADC_OversamplingCalBack(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ unsigned int ret = HAL_ADC_GetOversamplingResultEx(&g_adc); /* Software trigger ADC sampling */
+ DBG_PRINTF("ADC_OversamplingCalBack, result: %x\r\n", ret);
+ float voltage = ((float)ret / (float)4096 * 3.3) / (float)(64 >> 3); /* 4096 , 3.3, 64 , 3 are for Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+}
+
+/**
+ * @brief ADC single channel sample without DMA and interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_OverSamplingIt(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_OverSamplingIt begin\r\n");
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/inc/sample_adc_single_trigger.h b/drivers_sample/adc/sample_adc_single_trigger/inc/sample_adc_single_trigger.h
new file mode 100644
index 000000000..61f774166
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/inc/sample_adc_single_trigger.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function.
+ */
+#ifndef SAMPLE_ADC_SINGLETRIGGER_H
+#define SAMPLE_ADC_SINGLETRIGGER_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SingleTrigger(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/init/main.c b/drivers_sample/adc/sample_adc_single_trigger/init/main.c
new file mode 100644
index 000000000..26fd70a25
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_single_trigger.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_SingleTrigger();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/init/main.h b/drivers_sample/adc/sample_adc_single_trigger/init/main.h
new file mode 100644
index 000000000..0289e7961
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/init/system_init.c b/drivers_sample/adc/sample_adc_single_trigger/init/system_init.c
new file mode 100644
index 000000000..09b25530d
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/init/system_init.c
@@ -0,0 +1,128 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/readme.md b/drivers_sample/adc/sample_adc_single_trigger/readme.md
new file mode 100644
index 000000000..9c1e6fa6f
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/readme.md
@@ -0,0 +1,18 @@
+# 单次触发ADC完成一次采样转换
+## 关键字: ADC, 判断采样完成
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在单次采样模式下，使用软件触发ADC采样，触发采样后自行判断ADC转换完成后，再自行读取结果。
+
+**【示例配置】**
++ ADC触发源：软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。
+
++ ADC采样源：挂载到SOC1 外部采样源。SOC的在文件“system_init.c”中配置，SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个。
+
++ ADC采样结果：自行判断转换完成后，再读取结果。使用接口“HAL_ADC_CheckSocFinish()”判断是否转换完成，返回值OK表示转换结束，再使用“HAL_ADC_GetConvResult()”接口，读取采样结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发后，ADC进行单次采样转换。等待10ms后检查ADC采样结是否转换完成，若转换完成串口打印出采样结果，若采样未完成打印未完成提示字符串。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger/src/sample_adc_single_trigger.c b/drivers_sample/adc/sample_adc_single_trigger/src/sample_adc_single_trigger.c
new file mode 100644
index 000000000..090e9aca6
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger/src/sample_adc_single_trigger.c
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In single sampling mode, the ADC is triggered by software. After the sampling is triggered, the ADC
+ * determines that the ADC conversion is complete and reads the result.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigSample() to configure software tirgger SOC1.
+ * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" of SystemInit(),
+ * "ADC_SOC_NUM1" can be Modified. External input source: GPIO2_2/GPIO2_3.
+ * (3) If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to get result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+#include "sample_adc_single_trigger.h"
+
+/**
+ * @brief ADC single channel sample without DMA and interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SingleTrigger(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SingleTrigger begin\r\n");
+
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+
+ BASE_FUNC_DELAY_MS(10); /* delay 10 ms */
+
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM1) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("ADC did not complete sampling and conversion\r\n");
+ return;
+ }
+
+ unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+ DBG_PRINTF("Sampling completed, result: %x\r\n", ret);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/inc/sample_adc_single_trigger_dma.h b/drivers_sample/adc/sample_adc_single_trigger_dma/inc/sample_adc_single_trigger_dma.h
new file mode 100644
index 000000000..0242aafc4
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/inc/sample_adc_single_trigger_dma.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger_dma.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC sampling by software trigger with dma
+ */
+#ifndef SAMPLE_ADC_SINGLETRIGGER_DMA_H
+#define SAMPLE_ADC_SINGLETRIGGER_DMA_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SingleTriggerDma(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.c b/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.c
new file mode 100644
index 000000000..1f84553cb
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_single_trigger_dma.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+DMA_Handle g_dmac;
+
+int main(void)
+{
+ ADC_SingleTriggerDma();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.h b/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.h
new file mode 100644
index 000000000..42c24eecd
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/init/main.h
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC1DMACallback(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/init/system_init.c b/drivers_sample/adc/sample_adc_single_trigger_dma/init/system_init.c
new file mode 100644
index 000000000..9f1769b9e
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/init/system_init.c
@@ -0,0 +1,170 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel1Init(void *handle)
+{
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC; /* DMA transmission direction */
+ dma_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.destAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.srcPeriph = DMA_REQUEST_ADC1; /* ADC as DMA Request Source */
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ONE); /* Initializing the DMA Channel */
+}
+
+static void DMA_Init(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(&g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac); /* Initializing the DMA controller */
+
+ DMA_Channel1Init((void *)(&g_adc));
+}
+
+__weak void ADC1DMACallback(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC1DMACallback */
+ /* USER CODE END ADC1DMACallback */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ g_adc.dmaHandle = &g_dmac;
+ g_adc.adcDmaChn = 1; /* DMA Channel 1 */
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_DMA, ADC1DMACallback);
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_DMA;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ ADC1_Init();
+ UART0_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/readme.md b/drivers_sample/adc/sample_adc_single_trigger_dma/readme.md
new file mode 100644
index 000000000..0e5ceb911
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/readme.md
@@ -0,0 +1,18 @@
+# 配置ADC的单次采样功能，利用DMA搬运结果
+## 关键字: ADC, DMA搬运结果
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在单次采样模式下，使用软件触发ADC采样，采样结束后触发DMA搬运结果。搬运结束产生中断，在ADC的DMA完成回调函数中读出结果。
+
+**【示例配置】**
++ ADC触发源：软件。使用接口"HAL_ADC_SoftTrigSample()”完成软件触发。“HAL_ADC_StartDma()”用于配置DMA搬运的源目地址。
+
++ ADC采样源： 挂载到SOC1 外部采样源。SOC的在文件“system_init.c”中配置，SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个。
+
++ ADC采样结果：DMA完成的回调函数中读取结果。DMA配置请见"SystemInit()”。示例代码中，提前开辟了保存ADC采样结果的内存，DMA搬运结束后，直接从内存读取结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会对ADC进行软件触发采样，采样完成触发DMA搬运数据。在完成对ADC采样结果搬运后，会产生中断告知用户，在ADC的DMA完成搬运的中断回调函数中，从预设置的内存中读出DMA的搬运结果，利用串口输出对结果进行打印。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
diff --git a/drivers_sample/adc/sample_adc_single_trigger_dma/src/sample_adc_single_trigger_dma.c b/drivers_sample/adc/sample_adc_single_trigger_dma/src/sample_adc_single_trigger_dma.c
new file mode 100644
index 000000000..70d836102
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_dma/src/sample_adc_single_trigger_dma.c
@@ -0,0 +1,59 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger_dma.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In single sampling mode, the ADC sampling is triggered by software. After the sampling is complete,
+ * the DMA is triggered to transfer the result.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigSample() to configure software tirgger SOC1.
+ * (2) ADC sample source is ADC1_SOC1. Select sample source in "g_adc.baseAddress" of SystemInit(),
+ * "ADC_SOC_NUM3" can be Modified. External input source: GPIO2_2/GPIO2_3
+ * (3) The ADC conversion result is read from DMA interrupt callback function ADC1DMACallback().
+ */
+
+#include "sample_adc_single_trigger_dma.h"
+
+static unsigned int g_adcRet[10] = {0};
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param adcHandle ADC handle.
+ * @retval None.
+ */
+void ADC_DMACallback(ADC_Handle *adcHandle)
+{
+ BASE_FUNC_UNUSED(adcHandle);
+ DBG_PRINTF("DMACallback\r\n");
+ DBG_PRINTF("result: %d\r\n", g_adcRet[0]);
+ float voltage = (float)g_adcRet[0] / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+}
+
+/**
+ * @brief ADC channels sample with DMA. Transfers four SOC conversion results in one DMA request.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SingleTriggerDma(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SingleTriggerDma begin\r\n");
+
+ HAL_ADC_StartDma(&g_adc, ADC_SOC_NUM1, ADC_SOC_NUM1, g_adcRet); /* Transfer converted data of SOC1 */
+
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software triggers SOC1 */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/inc/sample_adc_single_trigger_it.h b/drivers_sample/adc/sample_adc_single_trigger_it/inc/sample_adc_single_trigger_it.h
new file mode 100644
index 000000000..b35681567
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/inc/sample_adc_single_trigger_it.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger_it.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC sampling by software trigger
+ */
+#ifndef SAMPLE_ADC_SINGLETRIGGER_IT_H
+#define SAMPLE_ADC_SINGLETRIGGER_IT_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SingleTriggerIT(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/init/main.c b/drivers_sample/adc/sample_adc_single_trigger_it/init/main.c
new file mode 100644
index 000000000..1e9d6aea3
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_single_trigger_it.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_SingleTriggerIT();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/init/main.h b/drivers_sample/adc/sample_adc_single_trigger_it/init/main.h
new file mode 100644
index 000000000..3386a5210
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC_Int1Finish(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/init/system_init.c b/drivers_sample/adc/sample_adc_single_trigger_it/init/system_init.c
new file mode 100644
index 000000000..447acce0c
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/init/system_init.c
@@ -0,0 +1,140 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC_Int1Finish(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC_Int1Finish */
+ /* USER CODE END ADC_Int1Finish */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA1;
+
+ socParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ socParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ socParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ socParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ socParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ socParam.finishMode = ADC_SOCFINISH_INT1;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM0, &socParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT1, ADC_Int1Finish);
+ IRQ_SetPriority(IRQ_ADC1_INT1, 7); /* Set the priority to level 7 */
+ IRQ_EnableN(IRQ_ADC1_INT1);
+ HAL_ADC_IrqService(&g_adc);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/readme.md b/drivers_sample/adc/sample_adc_single_trigger_it/readme.md
new file mode 100644
index 000000000..fb280a9d8
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/readme.md
@@ -0,0 +1,18 @@
+# 配置ADC的单次采样功能，中断回调中读取结果
+## 关键字: ADC, 单次采样, 中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在单次采样模式下，使用软件触发ADC采样，采样结束后触发ADC中断，并在中断回调函数中读取ADC转换结果。
+
+**【示例配置】**
++ ADC触发源：软件。使用接口"HAL_ADC_SoftTrigSample()”完成软件触发。
+
++ ADC采样源： 挂载到SOC1 外部采样源。SOC的在文件“system_init.c”中配置，SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任何一个。
+
++ ADC采样结果：ADC中断回调函数中读取结果。ADC可以选择4个数据完成中断的任一个，配置请见"System_Init()”。在回调函数中调用“HAL_ADC_GetConvResult()”获取结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会对ADC进行软件触发采样。采样成功后，在中断回调函数中会通过串口打印读取到的ADC采样结果。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
diff --git a/drivers_sample/adc/sample_adc_single_trigger_it/src/sample_adc_single_trigger_it.c b/drivers_sample/adc/sample_adc_single_trigger_it/src/sample_adc_single_trigger_it.c
new file mode 100644
index 000000000..59eb3c1c6
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_trigger_it/src/sample_adc_single_trigger_it.c
@@ -0,0 +1,57 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_trigger_it.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In single sampling mode, the ADC sampling is triggered by software. After the sampling is complete,
+ * the ADC interrupt is triggered and the ADC conversion result is read in the interrupt callback function.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigSample() to configure software tirgger SOC0.
+ * (2) ADC sample source is ADC1_SOC0. Select sample source in "g_adc.baseAddress" of SystemInit(),
+ * "ADC_SOC_NUM0" can be Modified. External input source: GPIO2_2/GPIO2_3
+ * (3) The ADC conversion result is read from interrupt callback function ADC_Int1Finish interface.
+ * If interrupt is not used, after the conversion is complete, use HAL_ADC_GetConvResult() to obtain result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+#include "sample_adc_single_trigger_it.h"
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param adcHandle ADC handle.
+ * @retval None.
+ */
+void ADC_Int1Finish(ADC_Handle *adcHandle)
+{
+ DBG_PRINTF("ADC_Int1Finish\r\n");
+ unsigned int ret = HAL_ADC_GetConvResult(adcHandle, ADC_SOC_NUM0);
+ DBG_PRINTF("result: %d\r\n", ret);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+}
+
+/**
+ * @brief ADC single channel sample with interrupt. Each channel independently generate an interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SingleTriggerIT(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SingleTriggerIT begin\r\n");
+ HAL_ADC_StartIt(&g_adc);
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM0); /* Software trigger ADC sampling */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/inc/sample_adc_single_with_ppb.h b/drivers_sample/adc/sample_adc_single_with_ppb/inc/sample_adc_single_with_ppb.h
new file mode 100644
index 000000000..7d2137584
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/inc/sample_adc_single_with_ppb.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_with_ppb.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In the post-processing example of the ADC, there is the normal trigger sampling function and four
+ * post-processing functions: error calculation, upper threshold detection, lower threshold detection,
+ * and zero-crossing detection.
+ */
+#ifndef SAMPLE_ADC_SINGLE_WITH_PPB_H
+#define SAMPLE_ADC_SINGLE_WITH_PPB_H
+#include "debug.h"
+#include "main.h"
+void ADC_SingleTriggerItWithPPB(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/init/main.c b/drivers_sample/adc/sample_adc_single_with_ppb/init/main.c
new file mode 100644
index 000000000..18ad93d8e
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_adc_single_with_ppb.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ ADC_SingleTriggerItWithPPB();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/init/main.h b/drivers_sample/adc/sample_adc_single_with_ppb/init/main.h
new file mode 100644
index 000000000..c79ba4522
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/init/main.h
@@ -0,0 +1,56 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "adc_ex.h"
+#include "uart.h"
+#include "uart_ex.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADCOversampingCallback(ADC_Handle *handle);
+void ADC_Int1Finish(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/init/system_init.c b/drivers_sample/adc/sample_adc_single_with_ppb/init/system_init.c
new file mode 100644
index 000000000..628749430
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/init/system_init.c
@@ -0,0 +1,144 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG; /* crg address */
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) { /* crg initialization */
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC_Int1Finish(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC0_CALLBACK_INT1 */
+ /* USER CODE END ADC0_CALLBACK_INT1 */
+}
+
+__weak void ADCOversampingCallback(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADCOversampingCallback */
+ /* USER CODE END ADCOversampingCallback */
+}
+
+static void ADC0_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_2);
+
+ g_adc.baseAddress = ADC0;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+
+ HAL_ADC_Init(&g_adc); /* adc initialization */
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA2; /* PIN47(ADC AIN2) */
+ socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */
+ socParam.trigSource = ADC_TRIGSOC_SOFT;
+ socParam.continueMode = BASE_CFG_DISABLE;
+ socParam.finishMode = ADC_SOCFINISH_INT1;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT1, (ADC_CallbackType)ADC_Int1Finish);
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_OVERSAMPLING, (ADC_CallbackType)ADCOversampingCallback);
+
+ IRQ_Register(IRQ_ADC0_INT1, HAL_ADC_IrqHandlerDataB, &g_adc);
+ IRQ_SetPriority(IRQ_ADC0_INT1, 7); /* The priority is 7 */
+ IRQ_EnableN(IRQ_ADC0_INT1);
+ IRQ_Register(IRQ_ADC0_EVENT, HAL_ADC_IrqHandlerAllEvent, &g_adc);
+ IRQ_SetPriority(IRQ_ADC0_EVENT, 6); /* The priority is 6 */
+ IRQ_EnableN(IRQ_ADC0_EVENT);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ g_uart0.baseAddress = UART0; /* uart address */
+ /* UART parameter settings */
+ g_uart0.baudRate = UART0_BAND_RATE; /* uart baud rate */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT; /* uart datalength */
+ g_uart0.stopBits = UART_STOPBITS_ONE; /* uart stop bit */
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0); /* uart initialization */
+}
+
+static void IOConfig(void)
+{
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0;
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1;
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_5_AS_ADC_AIN2); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_5_AS_ADC_AIN2, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_5_AS_ADC_AIN2, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_5_AS_ADC_AIN2, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_5_AS_ADC_AIN2, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ADC0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/readme.md b/drivers_sample/adc/sample_adc_single_with_ppb/readme.md
new file mode 100644
index 000000000..a83d0ef52
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/readme.md
@@ -0,0 +1,20 @@
+# ADC的后处理功能
+## 关键字: ADC, 误差计算，阈值检测
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC的后处理功能，当ADC完成一次普通的采样完成后，对于采样结果进行处理操作。
++ 误差计算功能：设置一个参考值，采样结束后，自动计算出参考值和采样结果的差值，并保存在寄存器中。
++ 阈值检测功能：设置阈值的上下限，当参考值和采样结果的差值大于上阈值或者小于下阈值，会产生中断。
+
+**【示例配置】**
++ ADC触发源：软件触发。使用接口"HAL_ADC_SoftTrigSample()”启动软件触发。示例中一个触发了三次，第一次触发读出普通的采样结果；设置后处理参数，第二次触发进行后处理功能；修改后处理参数，第三次触发再次进行后处理功能。
+
++ ADC采样源：挂载到SOC1部采样源。SOC可以配置为“ADC_SOC_NUM0~ADC_SOC_NUM15”中任意一个。
+
++ ADC采样结果：在过采样的中断中读出过采样的结果。每次触发产生的采样结果均产生一个数据完成中断，在中断回调函数中使用“HAL_ADC_GetConvResult()”进行读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发。第一次触发采样结束后，只打印出ADC的采样结果。后两次触发，按照后处理参数的配置和当前采样结果，触发不同的后处理中断，然后在中断回调函数中打印相应的字符串。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0进行初始化配置。
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_single_with_ppb/src/sample_adc_single_with_ppb.c b/drivers_sample/adc/sample_adc_single_with_ppb/src/sample_adc_single_with_ppb.c
new file mode 100644
index 000000000..da275761f
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_single_with_ppb/src/sample_adc_single_with_ppb.c
@@ -0,0 +1,131 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_single_with_ppb.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In the post-processing example of the ADC, there is the normal trigger sampling function and four
+ * post-processing functions: error calculation, upper threshold detection, lower threshold detection,
+ * and zero-crossing detection.
+ */
+#include "sample_adc_single_with_ppb.h"
+
+void ADC_PPB1Error(void *handle);
+void ADC_PPB1Up(void *handle);
+void ADC_PPB1Down(void *handle);
+void ADC_PPB1Zero(void *handle);
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param handle ADC handle.
+ * @retval None.
+ */
+void ADC_Int1Finish(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("ADC_Int1Finish\r\n");
+ unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1);
+ DBG_PRINTF("result: %d\r\n", ret);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("voltage: %f\r\n", voltage);
+}
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param handle ADC handle.
+ * @retval None.
+ */
+void ADC_PPB1Error(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("ADC_PPB1Error: Calculation error completed, errorRef - result\r\n");
+ int ret = HAL_ADC_GetPPBxErrorResultEx(&g_adc, ADC_PPB_NUM1); /* Obtain the error value */
+ DBG_PRINTF("ErrorResultEx: %d\r\n", ret);
+ unsigned int delay = HAL_ADC_GetPPBxDelayCntEx(&g_adc, ADC_PPB_NUM1);
+ DBG_PRINTF("delay: %d\r\n", delay);
+}
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param handle ADC handle.
+ * @retval None.
+ */
+void ADC_PPB1Up(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("ADC_PPB1Up: The PPB upper threshold overflows\r\n");
+}
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param handle ADC handle.
+ * @retval None.
+ */
+void ADC_PPB1Down(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("ADC_PPB1Down: The PPB down threshold overflows\r\n");
+}
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param handle ADC handle.
+ * @retval None.
+ */
+void ADC_PPB1Zero(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("ADC_PPB1Zero\r\n");
+}
+
+/**
+ * @brief ADC single channel sample with interrupt. Each channel independently generate an interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SingleTriggerItWithPPB(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SingleTriggerItWithPPB begin\r\n");
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_PPB1_ERROR, ADC_PPB1Error);
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_PPB1_UP, ADC_PPB1Up);
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_PPB1_DOWN, ADC_PPB1Down);
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_EVENT_PPB1_ZERO, ADC_PPB1Zero);
+ HAL_ADC_StartIt(&g_adc);
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+
+ BASE_FUNC_DELAY_S(1); /* After the delay is 1s, the PPB is enabled for re-sampling */
+ DBG_PRINTF("\r\nPPB1 Setting offset: -2000; errorRef: 100; threshold: < -10 or > 10\r\n");
+ PPB_Function ppbfun = {0};
+ ppbfun.offset = BASE_CFG_ENABLE; /* Using the Offset Calculation Function */
+ ppbfun.detect = BASE_CFG_ENABLE; /* Use the threshold detection function for offset calculation results */
+ ppbfun.delay = BASE_CFG_ENABLE; /* Enable the sampling delay recording function */
+ HAL_ADC_ConfigurePPBxEx(&g_adc, ADC_SOC_NUM1, ADC_PPB_NUM1, &ppbfun);
+
+ /* Sets -2000 as the offset value. The original result and offset result are summed up */
+ HAL_ADC_SetPPBxOffsetEx(&g_adc, ADC_PPB_NUM1, -2000);
+ /* Set 100 as the error reference value. Error reference value minus offset calculation data */
+ HAL_ADC_SetPPBxErrorRefEx(&g_adc, ADC_PPB_NUM1, 100);
+ /* Setting Comparison Thresholds 10 and -10. Check data that error reference value minus offset calculation data */
+ HAL_ADC_SetPPBxThresholdEx(&g_adc, ADC_PPB_NUM1, 10, -10);
+ HAL_ADC_EnablePPBxEventIntEx(&g_adc);
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+
+ BASE_FUNC_DELAY_S(1); /* After the delay is 1s, the PPB is enabled for re-sampling */
+ DBG_PRINTF("\r\nPPB1 Setting offset: -2000; errorRef: 40; threshold: < -10 or > 10\r\n");
+ HAL_ADC_SetPPBxErrorRefEx(&g_adc, ADC_PPB_NUM1, 40); /* Set 40 as the error reference value */
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1); /* Software trigger ADC sampling */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample/inc/sample_adc_sync_sample.h b/drivers_sample/adc/sample_adc_sync_sample/inc/sample_adc_sync_sample.h
new file mode 100644
index 000000000..3bb03221c
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/inc/sample_adc_sync_sample.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC Dual-Channel synchronous sample.
+ */
+#ifndef SAMPLE_ADC_SYNCSAMPLE_H
+#define SAMPLE_ADC_SYNCSAMPLE_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SyncSample(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample/init/main.c b/drivers_sample/adc/sample_adc_sync_sample/init/main.c
new file mode 100644
index 000000000..2e9d48af3
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_sync_sample.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_SyncSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample/init/main.h b/drivers_sample/adc/sample_adc_sync_sample/init/main.h
new file mode 100644
index 000000000..0289e7961
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample/init/system_init.c b/drivers_sample/adc/sample_adc_sync_sample/init/system_init.c
new file mode 100644
index 000000000..771dace70
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/init/system_init.c
@@ -0,0 +1,137 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_SyncParam syncParam = {0};
+ syncParam.ChannelA = ADC_CH_ADCINA1;
+ syncParam.ChannelB = ADC_CH_ADCINB2;
+ syncParam.group = ADC_SYNCSAMPLE_GROUP_1;
+
+ syncParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ syncParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ syncParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ syncParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ syncParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ syncParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_StartSyncSample(&g_adc, &syncParam);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_23.BIT.func = 0x8; /* 0x8 is ADC1_ANA_B2 */
+ iconfig->iocmg_23.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_23.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_23.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_23.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_23.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample/readme.md b/drivers_sample/adc/sample_adc_sync_sample/readme.md
new file mode 100644
index 000000000..362f110d5
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/readme.md
@@ -0,0 +1,18 @@
+# 单次触发ADC的同步采样功能,主动查询转换完成标志位读取结果
+## 关键字: ADC，同步采样，查询转换完成
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在同步采样模式下，使用软件触发ADC两条通路同步同时采样，触发采样后软件判断ADC转换完成后，如果转换完成则读取结果。
+
+**【示例配置】**
++ ADC触发源：软件。使用接口”HAL_ADC_SoftTrigMultiSample()”完成软件同时触发。同步采样，要求两条采样通路触发源一致。
+
++ ADC采样源： 挂载到SOC0和SOC1的外部采样源。SOC的在文件“system_init.c”中配置，同步采样模式选择的SOC0和SOC1，它们的配置由"SystemInit()”接口中的"ADC_SYNCSAMPLE_GROUP_1"决定，ADC_SYNCSAMPLE_GROUP_1对应的两个SOC为SOC0和SOC1，可以配置为(ADC_SYNCSAMPLE_GROUP_1~8)。
+
++ ADC采样结果：自行判断转换完成后，再读取结果。使用接口“HAL_ADC_CheckSocFinish()”判断是否转换完成，返回值OK表示转换结束，再使用“HAL_ADC_GetConvResult()”接口，分别读取两路采样结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发后，ADC进行单次采样转换。等待5ms后检查ADC采样结是否转换完成，若转换完成串口依次打印出两条通路的采样结果，若采样未完成打印未完成提示字符串。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
diff --git a/drivers_sample/adc/sample_adc_sync_sample/src/sample_adc_sync_sample.c b/drivers_sample/adc/sample_adc_sync_sample/src/sample_adc_sync_sample.c
new file mode 100644
index 000000000..09c441120
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample/src/sample_adc_sync_sample.c
@@ -0,0 +1,63 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In synchronous sampling mode, the ADC uses software to trigger simultaneous sampling of the two ADC
+ * channels. After sampling is triggered, the ADC determines that the ADC conversion is complete and reads
+ * the result ADC Dual-Channel synchronous sample, the trigger sources of the two channels must be the same.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigMultiSample() to configure software tirgger SOC0
+ * and SOC1.
+ * (2) ADC sample source is ADC1_SOC0 and ADC1_SOC1. Select sample source in "g_adc.baseAddress" of
+ * SystemInit(), SOC0 and SOC1 are determined by the ADC_SYNCSAMPLE_GROUP_1 in SystemInit().
+ * (3) The ADC conversion result is read from HAL_ADC_GetConvResult().
+ * After the conversion is complete, use HAL_ADC_GetConvResult() to obtain result.
+ * Check whether the ADC conversion is complete through the HAL_ADC_CheckSocFinish() interface.
+ */
+
+#include "sample_adc_sync_sample.h"
+
+/**
+ * @brief ADC Dual-Channel synchronous sample.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SyncSample(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SyncSample begin\r\n");
+
+ ADC_SoftMultiTrig softTrig = {0};
+ softTrig.BIT.trigSoc0 = BASE_CFG_ENABLE;
+ softTrig.BIT.trigSoc1 = BASE_CFG_ENABLE;
+ HAL_ADC_SoftTrigMultiSample(&g_adc, softTrig); /* Trigger both SOC0 and SOC1 */
+
+ BASE_FUNC_DELAY_MS(5); /* delay 5 ms */
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM0) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("SOC0 did not complete sampling and conversion\r\n");
+ return;
+ }
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM1) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("SOC1 did not complete sampling and conversion\r\n");
+ return;
+ }
+ /* Read sampling results */
+ unsigned ret1 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM0);
+ unsigned ret2 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1);
+ DBG_PRINTF("ret1: %x, ret2: %x\r\n", ret1, ret2);
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/inc/sample_adc_sync_sample_dma.h b/drivers_sample/adc/sample_adc_sync_sample_dma/inc/sample_adc_sync_sample_dma.h
new file mode 100644
index 000000000..1de3c7ec6
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/inc/sample_adc_sync_sample_dma.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample_dma.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC Dual-Channel synchronous sample with dma.
+ */
+#ifndef SAMPLE_ADC_SYNCSAMPLE_DMA_H
+#define SAMPLE_ADC_SYNCSAMPLE_DMA_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SyncSampleWithDma(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.c b/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.c
new file mode 100644
index 000000000..ff3aa96f3
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_sync_sample_dma.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+DMA_Handle g_dmac;
+
+int main(void)
+{
+ ADC_SyncSampleWithDma();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.h b/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.h
new file mode 100644
index 000000000..afd1d3e69
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/init/main.h
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC_SyncIntCallBack(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/init/system_init.c b/drivers_sample/adc/sample_adc_sync_sample_dma/init/system_init.c
new file mode 100644
index 000000000..21a1083a4
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/init/system_init.c
@@ -0,0 +1,180 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel1Init(void *handle)
+{
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC; /* DMA transmission direction */
+ dma_param.srcAddrInc = DMA_ADDR_INCREASE;
+ dma_param.destAddrInc = DMA_ADDR_INCREASE;
+ dma_param.srcPeriph = DMA_REQUEST_ADC1; /* ADC as DMA Request Source */
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ dma_param.srcWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.destWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.srcBurst = DMA_BURST_LENGTH_16;
+ dma_param.destBurst = DMA_BURST_LENGTH_16;
+ dma_param.pHandle = handle;
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ONE); /* Initializing the DMA Channel */
+}
+
+static void DMA_Init(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(&g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac); /* Initializing the DMA controller */
+
+ DMA_Channel1Init((void *)(&g_adc));
+}
+
+__weak void ADC_SyncIntCallBack(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC_SyncIntCallBack */
+ /* USER CODE END ADC_SyncIntCallBack */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ g_adc.dmaHandle = &g_dmac;
+ g_adc.adcDmaChn = 1; /* DMA Channel 1 */
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_DMA, ADC_SyncIntCallBack);
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_SyncParam syncParam = {0};
+ syncParam.ChannelA = ADC_CH_ADCINA1;
+ syncParam.ChannelB = ADC_CH_ADCINB3;
+ syncParam.group = ADC_SYNCSAMPLE_GROUP_3;
+
+ syncParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ syncParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ syncParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ syncParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ syncParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ syncParam.finishMode = ADC_SOCFINISH_DMA;
+ HAL_ADC_StartSyncSample(&g_adc, &syncParam);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_18.BIT.func = 0x8; /* 0x8 is ADC1_ANA_B3 */
+ iconfig->iocmg_18.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_18.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_18.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_18.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_18.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ ADC1_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/readme.md b/drivers_sample/adc/sample_adc_sync_sample_dma/readme.md
new file mode 100644
index 000000000..302614278
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/readme.md
@@ -0,0 +1,18 @@
+# 单次触发ADC的同步采样功能,采样结束使用DMA搬运结果
+## 关键字: ADC，同步采样，DMA搬运
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在同步采样模式下，使用软件触发ADC两条通路同步同时采样，采样结束后触发DMA搬运结果。
+
+**【示例配置】**
++ ADC触发源：软件。使用接口”HAL_ADC_SoftTrigMultiSample()”完成软件同时触发。同步采样，要求两条采样通路触发源一致。
+
++ ADC采样源： 挂载到SOC4和SOC5的外部采样源。SOC的在文件“system_init.c”中配置，同步采样模式选择的SOC4和SOC5，它们的配置由"SystemInit()”接口中的"ADC_SYNCSAMPLE_GROUP_3"决定，ADC_SYNCSAMPLE_GROUP_3对应的两个SOC为SOC4和SOC5，可以配置为(ADC_SYNCSAMPLE_GROUP_1~8)。
+
++ ADC采样结果：DMA完成的回调函数中读取结果。DMA配置请见"SystemInit()”。示例代码中，提前开辟了保存ADC采样结果的内存，DMA搬运结束后，直接从内存读取结果。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会对ADC进行软件触发采样，采样完成触发DMA搬运数据。在完成对ADC采样结果搬运后，会产生中断告知用户，在ADC的DMA完成搬运的中断回调函数中，从预设置的内存中读出DMA的搬运结果，利用串口输出对结果进行打印。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
diff --git a/drivers_sample/adc/sample_adc_sync_sample_dma/src/sample_adc_sync_sample_dma.c b/drivers_sample/adc/sample_adc_sync_sample_dma/src/sample_adc_sync_sample_dma.c
new file mode 100644
index 000000000..3c747efbb
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_dma/src/sample_adc_sync_sample_dma.c
@@ -0,0 +1,62 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample_dma.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC Dual-Channel synchronous sample, the trigger sources of the two channels must be the same.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigMultiSample() to configure software tirgger SOC4
+ * and SOC5.
+ * (2) ADC sample source is ADC1_SOC4 and ADC1_SOC5. Select sample source in "g_adc.baseAddress" of
+* SystemInit(), SOC4 and SOC5 are determined by the ADC_SYNCSAMPLE_GROUP_3 in SystemInit().
+ * (3) The ADC conversion result is read from DMA interrupt callback function ADC_SyncIntCallBack().
+ */
+#include "sample_adc_sync_sample_dma.h"
+static unsigned int g_ret[10] = {0};
+
+/**
+ * @brief User callback function of interrupt.
+ * @param adcHandle ADC handle.
+ * @retval None.
+ */
+void ADC_SyncIntCallBack(ADC_Handle *adcHandle)
+{
+ BASE_FUNC_UNUSED(adcHandle);
+ DBG_PRINTF("ADC_SyncIntCallBack\r\n");
+ unsigned ret1 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM4);
+ unsigned ret2 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM5);
+ /* Compare the DMA transfer result with the result in the register */
+ DBG_PRINTF("ret1: %x, ret2: %x\r\n", ret1, ret2);
+ DBG_PRINTF("g_ret1: %x, g_ret2: %x\r\n", g_ret[0], g_ret[1]);
+}
+
+/**
+ * @brief ADC Dual-Channel synchronous sample with dma.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SyncSampleWithDma(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SyncSampleWithDma begin\r\n");
+ HAL_ADC_StartDma(&g_adc, ADC_SOC_NUM4, ADC_SOC_NUM5, g_ret);
+ ADC_SoftMultiTrig softTrig = {0};
+ softTrig.BIT.trigSoc4 = BASE_CFG_ENABLE; /* Group3 -- Synchronous sample group: SOC4 and SOC5 */
+ softTrig.BIT.trigSoc5 = BASE_CFG_ENABLE;
+ HAL_ADC_SoftTrigMultiSample(&g_adc, softTrig); /* Trigger both SOC4 and SOC5 */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/inc/sample_adc_sync_sample_it.h b/drivers_sample/adc/sample_adc_sync_sample_it/inc/sample_adc_sync_sample_it.h
new file mode 100644
index 000000000..d80612d02
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/inc/sample_adc_sync_sample_it.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample_it.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details This file provides users with sample code to help use ADC function:
+ * ADC Dual-Channel synchronous sample with dma.
+ */
+#ifndef SAMPLE_ADC_SYNCSAMPLE_IT_H
+#define SAMPLE_ADC_SYNCSAMPLE_IT_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void ADC_SyncSampleWithIt(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/init/main.c b/drivers_sample/adc/sample_adc_sync_sample_it/init/main.c
new file mode 100644
index 000000000..29a258f09
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_adc_sync_sample_it.h"
+
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+
+int main(void)
+{
+ ADC_SyncSampleWithIt();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/init/main.h b/drivers_sample/adc/sample_adc_sync_sample_it/init/main.h
new file mode 100644
index 000000000..e9be60344
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "adc.h"
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern ADC_Handle g_adc;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void ADC1Interrupt4Callback(ADC_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/init/system_init.c b/drivers_sample/adc/sample_adc_sync_sample_it/init/system_init.c
new file mode 100644
index 000000000..e62df67d0
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/init/system_init.c
@@ -0,0 +1,142 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void ADC1Interrupt4Callback(ADC_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN ADC1Interrupt4Callback */
+ /* USER CODE END ADC1Interrupt4Callback */
+}
+
+static void ADC1_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(ADC1_BASE, CRG_ADC_CLK_SELECT_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC1_BASE, CRG_ADC_DIV_5);
+
+ g_adc.baseAddress = ADC1;
+ g_adc.socPriority = ADC_PRIMODE_ALL_PRIORITY;
+ g_adc.vrefBuf = ADC_VREF_2P5V;
+ g_adc.irqNumOver = IRQ_ADC1_OVINT;
+ g_adc.ADC_IntxParam[0].irqNum = IRQ_ADC1_INT1; /* interrupt 0 */
+ g_adc.ADC_IntxParam[1].irqNum = IRQ_ADC1_INT2; /* interrupt 1 */
+ g_adc.ADC_IntxParam[2].irqNum = IRQ_ADC1_INT3; /* interrupt 2 */
+ g_adc.ADC_IntxParam[3].irqNum = IRQ_ADC1_INT4; /* interrupt 3 */
+
+ HAL_ADC_Init(&g_adc);
+
+ SOC_SyncParam syncParam = {0};
+ syncParam.ChannelA = ADC_CH_ADCINA1;
+ syncParam.ChannelB = ADC_CH_ADCINB1;
+ syncParam.group = ADC_SYNCSAMPLE_GROUP_3;
+
+ syncParam.sampleHoldTime = 2; /* adc sample holed time 2 adc_clk */
+ syncParam.sampleTotalTime = 127; /* adc sample total time 127 adc_clk */
+ syncParam.softTrigSource = ADC_TRIGSOC_SOFT;
+ syncParam.intTrigSource = ADC_TRIGSOC_NONEINT;
+ syncParam.periphTrigSource = ADC_TRIGSOC_NONEPERIPH;
+ syncParam.finishMode = ADC_SOCFINISH_INT4;
+ HAL_ADC_StartSyncSample(&g_adc, &syncParam);
+
+ HAL_ADC_RegisterCallBack(&g_adc, ADC_CALLBACK_INT4, ADC1Interrupt4Callback);
+ IRQ_SetPriority(IRQ_ADC1_INT4, 1);
+ IRQ_EnableN(IRQ_ADC1_INT4);
+ HAL_ADC_IrqService(&g_adc);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_21.BIT.func = 0x8; /* 0x8 is ADC1_ANA_A1 */
+ iconfig->iocmg_21.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_21.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_21.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_21.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ADC1_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/readme.md b/drivers_sample/adc/sample_adc_sync_sample_it/readme.md
new file mode 100644
index 000000000..82b32cbbc
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/readme.md
@@ -0,0 +1,18 @@
+# 单次触发ADC的同步采样功能,中断回调函数中读取结果
+## 关键字: ADC，同步采样，中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和ADC控制器初始化和功能配置。ADC在同步采样模式下，使用软件触发ADC两条通路同步同时采样，采样结束后触发ADC中断，并在中断回调函数中读取ADC转换结果。
+
+**【示例配置】**
++ ADC触发源：软件。使用接口”HAL_ADC_SoftTrigMultiSample()”完成软件同时触发。同步采样，要求两条采样通路触发源一致。
+
++ ADC采样源： 挂载到SOC4和SOC5的外部采样源。SOC的在文件“system_init.c”中配置，同步采样模式选择的SOC4和SOC5，它们的配置由"SystemInit()”接口中的"ADC_SYNCSAMPLE_GROUP_3"决定，ADC_SYNCSAMPLE_GROUP_3对应的两个SOC为SOC4和SOC5，可以配置为(ADC_SYNCSAMPLE_GROUP_1~8)。
+
++ ADC采样结果：ADC中断回调函数中读取结果。ADC可以选择4个数据完成中断的任一个，配置请见"System_Init()”。在回调函数中调用“HAL_ADC_GetConvResult()”获取结果。同步采样功能中，当两条通路采样完成时，触发中断。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成，软件触发后，ADC进行单次采样转换。两条通路都采样成功后，在中断回调函数中会通过串口打印读取到的ADC采样结果。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
diff --git a/drivers_sample/adc/sample_adc_sync_sample_it/src/sample_adc_sync_sample_it.c b/drivers_sample/adc/sample_adc_sync_sample_it/src/sample_adc_sync_sample_it.c
new file mode 100644
index 000000000..0a7320dba
--- /dev/null
+++ b/drivers_sample/adc/sample_adc_sync_sample_it/src/sample_adc_sync_sample_it.c
@@ -0,0 +1,58 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_adc_sync_sample_it.c
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @details In synchronous sampling mode, software triggers simultaneous sampling of the two ADC channels. After
+ * sampling, an ADC interrupt is triggered and conversion result is read in the interrupt callback function.
+ * (1) ADC strigger source is software. Use HAL_ADC_SoftTrigMultiSample() to configure software tirgger SOC4
+ * and SOC5.
+ * (2) ADC sample source is ADC1_SOC4 and ADC1_SOC5. Select sample source in "g_adc.baseAddress" of
+ * SystemInit(), SOC4 and SOC5 are determined by the ADC_SYNCSAMPLE_GROUP_3 in SystemInit().
+ * (3) The ADC conversion result is read from ADC interrupt callback function ADC1Interrupt4Callback().
+ */
+#include "sample_adc_sync_sample_it.h"
+
+/**
+ * @brief User callback function of ADC interrupt one.
+ * @param adcHandle ADC handle.
+ * @retval None.
+ */
+void ADC1Interrupt4Callback(ADC_Handle *adcHandle)
+{
+ BASE_FUNC_UNUSED(adcHandle);
+ DBG_PRINTF("ADC1Interrupt4Callback\r\n"); /* ADC Synchronous Sampling Complete */
+ unsigned ret1 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM4);
+ unsigned ret2 = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM5);
+ DBG_PRINTF("ret1: %x, ret2: %x\r\n", ret1, ret2);
+}
+
+/**
+ * @brief ADC Dual-Channel synchronous sample with interrupt.
+ * @param None.
+ * @retval None.
+ */
+void ADC_SyncSampleWithIt(void)
+{
+ SystemInit();
+ DBG_PRINTF("ADC_SyncSampleWithIt begin\r\n");
+ ADC_SoftMultiTrig softTrig = {0};
+ softTrig.BIT.trigSoc4 = BASE_CFG_ENABLE; /* Group3 -- Synchronous sample group: SOC4 and SOC5 */
+ softTrig.BIT.trigSoc5 = BASE_CFG_ENABLE;
+ HAL_ADC_SoftTrigMultiSample(&g_adc, softTrig); /* Trigger both SOC4 and SOC5 */
+}
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/inc/sample_apt_single_resistor.h b/drivers_sample/apt/sample_apt_single_resistor/inc/sample_apt_single_resistor.h
new file mode 100644
index 000000000..6ec216fa1
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/inc/sample_apt_single_resistor.h
@@ -0,0 +1,45 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file apt_hal_sample.h
+ * @author MCU Driver Team
+ * @brief Header file containing functions prototypes of APT module HAL sample.
+ */
+
+#ifndef McuMagicTag_APT_HAL_SAMPLE_H
+#define McuMagicTag_APT_HAL_SAMPLE_H
+
+#include "apt_ip.h"
+#include "interrupt.h"
+
+/**
+ * @brief ADC current sample mode.
+ */
+typedef enum {
+ ADC_SINGLE_RESISTOR = 0x00000000U,
+ ADC_THREE_RESISTORS = 0x00000001U,
+} ADC_SampleMode;
+
+void APT_PWMInitHALSample(void);
+void APT_SetPWMDutyU(unsigned int duty);
+void APT_SetPWMDutyV(unsigned int duty);
+void APT_SetPWMDutyW(unsigned int duty);
+void APT_SetADCTrgTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB, ADC_SampleMode mode);
+void APT_PhaseOut(bool enable);
+void APT_RunAllPwm(void);
+void APT_StopAllPwm(void);
+#endif /* McuMagicTag_APT_HAL_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/init/main.c b/drivers_sample/apt/sample_apt_single_resistor/init/main.c
new file mode 100644
index 000000000..528c579f0
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/init/main.c
@@ -0,0 +1,57 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_apt_single_resistor.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+UART_Handle g_uart0Handle;
+APT_Handle g_hAptU;
+APT_Handle g_hAptV;
+APT_Handle g_hAptW;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ APT_PWMInitHALSample();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/init/main.h b/drivers_sample/apt/sample_apt_single_resistor/init/main.h
new file mode 100644
index 000000000..2c9109f5c
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/init/main.h
@@ -0,0 +1,61 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "apt.h"
+#include "uart.h"
+#include "uart_ex.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0Handle;
+extern APT_Handle g_hAptU;
+extern APT_Handle g_hAptV;
+extern APT_Handle g_hAptW;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void AptUTimerCallback(void *aptHandle);
+void AptUEventCallback(void *aptHandle);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/init/system_init.c b/drivers_sample/apt/sample_apt_single_resistor/init/system_init.c
new file mode 100644
index 000000000..82dff9d90
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/init/system_init.c
@@ -0,0 +1,310 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void AptUEventCallback(void *aptHandle)
+{
+ BASE_FUNC_UNUSED(aptHandle);
+ /* USER CODE BEGIN APT0_EVENT_INTERRUPT */
+ /* USER CODE END APT0_EVENT_INTERRUPT */
+}
+
+__weak void AptUTimerCallback(void *aptHandle)
+{
+ BASE_FUNC_UNUSED(aptHandle);
+ /* USER CODE BEGIN APT0_TIMER_INTERRUPT */
+ /* USER CODE END APT0_TIMER_INTERRUPT */
+}
+
+static void APT0_ProtectInit(void)
+{
+ APT_OutCtrlProtectEx protectApt = {0};
+ protectApt.ocEventEnEx = BASE_CFG_ENABLE;
+ protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT;
+ protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocEvtInterruptEnEx = BASE_CFG_ENABLE;
+ protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM;
+ protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0;
+ protectApt.filterCycleNumEx = 0;
+ HAL_APT_ProtectInitEx(&g_hAptU, &protectApt);
+}
+
+static void APT0_Init(void)
+{
+ HAL_CRG_IpEnableSet(APT0_BASE, IP_CLK_ENABLE);
+
+ g_hAptU.baseAddress = APT0;
+
+ /* Clock Settings */
+ g_hAptU.waveform.dividerFactor = 1 - 1;
+ /* Timer Settings */
+ g_hAptU.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */
+ g_hAptU.waveform.cntMode = APT_COUNT_MODE_UP_DOWN;
+
+ /* Wave Form */
+ g_hAptU.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH;
+ g_hAptU.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptU.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptU.waveform.divInitVal = 0;
+ g_hAptU.waveform.cntInitVal = 0;
+ g_hAptU.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */
+ g_hAptU.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */
+ g_hAptU.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptU.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+ g_hAptU.waveform.deadBandCnt = 10; /* 10 is dead-band value */
+
+ /* ADC Trigger SOCA */
+ g_hAptU.adcTrg.trgEnSOCA = BASE_CFG_ENABLE;
+ g_hAptU.adcTrg.cntCmpSOCA = 1; /* 1 is count compare point of ADC trigger source SOCA when using CMPA */
+ g_hAptU.adcTrg.trgSrcSOCA = APT_CS_SRC_CNTR_CMPA_UP;
+ g_hAptU.adcTrg.trgScaleSOCA = 1;
+
+ /* ADC Trigger SOCB */
+ g_hAptU.adcTrg.trgEnSOCB = BASE_CFG_ENABLE;
+ g_hAptU.adcTrg.cntCmpSOCB = 1;
+ g_hAptU.adcTrg.trgSrcSOCB = APT_CS_SRC_CNTR_CMPB_UP;
+ g_hAptU.adcTrg.trgScaleSOCB = 1;
+
+ g_hAptU.adcTrg.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptU.adcTrg.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+
+ /* Timer Trigger */
+ g_hAptU.tmrInterrupt.tmrInterruptEn = BASE_CFG_ENABLE;
+ g_hAptU.tmrInterrupt.tmrInterruptSrc = APT_INT_SRC_CNTR_ZERO_PERIOD;
+ g_hAptU.tmrInterrupt.tmrInterruptScale = 1;
+
+ APT0_ProtectInit();
+
+ HAL_APT_PWMInit(&g_hAptU);
+ HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback);
+ IRQ_SetPriority(IRQ_APT0_EVT, 1); /* 1 is priority value */
+ IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU);
+ IRQ_EnableN(IRQ_APT0_EVT);
+ HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback);
+ IRQ_SetPriority(IRQ_APT0_TMR, 1); /* 1 is priority value */
+ IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU);
+ IRQ_EnableN(IRQ_APT0_TMR);
+}
+
+static void APT1_ProtectInit(void)
+{
+ APT_OutCtrlProtectEx protectApt = {0};
+ protectApt.ocEventEnEx = BASE_CFG_ENABLE;
+ protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT;
+ protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE;
+ protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM;
+ protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0;
+ protectApt.filterCycleNumEx = 0;
+ HAL_APT_ProtectInitEx(&g_hAptV, &protectApt);
+}
+
+static void APT1_Init(void)
+{
+ HAL_CRG_IpEnableSet(APT1_BASE, IP_CLK_ENABLE);
+
+ g_hAptV.baseAddress = APT1;
+
+ /* Clock Settings */
+ g_hAptV.waveform.dividerFactor = 1 - 1;
+ /* Timer Settings */
+ g_hAptV.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */
+ g_hAptV.waveform.cntMode = APT_COUNT_MODE_UP_DOWN;
+
+ /* Wave Form */
+ g_hAptV.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH;
+ g_hAptV.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptV.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptV.waveform.divInitVal = 0;
+ g_hAptV.waveform.cntInitVal = 0;
+ g_hAptV.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */
+ g_hAptV.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */
+ g_hAptV.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptV.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+ g_hAptV.waveform.deadBandCnt = 10; /* 10 is dead-band value */
+
+ APT1_ProtectInit();
+
+ HAL_APT_PWMInit(&g_hAptV);
+}
+
+static void APT2_ProtectInit(void)
+{
+ APT_OutCtrlProtectEx protectApt = {0};
+ protectApt.ocEventEnEx = BASE_CFG_ENABLE;
+ protectApt.ocEventModeEx = APT_OUT_CTRL_ONE_SHOT;
+ protectApt.ocActionEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocActionBEx = APT_OUT_CTRL_ACTION_LOW;
+ protectApt.ocEvtInterruptEnEx = BASE_CFG_DISABLE;
+ protectApt.ocSysEvent = APT_SYS_EVT_DEBUG | APT_SYS_EVT_CLK | APT_SYS_EVT_MEM;
+ protectApt.originalEvtEx = APT_EM_ORIGINAL_SRC_POE0;
+ protectApt.filterCycleNumEx = 0;
+ HAL_APT_ProtectInitEx(&g_hAptW, &protectApt);
+}
+
+static void APT2_Init(void)
+{
+ HAL_CRG_IpEnableSet(APT2_BASE, IP_CLK_ENABLE);
+
+ g_hAptW.baseAddress = APT2;
+
+ /* Clock Settings */
+ g_hAptW.waveform.dividerFactor = 1 - 1;
+ /* Timer Settings */
+ g_hAptW.waveform.timerPeriod = 20000; /* 20000 is count period of APT time-base timer */
+ g_hAptW.waveform.cntMode = APT_COUNT_MODE_UP_DOWN;
+
+ /* Wave Form */
+ g_hAptW.waveform.basicType = APT_PWM_BASIC_A_LOW_B_HIGH;
+ g_hAptW.waveform.chAOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptW.waveform.chBOutType = APT_PWM_OUT_BASIC_TYPE;
+ g_hAptW.waveform.divInitVal = 0;
+ g_hAptW.waveform.cntInitVal = 0;
+ g_hAptW.waveform.cntCmpLeftEdge = 1; /* 1 is count compare point of the left edge of PWM waveform */
+ g_hAptW.waveform.cntCmpRightEdge = 19999; /* 19999 is count compare point of the right edge of PWM waveform */
+ g_hAptW.waveform.cntCmpLoadMode = APT_BUFFER_INDEPENDENT_LOAD;
+ g_hAptW.waveform.cntCmpLoadEvt = APT_COMPARE_LOAD_EVENT_ZERO;
+ g_hAptW.waveform.deadBandCnt = 10; /* 10 is dead-band value */
+
+ APT2_ProtectInit();
+
+ HAL_APT_PWMInit(&g_hAptW);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0Handle.baseAddress = UART0;
+
+ g_uart0Handle.baudRate = UART0_BAND_RATE;
+ g_uart0Handle.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0Handle.stopBits = UART_STOPBITS_ONE;
+ g_uart0Handle.parity = UART_PARITY_NONE;
+ g_uart0Handle.txMode = UART_MODE_BLOCKING;
+ g_uart0Handle.rxMode = UART_MODE_BLOCKING;
+ g_uart0Handle.fifoMode = BASE_CFG_ENABLE;
+ g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0Handle);
+}
+
+static void IOConfig(void)
+{
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode = 0;
+ SYSCTRL0->SC_SYS_STAT.BIT.update_mode_clear = 1;
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN19 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO3_0_AS_APT0_PWMA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO3_0_AS_APT0_PWMA, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO3_0_AS_APT0_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO3_0_AS_APT0_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO3_0_AS_APT0_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN23 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_0_AS_APT0_PWMB); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_0_AS_APT0_PWMB, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_0_AS_APT0_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_0_AS_APT0_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_0_AS_APT0_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN21 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO3_2_AS_APT2_PWMA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO3_2_AS_APT2_PWMA, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO3_2_AS_APT2_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO3_2_AS_APT2_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO3_2_AS_APT2_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN25 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_2_AS_APT2_PWMB); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_2_AS_APT2_PWMB, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_2_AS_APT2_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_2_AS_APT2_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_2_AS_APT2_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN20 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO3_1_AS_APT1_PWMA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO3_1_AS_APT1_PWMA, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO3_1_AS_APT1_PWMA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO3_1_AS_APT1_PWMA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO3_1_AS_APT1_PWMA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN24 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_1_AS_APT1_PWMB); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_1_AS_APT1_PWMB, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_1_AS_APT1_PWMB, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_1_AS_APT1_PWMB, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_1_AS_APT1_PWMB, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN1 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_7_AS_POE0); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_7_AS_POE0, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_7_AS_POE0, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_7_AS_POE0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_7_AS_POE0, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ APT0_Init();
+ APT1_Init();
+ APT2_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/readme.md b/drivers_sample/apt/sample_apt_single_resistor/readme.md
new file mode 100644
index 000000000..3d4224711
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/readme.md
@@ -0,0 +1,29 @@
+# 高级脉宽调制PWM-单电阻采样电机控制
+## 关键字: 互补PWM波, 电机控制, 单电阻采样
+
+**【功能描述】**
++ 该示例为单电阻采样的电机控制样例，输出U,V和W相的带死区的互补PWM波。
+
++ 在U相配置有触发ADC采样的SOC信号。
+
+**【示例配置】**
++ 通过配置APT0，APT1和APT2来配置U，V，W相的互补PWM波。APT0、APT1、APT2的配置分别对应U、V、W相的互补PWM波。
+
++ PWM输出保护，三相PWM输出都配置了保护时间，分别为指定管脚拉高保护，调试模式保护，时钟错误保护，内存泄漏保护。
+
++ 以上配置可通过APT配置界面进行更改，或在“system_init.c”中更改APT对应的配置。
+
+**【示例效果】**
++ 若保护事件来临，APT模块会停止PWM波的输出，保护电机等硬件设备。
+
+**【注意事项】**
++ 占空比可通过“HAL_APT_SetPWMDutyByNumber”进行更改。
+
++ 分频器的分频系数的范围为 0到4095，计数器的计数周期值的范围为 0到65535。死区延时计数值范围 0到65535。
+
++ PWM 波的频率:
+```c
+①递增/递减计时模式，PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值+1));
+②先增后减计时模式，PWM 波的频率 = 工作时钟频率 / ((分频器的分频系数+1)*(计数器的计数周期值*2))。
+```
++ 死区的宽度：插入死区的宽度 = 工作时钟周期 * 死区延时计数值。
\ No newline at end of file
diff --git a/drivers_sample/apt/sample_apt_single_resistor/src/sample_apt_single_resistor.c b/drivers_sample/apt/sample_apt_single_resistor/src/sample_apt_single_resistor.c
new file mode 100644
index 000000000..5b8d57a25
--- /dev/null
+++ b/drivers_sample/apt/sample_apt_single_resistor/src/sample_apt_single_resistor.c
@@ -0,0 +1,244 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_apt_single_resistor.c
+ * @author MCU Driver Team
+ * @brief APT module sample of HAL API.
+ * This file provides some configuration example of APT module HAL API.
+ * + PWM waveform configuration and ADC trigger time configuration sample.
+ * + Output control protection configuration sample.
+ * + Interrupt callback function and user registration function sample.
+ * + APT module synchronization sample.
+ */
+
+#include "sample_apt_single_resistor.h"
+#include "apt.h"
+#include "debug.h"
+#include "crg.h"
+#include "gpio.h"
+#include "main.h"
+#include "debug.h"
+
+/**
+ * APTx module base definition of three phases.
+ */
+#define APT_U APT0 /* Base address of U phase APT module */
+#define APT_V APT1 /* Base address of V phase APT module */
+#define APT_W APT2 /* Base address of W phase APT module */
+
+/**
+ * APT module run control definition.
+ */
+#define APT_RUN_U RUN_APT0
+#define APT_RUN_V RUN_APT1
+#define APT_RUN_W RUN_APT2
+
+/**
+ * APT interrupt number definition of three phases.
+ * IGBT - APT2, APT3, APT4 (U, V, W phase)
+ * IPM - APT5, APT6, ATP7 (U, V, W phase)
+ */
+#define APT_U_EVT_IRQ IRQ_APT0_EVT
+#define APT_U_TMR_IRQ IRQ_APT0_TMR
+#define APT_V_EVT_IRQ IRQ_APT1_EVT
+#define APT_V_TMR_IRQ IRQ_APT1_TMR
+#define APT_W_EVT_IRQ IRQ_APT2_EVT
+#define APT_W_TMR_IRQ IRQ_APT2_TMR
+
+/* APT module interrupt priority. */
+#define EVT_INTERRUPT_PRIORITY 7
+#define TMR_INTERRUPT_PRIORITY 6
+
+/* Use sync-out pulse from APT_U as the sync-in source for slave APT module. */
+#define APT_SYNC_IN_SRC APT_SYNCIN_SRC_APT0_SYNCOUT
+
+/* Some configuration values of APT modules. */
+/* You can also use HAL_CRG_GetIpFreq(APT_U) to get the CPU clock frequency (In units of Hz). */
+#define APT_CLK_FREQ HAL_CRG_GetIpFreq((void *)APT_U)
+#define APT_PWM_FREQ 5000U /* Set PWM frequency to 5000Hz. */
+#define APT_TIMER_PERIOD (APT_CLK_FREQ / (APT_PWM_FREQ * 2)) /* Period value when using APT_COUNT_MODE_UP_DOWN. */
+#define APT_DIVIDER_FACTOR 1U /* The APT clock is not divided. */
+#define DB_CNT_PER_US (APT_CLK_FREQ / 1000000) /* Dead-Band delay counter period when Dead-Band time is 1us */
+#define DB_US 3U /* Dead-Band time, in units of us */
+
+
+/**
+ * @brief Timer interrupt callback function of U phase APT module.
+ * @param aptHandle APT module handle.
+ * @retval None.
+ */
+void AptUTimerCallback(void *aptHandle)
+{
+ APT_Handle *handle = (APT_Handle *)aptHandle;
+ /* read counter direction */
+ if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_DOWN) {
+ DBG_PRINTF("Count Down\r\n");
+ } else if (DCL_APT_GetCounterDirection(handle->baseAddress) == APT_COUNTER_STATUS_COUNT_UP) {
+ DBG_PRINTF("Count Up\r\n");
+ }
+}
+
+/**
+ * @brief Event interrupt callback function of U phase APT module.
+ * @param aptHandle APT module handle.
+ * @retval None.
+ */
+void AptUEventCallback(void *aptHandle)
+{
+ BASE_FUNC_UNUSED(aptHandle);
+}
+
+/**
+ * @brief Interrupt initialization of U phase APT.
+ * @retval None.
+ */
+static void InterruptInitAptU(void)
+{
+ /* Timer interrupt and event interrupt of U phase APT module. */
+ IRQ_SetPriority(APT_U_EVT_IRQ, EVT_INTERRUPT_PRIORITY);
+ IRQ_SetPriority(APT_U_TMR_IRQ, TMR_INTERRUPT_PRIORITY);
+ IRQ_Register(IRQ_APT0_EVT, HAL_APT_EventIrqHandler, &g_hAptU);
+ IRQ_Register(IRQ_APT0_TMR, HAL_APT_TimerIrqHandler, &g_hAptU);
+ IRQ_EnableN(APT_U_EVT_IRQ);
+ IRQ_EnableN(APT_U_TMR_IRQ);
+ HAL_APT_RegisterCallBack(&g_hAptU, APT_EVENT_INTERRUPT, AptUEventCallback);
+ HAL_APT_RegisterCallBack(&g_hAptU, APT_TIMER_INTERRUPT, AptUTimerCallback);
+}
+
+/**
+ * @brief APT Synchronize initialize.
+ * @retval None.
+ */
+static void APT_SyncMasterInit(APT_Handle *aptHandle)
+{
+ HAL_APT_MasterSyncInit(aptHandle, APT_SYNC_OUT_ON_CNTR_ZERO);
+}
+
+
+static void APT_SyncSlaveInit(APT_Handle *aptHandle)
+{
+ APT_SlaveSyncIn aptSlave;
+ aptSlave.divPhase = 0; /* divide phase value */
+ aptSlave.cntPhase = 0; /* counter phase value */
+ aptSlave.syncCntMode = APT_COUNT_MODE_AFTER_SYNC_UP;
+ aptSlave.syncInSrc = APT_SYNC_IN_SRC; /* sync source selection */
+ aptSlave.cntrSyncSrc = APT_CNTR_SYNC_SRC_SYNCIN;
+ HAL_APT_SlaveSyncInit(aptHandle, &aptSlave);
+}
+
+/**
+ * @brief Initialize and start the APT modules of U, V, W phases.
+ * @param mode: ADC sampling mode.
+ * @retval None.
+ */
+void APT_PWMInitHALSample(void)
+{
+ /* Initialize GPIO pin for timer interrupt test. */
+ SystemInit();
+ IRQ_Enable();
+ InterruptInitAptU();
+ /* Initial APT module synchronization. */
+ APT_SyncMasterInit(&g_hAptU);
+ APT_SyncSlaveInit(&g_hAptV);
+ APT_SyncSlaveInit(&g_hAptW);
+
+ /* Start APT module of U, V, W phases. */
+ HAL_APT_StartModule(APT_RUN_U | APT_RUN_V | APT_RUN_W);
+}
+
+/**
+ * @brief Modify the duty ratio of PWM waveform for U phase APT.
+ * @param duty Duty of PWM waveform.
+ * @retval None.
+ */
+void APT_SetPWMDutyU(unsigned int duty)
+{
+ HAL_APT_SetPWMDutyByNumber(&g_hAptU, duty);
+}
+
+/**
+ * @brief Modify the duty ratio of PWM waveform for V phase APT.
+ * @param duty Duty of PWM waveform.
+ * @retval None.
+ */
+void APT_SetPWMDutyV(unsigned int duty)
+{
+ HAL_APT_SetPWMDutyByNumber(&g_hAptV, duty);
+}
+
+/**
+ * @brief Modify the duty ratio of PWM waveform for W phase APT.
+ * @param duty Duty of PWM waveform.
+ * @retval None.
+ */
+void APT_SetPWMDutyW(unsigned int duty)
+{
+ HAL_APT_SetPWMDutyByNumber(&g_hAptW, duty);
+}
+
+/**
+ * @brief Modify the ADC trigger time of master APT module (U phase).
+ * @param cntCmpSOCA Count compare value of SOCA.
+ * @param cntCmpSOCB Counnt compare value of SOCB.
+ * @retval None.
+ */
+void APT_SetADCTrgTime(unsigned short cntCmpSOCA, unsigned short cntCmpSOCB, ADC_SampleMode mode)
+{
+ /* AptU use CMPA and CMPB as the trigger source of SOCA and SOCB. */
+ /* SOCA is used to trigger 1st ADC sampling when using single resistor sampling. */
+ /* SOCB is used to trigger 2nd ADC sampling when using single resistor sampling. */
+ if (mode == ADC_SINGLE_RESISTOR) {
+ HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB);
+ } else {
+ HAL_APT_SetADCTriggerTime(&g_hAptU, cntCmpSOCA, cntCmpSOCB);
+ HAL_APT_SetADCTriggerTime(&g_hAptV, cntCmpSOCA, cntCmpSOCB);
+ HAL_APT_SetADCTriggerTime(&g_hAptW, cntCmpSOCA, cntCmpSOCB);
+ }
+}
+
+/**
+ * @brief PWM waveform output control.
+ * @param enable pwm waveform output enable.
+ * @retval None.
+ */
+void APT_PhaseOut(bool enable)
+{
+ if (enable == true) {
+ /* Enable PWM U waveform output. */
+ DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A);
+ DCL_APT_DisableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B);
+ /* Enable PWM V waveform output. */
+ DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A);
+ DCL_APT_DisableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B);
+ /* Enable PWM W waveform output. */
+ DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A);
+ DCL_APT_DisableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B);
+ } else {
+ /* Disable PWM U waveform output. */
+ DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_A);
+ DCL_APT_EnableSwContPWMAction(APT_U, APT_PWM_CHANNEL_B);
+ DCL_APT_ForcePWMOutputLow(APT_U);
+ /* Disable PWM V waveform output. */
+ DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_A);
+ DCL_APT_EnableSwContPWMAction(APT_V, APT_PWM_CHANNEL_B);
+ DCL_APT_ForcePWMOutputLow(APT_V);
+ /* Disable PWM W waveform output. */
+ DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_A);
+ DCL_APT_EnableSwContPWMAction(APT_W, APT_PWM_CHANNEL_B);
+ DCL_APT_ForcePWMOutputLow(APT_W);
+ }
+}
diff --git a/drivers_sample/can/sample_can_send_receive/inc/sample_can_send_receive.h b/drivers_sample/can/sample_can_send_receive/inc/sample_can_send_receive.h
new file mode 100644
index 000000000..378ee15a0
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/inc/sample_can_send_receive.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_can_send_receive.h
+ * @author MCU Driver Team
+ * @brief can sample module.
+ * @details This file provides sample code for users to help use
+ * the filtering function of the CAN.
+ */
+
+#ifndef SAMPLE_CAN_SEND_RECEIVE_H
+#define SAMPLE_CAN_SEND_RECEIVE_H
+
+#include "main.h"
+
+int CAN_ReceiveFilter(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/can/sample_can_send_receive/init/main.c b/drivers_sample/can/sample_can_send_receive/init/main.c
new file mode 100644
index 000000000..08142ef2d
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/init/main.c
@@ -0,0 +1,49 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_can_send_receive.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+CAN_Handle g_can;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CAN_ReceiveFilter();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/can/sample_can_send_receive/init/main.h b/drivers_sample/can/sample_can_send_receive/init/main.h
new file mode 100644
index 000000000..ae1c13877
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/init/main.h
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "can.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern CAN_Handle g_can;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+
+void CAN_ReadFinish(void *handle);
+void CAN_WriteFinish(void *handle);
+void CAN_Transmit_Error(void *handle);
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/can/sample_can_send_receive/init/system_init.c b/drivers_sample/can/sample_can_send_receive/init/system_init.c
new file mode 100644
index 000000000..d4409cb62
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/init/system_init.c
@@ -0,0 +1,140 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void CAN_ReadFinish(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CAN_READ_FINISH */
+ /* USER CODE END CAN_READ_FINISH */
+}
+
+__weak void CAN_WriteFinish(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CAN_WRITE_FINISH */
+ /* USER CODE END CAN_WRITE_FINISH */
+}
+
+__weak void CAN_Transmit_Error(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CAN_TRANSMIT_ERROR */
+ /* USER CODE END CAN_TRANSMIT_ERROR */
+}
+
+static void CAN_Init(void)
+{
+ HAL_CRG_IpEnableSet(CAN_BASE, IP_CLK_ENABLE);
+
+ g_can.baseAddress = CAN;
+
+ g_can.typeMode = CAN_MODE_NORMAL;
+ g_can.seg1Phase = CAN_SEG1_6TQ;
+ g_can.seg2Phase = CAN_SEG2_3TQ;
+ g_can.sjw = CAN_SJW_2TQ;
+ g_can.prescalser = 25; /* 25 is frequency division coefficient */
+ g_can.rxFIFODepth = 3; /* A maximum of 3 packet objects are in RX FIFO */
+ g_can.autoRetrans = BASE_CFG_ENABLE;
+ HAL_CAN_Init(&g_can);
+ HAL_CAN_RegisterCallBack(&g_can, CAN_READ_FINISH, CAN_ReadFinish);
+ HAL_CAN_RegisterCallBack(&g_can, CAN_WRITE_FINISH, CAN_WriteFinish);
+ HAL_CAN_RegisterCallBack(&g_can, CAN_TRNS_ERROR, CAN_Transmit_Error);
+ IRQ_Register(IRQ_CAN, HAL_CAN_IrqHandler, &g_can);
+ IRQ_SetPriority(IRQ_CAN, 1);
+ IRQ_EnableN(IRQ_CAN);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO3_5_AS_CAN_TX); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO3_5_AS_CAN_TX, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO3_5_AS_CAN_TX, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO3_5_AS_CAN_TX, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO3_5_AS_CAN_TX, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ CAN_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/can/sample_can_send_receive/readme.md b/drivers_sample/can/sample_can_send_receive/readme.md
new file mode 100644
index 000000000..0d8394784
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/readme.md
@@ -0,0 +1,26 @@
+# 控制局域网-发送扩展数据帧和接收符合过滤规则的扩展帧数据
+## 关键字: CAN, 总线
+
+**【功能描述】**
++ CAN向总线发送扩展帧数据，并从总线上接收符合过滤规则的扩展帧数据。
+
++ CAN模块数据的发送和接收采用的都是中断形式。
+
+**【示例配置】**
++ 初始化CAN：通过g_can.typeMode配置CAN的工作模式，配置CAN的传输波特率，接收FIFO的深度以及否开启自动重传。这些配置可以通过CAN的配置界面进行更改。默认配置参数可以通过CAN的配置界面或“system_init.c”文件中的进行查看。
+
++ 发送数据帧g_sendFrame：分配发送数据帧的类型为扩展帧，指定发送帧的ID，填入需要发送的数据和长度，调用“HAL_CAN_Write”函数进行数据的发送。发送成功之后会调用回调函数“Can_WriteFinish”，此回调函数可以通过“HAL_CAN_RegisterCallBack”进行注册。
+
++ 接收数据帧g_receiveFrame: 存储接收到的数据，会存入接收到的帧类型，帧ID，帧数据域。
+
++ 过滤条件rxFilter：配置过滤的帧类型和过滤ID和过滤掩码。并通过“HAL_CAN_ReadIT”使过滤规则生效，接收成功之后，会调用接收成功回调函数“Can_ReadFinish”，此回调函数也可以通过“HAL_CAN_RegisterCallBack”进行注册。
+
+**【示例效果】**
++ 编译烧录此示例，此示例会向总线发送ID为0x1314的扩展数据帧，数据内容为字符‘0’。接收总线上ID为0x1X14的扩展帧（X代表任意0-F的数字)。
+
++ 串口0打印提示信息：CAN发送给总线的数据和接收到总线的数据。
+
+**【注意事项】**
++ 发送给总线的数据帧为扩展帧类型，且满足过滤条件，才会被接收，其他数据默认会被总线丢弃。
+
++ 此示例默认开启自动重发，数据发送失败，会重新发送。若不想重发，需在配置中关闭“Auto Retransmission”项，或在“system_init.c”中关闭“g_can.autoRetrans”配置项。
\ No newline at end of file
diff --git a/drivers_sample/can/sample_can_send_receive/src/sample_can_send_receive.c b/drivers_sample/can/sample_can_send_receive/src/sample_can_send_receive.c
new file mode 100644
index 000000000..2ecbb6b9a
--- /dev/null
+++ b/drivers_sample/can/sample_can_send_receive/src/sample_can_send_receive.c
@@ -0,0 +1,123 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_can_send_receive.c
+ * @author MCU Driver Team
+ * @brief can sample module.
+ * @details This file provides sample code for users to help use
+ * the filtering function of the CAN.
+ */
+#include "sample_can_send_receive.h"
+#include "main.h"
+#include "debug.h"
+
+/**
+ * @brief User-defined read completion callback function.
+ * @param UART_Handle UART handle.
+ * @retval None.
+ */
+void CAN_ReadFinish(void *handle)
+{
+ CAN_Handle *canHandle = (CAN_Handle *)handle;
+ DBG_PRINTF("CAN Read Finish\r\n");
+ DBG_PRINTF("data[0]: %d \r\n", canHandle->rxFrame->frame[0]); /* frame[0] data */
+ DBG_PRINTF("data[1]: %d \r\n", canHandle->rxFrame->frame[1]); /* frame[1] data */
+ DBG_PRINTF("data[2]: %d \r\n", canHandle->rxFrame->frame[2]); /* frame[2] data */
+ DBG_PRINTF("data[3]: %d \r\n", canHandle->rxFrame->frame[3]); /* frame[3] data */
+ DBG_PRINTF("data[4]: %d \r\n", canHandle->rxFrame->frame[4]); /* frame[4] data */
+ DBG_PRINTF("data[5]: %d \r\n", canHandle->rxFrame->frame[5]); /* frame[5] data */
+ DBG_PRINTF("data[6]: %d \r\n", canHandle->rxFrame->frame[6]); /* frame[6] data */
+ DBG_PRINTF("data[7]: %d \r\n", canHandle->rxFrame->frame[7]); /* frame[7] data */
+ DBG_PRINTF("ID: 0x%x \r\n", canHandle->rxFrame->CANId);
+ DBG_PRINTF("len: %d \r\n", canHandle->rxFrame->dataLength);
+ DBG_PRINTF("type: %d \r\n", canHandle->rxFrame->type);
+ BASE_FUNC_UNUSED(canHandle);
+ return;
+}
+
+/**
+ * @brief User-defined write completion callback function.
+ * @param CAN_Handle CAN handle.
+ * @retval None.
+ */
+void CAN_WriteFinish(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("CAN Write Finish\r\n");
+ return;
+}
+/**
+ * Sample Note:
+ * baund rate : 100k Bit/s
+ * To-be-received data frame : Extended Data Frame, ID = 0x1314
+ *
+ * There are two filtering methods:
+ * 1. Receive only the specified ID:
+ * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA;
+ * rxFilter.filterID = 0x1314;
+ * rxFilter.filterMask = 0xFFFFFFFF;
+ *
+ * 2. Use mask to receive:
+ * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA;
+ * rxFilter.filterID = 0x131_;
+ * rxFilter.filterMask = 0xFFFFFFF0;
+ *
+ * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA;
+ * rxFilter.filterID = 0x13_4;
+ * rxFilter.filterMask = 0xFFFFFF0F;
+ *
+ * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA;
+ * rxFilter.filterID = 0x1_14;
+ * rxFilter.filterMask = 0xFFFFF0FF;
+ *
+ * rxFilter.receiveType = CAN_FilterFrame_EXT_DATA;
+ * rxFilter.filterID = 0x_314;
+ * rxFilter.filterMask = 0xFFFF0FFF;
+ *
+ * The value of the ID mask bit, which is not used for filtering.
+ *
+ * Do not filter by ID:
+ * rxFilter.filterMask = 0x00000000;
+ *
+ * Both standard frames and extended frames can be received:
+ * rxFilter.receiveType = CAN_FilterFrame_STD_EXT_DATA;
+ */
+/**
+ * @brief CAN sample code for configuring the filtering function and can send and receive packets.
+ * @param None.
+ * @retval None.
+ */
+CANFrame g_sendFrame;
+CANFrame g_receiveFrame;
+int CAN_ReceiveFilter(void)
+{
+ SystemInit();
+ DBG_PRINTF("CAN Init \r\n");
+ CAN_FilterConfigure rxFilter;
+ g_can.rxFrame = &g_receiveFrame; /* Address for storing received frame data */
+ DBG_PRINTF("CAN interrupt register \r\n");
+ g_sendFrame.type = CAN_TYPEFRAME_EXT_DATA; /* Transmit extended data frame */
+ g_sendFrame.CANId = 0x1314; /* 0x1314 is ID of transmitted data frames */
+ g_sendFrame.dataLength = 1; /* 1 is length of the sent frame */
+ g_sendFrame.frame[0] = '0';
+ HAL_CAN_Write(&g_can, &g_sendFrame);
+ rxFilter.receiveType = CAN_FILTERFRAME_EXT_DATA;
+ rxFilter.filterID = 0x1014; /* 0x1014 and 0xFFFFF0FF constitute filtering rules */
+ rxFilter.filterMask = 0xFFFFF0FF; /* 0xFFFFF0FF is filter ID mask */
+ HAL_CAN_ReadIT(&g_can, &g_receiveFrame, &rxFilter);
+ return 0;
+}
\ No newline at end of file
diff --git a/drivers_sample/capm/capm_hall_sample/inc/capm_hall_sample.h b/drivers_sample/capm/capm_hall_sample/inc/capm_hall_sample.h
new file mode 100644
index 000000000..a106aa41d
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/inc/capm_hall_sample.h
@@ -0,0 +1,41 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file capm_hall_sample.h
+ * @author MCU Driver Team
+ * @brief CAPM HAL level module driver head file.
+ * This file shows a sample to get hall position information
+ */
+#ifndef McuMagicTag_CAPM_HALL_SAMPLE_H
+#define McuMagicTag_CAPM_HALL_SAMPLE_H
+#include "baseinc.h"
+#include "capm_ip.h"
+#include "capm.h"
+
+#define CAPM_PART_A 1
+#define CAPM_PART_B 5
+#define CAPM_PART_C 4
+#define CAPM_PART_D 6
+#define CAPM_PART_E 2
+#define CAPM_PART_F 3
+
+#define CAPM_HIGH 0
+#define CAPM_LOW 1
+
+unsigned char CAPM_GetHallValue(void);
+void CAPM_HallSample(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/capm/capm_hall_sample/init/main.c b/drivers_sample/capm/capm_hall_sample/init/main.c
new file mode 100644
index 000000000..5c87670ea
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/init/main.c
@@ -0,0 +1,57 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "capm_hall_sample.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+CAPM_Handle g_capmAConfig;
+CAPM_Handle g_capmBConfig;
+CAPM_Handle g_capmCConfig;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CAPM_HallSample();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/capm/capm_hall_sample/init/main.h b/drivers_sample/capm/capm_hall_sample/init/main.h
new file mode 100644
index 000000000..ff3e7293e
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/init/main.h
@@ -0,0 +1,58 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "capm.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern CAPM_Handle g_capmAConfig;
+extern CAPM_Handle g_capmBConfig;
+extern CAPM_Handle g_capmCConfig;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/capm/capm_hall_sample/init/system_init.c b/drivers_sample/capm/capm_hall_sample/init/system_init.c
new file mode 100644
index 000000000..616920766
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/init/system_init.c
@@ -0,0 +1,170 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void CAPM0_Init(void)
+{
+ HAL_CRG_IpEnableSet(CAPM0_BASE, IP_CLK_ENABLE);
+
+ g_capmAConfig.baseAddress = CAPM0;
+
+ g_capmAConfig.deburrNum = 0;
+ g_capmAConfig.capMode = CAPM_CONTINUECAP;
+ g_capmAConfig.preScale = 0;
+ g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING;
+ g_capmAConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET;
+ g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING;
+ g_capmAConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET;
+ g_capmAConfig.useCapNum = 2;
+ g_capmAConfig.tscntDiv = 1 - 1;
+ g_capmAConfig.inputSrc = CAPM_INPUT;
+ HAL_CAPM_Init(&g_capmAConfig);
+}
+
+static void CAPM1_Init(void)
+{
+ HAL_CRG_IpEnableSet(CAPM1_BASE, IP_CLK_ENABLE);
+
+ g_capmBConfig.baseAddress = CAPM1;
+
+ g_capmBConfig.deburrNum = 0;
+ g_capmBConfig.capMode = CAPM_CONTINUECAP;
+ g_capmBConfig.preScale = 0;
+ g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING;
+ g_capmBConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET;
+ g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING;
+ g_capmBConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET;
+ g_capmBConfig.useCapNum = 2;
+ g_capmBConfig.tscntDiv = 1 - 1;
+ g_capmBConfig.inputSrc = CAPM_INPUT;
+ HAL_CAPM_Init(&g_capmBConfig);
+}
+
+static void CAPM2_Init(void)
+{
+ HAL_CRG_IpEnableSet(CAPM2_BASE, IP_CLK_ENABLE);
+
+ g_capmCConfig.baseAddress = CAPM2;
+
+ g_capmCConfig.deburrNum = 0;
+ g_capmCConfig.capMode = CAPM_CONTINUECAP;
+ g_capmCConfig.preScale = 0;
+ g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].capEvent = CAPM_RISING;
+ g_capmCConfig.capRegConfig[CAPM_ECR_NUM1].regReset = CAPM_NOTRESET;
+ g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].capEvent = CAPM_FALLING;
+ g_capmCConfig.capRegConfig[CAPM_ECR_NUM2].regReset = CAPM_NOTRESET;
+ g_capmCConfig.useCapNum = 2;
+ g_capmCConfig.tscntDiv = 1 - 1;
+ g_capmCConfig.inputSrc = CAPM_INPUT;
+ HAL_CAPM_Init(&g_capmCConfig);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN33 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO5_0_AS_CAPM0_IN); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO5_0_AS_CAPM0_IN, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO5_0_AS_CAPM0_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO5_0_AS_CAPM0_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO5_0_AS_CAPM0_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN32 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_1_AS_CAPM1_IN); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_1_AS_CAPM1_IN, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_1_AS_CAPM1_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_1_AS_CAPM1_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_1_AS_CAPM1_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN31 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_0_AS_CAPM2_IN); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_0_AS_CAPM2_IN, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_0_AS_CAPM2_IN, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_0_AS_CAPM2_IN, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_0_AS_CAPM2_IN, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ CAPM0_Init();
+ CAPM1_Init();
+ CAPM2_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/capm/capm_hall_sample/readme.md b/drivers_sample/capm/capm_hall_sample/readme.md
new file mode 100644
index 000000000..063867325
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/readme.md
@@ -0,0 +1,18 @@
+# CAPM读取电机HALL位置传感器
+## 关键字: CAPM, HALL传感器
+
+**【功能描述】**
++ 使用三个CAPM捕获三个HALL传感器的电平信息
+
+**【示例配置】**
++ 捕获模式：可通过“g_capmAConfig.capMode”进行配置，默认为连续捕获CAPM_CONTINUECAP
+
++ 预分频：对CAPM输入信号进行预分频，可通过”g_capmAConfig.preScale“进行配置，默认为不分频
+
++ 捕获寄存器配置：可通过”g_capmAConfig.capRegConfig“进行配置，默认为上升沿捕获，每次复位
+
+**【示例效果】**
++ 在IOCMG_15、IOCMG_18和IOCMG_19输入HALL传感器的输入信号。在串口打印的数据中的每一位表示当前时刻的对应的HALL传感器的电平状态。
+
+**【注意事项】**
++ 需要转动电机才能进行CAPM捕获霍尔传感器信号
diff --git a/drivers_sample/capm/capm_hall_sample/src/capm_hall_sample.c b/drivers_sample/capm/capm_hall_sample/src/capm_hall_sample.c
new file mode 100644
index 000000000..98721f9b9
--- /dev/null
+++ b/drivers_sample/capm/capm_hall_sample/src/capm_hall_sample.c
@@ -0,0 +1,79 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file capm_hall_sample.c
+ * @author MCU Driver Team
+ * @brief CAPM use HALL sensor implementation sample.
+ * @details This file provides CAPM use HALL sensor implementation sample.
+ */
+#include "capm_hall_sample.h"
+#include "interrupt.h"
+#include "debug.h"
+#include "main.h"
+
+#define FIRST_BIT_SHIFT 1
+#define SECOND_BIT_SHIFT 2
+
+/**
+ * @brief Calculate current level
+ * @param handle: CAPM handle.
+ * @retval none
+ */
+static unsigned char CAPM_CalculateLevel(CAPM_Handle *handle)
+{
+ unsigned char hallNextECR;
+
+ CAPM_ASSERT_PARAM(handle != NULL);
+ hallNextECR = HAL_CAPM_GetNextLoadECRNum(handle); /* get next ECR number */
+ if (hallNextECR == CAPM_NEXT_LOAD_ECR1 || hallNextECR == CAPM_NEXT_LOAD_ECR3) {
+ return CAPM_LOW; /* current level is low */
+ } else {
+ return CAPM_HIGH; /* current level is high */
+ }
+}
+
+/**
+ * @brief Get current Hall position value.
+ * @param None.
+ * @retval current position:CAPM_PART_A~F.
+ */
+unsigned char CAPM_GetHallValue(void)
+{
+ unsigned char hallALevel, hallBLevel, hallCLevel;
+ unsigned char hallPosition;
+ hallALevel = CAPM_CalculateLevel(&g_capmAConfig); /* get A phase's level */
+ hallBLevel = CAPM_CalculateLevel(&g_capmBConfig); /* get B phase's level */
+ hallCLevel = CAPM_CalculateLevel(&g_capmCConfig); /* get C phase's level */
+ hallPosition = hallALevel << SECOND_BIT_SHIFT; /* move to the 2nd bit */
+ hallPosition |= hallBLevel << FIRST_BIT_SHIFT; /* move to the 1st bit */
+ hallPosition |= hallCLevel;
+ return hallPosition;
+}
+
+/**
+ * @brief Sample of reading hall sensor value.
+ * @param None.
+ * @retval None.
+ */
+void CAPM_HallSample(void)
+{
+ SystemInit();
+ while (1) {
+ unsigned char data = CAPM_GetHallValue(); /* get hall sensor value */
+ DBG_PRINTF("hall = 0x%x\r\n", data);
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/cfd/sample_cfd_check_error/inc/cfd_check_error_sample.h b/drivers_sample/cfd/sample_cfd_check_error/inc/cfd_check_error_sample.h
new file mode 100644
index 000000000..8c11fcf38
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/inc/cfd_check_error_sample.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file cfd_check_error_sample.h
+ * @author MCU Driver Team
+ * @brief cfd sample module.
+ * @details This file provides sample code for users to test using the CFD module.
+ */
+
+#ifndef McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H
+#define McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "baseinc.h"
+
+BASE_StatusType CFD_SampleMain(void);
+
+#endif /* McuMagicTag_CFD_CHECK_ERROR_SAMPLE_H */
diff --git a/drivers_sample/cfd/sample_cfd_check_error/init/main.c b/drivers_sample/cfd/sample_cfd_check_error/init/main.c
new file mode 100644
index 000000000..01587d8b0
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/init/main.c
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "cfd_check_error_sample.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+CFD_Handle g_cfd;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CFD_SampleMain();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/cfd/sample_cfd_check_error/init/main.h b/drivers_sample/cfd/sample_cfd_check_error/init/main.h
new file mode 100644
index 000000000..5edd2c7ff
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/init/main.h
@@ -0,0 +1,59 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "cfd.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern CFD_Handle g_cfd;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void CFDCheckEndCallback(CFD_Handle *handle);
+void CFD_CheckErrorCallback(CFD_Handle *handle);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/cfd/sample_cfd_check_error/init/system_init.c b/drivers_sample/cfd/sample_cfd_check_error/init/system_init.c
new file mode 100644
index 000000000..0db784208
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/init/system_init.c
@@ -0,0 +1,124 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void CFDCheckEndCallback(CFD_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CFD_INT_CHECK_END_MASK */
+ /* USER CODE END CFD_INT_CHECK_END_MASK */
+}
+
+__weak void CFD_CheckErrorCallback(CFD_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CFD_INT_PLL_REF_CLOCK_STOP_MASK */
+ /* USER CODE END CFD_INT_PLL_REF_CLOCK_STOP_MASK */
+}
+
+static BASE_StatusType CFD_Init(void)
+{
+ HAL_CRG_IpEnableSet(CFD_BASE, IP_CLK_ENABLE);
+
+ g_cfd.baseAddress = CFD;
+ g_cfd.upperBound = 12;
+ g_cfd.interruptType = CFD_INT_PLL_REF_CLOCK_STOP_MASK;
+
+ HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_CHECK_END_MASK, (CFD_CallBackFuncType)CFDCheckEndCallback);
+ HAL_CFD_RegisterCallback(&g_cfd, CFD_INT_PLL_REF_CLOCK_STOP_MASK, (CFD_CallBackFuncType)CFD_CheckErrorCallback);
+
+ IRQ_Register(IRQ_CFD, HAL_CFD_IrqHandler, &g_cfd);
+ IRQ_SetPriority(IRQ_CFD, 1); /* 1 is priority value */
+ IRQ_EnableN(IRQ_CFD);
+ return HAL_CFD_Init(&g_cfd);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ CFD_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/cfd/sample_cfd_check_error/readme.md b/drivers_sample/cfd/sample_cfd_check_error/readme.md
new file mode 100644
index 000000000..80ba155fa
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/readme.md
@@ -0,0 +1,21 @@
+# 验证CFD的时钟失效保护功能
+## 关键字: CFD, 时钟失效, 中断
+
+**【功能描述】**
++ 监测目标时钟（HOSC或TCXO）是否失效，每隔5s分别注入时钟失效中断和解除时钟失效中断，用于验证CFD的时钟失效保护功能。
+
+**【示例配置】**
++ CFD参考时钟源：参考时钟源固定为内部低速时钟CLK_LOSC，默认为不分频。
+
++ CFD目标时钟源：目标时钟源固定为HOSC或TCXO，分频比固定为2048。
+
++ CFD上限值： 上限值可通过“g_cfd.upperBound”配置。
+
++ CFD中断类型：中断类型可通过“g_cfd.interruptType”进行配置，默认为时钟失效中断。
+
+**【示例效果】**
++ Debug串口首先每隔1s打印出监测目标时钟频率的CFDCNTLOCK锁存值，在注入时钟失效中断后每隔1s分别打印时钟失效回调函数中的log, 5s后解除时钟失效中断后再每隔1s打印CFDCNTLOCK锁存值，循环往复。
+
+**【注意事项】**
++ 时钟失效中断触发硬件系统事件2会自动关闭APT并将主时钟切换为LOSC进行保护，用户可在中断服务函数中进行时钟恢复或者复位等安全操作；
++ 每次中断触发后自行判断计数值是否在门限内，非门限内则判定为异常时钟；该模块目标时钟分配比固化为2048分频，参考时钟不分频。
diff --git a/drivers_sample/cfd/sample_cfd_check_error/src/cfd_check_error_sample.c b/drivers_sample/cfd/sample_cfd_check_error/src/cfd_check_error_sample.c
new file mode 100644
index 000000000..fb43875a8
--- /dev/null
+++ b/drivers_sample/cfd/sample_cfd_check_error/src/cfd_check_error_sample.c
@@ -0,0 +1,94 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file cfd_check_error_sample.c
+ * @author MCU Driver Team
+ * @brief The CFD module monitors abnormal clocks, inject clock error after loop times in cycles.
+ * @details Check whether the PLL reference clock (TCXO or HOSC) fails by using \
+ * the LOSC = 32Khz clock. If the clock fails, the interrupt service function \
+ * is triggered for processing, and the hardware system event 2 is triggered to \
+ * disable the APT and switch the master clock to the LOSC for protection. \
+ * Users can perform secure operations such as clock recovery or reset in the \
+ * interrupt service function. If the interrupt trigger mode is set to non-clock failure mode, \
+ * the user needs to determine whether the count value is within the threshold after each interrupt \
+ * is triggered. If the count value is not within the threshold, the clock is considered abnormal.
+ * For details about the PLL reference clock recovery mechanism, see the chip technical guide. \
+ * The interrupt type can be configured by users. Only the upper threshold is available. \
+ * For details about the calculation method, see the chip technical guide.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "interrupt.h"
+#include "debug.h"
+#include "cfd.h"
+#include "cfd_check_error_sample.h"
+#include "main.h"
+#include "crg.h"
+
+#define LOOP_TIMES 5
+
+unsigned int g_loopTimes = 0;
+
+void CFD_CheckErrorCallback(CFD_Handle *handle);
+
+/**
+ * @brief Sample main function.
+ * @param None.
+ * @return @ref BASE_StatusType
+ */
+BASE_StatusType CFD_SampleMain(void)
+{
+ SystemInit();
+ HAL_CFD_Start(&g_cfd);
+
+ while (1) {
+ /* If ref clk cnt value bigger than upperbound, then junp to callback */
+ BASE_FUNC_DELAY_S(1);
+ DBG_PRINTF("main loop, ref clk cnt value = %d\r\n", DCL_CFD_GetCntValue(g_cfd.baseAddress));
+ if (g_loopTimes++ >= LOOP_TIMES) {
+ g_loopTimes = 0;
+ /* Inject interrupt type error, trig int jump to callback */
+ DBG_PRINTF("Inject interrupt type error\r\n");
+ DCL_CFD_EnableInterruptInject(g_cfd.baseAddress, g_cfd.interruptType);
+ }
+ }
+ return BASE_STATUS_OK;
+}
+
+/**
+ * @brief Interrupt callback function triggered by module check errors.
+ * @param handle CFD handle.
+ * @return None.
+ */
+void CFD_CheckErrorCallback(CFD_Handle *handle)
+{
+ CFD_Handle* cfdHandle = (CFD_Handle*)handle;
+ while (1) {
+ /* after inject error, core freq switch to losc = 32khz */
+ DBG_PRINTF("In CFD interrupt function : clock frequency error and \
+ core freq = %dhz\r\n", HAL_CRG_GetCoreClkFreq());
+ BASE_FUNC_DELAY_S(1);
+ /* loop control */
+ if (g_loopTimes++ >= LOOP_TIMES) {
+ g_loopTimes = 0;
+ /* Disable Inject interrupt type error, jump to main loop */
+ DBG_PRINTF("Disable inject interrupt type error\r\n");
+ DCL_CFD_DisableInterruptInject(cfdHandle->baseAddress, cfdHandle->interruptType);
+ return;
+ }
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/cmm/sample_cmm_check_error/inc/cmm_check_error_sample.h b/drivers_sample/cmm/sample_cmm_check_error/inc/cmm_check_error_sample.h
new file mode 100644
index 000000000..21bca7e0b
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/inc/cmm_check_error_sample.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file cmm_check_error_sample.h
+ * @author MCU Driver Team
+ * @brief cmm module sample
+ * @details This file provides sample code for users to test using the CMM module.
+ */
+
+#ifndef McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H
+#define McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "baseinc.h"
+
+BASE_StatusType CMM_SampleMain(void);
+
+#endif /* McuMagicTag_CMM_CHECK_ERROR_SAMPLE_H */
diff --git a/drivers_sample/cmm/sample_cmm_check_error/init/main.c b/drivers_sample/cmm/sample_cmm_check_error/init/main.c
new file mode 100644
index 000000000..09c8ab1ea
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/init/main.c
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "cmm_check_error_sample.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+CMM_Handle g_cmm;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CMM_SampleMain();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/cmm/sample_cmm_check_error/init/main.h b/drivers_sample/cmm/sample_cmm_check_error/init/main.h
new file mode 100644
index 000000000..792bdb13f
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/init/main.h
@@ -0,0 +1,60 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "cmm.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern CMM_Handle g_cmm;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void CMMCounterOverFlowCallback(CMM_Handle *handle);
+void CMMCheckEndCallback(CMM_Handle *handle);
+void CMM_CheckErrorCallback(CMM_Handle *handle);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/cmm/sample_cmm_check_error/init/system_init.c b/drivers_sample/cmm/sample_cmm_check_error/init/system_init.c
new file mode 100644
index 000000000..32d1f2a93
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/init/system_init.c
@@ -0,0 +1,136 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void CMMCounterOverFlowCallback(CMM_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CMM_INT_COUNTER_OVERFLOW_MASK */
+ /* USER CODE END CMM_INT_COUNTER_OVERFLOW_MASK */
+}
+
+__weak void CMMCheckEndCallback(CMM_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CMM_INT_CHECK_END_MASK */
+ /* USER CODE END CMM_INT_CHECK_END_MASK */
+}
+
+__weak void CMM_CheckErrorCallback(CMM_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN CMM_INT_FREQ_ERR_MASK */
+ /* USER CODE END CMM_INT_FREQ_ERR_MASK */
+}
+
+static BASE_StatusType CMM_Init(void)
+{
+ HAL_CRG_IpEnableSet(CMM_BASE, IP_CLK_ENABLE);
+
+ g_cmm.baseAddress = CMM;
+ g_cmm.targetFreqDivision = CMM_TARGET_FREQ_DIV_8192;
+ g_cmm.refFreqDivision = CMM_REF_FREQ_DIV_0;
+ g_cmm.targetClockSource = CMM_TARGET_CLK_LOSC;
+ g_cmm.refClockSource = CMM_REF_CLK_LOSC;
+ g_cmm.upperBound = 12;
+ g_cmm.lowerBound = 8;
+ g_cmm.interruptType = CMM_INT_FREQ_ERR_MASK;
+
+ HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_COUNTER_OVERFLOW_MASK, (CMM_CallBackFuncType)CMMCounterOverFlowCallback);
+ HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_CHECK_END_MASK, (CMM_CallBackFuncType)CMMCheckEndCallback);
+ HAL_CMM_RegisterCallback(&g_cmm, CMM_INT_FREQ_ERR_MASK, (CMM_CallBackFuncType)CMM_CheckErrorCallback);
+ IRQ_Register(IRQ_CMM, HAL_CMM_IrqHandler, &g_cmm);
+ IRQ_SetPriority(IRQ_CMM, 1); /* 1 is priority value */
+ IRQ_EnableN(IRQ_CMM);
+ return HAL_CMM_Init(&g_cmm);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ CMM_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/cmm/sample_cmm_check_error/readme.md b/drivers_sample/cmm/sample_cmm_check_error/readme.md
new file mode 100644
index 000000000..1d4198cfd
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/readme.md
@@ -0,0 +1,20 @@
+# 验证CMM时钟频率监测功能，同时验证CMM频率错误中断功能
+## 关键字: CMM, 时钟频率监测, 中断
+
+**【功能描述】**
++ 用于检查目标时钟（LOSC/HOSC/TCXO/HS_CLK/LS_CLK）频率是否发生错误。每隔5s分别注入频率错误中断，用于验证CMM的频率中断处理函数。
+
+**【示例配置】**
++ CMM参考时钟源：参考时钟源可通过“g_cmm.refClockSource”配置，默认为内部低速时钟CMM_REF_CLK_LOSC，分频比可通过“g_cmm.refFreqDivision”配置，默认为不分频CMM_REF_FREQ_DIV_0。
+
++ CMM目标时钟源：目标时钟源可通过“g_cmm.targetClockSource”配置，默认为内部低速时钟CMM_TARGET_CLK_LOSC，分频比可通过“g_cmm.targetFreqDivision”配置，默认为8192分频CMM_TARGET_FREQ_DIV_8192。
+
++ CMM上下限值： 上限值可通过“g_cmm.upperBound”配置，下限值可通过“g_cmm.lowerBound”配置。
+
++ CMM中断类型：中断类型可通过“g_cmm.interruptType”进行配置，默认为频率错误中断。
+
+**【示例效果】**
++ Debug串口首先每隔1s打印出监测目标时钟频率的CMCNTLOCK锁存值，在注入频率错误中断后每隔1s分别打印频率错误回调函数中的log, 5s后解除频率错误中断后再每隔1s打印CMCNTLOCK锁存值，循环往复。
+
+**【注意事项】**
++ 上下限值的范围可反应系统对目标时钟偏差的冗余度，可自行设计门限值和时钟分频比，门限值具体计算方法请参照芯片技术指南。
diff --git a/drivers_sample/cmm/sample_cmm_check_error/src/cmm_check_error_sample.c b/drivers_sample/cmm/sample_cmm_check_error/src/cmm_check_error_sample.c
new file mode 100644
index 000000000..7a54a84a9
--- /dev/null
+++ b/drivers_sample/cmm/sample_cmm_check_error/src/cmm_check_error_sample.c
@@ -0,0 +1,88 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file cmm_check_error_sample.c
+ * @author MCU Driver Team
+ * @brief The CMM module monitors abnormal clocks and inject error after loop times in circle.
+ * @details Use the reference clock (LOSC/HOSC/TCXO/HS_CLK) to check whether the target target \
+ * clock (LOSC/HOSC/TCXO/HS_CLK/LS_CLK) is invalid. If the (LOSC/HOSC/TCXO/HS_CLK/LS_CLK) is invalid, \
+ * the interrupt service function is triggered for processing. You can design security protection \
+ * measures for the interrupt service function. If the interrupt trigger mode is set to non-clock \
+ * failure mode, the user needs to determine whether the count value is within the threshold after \
+ * each interrupt is triggered. If the count value is not within the threshold, the clock is \
+ * considered abnormal.
+ * The threshold includes the upper and lower thresholds. The upper and lower thresholds reflect \
+ * the redundancy of the system for the target clock offset. You can design the thresholds by yourself. \
+ * For details about how to calculate the thresholds, see the chip technical guide.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "interrupt.h"
+#include "debug.h"
+#include "cmm.h"
+#include "cmm_check_error_sample.h"
+#include "main.h"
+
+#define LOOP_TIMES 5
+
+unsigned int g_loopTimes = 0;
+
+void CMM_CheckErrorCallback(CMM_Handle *handle);
+
+/**
+ * @brief Sample main function.
+ * @param None.
+ * @return @ref BASE_StatusType
+ */
+BASE_StatusType CMM_SampleMain(void)
+{
+ SystemInit();
+ HAL_CMM_Start(&g_cmm);
+ while (1) {
+ /* If ref clk cnt value bigger than upperbound, then junp to callback */
+ BASE_FUNC_DELAY_S(1);
+ DBG_PRINTF("main loop, CMM count value = %d\r\n", DCL_CMM_GetCntValue(g_cmm.baseAddress));
+ if (g_loopTimes++ >= LOOP_TIMES - 1) {
+ g_loopTimes = 0;
+ /* Inject error, trig int jump to callback */
+ DBG_PRINTF("\r\n Inject interrupt type error !\r\n");
+ DCL_CMM_EnableInterruptInject(g_cmm.baseAddress, g_cmm.interruptType);
+ }
+ }
+ return BASE_STATUS_OK;
+}
+
+/**
+ * @brief Interrupt callback function triggered by module check errors.
+ * @param handle CMM handle.
+ * @return None.
+ */
+void CMM_CheckErrorCallback(CMM_Handle *handle)
+{
+ CMM_Handle *cmmHandle = (CMM_Handle*)handle;
+ while (1) {
+ DBG_PRINTF("In CMM interrupt function : clock frequency error\r\n");
+ BASE_FUNC_DELAY_S(1);
+ if (g_loopTimes++ >= LOOP_TIMES - 1) {
+ g_loopTimes = 0;
+ /* Disable Inject interrupt type error, trig int jump to callback */
+ DBG_PRINTF("\r\n Disable inject interrupt type error\r\n");
+ DCL_CMM_DisableInterruptInject(cmmHandle->baseAddress, cmmHandle->interruptType);
+ return;
+ }
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/inc/sample_crc_gen_algo.h b/drivers_sample/crc/sample_crc_gen_algo/inc/sample_crc_gen_algo.h
new file mode 100644
index 000000000..8a7d9a8e6
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/inc/sample_crc_gen_algo.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_crc_gen_algo.h
+ * @author MCU Driver Team
+ * @brief CRC module sample
+ * @details The header file contains the following declaration:
+ * crc to generate crc check value of input data.
+ */
+
+#ifndef CRC_GEN_SAMPLE_H
+#define CRC_GEN_SAMPLE_H
+
+BASE_StatusType CRC_GenerateSample(void);
+
+#endif /* CRC_GEN_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/init/main.c b/drivers_sample/crc/sample_crc_gen_algo/init/main.c
new file mode 100644
index 000000000..2fa0b75b2
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/init/main.c
@@ -0,0 +1,54 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_crc_gen_algo.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CRC_GenerateSample();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/init/main.h b/drivers_sample/crc/sample_crc_gen_algo/init/main.h
new file mode 100644
index 000000000..d059d7d88
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/init/main.h
@@ -0,0 +1,54 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/init/system_init.c b/drivers_sample/crc/sample_crc_gen_algo/init/system_init.c
new file mode 100644
index 000000000..2d6c1013f
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/init/system_init.c
@@ -0,0 +1,92 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/readme.md b/drivers_sample/crc/sample_crc_gen_algo/readme.md
new file mode 100644
index 000000000..04177085c
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/readme.md
@@ -0,0 +1,16 @@
+# 配置CRC参数，运用CRC16_XMODEM算法对一组数据进行运算生成CRC值
+## 关键字: CRC, CRC16_XMODEM
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、CRC初始化和功能配置。CRC计算方式有两种：1.运用CRC16_XMODEM算法模式对一组数据进行运算生成CRC值；2.根据CRC16_XMODEM算法属性配置对一组数据进行运算生成CRC值。
+
+**【示例配置】**
++ 算法模式计算：配置算法模式CRC16_XMODEM，对长度为1024数组中的数据进行CRC累计计算，调用“HAL_CRC_Init()”进行初始化配置，之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。
+
++ 算法属性配置计算：配置CRC16_XMODEM算法属性，对长度为1024数组中的数据进行CRC累计计算，调用“HAL_CRC_Init()”进行初始化配置，之后调用"HAL_CRC_Accumulate()"接口对输入的数据进行CRC累计计算生成CRC校验结果值。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，Debug串口打印根据算法模式配置生成的CRC值和已运算数据的大小，然后打印根据算法属性配置生成的CRC值和已运算数据的大小。
+
+**【注意事项】**
++ NA
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_gen_algo/src/sample_crc_gen_algo.c b/drivers_sample/crc/sample_crc_gen_algo/src/sample_crc_gen_algo.c
new file mode 100644
index 000000000..0f1116983
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_gen_algo/src/sample_crc_gen_algo.c
@@ -0,0 +1,91 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_crc_gen_algo.c
+ * @author MCU Driver Team
+ * @brief Generates the CRC value.
+ * @details Setting a group of unsigned short values increasing from 0 and performing CRC accumulation \
+ * operation on the grouping values to generate a CRC value;
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "crc.h"
+#include "main.h"
+#include "sample_crc_gen_algo.h"
+
+#define TABLE_SIZE 1024
+
+static unsigned short g_crcTempData[TABLE_SIZE] = {0};
+
+/**
+ * @brief To test the function of generating a CRC value By Algorithm.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+static BASE_StatusType CRC_GenerateByAlgorithm(void)
+{
+ CRC_Handle genAlgo = {0};
+ genAlgo.handleEx.algoMode = CRC16_XMODEM; /* crc algorithm mode CRC16_XMODEM */
+ genAlgo.baseAddress = CRC;
+ genAlgo.inputDataFormat = CRC_MODE_BIT16; /* crc data size */
+ HAL_CRC_Init(&genAlgo);
+ unsigned int res = HAL_CRC_Accumulate(&genAlgo, g_crcTempData, TABLE_SIZE);
+ DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE);
+ return BASE_STATUS_OK;
+}
+
+/**
+ * @brief To test the function of generating a CRC value By Algorithm Attribute.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+static BASE_StatusType CRC_GenerateByAlgorithmAttr(void)
+{
+ CRC_Handle genAlgoAttr = {0};
+ genAlgoAttr.baseAddress = CRC;
+ genAlgoAttr.inputDataFormat = CRC_MODE_BIT16; /* crc input data size */
+ genAlgoAttr.initValueType = TYPE_CRC_INIT_VALUE_0000;
+ genAlgoAttr.polyMode = CRC16_1021_POLY_MODE;
+ genAlgoAttr.xorEndianEnbaleType = ENABLE_XOR_ENABLE_LSB; /* enabel xor and enable lsb */
+ genAlgoAttr.reverseEnableType = REVERSE_INPUT_FALSE_OUTPUT_FALSE;
+ genAlgoAttr.resultXorValueType = TYPE_CRC_XOR_VALUE_0000;
+ HAL_CRC_Init(&genAlgoAttr);
+ unsigned int res = HAL_CRC_Accumulate(&genAlgoAttr, g_crcTempData, TABLE_SIZE);
+ DBG_PRINTF("\r\n res %x size %d \r\n", res, TABLE_SIZE);
+ return BASE_STATUS_OK;
+}
+
+/**
+ * @brief To test the function of generating a CRC value.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+BASE_StatusType CRC_GenerateSample(void)
+{
+ SystemInit();
+ HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE);
+ for (unsigned int i = 0 ; i < TABLE_SIZE; i++) {
+ g_crcTempData[i] = i;
+ }
+ DBG_PRINTF("GenerateByAlgorithm:------ \r\n");
+ CRC_GenerateByAlgorithm(); /* crc gen by algorithm */
+ DBG_PRINTF("GenerateByAlgorithmAttr:------ \r\n");
+ CRC_GenerateByAlgorithmAttr(); /* crc gen by algorithm attr */
+ return BASE_STATUS_OK;
+}
+
diff --git a/drivers_sample/crc/sample_crc_load_algo/inc/sample_crc_load_algo.h b/drivers_sample/crc/sample_crc_load_algo/inc/sample_crc_load_algo.h
new file mode 100644
index 000000000..2b8889bdc
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/inc/sample_crc_load_algo.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_crc_load_algo.h
+ * @author MCU Driver Team
+ * @brief CRC module sample
+ * @details The header file contains the following declaration:
+ * This file provides sample code for users to help use crc to
+ * set and load crc init value.
+ */
+
+#ifndef CRC_LOAD_SAMPLE_H
+#define CRC_LOAD_SAMPLE_H
+
+BASE_StatusType CRC_LoadSample(void);
+
+#endif /* CRC_LOAD_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_load_algo/init/main.c b/drivers_sample/crc/sample_crc_load_algo/init/main.c
new file mode 100644
index 000000000..257d4717d
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/init/main.c
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_crc_load_algo.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+ //APT_PWMInitHALSample();
+ /* USER CODE END 0 */
+CRC_Handle g_loadCrcHandle;
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+ /* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ CRC_LoadSample();
+ /* USER CODE BEGIN 3 */
+/* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* 建议用户放置周期性执行代码 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* 建议用户放置代码流程 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* 建议用户放置自定义函数 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_load_algo/init/main.h b/drivers_sample/crc/sample_crc_load_algo/init/main.h
new file mode 100644
index 000000000..226ebae97
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/init/main.h
@@ -0,0 +1,56 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "crc.h"
+#include "crg.h"
+#include "iocmg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern CRC_Handle g_loadCrcHandle;
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+/* USER CODE BEGIN 0 */
+/* USER CODE 区域内代码不会被覆盖，区域外会被生成的默认代码覆盖（其余USER CODE 区域同理） */
+/* USER CODE END 0 */
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_load_algo/init/system_init.c b/drivers_sample/crc/sample_crc_load_algo/init/system_init.c
new file mode 100644
index 000000000..06b14eff5
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/init/system_init.c
@@ -0,0 +1,104 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MDiv = (25 - 1); /* The 1 MHz freq is equal to the input clock frequency / (clk_1m_div + 1). 25 is the div of the clk_1m in CLOCK. */
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void CRC_Init(void)
+{
+ HAL_CRG_IpEnableSet(CRC_BASE, IP_CLK_ENABLE);
+
+ g_loadCrcHandle.baseAddress = CRC;
+
+ g_loadCrcHandle.inputDataFormat = CRC_MODE_BIT16;
+ g_loadCrcHandle.handleEx.algoMode = CRC16_XMODEM;
+ HAL_CRC_Init(&g_loadCrcHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE); /* UART0 clock enable. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ /* Config PIN39 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and Pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+ /* Config PIN40 */
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_UP); /* Pull-up and Pull-down, UART RX recommend PULL_UP */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ CRC_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_load_algo/readme.md b/drivers_sample/crc/sample_crc_load_algo/readme.md
new file mode 100644
index 000000000..16d1b1822
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/readme.md
@@ -0,0 +1,18 @@
+# 通过改变初始值配置，对同一组数据进行不同CRC算法运算验证
+## 关键字: CRC算法，初始值
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、CRC初始化和功能配置。通过load初始值配置，不改变其他配置CRC16_XMODEM算法修改为CRC16_CCIT-FALSE，并对同一组数据进行CRC运算验证。
+
+**【示例配置】**
++ 在"SystemInit()”接口中配置CRC输入数据长度、算法模式等参数。
+
++ 在进行load初始值配置之前，根据CRC16_XMODEM算法对输入数据0x5678调用“HAL_CRC_SetInputDataGetCheck()”进行CRC计算对比结果。
+
++ 调用“HAL_CRC_SetCheckInData()”修改初始值0xFFFF,再调用"HAL_CRC_SetInputDataGetCheck()"对输入数据0x5678进行CRC计算对比结果。加载初始值后，CRC16_XMODEM算法修改为CRC16_CCIT-FALSE算法。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，串口打印原始算法对数据运算生成的CRC数值，并与CRC16_XMODEM算法运算的标准值对比验证正确性；load初始值后，打印load后的初始值，并对同一组数据运算生成CRC数值，并与CRC16_CCIT-FALSE算法运算的标准值对比验证正确性。
+
+**【注意事项】**
++ NA
\ No newline at end of file
diff --git a/drivers_sample/crc/sample_crc_load_algo/src/sample_crc_load_algo.c b/drivers_sample/crc/sample_crc_load_algo/src/sample_crc_load_algo.c
new file mode 100644
index 000000000..c9db4fa09
--- /dev/null
+++ b/drivers_sample/crc/sample_crc_load_algo/src/sample_crc_load_algo.c
@@ -0,0 +1,69 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_crc_load_algo.c
+ * @author MCU Driver Team
+ * @brief CRC module load init data config sample
+ * @details Perform the CRC16_XMODEM algorithm operation on the 16-bit data of 0x5678 to obtain a CRC value. \
+ * Compare the CRC value with the standard value to determine whether the value is correct. Then load \
+ * the initial value 0x0000 to the CRC module. Therefore, the CRC16_XMODEM algorithm is configured as \
+ * the CRC16_CCIT-FALSE algorithm, and then the value 0x5678 is calculated. The CRC value generated \
+ * after the calculation is compared with the standard value to determine whether the value of the \
+ * initial load value is correct.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "crc.h"
+#include "main.h"
+#include "sample_crc_load_algo.h"
+
+#define CRC_XMODEM_REF_VALUE 0x5b86
+#define CRC_CCITFALSE_REF_VALUE 0xDF46
+
+/**
+ * @brief To test the function of loading the check_in value to crc_data register.
+ * The load value is read from crc_out.
+ * The value is reversed and the original crc_out is overwritten.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+BASE_StatusType CRC_LoadSample(void)
+{
+ SystemInit();
+ /* CRC16_XMODEM Algrithem, init data = 0x0000 */
+ unsigned int preLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678);
+ DBG_PRINTF("preLoadCrcValue: 0x%x \r\n", preLoadCrcValue);
+ if (preLoadCrcValue == CRC_XMODEM_REF_VALUE) {
+ DBG_PRINTF("CRC Algrithem is CRC16_XMODEM, inputData is 0x5678 \r\n");
+ } else {
+ DBG_PRINTF("CRC Algrithem is not right for this sample! \r\n");
+ }
+ /* load init data 0xffff, crc algrithem from CRC16_XMODEM to CRC16_CCIT-FALSE */
+ HAL_CRC_SetCheckInData(&g_loadCrcHandle, 0xFFFF);
+ unsigned int initData = HAL_CRC_LoadCheckInData(&g_loadCrcHandle);
+ /* CRC16_CCIT-FALSE Algrithem, init data = 0xffff */
+ unsigned int afterLoadCrcValue = HAL_CRC_SetInputDataGetCheck(&g_loadCrcHandle, 0x00005678);
+ DBG_PRINTF("initData: 0x%x \r\n", initData);
+ DBG_PRINTF("afterLoadCrcValue: 0x%x \r\n", afterLoadCrcValue);
+ if (afterLoadCrcValue == CRC_CCITFALSE_REF_VALUE) {
+ DBG_PRINTF("CRC Algrithem is CRC16_CCIT-FALSE, load init data success! \r\n");
+ } else {
+ DBG_PRINTF("load init data fail ! \r\n");
+ }
+ return BASE_STATUS_OK;
+}
diff --git a/drivers_sample/dac/sample_dac/init/main.c b/drivers_sample/dac/sample_dac/init/main.c
new file mode 100644
index 000000000..263921187
--- /dev/null
+++ b/drivers_sample/dac/sample_dac/init/main.c
@@ -0,0 +1,33 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+
+DAC_Handle g_dac;
+
+int main(void)
+{
+ SystemInit();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/dac/sample_dac/init/main.h b/drivers_sample/dac/sample_dac/init/main.h
new file mode 100644
index 000000000..fbb529b7a
--- /dev/null
+++ b/drivers_sample/dac/sample_dac/init/main.h
@@ -0,0 +1,43 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "dac.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern DAC_Handle g_dac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/dac/sample_dac/init/system_init.c b/drivers_sample/dac/sample_dac/init/system_init.c
new file mode 100644
index 000000000..8769cd02f
--- /dev/null
+++ b/drivers_sample/dac/sample_dac/init/system_init.c
@@ -0,0 +1,70 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DAC0_Init(void)
+{
+ g_dac.baseAddress = DAC0_BASE; /* DAC0 base address */
+ g_dac.dacEn = BASE_CFG_ENABLE;
+ g_dac.dacValue = 128; /* 128: output 1.65v at 3.3v power supply */
+ g_dac.dacTstModeEn = BASE_CFG_DISABLE;
+ HAL_DAC_Init(&g_dac);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_33.BIT.func = 0x8; /* 0x8 is DAC0_ANA_OUT */
+ iconfig->iocmg_33.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_33.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_33.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_33.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_33.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DAC0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/dac/sample_dac/readme.md b/drivers_sample/dac/sample_dac/readme.md
new file mode 100644
index 000000000..4c0942b31
--- /dev/null
+++ b/drivers_sample/dac/sample_dac/readme.md
@@ -0,0 +1,18 @@
+# 数模转换-将数字信号转换成对应的模拟电压量
+## 关键字: DAC, 数模转换
+
+**【功能描述】**
++ 将软件配置的8bit数字信号，转换成对应的模拟电压量，实现数字到模拟的转换，转换成的模拟信号可便于模拟运算。
+
+**【示例配置】**
++ DAC输出的模拟电压期望值为: V = ( DAC.value * ( VDDA – VSSA )) / 256。
+
++ 本示例中DAC.value的值为128，其值可在DAC模块的配置界面中进行更改，可以在“system_init.c”文件中进行更改，以满足输出不同的电压值。
+
+**【示例效果】**
++ 输出的电压值可配置，在IOCMG_33可测量到DAC的输出值，默认值为1.55V。
+
+**【注意事项】**
++ DAC.value的配置范围为0-255，超出部分将溢出。
+
++ 转速速率为300kHz。
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer/inc/sample_dma_list_transfer.h b/drivers_sample/dma/sample_dma_list_transfer/inc/sample_dma_list_transfer.h
new file mode 100644
index 000000000..409b72414
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer/inc/sample_dma_list_transfer.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_list_transfer.h
+ * @author MCU Driver Team
+ * @brief dma sample module.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#ifndef SAMPLE_DMA_LIST_TRANSFER_H
+#define SAMPLE_DMA_LIST_TRANSFER_H
+
+#include "dma.h"
+#include "debug.h"
+#include "interrupt.h"
+
+int DMA_MemoryToMemoryList(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer/readme.md b/drivers_sample/dma/sample_dma_list_transfer/readme.md
new file mode 100644
index 000000000..7a4adb3ea
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer/readme.md
@@ -0,0 +1,18 @@
+# 配置DMA链式传输功能，中断回调中读取搬运结果
+## 关键字: DMA, 链式传输, 中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和DMA控制器初始化和功能配置。DMA链式传输，从内存搬运到内存，链式传输中内存地址可以不连续，DMA搬运结束后触发DMA中断，在中断回调函数中读取搬运后的结果。
+
+**【示例配置】**
++ 对于“HAL_DMA_InitNewNode()”创建链表节点，设置源地址和目标地址及搬运长度。
+
++ 使用“HAL_DMA_ListAddNode()”接口，将每一个不连续内存进行连接。
+
++ 将第一个内存块的地址和选择的DMA传输通道作为入参传递至“HAL_DMA_StartListTransfer()”，使能DMA传递。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。DMA搬运结束后，会上报中断，在中断回调函数中查看源目端数据是否一致。
+
+**【注意事项】**
++ NA
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer/src/sample_dma_list_transfer.c b/drivers_sample/dma/sample_dma_list_transfer/src/sample_dma_list_transfer.c
new file mode 100644
index 000000000..861436e6a
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer/src/sample_dma_list_transfer.c
@@ -0,0 +1,117 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_list_transfer.c
+ * @author MCU Driver Team
+ * @brief dma sample module, scatter gather DMA.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma in chain transmission mode.
+ */
+#include "sample_dma_list_transfer.h"
+
+#define NUM 100
+static unsigned char g_str1[NUM] = "1234567890123456789012345678901234567890123456789012345678901234567890";
+static unsigned char g_str2[NUM] = {0};
+static unsigned char g_str3[NUM] = {0};
+static DMA_Handle g_dmac;
+static DMA_ChannelParam g_param;
+
+/**
+ * @brief DMA controller initialization.
+ * @param None.
+ * @retval None.
+ */
+static void DMA_ControllerInit(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_Init(&g_dmac);
+}
+
+/**
+ * @brief DMA interrupt initialization.
+ * @param handle DMA handle.
+ * @retval None.
+ */
+static void DMA_InterruptInit(DMA_Handle *handle)
+{
+ IRQ_Enable();
+ handle->irqNumTc = IRQ_DMA_TC;
+ handle->irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(handle);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+}
+
+/**
+ * @brief User-defined callback function for completing the transfer of memory to the memory.
+ * @param handle callback handle.
+ * @retval None.
+ */
+static void DMA_MemToMemFinishList(void *handle)
+{
+ DBG_PRINTF("g_str1->g_str2 Finish!\r\n");
+ DBG_PRINTF("src_memory g_str1: %s\r\n", g_str1);
+ DBG_PRINTF("dest_memory g_str2: %s\r\n", g_str2);
+ DBG_PRINTF("dest_memory g_str3: %s\r\n", g_str3);
+ if (handle == NULL) {
+ DBG_PRINTF("handle is nullptr!\r\n");
+ }
+ BASE_FUNC_UNUSED(handle);
+}
+
+static DMA_LinkList g_firstNode;
+static DMA_LinkList g_secondNode;
+/**
+ * @brief DMA sample code for the transfer of DMA chain transmission.
+ * @param None.
+ * @retval None.
+ */
+int DMA_MemoryToMemoryList(void)
+{
+ DBG_UartPrintInit(BAUDRATE); /* baud rate is 115200 */
+ DBG_PRINTF("MemoryToMemoryList Begin: \r\n");
+ DBG_PRINTF("src_memory g_str1: %s\r\n", g_str1);
+ DBG_PRINTF("dest_memory g_str2: %s\r\n", g_str2);
+ DBG_PRINTF("dest_memory g_str3: %s\r\n", g_str3);
+
+ unsigned int channel = 2; /* select transfer channel 2 */
+ DMA_ControllerInit();
+ DMA_InterruptInit(&g_dmac);
+ HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_MemToMemFinishList);
+
+ g_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC;
+ g_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ g_param.destAddrInc = DMA_ADDR_INCREASE;
+ g_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.srcBurst = DMA_BURST_LENGTH_1;
+ g_param.destBurst = DMA_BURST_LENGTH_1;
+ g_param.pHandle = &g_dmac;
+ /* The transmission length is defined as 5 */
+ HAL_DMA_InitNewNode(&g_firstNode, &g_param, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)g_str2, 5);
+ /* The transmission length is defined as 50 */
+ HAL_DMA_InitNewNode(&g_secondNode, &g_param, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)g_str3, 50);
+
+ HAL_DMA_ListAddNode(&g_firstNode, &g_secondNode);
+ HAL_DMA_StartListTransfer(&g_dmac, &g_firstNode, channel);
+ DBG_PRINTF("End!\r\n");
+ return 0;
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/inc/sample_dma_list_transfer_continue.h b/drivers_sample/dma/sample_dma_list_transfer_continue/inc/sample_dma_list_transfer_continue.h
new file mode 100644
index 000000000..1268c1c3b
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/inc/sample_dma_list_transfer_continue.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_list_transfer_continue.h
+ * @author MCU Driver Team
+ * @brief Single-node continuous transmission.
+ * @details The DMA is used to transfer data from the memory to the memory.
+ * Single-node continuous transmission.
+ */
+#ifndef SAMPLE_DMA_LISTTRANSFERCOUNTINUE_H
+#define SAMPLE_DMA_LISTTRANSFERCOUNTINUE_H
+
+#include "debug.h"
+#include "dma.h"
+#include "main.h"
+
+void DMA_List_transfer_continue(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/readme.md b/drivers_sample/dma/sample_dma_list_transfer_continue/readme.md
new file mode 100644
index 000000000..fc2202829
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/readme.md
@@ -0,0 +1,19 @@
+# 配置DMA单节点连续链式传输功能
+## 关键字: DMA， 单节点，连续链式传输
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和DMA控制器初始化和功能配置。DMA链式传输，从内存到内存，使用DMA搬运，链表单节点连续传输。
+
+**【示例配置】**
++ “SystemInit()”中配置DMA源和目的大小端、开启中断等参数。
+
++ 链表连续处理：首先，将使用“HAL_DMA_InitNewNode()”接口配置目的内存需要接收的数据长度和内存地址，得到一个节点；
+然后，使用“HAL_DMA_ListAddNode()”接口，将上一步的节点作为两个入参，使得链表循环。
+
++ 使能DMA搬运：将第一个内存块的地址和选择的DMA传输通道作为入参传递至“HAL_DMA_StartListTransfer()”，使能DMA传递
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。DMA搬运结束后，会上报中断，在中断回调函数中查看源目端数据是否一致。
+
+**【注意事项】**
++ NA
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/src/sample_dma_list_transfer_continue.c b/drivers_sample/dma/sample_dma_list_transfer_continue/src/sample_dma_list_transfer_continue.c
new file mode 100644
index 000000000..83944652a
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/src/sample_dma_list_transfer_continue.c
@@ -0,0 +1,70 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_list_transfer_continue.c
+ * @author MCU Driver Team
+ * @brief Single-node continuous transmission.
+ * @details The DMA is used to transfer data from the memory to the memory.
+ * Single-node continuous transmission.
+ */
+#include "sample_dma_list_transfer_continue.h"
+
+static unsigned char g_src[5] = "ABC";
+static unsigned char g_dest[5] = "";
+static DMA_LinkList g_node;
+static DMA_ChannelParam g_param;
+/**
+ * @brief DMA sample code for the transfer of list node continue transmission.
+ * @param None.
+ * @retval None.
+ */
+void DMA_List_transfer_continue(void)
+{
+ SystemInit();
+ DBG_PRINTF("ListTransferContinue Begin: \r\n");
+ DBG_PRINTF("Before transmission, src: %s\r\n", g_src);
+ DBG_PRINTF("Before transmission, dest: %s\r\n", g_dest);
+ unsigned int channel = 2; /* select transfer channel 2 */
+ unsigned int dataLength = 3; /* The length of the transferred characters is 3 */
+ unsigned int count = 0;
+ g_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC;
+ g_param.srcAddrInc = DMA_ADDR_INCREASE;
+ g_param.destAddrInc = DMA_ADDR_INCREASE;
+ g_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.srcBurst = DMA_BURST_LENGTH_1;
+ g_param.destBurst = DMA_BURST_LENGTH_1;
+ g_param.pHandle = &g_dmac;
+ HAL_DMA_InitNewNode(&g_node, &g_param, (uintptr_t)(void *)g_src, (uintptr_t)(void *)g_dest, dataLength);
+ HAL_DMA_ListAddNode(&g_node, &g_node);
+ HAL_DMA_StartListTransfer(&g_dmac, &g_node, channel);
+ DBG_PRINTF("DMA Start Transport!\r\n");
+ while (1) {
+ BASE_FUNC_DelayUs(500); /* delay 500 us */
+ if (count % 100 == 0 && count <= 2000) { /* 100 and 2000 are used for control printf */
+ DBG_PRINTF("src: %s, dest: %s\r\n", g_src, g_dest);
+ if (count == 1500) { /* 1500 for turning off DMA transport */
+ HAL_DMA_StopChannel(&g_dmac, channel);
+ DBG_PRINTF("DMA Stop Transport!\r\n");
+ }
+ g_src[0] += 1;
+ g_src[1] += 1;
+ g_src[2] += 1; /* Change the character of the subscript is 2 */
+ }
+ count++;
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.c b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.c
new file mode 100644
index 000000000..fb60e4c70
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "typedefs.h"
+#include "feature.h"
+#include "main.h"
+#include "sample_dma_list_transfer_continue.h"
+
+UART_Handle g_uart0;
+
+DMA_Handle g_dmac;
+
+int main(void)
+{
+ DMA_List_transfer_continue();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.h b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.h
new file mode 100644
index 000000000..ea243033c
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void MemoryDMACallback(void *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/system_init.c b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/system_init.c
new file mode 100644
index 000000000..b1365052d
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_list_transfer_continue/sysinit/system_init.c
@@ -0,0 +1,123 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel2Init(void)
+{
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_INCREASE;
+ dma_param.destAddrInc = DMA_ADDR_INCREASE;
+ dma_param.srcPeriph = DMA_REQUEST_MEM;
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = NULL;
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_TWO);
+}
+
+static void DMA_Init(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(&g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac);
+
+ DMA_Channel2Init();
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/inc/sample_dma_mem_to_mem.h b/drivers_sample/dma/sample_dma_mem_to_mem/inc/sample_dma_mem_to_mem.h
new file mode 100644
index 000000000..c83928d60
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/inc/sample_dma_mem_to_mem.h
@@ -0,0 +1,33 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_mem_to_mem.h
+ * @author MCU Driver Team
+ * @brief adc sample module.
+ * @brief dma sample module, memory-to-memory transfer.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#ifndef SAMPLE_DMA_MEMTOPER_H
+#define SAMPLE_DMA_MEMTOPER_H
+
+#include "debug.h"
+#include "dma.h"
+#include "main.h"
+
+void DMA_MemoryToMemory(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/init/main.c b/drivers_sample/dma/sample_dma_mem_to_mem/init/main.c
new file mode 100644
index 000000000..89ffdc1fc
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_dma_mem_to_mem.h"
+
+UART_Handle g_uart0;
+
+DMA_Handle g_dmac;
+
+int main(void)
+{
+ DMA_MemoryToMemory();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/init/main.h b/drivers_sample/dma/sample_dma_mem_to_mem/init/main.h
new file mode 100644
index 000000000..30a7c0e10
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void UART0_TXDMACallback(UART_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/init/system_init.c b/drivers_sample/dma/sample_dma_mem_to_mem/init/system_init.c
new file mode 100644
index 000000000..3dc6940d1
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/init/system_init.c
@@ -0,0 +1,133 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel2Init(void *handle)
+{
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_MEMORY_TO_MEMORY_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_INCREASE;
+ dma_param.destAddrInc = DMA_ADDR_INCREASE;
+ dma_param.srcPeriph = DMA_REQUEST_MEM;
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_TWO);
+}
+
+static void DMA_Init(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(&g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac);
+
+ DMA_Channel2Init((void *)(&g_uart0));
+}
+
+__weak void UART0_TXDMACallback(UART_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN UART0_TXDMACallback */
+ /* USER CODE END UART0_TXDMACallback */
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+ g_uart0.dmaHandle = &g_dmac;
+ g_uart0.uartDmaTxChn = DMA_CHANNEL_TWO;
+ HAL_UART_RegisterCallBack(&g_uart0, UART_WRITE_DMA_FINISH, UART0_TXDMACallback);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/readme.md b/drivers_sample/dma/sample_dma_mem_to_mem/readme.md
new file mode 100644
index 000000000..1b1aed5ab
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/readme.md
@@ -0,0 +1,18 @@
+# 配置DMA内存到内存传输功能，中断回调中读取搬运结果
+## 关键字: DMA, 中断，内存到内存
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断、DMA通道初始化和DMA控制器初始化配置。DMA传输，从内存搬运到内存，DMA搬运结束后触发DMA中断，在中断回调函数中读取搬运后的结果。
+
+**【示例配置】**
++ 在“SystemInit()”中配置DMA源和目的大小端、中断、配置通道相关参数进行初始化。
+
++ 将搬运的源端地址和目的端地址传入“HAL_DMA_StartIT()”接口，搬运的数据长度和DMA的通道号也作为入参传递进去。。
+
++ 实现“DMA_MemToMemCallBack()”中断回调函数。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。DMA搬运结束后，会上报中断，在中断回调中查看源目端数据是否一致。
+
+**【注意事项】**
++ NA
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_mem/src/sample_dma_mem_to_mem.c b/drivers_sample/dma/sample_dma_mem_to_mem/src/sample_dma_mem_to_mem.c
new file mode 100644
index 000000000..bddb05d0f
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_mem/src/sample_dma_mem_to_mem.c
@@ -0,0 +1,61 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_mem_to_mem.c
+ * @author MCU Driver Team
+ * @brief dma sample module, memory-to-memory transfer.
+ * @details The DMA is used to transfer data from the memory to the memory.
+ * After the transfer is complete, the DMA interrupt is triggered.
+ * (1) Transfer configuration: Transfer the source and destination addresses to the HAL_DMA_StartIT() API.
+ * Transfer the length of the transferred data and the DMA channel number as input parameters.
+ * (2) Result judgment: After the DMA transfer is complete, in the interrupt callback function, check whether
+ * the source and destination data are consistent.
+ */
+#include "sample_dma_mem_to_mem.h"
+
+static unsigned char g_str1[10] = "12345678";
+static unsigned char g_str2[10] = "";
+void DMA_MemToMemCallBack(void *handle);
+/**
+ * @brief User-defined callback function for completing the transfer of memory to the memory.
+ * @param handle callback handle.
+ * @retval None.
+ */
+void DMA_MemToMemCallBack(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("DMA_MemToMemCallBack\r\n");
+ DBG_PRINTF("After transmission, src: %s\r\n", g_str1);
+ DBG_PRINTF("After transmission, dest: %s\r\n", g_str2);
+}
+
+/**
+ * @brief DMA sample code for the transfer of memory to the memory.
+ * @param None.
+ * @retval None.
+ */
+void DMA_MemoryToMemory(void)
+{
+ SystemInit();
+ DBG_PRINTF("MemoryToMemory Begin: \r\n");
+ DBG_PRINTF("Before transmission, src: %s\r\n", g_str1);
+ DBG_PRINTF("Before transmission, dest: %s\r\n", g_str2);
+ unsigned int channel = 2; /* select transfer channel 2 */
+ HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_MemToMemCallBack);
+ /* The transmission length is defined as 8 */
+ HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)g_str2, 8, channel);
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_per/inc/sample_dma_mem_to_per.h b/drivers_sample/dma/sample_dma_mem_to_per/inc/sample_dma_mem_to_per.h
new file mode 100644
index 000000000..88883e315
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_per/inc/sample_dma_mem_to_per.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_mem_to_per.h
+ * @author MCU Driver Team
+ * @brief dma sample module.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#ifndef SAMPLE_DMA_MEM_TO_PER_H
+#define SAMPLE_DMA_MEM_TO_PER_H
+
+#include "dma.h"
+#include "debug.h"
+#include "interrupt.h"
+
+int DMA_MemoryToPeriphIT(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_per/readme.md b/drivers_sample/dma/sample_dma_mem_to_per/readme.md
new file mode 100644
index 000000000..f2d505621
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_per/readme.md
@@ -0,0 +1,18 @@
+# 配置DMA内存到外设传输，传输完成进入中断回调函数
+## 关键字: DMA, 内存到外设, 中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和DMA控制器初始化和功能配置。从内存到外设uart tx，使用DMA搬运，搬运结束后触发DMA中断。
+
+**【示例配置】**
++ “HAL_DMA_Init()”接口配置DMA源和目的大小端、中断进行初始化，“HAL_DMA_InitChannel()”进行通道初始化配置。
+
++ 将搬运的源端地址和目的端地址传入“HAL_DMA_StartIT()”接口，搬运的数据长度和DMA的通道号也作为入参传递进去，调用完成之后要发送uart tx DMA请求。
+
++ 当DMA传输完成，“DMA_MemToPeriFinish()”中断回调函数中打印log。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。DMA搬运结束后，会上报中断，在中断函数中打印传输完成log，并且在串口助手上显示搬运完成的数据。
+
+**【注意事项】**
++ 如果要在串口助手上显示搬运完成的数据，要设置外设为对应的uart串口。
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_mem_to_per/src/sample_dma_mem_to_per.c b/drivers_sample/dma/sample_dma_mem_to_per/src/sample_dma_mem_to_per.c
new file mode 100644
index 000000000..231a0cbfd
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_mem_to_per/src/sample_dma_mem_to_per.c
@@ -0,0 +1,118 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_mem_to_per.c
+ * @author MCU Driver Team
+ * @brief dma sample module, memory-to-peripheral transfer.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#include "sample_dma_mem_to_per.h"
+
+#define NUM 10
+static UART_Handle g_uartHandle;
+static unsigned char g_str1[NUM] = "123456789";
+static DMA_Handle g_dmac;
+static DMA_ChannelParam g_param;
+
+/**
+ * @brief DMA controller initialization.
+ * @param None.
+ * @retval None.
+ */
+static void DMA_ControllerInit(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_Init(&g_dmac);
+}
+
+/**
+ * @brief DMA interrupt initialization.
+ * @param handle DMA handle.
+ * @retval None.
+ */
+static void DMA_InterruptInit(DMA_Handle *handle)
+{
+ IRQ_Enable();
+ handle->irqNumTc = IRQ_DMA_TC;
+ handle->irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(handle);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+}
+
+/**
+ * @brief User-defined callback function for completing the transfer of memory to the peripheral.
+ * @param handle callback handle.
+ * @retval None.
+ */
+static void DMA_MemToPeriFinish(void *handle)
+{
+ DBG_PRINTF("Interrupt Finish!\r\n");
+ BASE_FUNC_UNUSED(handle);
+}
+
+/**
+ * @brief DMA sample code for the transfer of memory to the peripheral.
+ * @param None.
+ * @retval None.
+ */
+int DMA_MemoryToPeriphIT(void)
+{
+ g_uartHandle.baseAddress = UART0;
+ g_uartHandle.baudRate = 115200; /* baud rate is 115200 */
+ g_uartHandle.dataLength = UART_DATALENGTH_8BIT;
+ g_uartHandle.stopBits = UART_STOPBITS_ONE;
+ g_uartHandle.parity = UART_PARITY_NONE;
+ g_uartHandle.fifoMode = true;
+ g_uartHandle.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uartHandle.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uartHandle.hwFlowCtr = UART_HW_FLOWCTR_DISABLE;
+ HAL_UART_Init(&g_uartHandle);
+
+ DBG_PRINTF("MemoryToPeriph Begin: \r\n");
+ DBG_PRINTF("src_memory g_str1: %s\r\n", g_str1);
+ unsigned int channel = 3; /* select transfer channel 3 */
+ DMA_ControllerInit();
+ DMA_InterruptInit(&g_dmac);
+ HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_MemToPeriFinish);
+ g_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC;
+ g_param.srcAddrInc = DMA_ADDR_INCREASE;
+ g_param.destAddrInc = DMA_ADDR_UNALTERED;
+ g_param.destPeriph = DMA_REQUEST_UART0_TX;
+ g_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.srcBurst = DMA_BURST_LENGTH_4;
+ g_param.destBurst = DMA_BURST_LENGTH_4;
+ g_param.pHandle = &g_uartHandle;
+ HAL_DMA_InitChannel(&g_dmac, &g_param, channel);
+ unsigned int ret;
+ ret = HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)g_str1, (uintptr_t)(void *)&(g_uartHandle.baseAddress->UART_DR),
+ 6, channel); /* The transmission length is defined as 6 */
+ if (ret == BASE_STATUS_ERROR) {
+ DBG_PRINTF("HAL_DMA_StartIT: BASE_STATUS_ERROR\r\n");
+ } else {
+ g_uartHandle.baseAddress->UART_DMACR.BIT.txdmae = BASE_CFG_ENABLE;
+ DBG_PRINTF("HAL_DMA_StartIT: BASE_STATUS_OK\r\n");
+ }
+ DBG_PRINTF("End:\r\n");
+ return 0;
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_mem/inc/sample_dma_per_to_mem.h b/drivers_sample/dma/sample_dma_per_to_mem/inc/sample_dma_per_to_mem.h
new file mode 100644
index 000000000..7265024ae
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_mem/inc/sample_dma_per_to_mem.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_per_to_mem.h
+ * @author MCU Driver Team
+ * @brief dma sample module.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#ifndef SAMPLE_DMA_PER_TO_MEM_H
+#define SAMPLE_DMA_PER_TO_MEM_H
+
+#include "dma.h"
+#include "debug.h"
+#include "interrupt.h"
+
+int DMA_PeriphToMemoryIT(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_mem/readme.md b/drivers_sample/dma/sample_dma_per_to_mem/readme.md
new file mode 100644
index 000000000..042f64d13
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_mem/readme.md
@@ -0,0 +1,18 @@
+# 配置DMA外设到内存传输，传输完成进入中断回调函数
+## 关键字: DMA, 外设到内存, 中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和DMA控制器初始化和功能配置。从外设uart rx到内存，使用DMA搬运，搬运结束后触发DMA中断。
+
+**【示例配置】**
++ “HAL_DMA_Init()”接口配置DMA源和目的大小端、中断进行初始化，“HAL_DMA_InitChannel()”进行通道初始化配置。
+
++ 将搬运的源端地址和目的端地址传入“HAL_DMA_StartIT()”接口，搬运的数据长度和DMA的通道号也作为入参传递进去，调用完成之后要发送uart rx DMA请求。
+
++ 当DMA传输完成，“DMA_PeriphToMemFinish()”中断回调函数中打印log，并且再次调用“HAL_DMA_StartIT()”接口进行下一次搬运，调用完成后发送uart rx DMA请求。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。在串口助手上发送数据，DMA搬运结束后，会上报中断，在中断函数中打印传输完成log，查看数据是否正确。
+
+**【注意事项】**
++ 如果要在串口助手上发送数据进行DMA搬运到内存，要设置外设为对应的uart串口。
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_mem/src/sample_dma_per_to_mem.c b/drivers_sample/dma/sample_dma_per_to_mem/src/sample_dma_per_to_mem.c
new file mode 100644
index 000000000..845fe8fdc
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_mem/src/sample_dma_per_to_mem.c
@@ -0,0 +1,128 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_per_to_mem.c
+ * @author MCU Driver Team
+ * @brief dma sample module, peripheral-to-memory transfer.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#include "sample_dma_per_to_mem.h"
+
+#define NUM 10
+static UART_Handle g_uart;
+static unsigned char g_str2[NUM] = {0};
+static DMA_Handle g_dmac;
+static DMA_ChannelParam g_param;
+
+/**
+ * @brief DMA controller initialization.
+ * @param None.
+ * @retval None.
+ */
+static void DMA_ControllerInit(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_Init(&g_dmac);
+}
+
+/**
+ * @brief DMA interrupt initialization.
+ * @param handle DMA handle.
+ * @retval None.
+ */
+static void DMA_InterruptInit(DMA_Handle *handle)
+{
+ IRQ_Enable();
+ handle->irqNumTc = IRQ_DMA_TC;
+ handle->irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(handle);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+}
+
+/**
+ * @brief User-defined callback function for completing the transfer of peripheral to the memory.
+ * @param handle callback handle.
+ * @retval None.
+ */
+static void DMA_PeriphToMemFinish(void *handle)
+{
+ DMA_Handle *dmaHandle = (DMA_Handle *)handle;
+ DBG_PRINTF("Interrupt Finish!\r\n");
+ DBG_PRINTF("g_str2:%s\r\n", g_str2);
+ DBG_PRINTF("Process channel: %d\r\n", dmaHandle->currentChannel);
+ unsigned int ret;
+ ret = HAL_DMA_StartIT(dmaHandle, (uintptr_t)(void *)&(g_uart.baseAddress->UART_DR),
+ (uintptr_t)(void *)g_str2, 8, dmaHandle->currentChannel); /* Transmission length is 8 */
+ if (ret == BASE_STATUS_ERROR) {
+ DBG_PRINTF("HAL_DMA_StartIT: BASE_STATUS_ERROR\r\n");
+ } else {
+ g_uart.baseAddress->UART_DMACR.BIT.rxdmae = BASE_CFG_ENABLE;
+ }
+}
+
+/**
+ * @brief DMA sample code for the transfer of peripheral to the memory.
+ * @param None.
+ * @retval None.
+ */
+int DMA_PeriphToMemoryIT(void)
+{
+ g_uart.baseAddress = UART0;
+ g_uart.baudRate = 115200; /* baud rate is 115200 */
+ g_uart.dataLength = UART_DATALENGTH_8BIT;
+ g_uart.stopBits = UART_STOPBITS_ONE;
+ g_uart.parity = UART_PARITY_NONE;
+ g_uart.fifoMode = true;
+ g_uart.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart.hwFlowCtr = UART_HW_FLOWCTR_DISABLE;
+ g_uart.baseAddress = UART0;
+ HAL_UART_Init(&g_uart);
+
+ DBG_PRINTF("PeriphToMemory Begin: \r\n");
+ DBG_PRINTF("Please enter a string to the peripheral\r\n");
+ unsigned int channel = 1; /* select transfer channel 1 */
+
+ DMA_ControllerInit();
+ DMA_InterruptInit(&g_dmac);
+ HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_PeriphToMemFinish);
+ g_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC;
+ g_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ g_param.destAddrInc = DMA_ADDR_INCREASE;
+ g_param.srcPeriph = DMA_REQUEST_UART0_RX;
+ g_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.srcBurst = DMA_BURST_LENGTH_1;
+ g_param.destBurst = DMA_BURST_LENGTH_4;
+ g_param.pHandle = &g_dmac;
+ HAL_DMA_InitChannel(&g_dmac, &g_param, channel);
+ unsigned int ret;
+ ret = HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)&(g_uart.baseAddress->UART_DR),
+ (uintptr_t)(void *)g_str2, 8, channel); /* The transmission length is defined as 8 */
+ if (ret == BASE_STATUS_ERROR) {
+ DBG_PRINTF("HAL_DMA_StartIT: BASE_STATUS_ERROR\r\n");
+ } else {
+ g_uart.baseAddress->UART_DMACR.BIT.rxdmae = BASE_CFG_ENABLE;
+ }
+ return 0;
+}
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_per/inc/sample_dma_per_to_per.h b/drivers_sample/dma/sample_dma_per_to_per/inc/sample_dma_per_to_per.h
new file mode 100644
index 000000000..3c4702407
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_per/inc/sample_dma_per_to_per.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_per_to_per.h
+ * @author MCU Driver Team
+ * @brief dma sample module.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#ifndef SAMPLE_DMA_PER_TO_PER_H
+#define SAMPLE_DMA_PER_TO_PER_H
+
+#include "dma.h"
+#include "debug.h"
+#include "interrupt.h"
+
+int DMA_PeriphToPeriphIT(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_per/readme.md b/drivers_sample/dma/sample_dma_per_to_per/readme.md
new file mode 100644
index 000000000..b5fd1d2f7
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_per/readme.md
@@ -0,0 +1,18 @@
+# 配置DMA外设到外设传输，传输完成进入中断回调函数
+## 关键字: DMA, 外设到外设, 中断
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、中断和DMA控制器初始化和功能配置。从外设uart rx到uart tx ，使用DMA搬运，搬运结束后触发DMA中断。
+
+**【示例配置】**
++ “HAL_DMA_Init()”接口配置DMA源和目的大小端、中断进行初始化，“HAL_DMA_InitChannel()”进行通道初始化配置。
+
++ 将搬运的源端地址和目的端地址传入“HAL_DMA_StartIT()”接口，搬运的数据长度和DMA的通道号也作为入参传递进去，调用完成之后要发送uart rx 和 uart tx DMA请求。
+
++ 当DMA传输完成，“DMA_PeriToPeriFinish()”中断回调函数中打印log。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后。在串口助手上发送数据，DMA搬运结束后，会上报中断，在中断函数中打印传输完成log，此时在另一个串口助手上显示搬运完成的数据。
+
+**【注意事项】**
++ 如果要在串口助手上发送数据到另一个串口助手上显示数据，要设置外设为对应的uart串口，比如其中一个串口助手连接uart tx，一个串口助手连接uart rx。
\ No newline at end of file
diff --git a/drivers_sample/dma/sample_dma_per_to_per/src/sample_dma_per_to_per.c b/drivers_sample/dma/sample_dma_per_to_per/src/sample_dma_per_to_per.c
new file mode 100644
index 000000000..523b36d4f
--- /dev/null
+++ b/drivers_sample/dma/sample_dma_per_to_per/src/sample_dma_per_to_per.c
@@ -0,0 +1,127 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_dma_per_to_per.c
+ * @author MCU Driver Team
+ * @brief dma sample module, peripheral-to-peripheral transfer.
+ * @details This file provides sample code for users to help use
+ * the data transfer function of the dma.
+ */
+#include "sample_dma_per_to_per.h"
+
+static UART_Handle g_uart1;
+static UART_Handle g_uart0;
+static DMA_Handle g_dmac;
+static DMA_ChannelParam g_param;
+
+/**
+ * @brief DMA controller initialization.
+ * @param None.
+ * @retval None.
+ */
+static void DMA_ControllerInit(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_Init(&g_dmac);
+}
+
+/**
+ * @brief DMA interrupt initialization.
+ * @param handle DMA handle.
+ * @retval None.
+ */
+static void DMA_InterruptInit(DMA_Handle *handle)
+{
+ IRQ_Enable();
+ handle->irqNumTc = IRQ_DMA_TC;
+ handle->irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(handle);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+}
+
+/**
+ * @brief User-defined callback function for completing the transfer of peripheral to the peripheral.
+ * @param handle callback handle.
+ * @retval None.
+ */
+static void DMA_PeriToPeriFinish(void *handle)
+{
+ DBG_PRINTF("Interrupt Finish!\r\n");
+ BASE_FUNC_UNUSED(handle);
+}
+
+/**
+ * @brief DMA sample code for the transfer of peripheral to the peripheral.
+ * @param None.
+ * @retval None.
+ */
+int DMA_PeriphToPeriphIT(void)
+{
+ g_uart0.baseAddress = UART0;
+ g_uart0.baudRate = 115200; /* baud rate is 115200 */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.fifoMode = true;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = UART_HW_FLOWCTR_DISABLE;
+ HAL_UART_Init(&g_uart0);
+
+ g_uart1.baseAddress = UART1;
+ g_uart1.baudRate = 115200; /* baud rate is 115200 */
+ g_uart1.dataLength = UART_DATALENGTH_8BIT;
+ g_uart1.stopBits = UART_STOPBITS_ONE;
+ g_uart1.parity = UART_PARITY_NONE;
+ g_uart1.fifoMode = true;
+ g_uart1.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart1.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart1.hwFlowCtr = UART_HW_FLOWCTR_DISABLE;
+ HAL_UART_Init(&g_uart1);
+
+ DBG_PRINTF("PeriphToPeriph Begin: \r\n");
+ unsigned int channel = 0; /* select transfer channel 0 */
+ DMA_ControllerInit();
+ DMA_InterruptInit(&g_dmac);
+ HAL_DMA_RegisterCallback(&g_dmac, DMA_CHANNEL_FINISH, channel, DMA_PeriToPeriFinish);
+ g_param.direction = DMA_PERIPH_TO_PERIPH_BY_DMAC;
+ g_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ g_param.destAddrInc = DMA_ADDR_UNALTERED;
+ g_param.destPeriph = DMA_REQUEST_UART0_TX;
+ g_param.srcPeriph = DMA_REQUEST_UART1_RX;
+ g_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ g_param.srcBurst = DMA_BURST_LENGTH_1;
+ g_param.destBurst = DMA_BURST_LENGTH_1;
+ g_param.pHandle = &g_dmac;
+ HAL_DMA_InitChannel(&g_dmac, &g_param, channel);
+ unsigned int ret;
+ ret = HAL_DMA_StartIT(&g_dmac, (uintptr_t)(void *)&(g_uart1.baseAddress->UART_DR),
+ (uintptr_t)(void *)&(g_uart0.baseAddress->UART_DR), 8, channel); /* Tx length is 8 */
+ if (ret == BASE_STATUS_ERROR) {
+ DBG_PRINTF("HAL_DMA_StartIT: BASE_STATUS_ERROR\r\n");
+ } else {
+ g_uart1.baseAddress->UART_DMACR.BIT.rxdmae = BASE_CFG_ENABLE;
+ g_uart0.baseAddress->UART_DMACR.BIT.txdmae = BASE_CFG_ENABLE;
+ }
+ return 0;
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/inc/sample_flash_blocking.h b/drivers_sample/flash/sample_flash_blocking/inc/sample_flash_blocking.h
new file mode 100644
index 000000000..28a94c3af
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/inc/sample_flash_blocking.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_blocking.h
+ * @author MCU Driver Team
+ * @brief FLASH module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the FLASH.
+ */
+#ifndef McuMagicTag_SAMPLE_EFLASH_BLOCKING_H
+#define McuMagicTag_SAMPLE_EFLASH_BLOCKING_H
+
+void FlashBlockingProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/init/main.c b/drivers_sample/flash/sample_flash_blocking/init/main.c
new file mode 100644
index 000000000..0fbfd61e9
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/init/main.c
@@ -0,0 +1,34 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_flash_blocking.h"
+
+UART_Handle g_uart0;
+
+int main(void)
+{
+ FlashBlockingProcessing();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/init/main.h b/drivers_sample/flash/sample_flash_blocking/init/main.h
new file mode 100644
index 000000000..e9b54f86f
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/init/main.h
@@ -0,0 +1,43 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/init/system_init.c b/drivers_sample/flash/sample_flash_blocking/init/system_init.c
new file mode 100644
index 000000000..12a1fff57
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/init/system_init.c
@@ -0,0 +1,91 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/readme.md b/drivers_sample/flash/sample_flash_blocking/readme.md
new file mode 100644
index 000000000..be9fffa7a
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/readme.md
@@ -0,0 +1,19 @@
+# 配置FLASH以阻塞方式进行擦除、写入，通过Debug串口打印读取的操作数据
+## 关键字: FLASH, 擦除，写入，读取，阻塞方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、FLASH控制器初始化和功能配置。通过阻塞方式对FLASH的PAGE 15区域进行擦除、写入操作，通过Debug串口打印读取的操作数据。
+
+**【示例配置】**
++ FLASH操作内存选择：示例代码中选择了FLASH的PAGE 15区域进行操作，也可以选择其他FLASH的其它PAGE X进行操作。
+
++ FLASH初始化：调用接口"HAL_FLASH_Init()”完成对示例代码中FLASH的基地址、PE（擦除、写入方式）方式进行配置。
+
++ 操作FLASH PAGE 15进行擦除、写入、读取操作：通过调用 "HAL_FLASH_EraseBlocking()"接口以阻塞方式实现对目标页的擦除；通过调用"HAL_FLASH_WriteBlocking()"接口以阻塞方式实现将数据写入到目标页中；通过调用"HAL_FLASH_Read()"接口实现对目标页内容的读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次对FLASH的目标页进行擦除、写入、读取测试。功能正常时Debug串口打印成功log信息及读取的数据内容；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 对FLASH进行擦除和写操作时需谨慎操作，避免对存放运行程序代码的分区进行擦、写操作，否则会导致运行出错。
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking/src/sample_flash_blocking.c b/drivers_sample/flash/sample_flash_blocking/src/sample_flash_blocking.c
new file mode 100644
index 000000000..19c18b036
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking/src/sample_flash_blocking.c
@@ -0,0 +1,95 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_blocking.c
+ * @author MCU Driver Team
+ * @brief Sample for Flash Module Blocking.
+ * @details This file provides sample code for users to operate the flash memory in blocking mode.
+ * This example code operates on page15 of the flash memory. (Be careful when performing the flash erasing
+ * operation to avoid damaging the running program code).
+ * This sample code demonstrates how to use the module initialization, read, write, and erase interfaces by
+ * operating on page 15 of the flash memory. The operation data is printed and output through the serial port.
+ */
+#include "main.h"
+#include "flash.h"
+#include "debug.h"
+#include "sample_flash_blocking.h"
+
+#define FLASH_TEMP_DATA_SIZE 4096
+
+#define FLASH_SAMPLE_ERASE_NUM 1 /* Number of flash pages erased at a time */
+#define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_9 /* The erase address must be 8k aligned. */
+#define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_9 /* The read address must be byte-aligned. */
+#define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_9 /* The write address must be 16-byte aligned. */
+
+static FLASH_Handle g_flashBlockingHandle;
+static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0};
+
+/**
+ * @brief Flash bloccking sample init.
+ * @param None
+ * @retval None
+ */
+static void FlashBlockingInit(void)
+{
+ g_flashBlockingHandle.baseAddress = EFC;
+ g_flashBlockingHandle.peMode = FLASH_PE_OP_BLOCK;
+ HAL_FLASH_Init(&g_flashBlockingHandle);
+}
+
+/**
+ * @brief Flash bloccking sample processing.
+ * @param None
+ * @retval None
+ */
+void FlashBlockingProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0};
+
+ SystemInit();
+ FlashBlockingInit();
+ for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) {
+ g_tempData[i] = 0xA5;
+ }
+
+ ret = HAL_FLASH_EraseBlocking(&g_flashBlockingHandle, FLASH_ERASE_MODE_PAGE,
+ FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR);
+ }
+
+ ret = HAL_FLASH_WriteBlocking(&g_flashBlockingHandle, (uintptr_t)g_tempData,
+ FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR);
+ }
+
+ ret = HAL_FLASH_Read(&g_flashBlockingHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE,
+ dataBuff, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE);
+ }
+ DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR);
+ for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) {
+ DBG_PRINTF("%x ", dataBuff[i]);
+ }
+ DBG_PRINTF("\r\n");
+ while (1) {
+ ;
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/inc/sample_flash_blocking_mode.h b/drivers_sample/flash/sample_flash_blocking_mode/inc/sample_flash_blocking_mode.h
new file mode 100644
index 000000000..34b203a44
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/inc/sample_flash_blocking_mode.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_blocking_mode.h
+ * @author MCU Driver Team
+ * @brief FLASH module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the FLASH.
+ */
+#ifndef McuMagicTag_SAMPLE_EFLASH_BLOCKING_MODE_H
+#define McuMagicTag_SAMPLE_EFLASH_BLOCKING_MODE_H
+
+void FlashBlockingProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/init/main.c b/drivers_sample/flash/sample_flash_blocking_mode/init/main.c
new file mode 100644
index 000000000..f3372a5f2
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_flash_blocking_mode.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ FlashBlockingProcessing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/init/main.h b/drivers_sample/flash/sample_flash_blocking_mode/init/main.h
new file mode 100644
index 000000000..4d9eb3456
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/init/system_init.c b/drivers_sample/flash/sample_flash_blocking_mode/init/system_init.c
new file mode 100644
index 000000000..85672d703
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/init/system_init.c
@@ -0,0 +1,95 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/readme.md b/drivers_sample/flash/sample_flash_blocking_mode/readme.md
new file mode 100644
index 000000000..63ca3f06f
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/readme.md
@@ -0,0 +1,19 @@
+# 配置FLASH以阻塞方式进行擦除、写入，通过Debug串口打印读取的操作数据
+## 关键字: FLASH, 擦除，写入，读取，阻塞方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、FLASH控制器初始化和功能配置。通过阻塞方式对FLASH的PAGE 58-61区域进行擦除、写入操作，通过Debug串口打印读取的操作数据。
+
+**【示例配置】**
++ FLASH操作内存选择：示例代码中选择了FLASH的PAGE 58-61区域进行操作，也可以选择其他FLASH的其它PAGE X进行操作。
+
++ FLASH初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中FLASH的基地址、PE（擦除、写入方式）方式进行配置。
+
++ 操作FLASH PAGE 58-61进行擦除、写入、读取操作：通过调用 "HAL_FLASH_EraseBlocking()"接口以阻塞方式实现对目标页的擦除；通过调用"HAL_FLASH_WriteBlocking()"接口以阻塞方式实现将数据写入到目标页中；通过调用"HAL_FLASH_Read()"接口实现对目标页内容的读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次对FLASH的目标页进行擦除、写入、读取测试。功能正常时Debug串口打印成功log信息及读取的数据内容；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 对FLASH进行擦除和写操作时需谨慎操作，避免对存放运行程序代码的分区进行擦、写操作，否则会导致运行出错。
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_blocking_mode/src/sample_flash_blocking_mode.c b/drivers_sample/flash/sample_flash_blocking_mode/src/sample_flash_blocking_mode.c
new file mode 100644
index 000000000..57e1f2b19
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_blocking_mode/src/sample_flash_blocking_mode.c
@@ -0,0 +1,95 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_blocking_mode.c
+ * @author MCU Driver Team
+ * @brief Sample for Flash Module Blocking.
+ * @details This file provides sample code for users to operate the flash memory in blocking mode.
+ * This example code operates on page58-page61 of the flash memory. (Be careful when
+ * performing the flash erasing operation to avoid damaging the running program code).
+ * This sample code demonstrates how to use the module initialization, read, write, and erase interfaces by
+ * operating on page58-page61 of the flash memory. The operation data is printed
+ * and output through the serial port.
+ */
+#include "main.h"
+#include "flash.h"
+#include "debug.h"
+#include "sample_flash_blocking_mode.h"
+
+#define FLASH_TEMP_DATA_SIZE 4096
+
+#define FLASH_SAMPLE_ERASE_NUM 4 /* Number of flash pages erased at a time */
+#define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_58 /* The erase address must be 1k aligned. */
+#define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_58 /* The read address must be byte-aligned. */
+#define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_58 /* The write address must be 16-byte aligned. */
+
+static FLASH_Handle g_flashBlockingHandle;
+static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0};
+
+/**
+ * @brief Flash bloccking sample init.
+ * @param None
+ * @retval None
+ */
+static void FlashBlockingInit(void)
+{
+ g_flashBlockingHandle.baseAddress = EFC;
+ g_flashBlockingHandle.peMode = FLASH_PE_OP_BLOCK;
+ HAL_FLASH_Init(&g_flashBlockingHandle);
+}
+
+/**
+ * @brief Flash bloccking sample processing.
+ * @param None
+ * @retval None
+ */
+void FlashBlockingProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0};
+
+ SystemInit();
+ FlashBlockingInit();
+ /* Configure data to be written. */
+ for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) {
+ g_tempData[i] = 0xA5;
+ }
+ /* Perform the erase operation. */
+ ret = HAL_FLASH_EraseBlocking(&g_flashBlockingHandle, FLASH_ERASE_MODE_PAGE,
+ FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR);
+ }
+ /* Perform the programe operation. */
+ ret = HAL_FLASH_WriteBlocking(&g_flashBlockingHandle, (uintptr_t)g_tempData,
+ FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR);
+ }
+ /* Perform the read operation. */
+ ret = HAL_FLASH_Read(&g_flashBlockingHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE,
+ dataBuff, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE);
+ }
+ DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR);
+ for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) {
+ DBG_PRINTF("%x ", dataBuff[i]);
+ }
+ DBG_PRINTF("\r\n");
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/inc/sample_flash_interrupt.h b/drivers_sample/flash/sample_flash_interrupt/inc/sample_flash_interrupt.h
new file mode 100644
index 000000000..273426f7b
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/inc/sample_flash_interrupt.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_interrupt.h
+ * @author MCU Driver Team
+ * @brief FLASH module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the FLASH.
+ */
+#ifndef McuMagicTag_SAMPLE_EFLASH_INTERRUPT_H
+#define McuMagicTag_SAMPLE_EFLASH_INTERRUPT_H
+
+void FlashInterruptProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/init/main.c b/drivers_sample/flash/sample_flash_interrupt/init/main.c
new file mode 100644
index 000000000..c81f9dae8
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/init/main.c
@@ -0,0 +1,34 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_flash_interrupt.h"
+
+UART_Handle g_uart0;
+
+int main(void)
+{
+ FlashInterruptProcessing();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/init/main.h b/drivers_sample/flash/sample_flash_interrupt/init/main.h
new file mode 100644
index 000000000..e9b54f86f
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/init/main.h
@@ -0,0 +1,43 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/init/system_init.c b/drivers_sample/flash/sample_flash_interrupt/init/system_init.c
new file mode 100644
index 000000000..12a1fff57
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/init/system_init.c
@@ -0,0 +1,91 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/readme.md b/drivers_sample/flash/sample_flash_interrupt/readme.md
new file mode 100644
index 000000000..724032ac9
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/readme.md
@@ -0,0 +1,19 @@
+# 配置FLASH以中断方式进行擦除、写入，通过Debug串口打印读取操作数据
+## 关键字: FLASH, 擦除，写入，读取，中断方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、FLASH控制器初始化和功能配置。通过中断方式对FLASH的PAGE 15区域进行擦除、写入，通过Debug串口打印读取的操作数据。
+
+**【示例配置】**
++ FLASH操作内存选择：示例代码中选择了FLASH的PAGE 15区域进行操作，也可以选择其他FLASH的其它PAGE X进行操作。
+
++ FLASH初始化：调用接口"HAL_FLASH_Init()”完成对示例代码中FLASH的基地址、PE（擦除、写入方式）方式、回调函数、中断号进行配置。
+
++ 操作FLASH PAGE 15进行擦除、写入、读取操作：通过调用 "HAL_FLASH_EraseIT()"接口以中断方式实现对目标页的擦除；通过调用"HAL_FLASH_WriteIT()"接口以中断方式实现将数据写入到目标页中；通过调用"HAL_FLASH_Read()"接口实现对目标页内容的读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次对FLASH的目标页进行擦除、写入、读取测试。功能正常时Debug串口打印成功log信息及读取的数据内容；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 对FLASH进行擦除和写操作时需谨慎操作，避免对存放运行程序代码的分区进行擦、写操作，否则会导致运行出错。
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt/src/sample_flash_interrupt.c b/drivers_sample/flash/sample_flash_interrupt/src/sample_flash_interrupt.c
new file mode 100644
index 000000000..04afe1926
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt/src/sample_flash_interrupt.c
@@ -0,0 +1,149 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_interrupt.c
+ * @author MCU Driver Team
+ * @brief Sample for Flash Module Interrupt.
+ * @details This file provides sample code for users to operate the flash memory in Interrupt mode.
+ * This example code operates on page15 of the flash memory. (Be careful when performing the flash erasing
+ * operation to avoid damaging the running program code).
+ * This sample code demonstrates how to use the module initialization, read, write, and erase interfaces by
+ * operating on page 15 of the flash memory. The operation data is printed and output through the serial port.
+ */
+#include "main.h"
+#include "flash.h"
+#include "debug.h"
+#include "sample_flash_interrupt.h"
+
+#define FLASH_SAMPLE_FLAG_UNSET 0
+#define FLASH_SAMPLE_FLAG_SET 1
+
+#define FLASH_TEMP_DATA_SIZE 4096
+
+#define FLASH_SAMPLE_ERASE_NUM 1 /* Number of flash pages erased at a time */
+#define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_9 /* The erase address must be 8k aligned. */
+#define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_9 /* The read address must be byte-aligned. */
+#define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_9 /* The write address must be 16-byte aligned. */
+
+static FLASH_Handle g_flashInterruptHandle;
+static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0};
+static volatile unsigned int g_eraseDoneFlag = FLASH_SAMPLE_FLAG_UNSET;
+static volatile unsigned int g_writeDoneFlag = FLASH_SAMPLE_FLAG_UNSET;
+
+/**
+ * @brief Flash interrupt sample handle.
+ * @param handle Flash handle.
+ * @param event Flash callback event.
+ * @param opAddr Current operation address.
+ * @retval None
+ */
+static void FlashInterruptHandle(void *handle, FLASH_CallBackEvent event, unsigned int opAddr)
+{
+ BASE_FUNC_UNUSED(handle);
+ switch (event) {
+ case FLASH_WRITE_EVENT_SUCCESS : /* One-time write success callback. */
+ DBG_PRINTF("write success \r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_WRITE_EVENT_DONE : /* All content is written. */
+ g_writeDoneFlag = FLASH_SAMPLE_FLAG_SET;
+ DBG_PRINTF("write done \r\n");
+ break;
+ case FLASH_WRITE_EVENT_FAIL : /* Write failed. */
+ DBG_PRINTF("wtite failed\r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_ERASE_EVENT_SUCCESS : /* One-time erase success callback. */
+ DBG_PRINTF("erase success \r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_ERASE_EVENT_DONE: /* All erase operations are complete. */
+ g_eraseDoneFlag = FLASH_SAMPLE_FLAG_SET;
+ DBG_PRINTF("erase done \r\n");
+ break;
+ case FLASH_ERASE_EVENT_FAIL : /* Erase failed. */
+ DBG_PRINTF("erase failed\r\n 0x%x \r\n", opAddr);
+ break;
+ default :
+ break;
+ }
+}
+
+/**
+ * @brief Flash interrupt sample init.
+ * @param None
+ * @retval None
+ */
+static void FlashInterruptInit(void)
+{
+ g_flashInterruptHandle.baseAddress = EFC;
+ g_flashInterruptHandle.peMode = FLASH_PE_OP_IT;
+ HAL_FLASH_Init(&g_flashInterruptHandle);
+ HAL_FLASH_RegisterCallback(&g_flashInterruptHandle, FlashInterruptHandle);
+
+ IRQ_Register(IRQ_EFC, HAL_FLASH_IrqHandler, &g_flashInterruptHandle);
+ IRQ_Register(IRQ_EFC_ERR, HAL_FLASH_IrqHandlerError, &g_flashInterruptHandle);
+ IRQ_SetPriority(IRQ_EFC_ERR, 1); /* set flash interrupt priority to 1 */
+ IRQ_SetPriority(IRQ_EFC, 1); /* set flash interrupt priority to 1 */
+ IRQ_EnableN(IRQ_EFC);
+ IRQ_EnableN(IRQ_EFC_ERR);
+}
+
+/**
+ * @brief Flash interrupt sample processing.
+ * @param None
+ * @retval None
+ */
+void FlashInterruptProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0};
+
+ SystemInit();
+ FlashInterruptInit();
+ for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) {
+ g_tempData[i] = 0x5A;
+ }
+
+ ret = HAL_FLASH_EraseIT(&g_flashInterruptHandle, FLASH_ERASE_MODE_PAGE,
+ FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR);
+ }
+ while (g_eraseDoneFlag == FLASH_SAMPLE_FLAG_UNSET) {
+ ;
+ }
+
+ ret = HAL_FLASH_WriteIT(&g_flashInterruptHandle, (uintptr_t)g_tempData,
+ FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR);
+ }
+ while (g_writeDoneFlag == FLASH_SAMPLE_FLAG_UNSET) {
+ ;
+ }
+ ret = HAL_FLASH_Read(&g_flashInterruptHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE,
+ dataBuff, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE);
+ }
+ DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR);
+ for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) {
+ DBG_PRINTF("%x ", dataBuff[i]);
+ }
+ DBG_PRINTF("\r\n");
+ while (1) {
+ ;
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/inc/sample_flash_interrupt_mode.h b/drivers_sample/flash/sample_flash_interrupt_mode/inc/sample_flash_interrupt_mode.h
new file mode 100644
index 000000000..8ae6d5609
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/inc/sample_flash_interrupt_mode.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_interrupt_mode.h
+ * @author MCU Driver Team
+ * @brief FLASH module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the FLASH.
+ */
+#ifndef McuMagicTag_SAMPLE_EFLASH_INTERRUPT_MODE_H
+#define McuMagicTag_SAMPLE_EFLASH_INTERRUPT_MODE_H
+
+void FlashInterruptProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/init/main.c b/drivers_sample/flash/sample_flash_interrupt_mode/init/main.c
new file mode 100644
index 000000000..4b521d02a
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_flash_interrupt_mode.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ FlashInterruptProcessing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/init/main.h b/drivers_sample/flash/sample_flash_interrupt_mode/init/main.h
new file mode 100644
index 000000000..4d9eb3456
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/init/system_init.c b/drivers_sample/flash/sample_flash_interrupt_mode/init/system_init.c
new file mode 100644
index 000000000..76d16b56d
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/init/system_init.c
@@ -0,0 +1,94 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/readme.md b/drivers_sample/flash/sample_flash_interrupt_mode/readme.md
new file mode 100644
index 000000000..ab52ee138
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/readme.md
@@ -0,0 +1,19 @@
+# 配置FLASH以中断方式进行擦除、写入，通过Debug串口打印读取操作数据
+## 关键字: FLASH, 擦除，写入，读取，中断方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、FLASH控制器初始化和功能配置。通过中断方式对FLASH的PAGE 58-61区域进行擦除、写入，通过Debug串口打印读取的操作数据。
+
+**【示例配置】**
++ FLASH操作内存选择：示例代码中选择了FLASH的PAGE 58-61区域进行操作，也可以选择其他FLASH的其它PAGE X进行操作。
+
++ FLASH初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中FLASH的基地址、PE（擦除、写入方式）方式、回调函数、中断号进行配置。
+
++ 操作FLASH PAGE 58-61进行擦除、写入、读取操作：通过调用 "HAL_FLASH_EraseIT()"接口以中断方式实现对目标页的擦除；通过调用"HAL_FLASH_WriteIT()"接口以中断方式实现将数据写入到目标页中；通过调用"HAL_FLASH_Read()"接口实现对目标页内容的读取。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次对FLASH的目标页进行擦除、写入、读取测试。功能正常时Debug串口打印成功log信息及读取的数据内容；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 对FLASH进行擦除和写操作时需谨慎操作，避免对存放运行程序代码的分区进行擦、写操作，否则会导致运行出错。
\ No newline at end of file
diff --git a/drivers_sample/flash/sample_flash_interrupt_mode/src/sample_flash_interrupt_mode.c b/drivers_sample/flash/sample_flash_interrupt_mode/src/sample_flash_interrupt_mode.c
new file mode 100644
index 000000000..e2656c49f
--- /dev/null
+++ b/drivers_sample/flash/sample_flash_interrupt_mode/src/sample_flash_interrupt_mode.c
@@ -0,0 +1,151 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_flash_interrupt_mode.c
+ * @author MCU Driver Team
+ * @brief Sample for Flash Module Interrupt.
+ * @details This file provides sample code for users to operate the flash memory in Interrupt mode.
+ * This example code operates on page58-page61 of the flash memory. (Be careful when
+ * performing the flash erasing operation to avoid damaging the running program code).
+ * This sample code demonstrates how to use the module initialization, read, write, and erase interfaces by
+ * operating on page58-page61 of the flash memory. The operation data is printed
+ * and output through the serial port.
+ */
+#include "main.h"
+#include "flash.h"
+#include "debug.h"
+#include "sample_flash_interrupt_mode.h"
+
+#define FLASH_SAMPLE_FLAG_UNSET 0
+#define FLASH_SAMPLE_FLAG_SET 1
+
+#define FLASH_TEMP_DATA_SIZE 4096
+
+#define FLASH_SAMPLE_ERASE_NUM 4 /* Number of flash pages erased at a time */
+#define FLASH_SAMPLE_ERASE_START_ADDR FLASH_PAGE_58 /* The erase address must be 1k aligned. */
+#define FLASH_SAMPLE_READ_START_ADDR FLASH_PAGE_58 /* The read address must be byte-aligned. */
+#define FLASH_SAMPLE_WRITE_START_ADDR FLASH_PAGE_58 /* The write address must be 16-byte aligned. */
+
+static FLASH_Handle g_flashInterruptHandle;
+static unsigned char g_tempData[FLASH_TEMP_DATA_SIZE] = {0};
+static volatile unsigned int g_eraseDoneFlag = FLASH_SAMPLE_FLAG_UNSET;
+static volatile unsigned int g_writeDoneFlag = FLASH_SAMPLE_FLAG_UNSET;
+
+/**
+ * @brief Flash interrupt sample handle.
+ * @param handle Flash handle.
+ * @param event Flash callback event.
+ * @param opAddr Current operation address.
+ * @retval None
+ */
+static void FlashInterruptHandle(void *handle, FLASH_CallBackEvent event, unsigned int opAddr)
+{
+ BASE_FUNC_UNUSED(handle);
+ switch (event) {
+ case FLASH_WRITE_EVENT_SUCCESS : /* One-time write success callback. */
+ DBG_PRINTF("write success \r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_WRITE_EVENT_DONE : /* All content is written. */
+ g_writeDoneFlag = FLASH_SAMPLE_FLAG_SET;
+ DBG_PRINTF("write done \r\n");
+ break;
+ case FLASH_WRITE_EVENT_FAIL : /* Write failed. */
+ DBG_PRINTF("wtite failed\r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_ERASE_EVENT_SUCCESS : /* One-time erase success callback. */
+ DBG_PRINTF("erase success \r\n 0x%x \r\n", opAddr);
+ break;
+ case FLASH_ERASE_EVENT_DONE: /* All erase operations are complete. */
+ g_eraseDoneFlag = FLASH_SAMPLE_FLAG_SET;
+ DBG_PRINTF("erase done \r\n");
+ break;
+ case FLASH_ERASE_EVENT_FAIL : /* Erase failed. */
+ DBG_PRINTF("erase failed\r\n 0x%x \r\n", opAddr);
+ break;
+ default :
+ break;
+ }
+}
+
+/**
+ * @brief Flash interrupt sample init.
+ * @param None
+ * @retval None
+ */
+static void FlashInterruptInit(void)
+{
+ g_flashInterruptHandle.baseAddress = EFC;
+ g_flashInterruptHandle.peMode = FLASH_PE_OP_IT;
+ HAL_FLASH_Init(&g_flashInterruptHandle);
+ HAL_FLASH_RegisterCallback(&g_flashInterruptHandle, FlashInterruptHandle);
+
+ IRQ_Register(IRQ_EFC, HAL_FLASH_IrqHandler, &g_flashInterruptHandle);
+ IRQ_Register(IRQ_EFC_ERR, HAL_FLASH_IrqHandlerError, &g_flashInterruptHandle);
+ IRQ_SetPriority(IRQ_EFC_ERR, 1); /* set gpio1 interrupt priority to 1, 1~15 */
+ IRQ_SetPriority(IRQ_EFC, 1); /* set gpio1 interrupt priority to 1, 1~15 */
+ IRQ_EnableN(IRQ_EFC);
+ IRQ_EnableN(IRQ_EFC_ERR);
+}
+
+/**
+ * @brief Flash interrupt sample processing.
+ * @param None
+ * @retval None
+ */
+void FlashInterruptProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned char dataBuff[FLASH_TEMP_DATA_SIZE + 1] = {0};
+
+ SystemInit();
+ FlashInterruptInit();
+ /* Configure data to be written. */
+ for (unsigned int i = 0 ; i < FLASH_TEMP_DATA_SIZE; i++) {
+ g_tempData[i] = 0x5A;
+ }
+ /* Perform the erase operation. */
+ ret = HAL_FLASH_EraseIT(&g_flashInterruptHandle, FLASH_ERASE_MODE_PAGE,
+ FLASH_SAMPLE_ERASE_START_ADDR, FLASH_SAMPLE_ERASE_NUM);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Erase:0x%x fail\r\n ", FLASH_SAMPLE_ERASE_START_ADDR);
+ }
+ while (g_eraseDoneFlag == FLASH_SAMPLE_FLAG_UNSET) {
+ ;
+ }
+ /* Perform the programe operation. */
+ ret = HAL_FLASH_WriteIT(&g_flashInterruptHandle, (uintptr_t)g_tempData,
+ FLASH_SAMPLE_WRITE_START_ADDR, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Write:0x%x fail\r\n ", FLASH_SAMPLE_WRITE_START_ADDR);
+ }
+ while (g_writeDoneFlag == FLASH_SAMPLE_FLAG_UNSET) {
+ ;
+ }
+ /* Perform the read operation. */
+ ret = HAL_FLASH_Read(&g_flashInterruptHandle, FLASH_SAMPLE_READ_START_ADDR, FLASH_TEMP_DATA_SIZE,
+ dataBuff, FLASH_TEMP_DATA_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("Read:0x%x fail\r\n ", FLASH_TEMP_DATA_SIZE);
+ }
+ /* Printf the contents read from the flash memory. */
+ DBG_PRINTF("read addr :0x%x \r\n ", FLASH_SAMPLE_READ_START_ADDR);
+ for (unsigned int i = 0; i < FLASH_TEMP_DATA_SIZE; i++) {
+ DBG_PRINTF("%x ", dataBuff[i]);
+ }
+ DBG_PRINTF("\r\n");
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/inc/gpio_circle_sample.h b/drivers_sample/gpio/sample_gpio_circle/inc/gpio_circle_sample.h
new file mode 100644
index 000000000..144adb00b
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/inc/gpio_circle_sample.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_circle_sample.h
+ * @author MCU Driver Team
+ * @brief GPIO module sample
+ * @details This file provides sample code for users to help use
+ * the circle input/output level of two GPIO groups.
+ */
+
+#ifndef GPIO_CIRCLE_SAMPLE_H
+#define GPIO_CIRCLE_SAMPLE_H
+
+BASE_StatusType GPIO_CircleSample(void);
+
+#endif /* GPIO_CIRCLE_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/init/main.c b/drivers_sample/gpio/sample_gpio_circle/init/main.c
new file mode 100644
index 000000000..ad37d3921
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "gpio_circle_sample.h"
+
+UART_Handle g_uart0;
+
+GPIO_Handle g_targetHandle;
+GPIO_Handle g_refHandle;
+
+int main(void)
+{
+ GPIO_CircleSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/init/main.h b/drivers_sample/gpio/sample_gpio_circle/init/main.h
new file mode 100644
index 000000000..98e52e3b2
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/init/main.h
@@ -0,0 +1,47 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "gpio.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern GPIO_Handle g_targetHandle;
+extern GPIO_Handle g_refHandle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/init/system_init.c b/drivers_sample/gpio/sample_gpio_circle/init/system_init.c
new file mode 100644
index 000000000..a5edf0d67
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/init/system_init.c
@@ -0,0 +1,123 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void GPIO_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPIO0_BASE, IP_CLK_ENABLE);
+ g_targetHandle.baseAddress = GPIO2; /* GPIO group */
+ g_targetHandle.dir = GPIO_INPUT_MODE;
+ g_targetHandle.value = GPIO_LOW_LEVEL;
+ g_targetHandle.interruptMode = GPIO_INT_TYPE_NONE;
+ g_targetHandle.pins = GPIO_PIN_0; /* PIN in group */
+ HAL_GPIO_Init(&g_targetHandle);
+
+ HAL_CRG_IpEnableSet(GPIO1_BASE, IP_CLK_ENABLE);
+ g_refHandle.baseAddress = GPIO1; /* GPIO group */
+ g_refHandle.dir = GPIO_OUTPUT_MODE;
+ g_refHandle.value = GPIO_LOW_LEVEL;
+ g_refHandle.interruptMode = GPIO_INT_TYPE_NONE;
+ g_refHandle.pins = GPIO_PIN_0; /* PIN in group */
+ HAL_GPIO_Init(&g_refHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_0.BIT.func = 0x0; /* 0x0 is GPIO0_0 */
+ iconfig->iocmg_0.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_0.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_0.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_0.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_0.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_11.BIT.func = 0x0; /* 0x0 is GPIO1_0 */
+ iconfig->iocmg_11.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_11.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_11.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_11.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_11.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPIO_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/readme.md b/drivers_sample/gpio/sample_gpio_circle/readme.md
new file mode 100644
index 000000000..796e8f3f2
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/readme.md
@@ -0,0 +1,22 @@
+# 配置GPIO的方向与电平功能，实现GPIO两个管脚的环回测试
+## 关键字: GPIO, 管脚方向，管脚电平，环回测试
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、GPIO控制器初始化和功能配置。在GPIO的回环测试中使用GPIO的两个管脚，一个用于输入信号，另一个用于输出信号，将两个GPIO管脚连接验证GPIO的电平和方向功能；然后将GPIO管脚的角色反转再进行方向和电平功能验证，实现环回测试。
+
+**【示例配置】**
++ GPIO管脚选择：示例代码中选择了两个GPIO管脚用于环回测试。也可以选择其他GPIO管脚用于环回测试，在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX，g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。
+
++ GPIO管脚初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO两个管脚的方向、电平、中断模式配置。在进行GPIO管脚配置时，需将其中一个管脚配置成输入模式、低电平、不使用中断模式，将另一个管脚配置成输出模式、低电平、不使用中断模式。
+
++ GPIO环回实验过程：
+ 1. 对于输出管脚调用接口"HAL_GPIO_SetValue()"用于切换输出管脚的电平值，对于输入管脚调用接口"HAL_GPIO_GetPinValue()"实现对输入电平值的获取，比较输入管脚获取的电平与输出管脚输出的电平，测试管脚电平输出、电平输入功能；
+ 2. 调用接口"HAL_GPIO_SetDirection()"切换输入管脚与输出管脚的角色；
+ 3. 再执行步骤1，测试管脚的电平输出、电平输入功能。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次对两个GPIO管脚进行方向、电平功能测试。功能正常时Debug串口打印成功log信息；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中使用GPIO两个管脚需连接在一起。
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_circle/src/gpio_circle_sample.c b/drivers_sample/gpio/sample_gpio_circle/src/gpio_circle_sample.c
new file mode 100644
index 000000000..e94e5c6e8
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_circle/src/gpio_circle_sample.c
@@ -0,0 +1,99 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_circle_sample.c
+ * @author MCU Driver Team
+ * @brief GPIO module circle sample
+ * @details Two groups of GPIOs are configured. One group is used to transmit signals and \
+ * the other group is used to receive signals. Then, a loopback is formed. The pin numbers of the \
+ * two groups correspond to the level and direction functions of the GPIOs. If the hardware environment \
+ * does not support this function, you need to set up an environment for verification.
+ */
+
+/* ---------------------------------- Includes -------------------------------- */
+#include "debug.h"
+#include "gpio.h"
+#include "main.h"
+#include "gpio_circle_sample.h"
+
+/* ---------------------------------- Sample Parameters -------------------------------- */
+static BASE_StatusType GpioLoopBackTest(void);
+/**
+ * @brief Handle GPIO circle loopBack sample.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+BASE_StatusType GPIO_CircleSample(void)
+{
+ SystemInit();
+
+ if (GpioLoopBackTest() == BASE_STATUS_ERROR) {
+ return BASE_STATUS_ERROR;
+ }
+ return BASE_STATUS_OK;
+}
+/**
+ * @brief Handle GPIO loopBack test.
+ * @retval Value of @ref BASE_StatusType.
+ */
+static BASE_StatusType GpioLoopBackTest(void)
+{
+ GPIO_Value ret;
+ /* Configure refHandle output and targetHandle input, Test Circle: refHandle -> targetHandle */
+ HAL_GPIO_SetDirection(&TARGET_HANDLE, TARGET_PIN, GPIO_INPUT_MODE);
+ HAL_GPIO_SetDirection(&REF_HANDLE, REF_PIN, GPIO_OUTPUT_MODE);
+ HAL_GPIO_SetValue(&REF_HANDLE, REF_PIN, GPIO_HIGH_LEVEL); /* set refHandle high level */
+ BASE_FUNC_DELAY_MS(1); /* 1: Wait 1ms for the level signal to stabilize. */
+ ret = HAL_GPIO_GetPinValue(&TARGET_HANDLE, TARGET_PIN); /* get targetHandle's level */
+ if (ret != GPIO_HIGH_LEVEL) {
+ DBG_PRINTF("ref GPIO output to target GPIO high level error!\r\n");
+ return BASE_STATUS_ERROR;
+ } else {
+ DBG_PRINTF("ref GPIO output to target GPIO high level success!\r\n");
+ }
+ HAL_GPIO_SetValue(&REF_HANDLE, REF_PIN, GPIO_LOW_LEVEL); /* set refHandle low level */
+ BASE_FUNC_DELAY_MS(1); /* 1: Wait 1ms for the level signal to stabilize. */
+ ret = HAL_GPIO_GetPinValue(&TARGET_HANDLE, TARGET_PIN); /* get targetHandle's level */
+ if (ret != GPIO_LOW_LEVEL) {
+ DBG_PRINTF("ref GPIO output to target GPIO low level error!\r\n");
+ return BASE_STATUS_ERROR;
+ } else {
+ DBG_PRINTF("ref GPIO output to target GPIO low level success!\r\n");
+ }
+ /* Configure targetHandle output and refHandle input, Test Circle: targetHandle -> refHandle */
+ HAL_GPIO_SetDirection(&TARGET_HANDLE, TARGET_PIN, GPIO_OUTPUT_MODE);
+ HAL_GPIO_SetDirection(&REF_HANDLE, REF_PIN, GPIO_INPUT_MODE);
+ HAL_GPIO_SetValue(&TARGET_HANDLE, TARGET_PIN, GPIO_HIGH_LEVEL); /* set targetHandle high level */
+ BASE_FUNC_DELAY_MS(1); /* 1: Wait 1ms for the level signal to stabilize. */
+ ret = HAL_GPIO_GetPinValue(&REF_HANDLE, REF_PIN); /* get refHandle's level */
+ if (ret != GPIO_HIGH_LEVEL) {
+ DBG_PRINTF("target GPIO output to ref GPIO high level error! \r\n");
+ return BASE_STATUS_ERROR;
+ } else {
+ DBG_PRINTF("target GPIO output to ref GPIO high level success!\r\n");
+ }
+ HAL_GPIO_SetValue(&TARGET_HANDLE, TARGET_PIN, GPIO_LOW_LEVEL); /* set targetHandle high level */
+ BASE_FUNC_DELAY_MS(1); /* 1: Wait 1ms for the level signal to stabilize. */
+ ret = HAL_GPIO_GetPinValue(&REF_HANDLE, REF_PIN); /* get refHandle's level */
+ if (ret != GPIO_LOW_LEVEL) {
+ DBG_PRINTF("target GPIO output to ref GPIO low level error! \r\n");
+ return BASE_STATUS_ERROR;
+ } else {
+ DBG_PRINTF("target GPIO output to ref GPIO low level success!\r\n");
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/inc/gpio_interrupt_sample.h b/drivers_sample/gpio/sample_gpio_interrupt/inc/gpio_interrupt_sample.h
new file mode 100644
index 000000000..b3b2eca26
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/inc/gpio_interrupt_sample.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_interrupt_sample.h
+ * @author MCU Driver Team
+ * @brief GPIO module sample
+ * @details This file provides sample code for users to help use
+ * the register and trigger gpio interrupt.
+ */
+
+#ifndef GPIO_INT_SAMPLE_H
+#define GPIO_INT_SAMPLE_H
+
+void GPIO_InterruptSample(void);
+
+#endif /* GPIO_INT_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/init/main.c b/drivers_sample/gpio/sample_gpio_interrupt/init/main.c
new file mode 100644
index 000000000..cafa0bdc1
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "gpio_interrupt_sample.h"
+
+UART_Handle g_uart0;
+
+GPIO_Handle g_intHandle;
+GPIO_Handle g_trigHandle;
+
+int main(void)
+{
+ GPIO_InterruptSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/init/main.h b/drivers_sample/gpio/sample_gpio_interrupt/init/main.h
new file mode 100644
index 000000000..e95bdb34e
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/init/main.h
@@ -0,0 +1,49 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "gpio.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern GPIO_Handle g_intHandle;
+extern GPIO_Handle g_trigHandle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void GPIO_CallBackFunc(void *param);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/init/system_init.c b/drivers_sample/gpio/sample_gpio_interrupt/init/system_init.c
new file mode 100644
index 000000000..e8fd3a6f7
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/init/system_init.c
@@ -0,0 +1,137 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void GPIO_CallBackFunc(void *param)
+{
+ GPIO_Handle *handle = (GPIO_Handle *)param;
+ /* USER CODE BEGIN GPIO_CallBackFunc */
+ /* USER CODE END GPIO_CallBackFunc */
+ BASE_FUNC_UNUSED(handle);
+}
+
+static void GPIO_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPIO2_BASE, IP_CLK_ENABLE);
+ g_trigHandle.baseAddress = GPIO2;
+ g_trigHandle.dir = GPIO_OUTPUT_MODE;
+ g_trigHandle.value = GPIO_LOW_LEVEL;
+ g_trigHandle.interruptMode = GPIO_INT_TYPE_NONE;
+ g_trigHandle.pins = GPIO_PIN_0;
+ HAL_GPIO_Init(&g_trigHandle);
+
+ HAL_CRG_IpEnableSet(GPIO1_BASE, IP_CLK_ENABLE);
+ g_intHandle.baseAddress = GPIO1;
+ g_intHandle.dir = GPIO_INPUT_MODE;
+ g_intHandle.value = GPIO_LOW_LEVEL;
+ g_intHandle.interruptMode = GPIO_INT_TYPE_HIGH_LEVEL;
+ g_intHandle.pins = GPIO_PIN_0;
+ HAL_GPIO_Init(&g_intHandle);
+ /* Register callback functions to be defined by users. */
+ HAL_GPIO_RegisterCallBack(&g_intHandle, GPIO_PIN_0, GPIO_CallBackFunc);
+ g_intHandle.irqNum = IRQ_GPIO1;
+ HAL_GPIO_IRQService(&g_intHandle); /* Associating irqNum with Callbacks */
+ IRQ_SetPriority(g_intHandle.irqNum, 1); /* set gpio1 interrupt priority to 1, 1~7 */
+ IRQ_EnableN(g_intHandle.irqNum); /* gpio interrupt enable */
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_11.BIT.func = 0x0; /* 0x0 is GPIO1_0 */
+ iconfig->iocmg_11.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_11.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_11.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_11.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_11.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_19.BIT.func = 0x0; /* 0x0 is GPIO2_0 */
+ iconfig->iocmg_19.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_19.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_19.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_19.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_19.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPIO_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/readme.md b/drivers_sample/gpio/sample_gpio_interrupt/readme.md
new file mode 100644
index 000000000..21a7f2bc3
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/readme.md
@@ -0,0 +1,22 @@
+# 配置GPIO管脚的中断功能，实现GPIO不同触发方式下中断功能测试
+## 关键字: GPIO, 中断，触发方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、GPIO控制器初始化和功能配置。在示例代码的中断功能测试中使用GPIO的两个管脚，一个用于输出信号，另一个用于作为中断管脚接收信号，在不同中断方式下触发GPIO的中断功能。
+
+**【示例配置】**
++ GPIO管脚选择：示例代码中选择了两个GPIO管脚用于中断功能测试。也可以选择其他GPIO管脚用于中断功能测试，在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX，g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。
+
++ GPIO管脚初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO两个管脚的方向、电平、中断模式配置。在进行GPIO管脚配置时，需将其中一个管脚配置成输出模式、低电平、不使用中断模式，将另一个管脚配置成输入模式、低电平、高电平中断模式。之后，再调用中断相关接口注册、开启中断功能。
+
++ GPIO中断功能测试过程：
+ 1. 对于输出管脚调用接口"HAL_GPIO_SetValue()"变换管脚输出电平，从而直接或间接构造出高电平、低电平、上升沿、下降沿输出信号；
+ 2. 对于输入管脚调用接口"HAL_GPIO_SetIrqType()"设置管脚不同的中断触发类型；
+ 3. 通过输出管脚和输入管脚的相互配合实现不同触发类型的中断功能测试。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会依次进行不同触发模式的中断功能测试。功能正常时Debug串口打印成功log信息；功能异常时Debug串口打印失败log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中使用GPIO两个管脚需连接在一起。
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_interrupt/src/gpio_interrupt_sample.c b/drivers_sample/gpio/sample_gpio_interrupt/src/gpio_interrupt_sample.c
new file mode 100644
index 000000000..c5e807726
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_interrupt/src/gpio_interrupt_sample.c
@@ -0,0 +1,126 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_interrupt_sample.c
+ * @author MCU Driver Team
+ * @brief GPIO module trigger each interrupt type sample
+ * @details Set two groups of GPIOs. One group is used to provide the trigger condition \
+ * for triggering the interrupt, and the other group is used to provide the interrupt response. The \
+ * pin numbers of the two groups correspond to each other to verify the five interrupt types. If the \
+ * hardware environment does not support this function, you need to set up an environment for verification.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "gpio.h"
+#include "main.h"
+#include "gpio_interrupt_sample.h"
+
+#define GPIO_LEVEL_SHIFT_SAFE_TIME 1
+static bool g_intFlag = false;
+/* prototype functions -------------------------------------------------------*/
+void GPIO_CallBackFunc(void *param);
+static void GPIO_InterruptTest(void);
+/* Macro definitions ---------------------------------------------------------*/
+
+/* ---------------------------------- Sample Parameters -------------------------------- */
+/**
+ * @brief GPIO Interrupt sample.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+void GPIO_InterruptSample(void)
+{
+ SystemInit();
+ DBG_PRINTF("GPIO Interrupt Sample \r\n");
+ GPIO_InterruptTest();
+}
+
+/**
+ * @brief GPIO Interrupt callback function.
+ * @param param Value of @ref GPIO_Handle.
+ * @retval None
+ */
+void GPIO_CallBackFunc(void *param)
+{
+ GPIO_Handle *handle = (GPIO_Handle *)param;
+ GPIO_ASSERT_PARAM(handle != NULL);
+ GPIO_InterruptMode mode = HAL_GPIO_GetPinIrqType(handle, handle->pins);
+ DBG_PRINTF("In intMode[%d]'s callback -- ", mode);
+ if (mode == GPIO_INT_TYPE_HIGH_LEVEL) {
+ /* reverse trigHandle's value */
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_LOW_LEVEL);
+ } else if (mode == GPIO_INT_TYPE_LOW_LEVEL) {
+ /* reverse trigHandle's value */
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_HIGH_LEVEL);
+ }
+ g_intFlag = true;
+}
+/**
+ * @brief Check GPIO Interrupt state.
+ * @param None.
+ * @retval None
+ */
+static void CheckGpioIntState(void)
+{
+ /* true means into interrupt callback, false is not */
+ if (g_intFlag == true) {
+ DBG_PRINTF("success ! \r\n");
+ } else {
+ DBG_PRINTF("fail ! \r\n");
+ }
+ g_intFlag = false; /* resumn status is false */
+}
+/**
+ * @brief GPIO Interrupt test scene one: GPIO2 -> GPIO1.
+ * @param trigHandle the handle provide trig source.
+ * @param intHandle the handle generate interrupt.
+ * @retval None
+ */
+static void GPIO_InterruptTest(void)
+{
+ /* Test high level interrupt type */
+ DBG_PRINTF(" Test high level interrupt type : trig GPIO -> int GPIO high level-------------------- ");
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_HIGH_LEVEL); /* Provide high level trig condition */
+ BASE_FUNC_DELAY_MS(GPIO_LEVEL_SHIFT_SAFE_TIME);
+ CheckGpioIntState();
+ /* Test low level interrupt type */
+ DBG_PRINTF(" Test low level interrupt type : trig GPIO -> int GPIO low level-------------------- ");
+ HAL_GPIO_SetIrqType(&INT_HANDLE, INT_PIN, GPIO_INT_TYPE_LOW_LEVEL); /* change interrupt type to low level */
+ BASE_FUNC_DELAY_MS(GPIO_LEVEL_SHIFT_SAFE_TIME);
+ CheckGpioIntState();
+ /* Test rise level interrupt type */
+ DBG_PRINTF(" Test rise level interrupt type : trig GPIO -> int GPIO rising edge-------------------- ");
+ HAL_GPIO_SetIrqType(&INT_HANDLE, INT_PIN, GPIO_INT_TYPE_RISE_EDGE); /* change interrupt type to rise type */
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_LOW_LEVEL); /* Provide rise level trig condition */
+ BASE_FUNC_DELAY_MS(GPIO_LEVEL_SHIFT_SAFE_TIME);
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_HIGH_LEVEL);
+ CheckGpioIntState();
+ /* Test fall level interrupt type */
+ DBG_PRINTF(" Test fall level interrupt type : trig GPIO -> int GPIO falling edge-------------------- ");
+ HAL_GPIO_SetIrqType(&INT_HANDLE, INT_PIN, GPIO_INT_TYPE_FALL_EDGE); /* change interrupt type to fall type */
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_LOW_LEVEL);
+ BASE_FUNC_DELAY_MS(GPIO_LEVEL_SHIFT_SAFE_TIME);
+ CheckGpioIntState();
+ /* Test high/low both level interrupt type */
+ DBG_PRINTF(" Test high/low both level interrupt type : trig GPIO -> int GPIO both edge-------------------- ");
+ HAL_GPIO_SetIrqType(&INT_HANDLE, INT_PIN, GPIO_INT_TYPE_BOTH_EDGE); /* change interrupt type to both type */
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_HIGH_LEVEL);
+ BASE_FUNC_DELAY_MS(GPIO_LEVEL_SHIFT_SAFE_TIME);
+ HAL_GPIO_SetValue(&TRIG_HANDLE, TRIG_PIN, GPIO_LOW_LEVEL);
+ CheckGpioIntState();
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/inc/gpio_key_sample.h b/drivers_sample/gpio/sample_gpio_key/inc/gpio_key_sample.h
new file mode 100644
index 000000000..e490c9de9
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/inc/gpio_key_sample.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_key_sample.h
+ * @author MCU Driver Team
+ * @brief GPIO module sample
+ * @details This file provides sample code for users to help use
+ * the trigger an interrupt based on the key connected to the GPIO.
+ */
+
+#ifndef GPIO_KEY_SAMPLE_H
+#define GPIO_KEY_SAMPLE_H
+
+BASE_StatusType GPIO_KeySample(void);
+
+#endif /* GPIO_KEY_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/init/main.c b/drivers_sample/gpio/sample_gpio_key/init/main.c
new file mode 100644
index 000000000..f0e073cb1
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "gpio_key_sample.h"
+
+UART_Handle g_uart0;
+
+GPIO_Handle g_keyHandle;
+
+int main(void)
+{
+ GPIO_KeySample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/init/main.h b/drivers_sample/gpio/sample_gpio_key/init/main.h
new file mode 100644
index 000000000..fc21f4530
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/init/main.h
@@ -0,0 +1,48 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "gpio.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern GPIO_Handle g_keyHandle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void GPIO_CallBackFunc(void *param);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/init/system_init.c b/drivers_sample/gpio/sample_gpio_key/init/system_init.c
new file mode 100644
index 000000000..7f07ca92a
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/init/system_init.c
@@ -0,0 +1,121 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void GPIO_CallBackFunc(void *param)
+{
+ GPIO_Handle *handle = (GPIO_Handle *)param;
+ /* USER CODE BEGIN GPIO_CallBackFunc */
+ /* USER CODE END GPIO_CallBackFunc */
+ BASE_FUNC_UNUSED(handle);
+}
+
+static void GPIO_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPIO3_BASE, IP_CLK_ENABLE);
+ g_keyHandle.baseAddress = GPIO3;
+ g_keyHandle.dir = GPIO_INPUT_MODE;
+ g_keyHandle.value = GPIO_LOW_LEVEL;
+ g_keyHandle.interruptMode = GPIO_INT_TYPE_RISE_EDGE;
+ g_keyHandle.pins = GPIO_PIN_0;
+ HAL_GPIO_Init(&g_keyHandle);
+ /* Register callback functions to be defined by users. */
+ HAL_GPIO_RegisterCallBack(&g_keyHandle, GPIO_PIN_0, GPIO_CallBackFunc);
+ g_keyHandle.irqNum = IRQ_GPIO3;
+ HAL_GPIO_IRQService(&g_keyHandle);
+ IRQ_SetPriority(g_keyHandle.irqNum, 1); /* set gpio1 interrupt priority to 1, 1~7 */
+ IRQ_EnableN(g_keyHandle.irqNum); /* gpio interrupt enable */
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_27.BIT.func = 0x0; /* 0x0 is GPIO3_0 */
+ iconfig->iocmg_27.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_27.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_27.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_27.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_27.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPIO_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/readme.md b/drivers_sample/gpio/sample_gpio_key/readme.md
new file mode 100644
index 000000000..93ceff618
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/readme.md
@@ -0,0 +1,17 @@
+# 配置GPIO管脚的中断功能，实现GPIO对按键检测
+## 关键字: GPIO, 中断，按键检测
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、GPIO控制器初始化和功能配置。在示例代码中通过中断的方式实现对按键的检测。
+
+**【示例配置】**
++ GPIO管脚选择：示例代码中选择GPIO管脚用于通过中断方式进行按键检测。也可以选择其他GPIO管脚用于按键检测功能测试，在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX，g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。
+
++ GPIO管脚初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO管脚的方向、电平、中断模式配置。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中在按键没有按下时Debug串口会一直打印等待按键的log信息，当连接的按键按下时功能正常时Debug串口打印成功log信息；功能异常时按下按键时Debug串口还是会一直打印等待按键的log信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中使用的GPIO管脚需和按键连接在一起。
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_key/src/gpio_key_sample.c b/drivers_sample/gpio/sample_gpio_key/src/gpio_key_sample.c
new file mode 100644
index 000000000..6ec5c721c
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_key/src/gpio_key_sample.c
@@ -0,0 +1,65 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_key_sample.c
+ * @author MCU Driver Team
+ * @brief GPIO module realize a key function sample
+ * @details GPIO Capturing Key Triggered Interrupt Service Function. If the hardware environment does \
+ * not support this function, you need to set up an environment for verification.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "gpio.h"
+#include "main.h"
+#include "gpio_key_sample.h"
+
+#define PREVENT_SWIPE_SCREEN_TIME 50
+#define CYCLE_INTERVAL_TIME 500
+
+/* prototype functions -------------------------------------------------------*/
+void GPIO_CallBackFunc(void *param);
+
+/* ---------------------------------- Sample Parameters ---------------------- */
+/**
+ * @brief GPIO key test sample.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+BASE_StatusType GPIO_KeySample(void)
+{
+ SystemInit();
+ /* Waiting for the key to come. */
+ while (1) {
+ DBG_PRINTF("Wait key \r\n");
+ BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME);
+ }
+
+ return BASE_STATUS_OK;
+}
+
+/**
+ * @brief GPIO register interrupt callback function.
+ * @param param Value of @ref GPIO_Handle.
+ * @retval None
+ */
+void GPIO_CallBackFunc(void *param)
+{
+ BASE_FUNC_UNUSED(param);
+ DBG_PRINTF("in GPIO Key Handler \r\n");
+ BASE_FUNC_DELAY_MS(PREVENT_SWIPE_SCREEN_TIME);
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/inc/gpio_led_sample.h b/drivers_sample/gpio/sample_gpio_led/inc/gpio_led_sample.h
new file mode 100644
index 000000000..c5ddef433
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/inc/gpio_led_sample.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_led_sample.h
+ * @author MCU Driver Team
+ * @brief GPIO module sample
+ * @details This file provides sample code for users to help use
+ * the GPIO flashing LEDs.
+ */
+
+#ifndef GPIO_LED_SAMPLE_H
+#define GPIO_LED_SAMPLE_H
+
+BASE_StatusType GPIO_LedSample(void);
+
+#endif /* GPIO_LED_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/init/main.c b/drivers_sample/gpio/sample_gpio_led/init/main.c
new file mode 100644
index 000000000..923c56289
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "gpio_led_sample.h"
+
+UART_Handle g_uart0;
+
+GPIO_Handle g_ledHandle;
+
+int main(void)
+{
+ GPIO_LedSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/init/main.h b/drivers_sample/gpio/sample_gpio_led/init/main.h
new file mode 100644
index 000000000..d871dfc85
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "gpio.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern UART_Handle g_uart0;
+
+extern GPIO_Handle g_ledHandle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/init/system_init.c b/drivers_sample/gpio/sample_gpio_led/init/system_init.c
new file mode 100644
index 000000000..604c645f1
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/init/system_init.c
@@ -0,0 +1,109 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void GPIO_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPIO5_BASE, IP_CLK_ENABLE);
+ g_ledHandle.baseAddress = GPIO5; /* can be config by ide */
+
+ g_ledHandle.dir = GPIO_OUTPUT_MODE;
+ g_ledHandle.value = GPIO_HIGH_LEVEL;
+ g_ledHandle.interruptMode = GPIO_INT_TYPE_NONE;
+ g_ledHandle.pins = GPIO_PIN_6; /* can be config by ide */
+ HAL_GPIO_Init(&g_ledHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig;
+
+ iconfig->iocmg_49.BIT.func = 0x0; /* 0x0 is GPIO5_6 */
+ iconfig->iocmg_49.BIT.ds = IO_DRV_LEVEL1;
+ iconfig->iocmg_49.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_49.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_49.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_49.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPIO_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/readme.md b/drivers_sample/gpio/sample_gpio_led/readme.md
new file mode 100644
index 000000000..048b59644
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/readme.md
@@ -0,0 +1,19 @@
+# 配置GPIO管脚的电平反转功能，实现GPIO管脚控制LED灯的亮灭
+## 关键字: GPIO, 电平反转，LED
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、GPIO控制器初始化和功能配置。在示例代码中通过控制GPIO管脚的电平翻转实现控制LED灯的亮灭控制。
+
+**【示例配置】**
++ GPIO管脚选择：示例代码中选择GPIO管脚用于控制LED灯亮灭。也可以选择其他GPIO管脚用于控制LED的功能，在"GPIO_Init()"接口中的"g_gpiox.baseAddress"可以配置其它GPIOX，g_gpiox.pins可以配置“GPIO_PIN_0-GPIO_PIN_7”中的任意一个。
+
++ GPIO管脚初始化：调用接口"HAL_GPIO_Init()”完成对示例代码中GPIO管脚的方向、电平、中断模式配置。
+
++ GPIO管脚实现对LED灯控制：对于输出管脚调用接口"HAL_GPIO_TogglePin()"实现管脚电平翻转，结合延时函数实现GPIO管脚控制LED灯每50ms亮灭状态反转一次。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会控制GPIO管脚连接的LED每50ms进行一次亮灭，每反转一次电平Debug串口会打印一条信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中使用的GPIO管脚需和LED灯连接在一起。
\ No newline at end of file
diff --git a/drivers_sample/gpio/sample_gpio_led/src/gpio_led_sample.c b/drivers_sample/gpio/sample_gpio_led/src/gpio_led_sample.c
new file mode 100644
index 000000000..67ee9be6c
--- /dev/null
+++ b/drivers_sample/gpio/sample_gpio_led/src/gpio_led_sample.c
@@ -0,0 +1,49 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file gpio_led_sample.c
+ * @author MCU Driver Team
+ * @brief GPIO module realize a led on/off function sample
+ * @details Controls the LED to turn on and off. The status is reversed every 50 ms. If the hardware environment \
+ * does not support this function, you need to set up an environment for verification.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "gpio.h"
+#include "main.h"
+#include "gpio_led_sample.h"
+
+#define CYCLE_INTERVAL_TIME 500
+
+/* ---------------------------------- Sample Parameters -------------------------------- */
+/**
+ * @brief Test GPIO PIN control LED.
+ * @param None
+ * @retval Value of @ref BASE_StatusType.
+ */
+BASE_StatusType GPIO_LedSample(void)
+{
+ SystemInit();
+ /* Cycle control LED on and off. */
+ while (1) {
+ BASE_FUNC_DELAY_MS(CYCLE_INTERVAL_TIME);
+ HAL_GPIO_TogglePin(&LED_HANDLE, LED_PIN);
+ DBG_PRINTF("LED Stata reverse! \r\n");
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/inc/sample_gpt_period_interrupt.h b/drivers_sample/gpt/sample_gpt_period_interrupt/inc/sample_gpt_period_interrupt.h
new file mode 100644
index 000000000..e4a97037e
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/inc/sample_gpt_period_interrupt.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE..
+ * @file sample_gpt_period_interrupt.h
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * GPT runs、GPT period interrupt.
+ */
+#ifndef SAMPLE_GPT_PERIOD_INTERRUPT_H
+#define SAMPLE_GPT_PERIOD_INTERRUPT_H
+
+#include "debug.h"
+#include "gpt.h"
+#include "main.h"
+
+void GPT_PeriodInterrupt(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.c b/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.c
new file mode 100644
index 000000000..488358078
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_gpt_period_interrupt.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+GPT_Handle g_gptHandle;
+UART_Handle g_uart0Handle;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ GPT_PeriodInterrupt();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.h b/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.h
new file mode 100644
index 000000000..07b818abd
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/init/main.h
@@ -0,0 +1,53 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "gpt.h"
+#include "gpt_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern GPT_Handle g_gptHandle;
+extern UART_Handle g_uart0Handle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+void GPT2PWMOutputFinishCallBack(void *handle);
+void GPT2PWMPeriodOutputFinishCallBack(void *handle);
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/init/system_init.c b/drivers_sample/gpt/sample_gpt_period_interrupt/init/system_init.c
new file mode 100644
index 000000000..71aae6109
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/init/system_init.c
@@ -0,0 +1,137 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void GPT2PWMOutputFinishCallBack(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN IRQ_GPT2_INT */
+ /* USER CODE END IRQ_GPT2_INT */
+}
+
+__weak void GPT2PWMPeriodOutputFinishCallBack(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN IRQ_GPT2_PRD_INT */
+ /* USER CODE END IRQ_GPT2_PRD_INT */
+}
+
+static void GPT2_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPT2_BASE, IP_CLK_ENABLE);
+
+ g_gptHandle.baseAddress = GPT2;
+ g_gptHandle.clockDiv = 9; /* 9 is the internal frequency division of GPT */
+ g_gptHandle.period = 49999; /* 49999 is the number of GPT counting cycles. */
+ g_gptHandle.refA0.refdot = 10000; /* 10000 is the value of PWM reference point A. */
+ g_gptHandle.refA0.refAction = GPT_ACTION_OUTPUT_HIGH; /* GPT Action high */
+ g_gptHandle.refB0.refdot = 30000; /* 30000 is the value of PWM reference point B. */
+ g_gptHandle.refB0.refAction = GPT_ACTION_OUTPUT_LOW;
+ g_gptHandle.bufLoad = BASE_CFG_ENABLE;
+ g_gptHandle.pwmKeep = BASE_CFG_ENABLE;
+ g_gptHandle.handleEx.periodIntEnable = BASE_CFG_ENABLE;
+ g_gptHandle.handleEx.outputFinIntEnable = BASE_CFG_ENABLE;
+ g_gptHandle.triggleAdcOutFinish = BASE_CFG_DISABLE;
+ g_gptHandle.triggleAdcPeriod = BASE_CFG_DISABLE;
+ HAL_GPT_Init(&g_gptHandle);
+ HAL_GPT_RegisterCallBack(&g_gptHandle, GPT_INT_PWM_OUTPUT_FIN, GPT2PWMOutputFinishCallBack);
+ IRQ_Register(IRQ_GPT2_INT, HAL_GPT_IrqOutFinishHandler, &g_gptHandle);
+ IRQ_SetPriority(IRQ_GPT2_INT, 1);
+ IRQ_EnableN(IRQ_GPT2_INT);
+ HAL_GPT_RegisterCallBack(&g_gptHandle, GPT_INT_PERIOD, GPT2PWMPeriodOutputFinishCallBack);
+ IRQ_Register(IRQ_GPT2_PRD_INT, HAL_GPT_IrqPeriodHandler, &g_gptHandle);
+ IRQ_SetPriority(IRQ_GPT2_PRD_INT, 1);
+ IRQ_EnableN(IRQ_GPT2_PRD_INT);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ g_uart0Handle.baseAddress = UART0;
+ g_uart0Handle.baudRate = UART0_BAND_RATE;
+ g_uart0Handle.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0Handle.stopBits = UART_STOPBITS_ONE;
+ g_uart0Handle.parity = UART_PARITY_NONE;
+ g_uart0Handle.txMode = UART_MODE_BLOCKING;
+ g_uart0Handle.rxMode = UART_MODE_BLOCKING;
+ g_uart0Handle.fifoMode = BASE_CFG_ENABLE;
+ g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0Handle);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO5_2_AS_GPT2_PWM); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO5_2_AS_GPT2_PWM, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO5_2_AS_GPT2_PWM, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO5_2_AS_GPT2_PWM, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO5_2_AS_GPT2_PWM, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPT2_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/readme.md b/drivers_sample/gpt/sample_gpt_period_interrupt/readme.md
new file mode 100644
index 000000000..eb7814a2b
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/readme.md
@@ -0,0 +1,24 @@
+# 通用脉宽调制PWM-周期中断
+## 关键字: PWM, 周期中断
+
+**【功能描述】**
++ 该GPT示例中产生连续的PWM波。
+
++ 每个PWM波输出完之后，都会产生周期中断。
+
+**【示例配置】**
++ 示例默认输出周期为0.02s，占空比为40%的PWM波，其中周期可通过配置Period项更改，占空比可通过refA0和RefB0的参考值进行更改。
+
++ 每个PWM波输出完成之后，都会产生周期中断，调用周期中断回调函数，示例样例回调函数为“GPT2PWMPeriodOutputFinishCallBack”。
+
+**【示例效果】**
++ 在IOCMG_8输出连续方波，如果IOCMG_8上无对应外设，可通过示波器观察方波的周期和占空比。
+
++ 串口0提示GPT输出信息和中期中断回调函数输出的信息。
+
+**【注意事项】**
++ 更改PWM的周期和占空比一般先使用“HAL_GPT_GetConfig”获取GPT的配置，再使用“HAL_GPT_Config”更改GPT的配置。
+
++ 串口0输出提示信息。
+
++ ```c输出的PWMPWM频率=工作时钟频率/((分频系数+1)*(计数周期值+1))```
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_period_interrupt/src/sample_gpt_period_interrupt.c b/drivers_sample/gpt/sample_gpt_period_interrupt/src/sample_gpt_period_interrupt.c
new file mode 100644
index 000000000..2c31f3288
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_period_interrupt/src/sample_gpt_period_interrupt.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE..
+ * @file sample_gpt_period_interrupt.c
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * 1) Generate a continuous square wave with period and duty set in the function SystemInit.
+ * 2) GPT period interrupt callback.
+ */
+#include "sample_gpt_period_interrupt.h"
+
+/**
+ * @brief GPT period interrupt callback
+ * @param None.
+ * @retval None.
+ */
+void GPT2PWMPeriodOutputFinishCallBack(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN IRQ_GPT2_PRD_INT */
+ DBG_PRINTF("GPT period interrupt\n");
+ /* USER CODE END IRQ_GPT2_PRD_INT */
+}
+
+/**
+ * @brief GPT run and modify period and duty during running.
+ * @param None.
+ * @retval None.
+ */
+void GPT_PeriodInterrupt(void)
+{
+ SystemInit();
+ DBG_PRINTF("GPT Continued Run begin\r\n");
+ HAL_GPT_Start(&g_gptHandle);
+ BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */
+}
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/inc/sample_gpt_pwm_output.h b/drivers_sample/gpt/sample_gpt_pwm_output/inc/sample_gpt_pwm_output.h
new file mode 100644
index 000000000..d6ffdd89c
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/inc/sample_gpt_pwm_output.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_gpt_pwm_output.h
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * GPT runs.
+ */
+#ifndef SAMPLE_GPT_PWM_OUTPUT_H
+#define SAMPLE_GPT_PWM_OUTPUT_H
+
+#include "debug.h"
+#include "gpt.h"
+#include "main.h"
+
+void GPT_SampleMain(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/init/main.c b/drivers_sample/gpt/sample_gpt_pwm_output/init/main.c
new file mode 100644
index 000000000..d2fa4c090
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_gpt_pwm_output.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+GPT_Handle g_gptHandle;
+UART_Handle g_uart0Handle;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ GPT_SampleMain();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/init/main.h b/drivers_sample/gpt/sample_gpt_pwm_output/init/main.h
new file mode 100644
index 000000000..7c9ef5f69
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/init/main.h
@@ -0,0 +1,52 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "gpt.h"
+#include "gpt_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern GPT_Handle g_gptHandle;
+extern UART_Handle g_uart0Handle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/init/system_init.c b/drivers_sample/gpt/sample_gpt_pwm_output/init/system_init.c
new file mode 100644
index 000000000..aa921e15c
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/init/system_init.c
@@ -0,0 +1,118 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 48; /* PLL Multiplier 48 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void GPT2_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPT2_BASE, IP_CLK_ENABLE);
+
+ g_gptHandle.baseAddress = GPT2;
+ g_gptHandle.clockDiv = 9; /* 9 is the internal frequency division of GPT */
+ g_gptHandle.period = 49999; /* 49999 is the number of GPT counting cycles. */
+ g_gptHandle.refA0.refdot = 10000; /* 10000 is the value of PWM reference point A. */
+ g_gptHandle.refA0.refAction = GPT_ACTION_OUTPUT_HIGH; /* GPT Action high */
+ g_gptHandle.refB0.refdot = 30000; /* 30000 is the value of PWM reference point B. */
+ g_gptHandle.refB0.refAction = GPT_ACTION_OUTPUT_LOW;
+ g_gptHandle.bufLoad = BASE_CFG_ENABLE;
+ g_gptHandle.pwmKeep = BASE_CFG_ENABLE;
+ g_gptHandle.handleEx.periodIntEnable = BASE_CFG_DISABLE;
+ g_gptHandle.handleEx.outputFinIntEnable = BASE_CFG_DISABLE;
+ g_gptHandle.triggleAdcOutFinish = BASE_CFG_DISABLE;
+ g_gptHandle.triggleAdcPeriod = BASE_CFG_DISABLE;
+
+ HAL_GPT_Init(&g_gptHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ g_uart0Handle.baseAddress = UART0;
+
+ g_uart0Handle.baudRate = UART0_BAND_RATE;
+ g_uart0Handle.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0Handle.stopBits = UART_STOPBITS_ONE;
+ g_uart0Handle.parity = UART_PARITY_NONE;
+ g_uart0Handle.txMode = UART_MODE_BLOCKING;
+ g_uart0Handle.rxMode = UART_MODE_BLOCKING;
+ g_uart0Handle.fifoMode = BASE_CFG_ENABLE;
+ g_uart0Handle.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0Handle.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0Handle.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0Handle);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO5_2_AS_GPT2_PWM); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO5_2_AS_GPT2_PWM, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO5_2_AS_GPT2_PWM, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO5_2_AS_GPT2_PWM, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO5_2_AS_GPT2_PWM, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPT2_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/readme.md b/drivers_sample/gpt/sample_gpt_pwm_output/readme.md
new file mode 100644
index 000000000..90349ef63
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/readme.md
@@ -0,0 +1,24 @@
+# 通用脉宽调制PWM-输出频率和占空比可配的PWM波
+## 关键字: PWM, 占空比
+
+**【功能描述】**
++ 该GPT示例中产生连续的PWM波。
+
++ 持续输出10s的PWM波之后，会更改PWM的周期和占空比。
+
+**【示例配置】**
++ 示例默认输出频率50Hz，占空比为40%的PWM波，其中周期可通过配置Period项更改，占空比可通过refA0和RefB0的参考值进行更改。
+
++ 定时器计时10s之后，通过“HAL_GPT_Config”函数，更改GPT输出PWM波的周期和占空比。
+
+**【示例效果】**
++ 在IOCMG_8输出连续方波，如果IOCMG_8上无对应外设，可通过示波器观察方波的周期和占空比。
+
++ 串口0提示GPT输出信息和更改参数的信息。
+
+**【注意事项】**
++ 更改PWM的周期和占空比一般先使用“HAL_GPT_GetConfig”获取GPT的配置，再使用“HAL_GPT_Config”更改GPT的配置。
+
++ 串口0输出提示信息。
+
++ ```c输出的PWMPWM频率=工作时钟频率/((分频系数+1)*(计数周期值+1))```
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_pwm_output/src/sample_gpt_pwm_output.c b/drivers_sample/gpt/sample_gpt_pwm_output/src/sample_gpt_pwm_output.c
new file mode 100644
index 000000000..10f03685e
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_pwm_output/src/sample_gpt_pwm_output.c
@@ -0,0 +1,45 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_gpt_pwm_output.c
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * 1) Generate a continuous square wave with period and duty set in the function SystemInit.
+ * 2) Change the period and duty.
+ */
+#include "sample_gpt_pwm_output.h"
+
+/**
+ * @brief GPT run and modify period and duty during running.
+ * @param None.
+ * @retval None.
+ */
+void GPT_SampleMain(void)
+{
+ SystemInit();
+ DBG_PRINTF("GPT Continued Run begin\r\n");
+ HAL_GPT_Start(&g_gptHandle);
+ BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */
+ DBG_PRINTF("Change the duty to 50%%\r\n");
+
+ HAL_GPT_GetConfig(&g_gptHandle);
+ g_gptHandle.period = 59999; /* 59999 is the number of GPT counting cycles. */
+ g_gptHandle.refA0.refdot = 20000; /* 20000 is the value of PWM reference point A. */
+ g_gptHandle.refB0.refdot = 50000; /* 50000 is the value of PWM reference point A. */
+ HAL_GPT_Config(&g_gptHandle);
+}
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/inc/sample_gpt_simplerun.h b/drivers_sample/gpt/sample_gpt_simplerun/inc/sample_gpt_simplerun.h
new file mode 100644
index 000000000..91fd12586
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/inc/sample_gpt_simplerun.h
@@ -0,0 +1,32 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_gpt_simplerun.h
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * GPT runs.
+ */
+#ifndef SAMPLE_GPT_SIMPLERUN_H
+#define SAMPLE_GPT_SIMPLERUN_H
+
+#include "debug.h"
+#include "gpt.h"
+#include "main.h"
+
+void GPT_SampleMain(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/init/main.c b/drivers_sample/gpt/sample_gpt_simplerun/init/main.c
new file mode 100644
index 000000000..d2407363e
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/init/main.c
@@ -0,0 +1,36 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "feature.h"
+#include "main.h"
+#include "sample_gpt_simplerun.h"
+
+GPT_Handle g_gptHandle;
+UART_Handle g_uart0Handle;
+
+int main(void)
+{
+ GPT_SampleMain();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/init/main.h b/drivers_sample/gpt/sample_gpt_simplerun/init/main.h
new file mode 100644
index 000000000..11edb26a6
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "gpt.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern GPT_Handle g_gptHandle;
+
+extern UART_Handle g_uart0Handle;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/init/system_init.c b/drivers_sample/gpt/sample_gpt_simplerun/init/system_init.c
new file mode 100644
index 000000000..70ada1e1c
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/init/system_init.c
@@ -0,0 +1,112 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void GPT1_Init(void)
+{
+ HAL_CRG_IpEnableSet(GPT1_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(GPT1_BASE, CRG_PLL_NO_PREDV);
+
+ g_gptHandle.baseAddress = GPT1;
+ g_gptHandle.period = 10000 * 1000; /* Period counter, Period = 10000us, 1000ns in 1us */
+ g_gptHandle.duty = 10000 * 10 * 10; /* Duty counter, duty = 10000 / 10 us */
+ g_gptHandle.pwmPolarity = BASE_CFG_ENABLE; /* Continuous output */
+ g_gptHandle.pwmKeep = BASE_CFG_ENABLE; /* Continuous output */
+ HAL_GPT_Init(&g_gptHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0Handle.baseAddress = UART0;
+ g_uart0Handle.irqNum = IRQ_UART0;
+
+ g_uart0Handle.baudRate = UART0_BAND_RATE;
+ g_uart0Handle.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0Handle.stopBits = UART_STOPBITS_ONE;
+ g_uart0Handle.parity = UART_PARITY_NONE;
+ g_uart0Handle.txMode = UART_MODE_BLOCKING;
+ g_uart0Handle.rxMode = UART_MODE_BLOCKING;
+ g_uart0Handle.fifoMode = BASE_CFG_ENABLE;
+ g_uart0Handle.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0Handle.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0Handle.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0Handle);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_14.BIT.func = 0x2; /* 0x2 is GPT1_PWM */
+ iconfig->iocmg_14.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_14.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_14.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ GPT1_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/readme.md b/drivers_sample/gpt/sample_gpt_simplerun/readme.md
new file mode 100644
index 000000000..c77b1f1cf
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/readme.md
@@ -0,0 +1,18 @@
+# 输出占空比可配的PWM波
+## 关键字: PWM, PWM波
+
+**【功能描述】**
++ 该GPT示例中产生连续的PWM波，周期和占空比可配。
+
+**【示例配置】**
++ 该示例默认输出频率50Hz，占空比为40%的PWM波，周期和占空比均可通过“HAL_GPT_Config”进行更改。
+
+**【示例效果】**
++ 串口0提示GPT输出信息和更改参数的信息。
+
++ 在IOCMG_8输出连续方波，如果IOCMG_8上无对应外设，可通过示波器观察方波的周期和占空比。
+
+**【注意事项】**
++ 更改PWM的周期和占空比一般先使用“HAL_GPT_GetConfig”获取GPT的配置，再使用“HAL_GPT_Config”更改GPT的配置。
+
++ 输出频率计算：```c输出的PWMPWM频率=工作时钟频率/((分频系数+1)*(计数周期值+1))```
\ No newline at end of file
diff --git a/drivers_sample/gpt/sample_gpt_simplerun/src/sample_gpt_simplerun.c b/drivers_sample/gpt/sample_gpt_simplerun/src/sample_gpt_simplerun.c
new file mode 100644
index 000000000..7e6e9ad6b
--- /dev/null
+++ b/drivers_sample/gpt/sample_gpt_simplerun/src/sample_gpt_simplerun.c
@@ -0,0 +1,53 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_gpt_simplerun.c
+ * @author MCU Driver Team
+ * @brief gpt sample module.
+ * @details This file provides users with sample code to help use GPT function:
+ * 1) Generate a continuous square wave with period and duty set in the function SystemInit.
+ * 2) Change the period and duty, or any parameters you need to modify during gpt running
+ * Output square wave at iocmg_8. If no peripheral is connected to iocmg_8, please use an
+ * oscilloscope to measure the output square wave.
+ */
+#include "sample_gpt_simplerun.h"
+
+/**
+ * @brief GPT run and modify period and duty during running.
+ * @param None.
+ * @retval None.
+ */
+void GPT_SampleMain(void)
+{
+ GPT_Handle gpt;
+ SystemInit();
+ DBG_PRINTF("GPT Continued Run begin\r\n");
+ HAL_GPT_Start(&g_gptHandle);
+
+ BASE_FUNC_DelaySeconds(10); /* Delay 10 seconds */
+ gpt.baseAddress = g_gptHandle.baseAddress;
+ if (HAL_GPT_GetConfig(&gpt) != BASE_STATUS_OK) {
+ return;
+ }
+
+ DBG_PRINTF("Change GPT Period and duty\r\n");
+ gpt.period = 5000000; /* Change period to 5000000 ns */
+ gpt.duty = 1000000; /* Change period to 1000000 ns */
+ if (HAL_GPT_Config(&gpt) != BASE_STATUS_OK) {
+ return;
+ }
+}
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/inc/sample_i2c_blocking_stlm75.h b/drivers_sample/i2c/sample_i2c_blocking_stlm75/inc/sample_i2c_blocking_stlm75.h
new file mode 100644
index 000000000..f8b03b2a0
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/inc/sample_i2c_blocking_stlm75.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_blocking_stlm75.h
+ * @author MCU Driver Team
+ * @brief I2C module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the I2C.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_BLOCKING_STLM75_H
+#define McuMagicTag_SAMPLE_I2C_BLOCKING_STLM75_H
+
+unsigned int Stlm75SampleProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.c b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.c
new file mode 100644
index 000000000..fa66b1c86
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_i2c_blocking_stlm75.h"
+
+I2C_Handle g_i2cSampleHandle;
+UART_Handle g_uart0;
+
+int main(void)
+{
+ Stlm75SampleProcessing();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.h b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.h
new file mode 100644
index 000000000..3172be17a
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/main.h
@@ -0,0 +1,46 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern I2C_Handle g_i2cSampleHandle;
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/system_init.c b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/system_init.c
new file mode 100644
index 000000000..898405abd
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/init/system_init.c
@@ -0,0 +1,127 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+#define I2C_FREQ_SCR 100000
+#define I2C_HOLD_DURATION 10
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void I2C_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C_BASE, IP_CLK_ENABLE);
+
+ g_i2cSampleHandle.baseAddress = I2C;
+ g_i2cSampleHandle.irqNum = IRQ_I2C;
+
+ g_i2cSampleHandle.addrMode = I2C_7_BITS;
+ g_i2cSampleHandle.sdaHoldTime = I2C_HOLD_DURATION;
+ g_i2cSampleHandle.freq = I2C_FREQ_SCR;
+ g_i2cSampleHandle.rxBuff = NULL;
+ g_i2cSampleHandle.txBuff = NULL;
+ g_i2cSampleHandle.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2cSampleHandle.msgStopFlag = BASE_CFG_ENABLE;
+ g_i2cSampleHandle.state = I2C_STATE_RESET;
+ HAL_I2C_Init(&g_i2cSampleHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_14.BIT.func = 0x5; /* 0x5 is I2C0_SCL */
+ iconfig->iocmg_14.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_14.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_14.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_15.BIT.func = 0x5; /* 0x5 is I2C0_SDA */
+ iconfig->iocmg_15.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_15.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_15.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_15.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_15.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/readme.md b/drivers_sample/i2c/sample_i2c_blocking_stlm75/readme.md
new file mode 100644
index 000000000..373c158ce
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/readme.md
@@ -0,0 +1,18 @@
+# 配置I2C作为主机以阻塞方式进行数据的接收、发送，通过Debug串口打印读取的数据
+## 关键字: I2C, 主机，数据读取，数据发送，阻塞方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过阻塞方式与STLM75温度传感器进行数据的接收和数据的发送，通过Debug串口打印读取的温度数值。
+
+**【示例配置】**
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、寻址模式（7bit寻址或10bit寻址）、通讯速率等参数进行配置。
+
++ 操作I2C读取温度传感器的数值操作：通过调用 "HAL_I2C_MasterWriteBlocking()"接口以阻塞方式实现温度传感器的目标内存地址写入数据；通过调用"HAL_I2C_MasterReadBlocking()"接口以阻塞方式实现接收温度传感器发送的数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以阻塞方式读取温度传感器的数值，Debug串口打印读取的温度数值信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ I2C必须必须对接stlm75温度传感器，否则程序无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_blocking_stlm75/src/sample_i2c_blocking_stlm75.c b/drivers_sample/i2c/sample_i2c_blocking_stlm75/src/sample_i2c_blocking_stlm75.c
new file mode 100644
index 000000000..2c2792295
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_blocking_stlm75/src/sample_i2c_blocking_stlm75.c
@@ -0,0 +1,80 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_blocking_stlm75.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C Module Blocking.
+ * @details This sample is connected to the temperature sensor stlm75 to demonstrate how to use the HAL interface that
+ * operates in blocking mode in the I2C driver.
+ * This sample must be connected to the stlm75 temperature sensor.
+ * Run the sample and print the temperature value through the serial port.
+ */
+#include "main.h"
+#include "i2c.h"
+#include "debug.h"
+#include "sample_i2c_blocking_stlm75.h"
+
+#define STLM75_DEV_ADDR_WRITE 0x90
+#define STLM75_DEV_ADDR_READ 0x91
+
+#define MAX_TIMEOUT_VAL 5000
+
+/**
+ * @brief I2c blocking sample lm75 read two byte.
+ * @param addr stlm75 address.
+ * @retval unsigned short.
+ */
+static unsigned short Stlm75ReadtwoByte(unsigned char addr)
+{
+ unsigned short temp;
+ unsigned char opAddr = addr;
+ unsigned char rxBuff[3];
+
+ HAL_I2C_MasterWriteBlocking(&g_i2cSampleHandle, STLM75_DEV_ADDR_WRITE, &opAddr, 1, MAX_TIMEOUT_VAL);
+ HAL_I2C_MasterReadBlocking(&g_i2cSampleHandle, STLM75_DEV_ADDR_READ, rxBuff, 2, MAX_TIMEOUT_VAL); /* Read 2 data */
+
+ temp = rxBuff[0];
+ temp <<= 8; /* Shift left by 8 bits */
+ temp = temp | rxBuff[1];
+ return temp;
+}
+
+/**
+ * @brief I2c blocking sample processing.
+ * @param addr lm75 address.
+ * @retval unsigned int, 0 is OK, other is fail.
+ */
+unsigned int Stlm75SampleProcessing(void)
+{
+ unsigned short temp;
+ float ftemp;
+
+ SystemInit();
+ while (1) {
+ temp = Stlm75ReadtwoByte(0x00);
+ temp >>= 5; /* Move the data by 5 bits to the right to obtain the lower 10 bits. */
+ if ((temp & 0x0400) == 0x0400) { /* Determine the 10th digit. temp & 0x0400 */
+ ftemp = -temp * 0.125; /* The formula is temp x 0.125. */
+ } else {
+ ftemp = temp * 0.125; /* The formula is temp x 0.125. */
+ }
+ DBG_PRINTF("ftemp = %f\r\n", ftemp);
+ BASE_FUNC_DELAY_MS(1000); /* Delay 1000ms */
+ }
+ return 0;
+}
+
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/inc/sample_i2c_dma_stlm75.h b/drivers_sample/i2c/sample_i2c_dma_stlm75/inc/sample_i2c_dma_stlm75.h
new file mode 100644
index 000000000..b5e595905
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/inc/sample_i2c_dma_stlm75.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_dma_stlm75.h
+ * @author MCU Driver Team
+ * @brief I2C module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the I2C.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_DMA_STLM75_H
+#define McuMagicTag_SAMPLE_I2C_DMA_STLM75_H
+
+void Stlm75DmaSampleProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.c b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.c
new file mode 100644
index 000000000..e664ac529
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.c
@@ -0,0 +1,37 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_i2c_dma_stlm75.h"
+
+I2C_Handle g_i2cSampleHandle;
+UART_Handle g_uart0;
+
+DMA_Handle g_dmac;
+
+int main(void)
+{
+ Stlm75DmaSampleProcessing();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.h b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.h
new file mode 100644
index 000000000..9eaeb40f0
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/main.h
@@ -0,0 +1,53 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern I2C_Handle g_i2cSampleHandle;
+
+extern UART_Handle g_uart0;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void Stlm75TxSampleHandle(I2C_Handle *handle);
+void Stlm75RxSampleHandle(I2C_Handle *handle);
+void Stlm75ErrSampleHandle(I2C_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/init/system_init.c b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/system_init.c
new file mode 100644
index 000000000..9a3a65a7f
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/init/system_init.c
@@ -0,0 +1,192 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+#define I2C_FREQ_SCR 100000
+#define I2C_HOLD_DURATION 10
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel2Init(void *handle)
+{
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.destAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.srcPeriph = DMA_REQUEST_I2C_RX;
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, 2); /* Channel 2 */
+}
+
+static void DMA_Init(void)
+{
+ g_dmac.baseAddress = DMA;
+ g_dmac.srcByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.destByteOrder = DMA_BYTEORDER_SMALLENDIAN;
+ g_dmac.irqNumTc = IRQ_DMA_TC;
+ g_dmac.irqNumError = IRQ_DMA_ERR;
+ HAL_DMA_IRQService(&g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac);
+
+ DMA_Channel2Init((void *)(&g_i2cSampleHandle));
+}
+
+__weak void Stlm75TxSampleHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75TxSampleHandle */
+ /* USER CODE END Stlm75TxSampleHandle */
+}
+
+__weak void Stlm75RxSampleHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75RxSampleHandle */
+ /* USER CODE END Stlm75RxSampleHandle */
+}
+
+__weak void Stlm75ErrSampleHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75ErrSampleHandle */
+ /* USER CODE END Stlm75ErrSampleHandle */
+}
+
+static void I2C_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C_BASE, IP_CLK_ENABLE);
+
+ g_i2cSampleHandle.baseAddress = I2C;
+ g_i2cSampleHandle.irqNum = IRQ_I2C;
+
+ g_i2cSampleHandle.addrMode = I2C_7_BITS;
+ g_i2cSampleHandle.sdaHoldTime = I2C_HOLD_DURATION;
+ g_i2cSampleHandle.freq = I2C_FREQ_SCR;
+ g_i2cSampleHandle.rxBuff = NULL;
+ g_i2cSampleHandle.txBuff = NULL;
+ g_i2cSampleHandle.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2cSampleHandle.msgStopFlag = BASE_CFG_ENABLE;
+ g_i2cSampleHandle.state = I2C_STATE_RESET;
+ g_i2cSampleHandle.rxWaterMark = 1; /* Rx water mark is 1 */
+ g_i2cSampleHandle.txWaterMark = 16; /* Tx water mark is 16 */
+ g_i2cSampleHandle.dmaHandle = &g_dmac;
+ g_i2cSampleHandle.dmaCh = 2; /* Channel is 2 */
+ g_i2cSampleHandle.srcBurst = DMA_BURST_LENGTH_1;
+ g_i2cSampleHandle.destBurst = DMA_BURST_LENGTH_1;
+ g_i2cSampleHandle.srcWidth = DMA_TRANSWIDTH_BYTE;
+ g_i2cSampleHandle.destWidth = DMA_TRANSWIDTH_BYTE;
+ HAL_I2C_Init(&g_i2cSampleHandle);
+
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_MASTER_TX_COMPLETE_CB_ID, Stlm75TxSampleHandle);
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_MASTER_RX_COMPLETE_CB_ID, Stlm75RxSampleHandle);
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_ERROR_CB_ID, Stlm75ErrSampleHandle);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_66.BIT.func = 0x2; /* 0x2 is I2C0_SCL */
+ iconfig->iocmg_66.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_66.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_66.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_66.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_66.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_67.BIT.func = 0x2; /* 0x2 is I2C0_SDA */
+ iconfig->iocmg_67.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_67.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_67.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_67.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_67.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ DMA_Init();
+ I2C_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/readme.md b/drivers_sample/i2c/sample_i2c_dma_stlm75/readme.md
new file mode 100644
index 000000000..fdf5d2ae3
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/readme.md
@@ -0,0 +1,18 @@
+# 配置I2C作为主机以DMA方式进行数据的接收、发送，通过Debug串口打印读取的数据
+## 关键字: I2C, 主机，数据读取，数据发送，DMA方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过DMA方式与STLM75温度传感器进行数据的接收和数据的发送，通过Debug串口打印读取的温度数值。
+
+**【示例配置】**
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、寻址模式（7bit寻址或10bit寻址）、通讯速率、DMA通道等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册收发完成、传输错误时的回调函数。
+
++ 操作I2C读取温度传感器的数值操作：通过调用 "HAL_I2C_MasterWriteDMA()"接口以DMA方式实现温度传感器的目标内存地址写入数据；通过调用"HAL_I2C_MasterReadDMA()"接口以DMA方式实现接收温度传感器发送的数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以DMA方式读取温度传感器的数值，Debug串口打印发送或接收数据完成的信息与读取的温度数值信息。功能异常时会打印错误提示信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ I2C必须必须对接stlm75温度传感器，否则程序无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_dma_stlm75/src/sample_i2c_dma_stlm75.c b/drivers_sample/i2c/sample_i2c_dma_stlm75/src/sample_i2c_dma_stlm75.c
new file mode 100644
index 000000000..67130b8bd
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_dma_stlm75/src/sample_i2c_dma_stlm75.c
@@ -0,0 +1,110 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_dma_stlm75.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C Module DMA.
+ * @details This sample is connected to the temperature sensor stlm75 to demonstrate how to use the HAL interface that
+ * operates in DMA mode in the I2C driver.
+ * This sample must be connected to the stlm75 temperature sensor.
+ * Run the sample and print the temperature value through the serial port.
+ */
+#include "main.h"
+#include "i2c.h"
+#include "debug.h"
+#include "sample_i2c_dma_stlm75.h"
+
+#define DEV_ADDR_WRITE 0x90
+#define DEV_ADDR_READ 0x91
+
+
+static volatile unsigned char g_txFlang = 0;
+static volatile unsigned char g_rxFlang = 0;
+
+static unsigned char g_rxBuff[3];
+static unsigned char g_txBuff[3];
+
+/**
+ * @brief I2c dma sample stlm75 error handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75ErrSampleHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("errHandle\r\n");
+}
+
+/**
+ * @brief I2c dma sample stlm75 tx handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75TxSampleHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("txHandle\r\n");
+ g_txFlang = 1;
+}
+
+/**
+ * @brief I2c dma sample stlm75 rx handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75RxSampleHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("rxHandle\r\n");
+ g_rxFlang = 1;
+}
+
+/**
+ * @brief I2c dma sample stlm75 init.
+ * @param None.
+ * @retval None.
+ */
+void Stlm75DmaSampleProcessing(void)
+{
+ unsigned short temp = 0;
+ float ftemp = 0;
+ g_txBuff[0] = 0;
+
+ SystemInit();
+ HAL_I2C_MasterWriteDMA(&g_i2cSampleHandle, DEV_ADDR_WRITE, g_txBuff, 1);
+ while (1) {
+ if (g_rxFlang > 0) {
+ g_rxFlang = 0;
+ temp = g_rxBuff[0];
+ temp <<= 8; /* Shift left by 8 bits */
+ temp = temp | g_rxBuff[1];
+ temp >>= 5; /* Move right by 5 digits */
+ if ((temp & 0x0400) == 0x0400) { /* Determine the 10th digit. temp & 0x0400 */
+ ftemp = -temp * 0.125; /* The formula is temp x 0.125. */
+ } else {
+ ftemp = temp * 0.125; /* The formula is temp x 0.125. */
+ }
+ DBG_PRINTF("ftemp = %f\r\n", ftemp);
+ HAL_I2C_MasterWriteDMA(&g_i2cSampleHandle, DEV_ADDR_WRITE, g_txBuff, 1);
+ }
+ if (g_txFlang > 0) {
+ g_txFlang = 0;
+ HAL_I2C_MasterReadDMA(&g_i2cSampleHandle, DEV_ADDR_READ, g_rxBuff, 2); /* Read 2 data */
+ }
+ BASE_FUNC_DELAY_MS(500); /* Delay 500ms */
+ }
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/inc/sample_i2c_interrupt_stlm75.h b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/inc/sample_i2c_interrupt_stlm75.h
new file mode 100644
index 000000000..e2138fc4a
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/inc/sample_i2c_interrupt_stlm75.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_interrupt_stlm75.h
+ * @author MCU Driver Team
+ * @brief I2C module sample.
+ * @details This file provides sample code for users to help use
+ * the functionalities of the I2C.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_INTERRUPT_STLM75_H
+#define McuMagicTag_SAMPLE_I2C_INTERRUPT_STLM75_H
+
+void I2cStlm75InterruptSampleProcessing(void);
+
+#endif
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.c b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.c
new file mode 100644
index 000000000..0c1901996
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.c
@@ -0,0 +1,35 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "sample_i2c_interrupt_stlm75.h"
+
+I2C_Handle g_i2cSampleHandle;
+UART_Handle g_uart0;
+
+int main(void)
+{
+ I2cStlm75InterruptSampleProcessing();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.h b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.h
new file mode 100644
index 000000000..752da1c91
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/main.h
@@ -0,0 +1,50 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern I2C_Handle g_i2cSampleHandle;
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void Stlm75TxCallbackHandle(I2C_Handle *handle);
+void Stlm75RxCallbackHandle(I2C_Handle *handle);
+void Stlm75ErrCallbackHandle(I2C_Handle *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/system_init.c b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/system_init.c
new file mode 100644
index 000000000..0ac4197c1
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/init/system_init.c
@@ -0,0 +1,157 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+#define UART0_BAND_RATE 115200
+
+#define I2C_FREQ_SCR 100000
+#define I2C_HOLD_DURATION 10
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void Stlm75TxCallbackHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75TxCallbackHandle */
+ /* USER CODE END Stlm75TxCallbackHandle */
+}
+
+__weak void Stlm75RxCallbackHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75RxCallbackHandle */
+ /* USER CODE END Stlm75RxCallbackHandle */
+}
+
+__weak void Stlm75ErrCallbackHandle(I2C_Handle *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN Stlm75ErrCallbackHandle */
+ /* USER CODE END Stlm75ErrCallbackHandle */
+}
+
+static void I2C_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C_BASE, IP_CLK_ENABLE);
+
+ g_i2cSampleHandle.baseAddress = I2C;
+ g_i2cSampleHandle.irqNum = IRQ_I2C;
+
+ g_i2cSampleHandle.addrMode = I2C_7_BITS;
+ g_i2cSampleHandle.sdaHoldTime = I2C_HOLD_DURATION;
+ g_i2cSampleHandle.freq = I2C_FREQ_SCR;
+ g_i2cSampleHandle.rxBuff = NULL;
+ g_i2cSampleHandle.txBuff = NULL;
+ g_i2cSampleHandle.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2cSampleHandle.msgStopFlag = BASE_CFG_ENABLE;
+ g_i2cSampleHandle.state = I2C_STATE_RESET;
+ g_i2cSampleHandle.rxWaterMark = 32; /* Rx water mark is 32 */
+ g_i2cSampleHandle.txWaterMark = 32; /* Tx water mark is 32 */
+ HAL_I2C_Init(&g_i2cSampleHandle);
+
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_MASTER_TX_COMPLETE_CB_ID, Stlm75TxCallbackHandle);
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_MASTER_RX_COMPLETE_CB_ID, Stlm75RxCallbackHandle);
+ HAL_I2C_RegisterCallback(&g_i2cSampleHandle, I2C_ERROR_CB_ID, Stlm75ErrCallbackHandle);
+ HAL_I2C_IRQService(&g_i2cSampleHandle);
+ IRQ_SetPriority(g_i2cSampleHandle.irqNum, 1);
+ IRQ_EnableN(IRQ_I2C);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_14.BIT.func = 0x5; /* 0x5 is I2C0_SCL */
+ iconfig->iocmg_14.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_14.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_14.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_14.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_15.BIT.func = 0x5; /* 0x5 is I2C0_SDA */
+ iconfig->iocmg_15.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_15.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_15.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_15.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_15.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_7.BIT.func = 0x4; /* 0x4 is UART0_RXD */
+ iconfig->iocmg_7.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_7.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_7.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_7.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_6.BIT.func = 0x4; /* 0x4 is UART0_TXD */
+ iconfig->iocmg_6.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_6.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_6.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_6.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/readme.md b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/readme.md
new file mode 100644
index 000000000..2e396faeb
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/readme.md
@@ -0,0 +1,18 @@
+# 配置I2C作为主机以中断方式进行数据的接收、发送，通过Debug串口打印读取的数据
+## 关键字: I2C, 主机，数据读取，数据发送，中断方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过中断方式与STLM75温度传感器进行数据的接收和数据的发送，通过Debug串口打印读取的温度数值。
+
+**【示例配置】**
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、寻址模式（7bit寻址或10bit寻址）、通讯速率等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册中断回调函数，并使能相关中断配置。
+
++ 操作I2C读取温度传感器的数值操作：通过调用 "HAL_I2C_MasterWriteIT()"接口以中断方式实现温度传感器的目标内存地址写入数据；通过调用"HAL_I2C_MasterReadIT()"接口以中断方式实现接收温度传感器发送的数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以中断方式读取温度传感器的数值，Debug串口打印发送或接收数据完成的信息与读取的温度数值信息。功能异常时会打印错误提示信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ I2C必须必须对接stlm75温度传感器，否则程序无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_interrupt_stlm75/src/sample_i2c_interrupt_stlm75.c b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/src/sample_i2c_interrupt_stlm75.c
new file mode 100644
index 000000000..a39820ccc
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_interrupt_stlm75/src/sample_i2c_interrupt_stlm75.c
@@ -0,0 +1,110 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_interrupt_stlm75.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C Module Interrupt.
+ * @details This sample is connected to the temperature sensor stlm75 to demonstrate how to use the HAL interface that
+ * operates in interrupt mode in the I2C driver.
+ * This sample must be connected to the stlm75 temperature sensor.
+ * Run the sample and print the temperature value through the serial port.
+ */
+#include "main.h"
+#include "i2c.h"
+#include "interrupt.h"
+#include "debug.h"
+#include "sample_i2c_interrupt_stlm75.h"
+
+#define DEV_ADDR_WRITE 0x90
+#define DEV_ADDR_READ 0x91
+
+static volatile unsigned char g_txFlang = 0;
+static volatile unsigned char g_rxFlang = 0;
+
+static unsigned char g_rxBuff[3];
+static unsigned char g_txBuff[3];
+
+/**
+ * @brief I2c interrupt sample stlm75 Error callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75ErrCallbackHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Stlm75ErrCallbackHandle\r\n");
+}
+
+/**
+ * @brief I2c interrupt sample stlm75 tx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75TxCallbackHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Stlm75TxCallbackHandle\r\n");
+ g_txFlang = 1;
+}
+
+/**
+ * @brief I2c interrupt sample stlm75 rx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void Stlm75RxCallbackHandle(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Stlm75RxCallbackHandle\r\n");
+ g_rxFlang = 1;
+}
+
+/**
+ * @brief I2c interrupt sample stlm75 processing.
+ * @param None.
+ * @retval None.
+ */
+void I2cStlm75InterruptSampleProcessing(void)
+{
+ unsigned short temp = 0;
+ float ftemp = 0;
+ g_txBuff[0] = 0;
+
+ SystemInit();
+ HAL_I2C_MasterWriteIT(&g_i2cSampleHandle, DEV_ADDR_WRITE, g_txBuff, 1);
+ while (1) {
+ if (g_rxFlang > 0) {
+ g_rxFlang = 0;
+ temp = g_rxBuff[0];
+ temp <<= 8; /* Shift left by 8 bits */
+ temp = temp | g_rxBuff[1];
+ temp >>= 5; /* Move right by 5 digits */
+ if ((temp & 0x0400) == 0x0400) { /* Determine the 10th digit. temp & 0x0400 */
+ ftemp = -temp * 0.125; /* The formula is temp x 0.125. */
+ } else {
+ ftemp = temp * 0.125; /* The formula is temp x 0.125. */
+ }
+ DBG_PRINTF("ftemp = %f\r\n", ftemp);
+ HAL_I2C_MasterWriteIT(&g_i2cSampleHandle, DEV_ADDR_WRITE, g_txBuff, 1);
+ }
+ if (g_txFlang > 0) {
+ g_txFlang = 0;
+ HAL_I2C_MasterReadIT(&g_i2cSampleHandle, DEV_ADDR_READ, g_rxBuff, 2); /* Read 2 data */
+ }
+ BASE_FUNC_DELAY_MS(1000); /* Delay 1000ms */
+ }
+}
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/inc/sample_i2c_master_blocking_at24c64.h b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/inc/sample_i2c_master_blocking_at24c64.h
new file mode 100644
index 000000000..68042bda9
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/inc/sample_i2c_master_blocking_at24c64.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_blocking_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module blocking as master.
+ * @details This sample demonstrates how to use the I2C master blocking interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H
+#define McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H
+
+void I2cBlocking24c64Processing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_MASTER_BLOCKING_AT24C64_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.c b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.c
new file mode 100644
index 000000000..c2cbf8fa6
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.c
@@ -0,0 +1,52 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_master_blocking_at24c64.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cBlocking24c64Processing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.h b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.h
new file mode 100644
index 000000000..bd646c19c
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/main.h
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/system_init.c b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/system_init.c
new file mode 100644
index 000000000..2b879fce2
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/init/system_init.c
@@ -0,0 +1,125 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_MASTER_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.state = I2C_STATE_RESET;
+ HAL_I2C_Init(&g_i2c0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/readme.md b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/readme.md
new file mode 100644
index 000000000..37c0631df
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/readme.md
@@ -0,0 +1,19 @@
+# 配置I2C作为主机以阻塞方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 主机，数据读取，数据发送，阻塞方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过阻塞方式与EEPROM(AT24C64)进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1实现与EEPROM的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、通讯速率等参数进行配置。
+
++ 操作I2C写入和读取EEPROM的内容：通过调用 "HAL_I2C_MasterWriteBlocking()"接口以阻塞方式向EEPROM目标内存地址写入数据；通过调用"HAL_I2C_MasterReadBlocking()"接口以阻塞方式实现从EEPROM的目标地址中接收数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以阻塞方式向EEPROM写入和读取写入的内容，Debug串口打印I2C与EEPROM进行通信交互的结果信息，当写入和读取的数据一致时Debug串口打印"I2C Data Success"；当写入和读取的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接EEPROM(AT24C64)，且保证EEPROM的7bit地址为50，否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/src/sample_i2c_master_blocking_at24c64.c b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/src/sample_i2c_master_blocking_at24c64.c
new file mode 100644
index 000000000..5ffe39d07
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_blocking_at24c64/src/sample_i2c_master_blocking_at24c64.c
@@ -0,0 +1,202 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_blocking_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module blocking as master.
+ * @details This sample demonstrates how to use the I2C master blocking interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#include "i2c.h"
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_master_blocking_at24c64.h"
+
+#define DEV_24C64_ADDRESS_WRITE 0xA0
+#define DEV_24C64_ADDRESS_READ 0xA1
+#define I2C_SAMPLE_24C64_OPT_LEN 8
+#define I2C_SAMPLE_24C64_OPT_START_ADDR 0x0
+#define I2C_SAMPLE_24C64_DATA_OFFSET 2
+#define I2C_SAMPLE_24C64_PAGE_SIZE 32
+#define I2C_SAMPLE_24C64_ADDR_SIZE 2
+#define I2C_SAMPLE_24C64_OPT_ONCE_LEN 255
+#define I2C_SAMPLE_24C64_ADDRESS_POS 8
+#define I2C_SAMPLE_24C64_ADDRESS_MASK 0xFF
+
+#define I2C_SAMPLE_24C64_TEST_NUM 200
+#define I2C_SAMPLE_MAX_TIMEOUT 10000
+
+/**
+ * @brief Copy data.
+ * @param destBuffer dest buffer.
+ * @param srcBuffer source buffer.
+ * @param len Number of the data to be copy.
+ * @retval None.
+ */
+static void CopyData(unsigned char *destBuffer, unsigned char *srcBuffer, unsigned int len)
+{
+ for (unsigned int i = 0; i < len; i++) {
+ destBuffer[i] = srcBuffer[i]; /* Copy the srcBuffer data to the destBuffer. */
+ }
+}
+
+/**
+ * @brief Read data from eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ /* Define variables for internal use. */
+ unsigned char tempAddr[I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempReadLen;
+ unsigned char *tempBuffer = buffer;
+
+ /* Start read data from the 24c64 eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+ /* Set the memory address of eeprom. */
+ tempAddr[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempAddr[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+
+ tempReadLen = currentLen;
+ if (currentLen > I2C_SAMPLE_24C64_OPT_ONCE_LEN) {
+ tempReadLen = I2C_SAMPLE_24C64_OPT_ONCE_LEN;
+ }
+ /* Send the memory address of eeprom. */
+ ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempAddr,
+ I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Read data from eeprom. */
+ ret = HAL_I2C_MasterReadBlocking(&g_i2c0, DEV_24C64_ADDRESS_READ, tempBuffer,
+ tempReadLen, I2C_SAMPLE_MAX_TIMEOUT);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempReadLen;
+ currentLen -= tempReadLen;
+ tempBuffer += tempReadLen;
+ }
+ return ret;
+}
+
+/**
+ * @brief Read data from eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64WriteData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ unsigned char tempWrite[I2C_SAMPLE_24C64_PAGE_SIZE + I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempWriteLen;
+ unsigned char *tempBuffer = buffer;
+ BASE_StatusType ret = BASE_STATUS_OK;
+
+ /* Start send data to eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+ tempWriteLen = I2C_SAMPLE_24C64_PAGE_SIZE - (currentAddr % I2C_SAMPLE_24C64_PAGE_SIZE);
+ if (tempWriteLen > currentLen) {
+ tempWriteLen = currentLen;
+ }
+ /* Set the memory address of eeprom. */
+ tempWrite[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempWrite[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ CopyData(&tempWrite[I2C_SAMPLE_24C64_ADDR_SIZE], tempBuffer, tempWriteLen);
+ /* Send data to eeprom. */
+ ret = HAL_I2C_MasterWriteBlocking(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempWrite,
+ tempWriteLen + I2C_SAMPLE_24C64_ADDR_SIZE, I2C_SAMPLE_MAX_TIMEOUT);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ break;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempWriteLen;
+ currentLen -= tempWriteLen;
+ tempBuffer += tempWriteLen;
+ }
+ return ret;
+}
+
+/**
+ * @brief Send and receive data with the 24c64 eeprom in interrupt mode as master.
+ * @retval None.
+ */
+void I2cBlocking24c64Processing(void)
+{
+ BASE_StatusType ret;
+ unsigned int i;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Blocking 24C64 Start\r\n");
+ for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x5A; /* The written data. */
+ }
+ BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */
+ for (int j = 0; j < I2C_SAMPLE_24C64_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+ /* Write 24c64 data */
+ ret = Sample24c64WriteData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempWriteBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+ BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */
+ /* Read 24c64 data */
+ ret = Sample24c64ReadData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempReadBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+ BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i,
+ tempReadBuff[i], tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/inc/sample_i2c_master_dma_at24c64.h b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/inc/sample_i2c_master_dma_at24c64.h
new file mode 100644
index 000000000..5666e536e
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/inc/sample_i2c_master_dma_at24c64.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_dma_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module dma as master.
+ * @details This sample demonstrates how to use the I2C master DMA interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_MASTER_DAM_AT24C64_H
+#define McuMagicTag_SAMPLE_I2C_MASTER_DAM_AT24C64_H
+
+void I2cDma24c64Processing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_MASTER_DAM_AT24C64_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.c b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.c
new file mode 100644
index 000000000..2ac1fa57f
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.c
@@ -0,0 +1,53 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_master_dma_at24c64.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+DMA_Handle g_dmac;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cDma24c64Processing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.h b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.h
new file mode 100644
index 000000000..9e0d9fccb
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/main.h
@@ -0,0 +1,54 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/system_init.c b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/system_init.c
new file mode 100644
index 000000000..dd44a7127
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/init/system_init.c
@@ -0,0 +1,212 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel0Init(void *handle)
+{
+ /* Setting DMA-related parameters. */
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.destAddrInc = DMA_ADDR_INCREASE;
+ dma_param.srcPeriph = DMA_REQUEST_I2C0_RX;
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ /* Set the moving position width. */
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ /* DMA Channel initialization. */
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO);
+}
+
+static void DMA_Channel1Init(void *handle)
+{
+ /* Setting DMA-related parameters. */
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_INCREASE;
+ dma_param.destAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.srcPeriph = DMA_REQUEST_MEM;
+ dma_param.destPeriph = DMA_REQUEST_I2C0_TX;
+ /* Set the moving position width. */
+ dma_param.srcWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.destWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ /* DMA Channel initialization. */
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ONE);
+}
+
+static void DMA_Init(void)
+{
+ /* DMA initialization. */
+ HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE);
+ g_dmac.baseAddress = DMA;
+ /* Configuring DMA Interrupt Parameters. */
+ IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac);
+ IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac);
+ /* Setting the Channel Priority and Initializing the Channel. */
+ DMA_Channel0Init((void *)(&g_i2c0));
+ HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST);
+ DMA_Channel1Init((void *)(&g_i2c0));
+ HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ONE, DMA_PRIORITY_HIGHEST);
+}
+
+__weak void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0TxCallback */
+ /* USER CODE END I2C0TxCallback */
+}
+
+__weak void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0RxCallback */
+ /* USER CODE END I2C0RxCallback */
+}
+
+__weak void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0ErrorCallback */
+ /* USER CODE END I2C0ErrorCallback */
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_MASTER_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.state = I2C_STATE_RESET;
+ g_i2c0.rxWaterMark = 1; /* The value of rx Water mark is 1. */
+ g_i2c0.txWaterMark = 12; /* The value of tx Water mark is 12. */
+ g_i2c0.dmaHandle = &g_dmac;
+ g_i2c0.txDmaCh = DMA_CHANNEL_ONE;
+ g_i2c0.rxDmaCh = DMA_CHANNEL_ZERO;
+ HAL_I2C_Init(&g_i2c0);
+
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_MASTER_TX_COMPLETE_CB_ID, I2C0TxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_MASTER_RX_COMPLETE_CB_ID, I2C0RxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_ERROR_CB_ID, I2C0ErrorCallback);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/readme.md b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/readme.md
new file mode 100644
index 000000000..3e011c26d
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/readme.md
@@ -0,0 +1,19 @@
+# 配置I2C作为主机以DMA方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 主机，数据读取，数据发送，DMA方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过中断方式与EEPROM(AT24C64)进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1实现与EEPROM的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、通讯速率、DMA通道等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册收发完成、传输错误时的回调函数。
+
++ 操作I2C写入和读取EEPROM的内容：通过调用 "HAL_I2C_MasterWriteDMA()"接口以DMA方式向EEPROM目标内存地址写入数据；通过调用"HAL_I2C_MasterReadDMA()"接口以DMA方式实现从EEPROM的目标地址中接收数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以DMA方式向EEPROM写入和读取写入的内容，Debug串口打印I2C与EEPROM进行通信交互的结果信息，当写入和读取的数据一致时Debug串口打印"I2C Data Success"；当写入和读取的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接EEPROM(AT24C64)，且保证EEPROM的7bit地址为50，否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_dma_at24c64/src/sample_i2c_master_dma_at24c64.c b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/src/sample_i2c_master_dma_at24c64.c
new file mode 100644
index 000000000..d51275749
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_dma_at24c64/src/sample_i2c_master_dma_at24c64.c
@@ -0,0 +1,286 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_dma_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module dma as master.
+ * @details This sample demonstrates how to use the I2C master DMA interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#include "i2c.h"
+#include "dma.h"
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_master_dma_at24c64.h"
+
+#define DEV_24C64_ADDRESS_WRITE 0xA0
+#define DEV_24C64_ADDRESS_READ 0xA1
+#define I2C_SAMPLE_24C64_OPT_LEN 8
+#define I2C_SAMPLE_24C64_OPT_START_ADDR 0x0
+#define I2C_SAMPLE_24C64_DATA_OFFSET 2
+#define I2C_SAMPLE_24C64_PAGE_SIZE 32
+#define I2C_SAMPLE_24C64_ADDR_SIZE 2
+#define I2C_SAMPLE_24C64_OPT_ONCE_LEN 255
+
+#define I2C_SAMPLE_24C64_ADDRESS_POS 8
+#define I2C_SAMPLE_24C64_ADDRESS_MASK 0xFF
+
+#define I2C_SAMPLE_24C64_TEST_NUM 100
+
+static volatile int g_txDoneFlag = BASE_CFG_UNSET;
+static volatile int g_rxDoneFlag = BASE_CFG_UNSET;
+static volatile int g_errorFlag = BASE_CFG_UNSET;
+
+/**
+ * @brief I2c dma sample tx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_txDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c dma sample rx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_rxDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c dma sample Error callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_errorFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief Copy data.
+ * @param destBuffer dest buffer.
+ * @param srcBuffer source buffer.
+ * @param len Number of the data to be copy.
+ * @retval None.
+ */
+static void CopyData(unsigned char *destBuffer, unsigned char *srcBuffer, unsigned int len)
+{
+ for (unsigned int i = 0; i < len; i++) {
+ destBuffer[i] = srcBuffer[i];
+ }
+}
+
+/**
+ * @brief Write the memory address of 24c64 eeprom.
+ * @param addrBuffer The memory address of eeprom.
+ * @param length The length of data buffer.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Write24c64MemoryAddress(unsigned char *addrBuffer, unsigned int length)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned char *tempAddr = addrBuffer;
+
+ /* Write the memory address to AT24c64 eeprom. */
+ ret = HAL_I2C_MasterWriteDMA(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempAddr, length);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for write completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET; /* Reset g_errorFlag. */
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+ return ret;
+}
+
+/**
+ * @brief Read data from the 24c64 eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK; /* Transfer success and failure status. */
+ unsigned char tempAddr[I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempReadLen;
+ unsigned char *tempBuffer = buffer;
+
+ /* Start read data to eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+ /* Set the memory address of eeprom. */
+ tempAddr[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempAddr[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempReadLen = currentLen;
+ if (currentLen > I2C_SAMPLE_24C64_OPT_ONCE_LEN) {
+ tempReadLen = I2C_SAMPLE_24C64_OPT_ONCE_LEN;
+ }
+ BASE_FUNC_DELAY_MS(5); /* Delay 5 ms. */
+ ret = Write24c64MemoryAddress(tempAddr, I2C_SAMPLE_24C64_ADDR_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ BASE_FUNC_DELAY_MS(5); /* Delay 5 ms. */
+ ret = HAL_I2C_MasterReadDMA(&g_i2c0, DEV_24C64_ADDRESS_READ, tempBuffer, tempReadLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for read completion or failure */
+ while (!(g_rxDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_rxDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ g_errorFlag = BASE_CFG_UNSET;
+ return BASE_STATUS_ERROR;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempReadLen;
+ currentLen -= tempReadLen;
+ tempBuffer += tempReadLen;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send data to the 24c64 eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64WriteData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ unsigned char tempWrite[I2C_SAMPLE_24C64_PAGE_SIZE + I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempWriteLen;
+ unsigned char *tempBuffer = buffer;
+ BASE_StatusType ret = BASE_STATUS_OK;
+
+ /* Start send data to eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+ tempWriteLen = I2C_SAMPLE_24C64_PAGE_SIZE - (currentAddr % I2C_SAMPLE_24C64_PAGE_SIZE);
+ if (tempWriteLen > currentLen) {
+ tempWriteLen = currentLen;
+ }
+ /* Set the memory address of eeprom. */
+ tempWrite[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempWrite[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ CopyData(&tempWrite[I2C_SAMPLE_24C64_ADDR_SIZE], tempBuffer, tempWriteLen);
+ BASE_FUNC_DELAY_MS(5); /* Delay 5 ms. */
+ /* Send data to eeprom. */
+ ret = HAL_I2C_MasterWriteDMA(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempWrite,
+ tempWriteLen + I2C_SAMPLE_24C64_ADDR_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ break;
+ }
+ /* Waiting for read completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ g_errorFlag = BASE_CFG_UNSET;
+ return BASE_STATUS_ERROR;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempWriteLen;
+ tempBuffer += tempWriteLen;
+ currentLen -= tempWriteLen;
+ }
+ return ret;
+}
+
+/**
+ * @brief Send and receive data with the 24c64 eeprom in dma mode as master.
+ * @retval None.
+ */
+void I2cDma24c64Processing(void)
+{
+ BASE_StatusType ret;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Dma 24C64 Start\r\n");
+ for (unsigned int i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x5A; /* The written data. */
+ }
+
+ for (int j = 0; j < I2C_SAMPLE_24C64_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+ /* Write 24c64 data */
+ ret = Sample24c64WriteData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempWriteBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ }
+ /* Read 24c64 data */
+ ret = Sample24c64ReadData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempReadBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (unsigned int i = 0; i < I2C_SAMPLE_24C64_OPT_LEN - 1; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i, tempReadBuff[i],
+ tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/inc/sample_i2c_master_interrupt_at24c64.h b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/inc/sample_i2c_master_interrupt_at24c64.h
new file mode 100644
index 000000000..0177aeb00
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/inc/sample_i2c_master_interrupt_at24c64.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_interrupt_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module interrupt as master.
+ * @details This sample demonstrates how to use the I2C master interrupt interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_MASTER_INTERRUPT_AT24C64_H
+#define McuMagicTag_SAMPLE_I2C_MASTER_INTERRUPT_AT24C64_H
+
+void I2cInterrupt24c64Processing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_MASTER_INTERRUPT_AT24C64_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.c b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.c
new file mode 100644
index 000000000..cf5190300
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_master_interrupt_at24c64.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cInterrupt24c64Processing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.h b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.h
new file mode 100644
index 000000000..340f824bd
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/main.h
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void I2C0TxCallback(void *handle);
+void I2C0RxCallback(void *handle);
+void I2C0ErrorCallback(void *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/system_init.c b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/system_init.c
new file mode 100644
index 000000000..bc14db3a2
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/init/system_init.c
@@ -0,0 +1,156 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0TxCallback */
+ /* USER CODE END I2C0TxCallback */
+}
+
+__weak void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0RxCallback */
+ /* USER CODE END I2C0RxCallback */
+}
+
+__weak void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0ErrorCallback */
+ /* USER CODE END I2C0ErrorCallback */
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_MASTER_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.state = I2C_STATE_RESET;
+ g_i2c0.rxWaterMark = 1;
+ g_i2c0.txWaterMark = 12; /* The value of tx Water mark is 12. */
+ HAL_I2C_Init(&g_i2c0);
+
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_MASTER_TX_COMPLETE_CB_ID, I2C0TxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_MASTER_RX_COMPLETE_CB_ID, I2C0RxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_ERROR_CB_ID, I2C0ErrorCallback);
+ /* Configuring I2C Interrupt Parameters. */
+ IRQ_Register(IRQ_I2C0, HAL_I2C_IrqHandler, &g_i2c0);
+ IRQ_SetPriority(IRQ_I2C0, 1);
+ IRQ_EnableN(IRQ_I2C0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/readme.md b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/readme.md
new file mode 100644
index 000000000..ce8964bcb
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/readme.md
@@ -0,0 +1,19 @@
+# 配置I2C作为主机以中断方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 主机，数据读取，数据发送，中断方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过中断方式与EEPROM(AT24C64)进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1实现与EEPROM的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、通讯速率等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册中断回调函数，并使能相关中断配置。
+
++ 操作I2C写入和读取EEPROM的内容：通过调用 "HAL_I2C_MasterWriteIT()"接口以中断方式向EEPROM目标内存地址写入数据；通过调用"HAL_I2C_MasterReadIT()"接口以中断方式实现从EEPROM的目标地址中接收数据。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以中断方式向EEPROM写入和读取写入的内容，Debug串口打印I2C与EEPROM进行通信交互的结果信息，当写入和读取的数据一致时Debug串口打印"I2C Data Success"；当写入和读取的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接EEPROM(AT24C64)，且保证EEPROM的7bit地址为50，否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/src/sample_i2c_master_interrupt_at24c64.c b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/src/sample_i2c_master_interrupt_at24c64.c
new file mode 100644
index 000000000..69d39d68d
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_master_interrupt_at24c64/src/sample_i2c_master_interrupt_at24c64.c
@@ -0,0 +1,293 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_master_interrupt_at24c64.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module interrupt as master.
+ * @details This sample demonstrates how to use the I2C master interrupt interface to read and write the EEPROM.
+ * To use this sample, the I2C interface must be connected to the AT24C64 EEPROM chip.
+ */
+#include "i2c.h"
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_master_interrupt_at24c64.h"
+
+#define DEV_24C64_ADDRESS_WRITE 0xA0
+#define DEV_24C64_ADDRESS_READ 0xA1
+#define I2C_SAMPLE_24C64_OPT_LEN 8
+#define I2C_SAMPLE_24C64_OPT_START_ADDR 0x0
+#define I2C_SAMPLE_24C64_DATA_OFFSET 2
+#define I2C_SAMPLE_24C64_PAGE_SIZE 32
+#define I2C_SAMPLE_24C64_ADDR_SIZE 2
+#define I2C_SAMPLE_24C64_OPT_ONCE_LEN 255
+#define I2C_SAMPLE_24C64_ADDRESS_POS 8
+#define I2C_SAMPLE_24C64_ADDRESS_MASK 0xFF
+
+#define I2C_SAMPLE_24C64_TEST_NUM 100
+
+static volatile int g_txDoneFlag = BASE_CFG_UNSET;
+static volatile int g_rxDoneFlag = BASE_CFG_UNSET;
+static volatile int g_errorFlag = BASE_CFG_UNSET;
+
+/**
+ * @brief I2c interrupt sample tx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_txDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample rx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_rxDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample Error callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ g_errorFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief Copy data.
+ * @param destBuffer dest buffer.
+ * @param srcBuffer source buffer.
+ * @param len Number of the data to be copy.
+ * @retval None.
+ */
+static void CopyData(unsigned char *destBuffer, unsigned char *srcBuffer, unsigned int len)
+{
+ for (unsigned int i = 0; i < len; i++) {
+ destBuffer[i] = srcBuffer[i];
+ }
+}
+
+/**
+ * @brief Write the memory address of 24c64 eeprom.
+ * @param addrBuffer The memory address of eeprom.
+ * @param length The length of data buffer.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Write24c64MemoryAddress(unsigned char *addrBuffer, unsigned int length)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned char *tempAddr = addrBuffer;
+
+ /* Write the memory address to 24c64 eeprom. */
+ HAL_I2C_MasterWriteIT(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempAddr, length);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+
+ /* Waiting for write completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET; /* Reset g_errorFlag. */
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+ return ret;
+}
+
+/**
+ * @brief Read data from the 24c64 eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64ReadData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK; /* Transfer success and failure status. */
+ unsigned char tempAddr[I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempReadLen;
+ unsigned char *tempBuffer = buffer;
+
+ /* Start read data from the 24c64 eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+
+ /* Set the memory address of eeprom. */
+ tempAddr[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempAddr[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+
+ tempReadLen = currentLen;
+ if (currentLen > I2C_SAMPLE_24C64_OPT_ONCE_LEN) {
+ tempReadLen = I2C_SAMPLE_24C64_OPT_ONCE_LEN;
+ }
+
+ ret = Write24c64MemoryAddress(tempAddr, I2C_SAMPLE_24C64_ADDR_SIZE);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+
+ ret = HAL_I2C_MasterReadIT(&g_i2c0, DEV_24C64_ADDRESS_READ,
+ tempBuffer, tempReadLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+
+ /* Waiting for read completion or failure */
+ while (!(g_rxDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_rxDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET; /* Reset g_errorFlag. */
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempReadLen;
+ currentLen -= tempReadLen;
+ tempBuffer += tempReadLen;
+ }
+ return ret;
+}
+
+/**
+ * @brief Send data to the 24c64 eeprom.
+ * @param addr The memory address of eeprom.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType Sample24c64WriteData(unsigned int addr, unsigned char *buffer, unsigned int len)
+{
+ unsigned char tempWrite[I2C_SAMPLE_24C64_PAGE_SIZE + I2C_SAMPLE_24C64_ADDR_SIZE];
+ unsigned int currentLen = len;
+ unsigned int currentAddr = addr;
+ unsigned int tempWriteLen;
+ unsigned char *tempBuffer = buffer;
+ BASE_StatusType ret = BASE_STATUS_OK;
+
+ /* Start send data to eeprom. */
+ while (1) {
+ if (currentLen == 0) {
+ break;
+ }
+ tempWriteLen = I2C_SAMPLE_24C64_PAGE_SIZE - (currentAddr % I2C_SAMPLE_24C64_PAGE_SIZE);
+ if (tempWriteLen > currentLen) {
+ tempWriteLen = currentLen;
+ }
+ /* Set the memory address of eeprom. */
+ tempWrite[0] = (currentAddr >> I2C_SAMPLE_24C64_ADDRESS_POS) & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ tempWrite[1] = currentAddr & I2C_SAMPLE_24C64_ADDRESS_MASK;
+ CopyData(&tempWrite[I2C_SAMPLE_24C64_ADDR_SIZE], tempBuffer, tempWriteLen);
+ /* Send data to eeprom. */
+ ret = HAL_I2C_MasterWriteIT(&g_i2c0, DEV_24C64_ADDRESS_WRITE, tempWrite,
+ tempWriteLen + I2C_SAMPLE_24C64_ADDR_SIZE);
+ BASE_FUNC_DELAY_MS(20); /* Delay 20 ms. */
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ break;
+ }
+
+ /* Waiting for write completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET; /* Reset g_errorFlag. */
+ DBG_PRINTF("LINE:%d,Write Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+ /* Updata the destAddress, srcAddress and len. */
+ currentAddr += tempWriteLen;
+ currentLen -= tempWriteLen;
+ tempBuffer += tempWriteLen;
+ }
+ return ret;
+}
+
+/**
+ * @brief Send and receive data with the 24c64 eeprom in interrupt mode as master.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+void I2cInterrupt24c64Processing(void)
+{
+ BASE_StatusType ret;
+ unsigned int i;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Interrupt AT24C64 Start\r\n");
+ for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x5A; /* The written data. */
+ }
+
+ for (int j = 0; j < I2C_SAMPLE_24C64_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_24C64_OPT_LEN] = {0};
+
+ /* Write 24c64 data */
+ ret = Sample24c64WriteData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempWriteBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Read 24c64 data */
+ ret = Sample24c64ReadData(I2C_SAMPLE_24C64_OPT_START_ADDR, tempReadBuff, I2C_SAMPLE_24C64_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (i = 0; i < I2C_SAMPLE_24C64_OPT_LEN; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i,
+ tempReadBuff[i], tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/inc/sample_i2c_slave_blocking.h b/drivers_sample/i2c/sample_i2c_slave_blocking/inc/sample_i2c_slave_blocking.h
new file mode 100644
index 000000000..82e72c767
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/inc/sample_i2c_slave_blocking.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_blocking.h
+ * @author MCU Driver Team
+ * @brief Sample for I2C module blocking as slave.
+ * @details This sample demonstrates how to use the I2C slave blocking interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_SLAVE_BLOCKING_H
+#define McuMagicTag_SAMPLE_I2C_SLAVE_BLOCKING_H
+
+void I2cSlaveBlockingProcessing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_SLAVE_BLOCKING_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.c b/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.c
new file mode 100644
index 000000000..5742fadab
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_slave_blocking.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cSlaveBlockingProcessing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.h b/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.h
new file mode 100644
index 000000000..bd646c19c
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/init/main.h
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/init/system_init.c b/drivers_sample/i2c/sample_i2c_slave_blocking/init/system_init.c
new file mode 100644
index 000000000..f8b0519b0
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/init/system_init.c
@@ -0,0 +1,129 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_SLAVE_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.slaveOwnAddress = 82; /* The own address of I2C is 82. */
+ g_i2c0.handleEx.slaveOwnXmbAddressEnable = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.slaveOwnXmbAddress = 0;
+ g_i2c0.generalCallMode = BASE_CFG_DISABLE;
+ g_i2c0.state = I2C_STATE_RESET;
+ HAL_I2C_Init(&g_i2c0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/readme.md b/drivers_sample/i2c/sample_i2c_slave_blocking/readme.md
new file mode 100644
index 000000000..02f77b964
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/readme.md
@@ -0,0 +1,23 @@
+# 配置I2C作为从机以阻塞方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 从机，数据读取，数据发送，阻塞方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过阻塞方式与I2C主机进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1作为从机实现与I2C主机的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、自身地址、通讯速率等参数进行配置。
+
++ 操作I2C与主机进行数据的发送和接收：
+ 1. 示例代码中首先循环等待I2C主机发送一个"0x3A"的开始标志帧，当接收到此帧后进入与I2C主机的数据发送和接收的交互；
+ 2. 调用"HAL_I2C_SlaveWriteBlocking()"接口以阻塞方式向I2C主机发送数据；
+ 3. 调用"HAL_I2C_SlaveReadBlocking()"接口以阻塞方式实现从I2C主机接收数据；
+ 4. 比较步骤2和步骤3发送和接收的数据是否一致，如果接收和发送的数据一致，则Debug串口打印"I2C Data Success"信息，不一致时打印错误信息。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以阻塞方式与主机进行数据的接收和发送，Debug串口打印I2C与主机进行通信交互的结果信息，当发送和接收的数据一致时Debug串口打印"I2C Data Success"；当接收和发送的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接主机，且保证主机寻址的地址为82（7bit地址），否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_blocking/src/sample_i2c_slave_blocking.c b/drivers_sample/i2c/sample_i2c_slave_blocking/src/sample_i2c_slave_blocking.c
new file mode 100644
index 000000000..e24287cc7
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_blocking/src/sample_i2c_slave_blocking.c
@@ -0,0 +1,148 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_blocking.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module blocking as slave.
+ * @details This sample demonstrates how to use the I2C slave blocking interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#include "i2c.h"
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_slave_blocking.h"
+
+#define I2C_SAMPLE_SLAVE_OPT_LEN 8
+#define I2C_TEST_START_FLAG 0x3A
+
+#define I2C_SAMPLE_SLAVE_TEST_NUM 500
+#define I2C_SAMPLE_MAX_TIMEOUT 10000
+
+/**
+ * @brief Read data from master.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveBlockingReadData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) { /* Number of illegal transmissions. */
+ return ret;
+ }
+ /* Read data from the master. */
+ ret = HAL_I2C_SlaveReadBlocking(&g_i2c0, tempBuffer, currentLen, I2C_SAMPLE_MAX_TIMEOUT);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send data to the master in blocking mode.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveBlockingWriteData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) { /* Number of illegal transmissions. */
+ return ret;
+ }
+ /* Send data to the master. */
+ ret = HAL_I2C_SlaveWriteBlocking(&g_i2c0, tempBuffer, currentLen, I2C_SAMPLE_MAX_TIMEOUT);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send and receive data in blocking mode as slave.
+ * @retval None.
+ */
+void I2cSlaveBlockingProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned int i;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+ unsigned char testStart = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Slave Blocking Sample Start\r\n");
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x4A; /* The written data. */
+ }
+
+ /* Waiting for the start signal from the master */
+ DBG_PRINTF("Waiting Master Start......\r\n");
+ while (true) {
+ SampleSlaveBlockingReadData(&testStart, 1);
+ if (testStart == I2C_TEST_START_FLAG) {
+ DBG_PRINTF("Master wait done\r\n");
+ break;
+ }
+ }
+
+ /* Start to send and receive test data. */
+ for (int j = 0; j < I2C_SAMPLE_SLAVE_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+
+ /* Write data to master */
+ ret = SampleSlaveBlockingWriteData(tempWriteBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Read data from master */
+ ret = SampleSlaveBlockingReadData(tempReadBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i,
+ tempReadBuff[i], tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/inc/sample_i2c_slave_dma.h b/drivers_sample/i2c/sample_i2c_slave_dma/inc/sample_i2c_slave_dma.h
new file mode 100644
index 000000000..860a34ac3
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/inc/sample_i2c_slave_dma.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_dma.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module dma as slave.
+ * @details This sample demonstrates how to use the I2C slave DMA interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_SLAVE_DMA_H
+#define McuMagicTag_SAMPLE_I2C_SLAVE_DMA_H
+
+void I2cSlaveDmaProcessing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_SLAVE_DMA_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/init/main.c b/drivers_sample/i2c/sample_i2c_slave_dma/init/main.c
new file mode 100644
index 000000000..0ff74a0aa
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/init/main.c
@@ -0,0 +1,53 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_slave_dma.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+DMA_Handle g_dmac;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cSlaveDmaProcessing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/init/main.h b/drivers_sample/i2c/sample_i2c_slave_dma/init/main.h
new file mode 100644
index 000000000..9e0d9fccb
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/init/main.h
@@ -0,0 +1,54 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+#include "dma.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+extern DMA_Handle g_dmac;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/init/system_init.c b/drivers_sample/i2c/sample_i2c_slave_dma/init/system_init.c
new file mode 100644
index 000000000..da15b6fa3
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/init/system_init.c
@@ -0,0 +1,216 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void DMA_Channel0Init(void *handle)
+{
+ /* Setting DMA-related parameters. */
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_PERIPH_TO_MEMORY_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.destAddrInc = DMA_ADDR_INCREASE;
+ dma_param.srcPeriph = DMA_REQUEST_I2C0_RX;
+ dma_param.destPeriph = DMA_REQUEST_MEM;
+ /* Set the moving position width. */
+ dma_param.srcWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.destWidth = DMA_TRANSWIDTH_BYTE;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ /* DMA Channel initialization. */
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ZERO);
+}
+
+static void DMA_Channel1Init(void *handle)
+{
+ /* Setting DMA-related parameters. */
+ DMA_ChannelParam dma_param;
+ dma_param.direction = DMA_MEMORY_TO_PERIPH_BY_DMAC;
+ dma_param.srcAddrInc = DMA_ADDR_INCREASE;
+ dma_param.destAddrInc = DMA_ADDR_UNALTERED;
+ dma_param.srcPeriph = DMA_REQUEST_MEM;
+ dma_param.destPeriph = DMA_REQUEST_I2C0_TX;
+ /* Set the moving position width. */
+ dma_param.srcWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.destWidth = DMA_TRANSWIDTH_WORD;
+ dma_param.srcBurst = DMA_BURST_LENGTH_1;
+ dma_param.destBurst = DMA_BURST_LENGTH_1;
+ dma_param.pHandle = handle;
+ /* DMA Channel initialization. */
+ HAL_DMA_InitChannel(&g_dmac, &dma_param, DMA_CHANNEL_ONE);
+}
+
+static void DMA_Init(void)
+{
+ /* DMA initialization. */
+ HAL_CRG_IpEnableSet(DMA_BASE, IP_CLK_ENABLE);
+ g_dmac.baseAddress = DMA;
+ /* Configuring DMA Interrupt Parameters. */
+ IRQ_Register(IRQ_DMA_TC, HAL_DMA_IrqHandlerTc, &g_dmac);
+ IRQ_Register(IRQ_DMA_ERR, HAL_DMA_IrqHandlerError, &g_dmac);
+ IRQ_EnableN(IRQ_DMA_TC);
+ IRQ_EnableN(IRQ_DMA_ERR);
+ HAL_DMA_Init(&g_dmac);
+ /* Setting the Channel Priority and Initializing the Channel. */
+ DMA_Channel0Init((void *)(&g_i2c0));
+ HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ZERO, DMA_PRIORITY_HIGHEST);
+ DMA_Channel1Init((void *)(&g_i2c0));
+ HAL_DMA_SetChannelPriorityEx(&g_dmac, DMA_CHANNEL_ONE, DMA_PRIORITY_HIGHEST);
+}
+
+__weak void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0TxCallback */
+ /* USER CODE END I2C0TxCallback */
+}
+
+__weak void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0RxCallback */
+ /* USER CODE END I2C0RxCallback */
+}
+
+__weak void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0ErrorCallback */
+ /* USER CODE END I2C0ErrorCallback */
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_SLAVE_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.slaveOwnAddress = 82; /* The own address of I2C is 82. */
+ g_i2c0.handleEx.slaveOwnXmbAddressEnable = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.slaveOwnXmbAddress = 0;
+ g_i2c0.generalCallMode = BASE_CFG_DISABLE;
+ g_i2c0.state = I2C_STATE_RESET;
+ g_i2c0.rxWaterMark = 1; /* The value of rx Water mark is 1. */
+ g_i2c0.txWaterMark = 12; /* The value of tx Water mark is 12. */
+ g_i2c0.dmaHandle = &g_dmac;
+ g_i2c0.txDmaCh = DMA_CHANNEL_ONE;
+ g_i2c0.rxDmaCh = DMA_CHANNEL_ZERO;
+ HAL_I2C_Init(&g_i2c0);
+
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_SLAVE_TX_COMPLETE_CB_ID, I2C0TxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_SLAVE_RX_COMPLETE_CB_ID, I2C0RxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_ERROR_CB_ID, I2C0ErrorCallback);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ DMA_Init();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/readme.md b/drivers_sample/i2c/sample_i2c_slave_dma/readme.md
new file mode 100644
index 000000000..883d89fcb
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/readme.md
@@ -0,0 +1,23 @@
+# 配置I2C作为从机以DMA方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 从机，数据读取，数据发送，DMA方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过DMA方式与I2C主机进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1作为从机实现与I2C主机的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、自身地址、接收水线和发送水线、通讯速率等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册收发完成、传输错误时的回调函数。
+
++ 操作I2C与主机进行数据的发送和接收：
+ 1. 示例代码中首先循环等待I2C主机发送一个"0x3A"的开始标志帧，当接收到此帧后进入与I2C主机的数据发送和接收的交互；
+ 2. 调用"HAL_I2C_SlaveWriteDMA()"接口以DMA方式向I2C主机发送数据；
+ 3. 调用"HAL_I2C_SlaveReadDMA()"接口以DMA方式实现从I2C主机接收数据；
+ 4. 比较步骤2和步骤3发送和接收的数据是否一致，如果接收和发送的数据一致，则Debug串口打印"I2C Data Success"信息，不一致时打印错误信息。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以DMA方式与主机进行数据的接收和发送，Debug串口打印I2C与主机进行通信交互的结果信息，当发送和接收的数据一致时Debug串口打印"I2C Data Success"；当接收和发送的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接主机，且保证主机寻址的地址为82（7bit地址），否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_dma/src/sample_i2c_slave_dma.c b/drivers_sample/i2c/sample_i2c_slave_dma/src/sample_i2c_slave_dma.c
new file mode 100644
index 000000000..4adb63d62
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_dma/src/sample_i2c_slave_dma.c
@@ -0,0 +1,208 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_dma.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module dma as slave.
+ * @details This sample demonstrates how to use the I2C slave DMA interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_slave_dma.h"
+
+#define I2C_SAMPLE_SLAVE_OPT_LEN 8
+#define I2C_TEST_START_FLAG 0x3A
+
+#define I2C_SAMPLE_SLAVE_TEST_NUM 500
+
+static volatile int g_txDoneFlag = BASE_CFG_UNSET;
+static volatile int g_rxDoneFlag = BASE_CFG_UNSET;
+static volatile int g_errorFlag = BASE_CFG_UNSET;
+
+/**
+ * @brief I2c interrupt sample tx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Tx callback\r\n");
+ g_txDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample rx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Rx callback\r\n");
+ g_rxDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample Error callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ DBG_PRINTF("Error callback\r\n");
+ g_errorFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief Read data from master in dma.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveDmaReadData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) { /* Number of illegal transmissions. */
+ return ret;
+ }
+
+ /* Read data from the master. */
+ ret = HAL_I2C_SlaveReadDMA(&g_i2c0, tempBuffer, currentLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for read completion or failure */
+ while (!(g_rxDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_rxDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ g_errorFlag = BASE_CFG_UNSET;
+ return BASE_STATUS_ERROR;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send data to the master in dma.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveDmaWriteData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK;
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) { /* Number of illegal transmissions. */
+ return ret;
+ }
+
+ /* Send data to the master. */
+ ret = HAL_I2C_SlaveWriteDMA(&g_i2c0, tempBuffer, currentLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for read completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET;
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send and receive data in dma mode as slave.
+ * @retval None.
+ */
+void I2cSlaveDmaProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned int i;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+ unsigned char testStart = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Slave Dma Sample Start\r\n");
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x4A; /* The written data. */
+ }
+ /* Waiting for the start signal from the master */
+ DBG_PRINTF("Waiting Master Start......\r\n");
+ while (true) {
+ SampleSlaveDmaReadData(&testStart, 1);
+ if (testStart == I2C_TEST_START_FLAG) {
+ DBG_PRINTF("Master wait done\r\n");
+ break;
+ }
+ }
+
+ /* Start to send and receive test data. */
+ for (int j = 0; j < I2C_SAMPLE_SLAVE_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+
+ /* Write data to master */
+ ret = SampleSlaveDmaWriteData(tempWriteBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Read data from master */
+ ret = SampleSlaveDmaReadData(tempReadBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ BASE_FUNC_DELAY_MS(10); /* Delay 10 ms. */
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i,
+ tempReadBuff[i], tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/inc/sample_i2c_slave_interrupt.h b/drivers_sample/i2c/sample_i2c_slave_interrupt/inc/sample_i2c_slave_interrupt.h
new file mode 100644
index 000000000..6490acab6
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/inc/sample_i2c_slave_interrupt.h
@@ -0,0 +1,29 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_interrupt.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module interrupt as slave.
+ * @details This sample demonstrates how to use the I2C slave interrupt interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#ifndef McuMagicTag_SAMPLE_I2C_SLAVE_INTERRUPT_H
+#define McuMagicTag_SAMPLE_I2C_SLAVE_INTERRUPT_H
+
+void I2cSlaveInterruptProcessing(void);
+
+#endif /* #ifndef McuMagicTag_SAMPLE_I2C_SLAVE_INTERRUPT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.c b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.c
new file mode 100644
index 000000000..0a65c2f2a
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.c
@@ -0,0 +1,52 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_i2c_slave_interrupt.h"
+#include "main.h"
+
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+I2C_Handle g_i2c0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ I2cSlaveInterruptProcessing();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.h b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.h
new file mode 100644
index 000000000..340f824bd
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/main.h
@@ -0,0 +1,55 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "i2c.h"
+#include "i2c_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern I2C_Handle g_i2c0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+void I2C0TxCallback(void *handle);
+void I2C0RxCallback(void *handle);
+void I2C0ErrorCallback(void *handle);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/init/system_init.c b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/system_init.c
new file mode 100644
index 000000000..db5c8a2cf
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/init/system_init.c
@@ -0,0 +1,159 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ /* Clock-related parameter configuration. */
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+ /* Initialize the clock configuration. */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+__weak void I2C0TxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0TxCallback */
+ /* USER CODE END I2C0TxCallback */
+}
+
+__weak void I2C0RxCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0RxCallback */
+ /* USER CODE END I2C0RxCallback */
+}
+
+__weak void I2C0ErrorCallback(void *handle)
+{
+ BASE_FUNC_UNUSED(handle);
+ /* USER CODE BEGIN I2C0ErrorCallback */
+ /* USER CODE END I2C0ErrorCallback */
+}
+
+static void I2C0_Init(void)
+{
+ HAL_CRG_IpEnableSet(I2C0_BASE, IP_CLK_ENABLE);
+ g_i2c0.baseAddress = I2C0;
+
+ g_i2c0.functionMode = I2C_MODE_SELECT_SLAVE_ONLY;
+ g_i2c0.addrMode = I2C_7_BITS;
+ g_i2c0.sdaHoldTime = 10; /* I2C SDA hold time 10. */
+ g_i2c0.freq = 400000; /* I2C SCL rate 400000 bit/s. */
+ g_i2c0.transferBuff = NULL;
+ g_i2c0.ignoreAckFlag = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.spikeFilterTime = 0;
+ g_i2c0.handleEx.sdaDelayTime = 0;
+ g_i2c0.timeout = 10000; /* The value of timeout is 10000ms; */
+ g_i2c0.slaveOwnAddress = 82; /* The own address of I2C is 82. */
+ g_i2c0.handleEx.slaveOwnXmbAddressEnable = BASE_CFG_DISABLE;
+ g_i2c0.handleEx.slaveOwnXmbAddress = 0;
+ g_i2c0.generalCallMode = BASE_CFG_DISABLE;
+ g_i2c0.state = I2C_STATE_RESET;
+ g_i2c0.rxWaterMark = 1; /* The value of rx Water mark is 1. */
+ g_i2c0.txWaterMark = 12; /* The value of tx Water mark is 12. */
+ HAL_I2C_Init(&g_i2c0);
+
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_SLAVE_TX_COMPLETE_CB_ID, I2C0TxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_SLAVE_RX_COMPLETE_CB_ID, I2C0RxCallback);
+ HAL_I2C_RegisterCallback(&g_i2c0, I2C_ERROR_CB_ID, I2C0ErrorCallback);
+ IRQ_Register(IRQ_I2C0, HAL_I2C_IrqHandler, &g_i2c0);
+ IRQ_SetPriority(IRQ_I2C0, 1);
+ IRQ_EnableN(IRQ_I2C0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+ /* UART-related parameter configuration. */
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE; /* Setting the UART Baud Rate. */
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE; /* Disable uart fifo mode. */
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ /* Initializing the UART0. */
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_5_AS_I2C0_SCL); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_5_AS_I2C0_SCL, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_5_AS_I2C0_SCL, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_5_AS_I2C0_SCL, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_5_AS_I2C0_SCL, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO4_6_AS_I2C0_SDA); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO4_6_AS_I2C0_SDA, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO4_6_AS_I2C0_SDA, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO4_6_AS_I2C0_SDA, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO4_6_AS_I2C0_SDA, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ I2C0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/readme.md b/drivers_sample/i2c/sample_i2c_slave_interrupt/readme.md
new file mode 100644
index 000000000..5ad208553
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/readme.md
@@ -0,0 +1,23 @@
+# 配置I2C作为从机以中断方式进行数据的接收、发送，通过Debug串口打印数据收发的结果
+## 关键字: I2C, 从机，数据读取，数据发送，中断方式
+
+**【功能描述】**
++ 示例代码基于HAL接口完成时钟、I2C控制器初始化和功能配置。通过中断方式与I2C主机进行数据的接收和数据的发送，通过Debug串口打印数据收发成功或失败的信息。
+
+**【示例配置】**
++ I2C控制器选择：可选择I2C0或I2C1作为从机实现与I2C主机的数据接收和发送。
+
++ I2C初始化：调用接口"HAL_I2C_Init()”完成对示例代码中I2C的基地址、主从模式、寻址模式（7bit寻址或10bit寻址）、自身地址、接收水线和发送水线、通讯速率等参数进行配置。调用"HAL_I2C_RegisterCallback()"接口注册中断回调函数，并使能相关中断配置。
+
++ 操作I2C与主机进行数据的发送和接收：
+ 1. 示例代码中首先循环等待I2C主机发送一个"0x3A"的开始标志帧，当接收到此帧后进入与I2C主机的数据发送和接收的交互；
+ 2. 调用"HAL_I2C_SlaveWriteIT()"接口以中断方式向I2C主机发送数据；
+ 3. 调用"HAL_I2C_SlaveReadIT()"接口以中断方式实现从I2C主机接收数据；
+ 4. 比较步骤2和步骤3发送和接收的数据是否一致，如果接收和发送的数据一致，则Debug串口打印"I2C Data Success"信息，不一致时打印错误信息。
+
+**【示例效果】**
++ 当用户烧录编译后的示例代码后，初始化和配置完成后，示例代码中会通过I2C以中断方式与主机进行数据的接收和发送，Debug串口打印I2C与主机进行通信交互的结果信息，当发送和接收的数据一致时Debug串口打印"I2C Data Success"；当接收和发送的数据不一致时Debug串口打印错误信息。
+
+**【注意事项】**
++ 示例代码使用UART0进行结果打印输出，需要对UART0配置。
++ 示例代码中I2C必须必须对接主机，且保证主机寻址的地址为82（7bit地址），否则示例代码无法正常运行。
\ No newline at end of file
diff --git a/drivers_sample/i2c/sample_i2c_slave_interrupt/src/sample_i2c_slave_interrupt.c b/drivers_sample/i2c/sample_i2c_slave_interrupt/src/sample_i2c_slave_interrupt.c
new file mode 100644
index 000000000..99554d7d2
--- /dev/null
+++ b/drivers_sample/i2c/sample_i2c_slave_interrupt/src/sample_i2c_slave_interrupt.c
@@ -0,0 +1,206 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_i2c_slave_interrupt.c
+ * @author MCU Driver Team
+ * @brief Sample for I2C module interrupt as slave.
+ * @details This sample demonstrates how to use the I2C slave interrupt interface to read and write with I2C master.
+ * To use this sample, the I2C interface must be connected to the I2C master.
+ */
+#include "i2c.h"
+#include "main.h"
+#include "debug.h"
+#include "sample_i2c_slave_interrupt.h"
+
+#define I2C_SAMPLE_SLAVE_OPT_LEN 8
+#define I2C_TEST_START_FLAG 0x3A
+
+#define I2C_SAMPLE_SLAVE_TEST_NUM 500
+
+static volatile int g_txDoneFlag = BASE_CFG_UNSET;
+static volatile int g_rxDoneFlag = BASE_CFG_UNSET;
+static volatile int g_errorFlag = BASE_CFG_UNSET;
+
+/**
+ * @brief I2c interrupt sample tx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0TxCallback(void *handle)
+{
+ DBG_PRINTF("SampleI2CTxDone\r\n");
+ BASE_FUNC_UNUSED(handle);
+ g_txDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample rx callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0RxCallback(void *handle)
+{
+ DBG_PRINTF("SampleI2CRxDone\r\n");
+ BASE_FUNC_UNUSED(handle);
+ g_rxDoneFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief I2c interrupt sample Error callback handle.
+ * @param handle I2c handle.
+ * @retval None.
+ */
+void I2C0ErrorCallback(void *handle)
+{
+ DBG_PRINTF("SampleI2CError\r\n");
+ BASE_FUNC_UNUSED(handle);
+ g_errorFlag = BASE_CFG_SET;
+}
+
+/**
+ * @brief Read data from master in interrupt.
+ * @param buffer Address of buff to be receive data.
+ * @param len Number of the data to be read.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveInterruptReadData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK; /* Transfer success and failure status. */
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) { /* Number of illegal transmissions. */
+ return ret;
+ }
+ /* Read data from the master. */
+ ret = HAL_I2C_SlaveReadIT(&g_i2c0, tempBuffer, currentLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for read completion or failure */
+ while (!(g_rxDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_rxDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET;
+ DBG_PRINTF("LINE:%d,Read Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send data to the master in interrupt.
+ * @param buffer Address of buff to be send.
+ * @param len Number of the data to be send.
+ * @retval BASE status type: OK, ERROR, BUSY, TIMEOUT.
+ */
+static BASE_StatusType SampleSlaveInterruptWriteData(unsigned char *buffer, unsigned int len)
+{
+ BASE_StatusType ret = BASE_STATUS_OK; /* Transfer success and failure status. */
+ unsigned int currentLen = len;
+ unsigned char *tempBuffer = buffer;
+
+ if (currentLen == 0) {
+ return ret;
+ }
+ /* Send data to the master. */
+ ret = HAL_I2C_SlaveWriteIT(&g_i2c0, tempBuffer, currentLen);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail!,ret:%d\r\n", __LINE__, ret);
+ return ret;
+ }
+ /* Waiting for write completion or failure */
+ while (!(g_txDoneFlag || g_errorFlag)) {
+ ;
+ }
+ g_txDoneFlag = BASE_CFG_UNSET;
+ if (g_errorFlag == BASE_CFG_SET) {
+ g_errorFlag = BASE_CFG_UNSET;
+ DBG_PRINTF("LINE:%d,Write Data Fail\r\n", __LINE__);
+ return BASE_STATUS_ERROR;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Send and receive data in interrupt mode as slave.
+ * @retval None.
+ */
+void I2cSlaveInterruptProcessing(void)
+{
+ BASE_StatusType ret;
+ unsigned int i;
+ unsigned int dataFlag;
+ unsigned char tempWriteBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+ unsigned int successCnt = 0;
+ unsigned char testStart = 0;
+
+ SystemInit();
+ DBG_PRINTF("I2C Slave Interrupt Sample Start\r\n");
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ tempWriteBuff[i] = 0x4A; /* The written data. */
+ }
+ /* Waiting for the start signal from the master */
+ DBG_PRINTF("Waiting Master Start......\r\n");
+ while (true) {
+ SampleSlaveInterruptReadData(&testStart, 1);
+ if (testStart == I2C_TEST_START_FLAG) {
+ DBG_PRINTF("Master wait done\r\n");
+ break;
+ }
+ }
+ /* Start to send and receive test data. */
+ for (int j = 0; j < I2C_SAMPLE_SLAVE_TEST_NUM; j++) {
+ unsigned char tempReadBuff[I2C_SAMPLE_SLAVE_OPT_LEN] = {0};
+
+ /* Write data to master */
+ ret = SampleSlaveInterruptWriteData(tempWriteBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Write Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ /* Read data from master */
+ ret = SampleSlaveInterruptReadData(tempReadBuff, I2C_SAMPLE_SLAVE_OPT_LEN);
+ if (ret != BASE_STATUS_OK) {
+ DBG_PRINTF("LINE:%d,Read Data Fail,ret:%d\r\n", __LINE__, ret);
+ }
+
+ BASE_FUNC_DELAY_MS(5); /* Delay 5 ms. */
+ /* Compare read and write data */
+ dataFlag = 0;
+ for (i = 0; i < I2C_SAMPLE_SLAVE_OPT_LEN; i++) {
+ if (tempReadBuff[i] != tempWriteBuff[i]) {
+ DBG_PRINTF("I2C Data error! offset[%d]\r\nReadData:0x%x\r\nWriteData:0x%x\r\n", i,
+ tempReadBuff[i], tempWriteBuff[i]);
+ dataFlag = 1;
+ break;
+ }
+ }
+
+ /* The read data is exactly the same as the written data. */
+ if (dataFlag == 0) {
+ successCnt++;
+ DBG_PRINTF("I2C Data Success\r\n");
+ }
+ }
+ DBG_PRINTF("I2C sample End!\r\nsuccessCnt:%d\r\n", successCnt);
+}
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/inc/iolist_sample.h b/drivers_sample/iocmg/iolist_sample/inc/iolist_sample.h
new file mode 100644
index 000000000..bb338cd22
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/inc/iolist_sample.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file iolist_sample.h
+ * @author MCU Driver Team
+ * @brief IOCMG module sample
+ * @details The header file contains the following declaration:
+ * This file provides sample code for users to init iolist.
+ */
+
+#ifndef IOLIST_SAMPLE_H
+#define IOLIST_SAMPLE_H
+
+void IOCMG_IOListInitSample(void);
+
+#endif /* IOLIST_SAMPLE_H */
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/init/main.c b/drivers_sample/iocmg/iolist_sample/init/main.c
new file mode 100644
index 000000000..56b83161b
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/init/main.c
@@ -0,0 +1,34 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+#include "iolist_sample.h"
+
+UART_Handle g_uart0;
+
+int main(void)
+{
+ IOCMG_IOListInitSample();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/init/main.h b/drivers_sample/iocmg/iolist_sample/init/main.h
new file mode 100644
index 000000000..0dbdd0fd3
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/init/main.h
@@ -0,0 +1,47 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "iocmg.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define UART0_TXD_PIN IOCMG_PIN_MUX(iocmg_6, FUNC_MODE_4, 0x0000)
+#define UART0_RXD_PIN IOCMG_PIN_MUX(iocmg_7, FUNC_MODE_4, 0x0000)
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/init/system_init.c b/drivers_sample/iocmg/iolist_sample/init/system_init.c
new file mode 100644
index 000000000..bc9691eec
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/init/system_init.c
@@ -0,0 +1,86 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.irqNum = IRQ_UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.fifoRxThr = UART_FIFOFULL_ONE_TWO;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOCMG_Init(void)
+{
+ IOCMG_Handle handle = {0};
+ handle.pinTypedef = UART0_RXD_PIN; /* UART0_RX pin */
+ handle.pullMode = PULL_NONE;
+ handle.schmidtMode = SCHMIDT_ENABLE;
+ handle.levelShiftRate = LEVEL_SHIFT_RATE_FAST;
+ handle.driveRate = DRIVER_RATE_2;
+ HAL_IOCMG_Init(&handle); /* iocmg handle uart0_rxd init */
+
+ handle.pinTypedef = UART0_TXD_PIN; /* UART0_TX pin */
+ handle.pullMode = PULL_NONE;
+ handle.schmidtMode = SCHMIDT_ENABLE;
+ handle.levelShiftRate = LEVEL_SHIFT_RATE_FAST;
+ handle.driveRate = DRIVER_RATE_2;
+ HAL_IOCMG_Init(&handle); /* iocmg handle uart0_txd init */
+}
+
+void SystemInit(void)
+{
+ IOCMG_Init();
+ UART0_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/readme.md b/drivers_sample/iocmg/iolist_sample/readme.md
new file mode 100644
index 000000000..1793dd8bb
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/readme.md
@@ -0,0 +1,14 @@
+# 使用HAL_IOCMG_Init API完成IO端口的相关功能配置
+## 关键字: IOCMG，iomap映射
+
+**【功能描述】**
++ 通过HAL_IOCMG_Init API初始化iolist配置表格。
+
+**【示例配置】**
++ g_ioListTable数组的初始化：该数组中的每个元素值表示一个IO端口的结构体IOCMG_Handle，而每个结构体表示某一个IO端口的所有配置信息（包括端口映射地址值pinTypedef，上下拉pullMode，施密特状态schmidtMode、管脚驱动能力levelShiftRate、电平转换速率driveRate）
+
+**【示例效果】**
++ Debug串口打印配置前的iolist数据，然后打印初始化后的寄存器中的数据，判断配置的数据和预期的是否相同，同时调用HAL_IOCMG_SetXXX API接口和HAL_IOCMG_GetXXX API分别配置和获取IOCMG寄存器的数据是否符合预期。
+
+**【注意事项】**
++ PIN NUMBER和function mode均已编码定义，在iomap中，若配置数据与定义的数据不符则配置失败返回对应的错误，已定义的pin number和function mode可在iomap.h中直接调用。
\ No newline at end of file
diff --git a/drivers_sample/iocmg/iolist_sample/src/iolist_sample.c b/drivers_sample/iocmg/iolist_sample/src/iolist_sample.c
new file mode 100644
index 000000000..79aaac038
--- /dev/null
+++ b/drivers_sample/iocmg/iolist_sample/src/iolist_sample.c
@@ -0,0 +1,103 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file iolist_sample.c
+ * @author MCU Driver Team
+ * @brief Calculate and verify the CRC value of the data.
+ * @details IOCMG Config in IOListTable, init the iolist g_resultTable, printf the config of the g_resultTable \
+ * and Get config after init ,verify the value has been configed success or not, and \
+ * set config by HAL_IOCMG_SetConfig API, and get congfig by HAL_IOCMG_GetConfig API, \
+ * Compare the config value is match or not.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "iocmg.h"
+#include "iolist_sample.h"
+
+/* for sample normalize in different chip, \
+ when user use it, needn't define this macro, just need find the io pin in the iomap.h */
+#define UART0_TXD_PIN IOCMG_PIN_MUX(iocmg_6, FUNC_MODE_4, 0x0000)
+#define UART0_RXD_PIN IOCMG_PIN_MUX(iocmg_7, FUNC_MODE_4, 0x0000)
+#define I2C0_SCL_PIN IOCMG_PIN_MUX(iocmg_14, FUNC_MODE_5, 0x0211)
+#define I2C0_SDA_PIN IOCMG_PIN_MUX(iocmg_15, FUNC_MODE_5, 0x0001)
+
+static IOCMG_Handle g_ioListTable[] = {
+ {UART0_TXD_PIN, PULL_BOTH, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_SLOW, DRIVER_RATE_2},
+ {UART0_RXD_PIN, PULL_BOTH, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_SLOW, DRIVER_RATE_2},
+ {I2C0_SCL_PIN, PULL_UP, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_FAST, DRIVER_RATE_1},
+ {I2C0_SDA_PIN, PULL_UP, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_FAST, DRIVER_RATE_1},
+};
+
+const unsigned int IOLIST_SIZE = sizeof(g_ioListTable) / sizeof(g_ioListTable[0]);
+
+/**
+ * @brief Init IOLIST by HAL_IOCMG_Init API.
+ * @param None
+ * @retval None.
+ */
+void IOCMG_IOListInitSample(void)
+{
+ /* init method 1 */
+ for (unsigned int index = 0; index < IOLIST_SIZE; ++index) {
+ HAL_IOCMG_Init(&g_ioListTable[index]); /* Use the HAL_IOCMG_Init function to init uart. */
+ }
+ DBG_UartPrintInit(115200); /* 115200 : baud rate */
+ BASE_FUNC_DELAY_MS(10); /* 10 : delay 10ms */
+ while (1) {
+ DBG_PRINTF("**************************************************************\r\n");
+ /* test API */
+ for (unsigned int index = 0; index < IOLIST_SIZE; ++index) {
+ DBG_PRINTF("\r\nindex = %d Func Num = %d \r\n", index, \
+ HAL_IOCMG_GetPinAltFuncMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Pull Mode = %d \r\n", HAL_IOCMG_GetPinPullMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Level Shift Rate = %d \r\n", HAL_IOCMG_GetPinLevelShiftRate(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Schmidt Mode = %d \r\n", HAL_IOCMG_GetPinSchmidtMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Drive Rate = %d \r\n", HAL_IOCMG_GetPinDriveRate(g_ioListTable[index].pinTypedef));
+ BASE_FUNC_DELAY_MS(10); /* 10: Prevents the printing rate of the serial port from being too high. */
+ }
+
+ /* init method 2 */
+ for (unsigned int index = 2; index < IOLIST_SIZE; ++index) {
+ HAL_IOCMG_SetPinAltFuncMode(g_ioListTable[index].pinTypedef);
+ HAL_IOCMG_SetPinPullMode(g_ioListTable[index].pinTypedef, PULL_BOTH);
+ HAL_IOCMG_SetPinLevelShiftRate(g_ioListTable[index].pinTypedef, LEVEL_SHIFT_RATE_SLOW);
+ HAL_IOCMG_SetPinSchmidtMode(g_ioListTable[index].pinTypedef, SCHMIDT_ENABLE);
+ HAL_IOCMG_SetPinDriveRate(g_ioListTable[index].pinTypedef, DRIVER_RATE_2);
+ }
+ /* test API */
+ for (unsigned int index = 2; index < IOLIST_SIZE; ++index) {
+ DBG_PRINTF("\r\nindex = %d Func Num = %d \r\n", index, \
+ HAL_IOCMG_GetPinAltFuncMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Pull Mode = %d \r\n", HAL_IOCMG_GetPinPullMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Level Shift Rate = %d \r\n", HAL_IOCMG_GetPinLevelShiftRate(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Schmidt Mode = %d \r\n", HAL_IOCMG_GetPinSchmidtMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Drive Rate = %d \r\n", HAL_IOCMG_GetPinDriveRate(g_ioListTable[index].pinTypedef));
+ BASE_FUNC_DELAY_MS(10); /* 10 : Prevents the printing rate of the serial port from being too high. */
+ }
+
+ /* test osc pin function */
+ HAL_IOCMG_SetOscClkFuncMode(BASE_CFG_ENABLE);
+ HAL_IOCMG_SetOscClkOutputMode(BASE_CFG_ENABLE);
+ HAL_IOCMG_SetOscClkDriveRate(DRIVER_RATE_2);
+ /* test API */
+ DBG_PRINTF("\r\nOsc func mode = %d \r\n", HAL_IOCMG_GetOscClkFuncMode());
+ DBG_PRINTF("Osc clk output mode = %d \r\n", HAL_IOCMG_GetOscClkOutputMode());
+ DBG_PRINTF("Osc drive rate = %d \r\n", HAL_IOCMG_GetOscClkDriveRate());
+ BASE_FUNC_DELAY_MS(1000U); /* delay 1s */
+ }
+}
diff --git a/drivers_sample/iocmg/sample_iocfg_list/inc/sample_iocfg_list.h b/drivers_sample/iocmg/sample_iocfg_list/inc/sample_iocfg_list.h
new file mode 100644
index 000000000..de3c67fcc
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/inc/sample_iocfg_list.h
@@ -0,0 +1,30 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_iocfg_list.h
+ * @author MCU Driver Team
+ * @brief IOCMG module sample
+ * @details The header file contains the following declaration:
+ * This file provides sample code for users to init iolist.
+ */
+
+#ifndef SAMPLE_IOCFG_LIST_H
+#define SAMPLE_IOCFG_LIST_H
+
+void IOCMG_IOListInitSample(void);
+
+#endif /* SAMPLE_IOCFG_LIST_H */
\ No newline at end of file
diff --git a/drivers_sample/iocmg/sample_iocfg_list/init/main.c b/drivers_sample/iocmg/sample_iocfg_list/init/main.c
new file mode 100644
index 000000000..f6b262251
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/init/main.c
@@ -0,0 +1,50 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_iocfg_list.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+UART_Handle g_uart0;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ IOCMG_IOListInitSample();
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/iocmg/sample_iocfg_list/init/main.h b/drivers_sample/iocmg/sample_iocfg_list/init/main.h
new file mode 100644
index 000000000..834192874
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/init/main.h
@@ -0,0 +1,49 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/iocmg/sample_iocfg_list/init/system_init.c b/drivers_sample/iocmg/sample_iocfg_list/init/system_init.c
new file mode 100644
index 000000000..1a1c721e6
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/init/system_init.c
@@ -0,0 +1,92 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_HOSC;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC;
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_1;
+
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(UART0_BASE, CRG_PLL_NO_PREDV);
+
+ g_uart0.baseAddress = UART0;
+
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT;
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING;
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X;
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_2_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_2_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_2_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_2_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_2_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_3_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_3_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_3_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_3_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_3_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/iocmg/sample_iocfg_list/readme.rd b/drivers_sample/iocmg/sample_iocfg_list/readme.rd
new file mode 100644
index 000000000..1793dd8bb
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/readme.rd
@@ -0,0 +1,14 @@
+# 使用HAL_IOCMG_Init API完成IO端口的相关功能配置
+## 关键字: IOCMG，iomap映射
+
+**【功能描述】**
++ 通过HAL_IOCMG_Init API初始化iolist配置表格。
+
+**【示例配置】**
++ g_ioListTable数组的初始化：该数组中的每个元素值表示一个IO端口的结构体IOCMG_Handle，而每个结构体表示某一个IO端口的所有配置信息（包括端口映射地址值pinTypedef，上下拉pullMode，施密特状态schmidtMode、管脚驱动能力levelShiftRate、电平转换速率driveRate）
+
+**【示例效果】**
++ Debug串口打印配置前的iolist数据，然后打印初始化后的寄存器中的数据，判断配置的数据和预期的是否相同，同时调用HAL_IOCMG_SetXXX API接口和HAL_IOCMG_GetXXX API分别配置和获取IOCMG寄存器的数据是否符合预期。
+
+**【注意事项】**
++ PIN NUMBER和function mode均已编码定义，在iomap中，若配置数据与定义的数据不符则配置失败返回对应的错误，已定义的pin number和function mode可在iomap.h中直接调用。
\ No newline at end of file
diff --git a/drivers_sample/iocmg/sample_iocfg_list/src/sample_iocfg_list.c b/drivers_sample/iocmg/sample_iocfg_list/src/sample_iocfg_list.c
new file mode 100644
index 000000000..ce9a625f4
--- /dev/null
+++ b/drivers_sample/iocmg/sample_iocfg_list/src/sample_iocfg_list.c
@@ -0,0 +1,106 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_iocfg_list.c
+ * @author MCU Driver Team
+ * @brief Calculate and verify the CRC value of the data.
+ * @details IOCMG Config in IOListTable, init the iolist g_resultTable, printf the config of the g_resultTable \
+ * and Get config after init ,verify the value has been configed success or not, and \
+ * set config by HAL_IOCMG_SetConfig API, and get congfig by HAL_IOCMG_GetConfig API, \
+ * Compare the config value is match or not.
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "debug.h"
+#include "iocmg.h"
+#include "main.h"
+#include "sample_iocfg_list.h"
+
+/* for sample normalize in different chip, \
+ when user use it, needn't define this macro, just need find the io pin in the iomap.h */
+#define UART0_TXD_PIN IOCMG_PIN_MUX(IOCFG_GPIO0_3, FUNC_MODE_3, 0x0230)
+#define UART0_RXD_PIN IOCMG_PIN_MUX(IOCFG_GPIO0_4, FUNC_MODE_3, 0x0230)
+#define I2C0_SCL_PIN IOCMG_PIN_MUX(IOCFG_GPIO4_2, FUNC_MODE_2, 0x0230)
+#define I2C0_SDA_PIN IOCMG_PIN_MUX(IOCFG_GPIO2_1, FUNC_MODE_1, 0x0220)
+
+static IOCMG_Handle g_ioListTable[] = {
+ {UART0_TXD_PIN, PULL_NONE, SCHMIDT_DISABLE, LEVEL_SHIFT_RATE_SLOW, DRIVER_RATE_2},
+ {UART0_RXD_PIN, PULL_NONE, SCHMIDT_DISABLE, LEVEL_SHIFT_RATE_SLOW, DRIVER_RATE_2},
+ {I2C0_SCL_PIN, PULL_UP, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_FAST, DRIVER_RATE_1},
+ {I2C0_SDA_PIN, PULL_UP, SCHMIDT_ENABLE, LEVEL_SHIFT_RATE_FAST, DRIVER_RATE_1},
+};
+
+const unsigned int IOLIST_SIZE = sizeof(g_ioListTable) / sizeof(g_ioListTable[0]);
+
+/**
+ * @brief Init IOLIST by HAL_IOCMG_Init API.
+ * @param None
+ * @retval None.
+ */
+void IOCMG_IOListInitSample(void)
+{
+ /* init method 1 */
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ for (unsigned int index = 0; index < IOLIST_SIZE; ++index) {
+ HAL_IOCMG_Init(&g_ioListTable[index]); /* Use the HAL_IOCMG_Init function to init uart. */
+ }
+ DBG_UartPrintInit(115200); /* 115200 : baud rate */
+ BASE_FUNC_DELAY_MS(10); /* 10 : delay 10ms */
+ while (1) {
+ DBG_PRINTF("**************************************************************\r\n");
+ /* test API */
+ for (unsigned int index = 0; index < IOLIST_SIZE; ++index) {
+ DBG_PRINTF("\r\nindex = %d Func Num = %d \r\n", index, \
+ HAL_IOCMG_GetPinAltFuncMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Pull Mode = %d \r\n", HAL_IOCMG_GetPinPullMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Level Shift Rate = %d \r\n", HAL_IOCMG_GetPinLevelShiftRate(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Schmidt Mode = %d \r\n", HAL_IOCMG_GetPinSchmidtMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Drive Rate = %d \r\n", HAL_IOCMG_GetPinDriveRate(g_ioListTable[index].pinTypedef));
+ BASE_FUNC_DELAY_MS(10); /* 10: Prevents the printing rate of the serial port from being too high. */
+ }
+
+ /* init method 2 */
+ for (unsigned int index = 2; index < IOLIST_SIZE; ++index) {
+ HAL_IOCMG_SetPinAltFuncMode(g_ioListTable[index].pinTypedef);
+ HAL_IOCMG_SetPinPullMode(g_ioListTable[index].pinTypedef, PULL_BOTH);
+ HAL_IOCMG_SetPinLevelShiftRate(g_ioListTable[index].pinTypedef, LEVEL_SHIFT_RATE_SLOW);
+ HAL_IOCMG_SetPinSchmidtMode(g_ioListTable[index].pinTypedef, SCHMIDT_ENABLE);
+ HAL_IOCMG_SetPinDriveRate(g_ioListTable[index].pinTypedef, DRIVER_RATE_2);
+ }
+ /* test API */
+ for (unsigned int index = 2; index < IOLIST_SIZE; ++index) {
+ DBG_PRINTF("\r\nindex = %d Func Num = %d \r\n", index, \
+ HAL_IOCMG_GetPinAltFuncMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Pull Mode = %d \r\n", HAL_IOCMG_GetPinPullMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Level Shift Rate = %d \r\n", HAL_IOCMG_GetPinLevelShiftRate(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Schmidt Mode = %d \r\n", HAL_IOCMG_GetPinSchmidtMode(g_ioListTable[index].pinTypedef));
+ DBG_PRINTF("Drive Rate = %d \r\n", HAL_IOCMG_GetPinDriveRate(g_ioListTable[index].pinTypedef));
+ BASE_FUNC_DELAY_MS(10); /* 10 : Prevents the printing rate of the serial port from being too high. */
+ }
+
+ /* test osc pin function */
+ HAL_IOCMG_SetOscClkFuncMode(BASE_CFG_ENABLE);
+ HAL_IOCMG_SetOscClkOutputMode(BASE_CFG_ENABLE);
+ HAL_IOCMG_SetOscClkDriveRate(DRIVER_RATE_2);
+ /* test API */
+ DBG_PRINTF("\r\nOsc func mode = %d \r\n", HAL_IOCMG_GetOscClkFuncMode());
+ DBG_PRINTF("Osc clk output mode = %d \r\n", HAL_IOCMG_GetOscClkOutputMode());
+ DBG_PRINTF("Osc drive rate = %d \r\n", HAL_IOCMG_GetOscClkDriveRate());
+ BASE_FUNC_DELAY_MS(1000U); /* delay 1s */
+ }
+}
diff --git a/drivers_sample/open_mcu b/drivers_sample/open_mcu
new file mode 160000
index 000000000..1bc802495
--- /dev/null
+++ b/drivers_sample/open_mcu
@@ -0,0 +1 @@
+Subproject commit 1bc8024950597ae9fc794ba3982564d12314e0d5
diff --git a/drivers_sample/open_mcu_1 b/drivers_sample/open_mcu_1
new file mode 160000
index 000000000..1bc802495
--- /dev/null
+++ b/drivers_sample/open_mcu_1
@@ -0,0 +1 @@
+Subproject commit 1bc8024950597ae9fc794ba3982564d12314e0d5
diff --git a/drivers_sample/pga/sample_pga/init/main.c b/drivers_sample/pga/sample_pga/init/main.c
new file mode 100644
index 000000000..cd2fe885d
--- /dev/null
+++ b/drivers_sample/pga/sample_pga/init/main.c
@@ -0,0 +1,33 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "feature.h"
+#include "main.h"
+
+PGA_Handle g_pga;
+
+int main(void)
+{
+ SystemInit();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga/init/main.h b/drivers_sample/pga/sample_pga/init/main.h
new file mode 100644
index 000000000..7dd948b29
--- /dev/null
+++ b/drivers_sample/pga/sample_pga/init/main.h
@@ -0,0 +1,43 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "pga.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern PGA_Handle g_pga;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga/init/system_init.c b/drivers_sample/pga/sample_pga/init/system_init.c
new file mode 100644
index 000000000..6afdfc728
--- /dev/null
+++ b/drivers_sample/pga/sample_pga/init/system_init.c
@@ -0,0 +1,88 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void PGA0_Init(void)
+{
+ HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE);
+
+ g_pga.baseAddress = PGA0_BASE;
+ g_pga.enable = BASE_CFG_ENABLE;
+ g_pga.extLoopbackEn = BASE_CFG_DISABLE;
+ g_pga.pgaMux = PGA_INTER_RES_VI0; /* use Internal resistance */
+ g_pga.gain = PGA_GAIN_2X; /* Gain value: 2 */
+
+ HAL_PGA_Init(&g_pga);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_40.BIT.func = 0x8; /* 0x8 is PGA0_ANA_EXT */
+ iconfig->iocmg_40.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_40.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_40.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_40.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_40.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_39.BIT.func = 0x9; /* 0x9 is PGA0_ANA_N */
+ iconfig->iocmg_39.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_39.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_39.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_39.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_39.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_38.BIT.func = 0x9; /* 0x9 is PGA0_ANA_P */
+ iconfig->iocmg_38.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_38.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_38.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_38.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_38.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ PGA0_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga/readme.md b/drivers_sample/pga/sample_pga/readme.md
new file mode 100644
index 000000000..dc1f94ada
--- /dev/null
+++ b/drivers_sample/pga/sample_pga/readme.md
@@ -0,0 +1,14 @@
+# 可编译增益放大器-内部电阻模式的增益放大
+## 关键字: PGA, 内部电阻模式
+
+**【功能描述】**
++ 内部电阻模式下，对输入信号进行放大。
+
+**【示例配置】**
++ 本示例中采用内部电阻模式， 增益放大值为X2倍，增益值可在PGA模块的配置界面中进行更改，其对应的设置选项为“g_pga.gain”。
+
+**【示例效果】**
++ 在IOCMG_38输入正端信号，在IOCMG_39输入负端信号，在IOCMG_40输出放大后的信号。
+
+**【注意事项】**
++ 增益可编程为x2, x4, x8, x16。
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_extra_resistor/init/main.c b/drivers_sample/pga/sample_pga_extra_resistor/init/main.c
new file mode 100644
index 000000000..3e64c9229
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_extra_resistor/init/main.c
@@ -0,0 +1,34 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+#include "typedefs.h"
+#include "feature.h"
+#include "main.h"
+
+PGA_Handle g_pgaExt;
+
+int main(void)
+{
+ SystemInit();
+ while (1) {
+ }
+ return BASE_STATUS_OK;
+}
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_extra_resistor/init/main.h b/drivers_sample/pga/sample_pga_extra_resistor/init/main.h
new file mode 100644
index 000000000..103838e0d
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_extra_resistor/init/main.h
@@ -0,0 +1,43 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "pga.h"
+#include "crg.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+extern PGA_Handle g_pgaExt;
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_extra_resistor/init/system_init.c b/drivers_sample/pga/sample_pga_extra_resistor/init/system_init.c
new file mode 100644
index 000000000..ab82f453a
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_extra_resistor/init/system_init.c
@@ -0,0 +1,88 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllFbDiv = 32; /* PLL Multiplier 32 */
+ crg.pllPostDiv = CRG_PLL_POSTDIV_1;
+ crg.coreClkSelect = CRG_CORE_CLK_SELECT_PLL;
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR;
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void PGA1_Init(void)
+{
+ HAL_CRG_IpEnableSet(PGA1_BASE, IP_CLK_ENABLE);
+
+ g_pgaExt.baseAddress = PGA1_BASE; /* pga1 */
+ g_pgaExt.enable = BASE_CFG_ENABLE;
+ g_pgaExt.extLoopbackEn = BASE_CFG_DISABLE;
+ g_pgaExt.pgaMux = PGA_EXT_RES_VI0; /* use external resistor */
+ g_pgaExt.gain = PGA_GAIN_1X;
+
+ HAL_PGA_Init(&g_pgaExt);
+}
+
+static void IOConfig(void)
+{
+ IOConfig_RegStruct *iconfig = IOCONFIG;
+
+ iconfig->iocmg_22.BIT.func = 0x9; /* 0x9 is PGA1_ANA_P */
+ iconfig->iocmg_22.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_22.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_22.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_22.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_22.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_23.BIT.func = 0x9; /* 0x9 is PGA1_ANA_N */
+ iconfig->iocmg_23.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_23.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_23.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_23.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_23.BIT.se = BASE_CFG_DISABLE;
+
+ iconfig->iocmg_24.BIT.func = 0x8; /* 0x8 is PGA1_ANA_EXT */
+ iconfig->iocmg_24.BIT.ds = IO_DRV_LEVEL2;
+ iconfig->iocmg_24.BIT.pd = BASE_CFG_DISABLE;
+ iconfig->iocmg_24.BIT.pu = BASE_CFG_DISABLE;
+ iconfig->iocmg_24.BIT.sr = IO_SPEED_SLOW;
+ iconfig->iocmg_24.BIT.se = BASE_CFG_DISABLE;
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ PGA1_Init();
+
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_extra_resistor/readme.md b/drivers_sample/pga/sample_pga_extra_resistor/readme.md
new file mode 100644
index 000000000..faffe87d6
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_extra_resistor/readme.md
@@ -0,0 +1,14 @@
+# 可编译增益放大器-外部电阻模式的增益放大
+## 关键字: PGA, 外部电阻模式
+
+**【功能描述】**
++ 外部电阻模式下，对输入信号进行放大。
+
+**【示例配置】**
++ 本示例中采用外部电阻模式， 放大倍数需通过外部电阻配置。
+
+**【示例效果】**
++ 在IOCMG_22输入正端信号，在IOCMG_23输入负端信号，在IOCMG_24输出放大后的信号。
+
+**【注意事项】**
++ 外部电阻模式，依赖外部电阻，灵活可调增益。
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/inc/sample_pga_result_sampling.h b/drivers_sample/pga/sample_pga_result_sampling/inc/sample_pga_result_sampling.h
new file mode 100644
index 000000000..ea4867a41
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/inc/sample_pga_result_sampling.h
@@ -0,0 +1,31 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_pga_result_sampling.h
+ * @author MCU Driver Team
+ * @brief pga sample module.
+ * @details This file provides users with sample code to help use pga function.
+ */
+#ifndef SAMPLE_PGA_RESULT_SAMPLING_H
+#define SAMPLE_PGA_RESULT_SAMPLING_H
+
+#include "debug.h"
+#include "adc.h"
+#include "main.h"
+
+void PGA_ReultSampling(void);
+#endif
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/init/main.c b/drivers_sample/pga/sample_pga_result_sampling/init/main.c
new file mode 100644
index 000000000..baca48b07
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/init/main.c
@@ -0,0 +1,52 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.c
+ * @author MCU Driver Team
+ * @brief Main program body.
+ */
+
+#include "typedefs.h"
+#include "feature.h"
+#include "sample_pga_result_sampling.h"
+#include "main.h"
+/* USER CODE BEGIN 0 */
+/* USER CODE END 0 */
+PGA_Handle g_pga0;
+UART_Handle g_uart0;
+ADC_Handle g_adc;
+/* USER CODE BEGIN 1 */
+/* USER CODE END 1 */
+
+int main(void)
+{
+ /* USER CODE BEGIN 2 */
+ /* USER CODE END 2 */
+ PGA_ReultSampling();
+ /* USER CODE BEGIN 3 */
+ /* USER CODE END 3 */
+ while (1) {
+ /* USER CODE BEGIN 4 */
+ /* USER CODE END 4 */
+ }
+ /* USER CODE BEGIN 5 */
+ /* USER CODE END 5 */
+ return BASE_STATUS_OK;
+}
+
+/* USER CODE BEGIN 6 */
+/* USER CODE END 6 */
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/init/main.h b/drivers_sample/pga/sample_pga_result_sampling/init/main.h
new file mode 100644
index 000000000..c97081771
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/init/main.h
@@ -0,0 +1,54 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file main.h
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+/* Define to prevent recursive inclusion ------------------------------------- */
+#ifndef McuMagicTag_SYSTEM_INIT_H
+#define McuMagicTag_SYSTEM_INIT_H
+
+#include "uart.h"
+#include "uart_ex.h"
+#include "dac.h"
+#include "pga.h"
+#include "crg.h"
+#include "iocmg.h"
+#include "adc.h"
+
+#define IO_SPEED_FAST 0x00U
+#define IO_SPEED_SLOW 0x01U
+
+#define IO_DRV_LEVEL4 0x00U
+#define IO_DRV_LEVEL3 0x01U
+#define IO_DRV_LEVEL2 0x02U
+#define IO_DRV_LEVEL1 0x03U
+
+#define XTAL_DRV_LEVEL4 0x03U
+#define XTAL_DRV_LEVEL3 0x02U
+#define XTAL_DRV_LEVEL2 0x01U
+#define XTAL_DRV_LEVEL1 0x00U
+
+extern UART_Handle g_uart0;
+extern ADC_Handle g_adc;
+extern PGA_Handle g_pga0;
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect);
+void SystemInit(void);
+
+#endif /* McuMagicTag_SYSTEM_INIT_H */
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/init/system_init.c b/drivers_sample/pga/sample_pga_result_sampling/init/system_init.c
new file mode 100644
index 000000000..7060c137b
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/init/system_init.c
@@ -0,0 +1,143 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file system_init.c
+ * @author MCU Driver Team
+ * @brief This file contains driver init functions.
+ */
+
+#include "main.h"
+#include "ioconfig.h"
+#include "iocmg_ip.h"
+
+#define UART0_BAND_RATE 115200
+
+BASE_StatusType CRG_Config(CRG_CoreClkSelect *coreClkSelect)
+{
+ BASE_FUNC_ASSERT_PARAM(coreClkSelect != NULL);
+
+ CRG_Handle crg;
+ crg.baseAddress = CRG;
+ crg.pllRefClkSelect = CRG_PLL_REF_CLK_SELECT_HOSC;
+ crg.pllFbDiv = 0x30; /* PLL loop divider ratio = 0x30 */
+ crg.pllPreDiv = CRG_PLL_PREDIV_4;
+ crg.pllPostDiv = CRG_PLL_POSTDIV_2;
+ crg.coreClkSelect = 0; /* Inner clock HOSC select. */
+ crg.handleEx.pllPostDiv2 = CRG_PLL_POSTDIV2_3;
+ crg.handleEx.clk1MSelect = CRG_1M_CLK_SELECT_HOSC; /* Set the 1MHz clock select. */
+ crg.handleEx.clk1MDiv = 0x29; /* Default frequency divider of the 1 MHz clock = 0x29 */
+ if (HAL_CRG_Init(&crg) != BASE_STATUS_OK) {
+ return BASE_STATUS_ERROR; /* CRG init error. */
+ }
+ *coreClkSelect = crg.coreClkSelect;
+ return BASE_STATUS_OK;
+}
+
+static void PGA0_Init(void)
+{
+ HAL_CRG_IpEnableSet(PGA0_BASE, IP_CLK_ENABLE);
+ HAL_CRG_IpClkSelectSet(PGA0_BASE, 0);
+
+ g_pga0.baseAddress = PGA0_BASE;
+ g_pga0.gain = PGA_GAIN_2X; /* PGA gain value. */
+ g_pga0.externalResistorMode = BASE_CFG_DISABLE; /* Inner resistor mode. */
+ HAL_PGA_Init(&g_pga0);
+}
+
+static void UART0_Init(void)
+{
+ HAL_CRG_IpEnableSet(UART0_BASE, IP_CLK_ENABLE);
+
+ g_uart0.baseAddress = UART0;
+ g_uart0.baudRate = UART0_BAND_RATE;
+ g_uart0.dataLength = UART_DATALENGTH_8BIT; /* Word length 8 bit. */
+ g_uart0.stopBits = UART_STOPBITS_ONE;
+ g_uart0.parity = UART_PARITY_NONE;
+ g_uart0.txMode = UART_MODE_BLOCKING; /* UART blocking mode. */
+ g_uart0.rxMode = UART_MODE_BLOCKING;
+ g_uart0.fifoMode = BASE_CFG_ENABLE;
+ g_uart0.fifoTxThr = UART_FIFODEPTH_SIZE8; /* UART FIFO depth. */
+ g_uart0.fifoRxThr = UART_FIFODEPTH_SIZE8;
+ g_uart0.hwFlowCtr = BASE_CFG_DISABLE;
+ g_uart0.handleEx.overSampleMultiple = UART_OVERSAMPLING_16X; /* Oversamping 16x. */
+ g_uart0.handleEx.msbFirst = BASE_CFG_DISABLE;
+ HAL_UART_Init(&g_uart0);
+}
+
+static void IOConfig(void)
+{
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_7_AS_PGA0_OUT); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_7_AS_PGA0_OUT, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_7_AS_PGA0_OUT, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_7_AS_PGA0_OUT, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_7_AS_PGA0_OUT, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_6_AS_PGA0_N0); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_6_AS_PGA0_N0, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_6_AS_PGA0_N0, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_6_AS_PGA0_N0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_6_AS_PGA0_N0, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO2_5_AS_PGA0_P0); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO2_5_AS_PGA0_P0, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO2_5_AS_PGA0_P0, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO2_5_AS_PGA0_P0, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO2_5_AS_PGA0_P0, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_3_AS_UART0_TXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_3_AS_UART0_TXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_3_AS_UART0_TXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_3_AS_UART0_TXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_3_AS_UART0_TXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+
+ HAL_IOCMG_SetPinAltFuncMode(GPIO0_4_AS_UART0_RXD); /* Check function selection */
+ HAL_IOCMG_SetPinPullMode(GPIO0_4_AS_UART0_RXD, PULL_NONE); /* Pull-up and pull-down */
+ HAL_IOCMG_SetPinSchmidtMode(GPIO0_4_AS_UART0_RXD, SCHMIDT_DISABLE); /* Schmitt input on/off */
+ HAL_IOCMG_SetPinLevelShiftRate(GPIO0_4_AS_UART0_RXD, LEVEL_SHIFT_RATE_SLOW); /* Output drive capability */
+ HAL_IOCMG_SetPinDriveRate(GPIO0_4_AS_UART0_RXD, DRIVER_RATE_2); /* Output signal edge fast/slow */
+}
+
+
+static void ADC0_Init(void)
+{
+ HAL_CRG_IpEnableSet(ADC0_BASE, IP_CLK_ENABLE); /* ADC clock configure. */
+ HAL_CRG_IpClkSelectSet(ADC0_BASE, CRG_ADC_CLK_ASYN_PLL_DIV);
+ HAL_CRG_IpClkDivSet(ADC0_BASE, CRG_ADC_DIV_2);
+
+ g_adc.baseAddress = ADC0;
+ g_adc.socPriority = ADC_PRIMODE_ALL_ROUND;
+
+ HAL_ADC_Init(&g_adc); /* ADC init configure. */
+
+ SOC_Param socParam = {0};
+ socParam.adcInput = ADC_CH_ADCINA0; /* PIN47(ADC AIN2) */
+ socParam.sampleTotalTime = ADC_SOCSAMPLE_5CLK; /* adc sample total time 5 adc_clk */
+ socParam.trigSource = ADC_TRIGSOC_SOFT;
+ socParam.continueMode = BASE_CFG_DISABLE;
+ socParam.finishMode = ADC_SOCFINISH_NONE;
+ HAL_ADC_ConfigureSoc(&g_adc, ADC_SOC_NUM1, &socParam); /* SOC configure. */
+}
+
+void SystemInit(void)
+{
+ IOConfig();
+ UART0_Init();
+ ADC0_Init();
+ PGA0_Init();
+ /* USER CODE BEGIN system_init */
+ /* USER CODE END system_init */
+}
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/readme.md b/drivers_sample/pga/sample_pga_result_sampling/readme.md
new file mode 100644
index 000000000..916ae67da
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/readme.md
@@ -0,0 +1,16 @@
+# 运放的基本使用 - ADC采样PGA的输出电压
+## 关键字: PGA放大电压
+
+**【功能描述】**
++ 内部电阻模式下，PGA对输入电压放大，并使用ADC采样PGA的输出电压。
+
+**【示例配置】**
++ 本示例中使用了PGA的内部电阻模式，电压输出到PGA端，通过PGA进行2倍的放大，并通过ADC将最后采样结果输出。
+
++ 本示例中采用内部电阻模式， 增益放大值为X2倍，增益值可在PGA模块的配置界面中进行更改，其对应的设置选项为“g_pga.gain”。
+
+**【示例效果】**
++ PGA的运放结果会通过ADC的采样进行输出，并通过串口0将结果输出。
+
+**【注意事项】**
++ 增益可编程为x2, x4, x8, x16。
\ No newline at end of file
diff --git a/drivers_sample/pga/sample_pga_result_sampling/src/sample_pga_result_sampling.c b/drivers_sample/pga/sample_pga_result_sampling/src/sample_pga_result_sampling.c
new file mode 100644
index 000000000..1ead4584e
--- /dev/null
+++ b/drivers_sample/pga/sample_pga_result_sampling/src/sample_pga_result_sampling.c
@@ -0,0 +1,51 @@
+/**
+ * @copyright Copyright (c) 2022, HiSilicon (Shanghai) Technologies Co., Ltd. All rights reserved.
+ * Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
+ * following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
+ * following disclaimer in the documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * @file sample_pga_result_sampling.c
+ * @author MCU Driver Team
+ * @brief pga sample module.
+ * @details (1) In this example, the internal resistor mode of the PGA is used. The voltage is output to PGA through
+ * the DAC, the PGA is amplified by 2 times, and the last sampled result is output through the ADC.
+ * (2) the internal resistor mode is used, and the gain magnification value is X2.
+ * The gain value can be changed on the PGA module configuration interface.
+ */
+
+#include "sample_pga_result_sampling.h"
+
+/**
+ * @brief The PGA amplifies the DAC voltage and uses the ADC to sample the output of the PGA.
+ * @param None.
+ * @retval None.
+ */
+void PGA_ReultSampling(void)
+{
+ SystemInit();
+ DBG_PRINTF("The PGA amplifies the output of the DAC and uses the ADC to sample the result.\r\n");
+ /* Configure ADC software triggering. */
+ HAL_ADC_SoftTrigSample(&g_adc, ADC_SOC_NUM1);
+ BASE_FUNC_DELAY_MS(10); /* delay 10 ms */
+ if (HAL_ADC_CheckSocFinish(&g_adc, ADC_SOC_NUM1) == BASE_STATUS_ERROR) {
+ DBG_PRINTF("ADC sampling error output.\r\n");
+ return;
+ }
+ /* Software trigger ADC sampling */
+ unsigned int ret = HAL_ADC_GetConvResult(&g_adc, ADC_SOC_NUM1);
+ DBG_PRINTF("Sampling completed, result: %x\r\n", ret);
+ float voltage = (float)ret / (float)4096 * 3.3; /* 4096 and 3.3 are for Sample Value Conversion */
+ DBG_PRINTF("Output voltage of the PGA: %f\r\n", voltage);
+ return;
+}
\ No newline at end of file
diff --git a/drivers_sample/pic/1726194739756.jpg b/drivers_sample/pic/1726194739756.jpg
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