From 8d5bb3dffd8a33b182c98147a27a73fc4f28dbbe Mon Sep 17 00:00:00 2001 From: Qiuxu Zhuo Date: Fri, 13 Jan 2023 11:28:00 +0800 Subject: [PATCH] EDAC/i10nm: Add Intel Emerald Rapids server support commit e4b2bc6616e21f4a7ce4e7452f716e3db8fe66b6 upstream. The Emerald Rapids CPU model uses similar memory controller registers as Sapphire Rapids server. Add Emerald Rapids CPU model number ID for EDAC support. Intel-SIG: commit e4b2bc6616e2 EDAC/i10nm: Add Intel Emerald Rapids server support. Backport to decode memory error for Intel Emerald Rapids server. Tested-by: Li Zhang Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck Link: https://lore.kernel.org/all/20230113032802.41752-1-qiuxu.zhuo@intel.com [ Youquan Song: amend commit log ] Signed-off-by: Youquan Song --- arch/x86/include/asm/intel-family.h | 2 ++ drivers/edac/i10nm_base.c | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index a113c16f7efd..15e7f97087c5 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -95,6 +95,8 @@ #define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F +#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF + /* "Small Core" Processors (Atom) */ #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c index 07e443b69d60..d78db059de34 100644 --- a/drivers/edac/i10nm_base.c +++ b/drivers/edac/i10nm_base.c @@ -672,6 +672,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = { { X86_VENDOR_INTEL, 6, INTEL_FAM6_ICELAKE_X, 0, (kernel_ulong_t)&i10nm_cfg0 }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ICELAKE_D, 0, (kernel_ulong_t)&i10nm_cfg1 }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_SAPPHIRERAPIDS_X, 0, (kernel_ulong_t)&spr_cfg }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_EMERALDRAPIDS_X, 0, (kernel_ulong_t)&spr_cfg }, { } }; MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids); -- Gitee