diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 3f5ccf2b5c0264b79803d6130172c2d292f8b948..11d95cb6943194406accfc1e72a1fbc8b4610e77 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -92,6 +92,7 @@ #define PHYTIUM_CPU_PART_2000PLUS 0x662 #define PHYTIUM_CPU_PART_2004 0x663 #define PHYTIUM_CPU_PART_2500 0x663 +#define PHYTIUM_CPU_PART_FTC862 0x862 #define CAVIUM_CPU_PART_THUNDERX 0x0A1 #define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2 @@ -181,6 +182,7 @@ #define MIDR_FT_2000PLUS MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2000PLUS) #define MIDR_FT_2004 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2004) #define MIDR_FT_2500 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_2500) +#define MIDR_PHYTIUM_FTC862 MIDR_CPU_MODEL(ARM_CPU_IMP_PHYTIUM, PHYTIUM_CPU_PART_FTC862) #ifndef __ASSEMBLY__ diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 96f870e830625c42129bcff9318dee2bcb6a6f5d..7f2c3a123323a082bf5012397062f8965e5b32b6 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -390,6 +390,19 @@ static void __init fdt_enforce_memory_region(void) memblock_add(rgn[i].base, rgn[i].size); } +#ifdef CONFIG_ARCH_PHYTIUM +#define SOCID_PS23064 0x8 +#define RMV_PS23064 0x510783f00000 +static inline void phytium_ps23064_quirk(void) +{ + if (read_sysreg_s(SYS_AIDR_EL1) == SOCID_PS23064 && + read_cpuid_id() == MIDR_PHYTIUM_FTC862) { + pr_warn("Enable Phytium S5000C-128 Core quirk\n"); + memblock_remove(RMV_PS23064, (1ULL << PHYS_MASK_SHIFT) - RMV_PS23064); + } +} +#endif + void __init arm64_memblock_init(void) { const s64 linear_region_size = BIT(vabits_actual - 1); @@ -399,7 +412,10 @@ void __init arm64_memblock_init(void) /* Remove memory above our supported physical address size */ memblock_remove(1ULL << PHYS_MASK_SHIFT, ULLONG_MAX); - +#ifdef CONFIG_ARCH_PHYTIUM + if (IS_ENABLED(CONFIG_KASAN)) + phytium_ps23064_quirk(); +#endif /* * Select a suitable value for the base of physical memory. */