vtags 旨在开发一款在vim/emacs等通用编辑器下, 对verilog/VHDL的设计代码进行类似verdi的信号追踪、显示拓扑等功能的插件，vtags插件完全使用python实现，目前实现了在vim下对verilog设计进行信号追踪、宏定义追踪、显示模块拓扑、快速打开文件、保存和打开vim快照、添加断点等功能。
vtags is a gvim plugin, it's function similar like verdi's trace verilog signal function, this plugin writed by python, currently support: trace signal，macro define trace，show module's topology，quick access，save and opend a snapshort, add checkpiont etc.
