From acdf582f50bc4578d19e2775e0314cf2c7705fa0 Mon Sep 17 00:00:00 2001 From: huan <3174348550@qq.com> Date: Fri, 1 Aug 2025 16:59:38 +0800 Subject: [PATCH] modify image links --- .../source_en/features/runtime/pluggable_device.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/mindspore/source_en/features/runtime/pluggable_device.md b/docs/mindspore/source_en/features/runtime/pluggable_device.md index 64e070e11b..1e0b04a995 100644 --- a/docs/mindspore/source_en/features/runtime/pluggable_device.md +++ b/docs/mindspore/source_en/features/runtime/pluggable_device.md @@ -11,7 +11,7 @@ MindSpore supports plug-in, standardized, low-cost and rapid interconnection of MindSpore overall architecture and components related to the backend are shown in the following figure: -![image](https://mindspore-website.obs.cn-north-4.myhuaweicloud.com/website-images/master/docs/mindspore/source_en/features/runtime/images/pluggable_device_arch.png) +![image](./images/pluggable_device_arch.png) The overall MindSpore architecture consists of the following major components, which have interdependencies with each other: @@ -46,7 +46,7 @@ The generic architecture Kernel mode requires the following aspects to be implem - Memory management. DeviceAddress is the abstraction of memory, and third-party chip vendors need to implement the function of copying between Host and Device. It also needs to provide memory request and destruction functions. To facilitate third-party chip vendors, MindSpore provides a set of memory pool implementations and an efficient memory reuse algorithm, SOMAS, in the Common component. - Stream management. If the chip to be docked has the concept of stream, it needs to provide the function of creation and destruction. and If not, it will run in single stream mode. -![image](https://mindspore-website.obs.cn-north-4.myhuaweicloud.com/website-images/master/docs/mindspore/source_zh_cn/features/runtime/images/pluggable_device_kernel.png) +![image](../../../source_zh_cn/features/runtime/images/pluggable_device_kernel.png) ## Graph Mode Interconnection @@ -56,4 +56,4 @@ If the chip vendor's software stack can provide completely high level APIs, or i - Graph execution. The third-party chip vendor needs to understand MindSpore Tensor format or transform it into a format that can be understood, and call the execution of the ready graph and transform the result of the execution into MindSpore Tensor format. -![image](https://mindspore-website.obs.cn-north-4.myhuaweicloud.com/website-images/master/docs/mindspore/source_zh_cn/features/runtime/images/pluggable_device_graph.png) +![image](../../../source_zh_cn/features/runtime/images/pluggable_device_graph.png) -- Gitee