# zynq_7020

**Repository Path**: morning-coder/zynq_7020

## Basic Information

- **Project Name**: zynq_7020
- **Description**: zynq_7020电机驱动
- **Primary Language**: Verilog
- **License**: Not specified
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 1
- **Created**: 2024-04-13
- **Last Updated**: 2024-04-13

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

No README documentation available for this project.