diff --git a/PRODUCT_DOCS/test/test1.md b/PRODUCT_DOCS/test/test1.md
index 9769d1aebc7f26f4027cd39d8f214831c0df8c6a..f77d98bcbcef00ee279524a7690c88be37e616f3 100644
--- a/PRODUCT_DOCS/test/test1.md
+++ b/PRODUCT_DOCS/test/test1.md
@@ -52,7 +52,7 @@ Talking about detected hardware errors, we can classify memory errors as either
 - **Correctable Error (CE)** - the hardware error detection mechanism detected and automatically corrected the error.
 - **Uncorrected errors (UCE)** - are severe enough, hardware detects but cannot correct.
 
-![MCA categories 2.png](../assets/datop1.png) 
+![MCtest 2.png](./assets/datop1.png) 
 
 Typically, uncorrectable errors further fall into three categories:
 
@@ -71,12 +71,12 @@ Prior to enhanced machine check architecture (EMCA), IA32-legacy version of Mach
 
 EMCA enables BIOS-based recovery from errors which redirects MCE and CMCI to firmware first (via SMI) before sending it to the OS error handler. It allows firmware first to handle, collect, and build enhanced error logs then report to system software.
 
-![ras_x86.png](../assets/datop1.png)
+![ras_x86.png](./assets/datop1.png)
 
 ### ARM v8.2 RAS Extension
 
 The RAS Extension is a mandatory extension to the Armv8.2 architecture, and it is an optional extension to the Armv8.0 and Armv8.1 architectures. The figure shows a basic workflow with Firmware First mode.
-![m1_ras_flow.png](../assets/datop2.png)
+![m1_ras_flow.png](./assets/datop2.png)
 
 - Prerequisite: System boot and init
 
@@ -101,7 +101,7 @@ To reduce systems downtime, the OS recovery process for ensuring reliable hardwa
 
 The figure shows the system error handling flow with Anolis OS.
 
-![RAS_OS_Error_Flow.png](../assets/datop3.png)
+![RAS_OS_Error_Flow.png](./assets/datop3.png)
 
 ### Memory Failure Recovery