diff --git a/PRODUCT_DOCS/test/test1.md b/PRODUCT_DOCS/test/test1.md index f77d98bcbcef00ee279524a7690c88be37e616f3..66d0b4792f1ddf44e2dd52e92b29d0d74241394a 100644 --- a/PRODUCT_DOCS/test/test1.md +++ b/PRODUCT_DOCS/test/test1.md @@ -8,22 +8,6 @@ ## Terms and Abbreviations -| Abbreviation | Definition | -| ------------ | ----------------------------------------------------------------------------- | -| RAS | Reliability, Availability and Serviceability | -| SLA | Service Level Agreement | -| CE | Correctable Error | -| UCE | Uncorrected Correctable Error | -| MCA | Machine-Check Architecture | -| CMCI | Corrected Machine Check Interrupt | -| MCE | Machine-Check Exception | -| SEA | Synchronous External Abort | -| ELx | Exception levels are referred to as EL, with x as a number between 0 and 3 | -| ECC | Error Correction Code | -| SECDED | Single-bit Error Correction and Double-bit Error Detection | -| TF-A | Trusted Firmware-A | -| HEST | Hardware Error Source Table | -| GHES | Generic Hardware Error Source | ## Abstract @@ -50,7 +34,7 @@ One of the most popular RAS schemes used in the memory subsystem is Error Correc Talking about detected hardware errors, we can classify memory errors as either corrected errors (CE) or uncorrected errors (UCE). - **Correctable Error (CE)** - the hardware error detection mechanism detected and automatically corrected the error. -- **Uncorrected errors (UCE)** - are severe enough, hardware detects but cannot correct. +- **Uncorrected errors (UCE)** - are severe enough, hardware detect ![MCtest 2.png](./assets/datop1.png)