From d02989d38dd37b65f5bce90e97097a32b3c1e810 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E8=8B=8F=E7=AB=8B?= <404325854@qq.com>
Date: Tue, 2 Jul 2024 10:08:03 +0800
Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=94=B9=E4=BA=A7=E5=93=81docs?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 PRODUCT_DOCS/menu.yaml     |  1 +
 PRODUCT_DOCS/test/test1.md |  8 ++--
 PRODUCT_DOCS/test/test4.md | 91 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 4 deletions(-)
 create mode 100644 PRODUCT_DOCS/test/test4.md

diff --git a/PRODUCT_DOCS/menu.yaml b/PRODUCT_DOCS/menu.yaml
index 5bcb7fc..bd002a7 100644
--- a/PRODUCT_DOCS/menu.yaml
+++ b/PRODUCT_DOCS/menu.yaml
@@ -14,6 +14,7 @@ PRODUCT_DOCS:
 #      验证相对路径: ../test/test1.md
 #      加个新路径: ../test1/test1.md
     test3: ../test/test3.md
+    全类型补充: ../test/test4.md
   anolisos:
     '23':
       用户指南:
diff --git a/PRODUCT_DOCS/test/test1.md b/PRODUCT_DOCS/test/test1.md
index 66d0b47..7bd67db 100644
--- a/PRODUCT_DOCS/test/test1.md
+++ b/PRODUCT_DOCS/test/test1.md
@@ -36,7 +36,7 @@ Talking about detected hardware errors, we can classify memory errors as either
 - **Correctable Error (CE)** - the hardware error detection mechanism detected and automatically corrected the error.
 - **Uncorrected errors (UCE)** - are severe enough, hardware detect 
 
-![MCtest 2.png](./assets/datop1.png) 
+![MCtest 2.png](../assets/datop1.png) 
 
 Typically, uncorrectable errors further fall into three categories:
 
@@ -55,12 +55,12 @@ Prior to enhanced machine check architecture (EMCA), IA32-legacy version of Mach
 
 EMCA enables BIOS-based recovery from errors which redirects MCE and CMCI to firmware first (via SMI) before sending it to the OS error handler. It allows firmware first to handle, collect, and build enhanced error logs then report to system software.
 
-![ras_x86.png](./assets/datop1.png)
+![ras_x86.png](../assets/datop1.png)
 
 ### ARM v8.2 RAS Extension
 
 The RAS Extension is a mandatory extension to the Armv8.2 architecture, and it is an optional extension to the Armv8.0 and Armv8.1 architectures. The figure shows a basic workflow with Firmware First mode.
-![m1_ras_flow.png](./assets/datop2.png)
+![m1_ras_flow.png](../assets/datop2.png)
 
 - Prerequisite: System boot and init
 
@@ -85,7 +85,7 @@ To reduce systems downtime, the OS recovery process for ensuring reliable hardwa
 
 The figure shows the system error handling flow with Anolis OS.
 
-![RAS_OS_Error_Flow.png](./assets/datop3.png)
+![RAS_OS_Error_Flow.png](../assets/datop3.png)
 
 ### Memory Failure Recovery
 
diff --git a/PRODUCT_DOCS/test/test4.md b/PRODUCT_DOCS/test/test4.md
new file mode 100644
index 0000000..6eeff4b
--- /dev/null
+++ b/PRODUCT_DOCS/test/test4.md
@@ -0,0 +1,91 @@
+*斜体文字*
+
+_斜体文字_
+
+**粗体文字**
+
+__粗体文字__
+
+***粗斜体文字***
+
+___粗斜体文字___
+
+***
+* * *
+******
+- - -
+------
+
+~~删除线~~
+
+<u>带下划线文本</u>
+
+# 一级标题
+
+## 二级标题
+
+### 三级标题
+
+#### 四级标题
+
+##### 五级标题
+
+###### 六级标题
+[链接]（https://image.baidu.com/）
+![绝对路径](http://gips0.baidu.com/it/u=1690853528,2506870245&fm=3028&app=3028&f=JPEG&fmt=auto?w=1024&h=1024)
+
+![相对路径](../assets/datop1.png)
+
+
+
+* 第一项
+* 第二项
+* 第三项
+
++ 第一项
++ 第二项
++ 第三项
+
+- 第一项
+- 第二项
+- 第三项
+1. 第一项
+2. 第二项
+3. 第三项
+
+1. 第一项：
+    - 第一项嵌套的第一个元素
+    - 第一项嵌套的第二个元素
+2. 第二项：
+    - 第二项嵌套的第一个元素
+    - 第二项嵌套的第二个元素
+水平线：
+
+---
+带反引号的“内联代码”
+```
+# 代码块
+print '3 个反引号或'
+print '缩进 4 个空格'
+```
+
+> 区块引用
+> Markdown教程
+> 学的不仅是技术更是梦想
+
+HCT密码计算套件的目录结构如下：
+阿斯顿法师打发斯蒂芬
+44444444444444444444444444444444444444444444444444444
+hygon-devkit/
+
+    ├─ hct
+        ├──pkg  
+        │   ├── hct_1.0.0.20230224_rc
+        │   ├── hct_1.0.1.20230512_rc
+        │   └── hct_1.1.0.20230730_rc
+        │  
+        └── README.md
+
+\* pkg目录：内含各版本hct密码计算套件。
+
+\* README.md文件：有关HCT的简单情况。
\ No newline at end of file
-- 
Gitee