diff --git a/build/tools/common/maplec b/build/tools/common/maplec index 673500285d33bc9876a82d75892952c0f00f6028..6d0ff340990039bb46fce6644349ed53a70d9b58 100755 --- a/build/tools/common/maplec +++ b/build/tools/common/maplec @@ -180,7 +180,7 @@ function hir2mpl() { excecute $TOOLS_BIN/clang $CLANG_FLAGS $option $src_file_path -o $file_name.ast # generate .mpl color_print "Starting hir2mpl for $src_file_path:" - excecute $MAPLE_BIN/hir2mpl $file_name.ast + excecute $MAPLE_BIN/hir2mpl $file_name.ast --enable-variable-array } function clangfe() { diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index c3bedb8a39aa14c1fc9c7681c611bdbf1d3314e8..e7b1c3ed5ff85fb53d44e86ddc9385d79ecb5204 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -315,6 +315,7 @@ class AArch64CGFunc : public CGFunc { RegOperand *SelectVectorPairwiseAdd(PrimType rType, Operand *src, PrimType sType) override; RegOperand *SelectVectorReverse(PrimType rtype, Operand *src, PrimType stype, uint32 size) override; RegOperand *SelectVectorSetElement(Operand *eOp, PrimType eTyp, Operand *vOpd, PrimType vTyp, int32 lane) override; + RegOperand *SelectVectorSelect(Operand &cond, PrimType rType, Operand &o0, Operand &o1); RegOperand *SelectVectorShift(PrimType rType, Operand *o1, PrimType oty1, Operand *o2, PrimType oty2, Opcode opc) override; RegOperand *SelectVectorShiftImm(PrimType rType, Operand *o1, Operand *imm, int32 sVal, Opcode opc) override; RegOperand *SelectVectorShiftRNarrow(PrimType rType, Operand *o1, PrimType oTyp, Operand *o2, bool isLow) override; diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def index 66ac290b4ca156c7f9d7092573b6909552063406..146622a50bbcb49c6dbf098ec2cb9569f20bb363 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_md.def @@ -844,6 +844,8 @@ DEFINE_MOP(MOP_vcmgevvv,{mopdReg128VD,mopdReg128VS,mopdReg128VS},ISVECTOR,kLtFpa DEFINE_MOP(MOP_vcmgtvvv,{mopdReg128VD,mopdReg128VS,mopdReg128VS},ISVECTOR,kLtFpalu,"cmgt","0,1,2",1) DEFINE_MOP(MOP_vcmhivvv,{mopdReg128VD,mopdReg128VS,mopdReg128VS},ISVECTOR,kLtFpalu,"cmhi","0,1,2",1) DEFINE_MOP(MOP_vcmhsvvv,{mopdReg128VD,mopdReg128VS,mopdReg128VS},ISVECTOR,kLtFpalu,"cmhs","0,1,2",1) +DEFINE_MOP(MOP_vbsluuu,{mopdReg64VDS,mopdReg64VS,mopdReg64VS},ISPARTDEF|ISVECTOR,kLtFpalu,"bsl","0,1,2",1) +DEFINE_MOP(MOP_vbslvvv,{mopdReg128VDS,mopdReg128VS,mopdReg128VS},ISPARTDEF|ISVECTOR,kLtFpalu,"bsl","0,1,2",1) DEFINE_MOP(MOP_vshluuu, {mopdReg64VD,mopdReg64VS,mopdReg64VS},ISVECTOR,kLtFpalu,"sshl","0,1,2",1) DEFINE_MOP(MOP_vshlvvv, {mopdReg128VD,mopdReg128VS,mopdReg128VS},ISVECTOR,kLtFpalu,"sshl","0,1,2",1) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index f88b63df39106d179650d18949599e709c54319a..46f335f60c1ae73829414ca9004e0c05d7f39149 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -5286,12 +5286,18 @@ Operand *AArch64CGFunc::SelectSelect(TernaryNode &expr, Operand &cond, Operand & PrimType dtype = expr.GetPrimType(); PrimType ctype = expr.Opnd(0)->GetPrimType(); - RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); AArch64CC_t cc = CC_NE; Opcode opcode = expr.Opnd(0)->GetOpCode(); PrimType cmpType = static_cast(expr.Opnd(0))->GetOpndType(); - bool isFloat = IsPrimitiveFloat(cmpType); - bool unsignedIntegerComparison = !isFloat && !IsSignedInteger(cmpType); + bool isFloat = false; + bool unsignedIntegerComparison = false; + if (!IsPrimitiveVector(cmpType)) { + isFloat = IsPrimitiveFloat(cmpType); + unsignedIntegerComparison = !isFloat && !IsSignedInteger(cmpType); + } else { + isFloat = IsPrimitiveVectorFloat(cmpType); + unsignedIntegerComparison = !isFloat && IsPrimitiveUnSignedVector(cmpType); + } switch (opcode) { case OP_eq: cc = CC_EQ; @@ -5315,8 +5321,13 @@ Operand *AArch64CGFunc::SelectSelect(TernaryNode &expr, Operand &cond, Operand & hasCompare = true; break; } - SelectSelect(resOpnd, cond, trueOpnd, falseOpnd, dtype, ctype, hasCompare, cc); - return &resOpnd; + if (!IsPrimitiveVector(dtype)) { + RegOperand &resOpnd = GetOrCreateResOperand(parent, dtype); + SelectSelect(resOpnd, cond, trueOpnd, falseOpnd, dtype, ctype, hasCompare, cc); + return &resOpnd; + } else { + return SelectVectorSelect(cond, dtype, trueOpnd, falseOpnd); + } } /* @@ -10806,6 +10817,26 @@ RegOperand *AArch64CGFunc::SelectVectorNeg(PrimType rType, Operand *o1) { return res; } +/* + * Called internally for auto-vec, no intrinsics for now + */ +RegOperand *AArch64CGFunc::SelectVectorSelect(Operand &cond, PrimType rType, Operand &o0, Operand &o1) { + rType = GetPrimTypeSize(rType) > k8ByteSize ? PTY_v16u8 : PTY_v8u8; + RegOperand *res = &CreateRegisterOperandOfType(rType); + SelectCopy(*res, rType, cond, rType); + VectorRegSpec *vecSpecDest = GetMemoryPool()->New(rType); + VectorRegSpec *vecSpec1 = GetMemoryPool()->New(rType); + VectorRegSpec *vecSpec2 = GetMemoryPool()->New(rType); + + uint32 mOp = GetPrimTypeBitSize(rType) > k64BitSize ? MOP_vbslvvv : MOP_vbsluuu; + Insn *insn = &GetCG()->BuildInstruction(mOp, *res, o0, o1); + static_cast(insn)->PushRegSpecEntry(vecSpecDest); + static_cast(insn)->PushRegSpecEntry(vecSpec1); + static_cast(insn)->PushRegSpecEntry(vecSpec2); + GetCurBB()->AppendInsn(*insn); + return res; +} + RegOperand *AArch64CGFunc::SelectVectorShiftRNarrow(PrimType rType, Operand *o1, PrimType oType, Operand *o2, bool isLow) { RegOperand *res = &CreateRegisterOperandOfType(rType); /* result operand */