From 55b0c609e5ea40f6bf814217a45a1bf92db7ccb5 Mon Sep 17 00:00:00 2001
From: William Chen <william.chen@futurewei.com>
Date: Tue, 5 Jul 2022 09:29:29 -0700
Subject: [PATCH] Handle negative offset in globalopt. no ssa opt for phys reg.

---
 src/mapleall/maple_be/include/cg/reaching.h    |  1 +
 .../maple_be/src/cg/aarch64/aarch64_prop.cpp   |  3 +++
 .../src/cg/aarch64/aarch64_reaching.cpp        | 18 ++++++++++++++++++
 src/mapleall/maple_be/src/cg/reaching.cpp      |  1 +
 4 files changed, 23 insertions(+)

diff --git a/src/mapleall/maple_be/include/cg/reaching.h b/src/mapleall/maple_be/include/cg/reaching.h
index 55b4b666fe..13872a9122 100644
--- a/src/mapleall/maple_be/include/cg/reaching.h
+++ b/src/mapleall/maple_be/include/cg/reaching.h
@@ -146,6 +146,7 @@ class ReachingDefinition : public AnalysisResult {
   std::vector<DataInfo*> memIn;
   std::vector<DataInfo*> memOut;
   const uint32 kMaxBBNum;
+  uint32 stackSize = 0;
  private:
   void Initialize();
   void InitDataSize();
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp
index d2294c36bc..f62f180dc5 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_prop.cpp
@@ -1492,6 +1492,9 @@ bool ExtendMovPattern::CheckSrcReg(regno_t srcRegNo, uint32 validNum) {
 
 bool ExtendMovPattern::BitNotAffected(const Insn &insn, uint32 validNum) {
   RegOperand &firstOpnd = static_cast<RegOperand&>(insn.GetOperand(kInsnFirstOpnd));
+  if (firstOpnd.IsPhysicalRegister()) {
+    return false;
+  }
   RegOperand &secondOpnd = static_cast<RegOperand&>(insn.GetOperand(kInsnSecondOpnd));
   regno_t desRegNo = firstOpnd.GetRegisterNumber();
   regno_t srcRegNo = secondOpnd.GetRegisterNumber();
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
index d3cdffa298..66cf39e832 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
@@ -464,6 +464,9 @@ std::vector<Insn*> AArch64ReachingDefinition::FindMemDefBetweenInsn(
 
         ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value");
         int64 memOffset = memOpnd.GetOffsetImmediate()->GetOffsetValue();
+        if (memOffset < 0) {
+          memOffset = stackSize + memOffset;
+        }
         if ((offset == memOffset) ||
             (insn->IsStorePair() && offset == memOffset + GetEachMemSizeOfPair(insn->GetMachineOpcode()))) {
           defInsnVec.emplace_back(insn);
@@ -516,6 +519,9 @@ void AArch64ReachingDefinition::FindMemDefInBB(uint32 offset, BB &bb, InsnSet &d
 
         ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value");
         int64 memOffset = memOpnd.GetOffsetImmediate()->GetOffsetValue();
+        if (memOffset < 0) {
+          memOffset = stackSize + memOffset;
+        }
         if (offset == memOffset) {
           (void)defInsnSet.insert(insn);
           break;
@@ -1001,6 +1007,9 @@ bool AArch64ReachingDefinition::FindMemUseBetweenInsn(uint32 offset, Insn *start
       ASSERT(memOpnd.GetIndexRegister() == nullptr, "offset must not be Register for frame MemOperand");
       ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value");
       int64 memOffset = memOpnd.GetOffsetImmediate()->GetValue();
+      if (memOffset < 0) {
+        memOffset = stackSize + memOffset;
+      }
 
       if (insn->IsStore() || insn->IsPseudoInstruction()) {
         if (memOffset == offset) {
@@ -1050,6 +1059,9 @@ InsnSet AArch64ReachingDefinition::FindDefForMemOpnd(Insn &insn, uint32 indexOrO
     }
     ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value");
     memOffSet = memOpnd.GetOffsetImmediate()->GetOffsetValue();
+    if (memOffSet < 0) {
+      memOffSet = stackSize + memOffSet;
+    }
   } else {
     memOffSet = indexOrOffset;
   }
@@ -1101,6 +1113,9 @@ InsnSet AArch64ReachingDefinition::FindUseForMemOpnd(Insn &insn, uint8 index, bo
   ASSERT(memOpnd.GetIndexRegister() == nullptr, "IndexRegister no nullptr");
   ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value");
   int64 memOffSet = memOpnd.GetOffsetImmediate()->GetOffsetValue();
+  if (memOffSet < 0) {
+    memOffSet = stackSize + memOffSet;
+  }
   if (secondMem) {
     ASSERT(insn.IsStorePair(), "second MemOperand can only be defined in stp insn");
     memOffSet += GetEachMemSizeOfPair(insn.GetMachineOpcode());
@@ -1214,6 +1229,9 @@ void AArch64ReachingDefinition::InitInfoForMemOperand(Insn &insn, Operand &opnd,
     CHECK_FATAL(index == nullptr, "Existing [x29 + index] Memory Address");
     ASSERT(memOpnd.GetOffsetImmediate(), "offset must be a immediate value");
     int64 offsetVal = memOpnd.GetOffsetImmediate()->GetOffsetValue();
+    if (offsetVal < 0) {
+      offsetVal = stackSize + offsetVal;
+    }
     if ((offsetVal % kMemZoomSize) != 0) {
       SetAnalysisMode(kRDRegAnalysis);
     }
diff --git a/src/mapleall/maple_be/src/cg/reaching.cpp b/src/mapleall/maple_be/src/cg/reaching.cpp
index 77fa156845..960d820e34 100644
--- a/src/mapleall/maple_be/src/cg/reaching.cpp
+++ b/src/mapleall/maple_be/src/cg/reaching.cpp
@@ -778,6 +778,7 @@ void ReachingDefinition::AnalysisStart() {
   if (!cgFunc->GetFirstBB()) {
     return;
   }
+  stackSize = GetStackSize();
   Initialize();
   /* Build in/out for function body first. (Except cleanup bb) */
   BuildInOutForFuncBody();
-- 
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