diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h
index 63113da9e759b0c10f4283d87e57316618b025be..b7bb72c82635036f94fe823265a0256ef6960187 100644
--- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h
+++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h
@@ -128,7 +128,6 @@ class AArch64CGFunc : public CGFunc {
   MemOperand *FixLargeMemOpnd(MOperator mOp, MemOperand &memOpnd, uint32 dSize, uint32 opndIdx);
   uint32 LmbcFindTotalStkUsed(std::vector<TyIdx> *paramList);
   uint32 LmbcTotalRegsUsed();
-  void LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn);
   bool LmbcSmallAggForRet(const BlkassignoffNode &bNode, const Operand *src);
   bool LmbcSmallAggForCall(BlkassignoffNode &bNode, const Operand *src, std::vector<TyIdx> **parmList);
   void SelectAggDassign(DassignNode &stmt) override;
diff --git a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h
index 5bb2fe937fd7b8df838afe60eaf70ebdfeec7f86..261b2c642a1ea111fc139284c49515fdd37c71a4 100644
--- a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h
+++ b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2022] Futurewei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h
index 4f88f4a3c65c903f4dfab40d10b1c5aa827f8a63..516e6f2d15b5c4f089121f8820defb2b4d8a030c 100644
--- a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h
+++ b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
index 77a3a631a88b4a888e7a04a4f0d31d526a6f8924..a4bc371b5fbc06ffcca145e9b5084c58384583f9 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
@@ -1232,6 +1232,66 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) {
         }
         break;
       }
+      case OP_addrofoff: {
+        auto &addrofoffNode = static_cast<AddrofoffNode&>(*node.Opnd(i));
+        Operand *inOpnd = SelectAddrofoff(addrofoffNode, node);
+        listInputOpnd->PushOpnd(static_cast<RegOperand&>(*inOpnd));
+        PrimType pType = addrofoffNode.GetPrimType();
+        listInRegPrefix->stringList.push_back(
+            static_cast<StringOperand*>(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str))));
+        if (isOutputTempNode) {
+          rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType));
+        }
+        break;
+      }
+      case OP_ireadoff: {
+        IreadoffNode *ireadoff = static_cast<IreadoffNode*>(node.Opnd(i));
+        Operand *inOpnd = SelectIreadoff(node, *ireadoff);
+        listInputOpnd->PushOpnd(static_cast<RegOperand&>(*inOpnd));
+        PrimType pType = ireadoff->GetPrimType();
+        listInRegPrefix->stringList.push_back(
+            static_cast<StringOperand*>(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str))));
+        if (isOutputTempNode) {
+          rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType));
+        }
+        break;
+      }
+      case OP_ireadfpoff: {
+        IreadFPoffNode *ireadfpoff = static_cast<IreadFPoffNode*>(node.Opnd(i));
+        Operand *inOpnd = SelectIreadfpoff(node, *ireadfpoff);
+        listInputOpnd->PushOpnd(static_cast<RegOperand&>(*inOpnd));
+        PrimType pType = ireadfpoff->GetPrimType();
+        listInRegPrefix->stringList.push_back(
+            static_cast<StringOperand*>(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str))));
+        if (isOutputTempNode) {
+          rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType));
+        }
+        break;
+      }
+      case OP_iread: {
+        IreadNode *iread = static_cast<IreadNode*>(node.Opnd(i));
+        Operand *inOpnd = SelectIread(node, *iread);
+        listInputOpnd->PushOpnd(static_cast<RegOperand&>(*inOpnd));
+        PrimType pType = iread->GetPrimType();
+        listInRegPrefix->stringList.push_back(
+            static_cast<StringOperand*>(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str))));
+        if (isOutputTempNode) {
+          rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType));
+        }
+        break;
+      }
+      case OP_add: {
+        BinaryNode *addNode = static_cast<BinaryNode*>(node.Opnd(i));
+        Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node);
+        listInputOpnd->PushOpnd(static_cast<RegOperand&>(*inOpnd));
+        PrimType pType = addNode->GetPrimType();
+        listInRegPrefix->stringList.push_back(
+            static_cast<StringOperand*>(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str))));
+        if (isOutputTempNode) {
+          rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType));
+        }
+        break;
+      }
       case OP_constval: {
         CHECK_FATAL(!isOutputTempNode, "Unexpect");
         auto &constNode = static_cast<ConstvalNode&>(*node.Opnd(i));
@@ -2285,15 +2345,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) {
   uint32 lhsOffset = 0;
   MIRType *stmtType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx());
   MIRPtrType *lhsPointerType = static_cast<MIRPtrType*>(stmtType);
-  bool loadToRegs4StructReturn = false;
-  if (mirModule.CurFunction()->StructReturnedInRegs()) {
-    MIRSymbol *retSt = mirModule.CurFunction()->GetFormalCount() == 0 ? nullptr : mirModule.CurFunction()->GetFormal(0);
-    if (stmt.Opnd(0)->GetOpCode() == OP_dread) {
-      DreadNode *dread = static_cast<DreadNode *>(stmt.Opnd(0));
-      MIRSymbol *addrSym = mirModule.CurFunction()->GetLocalOrGlobalSymbol(dread->GetStIdx());
-      loadToRegs4StructReturn = (retSt == addrSym);
-    }
-  }
   MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(lhsPointerType->GetPointedTyIdx());
   if (stmt.GetFieldID() != 0) {
     MIRStructType *structType = static_cast<MIRStructType*>(lhsType);
@@ -2337,91 +2388,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) {
       rhsType = structType->GetFieldType(rhsDread->GetFieldID());
       rhsOffset = static_cast<uint32>(GetBecommon().GetFieldOffset(*structType, rhsDread->GetFieldID()).first);
     }
-    if (loadToRegs4StructReturn) {
-      /* generate move to regs for agg return */
-      CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size");
-      AArch64CallConvImpl parmlocator(GetBecommon());
-      CCLocInfo pLoc;
-      parmlocator.LocateNextParm(*lhsType, pLoc, true, GetBecommon().GetMIRModule().CurFunction());
-      /* aggregates are 8 byte aligned. */
-      Operand *rhsmemopnd = nullptr;
-      RegOperand *result[kFourRegister]; /* up to 2 int or 4 fp */
-      uint32 loadSize;
-      uint32 numRegs;
-      RegType regType;
-      PrimType retPty;
-      bool fpParm = false;
-      if (pLoc.numFpPureRegs > 0) {
-        loadSize = pLoc.fpSize;
-        numRegs = pLoc.numFpPureRegs;
-        fpParm = true;
-        regType = kRegTyFloat;
-        retPty = (pLoc.fpSize == k4ByteSize) ? PTY_f32 : PTY_f64;
-      } else {
-        if (CGOptions::IsBigEndian()) {
-          loadSize = k8ByteSize;
-          numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister;
-          regType = kRegTyInt;
-          retPty = PTY_u64;
-        } else {
-          loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize;
-          numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister;
-          regType = kRegTyInt;
-          retPty = PTY_u32;
-        }
-      }
-      bool parmCopy = IsParamStructCopy(*rhsSymbol);
-      for (uint32 i = 0; i < numRegs; i++) {
-        if (parmCopy) {
-          rhsmemopnd = &LoadStructCopyBase(*rhsSymbol,
-                                           (rhsOffset + static_cast<int64>(i * (fpParm ? loadSize : k8ByteSize))),
-                                           static_cast<int>(loadSize * kBitsPerByte));
-        } else {
-          rhsmemopnd = &GetOrCreateMemOpnd(*rhsSymbol,
-                                           (rhsOffset + static_cast<int64>(i * (fpParm ? loadSize : k8ByteSize))),
-                                           (loadSize * kBitsPerByte));
-        }
-        result[i] = &CreateVirtualRegisterOperand(NewVReg(regType, loadSize));
-        MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, retPty);
-        Insn &ld = GetCG()->BuildInstruction<AArch64Insn>(mop1, *(result[i]), *rhsmemopnd);
-        GetCurBB()->AppendInsn(ld);
-      }
-      AArch64reg regs[kFourRegister];
-      regs[kFirstReg] = static_cast<AArch64reg>(pLoc.reg0);
-      regs[kSecondReg] = static_cast<AArch64reg>(pLoc.reg1);
-      regs[kThirdReg] = static_cast<AArch64reg>(pLoc.reg2);
-      regs[kFourthReg] = static_cast<AArch64reg>(pLoc.reg3);
-      for (uint32 i = 0; i < numRegs; i++) {
-        AArch64reg preg;
-        MOperator mop2;
-        if (fpParm) {
-          preg = regs[i];
-          mop2 = (loadSize == k4ByteSize) ? MOP_xvmovs : MOP_xvmovd;
-        } else {
-          preg = (i == 0 ? R0 : R1);
-          mop2 = (loadSize == k4ByteSize) ? MOP_wmovrr : MOP_xmovrr;
-        }
-        RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, (loadSize * kBitsPerByte), regType);
-        Insn &mov = GetCG()->BuildInstruction<AArch64Insn>(mop2, dest, *(result[i]));
-        GetCurBB()->AppendInsn(mov);
-      }
-      /* Create artificial dependency to extend the live range */
-      for (uint32 i = 0; i < numRegs; i++) {
-        AArch64reg preg;
-        MOperator mop3;
-        if (fpParm) {
-          preg = regs[i];
-          mop3 = MOP_pseudo_ret_float;
-        } else {
-          preg = (i == 0 ? R0 : R1);
-          mop3 = MOP_pseudo_ret_int;
-        }
-        RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, regType);
-        Insn &pseudo = GetCG()->BuildInstruction<AArch64Insn>(mop3, dest);
-        GetCurBB()->AppendInsn(pseudo);
-      }
-      return;
-    }
     rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex());
     alignUsed = std::min(lhsAlign, rhsAlign);
     ASSERT(alignUsed != 0, "expect non-zero");
@@ -2537,42 +2503,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) {
       rhsOffset = static_cast<uint32>(GetBecommon().GetFieldOffset(*rhsStructType, rhsIread->GetFieldID()).first);
       isRefField = GetBecommon().IsRefField(*rhsStructType, rhsIread->GetFieldID());
     }
-    if (loadToRegs4StructReturn) {
-      /* generate move to regs. */
-      CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size");
-      RegOperand *result[kTwoRegister]; /* maximum 16 bytes, 2 registers */
-      uint32 loadSize;
-      if (CGOptions::IsBigEndian()) {
-        loadSize = k8ByteSize;
-      } else {
-        loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize;
-      }
-      uint32 numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister;
-      for (uint32 i = 0; i < numRegs; i++) {
-        OfstOperand *rhsOffOpnd = &GetOrCreateOfstOpnd(rhsOffset + i * loadSize, loadSize * kBitsPerByte);
-        Operand &rhsmemopnd = GetOrCreateMemOpnd(MemOperand::kAddrModeBOi, loadSize * kBitsPerByte,
-            rhsAddrOpnd, nullptr, rhsOffOpnd, nullptr);
-        result[i] = &CreateVirtualRegisterOperand(NewVReg(kRegTyInt, loadSize));
-        MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, PTY_u32);
-        Insn &ld = GetCG()->BuildInstruction<AArch64Insn>(mop1, *(result[i]), rhsmemopnd);
-        ld.MarkAsAccessRefField(isRefField);
-        GetCurBB()->AppendInsn(ld);
-      }
-      for (uint32 i = 0; i < numRegs; i++) {
-        AArch64reg preg = (i == 0 ? R0 : R1);
-        RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt);
-        Insn &mov = GetCG()->BuildInstruction<AArch64Insn>(MOP_xmovrr, dest, *(result[i]));
-        GetCurBB()->AppendInsn(mov);
-      }
-      /* Create artificial dependency to extend the live range */
-      for (uint32 i = 0; i < numRegs; i++) {
-        AArch64reg preg = (i == 0 ? R0 : R1);
-        RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt);
-        Insn &pseudo = cg->BuildInstruction<AArch64Insn>(MOP_pseudo_ret_int, dest);
-        GetCurBB()->AppendInsn(pseudo);
-      }
-      return;
-    }
     rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex());
     alignUsed = std::min(lhsAlign, rhsAlign);
     ASSERT(alignUsed != 0, "expect non-zero");
@@ -3333,7 +3263,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr,
     if (pointedType->IsStructType()) {
       MIRStructType *structType = static_cast<MIRStructType*>(pointedType);
       /* size << 3, that is size * 8, change bytes to bits */
-      bitSize = structType->GetSize() << 3;
+      bitSize = std::min(structType->GetSize(), (size_t)kSizeOfPtr) << 3;
     } else {
       bitSize = GetPrimTypeBitSize(destType);
     }
@@ -7598,6 +7528,9 @@ void AArch64CGFunc::SelectParmListIreadLargeAggregate(const IreadNode &iread, MI
 
 void AArch64CGFunc::CreateCallStructParamPassByStack(int32 symSize, const MIRSymbol *sym,
                                                      RegOperand *addrOpnd, int32 baseOffset) {
+  if (symSize == 0) {
+    return;
+  }
   MemOperand *ldMopnd = nullptr;
   MemOperand *stMopnd = nullptr;
   uint32 numRegNeeded = (static_cast<uint32>(symSize) <= k8ByteSize) ? kOneRegister : kTwoRegister;
@@ -8560,56 +8493,6 @@ void AArch64CGFunc::IntrinsifyStringIndexOf(ListOperand &srcOpnds, const MIRSymb
   SetCurBB(*jointBB);
 }
 
-/* Lmbc calls have no argument, they are all explicit iassignspoff or
-   blkassign.  Info collected and to be emitted here */
-void AArch64CGFunc::LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn) {
-  if (GetLmbcArgInfo() == nullptr) {
-    return;   /* no arg */
-  }
-  CHECK_FATAL(GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc, "To be called for Lmbc model only");
-  MapleVector<RegOperand*> &args = GetLmbcCallArgs();
-  MapleVector<PrimType> &types = GetLmbcCallArgTypes();
-  MapleVector<int32> &offsets = GetLmbcCallArgOffsets();
-  MapleVector<int32> &regs = GetLmbcCallArgNumOfRegs();
-  int iCnt = 0;
-  int fCnt = 0;
-  for (size_t i = isArgReturn ? 1 : 0; i < args.size(); i++) {
-    RegType ty = args[i]->GetRegisterType();
-    PrimType pTy = types[i];
-    AArch64reg reg;
-    if (args[i]->IsOfIntClass() && (iCnt + regs[i]) <= static_cast<int32>(k8ByteSize)) {
-      reg = static_cast<AArch64reg>(R0 + iCnt++);
-      RegOperand *res = &GetOrCreatePhysicalRegisterOperand(
-          reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty);
-      SelectCopy(*res, pTy, *args[i], pTy);
-      srcOpnds->PushOpnd(*res);
-    } else if (!args[i]->IsOfIntClass() && (fCnt + regs[i]) <= static_cast<int32>(k8ByteSize)) {
-      reg = static_cast<AArch64reg>(V0 + fCnt++);
-      RegOperand *res = &GetOrCreatePhysicalRegisterOperand(
-          reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty);
-      SelectCopy(*res, pTy, *args[i], pTy);
-      srcOpnds->PushOpnd(*res);
-    } else {
-      uint32 pSize = GetPrimTypeSize(pTy);
-      Operand &memOpd = CreateMemOpnd(RSP, offsets[i], pSize);
-      GetCurBB()->AppendInsn(GetCG()->BuildInstruction<AArch64Insn>(PickStInsn(pSize * kBitsPerByte, pTy),
-          *args[i], memOpd));
-    }
-  }
-  /* Load x8 if 1st arg is for agg return */
-  if (isArgReturn) {
-    AArch64reg reg = static_cast<AArch64reg>(R8);
-    RegOperand *res = &GetOrCreatePhysicalRegisterOperand(reg,
-                                                          GetPrimTypeSize(PTY_a64) * kBitsPerByte,
-                                                          kRegTyInt);
-    SelectCopy(*res, PTY_a64, *args[0], PTY_a64);
-    srcOpnds->PushOpnd(*res);
-  }
-  ResetLmbcArgInfo();     /* reset */
-  ResetLmbcArgsInRegs();
-  ResetLmbcTotalArgs();
-}
-
 void AArch64CGFunc::SelectCall(CallNode &callNode) {
   MIRFunction *fn = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode.GetPUIdx());
   MIRSymbol *fsym = GetFunction().GetLocalOrGlobalSymbol(fn->GetStIdx(), false);
@@ -8623,18 +8506,15 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) {
   ListOperand *srcOpnds = CreateListOpnd(*GetFuncScopeAllocator());
   if (GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc) {
     SetLmbcCallReturnType(nullptr);
-    bool largeStructRet = false;
     if (fn->IsFirstArgReturn()) {
       MIRPtrType *ptrTy = static_cast<MIRPtrType*>(GlobalTables::GetTypeTable().GetTypeFromTyIdx(
           fn->GetFormalDefVec()[0].formalTyIdx));
       MIRType *sTy = GlobalTables::GetTypeTable().GetTypeFromTyIdx(ptrTy->GetPointedTyIdx());
-      largeStructRet = sTy->GetSize() > k16ByteSize;
       SetLmbcCallReturnType(sTy);
     } else {
       MIRType *ty = fn->GetReturnType();
       SetLmbcCallReturnType(ty);
     }
-    LmbcSelectParmList(srcOpnds, largeStructRet);
   }
   bool callNative = false;
   if ((fsym->GetName() == "MCC_CallFastNative") || (fsym->GetName() == "MCC_CallFastNativeExt") ||
diff --git a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp
index 70db43dc23e8494054fa6dc56344188ab2cc5df7..30e92d384122922eb234883ebe3beb9b1a2c9cb9 100644
--- a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp
+++ b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2022] Futureweiwei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp
index 5c3b1a6175ed588696ed7ac807d5f9475126bcb4..65e5529a8e4306e85d6b7aadffe8d784ba047e40 100644
--- a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp
+++ b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_ir/src/bin_func_import.cpp b/src/mapleall/maple_ir/src/bin_func_import.cpp
index 500e426afe6296b8e5280887b8f550339590f7ce..b83f41af7f2ac39b9bfebbe488dd179e20582ce0 100644
--- a/src/mapleall/maple_ir/src/bin_func_import.cpp
+++ b/src/mapleall/maple_ir/src/bin_func_import.cpp
@@ -45,7 +45,7 @@ void BinaryMplImport::ImportFuncIdInfo(MIRFunction *func) {
   func->SetPuidxOrigin(static_cast<PUIdx>(ReadNum()));
   ImportInfoVector(func->GetInfoVector(), func->InfoIsString());
   if (mod.GetFlavor() == kFlavorLmbc) {
-    func->SetFrameSize(static_cast<uint16>(ReadNum()));
+    func->SetFrameSize(static_cast<uint32>(ReadNum()));
   }
 }
 
diff --git a/src/mapleall/maple_me/include/lfo_dep_test.h b/src/mapleall/maple_me/include/lfo_dep_test.h
index e52c6ed9f2535245ac62a0bb35ed4fcdc3cc59c6..38f5e941666c00a47a9f0ba74fe4f9464df31809 100644
--- a/src/mapleall/maple_me/include/lfo_dep_test.h
+++ b/src/mapleall/maple_me/include/lfo_dep_test.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/lfo_inject_iv.h b/src/mapleall/maple_me/include/lfo_inject_iv.h
index 415d186cdc2088712cbce4c8d96d84ef0f90e7e2..aa8241a12b7ba3ea6688126aeed518be4626f6a3 100644
--- a/src/mapleall/maple_me/include/lfo_inject_iv.h
+++ b/src/mapleall/maple_me/include/lfo_inject_iv.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
@@ -21,4 +21,4 @@ namespace maple {
 /* emit ir to specified file */
 MAPLE_FUNC_PHASE_DECLARE(MELfoInjectIV, MeFunction)
 }  // namespace maple
-#endif  // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H
\ No newline at end of file
+#endif  // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H
diff --git a/src/mapleall/maple_me/include/lfo_iv_canon.h b/src/mapleall/maple_me/include/lfo_iv_canon.h
index 7033e54be256bee48e88de41c2e3a42a7f955baf..8a83f5a242d583d3df112c2bb5909c57bb06e27e 100644
--- a/src/mapleall/maple_me/include/lfo_iv_canon.h
+++ b/src/mapleall/maple_me/include/lfo_iv_canon.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/lfo_unroll.h b/src/mapleall/maple_me/include/lfo_unroll.h
index 9147d40161c0e041151c8a97b6ff6459e9388be7..d72da9d8ab33f7bbdad3a7ea8e46ae26fba63be8 100644
--- a/src/mapleall/maple_me/include/lfo_unroll.h
+++ b/src/mapleall/maple_me/include/lfo_unroll.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/lmbc_lower.h b/src/mapleall/maple_me/include/lmbc_lower.h
index 0c86ad6602ab7a44f71574386ee3e34f057548f4..385ac8cd4e033af0dd5b4c8852762b5bb8f5bbbf 100644
--- a/src/mapleall/maple_me/include/lmbc_lower.h
+++ b/src/mapleall/maple_me/include/lmbc_lower.h
@@ -40,6 +40,7 @@ class LMBCLowerer {
   void LowerIassign(IassignNode *, BlockNode *);
   void LowerAggIassign(IassignNode *, MIRType *type, int32 offset, BlockNode *);
   void LowerReturn(NaryStmtNode *retNode, BlockNode *newblk);
+  void LowerCall(NaryStmtNode *stmt, BlockNode *newblk);
   BlockNode *LowerBlock(BlockNode *);
   void LowerFunction();
 
diff --git a/src/mapleall/maple_me/include/lmbc_memlayout.h b/src/mapleall/maple_me/include/lmbc_memlayout.h
index f4fe4d438526ecaae6c72a5dd3656198e4833865..a5649bb898bdf9e121eaaa3c1768d972eacb60e9 100644
--- a/src/mapleall/maple_me/include/lmbc_memlayout.h
+++ b/src/mapleall/maple_me/include/lmbc_memlayout.h
@@ -38,16 +38,9 @@ typedef enum {
 class MemSegment;
 
 // describes where a symbol is allocated
-class SymbolAlloc {
- public:
-  SymbolAlloc() : mem_segment(nullptr), offset(0) {}
-
-  ~SymbolAlloc() {
-    mem_segment = nullptr;
-  }
-
-  MemSegment *mem_segment;
-  int32 offset;
+struct SymbolAlloc {
+  MemSegment *mem_segment = nullptr;
+  int32 offset = 0;
 };  // class SymbolAlloc
 
 // keeps track of the allocation of a memory segment
@@ -61,7 +54,6 @@ class MemSegment {
 
   MemSegmentKind kind;
   int32 size;             // size is negative if allocated offsets are negative
-  SymbolAlloc how_alloc;  // this segment may be allocated inside another segment
 };  // class MemSegment
 
 class LMBCMemLayout {
diff --git a/src/mapleall/maple_me/include/pme_emit.h b/src/mapleall/maple_me/include/pme_emit.h
index 283be8763c4fb8822eb8d6930063bc56516ec635..1a192138e66c6617e566c7fab8a0b99341c6d02d 100644
--- a/src/mapleall/maple_me/include/pme_emit.h
+++ b/src/mapleall/maple_me/include/pme_emit.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/pme_function.h b/src/mapleall/maple_me/include/pme_function.h
index 46e4d97c74b49f38d853a27878328ae81138e33d..c5d711b455fa679abfc1daad865df1dc39c0c22e 100644
--- a/src/mapleall/maple_me/include/pme_function.h
+++ b/src/mapleall/maple_me/include/pme_function.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/pme_mir_extension.h b/src/mapleall/maple_me/include/pme_mir_extension.h
index 14dfe1b68a76a2cc78a36bbc8f8d645557c1b4b7..4b80f60f189002354293626cccce55461727d6af 100644
--- a/src/mapleall/maple_me/include/pme_mir_extension.h
+++ b/src/mapleall/maple_me/include/pme_mir_extension.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2020] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2020] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/include/pme_mir_lower.h b/src/mapleall/maple_me/include/pme_mir_lower.h
index c023281ddca92ffcf2b30e82e3782c45e8f52e57..4f16553c67bfefe81a5fbaaaa9d5a6402cea4a6b 100644
--- a/src/mapleall/maple_me/include/pme_mir_lower.h
+++ b/src/mapleall/maple_me/include/pme_mir_lower.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/src/lfo_dep_test.cpp b/src/mapleall/maple_me/src/lfo_dep_test.cpp
index 6ede310138b951bba04059748e3957de3d8013b5..10c3e038228804da507adbdb7857dbde568a8cb2 100644
--- a/src/mapleall/maple_me/src/lfo_dep_test.cpp
+++ b/src/mapleall/maple_me/src/lfo_dep_test.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_me/src/lfo_inject_iv.cpp b/src/mapleall/maple_me/src/lfo_inject_iv.cpp
index ed6c5b335db8cd8169e044552eb30aaaedcb4817..9c8c7a583c1eb1716fdfb677126b94054ce39741 100644
--- a/src/mapleall/maple_me/src/lfo_inject_iv.cpp
+++ b/src/mapleall/maple_me/src/lfo_inject_iv.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/src/lfo_iv_canon.cpp b/src/mapleall/maple_me/src/lfo_iv_canon.cpp
index 6746de29040d2b0bee3f1281ab4e34082ffbbba5..cb8540ef5b79ffff0935838e69e9f40fd3065dcf 100644
--- a/src/mapleall/maple_me/src/lfo_iv_canon.cpp
+++ b/src/mapleall/maple_me/src/lfo_iv_canon.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/src/lfo_unroll.cpp b/src/mapleall/maple_me/src/lfo_unroll.cpp
index 6542deff58b13de5c67b598a4a56cd18a3ff0ae7..769979968ef9d2096c09d0fed9ad98ac44c8e1fc 100644
--- a/src/mapleall/maple_me/src/lfo_unroll.cpp
+++ b/src/mapleall/maple_me/src/lfo_unroll.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp
index b3972396b3a0a5b25e6fc805355c635356ac47db..7c374015810ddb35b07d632264481638b174dd5f 100644
--- a/src/mapleall/maple_me/src/lmbc_lower.cpp
+++ b/src/mapleall/maple_me/src/lmbc_lower.cpp
@@ -25,8 +25,8 @@ PregIdx LMBCLowerer::GetSpecialRegFromSt(const MIRSymbol *sym) {
   if (storageClass == kScAuto) {
     CHECK(sym->GetStIndex() < memlayout->sym_alloc_table.size(),
           "index out of range in LMBCLowerer::GetSpecialRegFromSt");
-    SymbolAlloc symalloc = memlayout->sym_alloc_table[sym->GetStIndex()];
-    if (symalloc.mem_segment->kind == MS_FPbased) {
+    SymbolAlloc *symalloc = &memlayout->sym_alloc_table[sym->GetStIndex()];
+    if (symalloc->mem_segment->kind == MS_FPbased) {
       specreg = -kSregFp;
     } else {
       CHECK_FATAL(false, "LMBCLowerer::LowerDread: bad memory layout for local variable");
@@ -375,6 +375,55 @@ void LMBCLowerer::LowerReturn(NaryStmtNode *retNode, BlockNode *newblk) {
   newblk->AddStatement(retNode);
 }
 
+void LMBCLowerer::LowerCall(NaryStmtNode *stmt, BlockNode *newblk) {
+  for (size_t i = 0; i < stmt->NumOpnds(); ++i) {
+    if (stmt->Opnd(i)->GetPrimType() != PTY_agg) {
+      stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i);
+      continue;
+    } 
+    bool paramInPrototype = false;
+    if (stmt->GetOpCode() != OP_asm) {
+      MIRFuncType *funcType = nullptr;
+      if (stmt->GetOpCode() == OP_icallproto) {
+        IcallNode *icallproto = static_cast<IcallNode*>(stmt);
+        funcType = static_cast<MIRFuncType*>(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx()));
+        paramInPrototype = (i-1) < funcType->GetParamTypeList().size();
+      } else {
+        CallNode *callNode = static_cast<CallNode*>(stmt);
+        MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx());
+        funcType = calleeFunc->GetMIRFuncType();
+        paramInPrototype = i < funcType->GetParamTypeList().size();
+      }
+    }
+    if (paramInPrototype) {
+      stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i);
+      continue;
+    } 
+    // lower to iread so the type can be provided
+    if (stmt->Opnd(i)->GetOpCode() ==  OP_iread) {
+      IreadNode *iread = static_cast<IreadNode *>(stmt->Opnd(i));
+      iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0);
+    } else if (stmt->Opnd(i)->GetOpCode() ==  OP_dread) {
+      AddrofNode *addrof = static_cast<AddrofNode *>(stmt->Opnd(i));
+      FieldID fid = addrof->GetFieldID();
+      addrof->SetOpCode(OP_addrof);
+      addrof->SetPrimType(GetExactPtrPrimType());
+      addrof->SetFieldID(0);
+      MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx());
+      MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType());
+      ptrType.SetTypeAttrs(symbol->GetAttrs());
+      TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType);
+      if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) {
+        MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx);
+        becommon->UpdateTypeTable(*newType);
+      }
+      IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New<IreadNode>(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof));
+      stmt->SetOpnd(newIread, i);
+    }
+  }
+  newblk->AddStatement(stmt);
+}
+
 BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) {
   BlockNode *newblk = mirModule->CurFuncCodeMemPool()->New<BlockNode>();
   if (!block->GetFirst()) {
@@ -411,6 +460,12 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) {
         }
         break;
       }
+      case OP_asm:
+      case OP_call:
+      case OP_icallproto: {
+        LowerCall(static_cast<NaryStmtNode*>(stmt), newblk);
+        break;
+      }
       default: {
         for (size_t i = 0; i < stmt->NumOpnds(); ++i) {
           stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i);
diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp
index 77a16dae13390901390ea74186fbc3d82c4768cd..edeb1539da41934ff24dfb28c47722cad012207d 100644
--- a/src/mapleall/maple_me/src/me_phase_manager.cpp
+++ b/src/mapleall/maple_me/src/me_phase_manager.cpp
@@ -149,6 +149,9 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) {
       if (func->GetBody() == nullptr) {
         continue;
       }
+      if (!IsQuiet()) {
+        LogInfo::MapleLogger() << ">>>> Generating LMBC for Function  < " << func->GetName() << " >\n";
+      }
       m.SetCurFunction(func);
       cgLower.LowerFunc(*func);
       MemPool *layoutMp = memPoolCtrler.NewMemPool("layout mempool", true);
diff --git a/src/mapleall/maple_me/src/pme_emit.cpp b/src/mapleall/maple_me/src/pme_emit.cpp
index 5f5b2496e7308a3a38902e00403cfdd4af3553ed..098cedf11136d30324ac3214dfc6427f038e9cc0 100755
--- a/src/mapleall/maple_me/src/pme_emit.cpp
+++ b/src/mapleall/maple_me/src/pme_emit.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.
diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp
index 5776b8addf02f403e95c1242d6769ff98608ddd1..e2a45d62d4ed2f5a34c819d2f02b15dbdd3ba273 100644
--- a/src/mapleall/maple_me/src/pme_mir_lower.cpp
+++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved.
  *
  * OpenArkCompiler is licensed under the Mulan Permissive Software License v2.
  * You can use this software according to the terms and conditions of the MulanPSL - 2.0.