From e176f4d31cecedc737ee1e6a7f702c33a1f2949d Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Fri, 10 Jun 2022 17:56:05 -0700 Subject: [PATCH 01/17] deleted obsolete code in SelectAggIassign() where small struct returned in regs was represented in an iassign Handled more types of asm operands in instruction selection. --- .../src/cg/aarch64/aarch64_cgfunc.cpp | 166 ++++-------------- src/mapleall/maple_ir/src/bin_func_import.cpp | 2 +- .../maple_me/include/lmbc_memlayout.h | 14 +- src/mapleall/maple_me/src/lmbc_lower.cpp | 4 +- 4 files changed, 42 insertions(+), 144 deletions(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 631e4f8551..a290ade343 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1235,6 +1235,42 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_addrofoff: { + auto &addrofoffNode = static_cast(*node.Opnd(i)); + Operand *inOpnd = SelectAddrofoff(addrofoffNode, node); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = addrofoffNode.GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } + case OP_ireadoff: { + IreadoffNode *ireadoff = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIreadoff(node, *ireadoff); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = ireadoff->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } + case OP_add: { + BinaryNode *addNode = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = addNode->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_constval: { CHECK_FATAL(!isOutputTempNode, "Unexpect"); auto &constNode = static_cast(*node.Opnd(i)); @@ -2288,15 +2324,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &AddrOpnd) { uint32 lhsOffset = 0; MIRType *stmtType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx()); MIRPtrType *lhsPointerType = static_cast(stmtType); - bool loadToRegs4StructReturn = false; - if (mirModule.CurFunction()->StructReturnedInRegs()) { - MIRSymbol *retSt = mirModule.CurFunction()->GetFormal(0); - if (stmt.Opnd(0)->GetOpCode() == OP_dread) { - DreadNode *dread = static_cast(stmt.Opnd(0)); - MIRSymbol *addrSym = mirModule.CurFunction()->GetLocalOrGlobalSymbol(dread->GetStIdx()); - loadToRegs4StructReturn = (retSt == addrSym); - } - } MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(lhsPointerType->GetPointedTyIdx()); if (stmt.GetFieldID() != 0) { MIRStructType *structType = static_cast(lhsType); @@ -2340,91 +2367,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &AddrOpnd) { rhsType = structType->GetFieldType(rhsDread->GetFieldID()); rhsOffset = static_cast(GetBecommon().GetFieldOffset(*structType, rhsDread->GetFieldID()).first); } - if (loadToRegs4StructReturn) { - /* generate move to regs for agg return */ - CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size"); - AArch64CallConvImpl parmlocator(GetBecommon()); - CCLocInfo pLoc; - parmlocator.LocateNextParm(*lhsType, pLoc, true, GetBecommon().GetMIRModule().CurFunction()); - /* aggregates are 8 byte aligned. */ - Operand *rhsmemopnd = nullptr; - RegOperand *result[kFourRegister]; /* up to 2 int or 4 fp */ - uint32 loadSize; - uint32 numRegs; - RegType regType; - PrimType retPty; - bool fpParm = false; - if (pLoc.numFpPureRegs > 0) { - loadSize = pLoc.fpSize; - numRegs = pLoc.numFpPureRegs; - fpParm = true; - regType = kRegTyFloat; - retPty = (pLoc.fpSize == k4ByteSize) ? PTY_f32 : PTY_f64; - } else { - if (CGOptions::IsBigEndian()) { - loadSize = k8ByteSize; - numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - regType = kRegTyInt; - retPty = PTY_u64; - } else { - loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize; - numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - regType = kRegTyInt; - retPty = PTY_u32; - } - } - bool parmCopy = IsParamStructCopy(*rhsSymbol); - for (uint32 i = 0; i < numRegs; i++) { - if (parmCopy) { - rhsmemopnd = &LoadStructCopyBase(*rhsSymbol, - (rhsOffset + static_cast(i * (fpParm ? loadSize : k8ByteSize))), - static_cast(loadSize * kBitsPerByte)); - } else { - rhsmemopnd = &GetOrCreateMemOpnd(*rhsSymbol, - (rhsOffset + static_cast(i * (fpParm ? loadSize : k8ByteSize))), - (loadSize * kBitsPerByte)); - } - result[i] = &CreateVirtualRegisterOperand(NewVReg(regType, loadSize)); - MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, retPty); - Insn &ld = GetCG()->BuildInstruction(mop1, *(result[i]), *rhsmemopnd); - GetCurBB()->AppendInsn(ld); - } - AArch64reg regs[kFourRegister]; - regs[kFirstReg] = static_cast(pLoc.reg0); - regs[kSecondReg] = static_cast(pLoc.reg1); - regs[kThirdReg] = static_cast(pLoc.reg2); - regs[kFourthReg] = static_cast(pLoc.reg3); - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg; - MOperator mop2; - if (fpParm) { - preg = regs[i]; - mop2 = (loadSize == k4ByteSize) ? MOP_xvmovs : MOP_xvmovd; - } else { - preg = (i == 0 ? R0 : R1); - mop2 = (loadSize == k4ByteSize) ? MOP_wmovrr : MOP_xmovrr; - } - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, (loadSize * kBitsPerByte), regType); - Insn &mov = GetCG()->BuildInstruction(mop2, dest, *(result[i])); - GetCurBB()->AppendInsn(mov); - } - /* Create artificial dependency to extend the live range */ - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg; - MOperator mop3; - if (fpParm) { - preg = regs[i]; - mop3 = MOP_pseudo_ret_float; - } else { - preg = (i == 0 ? R0 : R1); - mop3 = MOP_pseudo_ret_int; - } - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, regType); - Insn &pseudo = GetCG()->BuildInstruction(mop3, dest); - GetCurBB()->AppendInsn(pseudo); - } - return; - } rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex()); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); @@ -2540,42 +2482,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &AddrOpnd) { rhsOffset = static_cast(GetBecommon().GetFieldOffset(*rhsStructType, rhsIread->GetFieldID()).first); isRefField = GetBecommon().IsRefField(*rhsStructType, rhsIread->GetFieldID()); } - if (loadToRegs4StructReturn) { - /* generate move to regs. */ - CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size"); - RegOperand *result[kTwoRegister]; /* maximum 16 bytes, 2 registers */ - uint32 loadSize; - if (CGOptions::IsBigEndian()) { - loadSize = k8ByteSize; - } else { - loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize; - } - uint32 numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - for (uint32 i = 0; i < numRegs; i++) { - OfstOperand *rhsOffOpnd = &GetOrCreateOfstOpnd(rhsOffset + i * loadSize, loadSize * kBitsPerByte); - Operand &rhsmemopnd = GetOrCreateMemOpnd(MemOperand::kAddrModeBOi, loadSize * kBitsPerByte, - rhsAddrOpnd, nullptr, rhsOffOpnd, nullptr); - result[i] = &CreateVirtualRegisterOperand(NewVReg(kRegTyInt, loadSize)); - MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, PTY_u32); - Insn &ld = GetCG()->BuildInstruction(mop1, *(result[i]), rhsmemopnd); - ld.MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(ld); - } - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg = (i == 0 ? R0 : R1); - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt); - Insn &mov = GetCG()->BuildInstruction(MOP_xmovrr, dest, *(result[i])); - GetCurBB()->AppendInsn(mov); - } - /* Create artificial dependency to extend the live range */ - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg = (i == 0 ? R0 : R1); - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt); - Insn &pseudo = cg->BuildInstruction(MOP_pseudo_ret_int, dest); - GetCurBB()->AppendInsn(pseudo); - } - return; - } rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex()); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); diff --git a/src/mapleall/maple_ir/src/bin_func_import.cpp b/src/mapleall/maple_ir/src/bin_func_import.cpp index 500e426afe..b83f41af7f 100644 --- a/src/mapleall/maple_ir/src/bin_func_import.cpp +++ b/src/mapleall/maple_ir/src/bin_func_import.cpp @@ -45,7 +45,7 @@ void BinaryMplImport::ImportFuncIdInfo(MIRFunction *func) { func->SetPuidxOrigin(static_cast(ReadNum())); ImportInfoVector(func->GetInfoVector(), func->InfoIsString()); if (mod.GetFlavor() == kFlavorLmbc) { - func->SetFrameSize(static_cast(ReadNum())); + func->SetFrameSize(static_cast(ReadNum())); } } diff --git a/src/mapleall/maple_me/include/lmbc_memlayout.h b/src/mapleall/maple_me/include/lmbc_memlayout.h index 833b357561..83b59ba69f 100644 --- a/src/mapleall/maple_me/include/lmbc_memlayout.h +++ b/src/mapleall/maple_me/include/lmbc_memlayout.h @@ -38,16 +38,9 @@ typedef enum { class MemSegment; // describes where a symbol is allocated -class SymbolAlloc { - public: - SymbolAlloc() : mem_segment(nullptr), offset(0) {} - - ~SymbolAlloc() { - mem_segment = nullptr; - } - - MemSegment *mem_segment; - int32 offset; +struct SymbolAlloc { + MemSegment *mem_segment = nullptr; + int32 offset = 0; }; // class SymbolAlloc // keeps track of the allocation of a memory segment @@ -61,7 +54,6 @@ class MemSegment { MemSegmentKind kind; int32 size; // size is negative if allocated offsets are negative - SymbolAlloc how_alloc; // this segment may be allocated inside another segment }; // class MemSegment class LMBCMemLayout { diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index 9ba84151e5..8cb339f657 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -25,8 +25,8 @@ PregIdx LMBCLowerer::GetSpecialRegFromSt(const MIRSymbol *sym) { if (storageClass == kScAuto) { CHECK(sym->GetStIndex() < memlayout->sym_alloc_table.size(), "index out of range in LMBCLowerer::GetSpecialRegFromSt"); - SymbolAlloc symalloc = memlayout->sym_alloc_table[sym->GetStIndex()]; - if (symalloc.mem_segment->kind == MS_FPbased) { + SymbolAlloc *symalloc = &memlayout->sym_alloc_table[sym->GetStIndex()]; + if (symalloc->mem_segment->kind == MS_FPbased) { specreg = -kSregFp; } else { CHECK_FATAL(false, "LMBCLowerer::LowerDread: bad memory layout for local variable"); -- Gitee From f26b736dcaa5a6ce034b28f4e815a57a6158faeb Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Mon, 27 Jun 2022 18:36:42 -0700 Subject: [PATCH 02/17] For actual parameters corresponding to varargs, made lmbc lower struct parameters differently so as not to lose their type info --- src/mapleall/maple_me/src/lmbc_lower.cpp | 47 +++++++++++++++++++ .../maple_me/src/me_phase_manager.cpp | 3 ++ 2 files changed, 50 insertions(+) diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index 8cb339f657..c5913b036e 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -411,6 +411,53 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { } break; } + case OP_call: + case OP_icallproto: { + for (size_t i = 0; i < stmt->NumOpnds(); ++i) { + if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { + bool paramInPrototype = false; + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } + if (paramInPrototype) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { // lower to iread so the type can be provided + if (stmt->Opnd(i)->GetOpCode() == OP_iread) { + IreadNode *iread = static_cast(stmt->Opnd(i)); + iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); + } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { + AddrofNode *addrof = static_cast(stmt->Opnd(i)); + FieldID fid = addrof->GetFieldID(); + addrof->SetOpCode(OP_addrof); + addrof->SetPrimType(GetExactPtrPrimType()); + addrof->SetFieldID(0); + MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); + MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); + ptrType.SetTypeAttrs(symbol->GetAttrs()); + TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); + if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { + MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); + becommon->UpdateTypeTable(*newType); + } + IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); + stmt->SetOpnd(newIread, i); + } + } + } + } + newblk->AddStatement(stmt); + break; + } default: { for (size_t i = 0; i < stmt->NumOpnds(); ++i) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp index eef57b0aeb..90623f15c4 100644 --- a/src/mapleall/maple_me/src/me_phase_manager.cpp +++ b/src/mapleall/maple_me/src/me_phase_manager.cpp @@ -149,6 +149,9 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) { if (func->GetBody() == nullptr) { continue; } + if (!IsQuiet()) { + LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " > [" << i - 1 << "]\n"; + } m.SetCurFunction(func); cgLower.LowerFunc(*func); MemPool *layoutMp = memPoolCtrler.NewMemPool("layout mempool", true); -- Gitee From bdf4bdffdf712ddd3d00f44ba4cd597e350a985f Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Mon, 27 Jun 2022 21:09:51 -0700 Subject: [PATCH 03/17] Deleted LmbcSelectParmList() which no longer serves any purpose --- .../include/cg/aarch64/aarch64_cgfunc.h | 1 - .../src/cg/aarch64/aarch64_cgfunc.cpp | 53 ------------------- src/mapleall/maple_me/include/pme_emit.h | 2 +- src/mapleall/maple_me/include/pme_function.h | 2 +- .../maple_me/include/pme_mir_extension.h | 2 +- src/mapleall/maple_me/include/pme_mir_lower.h | 2 +- .../maple_me/src/me_phase_manager.cpp | 2 +- src/mapleall/maple_me/src/pme_emit.cpp | 2 +- src/mapleall/maple_me/src/pme_mir_lower.cpp | 2 +- 9 files changed, 7 insertions(+), 61 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index c34b2818b6..26d7b20ee9 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -128,7 +128,6 @@ class AArch64CGFunc : public CGFunc { MemOperand *FixLargeMemOpnd(MOperator mOp, MemOperand &memOpnd, uint32 dSize, uint32 opndIdx); uint32 LmbcFindTotalStkUsed(std::vector* paramList); uint32 LmbcTotalRegsUsed(); - void LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn); bool LmbcSmallAggForRet(const BlkassignoffNode &bNode, const Operand *src); bool LmbcSmallAggForCall(BlkassignoffNode &bNode, const Operand *src, std::vector **parmList); void SelectAggDassign(DassignNode &stmt) override; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index a290ade343..4d1e7961f7 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -8466,56 +8466,6 @@ void AArch64CGFunc::IntrinsifyStringIndexOf(ListOperand &srcOpnds, const MIRSymb SetCurBB(*jointBB); } -/* Lmbc calls have no argument, they are all explicit iassignspoff or - blkassign. Info collected and to be emitted here */ -void AArch64CGFunc::LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn) { - if (GetLmbcArgInfo() == nullptr) { - return; /* no arg */ - } - CHECK_FATAL(GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc, "To be called for Lmbc model only"); - MapleVector &args = GetLmbcCallArgs(); - MapleVector &types = GetLmbcCallArgTypes(); - MapleVector &offsets = GetLmbcCallArgOffsets(); - MapleVector ®s = GetLmbcCallArgNumOfRegs(); - int iCnt = 0; - int fCnt = 0; - for (size_t i = isArgReturn ? 1 : 0; i < args.size(); i++) { - RegType ty = args[i]->GetRegisterType(); - PrimType pTy = types[i]; - AArch64reg reg; - if (args[i]->IsOfIntClass() && (iCnt + regs[i]) <= static_cast(k8ByteSize)) { - reg = static_cast(R0 + iCnt++); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand( - reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty); - SelectCopy(*res, pTy, *args[i], pTy); - srcOpnds->PushOpnd(*res); - } else if (!args[i]->IsOfIntClass() && (fCnt + regs[i]) <= static_cast(k8ByteSize)) { - reg = static_cast(V0 + fCnt++); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand( - reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty); - SelectCopy(*res, pTy, *args[i], pTy); - srcOpnds->PushOpnd(*res); - } else { - uint32 pSize = GetPrimTypeSize(pTy); - Operand &memOpd = CreateMemOpnd(RSP, offsets[i], pSize); - GetCurBB()->AppendInsn(GetCG()->BuildInstruction(PickStInsn(pSize * kBitsPerByte, pTy), - *args[i], memOpd)); - } - } - /* Load x8 if 1st arg is for agg return */ - if (isArgReturn) { - AArch64reg reg = static_cast(R8); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand(reg, - GetPrimTypeSize(PTY_a64) * kBitsPerByte, - kRegTyInt); - SelectCopy(*res, PTY_a64, *args[0], PTY_a64); - srcOpnds->PushOpnd(*res); - } - ResetLmbcArgInfo(); /* reset */ - ResetLmbcArgsInRegs(); - ResetLmbcTotalArgs(); -} - void AArch64CGFunc::SelectCall(CallNode &callNode) { MIRFunction *fn = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode.GetPUIdx()); MIRSymbol *fsym = GetFunction().GetLocalOrGlobalSymbol(fn->GetStIdx(), false); @@ -8529,18 +8479,15 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) { ListOperand *srcOpnds = CreateListOpnd(*GetFuncScopeAllocator()); if (GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc) { SetLmbcCallReturnType(nullptr); - bool largeStructRet = false; if (fn->IsFirstArgReturn()) { MIRPtrType *ptrTy = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx( fn->GetFormalDefVec()[0].formalTyIdx)); MIRType *sTy = GlobalTables::GetTypeTable().GetTypeFromTyIdx(ptrTy->GetPointedTyIdx()); - largeStructRet = sTy->GetSize() > k16ByteSize; SetLmbcCallReturnType(sTy); } else { MIRType *ty = fn->GetReturnType(); SetLmbcCallReturnType(ty); } - LmbcSelectParmList(srcOpnds, largeStructRet); } bool callNative = false; if ((fsym->GetName() == "MCC_CallFastNative") || (fsym->GetName() == "MCC_CallFastNativeExt") || diff --git a/src/mapleall/maple_me/include/pme_emit.h b/src/mapleall/maple_me/include/pme_emit.h index 292aad55af..27cc98ba6a 100644 --- a/src/mapleall/maple_me/include/pme_emit.h +++ b/src/mapleall/maple_me/include/pme_emit.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_function.h b/src/mapleall/maple_me/include/pme_function.h index 46e4d97c74..c5d711b455 100644 --- a/src/mapleall/maple_me/include/pme_function.h +++ b/src/mapleall/maple_me/include/pme_function.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_mir_extension.h b/src/mapleall/maple_me/include/pme_mir_extension.h index 14dfe1b68a..4b80f60f18 100644 --- a/src/mapleall/maple_me/include/pme_mir_extension.h +++ b/src/mapleall/maple_me/include/pme_mir_extension.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2020] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2020] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_mir_lower.h b/src/mapleall/maple_me/include/pme_mir_lower.h index 5d3cad0673..9ffefe5b07 100644 --- a/src/mapleall/maple_me/include/pme_mir_lower.h +++ b/src/mapleall/maple_me/include/pme_mir_lower.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp index 90623f15c4..b708bb27b2 100644 --- a/src/mapleall/maple_me/src/me_phase_manager.cpp +++ b/src/mapleall/maple_me/src/me_phase_manager.cpp @@ -150,7 +150,7 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) { continue; } if (!IsQuiet()) { - LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " > [" << i - 1 << "]\n"; + LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " >\n"; } m.SetCurFunction(func); cgLower.LowerFunc(*func); diff --git a/src/mapleall/maple_me/src/pme_emit.cpp b/src/mapleall/maple_me/src/pme_emit.cpp index 8b37db3531..38e4d69385 100755 --- a/src/mapleall/maple_me/src/pme_emit.cpp +++ b/src/mapleall/maple_me/src/pme_emit.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp index 6c1a5ab338..462517a5bf 100644 --- a/src/mapleall/maple_me/src/pme_mir_lower.cpp +++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. -- Gitee From 4b7ff718b7bd11c613c156df9f85d7ec49f72d17 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Wed, 6 Jul 2022 17:53:27 -0700 Subject: [PATCH 04/17] Fixed bug in exporting MIRAddrofConst for local symbols --- src/mapleall/maple_me/include/lfo_dep_test.h | 2 +- src/mapleall/maple_me/include/lfo_inject_iv.h | 4 ++-- src/mapleall/maple_me/include/lfo_iv_canon.h | 2 +- src/mapleall/maple_me/include/lfo_unroll.h | 2 +- src/mapleall/maple_me/src/lfo_dep_test.cpp | 2 +- src/mapleall/maple_me/src/lfo_inject_iv.cpp | 2 +- src/mapleall/maple_me/src/lfo_iv_canon.cpp | 2 +- src/mapleall/maple_me/src/lfo_unroll.cpp | 2 +- 8 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mapleall/maple_me/include/lfo_dep_test.h b/src/mapleall/maple_me/include/lfo_dep_test.h index a7a8aad16b..72b0ae086e 100644 --- a/src/mapleall/maple_me/include/lfo_dep_test.h +++ b/src/mapleall/maple_me/include/lfo_dep_test.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/lfo_inject_iv.h b/src/mapleall/maple_me/include/lfo_inject_iv.h index 415d186cdc..aa8241a12b 100644 --- a/src/mapleall/maple_me/include/lfo_inject_iv.h +++ b/src/mapleall/maple_me/include/lfo_inject_iv.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. @@ -21,4 +21,4 @@ namespace maple { /* emit ir to specified file */ MAPLE_FUNC_PHASE_DECLARE(MELfoInjectIV, MeFunction) } // namespace maple -#endif // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H \ No newline at end of file +#endif // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H diff --git a/src/mapleall/maple_me/include/lfo_iv_canon.h b/src/mapleall/maple_me/include/lfo_iv_canon.h index 7033e54be2..8a83f5a242 100644 --- a/src/mapleall/maple_me/include/lfo_iv_canon.h +++ b/src/mapleall/maple_me/include/lfo_iv_canon.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/lfo_unroll.h b/src/mapleall/maple_me/include/lfo_unroll.h index 381540753d..90ef21dcd5 100644 --- a/src/mapleall/maple_me/include/lfo_unroll.h +++ b/src/mapleall/maple_me/include/lfo_unroll.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_dep_test.cpp b/src/mapleall/maple_me/src/lfo_dep_test.cpp index 6ede310138..10c3e03822 100644 --- a/src/mapleall/maple_me/src/lfo_dep_test.cpp +++ b/src/mapleall/maple_me/src/lfo_dep_test.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_me/src/lfo_inject_iv.cpp b/src/mapleall/maple_me/src/lfo_inject_iv.cpp index e712dd72bf..5208bf795c 100644 --- a/src/mapleall/maple_me/src/lfo_inject_iv.cpp +++ b/src/mapleall/maple_me/src/lfo_inject_iv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_iv_canon.cpp b/src/mapleall/maple_me/src/lfo_iv_canon.cpp index a1ee9193f0..164c89b152 100644 --- a/src/mapleall/maple_me/src/lfo_iv_canon.cpp +++ b/src/mapleall/maple_me/src/lfo_iv_canon.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_unroll.cpp b/src/mapleall/maple_me/src/lfo_unroll.cpp index 5373294f55..6c8d278822 100644 --- a/src/mapleall/maple_me/src/lfo_unroll.cpp +++ b/src/mapleall/maple_me/src/lfo_unroll.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. -- Gitee From ddb22059bf9cc9d4cd454445f3cdb026ed73eafb Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Thu, 7 Jul 2022 22:28:10 -0700 Subject: [PATCH 05/17] Added support of ireadfpoff as operand of asm stmt --- .../maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 4d1e7961f7..ad8ea705d0 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1259,6 +1259,18 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_ireadfpoff: { + IreadFPoffNode *ireadfpoff = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIreadfpoff(node, *ireadfpoff); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = ireadfpoff->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_add: { BinaryNode *addNode = static_cast(node.Opnd(i)); Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); -- Gitee From bd92aa328d33b0bfa047465141e82d543edc872e Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Fri, 8 Jul 2022 21:21:35 -0700 Subject: [PATCH 06/17] Made lmbc lower operands of asm like call operands with no prototypes In SelectAsm(), handle iread as operands --- src/mapleall/maple_be/include/cg/cg_ssa_pre.h | 2 +- src/mapleall/maple_be/include/cg/cg_ssu_pre.h | 2 +- .../src/cg/aarch64/aarch64_cgfunc.cpp | 14 ++++++++++- src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp | 2 +- src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp | 2 +- src/mapleall/maple_me/src/lmbc_lower.cpp | 23 +++++++++++-------- 6 files changed, 30 insertions(+), 15 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h index 10256204c1..fa2b19664e 100644 --- a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h +++ b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2022] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h index b96d693ca2..d00f0906f4 100644 --- a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h +++ b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index ad8ea705d0..1711c417a1 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1271,6 +1271,18 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_iread: { + IreadNode *iread = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIread(node, *iread); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = iread->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_add: { BinaryNode *addNode = static_cast(node.Opnd(i)); Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); @@ -3253,7 +3265,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, if (pointedType->IsStructType()) { MIRStructType *structType = static_cast(pointedType); /* size << 3, that is size * 8, change bytes to bits */ - bitSize = structType->GetSize() << 3; + bitSize = std::min(structType->GetSize(), (size_t)kSizeOfPtr) << 3; } else { bitSize = GetPrimTypeBitSize(destType); } diff --git a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp index 70db43dc23..30e92d3841 100644 --- a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp +++ b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2022] Futureweiwei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp index c6d42f688b..c8604798eb 100644 --- a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp +++ b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index c5913b036e..bc4680c162 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -411,6 +411,7 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { } break; } + case OP_asm: case OP_call: case OP_icallproto: { for (size_t i = 0; i < stmt->NumOpnds(); ++i) { @@ -418,16 +419,18 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); } else { bool paramInPrototype = false; - MIRFuncType *funcType = nullptr; - if (stmt->GetOpCode() == OP_icallproto) { - IcallNode *icallproto = static_cast(stmt); - funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); - paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); - } else { - CallNode *callNode = static_cast(stmt); - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); - funcType = calleeFunc->GetMIRFuncType(); - paramInPrototype = i < funcType->GetParamTypeList().size(); + if (stmt->GetOpCode() != OP_asm) { + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } } if (paramInPrototype) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); -- Gitee From 1b978362435c0f91aaaf36f3d2e4a75f27bf3bba Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Sun, 10 Jul 2022 23:58:18 -0700 Subject: [PATCH 07/17] SelectParmListIreadLargeAggregate() should do nothing if aggegate has 0 size --- src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 1711c417a1..9d85c4b57f 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -7530,6 +7530,9 @@ void AArch64CGFunc::SelectParmListIreadLargeAggregate(const IreadNode &iread, MI void AArch64CGFunc::CreateCallStructParamPassByStack(int32 symSize, const MIRSymbol *sym, RegOperand *addrOpnd, int32 baseOffset) { + if (symSize == 0) { + return; + } MemOperand *ldMopnd = nullptr; MemOperand *stMopnd = nullptr; uint32 numRegNeeded = (static_cast(symSize) <= k8ByteSize) ? kOneRegister : kTwoRegister; -- Gitee From 884d9d4485e3948e03083c98dcf89557b70941f5 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Wed, 13 Jul 2022 21:14:40 -0700 Subject: [PATCH 08/17] Defined LMBCLowerer::LowerCall() to wrap the relevant code out from LowerBlock() --- src/mapleall/maple_me/include/lmbc_lower.h | 1 + src/mapleall/maple_me/src/lmbc_lower.cpp | 94 +++++++++++----------- 2 files changed, 50 insertions(+), 45 deletions(-) diff --git a/src/mapleall/maple_me/include/lmbc_lower.h b/src/mapleall/maple_me/include/lmbc_lower.h index bbeaabf098..7354ecfdca 100644 --- a/src/mapleall/maple_me/include/lmbc_lower.h +++ b/src/mapleall/maple_me/include/lmbc_lower.h @@ -40,6 +40,7 @@ class LMBCLowerer { void LowerIassign(IassignNode *, BlockNode *); void LowerAggIassign(IassignNode *, MIRType *type, int32 offset, BlockNode *); void LowerReturn(NaryStmtNode *retNode, BlockNode *newblk); + void LowerCall(NaryStmtNode *stmt, BlockNode *newblk); BlockNode *LowerBlock(BlockNode *); void LowerFunction(); diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index bc4680c162..433ebcf028 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -375,6 +375,54 @@ void LMBCLowerer::LowerReturn(NaryStmtNode *retNode, BlockNode *newblk) { newblk->AddStatement(retNode); } +void LMBCLowerer::LowerCall(NaryStmtNode *stmt, BlockNode *newblk) { + for (size_t i = 0; i < stmt->NumOpnds(); ++i) { + if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { + bool paramInPrototype = false; + if (stmt->GetOpCode() != OP_asm) { + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } + } + if (paramInPrototype) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { // lower to iread so the type can be provided + if (stmt->Opnd(i)->GetOpCode() == OP_iread) { + IreadNode *iread = static_cast(stmt->Opnd(i)); + iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); + } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { + AddrofNode *addrof = static_cast(stmt->Opnd(i)); + FieldID fid = addrof->GetFieldID(); + addrof->SetOpCode(OP_addrof); + addrof->SetPrimType(GetExactPtrPrimType()); + addrof->SetFieldID(0); + MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); + MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); + ptrType.SetTypeAttrs(symbol->GetAttrs()); + TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); + if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { + MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); + becommon->UpdateTypeTable(*newType); + } + IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); + stmt->SetOpnd(newIread, i); + } + } + } + } + newblk->AddStatement(stmt); +} + BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { BlockNode *newblk = mirModule->CurFuncCodeMemPool()->New(); if (!block->GetFirst()) { @@ -414,51 +462,7 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { case OP_asm: case OP_call: case OP_icallproto: { - for (size_t i = 0; i < stmt->NumOpnds(); ++i) { - if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { - stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { - bool paramInPrototype = false; - if (stmt->GetOpCode() != OP_asm) { - MIRFuncType *funcType = nullptr; - if (stmt->GetOpCode() == OP_icallproto) { - IcallNode *icallproto = static_cast(stmt); - funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); - paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); - } else { - CallNode *callNode = static_cast(stmt); - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); - funcType = calleeFunc->GetMIRFuncType(); - paramInPrototype = i < funcType->GetParamTypeList().size(); - } - } - if (paramInPrototype) { - stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { // lower to iread so the type can be provided - if (stmt->Opnd(i)->GetOpCode() == OP_iread) { - IreadNode *iread = static_cast(stmt->Opnd(i)); - iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); - } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { - AddrofNode *addrof = static_cast(stmt->Opnd(i)); - FieldID fid = addrof->GetFieldID(); - addrof->SetOpCode(OP_addrof); - addrof->SetPrimType(GetExactPtrPrimType()); - addrof->SetFieldID(0); - MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); - MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); - ptrType.SetTypeAttrs(symbol->GetAttrs()); - TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); - if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { - MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); - becommon->UpdateTypeTable(*newType); - } - IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); - stmt->SetOpnd(newIread, i); - } - } - } - } - newblk->AddStatement(stmt); + LowerCall(static_cast(stmt), newblk); break; } default: { -- Gitee From 386fa925e9d10c2531ba9eda43557cf56077e8a6 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Fri, 10 Jun 2022 17:56:05 -0700 Subject: [PATCH 09/17] deleted obsolete code in SelectAggIassign() where small struct returned in regs was represented in an iassign Handled more types of asm operands in instruction selection. --- .../src/cg/aarch64/aarch64_cgfunc.cpp | 166 ++++-------------- src/mapleall/maple_ir/src/bin_func_import.cpp | 2 +- .../maple_me/include/lmbc_memlayout.h | 14 +- src/mapleall/maple_me/src/lmbc_lower.cpp | 4 +- 4 files changed, 42 insertions(+), 144 deletions(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 77a3a631a8..c1dd37c8af 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1232,6 +1232,42 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_addrofoff: { + auto &addrofoffNode = static_cast(*node.Opnd(i)); + Operand *inOpnd = SelectAddrofoff(addrofoffNode, node); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = addrofoffNode.GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } + case OP_ireadoff: { + IreadoffNode *ireadoff = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIreadoff(node, *ireadoff); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = ireadoff->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } + case OP_add: { + BinaryNode *addNode = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = addNode->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_constval: { CHECK_FATAL(!isOutputTempNode, "Unexpect"); auto &constNode = static_cast(*node.Opnd(i)); @@ -2285,15 +2321,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { uint32 lhsOffset = 0; MIRType *stmtType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(stmt.GetTyIdx()); MIRPtrType *lhsPointerType = static_cast(stmtType); - bool loadToRegs4StructReturn = false; - if (mirModule.CurFunction()->StructReturnedInRegs()) { - MIRSymbol *retSt = mirModule.CurFunction()->GetFormalCount() == 0 ? nullptr : mirModule.CurFunction()->GetFormal(0); - if (stmt.Opnd(0)->GetOpCode() == OP_dread) { - DreadNode *dread = static_cast(stmt.Opnd(0)); - MIRSymbol *addrSym = mirModule.CurFunction()->GetLocalOrGlobalSymbol(dread->GetStIdx()); - loadToRegs4StructReturn = (retSt == addrSym); - } - } MIRType *lhsType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(lhsPointerType->GetPointedTyIdx()); if (stmt.GetFieldID() != 0) { MIRStructType *structType = static_cast(lhsType); @@ -2337,91 +2364,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { rhsType = structType->GetFieldType(rhsDread->GetFieldID()); rhsOffset = static_cast(GetBecommon().GetFieldOffset(*structType, rhsDread->GetFieldID()).first); } - if (loadToRegs4StructReturn) { - /* generate move to regs for agg return */ - CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size"); - AArch64CallConvImpl parmlocator(GetBecommon()); - CCLocInfo pLoc; - parmlocator.LocateNextParm(*lhsType, pLoc, true, GetBecommon().GetMIRModule().CurFunction()); - /* aggregates are 8 byte aligned. */ - Operand *rhsmemopnd = nullptr; - RegOperand *result[kFourRegister]; /* up to 2 int or 4 fp */ - uint32 loadSize; - uint32 numRegs; - RegType regType; - PrimType retPty; - bool fpParm = false; - if (pLoc.numFpPureRegs > 0) { - loadSize = pLoc.fpSize; - numRegs = pLoc.numFpPureRegs; - fpParm = true; - regType = kRegTyFloat; - retPty = (pLoc.fpSize == k4ByteSize) ? PTY_f32 : PTY_f64; - } else { - if (CGOptions::IsBigEndian()) { - loadSize = k8ByteSize; - numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - regType = kRegTyInt; - retPty = PTY_u64; - } else { - loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize; - numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - regType = kRegTyInt; - retPty = PTY_u32; - } - } - bool parmCopy = IsParamStructCopy(*rhsSymbol); - for (uint32 i = 0; i < numRegs; i++) { - if (parmCopy) { - rhsmemopnd = &LoadStructCopyBase(*rhsSymbol, - (rhsOffset + static_cast(i * (fpParm ? loadSize : k8ByteSize))), - static_cast(loadSize * kBitsPerByte)); - } else { - rhsmemopnd = &GetOrCreateMemOpnd(*rhsSymbol, - (rhsOffset + static_cast(i * (fpParm ? loadSize : k8ByteSize))), - (loadSize * kBitsPerByte)); - } - result[i] = &CreateVirtualRegisterOperand(NewVReg(regType, loadSize)); - MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, retPty); - Insn &ld = GetCG()->BuildInstruction(mop1, *(result[i]), *rhsmemopnd); - GetCurBB()->AppendInsn(ld); - } - AArch64reg regs[kFourRegister]; - regs[kFirstReg] = static_cast(pLoc.reg0); - regs[kSecondReg] = static_cast(pLoc.reg1); - regs[kThirdReg] = static_cast(pLoc.reg2); - regs[kFourthReg] = static_cast(pLoc.reg3); - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg; - MOperator mop2; - if (fpParm) { - preg = regs[i]; - mop2 = (loadSize == k4ByteSize) ? MOP_xvmovs : MOP_xvmovd; - } else { - preg = (i == 0 ? R0 : R1); - mop2 = (loadSize == k4ByteSize) ? MOP_wmovrr : MOP_xmovrr; - } - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, (loadSize * kBitsPerByte), regType); - Insn &mov = GetCG()->BuildInstruction(mop2, dest, *(result[i])); - GetCurBB()->AppendInsn(mov); - } - /* Create artificial dependency to extend the live range */ - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg; - MOperator mop3; - if (fpParm) { - preg = regs[i]; - mop3 = MOP_pseudo_ret_float; - } else { - preg = (i == 0 ? R0 : R1); - mop3 = MOP_pseudo_ret_int; - } - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, regType); - Insn &pseudo = GetCG()->BuildInstruction(mop3, dest); - GetCurBB()->AppendInsn(pseudo); - } - return; - } rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex()); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); @@ -2537,42 +2479,6 @@ void AArch64CGFunc::SelectAggIassign(IassignNode &stmt, Operand &addrOpnd) { rhsOffset = static_cast(GetBecommon().GetFieldOffset(*rhsStructType, rhsIread->GetFieldID()).first); isRefField = GetBecommon().IsRefField(*rhsStructType, rhsIread->GetFieldID()); } - if (loadToRegs4StructReturn) { - /* generate move to regs. */ - CHECK_FATAL(lhsSize <= k16ByteSize, "SelectAggIassign: illegal struct size"); - RegOperand *result[kTwoRegister]; /* maximum 16 bytes, 2 registers */ - uint32 loadSize; - if (CGOptions::IsBigEndian()) { - loadSize = k8ByteSize; - } else { - loadSize = (lhsSize <= k4ByteSize) ? k4ByteSize : k8ByteSize; - } - uint32 numRegs = (lhsSize <= k8ByteSize) ? kOneRegister : kTwoRegister; - for (uint32 i = 0; i < numRegs; i++) { - OfstOperand *rhsOffOpnd = &GetOrCreateOfstOpnd(rhsOffset + i * loadSize, loadSize * kBitsPerByte); - Operand &rhsmemopnd = GetOrCreateMemOpnd(MemOperand::kAddrModeBOi, loadSize * kBitsPerByte, - rhsAddrOpnd, nullptr, rhsOffOpnd, nullptr); - result[i] = &CreateVirtualRegisterOperand(NewVReg(kRegTyInt, loadSize)); - MOperator mop1 = PickLdInsn(loadSize * kBitsPerByte, PTY_u32); - Insn &ld = GetCG()->BuildInstruction(mop1, *(result[i]), rhsmemopnd); - ld.MarkAsAccessRefField(isRefField); - GetCurBB()->AppendInsn(ld); - } - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg = (i == 0 ? R0 : R1); - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt); - Insn &mov = GetCG()->BuildInstruction(MOP_xmovrr, dest, *(result[i])); - GetCurBB()->AppendInsn(mov); - } - /* Create artificial dependency to extend the live range */ - for (uint32 i = 0; i < numRegs; i++) { - AArch64reg preg = (i == 0 ? R0 : R1); - RegOperand &dest = GetOrCreatePhysicalRegisterOperand(preg, loadSize * kBitsPerByte, kRegTyInt); - Insn &pseudo = cg->BuildInstruction(MOP_pseudo_ret_int, dest); - GetCurBB()->AppendInsn(pseudo); - } - return; - } rhsAlign = GetBecommon().GetTypeAlign(rhsType->GetTypeIndex()); alignUsed = std::min(lhsAlign, rhsAlign); ASSERT(alignUsed != 0, "expect non-zero"); diff --git a/src/mapleall/maple_ir/src/bin_func_import.cpp b/src/mapleall/maple_ir/src/bin_func_import.cpp index 500e426afe..b83f41af7f 100644 --- a/src/mapleall/maple_ir/src/bin_func_import.cpp +++ b/src/mapleall/maple_ir/src/bin_func_import.cpp @@ -45,7 +45,7 @@ void BinaryMplImport::ImportFuncIdInfo(MIRFunction *func) { func->SetPuidxOrigin(static_cast(ReadNum())); ImportInfoVector(func->GetInfoVector(), func->InfoIsString()); if (mod.GetFlavor() == kFlavorLmbc) { - func->SetFrameSize(static_cast(ReadNum())); + func->SetFrameSize(static_cast(ReadNum())); } } diff --git a/src/mapleall/maple_me/include/lmbc_memlayout.h b/src/mapleall/maple_me/include/lmbc_memlayout.h index f4fe4d4385..a5649bb898 100644 --- a/src/mapleall/maple_me/include/lmbc_memlayout.h +++ b/src/mapleall/maple_me/include/lmbc_memlayout.h @@ -38,16 +38,9 @@ typedef enum { class MemSegment; // describes where a symbol is allocated -class SymbolAlloc { - public: - SymbolAlloc() : mem_segment(nullptr), offset(0) {} - - ~SymbolAlloc() { - mem_segment = nullptr; - } - - MemSegment *mem_segment; - int32 offset; +struct SymbolAlloc { + MemSegment *mem_segment = nullptr; + int32 offset = 0; }; // class SymbolAlloc // keeps track of the allocation of a memory segment @@ -61,7 +54,6 @@ class MemSegment { MemSegmentKind kind; int32 size; // size is negative if allocated offsets are negative - SymbolAlloc how_alloc; // this segment may be allocated inside another segment }; // class MemSegment class LMBCMemLayout { diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index b3972396b3..fbbbfbe943 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -25,8 +25,8 @@ PregIdx LMBCLowerer::GetSpecialRegFromSt(const MIRSymbol *sym) { if (storageClass == kScAuto) { CHECK(sym->GetStIndex() < memlayout->sym_alloc_table.size(), "index out of range in LMBCLowerer::GetSpecialRegFromSt"); - SymbolAlloc symalloc = memlayout->sym_alloc_table[sym->GetStIndex()]; - if (symalloc.mem_segment->kind == MS_FPbased) { + SymbolAlloc *symalloc = &memlayout->sym_alloc_table[sym->GetStIndex()]; + if (symalloc->mem_segment->kind == MS_FPbased) { specreg = -kSregFp; } else { CHECK_FATAL(false, "LMBCLowerer::LowerDread: bad memory layout for local variable"); -- Gitee From 61ed00b97ce0cf79963d21614511732e33cef421 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Mon, 27 Jun 2022 18:36:42 -0700 Subject: [PATCH 10/17] For actual parameters corresponding to varargs, made lmbc lower struct parameters differently so as not to lose their type info --- src/mapleall/maple_me/src/lmbc_lower.cpp | 47 +++++++++++++++++++ .../maple_me/src/me_phase_manager.cpp | 3 ++ 2 files changed, 50 insertions(+) diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index fbbbfbe943..9341b2d59f 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -411,6 +411,53 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { } break; } + case OP_call: + case OP_icallproto: { + for (size_t i = 0; i < stmt->NumOpnds(); ++i) { + if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { + bool paramInPrototype = false; + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } + if (paramInPrototype) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { // lower to iread so the type can be provided + if (stmt->Opnd(i)->GetOpCode() == OP_iread) { + IreadNode *iread = static_cast(stmt->Opnd(i)); + iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); + } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { + AddrofNode *addrof = static_cast(stmt->Opnd(i)); + FieldID fid = addrof->GetFieldID(); + addrof->SetOpCode(OP_addrof); + addrof->SetPrimType(GetExactPtrPrimType()); + addrof->SetFieldID(0); + MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); + MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); + ptrType.SetTypeAttrs(symbol->GetAttrs()); + TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); + if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { + MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); + becommon->UpdateTypeTable(*newType); + } + IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); + stmt->SetOpnd(newIread, i); + } + } + } + } + newblk->AddStatement(stmt); + break; + } default: { for (size_t i = 0; i < stmt->NumOpnds(); ++i) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp index 77a16dae13..78257e38b2 100644 --- a/src/mapleall/maple_me/src/me_phase_manager.cpp +++ b/src/mapleall/maple_me/src/me_phase_manager.cpp @@ -149,6 +149,9 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) { if (func->GetBody() == nullptr) { continue; } + if (!IsQuiet()) { + LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " > [" << i - 1 << "]\n"; + } m.SetCurFunction(func); cgLower.LowerFunc(*func); MemPool *layoutMp = memPoolCtrler.NewMemPool("layout mempool", true); -- Gitee From 528a0961bb5ef6759ecd83abe59961c0e4bf68ed Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Mon, 27 Jun 2022 21:09:51 -0700 Subject: [PATCH 11/17] Deleted LmbcSelectParmList() which no longer serves any purpose --- .../include/cg/aarch64/aarch64_cgfunc.h | 1 - .../src/cg/aarch64/aarch64_cgfunc.cpp | 53 ------------------- src/mapleall/maple_me/include/pme_emit.h | 2 +- src/mapleall/maple_me/include/pme_function.h | 2 +- .../maple_me/include/pme_mir_extension.h | 2 +- src/mapleall/maple_me/include/pme_mir_lower.h | 2 +- .../maple_me/src/me_phase_manager.cpp | 2 +- src/mapleall/maple_me/src/pme_emit.cpp | 2 +- src/mapleall/maple_me/src/pme_mir_lower.cpp | 2 +- 9 files changed, 7 insertions(+), 61 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index 63113da9e7..b7bb72c826 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -128,7 +128,6 @@ class AArch64CGFunc : public CGFunc { MemOperand *FixLargeMemOpnd(MOperator mOp, MemOperand &memOpnd, uint32 dSize, uint32 opndIdx); uint32 LmbcFindTotalStkUsed(std::vector *paramList); uint32 LmbcTotalRegsUsed(); - void LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn); bool LmbcSmallAggForRet(const BlkassignoffNode &bNode, const Operand *src); bool LmbcSmallAggForCall(BlkassignoffNode &bNode, const Operand *src, std::vector **parmList); void SelectAggDassign(DassignNode &stmt) override; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index c1dd37c8af..49f9a0b96d 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -8466,56 +8466,6 @@ void AArch64CGFunc::IntrinsifyStringIndexOf(ListOperand &srcOpnds, const MIRSymb SetCurBB(*jointBB); } -/* Lmbc calls have no argument, they are all explicit iassignspoff or - blkassign. Info collected and to be emitted here */ -void AArch64CGFunc::LmbcSelectParmList(ListOperand *srcOpnds, bool isArgReturn) { - if (GetLmbcArgInfo() == nullptr) { - return; /* no arg */ - } - CHECK_FATAL(GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc, "To be called for Lmbc model only"); - MapleVector &args = GetLmbcCallArgs(); - MapleVector &types = GetLmbcCallArgTypes(); - MapleVector &offsets = GetLmbcCallArgOffsets(); - MapleVector ®s = GetLmbcCallArgNumOfRegs(); - int iCnt = 0; - int fCnt = 0; - for (size_t i = isArgReturn ? 1 : 0; i < args.size(); i++) { - RegType ty = args[i]->GetRegisterType(); - PrimType pTy = types[i]; - AArch64reg reg; - if (args[i]->IsOfIntClass() && (iCnt + regs[i]) <= static_cast(k8ByteSize)) { - reg = static_cast(R0 + iCnt++); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand( - reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty); - SelectCopy(*res, pTy, *args[i], pTy); - srcOpnds->PushOpnd(*res); - } else if (!args[i]->IsOfIntClass() && (fCnt + regs[i]) <= static_cast(k8ByteSize)) { - reg = static_cast(V0 + fCnt++); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand( - reg, GetPrimTypeSize(pTy) * kBitsPerByte, ty); - SelectCopy(*res, pTy, *args[i], pTy); - srcOpnds->PushOpnd(*res); - } else { - uint32 pSize = GetPrimTypeSize(pTy); - Operand &memOpd = CreateMemOpnd(RSP, offsets[i], pSize); - GetCurBB()->AppendInsn(GetCG()->BuildInstruction(PickStInsn(pSize * kBitsPerByte, pTy), - *args[i], memOpd)); - } - } - /* Load x8 if 1st arg is for agg return */ - if (isArgReturn) { - AArch64reg reg = static_cast(R8); - RegOperand *res = &GetOrCreatePhysicalRegisterOperand(reg, - GetPrimTypeSize(PTY_a64) * kBitsPerByte, - kRegTyInt); - SelectCopy(*res, PTY_a64, *args[0], PTY_a64); - srcOpnds->PushOpnd(*res); - } - ResetLmbcArgInfo(); /* reset */ - ResetLmbcArgsInRegs(); - ResetLmbcTotalArgs(); -} - void AArch64CGFunc::SelectCall(CallNode &callNode) { MIRFunction *fn = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode.GetPUIdx()); MIRSymbol *fsym = GetFunction().GetLocalOrGlobalSymbol(fn->GetStIdx(), false); @@ -8529,18 +8479,15 @@ void AArch64CGFunc::SelectCall(CallNode &callNode) { ListOperand *srcOpnds = CreateListOpnd(*GetFuncScopeAllocator()); if (GetMirModule().GetFlavor() == MIRFlavor::kFlavorLmbc) { SetLmbcCallReturnType(nullptr); - bool largeStructRet = false; if (fn->IsFirstArgReturn()) { MIRPtrType *ptrTy = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx( fn->GetFormalDefVec()[0].formalTyIdx)); MIRType *sTy = GlobalTables::GetTypeTable().GetTypeFromTyIdx(ptrTy->GetPointedTyIdx()); - largeStructRet = sTy->GetSize() > k16ByteSize; SetLmbcCallReturnType(sTy); } else { MIRType *ty = fn->GetReturnType(); SetLmbcCallReturnType(ty); } - LmbcSelectParmList(srcOpnds, largeStructRet); } bool callNative = false; if ((fsym->GetName() == "MCC_CallFastNative") || (fsym->GetName() == "MCC_CallFastNativeExt") || diff --git a/src/mapleall/maple_me/include/pme_emit.h b/src/mapleall/maple_me/include/pme_emit.h index 283be8763c..1a192138e6 100644 --- a/src/mapleall/maple_me/include/pme_emit.h +++ b/src/mapleall/maple_me/include/pme_emit.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_function.h b/src/mapleall/maple_me/include/pme_function.h index 46e4d97c74..c5d711b455 100644 --- a/src/mapleall/maple_me/include/pme_function.h +++ b/src/mapleall/maple_me/include/pme_function.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_mir_extension.h b/src/mapleall/maple_me/include/pme_mir_extension.h index 14dfe1b68a..4b80f60f18 100644 --- a/src/mapleall/maple_me/include/pme_mir_extension.h +++ b/src/mapleall/maple_me/include/pme_mir_extension.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2020] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2020] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/pme_mir_lower.h b/src/mapleall/maple_me/include/pme_mir_lower.h index c023281ddc..4f16553c67 100644 --- a/src/mapleall/maple_me/include/pme_mir_lower.h +++ b/src/mapleall/maple_me/include/pme_mir_lower.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/me_phase_manager.cpp b/src/mapleall/maple_me/src/me_phase_manager.cpp index 78257e38b2..edeb1539da 100644 --- a/src/mapleall/maple_me/src/me_phase_manager.cpp +++ b/src/mapleall/maple_me/src/me_phase_manager.cpp @@ -150,7 +150,7 @@ bool MeFuncPM::PhaseRun(maple::MIRModule &m) { continue; } if (!IsQuiet()) { - LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " > [" << i - 1 << "]\n"; + LogInfo::MapleLogger() << ">>>> Generating LMBC for Function < " << func->GetName() << " >\n"; } m.SetCurFunction(func); cgLower.LowerFunc(*func); diff --git a/src/mapleall/maple_me/src/pme_emit.cpp b/src/mapleall/maple_me/src/pme_emit.cpp index 5f5b2496e7..098cedf111 100755 --- a/src/mapleall/maple_me/src/pme_emit.cpp +++ b/src/mapleall/maple_me/src/pme_emit.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp index 5776b8addf..e2a45d62d4 100644 --- a/src/mapleall/maple_me/src/pme_mir_lower.cpp +++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. -- Gitee From 328e586cf7e2140b9764b2cf2457a21b1a0c2609 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Wed, 6 Jul 2022 17:53:27 -0700 Subject: [PATCH 12/17] Fixed bug in exporting MIRAddrofConst for local symbols --- src/mapleall/maple_me/include/lfo_dep_test.h | 2 +- src/mapleall/maple_me/include/lfo_inject_iv.h | 4 ++-- src/mapleall/maple_me/include/lfo_iv_canon.h | 2 +- src/mapleall/maple_me/include/lfo_unroll.h | 2 +- src/mapleall/maple_me/src/lfo_dep_test.cpp | 2 +- src/mapleall/maple_me/src/lfo_inject_iv.cpp | 2 +- src/mapleall/maple_me/src/lfo_iv_canon.cpp | 2 +- src/mapleall/maple_me/src/lfo_unroll.cpp | 2 +- 8 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mapleall/maple_me/include/lfo_dep_test.h b/src/mapleall/maple_me/include/lfo_dep_test.h index e52c6ed9f2..38f5e94166 100644 --- a/src/mapleall/maple_me/include/lfo_dep_test.h +++ b/src/mapleall/maple_me/include/lfo_dep_test.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/lfo_inject_iv.h b/src/mapleall/maple_me/include/lfo_inject_iv.h index 415d186cdc..aa8241a12b 100644 --- a/src/mapleall/maple_me/include/lfo_inject_iv.h +++ b/src/mapleall/maple_me/include/lfo_inject_iv.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. @@ -21,4 +21,4 @@ namespace maple { /* emit ir to specified file */ MAPLE_FUNC_PHASE_DECLARE(MELfoInjectIV, MeFunction) } // namespace maple -#endif // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H \ No newline at end of file +#endif // MAPLE_ME_INCLUDE_LFO_INJECT_IV_H diff --git a/src/mapleall/maple_me/include/lfo_iv_canon.h b/src/mapleall/maple_me/include/lfo_iv_canon.h index 7033e54be2..8a83f5a242 100644 --- a/src/mapleall/maple_me/include/lfo_iv_canon.h +++ b/src/mapleall/maple_me/include/lfo_iv_canon.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/include/lfo_unroll.h b/src/mapleall/maple_me/include/lfo_unroll.h index 9147d40161..d72da9d8ab 100644 --- a/src/mapleall/maple_me/include/lfo_unroll.h +++ b/src/mapleall/maple_me/include/lfo_unroll.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_dep_test.cpp b/src/mapleall/maple_me/src/lfo_dep_test.cpp index 6ede310138..10c3e03822 100644 --- a/src/mapleall/maple_me/src/lfo_dep_test.cpp +++ b/src/mapleall/maple_me/src/lfo_dep_test.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_me/src/lfo_inject_iv.cpp b/src/mapleall/maple_me/src/lfo_inject_iv.cpp index ed6c5b335d..9c8c7a583c 100644 --- a/src/mapleall/maple_me/src/lfo_inject_iv.cpp +++ b/src/mapleall/maple_me/src/lfo_inject_iv.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_iv_canon.cpp b/src/mapleall/maple_me/src/lfo_iv_canon.cpp index 6746de2904..cb8540ef5b 100644 --- a/src/mapleall/maple_me/src/lfo_iv_canon.cpp +++ b/src/mapleall/maple_me/src/lfo_iv_canon.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co., Ltd. All rights reserved. * * OpenArkCompiler is licensed under the Mulan Permissive Software License v2. * You can use this software according to the terms and conditions of the MulanPSL - 2.0. diff --git a/src/mapleall/maple_me/src/lfo_unroll.cpp b/src/mapleall/maple_me/src/lfo_unroll.cpp index 6542deff58..769979968e 100644 --- a/src/mapleall/maple_me/src/lfo_unroll.cpp +++ b/src/mapleall/maple_me/src/lfo_unroll.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. -- Gitee From 5438ac6266893130fc3f78042f80070ccd0ddb76 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Thu, 7 Jul 2022 22:28:10 -0700 Subject: [PATCH 13/17] Added support of ireadfpoff as operand of asm stmt --- .../maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 49f9a0b96d..e21c01f3d7 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1256,6 +1256,18 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_ireadfpoff: { + IreadFPoffNode *ireadfpoff = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIreadfpoff(node, *ireadfpoff); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = ireadfpoff->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_add: { BinaryNode *addNode = static_cast(node.Opnd(i)); Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); -- Gitee From 1de74eff93108cffc58b494c4a053636a53613a5 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Fri, 8 Jul 2022 21:21:35 -0700 Subject: [PATCH 14/17] Made lmbc lower operands of asm like call operands with no prototypes In SelectAsm(), handle iread as operands --- src/mapleall/maple_be/include/cg/cg_ssa_pre.h | 2 +- src/mapleall/maple_be/include/cg/cg_ssu_pre.h | 2 +- .../src/cg/aarch64/aarch64_cgfunc.cpp | 14 ++++++++++- src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp | 2 +- src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp | 2 +- src/mapleall/maple_me/src/lmbc_lower.cpp | 23 +++++++++++-------- 6 files changed, 30 insertions(+), 15 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h index 5bb2fe937f..261b2c642a 100644 --- a/src/mapleall/maple_be/include/cg/cg_ssa_pre.h +++ b/src/mapleall/maple_be/include/cg/cg_ssa_pre.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2022] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h index 4f88f4a3c6..516e6f2d15 100644 --- a/src/mapleall/maple_be/include/cg/cg_ssu_pre.h +++ b/src/mapleall/maple_be/include/cg/cg_ssu_pre.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index e21c01f3d7..92f66e267e 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1268,6 +1268,18 @@ void AArch64CGFunc::SelectAsm(AsmNode &node) { } break; } + case OP_iread: { + IreadNode *iread = static_cast(node.Opnd(i)); + Operand *inOpnd = SelectIread(node, *iread); + listInputOpnd->PushOpnd(static_cast(*inOpnd)); + PrimType pType = iread->GetPrimType(); + listInRegPrefix->stringList.push_back( + static_cast(&CreateStringOperand(GetRegPrefixFromPrimType(pType, inOpnd->GetSize(), str)))); + if (isOutputTempNode) { + rPlusOpnd.emplace_back(std::make_pair(inOpnd, pType)); + } + break; + } case OP_add: { BinaryNode *addNode = static_cast(node.Opnd(i)); Operand *inOpnd = SelectAdd(*addNode, *HandleExpr(*addNode, *addNode->Opnd(0)), *HandleExpr(*addNode, *addNode->Opnd(1)), node); @@ -3251,7 +3263,7 @@ Operand *AArch64CGFunc::SelectIread(const BaseNode &parent, IreadNode &expr, if (pointedType->IsStructType()) { MIRStructType *structType = static_cast(pointedType); /* size << 3, that is size * 8, change bytes to bits */ - bitSize = structType->GetSize() << 3; + bitSize = std::min(structType->GetSize(), (size_t)kSizeOfPtr) << 3; } else { bitSize = GetPrimTypeBitSize(destType); } diff --git a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp index 70db43dc23..30e92d3841 100644 --- a/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp +++ b/src/mapleall/maple_be/src/cg/cg_ssa_pre.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2022] Futureweiwei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp index 5c3b1a6175..65e5529a8e 100644 --- a/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp +++ b/src/mapleall/maple_be/src/cg/cg_ssu_pre.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2021] Futurewei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under Mulan PSL v2. * You can use this software according to the terms and conditions of the Mulan PSL v2. diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index 9341b2d59f..c76f26fc65 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -411,6 +411,7 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { } break; } + case OP_asm: case OP_call: case OP_icallproto: { for (size_t i = 0; i < stmt->NumOpnds(); ++i) { @@ -418,16 +419,18 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); } else { bool paramInPrototype = false; - MIRFuncType *funcType = nullptr; - if (stmt->GetOpCode() == OP_icallproto) { - IcallNode *icallproto = static_cast(stmt); - funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); - paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); - } else { - CallNode *callNode = static_cast(stmt); - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); - funcType = calleeFunc->GetMIRFuncType(); - paramInPrototype = i < funcType->GetParamTypeList().size(); + if (stmt->GetOpCode() != OP_asm) { + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } } if (paramInPrototype) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); -- Gitee From 3721b0a3a987521539c4c19f0a5ce6e173323d42 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Sun, 10 Jul 2022 23:58:18 -0700 Subject: [PATCH 15/17] SelectParmListIreadLargeAggregate() should do nothing if aggegate has 0 size --- src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 92f66e267e..a4bc371b5f 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -7528,6 +7528,9 @@ void AArch64CGFunc::SelectParmListIreadLargeAggregate(const IreadNode &iread, MI void AArch64CGFunc::CreateCallStructParamPassByStack(int32 symSize, const MIRSymbol *sym, RegOperand *addrOpnd, int32 baseOffset) { + if (symSize == 0) { + return; + } MemOperand *ldMopnd = nullptr; MemOperand *stMopnd = nullptr; uint32 numRegNeeded = (static_cast(symSize) <= k8ByteSize) ? kOneRegister : kTwoRegister; -- Gitee From 0ace5f2324017b09bfec5db71b654834b1bab61a Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Wed, 13 Jul 2022 21:14:40 -0700 Subject: [PATCH 16/17] Defined LMBCLowerer::LowerCall() to wrap the relevant code out from LowerBlock() --- src/mapleall/maple_me/include/lmbc_lower.h | 1 + src/mapleall/maple_me/src/lmbc_lower.cpp | 94 +++++++++++----------- 2 files changed, 50 insertions(+), 45 deletions(-) diff --git a/src/mapleall/maple_me/include/lmbc_lower.h b/src/mapleall/maple_me/include/lmbc_lower.h index 0c86ad6602..385ac8cd4e 100644 --- a/src/mapleall/maple_me/include/lmbc_lower.h +++ b/src/mapleall/maple_me/include/lmbc_lower.h @@ -40,6 +40,7 @@ class LMBCLowerer { void LowerIassign(IassignNode *, BlockNode *); void LowerAggIassign(IassignNode *, MIRType *type, int32 offset, BlockNode *); void LowerReturn(NaryStmtNode *retNode, BlockNode *newblk); + void LowerCall(NaryStmtNode *stmt, BlockNode *newblk); BlockNode *LowerBlock(BlockNode *); void LowerFunction(); diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index c76f26fc65..3ed8b8b4d6 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -375,6 +375,54 @@ void LMBCLowerer::LowerReturn(NaryStmtNode *retNode, BlockNode *newblk) { newblk->AddStatement(retNode); } +void LMBCLowerer::LowerCall(NaryStmtNode *stmt, BlockNode *newblk) { + for (size_t i = 0; i < stmt->NumOpnds(); ++i) { + if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { + bool paramInPrototype = false; + if (stmt->GetOpCode() != OP_asm) { + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); + } + } + if (paramInPrototype) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + } else { // lower to iread so the type can be provided + if (stmt->Opnd(i)->GetOpCode() == OP_iread) { + IreadNode *iread = static_cast(stmt->Opnd(i)); + iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); + } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { + AddrofNode *addrof = static_cast(stmt->Opnd(i)); + FieldID fid = addrof->GetFieldID(); + addrof->SetOpCode(OP_addrof); + addrof->SetPrimType(GetExactPtrPrimType()); + addrof->SetFieldID(0); + MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); + MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); + ptrType.SetTypeAttrs(symbol->GetAttrs()); + TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); + if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { + MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); + becommon->UpdateTypeTable(*newType); + } + IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); + stmt->SetOpnd(newIread, i); + } + } + } + } + newblk->AddStatement(stmt); +} + BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { BlockNode *newblk = mirModule->CurFuncCodeMemPool()->New(); if (!block->GetFirst()) { @@ -414,51 +462,7 @@ BlockNode *LMBCLowerer::LowerBlock(BlockNode *block) { case OP_asm: case OP_call: case OP_icallproto: { - for (size_t i = 0; i < stmt->NumOpnds(); ++i) { - if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { - stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { - bool paramInPrototype = false; - if (stmt->GetOpCode() != OP_asm) { - MIRFuncType *funcType = nullptr; - if (stmt->GetOpCode() == OP_icallproto) { - IcallNode *icallproto = static_cast(stmt); - funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); - paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); - } else { - CallNode *callNode = static_cast(stmt); - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); - funcType = calleeFunc->GetMIRFuncType(); - paramInPrototype = i < funcType->GetParamTypeList().size(); - } - } - if (paramInPrototype) { - stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { // lower to iread so the type can be provided - if (stmt->Opnd(i)->GetOpCode() == OP_iread) { - IreadNode *iread = static_cast(stmt->Opnd(i)); - iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); - } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { - AddrofNode *addrof = static_cast(stmt->Opnd(i)); - FieldID fid = addrof->GetFieldID(); - addrof->SetOpCode(OP_addrof); - addrof->SetPrimType(GetExactPtrPrimType()); - addrof->SetFieldID(0); - MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); - MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); - ptrType.SetTypeAttrs(symbol->GetAttrs()); - TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); - if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { - MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); - becommon->UpdateTypeTable(*newType); - } - IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); - stmt->SetOpnd(newIread, i); - } - } - } - } - newblk->AddStatement(stmt); + LowerCall(static_cast(stmt), newblk); break; } default: { -- Gitee From 372bdba4dcfb679859ce7c25f614752ba7fe3a83 Mon Sep 17 00:00:00 2001 From: Fred Chow Date: Tue, 19 Jul 2022 21:22:10 -0700 Subject: [PATCH 17/17] Re-code LMBCLowerer::LowerCall() to remove 2 levels of nested scopes --- src/mapleall/maple_me/src/lmbc_lower.cpp | 75 ++++++++++++------------ 1 file changed, 38 insertions(+), 37 deletions(-) diff --git a/src/mapleall/maple_me/src/lmbc_lower.cpp b/src/mapleall/maple_me/src/lmbc_lower.cpp index 3ed8b8b4d6..7c37401581 100644 --- a/src/mapleall/maple_me/src/lmbc_lower.cpp +++ b/src/mapleall/maple_me/src/lmbc_lower.cpp @@ -379,45 +379,46 @@ void LMBCLowerer::LowerCall(NaryStmtNode *stmt, BlockNode *newblk) { for (size_t i = 0; i < stmt->NumOpnds(); ++i) { if (stmt->Opnd(i)->GetPrimType() != PTY_agg) { stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { - bool paramInPrototype = false; - if (stmt->GetOpCode() != OP_asm) { - MIRFuncType *funcType = nullptr; - if (stmt->GetOpCode() == OP_icallproto) { - IcallNode *icallproto = static_cast(stmt); - funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); - paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); - } else { - CallNode *callNode = static_cast(stmt); - MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); - funcType = calleeFunc->GetMIRFuncType(); - paramInPrototype = i < funcType->GetParamTypeList().size(); - } + continue; + } + bool paramInPrototype = false; + if (stmt->GetOpCode() != OP_asm) { + MIRFuncType *funcType = nullptr; + if (stmt->GetOpCode() == OP_icallproto) { + IcallNode *icallproto = static_cast(stmt); + funcType = static_cast(GlobalTables::GetTypeTable().GetTypeFromTyIdx(icallproto->GetRetTyIdx())); + paramInPrototype = (i-1) < funcType->GetParamTypeList().size(); + } else { + CallNode *callNode = static_cast(stmt); + MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode->GetPUIdx()); + funcType = calleeFunc->GetMIRFuncType(); + paramInPrototype = i < funcType->GetParamTypeList().size(); } - if (paramInPrototype) { - stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); - } else { // lower to iread so the type can be provided - if (stmt->Opnd(i)->GetOpCode() == OP_iread) { - IreadNode *iread = static_cast(stmt->Opnd(i)); - iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); - } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { - AddrofNode *addrof = static_cast(stmt->Opnd(i)); - FieldID fid = addrof->GetFieldID(); - addrof->SetOpCode(OP_addrof); - addrof->SetPrimType(GetExactPtrPrimType()); - addrof->SetFieldID(0); - MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); - MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); - ptrType.SetTypeAttrs(symbol->GetAttrs()); - TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); - if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { - MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); - becommon->UpdateTypeTable(*newType); - } - IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); - stmt->SetOpnd(newIread, i); - } + } + if (paramInPrototype) { + stmt->SetOpnd(LowerExpr(stmt->Opnd(i)), i); + continue; + } + // lower to iread so the type can be provided + if (stmt->Opnd(i)->GetOpCode() == OP_iread) { + IreadNode *iread = static_cast(stmt->Opnd(i)); + iread->SetOpnd(LowerExpr(iread->Opnd(0)), 0); + } else if (stmt->Opnd(i)->GetOpCode() == OP_dread) { + AddrofNode *addrof = static_cast(stmt->Opnd(i)); + FieldID fid = addrof->GetFieldID(); + addrof->SetOpCode(OP_addrof); + addrof->SetPrimType(GetExactPtrPrimType()); + addrof->SetFieldID(0); + MIRSymbol *symbol = func->GetLocalOrGlobalSymbol(addrof->GetStIdx()); + MIRPtrType ptrType(symbol->GetTyIdx(), GetExactPtrPrimType()); + ptrType.SetTypeAttrs(symbol->GetAttrs()); + TyIdx addrTyIdx = GlobalTables::GetTypeTable().GetOrCreateMIRType(&ptrType); + if (addrTyIdx == becommon->GetSizeOfTypeSizeTable()) { + MIRType *newType = GlobalTables::GetTypeTable().GetTypeFromTyIdx(addrTyIdx); + becommon->UpdateTypeTable(*newType); } + IreadNode *newIread = mirModule->CurFuncCodeMemPool()->New(OP_iread, PTY_agg, addrTyIdx, fid, LowerExpr(addrof)); + stmt->SetOpnd(newIread, i); } } newblk->AddStatement(stmt); -- Gitee