diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp
index c4d04bfefc5030d9d4bbb2e93e57225f903fc0ea..e5c5cdbedb6cc185fdd0b955c5c78d9cf621f459 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp
@@ -1418,16 +1418,11 @@ void AArch64GenProEpilog::GenerateProlog(BB &bb) {
 
   bool hasProEpilogue = cgFunc.GetHasProEpilogue();
   if (!hasProEpilogue) {
-    if (!(currCG->GetMIRModule()->IsCModule() &&
-          currCG->GetCGOptions().WithLoc() &&
-          currCG->GetMIRModule()->IsWithDbgInfo())) {
-      return;
-    }
+    return;
   }
 
   // insert .loc for function
-  if (currCG->GetCGOptions().WithLoc() &&
-      (!currCG->GetMIRModule()->IsCModule() || currCG->GetMIRModule()->IsWithDbgInfo())) {
+  if (currCG->GetCGOptions().WithLoc() && (!currCG->GetMIRModule()->IsCModule())) {
     MIRFunction *func = &cgFunc.GetFunction();
     MIRSymbol *fSym = GlobalTables::GetGsymTable().GetSymbolFromStidx(func->GetStIdx().Idx());
     if (currCG->GetCGOptions().WithSrc()) {
@@ -1455,12 +1450,6 @@ void AArch64GenProEpilog::GenerateProlog(BB &bb) {
       Insn &loc = currCG->BuildInstruction<mpldbg::DbgInsn>(mpldbg::OP_DBG_loc, *o0, *o1, *o2);
       cgFunc.GetCurBB()->AppendInsn(loc);
     }
-    if (!hasProEpilogue) {
-      bb.InsertAtBeginning(*aarchCGFunc.GetDummyBB());
-      cgFunc.SetCurBB(*formerCurBB);
-      aarchCGFunc.GetDummyBB()->SetIsProEpilog(false);
-      return;
-    }
   }
 
   const MapleVector<AArch64reg> &regsToSave = (!CGOptions::DoRegSavesOpt()) ?
diff --git a/src/mapleall/maple_ir/src/debug_info.cpp b/src/mapleall/maple_ir/src/debug_info.cpp
index 2d2c6d3c4cfc5ad47616284d06844f4c615d8f20..2da205bcf505035324eb1288ed3419c90546e05f 100644
--- a/src/mapleall/maple_ir/src/debug_info.cpp
+++ b/src/mapleall/maple_ir/src/debug_info.cpp
@@ -676,6 +676,11 @@ DBGDie *DebugInfo::GetOrCreateFuncDeclDie(MIRFunction *func) {
     die->AddSubVec(param);
   }
 
+  if (func->IsVarargs()) {
+    DBGDie *varargDie = module->GetMemPool()->New<DBGDie>(module, DW_TAG_unspecified_parameters);
+    die->AddSubVec(varargDie);
+  }
+
   PopParentDie();
 
   return die;
diff --git a/src/mapleall/maple_me/src/me_merge_stmts.cpp b/src/mapleall/maple_me/src/me_merge_stmts.cpp
index 184b7e30063202fb47967fa878105f4ccfc14fd1..f29226ea7c9617f69ad48d1d045a9148d9b546c9 100644
--- a/src/mapleall/maple_me/src/me_merge_stmts.cpp
+++ b/src/mapleall/maple_me/src/me_merge_stmts.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2022] Futurewei Technologies, Inc. All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/mpl2mpl/include/gen_profile.h b/src/mapleall/mpl2mpl/include/gen_profile.h
index ed486e01b5a0a7e188cb7d48e9db88fd0c848994..3f9184a0fe4ad0a497320a0432a0d3486041c8d1 100644
--- a/src/mapleall/mpl2mpl/include/gen_profile.h
+++ b/src/mapleall/mpl2mpl/include/gen_profile.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2020-2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2022] Futurewei Technologies, Inc. All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.
diff --git a/src/mapleall/mpl2mpl/src/gen_profile.cpp b/src/mapleall/mpl2mpl/src/gen_profile.cpp
index 8147310bd83882b6f4dfd2d269222f2cb76e35ca..ba613eacd7a1187a7e74a39d9ea71f882327fbc1 100644
--- a/src/mapleall/mpl2mpl/src/gen_profile.cpp
+++ b/src/mapleall/mpl2mpl/src/gen_profile.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) [2021] Huawei Technologies Co.,Ltd.All rights reserved.
+ * Copyright (c) [2022] Futurewei Technologies, Inc. All rights reserved.
  *
  * OpenArkCompiler is licensed under Mulan PSL v2.
  * You can use this software according to the terms and conditions of the Mulan PSL v2.