diff --git a/src/mapleall/maple_ir/src/mir_nodes.cpp b/src/mapleall/maple_ir/src/mir_nodes.cpp
index 7e12b75e3e3f4f68f5446963cf474ea98a61c282..cc1a665a4eb5c042f24a238b55fdeac753609d67 100644
--- a/src/mapleall/maple_ir/src/mir_nodes.cpp
+++ b/src/mapleall/maple_ir/src/mir_nodes.cpp
@@ -335,6 +335,7 @@ BlockNode *BlockNode::CloneTreeWithFreqs(MapleAllocator &allocator,
     }
     ASSERT(newStmt != nullptr, "null ptr check");
     newStmt->SetSrcPos(stmt.GetSrcPos());
+    newStmt->SetMeStmtID(stmt.GetMeStmtID());
     newStmt->SetPrev(nullptr);
     newStmt->SetNext(nullptr);
     nnode->AddStatement(newStmt);
diff --git a/src/mapleall/maple_me/include/me_cfg.h b/src/mapleall/maple_me/include/me_cfg.h
index eee61dc7ebbf90fff25d08cc8164cc8ac67d12b4..380f5a2a58b042b9f3702dd2da3e3aab72dd18b8 100644
--- a/src/mapleall/maple_me/include/me_cfg.h
+++ b/src/mapleall/maple_me/include/me_cfg.h
@@ -361,5 +361,7 @@ MeCFG *theCFG = nullptr;
 MAPLE_MODULE_PHASE_DECLARE_END
 MAPLE_FUNC_PHASE_DECLARE_BEGIN(MECfgVerifyFrequency, MeFunction)
 MAPLE_FUNC_PHASE_DECLARE_END
+
+void GdbDumpToFile(MeCFG *cfg, bool dumpEdgeFreq);
 }  // namespace maple
 #endif  // MAPLE_ME_INCLUDE_ME_CFG_H
diff --git a/src/mapleall/maple_me/src/me_cfg.cpp b/src/mapleall/maple_me/src/me_cfg.cpp
index 52957520ee9d9bd191c2b044f6e8d346d1b202ac..536640e791261dffd9b740139fe87aac41ef689f 100644
--- a/src/mapleall/maple_me/src/me_cfg.cpp
+++ b/src/mapleall/maple_me/src/me_cfg.cpp
@@ -2027,11 +2027,10 @@ int MeCFG::VerifyBBFreq(bool checkFatal) {
     }
     // check case 1: entry count is zero, internal bb has frequency value > 0
     if (entryIsZero && bb->GetFrequency() > 0) {
+      LogInfo::MapleLogger() << func.GetName() << ": entry freq is 0 but freq of BB " << bb->GetBBId() << " is " << bb->GetFrequency() << std::endl;
       if (checkFatal) {
-        LogInfo::MapleLogger() << func.GetName() << "wrong BB " << bb->GetBBId() << std::endl;
-        CHECK_FATAL(false, "VerifyBBFreq: function entryFreq is zero but internal bb frequency > 0");
+        CHECK_FATAL(false, "VerifyBBFreq: verification fails");
       } else {
-        ClearFuncFreqInfo();
         return 1;
       }
     }
@@ -2131,4 +2130,10 @@ bool MECfgVerifyFrequency::PhaseRun(MeFunction &f) {
 #endif
   return false;
 }
+
+void GdbDumpToFile(MeCFG *cfg, bool dumpEdgeFreq) {
+  std::string fileName = "cfgfromgdb";
+  cfg->DumpToFile(fileName, false, dumpEdgeFreq, nullptr);
+}
+
 }  // namespace maple
diff --git a/src/mapleall/maple_me/src/optimizeCFG.cpp b/src/mapleall/maple_me/src/optimizeCFG.cpp
index 4e47f5e40f42c85ad21cc47ff932cb0f0e2f08be..0526e05e0ca167b65baed5d5c88199197d890359 100644
--- a/src/mapleall/maple_me/src/optimizeCFG.cpp
+++ b/src/mapleall/maple_me/src/optimizeCFG.cpp
@@ -2110,9 +2110,10 @@ bool OptimizeBB::MergeGotoBBToPred(BB *succ, BB *pred) {
   }
   if (cfg->UpdateCFGFreq()) {
     uint64 succFreq = succ->GetFrequency();
-    ASSERT(succFreq >= removedFreq, "sanity check");
-    succ->SetFrequency(succFreq - removedFreq);
-    succ->SetSuccFreq(0, succ->GetFrequency());
+    if (succFreq >= removedFreq) {
+      succ->SetFrequency(succFreq - removedFreq);
+      succ->SetSuccFreq(0, succ->GetFrequency());
+    }
   }
   DEBUG_LOG() << "Merge Uncond BB" << LOG_BBID(succ) << " to its pred BB" << LOG_BBID(pred) << ": BB" << LOG_BBID(pred)
               << "->BB" << LOG_BBID(succ) << "(merged)->BB" << LOG_BBID(newTarget) << "\n";
diff --git a/src/mapleall/maple_me/src/seqvec.cpp b/src/mapleall/maple_me/src/seqvec.cpp
index da70e8a3e4fbbcad51f78fe16ddb08476e2db844..d9788f6c0a7442c68ce60554606682396d11a0af 100644
--- a/src/mapleall/maple_me/src/seqvec.cpp
+++ b/src/mapleall/maple_me/src/seqvec.cpp
@@ -571,6 +571,9 @@ void SeqVectorize::MergeIassigns(MapleVector<IassignNode *> &cands) {
       RegreadNode *regreadNode = codeMP->New<RegreadNode>(vecType->GetPrimType(), dupScalarStmt->GetRegIdx());
       blockParent->InsertBefore(iassign, dupScalarStmt);
       iassign->SetRHS(regreadNode);
+      if (Options::profileUse && mirFunc->GetFuncProfData()) {
+        mirFunc->GetFuncProfData()->CopyStmtFreq(dupScalarStmt->GetStmtID(), iassign->GetStmtID());
+      }
     } else if (iassign->GetRHS()->GetOpCode() == OP_iread) {
       // rhs is iread
       IreadNode *ireadnode = static_cast<IreadNode *>(iassign->GetRHS());