diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp
index 01be7f0a07a03e9caf1264c2800531ffc0ad2ad0..ef33447b6ef6734fb16171b2f4f102b67c5fb238 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_offset_adjust.cpp
@@ -39,27 +39,28 @@ void AArch64FPLROffsetAdjustment::AdjustmentOffsetForOpnd(Insn &insn, AArch64CGF
         stackBaseOpnd = true;
       }
     } else if (opnd.IsMemoryAccessOperand()) {
-      auto &memOpnd = static_cast<MemOperand&>(opnd);
-      if (((memOpnd.GetAddrMode() == MemOperand::kAddrModeBOi) ||
-           (memOpnd.GetAddrMode() == MemOperand::kAddrModeBOrX)) &&
-          memOpnd.GetBaseRegister() != nullptr) {
-        if (memOpnd.GetBaseRegister()->IsOfVary()) {
-          memOpnd.SetBaseRegister(static_cast<RegOperand&>(aarchCGFunc.GetOrCreateStackBaseRegOperand()));
+      auto *memOpnd = &static_cast<MemOperand&>(opnd);
+      if (((memOpnd->GetAddrMode() == MemOperand::kAddrModeBOi) ||
+           (memOpnd->GetAddrMode() == MemOperand::kAddrModeBOrX)) &&
+          memOpnd->GetBaseRegister() != nullptr) {
+        if (memOpnd->GetBaseRegister()->IsOfVary()) {
+          memOpnd->SetBaseRegister(static_cast<RegOperand&>(aarchCGFunc.GetOrCreateStackBaseRegOperand()));
         }
-        RegOperand *memBaseReg = memOpnd.GetBaseRegister();
+        RegOperand *memBaseReg = memOpnd->GetBaseRegister();
         if (memBaseReg->GetRegisterNumber() == RFP) {
           RegOperand &newBaseOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(stackBaseReg, k64BitSize, kRegTyInt);
           MemOperand &newMemOpnd = aarchCGFunc.GetOrCreateMemOpnd(
-              memOpnd.GetAddrMode(), memOpnd.GetSize(), &newBaseOpnd, memOpnd.GetIndexRegister(),
-              memOpnd.GetOffsetImmediate(), memOpnd.GetSymbol());
+              memOpnd->GetAddrMode(), memOpnd->GetSize(), &newBaseOpnd, memOpnd->GetIndexRegister(),
+              memOpnd->GetOffsetImmediate(), memOpnd->GetSymbol());
           insn.SetOperand(i, newMemOpnd);
+          memOpnd = &newMemOpnd;
           stackBaseOpnd = true;
         }
       }
-      if ((memOpnd.GetAddrMode() != MemOperand::kAddrModeBOi) || !memOpnd.IsIntactIndexed()) {
+      if ((memOpnd->GetAddrMode() != MemOperand::kAddrModeBOi) || !memOpnd->IsIntactIndexed()) {
         continue;
       }
-      OfstOperand *ofstOpnd = memOpnd.GetOffsetImmediate();
+      OfstOperand *ofstOpnd = memOpnd->GetOffsetImmediate();
       if (ofstOpnd == nullptr) {
         continue;
       }
@@ -69,10 +70,10 @@ void AArch64FPLROffsetAdjustment::AdjustmentOffsetForOpnd(Insn &insn, AArch64CGF
         ofstOpnd->SetVary(kAdjustVary);
       }
       if (ofstOpnd->GetVary() == kAdjustVary || ofstOpnd->GetVary() == kNotVary) {
-        bool condition = aarchCGFunc.IsOperandImmValid(insn.GetMachineOpcode(), &memOpnd, i);
+        bool condition = aarchCGFunc.IsOperandImmValid(insn.GetMachineOpcode(), memOpnd, i);
         if (!condition) {
           MemOperand &newMemOpnd = aarchCGFunc.SplitOffsetWithAddInstruction(
-              memOpnd, memOpnd.GetSize(), static_cast<AArch64reg>(R16), false, &insn, insn.IsLoadStorePair());
+              *memOpnd, memOpnd->GetSize(), static_cast<AArch64reg>(R16), false, &insn, insn.IsLoadStorePair());
           insn.SetOperand(i, newMemOpnd);
         }
       }