diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 83850176ef5d8399db35a8762dee00c422135020..2b7abc903feb70930fff16b825d41d0b3837ac24 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -1876,7 +1876,7 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) { newLabelIdx = GetLabelIdx(*mirModule.CurFunction()); defaultLabel = mirBuilder->CreateStmtLabel(newLabelIdx); } - SwitchLowerer switchLowerer(mirModule, static_cast(*stmt), switchAllocator); + SwitchLowerer switchLowerer(mirModule, static_cast(*stmt), this, switchAllocator); BlockNode *blk = switchLowerer.LowerSwitch(newLabelIdx); if (blk->GetFirst() != nullptr && defaultLabel != nullptr && IsSwitchToRangeGoto(*blk)) { blk->AddStatement(defaultLabel); diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp index fdb427c437edac00a58ce717b1017bc4d883e334..988d9322167eaa724c77e1de6c4984253cd814a4 100644 --- a/src/mapleall/maple_me/src/pme_mir_lower.cpp +++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp @@ -121,7 +121,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { if (GetFuncProfData()) { GetFuncProfData()->CopyStmtFreq(evalstmt->GetStmtID(), ifstmt.GetStmtID()); } - } else if (elseempty && !GetFuncProfData()) { + } else if (elseempty && !Options::profileUse && !Options::profileGen) { // brfalse // // label @@ -158,7 +158,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { GetFuncProfData()->GetStmtFreq(ifstmt.GetThenPart()->GetStmtID()); GetFuncProfData()->SetStmtFreq(labstmt->GetStmtID(), freq); } - } else if (thenempty && !GetFuncProfData()) { + } else if (thenempty && !Options::profileUse && !Options::profileGen) { // brtrue // // label @@ -287,14 +287,16 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) { } ifInfo->endLabel = endlabelidx; } - if (GetFuncProfData()) { + if (Options::profileUse || Options::profileGen) { // generate extra label to avoid critical edge LabelIdx extraLabelIdx = mirFunc->GetLabelTab()->CreateLabelWithPrefix('x'); preMeFunc->SetIfLabelCreatedByPreMe(extraLabelIdx); LabelNode *extraLabelNode = mirbuilder->CreateStmtLabel(extraLabelIdx); blk->AddStatement(extraLabelNode); - // set stmtfreqs - GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID()); + if (GetFuncProfData()) { + // set stmtfreqs + GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID()); + } } return blk; } diff --git a/src/mapleall/mpl2mpl/src/inline.cpp b/src/mapleall/mpl2mpl/src/inline.cpp index d6c5a33d6c7d325f2a22079737b784f4d939be9a..d4de320b3b9d4fd9dfe8ef8675a810d1f20db363 100644 --- a/src/mapleall/mpl2mpl/src/inline.cpp +++ b/src/mapleall/mpl2mpl/src/inline.cpp @@ -531,7 +531,7 @@ void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bo CallInfo *callInfo = cgNode->GetCallInfo(callStmt); std::pair canInlineRet = InlineAnalyzer::CanInlineImpl({&func, callee}, callStmt, *cg, currInlineDepth, true); // earlyInline: true - bool canInline = canInlineRet.first; + bool canInline = canInlineRet.first && callStmt.GetEnclosingBlock(); InlineFailedCode failCode = canInlineRet.second; if (callInfo != nullptr) { // cache result to avoid recompute callInfo->SetInlineFailedCode(failCode);