From 0344f785d2071a19e9af3cca68309aa817fbd2e6 Mon Sep 17 00:00:00 2001
From: Fred Chow <fredchow@gitee.com>
Date: Fri, 18 Nov 2022 09:09:27 -0800
Subject: [PATCH] Fixed 3 more issues under PGO

---
 src/mapleall/maple_be/src/be/lower.cpp      |  2 +-
 src/mapleall/maple_me/src/pme_mir_lower.cpp | 12 +++++++-----
 src/mapleall/mpl2mpl/src/inline.cpp         |  2 +-
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp
index 83850176ef..2b7abc903f 100644
--- a/src/mapleall/maple_be/src/be/lower.cpp
+++ b/src/mapleall/maple_be/src/be/lower.cpp
@@ -1876,7 +1876,7 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) {
           newLabelIdx = GetLabelIdx(*mirModule.CurFunction());
           defaultLabel = mirBuilder->CreateStmtLabel(newLabelIdx);
         }
-        SwitchLowerer switchLowerer(mirModule, static_cast<SwitchNode&>(*stmt), switchAllocator);
+        SwitchLowerer switchLowerer(mirModule, static_cast<SwitchNode&>(*stmt), this, switchAllocator);
         BlockNode *blk = switchLowerer.LowerSwitch(newLabelIdx);
         if (blk->GetFirst() != nullptr && defaultLabel != nullptr && IsSwitchToRangeGoto(*blk)) {
           blk->AddStatement(defaultLabel);
diff --git a/src/mapleall/maple_me/src/pme_mir_lower.cpp b/src/mapleall/maple_me/src/pme_mir_lower.cpp
index fdb427c437..988d932216 100644
--- a/src/mapleall/maple_me/src/pme_mir_lower.cpp
+++ b/src/mapleall/maple_me/src/pme_mir_lower.cpp
@@ -121,7 +121,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) {
     if (GetFuncProfData()) {
       GetFuncProfData()->CopyStmtFreq(evalstmt->GetStmtID(), ifstmt.GetStmtID());
     }
-  } else if (elseempty && !GetFuncProfData()) {
+  } else if (elseempty && !Options::profileUse && !Options::profileGen) {
     // brfalse <cond> <endlabel>
     // <thenPart>
     // label <endlabel>
@@ -158,7 +158,7 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) {
                         GetFuncProfData()->GetStmtFreq(ifstmt.GetThenPart()->GetStmtID());
       GetFuncProfData()->SetStmtFreq(labstmt->GetStmtID(), freq);
     }
-  } else if (thenempty && !GetFuncProfData()) {
+  } else if (thenempty && !Options::profileUse && !Options::profileGen) {
     // brtrue <cond> <endlabel>
     // <elsePart>
     // label <endlabel>
@@ -287,14 +287,16 @@ BlockNode *PreMeMIRLower::LowerIfStmt(IfStmtNode &ifstmt, bool recursive) {
     }
     ifInfo->endLabel = endlabelidx;
   }
-  if (GetFuncProfData()) {
+  if (Options::profileUse || Options::profileGen) {
     // generate extra label to avoid critical edge
     LabelIdx extraLabelIdx = mirFunc->GetLabelTab()->CreateLabelWithPrefix('x');
     preMeFunc->SetIfLabelCreatedByPreMe(extraLabelIdx);
     LabelNode *extraLabelNode = mirbuilder->CreateStmtLabel(extraLabelIdx);
     blk->AddStatement(extraLabelNode);
-    // set stmtfreqs
-    GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID());
+    if (GetFuncProfData()) {
+      // set stmtfreqs
+      GetFuncProfData()->CopyStmtFreq(extraLabelNode->GetStmtID(), ifstmt.GetStmtID());
+    }
   }
   return blk;
 }
diff --git a/src/mapleall/mpl2mpl/src/inline.cpp b/src/mapleall/mpl2mpl/src/inline.cpp
index d6c5a33d6c..d4de320b3b 100644
--- a/src/mapleall/mpl2mpl/src/inline.cpp
+++ b/src/mapleall/mpl2mpl/src/inline.cpp
@@ -531,7 +531,7 @@ void MInline::InlineCallsBlockInternal(MIRFunction &func, BaseNode &baseNode, bo
   CallInfo *callInfo  = cgNode->GetCallInfo(callStmt);
   std::pair<bool, InlineFailedCode> canInlineRet =
       InlineAnalyzer::CanInlineImpl({&func, callee}, callStmt, *cg, currInlineDepth, true);  // earlyInline: true
-  bool canInline = canInlineRet.first;
+  bool canInline = canInlineRet.first && callStmt.GetEnclosingBlock();
   InlineFailedCode failCode = canInlineRet.second;
   if (callInfo != nullptr) {  // cache result to avoid recompute
     callInfo->SetInlineFailedCode(failCode);
-- 
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