diff --git a/src/bin/jbc2mpl b/src/bin/jbc2mpl
index 50a00fb9b0abb546644b318a510e1ec5c56f79a4..ca2d61716b6f8f33e01056c20f5b4da66abeecf2 100755
Binary files a/src/bin/jbc2mpl and b/src/bin/jbc2mpl differ
diff --git a/src/bin/maple b/src/bin/maple
index 4cb8c472a4f0cd07e05d33f42805871d914a30e6..3977848d0a0949d2db9d7aa95e2c44246378550c 100755
Binary files a/src/bin/maple and b/src/bin/maple differ
diff --git a/src/deplibs/libmplutil.a b/src/deplibs/libmplutil.a
index 036cac2e4ce9991d3dac424594267d650ecf8248..96fcc76e96ceec4aa2b0c811e16a26bf3e4f5b7b 100644
Binary files a/src/deplibs/libmplutil.a and b/src/deplibs/libmplutil.a differ
diff --git a/src/maple_be/include/cg/aarch64/aarch64_reg_alloc.h b/src/maple_be/include/cg/aarch64/aarch64_reg_alloc.h
index f7aea7606c8167a4aee3d0fb1357c1fc76ed3af8..17e04bb0457b64b30425a9883e0571f9edf298e9 100644
--- a/src/maple_be/include/cg/aarch64/aarch64_reg_alloc.h
+++ b/src/maple_be/include/cg/aarch64/aarch64_reg_alloc.h
@@ -29,7 +29,8 @@ class AArch64RegAllocator : public RegAllocator {
         liveReg(std::less<uint8>(), alloc.Adapter()),
         allocatedSet(std::less<Operand*>(), alloc.Adapter()),
         visitedBBs(alloc.Adapter()),
-        sortedBBs(alloc.Adapter()) {
+        sortedBBs(alloc.Adapter()),
+        rememberRegs(alloc.Adapter()) {
     for (int32 i = 0; i != kAllRegNum; i++) {
       availRegSet[i] = false;
     }
@@ -72,7 +73,7 @@ class AArch64RegAllocator : public RegAllocator {
   MapleSet<Operand*> allocatedSet;      /* already allocated */
   MapleVector<bool> visitedBBs;
   MapleVector<BB*> sortedBBs;
-  AArch64reg atomicStoreResultReg = kRinvalid;
+  MapleVector<AArch64reg> rememberRegs;
 };
 
 class DefaultO0RegAllocator : public AArch64RegAllocator {
diff --git a/src/maple_be/src/be/becommon.cpp b/src/maple_be/src/be/becommon.cpp
index e803b78d9a285d07238fc43f8e1cca5d867712ac..b7f1973f6c2a35c8b6f442a1d98a64395d544198 100644
--- a/src/maple_be/src/be/becommon.cpp
+++ b/src/maple_be/src/be/becommon.cpp
@@ -288,12 +288,6 @@ void BECommon::ComputeTypeSizesAligns(MIRType &ty, uint8 align) {
 
   switch (ty.GetKind()) {
     case kTypeScalar:
-#ifdef TARGARM32
-      SetTypeSize(tyIdx, GetPrimTypeSize(ty.GetPrimType()));
-      SetTypeAlign(tyIdx, GetPrimTypeSize(ty.GetPrimType()) > k4ByteSize ? k4ByteSize
-                                                                         : GetPrimTypeSize(ty.GetPrimType()));
-      break;
-#endif
     case kTypePointer:
     case kTypeBitField:
     case kTypeFunction:
diff --git a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
index 57619fac5c0e754ce9d80964418cc09ff404b124..d2b71d4aadeaeab70692265e613c6826523c82e2 100644
--- a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
+++ b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
@@ -3598,7 +3598,6 @@ Operand *AArch64CGFunc::SelectLazyLoad(Operand &opnd0, PrimType primType) {
   ASSERT(opnd0.IsRegister(), "wrong type.");
   RegOperand &resOpnd = CreateRegisterOperandOfType(primType);
   GetCurBB()->AppendInsn(GetCG()->BuildInstruction<AArch64Insn>(MOP_lazy_ldr, resOpnd, opnd0));
-  GetCurBB()->AppendInsn(GetCG()->BuildInstruction<AArch64Insn>(MOP_lazy_tail, resOpnd, opnd0));
   return &resOpnd;
 }
 
diff --git a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp
index f363eac3857aac82951ebf8948e3f5e3d6871a9d..e1f44fd1c2e5fb5a8317b02e8d206f0c450b0e3c 100644
--- a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp
+++ b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp
@@ -796,7 +796,8 @@ void GraphColorRegAllocator::ComputeLiveRangesForEachUseOperand(Insn &insn) {
       SetupLiveRangeByOp(opnd, insn, false, numUses);
     }
   }
-  if (numUses >= AArch64Abi::kNormalUseOperandNum) {
+  if (numUses >= AArch64Abi::kNormalUseOperandNum ||
+      static_cast<AArch64Insn&>(insn).GetMachineOpcode() == MOP_lazy_ldr) {
     needExtraSpillReg = true;
   }
 }
@@ -2752,6 +2753,9 @@ bool GraphColorRegAllocator::SetRegForSpill(LiveRange &lr, Insn &insn, uint32 sp
    */
     RegType regType = lr.GetRegType();
     regno_t spillReg = PickRegForSpill(usedRegMask, regType, spillIdx, needSpillLr);
+    if (static_cast<AArch64Insn&>(insn).GetMachineOpcode() == MOP_lazy_ldr && spillReg == R17) {
+      CHECK_FATAL(false, "register IP1(R17) may be changed when lazy_ldr");
+    }
     lr.SetAssignedRegNO(spillReg);
   }
   return needSpillLr;
@@ -2787,6 +2791,9 @@ RegOperand *GraphColorRegAllocator::GetReplaceOpndForLRA(Insn &insn, const Opera
      * else there will be conflict.
      */
     spillReg = PickRegForSpill(usedRegMask, regType, spillIdx, needSpillLr);
+    if (static_cast<AArch64Insn&>(insn).GetMachineOpcode() == MOP_lazy_ldr && spillReg == R17) {
+      CHECK_FATAL(false, "register IP1(R17) may be changed when lazy_ldr");
+    }
     bool isCalleeReg = AArch64Abi::IsCalleeSavedReg(static_cast<AArch64reg>(spillReg));
     if (isCalleeReg) {
       if (regType == kRegTyInt) {
@@ -3024,7 +3031,12 @@ void GraphColorRegAllocator::FinalizeRegisters() {
       }
       for (size_t i = 0; i < fInfo->GetDefOperandsSize(); ++i) {
         const Operand *opnd = fInfo->GetDefOperandsElem(i);
-        RegOperand *phyOpnd = GetReplaceOpnd(*insn, *opnd, defSpillIdx, usedRegMask, true);
+        RegOperand *phyOpnd = nullptr;
+        if (insn->IsSpecialIntrinsic()) {
+          phyOpnd = GetReplaceOpnd(*insn, *opnd, useSpillIdx, usedRegMask, true);
+        } else {
+          phyOpnd = GetReplaceOpnd(*insn, *opnd, defSpillIdx, usedRegMask, true);
+        }
         if (phyOpnd != nullptr) {
           insn->SetOperand(fInfo->GetDefIdxElem(i), *phyOpnd);
         }
diff --git a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp
index 181b7dba6588ba3dc83db1c0934fe8568f0d95ba..be41bcc1c0d1a967fb1af767d7b452ef8cdc2085 100644
--- a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp
+++ b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp
@@ -1146,6 +1146,7 @@ bool AArch64Insn::IsSpecialIntrinsic() const {
     case MOP_compare_and_swapI:
     case MOP_compare_and_swapL:
     case MOP_string_indexof:
+    case MOP_lazy_ldr:
     case MOP_get_and_setI:
     case MOP_get_and_setL: {
       return true;
diff --git a/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp b/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp
index 02fedbb2e8ea17372a112118f5ced704e5b0c56e..55fc0a9997c30d8c11548b67b1876d9b97447c71 100644
--- a/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp
+++ b/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp
@@ -537,8 +537,6 @@ bool DefaultO0RegAllocator::AllocateRegisters() {
       continue;
     }
 
-    bool isIntrinsicBB = (bb->GetKind() == BB::kBBIntrinsic);
-
     FOR_BB_INSNS_REV(insn, bb) {
       if (!insn->IsMachineInstruction()) {
         continue;
@@ -561,11 +559,10 @@ bool DefaultO0RegAllocator::AllocateRegisters() {
           /* free the live range of this register */
           auto &regOpnd = static_cast<RegOperand&>(opnd);
           SaveCalleeSavedReg(regOpnd);
-          if (isIntrinsicBB && insn->IsAtomicStore()) {
+          if (insn->IsAtomicStore() || insn->IsSpecialIntrinsic()) {
             /* remember the physical machine register assigned */
-            ASSERT(atomicStoreResultReg == kRinvalid, "not a valid register");
             regno_t regNO = regOpnd.GetRegisterNumber();
-            atomicStoreResultReg = static_cast<AArch64reg>(regOpnd.IsVirtualRegister() ? regMap[regNO] : regNO);
+            rememberRegs.push_back(static_cast<AArch64reg>(regOpnd.IsVirtualRegister() ? regMap[regNO] : regNO));
           } else if (!insn->IsCondDef()) {
             ReleaseReg(regOpnd);
           }
@@ -598,12 +595,12 @@ bool DefaultO0RegAllocator::AllocateRegisters() {
           insn->SetOperand(i, *srcOpnd);
         }
       }
-    }
-
-    /* hack. a better way to handle intrinsics? */
-    if (atomicStoreResultReg != kRinvalid) {
-      ReleaseReg(atomicStoreResultReg);
-      atomicStoreResultReg = kRinvalid;
+      /* hack. a better way to handle intrinsics? */
+      for (auto rememberReg : rememberRegs) {
+        ASSERT(rememberReg == kRinvalid, "not a valid register");
+        ReleaseReg(rememberReg);
+      }
+      rememberRegs.clear();
     }
   }
   return true;
diff --git a/src/maple_be/src/cg/cg.cpp b/src/maple_be/src/cg/cg.cpp
index ac6ca22dde335327934a6a9501fd04637335f9f2..b2261d73e90cd37be0c8e201bd1288f545b06b58 100644
--- a/src/maple_be/src/cg/cg.cpp
+++ b/src/maple_be/src/cg/cg.cpp
@@ -146,8 +146,8 @@ void CG::SetInstrumentationFunction(const std::string &name) {
   instrumentationFunction->SetSKind(kStFunc);
 }
 
-#define DBG_TRACE_ENTER mpl_dt_enter
-#define DBG_TRACE_EXIT mpl_dt_exit
+#define DBG_TRACE_ENTER MplDtEnter
+#define DBG_TRACE_EXIT MplDtExit
 #define XSTR(s) str(s)
 #define str(s) #s
 
@@ -163,7 +163,7 @@ void CG::DefineDebugTraceFunctions() {
   dbgTraceExit->SetSKind(kStFunc);
 
   dbgFuncProfile = GlobalTables::GetGsymTable().CreateSymbol(kScopeGlobal);
-  dbgFuncProfile->SetNameStrIdx(std::string("__" XSTR(mpl_func_profile) "__"));
+  dbgFuncProfile->SetNameStrIdx(std::string("__" XSTR(MplFuncProfile) "__"));
   dbgFuncProfile->SetStorageClass(kScText);
   dbgFuncProfile->SetSKind(kStFunc);
 }
diff --git a/src/maple_util/include/literalstrname.h b/src/maple_util/include/literalstrname.h
index 249033e7cf173b3504d1b89b4a1e0c7d5524eea9..7b09720e82a14b8c0fc68dbce017257499d6e3b4 100644
--- a/src/maple_util/include/literalstrname.h
+++ b/src/maple_util/include/literalstrname.h
@@ -23,15 +23,6 @@ const std::string kConstString = "_C_STR_";
 const std::string kConstStringPtr = "_PTR_C_STR_";
 const std::string kLocalStringPrefix = "L_STR_";
 constexpr int kConstStringLen = 7;
-constexpr unsigned int kDigestHashLength = 16;
-
-union DigestHash {
-  uint8_t bytes[kDigestHashLength];
-  struct {
-    uint64_t first;
-    uint64_t second;
-  } d;
-};
 
 class LiteralStrName {
  public:
diff --git a/src/maple_util/include/muid.h b/src/maple_util/include/muid.h
index 2a7160250039d6c755160ea51f68162e3080e3fd..ec75ae339bb6fd718bb2a3693998c4638a455e6d 100644
--- a/src/maple_util/include/muid.h
+++ b/src/maple_util/include/muid.h
@@ -40,6 +40,16 @@ constexpr unsigned int kMuidLength = 8;
 constexpr unsigned int kMuidLength = 16;
 #endif // USE_64BIT_MUID
 
+constexpr unsigned int kDigestShortHashLength = 8;
+constexpr unsigned int kDigestHashLength = 16;
+union DigestHash {
+  uint8_t bytes[kDigestHashLength];
+  struct {
+    uint64_t first;
+    uint64_t second;
+  } d;
+};
+
 // muid-related files are shared between maple compiler and runtime, thus not in
 // namespace maplert
 struct MuidContext {
@@ -117,9 +127,15 @@ struct MUID {
   }
 };
 
-void MuidInit(MuidContext *status);
-void MuidDecode(MuidContext *status, const void *data, uint64_t size);
-void MuidEncode(unsigned char *result, MuidContext *status, bool use64Bit = false);
+void MuidInit(MuidContext &status);
+void MuidDecode(MuidContext &status, const unsigned char &data, uint64_t size);
+
+template <typename T>
+void FullEncode(T &result, MuidContext &status);
+void MuidEncode(unsigned char (&result)[kDigestShortHashLength], MuidContext &status);
+void MuidEncode(unsigned char (&result)[kDigestHashLength], MuidContext &status, bool use64Bit = false);
 
+void GetMUIDHash(const unsigned char &data, size_t size, MUID &muid);
+DigestHash GetDigestHash(const unsigned char &bytes, uint32_t len);
 MUID GetMUID(const std::string &symbolName, bool forSystem = true);
 #endif