diff --git a/src/bin/jbc2mpl b/src/bin/jbc2mpl index a8555fb6200c0de412f58d1b2c0c6a4c92760739..aac408ff7ecf4de0ff77e32cb792e568edcd1673 100755 Binary files a/src/bin/jbc2mpl and b/src/bin/jbc2mpl differ diff --git a/src/bin/maple b/src/bin/maple index 556f5686a2dc8b011665c0719715a99d8e9a1b2c..26fe2babac389b4a15621bb7c1b39855cc7da818 100755 Binary files a/src/bin/maple and b/src/bin/maple differ diff --git a/src/deplibs/libmempool.a b/src/deplibs/libmempool.a index f21d024ae004a397bb7b63b60f46934352a697b1..2847e970562f53316f65c05287a72fcde0461694 100644 Binary files a/src/deplibs/libmempool.a and b/src/deplibs/libmempool.a differ diff --git a/src/deplibs/libmplphase.a b/src/deplibs/libmplphase.a index 327e8c2b5aacfba6913401476f7f294f06ad022b..98c795f9840f6f4f3bbe4c6e6644ef4f369693ae 100644 Binary files a/src/deplibs/libmplphase.a and b/src/deplibs/libmplphase.a differ diff --git a/src/deplibs/libmplutil.a b/src/deplibs/libmplutil.a index 29f6dd1ec714b6e80e7ea794e7440ddbc705f2fb..d56161938120e50ebbbec83989e610dad0dd1894 100644 Binary files a/src/deplibs/libmplutil.a and b/src/deplibs/libmplutil.a differ diff --git a/src/maple_be/include/be/common_utils.h b/src/maple_be/include/be/common_utils.h index 775795da8c91c3a52c61505f1768156c803ec7eb..05c5db1897c356ecb8b68f9d0cc58b860fcce521 100644 --- a/src/maple_be/include/be/common_utils.h +++ b/src/maple_be/include/be/common_utils.h @@ -86,12 +86,12 @@ constexpr int32 kEARetTempNameSize = 10; * Aarch64 data processing instructions have 12 bits of space for values in their instuction word * This is arranged as a four-bit rotate value and an eight-bit immediate value: */ -constexpr uint32 kMaxImmVal8Bits = 8; -constexpr uint32 kMaxImmVal12Bits = 12; -constexpr uint32 kMaxImmVal13Bits = 13; +constexpr uint32 kMaxAarch64ImmVal12Bits = 12; + +constexpr uint32 kMaxAarch64ImmVal13Bits = 13; /* aarch64 assembly takes up to 24-bits */ -constexpr uint32 kMaxImmVal24Bits = 24; +constexpr uint32 kMaxAarch64ImmVal24Bits = 24; constexpr double kMicroSecPerMilliSec = 1000.0; diff --git a/src/maple_be/include/cg/aarch64/aarch64_color_ra.h b/src/maple_be/include/cg/aarch64/aarch64_color_ra.h index d7bcd4291ee65449d4c1994cc23d48c51f4b8d56..849971d08c364f00406b480eaaee1d3ceff55f1b 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_color_ra.h +++ b/src/maple_be/include/cg/aarch64/aarch64_color_ra.h @@ -1147,7 +1147,7 @@ class GraphColorRegAllocator : public AArch64RegAllocator { void CalculatePriority(LiveRange &lr) const; bool CreateLiveRangeHandleLocal(regno_t regNO, BB &bb, bool isDef); LiveRange *CreateLiveRangeAllocateAndUpdate(regno_t regNO, const BB &bb, bool isDef, uint32 currId); - bool CreateLiveRange(regno_t regNO, BB &bb, bool isDef, uint32 currPoint, bool update_cnt); + bool CreateLiveRange(regno_t regNO, BB &bb, bool isDef, uint32 currPoint, bool updateCount); bool SetupLiveRangeByOpHandlePhysicalReg(RegOperand &op, Insn &insn, regno_t regNO, bool isDef); void SetupLiveRangeByOp(Operand &op, Insn &insn, bool isDef, uint32 &numUses); void SetupLiveRangeByRegNO(regno_t liveOut, BB &bb, uint32 currPoint); @@ -1217,6 +1217,7 @@ class GraphColorRegAllocator : public AArch64RegAllocator { regno_t FindColorForLr(const LiveRange &lr) const; bool ShouldUseCallee(LiveRange &lr, const MapleSet &calleeUsed, const MapleVector &delayed) const; + void AddCalleeUsed(regno_t regNO, RegType regType); bool AssignColorToLr(LiveRange &lr, bool isDelayed = false); void PruneLrForSplit(LiveRange &lr, BB &bb, bool remove, std::set &candidateInLoop, std::set &defInLoop); diff --git a/src/maple_be/include/cg/aarch64/aarch64_insn.h b/src/maple_be/include/cg/aarch64/aarch64_insn.h index c4093cfe9a765f840b763ed84a9b7fc863a28c30..71b22f475018b7b8ff5bfc8c76062b6bee3b7966 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_insn.h +++ b/src/maple_be/include/cg/aarch64/aarch64_insn.h @@ -155,6 +155,8 @@ class AArch64Insn : public Insn { uint32 GetLatencyType() const override; + bool CheckRefField(int32 opndIndex) const; + private: void CheckOpnd(Operand &opnd, OpndProp &mopd) const; void EmitClinit(const CG&, Emitter&) const; diff --git a/src/maple_be/include/cg/aarch64/aarch64_operand.h b/src/maple_be/include/cg/aarch64/aarch64_operand.h index 26296b1ade891aed7082dcf5d39887290f729110..de7930a63292aa1c950356cbb3345347f6a2dc67 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_operand.h +++ b/src/maple_be/include/cg/aarch64/aarch64_operand.h @@ -149,14 +149,6 @@ class AArch64ImmOperand : public ImmOperand { return memPool.Clone(*this); } - bool IsInBitSize(uint8 size, uint8 nLowerZeroBits) const override { - /* mask1 is a 64bits number that is all 1 shifts left size bits */ - const uint64 mask1 = 0xffffffffffffffffUL << size; - /* mask2 is a 64 bits number that nlowerZeroBits are all 1, higher bits aro all 0 */ - uint64 mask2 = (static_cast(1) << static_cast(nLowerZeroBits)) - 1UL; - return (mask2 & value) == 0UL && (mask1 & ((static_cast(value)) >> nLowerZeroBits)) == 0UL; - } - bool IsBitmaskImmediate() const { ASSERT(!IsZero(), " 0 is reserved for bitmask immediate"); ASSERT(!IsAllOnes(), " -1 is reserved for bitmask immediate"); @@ -248,14 +240,6 @@ class AArch64OfstOperand : public OfstOperand { return memPool.Clone(*this); } - bool IsInBitSize(uint8 size, uint8 nLowerZeroBits) const override { - /* mask1 is a 64bits number that is all 1 shifts left size bits */ - const uint64 mask1 = 0xffffffffffffffffUL << size; - /* mask2 is a 64 bits number that nlowerZeroBits are all 1, higher bits aro all 0 */ - uint64 mask2 = (static_cast(1) << static_cast(nLowerZeroBits)) - 1UL; - return (mask2 & value) == 0UL && (mask1 & ((static_cast(value)) >> nLowerZeroBits)) == 0UL; - } - bool IsSymOffset() const { return offsetType == kSymbolOffset; } diff --git a/src/maple_be/include/cg/ebo.h b/src/maple_be/include/cg/ebo.h index 706c34c7b77661c6425878380be0e2b693d73b01..c3151581b05f7fc16969218e1421ab1b7518af25 100644 --- a/src/maple_be/include/cg/ebo.h +++ b/src/maple_be/include/cg/ebo.h @@ -50,9 +50,6 @@ struct OpndInfo { InsnInfo *insnInfo = nullptr; bool redefinedInBB = false; /* A following definition exisit in bb. */ bool redefined = false; /* A following definition exisit. */ -#if TARGARM32 - bool mayReDef = false; -#endif OpndInfo *same = nullptr; /* Other definitions of the same operand. */ OpndInfo *prev = nullptr; OpndInfo *next = nullptr; @@ -144,10 +141,7 @@ class Ebo { bool IsPhysicalReg(const Operand &opnd) const; bool HasAssignedReg(const Operand &opnd) const; bool IsOfSameClass(const Operand &op0, const Operand &op1) const; - bool OpndAvailableInBB(const BB &bb, OpndInfo *info); - bool ForwardPropCheck(const Operand *opndReplace, OpndInfo &opndInfo, const Operand &opnd, Insn &insn); - bool RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, Operand &oldOpnd, - const OpndInfo *tmpInfo); + bool OpndAvailableInBB(const BB &bb, OpndInfo &info); bool IsNotVisited(const BB &bb) { return !visitedBBs.at(bb.GetId()); }; diff --git a/src/maple_be/include/cg/operand.h b/src/maple_be/include/cg/operand.h index f640baa6a4697b7ff264e6b22b00dc1bf0e46a5c..d029d14d874e1203f976cb5846c50cc0660ba756 100644 --- a/src/maple_be/include/cg/operand.h +++ b/src/maple_be/include/cg/operand.h @@ -328,7 +328,6 @@ class ImmOperand : public Operand { ~ImmOperand() override = default; virtual bool IsSingleInstructionMovable() const = 0; - virtual bool IsInBitSize(uint8 size, uint8 nLowerZeroBits) const = 0; int64 GetValue() const { return value; @@ -358,6 +357,14 @@ class ImmOperand : public Operand { return isSigned; } + bool IsInBitSize(uint8 size, uint8 nLowerZeroBits = 0) const { + /* mask1 is a 64bits number that is all 1 shifts left size bits */ + const uint64 mask1 = 0xffffffffffffffffUL << size; + /* mask2 is a 64 bits number that nlowerZeroBits are all 1, higher bits aro all 0 */ + uint64 mask2 = (static_cast(1) << static_cast(nLowerZeroBits)) - 1UL; + return (mask2 & value) == 0UL && (mask1 & ((static_cast(value)) >> nLowerZeroBits)) == 0UL; + } + bool IsInBitSizeRot(uint8 size) const { return IsInBitSizeRot(size, value); } diff --git a/src/maple_be/src/be/switch_lowerer.cpp b/src/maple_be/src/be/switch_lowerer.cpp index 86b081175c83bd0eb337e8bfa84210dd3d4601eb..5dcfb813a5ddd20d1d7d0e5c877d620aa105ce68 100644 --- a/src/maple_be/src/be/switch_lowerer.cpp +++ b/src/maple_be/src/be/switch_lowerer.cpp @@ -59,9 +59,9 @@ void SwitchLowerer::FindClusters(MapleVector &clusters) { while (i < length - kClusterSwitchCutoff) { for (int32 j = length - 1; j > i; --j) { float tmp1 = static_cast(j - i); - float tmp2 = static_cast(stmt->GetCasePair(j).first - stmt->GetCasePair(i).first); + float tmp2 = static_cast(stmt->GetCasePair(j).first) - static_cast(stmt->GetCasePair(i).first); if (((j - i) >= kClusterSwitchCutoff) && - ((stmt->GetSwitchTable()[j].first - stmt->GetCasePair(i).first) < kMaxRangeGotoTableSize) && + (tmp2 < kMaxRangeGotoTableSize) && ((tmp1 / tmp2) >= kClusterSwitchDensity)) { clusters.push_back(Cluster(i, j)); i = j; diff --git a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index c613630ef609b333138a1f7905bcb29aa599aa80..1105b40926c75c3f9eabf246aeddadadea167a2c 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1786,8 +1786,8 @@ void AArch64CGFunc::SelectCondGoto(LabelOperand &targetOpnd, Opcode jmpOp, Opcod * either cmp or cmp with shift 12 encoding */ ImmOperand *immOpnd = static_cast(opnd1); - if (immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || - immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits)) { + if (immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits) || + immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits)) { mOp = is64Bits ? MOP_xcmpri : MOP_wcmpri; } else { opnd1 = &SelectCopy(*opnd1, primType, primType); @@ -1958,7 +1958,7 @@ void AArch64CGFunc::SelectAdd(Operand &resOpnd, Operand &opnd0, Operand &opnd1, SelectSub(resOpnd, opnd0, *immOpnd, primType); return; } - if (immOpnd->IsInBitSize(kMaxImmVal24Bits, 0)) { + if (immOpnd->IsInBitSize(kMaxAarch64ImmVal24Bits)) { /* * ADD Wd|WSP, Wn|WSP, #imm{, shift} ; 32-bit general registers * ADD Xd|SP, Xn|SP, #imm{, shift} ; 64-bit general registers @@ -1967,15 +1967,15 @@ void AArch64CGFunc::SelectAdd(Operand &resOpnd, Operand &opnd0, Operand &opnd1, */ MOperator mOpCode = MOP_undef; Operand *newOpnd0 = &opnd0; - if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || - immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { + if (!(immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits) || + immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, + ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxAarch64ImmVal12Bits, immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xaddrri24 : MOP_waddrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, opnd0, immOpnd2, addSubLslOperand); GetCurBB()->AppendInsn(newInsn); - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(kMaxAarch64ImmVal12Bits); newOpnd0 = &resOpnd; } /* process lower 12 bits */ @@ -2060,7 +2060,7 @@ void AArch64CGFunc::SelectSub(Operand &resOpnd, Operand &opnd0, Operand &opnd1, return; } - if (immOpnd->IsInBitSize(kMaxImmVal24Bits, 0)) { + if (immOpnd->IsInBitSize(kMaxAarch64ImmVal24Bits)) { /* * SUB Wd|WSP, Wn|WSP, #imm{, shift} ; 32-bit general registers * SUB Xd|SP, Xn|SP, #imm{, shift} ; 64-bit general registers @@ -2068,15 +2068,15 @@ void AArch64CGFunc::SelectSub(Operand &resOpnd, Operand &opnd0, Operand &opnd1, * aarch64 assembly takes up to 24-bits, if the lower 12 bits is all 0 */ MOperator mOpCode = MOP_undef; - if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || - immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { + if (!(immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits) || + immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, + ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxAarch64ImmVal12Bits, immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xsubrri24 : MOP_wsubrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, *opnd0Bak, immOpnd2, addSubLslOperand); GetCurBB()->AppendInsn(newInsn); - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(kMaxAarch64ImmVal12Bits); opnd0Bak = &resOpnd; } /* process lower 12 bits */ @@ -2598,7 +2598,7 @@ void AArch64CGFunc::SelectAArch64Cmp(Operand &o0, Operand &o1, bool isIntType, u * imm : 0 ~ 4095, shift: none, LSL #0, or LSL #12 * aarch64 assembly takes up to 24-bits, if the lower 12 bits is all 0 */ - if (immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits)) { + if (immOpnd->IsInBitSize(12) || immOpnd->IsInBitSize(12, 12)) { mOpCode = (dsize == k64BitSize) ? MOP_xcmpri : MOP_wcmpri; } else { /* load into register */ @@ -3006,7 +3006,7 @@ Operand *AArch64CGFunc::SelectExtractbits(ExtractbitsNode &node, Operand &srcOpn uint8 bitOffset = node.GetBitsOffset(); uint8 bitSize = node.GetBitsSize(); bool is64Bits = (GetPrimTypeBitSize(dtype) == k64BitSize); - uint32 immWidth = is64Bits ? kMaxImmVal13Bits : kMaxImmVal12Bits; + uint32 immWidth = is64Bits ? kMaxAarch64ImmVal13Bits : kMaxAarch64ImmVal12Bits; Operand &opnd0 = LoadIntoRegister(srcOpnd, dtype); if ((bitOffset == 0) && !isSigned && (bitSize < immWidth)) { SelectBand(resOpnd, opnd0, CreateImmOperand((static_cast(1) << bitSize) - 1, immWidth, false), dtype); @@ -5303,7 +5303,7 @@ AArch64MemOperand &AArch64CGFunc::GetOrCreateMemOpnd(AArch64MemOperand::AArch64A /* offset: base offset from FP or SP */ MemOperand &AArch64CGFunc::CreateMemOpnd(RegOperand &baseOpnd, int32 offset, uint32 size) { AArch64OfstOperand &offsetOpnd = CreateOfstOpnd(offset, k32BitSize); - if (!ImmOperand::IsInBitSizeRot(kMaxImmVal12Bits, offset)) { + if (!ImmOperand::IsInBitSizeRot(kMaxAarch64ImmVal12Bits, offset)) { Operand *resImmOpnd = &SelectCopy(CreateImmOperand(offset, k32BitSize, true), PTY_i32, PTY_i32); return *memPool->New(AArch64MemOperand::kAddrModeBOi, size, baseOpnd, static_cast(resImmOpnd), nullptr, nullptr); @@ -5317,7 +5317,7 @@ MemOperand &AArch64CGFunc::CreateMemOpnd(RegOperand &baseOpnd, int32 offset, uin /* offset: base offset + #:lo12:Label+immediate */ MemOperand &AArch64CGFunc::CreateMemOpnd(RegOperand &baseOpnd, int32 offset, uint32 size, const MIRSymbol &sym) { AArch64OfstOperand &offsetOpnd = CreateOfstOpnd(offset, k32BitSize); - ASSERT(ImmOperand::IsInBitSizeRot(kMaxImmVal12Bits, offset), ""); + ASSERT(ImmOperand::IsInBitSizeRot(kMaxAarch64ImmVal12Bits, offset), ""); return *memPool->New(AArch64MemOperand::kAddrModeBOi, size, baseOpnd, nullptr, &offsetOpnd, &sym); } @@ -5553,13 +5553,13 @@ void AArch64CGFunc::SelectAddAfterInsn(Operand &resOpnd, Operand &opnd0, Operand MOperator mOpCode = MOP_undef; /* lower 24 bits has 1, higher bits are all 0 */ - if (immOpnd->IsInBitSize(kMaxImmVal24Bits, 0)) { + if (immOpnd->IsInBitSize(kMaxAarch64ImmVal24Bits)) { /* lower 12 bits and higher 12 bits both has 1 */ Operand *newOpnd0 = &opnd0; - if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || - immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { + if (!(immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits) || + immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, + ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxAarch64ImmVal12Bits, immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xaddrri24 : MOP_waddrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, opnd0, immOpnd2, addSubLslOperand); @@ -5569,7 +5569,7 @@ void AArch64CGFunc::SelectAddAfterInsn(Operand &resOpnd, Operand &opnd0, Operand insn.GetBB()->InsertInsnBefore(insn, newInsn); } /* get lower 12 bits value */ - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(kMaxAarch64ImmVal12Bits); newOpnd0 = &resOpnd; } /* process lower 12 bits value */ diff --git a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp index 36805601e0c3252af332dc3533a00504b42c9a19..860330a22f4729dd506f98cbe50985c7066e9c5d 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp @@ -325,24 +325,30 @@ void GraphColorRegAllocator::InitFreeRegPool() { if (!AArch64Abi::IsAvailableReg(static_cast(regNO))) { continue; } - if (AArch64isa::IsGPRegister(static_cast(regNO))) { - /* - * Because of the try-catch scenario in JAVALANG, - * we should use specialized spill register to prevent register changes when exceptions occur. - */ - if (JAVALANG) { + + /* + * Because of the try-catch scenario in JAVALANG, + * we should use specialized spill register to prevent register changes when exceptions occur. + */ + if (JAVALANG && AArch64Abi::IsSpillRegInRA(static_cast(regNO), needExtraSpillReg)) { + if (AArch64isa::IsGPRegister(static_cast(regNO))) { /* Preset int spill registers */ - if (AArch64Abi::IsSpillRegInRA(static_cast(regNO), needExtraSpillReg)) { - intSpillRegSet.insert(regNO - R0); - continue; - } + intSpillRegSet.insert(regNO - R0); + } else { + /* Preset float spill registers */ + fpSpillRegSet.insert(regNO - V0); } + continue; + } + #ifdef RESERVED_REGS - /* 16,17 are used besides ra. */ - if (IsReservedReg(static_cast(regNO))) { - continue; - } + /* r16,r17 are used besides ra. */ + if (IsReservedReg(static_cast(regNO))) { + continue; + } #endif /* RESERVED_REGS */ + + if (AArch64isa::IsGPRegister(static_cast(regNO))) { /* when yieldpoint is enabled, x19 is reserved. */ if (IsYieldPointReg(static_cast(regNO))) { continue; @@ -354,13 +360,6 @@ void GraphColorRegAllocator::InitFreeRegPool() { } ++intNum; } else { - if (JAVALANG) { - /* Preset float spill registers */ - if (AArch64Abi::IsSpillRegInRA(static_cast(regNO), needExtraSpillReg)) { - fpSpillRegSet.insert(regNO - V0); - continue; - } - } if (AArch64Abi::IsCalleeSavedReg(static_cast(regNO))) { fpCalleeRegSet.insert(regNO - V0); } else { @@ -1222,6 +1221,18 @@ bool GraphColorRegAllocator::ShouldUseCallee(LiveRange &lr, const MapleSet(regNO)); + if (isCalleeReg) { + if (regType == kRegTyInt) { + intCalleeUsed.insert(regNO); + } else { + fpCalleeUsed.insert(regNO); + } + } +} + regno_t GraphColorRegAllocator::FindColorForLr(const LiveRange &lr) const { regno_t base; RegType regType = lr.GetRegType(); @@ -1299,14 +1310,7 @@ bool GraphColorRegAllocator::AssignColorToLr(LiveRange &lr, bool isDelayed) { } #endif /* OPTIMIZE_FOR_PROLOG */ - bool isCalleeReg = AArch64Abi::IsCalleeSavedReg(static_cast(lr.GetAssignedRegNO())); - if (isCalleeReg) { - if (lr.GetRegType() == kRegTyInt) { - intCalleeUsed.insert((lr.GetAssignedRegNO())); - } else { - fpCalleeUsed.insert((lr.GetAssignedRegNO())); - } - } + AddCalleeUsed(lr.GetAssignedRegNO(), lr.GetRegType()); UpdateForbiddenForNeighbors(lr); ForEachBBArrElem(lr.GetBBMember(), @@ -1911,6 +1915,8 @@ void GraphColorRegAllocator::SplitLr(LiveRange &lr) { SplitLrUpdateInterference(lr); newLr->SetAssignedRegNO(FindColorForLr(*newLr)); + AddCalleeUsed(newLr->GetAssignedRegNO(), newLr->GetRegType()); + /* For the new LR, update assignment for local RA */ ForEachBBArrElem(newLr->GetBBMember(), [&newLr, this](uint32 bbID) { SetBBInfoGlobalAssigned(bbID, newLr->GetAssignedRegNO()); }); @@ -2087,8 +2093,9 @@ void GraphColorRegAllocator::HandleLocalRaDebug(regno_t regNO, const LocalRegAll LogInfo::MapleLogger() << "\tregUsed:"; uint64 regUsed = localRa.GetPregUsed(isInt); regno_t base = isInt ? R0 : V0; + regno_t end = isInt ? (RFP - R0) : (V31 - V0); - for (uint32 i = 0; i < RZR; ++i) { + for (uint32 i = 0; i <= end; ++i) { if ((regUsed & (1ULL << i)) != 0) { LogInfo::MapleLogger() << " " << (i + base); } @@ -2096,7 +2103,7 @@ void GraphColorRegAllocator::HandleLocalRaDebug(regno_t regNO, const LocalRegAll LogInfo::MapleLogger() << "\n"; LogInfo::MapleLogger() << "\tregs:"; uint64 regs = localRa.GetPregs(isInt); - for (uint32 regnoInLoop = 0; regnoInLoop < RZR; ++regnoInLoop) { + for (uint32 regnoInLoop = 0; regnoInLoop <= end; ++regnoInLoop) { if ((regs & (1ULL << regnoInLoop)) != 0) { LogInfo::MapleLogger() << " " << (regnoInLoop + base); } @@ -2265,9 +2272,7 @@ void GraphColorRegAllocator::LocalRaFinalAssignment(LocalRegAllocator &localRa, } /* Might need to get rid of this copy. */ bbInfo.SetRegMapElem(intRegAssignmentMapPair.first, regNO); - if (AArch64Abi::IsCalleeSavedReg(static_cast(regNO))) { - intCalleeUsed.insert(regNO); - } + AddCalleeUsed(regNO, kRegTyInt); } for (const auto &fpRegAssignmentMapPair : localRa.GetFpRegAssignmentMap()) { regno_t regNO = fpRegAssignmentMapPair.second; @@ -2276,9 +2281,7 @@ void GraphColorRegAllocator::LocalRaFinalAssignment(LocalRegAllocator &localRa, } /* Might need to get rid of this copy. */ bbInfo.SetRegMapElem(fpRegAssignmentMapPair.first, regNO); - if (AArch64Abi::IsCalleeSavedReg(static_cast(regNO))) { - fpCalleeUsed.insert(regNO); - } + AddCalleeUsed(regNO, kRegTyFloat); } } @@ -2711,6 +2714,7 @@ regno_t GraphColorRegAllocator::PickRegForSpill(uint64 &usedRegMask, RegType reg base = V0; pregInterval = V0 - R30; } + if (JAVALANG) { /* Use predetermined spill register */ MapleSet &spillRegSet = isIntReg ? intSpillRegSet : fpSpillRegSet; @@ -2721,20 +2725,21 @@ regno_t GraphColorRegAllocator::PickRegForSpill(uint64 &usedRegMask, RegType reg } spillReg = *regNumIt + base; return spillReg; - } else { - /* Temporary find a unused reg to spill */ - uint32 maxPhysRegNum = isIntReg ? MaxIntPhysRegNum() : MaxFloatPhysRegNum(); - for (spillReg = (maxPhysRegNum + base); spillReg > base; --spillReg) { - if (spillReg >= k64BitSize) { - spillReg = k64BitSize - 1; - } - if ((usedRegMask & (1ULL << (spillReg - pregInterval))) == 0) { - usedRegMask |= (1ULL << (spillReg - pregInterval)); - needSpillLr = true; - return spillReg; - } + } + + /* Temporary find a unused reg to spill */ + uint32 maxPhysRegNum = isIntReg ? MaxIntPhysRegNum() : MaxFloatPhysRegNum(); + for (spillReg = (maxPhysRegNum + base); spillReg > base; --spillReg) { + if (spillReg >= k64BitSize) { + spillReg = k64BitSize - 1; + } + if ((usedRegMask & (1ULL << (spillReg - pregInterval))) == 0) { + usedRegMask |= (1ULL << (spillReg - pregInterval)); + needSpillLr = true; + return spillReg; } } + ASSERT(false, "can not find spillReg"); return 0; } @@ -2809,14 +2814,7 @@ RegOperand *GraphColorRegAllocator::GetReplaceOpndForLRA(Insn &insn, const Opera if (static_cast(insn).GetMachineOpcode() == MOP_lazy_ldr && spillReg == R17) { CHECK_FATAL(false, "register IP1(R17) may be changed when lazy_ldr"); } - bool isCalleeReg = AArch64Abi::IsCalleeSavedReg(static_cast(spillReg)); - if (isCalleeReg) { - if (regType == kRegTyInt) { - intCalleeUsed.insert((spillReg)); - } else { - fpCalleeUsed.insert((spillReg)); - } - } + AddCalleeUsed(spillReg, regType); if (GCRA_DUMP) { LogInfo::MapleLogger() << "\tassigning lra spill reg " << spillReg << "\n"; } @@ -2856,14 +2854,7 @@ bool GraphColorRegAllocator::GetSpillReg(Insn &insn, LiveRange &lr, uint32 &spil } else { lr.SetAssignedRegNO(0); needSpillLr = SetRegForSpill(lr, insn, spillIdx, usedRegMask, isDef); - bool isCalleeReg = AArch64Abi::IsCalleeSavedReg(static_cast(lr.GetAssignedRegNO())); - if (isCalleeReg) { - if (lr.GetRegType() == kRegTyInt) { - intCalleeUsed.insert(lr.GetAssignedRegNO()); - } else { - fpCalleeUsed.insert(lr.GetAssignedRegNO()); - } - } + AddCalleeUsed(lr.GetAssignedRegNO(), lr.GetRegType()); } return needSpillLr; } diff --git a/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp b/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp index 20b209416ce9000c5a7e1a1e839c51d51d6c25f9..1b30b61b59ccc5d5e6754cc64839753292bf217e 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp @@ -104,9 +104,9 @@ OpndInfo *AArch64Ebo::OperandInfoDef(BB ¤tBB, Insn ¤tInsn, Operand & } opndInfo->same = opndInfoPrev; if ((opndInfoPrev != nullptr)) { - opndInfoPrev->redefined = TRUE; + opndInfoPrev->redefined = true; if (opndInfoPrev->bb == ¤tBB) { - opndInfoPrev->redefinedInBB = TRUE; + opndInfoPrev->redefinedInBB = true; } UpdateOpndInfo(localOpnd, *opndInfoPrev, opndInfo, hashVal); } else { @@ -299,8 +299,9 @@ bool AArch64Ebo::DoConstProp(Insn &insn, uint32 idx, Operand &opnd) { case MOP_waddrrr: case MOP_xsubrrr: case MOP_wsubrrr: { - if ((idx != kInsnThirdOpnd) || !src->IsInBitSize(kMaxImmVal24Bits, 0) || - !(src->IsInBitSize(kMaxImmVal12Bits, 0) || src->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { + if ((idx != kInsnThirdOpnd) || !src->IsInBitSize(kMaxAarch64ImmVal24Bits) || + !(src->IsInBitSize(kMaxAarch64ImmVal12Bits) || + src->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { return false; } Operand &result = insn.GetOperand(0); @@ -489,14 +490,15 @@ bool AArch64Ebo::SimplifyConstOperand(Insn &insn, const MapleVector &o } if ((insn.GetMachineOpcode() == MOP_xaddrrr) || (insn.GetMachineOpcode() == MOP_waddrrr)) { - if (immOpnd->IsInBitSize(kMaxImmVal24Bits, 0)) { + if (immOpnd->IsInBitSize(kMaxAarch64ImmVal24Bits)) { /* * ADD Wd|WSP, Wn|WSP, #imm{, shift} ; 32-bit general registers * ADD Xd|SP, Xn|SP, #imm{, shift} ; 64-bit general registers * imm : 0 ~ 4095, shift: none, LSL #0, or LSL #12 * aarch64 assembly takes up to 24-bits, if the lower 12 bits is all 0 */ - if (immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits)) { + if ((immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits) || + immOpnd->IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { MOperator mOp = opndSize == k64BitSize ? MOP_xaddrri12 : MOP_waddrri12; Insn &newInsn = cgFunc->GetCG()->BuildInstruction(mOp, *res, *op, *immOpnd); bb->ReplaceInsn(insn, newInsn); @@ -518,8 +520,8 @@ bool AArch64Ebo::SimplifyConstOperand(Insn &insn, const MapleVector &o AArch64ImmOperand &imm0 = static_cast(prev->GetOperand(kInsnThirdOpnd)); int64_t val = imm0.GetValue() + immOpnd->GetValue(); AArch64ImmOperand &imm1 = a64CGFunc->CreateImmOperand(val, opndSize, imm0.IsSignedValue()); - if (imm1.IsInBitSize(kMaxImmVal24Bits, 0) && (imm1.IsInBitSize(kMaxImmVal12Bits, 0) || - imm1.IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { + if (imm1.IsInBitSize(kMaxAarch64ImmVal24Bits) && (imm1.IsInBitSize(kMaxAarch64ImmVal12Bits) || + imm1.IsInBitSize(kMaxAarch64ImmVal12Bits, kMaxAarch64ImmVal12Bits))) { MOperator mOp = (opndSize == k64BitSize ? MOP_xaddrri12 : MOP_waddrri12); bb->ReplaceInsn(insn, cgFunc->GetCG()->BuildInstruction(mOp, *res, prevOpnd0, imm1)); result = true; @@ -722,7 +724,8 @@ bool AArch64Ebo::SpecialSequence(Insn &insn, const MapleVector &origI auto &res1 = static_cast(insn1->GetOperand(kInsnFirstOpnd)); if (RegistersIdentical(res1, *op1) && RegistersIdentical(res1, res2) && (GetOpndInfo(base2, -1) != nullptr) && !GetOpndInfo(base2, -1)->redefined) { - immVal = imm0Val + imm1.GetValue() + (static_cast(immOpnd2.GetValue()) << kMaxImmVal12Bits); + immVal = + imm0Val + imm1.GetValue() + (static_cast(immOpnd2.GetValue()) << kMaxAarch64ImmVal12Bits); op1 = &base2; } else { return false; @@ -734,6 +737,7 @@ bool AArch64Ebo::SpecialSequence(Insn &insn, const MapleVector &origI /* multiple of 4 and 8 */ const int multiOfFour = 4; const int multiOfEight = 8; + is64bits = is64bits && (!static_cast(insn).CheckRefField(kInsnFirstOpnd)); if ((!is64bits && (immVal < kStrLdrImm32UpperBound) && (immVal % multiOfFour == 0)) || (is64bits && (immVal < kStrLdrImm64UpperBound) && (immVal % multiOfEight == 0))) { /* Reserved physicalReg beforeRA */ diff --git a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp index 708ffbc25d94ebb18dbac0073a236e5d25c2e7fa..be94f537e781772a8381de70ad79c85c649a0235 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp @@ -1019,15 +1019,7 @@ void AArch64Insn::Emit(const CG &cg, Emitter &emitter) const { } } - bool isRefField = false; - /* set opnd0 ref-field flag, so we can emit the right register */ - if (IsAccessRefField() && AccessMem()) { - Operand *opnd0 = opnds[seq[0]]; - if (opnd0->IsRegister()) { - static_cast(opnd0)->SetRefField(true); - isRefField = true; - } - } + bool isRefField = (opndSize == 0) ? false : CheckRefField(seq[0]); if (mOp != MOP_comment) { emitter.IncreaseJavaInsnCount(); } @@ -1090,6 +1082,18 @@ void AArch64Insn::Emit(const CG &cg, Emitter &emitter) const { emitter.Emit("\n"); } +/* set opnd0 ref-field flag, so we can emit the right register */ +bool AArch64Insn::CheckRefField(int32 opndIndex) const { + if (IsAccessRefField() && AccessMem()) { + Operand *opnd0 = opnds[opndIndex]; + if (opnd0->IsRegister()) { + static_cast(opnd0)->SetRefField(true); + return true; + } + } + return false; +} + Operand *AArch64Insn::GetResult(uint32 id) const { ASSERT(id < GetResultNum(), "index out of range"); const AArch64MD *md = &AArch64CG::kMd[mOp]; diff --git a/src/maple_be/src/cg/aarch64/aarch64_peep.cpp b/src/maple_be/src/cg/aarch64/aarch64_peep.cpp index 022a84d64d9167e47bbf4e41fca4013738b36f86..9088c785de6f7172eae7dc9dcf23e0c77df0f006 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_peep.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_peep.cpp @@ -2462,11 +2462,13 @@ void ComputationTreeAArch64::Run(BB &bb, Insn &insn) { if (lsl.GetShiftAmount() == lslShiftAmountCaseA) { sxtw = &aarch64CGFunc->CreateExtendShiftOperand(ExtendShiftOperand::kSXTW, lslShiftAmountCaseA + 1, lslBitLenth); - imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseA), kMaxImmVal12Bits, true); + imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseA), + kMaxAarch64ImmVal12Bits, true); } else if (lsl.GetShiftAmount() == lslShiftAmountCaseB) { sxtw = &aarch64CGFunc->CreateExtendShiftOperand(ExtendShiftOperand::kSXTW, lslShiftAmountCaseB + 1, lslBitLenth); - imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseB), kMaxImmVal12Bits, true); + imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseB), + kMaxAarch64ImmVal12Bits, true); } Insn &newInsn = cgFunc.GetCG()->BuildInstruction(MOP_xxwaddrrre, sxtwInsn->GetOperand(kInsnFirstOpnd), diff --git a/src/maple_be/src/cg/cg_phasemanager.cpp b/src/maple_be/src/cg/cg_phasemanager.cpp index 92f2938ccba85749c14b3f14c27dda99d5b5eb79..b905dfd68cf3de2fc6dd545e2ed89c5662fa8ce9 100644 --- a/src/maple_be/src/cg/cg_phasemanager.cpp +++ b/src/maple_be/src/cg/cg_phasemanager.cpp @@ -297,7 +297,7 @@ int64 CgFuncPhaseManager::DumpCGTimers() { (kPercent * phaseTimers[i] / total) << "%" << std::setw(10) << std::setprecision(0) << (phaseTimers[i] / kMicroSecPerMilliSec) << "ms" << "\n"; } - LogInfo::flags(); + LogInfo::Flags(); return total; } } /* namespace maplebe */ diff --git a/src/maple_be/src/cg/ebo.cpp b/src/maple_be/src/cg/ebo.cpp index cc67edb780474ac2d7870f18b5a07fcf22e45d3a..cbb604b3f53da6026274312e03a97547fdec324c 100644 --- a/src/maple_be/src/cg/ebo.cpp +++ b/src/maple_be/src/cg/ebo.cpp @@ -119,15 +119,12 @@ bool Ebo::IsOfSameClass(const Operand &op0, const Operand &op1) const { } /* return true if opnd of bb is available. */ -bool Ebo::OpndAvailableInBB(const BB &bb, OpndInfo *info) { - if (info == nullptr) { - return false; - } - if (info->opnd == nullptr) { +bool Ebo::OpndAvailableInBB(const BB &bb, OpndInfo &info) { + if (info.opnd == nullptr) { return false; } - Operand *op = info->opnd; + Operand *op = info.opnd; if (op->IsConstant()) { return true; } @@ -136,13 +133,13 @@ bool Ebo::OpndAvailableInBB(const BB &bb, OpndInfo *info) { if (op->IsRegShift() || op->IsRegister()) { hashVal = -1; } else { - hashVal = info->hashVal; + hashVal = info.hashVal; } - if (GetOpndInfo(*op, hashVal) != info) { + if (GetOpndInfo(*op, hashVal) != &info) { return false; } /* global operands aren't supported at low levels of optimization. */ - if ((Globals::GetInstance()->GetOptimLevel() < CGOptions::kLevel2) && (&bb != info->bb)) { + if ((Globals::GetInstance()->GetOptimLevel() < CGOptions::kLevel2) && (&bb != info.bb)) { return false; } if (beforeRegAlloc && IsPhysicalReg(*op)) { @@ -151,54 +148,6 @@ bool Ebo::OpndAvailableInBB(const BB &bb, OpndInfo *info) { return true; } -bool Ebo::ForwardPropCheck(const Operand *opndReplace, OpndInfo &opndInfo, const Operand &opnd, Insn &insn) { - if (opndReplace == nullptr) { - return false; - } - if ((opndInfo.replacementInfo != nullptr) && opndInfo.replacementInfo->redefined) { - return false; - } -#if TARGARM32 - /* for arm32, disable forwardProp in strd insn. */ - if (insn.GetMachineOpcode() == MOP_strd) { - return false; - } - if (opndInfo.mayReDef) { - return false; - } -#endif - if (!(opndReplace->IsConstant() || - ((OpndAvailableInBB(*insn.GetBB(), opndInfo.replacementInfo) || RegistersIdentical(opnd, *opndReplace)) && - (HasAssignedReg(opnd) == HasAssignedReg(*opndReplace))))) { - return false; - } - /* if beforeRA, replace op should not be PhysicalRe */ - return !beforeRegAlloc || !IsPhysicalReg(*opndReplace); -} - -bool Ebo::RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, Operand &oldOpnd, - const OpndInfo *tmpInfo) { - if (opnd.IsConstant()) { - return false; - } - if (!(!beforeRegAlloc || (HasAssignedReg(oldOpnd) == HasAssignedReg(*opndReplace)) || opnd.IsConstReg() || - !insn.IsMove())) { - return false; - } - if (!((insn.GetResultNum() == 0) || - (((insn.GetResult(0) != nullptr) && !RegistersIdentical(opnd, *(insn.GetResult(0)))) || !beforeRegAlloc))) { - return false; - } - if (!(beforeRegAlloc || !IsFrameReg(oldOpnd))) { - return false; - } - if (insn.IsDestRegAlsoSrcReg()) { - return false; - } - return ((IsOfSameClass(oldOpnd, *opndReplace) && (oldOpnd.GetSize() <= opndReplace->GetSize())) || - ((tmpInfo != nullptr) && IsMovToSIMDVmov(insn, *tmpInfo->insn))); -} - /* For Memory Operand, its info was stored in a hash table, this function is to compute its hash value. */ int32 Ebo::ComputeOpndHash(const Operand &opnd) const { uint64 hashIdx = reinterpret_cast(&opnd) >> k4ByteSize; @@ -540,73 +489,85 @@ bool Ebo::ForwardPropagateOpnd(Insn &insn, Operand *&opnd, uint32 opndIndex, } /* forward propagation of constants */ - CHECK_FATAL(opndIndex < origInfos.size(), "SetOpndInfo hashval outof range!"); - if (!ForwardPropCheck(opndReplace, *opndInfo, *opnd, insn)) { - return false; - } - Operand *oldOpnd = opnd; - opnd = opndInfo->replacementOpnd; - opndInfo = opndInfo->replacementInfo; - - /* constant prop. */ - if (opnd->IsIntImmediate() && oldOpnd->IsRegister()) { - if (DoConstProp(insn, opndIndex, *opnd)) { + ASSERT(opndIndex < origInfos.size(), "SetOpndInfo hashval outof range!"); + if ((opndReplace != nullptr) && !((opndInfo->replacementInfo != nullptr) && opndInfo->replacementInfo->redefined) && + (opndReplace->IsConstant() || + ((((opndInfo->replacementInfo != nullptr) && OpndAvailableInBB(*insn.GetBB(), *opndInfo->replacementInfo)) || + RegistersIdentical(*opnd, *opndReplace)) && + (HasAssignedReg(*opnd) == HasAssignedReg(*opndReplace)))) && + (!beforeRegAlloc || (!IsPhysicalReg(*opndReplace)))) { + Operand *oldOpnd = opnd; + opnd = opndInfo->replacementOpnd; + opndInfo = opndInfo->replacementInfo; + + /* constant prop. */ + if (opnd->IsIntImmediate() && oldOpnd->IsRegister()) { + if (DoConstProp(insn, opndIndex, *opnd)) { + DecRef(*origInfos.at(opndIndex)); + /* Update the actual expression info. */ + origInfos.at(opndIndex) = opndInfo; + } + } + /* move reg, wzr, store vreg, mem ==> store wzr, mem */ +#if TARGAARCH64 + if (opnd->IsZeroRegister() && opndIndex == 0 && + (insn.GetMachineOpcode() == MOP_wstr || insn.GetMachineOpcode() == MOP_xstr)) { + if (EBO_DUMP) { + LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; + insn.Dump(); + LogInfo::MapleLogger() << "the new insn is:\n"; + } + insn.SetOperand(opndIndex, *opnd); DecRef(*origInfos.at(opndIndex)); /* Update the actual expression info. */ origInfos.at(opndIndex) = opndInfo; + if (EBO_DUMP) { + insn.Dump(); + } } - } - /* move reg, wzr, store vreg, mem ==> store wzr, mem */ -#if TARGAARCH64 - if (opnd->IsZeroRegister() && opndIndex == 0 && - (insn.GetMachineOpcode() == MOP_wstr || insn.GetMachineOpcode() == MOP_xstr)) { - if (EBO_DUMP) { - LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; - insn.Dump(); - LogInfo::MapleLogger() << "the new insn is:\n"; - } - insn.SetOperand(opndIndex, *opnd); - DecRef(*origInfos.at(opndIndex)); - /* Update the actual expression info. */ - origInfos.at(opndIndex) = opndInfo; - if (EBO_DUMP) { - insn.Dump(); - } - } #endif - /* forward prop for registers. */ - if (!RegForwardCheck(insn, *opnd, opndReplace, *oldOpnd, origInfos.at(opndIndex))) { - return false; - } - /* Copies to and from the same register are not needed. */ - if (!beforeRegAlloc && insn.IsEffectiveCopy() && (insn.CopyOperands() == opndIndex) && - RegistersIdentical(*opnd, *(insn.GetResult(0)))) { - if (EBO_DUMP) { - LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; - insn.Dump(); - LogInfo::MapleLogger() << "===Remove the new insn because Copies to and from the same register. \n"; - } - return true; - } + /* forward prop for registers. */ + if (!opnd->IsConstant() && + (!beforeRegAlloc || (HasAssignedReg(*oldOpnd) == HasAssignedReg(*opndReplace)) || opnd->IsConstReg() || + !insn.IsMove()) && + (opndInfo != nullptr) && + ((insn.GetResultNum() == 0) || + (((insn.GetResult(0) != nullptr) && !RegistersIdentical(*opnd, *(insn.GetResult(0)))) || !beforeRegAlloc)) && + (beforeRegAlloc || !IsFrameReg(*oldOpnd)) && !insn.IsDestRegAlsoSrcReg() && + ((IsOfSameClass(*oldOpnd, *opndReplace) && (oldOpnd->GetSize() <= opndReplace->GetSize())) || + IsMovToSIMDVmov(insn, *origInfos.at(opndIndex)->insn))) { + /* Copies to and from the same register are not needed. */ + if (!beforeRegAlloc && insn.IsEffectiveCopy() && (insn.CopyOperands() == opndIndex) && + RegistersIdentical(*opnd, *(insn.GetResult(0)))) { + if (EBO_DUMP) { + LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; + insn.Dump(); + LogInfo::MapleLogger() << "===Remove the new insn because Copies to and from the same register. \n"; + } + return true; + } - if (EBO_DUMP) { - LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; - insn.Dump(); - LogInfo::MapleLogger() << "the new insn is:\n"; - } - DecRef(*origInfos.at(opndIndex)); - insn.SetOperand(opndIndex, *opnd); + if (EBO_DUMP) { + LogInfo::MapleLogger() << "===replace operand " << opndIndex << " of insn: \n"; + insn.Dump(); + LogInfo::MapleLogger() << "the new insn is:\n"; + } + DecRef(*origInfos.at(opndIndex)); + insn.SetOperand(opndIndex, *opnd); - if (EBO_DUMP) { - insn.Dump(); - } - IncRef(*opndInfo); - /* Update the actual expression info. */ - origInfos.at(opndIndex) = opndInfo; - /* extend the live range of the replacement operand. */ - if ((opndInfo->bb != insn.GetBB()) && opnd->IsRegister()) { - MarkOpndLiveIntoBB(*opnd, *insn.GetBB(), *opndInfo->bb); + if (EBO_DUMP) { + insn.Dump(); + } + IncRef(*opndInfo); + /* Update the actual expression info. */ + origInfos.at(opndIndex) = opndInfo; + /* extend the live range of the replacement operand. */ + if ((opndInfo->bb != insn.GetBB()) && opnd->IsRegister()) { + MarkOpndLiveIntoBB(*opnd, *insn.GetBB(), *opndInfo->bb); + } + } } + return false; } @@ -1309,7 +1270,7 @@ AnalysisResult *CgDoEbo::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMgr) { ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); #endif #if TARGARM32 - ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); + ebo = eboMp->New(*cgFunc, *eboMp, live, false, PhaseName()); #endif ebo->Run(); /* the live range info may changed, so invalid the info. */ @@ -1335,7 +1296,7 @@ AnalysisResult *CgDoEbo1::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMgr) ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); #endif #if TARGARM32 - ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); + ebo = eboMp->New(*cgFunc, *eboMp, live, false, PhaseName()); #endif ebo->Run(); /* the live range info may changed, so invalid the info. */ diff --git a/src/maple_be/src/cg/emit.cpp b/src/maple_be/src/cg/emit.cpp index 5a85c8a3138a80cf52210a9b93c8aea7c56a4c68..e3004df44c91e8e977f48b2ab1d4fddc29cc8912 100644 --- a/src/maple_be/src/cg/emit.cpp +++ b/src/maple_be/src/cg/emit.cpp @@ -971,8 +971,8 @@ int64 Emitter::GetFieldOffsetValue(const std::string &className, const MIRIntCon } void Emitter::InitRangeIdx2PerfixStr() { - rangeIdx2PrefixStr[RangeIdx::kVtab] = kMuidVtabPrefixStr; - rangeIdx2PrefixStr[RangeIdx::kItab] = kMuidItabPrefixStr; + rangeIdx2PrefixStr[RangeIdx::kVtabAndItab] = kMuidVtabAndItabPrefixStr; + rangeIdx2PrefixStr[RangeIdx::kItabConflict] = kMuidItabConflictPrefixStr; rangeIdx2PrefixStr[RangeIdx::kVtabOffset] = kMuidVtabOffsetPrefixStr; rangeIdx2PrefixStr[RangeIdx::kFieldOffset] = kMuidFieldOffsetPrefixStr; rangeIdx2PrefixStr[RangeIdx::kValueOffset] = kMuidValueOffsetPrefixStr; @@ -2033,8 +2033,9 @@ void Emitter::EmitGlobalVariable() { /* itabConflict */ MarkVtabOrItabEndFlag(coldItabCStVec); - EmitMuidTable(hotItabCStVec, strIdx2Type, kMuidItabPrefixStr); - EmitMetaDataSymbolWithMarkFlag(coldItabCStVec, strIdx2Type, ITAB_PREFIX_STR, sectionNameIsEmpty, false); + EmitMuidTable(hotItabCStVec, strIdx2Type, kMuidItabConflictPrefixStr); + EmitMetaDataSymbolWithMarkFlag(coldItabCStVec, strIdx2Type, ITAB_CONFLICT_PREFIX_STR, kMuidColdItabConflictPrefixStr, + false); /* * vtab @@ -2047,8 +2048,9 @@ void Emitter::EmitGlobalVariable() { coldVtabStVec.push_back(sym); } MarkVtabOrItabEndFlag(coldVtabStVec); - EmitMuidTable(hotVtabStVec, strIdx2Type, kMuidVtabPrefixStr); - EmitMetaDataSymbolWithMarkFlag(coldVtabStVec, strIdx2Type, VTAB_PREFIX_STR, sectionNameIsEmpty, false); + EmitMuidTable(hotVtabStVec, strIdx2Type, kMuidVtabAndItabPrefixStr); + EmitMetaDataSymbolWithMarkFlag(coldVtabStVec, strIdx2Type, VTAB_AND_ITAB_PREFIX_STR, kMuidColdVtabAndItabPrefixStr, + false); /* vtab_offset */ EmitMuidTable(vtabOffsetVec, strIdx2Type, kMuidVtabOffsetPrefixStr); diff --git a/src/maple_driver/include/driver_option_common.h b/src/maple_driver/include/driver_option_common.h index 691cf6c2ed20d2505171780921b5a5b01fddc4cf..18ec5bf8d23422ec73346bd55040df718f723262 100644 --- a/src/maple_driver/include/driver_option_common.h +++ b/src/maple_driver/include/driver_option_common.h @@ -60,9 +60,11 @@ class MapleDriverOptionBase { class DriverOptionCommon : public MapleDriverOptionBase { public: + ~DriverOptionCommon() = default; static DriverOptionCommon &GetInstance(); + + private: DriverOptionCommon(); - ~DriverOptionCommon() = default; }; } // namespace maple #endif //DRIVER_OPTIONS_COMMON_H diff --git a/src/maple_driver/src/option_parser.cpp b/src/maple_driver/src/option_parser.cpp index e8293d93bca4f9e97fb8dff523266852190492fc..da376de2033af5059363a9bb4442eb90776f21e6 100644 --- a/src/maple_driver/src/option_parser.cpp +++ b/src/maple_driver/src/option_parser.cpp @@ -281,7 +281,7 @@ ErrorCode OptionParser::HandleInputArgs(const std::vector &inputArg isMatchLongOpt = true; } std::string arg = inputArgs[i].substr(index); - bool isOptMatched = isMatchLongOpt || isMatchShortOpt; + bool isOptMatched = (isMatchLongOpt || isMatchShortOpt); if (!isLastMatchOpt && isOptMatched) { ret = CheckOpt(arg, lastKey, isLastMatchOpt, inputOption, exeName); } else if (isLastMatchOpt && !isOptMatched) { diff --git a/src/maple_ipa/BUILD.gn b/src/maple_ipa/BUILD.gn index db21556e27af47d2b92c4109cc124fb24fce2107..0715afab099ef82e62dd2d90cc26d55d7b89e26d 100644 --- a/src/maple_ipa/BUILD.gn +++ b/src/maple_ipa/BUILD.gn @@ -29,7 +29,7 @@ src_libmplipa = [ "src/module_phase_manager.cpp", "src/clone.cpp", "src/retype.cpp", - "src/callgraph.cpp", + "src/call_graph.cpp", ] configs = [ "${MAPLEALL_ROOT}:mapleallcompilecfg" ] diff --git a/src/maple_ipa/include/callgraph.h b/src/maple_ipa/include/call_graph.h similarity index 98% rename from src/maple_ipa/include/callgraph.h rename to src/maple_ipa/include/call_graph.h index ff58490ab9993632f382907ee25875261c29cb45..57559c9a402851a58ea2dd1a7437013bf75c4003 100644 --- a/src/maple_ipa/include/callgraph.h +++ b/src/maple_ipa/include/call_graph.h @@ -12,8 +12,8 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v1 for more details. */ -#ifndef MAPLE_IPA_INCLUDE_CALLGRAPH_H -#define MAPLE_IPA_INCLUDE_CALLGRAPH_H +#ifndef MAPLE_IPA_INCLUDE_CALL_GRAPH_H +#define MAPLE_IPA_INCLUDE_CALL_GRAPH_H #include "module_phase.h" #include "mir_nodes.h" #include "class_hierarchy.h" @@ -54,7 +54,7 @@ class CallInfo { CallInfo(CallType type, MIRFunction &call, StmtNode *node, uint32 ld, uint32 stmtId, bool local = false) : areAllArgsLocal(local), cType(type), mirFunc(&call), callStmt(node), loopDepth(ld), id(stmtId) {} - virtual ~CallInfo() {} + ~CallInfo() = default; uint32 GetID() const { return id; @@ -313,7 +313,7 @@ class SCCNode { callerScc(alloc.Adapter()), calleeScc(alloc.Adapter()) {} - virtual ~SCCNode() {} + ~SCCNode() = default; void AddCGNode(CGNode *node) { cgNodes.push_back(node); @@ -478,7 +478,7 @@ class DoCallGraph : public ModulePhase { return "callgraph"; } - virtual ~DoCallGraph(){}; + virtual ~DoCallGraph() {}; }; class IPODevirtulize { @@ -486,7 +486,7 @@ class IPODevirtulize { IPODevirtulize(MIRModule *m, MemPool *memPool, KlassHierarchy *kh) : cgAlloc(memPool), mirBuilder(cgAlloc.GetMemPool()->New(m)), klassh(kh), debugFlag(false) {} - virtual ~IPODevirtulize() = default; + ~IPODevirtulize() = default; void DevirtualFinal(); KlassHierarchy *GetKlassh() const { return klassh; @@ -510,7 +510,7 @@ class DoIPODevirtulize : public ModulePhase { return "ipodevirtulize"; } - virtual ~DoIPODevirtulize(){}; + virtual ~DoIPODevirtulize() {}; }; } // namespace maple #endif // MAPLE_IPA_INCLUDE_CALLGRAPH_H diff --git a/src/maple_ipa/src/callgraph.cpp b/src/maple_ipa/src/call_graph.cpp similarity index 99% rename from src/maple_ipa/src/callgraph.cpp rename to src/maple_ipa/src/call_graph.cpp index 3dcb80e252fd098c4eddfe5b2f2131e3869f2f6a..5db89f442139bb37b7878f25fb4c6f569c25c466 100644 --- a/src/maple_ipa/src/callgraph.cpp +++ b/src/maple_ipa/src/call_graph.cpp @@ -12,7 +12,7 @@ * FIT FOR A PARTICULAR PURPOSE. * See the Mulan PSL v1 for more details. */ -#include "callgraph.h" +#include "call_graph.h" #include #include #include @@ -1135,7 +1135,7 @@ void DoDevirtual(const Klass &klass, const KlassHierarchy &klassh) { } if (op == OP_interfacecallassigned || op == OP_virtualcallassigned) { CallNode *callNode = static_cast(stmt); - for (unsigned int i = 0; i < callNode->GetReturnVec().size(); ++i) { + for (size_t i = 0; i < callNode->GetReturnVec().size(); ++i) { StIdx stIdx = callNode->GetReturnPair(i).first; MIRSymbol *tmpSymbol = func->GetLocalOrGlobalSymbol(stIdx); ResetInferredType(inferredSymbols, tmpSymbol); @@ -1182,7 +1182,7 @@ void IPODevirtulize::DevirtualFinal() { if (klass->IsClass()) { MIRClassType *classType = static_cast(klass->GetMIRStructType()); // Initialize inferred type of member fileds as kInitTyidx - for (unsigned int i = 0; i < classType->GetFieldsSize(); ++i) { // Don't include parent's field + for (size_t i = 0; i < classType->GetFieldsSize(); ++i) { // Don't include parent's field classType->SetElemInferredTyIdx(i, kInitTyIdx); } SearchDefInMemberMethods(*klass); diff --git a/src/maple_ipa/src/module_phase_manager.cpp b/src/maple_ipa/src/module_phase_manager.cpp index 3df676ec5d6f705424ca3dec9a965b6f9acd77eb..bf1517186443257112468833e02d9d21c0e160df 100644 --- a/src/maple_ipa/src/module_phase_manager.cpp +++ b/src/maple_ipa/src/module_phase_manager.cpp @@ -19,7 +19,7 @@ #include "bin_mpl_export.h" #include "mpl_timer.h" #include "clone.h" -#include "callgraph.h" +#include "call_graph.h" #if MIR_JAVA #include "native_stub_func.h" #include "vtable_analysis.h" diff --git a/src/maple_ir/include/mir_pragma.h b/src/maple_ir/include/mir_pragma.h index 165c2a1555e9fd10ade8fca2e41d4f6523ab8043..f420c58249f1e4c3478f378be8d728f2c00080d4 100644 --- a/src/maple_ir/include/mir_pragma.h +++ b/src/maple_ir/include/mir_pragma.h @@ -70,11 +70,14 @@ enum PragmaValueType { class MIRPragmaElement { public: - explicit MIRPragmaElement(MIRModule &m) : MIRPragmaElement(m.GetPragmaMPAllocator()) {} + explicit MIRPragmaElement(MIRModule &m) : MIRPragmaElement(m.GetPragmaMPAllocator()) { + val.d = 0; + } explicit MIRPragmaElement(MapleAllocator &subElemAllocator) : subElemVec(subElemAllocator.Adapter()) { subElemVec.clear(); + val.d = 0; } ~MIRPragmaElement() = default; @@ -169,7 +172,7 @@ class MIRPragmaElement { uint64 u; float f; double d; - } val { 0 }; + } val; MapleVector subElemVec; }; diff --git a/src/maple_me/include/me_abco.h b/src/maple_me/include/me_abco.h index 6d4e44f1a06216ff7b9635de03f9a73e830b389c..a1f40f7ade83995c78127cef8306e12928eb1957 100755 --- a/src/maple_me/include/me_abco.h +++ b/src/maple_me/include/me_abco.h @@ -19,6 +19,8 @@ #include "me_ir.h" #include "me_inequality_graph.h" #include "me_cfg.h" +#include "mir_module.h" +#include "mir_builder.h" namespace maple { struct StmtComparator { @@ -249,8 +251,10 @@ class MeABC { void AddCareInsn(MeStmt &defS); void AddCarePhi(MePhiNode &defP); void BuildInequalityGraph(); + bool IsLessOrEuqal(const MeExpr &opnd1, const MeExpr &opnd2); + void ProcessCallParameters(CallMeStmt &callNode); void FindRedundantABC(MeStmt &meStmt, NaryMeExpr &naryMeExpr); - void InitNewStartPoint(MeStmt &meStmt, const NaryMeExpr &nMeExpr); + void InitNewStartPoint(MeStmt &meStmt, MeExpr &opnd1, MeExpr &opnd2, bool clearGraph = true); void DeleteABC(); bool CleanABCInStmt(MeStmt &meStmt, NaryMeExpr &naryMeExpr); MeExpr *ReplaceArrayExpr(MeExpr &rhs, MeExpr &naryMeExpr, MeStmt *ivarStmt); diff --git a/src/maple_me/include/me_inequality_graph.h b/src/maple_me/include/me_inequality_graph.h index 266703c4b4f7312e4184e78b2dbcaba095ec7d26..d307444ca4b0bfc0008dcba3f2fcfa7ce1cc1ba2 100755 --- a/src/maple_me/include/me_inequality_graph.h +++ b/src/maple_me/include/me_inequality_graph.h @@ -351,7 +351,7 @@ class ABCD { static constexpr int kDFSLimit = 100000; explicit ABCD(InequalityGraph &graph) : inequalityGraph(&graph), recursiveCount(0) {} ~ABCD() = default; - + bool IsLessOrEqual(const MeExpr &arrayNode, const MeExpr &idx); bool DemandProve(const MeExpr &arrayNode, const MeExpr &idx); bool DemandProve(ESSABaseNode &firstNode, ESSABaseNode &secondNode, EdgeType edgeType); diff --git a/src/maple_me/src/me_abco.cpp b/src/maple_me/src/me_abco.cpp index 636abaa2571e1ec74e21c809f427b3b39e262654..9025343e0fbb8303345d1cd03f4f1a284c22f10b 100755 --- a/src/maple_me/src/me_abco.cpp +++ b/src/maple_me/src/me_abco.cpp @@ -902,7 +902,10 @@ bool MeABC::BuildAssignInGraph(MeStmt &meStmt) { rhsNode = inequalityGraph->GetOrCreateConstNode( static_cast(opMeExpr->GetOpnd(0))->GetIntValue()); } - (void)inequalityGraph->AddEdge(*arrLength, *rhsNode, 0, EdgeType::kNone); + InequalEdge *pairEdge1 = inequalityGraph->AddEdge(*arrLength, *rhsNode, 0, EdgeType::kNone); + InequalEdge *pairEdge2 = inequalityGraph->AddEdge(*rhsNode, *arrLength, 0, EdgeType::kNone); + pairEdge1->SetPairEdge(*pairEdge2); + pairEdge2->SetPairEdge(*pairEdge1); return true; } case OP_sub: { @@ -1167,6 +1170,9 @@ bool MeABC::BuildAssignInGraph(MeStmt &meStmt) { InequalEdge *pairEdge2 = inequalityGraph->AddEdge(*arrayNode, *ivarNode, 0, EdgeType::kUpper); pairEdge1->SetPairEdge(*pairEdge2); pairEdge2->SetPairEdge(*pairEdge1); + if (rhs->GetMeOp() == kMeOpVar) { + AddUseDef(*rhs); + } return true; } else { CHECK_FATAL(rhs->GetMeOp() == kMeOpVar || rhs->GetMeOp() == kMeOpConst, "must be"); @@ -1373,6 +1379,23 @@ void MeABC::BuildInequalityGraph() { ReSolveEdge(); } +// opnds <= opnd1.length +bool MeABC::IsLessOrEuqal(const MeExpr &opnd1, const MeExpr &opnd2) { + CHECK_FATAL(opnd1.GetMeOp() == kMeOpVar, "must be"); + CHECK_FATAL(opnd1.GetPrimType() == PTY_ref, "must be"); + if (!inequalityGraph->HasNode(opnd1)) { + return false; + } + if (opnd2.GetMeOp() == kMeOpVar && !inequalityGraph->HasNode(opnd2)) { + return false; + } + if (prove->IsLessOrEqual(opnd1, opnd2)) { + return true; + } else { + return false; + } +} + void MeABC::FindRedundantABC(MeStmt &meStmt, NaryMeExpr &naryMeExpr) { MeExpr *opnd1 = naryMeExpr.GetOpnd(0); MeExpr *opnd2 = naryMeExpr.GetOpnd(1); @@ -1481,25 +1504,24 @@ void MeABC::DeleteABC() { } } -void MeABC::InitNewStartPoint(MeStmt &meStmt, const NaryMeExpr &nMeExpr) { +void MeABC::InitNewStartPoint(MeStmt &meStmt, MeExpr &opnd1, MeExpr &opnd2, bool clearGraph) { careMeStmts.clear(); careMePhis.clear(); carePoints.clear(); unresolveEdge.clear(); - inequalityGraph = std::make_unique(*meFunc); + if (clearGraph) { + inequalityGraph = std::make_unique(*meFunc); + } CHECK_FATAL(inequalityGraph != nullptr, "inequalityGraph is nullptr"); prove = std::make_unique(*inequalityGraph); CHECK_FATAL(prove != nullptr, "prove is nullptr"); - CHECK_FATAL(nMeExpr.GetNumOpnds() == kNumOpnds, "msut be"); - MeExpr *opnd1 = nMeExpr.GetOpnd(0); - MeExpr *opnd2 = nMeExpr.GetOpnd(1); - CHECK_FATAL(opnd1->GetMeOp() == kMeOpVar, "must be"); - AddUseDef(*opnd1); - if (opnd2->GetMeOp() == kMeOpVar) { - AddUseDef(*opnd2); + CHECK_FATAL(opnd1.GetMeOp() == kMeOpVar, "must be"); + AddUseDef(opnd1); + if (opnd2.GetMeOp() == kMeOpVar) { + AddUseDef(opnd2); } else { - CHECK_FATAL(opnd2->GetMeOp() == kMeOpConst, "must be"); - (void)inequalityGraph->GetOrCreateConstNode(static_cast(opnd2)->GetIntValue()); + CHECK_FATAL(opnd2.GetMeOp() == kMeOpConst, "must be"); + (void)inequalityGraph->GetOrCreateConstNode(static_cast(&opnd2)->GetIntValue()); } BB *curBB = meStmt.GetBB(); if (curBB->GetPiList().size()) { @@ -1512,6 +1534,86 @@ void MeABC::InitNewStartPoint(MeStmt &meStmt, const NaryMeExpr &nMeExpr) { currentCheck = &meStmt; } +void MeABC::ProcessCallParameters(CallMeStmt &callNode) { + MIRFunction *callFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(callNode.GetPUIdx()); + if (callFunc->GetBaseClassName().compare("Ljava_2Flang_2FSystem_3B") == 0 && + callFunc->GetBaseFuncName().compare("arraycopy") == 0) { + MeExpr *opnd1 = callNode.GetOpnd(1); // The 1th parameter. + MeExpr *opnd3 = callNode.GetOpnd(3); // The 3th parameter. + CHECK_FATAL(opnd1->GetOp() == OP_dread, "must be"); + CHECK_FATAL(opnd3->GetOp() == OP_dread, "must be"); + ConstMeExpr *constOpnd1 = nullptr; + ConstMeExpr *constOpnd3 = nullptr; + VarMeExpr *varOpnd1 = static_cast(opnd1); + if (varOpnd1->GetDefBy() == kDefByStmt) { + MeStmt *defOpnd1Stmt = varOpnd1->GetDefStmt(); + if (defOpnd1Stmt->GetOp() == OP_dassign && defOpnd1Stmt->GetOpnd(0)->GetOp() == OP_constval) { + constOpnd1 = static_cast(defOpnd1Stmt->GetOpnd(0)); + } + } + VarMeExpr *varOpnd3 = static_cast(opnd3); + if (varOpnd3->GetDefBy() == kDefByStmt) { + MeStmt *defOpnd3Stmt = varOpnd3->GetDefStmt(); + if (defOpnd3Stmt->GetOp() == OP_dassign && defOpnd3Stmt->GetOpnd(0)->GetOp() == OP_constval) { + constOpnd3 = static_cast(defOpnd3Stmt->GetOpnd(0)); + } + } + if (constOpnd1 != nullptr && constOpnd3 != nullptr && constOpnd1->IsZero() && constOpnd3->IsZero()) { + MeExpr *opnd0 = callNode.GetOpnd(0); // The 0th parameter. + MeExpr *opnd2 = callNode.GetOpnd(2); // The 2th parameter. + MeExpr *opnd4 = callNode.GetOpnd(4); // The 4th parameter. + InitNewStartPoint(callNode, *opnd0, *opnd4); + BuildInequalityGraph(); + bool opnd0Proved = IsLessOrEuqal(*opnd0, *opnd4); + InitNewStartPoint(callNode, *opnd2, *opnd4, false); + BuildInequalityGraph(); + bool opnd2Proved = IsLessOrEuqal(*opnd2, *opnd4); + bool boundaryCheck = false; + if (opnd0Proved && opnd2Proved) { + boundaryCheck = true; + } + CHECK_FATAL(opnd0->GetOp() == OP_dread, "must be"); + CHECK_FATAL(opnd2->GetOp() == OP_dread, "must be"); + VarMeExpr *array0 = static_cast(opnd0); + VarMeExpr *array2 = static_cast(opnd2); + bool nullCheck = false; + if (!array0->GetMaybeNull() && !array2->GetMaybeNull()) { + nullCheck = true; + } + bool typeCheck = false; + bool isScalar = false; + if (array0->GetInferredTyIdx() != 0 && array2->GetInferredTyIdx() != 0) { + MIRType *type0 = GlobalTables::GetTypeTable().GetTypeFromTyIdx(array0->GetInferredTyIdx()); + MIRType *type2 = GlobalTables::GetTypeTable().GetTypeFromTyIdx(array2->GetInferredTyIdx()); + if (type0 && type2 && type0->IsMIRJarrayType() && type2->IsMIRJarrayType()) { + MIRArrayType *arrayType0 = static_cast(type0); + MIRArrayType *arrayType2 = static_cast(type2); + if (arrayType0->GetElemTyIdx() == arrayType2->GetElemTyIdx()) { + typeCheck = true; + if (arrayType0->GetElemType()->IsScalarType()) { + isScalar = true; + } + } + } + } + if (boundaryCheck && nullCheck && typeCheck) { + if (isScalar) { + MIRFunction *arrayCopyFunc = meFunc->GetMIRModule().GetMIRBuilder()->GetOrCreateFunction( + "Native_java_lang_System_arraycopyCharUnchecked___3CI_3CII", (TyIdx) (PTY_void)); + callNode.SetPUIdx(arrayCopyFunc->GetPuidx()); + return; + } // ref can be handled, but need to extend ABI. + } + } + if (callFunc->GetBaseFuncNameWithType().compare( + "arraycopy_7C_28Ljava_2Flang_2FObject_3BILjava_2Flang_2FObject_3BII_29V") == 0) { + MIRFunction *arrayCopyFunc = meFunc->GetMIRModule().GetMIRBuilder()->GetOrCreateFunction( + "Native_java_lang_System_arraycopy__Ljava_lang_Object_2ILjava_lang_Object_2II", (TyIdx)(PTY_void)); + callNode.SetPUIdx(arrayCopyFunc->GetPuidx()); + } + } +} + void MeABC::ExecuteABCO() { MeABC::isDebug = false; if (CollectABC()) { @@ -1524,7 +1626,8 @@ void MeABC::ExecuteABCO() { Rename(); CollectCareInsns(); for (auto pair : arrayNewChecks) { - InitNewStartPoint(*(pair.first), *(static_cast(pair.second))); + InitNewStartPoint(*(pair.first), *((static_cast(pair.second))->GetOpnd(0)), + *((static_cast(pair.second))->GetOpnd(1))); BuildInequalityGraph(); if (MeABC::isDebug) { meFunc->GetTheCfg()->DumpToFile(meFunc->GetName()); diff --git a/src/maple_me/src/me_cfg.cpp b/src/maple_me/src/me_cfg.cpp index 0ec00b53dc6e67b8bed3e07c8b2d3e0c0880bde5..f5b0052ecf55348e175c16d82951111b9281a6f6 100755 --- a/src/maple_me/src/me_cfg.cpp +++ b/src/maple_me/src/me_cfg.cpp @@ -67,7 +67,16 @@ void MeCFG::BuildMirCFG() { auto &gotoStmt = static_cast(lastStmt); LabelIdx lblIdx = gotoStmt.GetOffset(); BB *meBB = func.GetLabelBBAt(lblIdx); - bb->AddSucc(*meBB); + if (*rightNextBB == meBB) { + constexpr char tmpBool[] = "tmpBool"; + auto *mirBuilder = func.GetMIRModule().GetMIRBuilder(); + MIRSymbol *st = mirBuilder->GetOrCreateLocalDecl(tmpBool, *GlobalTables::GetTypeTable().GetUInt1()); + auto *dassign = mirBuilder->CreateStmtDassign(st->GetStIdx(), 0, lastStmt.Opnd(0)); + bb->ReplaceStmt(&lastStmt, dassign); + bb->SetKind(kBBFallthru); + } else { + bb->AddSucc(*meBB); + } break; } case kBBSwitch: { diff --git a/src/maple_me/src/me_inequality_graph.cpp b/src/maple_me/src/me_inequality_graph.cpp index 6acc998c21fefb0b3ddf34199ea1de151f7bab52..6718dfd62f788ac1c45869b5999ded7de1c9ac8b 100755 --- a/src/maple_me/src/me_inequality_graph.cpp +++ b/src/maple_me/src/me_inequality_graph.cpp @@ -326,6 +326,21 @@ void InequalityGraph::DumpDotFile(IRMap &irMap, DumpType dumpType) const { fileBuf.close(); } +bool ABCD::IsLessOrEqual(const MeExpr &arrayNode, const MeExpr &idx) { + ESSABaseNode &aNode = inequalityGraph->GetNode(arrayNode); + ESSABaseNode *idxNode = nullptr; + if (idx.GetMeOp() == kMeOpVar) { + idxNode = &(inequalityGraph->GetNode(idx)); + } else { + CHECK_FATAL(idx.GetMeOp() == kMeOpConst, "must be"); + idxNode = &(inequalityGraph->GetNode(static_cast(idx).GetIntValue())); + } + std::unique_ptr e = std::make_unique(kLowerBound, kUpper); + active.clear(); + ProveResult res = Prove(aNode, *idxNode, *e.get()); + return res == kTrue; +} + bool ABCD::DemandProve(const MeExpr &arrayNode, const MeExpr &idx) { ESSABaseNode &aNode = inequalityGraph->GetNode(arrayNode); ESSABaseNode *idxNode = nullptr; diff --git a/src/maple_me/src/ssa_devirtual.cpp b/src/maple_me/src/ssa_devirtual.cpp index ccff6cbb5793f734152697599b5f56e35962ca00..ee29fbdea1af4b82f488d32c59ac671bc45e244d 100755 --- a/src/maple_me/src/ssa_devirtual.cpp +++ b/src/maple_me/src/ssa_devirtual.cpp @@ -258,6 +258,15 @@ void SSADevirtual::PropVarInferredType(VarMeExpr &varMeExpr) const { type->Dump(0, false); LogInfo::MapleLogger() << '\n'; } + } else if (rhs->GetOp() == OP_gcmallocjarray) { + varMeExpr.SetInferredTyIdx(static_cast(rhs)->GetTyIdx()); + varMeExpr.SetMaybeNull(false); + if (SSADevirtual::debug) { + MIRType *type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(varMeExpr.GetInferredTyIdx()); + LogInfo::MapleLogger() << "[SSA-DEVIRT] [TYPE-INFERRING] mx" << varMeExpr.GetExprID() << " "; + type->Dump(0, false); + LogInfo::MapleLogger() << '\n'; + } } else { TyIdx tyIdx = GetInferredTyIdx(*rhs); varMeExpr.SetMaybeNull(MaybeNull(*rhs)); diff --git a/src/maple_phase/include/phase_impl.h b/src/maple_phase/include/phase_impl.h index 2c324b095ede6372aa35e5552d9df159000e2ca9..705314ce5f0fa1ae49036c83954868b4e8a517bd 100644 --- a/src/maple_phase/include/phase_impl.h +++ b/src/maple_phase/include/phase_impl.h @@ -59,18 +59,20 @@ class FuncOptimizeImpl : public MplTaskParam { class FuncOptimizeIterator { public: - FuncOptimizeIterator(const std::string &phaseName, FuncOptimizeImpl *phaseImpl); + FuncOptimizeIterator(const std::string &phaseName, std::unique_ptr phaseImpl); virtual ~FuncOptimizeIterator(); virtual void Run(); protected: - FuncOptimizeImpl *phaseImpl; + std::unique_ptr phaseImpl; }; -#define OPT_TEMPLATE(OPT_NAME) \ - auto *kh = static_cast(mrm->GetAnalysisResult(MoPhase_CHA, mod)); \ - ASSERT_NOT_NULL(kh); \ - FuncOptimizeIterator opt(PhaseName(), new OPT_NAME(*mod, kh, TRACE_PHASE)); \ +#define OPT_TEMPLATE(OPT_NAME) \ + auto *kh = static_cast(mrm->GetAnalysisResult(MoPhase_CHA, mod)); \ + ASSERT_NOT_NULL(kh); \ + std::unique_ptr funcOptImpl = std::make_unique(*mod, kh, TRACE_PHASE); \ + ASSERT_NOT_NULL(funcOptImpl); \ + FuncOptimizeIterator opt(PhaseName(), std::move(funcOptImpl)); \ opt.Run(); } // namespace maple #endif // MAPLE_PHASE_INCLUDE_PHASE_IMPL_H diff --git a/src/maple_phase/include/phase_manager.h b/src/maple_phase/include/phase_manager.h index e7302c2b57fb04370a7f221c393b94b12eb7099d..ca4bac4c11a49bd634f6d90d66e97b78081b31ce 100644 --- a/src/maple_phase/include/phase_manager.h +++ b/src/maple_phase/include/phase_manager.h @@ -76,7 +76,7 @@ class PhaseManager { return &allocator; } - MemPool *GetMemPool() { + MemPool *GetMemPool() const { return allocator.GetMemPool(); } diff --git a/src/maple_util/include/mpl_logging.h b/src/maple_util/include/mpl_logging.h index 71ae18b6c655a471ae2cacbc3a98549581f114e3..f18da763d65d2ec775b98b3599f6e4c2438a2994 100644 --- a/src/maple_util/include/mpl_logging.h +++ b/src/maple_util/include/mpl_logging.h @@ -164,7 +164,7 @@ class LogInfo { } static std::ostream &MapleLogger(LogLevel level = kLlLog); - static std::ios::fmtflags flags(); + static std::ios::fmtflags Flags(); void EmitLogForUser(enum LogNumberCode num, enum LogLevel ll, const char *fmt, ...) const; void EmitLogForUser(enum LogNumberCode num, enum LogLevel ll, const std::string &message) const; void EmitErrorMessage(const std::string &cond, const std::string &file, unsigned int line, diff --git a/src/maple_util/include/namemangler.h b/src/maple_util/include/namemangler.h index f6dcafc89b40487f1a86b311940c46d086e2ff06..ef54c2283b7d713de58f7c45d3b3194657263ca5 100644 --- a/src/maple_util/include/namemangler.h +++ b/src/maple_util/include/namemangler.h @@ -26,6 +26,7 @@ namespace namemangler { #define VTAB_PREFIX __vtb_ #define ITAB_PREFIX __itb_ +#define VTAB_AND_ITAB_PREFIX __vtb_and_itb_ #define ITAB_CONFLICT_PREFIX __itbC_ #define CLASSINFO_PREFIX __cinf_ #define CLASSINFO_RO_PREFIX __classinforo__ @@ -38,6 +39,7 @@ namespace namemangler { #define VTAB_PREFIX_STR TO_STR(VTAB_PREFIX) #define ITAB_PREFIX_STR TO_STR(ITAB_PREFIX) +#define VTAB_AND_ITAB_PREFIX_STR TO_STR(VTAB_AND_ITAB_PREFIX) #define ITAB_CONFLICT_PREFIX_STR TO_STR(ITAB_CONFLICT_PREFIX) #define CLASSINFO_PREFIX_STR TO_STR(CLASSINFO_PREFIX) #define CLASSINFO_RO_PREFIX_STR TO_STR(CLASSINFO_RO_PREFIX) @@ -63,8 +65,10 @@ static constexpr const char kMuidFuncDefMuidTabPrefixStr[] = "__muid_ro_func_def static constexpr const char kMuidDataDefMuidTabPrefixStr[] = "__muid_ro_data_def_muid_tab"; static constexpr const char kMuidFuncUndefMuidTabPrefixStr[] = "__muid_ro_func_undef_muid_tab"; static constexpr const char kMuidDataUndefMuidTabPrefixStr[] = "__muid_ro_data_undef_muid_tab"; -static constexpr const char kMuidVtabPrefixStr[] = "__muid_vtab"; -static constexpr const char kMuidItabPrefixStr[] = "__muid_itab"; +static constexpr const char kMuidVtabAndItabPrefixStr[] = "__muid_vtab_and_itab"; +static constexpr const char kMuidItabConflictPrefixStr[] = "__muid_itab_conflict"; +static constexpr const char kMuidColdVtabAndItabPrefixStr[] = "__muid_cold_vtab_and_itab"; +static constexpr const char kMuidColdItabConflictPrefixStr[] = "__muid_cold_itab_conflict"; static constexpr const char kMuidVtabOffsetPrefixStr[] = "__muid_vtab_offset_tab"; static constexpr const char kMuidFieldOffsetPrefixStr[] = "__muid_field_offset_tab"; static constexpr const char kMuidVtabOffsetKeyPrefixStr[] = "__muid_vtable_offset_key_tab"; diff --git a/src/maple_util/src/profile.cpp b/src/maple_util/src/profile.cpp index a46e751eaf8551beb1f2e955477f56f8cdaa8f64..3125f01676e6e20634885e9306343fe30160d641 100644 --- a/src/maple_util/src/profile.cpp +++ b/src/maple_util/src/profile.cpp @@ -107,10 +107,10 @@ std::string Profile::GetFunctionName(uint32 classIdx, uint32 methodIdx, uint32 s return funcName; } -void Profile::ParseFunc(const char *data, int fileNum) { +void Profile::ParseFunc(const char *data, int32 fileNum) { const MapleFileProf *funcProf = nullptr; const FunctionItem *funcItem = nullptr; - uint32 offset = 0; + size_t offset = 0; for (int32 mapleFileIdx = 0; mapleFileIdx < fileNum; ++mapleFileIdx) { funcProf = reinterpret_cast(data + offset); if (CheckDexValid(funcProf->idx)) { @@ -135,10 +135,10 @@ void Profile::ParseFunc(const char *data, int fileNum) { } } -void Profile::ParseIRFuncDesc(const char *data, int fileNum) { +void Profile::ParseIRFuncDesc(const char *data, int32 fileNum) { const MapleFileProf *funcProf = nullptr; const FunctionIRProfItem *funcItem = nullptr; - uint32 offset = 0; + size_t offset = 0; for (int32 mapleFileIdx = 0; mapleFileIdx < fileNum; ++mapleFileIdx) { funcProf = reinterpret_cast(data + offset); if (CheckDexValid(funcProf->idx)) { @@ -162,9 +162,9 @@ void Profile::ParseIRFuncDesc(const char *data, int fileNum) { } } -void Profile::ParseCounterTab(const char *data, int fileNum) { +void Profile::ParseCounterTab(const char *data, int32 fileNum) { const MapleFileProf *counterProf = nullptr; - uint32 offset = 0; + size_t offset = 0; for (int32 mapleFileIdx = 0; mapleFileIdx < fileNum; ++mapleFileIdx) { counterProf = reinterpret_cast(data + offset); if (CheckDexValid(counterProf->idx)) { @@ -180,9 +180,9 @@ void Profile::ParseCounterTab(const char *data, int fileNum) { } } -void Profile::ParseMeta(const char *data, int fileNum, std::unordered_set &metaData) const { +void Profile::ParseMeta(const char *data, int32 fileNum, std::unordered_set &metaData) const { const MapleFileProf *metaProf = nullptr; - uint32 offset = 0; + size_t offset = 0; for (int32 mapleFileIdx = 0; mapleFileIdx < fileNum; ++mapleFileIdx) { metaProf = reinterpret_cast(data + offset); if (CheckDexValid(metaProf->idx)) { @@ -198,9 +198,9 @@ void Profile::ParseMeta(const char *data, int fileNum, std::unordered_set(data + offset); if (CheckDexValid(metaProf->idx)) { @@ -219,7 +219,7 @@ void Profile::ParseReflectionStr(const char *data, int fileNum) { } void Profile::InitPreHot() { - const char *coreDexName = "core-all"; + std::string coreDexName = "core-all"; if (dexName.find(coreDexName) != std::string::npos) { for (auto &item : preClassHot) { classMeta.insert(item); @@ -238,7 +238,7 @@ bool Profile::DeCompress(const std::string &path, const std::string &dexNameInne InitPreHot(); bool res = true; std::ifstream in(path, std::ios::binary); - if (!in) { + if (!in.is_open()) { if (errno != ENOENT && errno != EACCES) { LogInfo::MapleLogger() << "WARN: DeCompress(" << "), failed to open " << path << '\n';; } @@ -295,12 +295,12 @@ bool Profile::DeCompress(const std::string &path, const std::string &dexNameInne } LogInfo::MapleLogger() << "str size print end " << '\n'; } - size_t idx = 0; + uint8_t idx = 0; for (idx = 0; idx < header->profileNum; ++idx) { ProfileDataInfo *profileDataInfo = &(header->data[idx]); if (debug) { LogInfo::MapleLogger() << "profile file num for type " << GetProfileNameByType(profileDataInfo->profileType) << - " " << static_cast(profileDataInfo->mapleFileNum) << '\n';; + " " << static_cast(profileDataInfo->mapleFileNum) << '\n'; } if (debug) { LogInfo::MapleLogger() << GetProfileNameByType(profileDataInfo->profileType) << " Start" << '\n'; @@ -478,7 +478,7 @@ std::unordered_set &Profile::GetMeta(uint8 type) { case kMethodMeta: return methodMeta; default: - CHECK_FATAL(0, "type not found"); + CHECK_FATAL(false, "type not found"); return classMeta; } } @@ -501,32 +501,32 @@ void Profile::Dump() const { std::ofstream outFile; outFile.open("prof.dump"); CHECK_FATAL(!outFile.is_open(), "open file failed"); - outFile << "classMeta profile start " <<'\n'; + outFile << "classMeta profile start " << '\n'; for (const auto &item : classMeta) { outFile << item << '\n'; } - outFile << "fieldMeta profile start " <<'\n'; + outFile << "fieldMeta profile start " << '\n'; for (const auto &item : fieldMeta) { outFile << item << '\n'; } - outFile << "methodMeta profile start " <<'\n'; + outFile << "methodMeta profile start " << '\n'; for (const auto &item : methodMeta) { outFile << item << '\n'; } - outFile << "literal profile start " <<'\n'; + outFile << "literal profile start " << '\n'; for (const auto &item : literal) { outFile << item << '\n'; } - outFile << "func profile start " <<'\n'; + outFile << "func profile start " << '\n'; for (const auto &item : funcProfData) { outFile << item.first << " " << static_cast((item.second).type) << " " << (item.second).callTimes << '\n'; } - outFile << "reflectStr profile start " <<'\n'; + outFile << "reflectStr profile start " << '\n'; for (const auto &item : reflectionStrData) { outFile << item.first << " " << static_cast(item.second) << '\n'; } diff --git a/src/mempool/include/maple_string.h b/src/mempool/include/maple_string.h index 2e78dbb911f43bb55824ff36d46b3315d0c52233..fd97636d9b6b01aeae62c3c040bc2c4837083d3a 100644 --- a/src/mempool/include/maple_string.h +++ b/src/mempool/include/maple_string.h @@ -1,5 +1,5 @@ /* - * Copyright (c) [2019] Huawei Technologies Co.,Ltd.All rights reserved. + * Copyright (c) [2019-2020] Huawei Technologies Co.,Ltd.All rights reserved. * * OpenArkCompiler is licensed under the Mulan PSL v1. * You can use this software according to the terms and conditions of the Mulan PSL v1. @@ -69,7 +69,7 @@ class MapleString { if (str == nullptr) { return *this; } - unsigned int size = strlen(str); + unsigned int size = static_cast(strlen(str)); CHECK_FATAL(size <= UINT_MAX - 1, "str too large"); // if data is null, old_size = 0, else +1 @@ -146,7 +146,7 @@ class MapleString { if (str == nullptr) { return *this; } - unsigned int size = strlen(str); + unsigned int size = static_cast(strlen(str)); unsigned int oldSize = (data == nullptr) ? 0 : (dataLength + 1); CHECK_FATAL(size <= UINT_MAX - oldSize, "str too large"); diff --git a/src/mempool/include/mempool.h b/src/mempool/include/mempool.h index 88bf1ad456a9442dd45a6ad30ef46b8e057f2d07..870f91c53516c6937951e2bf3f8b29f3da6b7d20 100644 --- a/src/mempool/include/mempool.h +++ b/src/mempool/include/mempool.h @@ -27,9 +27,6 @@ namespace maple { #ifdef _WIN32 #define FALSE 0 #define TRUE 1 -#else -constexpr bool FALSE = false; -constexpr bool TRUE = true; #endif // Class declaration diff --git a/src/mempool/include/mempool_allocator.h b/src/mempool/include/mempool_allocator.h index 6688eef95e8a55798d59026707609160cab8b369..06b234d89179f018a50c0eb0ceb0a5c926602d64 100644 --- a/src/mempool/include/mempool_allocator.h +++ b/src/mempool/include/mempool_allocator.h @@ -40,7 +40,7 @@ class MapleAllocator { return (memPool != nullptr) ? memPool->Malloc(bytes) : nullptr; } - MemPool *GetMemPool() { + MemPool *GetMemPool() const { return memPool; } diff --git a/src/mpl2mpl/include/muid_replacement.h b/src/mpl2mpl/include/muid_replacement.h index b4cbb019eb8b877e01240d063709af9f6f7642c8..06f721b6ae45b64d87b276ebea052774ccebf47a 100644 --- a/src/mpl2mpl/include/muid_replacement.h +++ b/src/mpl2mpl/include/muid_replacement.h @@ -32,8 +32,8 @@ constexpr int32_t kDecoupleAndLazy = 3; enum RangeIdx { // 0,1 entry is reserved for a stamp - kVtab = 2, - kItab = 3, + kVtabAndItab = 2, + kItabConflict = 3, kVtabOffset = 4, kFieldOffset = 5, kValueOffset = 6, diff --git a/src/mpl2mpl/src/gen_check_cast.cpp b/src/mpl2mpl/src/gen_check_cast.cpp index 0324b27fcbf2ce3a4d00de602173b55c73cdad3b..7ad5560510e71ed6e075faf9d02e9e04cbc7259c 100644 --- a/src/mpl2mpl/src/gen_check_cast.cpp +++ b/src/mpl2mpl/src/gen_check_cast.cpp @@ -22,6 +22,7 @@ namespace { constexpr char kMCCReflectThrowCastException[] = "MCC_Reflect_ThrowCastException"; constexpr char kMCCReflectCheckCastingNoArray[] = "MCC_Reflect_Check_Casting_NoArray"; constexpr char kMCCReflectCheckCastingArray[] = "MCC_Reflect_Check_Casting_Array"; +constexpr char kCastTargetClass[] = "castTargetClass"; } // namespace // This phase does two things: @@ -124,6 +125,20 @@ void CheckCastGenerator::GenCheckCast(StmtNode &stmt) { } else { MIRSymbol *classSt = GetOrCreateClassInfoSymbol(checkKlass->GetKlassName()); BaseNode *valueExpr = builder->CreateExprAddrof(0, *classSt); + + BaseNode *castClassReadNode = nullptr; + StmtNode *castClassAssign = nullptr; + BaseNode *opnd0 = callNode->GetNopndAt(0); + if ((opnd0 != nullptr) && (opnd0->GetOpCode() == OP_regread)) { + PregIdx castClassSymPregIdx = currFunc->GetPregTab()->CreatePreg(PTY_ref); + castClassAssign = builder->CreateStmtRegassign(PTY_ref, castClassSymPregIdx, valueExpr); + castClassReadNode = builder->CreateExprRegread(PTY_ref, castClassSymPregIdx); + } else { + MIRSymbol *castClassSym = + builder->GetOrCreateLocalDecl(kCastTargetClass, *GlobalTables::GetTypeTable().GetRef()); + castClassAssign = builder->CreateStmtDassign(*castClassSym, 0, valueExpr); + castClassReadNode = builder->CreateExprDread(*castClassSym); + } BaseNode *nullPtrConst = builder->CreateIntConst(0, PTY_ptr); const size_t callNodeNopndSize2 = callNode->GetNopndSize(); CHECK_FATAL(callNodeNopndSize2 > 0, "container check"); @@ -137,14 +152,15 @@ void CheckCastGenerator::GenCheckCast(StmtNode &stmt) { BaseNode *opnd = callNode->GetNopndAt(0); BaseNode *ireadExpr = GetObjectShadow(opnd); BaseNode *innerCond = builder->CreateExprCompare(OP_ne, *GlobalTables::GetTypeTable().GetUInt1(), - *GlobalTables::GetTypeTable().GetPtrType(), valueExpr, + *GlobalTables::GetTypeTable().GetPtrType(), castClassReadNode, ireadExpr); auto *innerIfStmt = static_cast(builder->CreateStmtIf(innerCond)); MapleVector args(builder->GetCurrentFuncCodeMpAllocator()->Adapter()); - args.push_back(valueExpr); + args.push_back(castClassReadNode); args.push_back(opnd); StmtNode *dassignStmt = builder->CreateStmtCall(checkCastingNoArray->GetPuidx(), args); innerIfStmt->GetThenPart()->AddStatement(dassignStmt); + ifStmt->GetThenPart()->AddStatement(castClassAssign); ifStmt->GetThenPart()->AddStatement(innerIfStmt); currFunc->GetBody()->InsertBefore(&stmt, ifStmt); } @@ -175,16 +191,12 @@ void CheckCastGenerator::GenCheckCast(StmtNode &stmt) { elemClassSt = GetOrCreateClassInfoSymbol(elementName); } BaseNode *valueExpr = builder->CreateExprAddrof(0, *elemClassSt); - UStrIdx strIdx = GlobalTables::GetUStrTable().GetOrCreateStrIdxFromName(jarrayType->GetJavaName()); - auto *signatureNode = currFunc->GetCodeMempool()->New(strIdx); - signatureNode->SetPrimType(PTY_ptr); MapleVector opnds(currFunc->GetCodeMempoolAllocator().Adapter()); opnds.push_back(valueExpr); const size_t callNodeNopndSize3 = callNode->GetNopndSize(); CHECK_FATAL(callNodeNopndSize3 > 0, "container check"); opnds.push_back(callNode->GetNopndAt(0)); opnds.push_back(builder->CreateIntConst(dim, PTY_ptr)); - opnds.push_back(signatureNode); StmtNode *dassignStmt = builder->CreateStmtCall(checkCastingArray->GetPuidx(), opnds); currFunc->GetBody()->InsertBefore(&stmt, dassignStmt); } else { diff --git a/src/mpl2mpl/src/muid_replacement.cpp b/src/mpl2mpl/src/muid_replacement.cpp index ff58e0bfd0d57c8d4ad003d80b81840349ee8844..cc53fa78f52ad6c15684001a97fa2364c92246ca 100644 --- a/src/mpl2mpl/src/muid_replacement.cpp +++ b/src/mpl2mpl/src/muid_replacement.cpp @@ -830,7 +830,7 @@ void MUIDReplacement::GenerateRangeTable() { builder->AddIntFieldConst(rangeTabEntryType, *entryConst, fieldID++, mplMd5.data.words[1]); rangeTabConst->PushBack(entryConst); } - for (uint32 i = RangeIdx::kVtab; i < RangeIdx::kOldMaxNum; ++i) { + for (uint32 i = RangeIdx::kVtabAndItab; i < RangeIdx::kOldMaxNum; ++i) { // Use an integer to mark which entry is for which table MIRAggConst *entryConst = GetMIRModule().GetMemPool()->New(GetMIRModule(), rangeTabEntryType); uint32 fieldID = 1;