diff --git a/BUILD.gn b/BUILD.gn index 1627e7ed69c728c252d5c27cb8395fd8aa2d2463..2a8bc19a8ca8639ae62c11dc24fea6cbe8fb58bb 100644 --- a/BUILD.gn +++ b/BUILD.gn @@ -14,19 +14,19 @@ # group("maple") { deps = [ - "${MAPLE_ROOT}/src:maple", + "${MAPLEALL_ROOT}:maple", ] } group("irbuild") { deps = [ - "${MAPLE_ROOT}/src:irbuild", + "${MAPLEALL_ROOT}:irbuild", ] } group("mplfe") { deps = [ - "${MAPLE_ROOT}/src:mplfe", + "${MPLFE_ROOT}:mplfe", ] } diff --git a/build/config/BUILDCONFIG.gn b/build/config/BUILDCONFIG.gn index 7b0a0272447bfd49c0334fb0f6a015bd9e37866d..a587a85778bd0435729dab252051b7b9166184b5 100644 --- a/build/config/BUILDCONFIG.gn +++ b/build/config/BUILDCONFIG.gn @@ -36,6 +36,7 @@ OPENSOURCE_OUTPUT = "${MAPLE_ROOT}/output" AST2MPL_ROOT= "${MAPLE_ROOT}/src/ast2mpl" IS_AST2MPL_EXISTS = getenv("IS_AST2MPL_EXISTS") MAPLEALL_ROOT = "${MAPLE_ROOT}/src" +MPLFE_ROOT = "${MAPLE_ROOT}/src/mplfe" THIRD_PARTY_ROOT = "${MAPLE_ROOT}/src/third_party" # Put all built library files under lib diff --git a/src/BUILD.gn b/src/BUILD.gn index 6403e41afb00a8c86becc75e0a6b04cfc5338662..df5383bd8f6a3c1539ac70a3ee78dbcefad7cb93 100644 --- a/src/BUILD.gn +++ b/src/BUILD.gn @@ -52,12 +52,6 @@ group("irbuild") { ] } -group("mplfe") { - deps = [ - "${MAPLEALL_ROOT}/mplfe:mplfe", - ] -} - group("maplegen") { deps = [ "${MAPLEALL_ROOT}/maple_be:maplegen", diff --git a/src/bin/jbc2mpl b/src/bin/jbc2mpl index 5c8c49c614a8a67c30a2fb551cae7ceaf6f3e732..a43b06066043118a424f99594593b8d23e5121ed 100755 Binary files a/src/bin/jbc2mpl and b/src/bin/jbc2mpl differ diff --git a/src/bin/maple b/src/bin/maple index c14f4b856aeebb1fc61dd6c896ef9b9cbb194821..1325a895ee47d3899e033741176b33dd703d7f49 100755 Binary files a/src/bin/maple and b/src/bin/maple differ diff --git a/src/deplibs/libmplphase.a b/src/deplibs/libmplphase.a index 62b849b1a308b35f7930bfce3dc445bc56caeb21..88b01e34d3aa2c7c117f32a89e3671e38d08f322 100644 Binary files a/src/deplibs/libmplphase.a and b/src/deplibs/libmplphase.a differ diff --git a/src/deplibs/libmplutil.a b/src/deplibs/libmplutil.a index 29d0acf27c6212c040d864593169968d50e71d41..bf31a7baec611102050f3e8b51cca6ce0974c064 100644 Binary files a/src/deplibs/libmplutil.a and b/src/deplibs/libmplutil.a differ diff --git a/src/maple_be/include/be/becommon.h b/src/maple_be/include/be/becommon.h index 16e4fa1053cdebe3cf9f892c5a8464463a538c25..0803cf69aca88ae35019c4ef0dfde042f90086e1 100644 --- a/src/maple_be/include/be/becommon.h +++ b/src/maple_be/include/be/becommon.h @@ -163,7 +163,7 @@ class BECommon { typeSizeTable.emplace_back(value); } - void AddTypeSizeAndAlign(TyIdx tyIdx, uint64 value) { + void AddTypeSizeAndAlign(const TyIdx tyIdx, uint64 value) { if (typeSizeTable.size() == tyIdx) { typeSizeTable.emplace_back(value); tableAlignTable.emplace_back(value); diff --git a/src/maple_be/include/cg/aarch64/aarch64_cg.h b/src/maple_be/include/cg/aarch64/aarch64_cg.h index 5fb7dad36895094bc357c92f552fba28ad66237b..90fd94371a8edae6c979a55e89e712290018978a 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_cg.h +++ b/src/maple_be/include/cg/aarch64/aarch64_cg.h @@ -28,7 +28,7 @@ class GCTIBKey { public: GCTIBKey(MapleAllocator &allocator, uint32 rcHeader, std::vector &patternWords) : header(rcHeader), bitMapWords(allocator.Adapter()) { - bitMapWords.insert(bitMapWords.begin(), patternWords.begin(), patternWords.end()); + (void)bitMapWords.insert(bitMapWords.begin(), patternWords.begin(), patternWords.end()); } ~GCTIBKey() = default; diff --git a/src/maple_be/include/cg/aarch64/aarch64_color_ra.h b/src/maple_be/include/cg/aarch64/aarch64_color_ra.h index 7e3d5ced79644d9828f0968a654123ac295eb77c..1c801b68b48d9c269cf2676a53267c1bb3b1aaa9 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_color_ra.h +++ b/src/maple_be/include/cg/aarch64/aarch64_color_ra.h @@ -448,7 +448,7 @@ class LiveRange { } void InsertElemToPrefs(regno_t regNO) { - prefs.insert(regNO); + (void)prefs.insert(regNO); } const MapleMap &GetLuMap() const { @@ -1151,7 +1151,7 @@ class GraphColorRegAllocator : public AArch64RegAllocator { bool IsUnconcernedReg(const RegOperand ®Opnd) const; LiveRange *NewLiveRange(); void CalculatePriority(LiveRange &lr) const; - bool CreateLiveRangeHandleLocal(regno_t regNO, BB &bb, bool isDef); + bool CreateLiveRangeHandleLocal(regno_t regNO, const BB &bb, bool isDef); LiveRange *CreateLiveRangeAllocateAndUpdate(regno_t regNO, const BB &bb, bool isDef, uint32 currId); bool CreateLiveRange(regno_t regNO, BB &bb, bool isDef, uint32 currPoint, bool updateCount); bool SetupLiveRangeByOpHandlePhysicalReg(RegOperand &op, Insn &insn, regno_t regNO, bool isDef); @@ -1206,7 +1206,7 @@ class GraphColorRegAllocator : public AArch64RegAllocator { MemOperand *GetReuseMem(uint32 vregNO, uint32 size, RegType regType); MemOperand *GetSpillMem(uint32 vregNO, bool isDest, Insn &insn, AArch64reg regNO, bool &isOutOfRange); bool SetAvailableSpillReg(std::unordered_set &cannotUseReg, LiveRange &lr, uint64 &usedRegMask); - void CollectCannotUseReg(std::unordered_set &cannotUseReg, LiveRange &lr, Insn &insn); + void CollectCannotUseReg(std::unordered_set &cannotUseReg, const LiveRange &lr, Insn &insn); regno_t PickRegForSpill(uint64 &usedRegMask, RegType regType, uint32 spillIdx, bool &needSpillLr); bool SetRegForSpill(LiveRange &lr, Insn &insn, uint32 spillIdx, uint64 &usedRegMask, bool isDef); bool GetSpillReg(Insn &insn, LiveRange &lr, uint32 &spillIdx, uint64 &usedRegMask, bool isDef); @@ -1236,7 +1236,7 @@ class GraphColorRegAllocator : public AArch64RegAllocator { void ComputeBBForNewSplit(LiveRange &newLr, LiveRange &oldLr); void ClearLrBBFlags(const std::set &member); void ComputeBBForOldSplit(LiveRange &newLr, LiveRange &oldLr); - bool LrCanBeColored(LiveRange &lr, BB &bbAdded, std::unordered_set &conflictRegs); + bool LrCanBeColored(const LiveRange &lr, const BB &bbAdded, std::unordered_set &conflictRegs); void MoveLrBBInfo(LiveRange &oldLr, LiveRange &newLr, BB &bb); bool ContainsLoop(const CGFuncLoops &loop, const std::set &loops) const; void GetAllLrMemberLoops(LiveRange &lr, std::set &loop); diff --git a/src/maple_be/include/cg/aarch64/aarch64_insn.h b/src/maple_be/include/cg/aarch64/aarch64_insn.h index 03e6f9547e5f66657167ec660eda5f4a0e7433e4..6de85b7f7310415faf0ddc166df75e53531cf400 100644 --- a/src/maple_be/include/cg/aarch64/aarch64_insn.h +++ b/src/maple_be/include/cg/aarch64/aarch64_insn.h @@ -155,7 +155,7 @@ class AArch64Insn : public Insn { uint32 GetLatencyType() const override; - bool CheckRefField(int32 opndIndex, bool isEmit) const; + bool CheckRefField(size_t opndIndex, bool isEmit) const; private: void CheckOpnd(Operand &opnd, OpndProp &mopd) const; diff --git a/src/maple_be/include/cg/cgbb.h b/src/maple_be/include/cg/cgbb.h index 2fa93935384353ab02aad66f35f6b4f56ea80867..aaabd1542e30b311130f17188f37e41de9503175 100644 --- a/src/maple_be/include/cg/cgbb.h +++ b/src/maple_be/include/cg/cgbb.h @@ -449,7 +449,7 @@ class BB { return liveInRegNO; } void InsertLiveInRegNO(regno_t arg) { - liveInRegNO.insert(arg); + (void)liveInRegNO.insert(arg); } void EraseLiveInRegNO(MapleSet::iterator it) { liveInRegNO.erase(it); @@ -464,7 +464,7 @@ class BB { return liveOutRegNO; } void InsertLiveOutRegNO(regno_t arg) { - liveOutRegNO.insert(arg); + (void)liveOutRegNO.insert(arg); } void EraseLiveOutRegNO(MapleSet::iterator it) { liveOutRegNO.erase(it); diff --git a/src/maple_be/include/cg/cgfunc.h b/src/maple_be/include/cg/cgfunc.h index 17d304c512d48983ceb61c4cf74487291f290122..3604b99f6648472f6d3963267a16775069447d0a 100644 --- a/src/maple_be/include/cg/cgfunc.h +++ b/src/maple_be/include/cg/cgfunc.h @@ -51,7 +51,7 @@ class SpillMemOperandSet { virtual ~SpillMemOperandSet() = default; void Add(MemOperand &op) { - reuseSpillLocMem.insert(&op); + (void)reuseSpillLocMem.insert(&op); } void Remove(MemOperand &op) { @@ -662,7 +662,7 @@ class CGFunc { return sortedBBs; } - void SetSortedBBs(MapleVector &bbVec) { + void SetSortedBBs(const MapleVector &bbVec) { sortedBBs = bbVec; } @@ -674,7 +674,7 @@ class CGFunc { return lrVec; } - void SetLrVec(MapleVector &newLrVec) { + void SetLrVec(const MapleVector &newLrVec) { lrVec = newLrVec; } #endif /* TARGARM32 */ diff --git a/src/maple_be/include/cg/datainfo.h b/src/maple_be/include/cg/datainfo.h index bb374b9995e8f60ae3b8c148a3ed3dc77d012506..b4cc97e187f9a23c15fb63b5724434a6f57db538 100644 --- a/src/maple_be/include/cg/datainfo.h +++ b/src/maple_be/include/cg/datainfo.h @@ -140,7 +140,7 @@ class DataInfo { auto infoSize = static_cast(info.size()); for (int32 i = 0; i < infoSize; i++) { if (info[i] != 0ULL) { - index.insert(i); + (void)index.insert(i); } } } @@ -162,7 +162,7 @@ class DataInfo { if (index == k64BitSize) { /* when the highest bit is 1, the shift operation will cause error, need special treatment. */ result = i * kWordSize + (index - 1); - wordRes.insert(result); + (void)wordRes.insert(result); break; } if (firstTime) { @@ -174,7 +174,7 @@ class DataInfo { baseWord = 0; } result += baseWord + offset; - wordRes.insert(result); + (void)wordRes.insert(result); word = word >> static_cast(index); } } diff --git a/src/maple_be/include/cg/ebo.h b/src/maple_be/include/cg/ebo.h index 8485973d1556286fb30dd914e92e716aee8e020e..49bbed1c048da030242ca293aaf07836fb0a138a 100644 --- a/src/maple_be/include/cg/ebo.h +++ b/src/maple_be/include/cg/ebo.h @@ -145,7 +145,7 @@ class Ebo { bool HasAssignedReg(const Operand &opnd) const; bool IsOfSameClass(const Operand &op0, const Operand &op1) const; bool OpndAvailableInBB(const BB &bb, OpndInfo *info); - bool ForwardPropCheck(const Operand *opndReplace, OpndInfo &opndInfo, const Operand &opnd, Insn &insn); + bool ForwardPropCheck(const Operand *opndReplace, const OpndInfo &opndInfo, const Operand &opnd, Insn &insn); bool RegForwardCheck(Insn &insn, const Operand &opnd, const Operand *opndReplace, Operand &oldOpnd, const OpndInfo *tmpInfo); bool IsNotVisited(const BB &bb) { diff --git a/src/maple_be/include/cg/emit.h b/src/maple_be/include/cg/emit.h index aad06eac189e7d655d336a613134995a460df7d6..b605ab7d79ce1f903ed334a1f9973801704481dc 100644 --- a/src/maple_be/include/cg/emit.h +++ b/src/maple_be/include/cg/emit.h @@ -253,7 +253,7 @@ class Emitter { } void InsertHugeSoTarget(const std::string &target) { - hugeSoTargets.insert(target); + (void)hugeSoTargets.insert(target); } #endif diff --git a/src/maple_be/include/cg/loop.h b/src/maple_be/include/cg/loop.h index 03ad0a5c392100575cc8ed748a7abb15ccfab8c2..5c8c864b6a348047978a9a6e69931dd67203ec76 100644 --- a/src/maple_be/include/cg/loop.h +++ b/src/maple_be/include/cg/loop.h @@ -64,13 +64,13 @@ class LoopHierarchy { return loopMembers.erase(it); } void InsertLoopMembers(BB &bb) { - loopMembers.insert(&bb); + (void)loopMembers.insert(&bb); } void InsertBackedge(BB &bb) { - backedge.insert(&bb); + (void)backedge.insert(&bb); } void InsertInnerLoops(LoopHierarchy &loop) { - innerLoops.insert(&loop); + (void)innerLoops.insert(&loop); } void SetHeader(BB &bb) { header = &bb; diff --git a/src/maple_be/mdgen/include/mdlexer.h b/src/maple_be/mdgen/include/mdlexer.h index 5445b2fd4385888b4fcfebe14a87b81af989f924..033a40b8787993724a1af35210683ee732cc6e55 100644 --- a/src/maple_be/mdgen/include/mdlexer.h +++ b/src/maple_be/mdgen/include/mdlexer.h @@ -31,9 +31,9 @@ class MDLexer { MDLexer() { keywords.clear(); /* input can be improved */ - keywords.insert(std::make_pair("Def", kMDDef)); - keywords.insert(std::make_pair("Class", kMDClass)); - keywords.insert(std::make_pair("DefType", kMDDefType)); + (void)keywords.insert(std::make_pair("Def", kMDDef)); + (void)keywords.insert(std::make_pair("Class", kMDClass)); + (void)keywords.insert(std::make_pair("DefType", kMDDefType)); }; ~MDLexer() { if (mdFileInternal.is_open()) { diff --git a/src/maple_be/mdgen/src/mdrecord.cpp b/src/maple_be/mdgen/src/mdrecord.cpp index 88b0602b3cb3967fed816516deb503c565e7fdaa..22122490a0dfde06ceb25ee47124b4d61fa849ef 100644 --- a/src/maple_be/mdgen/src/mdrecord.cpp +++ b/src/maple_be/mdgen/src/mdrecord.cpp @@ -45,7 +45,7 @@ const MDObject &MDClass::GetOneMDObject(size_t index) const { void MDClass::AddClassMember(MDObject inputObj) { mdObjects.emplace_back(inputObj); - childObjNames.insert(inputObj.GetIdx()); + (void)childObjNames.insert(inputObj.GetIdx()); } bool MDClass::IsClassMember(unsigned int curIdx) const { @@ -96,11 +96,11 @@ void MDClassRange::ModifyStrTyInTable(const std::string &inStr, RecordType newTy } void MDClassRange::AddDefinedType(unsigned int typesName, std::set typesSet) { - definedTypes.insert(std::make_pair(typesName, typesSet)); + (void)definedTypes.insert(std::make_pair(typesName, typesSet)); } void MDClassRange::AddMDClass(MDClass curClass) { - allClasses.insert(std::make_pair(curClass.GetClassIdx(), curClass)); + (void)allClasses.insert(std::make_pair(curClass.GetClassIdx(), curClass)); } void MDClassRange::FillMDClass(unsigned int givenIdx, const MDObject &insertObj) { diff --git a/src/maple_be/src/be/becommon.cpp b/src/maple_be/src/be/becommon.cpp index 67d77c17c0c8e280666a37b4dc4cf286626794f4..b779b6d210324596b3852dda966c2d0b6321143d 100644 --- a/src/maple_be/src/be/becommon.cpp +++ b/src/maple_be/src/be/becommon.cpp @@ -26,7 +26,7 @@ using namespace maple; BECommon::BECommon(MIRModule &mod) : mirModule(mod), typeSizeTable(GlobalTables::GetTypeTable().GetTypeTable().size(), 0, mirModule.GetMPAllocator().Adapter()), - tableAlignTable(GlobalTables::GetTypeTable().GetTypeTable().size(), mirModule.IsCModule(), + tableAlignTable(GlobalTables::GetTypeTable().GetTypeTable().size(), static_cast(mirModule.IsCModule()), mirModule.GetMPAllocator().Adapter()), structFieldCountTable(GlobalTables::GetTypeTable().GetTypeTable().size(), 0, mirModule.GetMPAllocator().Adapter()), diff --git a/src/maple_be/src/be/lower.cpp b/src/maple_be/src/be/lower.cpp index 056ef9bb52e0738ce85ae4829cd5922bda1dc830..4675920010c2bdfe9e471fea49509fa11fb0b5e3 100644 --- a/src/maple_be/src/be/lower.cpp +++ b/src/maple_be/src/be/lower.cpp @@ -273,10 +273,10 @@ BaseNode *CGLowerer::LowerArrayDim(ArrayNode &array, int32 dim) { BaseNode *mpyNode = mirModule.CurFuncCodeMemPool()->New(OP_mul); BaseNode *item = NodeConvert(array.GetPrimType(), *array.GetDim(mirModule, GlobalTables::GetTypeTable(), dim - 1)); if (mirModule.IsCModule()) { - item = NodeConvert(array.GetPrimType(), *array.GetIndex(i)); + item = NodeConvert(array.GetPrimType(), *array.GetIndex(static_cast(static_cast(i)))); int64 offsetSize = 1; - for (int j = i + 1; j < dim; j++) { - offsetSize *= arrayType->GetSizeArrayItem(j); + for (int32 j = i + 1; j < dim; ++j) { + offsetSize *= arrayType->GetSizeArrayItem(static_cast(j)); } MIRIntConst *offsetCst = mirModule.CurFuncCodeMemPool()->New( offsetSize, *GlobalTables::GetTypeTable().GetTypeFromTyIdx(array.GetPrimType())); @@ -1831,7 +1831,7 @@ StmtNode *CGLowerer::LowerIntrinsicopDassign(const DassignNode &dsNode, AddrofNode *addrofNode = mirBuilder->CreateAddrof(*dst, PTY_a32); MapleVector newOpnd(mirModule.CurFuncCodeMemPoolAllocator()->Adapter()); newOpnd.emplace_back(addrofNode); - newOpnd.insert(newOpnd.end(), nOpnds.begin(), nOpnds.end()); + (void)newOpnd.insert(newOpnd.end(), nOpnds.begin(), nOpnds.end()); CallNode *callStmt = mirModule.CurFuncCodeMemPool()->New(mirModule, OP_call); callStmt->SetPUIdx(st->GetFunction()->GetPuidx()); callStmt->SetNOpnd(newOpnd); @@ -1890,7 +1890,7 @@ BaseNode *CGLowerer::LowerJavascriptIntrinsicop(IntrinsicopNode &intrinNode, con AddrofNode *addrofNode = mirBuilder->CreateAddrof(*tmpSt, PTY_a32); MapleVector newOpnd(mirModule.CurFuncCodeMemPoolAllocator()->Adapter()); newOpnd.emplace_back(addrofNode); - newOpnd.insert(newOpnd.end(), nOpnds.begin(), nOpnds.end()); + (void)newOpnd.insert(newOpnd.end(), nOpnds.begin(), nOpnds.end()); CallNode *callStmt = mirModule.CurFuncCodeMemPool()->New(mirModule, OP_call); callStmt->SetPUIdx(st->GetFunction()->GetPuidx()); callStmt->SetNOpnd(newOpnd); diff --git a/src/maple_be/src/be/switch_lowerer.cpp b/src/maple_be/src/be/switch_lowerer.cpp index a29029cff0af137babad8466411e28372d8dc5b4..89a2ad1958b3fddab0bcfcbd378b14e728f5ecc1 100644 --- a/src/maple_be/src/be/switch_lowerer.cpp +++ b/src/maple_be/src/be/switch_lowerer.cpp @@ -59,7 +59,8 @@ void SwitchLowerer::FindClusters(MapleVector &clusters) { while (i < length - kClusterSwitchCutoff) { for (int32 j = length - 1; j > i; --j) { float tmp1 = static_cast(j - i); - float tmp2 = static_cast(stmt->GetCasePair(j).first) - static_cast(stmt->GetCasePair(i).first); + float tmp2 = static_cast(stmt->GetCasePair(static_cast(static_cast(j))).first) - + static_cast(stmt->GetCasePair(static_cast(static_cast(i))).first); if (((j - i) >= kClusterSwitchCutoff) && (tmp2 < kMaxRangeGotoTableSize) && ((tmp1 / tmp2) >= kClusterSwitchDensity)) { diff --git a/src/maple_be/src/cg/aarch64/aarch64_cg.cpp b/src/maple_be/src/cg/aarch64/aarch64_cg.cpp index c6b451f6ded3678c00e9618f6d0fca89b28737b9..91140af015926b0fa695448548417b4d219baf97 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_cg.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_cg.cpp @@ -174,8 +174,8 @@ void AArch64CG::FindOrCreateRepresentiveSym(std::vector &bitmapWords, ui if (gcTIBName.compare("MCC_GCTIB__Ljava_2Flang_2FObject_3B") == 0) { ptn->SetName("MCC_GCTIB__Ljava_2Flang_2FObject_3B"); } - keyPatternMap.insert(std::make_pair(key, ptn)); - symbolPatternMap.insert(std::make_pair(gcTIBName, ptn)); + (void)keyPatternMap.insert(std::make_pair(key, ptn)); + (void)symbolPatternMap.insert(std::make_pair(gcTIBName, ptn)); /* Emit GCTIB pattern */ std::string ptnString = "\t.type " + ptn->GetName() + ", %object\n" + "\t.data\n" + "\t.align 3\n"; @@ -221,7 +221,7 @@ void AArch64CG::FindOrCreateRepresentiveSym(std::vector &bitmapWords, ui keyPatternMap[key] = ptn; } } else { - symbolPatternMap.insert(make_pair(gcTIBName, iter->second)); + (void)symbolPatternMap.insert(make_pair(gcTIBName, iter->second)); } } diff --git a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index bbd4eba2a29b96955a0fb15d14d01ec481b1e150..3a5f6597130bcfa7d80af1fa365df059aab8cf2b 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1976,12 +1976,13 @@ void AArch64CGFunc::SelectAdd(Operand &resOpnd, Operand &opnd0, Operand &opnd1, if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, - immOpnd->GetSize(), immOpnd->IsSignedValue()); + ImmOperand &immOpnd2 = + CreateImmOperand(static_cast(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits), + immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xaddrri24 : MOP_waddrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, opnd0, immOpnd2, addSubLslOperand); GetCurBB()->AppendInsn(newInsn); - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(static_cast(kMaxImmVal12Bits)); newOpnd0 = &resOpnd; } /* process lower 12 bits */ @@ -2077,12 +2078,13 @@ void AArch64CGFunc::SelectSub(Operand &resOpnd, Operand &opnd0, Operand &opnd1, if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, - immOpnd->GetSize(), immOpnd->IsSignedValue()); + ImmOperand &immOpnd2 = + CreateImmOperand(static_cast(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits), + immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xsubrri24 : MOP_wsubrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, *opnd0Bak, immOpnd2, addSubLslOperand); GetCurBB()->AppendInsn(newInsn); - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(static_cast(kMaxImmVal12Bits)); opnd0Bak = &resOpnd; } /* process lower 12 bits */ @@ -5433,11 +5435,11 @@ void AArch64CGFunc::SelectLibCall(const std::string &funcName, std::vector vec; std::vector vecAt; for (size_t i = 1; i < opndVec.size(); ++i) { - vec.emplace_back(GlobalTables::GetTypeTable().GetTypeTable()[static_cast(primType)]->GetTypeIndex()); + vec.emplace_back(GlobalTables::GetTypeTable().GetTypeTable()[static_cast(primType)]->GetTypeIndex()); vecAt.emplace_back(TypeAttrs()); } - MIRType *retType = GlobalTables::GetTypeTable().GetTypeTable().at(static_cast(primType)); + MIRType *retType = GlobalTables::GetTypeTable().GetTypeTable().at(static_cast(primType)); st->SetTyIdx(GetBecommon().BeGetOrCreateFunctionType(retType->GetTypeIndex(), vec, vecAt)->GetTypeIndex()); if (GetCG()->GenerateVerboseCG()) { @@ -5452,7 +5454,7 @@ void AArch64CGFunc::SelectLibCall(const std::string &funcName, std::vectorNew(*GetFuncScopeAllocator()); for (size_t i = 1; i < opndVec.size(); ++i) { MIRType *ty; - ty = GlobalTables::GetTypeTable().GetTypeTable()[static_cast(primType)]; + ty = GlobalTables::GetTypeTable().GetTypeTable()[static_cast(primType)]; Operand *stOpnd = opndVec[i]; if (stOpnd->GetKind() != Operand::kOpdRegister) { stOpnd = &SelectCopy(*stOpnd, primType, primType); @@ -5565,8 +5567,9 @@ void AArch64CGFunc::SelectAddAfterInsn(Operand &resOpnd, Operand &opnd0, Operand if (!(immOpnd->IsInBitSize(kMaxImmVal12Bits, 0) || immOpnd->IsInBitSize(kMaxImmVal12Bits, kMaxImmVal12Bits))) { /* process higher 12 bits */ - ImmOperand &immOpnd2 = CreateImmOperand(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits, - immOpnd->GetSize(), immOpnd->IsSignedValue()); + ImmOperand &immOpnd2 = + CreateImmOperand(static_cast(static_cast(immOpnd->GetValue()) >> kMaxImmVal12Bits), + immOpnd->GetSize(), immOpnd->IsSignedValue()); mOpCode = is64Bits ? MOP_xaddrri24 : MOP_waddrri24; Insn &newInsn = GetCG()->BuildInstruction(mOpCode, resOpnd, opnd0, immOpnd2, addSubLslOperand); if (isDest) { @@ -5575,7 +5578,7 @@ void AArch64CGFunc::SelectAddAfterInsn(Operand &resOpnd, Operand &opnd0, Operand insn.GetBB()->InsertInsnBefore(insn, newInsn); } /* get lower 12 bits value */ - immOpnd->ModuloByPow2(kMaxImmVal12Bits); + immOpnd->ModuloByPow2(static_cast(kMaxImmVal12Bits)); newOpnd0 = &resOpnd; } /* process lower 12 bits value */ @@ -5668,7 +5671,7 @@ MemOperand *AArch64CGFunc::GetOrCreatSpillMem(regno_t vrNum) { if (it != reuseSpillLocMem.end()) { MemOperand *memOpnd = it->second->GetOne(); if (memOpnd != nullptr) { - spillRegMemOperands.insert(std::pair(vrNum, memOpnd)); + (void)spillRegMemOperands.insert(std::pair(vrNum, memOpnd)); return memOpnd; } } @@ -5678,7 +5681,7 @@ MemOperand *AArch64CGFunc::GetOrCreatSpillMem(regno_t vrNum) { AArch64OfstOperand *offsetOpnd = memPool->New(offset, k64BitSize); MemOperand *memOpnd = memPool->New(AArch64MemOperand::kAddrModeBOi, dataSize, baseOpnd, nullptr, offsetOpnd, nullptr); - spillRegMemOperands.insert(std::pair(vrNum, memOpnd)); + (void)spillRegMemOperands.insert(std::pair(vrNum, memOpnd)); return memOpnd; } else { return p->second; @@ -5699,10 +5702,10 @@ MemOperand *AArch64CGFunc::GetPseudoRegisterSpillMemoryOperand(PregIdx i) { MemOperand &memOpnd = GetOrCreateMemOpnd(AArch64MemOperand::kAddrModeBOi, bitLen, &base, nullptr, &ofstOpnd, nullptr); if (IsImmediateOffsetOutOfRange(static_cast(memOpnd), bitLen)) { MemOperand &newMemOpnd = SplitOffsetWithAddInstruction(static_cast(memOpnd), bitLen); - pRegSpillMemOperands.insert(std::pair(i, &newMemOpnd)); + (void)pRegSpillMemOperands.insert(std::pair(i, &newMemOpnd)); return &newMemOpnd; } - pRegSpillMemOperands.insert(std::pair(i, &memOpnd)); + (void)pRegSpillMemOperands.insert(std::pair(i, &memOpnd)); return &memOpnd; } diff --git a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp index 73bdbc0dc7a7b4d3d4088a28f95f58c27c73c678..6f9e877b23d9c5c2cb28c8a3b8dee2bdd989a14c 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_color_ra.cpp @@ -333,10 +333,10 @@ void GraphColorRegAllocator::InitFreeRegPool() { if (JAVALANG && AArch64Abi::IsSpillRegInRA(static_cast(regNO), needExtraSpillReg)) { if (AArch64isa::IsGPRegister(static_cast(regNO))) { /* Preset int spill registers */ - intSpillRegSet.insert(regNO - R0); + (void)intSpillRegSet.insert(regNO - R0); } else { /* Preset float spill registers */ - fpSpillRegSet.insert(regNO - V0); + (void)fpSpillRegSet.insert(regNO - V0); } continue; } @@ -354,16 +354,16 @@ void GraphColorRegAllocator::InitFreeRegPool() { continue; } if (AArch64Abi::IsCalleeSavedReg(static_cast(regNO))) { - intCalleeRegSet.insert(regNO - R0); + (void)intCalleeRegSet.insert(regNO - R0); } else { - intCallerRegSet.insert(regNO - R0); + (void)intCallerRegSet.insert(regNO - R0); } ++intNum; } else { if (AArch64Abi::IsCalleeSavedReg(static_cast(regNO))) { - fpCalleeRegSet.insert(regNO - V0); + (void)fpCalleeRegSet.insert(regNO - V0); } else { - fpCallerRegSet.insert(regNO - V0); + (void)fpCallerRegSet.insert(regNO - V0); } ++fpNum; } @@ -439,7 +439,7 @@ LiveRange *GraphColorRegAllocator::NewLiveRange() { } /* Create local info for LR. return true if reg is not local. */ -bool GraphColorRegAllocator::CreateLiveRangeHandleLocal(regno_t regNO, BB &bb, bool isDef) { +bool GraphColorRegAllocator::CreateLiveRangeHandleLocal(regno_t regNO, const BB &bb, bool isDef) { if (FindIn(bb.GetLiveInRegNO(), regNO) || FindIn(bb.GetLiveOutRegNO(), regNO)) { return true; } @@ -508,7 +508,7 @@ bool GraphColorRegAllocator::CreateLiveRange(regno_t regNO, BB &bb, bool isDef, lr->SetRegNO(regNO); lr->SetIsNonLocal(isNonLocal); if (isDef) { - vregLive.erase(regNO); + (void)vregLive.erase(regNO); #ifdef OPTIMIZE_FOR_PROLOG if (updateCount) { if (lr->GetNumDefs() == 0) { @@ -518,7 +518,7 @@ bool GraphColorRegAllocator::CreateLiveRange(regno_t regNO, BB &bb, bool isDef, } #endif /* OPTIMIZE_FOR_PROLOG */ } else { - vregLive.insert(regNO); + (void)vregLive.insert(regNO); #ifdef OPTIMIZE_FOR_PROLOG if (updateCount) { if (lr->GetNumUses() == 0) { @@ -566,7 +566,7 @@ bool GraphColorRegAllocator::SetupLiveRangeByOpHandlePhysicalReg(RegOperand ® lraInfo->SetDefCntElem(regNO, lraInfo->GetDefCntElem(regNO) + 1); } } else { - pregLive.insert(regNO); + (void)pregLive.insert(regNO); for (const auto &vregNO : vregLive) { if (IsUnconcernedReg(vregNO)) { continue; @@ -631,12 +631,12 @@ void GraphColorRegAllocator::SetupLiveRangeByRegNO(regno_t liveOut, BB &bb, uint return; } if (liveOut >= kNArmRegisters) { - vregLive.insert(liveOut); + (void)vregLive.insert(liveOut); CreateLiveRange(liveOut, bb, false, currPoint, false); return; } - pregLive.insert(liveOut); + (void)pregLive.insert(liveOut); for (const auto &vregNO : vregLive) { LiveRange *lr = lrVec[vregNO]; lr->InsertElemToPregveto(liveOut); @@ -663,9 +663,9 @@ void GraphColorRegAllocator::ClassifyOperand(std::unordered_set &pregs, auto ®Opnd = static_cast(opnd); regno_t regNO = regOpnd.GetRegisterNumber(); if (regOpnd.IsPhysicalRegister()) { - pregs.insert(regNO); + (void)pregs.insert(regNO); } else { - vregs.insert(regNO); + (void)vregs.insert(regNO); } } @@ -802,7 +802,7 @@ void GraphColorRegAllocator::ComputeLiveRangesUpdateIfInsnIsCall(const Insn &ins for (auto regOpnd : srcOpnds.GetOperands()) { ASSERT(!regOpnd->IsVirtualRegister(), "not be a virtual register"); auto physicalReg = static_cast(regOpnd->GetRegisterNumber()); - pregLive.insert(physicalReg); + (void)pregLive.insert(physicalReg); } } } @@ -1211,9 +1211,9 @@ void GraphColorRegAllocator::AddCalleeUsed(regno_t regNO, RegType regType) { bool isCalleeReg = AArch64Abi::IsCalleeSavedReg(static_cast(regNO)); if (isCalleeReg) { if (regType == kRegTyInt) { - intCalleeUsed.insert(regNO); + (void)intCalleeUsed.insert(regNO); } else { - fpCalleeUsed.insert(regNO); + (void)fpCalleeUsed.insert(regNO); } } } @@ -1346,10 +1346,10 @@ void GraphColorRegAllocator::PruneLrForSplit(LiveRange &lr, BB &bb, bool remove, if (bb.GetLoop() != nullptr) { /* With a def in loop, cannot prune that loop */ if (defNum > 0) { - defInLoop.insert(bb.GetLoop()); + (void)defInLoop.insert(bb.GetLoop()); } /* bb in loop, need to make sure of loop carried dependency */ - candidateInLoop.insert(bb.GetLoop()); + (void)candidateInLoop.insert(bb.GetLoop()); } for (auto pred : bb.GetPreds()) { if (FindNotIn(bb.GetLoopPreds(), pred)) { @@ -1371,7 +1371,7 @@ void GraphColorRegAllocator::FindBBSharedInSplit(LiveRange &lr, std::setGetLoop() != nullptr && FindIn(candidateInLoop, bb->GetLoop())) { auto lu = lr.FindInLuMap(bb->GetId()); if (lu != lr.EndOfLuMap() && lu->second->GetDefNum() > 0) { - defInLoop.insert(bb->GetLoop()); + (void)defInLoop.insert(bb->GetLoop()); } } }; @@ -1396,7 +1396,7 @@ void GraphColorRegAllocator::ComputeBBForNewSplit(LiveRange &newLr, LiveRange &o /* If a bb has a def and is in a loop, store that info. */ std::set defInLoop; std::set smember; - ForEachBBArrElem(newLr.GetBBMember(), [this, &smember](uint32 bbID) { smember.insert(bbVec[bbID]); }); + ForEachBBArrElem(newLr.GetBBMember(), [this, &smember](uint32 bbID) { (void)smember.insert(bbVec[bbID]); }); for (auto bbIt = smember.rbegin(); bbIt != smember.rend(); ++bbIt) { BB *bb = *bbIt; if (bb->GetInternalFlag1() != 0) { @@ -1476,7 +1476,7 @@ void GraphColorRegAllocator::FindUseForSplit(LiveRange &lr, SplitBBInfo &bbInfo, bb->SetInternalFlag2(true); if (bb->GetLoop() != nullptr) { /* bb in loop, need to make sure of loop carried dependency */ - candidateInLoop.insert(bb->GetLoop()); + (void)candidateInLoop.insert(bb->GetLoop()); } } else { /* found a ref, no more removal of bb and preds. */ @@ -1490,7 +1490,7 @@ void GraphColorRegAllocator::FindUseForSplit(LiveRange &lr, SplitBBInfo &bbInfo, /* With a def in loop, cannot prune that loop */ if (bb->GetLoop() != nullptr && defNum > 0) { - defInLoop.insert(bb->GetLoop()); + (void)defInLoop.insert(bb->GetLoop()); } for (auto succ : bb->GetSuccs()) { @@ -1536,7 +1536,7 @@ void GraphColorRegAllocator::ComputeBBForOldSplit(LiveRange &newLr, LiveRange &o bool remove = true; std::set smember; - ForEachBBArrElem(origLr.GetBBMember(), [this, &smember](uint32 bbID) { smember.insert(bbVec[bbID]); }); + ForEachBBArrElem(origLr.GetBBMember(), [this, &smember](uint32 bbID) { (void)smember.insert(bbVec[bbID]); }); ClearLrBBFlags(smember); for (auto bb : smember) { if (bb->GetInternalFlag1() != 0) { @@ -1573,7 +1573,8 @@ void GraphColorRegAllocator::ComputeBBForOldSplit(LiveRange &newLr, LiveRange &o * Side effect : Adding the new forbidden regs from bbAdded into * conflictRegs if the LR can still be colored. */ -bool GraphColorRegAllocator::LrCanBeColored(LiveRange &lr, BB &bbAdded, std::unordered_set &conflictRegs) { +bool GraphColorRegAllocator::LrCanBeColored(const LiveRange &lr, const BB &bbAdded, + std::unordered_set &conflictRegs) { RegType type = lr.GetRegType(); std::unordered_set newConflict; @@ -1589,7 +1590,7 @@ bool GraphColorRegAllocator::LrCanBeColored(LiveRange &lr, BB &bbAdded, std::uno if (IsBitArrElemSet(conflictLr->GetBBMember(), bbAdded.GetId())) { regno_t confReg = conflictLr->GetAssignedRegNO(); if ((confReg > 0) && FindNotIn(conflictRegs, confReg) && !lr.GetPregveto(confReg)) { - newConflict.insert(confReg); + (void)newConflict.insert(confReg); } } else if (conflictLr->GetSplitLr() != nullptr && IsBitArrElemSet(conflictLr->GetSplitLr()->GetBBMember(), bbAdded.GetId())) { @@ -1599,7 +1600,7 @@ bool GraphColorRegAllocator::LrCanBeColored(LiveRange &lr, BB &bbAdded, std::uno */ regno_t confReg = conflictLr->GetSplitLr()->GetAssignedRegNO(); if ((confReg > 0) && FindNotIn(conflictRegs, confReg) && !lr.GetPregveto(confReg)) { - newConflict.insert(confReg); + (void)newConflict.insert(confReg); } } }; @@ -1618,7 +1619,7 @@ bool GraphColorRegAllocator::LrCanBeColored(LiveRange &lr, BB &bbAdded, std::uno if (canColor) { for (auto regNO : newConflict) { - conflictRegs.insert(regNO); + (void)conflictRegs.insert(regNO); } } @@ -1666,7 +1667,7 @@ void GraphColorRegAllocator::GetAllLrMemberLoops(LiveRange &lr, std::setGetLoop(); if (loop != nullptr) { - loops.insert(loop); + (void)loops.insert(loop); } }; ForEachBBArrElem(lr.GetBBMember(), GetLrMemberFunc); @@ -1716,7 +1717,7 @@ bool GraphColorRegAllocator::SplitLrFindCandidateLr(LiveRange &lr, LiveRange &ne LogInfo::MapleLogger() << "start split lr for vreg " << lr.GetRegNO() << "\n"; } std::set smember; - ForEachBBArrElem(lr.GetBBMember(), [&smember, this](uint32 bbID) { smember.insert(bbVec[bbID]); }); + ForEachBBArrElem(lr.GetBBMember(), [&smember, this](uint32 bbID) { (void)smember.insert(bbVec[bbID]); }); for (auto bb : smember) { if (!LrCanBeColored(lr, *bb, conflictRegs)) { break; @@ -2356,7 +2357,7 @@ MemOperand *GraphColorRegAllocator::GetConsistentReuseMem(const uint64 *conflict break; } if (lrVec[regNO] != nullptr) { - sconflict.insert(lrVec[regNO]); + (void)sconflict.insert(lrVec[regNO]); } } } @@ -2418,7 +2419,7 @@ MemOperand *GraphColorRegAllocator::GetReuseMem(uint32 vregNO, uint32 size, RegT auto updateMemOpnd = [&usedMemOpnd, this](regno_t regNO) { LiveRange *lrInner = lrVec[regNO]; if (lrInner->GetSpillMem() != nullptr) { - usedMemOpnd.insert(lrInner->GetSpillMem()); + (void)usedMemOpnd.insert(lrInner->GetSpillMem()); } }; ForEachRegArrElem(conflict, updateMemOpnd); @@ -2649,11 +2650,12 @@ bool GraphColorRegAllocator::SetAvailableSpillReg(std::unordered_set &c return false; } -void GraphColorRegAllocator::CollectCannotUseReg(std::unordered_set &cannotUseReg, LiveRange &lr, Insn &insn) { +void GraphColorRegAllocator::CollectCannotUseReg(std::unordered_set &cannotUseReg, const LiveRange &lr, + Insn &insn) { /* Find the bb in the conflict LR that actually conflicts with the current bb. */ for (regno_t regNO = kRinvalid; regNO < kMaxRegNum; ++regNO) { if (lr.GetPregveto(regNO)) { - cannotUseReg.insert(regNO); + (void)cannotUseReg.insert(regNO); } } auto updateCannotUse = [&insn, &cannotUseReg, this](regno_t regNO) { @@ -2667,7 +2669,7 @@ void GraphColorRegAllocator::CollectCannotUseReg(std::unordered_set &ca conflictLr->GetNumCall()) { return; } - cannotUseReg.insert(conflictLr->GetAssignedRegNO()); + (void)cannotUseReg.insert(conflictLr->GetAssignedRegNO()); } }; ForEachRegArrElem(lr.GetBBConflict(), updateCannotUse); @@ -2675,7 +2677,7 @@ void GraphColorRegAllocator::CollectCannotUseReg(std::unordered_set &ca BBAssignInfo *bbInfo = bbRegInfo[insn.GetBB()->GetId()]; if (bbInfo != nullptr) { for (const auto ®MapPair : bbInfo->GetRegMap()) { - cannotUseReg.insert(regMapPair.second); + (void)cannotUseReg.insert(regMapPair.second); } } #endif /* USE_LRA */ diff --git a/src/maple_be/src/cg/aarch64/aarch64_dependence.cpp b/src/maple_be/src/cg/aarch64/aarch64_dependence.cpp index 1ad74e5b745ce22ea3ba76fa940591f9e336213f..36f404e7dd02f8d5f8f682f1c8d23c6daa538a01 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_dependence.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_dependence.cpp @@ -292,7 +292,7 @@ void AArch64DepAnalysis::CombineDependence(DepNode &firstNode, DepNode &secondNo if (predLink->GetDepType() == kDependenceTypeTrue) { predLink->SetLatency(mad.GetLatency(*predLink->GetFrom().GetInsn(), *firstNode.GetInsn())); } - uniqueNodes.insert(&predLink->GetFrom()); + (void)uniqueNodes.insert(&predLink->GetFrom()); } for (auto predLink : secondNode.GetPreds()) { if (&predLink->GetFrom() != &firstNode) { @@ -307,7 +307,7 @@ void AArch64DepAnalysis::CombineDependence(DepNode &firstNode, DepNode &secondNo if (succLink->GetDepType() == kDependenceTypeTrue) { succLink->SetLatency(mad.GetLatency(*succLink->GetFrom().GetInsn(), *firstNode.GetInsn())); } - uniqueNodes.insert(&(succLink->GetTo())); + (void)uniqueNodes.insert(&(succLink->GetTo())); } for (auto succLink : secondNode.GetSuccs()) { if (uniqueNodes.insert(&(succLink->GetTo())).second) { @@ -520,7 +520,7 @@ void AArch64DepAnalysis::BuildDepsMemBar(Insn &insn) { /* A pseudo separator node depends all the other nodes. */ void AArch64DepAnalysis::BuildDepsSeparator(DepNode &newSepNode, MapleVector &nodes) { uint32 nextSepIndex = (separatorIndex + kMaxDependenceNum) < nodes.size() ? (separatorIndex + kMaxDependenceNum) - : nodes.size() - 1; + : static_cast(nodes.size() - 1); newSepNode.ReservePreds(nextSepIndex - separatorIndex); newSepNode.ReserveSuccs(nextSepIndex - separatorIndex); for (uint32 i = separatorIndex; i < nextSepIndex; ++i) { diff --git a/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp b/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp index 1fec18814d533c98eb12edcf10d4e2eee6f2d8ca..24a0f53474a2c4601c3271ddc13222a59b3f3d69 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_ebo.cpp @@ -736,7 +736,8 @@ bool AArch64Ebo::SpecialSequence(Insn &insn, const MapleVector &origI auto &res1 = static_cast(insn1->GetOperand(kInsnFirstOpnd)); if (RegistersIdentical(res1, *op1) && RegistersIdentical(res1, res2) && (GetOpndInfo(base2, -1) != nullptr) && !GetOpndInfo(base2, -1)->redefined) { - immVal = imm0Val + imm1.GetValue() + (static_cast(immOpnd2.GetValue()) << kMaxImmVal12Bits); + immVal = imm0Val + imm1.GetValue() + + static_cast(static_cast(immOpnd2.GetValue()) << kMaxImmVal12Bits); op1 = &base2; } else { return false; @@ -748,7 +749,8 @@ bool AArch64Ebo::SpecialSequence(Insn &insn, const MapleVector &origI /* multiple of 4 and 8 */ const int multiOfFour = 4; const int multiOfEight = 8; - is64bits = is64bits && (!static_cast(insn).CheckRefField(kInsnFirstOpnd, false)); + is64bits = is64bits && + (!static_cast(insn).CheckRefField(static_cast(kInsnFirstOpnd), false)); if ((!is64bits && (immVal < kStrLdrImm32UpperBound) && (immVal % multiOfFour == 0)) || (is64bits && (immVal < kStrLdrImm64UpperBound) && (immVal % multiOfEight == 0))) { /* Reserved physicalReg beforeRA */ diff --git a/src/maple_be/src/cg/aarch64/aarch64_emitter.cpp b/src/maple_be/src/cg/aarch64/aarch64_emitter.cpp index 000278718e2ecafac1fa7f0473f6ed814859ac61..4358be285dbfb25f2e3253d424c3e30e22e685f3 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_emitter.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_emitter.cpp @@ -71,8 +71,8 @@ void AArch64AsmEmitter::EmitMethodDesc(FuncEmitInfo &funcEmitInfo, Emitter &emit AArch64CGFunc &aarchCGFunc = static_cast(cgFunc); IntrinsiccallNode *cleanEANode = aarchCGFunc.GetCleanEANode(); if (cleanEANode != nullptr) { - refNum += cleanEANode->NumOpnds(); - refOffset -= cleanEANode->NumOpnds() * kIntregBytelen; + refNum += static_cast(cleanEANode->NumOpnds()); + refOffset -= static_cast(cleanEANode->NumOpnds() * kIntregBytelen); } emitter.Emit("\t.short ").Emit(refOffset).Emit("\n"); emitter.Emit("\t.short ").Emit(refNum).Emit("\n"); @@ -90,8 +90,8 @@ void AArch64AsmEmitter::EmitFastLSDA(FuncEmitInfo &funcEmitInfo) { * .word 0xFFFFFFFF * .word .Label.LTest_3B_7C_3Cinit_3E_7C_28_29V3-func_start_label */ - emitter->Emit("\t.word 0xFFFFFFFF\n"); - emitter->Emit("\t.word .L." + funcName + "."); + (void)emitter->Emit("\t.word 0xFFFFFFFF\n"); + (void)emitter->Emit("\t.word .L." + funcName + "."); if (aarchCGFunc.NeedCleanup()) { emitter->Emit(cgFunc.GetCleanupLabel()->GetLabelIdx()); } else { @@ -163,9 +163,9 @@ void AArch64AsmEmitter::EmitFullLSDA(FuncEmitInfo &funcEmitInfo) { cleaupCode.SetEndOffset(cgFunc.GetCleanupLabel()); emitter->EmitLabelPair(funcName, cleaupCode); } else if (cgFunc.GetFunction().IsJava()) { - ASSERT(!cgFunc.GetExitBBsVec().empty(), "exitbbsvec is empty in AArch64AsmEmitter::EmitFullLSDA"); - emitter->Emit(".L." + funcName).Emit(".").Emit(cgFunc.GetExitBB(0)->GetLabIdx()); - emitter->Emit(" - .L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); + ASSERT(!cgFunc.GetExitBBsVec().empty(), "exitbbsvec is empty in AArch64Emitter::EmitFullLSDA"); + (void)emitter->Emit(".L." + funcName).Emit(".").Emit(cgFunc.GetExitBB(0)->GetLabIdx()); + (void)emitter->Emit(" - .L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); } else { emitter->Emit("0\n"); } @@ -201,8 +201,8 @@ void AArch64AsmEmitter::EmitFullLSDA(FuncEmitInfo &funcEmitInfo) { emitter->EmitLabelPair(funcName, cleaupCode); } else { ASSERT(!cgFunc.GetExitBBsVec().empty(), "exitbbsvec is empty in AArch64AsmEmitter::EmitFullLSDA"); - emitter->Emit(".L." + funcName).Emit(".").Emit(cgFunc.GetExitBB(0)->GetLabIdx()); - emitter->Emit(" - .L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); + (void)emitter->Emit(".L." + funcName).Emit(".").Emit(cgFunc.GetExitBB(0)->GetLabIdx()); + (void)emitter->Emit(" - .L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); } emitter->Emit("\t.uleb128 0\n"); if (!cgFunc.GetFunction().IsJava()) { @@ -262,10 +262,10 @@ void AArch64AsmEmitter::EmitBBHeaderLabel(FuncEmitInfo &funcEmitInfo, const std: currCG->IncreaseLabelOrderCnt(); } if (currCG->GenerateVerboseCG()) { - emitter.Emit(".L.").Emit(name).Emit(".").Emit(labIdx).Emit(":\t//label order ").Emit(label.GetLabelOrder()); + (void)emitter.Emit(".L.").Emit(name).Emit(".").Emit(labIdx).Emit(":\t//label order ").Emit(label.GetLabelOrder()); emitter.Emit("\n"); } else { - emitter.Emit(".L.").Emit(name).Emit(".").Emit(labIdx).Emit(":\n"); + (void)emitter.Emit(".L.").Emit(name).Emit(".").Emit(labIdx).Emit(":\n"); } } @@ -288,40 +288,40 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { Emitter &emitter = *currCG->GetEmitter(); // insert for __cxx_global_var_init if (cgFunc.GetName() == "__cxx_global_var_init") { - emitter.Emit("\t.section\t.init_array,\"aw\"\n"); - emitter.Emit("\t.quad\t").Emit(cgFunc.GetName()).Emit("\n"); + (void)emitter.Emit("\t.section\t.init_array,\"aw\"\n"); + (void)emitter.Emit("\t.quad\t").Emit(cgFunc.GetName()).Emit("\n"); } emitter.Emit("\n"); EmitMethodDesc(funcEmitInfo, emitter); /* emit java code to the java section. */ if (cgFunc.GetFunction().IsJava()) { std::string sectionName = namemangler::kMuidJavatextPrefixStr; - emitter.Emit("\t.section ." + sectionName + ",\"ax\"\n"); + (void)emitter.Emit("\t.section ." + sectionName + ",\"ax\"\n"); } else { - emitter.Emit("\t.text\n"); + (void)emitter.Emit("\t.text\n"); } - emitter.Emit("\t.align 2\n"); + (void)emitter.Emit("\t.align 2\n"); MIRSymbol *funcSt = GlobalTables::GetGsymTable().GetSymbolFromStidx(cgFunc.GetFunction().GetStIdx().Idx()); const std::string &funcName = std::string(cgFunc.GetShortFuncName().c_str()); std::string funcStName = funcSt->GetName(); if (funcSt->GetFunction()->GetAttr(FUNCATTR_weak)) { - emitter.Emit("\t.weak\t" + funcStName + "\n"); - emitter.Emit("\t.hidden\t" + funcStName + "\n"); + (void)emitter.Emit("\t.weak\t" + funcStName + "\n"); + (void)emitter.Emit("\t.hidden\t" + funcStName + "\n"); } else if (funcSt->GetFunction()->GetAttr(FUNCATTR_local)) { - emitter.Emit("\t.local\t" + funcStName + "\n"); + (void)emitter.Emit("\t.local\t" + funcStName + "\n"); } else { bool isExternFunction = false; - emitter.Emit("\t.globl\t").Emit(funcSt->GetName()).Emit("\n"); + (void)emitter.Emit("\t.globl\t").Emit(funcSt->GetName()).Emit("\n"); if (!currCG->GetMIRModule()->IsCModule() || !isExternFunction) { - emitter.Emit("\t.hidden\t").Emit(funcSt->GetName()).Emit("\n"); + (void)emitter.Emit("\t.hidden\t").Emit(funcSt->GetName()).Emit("\n"); } } - emitter.Emit("\t.type\t" + funcStName + ", %function\n"); + (void)emitter.Emit("\t.type\t" + funcStName + ", %function\n"); /* add these messege , solve the simpleperf tool error */ EmitRefToMethodDesc(funcEmitInfo, emitter); - emitter.Emit(funcStName + ":\n"); + (void)emitter.Emit(funcStName + ":\n"); /* if the last insn is call, then insert nop */ bool found = false; FOR_ALL_BB_REV(bb, &aarchCGFunc) { @@ -355,9 +355,9 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { } if (CGOptions::IsMapleLinker()) { /* Emit a label for calculating method size */ - emitter.Emit(".Label.end." + funcStName + ":\n"); + (void)emitter.Emit(".Label.end." + funcStName + ":\n"); } - emitter.Emit("\t.size\t" + funcStName + ", .-").Emit(funcStName + "\n"); + (void)emitter.Emit("\t.size\t" + funcStName + ", .-").Emit(funcStName + "\n"); EHFunc *ehFunc = cgFunc.GetEHFunc(); /* emit LSDA */ @@ -368,8 +368,8 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { } else if (ehFunc->NeedFullLSDA()) { LSDAHeader *lsdaHeader = ehFunc->GetLSDAHeader(); /* .word .Label.lsda_label-func_start_label */ - emitter.Emit("\t.word .L." + funcName).Emit(".").Emit(lsdaHeader->GetLSDALabel()->GetLabelIdx()); - emitter.Emit("-.L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); + (void)emitter.Emit("\t.word .L." + funcName).Emit(".").Emit(lsdaHeader->GetLSDALabel()->GetLabelIdx()); + (void)emitter.Emit("-.L." + funcName).Emit(".").Emit(cgFunc.GetStartLabel()->GetLabelIdx()).Emit("\n"); emitter.IncreaseJavaInsnCount(); } else if (ehFunc->NeedFastLSDA()) { EmitFastLSDA(funcEmitInfo); @@ -438,8 +438,8 @@ void AArch64AsmEmitter::Run(FuncEmitInfo &funcEmitInfo) { for (size_t i = 0; i < arrayConst->GetConstVec().size(); i++) { MIRLblConst *lblConst = safe_cast(arrayConst->GetConstVecItem(i)); CHECK_FATAL(lblConst != nullptr, "null ptr check"); - emitter.Emit("\t.quad\t.L." + funcName).Emit(".").Emit(lblConst->GetValue()); - emitter.Emit(" - " + st->GetName() + "\n"); + (void)emitter.Emit("\t.quad\t.L." + funcName).Emit(".").Emit(lblConst->GetValue()); + (void)emitter.Emit(" - " + st->GetName() + "\n"); emitter.IncreaseJavaInsnCount(kQuadInsnCount); } } diff --git a/src/maple_be/src/cg/aarch64/aarch64_global.cpp b/src/maple_be/src/cg/aarch64/aarch64_global.cpp index 94840512258340ffbb89f0e83e8ee205adabe0c3..62825e05d1baed6db1857ea79621e28f71aec82c 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_global.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_global.cpp @@ -274,7 +274,7 @@ void ForwardPropPattern::Optimize(Insn &insn) { if (((useInsn->GetMachineOpcode() == MOP_xmovrr) || (useInsn->GetMachineOpcode() == MOP_wmovrr)) && (static_cast(useInsn->GetOperand(kInsnSecondOpnd)).IsVirtualRegister()) && (static_cast(useInsn->GetOperand(kInsnFirstOpnd)).IsVirtualRegister())) { - modifiedBB.insert(useInsn->GetBB()); + (void)modifiedBB.insert(useInsn->GetBB()); } cgFunc.GetRD()->InitGenUse(*useInsn->GetBB(), false); } else if (opnd.IsMemoryAccessOperand()) { @@ -512,7 +512,7 @@ void BackPropPattern::Run() { if (!CheckCondition(*insn)) { continue; } - modifiedBB.insert(bb); + (void)modifiedBB.insert(bb); Optimize(*insn); } cgFunc.GetRD()->UpdateInOut(*bb); @@ -727,7 +727,7 @@ uint32 RedundantUxtPattern::GetMaximumValidBit(Insn &insn, uint8 index, InsnSet continue; } - visitedInsn.insert(defInsn); + (void)visitedInsn.insert(defInsn); MOperator mOp = defInsn->GetMachineOpcode(); if ((mOp == MOP_wmovrr) || (mOp == MOP_xmovrr)) { validBit = GetMaximumValidBit(*defInsn, 1, visitedInsn); diff --git a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp index 7b2fbcc9d02ba9583f63e1f464e8c09f009395f4..42321b98af7daf9c4a024e068aa260ecadd79d9c 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_insn.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_insn.cpp @@ -651,7 +651,7 @@ void AArch64Insn::EmitClinit(const CG &cg, Emitter &emitter) const { emitter.Emit("\tadrp\t"); opnd0->Emit(emitter, prop0); emitter.Emit(","); - emitter.Emit(namemangler::kPtrPrefixStr + stImmOpnd->GetName()); + (void)emitter.Emit(namemangler::kPtrPrefixStr + stImmOpnd->GetName()); emitter.Emit("\n"); /* ldr x3, [x3, #:lo12:_PTR__cinf_Ljava_2Futil_2Fconcurrent_2Fatomic_2FAtomicInteger_3B] */ @@ -660,7 +660,7 @@ void AArch64Insn::EmitClinit(const CG &cg, Emitter &emitter) const { emitter.Emit(", ["); opnd0->Emit(emitter, prop0); emitter.Emit(", #:lo12:"); - emitter.Emit(namemangler::kPtrPrefixStr + stImmOpnd->GetName()); + (void)emitter.Emit(namemangler::kPtrPrefixStr + stImmOpnd->GetName()); emitter.Emit("]\n"); } /* emit "ldr x0,[x0,#48]" */ @@ -1019,7 +1019,7 @@ void AArch64Insn::Emit(const CG &cg, Emitter &emitter) const { } } - bool isRefField = (opndSize == 0) ? false : CheckRefField(seq[0], true); + bool isRefField = (opndSize == 0) ? false : CheckRefField(static_cast(static_cast(seq[0])), true); if (mOp != MOP_comment) { emitter.IncreaseJavaInsnCount(); } @@ -1075,7 +1075,7 @@ void AArch64Insn::Emit(const CG &cg, Emitter &emitter) const { if (cg.GenerateVerboseCG() || (cg.GenerateVerboseAsm() && mOp == MOP_comment)) { const char *comment = GetComment().c_str(); if (comment != nullptr && strlen(comment) > 0) { - emitter.Emit("\t\t// ").Emit(comment); + (void)emitter.Emit("\t\t// ").Emit(comment); } } @@ -1083,7 +1083,7 @@ void AArch64Insn::Emit(const CG &cg, Emitter &emitter) const { } /* set opnd0 ref-field flag, so we can emit the right register */ -bool AArch64Insn::CheckRefField(int32 opndIndex, bool isEmit) const { +bool AArch64Insn::CheckRefField(size_t opndIndex, bool isEmit) const { if (IsAccessRefField() && AccessMem()) { Operand *opnd0 = opnds[opndIndex]; if (opnd0->IsRegister()) { diff --git a/src/maple_be/src/cg/aarch64/aarch64_peep.cpp b/src/maple_be/src/cg/aarch64/aarch64_peep.cpp index 637ca7bc0cd4d8eeab71e8734729da390d66ae15..4128e3b2ac24b544592e454a12daa84b7854660e 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_peep.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_peep.cpp @@ -2462,11 +2462,13 @@ void ComputationTreeAArch64::Run(BB &bb, Insn &insn) { if (lsl.GetShiftAmount() == lslShiftAmountCaseA) { sxtw = &aarch64CGFunc->CreateExtendShiftOperand(ExtendShiftOperand::kSXTW, lslShiftAmountCaseA + 1, lslBitLenth); - imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseA), kMaxImmVal12Bits, true); + imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + static_cast(1ULL << lslShiftAmountCaseA), + kMaxImmVal12Bits, true); } else if (lsl.GetShiftAmount() == lslShiftAmountCaseB) { sxtw = &aarch64CGFunc->CreateExtendShiftOperand(ExtendShiftOperand::kSXTW, lslShiftAmountCaseB + 1, lslBitLenth); - imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + (1ULL << lslShiftAmountCaseB), kMaxImmVal12Bits, true); + imm = &aarch64CGFunc->CreateImmOperand(oriAddEnd + static_cast(1ULL << lslShiftAmountCaseB), + kMaxImmVal12Bits, true); } Insn &newInsn = cgFunc.GetCG()->BuildInstruction(MOP_xxwaddrrre, sxtwInsn->GetOperand(kInsnFirstOpnd), diff --git a/src/maple_be/src/cg/aarch64/aarch64_reaching.cpp b/src/maple_be/src/cg/aarch64/aarch64_reaching.cpp index 48f906e0dcca49127195f8d1851b22749baacf67..9fec2c150fbaeaec352d6d58dd8ae723b02b2e54 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_reaching.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_reaching.cpp @@ -244,7 +244,7 @@ void AArch64ReachingDefinition::FindRegDefInBB(uint32 regNO, BB &bb, InsnSet &de const AArch64MD *md = &AArch64CG::kMd[static_cast(insn)->GetMachineOpcode()]; if (insn->IsCall() && IsCallerSavedReg(regNO)) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); continue; } @@ -267,12 +267,12 @@ void AArch64ReachingDefinition::FindRegDefInBB(uint32 regNO, BB &bb, InsnSet &de if (memOpnd.GetAddrMode() == AArch64MemOperand::kAddrModeBOi && (memOpnd.IsPostIndexed() || memOpnd.IsPreIndexed()) && base->GetRegisterNumber() == regNO) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); } } } else if ((opnd.IsConditionCode() || opnd.IsRegister()) && (static_cast(opnd).GetRegisterNumber() == regNO)) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); } } } @@ -361,7 +361,7 @@ void AArch64ReachingDefinition::FindMemDefInBB(uint32 offset, BB &bb, InsnSet &d if (insn->IsCall()) { if (CallInsnClearDesignateStackRef(*insn, offset)) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); } continue; } @@ -385,11 +385,11 @@ void AArch64ReachingDefinition::FindMemDefInBB(uint32 offset, BB &bb, InsnSet &d ASSERT(memOpnd.GetOffsetImmediate() != nullptr, "offset must be a immediate value"); int64 memOffset = memOpnd.GetOffsetImmediate()->GetOffsetValue(); if (offset == memOffset) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); break; } if (insn->IsStorePair() && offset == memOffset + GetEachMemSizeOfPair(insn->GetMachineOpcode())) { - defInsnSet.insert(insn); + (void)defInsnSet.insert(insn); break; } } @@ -557,7 +557,7 @@ bool AArch64ReachingDefinition::FindRegUseBetweenInsn(uint32 regNO, Insn *startI RegOperand *regOpnd = static_cast(listElem); ASSERT(regOpnd != nullptr, "parameter operand must be RegOperand"); if (regNO == regOpnd->GetRegisterNumber()) { - regUseInsnSet.insert(insn); + (void)regUseInsnSet.insert(insn); } } continue; @@ -589,16 +589,16 @@ bool AArch64ReachingDefinition::FindRegUseBetweenInsn(uint32 regNO, Insn *startI RegOperand *index = memOpnd.GetIndexRegister(); if ((base != nullptr && base->GetRegisterNumber() == regNO) || (index != nullptr && index->GetRegisterNumber() == regNO)) { - regUseInsnSet.insert(insn); + (void)regUseInsnSet.insert(insn); } } else if (opnd.IsConditionCode()) { Operand &rflagOpnd = cgFunc->GetOrCreateRflag(); RegOperand &rflagReg = static_cast(rflagOpnd); if (rflagReg.GetRegisterNumber() == regNO) { - regUseInsnSet.insert(insn); + (void)regUseInsnSet.insert(insn); } } else if (opnd.IsRegister() && (static_cast(opnd).GetRegisterNumber() == regNO)) { - regUseInsnSet.insert(insn); + (void)regUseInsnSet.insert(insn); } } @@ -671,9 +671,9 @@ bool AArch64ReachingDefinition::FindMemUseBetweenInsn(uint32 offset, Insn *start } if (offset == memOffset) { - memUseInsnSet.insert(insn); + (void)memUseInsnSet.insert(insn); } else if (insn->IsLoadPair() && offset == memOffset + GetEachMemSizeOfPair(insn->GetMachineOpcode())) { - memUseInsnSet.insert(insn); + (void)memUseInsnSet.insert(insn); } } diff --git a/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp b/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp index d83c1cd9e6071ecf3156e882524cf037111cf975..f2b314fc8dc94258d8ef20555a2821e278cc0b2a 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp @@ -35,7 +35,7 @@ Operand *AArch64RegAllocator::HandleRegOpnd(Operand &opnd) { } if (!regOpnd.IsVirtualRegister()) { availRegSet[regOpnd.GetRegisterNumber()] = false; - liveReg.insert(regOpnd.GetRegisterNumber()); + (void)liveReg.insert(regOpnd.GetRegisterNumber()); return static_cast(®Opnd); } auto regMapIt = regMap.find(regOpnd.GetRegisterNumber()); @@ -44,12 +44,12 @@ Operand *AArch64RegAllocator::HandleRegOpnd(Operand &opnd) { ASSERT(AArch64isa::IsPhysicalRegister(regMapIt->second), "must be a physical register"); AArch64reg newRegNO = regMapIt->second; availRegSet[newRegNO] = false; /* make sure the real register can not be allocated and live */ - liveReg.insert(newRegNO); - allocatedSet.insert(&opnd); + (void)liveReg.insert(newRegNO); + (void)allocatedSet.insert(&opnd); return &a64CGFunc->GetOrCreatePhysicalRegisterOperand(newRegNO, regOpnd.GetSize(), regOpnd.GetRegisterType()); } if (AllocatePhysicalRegister(regOpnd)) { - allocatedSet.insert(&opnd); + (void)allocatedSet.insert(&opnd); auto regMapItSecond = regMap.find(regOpnd.GetRegisterNumber()); ASSERT(regMapItSecond != regMap.end(), " ERROR: can not find register number in regmap "); return &a64CGFunc->GetOrCreatePhysicalRegisterOperand(regMapItSecond->second, regOpnd.GetSize(), @@ -95,7 +95,7 @@ Operand *AArch64RegAllocator::HandleMemOpnd(Operand &opnd) { ASSERT(false, "ERROR: should not run here"); break; } - allocatedSet.insert(&opnd); + (void)allocatedSet.insert(&opnd); return memOpnd; } @@ -148,7 +148,7 @@ Operand *AArch64RegAllocator::AllocDestOpnd(Operand &opnd, const Insn &insn) { regOpnd.GetRegisterType()); } } - allocatedSet.insert(&opnd); + (void)allocatedSet.insert(&opnd); return &a64CGFunc->GetOrCreatePhysicalRegisterOperand(regMapIt->second, regOpnd.GetSize(), regOpnd.GetRegisterType()); } @@ -199,7 +199,7 @@ void AArch64RegAllocator::AllocHandleCallee(Insn &insn, const AArch64MD &md) { ASSERT(!regOpnd->IsVirtualRegister(), "not be a virtual register"); auto physicalReg = static_cast(regOpnd->GetRegisterNumber()); availRegSet[physicalReg] = false; - liveReg.insert(physicalReg); + (void)liveReg.insert(physicalReg); srcOpndsNew->PushOpnd( a64CGFunc->GetOrCreatePhysicalRegisterOperand(physicalReg, regOpnd->GetSize(), regOpnd->GetRegisterType())); } @@ -329,7 +329,7 @@ bool AArch64RegAllocator::AllocatePhysicalRegister(RegOperand &opnd) { regMap[opnd.GetRegisterNumber()] = AArch64reg(reg); availRegSet[reg] = false; - liveReg.insert(reg); /* this register is live now */ + (void)liveReg.insert(reg); /* this register is live now */ return true; } return false; @@ -586,7 +586,7 @@ bool DefaultO0RegAllocator::AllocateRegisters() { auto ®Opnd = static_cast(opnd); AArch64reg reg = regMap[regOpnd.GetRegisterNumber()]; availRegSet[reg] = false; - liveReg.insert(reg); /* this register is live now */ + (void)liveReg.insert(reg); /* this register is live now */ insn->SetOperand(i, a64CGFunc->GetOrCreatePhysicalRegisterOperand(reg, regOpnd.GetSize(), regOpnd.GetRegisterType())); } else { diff --git a/src/maple_be/src/cg/aarch64/aarch64_schedule.cpp b/src/maple_be/src/cg/aarch64/aarch64_schedule.cpp index 9f5ac140529edef422400176c561df4a0c57a8f3..5ddfdaf71b06f5e932c556f44ef702014ecda367 100644 --- a/src/maple_be/src/cg/aarch64/aarch64_schedule.cpp +++ b/src/maple_be/src/cg/aarch64/aarch64_schedule.cpp @@ -285,7 +285,7 @@ uint32 AArch64Schedule::ComputeEstart(uint32 cycle) { ASSERT(nodes[maxIndex]->GetType() == kNodeTypeSeparator, "CG internal error, nodes[maxIndex] should be a separator node."); - readyNodes.insert(readyNodes.begin(), readyList.begin(), readyList.end()); + (void)readyNodes.insert(readyNodes.begin(), readyList.begin(), readyList.end()); uint32 maxEstart = cycle; for (uint32 i = lastSeparatorIndex; i <= maxIndex; ++i) { @@ -681,7 +681,7 @@ uint32 AArch64Schedule::DoSchedule() { ASSERT(scheduleInfo.SizeOfScheduledNodes() == nodes.size(), "CG internal error, Not all nodes scheduled."); nodes.clear(); - nodes.insert(nodes.begin(), scheduleInfo.GetScheduledNodes().begin(), scheduleInfo.GetScheduledNodes().end()); + (void)nodes.insert(nodes.begin(), scheduleInfo.GetScheduledNodes().begin(), scheduleInfo.GetScheduledNodes().end()); /* the second to last node is the true last node, because the last is kNodeTypeSeparator node */ ASSERT(nodes.size() - 2 >= 0, "size of nodes should be greater than or equal 2"); return (nodes[nodes.size() - 2]->GetSchedCycle()); diff --git a/src/maple_be/src/cg/cg.cpp b/src/maple_be/src/cg/cg.cpp index 26f42af98453ea5a47aa86f46af14f3afb0d110c..8a577f25f445f2c7e3405e6a1348ba1841dd8c2f 100644 --- a/src/maple_be/src/cg/cg.cpp +++ b/src/maple_be/src/cg/cg.cpp @@ -59,7 +59,7 @@ void CG::GenExtraTypeMetadata(const std::string &classListFileName, const std::s continue; /* Skip duplicated class definitions. */ } - visited.insert(name); + (void)visited.insert(name); classesToGenerate.emplace_back(classType); } } else { diff --git a/src/maple_be/src/cg/cg_cfg.cpp b/src/maple_be/src/cg/cg_cfg.cpp index 02cd4347d39c6faf4e9070984c223e9fe9142f67..7315b222b8a78e6117346cb718b82f147d3a00e7 100644 --- a/src/maple_be/src/cg/cg_cfg.cpp +++ b/src/maple_be/src/cg/cg_cfg.cpp @@ -278,20 +278,20 @@ void CGCFG::FindAndMarkUnreachable(CGFunc &func) { while (!toBeAnalyzedBBs.empty()) { bb = toBeAnalyzedBBs.top(); toBeAnalyzedBBs.pop(); - instackBBs.insert(bb); + (void)instackBBs.insert(bb); bb->SetUnreachable(false); for (BB *succBB : bb->GetSuccs()) { if (instackBBs.count(succBB) == 0) { toBeAnalyzedBBs.push(succBB); - instackBBs.insert(succBB); + (void)instackBBs.insert(succBB); } } for (BB *succBB : bb->GetEhSuccs()) { if (instackBBs.count(succBB) == 0) { toBeAnalyzedBBs.push(succBB); - instackBBs.insert(succBB); + (void)instackBBs.insert(succBB); } } } @@ -317,7 +317,7 @@ void CGCFG::FlushUnReachableStatusAndRemoveRelations(BB &bb, const CGFunc &func) BB *it = nullptr; while (!toBeAnalyzedBBs.empty()) { it = toBeAnalyzedBBs.top(); - instackBBs.insert(it->GetId()); + (void)instackBBs.insert(it->GetId()); toBeAnalyzedBBs.pop(); /* Check if bb is the first or the last BB of the function */ isFirstBBInfunc = (it == func.GetFirstBB()); @@ -337,7 +337,7 @@ void CGCFG::FlushUnReachableStatusAndRemoveRelations(BB &bb, const CGFunc &func) for (BB *succ : it->GetSuccs()) { if (instackBBs.count(succ->GetId()) == 0) { toBeAnalyzedBBs.push(succ); - instackBBs.insert(succ->GetId()); + (void)instackBBs.insert(succ->GetId()); } succ->RemovePreds(*it); succ->RemoveEhPreds(*it); @@ -346,7 +346,7 @@ void CGCFG::FlushUnReachableStatusAndRemoveRelations(BB &bb, const CGFunc &func) for (BB *succ : it->GetEhSuccs()) { if (instackBBs.count(succ->GetId()) == 0) { toBeAnalyzedBBs.push(succ); - instackBBs.insert(succ->GetId()); + (void)instackBBs.insert(succ->GetId()); } succ->RemoveEhPreds(*it); succ->RemovePreds(*it); @@ -513,7 +513,7 @@ void CGCFG::UnreachCodeAnalysis() { bb == cgFunc->GetFirstBB() || bb == cgFunc->GetLastBB() || bb->GetKind() == BB::kBBReturn) { toBeAnalyzedBBs.push_front(bb); } else { - unreachBBs.insert(bb); + (void)unreachBBs.insert(bb); } bb->SetUnreachable(true); bb = bb->GetNext(); diff --git a/src/maple_be/src/cg/cg_option.cpp b/src/maple_be/src/cg/cg_option.cpp index e78f9353bb000251eb8a93bf45ba6fca35acded0..539413f9fa391c7dbb9e8b7623f59cffdd60de09 100644 --- a/src/maple_be/src/cg/cg_option.cpp +++ b/src/maple_be/src/cg/cg_option.cpp @@ -919,19 +919,19 @@ bool CGOptions::SolveOptions(const std::vector