From d0c27cbbc1bd10b1bd240737eaa7f2bbd9904b4e Mon Sep 17 00:00:00 2001 From: binaryfz Date: Tue, 19 Jan 2021 19:14:32 +0800 Subject: [PATCH] [sync]PR342 & PR340 --- src/mapleall/maple_be/include/cg/cg_option.h | 2 +- src/mapleall/maple_be/include/cg/cgbb.h | 7 ++++ src/mapleall/maple_be/include/cg/cgfunc.h | 9 +++++ .../src/cg/aarch64/aarch64_cgfunc.cpp | 33 ++++++++++++++++--- .../src/cg/aarch64/aarch64_color_ra.cpp | 1 + .../src/cg/aarch64/aarch64_proepilog.cpp | 6 ++++ .../src/cg/aarch64/aarch64_reg_alloc.cpp | 2 ++ src/mapleall/maple_be/src/cg/cg_option.cpp | 2 +- src/mapleall/maple_be/src/cg/cgfunc.cpp | 6 +++- 9 files changed, 60 insertions(+), 8 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/cg_option.h b/src/mapleall/maple_be/include/cg/cg_option.h index 551f2f3bba..cfe1163b18 100644 --- a/src/mapleall/maple_be/include/cg/cg_option.h +++ b/src/mapleall/maple_be/include/cg/cg_option.h @@ -119,7 +119,7 @@ class CGOptions : public MapleDriverOptionBase { * Generate yieldpoints for GC. * Do not generate separate GCTIB file. */ - static const GenerateFlag kDefaultGflags = GenerateFlag(kGrootList | kPrimorList); + static const GenerateFlag kDefaultGflags = GenerateFlag(0); public: static CGOptions &GetInstance(); diff --git a/src/mapleall/maple_be/include/cg/cgbb.h b/src/mapleall/maple_be/include/cg/cgbb.h index 8be0fe4ea0..58bd016ad6 100644 --- a/src/mapleall/maple_be/include/cg/cgbb.h +++ b/src/mapleall/maple_be/include/cg/cgbb.h @@ -511,6 +511,12 @@ class BB { void SetIsCleanup(bool arg) { isCleanup = arg; } + bool IsProEpilog() const { + return isProEpilog; + } + void SetIsProEpilog(bool arg) { + isProEpilog = arg; + } long GetInternalFlag1() const { return internalFlag1; } @@ -675,6 +681,7 @@ class BB { * are some overlap here. */ bool isCleanup = false; /* true if the bb is cleanup bb. otherwise, false. */ + bool isProEpilog = false; /* Temporary tag for modifying prolog/epilog bb. */ /* * Different meaning for each data flow analysis. * For aarchregalloc.cpp, the bb is part of cleanup at end of function. diff --git a/src/mapleall/maple_be/include/cg/cgfunc.h b/src/mapleall/maple_be/include/cg/cgfunc.h index 1a21df5829..a059ed2e60 100644 --- a/src/mapleall/maple_be/include/cg/cgfunc.h +++ b/src/mapleall/maple_be/include/cg/cgfunc.h @@ -775,6 +775,14 @@ class CGFunc { volReleaseInsn = insn; } + bool IsAfterRegAlloc() const { + return isAfterRegAlloc; + } + + void SetIsAfterRegAlloc() { + isAfterRegAlloc = true; + } + const MapleString &GetShortFuncName() const { return shortFuncName; } @@ -800,6 +808,7 @@ class CGFunc { bool hasProEpilogue = false; bool isVolLoad = false; bool isVolStore = false; + bool isAfterRegAlloc = false; uint32 frequency = 0; DebugInfo *debugInfo = nullptr; /* debugging info */ ReachingDefinition *reachingDef = nullptr; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index c2d81537b4..481a2521f7 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -1349,7 +1349,7 @@ void AArch64CGFunc::SelectAddrof(Operand &result, StImmOperand &stImm) { offset = &CreateImmOperand(GetBaseOffset(*symLoc) + stImm.GetOffset(), k64BitSize, false); immOpndsRequiringOffsetAdjustmentForRefloc[symLoc] = offset; } - } else { + } else if (mirModule.IsJavaModule()) { auto it = immOpndsRequiringOffsetAdjustment.find(symLoc); if ((it != immOpndsRequiringOffsetAdjustment.end()) && (symbol->GetType()->GetPrimType() != PTY_agg)) { offset = (*it).second; @@ -1359,6 +1359,9 @@ void AArch64CGFunc::SelectAddrof(Operand &result, StImmOperand &stImm) { immOpndsRequiringOffsetAdjustment[symLoc] = offset; } } + } else { + // Do not cache modified symbol location + offset = &CreateImmOperand(GetBaseOffset(*symLoc) + stImm.GetOffset(), k64BitSize, false); } SelectAdd(result, *GetBaseReg(*symLoc), *offset, PTY_u64); @@ -1997,6 +2000,11 @@ void AArch64CGFunc::SelectAdd(Operand &resOpnd, Operand &opnd0, Operand &opnd1, int32 head0bitNum = GetHead0BitNum(immVal); const int32 bitNum = k64BitSize - head0bitNum - tail0bitNum; RegOperand ®Opnd = CreateRegisterOperandOfType(primType); + if (isAfterRegAlloc) { + RegType regty = GetRegTyFromPrimTy(primType); + uint32 bytelen = GetPrimTypeSize(primType); + regOpnd = GetOrCreatePhysicalRegisterOperand((AArch64reg)(R16), bytelen, regty); + } if (bitNum <= k16ValidBit) { int64 newImm = (static_cast(immVal) >> static_cast(tail0bitNum)) & 0xFFFF; @@ -2100,6 +2108,11 @@ void AArch64CGFunc::SelectSub(Operand &resOpnd, Operand &opnd0, Operand &opnd1, int32 head0bitNum = GetHead0BitNum(immVal); const int32 bitNum = k64BitSize - head0bitNum - tail0bitNum; RegOperand ®Opnd = CreateRegisterOperandOfType(primType); + if (isAfterRegAlloc) { + RegType regty = GetRegTyFromPrimTy(primType); + uint32 bytelen = GetPrimTypeSize(primType); + regOpnd = GetOrCreatePhysicalRegisterOperand((AArch64reg)(R16), bytelen, regty); + } if (bitNum <= k16ValidBit) { int64 newImm = (static_cast(immVal) >> static_cast(tail0bitNum)) & 0xFFFF; @@ -3664,9 +3677,13 @@ Operand *AArch64CGFunc::SelectMalloc(UnaryNode &node, Operand &opnd0) { opndVec.emplace_back(&opnd0); /* Use calloc to make sure allocated memory is zero-initialized */ const std::string &funcName = "calloc"; - Operand &opnd1 = CreateImmOperand(1, PTY_u32, false); + PrimType srcPty = PTY_u64; + if (opnd0.GetSize() <= k32BitSize) { + srcPty = PTY_u32; + } + Operand &opnd1 = CreateImmOperand(1, srcPty, false); opndVec.emplace_back(&opnd1); - SelectLibCall(funcName, opndVec, PTY_u32, retType); + SelectLibCall(funcName, opndVec, srcPty, retType); return &resOpnd; } @@ -5211,13 +5228,20 @@ MemOperand &AArch64CGFunc::GetOrCreateMemOpnd(const MIRSymbol &symbol, int32 off ASSERT((!IsFPLRAddedToCalleeSavedList() || ((it != memOpndsRequiringOffsetAdjustment.end()) || (storageClass == kScFormal))), "Memory operand of this symbol should have been added to the hash table"); + int32 stOffset = GetBaseOffset(*symLoc); if (it != memOpndsRequiringOffsetAdjustment.end()) { if (GetMemlayout()->IsLocalRefLoc(symbol)) { if (!forLocalRef) { return *(it->second); } - } else { + } else if (mirModule.IsJavaModule()) { return *(it->second); + } else { + Operand* offOpnd = (it->second)->GetOffset(); + if (((static_cast(offOpnd))->GetOffsetValue() == (stOffset + offset)) && + (it->second->GetSize() == size)) { + return *(it->second); + } } } it = memOpndsForStkPassedArguments.find(idx); @@ -5232,7 +5256,6 @@ MemOperand &AArch64CGFunc::GetOrCreateMemOpnd(const MIRSymbol &symbol, int32 off } AArch64RegOperand *baseOpnd = static_cast(GetBaseReg(*symLoc)); - int32 stOffset = GetBaseOffset(*symLoc); int32 totalOffset = stOffset + offset; /* needs a fresh copy of OfstOperand as we may adjust its offset at a later stage. */ AArch64OfstOperand *offsetOpnd = memPool->New(totalOffset, k64BitSize); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp index 181bb6add4..3a1b73bc66 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp @@ -3075,6 +3075,7 @@ bool GraphColorRegAllocator::AllocateRegisters() { ASSERT(cnt <= cgFunc->GetTotalNumberOfInstructions(), "Incorrect insn count"); #endif + cgFunc->SetIsAfterRegAlloc(); /* EBO propgation extent the live range and might need to be turned off. */ ComputeBlockOrder(); diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp index d7b176db05..9d75ba6f48 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_proepilog.cpp @@ -68,6 +68,7 @@ void AArch64GenProEpilog::GenStackGuard(BB &bb) { if (currCG->AddStackGuard()) { BB *formerCurBB = cgFunc.GetCurBB(); aarchCGFunc.GetDummyBB()->ClearInsns(); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*aarchCGFunc.GetDummyBB()); MIRSymbol *stkGuardSym = GlobalTables::GetGsymTable().GetSymbolFromStrIdx( @@ -99,6 +100,7 @@ void AArch64GenProEpilog::GenStackGuard(BB &bb) { cgFunc.GetCurBB()->AppendInsn(tmpInsn); bb.InsertAtBeginning(*aarchCGFunc.GetDummyBB()); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); cgFunc.SetCurBB(*formerCurBB); } } @@ -608,6 +610,7 @@ void AArch64GenProEpilog::GenerateProlog(BB &bb) { CG *currCG = cgFunc.GetCG(); BB *formerCurBB = cgFunc.GetCurBB(); aarchCGFunc.GetDummyBB()->ClearInsns(); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*aarchCGFunc.GetDummyBB()); Operand &spOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(RSP, k64BitSize, kRegTyInt); Operand &fpOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(RFP, k64BitSize, kRegTyInt); @@ -660,6 +663,7 @@ void AArch64GenProEpilog::GenerateProlog(BB &bb) { } bb.InsertAtBeginning(*aarchCGFunc.GetDummyBB()); cgFunc.SetCurBB(*formerCurBB); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); } void AArch64GenProEpilog::GenerateRet(BB &bb) { @@ -949,6 +953,7 @@ void AArch64GenProEpilog::GenerateEpilog(BB &bb) { CG *currCG = cgFunc.GetCG(); BB *formerCurBB = cgFunc.GetCurBB(); aarchCGFunc.GetDummyBB()->ClearInsns(); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(true); cgFunc.SetCurBB(*aarchCGFunc.GetDummyBB()); Operand &spOpnd = aarchCGFunc.GetOrCreatePhysicalRegisterOperand(RSP, k64BitSize, kRegTyInt); @@ -1004,6 +1009,7 @@ void AArch64GenProEpilog::GenerateEpilog(BB &bb) { epilogBB.AppendBBInsns(*cgFunc.GetCurBB()); cgFunc.SetCurBB(*formerCurBB); + aarchCGFunc.GetDummyBB()->SetIsProEpilog(false); } void AArch64GenProEpilog::GenerateEpilogForCleanup(BB &bb) { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp index 4afcb3656a..1a67313d27 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reg_alloc.cpp @@ -603,6 +603,7 @@ bool DefaultO0RegAllocator::AllocateRegisters() { rememberRegs.clear(); } } + cgFunc->SetIsAfterRegAlloc(); return true; } @@ -630,6 +631,7 @@ AnalysisResult *CgDoRegAlloc::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultM CHECK_FATAL(regAllocator != nullptr, "regAllocator is null in CgDoRegAlloc::Run"); cgFuncResultMgr->GetAnalysisResult(kCGFuncPhaseLOOP, cgFunc); + cgFunc->SetIsAfterRegAlloc(); regAllocator->AllocateRegisters(); /* the live range info may changed, so invalid the info. */ if (live != nullptr) { diff --git a/src/mapleall/maple_be/src/cg/cg_option.cpp b/src/mapleall/maple_be/src/cg/cg_option.cpp index 8f0d8ba721..70c8e34684 100644 --- a/src/mapleall/maple_be/src/cg/cg_option.cpp +++ b/src/mapleall/maple_be/src/cg/cg_option.cpp @@ -1095,7 +1095,7 @@ void CGOptions::ParseCyclePattern(const std::string &fileName) { /* Set default options according to different languages. */ void CGOptions::SetDefaultOptions(const maple::MIRModule &mod) { if (mod.IsJavaModule()) { - generateFlag = generateFlag | kGenYieldPoint | kGenLocalRc; + generateFlag = generateFlag | kGenYieldPoint | kGenLocalRc | kGrootList | kPrimorList; } insertYieldPoint = GenYieldPoint(); } diff --git a/src/mapleall/maple_be/src/cg/cgfunc.cpp b/src/mapleall/maple_be/src/cg/cgfunc.cpp index 5600f74536..fe238da768 100644 --- a/src/mapleall/maple_be/src/cg/cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/cgfunc.cpp @@ -538,7 +538,11 @@ void HandleDassign(StmtNode &stmt, CGFunc &cgFunc) { ASSERT(dassignNode.GetOpCode() == OP_dassign, "expect dassign"); BaseNode *rhs = dassignNode.GetRHS(); ASSERT(rhs != nullptr, "get rhs of dassignNode failed"); - if (rhs->GetPrimType() == PTY_agg) { + if (rhs->GetOpCode() == OP_malloc || rhs->GetOpCode() == OP_alloca) { + UnaryStmtNode &uNode = static_cast(stmt); + Operand *opnd0 = cgFunc.HandleExpr(dassignNode, *(uNode.Opnd())); + cgFunc.SelectDassign(dassignNode, *opnd0); + } else if (rhs->GetPrimType() == PTY_agg) { cgFunc.SelectAggDassign(dassignNode); return; } -- Gitee