From d42a5a1f9293374980b7668e0bdf06e785211a1c Mon Sep 17 00:00:00 2001 From: Feng Ye Date: Thu, 18 Mar 2021 19:16:44 -0700 Subject: [PATCH] RISCV setup Former-commit-id: 7fa8c75568d4a23afa8dc3694df431057145a162 --- src/mapleall/maple_be/BUILD.gn | 29 +++++++++++++- src/mapleall/maple_be/include/be/becommon.h | 2 +- src/mapleall/maple_be/include/be/lower.h | 2 +- src/mapleall/maple_be/include/cg/cg_option.h | 2 +- src/mapleall/maple_be/include/cg/cgfunc.h | 2 +- src/mapleall/maple_be/src/be/becommon.cpp | 6 ++- src/mapleall/maple_be/src/be/lower.cpp | 14 ++++--- src/mapleall/maple_be/src/cg/args.cpp | 2 +- src/mapleall/maple_be/src/cg/cg_option.cpp | 2 +- .../maple_be/src/cg/cg_phasemanager.cpp | 2 +- src/mapleall/maple_be/src/cg/cgfunc.cpp | 8 ++-- src/mapleall/maple_be/src/cg/ebo.cpp | 12 +++--- src/mapleall/maple_be/src/cg/emit.cpp | 38 +++++++++---------- src/mapleall/maple_be/src/cg/global.cpp | 2 +- src/mapleall/maple_be/src/cg/ico.cpp | 2 +- src/mapleall/maple_be/src/cg/live.cpp | 2 +- .../maple_be/src/cg/offset_adjust.cpp | 2 +- src/mapleall/maple_be/src/cg/peep.cpp | 16 ++++---- src/mapleall/maple_be/src/cg/proepilog.cpp | 2 +- src/mapleall/maple_be/src/cg/reaching.cpp | 2 +- src/mapleall/maple_be/src/cg/schedule.cpp | 6 ++- src/mapleall/maple_be/src/cg/strldr.cpp | 4 +- src/mapleall/maple_be/src/cg/yieldpoint.cpp | 4 +- .../maple_driver/src/driver_runner.cpp | 4 +- src/mapleall/mpl2mpl/src/native_stub_func.cpp | 6 +-- src/mapleall/mpl2mpl/src/vtable_impl.cpp | 4 +- 26 files changed, 109 insertions(+), 68 deletions(-) diff --git a/src/mapleall/maple_be/BUILD.gn b/src/mapleall/maple_be/BUILD.gn index e399e2b24f..03be1ff908 100644 --- a/src/mapleall/maple_be/BUILD.gn +++ b/src/mapleall/maple_be/BUILD.gn @@ -104,7 +104,34 @@ src_libcgaarch64 = [ ] src_libcgriscv64 = [ - "src/cg/riscv64/foo.cpp", + "src/cg/riscv64/mpl_atomic.cpp", + "src/cg/riscv64/riscv64_abi.cpp", + "src/cg/riscv64/riscv64_args.cpp", + "src/cg/riscv64/riscv64_cg.cpp", + "src/cg/riscv64/riscv64_cgfunc.cpp", + "src/cg/riscv64/riscv64_color_ra.cpp", + "src/cg/riscv64/riscv64_dependence.cpp", + "src/cg/riscv64/riscv64_ebo.cpp", + "src/cg/riscv64/riscv64_emitter.cpp", + "src/cg/riscv64/riscv64_fixshortbranch.cpp", + "src/cg/riscv64/riscv64_global.cpp", + "src/cg/riscv64/riscv64_ico.cpp", + "src/cg/riscv64/riscv64_immediate.cpp", + "src/cg/riscv64/riscv64_insn.cpp", + "src/cg/riscv64/riscv64_isa.cpp", + "src/cg/riscv64/riscv64_live.cpp", + "src/cg/riscv64/riscv64_lsra.cpp", + "src/cg/riscv64/riscv64_memlayout.cpp", + "src/cg/riscv64/riscv64_offset_adjust.cpp", + "src/cg/riscv64/riscv64_operand.cpp", + "src/cg/riscv64/riscv64_optimize_common.cpp", + "src/cg/riscv64/riscv64_peep.cpp", + "src/cg/riscv64/riscv64_proepilog.cpp", + "src/cg/riscv64/riscv64_reaching.cpp", + "src/cg/riscv64/riscv64_reg_alloc.cpp", + "src/cg/riscv64/riscv64_schedule.cpp", + "src/cg/riscv64/riscv64_strldr.cpp", + "src/cg/riscv64/riscv64_yieldpoint.cpp", ] src_libcgark = [ diff --git a/src/mapleall/maple_be/include/be/becommon.h b/src/mapleall/maple_be/include/be/becommon.h index bd84b8a2c5..35d2bcab17 100644 --- a/src/mapleall/maple_be/include/be/becommon.h +++ b/src/mapleall/maple_be/include/be/becommon.h @@ -27,7 +27,7 @@ namespace maplebe { using namespace maple; -#if TARGX86_64 || TARGAARCH64 +#if TARGX86_64 || TARGAARCH64 || TARGRISCV64 #define LOWERED_PTR_TYPE PTY_a64 constexpr uint8 kSizeOfPtr = 8; #elif TARGX86 || TARGARM32 || TARGVM diff --git a/src/mapleall/maple_be/include/be/lower.h b/src/mapleall/maple_be/include/be/lower.h index 183bd4777a..9814a02cc4 100644 --- a/src/mapleall/maple_be/include/be/lower.h +++ b/src/mapleall/maple_be/include/be/lower.h @@ -151,7 +151,7 @@ class CGLowerer { void LowerTryCatchBlocks(BlockNode &body); -#if TARGARM32 || TARGAARCH64 +#if TARGARM32 || TARGAARCH64 || TARGRISCV64 BlockNode *LowerReturnStruct(NaryStmtNode &retNode); #endif virtual BlockNode *LowerReturn(NaryStmtNode &retNode); diff --git a/src/mapleall/maple_be/include/cg/cg_option.h b/src/mapleall/maple_be/include/cg/cg_option.h index e50d386080..bb50508af0 100644 --- a/src/mapleall/maple_be/include/cg/cg_option.h +++ b/src/mapleall/maple_be/include/cg/cg_option.h @@ -104,7 +104,7 @@ class CGOptions : public MapleDriverOptionBase { * function at each function entry. */ static const OptionFlag kDefaultOptions = OptionFlag( -#if TARGAARCH64 || TARGARM32 +#if TARGAARCH64 || TARGARM32 || TARGRISCV64 kDoCg | kGenPie | kDoColorRegAlloc #else kDoCg diff --git a/src/mapleall/maple_be/include/cg/cgfunc.h b/src/mapleall/maple_be/include/cg/cgfunc.h index 4f33a4d4b5..b573c8abf0 100644 --- a/src/mapleall/maple_be/include/cg/cgfunc.h +++ b/src/mapleall/maple_be/include/cg/cgfunc.h @@ -297,7 +297,7 @@ class CGFunc { maxRegCount += kRegIncrStepLen; vRegTable.resize(maxRegCount); } -#if TARGAARCH64 || TARGX86_64 +#if TARGAARCH64 || TARGX86_64 || TARGRISCV64 if (size < k4ByteSize) { size = k4ByteSize; } diff --git a/src/mapleall/maple_be/src/be/becommon.cpp b/src/mapleall/maple_be/src/be/becommon.cpp index 755114bf21..957b6e4c4e 100644 --- a/src/mapleall/maple_be/src/be/becommon.cpp +++ b/src/mapleall/maple_be/src/be/becommon.cpp @@ -15,7 +15,11 @@ #include "becommon.h" #include #include +#if TARGAARCH64 #include "aarch64_rt.h" +#elif TARGRISCV64 +#include "riscv64_rt.h" +#endif #include "cg_option.h" #include "mir_builder.h" #include "mpl_logging.h" @@ -673,7 +677,7 @@ BaseNode *BECommon::GetAddressOfNode(const BaseNode &node) { MIRType *pointedType = GlobalTables::GetTypeTable().GetTypeTable().at(index); std::pair byteBitOffset = GetFieldOffset(static_cast(*pointedType), iNode.GetFieldID()); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 ASSERT(GetAddressPrimType() == PTY_a64, "incorrect address type, expect a PTY_a64"); #endif return mirModule.GetMIRBuilder()->CreateExprBinary( diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 34530486dc..9939869fa5 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -25,7 +25,11 @@ #include "intrinsic_op.h" #include "mir_builder.h" #include "opcode_info.h" +#if TARGAARCH64 #include "aarch64_rt.h" +#elif TARGRISCV64 +#include "riscv64_rt.h" +#endif #include "securec.h" #include "string_utils.h" @@ -655,7 +659,7 @@ void CGLowerer::LowerTypePtr(BaseNode &node) const { } -#if TARGARM32 || TARGAARCH64 +#if TARGARM32 || TARGAARCH64 || TARGRISCV64 BlockNode *CGLowerer::LowerReturnStruct(NaryStmtNode &retNode) { BlockNode *blk = mirModule.CurFuncCodeMemPool()->New(); for (size_t i = 0; i < retNode.GetNopndSize(); ++i) { @@ -1169,14 +1173,14 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) { case OP_intrinsiccall: case OP_call: case OP_icall: -#if TARGARM32 || TARGAARCH64 +#if TARGARM32 || TARGAARCH64 || TARGRISCV64 LowerCallStmt(*stmt, nextStmt, *newBlk); #else LowerStmt(*stmt, *newBlk); #endif break; case OP_return: { -#if TARGARM32 || TARGAARCH64 +#if TARGARM32 || TARGAARCH64 || TARGRISCV64 if (GetCurrentFunc()->IsReturnStruct()) { newBlk->AppendStatementsFromBlock(*LowerReturnStruct(static_cast(*stmt))); } else { @@ -1189,7 +1193,7 @@ BlockNode *CGLowerer::LowerBlock(BlockNode &block) { CHECK_FATAL(tmpBlockNode != nullptr, "nullptr is not expected"); newBlk->AppendStatementsFromBlock(*tmpBlockNode); } -#if TARGARM32 || TARGAARCH64 +#if TARGARM32 || TARGAARCH64 || TARGRISCV64 } #endif break; @@ -1324,7 +1328,7 @@ StmtNode *CGLowerer::LowerCall(CallNode &callNode, StmtNode *&nextStmt, BlockNod for (size_t i = 0; i < callNode.GetNopndSize(); ++i) { BaseNode *newOpnd = LowerExpr(callNode, *callNode.GetNopndAt(i), newBlk); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 callNode.SetOpnd(newOpnd, i); #else SplitCallArg(callNode, newOpnd, i, newBlk); diff --git a/src/mapleall/maple_be/src/cg/args.cpp b/src/mapleall/maple_be/src/cg/args.cpp index e52886155d..4c02720d8a 100644 --- a/src/mapleall/maple_be/src/cg/args.cpp +++ b/src/mapleall/maple_be/src/cg/args.cpp @@ -28,7 +28,7 @@ AnalysisResult *CgDoMoveRegArgs::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResu MemPool *memPool = NewMemPool(); MoveRegArgs *movRegArgs = nullptr; ASSERT(cgFunc != nullptr, "expect a cgfunc in CgDoMoveRegArgs"); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 movRegArgs = memPool->New(*cgFunc); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/cg_option.cpp b/src/mapleall/maple_be/src/cg/cg_option.cpp index eb8c30e0c8..392729f9f1 100644 --- a/src/mapleall/maple_be/src/cg/cg_option.cpp +++ b/src/mapleall/maple_be/src/cg/cg_option.cpp @@ -54,7 +54,7 @@ bool CGOptions::fastAlloc = false; uint64 CGOptions::lsraBBOptSize = 150000; uint64 CGOptions::lsraInsnOptSize = 200000; uint64 CGOptions::overlapNum = 28; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 bool CGOptions::useBarriersForVolatile = false; #else bool CGOptions::useBarriersForVolatile = true; diff --git a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp index 0025071390..9ad13821c1 100644 --- a/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp +++ b/src/mapleall/maple_be/src/cg/cg_phasemanager.cpp @@ -105,7 +105,7 @@ void CgFuncPhaseManager::AddPhases(std::vector &phases) { ADDPHASE("cfgo"); } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 if (JAVALANG && CGOptions::DoStoreLoadOpt()) { ADDPHASE("storeloadopt"); } diff --git a/src/mapleall/maple_be/src/cg/cgfunc.cpp b/src/mapleall/maple_be/src/cg/cgfunc.cpp index 2c9f4b0106..6add24a8e6 100644 --- a/src/mapleall/maple_be/src/cg/cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/cgfunc.cpp @@ -65,7 +65,7 @@ Operand *HandleConstVal(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) Operand *HandleConstStr(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) { (void)parent; auto &constStrNode = static_cast(expr); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 return cgFunc.SelectStrConst(*cgFunc.GetMemoryPool()->New( constStrNode.GetStrIdx(), *GlobalTables::GetTypeTable().GetTypeFromTyIdx((TyIdx)PTY_a64))); #else @@ -77,7 +77,7 @@ Operand *HandleConstStr(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) Operand *HandleConstStr16(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) { (void)parent; auto &constStr16Node = static_cast(expr); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 return cgFunc.SelectStr16Const(*cgFunc.GetMemoryPool()->New( constStr16Node.GetStrIdx(), *GlobalTables::GetTypeTable().GetTypeFromTyIdx((TyIdx)PTY_a64))); #else @@ -623,7 +623,7 @@ void HandleMembar(StmtNode &stmt, CGFunc &cgFunc) { if (stmt.GetOpCode() != OP_membarrelease) { return; } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 if (CGOptions::UseBarriersForVolatile()) { return; } @@ -788,7 +788,7 @@ bool CGFunc::CheckSkipMembarOp(StmtNode &stmt) { if ((opCode == OP_membarstorestore) && func.IsConstructor() && MemBarOpt(stmt)) { return true;; } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 if ((!CGOptions::UseBarriersForVolatile()) && (nextStmt->GetOpCode() == OP_membaracquire)) { isVolLoad = true; } diff --git a/src/mapleall/maple_be/src/cg/ebo.cpp b/src/mapleall/maple_be/src/cg/ebo.cpp index db4fc9b68b..cbe1227f8f 100644 --- a/src/mapleall/maple_be/src/cg/ebo.cpp +++ b/src/mapleall/maple_be/src/cg/ebo.cpp @@ -78,7 +78,7 @@ bool Ebo::IsFrameReg(Operand &opnd) const { } Operand *Ebo::GetZeroOpnd(uint32 size) const { -#ifdef TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 return &cgFunc->GetZeroOpnd(size); #else return nullptr; @@ -557,7 +557,7 @@ bool Ebo::ForwardPropagateOpnd(Insn &insn, Operand *&opnd, uint32 opndIndex, } } /* move reg, wzr, store vreg, mem ==> store wzr, mem */ -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 if (opnd->IsZeroRegister() && opndIndex == 0 && (insn.GetMachineOpcode() == MOP_wstr || insn.GetMachineOpcode() == MOP_xstr)) { if (EBO_DUMP) { @@ -926,7 +926,7 @@ void Ebo::RemoveUnusedInsns(BB &bb, bool normal) { continue; } /* this part optimize some spacial case after RA. */ -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 if (!beforeRegAlloc && insn->IsEffectiveCopy()) { int32 idx = insn->CopyOperands(); OpndInfo *opInfo = insnInfo->origOpnd[idx]; @@ -1296,7 +1296,7 @@ AnalysisResult *CgDoEbo::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMgr) { live = static_cast(cgFuncResultMgr->GetAnalysisResult(kCGFuncPhaseLIVE, cgFunc)); MemPool *eboMp = NewMemPool(); Ebo *ebo = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); #endif #if TARGARM32 @@ -1322,7 +1322,7 @@ AnalysisResult *CgDoEbo1::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMgr) live = static_cast(cgFuncResultMgr->GetAnalysisResult(kCGFuncPhaseLIVE, cgFunc)); MemPool *eboMp = NewMemPool(); Ebo *ebo = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 ebo = eboMp->New(*cgFunc, *eboMp, live, true, PhaseName()); #endif #if TARGARM32 @@ -1348,7 +1348,7 @@ AnalysisResult *CgDoPostEbo::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMg live = static_cast(cgFuncResultMgr->GetAnalysisResult(kCGFuncPhaseLIVE, cgFunc)); MemPool *eboMp = NewMemPool(); Ebo *ebo = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 ebo = eboMp->New(*cgFunc, *eboMp, live, false, PhaseName()); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/emit.cpp b/src/mapleall/maple_be/src/cg/emit.cpp index f8ff0f0da0..1b9c14a6c3 100644 --- a/src/mapleall/maple_be/src/cg/emit.cpp +++ b/src/mapleall/maple_be/src/cg/emit.cpp @@ -88,7 +88,7 @@ AsmLabel Emitter::GetTypeAsmInfoName(PrimType primType) const { case k1ByteSize: return kAsmByte; case k2ByteSize: -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 return kAsmShort; #else return kAsmValue; @@ -652,7 +652,7 @@ void Emitter::EmitAddrofFuncConst(const MIRSymbol &mirSymbol, MIRConst &elemCons Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -674,7 +674,7 @@ void Emitter::EmitAddrofFuncConst(const MIRSymbol &mirSymbol, MIRConst &elemCons Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -690,7 +690,7 @@ void Emitter::EmitAddrofFuncConst(const MIRSymbol &mirSymbol, MIRConst &elemCons Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -727,7 +727,7 @@ void Emitter::EmitAddrofFuncConst(const MIRSymbol &mirSymbol, MIRConst &elemCons Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -747,7 +747,7 @@ void Emitter::EmitAddrofFuncConst(const MIRSymbol &mirSymbol, MIRConst &elemCons return; } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -778,7 +778,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -804,7 +804,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -830,7 +830,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -850,7 +850,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -927,7 +927,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo Emit("\t.long\t"); #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -949,7 +949,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo } if (StringUtils::StartsWith(stName, kLocalClassInfoStr)) { -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -964,7 +964,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo (mirSymbol.IsReflectionClassInfo() && (idx == static_cast(ClassProperty::kInfoRo)))) { Emit("\t.word\t"); } else { -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -972,7 +972,7 @@ void Emitter::EmitAddrofSymbolConst(const MIRSymbol &mirSymbol, MIRConst &elemCo } #else -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -1389,7 +1389,7 @@ void Emitter::EmitIntConst(const MIRSymbol &mirSymbol, MIRAggConst &aggConst, ui return; } std::string prefix = rangeIdx2PrefixStr[flag]; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t"); #else Emit("\t.word\t"); @@ -1710,7 +1710,7 @@ void Emitter::EmitFuncLayoutInfo(const MIRSymbol &layout) { EmitAsmLabel(kAsmData); Emit(asmInfo->GetAlign()); Emit(" 3\n" + markerName + ":\n"); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad "); #else Emit("\t.word "); @@ -2436,7 +2436,7 @@ void Emitter::EmitGlobalVariable() { #endif } void Emitter::EmitAddressString(const std::string &address) { -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.quad\t" + address); #else Emit("\t.word\t" + address); @@ -2451,7 +2451,7 @@ void Emitter::EmitGlobalRootList(const MIRSymbol &gcrootsSt) { bool gcrootsFlag = true; uint64 vecSize = 0; for (const auto &gcrootsName : nameVec) { -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.type\t" + gcrootsName + ", @object\n" + "\t.p2align 3\n"); #else Emit("\t.type\t" + gcrootsName + ", %object\n" + "\t.p2align 3\n"); @@ -2631,7 +2631,7 @@ void Emitter::EmitDWRef(const std::string &name) { Emit("\t.type DW.ref." + name + ", \%object\n"); Emit("\t.size DW.ref." + name + ",8\n"); Emit("DW.ref." + name + ":\n"); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 Emit("\t.xword " + name + "\n"); #else Emit("\t.word " + name + "\n"); diff --git a/src/mapleall/maple_be/src/cg/global.cpp b/src/mapleall/maple_be/src/cg/global.cpp index 1493b07509..b417292b7d 100644 --- a/src/mapleall/maple_be/src/cg/global.cpp +++ b/src/mapleall/maple_be/src/cg/global.cpp @@ -71,7 +71,7 @@ AnalysisResult *CgDoGlobalOpt::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResult reachingDef->SetAnalysisMode(kRDAllAnalysis); MemPool *globalMemPool = NewMemPool(); GlobalOpt *globalOpt = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 globalOpt = globalMemPool->New(*cgFunc); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/ico.cpp b/src/mapleall/maple_be/src/cg/ico.cpp index 9b92a45b6a..d58b65d0cd 100644 --- a/src/mapleall/maple_be/src/cg/ico.cpp +++ b/src/mapleall/maple_be/src/cg/ico.cpp @@ -95,7 +95,7 @@ AnalysisResult *CgDoIco::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResultMgr) { } MemPool *memPool = NewMemPool(); IfConversionOptimizer *ico = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 ico = memPool->New(*cgFunc, *memPool); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/live.cpp b/src/mapleall/maple_be/src/cg/live.cpp index f1da998956..39de269bd5 100644 --- a/src/mapleall/maple_be/src/cg/live.cpp +++ b/src/mapleall/maple_be/src/cg/live.cpp @@ -309,7 +309,7 @@ AnalysisResult *CgDoLiveAnalysis::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncRes ASSERT(cgFunc != nullptr, "expect a cgFunc in CgDoLiveAnalysis"); MemPool *liveMemPool = NewMemPool(); LiveAnalysis *liveAnalysis = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 liveAnalysis = liveMemPool->New(*cgFunc, *liveMemPool); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/offset_adjust.cpp b/src/mapleall/maple_be/src/cg/offset_adjust.cpp index e0763773c4..8c057bc2f3 100644 --- a/src/mapleall/maple_be/src/cg/offset_adjust.cpp +++ b/src/mapleall/maple_be/src/cg/offset_adjust.cpp @@ -29,7 +29,7 @@ AnalysisResult *CgDoFPLROffsetAdjustment::Run(CGFunc *cgFunc, CgFuncResultMgr *c MemPool *memPool = NewMemPool(); FPLROffsetAdjustment *offsetAdjustment = nullptr; ASSERT(cgFunc != nullptr, "expect a cgfun in CgDoFPLROffsetAdjustment"); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 offsetAdjustment = memPool->New(*cgFunc); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/peep.cpp b/src/mapleall/maple_be/src/cg/peep.cpp index 991900287b..b5ae2819a1 100644 --- a/src/mapleall/maple_be/src/cg/peep.cpp +++ b/src/mapleall/maple_be/src/cg/peep.cpp @@ -63,7 +63,7 @@ bool PeepPattern::IfOperandIsLiveAfterInsn(const RegOperand ®Opnd, Insn &insn if (tmpRegOpnd.GetRegisterNumber() != regOpnd.GetRegisterNumber()) { continue; } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 const AArch64MD *md = &AArch64CG::kMd[static_cast(nextInsn)->GetMachineOpcode()]; auto *regProp = static_cast(md->operand[i]); #endif @@ -147,7 +147,7 @@ ReturnType PeepPattern::IsOpndLiveinBB(const RegOperand ®Opnd, const BB &bb) if (!insn->IsMachineInstruction()) { continue; } -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 const AArch64MD *md = &AArch64CG::kMd[static_cast(insn)->GetMachineOpcode()]; #endif #if TARGARM32 @@ -156,7 +156,7 @@ ReturnType PeepPattern::IsOpndLiveinBB(const RegOperand ®Opnd, const BB &bb) int32 lastOpndId = insn->GetOperandSize() - 1; for (int32 i = lastOpndId; i >= 0; --i) { Operand &opnd = insn->GetOperand(i); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 auto *regProp = static_cast(md->operand[i]); #endif #if TARGARM32 @@ -214,7 +214,7 @@ ReturnType PeepPattern::IsOpndLiveinBB(const RegOperand ®Opnd, const BB &bb) bool PeepPattern::IsMemOperandOptPattern(const Insn &insn, Insn &nextInsn) { /* Check if base register of nextInsn and the dest operand of insn are identical. */ -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 AArch64MemOperand *memOpnd = static_cast(nextInsn.GetMemOpnd()); ASSERT(memOpnd != nullptr, "null ptr check"); /* Only for AddrMode_B_OI addressing mode. */ @@ -279,7 +279,7 @@ int32 PeepOptimizer::index = 0; void PeepHoleOptimizer::Peephole0() { MemPool *memPool = memPoolCtrler.NewMemPool("peepholeOptObj"); PeepOptimizer peepOptimizer(*cgFunc, memPool); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 peepOptimizer.Run(); #endif #if TARGARM32 @@ -291,7 +291,7 @@ void PeepHoleOptimizer::Peephole0() { void PeepHoleOptimizer::PeepholeOpt() { MemPool *memPool = memPoolCtrler.NewMemPool("peepholeOptObj"); PeepOptimizer peepOptimizer(*cgFunc, memPool); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 peepOptimizer.Run(); #endif #if TARGARM32 @@ -303,7 +303,7 @@ void PeepHoleOptimizer::PeepholeOpt() { void PeepHoleOptimizer::PrePeepholeOpt() { MemPool *memPool = memPoolCtrler.NewMemPool("peepholeOptObj"); PeepOptimizer peepOptimizer(*cgFunc, memPool); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 peepOptimizer.Run(); #endif #if TARGARM32 @@ -315,7 +315,7 @@ void PeepHoleOptimizer::PrePeepholeOpt() { void PeepHoleOptimizer::PrePeepholeOpt1() { MemPool *memPool = memPoolCtrler.NewMemPool("peepholeOptObj"); PeepOptimizer peepOptimizer(*cgFunc, memPool); -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 peepOptimizer.Run(); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/proepilog.cpp b/src/mapleall/maple_be/src/cg/proepilog.cpp index b618468563..7354aa9993 100644 --- a/src/mapleall/maple_be/src/cg/proepilog.cpp +++ b/src/mapleall/maple_be/src/cg/proepilog.cpp @@ -41,7 +41,7 @@ AnalysisResult *CgDoGenProEpiLog::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncRes ASSERT(cgFunc != nullptr, "expect a cgfunc in CgDoGenProEpiLog"); MemPool *memPool = NewMemPool(); GenProEpilog *genPE = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 genPE = memPool->New(*cgFunc); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/reaching.cpp b/src/mapleall/maple_be/src/cg/reaching.cpp index 7babdea784..b9558a6857 100644 --- a/src/mapleall/maple_be/src/cg/reaching.cpp +++ b/src/mapleall/maple_be/src/cg/reaching.cpp @@ -1130,7 +1130,7 @@ AnalysisResult *CgDoReachingDefinition::Run(CGFunc *cgFunc, CgFuncResultMgr *cgF CHECK_NULL_FATAL(cgFuncResultMgr); MemPool *memPool = NewMemPool(); ReachingDefinition *reachingDef = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 reachingDef = memPool->New(*cgFunc, *memPool); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/schedule.cpp b/src/mapleall/maple_be/src/cg/schedule.cpp index f94215fbe4..e09d9d794c 100644 --- a/src/mapleall/maple_be/src/cg/schedule.cpp +++ b/src/mapleall/maple_be/src/cg/schedule.cpp @@ -14,6 +14,8 @@ */ #if TARGAARCH64 #include "aarch64_schedule.h" +#elif TARGRISCV64 +#include "riscv64_schedule.h" #endif #if TARGARM32 #include "arm32_schedule.h" @@ -520,7 +522,7 @@ AnalysisResult* CgDoPreScheduling::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncRe MemPool *scheduleMp = NewMemPool(); Schedule *schedule = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 schedule = scheduleMp->New(*cgFunc, *scheduleMp, *live, PhaseName()); #endif #if TARGARM32 @@ -548,7 +550,7 @@ AnalysisResult* CgDoScheduling::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncResMg MemPool *scheduleMp = NewMemPool(); Schedule *schedule = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 schedule = scheduleMp->New(*cgFunc, *scheduleMp, *live, PhaseName()); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/strldr.cpp b/src/mapleall/maple_be/src/cg/strldr.cpp index b73819e74e..6390b1a54a 100644 --- a/src/mapleall/maple_be/src/cg/strldr.cpp +++ b/src/mapleall/maple_be/src/cg/strldr.cpp @@ -14,6 +14,8 @@ */ #if TARGAARCH64 #include "aarch64_strldr.h" +#elif TARGRISCV64 +#include "riscv64_strldr.h" #endif #if TARGARM32 #include "arm32_strldr.h" @@ -44,7 +46,7 @@ AnalysisResult *CgDoStoreLoadOpt::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFuncRes } MemPool *storeMemPool = NewMemPool(); StoreLoadOpt *storeLoadOpt = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 storeLoadOpt = storeMemPool->New(*cgFunc, *storeMemPool); #endif #if TARGARM32 diff --git a/src/mapleall/maple_be/src/cg/yieldpoint.cpp b/src/mapleall/maple_be/src/cg/yieldpoint.cpp index 8ba932145e..0875ccc332 100644 --- a/src/mapleall/maple_be/src/cg/yieldpoint.cpp +++ b/src/mapleall/maple_be/src/cg/yieldpoint.cpp @@ -15,6 +15,8 @@ #include "yieldpoint.h" #if TARGAARCH64 #include "aarch64_yieldpoint.h" +#elif TARGRISCV64 +#include "riscv64_yieldpoint.h" #endif #if TARGARM32 #include "arm32_yieldpoint.h" @@ -28,7 +30,7 @@ AnalysisResult *CgYieldPointInsertion::Run(CGFunc *cgFunc, CgFuncResultMgr *cgFu ASSERT(cgFunc != nullptr, "expect a cgfunc in CgYieldPointInsertion"); MemPool *memPool = NewMemPool(); YieldPointInsertion *yieldPoint = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 yieldPoint = memPool->New(*cgFunc); #endif #if TARGARM32 diff --git a/src/mapleall/maple_driver/src/driver_runner.cpp b/src/mapleall/maple_driver/src/driver_runner.cpp index 0d0553b56d..da18294db8 100644 --- a/src/mapleall/maple_driver/src/driver_runner.cpp +++ b/src/mapleall/maple_driver/src/driver_runner.cpp @@ -22,7 +22,7 @@ #include "file_utils.h" #include "lower.h" -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 #include "aarch64/aarch64_cg.h" #include "aarch64/aarch64_emitter.h" #elif TARGARM32 @@ -293,7 +293,7 @@ void DriverRunner::ProcessCGPhase(const std::string &outputFile, const std::stri CG *DriverRunner::CreateCGAndBeCommon(const std::string &outputFile, const std::string &originBaseName) { CG *cg = nullptr; -#if TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 cg = new AArch64CG(*theModule, *cgOptions, cgOptions->GetEHExclusiveFunctionNameVec(), CGOptions::GetCyclePatternMap()); cg->SetEmitter(*theModule->GetMemPool()->New(*cg, outputFile)); diff --git a/src/mapleall/mpl2mpl/src/native_stub_func.cpp b/src/mapleall/mpl2mpl/src/native_stub_func.cpp index 827d07b2f3..cc248da95d 100644 --- a/src/mapleall/mpl2mpl/src/native_stub_func.cpp +++ b/src/mapleall/mpl2mpl/src/native_stub_func.cpp @@ -378,7 +378,7 @@ void NativeStubFuncGeneration::GenerateRegisteredNativeFuncCall(MIRFunction &fun builder->CreateExprCompare(OP_lt, *GlobalTables::GetTypeTable().GetUInt1(), *GlobalTables::GetTypeTable().GetPtr(), regReadExpr, builder->CreateIntConst(MByteRef::kPositiveOffsetBias, PTY_ptr)); -#elif defined(TARGAARCH64) +#elif defined(TARGAARCH64) || defined(TARGRISCV64) // define a temp register for bitwise-and operation constexpr int intConstLength = 1; BaseNode *andExpr = builder->CreateExprBinary(OP_band, *GlobalTables::GetTypeTable().GetPtr(), regReadExpr, @@ -415,7 +415,7 @@ void NativeStubFuncGeneration::GenerateRegisteredNativeFuncCall(MIRFunction &fun func.GetBody()->AddStatement(wrapperCall); } else if (!Options::regNativeDynamicOnly) { // Qemu func.GetBody()->AddStatement(funcPtrAssign); -#ifdef TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 func.GetBody()->AddStatement(flagSymAssign); #endif // Get find_native_func function @@ -472,7 +472,7 @@ void NativeStubFuncGeneration::GenerateRegisteredNativeFuncCall(MIRFunction &fun } } else { // EMUI func.GetBody()->AddStatement(funcPtrAssign); -#ifdef TARGAARCH64 +#if TARGAARCH64 || TARGRISCV64 func.GetBody()->AddStatement(flagSymAssign); #endif MIRFunction *findNativeFunc = builder->GetOrCreateFunction(namemangler::kFindNativeFunc, diff --git a/src/mapleall/mpl2mpl/src/vtable_impl.cpp b/src/mapleall/mpl2mpl/src/vtable_impl.cpp index 4985f61f20..8303bc6dae 100644 --- a/src/mapleall/mpl2mpl/src/vtable_impl.cpp +++ b/src/mapleall/mpl2mpl/src/vtable_impl.cpp @@ -35,7 +35,7 @@ VtableImpl::VtableImpl(MIRModule &mod, KlassHierarchy *kh, bool dump) mccItabFunc = builder->GetOrCreateFunction(kInterfaceMethod, TyIdx(PTY_ptr)); mccItabFunc->SetAttr(FUNCATTR_nosideeffect); } -#if defined(TARGARM) || defined(TARGAARCH64) +#if defined(TARGARM) || defined(TARGAARCH64) || defined(TARGRISCV64) bool VtableImpl::Intrinsify(MIRFunction &func, CallNode &cnode) { MIRFunction *calleeFunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(cnode.GetPUIdx()); const std::string funcName = calleeFunc->GetName(); @@ -91,7 +91,7 @@ void VtableImpl::ProcessFunc(MIRFunction *func) { while (stmt != nullptr) { next = stmt->GetNext(); Opcode opcode = stmt->GetOpCode(); -#if defined(TARGARM) || defined(TARGAARCH64) +#if defined(TARGARM) || defined(TARGAARCH64) || defined(TARGRISCV64) if (kOpcodeInfo.IsCallAssigned(opcode)) { CallNode *cnode = static_cast(stmt); MIRFunction *calleefunc = GlobalTables::GetFunctionTable().GetFunctionFromPuidx(cnode->GetPUIdx()); -- Gitee