diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h
index 67e6f402c70e847604218423a06a74735ec6575e..d7da2ecd8706e66a7ec501685c45af57f6bb66cf 100644
--- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h
+++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h
@@ -31,6 +31,7 @@ struct ArgInfo {
   const AArch64SymbolAlloc *symLoc;
   uint8 memPairSecondRegSize;  /* struct arg requiring two regs, size of 2nd reg */
   bool doMemPairOpt;
+  bool CreateTwoStores;
 };
 
 class AArch64MoveRegArgs : public MoveRegArgs {
diff --git a/src/mapleall/maple_be/src/be/becommon.cpp b/src/mapleall/maple_be/src/be/becommon.cpp
index ea32eb624b4080bd3836db3085479cbb7d23359e..c939f9d227c206d14ea6637a0967c907eb197ee7 100644
--- a/src/mapleall/maple_be/src/be/becommon.cpp
+++ b/src/mapleall/maple_be/src/be/becommon.cpp
@@ -198,9 +198,6 @@ void BECommon::ComputeStructTypeSizesAligns(MIRType &ty, const TyIdx &tyIdx) {
       SetHasFlexibleArray(tyIdx.GetIdx(), true);
     }
   }
-  if (mirModule.GetSrcLang() == kSrcLangC && GetTypeAlign(tyIdx) < k8ByteSize) {
-    SetTypeAlign(tyIdx, k8ByteSize);
-  }
   SetTypeSize(tyIdx, RoundUp(allocedSize, GetTypeAlign(tyIdx.GetIdx())));
 }
 
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp
index 722ac3d6750dfc17b5c8f41a89c42878e3046a9a..faa728dec8b0db9ce0a537eeed73e5761b80de0c 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp
@@ -89,6 +89,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map<uint32, AArch64reg> &argsList, s
   argInfo.symSize = aarchCGFunc->GetBecommon().GetTypeSize(argInfo.mirTy->GetTypeIndex());
   argInfo.memPairSecondRegSize = 0;
   argInfo.doMemPairOpt = false;
+  argInfo.CreateTwoStores  = false;
   if ((argInfo.symSize > k8ByteSize) && (argInfo.symSize <= k16ByteSize)) {
     if (numFpRegs[argIndex] > kOneRegister) {
       argInfo.symSize = argInfo.stkSize = fpSize[argIndex];
@@ -105,7 +106,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map<uint32, AArch64reg> &argsList, s
   } else if (argInfo.symSize > k16ByteSize) {
     /* For large struct passing, a pointer to the copy is used. */
     argInfo.symSize = argInfo.stkSize = kSizeOfPtr;
-  } if ((argInfo.mirTy->GetPrimType() == PTY_agg) && (argInfo.symSize < k4ByteSize)) {
+  } else if ((argInfo.mirTy->GetPrimType() == PTY_agg) && (argInfo.symSize < k4ByteSize)) {
     /* For small aggregate parameter, set to minimum of 4 bytes. */
     argInfo.symSize = argInfo.stkSize = k4ByteSize;
   } else if (numFpRegs[argIndex] > kOneRegister) {
@@ -128,6 +129,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map<uint32, AArch64reg> &argsList, s
      */
     argInfo.symSize = kSizeOfPtr;
     argInfo.doMemPairOpt = false;
+    argInfo.CreateTwoStores = true;
   }
   return argInfo;
 }
@@ -254,7 +256,7 @@ void AArch64MoveRegArgs::GenerateStrInsn(ArgInfo &argInfo, AArch64reg reg2, uint
   }
   aarchCGFunc->GetCurBB()->AppendInsn(insn);
 
-  if (argInfo.doMemPairOpt) {
+  if (argInfo.CreateTwoStores || argInfo.doMemPairOpt) {
     /* second half of the struct passing by registers. */
     uint32 part2BitSize = argInfo.memPairSecondRegSize * kBitsPerByte;
     GenOneInsn(argInfo, *baseOpnd, part2BitSize, reg2, (stOffset + kSizeOfPtr));
@@ -302,9 +304,11 @@ void AArch64MoveRegArgs::MoveRegisterArgs() {
           static_cast<AArch64SymbolAlloc *>(aarchCGFunc->GetMemlayout()->GetSymAllocInfo(
               secondArgInfo.sym->GetStIndex()));
       /* Make sure they are in same segment if want to use stp */
-      if (IsInSameSegment(firstArgInfo, secondArgInfo)) {
+      if (firstArgInfo.doMemPairOpt || IsInSameSegment(firstArgInfo, secondArgInfo)) {
         GenerateStpInsn(firstArgInfo, secondArgInfo);
-        it = next;
+        if (firstArgInfo.doMemPairOpt == false) {
+          it = next;
+        }
         continue;
       }
     }
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp
index 2da54cb6254d30b5c9d65f020dce9f14741d40ef..c89a84fcfcfcd7808442d9a94b41d0ada328679c 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp
@@ -262,7 +262,13 @@ void AArch64MemLayout::LayoutLocalVariales(std::vector<MIRSymbol*> &tempVar, std
         continue;
       }
       symLoc->SetMemSegment(segLocals);
-      segLocals.SetSize(RoundUp(segLocals.GetSize(), be.GetTypeAlign(tyIdx)));
+      MIRType *ty = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdx);
+      uint32 align = be.GetTypeAlign(tyIdx);
+      if (ty->GetPrimType() == PTY_agg && align < 8) {
+        segLocals.SetSize(RoundUp(segLocals.GetSize(), 8));
+      } else {
+        segLocals.SetSize(RoundUp(segLocals.GetSize(), align));
+      }
       symLoc->SetOffset(segLocals.GetSize());
       segLocals.SetSize(segLocals.GetSize() + be.GetTypeSize(tyIdx));
     }