From e305c8650f83511deb6af2780bb15776c500fef2 Mon Sep 17 00:00:00 2001 From: William Chen Date: Fri, 2 Apr 2021 11:44:32 -0700 Subject: [PATCH 1/5] Fix ComputeStructTypeSizesAligns not to set align for struct to 8 --- src/mapleall/maple_be/src/be/becommon.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mapleall/maple_be/src/be/becommon.cpp b/src/mapleall/maple_be/src/be/becommon.cpp index ea32eb624b..c939f9d227 100644 --- a/src/mapleall/maple_be/src/be/becommon.cpp +++ b/src/mapleall/maple_be/src/be/becommon.cpp @@ -198,9 +198,6 @@ void BECommon::ComputeStructTypeSizesAligns(MIRType &ty, const TyIdx &tyIdx) { SetHasFlexibleArray(tyIdx.GetIdx(), true); } } - if (mirModule.GetSrcLang() == kSrcLangC && GetTypeAlign(tyIdx) < k8ByteSize) { - SetTypeAlign(tyIdx, k8ByteSize); - } SetTypeSize(tyIdx, RoundUp(allocedSize, GetTypeAlign(tyIdx.GetIdx()))); } -- Gitee From 3b20beed7ec71594d6f15a497d65d377970ff338 Mon Sep 17 00:00:00 2001 From: William Chen Date: Fri, 2 Apr 2021 16:36:22 -0700 Subject: [PATCH 2/5] Fix MoveRegisterArgs to store 2nd part of struct param onto stack --- src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h | 1 + src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h index 67e6f402c7..d7da2ecd87 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_args.h @@ -31,6 +31,7 @@ struct ArgInfo { const AArch64SymbolAlloc *symLoc; uint8 memPairSecondRegSize; /* struct arg requiring two regs, size of 2nd reg */ bool doMemPairOpt; + bool CreateTwoStores; }; class AArch64MoveRegArgs : public MoveRegArgs { diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp index 722ac3d675..5a2a957f85 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp @@ -89,6 +89,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map &argsList, s argInfo.symSize = aarchCGFunc->GetBecommon().GetTypeSize(argInfo.mirTy->GetTypeIndex()); argInfo.memPairSecondRegSize = 0; argInfo.doMemPairOpt = false; + argInfo.CreateTwoStores = false; if ((argInfo.symSize > k8ByteSize) && (argInfo.symSize <= k16ByteSize)) { if (numFpRegs[argIndex] > kOneRegister) { argInfo.symSize = argInfo.stkSize = fpSize[argIndex]; @@ -128,6 +129,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map &argsList, s */ argInfo.symSize = kSizeOfPtr; argInfo.doMemPairOpt = false; + argInfo.CreateTwoStores = true; } return argInfo; } @@ -254,7 +256,7 @@ void AArch64MoveRegArgs::GenerateStrInsn(ArgInfo &argInfo, AArch64reg reg2, uint } aarchCGFunc->GetCurBB()->AppendInsn(insn); - if (argInfo.doMemPairOpt) { + if (argInfo.CreateTwoStores || argInfo.doMemPairOpt) { /* second half of the struct passing by registers. */ uint32 part2BitSize = argInfo.memPairSecondRegSize * kBitsPerByte; GenOneInsn(argInfo, *baseOpnd, part2BitSize, reg2, (stOffset + kSizeOfPtr)); -- Gitee From db8131e1cdbc80ae137b5c8750ede4ad39a0c279 Mon Sep 17 00:00:00 2001 From: William Chen Date: Fri, 2 Apr 2021 16:36:45 -0700 Subject: [PATCH 3/5] Fix local var memlayout making struct size to multiple of 8 bytes --- .../maple_be/src/cg/aarch64/aarch64_memlayout.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp index 2da54cb625..c89a84fcfc 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_memlayout.cpp @@ -262,7 +262,13 @@ void AArch64MemLayout::LayoutLocalVariales(std::vector &tempVar, std continue; } symLoc->SetMemSegment(segLocals); - segLocals.SetSize(RoundUp(segLocals.GetSize(), be.GetTypeAlign(tyIdx))); + MIRType *ty = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdx); + uint32 align = be.GetTypeAlign(tyIdx); + if (ty->GetPrimType() == PTY_agg && align < 8) { + segLocals.SetSize(RoundUp(segLocals.GetSize(), 8)); + } else { + segLocals.SetSize(RoundUp(segLocals.GetSize(), align)); + } symLoc->SetOffset(segLocals.GetSize()); segLocals.SetSize(segLocals.GetSize() + be.GetTypeSize(tyIdx)); } -- Gitee From 7617e0b782a7c72f53ab55fb870b217e9485815b Mon Sep 17 00:00:00 2001 From: William Chen Date: Sat, 3 Apr 2021 19:51:03 -0700 Subject: [PATCH 4/5] Fix typo, missing else --- src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp index 5a2a957f85..0b6d8b1dd0 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp @@ -106,7 +106,7 @@ ArgInfo AArch64MoveRegArgs::GetArgInfo(std::map &argsList, s } else if (argInfo.symSize > k16ByteSize) { /* For large struct passing, a pointer to the copy is used. */ argInfo.symSize = argInfo.stkSize = kSizeOfPtr; - } if ((argInfo.mirTy->GetPrimType() == PTY_agg) && (argInfo.symSize < k4ByteSize)) { + } else if ((argInfo.mirTy->GetPrimType() == PTY_agg) && (argInfo.symSize < k4ByteSize)) { /* For small aggregate parameter, set to minimum of 4 bytes. */ argInfo.symSize = argInfo.stkSize = k4ByteSize; } else if (numFpRegs[argIndex] > kOneRegister) { -- Gitee From 4ffa5ad2232da53fc23b3933a20d451c4003ed3e Mon Sep 17 00:00:00 2001 From: William Chen Date: Sun, 4 Apr 2021 15:04:10 -0700 Subject: [PATCH 5/5] Fix MoveRegisterArgs to use stp for structure param between 8/16 bytes --- src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp index 0b6d8b1dd0..faa728dec8 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_args.cpp @@ -304,9 +304,11 @@ void AArch64MoveRegArgs::MoveRegisterArgs() { static_cast(aarchCGFunc->GetMemlayout()->GetSymAllocInfo( secondArgInfo.sym->GetStIndex())); /* Make sure they are in same segment if want to use stp */ - if (IsInSameSegment(firstArgInfo, secondArgInfo)) { + if (firstArgInfo.doMemPairOpt || IsInSameSegment(firstArgInfo, secondArgInfo)) { GenerateStpInsn(firstArgInfo, secondArgInfo); - it = next; + if (firstArgInfo.doMemPairOpt == false) { + it = next; + } continue; } } -- Gitee