From e6da6d8ab9e85706b254103194d3a0d04ea746f4 Mon Sep 17 00:00:00 2001
From: William Chen <william.chen@futurewei.com>
Date: Mon, 11 Oct 2021 00:03:53 -0700
Subject: [PATCH] Fix assertion issues with debug build.

---
 src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp   | 3 ++-
 src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp   | 4 +++-
 src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp | 1 -
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
index 0bbee8d65f..2b4a7bd109 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
@@ -6424,7 +6424,8 @@ AArch64RegOperand *AArch64CGFunc::SelectParmListDreadAccessField(const MIRSymbol
     memOpnd = &GetOrCreateMemOpnd(sym, (kSizeOfPtr * parmNum + offset), memSize);
   }
   MOperator selectedMop = PickLdInsn(dataSizeBits, primType);
-  if (!IsOperandImmValid(selectedMop, memOpnd, kInsnSecondOpnd)) {
+  if ((static_cast<AArch64MemOperand *>(memOpnd)->GetAddrMode() == AArch64MemOperand::kAddrModeBOi) &&
+      !IsOperandImmValid(selectedMop, memOpnd, kInsnSecondOpnd)) {
     memOpnd = &SplitOffsetWithAddInstruction(*static_cast<AArch64MemOperand*>(memOpnd), dataSizeBits);
   }
   GetCurBB()->AppendInsn(cg->BuildInstruction<AArch64Insn>(selectedMop, *parmOpnd, *memOpnd));
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
index 32fec5d9d1..2f92e14ab8 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
@@ -96,7 +96,9 @@ bool OptimizePattern::OpndDefByOneOrZero(Insn &insn, int32 useIdx) const {
   }
 
   InsnSet defInsnSet = cgFunc.GetRD()->FindDefForRegOpnd(insn, useIdx);
-  ASSERT(!defInsnSet.empty(), "Operand must be defined before used");
+  if (defInsnSet.empty()) {
+    return false;
+  }
 
   for (auto &defInsn : defInsnSet) {
     if (!InsnDefOneOrZero(*defInsn)) {
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
index 8a54d7fbd8..61a5d1628f 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
@@ -707,7 +707,6 @@ bool AArch64ReachingDefinition::FindRegUsingBetweenInsn(uint32 regNO, Insn *star
   }
 
   ASSERT(startInsn->GetBB() == endInsn->GetBB(), "two insns must be in a same BB");
-  ASSERT(endInsn->GetId() >= startInsn->GetId(), "two insns must be in a same BB");
   for (Insn *insn = startInsn; insn != nullptr && insn != endInsn->GetNext(); insn = insn->GetNext()) {
     if (!insn->IsMachineInstruction()) {
       continue;
-- 
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