diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
index ff2add97aee3363a9a2758fadfcb4de23485f9f6..8d87c16274222337f530cf859aa85e79d3004371 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp
@@ -6456,7 +6456,8 @@ AArch64RegOperand *AArch64CGFunc::SelectParmListDreadAccessField(const MIRSymbol
     memOpnd = &GetOrCreateMemOpnd(sym, (kSizeOfPtr * parmNum + offset), memSize);
   }
   MOperator selectedMop = PickLdInsn(dataSizeBits, primType);
-  if (!IsOperandImmValid(selectedMop, memOpnd, kInsnSecondOpnd)) {
+  if ((static_cast<AArch64MemOperand *>(memOpnd)->GetAddrMode() == AArch64MemOperand::kAddrModeBOi) &&
+      !IsOperandImmValid(selectedMop, memOpnd, kInsnSecondOpnd)) {
     memOpnd = &SplitOffsetWithAddInstruction(*static_cast<AArch64MemOperand*>(memOpnd), dataSizeBits);
   }
   GetCurBB()->AppendInsn(cg->BuildInstruction<AArch64Insn>(selectedMop, *parmOpnd, *memOpnd));
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
index afcb8b2b413d51f3021a822f6978757092fee392..b8254e596cf72505a1aa1cf40b081c5a339c1b72 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_global.cpp
@@ -95,6 +95,9 @@ bool OptimizePattern::OpndDefByOneOrZero(Insn &insn, int32 useIdx) const {
   }
 
   InsnSet defInsnSet = cgFunc.GetRD()->FindDefForRegOpnd(insn, useIdx);
+  if (defInsnSet.empty()) {
+    return false;
+  }
 
   for (auto &defInsn : defInsnSet) {
     if (!InsnDefOneOrZero(*defInsn)) {
diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
index 3daf20d7cb577bb5899f99a2eb567055ef3d6c86..e8981632abe477f93f91f1763b5d85295b958fd1 100644
--- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
+++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_reaching.cpp
@@ -760,7 +760,6 @@ bool AArch64ReachingDefinition::FindRegUsingBetweenInsn(uint32 regNO, Insn *star
   }
 
   ASSERT(startInsn->GetBB() == endInsn->GetBB(), "two insns must be in a same BB");
-  ASSERT(endInsn->GetId() >= startInsn->GetId(), "two insns must be in a same BB");
   for (Insn *insn = startInsn; insn != nullptr && insn != endInsn->GetNext(); insn = insn->GetNext()) {
     if (!insn->IsMachineInstruction()) {
       continue;