From 7dc24e4a4284f081b8f59cd180d42e5805c062f5 Mon Sep 17 00:00:00 2001 From: Alfred Huang Date: Tue, 9 Nov 2021 10:33:57 -0800 Subject: [PATCH 1/2] Fixed incorrect madd combine with vector operands. Allow vector shift with 2nd scalar poperand. --- src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h | 2 +- src/mapleall/maple_be/include/cg/cgfunc.h | 2 +- src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 7 ++++--- src/mapleall/maple_be/src/cg/cgfunc.cpp | 2 ++ 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h index ca7c344efa..05f9289a6f 100644 --- a/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h +++ b/src/mapleall/maple_be/include/cg/aarch64/aarch64_cgfunc.h @@ -292,7 +292,7 @@ class AArch64CGFunc : public CGFunc { RegOperand *SelectVectorPairwiseAdd(PrimType rType, Operand *src, PrimType sType) override; RegOperand *SelectVectorReverse(PrimType rtype, Operand *src, PrimType stype, uint32 size) override; RegOperand *SelectVectorSetElement(Operand *eOp, PrimType eTyp, Operand *vOpd, PrimType vTyp, int32 lane) override; - RegOperand *SelectVectorShift(PrimType rType, Operand *o1, Operand *o2, Opcode opc) override; + RegOperand *SelectVectorShift(PrimType rType, Operand *o1, PrimType oty1, Operand *o2, PrimType oty2, Opcode opc) override; RegOperand *SelectVectorShiftImm(PrimType rType, Operand *o1, Operand *imm, int32 sVal, Opcode opc) override; RegOperand *SelectVectorShiftRNarrow(PrimType rType, Operand *o1, PrimType oTyp, Operand *o2, bool isLow) override; RegOperand *SelectVectorSum(PrimType rtype, Operand *o1, PrimType oType) override; diff --git a/src/mapleall/maple_be/include/cg/cgfunc.h b/src/mapleall/maple_be/include/cg/cgfunc.h index d20b6a38b0..4a57779011 100644 --- a/src/mapleall/maple_be/include/cg/cgfunc.h +++ b/src/mapleall/maple_be/include/cg/cgfunc.h @@ -317,7 +317,7 @@ class CGFunc { virtual RegOperand *SelectVectorPairwiseAdd(PrimType rType, Operand *src, PrimType sType) = 0; virtual RegOperand *SelectVectorReverse(PrimType rtype, Operand *src, PrimType stype, uint32 size) = 0; virtual RegOperand *SelectVectorSetElement(Operand *eOp, PrimType eTyp, Operand *vOpd, PrimType vTyp, int32 lane) = 0; - virtual RegOperand *SelectVectorShift(PrimType rType, Operand *o1, Operand *o2, Opcode opc) = 0; + virtual RegOperand *SelectVectorShift(PrimType rType, Operand *o1, PrimType oty1, Operand *o2, PrimType oty2, Opcode opc) = 0; virtual RegOperand *SelectVectorShiftImm(PrimType rType, Operand *o1, Operand *imm, int32 sVal, Opcode opc) = 0; virtual RegOperand *SelectVectorShiftRNarrow(PrimType rType, Operand *o1, PrimType oType, Operand *o2, bool isLow) = 0; diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 983f0ba64e..100f688146 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -4269,7 +4269,7 @@ Operand *AArch64CGFunc::SelectShift(BinaryNode &node, Operand &opnd0, Operand &o int64 sConst = static_cast(opnd1).GetValue(); resOpnd = SelectVectorShiftImm(dtype, &opnd0, &opnd1, sConst, opcode); } else if ((IsPrimitiveVector(dtype) || isOneElemVector) && !opnd1.IsConstImmediate()) { - resOpnd = SelectVectorShift(dtype, &opnd0, &opnd1, opcode); + resOpnd = SelectVectorShift(dtype, &opnd0, expr->GetPrimType(), &opnd1, node.Opnd(1)->GetPrimType(), opcode); } else { PrimType primType = isFloat ? dtype : (is64Bits ? (isSigned ? PTY_i64 : PTY_u64) : (isSigned ? PTY_i32 : PTY_u32)); resOpnd = &GetOrCreateResOperand(parent, primType); @@ -9833,7 +9833,8 @@ RegOperand *AArch64CGFunc::SelectVectorCompare(Operand *o1, PrimType oty1, Opera return res; } -RegOperand *AArch64CGFunc::SelectVectorShift(PrimType rType, Operand *o1, Operand *o2, Opcode opc) { +RegOperand *AArch64CGFunc::SelectVectorShift(PrimType rType, Operand *o1, PrimType oty1, Operand *o2, PrimType oty2, Opcode opc) { + PrepareVectorOperands(&o1, oty1, &o2, oty2); PrimType resultType = rType; VectorRegSpec *vecSpecDest = GetMemoryPool()->New(rType); VectorRegSpec *vecSpec1 = GetMemoryPool()->New(rType); /* vector operand 1 */ @@ -9922,7 +9923,7 @@ RegOperand *AArch64CGFunc::SelectVectorShiftImm(PrimType rType, Operand *o1, Ope Insn *insn = &GetCG()->BuildInstruction(mOp, *res, *imm); static_cast(insn)->PushRegSpecEntry(vecSpecDest); GetCurBB()->AppendInsn(*insn); - res = SelectVectorShift(rType, o1, res, opc); + res = SelectVectorShift(rType, o1, rType, res, rType, opc); return res; } MOperator mOp; diff --git a/src/mapleall/maple_be/src/cg/cgfunc.cpp b/src/mapleall/maple_be/src/cg/cgfunc.cpp index fa18ab883d..a7e6ac587a 100644 --- a/src/mapleall/maple_be/src/cg/cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/cgfunc.cpp @@ -87,6 +87,7 @@ Operand *HandleConstStr16(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc Operand *HandleAdd(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) { if (Globals::GetInstance()->GetOptimLevel() >= CGOptions::kLevel2 && expr.Opnd(0)->GetOpCode() == OP_mul && + !IsPrimitiveVector(expr.GetPrimType()) && !IsPrimitiveFloat(expr.GetPrimType()) && expr.Opnd(0)->Opnd(0)->GetOpCode() != OP_constval && expr.Opnd(0)->Opnd(1)->GetOpCode() != OP_constval) { return cgFunc.SelectMadd(static_cast(expr), @@ -94,6 +95,7 @@ Operand *HandleAdd(const BaseNode &parent, BaseNode &expr, CGFunc &cgFunc) { *cgFunc.HandleExpr(*expr.Opnd(0), *expr.Opnd(0)->Opnd(1)), *cgFunc.HandleExpr(expr, *expr.Opnd(1)), parent); } else if (Globals::GetInstance()->GetOptimLevel() >= CGOptions::kLevel2 && expr.Opnd(1)->GetOpCode() == OP_mul && + !IsPrimitiveVector(expr.GetPrimType()) && !IsPrimitiveFloat(expr.GetPrimType()) && expr.Opnd(1)->Opnd(0)->GetOpCode() != OP_constval && expr.Opnd(1)->Opnd(1)->GetOpCode() != OP_constval) { return cgFunc.SelectMadd(static_cast(expr), -- Gitee From fc2a5ba5b3c5a7ed1695b0ec2a0ae928e9c0e613 Mon Sep 17 00:00:00 2001 From: Alfred Huang Date: Tue, 9 Nov 2021 13:10:36 -0800 Subject: [PATCH 2/2] Fixed typo for vaddw. --- src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp index 100f688146..c9d138f2f8 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_cgfunc.cpp @@ -9453,9 +9453,9 @@ RegOperand *AArch64CGFunc::SelectVectorAddWiden(Operand *o1, PrimType otyp1, Ope MOperator mOp; if (isLow) { - mOp = IsUnsignedInteger(otyp1) ? MOP_vsaddwvvu : MOP_vuaddwvvu; + mOp = IsUnsignedInteger(otyp1) ? MOP_vuaddwvvu : MOP_vsaddwvvu; } else { - mOp = IsUnsignedInteger(otyp1) ? MOP_vsaddw2vvv : MOP_vuaddw2vvv; + mOp = IsUnsignedInteger(otyp1) ? MOP_vuaddw2vvv : MOP_vsaddw2vvv; } Insn *insn = &GetCG()->BuildInstruction(mOp, *res, *o1, *o2); static_cast(insn)->PushRegSpecEntry(vecSpecDest); -- Gitee