diff --git a/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp b/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp index df0c0355a3cccbaf0176617c54408e768779c2d6..34745996508d40beeefcff80690c14383a169361 100644 --- a/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp +++ b/src/mapleall/maple_be/src/cg/aarch64/aarch64_color_ra.cpp @@ -3674,6 +3674,7 @@ void GraphColorRegAllocator::GenerateSpillFillRegs(Insn &insn) { } } const AArch64MD *md = &AArch64CG::kMd[static_cast(&insn)->GetMachineOpcode()]; + bool isIndexedMemOp = false; for (uint32 opndIdx = 0; opndIdx < opndNum; ++opndIdx) { Operand *opnd = &insn.GetOperand(static_cast(opndIdx)); if (opnd == nullptr) { @@ -3683,6 +3684,9 @@ void GraphColorRegAllocator::GenerateSpillFillRegs(Insn &insn) { // call parameters } else if (opnd->IsMemoryAccessOperand()) { auto *memopnd = static_cast(opnd); + if (memopnd->GetIndexOpt() == AArch64MemOperand::kPreIndex || memopnd->GetIndexOpt() == AArch64MemOperand::kPostIndex) { + isIndexedMemOp = true; + } auto *base = static_cast(memopnd->GetBaseRegister()); if (base != nullptr && !IsUnconcernedReg(*base)) { if (!memopnd->IsIntactIndexed()) { @@ -3768,14 +3772,20 @@ void GraphColorRegAllocator::GenerateSpillFillRegs(Insn &insn) { } } } + uint spillRegIdx; + if (isIndexedMemOp) { + spillRegIdx = useLrs.size(); + } else { + spillRegIdx = 0; + } for (auto lr: defLrs) { lr->SetID(insn.GetId()); if (lr->GetSpillReg() != 0) { continue; } RegType rtype = lr->GetRegType(); - for (uint i = 0; i < kSpillMemOpndNum; i++) { - regno_t preg = rtype == kRegTyInt ? intRegs[i] : fpRegs[i]; + for (; spillRegIdx < kSpillMemOpndNum; spillRegIdx++) { + regno_t preg = rtype == kRegTyInt ? intRegs[spillRegIdx] : fpRegs[spillRegIdx]; if (defPregs.find(preg) == defPregs.end()) { lr->SetSpillReg(preg); defPregs.insert(preg);