From 7bd7342d2f3ae17efa03be76be792f78f94311ee Mon Sep 17 00:00:00 2001 From: William Chen Date: Thu, 9 Dec 2021 14:39:15 -0800 Subject: [PATCH 1/2] Fix LowerAsmStmt for moving agg into reg --- src/mapleall/maple_be/src/be/lower.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mapleall/maple_be/src/be/lower.cpp b/src/mapleall/maple_be/src/be/lower.cpp index 6d31be403d..298e183e7d 100644 --- a/src/mapleall/maple_be/src/be/lower.cpp +++ b/src/mapleall/maple_be/src/be/lower.cpp @@ -1068,19 +1068,20 @@ void CGLowerer::LowerAsmStmt(AsmNode *asmNode, BlockNode *newBlk) { continue; } // introduce a temporary to store the expression tree operand - PrimType type = opnd->GetPrimType(); + TyIdx tyIdxUsed = (TyIdx)opnd->GetPrimType(); if (opnd->op == OP_iread) { IreadNode *ireadNode = static_cast(opnd); - type = ireadNode->GetType()->GetPrimType(); + tyIdxUsed = ireadNode->GetType()->GetTypeIndex(); } StmtNode *assignNode = nullptr; BaseNode *readOpnd = nullptr; - if (CGOptions::GetInstance().GetOptimizeLevel() >= CGOptions::kLevel2) { + PrimType type = GlobalTables::GetTypeTable().GetTypeFromTyIdx(tyIdxUsed)->GetPrimType(); + if ((type != PTY_agg) && CGOptions::GetInstance().GetOptimizeLevel() >= CGOptions::kLevel2) { PregIdx pregIdx = mirModule.CurFunction()->GetPregTab()->CreatePreg(type); assignNode = mirBuilder->CreateStmtRegassign(type, pregIdx, opnd); readOpnd = mirBuilder->CreateExprRegread(type, pregIdx); } else { - MIRSymbol *st = mirModule.GetMIRBuilder()->CreateSymbol(TyIdx(type), NewAsmTempStrIdx(), + MIRSymbol *st = mirModule.GetMIRBuilder()->CreateSymbol(tyIdxUsed, NewAsmTempStrIdx(), kStVar, kScAuto, mirModule.CurFunction(), kScopeLocal); assignNode = mirModule.GetMIRBuilder()->CreateStmtDassign(*st, 0, opnd); readOpnd = mirBuilder->CreateExprDread(*st); -- Gitee From 465cb8ff11ba8d3c16ed3d749952a43e868e7172 Mon Sep 17 00:00:00 2001 From: linma Date: Fri, 10 Dec 2021 23:23:35 -0800 Subject: [PATCH 2/2] seqvec: enhence rhs is constant expression --- src/mapleall/maple_me/include/seqvec.h | 8 +++++++ src/mapleall/maple_me/src/lfo_loop_vec.cpp | 14 +++++++----- src/mapleall/maple_me/src/seqvec.cpp | 26 +++++++++++++++------- 3 files changed, 35 insertions(+), 13 deletions(-) diff --git a/src/mapleall/maple_me/include/seqvec.h b/src/mapleall/maple_me/include/seqvec.h index 0bc2214e92..410cb66860 100644 --- a/src/mapleall/maple_me/include/seqvec.h +++ b/src/mapleall/maple_me/include/seqvec.h @@ -50,6 +50,13 @@ class SeqVectorize { bool CanAdjustRhsType(PrimType targetType, ConstvalNode *rhs); void MergeIassigns(MapleVector &cands); bool IsIvarExprConsecutiveMem(IvarMeExpr *, IvarMeExpr *, PrimType); + private: + void ResetRhsStatus() { currRhsStatus = 0; } + void SetRhsConst() { currRhsStatus = 1; } + void SetRhsConsercutiveMem() { currRhsStatus = 2; } + bool IsRhsStatusUnset() { return currRhsStatus == 0; } + bool IsRhsConst() { return currRhsStatus == 1; } + bool IsRhsConsercutiveMem() { return currRhsStatus == 0; } public: static uint32_t seqVecStores; // iassignnode in same level block @@ -64,6 +71,7 @@ class SeqVectorize { // point to lfoexprparts of lfopreemit, map lfoinfo for exprNode, key is mirnode MapleMap *lfoExprParts; StoreListMap stores; + uint32_t currRhsStatus = 0; // unset bool enableDebug = true; }; } // namespace maple diff --git a/src/mapleall/maple_me/src/lfo_loop_vec.cpp b/src/mapleall/maple_me/src/lfo_loop_vec.cpp index b83c1edf60..730eabe426 100644 --- a/src/mapleall/maple_me/src/lfo_loop_vec.cpp +++ b/src/mapleall/maple_me/src/lfo_loop_vec.cpp @@ -1472,7 +1472,8 @@ void LoopVectorization::VectorizeDoLoop(DoloopNode *doloop, LoopTransPlan *tp) { LfoPart *lfoP = (*lfoExprParts)[node]; // check node's parent, if they are binary node, skip the duplication if ((!lfoP->GetParent()->IsBinaryNode()) || (node->GetOpCode() == OP_iread)) { - PrimType ptype = node->GetPrimType(); + PrimType ptype = (node->GetOpCode() == OP_iread) ? + (static_cast(node))->GetType()->GetPrimType() : node->GetPrimType(); if (tp->vecInfo->constvalTypes.count(node) > 0) { ptype = tp->vecInfo->constvalTypes[node]; } @@ -1659,10 +1660,13 @@ bool LoopVectorization::ExprVectorizable(DoloopInfo *doloopInfo, LoopVecInfo* ve if (!vecInfo->UpdateRHSTypeSize(mirType->GetPrimType())) { canVec = false; // skip if rhs type is not consistent } else { - IreadNode *iread = static_cast(x); - if ((iread->GetFieldID() != 0 || MustBeAddress(iread->GetPrimType())) && - iread->Opnd(0)->GetOpCode() == OP_array) { - canVec = doloopInfo->IsLoopInvariant2(iread->Opnd(0)); + if ((ireadnode->GetFieldID() != 0 || MustBeAddress(ireadnode->GetPrimType())) && + ireadnode->Opnd(0)->GetOpCode() == OP_array) { + canVec = doloopInfo->IsLoopInvariant2(ireadnode->Opnd(0)); + } + if (canVec && IsPrimitiveInteger(mirType->GetPrimType()) && + doloopInfo->IsLoopInvariant2(ireadnode->Opnd(0))) { + vecInfo->uniformNodes.insert(x); } } } diff --git a/src/mapleall/maple_me/src/seqvec.cpp b/src/mapleall/maple_me/src/seqvec.cpp index c8ac4d5fc2..b59c1c9a0b 100644 --- a/src/mapleall/maple_me/src/seqvec.cpp +++ b/src/mapleall/maple_me/src/seqvec.cpp @@ -331,8 +331,17 @@ bool SeqVectorize::SameIntConstValue(MeExpr *e1, MeExpr *e2) { bool SeqVectorize::CanSeqVecRhs(MeExpr *rhs1, MeExpr *rhs2) { // case 1: rhs1 and rhs2 are constval and same value - if (SameIntConstValue(rhs1, rhs2)) { - return true; + if ((rhs1 == rhs2) || SameIntConstValue(rhs1, rhs2)) { + if (IsRhsConst() || IsRhsStatusUnset()) { + SetRhsConst(); + return true; + } else { + return false; + } + } + // current rhs is not same status + if (IsRhsConst()) { + return false; } // case 2: iread consecutive memory if (rhs1->GetMeOp() == rhs2->GetMeOp()) { @@ -349,6 +358,7 @@ bool SeqVectorize::CanSeqVecRhs(MeExpr *rhs1, MeExpr *rhs2) { } PrimType diffType = ptrType->GetPointedType()->GetPrimType(); if (IsIvarExprConsecutiveMem(rhs1Ivar, rhs2Ivar, diffType)) { + SetRhsConsercutiveMem(); return true; } } @@ -483,7 +493,7 @@ void SeqVectorize::MergeIassigns(MapleVector &cands) { CHECK_FATAL(parent && parent->GetOpCode() == OP_block, "unexpect parent type"); BlockNode *blockParent = static_cast(parent); // update rhs - if (iassign->GetRHS()->GetOpCode() == OP_constval) { + if (IsRhsConst()) { // rhs is constant RegassignNode *dupScalarStmt = GenDupScalarStmt(iassign->GetRHS(), vecType->GetPrimType()); RegreadNode *regreadNode = codeMP->New(vecType->GetPrimType(), dupScalarStmt->GetRegIdx()); @@ -492,16 +502,14 @@ void SeqVectorize::MergeIassigns(MapleVector &cands) { } else if (iassign->GetRHS()->GetOpCode() == OP_iread) { // rhs is iread IreadNode *ireadnode = static_cast(iassign->GetRHS()); - MIRType &mirType = GetTypeFromTyIdx(ireadnode->GetTyIdx()); - CHECK_FATAL(mirType.GetKind() == kTypePointer, "iread must have pointer type"); - MIRPtrType *rhsptrType = static_cast(&mirType); + MIRType *mirType = ireadnode->GetType(); MIRType *rhsvecType = nullptr; - if (rhsptrType->GetPointedType()->GetPrimType() == PTY_agg) { + if (mirType->GetPrimType() == PTY_agg) { // iread variable from a struct, use iread type rhsvecType = GenVecType(ireadnode->GetPrimType(), lanes); ASSERT(rhsvecType != nullptr, "vector type should not be null"); } else { - rhsvecType = GenVecType(rhsptrType->GetPointedType()->GetPrimType(), lanes); + rhsvecType = GenVecType(mirType->GetPrimType(), lanes); ASSERT(rhsvecType != nullptr, "vector type should not be null"); MIRType *rhspvecType = GlobalTables::GetTypeTable().GetOrCreatePointerType(*rhsvecType, PTY_ptr); ireadnode->SetTyIdx(rhspvecType->GetTypeIndex()); // update ptr type @@ -527,6 +535,7 @@ void SeqVectorize::LegalityCheckAndTransform(StoreList *storelist) { uint32_t len = storelist->size(); bool needReverse = true; cands.clear(); + ResetRhsStatus(); // reset rhs is const flag for (int i = 0; i < len; i++) { IassignNode *store1 = (*storelist)[i]; MIRPtrType *ptrType = static_cast(&GetTypeFromTyIdx(store1->GetTyIdx())); @@ -546,6 +555,7 @@ void SeqVectorize::LegalityCheckAndTransform(StoreList *storelist) { } if (!needReverse) return; + ResetRhsStatus(); // reset rhs is const flag for (int i = len - 1; i >= 0; i--) { IassignNode *store1 = (*storelist)[i]; MIRPtrType *ptrType = static_cast(&GetTypeFromTyIdx(store1->GetTyIdx())); -- Gitee