diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index e968a5349a59ef6faa326d14f0a11c8f5a0fff76..717b47d7ed49c8c2c3e57c1febf422c9eac3db77 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -148,7 +148,7 @@ static ssize_t bus_show(struct device *dev, struct device_attribute *attr, char
 {
 	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(dev_get_drvdata(dev));
 
-	return sysfs_emit(buf, "%#04x\n", PCI_BUS_NUM(pcie_pmu->bdf_min));
+	return sysfs_emit(buf, "%#04x\n", (unsigned)PCI_BUS_NUM(pcie_pmu->bdf_min));
 }
 static DEVICE_ATTR_RO(bus);
 
@@ -716,7 +716,7 @@ static int hisi_pcie_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node)
 	struct hisi_pcie_pmu *pcie_pmu = hlist_entry_safe(node, struct hisi_pcie_pmu, node);
 	unsigned int target;
 	cpumask_t mask;
-	int numa_node;
+	int dev_numa_node;
 
 	/* Nothing to do if this CPU doesn't own the PMU */
 	if (pcie_pmu->on_cpu != cpu)
@@ -725,8 +725,8 @@ static int hisi_pcie_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node)
 	pcie_pmu->on_cpu = -1;
 
 	/* Choose a local CPU from all online cpus. */
-	numa_node = dev_to_node(&pcie_pmu->pdev->dev);
-	if (cpumask_and(&mask, cpumask_of_node(numa_node), cpu_online_mask) &&
+	dev_numa_node = dev_to_node(&pcie_pmu->pdev->dev);
+	if (cpumask_and(&mask, cpumask_of_node(dev_numa_node), cpu_online_mask) &&
 	    cpumask_andnot(&mask, &mask, cpumask_of(cpu)))
 		target = cpumask_any(&mask);
 	else
diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
index b52891d48f05da55fa9098157985666604754584..42eb6edb6104d1d0dfc02c680003e2bbc5ffac46 100644
--- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
@@ -185,7 +185,6 @@ static void hisi_ddrc_pmu_disable_counter(struct hisi_pmu *ddrc_pmu,
 	struct hisi_ddrc_pmu_regs *regs = ddrc_pmu->dev_info->private;
 	u32 val;
 
-
 	val = readl(ddrc_pmu->base + regs->event_ctrl);
 	val &= ~BIT_ULL(hwc->idx);
 	writel(val, ddrc_pmu->base + regs->event_ctrl);
@@ -208,7 +207,6 @@ static void hisi_ddrc_pmu_disable_counter_int(struct hisi_pmu *ddrc_pmu,
 	struct hisi_ddrc_pmu_regs *regs = ddrc_pmu->dev_info->private;
 	u32 val;
 
-
 	val = readl(ddrc_pmu->base + regs->int_mask);
 	val |= BIT_ULL(hwc->idx);
 	writel(val, ddrc_pmu->base + regs->int_mask);
diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
index 28389c3750c9d1368ad3491ab24482e137dd2f1a..cce03b03c929376d27cc32977cb092b3bd855b6f 100644
--- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
@@ -138,7 +138,6 @@ static int hisi_l3c_pmu_get_event_idx(struct perf_event *event)
 
 	ext -= 1;
 	idx = find_next_zero_bit(used_mask, L3C_CNTR_EXT_H(ext), L3C_CNTR_EXT_L(ext));
-
 	if (idx >= L3C_CNTR_EXT_H(ext))
 		return -EAGAIN;
 
@@ -367,7 +366,6 @@ static int hisi_l3c_pmu_check_filter(struct perf_event *event)
 	struct hisi_pmu *l3c_pmu = to_hisi_pmu(event->pmu);
 	struct hisi_l3c_pmu *hisi_l3c_pmu = to_hisi_l3c_pmu(l3c_pmu);
 	int ext = hisi_get_ext(event);
-
 	if (ext < 0 || ext > hisi_l3c_pmu->ext_num)
 		return -EINVAL;
 	return 0;
@@ -378,7 +376,7 @@ static int hisi_l3c_pmu_check_filter(struct perf_event *event)
  */
 static u32 hisi_l3c_pmu_get_counter_offset(int cntr_idx)
 {
-	return L3C_CNTR0_LOWER + L3C_HW_IDX(cntr_idx) * 8;
+	return L3C_CNTR0_LOWER + L3C_HW_IDX(cntr_idx) * L3C_NR_COUNTERS;
 }
 
 static u64 hisi_l3c_pmu_read_counter(struct hisi_pmu *l3c_pmu,
diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
index 6d5a10d903b3628f52068c0f34172db6be7e0c85..e523cca07fb17763f06611692f9a50d9bb3dad7a 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
@@ -567,7 +567,6 @@ int hisi_uncore_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node)
 	cpumask_and(&pmu_online_cpus, &hisi_pmu->associated_cpus,
 		    cpu_online_mask);
 	target = cpumask_any_but(&pmu_online_cpus, cpu);
-
 	if (target >= nr_cpu_ids)
 		target = cpumask_any_but(cpu_online_mask, cpu);
 
diff --git a/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
index f90f752f32dd88c254e56c6fd6e3ef923e92d839..36d654996766eaca1c5d93dbdc2d88894b1dd3ba 100644
--- a/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
@@ -67,7 +67,8 @@ static int hisi_uc_pmu_check_filter(struct perf_event *event)
 	    (HISI_GET_EVENTID(event) > HISI_UC_URING_EVENT_MAX))
 		dev_warn(uc_pmu->dev,
 			 "Only events: [%#x ~ %#x] support channel filtering!",
-			 HISI_UC_URING_EVENT_MIN, HISI_UC_URING_EVENT_MAX);
+			 (unsigned)HISI_UC_URING_EVENT_MIN,
+			 (unsigned)HISI_UC_URING_EVENT_MAX);
 
 	return 0;
 }
diff --git a/drivers/perf/hisilicon/hns3_pmu.c b/drivers/perf/hisilicon/hns3_pmu.c
index 60062eaa342aad2597075cb14e0676383ed1a1e4..dc4ac7d295eaa10eb76b704379a0ed6e0cbafdaa 100644
--- a/drivers/perf/hisilicon/hns3_pmu.c
+++ b/drivers/perf/hisilicon/hns3_pmu.c
@@ -489,8 +489,8 @@ static ssize_t bdf_min_show(struct device *dev, struct device_attribute *attr,
 	struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev));
 	u16 bdf = hns3_pmu->bdf_min;
 
-	return sysfs_emit(buf, "%02x:%02x.%x\n", PCI_BUS_NUM(bdf),
-			  PCI_SLOT(bdf), PCI_FUNC(bdf));
+	return sysfs_emit(buf, "%02x:%02x.%x\n", (unsigned)PCI_BUS_NUM(bdf),
+			  (unsigned)PCI_SLOT(bdf), (unsigned)PCI_FUNC(bdf));
 }
 static DEVICE_ATTR_RO(bdf_min);
 
@@ -500,8 +500,8 @@ static ssize_t bdf_max_show(struct device *dev, struct device_attribute *attr,
 	struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev));
 	u16 bdf = hns3_pmu->bdf_max;
 
-	return sysfs_emit(buf, "%02x:%02x.%x\n", PCI_BUS_NUM(bdf),
-			  PCI_SLOT(bdf), PCI_FUNC(bdf));
+	return sysfs_emit(buf, "%02x:%02x.%x\n", (unsigned)PCI_BUS_NUM(bdf),
+			  (unsigned)PCI_SLOT(bdf), (unsigned)PCI_FUNC(bdf));
 }
 static DEVICE_ATTR_RO(bdf_max);
 
@@ -1260,7 +1260,7 @@ static int hns3_pmu_event_init(struct perf_event *event)
 	idx = hns3_pmu_get_event_idx(hns3_pmu);
 	if (idx < 0) {
 		pci_err(hns3_pmu->pdev, "Up to %u events are supported!\n",
-			HNS3_PMU_MAX_HW_EVENTS);
+			(unsigned)HNS3_PMU_MAX_HW_EVENTS);
 		return -EBUSY;
 	}