From b18fa24f93b0434214c3db9418de2a9fa0077581 Mon Sep 17 00:00:00 2001 From: zhulin11 <2584415738@qq.com> Date: Mon, 24 Mar 2025 15:21:18 +0800 Subject: [PATCH] merge hmpi code --- ompi/mca/coll/ucg/coll_ucg_component.c | 11 ++++++++++- ompi/mca/coll/ucg/coll_ucg_module.c | 2 +- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/ompi/mca/coll/ucg/coll_ucg_component.c b/ompi/mca/coll/ucg/coll_ucg_component.c index 7ecadfe802e..5e5338c05d0 100644 --- a/ompi/mca/coll/ucg/coll_ucg_component.c +++ b/ompi/mca/coll/ucg/coll_ucg_component.c @@ -1,6 +1,6 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2022-2022 Huawei Technologies Co., Ltd. + * Copyright (c) 2022-2025 Huawei Technologies Co., Ltd. * All rights reserved. * COPYRIGHT$ * @@ -85,6 +85,15 @@ mca_coll_ucg_component_t mca_coll_ucg_component = { static int mca_coll_ucg_register(void) { + unsigned long long cpu_id; + __asm__ volatile ("mrs %0, MIDR_EL1":"=r"(cpu_id)); + unsigned long long vendor = (cpu_id >> 0x18) & 0xFF; + unsigned long long part_id = (cpu_id >> 0x4) & 0xFFF; + // Reduce priority of UCG on some CPU archs. + if ((vendor == 0x48) && (part_id == 0xD22)) { + mca_coll_ucg_component.priority = 0; + } + (void)mca_base_component_var_register(&mca_coll_ucg_component.super.collm_version, "priority", "Priority of the UCG component", MCA_BASE_VAR_TYPE_INT, NULL, 0, 0, diff --git a/ompi/mca/coll/ucg/coll_ucg_module.c b/ompi/mca/coll/ucg/coll_ucg_module.c index d315b841e0a..4b7b154cc69 100644 --- a/ompi/mca/coll/ucg/coll_ucg_module.c +++ b/ompi/mca/coll/ucg/coll_ucg_module.c @@ -456,7 +456,7 @@ static int mca_coll_ucg_module_enable(mca_coll_base_module_t *module, /* if any fails, resources will be freed in mca_coll_ucg_module_destruct() */ rc = mca_coll_ucg_save_fallback(ucg_module, comm); if (rc != OMPI_SUCCESS) { - UCG_ERROR("Failed to save coll fallback, %d", rc); + UCG_INFO("Failed to save coll fallback, %d", rc); return rc; } -- Gitee