diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 04b072977d8b28ea8bd1bbae7eba0e20bbf821f0..55c40bdc793f37247eb176a2fb5f50f1e7eeade6 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -7698,10 +7698,6 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back("-outline-atomics"); } } - } else if (Triple.isAArch64() && - getToolChain().IsAArch64OutlineAtomicsDefault(Args)) { - CmdArgs.push_back("-target-feature"); - CmdArgs.push_back("+outline-atomics"); } if (Triple.isAArch64() && diff --git a/clang/test/Driver/aarch64-features.c b/clang/test/Driver/aarch64-features.c index 7b990f4c3e5d9d65e1a4212c33ea5274718e9ee6..a2aaf58a677df2aab74d665c4a4cb198c6ae1132 100644 --- a/clang/test/Driver/aarch64-features.c +++ b/clang/test/Driver/aarch64-features.c @@ -24,13 +24,13 @@ // Check for AArch64 out-of-line atomics default settings. // RUN: %clang --target=aarch64-linux-android -rtlib=compiler-rt \ -// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s +// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s // RUN: %clang --target=aarch64-linux-gnu -rtlib=compiler-rt \ -// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s +// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s // RUN: %clang --target=arm64-unknown-linux -rtlib=compiler-rt \ -// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s +// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s // RUN: %clang --target=aarch64 -rtlib=compiler-rt \ // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s @@ -46,7 +46,7 @@ // RUN: %clang --target=aarch64-linux-gnu -rtlib=libgcc \ // RUN: --gcc-toolchain=%S/Inputs/aarch64-linux-gnu-tree/gcc-10 \ -// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s +// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s // RUN: %clang --target=aarch64-linux-gnu -rtlib=libgcc \ // RUN: --gcc-toolchain=%S/Inputs/aarch64-linux-gnu-tree/gcc-7.5.0 \ @@ -54,7 +54,7 @@ // RUN: %clang --target=aarch64-linux-gnu -rtlib=libgcc \ // RUN: --gcc-toolchain=%S/Inputs/aarch64-linux-gnu-tree/gcc-9.3.1 \ -// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s +// RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s // RUN: %clang --target=aarch64-linux-gnu -rtlib=libgcc \ // RUN: --gcc-toolchain=%S/Inputs/aarch64-linux-gnu-tree/gcc-9.3.0 \ diff --git a/clang/test/Driver/fuchsia.c b/clang/test/Driver/fuchsia.c index c785e3a52251cd0f0f5c970202cec6f66bddd5b2..17c5183b1fae07cd37bf5257c90a4636e743ca85 100644 --- a/clang/test/Driver/fuchsia.c +++ b/clang/test/Driver/fuchsia.c @@ -34,7 +34,6 @@ // CHECK-RISCV64: "-fsanitize=shadow-call-stack" // CHECK-X86_64: "-fsanitize=safe-stack" // CHECK: "-stack-protector" "2" -// CHECK-AARCH64: "-target-feature" "+outline-atomics" // CHECK-NOT: "-fcommon" // CHECK: {{.*}}ld.lld{{.*}}" "-z" "max-page-size=4096" "-z" "now" "-z" "rodynamic" "-z" "separate-loadable-segments" "-z" "rel" "--pack-dyn-relocs=relr" // CHECK: "--sysroot=[[SYSROOT]]" diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 1ab4353117cd4e78e4d1feb395cde8be2df8e220..5e7e9fda64096d81ccc927bbfb0eb0eb9b8de8fc 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -580,7 +580,7 @@ def HasV8_0aOps : SubtargetFeature<"v8a", "HasV8_0aOps", "true", "Support ARM v8.0a instructions", [FeatureEL2VMSA, FeatureEL3]>; def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true", - "Support ARM v8.1a instructions", [HasV8_0aOps, FeatureCRC, FeatureLSE, + "Support ARM v8.1a instructions", [HasV8_0aOps, FeatureCRC, FeatureRDM, FeaturePAN, FeatureLOR, FeatureVH]>; def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true", @@ -1278,122 +1278,130 @@ def ProcessorFeatures { FeatureFPARMv8, FeatureNEON, FeaturePerfMon]; list A55 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC, FeaturePerfMon]; + FeatureRCPC, FeaturePerfMon, FeatureLSE]; list A510 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureMatMulInt8, FeatureBF16, FeatureAM, FeatureMTE, FeatureETE, FeatureSVE2BitPerm, - FeatureFP16FML]; + FeatureFP16FML, FeatureLSE]; list A65 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureRCPC, FeatureSSBS, FeatureRAS, - FeaturePerfMon]; + FeaturePerfMon, FeatureLSE]; list A76 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC, FeatureSSBS, FeaturePerfMon]; + FeatureRCPC, FeatureSSBS, FeaturePerfMon, + FeatureLSE]; list A77 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC, FeaturePerfMon, FeatureSSBS]; + FeatureRCPC, FeaturePerfMon, FeatureSSBS, + FeatureLSE]; list A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureRCPC, FeaturePerfMon, FeatureSPE, - FeatureSSBS]; + FeatureSSBS, FeatureLSE]; list A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureFlagM, FeatureFP16FML, FeaturePAuth, FeaturePerfMon, FeatureRCPC, FeatureSPE, - FeatureSSBS]; + FeatureSSBS, FeatureLSE]; list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureETE, FeatureMTE, FeatureFP16FML, - FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8]; + FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8, + FeatureLSE]; list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE, FeatureFP16FML, FeatureSVE, FeatureTRBE, FeatureSVE2BitPerm, FeatureBF16, FeatureETE, - FeaturePerfMon, FeatureMatMulInt8, FeatureSPE]; + FeaturePerfMon, FeatureMatMulInt8, FeatureSPE, + FeatureLSE]; list R82 = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16, FeatureFP16FML, FeatureSSBS, FeaturePredRes, FeatureSB]; list X1 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC, FeaturePerfMon, FeatureSPE, FeatureFullFP16, FeatureDotProd, - FeatureSSBS]; + FeatureSSBS, FeatureLSE]; list X1C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC_IMMO, FeaturePerfMon, FeatureSPE, FeatureFullFP16, FeatureDotProd, FeaturePAuth, FeatureSSBS, FeatureFlagM, - FeatureLSE2]; + FeatureLSE2, FeatureLSE]; list X2 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureMatMulInt8, FeatureBF16, FeatureAM, FeatureMTE, FeatureETE, FeatureSVE2BitPerm, - FeatureFP16FML]; + FeatureFP16FML, FeatureLSE]; list X3 = [HasV9_0aOps, FeatureSVE, FeatureNEON, FeaturePerfMon, FeatureETE, FeatureTRBE, FeatureSPE, FeatureBF16, FeatureMatMulInt8, FeatureMTE, FeatureSVE2BitPerm, FeatureFullFP16, - FeatureFP16FML]; + FeatureFP16FML, FeatureLSE]; list A64FX = [HasV8_2aOps, FeatureFPARMv8, FeatureNEON, FeatureSHA2, FeaturePerfMon, FeatureFullFP16, - FeatureSVE, FeatureComplxNum]; + FeatureSVE, FeatureComplxNum, FeatureLSE]; list Carmel = [HasV8_2aOps, FeatureNEON, FeatureCrypto, - FeatureFullFP16]; + FeatureFullFP16, FeatureLSE]; list AppleA7 = [HasV8_0aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON,FeaturePerfMon, FeatureAppleA7SysReg]; list AppleA10 = [HasV8_0aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureCRC, FeatureRDM, FeaturePAN, FeatureLOR, FeatureVH]; list AppleA11 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, - FeatureNEON, FeaturePerfMon, FeatureFullFP16]; + FeatureNEON, FeaturePerfMon, FeatureFullFP16, + FeatureLSE]; list AppleA12 = [HasV8_3aOps, FeatureCrypto, FeatureFPARMv8, - FeatureNEON, FeaturePerfMon, FeatureFullFP16]; + FeatureNEON, FeaturePerfMon, FeatureFullFP16, + FeatureLSE]; list AppleA13 = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureFullFP16, - FeatureFP16FML, FeatureSHA3]; + FeatureFP16FML, FeatureSHA3, FeatureLSE]; list AppleA14 = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureFRInt3264, FeatureSpecRestrict, FeatureSSBS, FeatureSB, FeaturePredRes, FeatureCacheDeepPersist, FeatureFullFP16, FeatureFP16FML, FeatureSHA3, - FeatureAltFPCmp]; + FeatureAltFPCmp, FeatureLSE]; list AppleA15 = [HasV8_6aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureSHA3, - FeatureFullFP16, FeatureFP16FML]; + FeatureFullFP16, FeatureFP16FML, FeatureLSE]; list AppleA16 = [HasV8_6aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureSHA3, FeatureFullFP16, FeatureFP16FML, - FeatureHCX]; + FeatureHCX, FeatureLSE]; list ExynosM3 = [HasV8_0aOps, FeatureCRC, FeatureCrypto, FeaturePerfMon]; list ExynosM4 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, - FeatureFullFP16, FeaturePerfMon]; + FeatureFullFP16, FeaturePerfMon, FeatureLSE]; list Falkor = [HasV8_0aOps, FeatureCRC, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureRDM]; list NeoverseE1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, FeatureFPARMv8, FeatureFullFP16, FeatureNEON, - FeatureRCPC, FeatureSSBS, FeaturePerfMon]; + FeatureRCPC, FeatureSSBS, FeaturePerfMon, + FeatureLSE]; list NeoverseN1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, FeatureFPARMv8, FeatureFullFP16, FeatureNEON, FeatureRCPC, FeatureSPE, FeatureSSBS, - FeaturePerfMon]; + FeaturePerfMon, FeatureLSE]; list NeoverseN2 = [HasV8_5aOps, FeatureBF16, FeatureETE, FeatureMatMulInt8, FeatureMTE, FeatureSVE2, FeatureSVE2BitPerm, FeatureTRBE, FeatureCrypto, - FeaturePerfMon]; + FeaturePerfMon, FeatureLSE]; list Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, FeaturePerfMon, FeatureRandGen, FeatureSPE, - FeatureSSBS, FeatureSVE]; + FeatureSSBS, FeatureSVE, FeatureLSE]; list NeoverseV1 = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, FeaturePerfMon, FeatureRandGen, FeatureSPE, - FeatureSSBS, FeatureSVE]; + FeatureSSBS, FeatureSVE, FeatureLSE]; list NeoverseV2 = [HasV9_0aOps, FeatureBF16, FeatureSPE, FeaturePerfMon, FeatureETE, FeatureMatMulInt8, FeatureNEON, FeatureSVE2BitPerm, FeatureFP16FML, - FeatureMTE, FeatureRandGen]; + FeatureMTE, FeatureRandGen, FeatureLSE]; list Saphira = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8, - FeatureNEON, FeatureSPE, FeaturePerfMon]; + FeatureNEON, FeatureSPE, FeaturePerfMon, + FeatureLSE]; list ThunderX = [HasV8_0aOps, FeatureCRC, FeatureCrypto, FeatureFPARMv8, FeaturePerfMon, FeatureNEON]; list ThunderX2T99 = [HasV8_1aOps, FeatureCRC, FeatureCrypto, @@ -1420,11 +1428,12 @@ def ProcessorFeatures { FeatureSME, FeatureSMEF64F64, FeatureSMEFA64]; list Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon, FeatureSSBS, FeatureRandGen, FeatureSB, - FeatureSHA2, FeatureSHA3, FeatureAES]; + FeatureSHA2, FeatureSHA3, FeatureAES, + FeatureLSE]; list Ampere1A = [HasV8_6aOps, FeatureNEON, FeaturePerfMon, FeatureMTE, FeatureSSBS, FeatureRandGen, FeatureSB, FeatureSM4, FeatureSHA2, - FeatureSHA3, FeatureAES]; + FeatureSHA3, FeatureAES, FeatureLSE]; // ETE and TRBE are future architecture extensions. We temporarily enable them // by default for users targeting generic AArch64. The extensions do not diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8_1a.ll index e14610ba6b1cc30a21e4fed6c403a9677c96cbaf..a8c8c6d2a9472a95a37d8fea2559b693a6c8b825 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @load_atomic_i8_aligned_unordered(ptr %ptr) { ; CHECK-LABEL: load_atomic_i8_aligned_unordered: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll index 00bcedf4b7a64cebdad930cd63e3c96ef2859e94..1ac3e431b9384f50f7726bedb945fd9d235acb2f 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local void @store_atomic_i8_aligned_unordered(i8 %value, ptr %ptr) { ; CHECK-LABEL: store_atomic_i8_aligned_unordered: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll index 296dcf405232332d1f843e2d99f8a6d86080cff1..30419d375df3034fc61f83baa817c2e94031435c 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @atomicrmw_xchg_i8_aligned_monotonic(ptr %ptr, i8 %value) { ; CHECK-LABEL: atomicrmw_xchg_i8_aligned_monotonic: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8_1a.ll index 8d303f76971039571105c1317c62d21035bc34b5..728bdea81662fdb774a89dacb863489647851030 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @cmpxchg_i8_aligned_monotonic_monotonic(i8 %expected, i8 %new, ptr %ptr) { ; CHECK-LABEL: cmpxchg_i8_aligned_monotonic_monotonic: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8_1a.ll index 322dcb24d6bf3953d926c4fa6630b8fb5e84c2bb..916757d42b231f8b96bf9cbe93eb669a8c86d4a1 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @load_atomic_i8_aligned_unordered(ptr %ptr) { ; CHECK-LABEL: load_atomic_i8_aligned_unordered: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8_1a.ll index 6a51222e31092106045a4dc8a810e69a6965df11..fa74cde2427325e487d531c75e6692f993cb34f8 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local void @store_atomic_i8_aligned_unordered(i8 %value, ptr %ptr) { ; CHECK-LABEL: store_atomic_i8_aligned_unordered: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll index b126100b749540bf3b93d6ea599947312ac1a3f7..b9f7ceab4562e979f6c2d440f4f30c07783e188d 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @atomicrmw_xchg_i8_aligned_monotonic(ptr %ptr, i8 %value) { ; CHECK-LABEL: atomicrmw_xchg_i8_aligned_monotonic: diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8_1a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8_1a.ll index d58c14285a59ce94fb2b7f03c5b28d5b2b7f67aa..19abfa5b9c4dc4745c17b636ef24ce10992a3207 100644 --- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8_1a.ll +++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-cmpxchg-v8_1a.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)" ; The base test file was generated by ./llvm/test/CodeGen/AArch64/Atomics/generate-tests.py -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O0 | FileCheck %s --check-prefixes=CHECK,-O0 -; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a -O1 | FileCheck %s --check-prefixes=CHECK,-O1 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O0 | FileCheck %s --check-prefixes=CHECK,-O0 +; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64_be -mattr=+v8.1a,+lse -O1 | FileCheck %s --check-prefixes=CHECK,-O1 define dso_local i8 @cmpxchg_i8_aligned_monotonic_monotonic(i8 %expected, i8 %new, ptr %ptr) { ; CHECK-LABEL: cmpxchg_i8_aligned_monotonic_monotonic: diff --git a/llvm/test/MC/AArch64/armv8.1a-atomic.s b/llvm/test/MC/AArch64/armv8.1a-atomic.s index bcfd3e7d166a5e18406417cfe76d1a9c3ca6367e..cb63ee18b2e9cd4285cd67d79beac42c523c0919 100644 --- a/llvm/test/MC/AArch64/armv8.1a-atomic.s +++ b/llvm/test/MC/AArch64/armv8.1a-atomic.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck --check-prefix=CHECK-ERROR <%t %s .text diff --git a/llvm/test/MC/AArch64/armv8.1a-lse.s b/llvm/test/MC/AArch64/armv8.1a-lse.s index b5bbbe66c6ae26b750113207632cfdd49df6bb78..036188d3dd50408f6411ef23cf568e6b29b791a1 100644 --- a/llvm/test/MC/AArch64/armv8.1a-lse.s +++ b/llvm/test/MC/AArch64/armv8.1a-lse.s @@ -4,7 +4,7 @@ // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 -show-encoding < %s 2> %t | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 -mattr=+lse -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.1a-atomic.txt b/llvm/test/MC/Disassembler/AArch64/armv8.1a-atomic.txt index b20fabb8c6f1e008a8fae4366ca78059d7d87ae7..2d1f9988ed8315c8f1618a6241707a742039e61f 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.1a-atomic.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.1a-atomic.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse --disassemble < %s | FileCheck %s 0x41,0x7c,0xa0,0x08 0x41,0x7c,0xe0,0x08