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[LV] Add Loop Vectorize Prepare Pass 可合并

openeuler-cla/yes

ci_processing

sig/Compiler

eastb233:lvprepare openEuler:dev_17.0.6

!244 2

审查：

2025-08-15 19:24

Add f8e5m2 and f8e4m3fn support for the expand-ops pass in the arith dialect 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

Daniel:AddSupportForF8 openEuler:dev_19.1.7

!243 4

审查：

2025-08-15 14:02

[ICP] Pseudo probe instruction for AArch64 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

szymonsobieszek:dev_17.0.6-enable-pseudo-probe-inst openEuler:dev_17.0.6

!242 4

审查：

2025-08-15 04:31

[ISEL] Emit rev16 when loading/storing 2 reversed bytes 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

cathysheng:feat-isel-load-store-rev16 openEuler:dev_17.0.6

!241 16

审查：

2025-08-13 21:49

[ISEL] Reduce emitted load/stores when changing endianness 可合并

openeuler-cla/yes

ci_failed

sig/Compiler

newcomer

cathysheng:feature-endianness-opts openEuler:dev_17.0.6

!238 85

审查：

2025-08-06 02:59

[ICP] Porting dynamic-type profiling patches from dev_19.1.7 可合并

openeuler-cla/yes

ci_failed

sig/Compiler

stat/needs-squash

newcomer

szymonsobieszek:dev_17.0.6_TypeProf openEuler:dev_17.0.6

!237 91

审查：

2025-08-06 02:23

Fix SVE and SME crash on the transform dialect. 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

bug

Daniel:fixSVESMEcrash openEuler:dev_19.1.7

!236 4

审查：

2025-07-28 19:35

[InstrProf] Add reset counter by signal feature in instrumented program 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

newcomer

lltsdyp:dev_jzm openEuler:dev_19.1.7

!235 34

审查：

2025-07-28 16:20

Add SME lowering helper and test 可合并

openeuler-cla/no

ci_successful

sig/Compiler

newcomer

pabloantoniomartinez:sme-lowering openEuler:dev_19.1.7

!234 5

审查：

2025-07-25 21:16

[LoopPrefetchBefore] Add a pass to emit prefetch before loop 可合并

openeuler-cla/yes

ci_successful

sig/Compiler

chenmiao:dev_17.0.6 openEuler:dev_17.0.6

!232 24

审查：

2025-07-21 19:20

1

https://gitee.com/openeuler/llvm-project.git

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openeuler

llvm-project

llvm-project