diff --git a/qga/vss-win32/requester.cpp b/qga/vss-win32/requester.cpp
index 9884c65e707a30135fb8479afeaa2f177b99008f..43a2a21011d52ca82a8c780eda974d113a9c8e24 100644
--- a/qga/vss-win32/requester.cpp
+++ b/qga/vss-win32/requester.cpp
@@ -45,7 +45,7 @@ typedef void(APIENTRY * t_VssFreeSnapshotProperties)(IN VSS_SNAPSHOT_PROP*);
 static t_CreateVssBackupComponents pCreateVssBackupComponents;
 static t_VssFreeSnapshotProperties pVssFreeSnapshotProperties;
 
-/* Variables used while applications and filesystes are frozen by VSS */
+/* Variables used while applications and filesystems are frozen by VSS */
 static struct QGAVSSContext {
     IVssBackupComponents *pVssbc;  /* VSS requester interface */
     IVssAsync *pAsyncSnapshot;     /* async info of VSS snapshot operation */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index dc8f14f43316085ca427f02724b6a07fa1cab67e..0c3900a229f1002881310b8052dee4a5f545ef67 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9811,7 +9811,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const ARMCPRegInfo *r,
     r2->name = memcpy(r2 + 1, name, name_len);
 
     /*
-     * Update fields to match the instantiation, overwiting wildcards
+     * Update fields to match the instantiation, overwriting wildcards
      * such as CP_ANY, ARM_CP_STATE_BOTH, or ARM_CP_SECSTATE_BOTH.
      */
     r2->cp = cp;
diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index b4b746d4187c255442657b39aa63fec3faeb74b8..c06653a571c64798769098ffbb071f6d5aaae1ca 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -856,7 +856,7 @@ enum {
     NM_ERETNC   = 0x01,
 };
 
-/* POOL32FxF_{0, 1} insturction pool */
+/* POOL32FxF_{0, 1} instruction pool */
 enum {
     NM_CFC1     = 0x40,
     NM_CTC1     = 0x60,
diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c
index f11043b4498ec1c79679236fa7b94295a88386da..8685d8e44d40b5c948c7c01a10a419484f55610d 100644
--- a/tcg/tcg-op-ldst.c
+++ b/tcg/tcg-op-ldst.c
@@ -413,7 +413,7 @@ void tcg_gen_qemu_st_i64_chk(TCGv_i64 val, TCGTemp *addr, TCGArg idx,
 
 /*
  * Return true if @mop, without knowledge of the pointer alignment,
- * does not require 16-byte atomicity, and it would be adventagous
+ * does not require 16-byte atomicity, and it would be adventageous
  * to avoid a call to a helper function.
  */
 static bool use_two_i64_for_i128(MemOp mop)