From 7f7a8b4cc084998f658def7697a17f4aa40eabcf Mon Sep 17 00:00:00 2001 From: jiesong Date: Tue, 19 Aug 2025 23:18:00 +0800 Subject: [PATCH] amd_iommu: Use correct DTE field for interrupt passthrough Interrupt passthrough is determine by the bits 191,190,187-184. These bits are part of the 3rd quad word (i.e. index 2) in DTE. Hence replace dte[3] by dte[2]. Fixes: b44159fe ("x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled") Signed-off-by: default avatarSairaj Kodilkar Reviewed-by: default avatarVasant Hegde Message-Id: <20250207045354.27329-2-sarunkod@amd.com> Reviewed-by: MST's avatarMichael S. Tsirkin Signed-off-by: MST's avatarMichael S. Tsirkin (cherry picked from commit 63dc0b86) --- hw/i386/amd_iommu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 12742b1433..4697864123 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1279,15 +1279,15 @@ static int amdvi_int_remap_msi(AMDVIState *iommu, ret = -AMDVI_IR_ERR; break; case AMDVI_IOAPIC_INT_TYPE_NMI: - pass = dte[3] & AMDVI_DEV_NMI_PASS_MASK; + pass = dte[2] & AMDVI_DEV_NMI_PASS_MASK; trace_amdvi_ir_delivery_mode("nmi"); break; case AMDVI_IOAPIC_INT_TYPE_INIT: - pass = dte[3] & AMDVI_DEV_INT_PASS_MASK; + pass = dte[2] & AMDVI_DEV_INT_PASS_MASK; trace_amdvi_ir_delivery_mode("init"); break; case AMDVI_IOAPIC_INT_TYPE_EINT: - pass = dte[3] & AMDVI_DEV_EINT_PASS_MASK; + pass = dte[2] & AMDVI_DEV_EINT_PASS_MASK; trace_amdvi_ir_delivery_mode("eint"); break; default: -- Gitee