From 97b875a0fe6362d54aea760b279bb1350800d3d7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=88=98=E5=A9=A720201110?= Date: Mon, 8 Apr 2024 04:17:08 -0400 Subject: [PATCH] virtio-pci: only reset pm state during resetting Fix bug imported by 27ce0f3afc9dd25d21b43bbce505157afd93d111 (fix Power Management Control Register for PCI Express virtio devices) Only state of PM_CTRL is writable. Only when flag VIRTIO_PCI_FLAG_INIT_PM is set, need to reset state. Signed-off-by: Jiqian Chen Signed-off-by: Liu Jing --- hw/virtio/virtio-pci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index f8adb0520a..45763dc61b 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2301,10 +2301,15 @@ static void virtio_pci_bus_reset_hold(Object *obj) virtio_pci_reset(qdev); if (pci_is_express(dev)) { - pcie_cap_deverr_reset(dev); + VirtIOPCIProxy *proxy = VIRTIO_PCI(dev); + pcie_cap_deverr_reset(dev); pcie_cap_lnkctl_reset(dev); - pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { + pci_word_test_and_clear_mask( + dev->config + dev->exp.pm_cap + PCI_PM_CTRL, + PCI_PM_CTRL_STATE_MASK); + } } } -- Gitee