From b45d837e99f3d2c8e8bf2289cedc1c182ce4a11f Mon Sep 17 00:00:00 2001 From: sunchanglong Date: Thu, 17 Oct 2024 11:06:11 +0800 Subject: [PATCH] =?UTF-8?q?TicketNo:#IAXQ79=20Description:linux5.15?= =?UTF-8?q?=E9=80=82=E9=85=8D5.0=E4=BF=AE=E6=94=B9=20Signed-off-by:=20sunc?= =?UTF-8?q?hanglong=20?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- include/linux/spi/spi.h | 12 ++++++++++++ include/uapi/linux/dma-heap.h | 25 +++++++++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6b0b686f6..45641864e 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -838,6 +838,9 @@ extern void spi_res_release(struct spi_controller *ctlr, * @delay: delay to be introduced after this transfer before * (optionally) changing the chipselect status, then starting * the next transfer or completing this @spi_message. + * @delay_usecs: microseconds to delay after this transfer before + * (optionally) changing the chipselect status, then starting + * the next transfer or completing this @spi_message. * @word_delay: inter word delay to be introduced after each word size * (set by bits_per_word) transmission. * @effective_speed_hz: the effective SCK-speed that was used to @@ -949,6 +952,7 @@ struct spi_transfer { #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ u8 bits_per_word; + u16 delay_usecs; struct spi_delay delay; struct spi_delay cs_change_delay; struct spi_delay word_delay; @@ -1062,6 +1066,14 @@ spi_transfer_del(struct spi_transfer *t) static inline int spi_transfer_delay_exec(struct spi_transfer *t) { + struct spi_delay d; + + if (t->delay_usecs) { + d.value = t->delay_usecs; + d.unit = SPI_DELAY_UNIT_USECS; + return spi_delay_exec(&d, NULL); + } + return spi_delay_exec(&t->delay, t); } diff --git a/include/uapi/linux/dma-heap.h b/include/uapi/linux/dma-heap.h index 6f84fa08e..c9949723f 100644 --- a/include/uapi/linux/dma-heap.h +++ b/include/uapi/linux/dma-heap.h @@ -41,6 +41,31 @@ struct dma_heap_allocation_data { #define DMA_HEAP_IOC_MAGIC 'H' +enum dma_heap_flag_owner_id { + OWNER_DEFAULT = 0, + OWNER_GPU, + OWNER_MEDIA_CODEC, + COUNT_DMA_HEAP_FLAG_OWNER, +}; + +#define OWNER_OFFSET_BIT 27 /* 27 bit */ +#define OWNER_MASK (0xfUL << OWNER_OFFSET_BIT) + +/* Use the 27-30 bits of heap flags as owner_id flag */ +static inline void set_owner_id_for_heap_flags(__u64 *heap_flags, __u64 owner_id) +{ + if (heap_flags == NULL || owner_id >= COUNT_DMA_HEAP_FLAG_OWNER) { + return; + } + *heap_flags |= owner_id << OWNER_OFFSET_BIT; +} + +/* To get the binary number of owner_id */ +static inline __u64 get_owner_id_from_heap_flags(__u64 heap_flags) +{ + return (heap_flags & OWNER_MASK) >> OWNER_OFFSET_BIT; +} + /** * DOC: DMA_HEAP_IOCTL_ALLOC - allocate memory from pool * -- Gitee