diff --git a/linux-5.10/hispark_taurus_patch/hdf.patch b/linux-5.10/hispark_taurus_patch/hdf.patch new file mode 100644 index 0000000000000000000000000000000000000000..47afa88160a7dc72f94b4d3c1f92276e4e642022 --- /dev/null +++ b/linux-5.10/hispark_taurus_patch/hdf.patch @@ -0,0 +1,340 @@ +diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S +index 30c102978..1d8b8de34 100644 +--- a/arch/arm64/kernel/vmlinux.lds.S ++++ b/arch/arm64/kernel/vmlinux.lds.S +@@ -201,6 +201,15 @@ SECTIONS + INIT_RAM_FS + *(.init.rodata.* .init.bss) /* from the EFI stub */ + } ++ ++#ifdef CONFIG_DRIVERS_HDF ++ .init.hdf_table : { ++ _hdf_drivers_start = .; ++ *(.hdf.driver) ++ _hdf_drivers_end = .; ++ } ++#endif ++ + .exit.data : { + EXIT_DATA + } +diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S +index 8af654bd1..1e9ff41d6 100644 +--- a/arch/arm/kernel/vmlinux.lds.S ++++ b/arch/arm/kernel/vmlinux.lds.S +@@ -131,6 +131,14 @@ SECTIONS + __pv_table_end = .; + } + ++#ifdef CONFIG_DRIVERS_HDF ++ .init.hdf_table : { ++ _hdf_drivers_start = .; ++ *(.hdf.driver) ++ _hdf_drivers_end = .; ++ } ++#endif ++ + INIT_DATA_SECTION(16) + + .exit.data : { +diff --git a/drivers/Kconfig b/drivers/Kconfig +index dcecc9f6e..8eddfc2cd 100644 +--- a/drivers/Kconfig ++++ b/drivers/Kconfig +@@ -234,5 +234,7 @@ source "drivers/interconnect/Kconfig" + + source "drivers/counter/Kconfig" + ++source "drivers/hdf/khdf/Kconfig" ++ + source "drivers/most/Kconfig" + endmenu +diff --git a/drivers/Makefile b/drivers/Makefile +index 576228037..025b92b1f 100644 +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -188,4 +188,5 @@ obj-$(CONFIG_SIOX) += siox/ + obj-$(CONFIG_GNSS) += gnss/ + obj-$(CONFIG_INTERCONNECT) += interconnect/ + obj-$(CONFIG_COUNTER) += counter/ ++obj-$(CONFIG_DRIVERS_HDF) += hdf/ + obj-$(CONFIG_MOST) += most/ +diff --git a/drivers/hdf/Makefile b/drivers/hdf/Makefile +new file mode 100644 +index 000000000..5c5e1911c +--- /dev/null ++++ b/drivers/hdf/Makefile +@@ -0,0 +1,2 @@ ++export PROJECT_ROOT := ../../../../../ ++obj-$(CONFIG_DRIVERS_HDF) += khdf/ +-- +2.25.1 +diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile +index 4acb583c9..ddcaf4cdc 100644 +--- a/drivers/hid/Makefile ++++ b/drivers/hid/Makefile +@@ -2,6 +2,15 @@ + # + # Makefile for the HID driver + # ++HDF_ROOT_DIR = -I$(srctree)/drivers/hdf ++ccflags-$(CONFIG_DRIVERS_HDF_INPUT) += $(HDF_ROOT_DIR)/framework/model/input/driver \ ++ $(HDF_ROOT_DIR)/framework/include/core \ ++ $(HDF_ROOT_DIR)/framework/core/common/include/host \ ++ $(HDF_ROOT_DIR)/framework/include/utils \ ++ $(HDF_ROOT_DIR)/framework/include/osal \ ++ $(HDF_ROOT_DIR)/framework/ability/sbuf/include \ ++ $(HDF_ROOT_DIR)/khdf/osal/include \ ++ $(HDF_ROOT_DIR)/evdev + hid-y := hid-core.o hid-input.o hid-quirks.o + hid-$(CONFIG_DEBUG_FS) += hid-debug.o + +diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c +index 5550c943f..79df97fab 100644 +--- a/drivers/hid/hid-core.c ++++ b/drivers/hid/hid-core.c +@@ -33,6 +33,9 @@ + #include + #include + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++#include "hdf_hid_adapter.h" ++#endif + #include "hid-ids.h" + + /* +@@ -1522,6 +1525,11 @@ static void hid_process_event(struct hid_device *hid, struct hid_field *field, + hidinput_hid_event(hid, field, usage, value); + if (hid->claimed & HID_CLAIMED_HIDDEV && interrupt && hid->hiddev_hid_event) + hid->hiddev_hid_event(hid, field, usage, value); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hid->input_dev) { ++ HidReportEvent(hid->input_dev, usage->type, usage->code, value); ++ } ++#endif + } + + /* +@@ -1928,6 +1936,81 @@ static const struct device_attribute dev_attr_country = { + .show = show_country, + }; + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++static bool check_mouse(char *name) ++{ ++ static char *option[]={"Mouse", "mouse", "MOUSE", "Razer"}; ++ for (int i = 0; i < 4; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_kbd(char *name) ++{ ++ static char *option[]={"Keyboard", "keyboard"}; ++ for (int i = 0; i < 2; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_rocker(char *name) ++{ ++ static char *option[]={"Thrustmaster"}; ++ for (int i = 0; i < 1; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static bool check_encoder(char *name) ++{ ++ if (strcmp(name, "Wired KeyBoard") == 0) { ++ return true; ++ } ++ return false; ++} ++static bool check_trackball(char *name) ++{ ++ static char *option[]={"Trackball"}; ++ for (int i = 0; i < 1; i++) { ++ if (strstr(name, option[i])) ++ return true; ++ } ++ return false; ++} ++static void notify_connect_event(struct hid_device *hdev) ++{ ++ bool check; ++ int type = -1; ++ HidInfo *dev = (HidInfo *)kmalloc(sizeof(HidInfo), GFP_KERNEL); ++ if (dev == NULL) { ++ printk("%s: malloc failed", __func__); ++ return; ++ } ++ type = check_mouse(hdev->name)?HID_TYPE_MOUSE:type; ++ type = check_kbd(hdev->name)?HID_TYPE_KEYBOARD:type; ++ type = check_rocker(hdev->name)?HID_TYPE_ROCKER:type; ++ type = check_encoder(hdev->name)?HID_TYPE_ENCODER:type; ++ type = check_trackball(hdev->name)?HID_TYPE_TRACKBALL:type; ++ if ( type < 0) { ++ kfree(dev); ++ dev = NULL; ++ return; ++ } ++ ++ dev->devType = type; ++ dev->devName = hdev->name; ++ hdev->input_dev = HidRegisterHdfInputDev(dev); ++ if (hdev->input_dev == NULL) { ++ printk("%s: RegisterInputDevice failed\n", __func__); ++ } ++ kfree(dev); ++ dev = NULL; ++} ++#endif ++ + int hid_connect(struct hid_device *hdev, unsigned int connect_mask) + { + static const char *types[] = { "Device", "Pointer", "Mouse", "Device", +@@ -2020,6 +2103,9 @@ int hid_connect(struct hid_device *hdev, unsigned int connect_mask) + hid_info(hdev, "%s: %s HID v%x.%02x %s [%s] on %s\n", + buf, bus, hdev->version >> 8, hdev->version & 0xff, + type, hdev->name, hdev->phys); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ notify_connect_event(hdev); ++#endif + + return 0; + } +@@ -2035,6 +2121,10 @@ void hid_disconnect(struct hid_device *hdev) + if (hdev->claimed & HID_CLAIMED_HIDRAW) + hidraw_disconnect(hdev); + hdev->claimed = 0; ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hdev->input_dev) ++ HidUnregisterHdfInputDev(hdev->input_dev); ++#endif + } + EXPORT_SYMBOL_GPL(hid_disconnect); + +@@ -2119,6 +2209,11 @@ EXPORT_SYMBOL_GPL(hid_hw_open); + */ + void hid_hw_close(struct hid_device *hdev) + { ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if (hdev->input_dev) { ++ return; ++ } ++#endif + mutex_lock(&hdev->ll_open_lock); + if (!--hdev->ll_open_count) + hdev->ll_driver->close(hdev); +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index d1ab2dccf..5354f0153 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -20,6 +20,10 @@ + #include + #include + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++#include "hdf_hid_adapter.h" ++#endif ++ + #include "hid-ids.h" + + #define unk KEY_UNKNOWN +@@ -1418,7 +1422,15 @@ void hidinput_report_event(struct hid_device *hid, struct hid_report *report) + return; + + list_for_each_entry(hidinput, &hid->inputs, list) ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ { ++#endif + input_sync(hidinput->input); ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ if(hid->input_dev) ++ HidReportEvent(hid->input_dev, EV_SYN, SYN_REPORT, 0); ++ } ++#endif + } + EXPORT_SYMBOL_GPL(hidinput_report_event); + +@@ -1869,6 +1881,41 @@ static inline void hidinput_configure_usages(struct hid_input *hidinput, + report->field[i]->usage + j); + } + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++static void transfer_info(struct input_dev *dev) ++{ ++ HidInfo *info = (HidInfo *)kmalloc(sizeof(HidInfo),GFP_KERNEL); ++ if (info == NULL) { ++ printk("%s: malloc failed\n",__func__); ++ return; ++ } ++ info->devName = dev->name; ++ memcpy(info->devProp, dev->propbit, sizeof(unsigned long) * BITS_TO_LONGS(INPUT_PROP_CNT)); ++ memcpy(info->eventType, dev->evbit, sizeof(unsigned long) * BITS_TO_LONGS(EV_CNT)); ++ memcpy(info->keyCode, dev->keybit, sizeof(unsigned long) * BITS_TO_LONGS(KEY_CNT)); ++ memcpy(info->relCode, dev->relbit, sizeof(unsigned long) * BITS_TO_LONGS(REL_CNT)); ++ memcpy(info->absCode, dev->absbit, sizeof(unsigned long) * BITS_TO_LONGS(ABS_CNT)); ++ memcpy(info->miscCode, dev->mscbit, sizeof(unsigned long) * BITS_TO_LONGS(MSC_CNT)); ++ memcpy(info->ledCode, dev->ledbit, sizeof(unsigned long) * BITS_TO_LONGS(LED_CNT)); ++ memcpy(info->soundCode, dev->sndbit, sizeof(unsigned long) * BITS_TO_LONGS(SND_CNT)); ++ memcpy(info->forceCode, dev->ffbit, sizeof(unsigned long) * BITS_TO_LONGS(FF_CNT)); ++ memcpy(info->switchCode, dev->swbit, sizeof(unsigned long) * BITS_TO_LONGS(SW_CNT)); ++ for (int i = 0; i < BITS_TO_LONGS(ABS_CNT); i++) { ++ if (dev->absbit[i] != 0) { ++ memcpy(info->axisInfo, dev->absinfo, sizeof(struct input_absinfo) * ABS_CNT); ++ break; ++ } ++ } ++ info->bustype = dev->id.bustype; ++ info->vendor = dev->id.vendor; ++ info->product = dev->id.product; ++ info->version = dev->id.version; ++ SendInfoToHdf(info); ++ kfree(info); ++ info = NULL; ++} ++#endif ++ + /* + * Register the input device; print a message. + * Configure the input layer interface +@@ -1954,6 +2001,9 @@ int hidinput_connect(struct hid_device *hid, unsigned int force) + continue; + } + ++#if defined(CONFIG_DRIVERS_HDF_INPUT) ++ transfer_info(hidinput->input); ++#endif + if (input_register_device(hidinput->input)) + goto out_unwind; + hidinput->registered = true; +diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c +index 505c562a5..67d451beb 100644 +--- a/drivers/input/mousedev.c ++++ b/drivers/input/mousedev.c +@@ -869,7 +869,7 @@ static struct mousedev *mousedev_create(struct input_dev *dev, + + if (mixdev) { + dev_set_name(&mousedev->dev, "mice"); +- ++ mousedev->open = 1; + mousedev->open_device = mixdev_open_devices; + mousedev->close_device = mixdev_close_devices; + } else { +diff --git a/include/linux/hid.h b/include/linux/hid.h +index 6ed2a97eb..1d1445a23 100644 +--- a/include/linux/hid.h ++++ b/include/linux/hid.h +@@ -622,6 +622,7 @@ struct hid_device { /* device report descriptor */ + struct list_head debug_list; + spinlock_t debug_list_lock; + wait_queue_head_t debug_wait; ++ void *input_dev; + }; + + #define to_hid_device(pdev) \ diff --git a/linux-5.10/hispark_taurus_patch/hi3516dv300_small.patch b/linux-5.10/hispark_taurus_patch/hi3516dv300_small.patch new file mode 100644 index 0000000000000000000000000000000000000000..ac847d688e54508e71f65f5d2a8e74f9cc9a1803 --- /dev/null +++ b/linux-5.10/hispark_taurus_patch/hi3516dv300_small.patch @@ -0,0 +1,12 @@ +diff --git a/include/uapi/linux/android/binder.h b/include/uapi/linux/android/binder.h +index ec84ad106568..9d7b05055726 100644 +--- a/include/uapi/linux/android/binder.h ++++ b/include/uapi/linux/android/binder.h +@@ -27,6 +27,7 @@ + #define B_PACK_CHARS(c1, c2, c3, c4) \ + ((((c1)<<24)) | (((c2)<<16)) | (((c3)<<8)) | (c4)) + #define B_TYPE_LARGE 0x85 ++#define BINDER_IPC_32BIT 1 + + enum { + BINDER_TYPE_BINDER = B_PACK_CHARS('s', 'b', '*', B_TYPE_LARGE), diff --git a/linux-5.10/hispark_taurus_patch/hispark_taurus.patch b/linux-5.10/hispark_taurus_patch/hispark_taurus.patch new file mode 100755 index 0000000000000000000000000000000000000000..075d7e9633841a1001d2609540f6c0d2180d1b56 --- /dev/null +++ b/linux-5.10/hispark_taurus_patch/hispark_taurus.patch @@ -0,0 +1,59972 @@ +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index ceaf87c4d..ea05aa4b4 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -322,7 +322,7 @@ config ARCH_MULTIPLATFORM + select ARCH_SELECT_MEMORY_MODEL + select ARM_HAS_SG_CHAIN + select ARM_PATCH_PHYS_VIRT +- select AUTO_ZRELADDR ++ #select AUTO_ZRELADDR + select TIMER_OF + select COMMON_CLK + select GENERIC_CLOCKEVENTS +@@ -650,6 +650,8 @@ source "arch/arm/mach-highbank/Kconfig" + + source "arch/arm/mach-hisi/Kconfig" + ++source "arch/arm/mach-hibvt/Kconfig" ++ + source "arch/arm/mach-imx/Kconfig" + + source "arch/arm/mach-integrator/Kconfig" +diff --git a/arch/arm/Makefile b/arch/arm/Makefile +index cb7c6b02f..95308da9c 100644 +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -182,6 +182,7 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge + machine-$(CONFIG_ARCH_GEMINI) += gemini + machine-$(CONFIG_ARCH_HIGHBANK) += highbank + machine-$(CONFIG_ARCH_HISI) += hisi ++machine-$(CONFIG_ARCH_HISI_BVT) += hibvt + machine-$(CONFIG_ARCH_INTEGRATOR) += integrator + machine-$(CONFIG_ARCH_IOP32X) += iop32x + machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx +@@ -270,6 +271,10 @@ KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs)) + endif + endif + ++ifeq ($(CONFIG_ARCH_HISI_BVT),y) ++KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs)) ++endif ++ + export TEXT_OFFSET GZFLAGS MMUEXT + + core-y += arch/arm/ +diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile +index 0b3cd7a33..763d37e86 100644 +--- a/arch/arm/boot/Makefile ++++ b/arch/arm/boot/Makefile +@@ -16,6 +16,8 @@ OBJCOPYFLAGS :=-O binary -R .comment -S + ifneq ($(MACHINE),) + include $(MACHINE)/Makefile.boot + endif ++include $(srctree)/arch/arm/mach-hibvt/Makefile.boot ++include $(srctree)/arch/arm/boot/dts/Makefile + + # Note: the following conditions must always be true: + # ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) +@@ -24,10 +26,12 @@ endif + ZRELADDR := $(zreladdr-y) + PARAMS_PHYS := $(params_phys-y) + INITRD_PHYS := $(initrd_phys-y) ++DTB_OBJS ?= $(dtb-y) ++DTB_OBJS_FULL := $(addprefix $(obj)/dts/,$(DTB_OBJS)) + + export ZRELADDR INITRD_PHYS PARAMS_PHYS + +-targets := Image zImage xipImage bootpImage uImage ++targets := Image zImage xipImage bootpImage uImage zImage-dtb + + ifeq ($(CONFIG_XIP_KERNEL),y) + +@@ -66,6 +70,10 @@ $(obj)/compressed/vmlinux: $(obj)/Image FORCE + $(obj)/zImage: $(obj)/compressed/vmlinux FORCE + $(call if_changed,objcopy) + ++$(obj)/zImage-dtb: $(obj)/zImage $(DTB_OBJS_FULL) FORCE ++ @cat $(obj)/zImage $(DTB_OBJS_FULL) > $@ ++ @$(kecho) ' Kernel: $@ is ready' ++ + endif + + ifneq ($(LOADADDR),) +@@ -86,7 +94,7 @@ if [ $(words $(UIMAGE_LOADADDR)) -ne 1 ]; then \ + false; \ + fi + +-$(obj)/uImage: $(obj)/zImage FORCE ++$(obj)/uImage: $(obj)/zImage-dtb FORCE + @$(check_for_multiple_loadaddr) + $(call if_changed,uimage) + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index ce66ffd5a..a84efd2d6 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -239,6 +239,10 @@ dtb-$(CONFIG_ARCH_HISI) += \ + hi3519-demb.dtb + dtb-$(CONFIG_ARCH_HIX5HD2) += \ + hisi-x5hd2-dkb.dtb ++ ++dtb-$(CONFIG_ARCH_HI3516DV300) += \ ++ hi3516dv300-demb.dtb ++ + dtb-$(CONFIG_ARCH_INTEGRATOR) += \ + integratorap.dtb \ + integratorap-im-pd1.dtb \ +@@ -1408,3 +1412,4 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-bmc-opp-zaius.dtb \ + aspeed-bmc-portwell-neptune.dtb \ + aspeed-bmc-quanta-q71l.dtb ++ +diff --git a/arch/arm/boot/dts/hi3516dv300-demb.dts b/arch/arm/boot/dts/hi3516dv300-demb.dts +new file mode 100644 +index 000000000..bbe67651e +--- /dev/null ++++ b/arch/arm/boot/dts/hi3516dv300-demb.dts +@@ -0,0 +1,270 @@ ++/* ++ * Copyright (c) 2013-2014 Linaro Ltd. ++ * Copyright (c) 2015-2017 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++ ++/dts-v1/; ++#include "hi3516dv300.dtsi" ++#include "autoconf.h" ++ ++/ { ++ model = "Hisilicon HI3516DV300 DEMO Board"; ++ compatible = "hisilicon,hi3516dv300"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x82000000 0x20000000>; ++ }; ++ firmware { ++ android { ++ compatible = "android,firmware"; ++ fstab { ++ compatible = "android,fstab"; ++ // delete for system as root ++ /*system { ++ compatible = "android,system"; ++ dev = "/dev/block/platform/soc/f9830000.himciv200.MMC/by-name/system"; ++ type = "ext4"; ++ mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; ++ fsmgr_flags = "wait"; ++ };*/ ++ vendor { ++ compatible = "android,vendor"; ++ //dev = "mmcblk0p4"; ++ //dev = "/dev/block/by-name/vendor"; ++ //dev = "/dev/block/platform/soc/100f0000.eMMC/by-name/vendor"; ++ //dev = "/dev/block/platform/soc/10100000.eMMC/by-name/vendor"; ++ dev = "/dev/block/platform/soc/10100000.himci.eMMC/by-name/vendor"; ++ //dev = "/dev/block/platform/soc/100f0000.eMMC/mmcblk0p4"; ++ //dev = "/dev/block/platform/soc/f9830000.himciv200.MMC/by-name/vendor"; ++ type = "ext4"; ++ mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; ++ fsmgr_flags = "wait"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++&uart1 { ++ status = "okay"; ++}; ++ ++&i2c_bus0 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus1 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus2 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus3 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus4 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus5 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus6 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&i2c_bus7 { ++ status = "okay"; ++ clock-frequency = <100000>; ++}; ++ ++&spi_bus0{ ++ status = "okay"; ++ num-cs = <1>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ reg = <0>; ++ pl022,interface = <0>; ++ pl022,com-mode = <0>; ++ spi-max-frequency = <25000000>; ++ }; ++}; ++&spi_bus1{ ++ status = "okay"; ++ num-cs = <2>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ reg = <0>; ++ pl022,interface = <0>; ++ pl022,com-mode = <0>; ++ spi-max-frequency = <25000000>; ++ }; ++ spidev@1 { ++ compatible = "rohm,dh2228fv"; ++ reg = <1>; ++ pl022,interface = <0>; ++ pl022,com-mode = <0>; ++ spi-max-frequency = <25000000>; ++ }; ++}; ++&spi_bus2{ ++ status = "okay"; ++ num-cs = <1>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ reg = <0>; ++ pl022,interface = <0>; ++ pl022,com-mode = <0>; ++ spi-max-frequency = <25000000>; ++ }; ++}; ++#endif ++ ++&mdio0 { ++ hisilicon,phy-reset-delays-us = <10000 20000 150000>; ++ phy0: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ ++&hisi_femac0 { ++ mac-address = [00 00 00 00 00 00]; ++ phy-mode = "rmii"; ++ phy-handle = <&phy0>; ++ status = "okay"; ++}; ++ ++&hisfc { ++ hi_sfc { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <160000000>; ++ }; ++}; ++ ++&hisnfc { ++ hinand { ++ compatible = "jedec,spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <160000000>; ++ }; ++}; ++ ++&mmc0 { ++#ifdef CONFIG_MTD ++ status = "disabled"; ++#else ++ status = "okay"; ++#endif ++}; ++ ++&mmc1 { ++ status = "okay"; ++}; ++ ++&mmc2 { ++ status = "okay"; ++}; ++ ++&watchdog { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&hidmac { ++ status = "disabled"; ++}; ++ ++#ifdef CONFIG_HIEDMACV310 ++&hiedmacv310_0 { ++ status = "okay"; ++}; ++#endif ++ ++&gpio_chip0 { ++ status = "okay"; ++}; ++ ++&gpio_chip1 { ++ status = "okay"; ++}; ++ ++&gpio_chip2 { ++ status = "okay"; ++}; ++ ++&gpio_chip3 { ++ status = "okay"; ++}; ++ ++&gpio_chip4 { ++ status = "okay"; ++}; ++ ++&gpio_chip5 { ++ status = "okay"; ++}; ++ ++&gpio_chip6 { ++ status = "okay"; ++}; ++ ++&gpio_chip7 { ++ status = "okay"; ++}; ++ ++&gpio_chip8 { ++ status = "okay"; ++}; ++ ++&gpio_chip9 { ++ status = "okay"; ++}; ++ ++&gpio_chip10 { ++ status = "okay"; ++}; ++ ++&gpio_chip11 { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/hi3516dv300.dtsi b/arch/arm/boot/dts/hi3516dv300.dtsi +new file mode 100644 +index 000000000..c58f5b1ad +--- /dev/null ++++ b/arch/arm/boot/dts/hi3516dv300.dtsi +@@ -0,0 +1,906 @@ ++/* ++ * Copyright (c) 2013-2014 Linaro Ltd. ++ * Copyright (c) 2015-2017 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++#include "autoconf.h" ++#include "skeleton.dtsi" ++#include "clock/hi3516dv300-clock.h" ++/ { ++ aliases { ++ serial0 = &uart0; ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ i2c0 = &i2c_bus0; ++ i2c1 = &i2c_bus1; ++ i2c2 = &i2c_bus2; ++ i2c3 = &i2c_bus3; ++#endif ++ i2c4 = &i2c_bus4; ++ i2c5 = &i2c_bus5; ++ i2c6 = &i2c_bus6; ++ i2c7 = &i2c_bus7; ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ spi0 = &spi_bus0; ++ spi1 = &spi_bus1; ++ spi2 = &spi_bus2; ++#endif ++ gpio0 = &gpio_chip0; ++ gpio1 = &gpio_chip1; ++ gpio2 = &gpio_chip2; ++ gpio3 = &gpio_chip3; ++ gpio4 = &gpio_chip4; ++ gpio5 = &gpio_chip5; ++ gpio6 = &gpio_chip6; ++ gpio7 = &gpio_chip7; ++ gpio8 = &gpio_chip8; ++ gpio9 = &gpio_chip9; ++ gpio10 = &gpio_chip10; ++ gpio11 = &gpio_chip11; ++ }; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ enable-method = "hisilicon,hi3516dv300"; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ clock-frequency = ; ++ reg = <0>; ++ }; ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a7"; ++ clock-frequency = ; ++ reg = <1>; ++ }; ++#endif ++ }; ++ ++ clock: clock@12010000 { ++ compatible = "hisilicon,hi3516dv300-clock"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ #clock-cells = <1>; ++ #reset-cells = <2>; ++ reg = <0x12010000 0x1000>; ++ }; ++ ++ gic: interrupt-controller@10300000 { ++ compatible = "arm,cortex-a7-gic"; ++ #interrupt-cells = <3>; ++ #address-cells = <0>; ++ interrupt-controller; ++ /* gic dist base, gic cpu base , no virtual support */ ++ reg = <0x10301000 0x1000>, <0x10302000 0x100>; ++ }; ++ ++ syscounter { ++ compatible = "arm,armv7-timer"; ++ interrupt-parent = <&gic>; ++ interrupts = <1 13 0xf08>, ++ <1 14 0xf08>; ++ clock-frequency = <50000000>; ++ }; ++ ++ soc { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "simple-bus"; ++ interrupt-parent = <&gic>; ++ ranges; ++ ++ clk_3m: clk_3m { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <3000000>; ++ }; ++ ++ clk_apb: clk_apb { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <50000000>; ++ }; ++ ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = <0 54 4>; ++ }; ++#ifdef CONFIG_HIEDMACV310 ++ hiedmacv310_0: hiedma-controller@10060000 { ++ compatible = "hisilicon,hiedmacv310"; ++ reg = <0x10060000 0x1000>; ++ interrupts = <0 28 4>; ++ clocks = <&clock HI3516DV300_DMAC_CLK>, <&clock HI3516DV300_DMAC_AXICLK>; ++ clock-names = "apb_pclk", "axi_aclk"; ++ #clock-cells = <2>; ++ resets = <&clock 0x194 0>; ++ reset-names = "dma-reset"; ++ dma-requests = <32>; ++ dma-channels = <8>; ++ devid = <0>; ++ #dma-cells = <2>; ++ status = "disabled"; ++ }; ++#endif ++#ifdef CONFIG_HIEDMAC ++ hiedmacv310_0: hiedma-controller@10060000 { ++ compatible = "hisilicon,hiedmacv310_n"; ++ reg = <0x10060000 0x1000>; ++ interrupts = <0 28 4>; ++ clocks = <&clock HI3516DV300_DMAC_CLK>, <&clock HI3516DV300_DMAC_AXICLK>; ++ clock-names = "apb_pclk", "axi_aclk"; ++ #clock-cells = <2>; ++ resets = <&clock 0x194 0>; ++ reset-names = "dma-reset"; ++ dma-requests = <32>; ++ dma-channels = <8>; ++ devid = <0>; ++ #dma-cells = <2>; ++ status = "disabled"; ++ }; ++#endif ++ ++ sysctrl: system-controller@12020000 { ++ compatible = "hisilicon,sysctrl"; ++ reg = <0x12020000 0x1000>; ++ reboot-offset = <0x4>; ++ #clock-cells = <1>; ++ }; ++ ++ amba { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "arm,amba-bus"; ++ ranges; ++ ++ timer@hisp804 { ++ compatible = "hisilicon,hisp804"; ++ /* timer0 & timer1 & timer2 */ ++ reg = <0x12000000 0x20>, /* clocksource */ ++ <0x12000020 0x20>, /* local timer for each cpu */ ++ <0x12001000 0x20>; ++ interrupts = <0 1 4>, /* irq of local timer */ ++ <0 2 4>; ++ clocks = <&clock HI3516DV300_FIXED_3M>, ++ <&clock HI3516DV300_FIXED_3M>, ++ <&clock HI3516DV300_FIXED_3M>; ++ clock-names = "timer0", "timer1", "timer2"; ++ }; ++ ++ dual_timer2: dual_timer@12002000 { ++ compatible = "arm,sp804", "arm,primecell"; ++ /* timer4 & timer5 */ ++ interrupts = <0 3 4>; ++ reg = <0x12002000 0x1000>; ++ clocks = <&clk_3m>, <&clk_3m>, <&clk_apb>; ++ clock-names = "timer20", "timer21", "apb_pclk"; ++ status = "disabled"; ++ }; ++ ++ watchdog: watchdog@12051000 { ++ compatible = "arm,sp805-wdt", "arm,primecell"; ++ arm,primecell-periphid = <0x00141805>; ++ reg = <0x12051000 0x1000>; ++ clocks = <&clk_3m>,<&clk_apb>; ++ clock-names = "wdog_clk", "apb_pclk"; ++ status = "disabled"; ++ }; ++ ++ uart0: uart@120a0000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x120a0000 0x1000>; ++ interrupts = <0 6 4>; ++ clocks = <&clock HI3516DV300_UART0_CLK>; ++ clock-names = "apb_pclk"; ++ status = "disabled"; ++ }; ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ uart1: uart@120a1000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x120a1000 0x1000>; ++ interrupts = <0 7 4>; ++ clocks = <&clock HI3516DV300_UART1_CLK>; ++ clock-names = "apb_pclk"; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 19 19>, <&hiedmacv310_0 18 18>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++#endif ++ uart2: uart@120a2000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x120a2000 0x1000>; ++ interrupts = <0 8 4>; ++ clocks = <&clock HI3516DV300_UART2_CLK>; ++ clock-names = "apb_pclk"; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 21 21>, <&hiedmacv310_0 20 20>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ uart3: uart@120a3000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x120a3000 0x1000>; ++ interrupts = <0 9 4>; ++ clocks = <&clock HI3516DV300_UART3_CLK>; ++ clock-names = "apb_pclk"; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 23 23>, <&hiedmacv310_0 22 22>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ uart4: uart@120a4000 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x120a4000 0x1000>; ++ interrupts = <0 10 4>; ++ clocks = <&clock HI3516DV300_UART4_CLK>; ++ clock-names = "apb_pclk"; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 25 25>, <&hiedmacv310_0 24 24>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ }; ++ ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ i2c_bus0: i2c@120b0000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b0000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C0_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 1 1>, <&hiedmacv310_0 0 0>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ i2c_bus1: i2c@120b1000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b1000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C1_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 3 3>, <&hiedmacv310_0 2 2>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ i2c_bus2: i2c@120b2000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b2000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C2_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 5 5>, <&hiedmacv310_0 4 4>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ i2c_bus3: i2c@120b3000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b3000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C3_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 7 7>, <&hiedmacv310_0 6 6>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++#endif ++ i2c_bus4: i2c@120b4000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b4000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C4_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 9 9>, <&hiedmacv310_0 8 8>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ i2c_bus5: i2c@120b5000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b5000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C5_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 11 11>, <&hiedmacv310_0 10 10>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ i2c_bus6: i2c@120b6000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b6000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C6_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 13 13>, <&hiedmacv310_0 12 12>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ i2c_bus7: i2c@120b7000 { ++ compatible = "hisilicon,hibvt-i2c"; ++ reg = <0x120b7000 0x1000>; ++ clocks = <&clock HI3516DV300_I2C7_CLK>; ++#ifdef CONFIG_HIEDMAC ++ dmas = <&hiedmacv310_0 15 15>, <&hiedmacv310_0 14 14>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++#ifndef CONFIG_ARCH_HISI_BVT_AMP ++ spi_bus0: spi@120c0000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ arm,primecell-periphid = <0x00800022>; ++ reg = <0x120c0000 0x1000>; ++ interrupts = <0 68 4>; ++ clocks = <&clock HI3516DV300_SPI0_CLK>; ++ clock-names = "apb_pclk"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 27 27>, <&hiedmacv310_0 26 26>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ spi_bus1: spi@120c1000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ arm,primecell-periphid = <0x00800022>; ++ reg = <0x120c1000 0x1000>, <0x12030000 0x4>; ++ interrupts = <0 69 4>; ++ clocks = <&clock HI3516DV300_SPI1_CLK>; ++ clock-names = "apb_pclk"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ num-cs = <2>; ++ hisi,spi_cs_sb = <2>; ++ hisi,spi_cs_mask_bit = <0x4>;//0100 ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 29 29>, <&hiedmacv310_0 28 28>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++ ++ spi_bus2: spi@120c2000 { ++ compatible = "arm,pl022", "arm,primecell"; ++ arm,primecell-periphid = <0x00800022>; ++ reg = <0x120c2000 0x1000>; ++ interrupts = <0 70 4>; ++ clocks = <&clock HI3516DV300_SPI2_CLK>; ++ clock-names = "apb_pclk"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++#ifdef CONFIG_HIEDMACV310 ++ dmas = <&hiedmacv310_0 31 31>, <&hiedmacv310_0 30 30>; ++ dma-names = "tx","rx"; ++#endif ++ status = "disabled"; ++ }; ++#endif ++ ++ ipcm: ipcm@045E0000 { ++ compatible = "hisilicon,ipcm-interrupt"; ++ interrupt-parent = <&gic>; ++ interrupts = <0 10 4>; ++ reg = <0x10300000 0x4000>; ++ status = "okay"; ++ }; ++ ++ mdio0: mdio@10011100 { ++ compatible = "hisilicon,hisi-femac-mdio"; ++ reg = <0x10011100 0x10>; ++ clocks = <&clock HI3516DV300_ETH0_CLK>; ++ clock-names = "mdio"; ++ assigned-clocks = <&clock HI3516DV300_ETH0_CLK>; ++ assigned-clock-rates = <54000000>; ++ resets = <&clock 0x16c 3>; ++ reset-names = "external-phy"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ hisi_femac0: ethernet@10010000 { ++ compatible = "hisilicon,hi3516dv300-femac", ++ "hisilicon,hisi-femac-v2"; ++ reg = <0x10010000 0x1000>,<0x10011300 0x200>; ++ interrupts = <0 32 4>; ++ clocks = <&clock HI3516DV300_ETH0_CLK>; ++ resets = <&clock 0x16c 0>; ++ reset-names = "mac"; ++ }; ++ ++ fmc: flash-memory-controller@10000000 { ++ compatible = "hisilicon,hisi-fmc"; ++ reg = <0x10000000 0x1000>, <0x14000000 0x10000>; ++ reg-names = "control", "memory"; ++ clocks = <&clock HI3516DV300_FMC_CLK>; ++ max-dma-size = <0x2000>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ hisfc:spi-nor@0 { ++ compatible = "hisilicon,fmc-spi-nor"; ++ assigned-clocks = <&clock HI3516DV300_FMC_CLK>; ++ assigned-clock-rates = <24000000>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ hisnfc:spi-nand@0 { ++ compatible = "hisilicon,fmc-spi-nand"; ++ assigned-clocks = <&clock HI3516DV300_FMC_CLK>; ++ assigned-clock-rates = <24000000>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ ++ mmc0: himci.eMMC@0x10100000 { ++ compatible = "hisilicon,hi3516dv300-himci"; ++ reg = <0x10100000 0x1000>; ++ interrupts = <0 64 4>; ++ clocks = <&clock HI3516DV300_MMC0_CLK>; ++ clock-names = "mmc_clk"; ++ resets = <&clock 0x148 0>; ++ reset-names = "mmc_reset"; ++ max-frequency = <100000000>; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-mmc-hw-reset; ++ devid = <0>; ++ status = "disabled"; ++ }; ++ ++ mmc1: himci.SD@0x100f0000 { ++ compatible = "hisilicon,hi3516dv300-himci"; ++ reg = <0x100f0000 0x1000>; ++ interrupts = <0 30 4>; ++ clocks = <&clock HI3516DV300_MMC1_CLK>; ++ clock-names = "mmc_clk"; ++ resets = <&clock 0x160 0>; ++ reset-names = "mmc_reset"; ++ max-frequency = <100000000>; ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ full-pwr-cycle; ++ devid = <1>; ++ status = "disabled"; ++ }; ++ ++ mmc2: himci.SD@0x10020000 { ++ compatible = "hisilicon,hi3516dv300-himci"; ++ reg = <0x10020000 0x1000>; ++ interrupts = <0 31 4>; ++ clocks = <&clock HI3516DV300_MMC2_CLK>; ++ clock-names = "mmc_clk"; ++ resets = <&clock 0x154 0>; ++ reset-names = "mmc_reset"; ++ max-frequency = <100000000>; ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ full-pwr-cycle; ++ devid = <2>; ++ status = "disabled"; ++ }; ++ ++ hidmac: hidma-controller@10060000 { ++ compatible = "hisilicon,hisi-dmac"; ++ reg = <0x10060000 0x1000>; ++ interrupts = <0 28 4>; ++ clocks = <&clock HI3516DV300_DMAC_CLK>; ++ clock-names = "dmac_clk"; ++ resets = <&clock 0xc8 4>; ++ reset-names = "dma-reset"; ++ #dma-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ usb_phy: phy { ++ compatible = "hisilicon,hisi-usb-phy"; ++ reg = <0x12010000 0x1000>; ++ #phy-cells = <0>; ++ }; ++ ++#ifdef CONFIG_USB_DRD0_IN_HOST ++ xhci_0@0x100e0000 { ++ compatible = "generic-xhci"; ++ reg = <0x100e0000 0x10000>; ++ interrupts = <0 27 4>; ++ usb2-lpm-disable; ++ }; ++#endif ++#ifdef CONFIG_USB_DRD0_IN_DEVICE ++ hidwc3_0@0x100e0000 { ++ compatible = "snps,dwc3"; ++ reg = <0x100e0000 0x10000>; ++ interrupts = <0 27 4>; ++ interrupt-names = "peripheral"; ++ maximum-speed = "high-speed"; ++ dr_mode = "otg"; ++ }; ++#endif ++ gpio_chip0: gpio_chip@120d0000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d0000 0x1000>; ++ interrupts = <0 16 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip1: gpio_chip@120d1000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d1000 0x1000>; ++ interrupts = <0 17 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip2: gpio_chip@120d2000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d2000 0x1000>; ++ interrupts = <0 18 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip3: gpio_chip@120d3000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d3000 0x1000>; ++ interrupts = <0 19 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip4: gpio_chip@120d4000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d4000 0x1000>; ++ interrupts = <0 20 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip5: gpio_chip@120d5000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d5000 0x1000>; ++ interrupts = <0 21 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip6: gpio_chip@120d6000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d6000 0x1000>; ++ interrupts = <0 22 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip7: gpio_chip@120d7000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d7000 0x1000>; ++ interrupts = <0 23 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip8: gpio_chip@120d8000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d8000 0x1000>; ++ interrupts = <0 24 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip9: gpio_chip@120d9000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120d9000 0x1000>; ++ interrupts = <0 25 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip10: gpio_chip@120da000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120da000 0x1000>; ++ interrupts = <0 26 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ gpio_chip11: gpio_chip@120db000 { ++ compatible = "arm,pl061", "arm,primecell"; ++ reg = <0x120db000 0x1000>; ++ interrupts = <0 80 4>; ++ clocks = <&clock HI3516DV300_SYSAPB_CLK>; ++ clock-names = "apb_pclk"; ++ #gpio-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ cipher: cipher@0x100c0000 { ++ compatible = "hisilicon,hisi-cipher"; ++ reg = <0x100c0000 0x10000>; ++ reg-names = "cipher"; ++ interrupts = <0 71 4>, <0 72 4>, <0 71 4>, <0 72 4>; ++ interrupt-names = "cipher", "nonsec_cipher", "hash", "nonsec_hash"; ++ }; ++ ++ }; ++ ++ hidrm { ++ compatible = "hisilicon,hi-drm"; ++ }; ++ ++ media { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "simple-bus"; ++ interrupt-parent = <&gic>; ++ ranges; ++ ++ osal: osal { ++ compatible = "hisilicon,osal"; ++ }; ++ ++ sys_config: sys_config { ++ compatible = "hisilicon,sys_config"; ++ }; ++ ++ sys: sys@12010000 { ++ compatible = "hisilicon,hisi-sys"; ++ reg = <0x12010000 0x10000>, <0x12020000 0x8000>, ++ <0x12060000 0x10000>, <0x12030000 0x8000>; ++ reg-names = "crg", "sys", "ddr", "misc"; ++ }; ++ ++ mipi: mipi@113a0000 { ++ compatible = "hisilicon,hisi-mipi"; ++ reg = <0x113a0000 0x10000>; ++ reg-names = "mipi_rx"; ++ interrupts = <0 57 4>; ++ interrupt-names = "mipi_rx"; ++ }; ++ ++ mipi_tx: mipi_tx@11270000 { ++ compatible = "hisilicon,hisi-mipi_tx"; ++ reg = <0x11270000 0x10000>; ++ reg-names = "mipi_tx"; ++ interrupts = <0 63 4>; ++ interrupt-names = "mipi_tx"; ++ }; ++ ++ vi: vi@11300000 { ++ compatible = "hisilicon,hisi-vi"; ++ reg = <0x11300000 0xa0000>, <0x11000000 0x40000>; ++ reg-names = "VI_CAP0", "VI_PROC0"; ++ interrupts = <0 56 4>, <0 44 4>; ++ interrupt-names = "VI_CAP0", "VI_PROC0"; ++ }; ++ ++ isp: isp@11020000 { ++ compatible = "hisilicon,hisi-isp"; ++ reg = <0x11020000 0x20000>; ++ reg-names = "ISP"; ++ interrupts = <0 56 4>; ++ interrupt-names = "ISP"; ++ }; ++ ++ vpss: vpss@11040000 { ++ compatible = "hisilicon,hisi-vpss"; ++ reg = <0x11040000 0x10000>; ++ reg-names = "vpss0"; ++ interrupts = <0 43 4>; ++ interrupt-names = "vpss0"; ++ }; ++ ++ vgs: vgs@11240000 { ++ compatible = "hisilicon,hisi-vgs"; ++ reg = <0x11240000 0x10000>; ++ reg-names = "vgs0"; ++ interrupts = <0 38 4>; ++ interrupt-names = "vgs0"; ++ }; ++ ++ vo: vo@11440000 { ++ compatible = "hisilicon,hisi-vo"; ++ reg = <0x11440000 0x40000>; ++ reg-names = "vo"; ++ interrupts = <0 58 4>; ++ interrupt-names = "vo"; ++ }; ++ ++ hifb: hifb@11440000 { ++ compatible = "hisilicon,hisi-hifb"; ++ reg = <0x11440000 0x40000>, <0x12020000 0x8000>; ++ reg-names = "hifb", "sys"; ++ interrupts = <0 59 4>, <0 51 4>; ++ interrupt-names = "hifb", "hifb_soft"; ++ }; ++ ++ tde: tde@11210000 { ++ compatible = "hisilicon,hisi-tde"; ++ reg = <0x11210000 0x10000>; ++ reg-names = "tde"; ++ interrupts = <0 35 4>; ++ interrupt-names = "tde_osr_isr"; ++ }; ++ ++ gyro_dis: gyro { ++ compatible = "hisilicon,hisi-gyro-dis"; ++ }; ++ ++ gdc: gdc@11110000 { ++ compatible = "hisilicon,hisi-gdc"; ++ reg = <0x11110000 0x10000>, <0x11100000 0x10000>; ++ reg-names = "gdc", "nnie0"; ++ interrupts = <0 42 4>, <0 41 4>; ++ interrupt-names = "gdc", "nnie0"; ++ }; ++ ++ gzip: gzip@11200000 { ++ compatible = "hisilicon,hisi-gzip"; ++ reg = <0x11200000 0x10000>; ++ reg-names = "gzip"; ++ interrupts = <0 34 4>; ++ interrupt-names = "gzip"; ++ }; ++ ++ jpegd: jpegd@11260000 { ++ compatible = "hisilicon,hisi-jpegd"; ++ reg = <0x11260000 0x10000>; ++ reg-names = "jpegd"; ++ interrupts = <0 45 4>; ++ interrupt-names = "jpegd"; ++ }; ++ ++ vedu: vedu@11500000 { ++ compatible = "hisilicon,hisi-vedu"; ++ reg = <0x11500000 0x10000>, <0x11220000 0x10000>; ++ reg-names = "vedu0", "jpge"; ++ interrupts = <0 40 4>, <0 36 4>; ++ interrupt-names = "vedu0","jpge"; ++ }; ++ ++ venc: venc { ++ compatible = "hisilicon,hisi-venc"; ++ }; ++ ++ scd: scd@10030000 { ++ compatible = "hisilicon,hisi-scd"; ++ reg = <0x10030000 0x10000>; ++ reg-names = "scd"; ++ interrupts = <0 67 4>; ++ interrupt-names = "scd"; ++ }; ++ ++ hdmi: hdmi@11400000 { ++ compatible = "hisilicon,hisi-hdmi"; ++ reg = <0x11400000 0x30000>; ++ reg-names = "hdmi0"; ++ }; ++ ++ aiao: aiao@113b0000 { ++ compatible = "hisilicon,hisi-aiao"; ++ reg = <0x113b0000 0x10000>,<0x113c0000 0x10000>,<0x12010000 0x10000>; ++ reg-names = "aiao","acodec","crg"; ++ interrupts = <0 55 4>; ++ interrupt-names = "AIO"; ++ }; ++ ++ nnie: nnie@11100000 { ++ compatible = "hisilicon,hisi-nnie"; ++ reg = <0x11100000 0x10000>,<0x11110000 0x10000>; ++ reg-names = "nnie0","gdc"; ++ interrupts = <0 41 4>,<0 42 4>; ++ interrupt-names = "nnie0","gdc"; ++ }; ++ ++ ive: ive@11230000 { ++ compatible = "hisilicon,hisi-ive"; ++ reg = <0x11230000 0x10000>; ++ reg-names = "ive"; ++ interrupts = <0 37 4>; ++ interrupt-names = "ive"; ++ }; ++ ++ adc: adc@120e0000 { ++ compatible = "hisilicon,hisi-lsadc"; ++ reg = <0x120e0000 0x1000>; ++ interrupts = <0 65 4>; ++ resets = <&clock 0x1bc 2>; ++ reset-names = "lsadc-crg"; ++ status = "disabled"; ++ }; ++ ir: ir@120f0000 { ++ compatible = "hisilicon,hi_ir"; ++ reg = <0x120f0000 0x1000>; ++ interrupts = <0 75 4>; ++ }; ++ ++ rtc: rtc@12080000 { ++ compatible = "hisilicon,hi35xx-rtc"; ++ reg = <0x12080000 0x1000>; ++ interrupts = <0 5 4>; ++ }; ++ ++ wdg: wdg@12050000 { ++ compatible = "hisilicon,hi_wdg"; ++ reg = <0x12050000 0x1000>; ++ }; ++ pwm0: pwm@12070000 { ++ compatible = "hisilicon,pwm"; ++ reg = <0x12070000 0x20>; ++ clocks = <&clock HI3516DV300_PWM_CLK>; ++ resets = <&clock 0x1bc 6>; ++ }; ++ pwm1: pwm@12070020 { ++ compatible = "hisilicon,pwm"; ++ reg = <0x12070020 0x20>; ++ clocks = <&clock HI3516DV300_PWM_CLK>; ++ resets = <&clock 0x1bc 6>; ++ }; ++ ++ irq: irq@120f0000 { ++ compatible = "hisilicon,hi_irq"; ++ reg = <0x11240000 0x10000>,<0x11040000 0x10000>,<0x10030000 0x10000>,<0x113b0000 0x10000>,<0x113c0000 0x10000>,<0x12010000 0x10000>,<0x11500000 0x10000>, <0x11220000 0x10000>,<0x11440000 0x40000>,<0x11300000 0xa0000>, <0x11000000 0x40000>; ++ reg-names = "vgs", "vpss0", "scd", "aiao", "acodec", "crg", "vedu0", "jpge", "vo", "VI_CAP0", "VI_PROC0"; ++ interrupts = <0 67 4>,<0 26 4>,<0 56 4>, <0 44 4>,<0 43 4>,<0 38 4>,<0 58 4>,<0 40 4>,<0 36 4>,<0 37 4>,<0 41 4>,<0 42 4>,<0 56 4>,<0 45 4>,<0 55 4>; ++ interrupt-names = "scd","new", "VI_CAP0", "VI_PROC0","vpss0","vgs0", "vo", "vedu0", "jpge", "ive", "nnie0", "gdc", "ISP", "jpegd" ,"AIO"; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/skeleton.dtsi b/arch/arm/boot/dts/skeleton.dtsi +new file mode 100644 +index 000000000..34eda68d9 +--- /dev/null ++++ b/arch/arm/boot/dts/skeleton.dtsi +@@ -0,0 +1,18 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * This file is deprecated, and will be removed once existing users have been ++ * updated. New dts{,i} files should *not* include skeleton.dtsi, and should ++ * instead explicitly provide the below nodes only as required. ++ * ++ * Skeleton device tree; the bare minimum needed to boot; just include and ++ * add a compatible value. The bootloader will typically populate the memory ++ * node. ++ */ ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ chosen { }; ++ aliases { }; ++ memory { device_type = "memory"; reg = <0 0>; }; ++}; +diff --git a/arch/arm/configs/hi3516dv300_emmc_smp_defconfig b/arch/arm/configs/hi3516dv300_emmc_smp_defconfig +new file mode 100644 +index 000000000..daeb1fa65 +--- /dev/null ++++ b/arch/arm/configs/hi3516dv300_emmc_smp_defconfig +@@ -0,0 +1,3070 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.90 Kernel Configuration ++# ++ ++# ++# Compiler: arm-himix410-linux-gcc (HC&C V1R3C00SPC200B041_20200707) 7.3.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70300 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++CONFIG_USELIB=y ++# CONFIG_AUDIT is not set ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++# CONFIG_HIGH_RES_TIMERS is not set ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++CONFIG_CPU_ISOLATION=y ++ ++# ++# RCU Subsystem ++# ++CONFIG_TREE_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++CONFIG_CGROUP_SCHED=y ++CONFIG_FAIR_GROUP_SCHED=y ++# CONFIG_CFS_BANDWIDTH is not set ++# CONFIG_RT_GROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++# CONFIG_CPUSETS is not set ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++CONFIG_IPC_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++# CONFIG_PERF_EVENTS is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++# CONFIG_PROFILING is not set ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++CONFIG_ARCH_HISI_BVT=y ++ ++# ++# Hisilicon BVT platform type ++# ++# CONFIG_ARCH_HI3521DV200 is not set ++# CONFIG_ARCH_HI3520DV500 is not set ++# CONFIG_ARCH_HI3516A is not set ++# CONFIG_ARCH_HI3516CV500 is not set ++CONFIG_ARCH_HI3516DV300=y ++# CONFIG_ARCH_HI3516EV200 is not set ++# CONFIG_ARCH_HI3516EV300 is not set ++# CONFIG_ARCH_HI3518EV300 is not set ++# CONFIG_ARCH_HI3516DV200 is not set ++# CONFIG_ARCH_HI3556V200 is not set ++# CONFIG_ARCH_HI3559V200 is not set ++# CONFIG_ARCH_HI3536DV100 is not set ++# CONFIG_ARCH_HI3521A is not set ++# CONFIG_ARCH_HI3531A is not set ++# CONFIG_ARCH_HI3556AV100 is not set ++# CONFIG_ARCH_HI3519AV100 is not set ++# CONFIG_ARCH_HI3568V100 is not set ++# CONFIG_ARCH_HISI_BVT_AMP is not set ++# CONFIG_HISI_MC is not set ++CONFIG_HI_ZRELADDR=0x80008000 ++CONFIG_HI_PARAMS_PHYS=0x00000100 ++CONFIG_HI_INITRD_PHYS=0x00800000 ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++# CONFIG_ARM_ERRATA_643719 is not set ++# CONFIG_ARM_ERRATA_720789 is not set ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++# CONFIG_MCPM is not set ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=2 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++CONFIG_HZ_100=y ++# CONFIG_HZ_200 is not set ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++# CONFIG_ARM_MODULE_PLTS is not set ++CONFIG_FORCE_MAX_ZONEORDER=11 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++# CONFIG_SECCOMP is not set ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_ARM_APPENDED_DTB=y ++CONFIG_ARM_ATAG_DTB_COMPAT=y ++CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set ++CONFIG_CMDLINE="" ++# CONFIG_KEXEC is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++# CONFIG_FPE_NWFPE is not set ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++# CONFIG_PM_AUTOSLEEP is not set ++# CONFIG_PM_WAKELOCKS is not set ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_PM_CLK=y ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_CPU_PM=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++# CONFIG_FW_CFG_SYSFS is not set ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++CONFIG_MODULE_FORCE_LOAD=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_FORCE_UNLOAD=y ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++CONFIG_BLK_DEV_BSG=y ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++# CONFIG_BLK_DEBUG_FS is not set ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_IOSCHED_CFQ=y ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y ++CONFIG_INLINE_READ_UNLOCK=y ++CONFIG_INLINE_READ_UNLOCK_IRQ=y ++CONFIG_INLINE_WRITE_UNLOCK=y ++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_FREEZER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++CONFIG_CMA=y ++CONFIG_CMA_DEBUG=y ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++CONFIG_FRAME_VECTOR=y ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_INTERFACE is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++CONFIG_IPV6=y ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET6_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET6_XFRM_MODE_BEET is not set ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++# CONFIG_IPV6_SIT is not set ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_IPV6_SEG6_LWTUNNEL is not set ++# CONFIG_IPV6_SEG6_HMAC is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++CONFIG_VLAN_8021Q=y ++# CONFIG_VLAN_8021Q_GVRP is not set ++# CONFIG_VLAN_8021Q_MVRP is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_6LOWPAN is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++CONFIG_WIRELESS=y ++# CONFIG_CFG80211 is not set ++ ++# ++# CFG80211 needs to be enabled for MAC80211 ++# ++CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++CONFIG_ARM_AMBA=y ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=16 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_SIMPLE_PM_BUS is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++# CONFIG_MTD is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_NULL_BLK is not set ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=65536 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_MQ_DEFAULT is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++CONFIG_NET_VENDOR_ALACRITECH=y ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++CONFIG_NET_VENDOR_AQUANTIA=y ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++CONFIG_NET_VENDOR_CADENCE=y ++# CONFIG_MACB is not set ++CONFIG_NET_VENDOR_CAVIUM=y ++# CONFIG_NET_VENDOR_CIRRUS is not set ++CONFIG_NET_VENDOR_CORTINA=y ++# CONFIG_GEMINI_ETHERNET is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++CONFIG_NET_VENDOR_HISILICON=y ++# CONFIG_HIX5HD2_GMAC is not set ++CONFIG_HISI_FEMAC=y ++# CONFIG_HIP04_ETH is not set ++# CONFIG_HNS is not set ++# CONFIG_HNS_DSAF is not set ++# CONFIG_HNS_ENET is not set ++# CONFIG_HIETH_GMAC is not set ++CONFIG_NET_VENDOR_HUAWEI=y ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++CONFIG_NET_VENDOR_MELLANOX=y ++# CONFIG_MLXSW_CORE is not set ++# CONFIG_MLXFW is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++CONFIG_NET_VENDOR_MICROSEMI=y ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++CONFIG_NET_VENDOR_NI=y ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++CONFIG_NET_VENDOR_SOLARFLARE=y ++# CONFIG_NET_VENDOR_SMSC is not set ++CONFIG_NET_VENDOR_SOCIONEXT=y ++# CONFIG_NET_VENDOR_STMICRO is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++CONFIG_MDIO_HISI_FEMAC=y ++# CONFIG_MDIO_HISI_GEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_REALTEK_PHY is not set ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++CONFIG_USB_RTL8152=y ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++CONFIG_WLAN=y ++CONFIG_WLAN_VENDOR_ADMTEK=y ++CONFIG_WLAN_VENDOR_ATH=y ++# CONFIG_ATH_DEBUG is not set ++CONFIG_WLAN_VENDOR_ATMEL=y ++CONFIG_WLAN_VENDOR_BROADCOM=y ++CONFIG_WLAN_VENDOR_CISCO=y ++CONFIG_WLAN_VENDOR_INTEL=y ++CONFIG_WLAN_VENDOR_INTERSIL=y ++# CONFIG_HOSTAP is not set ++CONFIG_WLAN_VENDOR_MARVELL=y ++CONFIG_WLAN_VENDOR_MEDIATEK=y ++CONFIG_WLAN_VENDOR_RALINK=y ++CONFIG_WLAN_VENDOR_REALTEK=y ++CONFIG_WLAN_VENDOR_RSI=y ++CONFIG_WLAN_VENDOR_ST=y ++CONFIG_WLAN_VENDOR_TI=y ++CONFIG_WLAN_VENDOR_ZYDAS=y ++CONFIG_WLAN_VENDOR_QUANTENNA=y ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++CONFIG_INPUT_FF_MEMLESS=y ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++CONFIG_INPUT_JOYDEV=y ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++CONFIG_INPUT_JOYSTICK=y ++# CONFIG_JOYSTICK_ANALOG is not set ++# CONFIG_JOYSTICK_A3D is not set ++# CONFIG_JOYSTICK_ADI is not set ++# CONFIG_JOYSTICK_COBRA is not set ++# CONFIG_JOYSTICK_GF2K is not set ++# CONFIG_JOYSTICK_GRIP is not set ++# CONFIG_JOYSTICK_GRIP_MP is not set ++# CONFIG_JOYSTICK_GUILLEMOT is not set ++# CONFIG_JOYSTICK_INTERACT is not set ++# CONFIG_JOYSTICK_SIDEWINDER is not set ++# CONFIG_JOYSTICK_TMDC is not set ++# CONFIG_JOYSTICK_IFORCE is not set ++# CONFIG_JOYSTICK_WARRIOR is not set ++# CONFIG_JOYSTICK_MAGELLAN is not set ++# CONFIG_JOYSTICK_SPACEORB is not set ++# CONFIG_JOYSTICK_SPACEBALL is not set ++# CONFIG_JOYSTICK_STINGER is not set ++# CONFIG_JOYSTICK_TWIDJOY is not set ++# CONFIG_JOYSTICK_ZHENHUA is not set ++# CONFIG_JOYSTICK_AS5011 is not set ++# CONFIG_JOYSTICK_JOYDUMP is not set ++CONFIG_JOYSTICK_XPAD=y ++CONFIG_JOYSTICK_XPAD_FF=y ++# CONFIG_JOYSTICK_PSXPAD_SPI is not set ++# CONFIG_JOYSTICK_PXRC is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++# CONFIG_SERIO_AMBAKMI is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++CONFIG_DEVKMEM=y ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_AMBA_PL010 is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++# CONFIG_I2C_COMPAT is not set ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++# CONFIG_I2C_HELPER_AUTO is not set ++# CONFIG_I2C_SMBUS is not set ++ ++# ++# I2C Algorithms ++# ++# CONFIG_I2C_ALGOBIT is not set ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++# CONFIG_I2C_DESIGNWARE_PLATFORM is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++CONFIG_I2C_HIBVT=y ++# CONFIG_I2C_NOMADIK is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++CONFIG_DMA_MSG_MIN_LEN=5 ++CONFIG_DMA_MSG_MAX_LEN=4090 ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++# CONFIG_SPI_MEM is not set ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++# CONFIG_SPI_DESIGNWARE is not set ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++CONFIG_SPI_PL022=y ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++CONFIG_SPI_SPIDEV=y ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++# CONFIG_PPS is not set ++ ++# ++# PTP clock support ++# ++# CONFIG_PTP_1588_CLOCK is not set ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++# CONFIG_PINCTRL_SINGLE is not set ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++CONFIG_GPIOLIB_IRQCHIP=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++# CONFIG_GPIO_DWAPB is not set ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++CONFIG_GPIO_PL061=y ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++CONFIG_POWER_RESET=y ++# CONFIG_POWER_RESET_BRCMKONA is not set ++# CONFIG_POWER_RESET_BRCMSTB is not set ++# CONFIG_POWER_RESET_GPIO is not set ++# CONFIG_POWER_RESET_GPIO_RESTART is not set ++CONFIG_POWER_RESET_HISI=y ++# CONFIG_POWER_RESET_LTC2952 is not set ++# CONFIG_POWER_RESET_RESTART is not set ++# CONFIG_POWER_RESET_VERSATILE is not set ++CONFIG_POWER_RESET_SYSCON=y ++# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set ++# CONFIG_SYSCON_REBOOT_MODE is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++# CONFIG_THERMAL is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++CONFIG_MFD_CORE=y ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++CONFIG_MFD_HISI_FMC=y ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++CONFIG_MEDIA_SUPPORT=y ++ ++# ++# Multimedia core support ++# ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set ++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set ++# CONFIG_MEDIA_RADIO_SUPPORT is not set ++# CONFIG_MEDIA_SDR_SUPPORT is not set ++# CONFIG_MEDIA_CEC_SUPPORT is not set ++# CONFIG_MEDIA_CONTROLLER is not set ++CONFIG_VIDEO_DEV=y ++CONFIG_VIDEO_V4L2=y ++# CONFIG_VIDEO_ADV_DEBUG is not set ++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++ ++# ++# Media drivers ++# ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=y ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++CONFIG_USB_GSPCA=m ++# CONFIG_USB_M5602 is not set ++# CONFIG_USB_STV06XX is not set ++# CONFIG_USB_GL860 is not set ++# CONFIG_USB_GSPCA_BENQ is not set ++# CONFIG_USB_GSPCA_CONEX is not set ++# CONFIG_USB_GSPCA_CPIA1 is not set ++# CONFIG_USB_GSPCA_DTCS033 is not set ++# CONFIG_USB_GSPCA_ETOMS is not set ++# CONFIG_USB_GSPCA_FINEPIX is not set ++# CONFIG_USB_GSPCA_JEILINJ is not set ++# CONFIG_USB_GSPCA_JL2005BCD is not set ++# CONFIG_USB_GSPCA_KINECT is not set ++# CONFIG_USB_GSPCA_KONICA is not set ++# CONFIG_USB_GSPCA_MARS is not set ++# CONFIG_USB_GSPCA_MR97310A is not set ++# CONFIG_USB_GSPCA_NW80X is not set ++# CONFIG_USB_GSPCA_OV519 is not set ++# CONFIG_USB_GSPCA_OV534 is not set ++# CONFIG_USB_GSPCA_OV534_9 is not set ++# CONFIG_USB_GSPCA_PAC207 is not set ++# CONFIG_USB_GSPCA_PAC7302 is not set ++# CONFIG_USB_GSPCA_PAC7311 is not set ++# CONFIG_USB_GSPCA_SE401 is not set ++# CONFIG_USB_GSPCA_SN9C2028 is not set ++# CONFIG_USB_GSPCA_SN9C20X is not set ++# CONFIG_USB_GSPCA_SONIXB is not set ++# CONFIG_USB_GSPCA_SONIXJ is not set ++# CONFIG_USB_GSPCA_SPCA500 is not set ++# CONFIG_USB_GSPCA_SPCA501 is not set ++# CONFIG_USB_GSPCA_SPCA505 is not set ++# CONFIG_USB_GSPCA_SPCA506 is not set ++# CONFIG_USB_GSPCA_SPCA508 is not set ++# CONFIG_USB_GSPCA_SPCA561 is not set ++# CONFIG_USB_GSPCA_SPCA1528 is not set ++# CONFIG_USB_GSPCA_SQ905 is not set ++# CONFIG_USB_GSPCA_SQ905C is not set ++# CONFIG_USB_GSPCA_SQ930X is not set ++# CONFIG_USB_GSPCA_STK014 is not set ++# CONFIG_USB_GSPCA_STK1135 is not set ++# CONFIG_USB_GSPCA_STV0680 is not set ++# CONFIG_USB_GSPCA_SUNPLUS is not set ++# CONFIG_USB_GSPCA_T613 is not set ++# CONFIG_USB_GSPCA_TOPRO is not set ++# CONFIG_USB_GSPCA_TOUPTEK is not set ++# CONFIG_USB_GSPCA_TV8532 is not set ++# CONFIG_USB_GSPCA_VC032X is not set ++# CONFIG_USB_GSPCA_VICAM is not set ++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set ++# CONFIG_USB_GSPCA_ZC3XX is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_VIDEO_USBTV is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set ++# CONFIG_V4L_PLATFORM_DRIVERS is not set ++# CONFIG_V4L_MEM2MEM_DRIVERS is not set ++# CONFIG_V4L_TEST_DRIVERS is not set ++ ++# ++# Supported MMC/SDIO adapters ++# ++# CONFIG_CYPRESS_FIRMWARE is not set ++CONFIG_VIDEOBUF2_CORE=y ++CONFIG_VIDEOBUF2_V4L2=y ++CONFIG_VIDEOBUF2_MEMOPS=y ++CONFIG_VIDEOBUF2_VMALLOC=y ++ ++# ++# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) ++# ++CONFIG_MEDIA_SUBDRV_AUTOSELECT=y ++ ++# ++# Audio decoders, processors and mixers ++# ++ ++# ++# RDS decoders ++# ++ ++# ++# Video decoders ++# ++ ++# ++# Video and audio decoders ++# ++ ++# ++# Video encoders ++# ++ ++# ++# Camera sensor devices ++# ++ ++# ++# Flash devices ++# ++ ++# ++# Video improvement chips ++# ++ ++# ++# Audio/Video compression chips ++# ++ ++# ++# SDR tuner chips ++# ++ ++# ++# Miscellaneous helper chips ++# ++ ++# ++# Sensors used on soc_camera driver ++# ++ ++# ++# Media SPI Adapters ++# ++ ++# ++# Tools to develop new frontends ++# ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++# CONFIG_DRM is not set ++# CONFIG_DRM_DP_CEC is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_ARMCLCD is not set ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++# CONFIG_FRAMEBUFFER_CONSOLE is not set ++# CONFIG_LOGO is not set ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++# CONFIG_SND_ARMAACI is not set ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++# CONFIG_SND_SOC is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++# CONFIG_HID_DRAGONRISE is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++# CONFIG_HID_GYRATION is not set ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++# CONFIG_HID_TWINHAN is not set ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++# CONFIG_HID_PANTHERLORD is not set ++# CONFIG_HID_PENMOUNT is not set ++# CONFIG_HID_PETALYNX is not set ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++# CONFIG_HID_SAMSUNG is not set ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++# CONFIG_HID_SUNPLUS is not set ++# CONFIG_HID_RMI is not set ++# CONFIG_HID_GREENASIA is not set ++# CONFIG_HID_SMARTJOYPLUS is not set ++# CONFIG_HID_TIVO is not set ++# CONFIG_HID_TOPSEED is not set ++# CONFIG_HID_THRUSTMASTER is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++# CONFIG_HID_ZEROPLUS is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++# CONFIG_USB_XHCI_DBGCAP is not set ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++# CONFIG_USB_ACM is not set ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++# CONFIG_USB_UAS is not set ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_HOST is not set ++CONFIG_USB_DWC3_GADGET=y ++ ++# ++# Platform Glue Driver Support ++# ++# CONFIG_USB_DWC3_OF_SIMPLE is not set ++# CONFIG_USB_DWC2 is not set ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++# CONFIG_USB_SERIAL is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_U_AUDIO=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_F_UAC1=y ++CONFIG_USB_F_UVC=y ++CONFIG_USB_CONFIGFS=y ++# CONFIG_USB_CONFIGFS_SERIAL is not set ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++# CONFIG_USB_CONFIGFS_F_LB_SS is not set ++# CONFIG_USB_CONFIGFS_F_FS is not set ++CONFIG_USB_CONFIGFS_F_UAC1=y ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++CONFIG_USB_CONFIGFS_F_UVC=y ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++# CONFIG_TYPEC is not set ++# CONFIG_USB_ROLE_SWITCH is not set ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_ARMMMCI is not set ++# CONFIG_MMC_SDHCI is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_CQ_HCI is not set ++CONFIG_HIMCI=y ++CONFIG_SEND_AUTO_STOP=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++CONFIG_RTC_DRV_HIBVT=y ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_PL030 is not set ++# CONFIG_RTC_DRV_PL031 is not set ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++# CONFIG_DMADEVICES is not set ++ ++# ++# DMABUF options ++# ++# CONFIG_SYNC_FILE is not set ++# CONFIG_AUXDISPLAY is not set ++# CONFIG_UIO is not set ++# CONFIG_VIRT_DRIVERS is not set ++CONFIG_VIRTIO_MENU=y ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_HI3516DV300=y ++CONFIG_RESET_HISI=y ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set ++CONFIG_ARM_TIMER_SP804=y ++# CONFIG_TIMER_HISP804 is not set ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++# CONFIG_PWM is not set ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++CONFIG_GENERIC_PHY=y ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++CONFIG_HI_USB_PHY=y ++CONFIG_PHY_HISI_USB2=y ++CONFIG_HIBVT_USB_PHY=y ++CONFIG_USB_MODE_OPTION=y ++CONFIG_USB_DRD0_IN_HOST=y ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++# CONFIG_RAS is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++# CONFIG_HI_DMAC is not set ++# CONFIG_HIEDMAC is not set ++ ++# ++# Hisilicon driver support ++# ++# CONFIG_CMA_MEM_SHARED is not set ++# CONFIG_CMA_ADVANCE_SHARE is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++# CONFIG_EXT2_FS is not set ++# CONFIG_EXT3_FS is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_USE_FOR_EXT2=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_CHECK=y ++CONFIG_REISERFS_PROC_INFO=y ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_DEBUG=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++# CONFIG_XFS_ONLINE_SCRUB is not set ++# CONFIG_XFS_WARN is not set ++# CONFIG_XFS_DEBUG is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTA_NETLINK_INTERFACE is not set ++CONFIG_QUOTACTL=y ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_SQUASHFS is not set ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++# CONFIG_PSTORE is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++# CONFIG_ROOT_NFS is not set ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_ACL_SUPPORT=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=y ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++CONFIG_NLS_UTF8=y ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_LZO is not set ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++CONFIG_CRYPTO_HW=y ++# CONFIG_CRYPTO_DEV_CCREE is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++CONFIG_LIBCRC32C=m ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT_MAP=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++ ++# ++# Compile-time checks and compiler options ++# ++# CONFIG_DEBUG_INFO is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_MAGIC_SYSRQ is not set ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_WQ_WATCHDOG is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++CONFIG_PANIC_TIMEOUT=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=60 ++# CONFIG_RCU_TRACE is not set ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++CONFIG_STRICT_DEVMEM=y ++# CONFIG_IO_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++# CONFIG_DEBUG_USER is not set ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/configs/hi3516dv300_emmc_smp_hos_l2_defconfig b/arch/arm/configs/hi3516dv300_emmc_smp_hos_l2_defconfig +new file mode 100644 +index 000000000..364f69865 +--- /dev/null ++++ b/arch/arm/configs/hi3516dv300_emmc_smp_hos_l2_defconfig +@@ -0,0 +1,3135 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.41 Kernel Configuration ++# ++ ++# ++# Compiler: arm-himix400-linux-gcc (HC&C V1R3C00SPC200B041_20200707) 7.3.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70300 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++CONFIG_USELIB=y ++CONFIG_AUDIT=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++#HDF ++CONFIG_DRIVERS_HDF=y ++CONFIG_DRIVERS_HDF_PLATFORM=y ++CONFIG_DRIVERS_HDF_PLATFORM_MIPI_DSI=y ++CONFIG_DRIVERS_HDF_PLATFORM_MIPI_CSI=y ++CONFIG_DRIVERS_HDF_PLATFORM_GPIO=y ++CONFIG_DRIVERS_HDF_PLATFORM_I2C=y ++CONFIG_DRIVERS_HDF_PLATFORM_WATCHDOG=y ++CONFIG_DRIVERS_HDF_PLATFORM_PWM=y ++CONFIG_DRIVERS_HDF_PLATFORM_UART=y ++CONFIG_DRIVERS_HDF_PLATFORM_SPI=y ++CONFIG_DRIVERS_HDF_PLATFORM_RTC=y ++CONFIG_DRIVERS_HDF_DISP=y ++# CONFIG_DRIVERS_HDF_LCD_ST7789 is not set ++CONFIG_DRIVERS_HDF_LCD_ICN9700=y ++CONFIG_DRIVERS_HDF_INPUT=y ++CONFIG_DRIVERS_HDF_TP_5P5_GT911=y ++CONFIG_DRIVERS_HDF_TP_2P35_FT6236=y ++CONFIG_DRIVERS_HDF_WIFI=y ++CONFIG_DRIVERS_HI3881=y ++CONFIG_DRIVERS_HDF_USB_PNP_NOTIFY=y ++CONFIG_DRIVERS_HDF_SENSOR=y ++# CONFIG_DRIVERS_HDF_SENSOR_ACCEL is not set ++# CONFIG_DRIVERS_HDF_SENSOR_GYRO is not set ++CONFIG_DRIVERS_HDF_TEST=y ++CONFIG_DRIVERS_HDF_USB_F_GENERIC=y ++CONFIG_DRIVERS_HDF_USB_PNP_NOTIFY=y ++# ++# Timers subsystem ++# ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++# CONFIG_HIGH_RES_TIMERS is not set ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++CONFIG_CPU_ISOLATION=y ++ ++# ++# RCU Subsystem ++# ++CONFIG_TREE_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++CONFIG_CGROUP_SCHED=y ++CONFIG_FAIR_GROUP_SCHED=y ++# CONFIG_CFS_BANDWIDTH is not set ++# CONFIG_RT_GROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++# CONFIG_CPUSETS is not set ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++CONFIG_IPC_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++# CONFIG_PERF_EVENTS is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++# CONFIG_PROFILING is not set ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++CONFIG_ARCH_HISI_BVT=y ++ ++# ++# Hisilicon BVT platform type ++# ++# CONFIG_ARCH_HI3521DV200 is not set ++# CONFIG_ARCH_HI3520DV500 is not set ++# CONFIG_ARCH_HI3516A is not set ++# CONFIG_ARCH_HI3516CV500 is not set ++CONFIG_ARCH_HI3516DV300=y ++# CONFIG_ARCH_HI3516EV200 is not set ++# CONFIG_ARCH_HI3516EV300 is not set ++# CONFIG_ARCH_HI3518EV300 is not set ++# CONFIG_ARCH_HI3516DV200 is not set ++# CONFIG_ARCH_HI3556V200 is not set ++# CONFIG_ARCH_HI3559V200 is not set ++# CONFIG_ARCH_HI3536DV100 is not set ++# CONFIG_ARCH_HI3521A is not set ++# CONFIG_ARCH_HI3531A is not set ++# CONFIG_ARCH_HI3556AV100 is not set ++# CONFIG_ARCH_HI3519AV100 is not set ++# CONFIG_ARCH_HI3568V100 is not set ++# CONFIG_ARCH_HISI_BVT_AMP is not set ++# CONFIG_HISI_MC is not set ++CONFIG_HI_ZRELADDR=0x80008000 ++CONFIG_HI_PARAMS_PHYS=0x00000100 ++CONFIG_HI_INITRD_PHYS=0x00800000 ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++# CONFIG_ARM_ERRATA_643719 is not set ++# CONFIG_ARM_ERRATA_720789 is not set ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++# CONFIG_MCPM is not set ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=2 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++CONFIG_HZ_100=y ++# CONFIG_HZ_200 is not set ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++# CONFIG_ARM_MODULE_PLTS is not set ++CONFIG_FORCE_MAX_ZONEORDER=11 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++# CONFIG_SECCOMP is not set ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_ARM_APPENDED_DTB=y ++CONFIG_ARM_ATAG_DTB_COMPAT=y ++CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set ++CONFIG_CMDLINE="" ++# CONFIG_KEXEC is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++# CONFIG_FPE_NWFPE is not set ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++# CONFIG_PM_AUTOSLEEP is not set ++CONFIG_PM_WAKELOCKS=y ++CONFIG_PM_WAKELOCKS_GC=y ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_PM_CLK=y ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_CPU_PM=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++# CONFIG_FW_CFG_SYSFS is not set ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++CONFIG_MODULE_FORCE_LOAD=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_FORCE_UNLOAD=y ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++CONFIG_BLK_DEV_BSG=y ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++# CONFIG_BLK_DEBUG_FS is not set ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y ++CONFIG_INLINE_READ_UNLOCK=y ++CONFIG_INLINE_READ_UNLOCK_IRQ=y ++CONFIG_INLINE_WRITE_UNLOCK=y ++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_FREEZER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++CONFIG_CMA=y ++CONFIG_CMA_DEBUG=y ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++CONFIG_FRAME_VECTOR=y ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_INTERFACE is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++CONFIG_IPV6=y ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET6_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET6_XFRM_MODE_BEET is not set ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++# CONFIG_IPV6_SIT is not set ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_IPV6_SEG6_LWTUNNEL is not set ++# CONFIG_IPV6_SEG6_HMAC is not set ++# CONFIG_NETLABEL is not set ++CONFIG_NETWORK_SECMARK=y ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++CONFIG_VLAN_8021Q=y ++# CONFIG_VLAN_8021Q_GVRP is not set ++# CONFIG_VLAN_8021Q_MVRP is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_6LOWPAN is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++CONFIG_WIRELESS=y ++# CONFIG_CFG80211 is not set ++ ++# ++# CFG80211 needs to be enabled for MAC80211 ++# ++CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++CONFIG_ARM_AMBA=y ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=64 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_SIMPLE_PM_BUS is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++# CONFIG_MTD is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_NULL_BLK is not set ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=65536 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_MQ_DEFAULT is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++CONFIG_NET_VENDOR_ALACRITECH=y ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++CONFIG_NET_VENDOR_AQUANTIA=y ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++CONFIG_NET_VENDOR_CADENCE=y ++# CONFIG_MACB is not set ++CONFIG_NET_VENDOR_CAVIUM=y ++# CONFIG_NET_VENDOR_CIRRUS is not set ++CONFIG_NET_VENDOR_CORTINA=y ++# CONFIG_GEMINI_ETHERNET is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++CONFIG_NET_VENDOR_HISILICON=y ++# CONFIG_HIX5HD2_GMAC is not set ++CONFIG_HISI_FEMAC=y ++# CONFIG_HIP04_ETH is not set ++# CONFIG_HNS is not set ++# CONFIG_HNS_DSAF is not set ++# CONFIG_HNS_ENET is not set ++# CONFIG_HIETH_GMAC is not set ++CONFIG_NET_VENDOR_HUAWEI=y ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++CONFIG_NET_VENDOR_MELLANOX=y ++# CONFIG_MLXSW_CORE is not set ++# CONFIG_MLXFW is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++CONFIG_NET_VENDOR_MICROSEMI=y ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++CONFIG_NET_VENDOR_NI=y ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++CONFIG_NET_VENDOR_SOLARFLARE=y ++# CONFIG_NET_VENDOR_SMSC is not set ++CONFIG_NET_VENDOR_SOCIONEXT=y ++# CONFIG_NET_VENDOR_STMICRO is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++CONFIG_MDIO_HISI_FEMAC=y ++# CONFIG_MDIO_HISI_GEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_ASIX_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_REALTEK_PHY is not set ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++CONFIG_USB_RTL8152=y ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++CONFIG_WLAN=y ++CONFIG_WLAN_VENDOR_ADMTEK=y ++CONFIG_WLAN_VENDOR_ATH=y ++# CONFIG_ATH_DEBUG is not set ++CONFIG_WLAN_VENDOR_ATMEL=y ++CONFIG_WLAN_VENDOR_BROADCOM=y ++CONFIG_WLAN_VENDOR_CISCO=y ++CONFIG_WLAN_VENDOR_INTEL=y ++CONFIG_WLAN_VENDOR_INTERSIL=y ++# CONFIG_HOSTAP is not set ++CONFIG_WLAN_VENDOR_MARVELL=y ++CONFIG_WLAN_VENDOR_MEDIATEK=y ++CONFIG_WLAN_VENDOR_RALINK=y ++CONFIG_WLAN_VENDOR_REALTEK=y ++CONFIG_WLAN_VENDOR_RSI=y ++CONFIG_WLAN_VENDOR_ST=y ++CONFIG_WLAN_VENDOR_TI=y ++CONFIG_WLAN_VENDOR_ZYDAS=y ++CONFIG_WLAN_VENDOR_QUANTENNA=y ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++CONFIG_INPUT_FF_MEMLESS=y ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++CONFIG_INPUT_JOYDEV=y ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++CONFIG_INPUT_JOYSTICK=y ++# CONFIG_JOYSTICK_ANALOG is not set ++# CONFIG_JOYSTICK_A3D is not set ++# CONFIG_JOYSTICK_ADI is not set ++# CONFIG_JOYSTICK_COBRA is not set ++# CONFIG_JOYSTICK_GF2K is not set ++# CONFIG_JOYSTICK_GRIP is not set ++# CONFIG_JOYSTICK_GRIP_MP is not set ++# CONFIG_JOYSTICK_GUILLEMOT is not set ++# CONFIG_JOYSTICK_INTERACT is not set ++# CONFIG_JOYSTICK_SIDEWINDER is not set ++# CONFIG_JOYSTICK_TMDC is not set ++# CONFIG_JOYSTICK_IFORCE is not set ++# CONFIG_JOYSTICK_WARRIOR is not set ++# CONFIG_JOYSTICK_MAGELLAN is not set ++# CONFIG_JOYSTICK_SPACEORB is not set ++# CONFIG_JOYSTICK_SPACEBALL is not set ++# CONFIG_JOYSTICK_STINGER is not set ++# CONFIG_JOYSTICK_TWIDJOY is not set ++# CONFIG_JOYSTICK_ZHENHUA is not set ++# CONFIG_JOYSTICK_AS5011 is not set ++# CONFIG_JOYSTICK_JOYDUMP is not set ++CONFIG_JOYSTICK_XPAD=y ++CONFIG_JOYSTICK_XPAD_FF=y ++# CONFIG_JOYSTICK_PSXPAD_SPI is not set ++# CONFIG_JOYSTICK_PXRC is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++CONFIG_INPUT_MISC=y ++# CONFIG_RMI4_CORE is not set ++CONFIG_INPUT_UINPUT=y ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++# CONFIG_SERIO_AMBAKMI is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++CONFIG_DEVKMEM=y ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_AMBA_PL010 is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++# CONFIG_I2C_COMPAT is not set ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++# CONFIG_I2C_HELPER_AUTO is not set ++# CONFIG_I2C_SMBUS is not set ++ ++# ++# I2C Algorithms ++# ++CONFIG_I2C_ALGOBIT=y ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++# CONFIG_I2C_DESIGNWARE_PLATFORM is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++CONFIG_I2C_HIBVT=y ++# CONFIG_I2C_NOMADIK is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++CONFIG_DMA_MSG_MIN_LEN=5 ++CONFIG_DMA_MSG_MAX_LEN=4090 ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++# CONFIG_SPI_MEM is not set ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++# CONFIG_SPI_DESIGNWARE is not set ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++CONFIG_SPI_PL022=y ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++CONFIG_SPI_SPIDEV=y ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++# CONFIG_PPS is not set ++ ++# ++# PTP clock support ++# ++# CONFIG_PTP_1588_CLOCK is not set ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++# CONFIG_PINCTRL_SINGLE is not set ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++CONFIG_GPIOLIB_IRQCHIP=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++# CONFIG_GPIO_DWAPB is not set ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++CONFIG_GPIO_PL061=y ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++CONFIG_POWER_RESET=y ++# CONFIG_POWER_RESET_BRCMKONA is not set ++# CONFIG_POWER_RESET_BRCMSTB is not set ++# CONFIG_POWER_RESET_GPIO is not set ++# CONFIG_POWER_RESET_GPIO_RESTART is not set ++CONFIG_POWER_RESET_HISI=y ++# CONFIG_POWER_RESET_LTC2952 is not set ++# CONFIG_POWER_RESET_RESTART is not set ++# CONFIG_POWER_RESET_VERSATILE is not set ++CONFIG_POWER_RESET_SYSCON=y ++# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set ++# CONFIG_SYSCON_REBOOT_MODE is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++# CONFIG_THERMAL is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++CONFIG_MFD_CORE=y ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++CONFIG_MFD_HISI_FMC=y ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++CONFIG_MEDIA_SUPPORT=y ++ ++# ++# Multimedia core support ++# ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set ++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set ++# CONFIG_MEDIA_RADIO_SUPPORT is not set ++# CONFIG_MEDIA_SDR_SUPPORT is not set ++# CONFIG_MEDIA_CEC_SUPPORT is not set ++# CONFIG_MEDIA_CONTROLLER is not set ++CONFIG_VIDEO_DEV=y ++CONFIG_VIDEO_V4L2=y ++# CONFIG_VIDEO_ADV_DEBUG is not set ++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++ ++# ++# Media drivers ++# ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=y ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++CONFIG_USB_GSPCA=m ++# CONFIG_USB_M5602 is not set ++# CONFIG_USB_STV06XX is not set ++# CONFIG_USB_GL860 is not set ++# CONFIG_USB_GSPCA_BENQ is not set ++# CONFIG_USB_GSPCA_CONEX is not set ++# CONFIG_USB_GSPCA_CPIA1 is not set ++# CONFIG_USB_GSPCA_DTCS033 is not set ++# CONFIG_USB_GSPCA_ETOMS is not set ++# CONFIG_USB_GSPCA_FINEPIX is not set ++# CONFIG_USB_GSPCA_JEILINJ is not set ++# CONFIG_USB_GSPCA_JL2005BCD is not set ++# CONFIG_USB_GSPCA_KINECT is not set ++# CONFIG_USB_GSPCA_KONICA is not set ++# CONFIG_USB_GSPCA_MARS is not set ++# CONFIG_USB_GSPCA_MR97310A is not set ++# CONFIG_USB_GSPCA_NW80X is not set ++# CONFIG_USB_GSPCA_OV519 is not set ++# CONFIG_USB_GSPCA_OV534 is not set ++# CONFIG_USB_GSPCA_OV534_9 is not set ++# CONFIG_USB_GSPCA_PAC207 is not set ++# CONFIG_USB_GSPCA_PAC7302 is not set ++# CONFIG_USB_GSPCA_PAC7311 is not set ++# CONFIG_USB_GSPCA_SE401 is not set ++# CONFIG_USB_GSPCA_SN9C2028 is not set ++# CONFIG_USB_GSPCA_SN9C20X is not set ++# CONFIG_USB_GSPCA_SONIXB is not set ++# CONFIG_USB_GSPCA_SONIXJ is not set ++# CONFIG_USB_GSPCA_SPCA500 is not set ++# CONFIG_USB_GSPCA_SPCA501 is not set ++# CONFIG_USB_GSPCA_SPCA505 is not set ++# CONFIG_USB_GSPCA_SPCA506 is not set ++# CONFIG_USB_GSPCA_SPCA508 is not set ++# CONFIG_USB_GSPCA_SPCA561 is not set ++# CONFIG_USB_GSPCA_SPCA1528 is not set ++# CONFIG_USB_GSPCA_SQ905 is not set ++# CONFIG_USB_GSPCA_SQ905C is not set ++# CONFIG_USB_GSPCA_SQ930X is not set ++# CONFIG_USB_GSPCA_STK014 is not set ++# CONFIG_USB_GSPCA_STK1135 is not set ++# CONFIG_USB_GSPCA_STV0680 is not set ++# CONFIG_USB_GSPCA_SUNPLUS is not set ++# CONFIG_USB_GSPCA_T613 is not set ++# CONFIG_USB_GSPCA_TOPRO is not set ++# CONFIG_USB_GSPCA_TOUPTEK is not set ++# CONFIG_USB_GSPCA_TV8532 is not set ++# CONFIG_USB_GSPCA_VC032X is not set ++# CONFIG_USB_GSPCA_VICAM is not set ++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set ++# CONFIG_USB_GSPCA_ZC3XX is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_VIDEO_USBTV is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set ++# CONFIG_V4L_PLATFORM_DRIVERS is not set ++# CONFIG_V4L_MEM2MEM_DRIVERS is not set ++# CONFIG_V4L_TEST_DRIVERS is not set ++ ++# ++# Supported MMC/SDIO adapters ++# ++# CONFIG_CYPRESS_FIRMWARE is not set ++CONFIG_VIDEOBUF2_CORE=y ++CONFIG_VIDEOBUF2_V4L2=y ++CONFIG_VIDEOBUF2_MEMOPS=y ++CONFIG_VIDEOBUF2_VMALLOC=y ++ ++# ++# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) ++# ++CONFIG_MEDIA_SUBDRV_AUTOSELECT=y ++ ++# ++# Audio decoders, processors and mixers ++# ++ ++# ++# RDS decoders ++# ++ ++# ++# Video decoders ++# ++ ++# ++# Video and audio decoders ++# ++ ++# ++# Video encoders ++# ++ ++# ++# Camera sensor devices ++# ++ ++# ++# Flash devices ++# ++ ++# ++# Video improvement chips ++# ++ ++# ++# Audio/Video compression chips ++# ++ ++# ++# SDR tuner chips ++# ++ ++# ++# Miscellaneous helper chips ++# ++ ++# ++# Sensors used on soc_camera driver ++# ++ ++# ++# Media SPI Adapters ++# ++ ++# ++# Tools to develop new frontends ++# ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++CONFIG_DRM=y ++# CONFIG_DRM_DP_AUX_CHARDEV is not set ++# CONFIG_DRM_DEBUG_MM is not set ++# CONFIG_DRM_DEBUG_SELFTEST is not set ++CONFIG_DRM_KMS_HELPER=y ++# CONFIG_DRM_FBDEV_EMULATION is not set ++# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set ++# CONFIG_DRM_DP_CEC is not set ++CONFIG_DRM_GEM_CMA_HELPER=y ++ ++# ++# I2C encoder or helper chips ++# ++# CONFIG_DRM_I2C_CH7006 is not set ++# CONFIG_DRM_I2C_SIL164 is not set ++# CONFIG_DRM_I2C_NXP_TDA998X is not set ++# CONFIG_DRM_I2C_NXP_TDA9950 is not set ++# CONFIG_DRM_HDLCD is not set ++# CONFIG_DRM_MALI_DISPLAY is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++# CONFIG_DRM_VGEM is not set ++# CONFIG_DRM_VKMS is not set ++# CONFIG_DRM_EXYNOS is not set ++# CONFIG_DRM_UDL is not set ++# CONFIG_DRM_ARMADA is not set ++# CONFIG_DRM_RCAR_DW_HDMI is not set ++# CONFIG_DRM_RCAR_LVDS is not set ++# CONFIG_DRM_OMAP is not set ++# CONFIG_DRM_TILCDC is not set ++# CONFIG_DRM_FSL_DCU is not set ++# CONFIG_DRM_STM is not set ++CONFIG_DRM_PANEL=y ++ ++# ++# Display Panels ++# ++# CONFIG_DRM_PANEL_ARM_VERSATILE is not set ++# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set ++# CONFIG_DRM_PANEL_LG_LG4573 is not set ++# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set ++CONFIG_DRM_BRIDGE=y ++CONFIG_DRM_PANEL_BRIDGE=y ++ ++# ++# Display Interface Bridges ++# ++# CONFIG_DRM_ANALOGIX_ANX78XX is not set ++# CONFIG_DRM_CDNS_DSI is not set ++# CONFIG_DRM_DUMB_VGA_DAC is not set ++# CONFIG_DRM_LVDS_ENCODER is not set ++# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set ++# CONFIG_DRM_NXP_PTN3460 is not set ++# CONFIG_DRM_PARADE_PS8622 is not set ++# CONFIG_DRM_SIL_SII8620 is not set ++# CONFIG_DRM_SII902X is not set ++# CONFIG_DRM_SII9234 is not set ++# CONFIG_DRM_THINE_THC63LVD1024 is not set ++# CONFIG_DRM_TOSHIBA_TC358767 is not set ++# CONFIG_DRM_TI_TFP410 is not set ++# CONFIG_DRM_I2C_ADV7511 is not set ++# CONFIG_DRM_STI is not set ++# CONFIG_DRM_ARCPGU is not set ++CONFIG_DRM_HISI_HISMART=y ++# CONFIG_DRM_MXSFB is not set ++# CONFIG_DRM_TINYDRM is not set ++# CONFIG_DRM_PL111 is not set ++# CONFIG_DRM_TVE200 is not set ++# CONFIG_DRM_LEGACY is not set ++CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_ARMCLCD is not set ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++CONFIG_HDMI=y ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++# CONFIG_FRAMEBUFFER_CONSOLE is not set ++# CONFIG_LOGO is not set ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++# CONFIG_SND_ARMAACI is not set ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++# CONFIG_SND_SOC is not set ++ ++# ++# HID support ++# ++# CONFIG_HID is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++# CONFIG_USB_XHCI_DBGCAP is not set ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++# CONFIG_USB_ACM is not set ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++# CONFIG_USB_UAS is not set ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_HOST is not set ++CONFIG_USB_DWC3_GADGET=y ++ ++# ++# Platform Glue Driver Support ++# ++# CONFIG_USB_DWC3_OF_SIMPLE is not set ++# CONFIG_USB_DWC2 is not set ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++# CONFIG_USB_SERIAL is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_RIO500 is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_U_AUDIO=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_F_FS=y ++CONFIG_USB_F_UAC1=y ++CONFIG_USB_F_UVC=y ++CONFIG_USB_CONFIGFS=y ++# CONFIG_USB_CONFIGFS_SERIAL is not set ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++# CONFIG_USB_CONFIGFS_F_LB_SS is not set ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_USB_CONFIGFS_F_UAC1=y ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++CONFIG_USB_CONFIGFS_F_UVC=y ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++CONFIG_TYPEC=y ++# CONFIG_TYPEC_TCPM is not set ++# CONFIG_TYPEC_UCSI is not set ++# CONFIG_TYPEC_TPS6598X is not set ++ ++# ++# USB Type-C Multiplexer/DeMultiplexer Switch support ++# ++# CONFIG_TYPEC_MUX_PI3USB30532 is not set ++ ++# ++# USB Type-C Alternate Mode drivers ++# ++# CONFIG_TYPEC_DP_ALTMODE is not set ++# CONFIG_USB_ROLE_SWITCH is not set ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_ARMMMCI is not set ++# CONFIG_MMC_SDHCI is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_CQ_HCI is not set ++CONFIG_HIMCI=y ++CONFIG_SEND_AUTO_STOP=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++CONFIG_RTC_DRV_HIBVT=y ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_PL030 is not set ++# CONFIG_RTC_DRV_PL031 is not set ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_DMADEVICES is not set ++ ++# ++# DMABUF options ++# ++CONFIG_SYNC_FILE=y ++# CONFIG_SW_SYNC is not set ++# CONFIG_AUXDISPLAY is not set ++# CONFIG_UIO is not set ++# CONFIG_VIRT_DRIVERS is not set ++CONFIG_VIRTIO_MENU=y ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_HI3516DV300=y ++CONFIG_RESET_HISI=y ++CONFIG_STAGING=y ++# CONFIG_HWSPINLOCK is not set ++# ++# Android ++# ++CONFIG_ANDROID=y ++CONFIG_ANDROID_BINDER_IPC=y ++CONFIG_ANDROID_BINDER_DEVICES=binder,hwbinder,vndbinder ++CONFIG_ASHMEM=y ++CONFIG_ANDROID_LOW_MEMORY_KILLER=y ++CONFIG_ANDROID_LOW_MEMORY_KILLER_AUTODETECT_OOM_ADJ_VALUES=y ++# CONFIG_ANDROID_VSOC is not set ++CONFIG_ION=y ++CONFIG_ION_TEST=y ++# CONFIG_ION_DUMMY is not set ++CONFIG_ION_HICAMERA=y ++CONFIG_ION_OF=y ++# CONFIG_FIQ_DEBUGGER is not set ++# CONFIG_FIQ_WATCHDOG is not set ++# CONFIG_STAGING_BOARD is not set ++# CONFIG_LTE_GDM724X is not set ++# CONFIG_MTD_SPINAND_MT29F is not set ++# CONFIG_LNET is not set ++# CONFIG_DGNC is not set ++# CONFIG_GS_FPGABOOT is not set ++# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set ++# CONFIG_FB_TFT is not set ++# CONFIG_FSL_MC_BUS is not set ++# CONFIG_MOST is not set ++# CONFIG_KS7010 is not set ++# CONFIG_GREYBUS is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set ++CONFIG_ARM_TIMER_SP804=y ++# CONFIG_TIMER_HISP804 is not set ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++# CONFIG_SOUNDWIRE is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++CONFIG_PWM=y ++CONFIG_PWM_HI35XX=y ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++CONFIG_GENERIC_PHY=y ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++CONFIG_HI_USB_PHY=y ++CONFIG_PHY_HISI_USB2=y ++CONFIG_HIBVT_USB_PHY=y ++CONFIG_USB_MODE_OPTION=y ++CONFIG_USB_DRD0_IN_HOST=y ++CONFIG_USB_DRD0_IN_DEVICE=y ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++# CONFIG_RAS is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++# CONFIG_HI_DMAC is not set ++# CONFIG_HIEDMAC is not set ++ ++# ++# Hisilicon driver support ++# ++# CONFIG_CMA_MEM_SHARED is not set ++# CONFIG_CMA_ADVANCE_SHARE is not set ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++# CONFIG_EXT2_FS is not set ++# CONFIG_EXT3_FS is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_USE_FOR_EXT2=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_CHECK=y ++CONFIG_REISERFS_PROC_INFO=y ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_DEBUG=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++# CONFIG_XFS_ONLINE_SCRUB is not set ++# CONFIG_XFS_WARN is not set ++# CONFIG_XFS_DEBUG is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTA_NETLINK_INTERFACE is not set ++CONFIG_QUOTACTL=y ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_SQUASHFS is not set ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++# CONFIG_PSTORE is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++# CONFIG_ROOT_NFS is not set ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_ACL_SUPPORT=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=y ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++CONFIG_NLS_UTF8=y ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++CONFIG_SECURITY=y ++CONFIG_SECURITYFS=y ++CONFIG_SECURITY_NETWORK=y ++#CONFIG_PAGE_TABLE_ISOLATION=y ++#CONFIG_SECURITY_INFINIBAND=y ++#CONFIG_SECURITY_NETWORK_XFRM=y ++#CONFIG_SECURITY_PATH=y ++CONFIG_SECURITY_SELINUX=y ++CONFIG_SECURITY_SELINUX_BOOTPARAM=y ++CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 ++# CONFIG_SECURITY_SELINUX_DISABLE is not set ++CONFIG_SECURITY_SELINUX_DEVELOP=y ++CONFIG_SECURITY_SELINUX_AVC_STATS=y ++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 ++CONFIG_DEFAULT_SECURITY_SELINUX=y ++CONFIG_DEFAULT_SECURITY="selinux" ++#CONFIG_SECURITY_SMACK=y ++# CONFIG_SECURITY_SMACK_BRINGUP is not set ++#CONFIG_SECURITY_SMACK_NETFILTER=y ++#CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y ++#CONFIG_SECURITY_TOMOYO=y ++#CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 ++#CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 ++#CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set ++#CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init" ++#CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init" ++CONFIG_SECURITY_APPARMOR=y ++CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 ++CONFIG_SECURITY_APPARMOR_HASH=y ++CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y ++# CONFIG_SECURITY_APPARMOR_DEBUG is not set ++# CONFIG_SECURITY_LOADPIN is not set ++# CONFIG_SECURITY_YAMA=y ++ ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_LZO is not set ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++CONFIG_CRYPTO_HW=y ++# CONFIG_CRYPTO_DEV_CCREE is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++CONFIG_LIBCRC32C=m ++# CONFIG_CRC8 is not set ++CONFIG_AUDIT_GENERIC=y ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT_MAP=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++ ++# ++# Compile-time checks and compiler options ++# ++# CONFIG_DEBUG_INFO is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_MAGIC_SYSRQ is not set ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_WQ_WATCHDOG is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++CONFIG_PANIC_TIMEOUT=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=60 ++# CONFIG_RCU_TRACE is not set ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set +diff --git a/arch/arm/configs/hi3516dv300_smp_defconfig b/arch/arm/configs/hi3516dv300_smp_defconfig +new file mode 100644 +index 000000000..109c06652 +--- /dev/null ++++ b/arch/arm/configs/hi3516dv300_smp_defconfig +@@ -0,0 +1,3189 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/arm 4.19.90 Kernel Configuration ++# ++ ++# ++# Compiler: arm-himix410-linux-gcc (HC&C V1R3C00SPC200B041_20200707) 7.3.0 ++# ++CONFIG_CC_IS_GCC=y ++CONFIG_GCC_VERSION=70300 ++CONFIG_CLANG_VERSION=0 ++CONFIG_CC_HAS_ASM_GOTO=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_BUILD_SALT="" ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++# CONFIG_KERNEL_LZ4 is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++CONFIG_USELIB=y ++# CONFIG_AUDIT is not set ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y ++CONFIG_GENERIC_IRQ_MIGRATION=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++# CONFIG_GENERIC_IRQ_DEBUGFS is not set ++CONFIG_GENERIC_IRQ_MULTI_HANDLER=y ++CONFIG_ARCH_CLOCKSOURCE_DATA=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++ ++# ++# Timers subsystem ++# ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ_FULL is not set ++# CONFIG_NO_HZ is not set ++# CONFIG_HIGH_RES_TIMERS is not set ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++CONFIG_CPU_ISOLATION=y ++ ++# ++# RCU Subsystem ++# ++CONFIG_TREE_RCU=y ++# CONFIG_RCU_EXPERT is not set ++CONFIG_SRCU=y ++CONFIG_TREE_SRCU=y ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RCU_NEED_SEGCBLIST=y ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 ++CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_CGROUPS=y ++# CONFIG_MEMCG is not set ++# CONFIG_BLK_CGROUP is not set ++CONFIG_CGROUP_SCHED=y ++CONFIG_FAIR_GROUP_SCHED=y ++# CONFIG_CFS_BANDWIDTH is not set ++# CONFIG_RT_GROUP_SCHED is not set ++# CONFIG_CGROUP_PIDS is not set ++# CONFIG_CGROUP_RDMA is not set ++# CONFIG_CGROUP_FREEZER is not set ++# CONFIG_CPUSETS is not set ++# CONFIG_CGROUP_DEVICE is not set ++# CONFIG_CGROUP_CPUACCT is not set ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++CONFIG_IPC_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++# CONFIG_CHECKPOINT_RESTORE is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++CONFIG_BPF=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SYSFS_SYSCALL=y ++CONFIG_FHANDLE=y ++CONFIG_POSIX_TIMERS=y ++CONFIG_PRINTK=y ++CONFIG_PRINTK_NMI=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_FUTEX_PI=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++CONFIG_MEMBARRIER=y ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_KALLSYMS_BASE_RELATIVE=y ++# CONFIG_BPF_SYSCALL is not set ++# CONFIG_USERFAULTFD is not set ++CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y ++CONFIG_RSEQ=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++# CONFIG_PERF_EVENTS is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++CONFIG_SLAB_MERGE_DEFAULT=y ++# CONFIG_SLAB_FREELIST_RANDOM is not set ++# CONFIG_SLAB_FREELIST_HARDENED is not set ++CONFIG_SLUB_CPU_PARTIAL=y ++# CONFIG_PROFILING is not set ++CONFIG_ARM=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_GENERIC_BUG=y ++CONFIG_PGTABLE_LEVELS=2 ++ ++# ++# System Type ++# ++CONFIG_MMU=y ++CONFIG_ARCH_MMAP_RND_BITS_MIN=8 ++CONFIG_ARCH_MMAP_RND_BITS_MAX=16 ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_DOVE is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_W90X900 is not set ++# CONFIG_ARCH_LPC32XX is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C24XX is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP1 is not set ++ ++# ++# Multiple platform selection ++# ++ ++# ++# CPU Core family selection ++# ++# CONFIG_ARCH_MULTI_V6 is not set ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_MULTI_V6_V7=y ++# CONFIG_ARCH_VIRT is not set ++# CONFIG_ARCH_ACTIONS is not set ++# CONFIG_ARCH_ALPINE is not set ++# CONFIG_ARCH_ARTPEC is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_BCM is not set ++# CONFIG_ARCH_BERLIN is not set ++# CONFIG_ARCH_DIGICOLOR is not set ++# CONFIG_ARCH_EXYNOS is not set ++# CONFIG_ARCH_HIGHBANK is not set ++# CONFIG_ARCH_HISI is not set ++CONFIG_ARCH_HISI_BVT=y ++ ++# ++# Hisilicon BVT platform type ++# ++# CONFIG_ARCH_HI3521DV200 is not set ++# CONFIG_ARCH_HI3520DV500 is not set ++# CONFIG_ARCH_HI3516A is not set ++# CONFIG_ARCH_HI3516CV500 is not set ++CONFIG_ARCH_HI3516DV300=y ++# CONFIG_ARCH_HI3516EV200 is not set ++# CONFIG_ARCH_HI3516EV300 is not set ++# CONFIG_ARCH_HI3518EV300 is not set ++# CONFIG_ARCH_HI3516DV200 is not set ++# CONFIG_ARCH_HI3556V200 is not set ++# CONFIG_ARCH_HI3559V200 is not set ++# CONFIG_ARCH_HI3536DV100 is not set ++# CONFIG_ARCH_HI3521A is not set ++# CONFIG_ARCH_HI3531A is not set ++# CONFIG_ARCH_HI3556AV100 is not set ++# CONFIG_ARCH_HI3519AV100 is not set ++# CONFIG_ARCH_HI3568V100 is not set ++# CONFIG_ARCH_HISI_BVT_AMP is not set ++# CONFIG_HISI_MC is not set ++CONFIG_HI_ZRELADDR=0x80008000 ++CONFIG_HI_PARAMS_PHYS=0x00000100 ++CONFIG_HI_INITRD_PHYS=0x00800000 ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_KEYSTONE is not set ++# CONFIG_ARCH_MEDIATEK is not set ++# CONFIG_ARCH_MESON is not set ++# CONFIG_ARCH_MMP is not set ++# CONFIG_ARCH_MVEBU is not set ++# CONFIG_ARCH_NPCM is not set ++ ++# ++# TI OMAP/AM/DM/DRA Family ++# ++# CONFIG_ARCH_OMAP3 is not set ++# CONFIG_ARCH_OMAP4 is not set ++# CONFIG_SOC_OMAP5 is not set ++# CONFIG_SOC_AM33XX is not set ++# CONFIG_SOC_AM43XX is not set ++# CONFIG_SOC_DRA7XX is not set ++# CONFIG_ARCH_SIRF is not set ++# CONFIG_ARCH_QCOM is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_ROCKCHIP is not set ++# CONFIG_ARCH_S5PV210 is not set ++# CONFIG_ARCH_RENESAS is not set ++# CONFIG_ARCH_SOCFPGA is not set ++# CONFIG_PLAT_SPEAR is not set ++# CONFIG_ARCH_STI is not set ++# CONFIG_ARCH_STM32 is not set ++# CONFIG_ARCH_SUNXI is not set ++# CONFIG_ARCH_TANGO is not set ++# CONFIG_ARCH_TEGRA is not set ++# CONFIG_ARCH_UNIPHIER is not set ++# CONFIG_ARCH_U8500 is not set ++# CONFIG_ARCH_VEXPRESS is not set ++# CONFIG_ARCH_WM8850 is not set ++# CONFIG_ARCH_ZX is not set ++# CONFIG_ARCH_ZYNQ is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_V7=y ++CONFIG_CPU_THUMB_CAPABLE=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_SWP_EMULATE=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_SPECTRE=y ++CONFIG_HARDEN_BRANCH_PREDICTOR=y ++CONFIG_KUSER_HELPERS=y ++CONFIG_VDSO=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++# CONFIG_CACHE_L2X0 is not set ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_DMA_MEM_BUFFERABLE=y ++CONFIG_DEBUG_ALIGN_RODATA=y ++# CONFIG_ARM_ERRATA_430973 is not set ++# CONFIG_ARM_ERRATA_643719 is not set ++# CONFIG_ARM_ERRATA_720789 is not set ++# CONFIG_ARM_ERRATA_754322 is not set ++# CONFIG_ARM_ERRATA_754327 is not set ++# CONFIG_ARM_ERRATA_764369 is not set ++# CONFIG_ARM_ERRATA_775420 is not set ++# CONFIG_ARM_ERRATA_798181 is not set ++# CONFIG_ARM_ERRATA_773022 is not set ++# CONFIG_ARM_ERRATA_818325_852422 is not set ++# CONFIG_ARM_ERRATA_821420 is not set ++# CONFIG_ARM_ERRATA_825619 is not set ++# CONFIG_ARM_ERRATA_852421 is not set ++# CONFIG_ARM_ERRATA_852423 is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI is not set ++ ++# ++# PCI Endpoint ++# ++# CONFIG_PCI_ENDPOINT is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_HAVE_SMP=y ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++CONFIG_ARM_CPU_TOPOLOGY=y ++# CONFIG_SCHED_MC is not set ++# CONFIG_SCHED_SMT is not set ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++# CONFIG_MCPM is not set ++# CONFIG_BIG_LITTLE is not set ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_3G_OPT is not set ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_NR_CPUS=2 ++CONFIG_HOTPLUG_CPU=y ++# CONFIG_ARM_PSCI is not set ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_HZ_FIXED=0 ++CONFIG_HZ_100=y ++# CONFIG_HZ_200 is not set ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_500 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++# CONFIG_THUMB2_KERNEL is not set ++CONFIG_ARM_PATCH_IDIV=y ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_CPU_SW_DOMAIN_PAN=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++# CONFIG_ARM_MODULE_PLTS is not set ++CONFIG_FORCE_MAX_ZONEORDER=11 ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_UACCESS_WITH_MEMCPY is not set ++# CONFIG_SECCOMP is not set ++# CONFIG_PARAVIRT is not set ++# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set ++# CONFIG_XEN is not set ++ ++# ++# Boot options ++# ++CONFIG_USE_OF=y ++CONFIG_ATAGS=y ++# CONFIG_DEPRECATED_PARAM_STRUCT is not set ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_ARM_APPENDED_DTB=y ++CONFIG_ARM_ATAG_DTB_COMPAT=y ++CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y ++# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set ++CONFIG_CMDLINE="" ++# CONFIG_KEXEC is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_AUTO_ZRELADDR=y ++# CONFIG_EFI is not set ++ ++# ++# CPU Power Management ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++# CONFIG_FPE_NWFPE is not set ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++ ++# ++# Power management options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++# CONFIG_PM_AUTOSLEEP is not set ++# CONFIG_PM_WAKELOCKS is not set ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++# CONFIG_APM_EMULATION is not set ++CONFIG_PM_CLK=y ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_CPU_PM=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++ ++# ++# Firmware Drivers ++# ++# CONFIG_FW_CFG_SYSFS is not set ++CONFIG_HAVE_ARM_SMCCC=y ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# Tegra firmware driver ++# ++# CONFIG_ARM_CRYPTO is not set ++# CONFIG_VIRTUALIZATION is not set ++ ++# ++# General architecture-dependent options ++# ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++# CONFIG_JUMP_LABEL is not set ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_NMI=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_ARCH_HAS_FORTIFY_SOURCE=y ++CONFIG_ARCH_HAS_SET_MEMORY=y ++CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_RSEQ=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_STACKPROTECTOR=y ++CONFIG_CC_HAS_STACKPROTECTOR_NONE=y ++CONFIG_STACKPROTECTOR=y ++CONFIG_STACKPROTECTOR_STRONG=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_HAVE_ARCH_MMAP_RND_BITS=y ++CONFIG_HAVE_EXIT_THREAD=y ++CONFIG_ARCH_MMAP_RND_BITS=8 ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y ++CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y ++CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y ++CONFIG_STRICT_KERNEL_RWX=y ++CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y ++CONFIG_STRICT_MODULE_RWX=y ++CONFIG_ARCH_HAS_PHYS_TO_DMA=y ++CONFIG_REFCOUNT_FULL=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_PLUGIN_HOSTCC="" ++CONFIG_HAVE_GCC_PLUGINS=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++CONFIG_MODULE_FORCE_LOAD=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_FORCE_UNLOAD=y ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++# CONFIG_MODULE_COMPRESS is not set ++# CONFIG_TRIM_UNUSED_KSYMS is not set ++CONFIG_BLOCK=y ++CONFIG_LBDAF=y ++CONFIG_BLK_SCSI_REQUEST=y ++CONFIG_BLK_DEV_BSG=y ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_DEV_ZONED is not set ++CONFIG_BLK_CMDLINE_PARSER=y ++# CONFIG_BLK_WBT is not set ++# CONFIG_BLK_DEBUG_FS is not set ++# CONFIG_BLK_SED_OPAL is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_CMDLINE_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_IOSCHED_CFQ=y ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_MQ_IOSCHED_DEADLINE=y ++CONFIG_MQ_IOSCHED_KYBER=y ++# CONFIG_IOSCHED_BFQ is not set ++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y ++CONFIG_INLINE_READ_UNLOCK=y ++CONFIG_INLINE_READ_UNLOCK_IRQ=y ++CONFIG_INLINE_WRITE_UNLOCK=y ++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_FREEZER=y ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_ELF_FDPIC is not set ++CONFIG_ELFCORE=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_BINFMT_FLAT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Memory Management options ++# ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++CONFIG_COMPACTION=y ++CONFIG_MIGRATION=y ++CONFIG_BOUNCE=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CLEANCACHE is not set ++CONFIG_CMA=y ++CONFIG_CMA_DEBUG=y ++# CONFIG_CMA_DEBUGFS is not set ++CONFIG_CMA_AREAS=7 ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_GENERIC_EARLY_IOREMAP=y ++# CONFIG_IDLE_PAGE_TRACKING is not set ++CONFIG_FRAME_VECTOR=y ++# CONFIG_PERCPU_STATS is not set ++# CONFIG_GUP_BENCHMARK is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_TLS is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_INTERFACE is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_NET_IPVTI is not set ++# CONFIG_NET_FOU is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_INET_RAW_DIAG is not set ++# CONFIG_INET_DIAG_DESTROY is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++CONFIG_IPV6=y ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET6_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET6_XFRM_MODE_BEET is not set ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++# CONFIG_IPV6_SIT is not set ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_IPV6_SEG6_LWTUNNEL is not set ++# CONFIG_IPV6_SEG6_HMAC is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_BPFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++# CONFIG_NET_DSA is not set ++CONFIG_VLAN_8021Q=y ++# CONFIG_VLAN_8021Q_GVRP is not set ++# CONFIG_VLAN_8021Q_MVRP is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_6LOWPAN is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++CONFIG_DNS_RESOLVER=y ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_MPLS is not set ++# CONFIG_NET_NSH is not set ++# CONFIG_HSR is not set ++# CONFIG_NET_SWITCHDEV is not set ++# CONFIG_NET_L3_MASTER_DEV is not set ++# CONFIG_NET_NCSI is not set ++CONFIG_RPS=y ++CONFIG_RFS_ACCEL=y ++CONFIG_XPS=y ++# CONFIG_CGROUP_NET_PRIO is not set ++# CONFIG_CGROUP_NET_CLASSID is not set ++CONFIG_NET_RX_BUSY_POLL=y ++CONFIG_BQL=y ++# CONFIG_BPF_JIT is not set ++CONFIG_NET_FLOW_LIMIT=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_AF_KCM is not set ++CONFIG_WIRELESS=y ++# CONFIG_CFG80211 is not set ++ ++# ++# CFG80211 needs to be enabled for MAC80211 ++# ++CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++# CONFIG_PSAMPLE is not set ++# CONFIG_NET_IFE is not set ++# CONFIG_LWTUNNEL is not set ++CONFIG_GRO_CELLS=y ++# CONFIG_NET_DEVLINK is not set ++CONFIG_MAY_USE_DEVLINK=y ++# CONFIG_FAILOVER is not set ++CONFIG_HAVE_EBPF_JIT=y ++ ++# ++# Device Drivers ++# ++CONFIG_ARM_AMBA=y ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER=y ++CONFIG_UEVENT_HELPER_PATH="" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++ ++# ++# Firmware loader ++# ++CONFIG_FW_LOADER=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set ++# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set ++CONFIG_GENERIC_CPU_AUTOPROBE=y ++CONFIG_REGMAP=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPI=y ++CONFIG_REGMAP_MMIO=y ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_DMA_FENCE_TRACE is not set ++CONFIG_DMA_CMA=y ++ ++# ++# Default contiguous memory area size: ++# ++CONFIG_CMA_SIZE_MBYTES=16 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_GENERIC_ARCH_TOPOLOGY=y ++ ++# ++# Bus devices ++# ++# CONFIG_BRCMSTB_GISB_ARB is not set ++# CONFIG_SIMPLE_PM_BUS is not set ++# CONFIG_VEXPRESS_CONFIG is not set ++# CONFIG_CONNECTOR is not set ++# CONFIG_GNSS is not set ++CONFIG_MTD=y ++# CONFIG_MTD_TESTS is not set ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++CONFIG_MTD_OF_PARTS=y ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# Partition parsers ++# ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++# CONFIG_MTD_PARTITIONED_MASTER is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_MCHP23K256 is not set ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++# CONFIG_MTD_ONENAND is not set ++CONFIG_MTD_SPI_NAND_HISI_BVT=y ++# CONFIG_HISI_NAND_ECC_STATUS_REPORT is not set ++# CONFIG_HISI_NAND_FS_MAY_NO_YAFFS2 is not set ++CONFIG_MTD_NAND_ECC=y ++# CONFIG_MTD_NAND_ECC_SMC is not set ++CONFIG_MTD_NAND=y ++# CONFIG_MTD_NAND_ECC_BCH is not set ++# CONFIG_MTD_NAND_DENALI_DT is not set ++# CONFIG_MTD_NAND_GPIO is not set ++# CONFIG_MTD_NAND_DISKONCHIP is not set ++# CONFIG_MTD_NAND_DOCG4 is not set ++# CONFIG_MTD_NAND_NANDSIM is not set ++# CONFIG_MTD_NAND_BRCMNAND is not set ++# CONFIG_MTD_NAND_PLATFORM is not set ++CONFIG_MTD_SPI_NAND_HIFMC100=y ++# CONFIG_MTD_SPI_NAND is not set ++ ++# ++# LPDDR & LPDDR2 PCM memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_LPDDR2_NVM is not set ++CONFIG_MTD_SPI_NOR=y ++# CONFIG_MTD_MT81xx_NOR is not set ++# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set ++# CONFIG_SPI_CADENCE_QUADSPI is not set ++CONFIG_SPI_HISI_SFC=y ++# CONFIG_MTD_SPI_IDS is not set ++# CONFIG_CLOSE_SPI_8PIN_4IO is not set ++CONFIG_HISI_SPI_BLOCK_PROTECT=y ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++# CONFIG_MTD_UBI_FASTMAP is not set ++# CONFIG_MTD_UBI_GLUEBI is not set ++# CONFIG_MTD_UBI_BLOCK is not set ++CONFIG_DTC=y ++CONFIG_OF=y ++# CONFIG_OF_UNITTEST is not set ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_KOBJ=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_NET=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_RESERVED_MEM=y ++# CONFIG_OF_OVERLAY is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_NULL_BLK is not set ++# CONFIG_BLK_DEV_LOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=65536 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# NVME Support ++# ++# CONFIG_NVME_FC is not set ++# CONFIG_NVME_TARGET is not set ++ ++# ++# Misc devices ++# ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_LATTICE_ECP3_CONFIG is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_AT24 is not set ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_EEPROM_IDT_89HPESX is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_SPI is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++# CONFIG_ALTERA_STAPL is not set ++ ++# ++# Intel MIC & related support ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# SCIF Bus Driver ++# ++ ++# ++# VOP Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCIF Driver ++# ++ ++# ++# Intel MIC Coprocessor State Management (COSM) Drivers ++# ++ ++# ++# VOP Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_MISC_RTSX_USB is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_MQ_DEFAULT is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_ISCSI_BOOT_SYSFS is not set ++# CONFIG_SCSI_UFSHCD is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++CONFIG_NETDEVICES=y ++CONFIG_MII=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_GENEVE is not set ++# CONFIG_GTP is not set ++# CONFIG_MACSEC is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_TUN is not set ++# CONFIG_TUN_VNET_CROSS_LE is not set ++# CONFIG_VETH is not set ++# CONFIG_NLMON is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++CONFIG_ETHERNET=y ++CONFIG_NET_VENDOR_ALACRITECH=y ++# CONFIG_ALTERA_TSE is not set ++# CONFIG_NET_VENDOR_AMAZON is not set ++CONFIG_NET_VENDOR_AQUANTIA=y ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_VENDOR_AURORA is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++CONFIG_NET_VENDOR_CADENCE=y ++# CONFIG_MACB is not set ++CONFIG_NET_VENDOR_CAVIUM=y ++# CONFIG_NET_VENDOR_CIRRUS is not set ++CONFIG_NET_VENDOR_CORTINA=y ++# CONFIG_GEMINI_ETHERNET is not set ++# CONFIG_DM9000 is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_EZCHIP is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++CONFIG_NET_VENDOR_HISILICON=y ++# CONFIG_HIX5HD2_GMAC is not set ++CONFIG_HISI_FEMAC=y ++# CONFIG_HIP04_ETH is not set ++# CONFIG_HNS is not set ++# CONFIG_HNS_DSAF is not set ++# CONFIG_HNS_ENET is not set ++# CONFIG_HIETH_GMAC is not set ++CONFIG_NET_VENDOR_HUAWEI=y ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++CONFIG_NET_VENDOR_MELLANOX=y ++# CONFIG_MLXSW_CORE is not set ++# CONFIG_MLXFW is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++CONFIG_NET_VENDOR_MICROSEMI=y ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NETRONOME is not set ++CONFIG_NET_VENDOR_NI=y ++# CONFIG_ETHOC is not set ++# CONFIG_NET_VENDOR_QUALCOMM is not set ++# CONFIG_NET_VENDOR_RENESAS is not set ++# CONFIG_NET_VENDOR_ROCKER is not set ++# CONFIG_NET_VENDOR_SAMSUNG is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++CONFIG_NET_VENDOR_SOLARFLARE=y ++# CONFIG_NET_VENDOR_SMSC is not set ++CONFIG_NET_VENDOR_SOCIONEXT=y ++# CONFIG_NET_VENDOR_STMICRO is not set ++# CONFIG_NET_VENDOR_SYNOPSYS is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_MDIO_DEVICE=y ++CONFIG_MDIO_BUS=y ++# CONFIG_MDIO_BCM_UNIMAC is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MDIO_BUS_MUX_GPIO is not set ++# CONFIG_MDIO_BUS_MUX_MMIOREG is not set ++CONFIG_MDIO_HISI_FEMAC=y ++# CONFIG_MDIO_HISI_GEMAC is not set ++# CONFIG_MDIO_MSCC_MIIM is not set ++CONFIG_PHYLIB=y ++CONFIG_SWPHY=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AMD_PHY is not set ++# CONFIG_AQUANTIA_PHY is not set ++# CONFIG_AX88796B_PHY is not set ++# CONFIG_AT803X_PHY is not set ++# CONFIG_BCM7XXX_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_CORTINA_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_DP83822_PHY is not set ++# CONFIG_DP83TC811_PHY is not set ++# CONFIG_DP83848_PHY is not set ++# CONFIG_DP83867_PHY is not set ++CONFIG_FIXED_PHY=y ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_INTEL_XWAY_PHY is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_MARVELL_10G_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_MICROCHIP_PHY is not set ++# CONFIG_MICROCHIP_T1_PHY is not set ++# CONFIG_MICROSEMI_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_REALTEK_PHY is not set ++# CONFIG_RENESAS_PHY is not set ++# CONFIG_ROCKCHIP_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_TERANETICS_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_XILINX_GMII2RGMII is not set ++# CONFIG_MICREL_KS8995MA is not set ++# CONFIG_PPP is not set ++# CONFIG_SLIP is not set ++CONFIG_USB_NET_DRIVERS=y ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++CONFIG_USB_RTL8152=y ++# CONFIG_USB_LAN78XX is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_IPHETH is not set ++CONFIG_WLAN=y ++CONFIG_WLAN_VENDOR_ADMTEK=y ++CONFIG_WLAN_VENDOR_ATH=y ++# CONFIG_ATH_DEBUG is not set ++CONFIG_WLAN_VENDOR_ATMEL=y ++CONFIG_WLAN_VENDOR_BROADCOM=y ++CONFIG_WLAN_VENDOR_CISCO=y ++CONFIG_WLAN_VENDOR_INTEL=y ++CONFIG_WLAN_VENDOR_INTERSIL=y ++# CONFIG_HOSTAP is not set ++CONFIG_WLAN_VENDOR_MARVELL=y ++CONFIG_WLAN_VENDOR_MEDIATEK=y ++CONFIG_WLAN_VENDOR_RALINK=y ++CONFIG_WLAN_VENDOR_REALTEK=y ++CONFIG_WLAN_VENDOR_RSI=y ++CONFIG_WLAN_VENDOR_ST=y ++CONFIG_WLAN_VENDOR_TI=y ++CONFIG_WLAN_VENDOR_ZYDAS=y ++CONFIG_WLAN_VENDOR_QUANTENNA=y ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_NETDEVSIM is not set ++# CONFIG_NET_FAILOVER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++CONFIG_INPUT_FF_MEMLESS=y ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++CONFIG_INPUT_JOYDEV=y ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ADP5588 is not set ++# CONFIG_KEYBOARD_ADP5589 is not set ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_QT1070 is not set ++# CONFIG_KEYBOARD_QT2160 is not set ++# CONFIG_KEYBOARD_DLINK_DIR685 is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_GPIO is not set ++# CONFIG_KEYBOARD_GPIO_POLLED is not set ++# CONFIG_KEYBOARD_TCA6416 is not set ++# CONFIG_KEYBOARD_TCA8418 is not set ++# CONFIG_KEYBOARD_MATRIX is not set ++# CONFIG_KEYBOARD_LM8333 is not set ++# CONFIG_KEYBOARD_MAX7359 is not set ++# CONFIG_KEYBOARD_MCS is not set ++# CONFIG_KEYBOARD_MPR121 is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_OPENCORES is not set ++# CONFIG_KEYBOARD_SAMSUNG is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_OMAP4 is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_CAP11XX is not set ++# CONFIG_KEYBOARD_BCM is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_BYD=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y ++CONFIG_MOUSE_PS2_CYPRESS=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_SENTELIC is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++CONFIG_MOUSE_PS2_FOCALTECH=y ++CONFIG_MOUSE_PS2_SMBUS=y ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_CYAPA is not set ++# CONFIG_MOUSE_ELAN_I2C is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_MOUSE_SYNAPTICS_I2C is not set ++# CONFIG_MOUSE_SYNAPTICS_USB is not set ++CONFIG_INPUT_JOYSTICK=y ++# CONFIG_JOYSTICK_ANALOG is not set ++# CONFIG_JOYSTICK_A3D is not set ++# CONFIG_JOYSTICK_ADI is not set ++# CONFIG_JOYSTICK_COBRA is not set ++# CONFIG_JOYSTICK_GF2K is not set ++# CONFIG_JOYSTICK_GRIP is not set ++# CONFIG_JOYSTICK_GRIP_MP is not set ++# CONFIG_JOYSTICK_GUILLEMOT is not set ++# CONFIG_JOYSTICK_INTERACT is not set ++# CONFIG_JOYSTICK_SIDEWINDER is not set ++# CONFIG_JOYSTICK_TMDC is not set ++# CONFIG_JOYSTICK_IFORCE is not set ++# CONFIG_JOYSTICK_WARRIOR is not set ++# CONFIG_JOYSTICK_MAGELLAN is not set ++# CONFIG_JOYSTICK_SPACEORB is not set ++# CONFIG_JOYSTICK_SPACEBALL is not set ++# CONFIG_JOYSTICK_STINGER is not set ++# CONFIG_JOYSTICK_TWIDJOY is not set ++# CONFIG_JOYSTICK_ZHENHUA is not set ++# CONFIG_JOYSTICK_AS5011 is not set ++# CONFIG_JOYSTICK_JOYDUMP is not set ++CONFIG_JOYSTICK_XPAD=y ++CONFIG_JOYSTICK_XPAD_FF=y ++# CONFIG_JOYSTICK_PSXPAD_SPI is not set ++# CONFIG_JOYSTICK_PXRC is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++# CONFIG_RMI4_CORE is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++# CONFIG_SERIO_AMBAKMI is not set ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_SERIO_APBPS2 is not set ++# CONFIG_SERIO_GPIO_PS2 is not set ++# CONFIG_USERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_LDISC_AUTOLOAD=y ++CONFIG_DEVMEM=y ++CONFIG_DEVKMEM=y ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_EARLYCON=y ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_AMBA_PL010 is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_UARTLITE is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_SC16IS7XX is not set ++# CONFIG_SERIAL_BCM63XX is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_XILINX_PS_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set ++# CONFIG_SERIAL_ST_ASC is not set ++# CONFIG_SERIAL_DEV_BUS is not set ++# CONFIG_HVC_DCC is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_XILLYBUS is not set ++ ++# ++# I2C support ++# ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++# CONFIG_I2C_COMPAT is not set ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_MUX=y ++ ++# ++# Multiplexer I2C Chip support ++# ++# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set ++# CONFIG_I2C_MUX_GPIO is not set ++# CONFIG_I2C_MUX_GPMUX is not set ++# CONFIG_I2C_MUX_LTC4306 is not set ++# CONFIG_I2C_MUX_PCA9541 is not set ++# CONFIG_I2C_MUX_PCA954x is not set ++# CONFIG_I2C_MUX_PINCTRL is not set ++# CONFIG_I2C_MUX_REG is not set ++# CONFIG_I2C_DEMUX_PINCTRL is not set ++# CONFIG_I2C_MUX_MLXCPLD is not set ++# CONFIG_I2C_HELPER_AUTO is not set ++# CONFIG_I2C_SMBUS is not set ++ ++# ++# I2C Algorithms ++# ++# CONFIG_I2C_ALGOBIT is not set ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++# CONFIG_I2C_DESIGNWARE_PLATFORM is not set ++# CONFIG_I2C_EMEV2 is not set ++# CONFIG_I2C_GPIO is not set ++CONFIG_I2C_HIBVT=y ++# CONFIG_I2C_NOMADIK is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_RK3X is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_ROBOTFUZZ_OSIF is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++CONFIG_DMA_MSG_MIN_LEN=5 ++CONFIG_DMA_MSG_MAX_LEN=4090 ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_SLAVE is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++# CONFIG_SPI_MEM is not set ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++# CONFIG_SPI_AXI_SPI_ENGINE is not set ++# CONFIG_SPI_BITBANG is not set ++# CONFIG_SPI_CADENCE is not set ++# CONFIG_SPI_DESIGNWARE is not set ++# CONFIG_SPI_GPIO is not set ++# CONFIG_SPI_FSL_SPI is not set ++# CONFIG_SPI_OC_TINY is not set ++CONFIG_SPI_PL022=y ++# CONFIG_SPI_ROCKCHIP is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_ZYNQMP_GQSPI is not set ++ ++# ++# SPI Protocol Masters ++# ++CONFIG_SPI_SPIDEV=y ++# CONFIG_SPI_LOOPBACK_TEST is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_SPI_SLAVE is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++# CONFIG_PPS is not set ++ ++# ++# PTP clock support ++# ++# CONFIG_PTP_1588_CLOCK is not set ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PINCTRL=y ++# CONFIG_DEBUG_PINCTRL is not set ++# CONFIG_PINCTRL_AMD is not set ++# CONFIG_PINCTRL_MCP23S08 is not set ++# CONFIG_PINCTRL_SINGLE is not set ++# CONFIG_PINCTRL_SX150X is not set ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_FASTPATH_LIMIT=512 ++CONFIG_OF_GPIO=y ++CONFIG_GPIOLIB_IRQCHIP=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_GENERIC=y ++ ++# ++# Memory mapped GPIO drivers ++# ++# CONFIG_GPIO_74XX_MMIO is not set ++# CONFIG_GPIO_ALTERA is not set ++# CONFIG_GPIO_DWAPB is not set ++# CONFIG_GPIO_FTGPIO010 is not set ++CONFIG_GPIO_GENERIC_PLATFORM=y ++# CONFIG_GPIO_GRGPIO is not set ++# CONFIG_GPIO_HLWD is not set ++# CONFIG_GPIO_MB86S7X is not set ++# CONFIG_GPIO_MOCKUP is not set ++# CONFIG_GPIO_MPC8XXX is not set ++CONFIG_GPIO_PL061=y ++# CONFIG_GPIO_SYSCON is not set ++# CONFIG_GPIO_XILINX is not set ++# CONFIG_GPIO_ZEVIO is not set ++ ++# ++# I2C GPIO expanders ++# ++# CONFIG_GPIO_ADP5588 is not set ++# CONFIG_GPIO_ADNP is not set ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_TPIC2810 is not set ++ ++# ++# MFD GPIO expanders ++# ++# CONFIG_HTC_EGPIO is not set ++ ++# ++# SPI GPIO expanders ++# ++# CONFIG_GPIO_74X164 is not set ++# CONFIG_GPIO_MAX3191X is not set ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_PISOSR is not set ++# CONFIG_GPIO_XRA1403 is not set ++ ++# ++# USB GPIO expanders ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_AVS is not set ++CONFIG_POWER_RESET=y ++# CONFIG_POWER_RESET_BRCMKONA is not set ++# CONFIG_POWER_RESET_BRCMSTB is not set ++# CONFIG_POWER_RESET_GPIO is not set ++# CONFIG_POWER_RESET_GPIO_RESTART is not set ++CONFIG_POWER_RESET_HISI=y ++# CONFIG_POWER_RESET_LTC2952 is not set ++# CONFIG_POWER_RESET_RESTART is not set ++# CONFIG_POWER_RESET_VERSATILE is not set ++CONFIG_POWER_RESET_SYSCON=y ++# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set ++# CONFIG_SYSCON_REBOOT_MODE is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_CHARGER_ADP5061 is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_CHARGER_SBS is not set ++# CONFIG_MANAGER_SBS is not set ++# CONFIG_BATTERY_BQ27XXX is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_LTC3651 is not set ++# CONFIG_CHARGER_DETECTOR_MAX14656 is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_BQ24257 is not set ++# CONFIG_CHARGER_BQ24735 is not set ++# CONFIG_CHARGER_BQ25890 is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_BATTERY_GAUGE_LTC2941 is not set ++# CONFIG_CHARGER_RT9455 is not set ++# CONFIG_HWMON is not set ++# CONFIG_THERMAL is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++CONFIG_MFD_CORE=y ++# CONFIG_MFD_ACT8945A is not set ++# CONFIG_MFD_AS3711 is not set ++# CONFIG_MFD_AS3722 is not set ++# CONFIG_PMIC_ADP5520 is not set ++# CONFIG_MFD_AAT2870_CORE is not set ++# CONFIG_MFD_ATMEL_FLEXCOM is not set ++# CONFIG_MFD_ATMEL_HLCDC is not set ++# CONFIG_MFD_BCM590XX is not set ++# CONFIG_MFD_BD9571MWV is not set ++# CONFIG_MFD_AXP20X_I2C is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_MFD_MADERA is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_DA9052_I2C is not set ++# CONFIG_MFD_DA9055 is not set ++# CONFIG_MFD_DA9062 is not set ++# CONFIG_MFD_DA9063 is not set ++# CONFIG_MFD_DA9150 is not set ++# CONFIG_MFD_DLN2 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_MFD_HI6421_PMIC is not set ++CONFIG_MFD_HISI_FMC=y ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_HTC_I2CPLD is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_88PM800 is not set ++# CONFIG_MFD_88PM805 is not set ++# CONFIG_MFD_88PM860X is not set ++# CONFIG_MFD_MAX14577 is not set ++# CONFIG_MFD_MAX77620 is not set ++# CONFIG_MFD_MAX77686 is not set ++# CONFIG_MFD_MAX77693 is not set ++# CONFIG_MFD_MAX77843 is not set ++# CONFIG_MFD_MAX8907 is not set ++# CONFIG_MFD_MAX8925 is not set ++# CONFIG_MFD_MAX8997 is not set ++# CONFIG_MFD_MAX8998 is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_MENF21BMC is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CPCAP is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_PM8XXX is not set ++# CONFIG_MFD_RT5033 is not set ++# CONFIG_MFD_RC5T583 is not set ++# CONFIG_MFD_RK808 is not set ++# CONFIG_MFD_RN5T618 is not set ++# CONFIG_MFD_SEC_CORE is not set ++# CONFIG_MFD_SI476X_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_SKY81452 is not set ++# CONFIG_MFD_SMSC is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_STMPE is not set ++CONFIG_MFD_SYSCON=y ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_LP3943 is not set ++# CONFIG_MFD_LP8788 is not set ++# CONFIG_MFD_TI_LMU is not set ++# CONFIG_MFD_PALMAS is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65086 is not set ++# CONFIG_MFD_TPS65090 is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TI_LP873X is not set ++# CONFIG_MFD_TI_LP87565 is not set ++# CONFIG_MFD_TPS65218 is not set ++# CONFIG_MFD_TPS6586X is not set ++# CONFIG_MFD_TPS65910 is not set ++# CONFIG_MFD_TPS65912_I2C is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_TPS80031 is not set ++# CONFIG_TWL4030_CORE is not set ++# CONFIG_TWL6040_CORE is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_MFD_TC3589X is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM831X_I2C is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_WM8350_I2C is not set ++# CONFIG_MFD_WM8994 is not set ++# CONFIG_MFD_ROHM_BD718XX is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_RC_CORE is not set ++CONFIG_MEDIA_SUPPORT=y ++ ++# ++# Multimedia core support ++# ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set ++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set ++# CONFIG_MEDIA_RADIO_SUPPORT is not set ++# CONFIG_MEDIA_SDR_SUPPORT is not set ++# CONFIG_MEDIA_CEC_SUPPORT is not set ++# CONFIG_MEDIA_CONTROLLER is not set ++CONFIG_VIDEO_DEV=y ++CONFIG_VIDEO_V4L2=y ++# CONFIG_VIDEO_ADV_DEBUG is not set ++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++ ++# ++# Media drivers ++# ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=y ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++CONFIG_USB_GSPCA=m ++# CONFIG_USB_M5602 is not set ++# CONFIG_USB_STV06XX is not set ++# CONFIG_USB_GL860 is not set ++# CONFIG_USB_GSPCA_BENQ is not set ++# CONFIG_USB_GSPCA_CONEX is not set ++# CONFIG_USB_GSPCA_CPIA1 is not set ++# CONFIG_USB_GSPCA_DTCS033 is not set ++# CONFIG_USB_GSPCA_ETOMS is not set ++# CONFIG_USB_GSPCA_FINEPIX is not set ++# CONFIG_USB_GSPCA_JEILINJ is not set ++# CONFIG_USB_GSPCA_JL2005BCD is not set ++# CONFIG_USB_GSPCA_KINECT is not set ++# CONFIG_USB_GSPCA_KONICA is not set ++# CONFIG_USB_GSPCA_MARS is not set ++# CONFIG_USB_GSPCA_MR97310A is not set ++# CONFIG_USB_GSPCA_NW80X is not set ++# CONFIG_USB_GSPCA_OV519 is not set ++# CONFIG_USB_GSPCA_OV534 is not set ++# CONFIG_USB_GSPCA_OV534_9 is not set ++# CONFIG_USB_GSPCA_PAC207 is not set ++# CONFIG_USB_GSPCA_PAC7302 is not set ++# CONFIG_USB_GSPCA_PAC7311 is not set ++# CONFIG_USB_GSPCA_SE401 is not set ++# CONFIG_USB_GSPCA_SN9C2028 is not set ++# CONFIG_USB_GSPCA_SN9C20X is not set ++# CONFIG_USB_GSPCA_SONIXB is not set ++# CONFIG_USB_GSPCA_SONIXJ is not set ++# CONFIG_USB_GSPCA_SPCA500 is not set ++# CONFIG_USB_GSPCA_SPCA501 is not set ++# CONFIG_USB_GSPCA_SPCA505 is not set ++# CONFIG_USB_GSPCA_SPCA506 is not set ++# CONFIG_USB_GSPCA_SPCA508 is not set ++# CONFIG_USB_GSPCA_SPCA561 is not set ++# CONFIG_USB_GSPCA_SPCA1528 is not set ++# CONFIG_USB_GSPCA_SQ905 is not set ++# CONFIG_USB_GSPCA_SQ905C is not set ++# CONFIG_USB_GSPCA_SQ930X is not set ++# CONFIG_USB_GSPCA_STK014 is not set ++# CONFIG_USB_GSPCA_STK1135 is not set ++# CONFIG_USB_GSPCA_STV0680 is not set ++# CONFIG_USB_GSPCA_SUNPLUS is not set ++# CONFIG_USB_GSPCA_T613 is not set ++# CONFIG_USB_GSPCA_TOPRO is not set ++# CONFIG_USB_GSPCA_TOUPTEK is not set ++# CONFIG_USB_GSPCA_TV8532 is not set ++# CONFIG_USB_GSPCA_VC032X is not set ++# CONFIG_USB_GSPCA_VICAM is not set ++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set ++# CONFIG_USB_GSPCA_ZC3XX is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_VIDEO_USBTV is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set ++# CONFIG_V4L_PLATFORM_DRIVERS is not set ++# CONFIG_V4L_MEM2MEM_DRIVERS is not set ++# CONFIG_V4L_TEST_DRIVERS is not set ++ ++# ++# Supported MMC/SDIO adapters ++# ++# CONFIG_CYPRESS_FIRMWARE is not set ++CONFIG_VIDEOBUF2_CORE=y ++CONFIG_VIDEOBUF2_V4L2=y ++CONFIG_VIDEOBUF2_MEMOPS=y ++CONFIG_VIDEOBUF2_VMALLOC=y ++ ++# ++# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) ++# ++CONFIG_MEDIA_SUBDRV_AUTOSELECT=y ++ ++# ++# Audio decoders, processors and mixers ++# ++ ++# ++# RDS decoders ++# ++ ++# ++# Video decoders ++# ++ ++# ++# Video and audio decoders ++# ++ ++# ++# Video encoders ++# ++ ++# ++# Camera sensor devices ++# ++ ++# ++# Flash devices ++# ++ ++# ++# Video improvement chips ++# ++ ++# ++# Audio/Video compression chips ++# ++ ++# ++# SDR tuner chips ++# ++ ++# ++# Miscellaneous helper chips ++# ++ ++# ++# Sensors used on soc_camera driver ++# ++ ++# ++# Media SPI Adapters ++# ++ ++# ++# Tools to develop new frontends ++# ++ ++# ++# Graphics support ++# ++# CONFIG_IMX_IPUV3_CORE is not set ++# CONFIG_DRM is not set ++# CONFIG_DRM_DP_CEC is not set ++ ++# ++# ACP (Audio CoProcessor) Configuration ++# ++ ++# ++# AMD Library routines ++# ++ ++# ++# Frame buffer Devices ++# ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_NOTIFY=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_ARMCLCD is not set ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_SMSCUFX is not set ++# CONFIG_FB_UDL is not set ++# CONFIG_FB_IBM_GXT4500 is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_FB_SSD1307 is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++# CONFIG_FRAMEBUFFER_CONSOLE is not set ++# CONFIG_LOGO is not set ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++# CONFIG_SND_OSSEMUL is not set ++CONFIG_SND_PCM_TIMER=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_PROC_FS=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# HD-Audio ++# ++CONFIG_SND_HDA_PREALLOC_SIZE=64 ++CONFIG_SND_ARM=y ++# CONFIG_SND_ARMAACI is not set ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_USB_HIFACE is not set ++# CONFIG_SND_BCD2000 is not set ++# CONFIG_SND_USB_POD is not set ++# CONFIG_SND_USB_PODHD is not set ++# CONFIG_SND_USB_TONEPORT is not set ++# CONFIG_SND_USB_VARIAX is not set ++# CONFIG_SND_SOC is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_A4TECH=y ++# CONFIG_HID_ACCUTOUCH is not set ++# CONFIG_HID_ACRUX is not set ++CONFIG_HID_APPLE=y ++# CONFIG_HID_APPLEIR is not set ++# CONFIG_HID_AUREAL is not set ++CONFIG_HID_BELKIN=y ++# CONFIG_HID_BETOP_FF is not set ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++# CONFIG_HID_COUGAR is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CMEDIA is not set ++CONFIG_HID_CYPRESS=y ++# CONFIG_HID_DRAGONRISE is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_ELO is not set ++CONFIG_HID_EZKEY=y ++# CONFIG_HID_GEMBIRD is not set ++# CONFIG_HID_GFRM is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++# CONFIG_HID_GYRATION is not set ++# CONFIG_HID_ICADE is not set ++CONFIG_HID_ITE=y ++# CONFIG_HID_JABRA is not set ++# CONFIG_HID_TWINHAN is not set ++CONFIG_HID_KENSINGTON=y ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO is not set ++CONFIG_HID_LOGITECH=y ++# CONFIG_HID_LOGITECH_HIDPP is not set ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++# CONFIG_LOGIG940_FF is not set ++# CONFIG_LOGIWHEELS_FF is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MAYFLASH is not set ++CONFIG_HID_REDRAGON=y ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTI is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++# CONFIG_HID_PANTHERLORD is not set ++# CONFIG_HID_PENMOUNT is not set ++# CONFIG_HID_PETALYNX is not set ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PLANTRONICS is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_RETRODE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++# CONFIG_HID_SAMSUNG is not set ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEAM is not set ++# CONFIG_HID_STEELSERIES is not set ++# CONFIG_HID_SUNPLUS is not set ++# CONFIG_HID_RMI is not set ++# CONFIG_HID_GREENASIA is not set ++# CONFIG_HID_SMARTJOYPLUS is not set ++# CONFIG_HID_TIVO is not set ++# CONFIG_HID_TOPSEED is not set ++# CONFIG_HID_THRUSTMASTER is not set ++# CONFIG_HID_UDRAW_PS3 is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_XINMO is not set ++# CONFIG_HID_ZEROPLUS is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++# CONFIG_HID_ALPS is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=y ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=y ++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEFAULT_PERSIST=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_OTG is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++CONFIG_USB_XHCI_HCD=y ++# CONFIG_USB_XHCI_DBGCAP is not set ++CONFIG_USB_XHCI_PLATFORM=y ++# CONFIG_USB_EHCI_HCD is not set ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_FOTG210_HCD is not set ++# CONFIG_USB_MAX3421_HCD is not set ++# CONFIG_USB_OHCI_HCD is not set ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HCD_TEST_MODE is not set ++ ++# ++# USB Device Class drivers ++# ++# CONFIG_USB_ACM is not set ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++# CONFIG_USB_UAS is not set ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_USB_MUSB_HDRC is not set ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_HOST is not set ++CONFIG_USB_DWC3_GADGET=y ++ ++# ++# Platform Glue Driver Support ++# ++# CONFIG_USB_DWC3_OF_SIMPLE is not set ++# CONFIG_USB_DWC2 is not set ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_ISP1760 is not set ++ ++# ++# USB port drivers ++# ++# CONFIG_USB_SERIAL is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_EHSET_TEST_FIXTURE is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++# CONFIG_USB_HUB_USB251XB is not set ++# CONFIG_USB_HSIC_USB3503 is not set ++# CONFIG_USB_HSIC_USB4604 is not set ++# CONFIG_USB_LINK_LAYER_TEST is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_ULPI is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++# CONFIG_U_SERIAL_CONSOLE is not set ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_FUSB300 is not set ++# CONFIG_USB_FOTG210_UDC is not set ++# CONFIG_USB_GR_UDC is not set ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_PXA27X is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_MV_U3D is not set ++# CONFIG_USB_SNP_UDC_PLAT is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_BDC_UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_GADGET_XILINX is not set ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=y ++CONFIG_USB_F_ACM=y ++CONFIG_USB_U_SERIAL=y ++CONFIG_USB_U_ETHER=y ++CONFIG_USB_U_AUDIO=y ++CONFIG_USB_F_RNDIS=y ++CONFIG_USB_F_MASS_STORAGE=y ++CONFIG_USB_F_UAC1=y ++CONFIG_USB_F_UVC=y ++CONFIG_USB_CONFIGFS=y ++# CONFIG_USB_CONFIGFS_SERIAL is not set ++CONFIG_USB_CONFIGFS_ACM=y ++# CONFIG_USB_CONFIGFS_OBEX is not set ++# CONFIG_USB_CONFIGFS_NCM is not set ++# CONFIG_USB_CONFIGFS_ECM is not set ++# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set ++CONFIG_USB_CONFIGFS_RNDIS=y ++# CONFIG_USB_CONFIGFS_EEM is not set ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++# CONFIG_USB_CONFIGFS_F_LB_SS is not set ++# CONFIG_USB_CONFIGFS_F_FS is not set ++CONFIG_USB_CONFIGFS_F_UAC1=y ++# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set ++# CONFIG_USB_CONFIGFS_F_UAC2 is not set ++# CONFIG_USB_CONFIGFS_F_MIDI is not set ++# CONFIG_USB_CONFIGFS_F_HID is not set ++CONFIG_USB_CONFIGFS_F_UVC=y ++# CONFIG_USB_CONFIGFS_F_PRINTER is not set ++# CONFIG_TYPEC is not set ++# CONFIG_USB_ROLE_SWITCH is not set ++# CONFIG_USB_ULPI_BUS is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=y ++CONFIG_PWRSEQ_EMMC=y ++CONFIG_PWRSEQ_SIMPLE=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=8 ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_ARMMMCI is not set ++# CONFIG_MMC_SDHCI is not set ++# CONFIG_MMC_SPI is not set ++# CONFIG_MMC_DW is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MMC_USDHI6ROL0 is not set ++# CONFIG_MMC_CQHCI is not set ++# CONFIG_MMC_MTK is not set ++# CONFIG_MMC_CQ_HCI is not set ++CONFIG_HIMCI=y ++CONFIG_SEND_AUTO_STOP=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_SYSTOHC=y ++CONFIG_RTC_SYSTOHC_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++CONFIG_RTC_NVMEM=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_ABB5ZES3 is not set ++# CONFIG_RTC_DRV_ABX80X is not set ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_HYM8563 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_ISL12022 is not set ++# CONFIG_RTC_DRV_ISL12026 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8523 is not set ++# CONFIG_RTC_DRV_PCF85063 is not set ++# CONFIG_RTC_DRV_PCF85363 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_BQ32K is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++# CONFIG_RTC_DRV_RX8010 is not set ++# CONFIG_RTC_DRV_RX8581 is not set ++# CONFIG_RTC_DRV_RX8025 is not set ++# CONFIG_RTC_DRV_EM3027 is not set ++# CONFIG_RTC_DRV_RV8803 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T93 is not set ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1302 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_DS1343 is not set ++# CONFIG_RTC_DRV_DS1347 is not set ++# CONFIG_RTC_DRV_DS1390 is not set ++# CONFIG_RTC_DRV_MAX6916 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RX4581 is not set ++# CONFIG_RTC_DRV_RX6110 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_PCF2123 is not set ++# CONFIG_RTC_DRV_MCP795 is not set ++CONFIG_RTC_I2C_AND_SPI=y ++ ++# ++# SPI and I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS3232 is not set ++# CONFIG_RTC_DRV_PCF2127 is not set ++# CONFIG_RTC_DRV_RV3029C2 is not set ++ ++# ++# Platform RTC drivers ++# ++CONFIG_RTC_DRV_HIBVT=y ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1685_FAMILY is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_DS2404 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_MSM6242 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_RP5C01 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++# CONFIG_RTC_DRV_ZYNQMP is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_RTC_DRV_PL030 is not set ++# CONFIG_RTC_DRV_PL031 is not set ++# CONFIG_RTC_DRV_FTRTC010 is not set ++# CONFIG_RTC_DRV_SNVS is not set ++# CONFIG_RTC_DRV_R7301 is not set ++ ++# ++# HID Sensor RTC drivers ++# ++# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set ++# CONFIG_DMADEVICES is not set ++ ++# ++# DMABUF options ++# ++# CONFIG_SYNC_FILE is not set ++# CONFIG_AUXDISPLAY is not set ++# CONFIG_UIO is not set ++# CONFIG_VIRT_DRIVERS is not set ++CONFIG_VIRTIO_MENU=y ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++# CONFIG_GOLDFISH is not set ++# CONFIG_CHROME_PLATFORMS is not set ++# CONFIG_MELLANOX_PLATFORM is not set ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_COMMON_CLK=y ++ ++# ++# Common Clock Framework ++# ++# CONFIG_CLK_HSDK is not set ++# CONFIG_COMMON_CLK_MAX9485 is not set ++# CONFIG_COMMON_CLK_SI5351 is not set ++# CONFIG_COMMON_CLK_SI514 is not set ++# CONFIG_COMMON_CLK_SI544 is not set ++# CONFIG_COMMON_CLK_SI570 is not set ++# CONFIG_COMMON_CLK_CDCE706 is not set ++# CONFIG_COMMON_CLK_CDCE925 is not set ++# CONFIG_COMMON_CLK_CS2000_CP is not set ++# CONFIG_CLK_QORIQ is not set ++# CONFIG_COMMON_CLK_VC5 is not set ++CONFIG_COMMON_CLK_HI3516DV300=y ++CONFIG_RESET_HISI=y ++# CONFIG_HWSPINLOCK is not set ++ ++# ++# Clock Source drivers ++# ++CONFIG_TIMER_OF=y ++CONFIG_TIMER_PROBE=y ++CONFIG_CLKSRC_MMIO=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set ++CONFIG_ARM_TIMER_SP804=y ++# CONFIG_TIMER_HISP804 is not set ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_REMOTEPROC is not set ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_RPMSG_VIRTIO is not set ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++ ++# ++# Amlogic SoC drivers ++# ++ ++# ++# Broadcom SoC drivers ++# ++# CONFIG_SOC_BRCMSTB is not set ++ ++# ++# NXP/Freescale QorIQ SoC drivers ++# ++ ++# ++# i.MX SoC drivers ++# ++ ++# ++# Qualcomm SoC drivers ++# ++# CONFIG_SOC_TI is not set ++ ++# ++# Xilinx SoC drivers ++# ++# CONFIG_XILINX_VCU is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++# CONFIG_PWM is not set ++ ++# ++# IRQ chip support ++# ++CONFIG_IRQCHIP=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_GIC_MAX_NR=1 ++# CONFIG_IPACK_BUS is not set ++CONFIG_RESET_CONTROLLER=y ++# CONFIG_RESET_TI_SYSCON is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++CONFIG_GENERIC_PHY=y ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_PHY_PXA_28NM_HSIC is not set ++# CONFIG_PHY_PXA_28NM_USB2 is not set ++# CONFIG_PHY_MAPPHONE_MDM6600 is not set ++CONFIG_HI_USB_PHY=y ++CONFIG_PHY_HISI_USB2=y ++CONFIG_HIBVT_USB_PHY=y ++CONFIG_USB_MODE_OPTION=y ++CONFIG_USB_DRD0_IN_HOST=y ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++# CONFIG_RAS is not set ++# CONFIG_DAX is not set ++CONFIG_NVMEM=y ++ ++# ++# HW tracing support ++# ++# CONFIG_STM is not set ++# CONFIG_INTEL_TH is not set ++# CONFIG_FPGA is not set ++# CONFIG_FSI is not set ++# CONFIG_TEE is not set ++# CONFIG_SIOX is not set ++# CONFIG_SLIMBUS is not set ++# CONFIG_HI_DMAC is not set ++# CONFIG_HIEDMAC is not set ++ ++# ++# Hisilicon driver support ++# ++# CONFIG_CMA_MEM_SHARED is not set ++# CONFIG_CMA_ADVANCE_SHARE is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_FS_IOMAP=y ++# CONFIG_EXT2_FS is not set ++# CONFIG_EXT3_FS is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_USE_FOR_EXT2=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++# CONFIG_EXT4_FS_SECURITY is not set ++# CONFIG_EXT4_ENCRYPTION is not set ++# CONFIG_EXT4_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_CHECK=y ++CONFIG_REISERFS_PROC_INFO=y ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_DEBUG=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++# CONFIG_XFS_ONLINE_SCRUB is not set ++# CONFIG_XFS_WARN is not set ++# CONFIG_XFS_DEBUG is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_EXPORTFS=y ++# CONFIG_EXPORTFS_BLOCK_OPS is not set ++CONFIG_FILE_LOCKING=y ++CONFIG_MANDATORY_FILE_LOCKING=y ++# CONFIG_FS_ENCRYPTION is not set ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTA_NETLINK_INTERFACE is not set ++CONFIG_QUOTACTL=y ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_FAT_DEFAULT_UTF8 is not set ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_CHILDREN is not set ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++CONFIG_MEMFD_CREATE=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_MISC_FILESYSTEMS=y ++# CONFIG_ORANGEFS_FS is not set ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_ECRYPT_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++CONFIG_JFFS2_RTIME=y ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_ATIME_SUPPORT is not set ++CONFIG_UBIFS_FS_XATTR=y ++# CONFIG_UBIFS_FS_ENCRYPTION is not set ++CONFIG_UBIFS_FS_SECURITY=y ++CONFIG_CRAMFS=y ++CONFIG_CRAMFS_BLOCKDEV=y ++# CONFIG_CRAMFS_MTD is not set ++# CONFIG_SQUASHFS is not set ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_QNX6FS_FS is not set ++# CONFIG_ROMFS_FS is not set ++# CONFIG_PSTORE is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V2=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++# CONFIG_NFS_SWAP is not set ++# CONFIG_NFS_V4_1 is not set ++# CONFIG_ROOT_NFS is not set ++# CONFIG_NFS_USE_LEGACY_DNS is not set ++CONFIG_NFS_USE_KERNEL_DNS=y ++# CONFIG_NFSD is not set ++CONFIG_GRACE_PERIOD=y ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_NFS_ACL_SUPPORT=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++CONFIG_SUNRPC_GSS=y ++# CONFIG_SUNRPC_DEBUG is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=y ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++CONFIG_NLS_UTF8=y ++# CONFIG_DLM is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_PERSISTENT_KEYRINGS is not set ++# CONFIG_BIG_KEYS is not set ++# CONFIG_ENCRYPTED_KEYS is not set ++# CONFIG_KEY_DH_OPERATIONS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y ++# CONFIG_HARDENED_USERCOPY is not set ++# CONFIG_FORTIFY_SOURCE is not set ++# CONFIG_STATIC_USERMODEHELPER is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD=m ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_RNG_DEFAULT=m ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_KPP2=y ++CONFIG_CRYPTO_ACOMP2=y ++# CONFIG_CRYPTO_RSA is not set ++# CONFIG_CRYPTO_DH is not set ++# CONFIG_CRYPTO_ECDH is not set ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_NULL2=y ++# CONFIG_CRYPTO_PCRYPT is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_MCRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_CHACHA20POLY1305 is not set ++# CONFIG_CRYPTO_AEGIS128 is not set ++# CONFIG_CRYPTO_AEGIS128L is not set ++# CONFIG_CRYPTO_AEGIS256 is not set ++# CONFIG_CRYPTO_MORUS640 is not set ++# CONFIG_CRYPTO_MORUS1280 is not set ++# CONFIG_CRYPTO_SEQIV is not set ++CONFIG_CRYPTO_ECHAINIV=m ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CFB is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_KEYWRAP is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_POLY1305 is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_SHA3 is not set ++# CONFIG_CRYPTO_SM3 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_TI is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_CHACHA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SM4 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y ++# CONFIG_CRYPTO_842 is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++# CONFIG_CRYPTO_ZSTD is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_DRBG_MENU=m ++CONFIG_CRYPTO_DRBG_HMAC=y ++# CONFIG_CRYPTO_DRBG_HASH is not set ++CONFIG_CRYPTO_DRBG=m ++CONFIG_CRYPTO_JITTERENTROPY=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_USER_API_RNG is not set ++# CONFIG_CRYPTO_USER_API_AEAD is not set ++CONFIG_CRYPTO_HW=y ++# CONFIG_CRYPTO_DEV_CCREE is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++ ++# ++# Certificates for signature checking ++# ++# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_RATIONAL=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++# CONFIG_CRC_CCITT is not set ++CONFIG_CRC16=y ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC64 is not set ++# CONFIG_CRC4 is not set ++# CONFIG_CRC7 is not set ++CONFIG_LIBCRC32C=m ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_XZ_DEC=y ++CONFIG_XZ_DEC_X86=y ++CONFIG_XZ_DEC_POWERPC=y ++CONFIG_XZ_DEC_IA64=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_ARMTHUMB=y ++CONFIG_XZ_DEC_SPARC=y ++CONFIG_XZ_DEC_BCJ=y ++# CONFIG_XZ_DEC_TEST is not set ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT_MAP=y ++CONFIG_HAS_DMA=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SGL_ALLOC=y ++CONFIG_CPU_RMAP=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_IRQ_POLL is not set ++CONFIG_LIBFDT=y ++CONFIG_OID_REGISTRY=y ++CONFIG_SG_POOL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_SBITMAP=y ++# CONFIG_STRING_SELFTEST is not set ++ ++# ++# Kernel hacking ++# ++ ++# ++# printk and dmesg options ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 ++CONFIG_CONSOLE_LOGLEVEL_QUIET=4 ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++ ++# ++# Compile-time checks and compiler options ++# ++# CONFIG_DEBUG_INFO is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_PAGE_OWNER is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_SECTION_MISMATCH_WARN_ONLY=y ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_MAGIC_SYSRQ is not set ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_PAGE_POISONING is not set ++# CONFIG_DEBUG_RODATA_TEST is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y ++# CONFIG_DEBUG_VIRTUAL is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_PER_CPU_MAPS is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_ARCH_HAS_KCOV=y ++CONFIG_CC_HAS_SANCOV_TRACE_PC=y ++# CONFIG_KCOV is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_SOFTLOCKUP_DETECTOR is not set ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_WQ_WATCHDOG is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++CONFIG_PANIC_TIMEOUT=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_SCHED_STACK_END_CHECK is not set ++# CONFIG_DEBUG_TIMEKEEPING is not set ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++CONFIG_LOCK_DEBUGGING_SUPPORT=y ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set ++# CONFIG_DEBUG_RWSEMS is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_LOCK_TORTURE_TEST is not set ++# CONFIG_WW_MUTEX_SELFTEST is not set ++CONFIG_STACKTRACE=y ++# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_PI_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_RCU_PERF_TEST is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=60 ++# CONFIG_RCU_TRACE is not set ++# CONFIG_RCU_EQS_DEBUG is not set ++# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++# CONFIG_DMA_API_DEBUG is not set ++CONFIG_RUNTIME_TESTING_MENU=y ++# CONFIG_LKDTM is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_TEST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PERCPU_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_PRINTF is not set ++# CONFIG_TEST_BITMAP is not set ++# CONFIG_TEST_BITFIELD is not set ++# CONFIG_TEST_UUID is not set ++# CONFIG_TEST_OVERFLOW is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_TEST_HASH is not set ++# CONFIG_TEST_IDA is not set ++# CONFIG_TEST_LKM is not set ++# CONFIG_TEST_USER_COPY is not set ++# CONFIG_TEST_BPF is not set ++# CONFIG_FIND_BIT_BENCHMARK is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_SYSCTL is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_TEST_STATIC_KEYS is not set ++# CONFIG_TEST_KMOD is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_BUG_ON_DATA_CORRUPTION is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_UBSAN is not set ++CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y ++CONFIG_STRICT_DEVMEM=y ++# CONFIG_IO_STRICT_DEVMEM is not set ++# CONFIG_ARM_PTDUMP_DEBUGFS is not set ++# CONFIG_DEBUG_WX is not set ++CONFIG_ARM_UNWIND=y ++# CONFIG_DEBUG_USER is not set ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++# CONFIG_PID_IN_CONTEXTIDR is not set ++# CONFIG_CORESIGHT is not set +diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h +index ea9bd0889..dbe96664b 100644 +--- a/arch/arm/include/asm/mach/pci.h ++++ b/arch/arm/include/asm/mach/pci.h +@@ -9,6 +9,7 @@ + #define __ASM_MACH_PCI_H + + #include ++#include + + struct pci_sys_data; + struct pci_ops; +@@ -16,7 +17,25 @@ struct pci_bus; + struct pci_host_bridge; + struct device; + ++#ifdef CONFIG_PCI_MSI ++#define HISI_PCI_MSI_NR (8 * 32) ++struct hisi_msi { ++ struct msi_controller chip; ++ DECLARE_BITMAP(used, HISI_PCI_MSI_NR); ++ struct irq_domain *domain; ++ unsigned long pages; ++ struct mutex lock; ++ int irq; ++}; ++#endif + struct hw_pci { ++#ifdef CONFIG_PCI_DOMAINS ++ int domain; ++#endif ++#ifdef CONFIG_PCI_MSI ++ struct hisi_msi msi; ++#endif ++ struct device *dev; + struct pci_ops *ops; + int nr_controllers; + void **private_data; +@@ -26,12 +45,17 @@ struct hw_pci { + void (*postinit)(void); + u8 (*swizzle)(struct pci_dev *dev, u8 *pin); + int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); ++ void (*add_bus)(struct pci_bus *bus); ++ void (*remove_bus)(struct pci_bus *bus); + }; + + /* + * Per-controller structure + */ + struct pci_sys_data { ++#ifdef CONFIG_PCI_DOMAINS ++ int domain; ++#endif + struct list_head node; + int busnr; /* primary bus number */ + u64 mem_offset; /* bus->cpu memory mapping offset */ +diff --git a/arch/arm/include/asm/vdso/gettimeofday.h b/arch/arm/include/asm/vdso/gettimeofday.h +index 2134cbd54..6f078fedb 100644 +--- a/arch/arm/include/asm/vdso/gettimeofday.h ++++ b/arch/arm/include/asm/vdso/gettimeofday.h +@@ -109,14 +109,14 @@ static __always_inline int clock_getres32_fallback( + + static inline bool arm_vdso_hres_capable(void) + { +- return IS_ENABLED(CONFIG_ARM_ARCH_TIMER); ++ return 0; + } + #define __arch_vdso_hres_capable arm_vdso_hres_capable + + static __always_inline u64 __arch_get_hw_counter(int clock_mode, + const struct vdso_data *vd) + { +-#ifdef CONFIG_ARM_ARCH_TIMER ++#if defined (CONFIG_ARM_ARCH_TIMER) && defined(CONFIG_ARM_ARCH_TIMER_VCT_ACCESS) + u64 cycle_now; + + /* +diff --git a/arch/arm/mach-hibvt/Kconfig b/arch/arm/mach-hibvt/Kconfig +new file mode 100644 +index 000000000..89bedcb95 +--- /dev/null ++++ b/arch/arm/mach-hibvt/Kconfig +@@ -0,0 +1,269 @@ ++config ARCH_HISI_BVT ++ bool "Hisilicon BVT SoC Support" ++ select ARM_AMBA ++ select ARM_GIC if ARCH_MULTI_V7 ++ select ARM_VIC if ARCH_MULTI_V5 ++ select ARM_TIMER_SP804 ++ select POWER_RESET ++ select POWER_SUPPLY ++ ++if ARCH_HISI_BVT ++ ++menu "Hisilicon BVT platform type" ++ ++config ARCH_HI3521DV200 ++ bool "Hisilicon Hi3521DV200 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3521DV200 Soc family. ++ ++config ARCH_HI3520DV500 ++ bool "Hisilicon Hi3520DV500 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3520DV500 Soc family. ++ ++config ARCH_HI3516A ++ bool "Hisilicon Hi3516A Cortex-A7(Single) family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_GIC ++ select ARCH_HAS_RESET_CONTROLLER ++ select RESET_CONTROLLER ++ help ++ Support for Hisilicon Hi3516A Soc family. ++ ++config ARCH_HI3516CV500 ++ bool "Hisilicon Hi3516CV500 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3516CV500 Soc family. ++ ++config ARCH_HI3516DV300 ++ bool "Hisilicon Hi3516DV300 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3516DV300 Soc family. ++ ++config ARCH_HI3516EV200 ++ bool "Hisilicon Hi3516EV200 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3516EV200 Soc family. ++ ++config ARCH_HI3516EV300 ++ bool "Hisilicon Hi3516EV300 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3516EV300 Soc family. ++ ++config ARCH_HI3518EV300 ++ bool "Hisilicon Hi3518EV300 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3518EV300 Soc family. ++ ++config ARCH_HI3516DV200 ++ bool "Hisilicon Hi3516DV200 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3516DV200 Soc family. ++config ARCH_HI3556V200 ++ bool "Hisilicon Hi3556V200 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3556V200 Soc family. ++ ++config ARCH_HI3559V200 ++ bool "Hisilicon Hi3559V200 Cortex-A7 family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ select POWER_RESET_HISI ++ help ++ Support for Hisilicon Hi3559V200 Soc family. ++ ++config ARCH_HI3518EV20X ++ bool "Hisilicon Hi3518ev20x ARM926T(Single) family" ++ depends on ARCH_MULTI_V5 ++ select PINCTRL ++ select PINCTRL_SINGLE ++ help ++ Support for Hisilicon Hi3518ev20x Soc family. ++ ++config ARCH_HI3536DV100 ++ bool "Hisilicon Hi3536DV100 Cortex-A7(Single) family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL ++ help ++ Support for Hisilicon Hi3536DV100 Soc family. ++ ++config ARCH_HI3521A ++ bool "Hisilicon Hi3521A A7(Single) family" ++ depends on ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_GIC ++ select PINCTRL ++ select PINCTRL_SINGLE ++ help ++ Support for Hisilicon Hi3521a Soc family. ++ ++config ARCH_HI3531A ++ bool "Hisilicon Hi3531A A9 family" if ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_GIC ++ select CACHE_L2X0 ++ select PINCTRL ++ select PINCTRL_SINGLE ++ select HAVE_ARM_SCU if SMP ++ select NEED_MACH_IO_H if PCI ++ help ++ Support for Hisilicon Hi3531a Soc family. ++ ++config ARCH_HI3556AV100 ++ bool "Hisilicon Hi3556AV100 Cortex-a53 family" if ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_CCI ++ select ARCH_HAS_RESET_CONTROLLER ++ select RESET_CONTROLLER ++ select PMC if SMP ++ help ++ Support for Hisilicon Hi3556AV100 Soc family ++if ARCH_HI3556AV100 ++ ++config PMC ++ bool ++ depends on ARCH_HI3556AV100 ++ help ++ support power control for Hi3556AV100 Cortex-a53 ++ ++endif ++ ++config ARCH_HI3519AV100 ++ bool "Hisilicon Hi3519AV100 Cortex-a53 family" if ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_CCI ++ select ARM_GIC ++ select ARCH_HAS_RESET_CONTROLLER ++ select RESET_CONTROLLER ++ select NEED_MACH_IO_H if PCI ++ select PMC if SMP ++ help ++ Support for Hisilicon Hi3519AV100 Soc family ++if ARCH_HI3519AV100 ++ ++config PMC ++ bool ++ depends on ARCH_HI3519AV100 ++ help ++ support power control for Hi3519AV100 Cortex-a53 ++ ++endif ++ ++config ARCH_HI3568V100 ++ bool "Hisilicon Hi3568V100 Cortex-a53 family" if ARCH_MULTI_V7 ++ select HAVE_ARM_ARCH_TIMER ++ select ARM_CCI ++ select ARM_GIC ++ select ARCH_HAS_RESET_CONTROLLER ++ select RESET_CONTROLLER ++ select NEED_MACH_IO_H if PCI ++ select PMC if SMP ++ help ++ Support for Hisilicon Hi3568V100 Soc family ++if ARCH_HI3568V100 ++ ++config PMC ++ bool ++ depends on ARCH_HI3568V100 ++ help ++ support power control for Hi3568V100 Cortex-a53 ++ ++endif ++ ++config ARCH_HISI_BVT_AMP ++ bool "Hisilicon AMP solution support" ++ depends on ARCH_HI3556AV100 || ARCH_HI3519AV100 || ARCH_HI3516CV500 || ARCH_HI3516DV300 || ARCH_HI3556V200 || ARCH_HI3559V200 || ARCH_HI3562V100 || ARCH_HI3566V100 || ARCH_HI3568V100 ++ help ++ support for Hisilicon AMP solution ++ ++config HISI_MC ++ bool "Hisilicon mc platform solution" ++ default n ++ help ++ support for Hisilicon mc platform solution ++ ++config AMP_ZRELADDR ++ hex 'amp zreladdr' ++ depends on ARCH_HISI_BVT_AMP ++ default "0x32008000" if ARCH_HI3556AV100 || ARCH_HI3519AV100 || ARCH_HI3568V100 ++ default "0x82008000" if ARCH_HI3516CV500 || ARCH_HI3516DV300 || ARCH_HI3556V200 || ARCH_HI3559V200 || ARCH_HI3562V100 || ARCH_HI3566V100 ++ default "0x42008000" if ARCH_HI3516EV200 || ARCH_HI3516EV300 || ARCH_HI3518EV300 || ARCH_HI3516DV200 ++config HI_ZRELADDR ++ hex 'zreladdr' ++ default "0x40008000" if ARCH_HI3521DV200 ++ default "0x40008000" if ARCH_HI3520DV500 ++ default "0x80008000" if ARCH_HI3516CV500 ++ default "0x80008000" if ARCH_HI3516DV300 ++ default "0x80008000" if ARCH_HI3556V200 ++ default "0x80008000" if ARCH_HI3559V200 ++ default "0x80008000" if ARCH_HI3562V100 ++ default "0x80008000" if ARCH_HI3566V100 ++ default "0x80008000" if ARCH_HI3516A ++ default "0x80008000" if ARCH_HI3518EV20X ++ default "0x80008000" if ARCH_HI3536DV100 ++ default "0x80008000" if ARCH_HI3521A ++ default "0x40008000" if ARCH_HI3531A ++ default "0x40008000" if ARCH_HI3516EV200 || ARCH_HI3516EV300 || ARCH_HI3518EV300 || ARCH_HI3516DV200 ++ default "0x22008000" if ARCH_HI3556AV100 || ARCH_HI3519AV100 || ARCH_HI3568V100 ++ ++config HI_PARAMS_PHYS ++ hex 'params_phys' ++ default "0x00000100" ++ ++config HI_INITRD_PHYS ++ hex 'initrd_phys' ++ default "0x00800000" ++ ++endmenu ++ ++if ARCH_HI3516DV300 ++ ++config BLACKBOX_HI3516DV300 ++ bool "Support BlackBox saving fault logs with pstore for hi3516dv300" ++ depends on PSTORE_BLACKBOX ++ depends on BLACKBOX_STORAGE_BY_PSTORE_BLK ++ help ++ Save fault logs with pstore for Hi3516DV300 when oops or panic occurs. ++ ++endif ++ ++endif +diff --git a/arch/arm/mach-hibvt/Makefile b/arch/arm/mach-hibvt/Makefile +new file mode 100644 +index 000000000..8c4802fd1 +--- /dev/null ++++ b/arch/arm/mach-hibvt/Makefile +@@ -0,0 +1,34 @@ ++# ++# Makefile for Hisilicon processors family ++# ++ ++obj-$(CONFIG_ARCH_HI3521DV200) += mach-hi3521dv200.o ++obj-$(CONFIG_ARCH_HI3520DV500) += mach-hi3521dv200.o ++obj-$(CONFIG_ARCH_HI3516A) += mach-hi3516a.o ++obj-$(CONFIG_ARCH_HI3516CV500) += mach-hi3516cv500.o ++obj-$(CONFIG_ARCH_HI3516EV200) += mach-hi3516ev200.o ++obj-$(CONFIG_ARCH_HI3516EV300) += mach-hi3516ev300.o ++obj-$(CONFIG_ARCH_HI3518EV300) += mach-hi3518ev300.o ++obj-$(CONFIG_ARCH_HI3516DV200) += mach-hi3516dv200.o ++obj-$(CONFIG_ARCH_HI3516DV300) += mach-hi3516dv300.o ++obj-$(CONFIG_ARCH_HI3556V200) += mach-hi3556v200.o ++obj-$(CONFIG_ARCH_HI3559V200) += mach-hi3559v200.o ++obj-$(CONFIG_ARCH_HI3562V100) += mach-hi3559v200.o ++obj-$(CONFIG_ARCH_HI3566V100) += mach-hi3559v200.o ++obj-$(CONFIG_ARCH_HI3518EV20X) += mach-hi3518ev20x.o ++obj-$(CONFIG_ARCH_HI3536DV100) += mach-hi3536dv100.o ++obj-$(CONFIG_ARCH_HI3521A) += mach-hi3521a.o ++obj-$(CONFIG_ARCH_HI3531A) += mach-hi3531a.o ++obj-$(CONFIG_ARCH_HI3556AV100) += mach-hi3556av100.o ++obj-$(CONFIG_ARCH_HI3519AV100) += mach-hi3519av100.o ++obj-$(CONFIG_ARCH_HI3568V100) += mach-hi3519av100.o ++ ++ ++obj-$(CONFIG_SMP) += platsmp.o ++ ++ifdef CONFIG_BLACKBOX_HI3516DV300 ++ ++obj-$(CONFIG_BLACKBOX_STORAGE_BY_PSTORE_BLK) += system_adapter.o ++obj-$(CONFIG_BLACKBOX_STORAGE_BY_MEMORY) += system_adapter_by_memory.o ++ ++endif +diff --git a/arch/arm/mach-hibvt/Makefile.boot b/arch/arm/mach-hibvt/Makefile.boot +new file mode 100644 +index 000000000..8c8b30077 +--- /dev/null ++++ b/arch/arm/mach-hibvt/Makefile.boot +@@ -0,0 +1,7 @@ ++ifeq ($(CONFIG_ARCH_HISI_BVT_AMP), y) ++zreladdr-$(CONFIG_ARCH_HISI_BVT) := $(CONFIG_AMP_ZRELADDR) ++else ++zreladdr-$(CONFIG_ARCH_HISI_BVT) := $(CONFIG_HI_ZRELADDR) ++endif ++params_phys-$(CONFIG_ARCH_HISI_BVT) := $(CONFIG_HI_PARAMS_PHYS) ++initrd_phys-$(CONFIG_ARCH_HISI_BVT) := $(CONFIG_HI_INITRD_PHYS) +diff --git a/arch/arm/mach-hibvt/include/mach/hi3516dv300_io.h b/arch/arm/mach-hibvt/include/mach/hi3516dv300_io.h +new file mode 100644 +index 000000000..72ab47e83 +--- /dev/null ++++ b/arch/arm/mach-hibvt/include/mach/hi3516dv300_io.h +@@ -0,0 +1,26 @@ ++#ifndef __HI3516DV300_IO_H ++#define __HI3516DV300_IO_H ++ ++/* ++ * phy: 0x20000000 ~ 0x20700000 ++ * vir: 0xFE100000 ~ 0xFE800000 ++ */ ++#define HI3516DV300_IOCH2_PHYS 0x20000000 ++#define IO_OFFSET_HIGH 0xDE100000 ++#define HI3516DV300_IOCH2_VIRT (HI3516DV300_IOCH2_PHYS + IO_OFFSET_HIGH) ++#define HI3516DV300_IOCH2_SIZE 0x700000 ++ ++/* phy: 0x10000000 ~ 0x100E0000 ++ * vir: 0xFE000000 ~ 0xFE0E0000 ++ */ ++#define HI3516DV300_IOCH1_PHYS 0x10000000 ++#define IO_OFFSET_LOW 0xEE000000 ++#define HI3516DV300_IOCH1_VIRT (HI3516DV300_IOCH1_PHYS + IO_OFFSET_LOW) ++#define HI3516DV300_IOCH1_SIZE 0xE0000 ++ ++#define IO_ADDRESS(x) ((x) >= HI3516DV300_IOCH2_PHYS ? (x) + IO_OFFSET_HIGH \ ++ : (x) + IO_OFFSET_LOW) ++ ++#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) ++ ++#endif +diff --git a/arch/arm/mach-hibvt/include/mach/hi3516dv300_platform.h b/arch/arm/mach-hibvt/include/mach/hi3516dv300_platform.h +new file mode 100644 +index 000000000..94c48064b +--- /dev/null ++++ b/arch/arm/mach-hibvt/include/mach/hi3516dv300_platform.h +@@ -0,0 +1,4 @@ ++#ifndef __HI3516DV300_CHIP_REGS_H__ ++#define __HI3516DV300_CHIP_REGS_H__ ++ ++#endif /* End of __HI3516DV300_CHIP_REGS_H__ */ +diff --git a/arch/arm/mach-hibvt/include/mach/io.h b/arch/arm/mach-hibvt/include/mach/io.h +new file mode 100644 +index 000000000..b5fd58c7b +--- /dev/null ++++ b/arch/arm/mach-hibvt/include/mach/io.h +@@ -0,0 +1,52 @@ ++#ifndef __ASM_ARM_ARCH_IO_H ++#define __ASM_ARM_ARCH_IO_H ++ ++#ifdef CONFIG_ARCH_HI3516A ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3518EV20X ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3536DV100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3521A ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3531A ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3516CV500 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3516DV300 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3556V200 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3559V200 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3562V100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3566V100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3519AV100 ++#include ++#endif ++ ++#endif +diff --git a/arch/arm/mach-hibvt/include/mach/platform.h b/arch/arm/mach-hibvt/include/mach/platform.h +new file mode 100644 +index 000000000..5e41d2696 +--- /dev/null ++++ b/arch/arm/mach-hibvt/include/mach/platform.h +@@ -0,0 +1,52 @@ ++#ifndef __HISI_PLATFORM_H__ ++#define __HISI_PLATFORM_H__ ++ ++#ifdef CONFIG_ARCH_HI3536DV100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3521A ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3531A ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3516DV300 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3516CV500 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3556V200 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3559V200 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3562V100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3566V100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3556AV100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3519AV100 ++#include ++#endif ++ ++#ifdef CONFIG_ARCH_HI3568V100 ++#include ++#endif ++ ++#endif /* End of __HISI_PLATFORM_H__ */ +diff --git a/arch/arm/mach-hibvt/mach-common.h b/arch/arm/mach-hibvt/mach-common.h +new file mode 100644 +index 000000000..f5edadb0f +--- /dev/null ++++ b/arch/arm/mach-hibvt/mach-common.h +@@ -0,0 +1,9 @@ ++#ifndef __SMP_COMMON_H ++#define __SMP_COMMON_H ++ ++#ifdef CONFIG_SMP ++void hi35xx_set_cpu(unsigned int cpu, bool enable); ++void __init hi35xx_smp_prepare_cpus(unsigned int max_cpus); ++int hi35xx_boot_secondary(unsigned int cpu, struct task_struct *idle); ++#endif /* CONFIG_SMP */ ++#endif /* __SMP_COMMON_H */ +diff --git a/arch/arm/mach-hibvt/mach-hi3516dv300.c b/arch/arm/mach-hibvt/mach-hi3516dv300.c +new file mode 100644 +index 000000000..3061683bb +--- /dev/null ++++ b/arch/arm/mach-hibvt/mach-hi3516dv300.c +@@ -0,0 +1,68 @@ ++/* ++ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++*/ ++ ++#include ++#include ++ ++#include "mach-common.h" ++ ++#ifdef CONFIG_SMP ++ ++#define REG_CPU_SRST_CRG 0x78 ++#define CPU1_SRST_REQ BIT(2) ++#define DBG1_SRST_REQ BIT(4) ++ ++void hi35xx_set_cpu(unsigned int cpu, bool enable) ++{ ++ struct device_node *np = NULL; ++ unsigned int regval; ++ void __iomem *crg_base; ++ ++ np = of_find_compatible_node(NULL, NULL, "hisilicon,hi3516dv300-clock"); ++ if (!np) { ++ pr_err("failed to find hisilicon clock node\n"); ++ return; ++ } ++ ++ crg_base = of_iomap(np, 0); ++ if (!crg_base) { ++ pr_err("failed to map address\n"); ++ return; ++ } ++ ++ if (enable) { ++ /* clear the slave cpu reset */ ++ regval = readl(crg_base + REG_CPU_SRST_CRG); ++ regval &= ~CPU1_SRST_REQ; ++ writel(regval, (crg_base + REG_CPU_SRST_CRG)); ++ } else { ++ regval = readl(crg_base + REG_CPU_SRST_CRG); ++ regval |= (DBG1_SRST_REQ | CPU1_SRST_REQ); ++ writel(regval, (crg_base + REG_CPU_SRST_CRG)); ++ } ++ iounmap(crg_base); ++} ++ ++static const struct smp_operations hi35xx_smp_ops __initconst = { ++ .smp_prepare_cpus = hi35xx_smp_prepare_cpus, ++ .smp_boot_secondary = hi35xx_boot_secondary, ++}; ++ ++CPU_METHOD_OF_DECLARE(hi3516dv300_smp, "hisilicon,hi3516dv300", ++ &hi35xx_smp_ops); ++#endif /* CONFIG_SMP */ +diff --git a/arch/arm/mach-hibvt/platsmp.c b/arch/arm/mach-hibvt/platsmp.c +new file mode 100644 +index 000000000..a73be20b1 +--- /dev/null ++++ b/arch/arm/mach-hibvt/platsmp.c +@@ -0,0 +1,62 @@ ++/* ++ * Copyright (c) 2013 Linaro Ltd. ++ * Copyright (c) 2013 Hisilicon Limited. ++ * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include "mach-common.h" ++ ++#define HI35XX_BOOT_ADDRESS 0x00000000 ++ ++void __init hi35xx_smp_prepare_cpus(unsigned int max_cpus) ++{ ++ unsigned long base = 0; ++ void __iomem *scu_base = NULL; ++ ++ if (scu_a9_has_base()) { ++ base = scu_a9_get_base(); ++ scu_base = ioremap(base, PAGE_SIZE); ++ if (!scu_base) { ++ pr_err("ioremap(scu_base) failed\n"); ++ return; ++ } ++ ++ scu_enable(scu_base); ++ iounmap(scu_base); ++ } ++} ++ ++void hi35xx_set_scu_boot_addr(phys_addr_t start_addr, phys_addr_t jump_addr) ++{ ++ void __iomem *virt; ++ ++ virt = ioremap(start_addr, PAGE_SIZE); ++ if (!virt) { ++ pr_err("ioremap(start_addr) failed\n"); ++ return; ++ } ++ ++ writel_relaxed(0xe51ff004, virt); /* ldr pc, [rc, #-4] */ ++ writel_relaxed(jump_addr, virt + 4); /* pc jump phy address */ ++ iounmap(virt); ++} ++ ++int hi35xx_boot_secondary(unsigned int cpu, struct task_struct *idle) ++{ ++ phys_addr_t jumpaddr; ++ ++ jumpaddr = virt_to_phys(secondary_startup); ++ hi35xx_set_scu_boot_addr(HI35XX_BOOT_ADDRESS, jumpaddr); ++ hi35xx_set_cpu(cpu, true); ++ arch_send_wakeup_ipi_mask(cpumask_of(cpu)); ++ return 0; ++} ++ +diff --git a/arch/arm/mach-hibvt/system_adapter.c b/arch/arm/mach-hibvt/system_adapter.c +new file mode 100644 +index 000000000..58fe574b3 +--- /dev/null ++++ b/arch/arm/mach-hibvt/system_adapter.c +@@ -0,0 +1,340 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2021 Huawei Technologies Co., Ltd. All rights reserved. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* ---- local macroes ---- */ ++#define BOOTLOADER_LOG_NAME "fastboot_log" ++#define KERNEL_LOG_NAME "last_kmsg" ++#define SIZE_1K 1024 ++#define KERNEL_LOG_MAX_SIZE \ ++ round_up((0x80000 + sizeof(struct fault_log_info)), SIZE_1K) ++#define CALLSTACK_MAX_ENTRIES 20 ++ ++/* ---- local prototypes ---- */ ++ ++/* ---- local function prototypes ---- */ ++static int save_kmsg_from_buffer(const char *log_dir, ++ const char *file_name, int clean_buf); ++static void dump(const char *log_dir, struct error_info *info); ++static void reset(struct error_info *info); ++static int get_last_log_info(struct error_info *info); ++static int save_last_log(const char *log_dir, struct error_info *info); ++static int bbox_reboot_notify(struct notifier_block *nb, ++ unsigned long code, void *unused); ++static int bbox_task_panic(struct notifier_block *this, ++ unsigned long event, void *ptr); ++ ++/* ---- local variables ---- */ ++static char *kernel_log; ++static DEFINE_SEMAPHORE(kmsg_sem); ++static struct notifier_block bbox_reboot_nb = { ++ .notifier_call = bbox_reboot_notify, ++}; ++ ++static struct notifier_block bbox_panic_block = { ++ .notifier_call = bbox_task_panic, ++}; ++ ++/* ---- function definitions ---- */ ++static void dump_stacktrace(char *pbuf, size_t buf_size, bool is_panic) ++{ ++ int i; ++ size_t stack_len = 0; ++ size_t com_len = 0; ++ unsigned long entries[CALLSTACK_MAX_ENTRIES]; ++ unsigned int nr_entries; ++ char tmp_buf[ERROR_DESC_MAX_LEN]; ++ bool find_panic = false; ++ ++ if (unlikely(!pbuf || !buf_size)) ++ return; ++ ++ memset(pbuf, 0, buf_size); ++ memset(tmp_buf, 0, sizeof(tmp_buf)); ++ nr_entries = stack_trace_save(entries, ARRAY_SIZE(entries), 0); ++ com_len = scnprintf(pbuf, buf_size, "Comm:%s,CPU:%d,Stack:", ++ current->comm, raw_smp_processor_id()); ++ for (i = 0; i < nr_entries; i++) { ++ if (stack_len >= sizeof(tmp_buf)) { ++ tmp_buf[sizeof(tmp_buf) - 1] = '\0'; ++ break; ++ } ++ stack_len += scnprintf(tmp_buf + stack_len, sizeof(tmp_buf) - stack_len, ++ "%pS-", (void *)entries[i]); ++ if (!find_panic && is_panic) { ++ if (strncmp(tmp_buf, "panic", strlen("panic")) == 0) ++ find_panic = true; ++ else ++ (void)memset(tmp_buf, 0, sizeof(tmp_buf)); ++ } ++ } ++ if (com_len >= buf_size) ++ return; ++ stack_len = min(buf_size - com_len, strlen(tmp_buf)); ++ memcpy(pbuf + com_len, tmp_buf, stack_len); ++ *(pbuf + buf_size - 1) = '\0'; ++} ++ ++static int save_kmsg_from_buffer(const char *log_dir, ++ const char *file_name, int clean_buf) ++{ ++ int ret = -1; ++ char path[PATH_MAX_LEN]; ++ struct fault_log_info *pinfo = NULL; ++ ++ if (unlikely(!log_dir || !file_name)) { ++ bbox_print_err("log_dir: %p, file_name: %p!\n", log_dir, file_name); ++ return -EINVAL; ++ } ++ ++ memset(path, 0, sizeof(path)); ++ (void)scnprintf(path, sizeof(path) - 1, "%s/%s", log_dir, file_name); ++ down(&kmsg_sem); ++ if (kernel_log) { ++ pinfo = (struct fault_log_info *)kernel_log; ++ ret = full_write_file(path, kernel_log + sizeof(*pinfo), ++ min(KERNEL_LOG_MAX_SIZE - sizeof(*pinfo), ++ (size_t)pinfo->len), 0); ++ if (clean_buf) ++ memset(kernel_log, 0, KERNEL_LOG_MAX_SIZE); ++ } else { ++ bbox_print_err("kernel_log: %p!\n", kernel_log); ++ } ++ up(&kmsg_sem); ++ if (ret == 0) ++ change_own(path, AID_ROOT, AID_SYSTEM); ++ ++ return ret; ++} ++ ++static void dump(const char *log_dir, struct error_info *info) ++{ ++ if (unlikely(!log_dir || !info)) { ++ bbox_print_err("log_dir: %p, info: %p!\n", log_dir, info); ++ return; ++ } ++ ++ if (!strcmp(info->event, EVENT_PANIC) || ++ !strcmp(info->event, EVENT_SYSREBOOT) || ++ !strcmp(info->event, EVENT_POWEROFF)) { ++ struct fault_log_info *pinfo = (struct fault_log_info *)kernel_log; ++ ++ if (down_trylock(&kmsg_sem) != 0) { ++ bbox_print_err("down_trylock failed!\n"); ++ return; ++ } ++ ++ if (kernel_log) { ++ memcpy(pinfo->flag, LOG_FLAG, strlen(LOG_FLAG)); ++ memcpy(&pinfo->info, info, sizeof(*info)); ++ ++#if __BITS_PER_LONG == 64 ++ __flush_dcache_area(kernel_log, KERNEL_LOG_MAX_SIZE); ++#else ++ __cpuc_flush_dcache_area(kernel_log, KERNEL_LOG_MAX_SIZE); ++#endif ++ } ++ ++ up(&kmsg_sem); ++ } else { ++ bbox_print_info("module [%s] starts saving log for event [%s]!\n", ++ info->module, info->event); ++ save_kmsg_from_buffer(log_dir, KERNEL_LOG_NAME, 0); ++ bbox_print_info("module [%s] ends saving log for event [%s]!\n", ++ info->module, info->event); ++ } ++} ++ ++static void reset(struct error_info *info) ++{ ++ if (unlikely(!info)) { ++ bbox_print_err("info: %p!\n", info); ++ return; ++ } ++ ++ if (!strcmp(info->event, EVENT_PANIC)) ++ emergency_restart(); ++} ++ ++static int get_last_log_info(struct error_info *info) ++{ ++ struct fault_log_info *pinfo = (struct fault_log_info *)kernel_log; ++ int log_size = KERNEL_LOG_MAX_SIZE; ++ unsigned int i = 0; ++ ++ if (unlikely(!info || !kernel_log)) ++ return -EINVAL; ++ ++ if (storage_lastword->get_log((void *)kernel_log, log_size) < 0) { ++ bbox_print_err("Get last log from strorage failed!\n"); ++ return -ENOENT; ++ } ++ ++ down(&kmsg_sem); ++ if (!memcmp(pinfo->flag, LOG_FLAG, strlen(LOG_FLAG))) { ++ memcpy(info, &pinfo->info, sizeof(*info)); ++ for (i = 0; i < strlen((*info).event); i++) ++ (*info).event[i] = toupper((*info).event[i]); ++ ++ if (strncmp((*info).module, "PSTORE", strlen("PSTORE")) == 0) ++ memcpy((*info).module, MODULE_SYSTEM, sizeof((*info).module)); ++ ++ up(&kmsg_sem); ++ return 0; ++ } ++ up(&kmsg_sem); ++ bbox_print_info("There's no valid fault log!\n"); ++ ++ return -ENOMSG; ++} ++ ++static int save_last_log(const char *log_dir, struct error_info *info) ++{ ++ int ret = -1; ++ ++ if (unlikely(!log_dir || !info)) { ++ bbox_print_err("log_dir: %p, info: %p!\n", log_dir, info); ++ return -EINVAL; ++ } ++ ++ ret = save_kmsg_from_buffer(log_dir, KERNEL_LOG_NAME, 1); ++ bbox_print_info("save last fault log %s!\n", ++ ret ? "failed" : "successfully"); ++ ++ return ret; ++} ++ ++static int bbox_reboot_notify(struct notifier_block *nb, ++ unsigned long code, void *unused) ++{ ++ char error_desc[ERROR_DESC_MAX_LEN]; ++ ++ /* notify blackbox to do dump */ ++ memset(error_desc, 0, sizeof(error_desc)); ++ dump_stacktrace(error_desc, sizeof(error_desc), false); ++ kmsg_dump(KMSG_DUMP_UNDEF); ++ ++ switch (code) { ++ case SYS_RESTART: ++ bbox_notify_error(EVENT_SYSREBOOT, MODULE_SYSTEM, error_desc, 1); ++ break; ++ case SYS_POWER_OFF: ++ bbox_notify_error(EVENT_POWEROFF, MODULE_SYSTEM, error_desc, 0); ++ break; ++ default: ++ bbox_print_err("Invalid event code: %lu!\n", code); ++ break; ++ } ++ ++ return NOTIFY_DONE; ++} ++ ++static int bbox_task_panic(struct notifier_block *this, ++ unsigned long event, void *ptr) ++{ ++ char error_desc[ERROR_DESC_MAX_LEN]; ++ ++ /* notify blackbox to do dump */ ++ kmsg_dump(KMSG_DUMP_OOPS); ++ memset(error_desc, 0, sizeof(error_desc)); ++ bbox_notify_error(EVENT_PANIC, MODULE_SYSTEM, error_desc, 1); ++ ++ return NOTIFY_DONE; ++} ++ ++#ifdef CONFIG_BLACKBOX_TEST ++static void test_bbox(void) ++{ ++ struct module_ops ops = { ++ .module = "TEST", ++ .dump = NULL, ++ .reset = NULL, ++ .get_last_log_info = NULL, ++ .save_last_log = NULL, ++ }; ++ ++ if (bbox_register_module_ops(&ops) != 0) { ++ bbox_print_err("bbox_register_module_ops failed!\n"); ++ return -EINVAL; ++ } ++ kmsg_dump(KMSG_DUMP_OOPS); ++ bbox_notify_error("EVENT_TEST", "TEST", "Test bbox_notify_error", 0); ++ ++} ++#endif ++ ++static int __init blackbox_init(void) ++{ ++ int ret = -1; ++ struct kmsg_dumper *dumper = NULL; ++ struct module_ops ops = { ++ .module = MODULE_SYSTEM, ++ .dump = dump, ++ .reset = reset, ++ .get_last_log_info = get_last_log_info, ++ .save_last_log = save_last_log, ++ }; ++ ++ if (bbox_register_module_ops(&ops) != 0) { ++ bbox_print_err("bbox_register_module_ops failed!\n"); ++ return -EINVAL; ++ } ++ ++ /* allocate buffer for kmsg */ ++ kernel_log = kmalloc(KERNEL_LOG_MAX_SIZE, GFP_KERNEL); ++ if (!kernel_log) ++ goto __err; ++ ++ bbox_print_info("kernel_log: %p for blackbox!\n", kernel_log); ++ ++ /* register kdumper */ ++ dumper = vmalloc(sizeof(*dumper)); ++ if (!dumper) ++ goto __err; ++ ++ memset(dumper, 0, sizeof(*dumper)); ++ dumper->max_reason = KMSG_DUMP_MAX; ++ dumper->dump = storage_lastword->blackbox_dump; ++ ret = kmsg_dump_register(dumper); ++ if (ret != 0) { ++ bbox_print_err("kmsg_dump_register failed!\n"); ++ goto __err; ++ } ++ atomic_notifier_chain_register(&panic_notifier_list, &bbox_panic_block); ++ ++ register_reboot_notifier(&bbox_reboot_nb); ++#ifdef CONFIG_BLACKBOX_TEST ++ test_bbox(); ++#endif ++ return 0; ++ ++__err: ++ kfree(kernel_log); ++ kernel_log = NULL; ++ ++ if (dumper) { ++ vfree(dumper); ++ dumper = NULL; ++ } ++ ++ return ret; ++} ++ ++postcore_initcall(blackbox_init); ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("Blackbox for system"); ++MODULE_AUTHOR("OHOS hi3516dv300"); +diff --git a/arch/arm/mach-hibvt/system_adapter_by_memory.c b/arch/arm/mach-hibvt/system_adapter_by_memory.c +new file mode 100644 +index 000000000..92a680a9e +--- /dev/null ++++ b/arch/arm/mach-hibvt/system_adapter_by_memory.c +@@ -0,0 +1,339 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2021 Huawei Technologies Co., Ltd. All rights reserved. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* ---- local macroes ---- */ ++#define BOOTLOADER_LOG_NAME "fastboot_log" ++#define KERNEL_LOG_NAME "last_kmsg" ++#define SIZE_1K 1024 ++#define KERNEL_LOG_MAX_SIZE \ ++ round_up((0x80000 + sizeof(struct fault_log_info)), SIZE_1K) ++#define CALLSTACK_MAX_ENTRIES 20 ++ ++/* ---- local prototypes ---- */ ++ ++/* ---- local function prototypes ---- */ ++static int save_kmsg_from_buffer(const char *log_dir, ++ const char *file_name, int clean_buf); ++static void dump(const char *log_dir, struct error_info *info); ++static void reset(struct error_info *info); ++static int get_last_log_info(struct error_info *info); ++static int save_last_log(const char *log_dir, struct error_info *info); ++static int bbox_reboot_notify(struct notifier_block *nb, ++ unsigned long code, void *unused); ++static int bbox_task_panic(struct notifier_block *this, ++ unsigned long event, void *ptr); ++ ++/* ---- local variables ---- */ ++static char *kernel_log; ++static DEFINE_SEMAPHORE(kmsg_sem); ++static struct notifier_block bbox_reboot_nb = { ++ .notifier_call = bbox_reboot_notify, ++}; ++ ++static struct notifier_block bbox_panic_block = { ++ .notifier_call = bbox_task_panic, ++}; ++ ++/* ---- function definitions ---- */ ++static void dump_stacktrace(char *pbuf, size_t buf_size, bool is_panic) ++{ ++ int i; ++ size_t stack_len = 0; ++ size_t com_len = 0; ++ unsigned long entries[CALLSTACK_MAX_ENTRIES]; ++ unsigned int nr_entries; ++ char tmp_buf[ERROR_DESC_MAX_LEN]; ++ bool find_panic = false; ++ ++ if (unlikely(!pbuf || !buf_size)) ++ return; ++ ++ memset(pbuf, 0, buf_size); ++ memset(tmp_buf, 0, sizeof(tmp_buf)); ++ nr_entries = stack_trace_save(entries, ARRAY_SIZE(entries), 0); ++ com_len = scnprintf(pbuf, buf_size, "Comm:%s,CPU:%d,Stack:", ++ current->comm, raw_smp_processor_id()); ++ for (i = 0; i < nr_entries; i++) { ++ if (stack_len >= sizeof(tmp_buf)) { ++ tmp_buf[sizeof(tmp_buf) - 1] = '\0'; ++ break; ++ } ++ stack_len += scnprintf(tmp_buf + stack_len, sizeof(tmp_buf) - stack_len, ++ "%pS-", (void *)entries[i]); ++ if (!find_panic && is_panic) { ++ if (strncmp(tmp_buf, "panic", strlen("panic")) == 0) ++ find_panic = true; ++ else ++ (void)memset(tmp_buf, 0, sizeof(tmp_buf)); ++ } ++ } ++ if (com_len >= buf_size) ++ return; ++ stack_len = min(buf_size - com_len, strlen(tmp_buf)); ++ memcpy(pbuf + com_len, tmp_buf, stack_len); ++ *(pbuf + buf_size - 1) = '\0'; ++} ++ ++static int save_kmsg_from_buffer(const char *log_dir, ++ const char *file_name, int clean_buf) ++{ ++ int ret = -1; ++ char path[PATH_MAX_LEN]; ++ struct fault_log_info *pinfo = NULL; ++ ++ if (unlikely(!log_dir || !file_name)) { ++ bbox_print_err("log_dir: %p, file_name: %p!\n", log_dir, file_name); ++ return -EINVAL; ++ } ++ ++ memset(path, 0, sizeof(path)); ++ (void)scnprintf(path, sizeof(path) - 1, "%s/%s", log_dir, file_name); ++ down(&kmsg_sem); ++ if (kernel_log) { ++ pinfo = (struct fault_log_info *)kernel_log; ++ ret = full_write_file(path, kernel_log + sizeof(*pinfo), ++ min(KERNEL_LOG_MAX_SIZE - sizeof(*pinfo), ++ (size_t)pinfo->len), 0); ++ if (clean_buf) ++ memset(kernel_log, 0, KERNEL_LOG_MAX_SIZE); ++ } else { ++ bbox_print_err("kernel_log: %p!\n", kernel_log); ++ } ++ up(&kmsg_sem); ++ if (ret == 0) ++ change_own(path, AID_ROOT, AID_SYSTEM); ++ ++ return ret; ++} ++ ++static void dump(const char *log_dir, struct error_info *info) ++{ ++ if (unlikely(!log_dir || !info)) { ++ bbox_print_err("log_dir: %p, info: %p!\n", log_dir, info); ++ return; ++ } ++ ++ if (!strcmp(info->event, EVENT_PANIC) || ++ !strcmp(info->event, EVENT_SYSREBOOT) || ++ !strcmp(info->event, EVENT_POWEROFF)) { ++ struct fault_log_info *pinfo = (struct fault_log_info *)kernel_log; ++ ++ if (down_trylock(&kmsg_sem) != 0) { ++ bbox_print_err("down_trylock failed!\n"); ++ return; ++ } ++ ++ if (kernel_log) { ++ memcpy(pinfo->flag, LOG_FLAG, strlen(LOG_FLAG)); ++ memcpy(&pinfo->info, info, sizeof(*info)); ++ ++#if __BITS_PER_LONG == 64 ++ __flush_dcache_area(kernel_log, KERNEL_LOG_MAX_SIZE); ++#else ++ __cpuc_flush_dcache_area(kernel_log, KERNEL_LOG_MAX_SIZE); ++#endif ++ } ++ ++ up(&kmsg_sem); ++ } else { ++ bbox_print_info("module [%s] starts saving log for event [%s]!\n", ++ info->module, info->event); ++ save_kmsg_from_buffer(log_dir, KERNEL_LOG_NAME, 0); ++ bbox_print_info("module [%s] ends saving log for event [%s]!\n", ++ info->module, info->event); ++ } ++} ++ ++static void reset(struct error_info *info) ++{ ++ if (unlikely(!info)) { ++ bbox_print_err("info: %p!\n", info); ++ return; ++ } ++ ++ if (!strcmp(info->event, EVENT_PANIC)) ++ emergency_restart(); ++} ++ ++static int get_last_log_info(struct error_info *info) ++{ ++ struct fault_log_info *pinfo = (struct fault_log_info *)kernel_log; ++ int log_size = KERNEL_LOG_MAX_SIZE; ++ ++ if (unlikely(!info || !kernel_log)) ++ return -EINVAL; ++ ++ if (storage_lastword->get_log((void *)kernel_log, log_size) < 0) { ++ bbox_print_err("Get last log from strorage failed!\n"); ++ return -ENOENT; ++ } ++ ++ down(&kmsg_sem); ++ if (!memcmp(pinfo->flag, LOG_FLAG, strlen(LOG_FLAG))) { ++ memcpy(info, &pinfo->info, sizeof(*info)); ++ ++ up(&kmsg_sem); ++ return 0; ++ } ++ up(&kmsg_sem); ++ bbox_print_info("There's no valid fault log!\n"); ++ ++ return -ENOMSG; ++} ++ ++static int save_last_log(const char *log_dir, struct error_info *info) ++{ ++ int ret = -1; ++ ++ if (unlikely(!log_dir || !info)) { ++ bbox_print_err("log_dir: %p, info: %p!\n", log_dir, info); ++ return -EINVAL; ++ } ++ ++ ret = save_kmsg_from_buffer(log_dir, KERNEL_LOG_NAME, 1); ++ bbox_print_info("save last fault log %s!\n", ++ ret ? "failed" : "successfully"); ++ ++ return ret; ++} ++ ++static int bbox_reboot_notify(struct notifier_block *nb, ++ unsigned long code, void *unused) ++{ ++ char error_desc[ERROR_DESC_MAX_LEN]; ++ ++ /* notify blackbox to do dump */ ++ memset(error_desc, 0, sizeof(error_desc)); ++ dump_stacktrace(error_desc, sizeof(error_desc), false); ++ kmsg_dump(KMSG_DUMP_UNDEF); ++ ++ switch (code) { ++ case SYS_RESTART: ++ bbox_notify_error(EVENT_SYSREBOOT, MODULE_SYSTEM, error_desc, 1); ++ break; ++ case SYS_POWER_OFF: ++ bbox_notify_error(EVENT_POWEROFF, MODULE_SYSTEM, error_desc, 0); ++ break; ++ default: ++ bbox_print_err("Invalid event code: %lu!\n", code); ++ break; ++ } ++ ++ return NOTIFY_DONE; ++} ++ ++static int bbox_task_panic(struct notifier_block *this, ++ unsigned long event, void *ptr) ++{ ++ char error_desc[ERROR_DESC_MAX_LEN]; ++ ++ /* notify blackbox to do dump */ ++ kmsg_dump(KMSG_DUMP_OOPS); ++ memset(error_desc, 0, sizeof(error_desc)); ++ bbox_notify_error(EVENT_PANIC, MODULE_SYSTEM, error_desc, 1); ++ ++ return NOTIFY_DONE; ++} ++ ++#ifdef CONFIG_BLACKBOX_TEST ++static void test_bbox(void) ++{ ++ struct module_ops ops = { ++ .module = "TEST", ++ .dump = NULL, ++ .reset = NULL, ++ .get_last_log_info = NULL, ++ .save_last_log = NULL, ++ }; ++ ++ if (bbox_register_module_ops(&ops) != 0) { ++ bbox_print_err("bbox_register_module_ops failed!\n"); ++ return -EINVAL; ++ } ++ kmsg_dump(KMSG_DUMP_OOPS); ++ bbox_notify_error("EVENT_TEST", "TEST", "Test bbox_notify_error", 0); ++ ++} ++#endif ++ ++static int __init blackbox_init(void) ++{ ++ int ret = -1; ++ struct kmsg_dumper *dumper = NULL; ++ struct module_ops ops = { ++ .module = MODULE_SYSTEM, ++ .dump = dump, ++ .reset = reset, ++ .get_last_log_info = get_last_log_info, ++ .save_last_log = save_last_log, ++ }; ++ ++ if (bbox_register_module_ops(&ops) != 0) { ++ bbox_print_err("bbox_register_module_ops failed!\n"); ++ return -EINVAL; ++ } ++ ++ /* allocate buffer for kmsg */ ++ kernel_log = kmalloc(KERNEL_LOG_MAX_SIZE, GFP_KERNEL); ++ if (!kernel_log) ++ goto __err; ++ ++ bbox_print_info("kernel_log: %p for blackbox!\n", kernel_log); ++ ++ if (storage_lastword->storage_log(kernel_log, KERNEL_LOG_MAX_SIZE) < 0) { ++ bbox_print_err("storage_log failed!\n"); ++ goto __err; ++ } ++ ++ /* register kdumper */ ++ dumper = vmalloc(sizeof(*dumper)); ++ if (!dumper) ++ goto __err; ++ ++ memset(dumper, 0, sizeof(*dumper)); ++ dumper->max_reason = KMSG_DUMP_MAX; ++ dumper->dump = storage_lastword->blackbox_dump; ++ ret = kmsg_dump_register(dumper); ++ if (ret != 0) { ++ bbox_print_err("kmsg_dump_register failed!\n"); ++ goto __err; ++ } ++ atomic_notifier_chain_register(&panic_notifier_list, &bbox_panic_block); ++ ++ register_reboot_notifier(&bbox_reboot_nb); ++#ifdef CONFIG_BLACKBOX_TEST ++ test_bbox(); ++#endif ++ return 0; ++ ++__err: ++ kfree(kernel_log); ++ kernel_log = NULL; ++ ++ if (dumper) { ++ vfree(dumper); ++ dumper = NULL; ++ } ++ ++ return ret; ++} ++ ++postcore_initcall(blackbox_init); ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("Blackbox for system"); ++MODULE_AUTHOR("OHOS"); +diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c +index c4b8df2ad..374737bd5 100644 +--- a/arch/arm/mm/dma-mapping.c ++++ b/arch/arm/mm/dma-mapping.c +@@ -237,7 +237,7 @@ const struct dma_map_ops arm_coherent_dma_ops = { + }; + EXPORT_SYMBOL(arm_coherent_dma_ops); + +-static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag) ++void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag) + { + /* + * Ensure that the allocated pages are zeroed, and that any data +@@ -266,6 +266,7 @@ static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag + } + } + } ++EXPORT_SYMBOL(__dma_clear_buffer); + + /* + * Allocate a DMA buffer for 'dev' of size 'size' using the +@@ -454,6 +455,12 @@ static void __dma_remap(struct page *page, size_t size, pgprot_t prot) + flush_tlb_kernel_range(start, end); + } + ++void hisi_flush_tlb_kernel_range(unsigned long start, unsigned long end) ++{ ++ flush_tlb_kernel_range(start, end); ++} ++EXPORT_SYMBOL(hisi_flush_tlb_kernel_range); ++ + static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp, + pgprot_t prot, struct page **ret_page, + const void *caller, bool want_vaddr) +@@ -2296,6 +2303,13 @@ void arch_teardown_dma_ops(struct device *dev) + set_dma_ops(dev, NULL); + } + ++void hi_dmac_map_area(const void *kaddr, size_t size, ++ enum dma_data_direction dir) ++{ ++ dmac_map_area(kaddr, size, dir); ++} ++EXPORT_SYMBOL(hi_dmac_map_area); ++ + #ifdef CONFIG_SWIOTLB + void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, + enum dma_data_direction dir) +diff --git a/arch/arm/vdso/vgettimeofday.c b/arch/arm/vdso/vgettimeofday.c +old mode 100644 +new mode 100755 +diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile +index 485b7dbd4..65b9f45c8 100644 +--- a/arch/arm64/Makefile ++++ b/arch/arm64/Makefile +@@ -11,6 +11,7 @@ + # Copyright (C) 1995-2001 by Russell King + + LDFLAGS_vmlinux :=--no-undefined -X ++OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S + + ifeq ($(CONFIG_RELOCATABLE), y) + # Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour +diff --git a/arch/arm64/boot/Makefile b/arch/arm64/boot/Makefile +index cd3414898..f3e98628b 100644 +--- a/arch/arm64/boot/Makefile ++++ b/arch/arm64/boot/Makefile +@@ -18,12 +18,28 @@ OBJCOPYFLAGS_Image :=-O binary -R .note -R .note.gnu.build-id -R .comment -S + + targets := Image Image.bz2 Image.gz Image.lz4 Image.lzma Image.lzo + ++dtstree := $(srctree)/$(src)/dts ++ ++dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(foreach d,$(dts-dirs), $(wildcard $(dtstree)/$(d)/*.dts))) ++ ++DTB_NAMES := $(subst $\",,$(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES)) ++ifneq ($(DTB_NAMES),) ++DTB_LIST := $(addsuffix .dtb,$(DTB_NAMES)) ++else ++DTB_LIST := $(dtb-y) ++endif ++ ++DTB_OBJS := $(addprefix $(obj)/dts/,$(DTB_LIST)) ++ + $(obj)/Image: vmlinux FORCE + $(call if_changed,objcopy) + + $(obj)/Image.bz2: $(obj)/Image FORCE + $(call if_changed,bzip2) + ++$(obj)/Image-dtb: $(obj)/Image $(DTB_OBJS) FORCE ++ $(call if_changed,cat) ++ + $(obj)/Image.gz: $(obj)/Image FORCE + $(call if_changed,gzip) + +@@ -36,10 +52,35 @@ $(obj)/Image.lzma: $(obj)/Image FORCE + $(obj)/Image.lzo: $(obj)/Image FORCE + $(call if_changed,lzo) + +-install: ++$(obj)/Image.gz-dtb: $(obj)/Image.gz $(DTB_OBJS) FORCE ++ $(call if_changed,cat) ++ ++UIMAGE_LOADADDR=$(TEXT_OFFSET) ++UIMAGE_ENTRYADDR=$(TEXT_OFFSET) ++#UIMAGE_COMPRESSION = gzip ++check_for_multiple_loadaddr = \ ++if [ $(words $(UIMAGE_LOADADDR)) -ne 1 ]; then \ ++ echo 'multiple (or no) load addresses: $(UIMAGE_LOADADDR)'; \ ++ echo 'This is incompatible with uImages'; \ ++ echo 'Specify LOADADDR on the commandline to build an uImage'; \ ++ false; \ ++fi ++ ++rm_uimage: ++ @rm -f $(obj)/uImage ++ ++$(obj)/uImage: $(obj)/Image rm_uimage FORCE ++ @$(check_for_multiple_loadaddr) ++ @dd if=$< of=$<.dd ibs=4096 conv=sync && mv $<.dd $< ++ $(call if_changed,uimage) ++ $(if $(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE),@$(kecho) ' CAT $(DTB_OBJS) to $@') ++ $(if $(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE),@cat $(DTB_OBJS) >>$@,) ++ @$(kecho) ' Image $@ is ready' ++ ++install:$(obj)/uImage + $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ + $(obj)/Image System.map "$(INSTALL_PATH)" + +-zinstall: ++zinstall:$(obj)/uImage + $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ + $(obj)/Image.gz System.map "$(INSTALL_PATH)" +diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile +index 9b1170658..9520bb244 100644 +--- a/arch/arm64/boot/dts/Makefile ++++ b/arch/arm64/boot/dts/Makefile +@@ -30,3 +30,5 @@ subdir-y += ti + subdir-y += toshiba + subdir-y += xilinx + subdir-y += zte ++dtbs: $(addprefix $(obj)/, $(DTB_LIST)) ++clean-files := dts/*.dtb *.dtb +diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c +index 1006ed2d7..aa1d2f2b9 100644 +--- a/arch/arm64/kernel/pci.c ++++ b/arch/arm64/kernel/pci.c +@@ -29,6 +29,18 @@ int pcibios_alloc_irq(struct pci_dev *dev) + + return 0; + } ++#else ++#ifdef CONFIG_ARCH_HISI_BVT ++/* ++ * Try to assign the IRQ number when probing a new device ++ */ ++int pcibios_alloc_irq(struct pci_dev *dev) ++{ ++ dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); ++ ++ return 0; ++} ++#endif + #endif + + /* +diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c +index c0a7f0d90..a5ca33ad8 100644 +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -180,6 +180,10 @@ static void __init reserve_elfcorehdr(void) + */ + static phys_addr_t __init max_zone_phys(unsigned int zone_bits) + { ++#ifdef CONFIG_ARCH_HISI_BVT ++ phys_addr_t max_dma_phys; ++ extern phys_addr_t hisi_get_zones_start(void); ++#endif + phys_addr_t zone_mask = DMA_BIT_MASK(zone_bits); + phys_addr_t phys_start = memblock_start_of_DRAM(); + +@@ -188,7 +192,12 @@ static phys_addr_t __init max_zone_phys(unsigned int zone_bits) + else if (phys_start > zone_mask) + zone_mask = U32_MAX; + ++#ifdef CONFIG_ARCH_HISI_BVT ++ max_dma_phys = min(zone_mask, memblock_end_of_DRAM() - 1) + 1; ++ return min(max_dma_phys, hisi_get_zones_start()); ++#else + return min(zone_mask, memblock_end_of_DRAM() - 1) + 1; ++#endif + } + + static void __init zone_sizes_init(unsigned long min, unsigned long max) +diff --git a/drivers/Kconfig b/drivers/Kconfig +index 826b2b19d..96840663d 100644 +--- a/drivers/Kconfig ++++ b/drivers/Kconfig +@@ -239,4 +239,12 @@ source "drivers/counter/Kconfig" + source "drivers/most/Kconfig" + + source "drivers/accesstokenid/Kconfig" ++ ++source "drivers/hidmac/Kconfig" ++ ++source "drivers/hiedmac/Kconfig" ++ ++source "drivers/hisilicon/Kconfig" ++ ++source "drivers/hi_vdmav100/Kconfig" + endmenu +diff --git a/drivers/Makefile b/drivers/Makefile +index ecc494918..46d604b46 100644 +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -193,3 +193,7 @@ obj-$(CONFIG_INTERCONNECT) += interconnect/ + obj-$(CONFIG_COUNTER) += counter/ + obj-$(CONFIG_MOST) += most/ + obj-$(CONFIG_ACCESS_TOKENID) += accesstokenid/ ++obj-$(CONFIG_HI_DMAC) += hidmac/ ++obj-$(CONFIG_HIEDMAC) += hiedmac/ ++obj-$(CONFIG_ARCH_HISI_BVT) += hisilicon/ ++obj-$(CONFIG_HI_VDMA_V100) += hi_vdmav100/ +diff --git a/drivers/android/binder.c b/drivers/android/binder.c +index 3604f0df6..2108d6686 100644 +--- a/drivers/android/binder.c ++++ b/drivers/android/binder.c +@@ -2966,7 +2966,7 @@ static void binder_transaction(struct binder_proc *proc, + return_error = BR_FAILED_REPLY; + return_error_param = -EINVAL; + return_error_line = __LINE__; +- goto err_invalid_target_handle; ++ //goto err_invalid_target_handle; + } + } + if (!target_node) { +diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig +index 030cb32da..97d530d3e 100644 +--- a/drivers/ata/Kconfig ++++ b/drivers/ata/Kconfig +@@ -2,6 +2,7 @@ + # + # SATA/PATA driver configuration + # ++source "drivers/ata/Kconfig.hiahci" + + config HAVE_PATA_PLATFORM + bool +diff --git a/drivers/ata/Kconfig.hiahci b/drivers/ata/Kconfig.hiahci +new file mode 100644 +index 000000000..030de3fc9 +--- /dev/null ++++ b/drivers/ata/Kconfig.hiahci +@@ -0,0 +1,44 @@ ++menuconfig HISI_SATA ++ bool "Hisilicon sata device support" ++ depends on (ARCH_HI3531DV200 || ARCH_HI3535AV100 || ARCH_HI3521DV200 || ARCH_HI3520DV500) ++ default n ++ select ATA ++ select ATA_VERBOSE_ERROR ++ select SATA_PMP ++ select SATA_AHCI_PLATFORM ++ ++if HISI_SATA ++config HISI_SATA_IOBASE ++ hex "Hisi sata IO address" ++ default "0x10390000" if (ARCH_HI3531DV200 || ARCH_HI3535AV100) ++ default "0x10390000" if (ARCH_HI3521DV200 || ARCH_HI3520DV500) ++ help ++ hisilicon sata io base address. ++ ++config HISI_SATA_FBS ++ int "Hisi sata FIS-Based switching" ++ default 1 ++ range 0 1 ++ help ++ Hisatav200 supports FBS. ++ FBS is FIS-Based switching. ++ Choose y if you want to use it. ++ ++config HISI_SATA_NCQ ++ int "Hisi sata Native Command Queuing" ++ default 1 ++ range 0 1 ++ help ++ Hisatav200 supports NCQ. ++ NCQ is Native Command Queuing. ++ Choose y if you want to use it. ++ ++config HISI_ESATA ++ bool "Support Hisi eSATA" ++ default n ++ help ++ Hisatav200 supports eSATA. ++ Choose y if you want to use it. ++ ++endif ++ +diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile +index b8aebfb14..f81f2d66b 100644 +--- a/drivers/ata/Makefile ++++ b/drivers/ata/Makefile +@@ -1,6 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + + obj-$(CONFIG_ATA) += libata.o ++obj-$(CONFIG_HISI_SATA) += hisi_sata_dbg.o + + # non-SFF interface + obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o +diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h +index d1f284f0c..af7963b12 100644 +--- a/drivers/ata/ahci.h ++++ b/drivers/ata/ahci.h +@@ -224,6 +224,9 @@ enum { + error-handling stage) */ + AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */ + AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */ ++#ifdef CONFIG_HISI_SATA ++ AHCI_HFLAG_NO_SXS = (1 << 19), /* do not support External SATA */ ++#endif + + #ifdef CONFIG_PCI_MSI + AHCI_HFLAG_MULTI_MSI = (1 << 20), /* per-port MSI(-X) */ +@@ -346,6 +349,12 @@ struct ahci_host_priv { + struct regulator **target_pwrs; /* Optional */ + struct regulator *ahci_regulator;/* Optional */ + struct regulator *phy_regulator;/* Optional */ ++#ifdef CONFIG_HISI_SATA ++#define PCI_AHCI 0 ++#define ORI_AHCI 1 ++ u32 type; ++#endif ++ + /* + * If platform uses PHYs. There is a 1:1 relation between the port number and + * the PHY position in this array. +diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c +index 3aab2e3d5..385d3d7d5 100644 +--- a/drivers/ata/ahci_platform.c ++++ b/drivers/ata/ahci_platform.c +@@ -22,6 +22,16 @@ + + #define DRV_NAME "ahci" + ++#ifdef CONFIG_HISI_SATA_NCQ ++static unsigned int ncq_en = CONFIG_HISI_SATA_NCQ; ++module_param(ncq_en, uint, 0600); ++MODULE_PARM_DESC(ncq_en, "ahci ncq flag (default:1)"); ++#endif ++ ++#ifdef CONFIG_HISI_SATA ++extern unsigned int sata_port_map; ++#endif ++ + static const struct ata_port_info ahci_port_info = { + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, +@@ -59,8 +69,21 @@ static int ahci_probe(struct platform_device *pdev) + of_property_read_u32(dev->of_node, + "ports-implemented", &hpriv->force_port_map); + ++#ifdef CONFIG_HISI_SATA ++ hpriv->type = ORI_AHCI; ++ hpriv->force_port_map = sata_port_map; ++#ifndef CONFIG_HISI_ESATA ++ hpriv->flags |= AHCI_HFLAG_NO_SXS; ++#endif ++ ++#ifdef CONFIG_HISI_SATA_NCQ ++ if (!ncq_en) ++ hpriv->flags |= AHCI_HFLAG_NO_NCQ; ++#endif ++#else + if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci")) + hpriv->flags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ; ++#endif + + port = acpi_device_get_match_data(dev); + if (!port) +diff --git a/drivers/ata/hisi_sata_dbg.c b/drivers/ata/hisi_sata_dbg.c +new file mode 100644 +index 000000000..935c71689 +--- /dev/null ++++ b/drivers/ata/hisi_sata_dbg.c +@@ -0,0 +1,174 @@ ++/* ++ * Copyright (c) 2009-2014 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "ahci.h" ++#include "hisi_sata_dbg.h" ++ ++void hisi_sata_mem_dump(unsigned int *addr, unsigned int size) ++{ ++ unsigned int ix; ++ ++ for (ix = 0; ix < size; ix += 0x04, addr++) { ++ if (!(ix & 0x0F)) ++ pr_debug("\n0x%08X: ", ++ (unsigned int)virt_to_phys(addr)); ++ pr_debug("%08X ", *addr); ++ } ++} ++EXPORT_SYMBOL(hisi_sata_mem_dump); ++ ++void hisi_sata_phys_mem_dump(unsigned int addr, unsigned int size) ++{ ++ hisi_sata_mem_dump(phys_to_virt(addr), size); ++} ++EXPORT_SYMBOL(hisi_sata_phys_mem_dump); ++ ++void hisi_ahci_reg_dump(void) ++{ ++ unsigned int ix; ++ unsigned int regbase; ++ ++ regbase = CONFIG_HISI_SATA_IOBASE; ++ pr_debug("AHCI GHC Register dump:"); ++ for (ix = 0; ix <= 0x28; ix += 0x04) { ++ if (!(ix & 0x0F)) ++ pr_debug("\n0x%08X: ", (regbase + ix)); ++ } ++ pr_debug("\n"); ++ ++ regbase = CONFIG_HISI_SATA_IOBASE + 0x0100; ++ pr_debug("AHCI PORT 0 Register dump:"); ++ for (ix = 0; ix <= 0x7F; ix += 0x04) { ++ if (!(ix & 0x0F)) ++ pr_debug("\n0x%08X: ", (regbase + ix)); ++ } ++ pr_debug("\n"); ++} ++EXPORT_SYMBOL(hisi_ahci_reg_dump); ++ ++void hisi_ahci_rx_fis_dump(struct ata_link *link, int pmp_port_num) ++{ ++ struct ahci_port_priv *pp = NULL; ++ ++ pp = link->ap->private_data; ++ if (NULL == pp) { ++ pr_debug("Error: pp=NULL\n"); ++ return; ++ } ++ pr_debug("ACHI Received FIS:"); ++ hisi_sata_phys_mem_dump((unsigned int)(pp->rx_fis_dma), ++ AHCI_RX_FIS_SZ * pmp_port_num); ++ pr_debug("\n"); ++} ++EXPORT_SYMBOL_GPL(hisi_ahci_rx_fis_dump); ++ ++void hisi_ata_taskfile_dump(struct ata_taskfile *tf) ++{ ++ if (NULL == tf) { ++ pr_debug("Error: tf=NULL\n"); ++ return; ++ } ++ ++ pr_debug("Taskfile dump:\n"); ++ pr_debug("flags:0x%08lX, protocol:0x%02X, command:0x%02X, device:0x%02X, ctl:0x%02X\n", ++ tf->flags, tf->protocol, tf->command, tf->device, tf->ctl); ++ pr_debug("feature:0x%08X, nsect:0x%02X, lbal:0x%02X, lbam:0x%02X, lbah:0x%02X\n", ++ tf->feature, tf->nsect, tf->lbal, tf->lbam, tf->lbah); ++ pr_debug("hob_feature:0x%08X, hob_nsect:0x%02X, hob_lbal:0x%02X, hob_lbam:0x%02X, hob_lbah:0x%02X\n", ++ tf->hob_feature, tf->hob_nsect, tf->hob_lbal, ++ tf->hob_lbam, tf->hob_lbah); ++} ++EXPORT_SYMBOL_GPL(hisi_ata_taskfile_dump); ++ ++static void __hisi_ahci_st_md(void __iomem *addr) ++{ ++ unsigned int *addr_v = NULL; ++ unsigned int *tmp = NULL; ++ unsigned int i; ++ ++ addr_v = (unsigned int *)addr; ++ ++ pr_debug("\n\n"); ++ for (i = 0; i < 16; i++) { ++ tmp = addr_v + i * 4; ++ pr_debug("%8x: %8x %8x %8x %8x\n", ++ (unsigned int)(uintptr_t)(addr + i * 16), ++ *tmp, *(tmp + 1), *(tmp + 2), *(tmp + 3)); ++ } ++ ++ pr_debug("\n"); ++} ++ ++void hisi_ahci_st_dump(const void __iomem *port_base) ++{ ++ unsigned int tmp; ++ ++ pr_debug("\n**********Dmac status**********\n"); ++ tmp = readl(port_base + 0x58); ++ pr_debug("txdmac_curr_st:0x%2x\n", (tmp >> 24) & 0xf); ++ tmp = readl(port_base + 0x64); ++ pr_debug("rxdmac_curr_st:0x%2x\n", (tmp >> 24) & 0xf); ++ tmp = readl(port_base + 0x70); ++ pr_debug("dmac tx fifo:count-0x%x-empty-%x-ful-%x\n", ++ (tmp >> 0) & 0xff, ++ (tmp >> 16) & 0x1, (tmp >> 17) & 0x1); ++ pr_debug("dmac rx fifo:count-0x%x-empty-%x-ful-%x\n", ++ (tmp >> 8) & 0xff, ++ (tmp >> 18) & 0x1, (tmp >> 19) & 0x1); ++ ++ pr_debug("\n"); ++ pr_debug("**********HBA status**********\n"); ++ tmp = readl(port_base + 0x50); ++ pr_debug("pxxx_curr_st:0x%2x ndrx_curr_st:0x%2x\n", ++ (tmp >> 24) & 0xf, ++ (tmp >> 16) & 0xff); ++ pr_debug("cfis_curr_st:0x%2x piox_curr_st:0x%2x\n", ++ (tmp >> 12) & 0xf, ++ (tmp >> 8) & 0xf); ++ pr_debug("pmxx_curr_st:0x%2x errx_curr_st:0x%2x\n", ++ (tmp >> 4) & 0xf, ++ (tmp >> 0) & 0xf); ++ ++ pr_debug("\n"); ++ pr_debug("**********Link status**********\n"); ++ tmp = readl(port_base + 0x54); ++ pr_debug("link_curr_st:0x%2x\n", (tmp >> 24) & 0x1f); ++ pr_debug("link tx fifo:count-0x%x-empty-%x-ful-%x\n", ++ (tmp >> 0) & 0x1f, ++ (tmp >> 5) & 0x1, (tmp >> 6) & 0x1); ++ pr_debug("link rx fifo:count-0x%x-empty-%x-ful-%x\n", ++ (tmp >> 8) & 0x1f, ++ (tmp >> 13) & 0x1, (tmp >> 14) & 0x1); ++ pr_debug("link df fifo:count-0x%x-empty-%x-ful-%x\n\n", ++ (tmp >> 16) & 0x1f, ++ (tmp >> 21) & 0x1, (tmp >> 22) & 0x1); ++ ++ pr_debug("**********CMD header**********\n"); ++ tmp = readl(port_base + 0x0); ++ __hisi_ahci_st_md(phys_to_virt(tmp)); ++ __hisi_ahci_st_md(phys_to_virt(tmp + 0x100)); ++ __hisi_ahci_st_md(phys_to_virt(tmp + 0x200)); ++ __hisi_ahci_st_md(phys_to_virt(tmp + 0x300)); ++} ++EXPORT_SYMBOL_GPL(hisi_ahci_st_dump); ++ +diff --git a/drivers/ata/hisi_sata_dbg.h b/drivers/ata/hisi_sata_dbg.h +new file mode 100644 +index 000000000..5103658a4 +--- /dev/null ++++ b/drivers/ata/hisi_sata_dbg.h +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2009-2014 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#ifndef _HISI_SATA_DBG_H ++#define _HISI_SATA_DBG_H ++#include ++#include ++#include ++#include "ahci.h" ++ ++void hisi_sata_mem_dump(unsigned int *addr, unsigned int size); ++void hisi_sata_phys_mem_dump(unsigned int addr, unsigned int size); ++void hisi_ahci_rx_fis_dump(struct ata_link *link, int pmp_port_num); ++void hisi_ata_taskfile_dump(struct ata_taskfile *tf); ++void hisi_ahci_st_dump(const void __iomem *port_base); ++void hisi_ahci_reg_dump(void); ++ ++#define HISI_AHCI_REG_DUMP(X) \ ++do { \ ++ pr_debug("------------------[ Start ]--------------------\n"); \ ++ pr_debug("Dump AHCI registers at %s %d\n", __func__, __LINE__); \ ++ hisi_ahci_reg_dump(); \ ++ pr_debug("------------------[ End ]--------------------\n"); \ ++} while (0) ++ ++#define hisi_sata_readl(addr) do { \ ++ unsigned int reg = readl((unsigned int)addr); \ ++ pr_debug("HI_AHCI(REG) %s:%d: readl(0x%08X) = 0x%08X\n", \ ++ __func__, __LINE__, (unsigned int)addr, reg); \ ++ reg; \ ++ } while (0) ++ ++#define hisi_sata_writel(v, addr) do { writel(v, (unsigned int)addr); \ ++ pr_debug("HI_AHCI(REG) %s:%d: writel(0x%08X) = 0x%08X\n", \ ++ __func__, __LINE__, (unsigned int)addr, \ ++ (unsigned int)(v)); \ ++ } while (0) ++ ++#undef HISI_DUMP_AHCI_REG_OPS ++#ifdef HISI_DUMP_AHCI_REG_OPS ++#define readl(addr) hisi_sata_readl(addr) ++#define write(v, addr) hisi_sata_writel(v, addr) ++#endif ++#endif /* _HISI_SATA_DBG_H */ +diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c +index fec2e9754..bff99aebd 100644 +--- a/drivers/ata/libahci.c ++++ b/drivers/ata/libahci.c +@@ -31,6 +31,7 @@ + #include + #include "ahci.h" + #include "libata.h" ++#include "hisi_sata_dbg.h" + + static int ahci_skip_host_reset; + int ahci_ignore_sss; +@@ -42,6 +43,33 @@ MODULE_PARM_DESC(skip_host_reset, "skip global host reset (0=don't skip, 1=skip) + module_param_named(ignore_sss, ahci_ignore_sss, int, 0444); + MODULE_PARM_DESC(ignore_sss, "Ignore staggered spinup flag (0=don't ignore, 1=ignore)"); + ++#ifdef CONFIG_HISI_SATA_FBS ++static int fbs_en = CONFIG_HISI_SATA_FBS; ++module_param(fbs_en, uint, 0600); ++MODULE_PARM_DESC(fbs_en, "ahci fbs flags (default:1)"); ++ ++#define AHCI_TIMEOUT_COUNT 10 ++#define AHCI_POLL_TIMER (20 * HZ) ++ ++struct ata_fbs_ctrl { ++ unsigned int fbs_enable_ctrl; /* fbs enable or disable control switch */ ++ unsigned int fbs_mode_ctrl; /* 1.5G: fbs disable, 3G/6G: fbs enable */ ++ unsigned int fbs_enable_flag; ++ unsigned int fbs_disable_flag; ++ unsigned int fbs_cmd_issue_flag; ++ struct timer_list poll_timer; ++#ifdef CONFIG_HISI_SATA ++ struct ata_port *ap; ++#endif ++}; ++static struct ata_fbs_ctrl fbs_ctrl[4]; ++extern void hisi_sata_set_fifoth(void *mmio); ++#endif ++#ifdef CONFIG_HISI_SATA ++extern void hisi_sata_reset_rxtx_assert(unsigned int port_no); ++extern void hisi_sata_reset_rxtx_deassert(unsigned int port_no); ++#endif ++ + static int ahci_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, + unsigned hints); + static ssize_t ahci_led_show(struct ata_port *ap, char *buf); +@@ -460,6 +488,13 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) + cap |= HOST_CAP_NCQ; + } + ++#ifdef CONFIG_HISI_SATA ++ if ((cap & HOST_CAP_SXS) && (hpriv->flags & AHCI_HFLAG_NO_SXS)) { ++ dev_info(dev, "controller can't support eSATA, turning off CAP_SXS\n"); ++ cap &= ~HOST_CAP_SXS; ++ } ++#endif ++ + if ((cap & HOST_CAP_PMP) && (hpriv->flags & AHCI_HFLAG_NO_PMP)) { + dev_info(dev, "controller can't do PMP, turning off CAP_PMP\n"); + cap &= ~HOST_CAP_PMP; +@@ -1396,8 +1431,28 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, + bool fbs_disabled = false; + int rc; + ++#ifdef CONFIG_HISI_SATA_FBS ++ unsigned int port_num = ap->port_no; ++#endif ++ + DPRINTK("ENTER\n"); + ++#ifdef CONFIG_HISI_SATA_FBS ++ if (fbs_ctrl[port_num].fbs_enable_ctrl && ++ (link->pmp == SATA_PMP_CTRL_PORT) && ++ (hpriv->type == ORI_AHCI)) { ++ struct ahci_port_priv *pp = ap->private_data; ++ ++ if (pp->fbs_enabled == false) ++ ahci_enable_fbs(ap); ++ ++ fbs_ctrl[port_num].fbs_enable_flag = 0; ++ fbs_ctrl[port_num].fbs_disable_flag = 0; ++ fbs_ctrl[port_num].fbs_cmd_issue_flag = 0; ++ ++ } ++#endif ++ + /* prepare for SRST (AHCI-1.1 10.4.1) */ + rc = ahci_kick_engine(ap); + if (rc && rc != -EOPNOTSUPP) +@@ -1426,6 +1481,10 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, + AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs)) { + rc = -EIO; + reason = "1st FIS failed"; ++#ifdef CONFIG_HISI_SATA ++ hisi_sata_reset_rxtx_assert(ap->port_no); ++ hisi_sata_reset_rxtx_deassert(ap->port_no); ++#endif + goto fail; + } + +@@ -1623,6 +1682,68 @@ static int ahci_pmp_qc_defer(struct ata_queued_cmd *qc) + struct ata_port *ap = qc->ap; + struct ahci_port_priv *pp = ap->private_data; + ++#ifdef CONFIG_HISI_SATA_FBS ++ struct ahci_host_priv *hpriv = ap->host->private_data; ++ int is_atapi = ata_is_atapi(qc->tf.protocol); ++ void __iomem *port_mmio = ahci_port_base(ap); ++ unsigned int port_num = ap->port_no; ++ unsigned int cmd_timeout_count; ++ ++ if (fbs_ctrl[port_num].fbs_enable_ctrl && ++ (ap->link.pmp == SATA_PMP_CTRL_PORT) && ++ (hpriv->type == ORI_AHCI)) { ++ if (is_atapi || fbs_ctrl[ap->port_no].fbs_cmd_issue_flag) { ++ mod_timer(&fbs_ctrl[port_num].poll_timer, ++ jiffies + AHCI_POLL_TIMER); ++ ++ if (!fbs_ctrl[port_num].fbs_disable_flag) { ++ cmd_timeout_count = 0; ++ while (readl(port_mmio + PORT_SCR_ACT) ++ || readl(port_mmio ++ + PORT_CMD_ISSUE) ++ || readl(port_mmio ++ + PORT_IRQ_STAT)) { ++ cmd_timeout_count++; ++ if (cmd_timeout_count >= ++ AHCI_TIMEOUT_COUNT) { ++ fbs_ctrl[ap->port_no]. ++ fbs_cmd_issue_flag = 1; ++ return ATA_DEFER_LINK; ++ } ++ } ++ ++ if (pp->fbs_enabled == true) ++ ahci_disable_fbs(ap); ++ ++ ap->excl_link = NULL; ++ ap->nr_active_links = 0; ++ fbs_ctrl[port_num].fbs_disable_flag = 1; ++ fbs_ctrl[port_num].fbs_enable_flag = 0; ++ fbs_ctrl[ap->port_no].fbs_cmd_issue_flag = 0; ++ } ++ } else { ++ if (fbs_ctrl[port_num].fbs_enable_flag) { ++ cmd_timeout_count = 0; ++ while (readl(port_mmio + PORT_SCR_ACT) ++ || readl(port_mmio ++ + PORT_CMD_ISSUE) ++ || readl(port_mmio ++ + PORT_IRQ_STAT)) { ++ cmd_timeout_count++; ++ if (cmd_timeout_count >= ++ AHCI_TIMEOUT_COUNT) { ++ return ATA_DEFER_LINK; ++ } ++ } ++ ++ if (pp->fbs_enabled == false) ++ ahci_enable_fbs(ap); ++ fbs_ctrl[port_num].fbs_enable_flag = 0; ++ fbs_ctrl[port_num].fbs_disable_flag = 0; ++ } ++ } ++ } ++#endif + if (!sata_pmp_attached(ap) || pp->fbs_enabled) + return ata_std_qc_defer(qc); + else +@@ -1669,6 +1790,7 @@ static enum ata_completion_errors ahci_qc_prep(struct ata_queued_cmd *qc) + return AC_ERR_OK; + } + ++#ifndef CONFIG_HISI_SATA_FBS + static void ahci_fbs_dec_intr(struct ata_port *ap) + { + struct ahci_port_priv *pp = ap->private_data; +@@ -1692,6 +1814,7 @@ static void ahci_fbs_dec_intr(struct ata_port *ap) + if (fbs & PORT_FBS_DEC) + dev_err(ap->host->dev, "failed to clear device error\n"); + } ++#endif + + static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) + { +@@ -1799,7 +1922,9 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) + ata_port_freeze(ap); + else if (fbs_need_dec) { + ata_link_abort(link); ++#ifndef CONFIG_HISI_SATA_FBS + ahci_fbs_dec_intr(ap); ++#endif + } else + ata_port_abort(ap); + } +@@ -2200,7 +2325,9 @@ static void ahci_enable_fbs(struct ata_port *ap) + writel(fbs | PORT_FBS_EN, port_mmio + PORT_FBS); + fbs = readl(port_mmio + PORT_FBS); + if (fbs & PORT_FBS_EN) { ++#ifndef CONFIG_HISI_SATA_FBS + dev_info(ap->host->dev, "FBS is enabled\n"); ++#endif + pp->fbs_enabled = true; + pp->fbs_last_dev = -1; /* initialization */ + } else +@@ -2240,6 +2367,9 @@ static void ahci_disable_fbs(struct ata_port *ap) + } + + hpriv->start_engine(ap); ++#ifdef CONFIG_HISI_SATA_FBS ++ hisi_sata_set_fifoth(port_mmio); ++#endif + } + + static void ahci_pmp_attach(struct ata_port *ap) +@@ -2248,12 +2378,24 @@ static void ahci_pmp_attach(struct ata_port *ap) + struct ahci_port_priv *pp = ap->private_data; + u32 cmd; + ++#ifdef CONFIG_HISI_SATA_FBS ++ struct ahci_host_priv *hpriv = ap->host->private_data; ++ unsigned int port_num = ap->port_no; ++#endif ++ + cmd = readl(port_mmio + PORT_CMD); + cmd |= PORT_CMD_PMP; + writel(cmd, port_mmio + PORT_CMD); + + ahci_enable_fbs(ap); + ++#ifdef CONFIG_HISI_SATA_FBS ++ if (hpriv->type == ORI_AHCI) { ++ if (!fbs_ctrl[port_num].fbs_enable_ctrl) ++ ahci_disable_fbs(ap); ++ } ++#endif ++ + pp->intr_mask |= PORT_IRQ_BAD_PMP; + + /* +@@ -2322,6 +2464,32 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) + } + #endif + ++#ifdef CONFIG_HISI_SATA_FBS ++static void ahci_poll_func(unsigned long arg) ++{ ++ struct ata_port *ap = (struct ata_port *)arg; ++ unsigned int port_num = ap->port_no; ++ ++ if (ap->link.pmp == SATA_PMP_CTRL_PORT) { ++ fbs_ctrl[port_num].fbs_enable_flag = 1; ++ fbs_ctrl[port_num].fbs_disable_flag = 0; ++ } ++} ++ ++static void ahci_poll_timerout(struct timer_list *t) ++{ ++ struct ata_fbs_ctrl *ata_fbs_ctrl_ptr = from_timer(ata_fbs_ctrl_ptr, t, poll_timer); ++ struct ata_port *ap = ata_fbs_ctrl_ptr->ap; ++ ++ if (ap == NULL) { ++ pr_err("%s:poll_timer parameter is error!\n", __func__); ++ return; ++ } ++ ++ ahci_poll_func((uintptr_t)ap); ++} ++#endif ++ + static int ahci_port_start(struct ata_port *ap) + { + struct ahci_host_priv *hpriv = ap->host->private_data; +@@ -2414,6 +2582,19 @@ static int ahci_port_start(struct ata_port *ap) + + ap->private_data = pp; + ++#ifdef CONFIG_HISI_SATA_FBS ++ if (hpriv->type == ORI_AHCI) { ++ fbs_ctrl[ap->port_no].fbs_enable_ctrl = fbs_en; ++ fbs_ctrl[ap->port_no].fbs_enable_flag = 0; ++ fbs_ctrl[ap->port_no].fbs_disable_flag = 0; ++ fbs_ctrl[ap->port_no].fbs_cmd_issue_flag = 0; ++ fbs_ctrl[ap->port_no].ap = ap; ++ ++ timer_setup(&fbs_ctrl[ap->port_no].poll_timer, ahci_poll_timerout, 0); ++ fbs_ctrl[ap->port_no].poll_timer.expires = jiffies + AHCI_POLL_TIMER; ++ } ++#endif ++ + /* engage engines, captain */ + return ahci_port_resume(ap); + } +diff --git a/drivers/block/paride/pcd.c b/drivers/block/paride/pcd.c +index 70da8b86c..5725b026b 100644 +--- a/drivers/block/paride/pcd.c ++++ b/drivers/block/paride/pcd.c +@@ -1031,6 +1031,9 @@ static int __init pcd_init(void) + } + + for (unit = 0, cd = pcd; unit < PCD_UNITS; unit++, cd++) { ++ if (!cd->disk) ++ continue; ++ + if (cd->present) { + register_cdrom(cd->disk, &cd->info); + cd->disk->private_data = cd; +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index da8fcf147..04bbcd945 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -82,6 +82,7 @@ obj-$(CONFIG_ARCH_BERLIN) += berlin/ + obj-$(CONFIG_ARCH_DAVINCI) += davinci/ + obj-$(CONFIG_H8300) += h8300/ + obj-$(CONFIG_ARCH_HISI) += hisilicon/ ++obj-$(CONFIG_ARCH_HISI_BVT) += hisilicon/ + obj-y += imgtec/ + obj-y += imx/ + obj-y += ingenic/ +diff --git a/drivers/clk/hisilicon/Kconfig b/drivers/clk/hisilicon/Kconfig +index 6a9e93a0b..4d212e5a1 100644 +--- a/drivers/clk/hisilicon/Kconfig ++++ b/drivers/clk/hisilicon/Kconfig +@@ -22,6 +22,38 @@ config COMMON_CLK_HI3660 + help + Build the clock driver for hi3660. + ++config COMMON_CLK_HI3531DV200 ++ tristate "Hi3531DV200 Clock Driver" ++ depends on ARCH_HI3531DV200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for Hi3531DV200. ++ ++config COMMON_CLK_HI3535AV100 ++ tristate "Hi3535AV100 Clock Driver" ++ depends on ARCH_HI3535AV100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for Hi3535AV100. ++ ++config COMMON_CLK_HI3521DV200 ++ tristate "Hi3521DV200 Clock Driver" ++ depends on ARCH_HI3521DV200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3521DV200. ++ ++config COMMON_CLK_HI3520DV500 ++ tristate "Hi3520DV500 Clock Driver" ++ depends on ARCH_HI3520DV500 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3520DV500. ++ + config COMMON_CLK_HI3670 + bool "Hi3670 Clock Driver" + depends on ARCH_HISI || COMPILE_TEST +@@ -37,6 +69,166 @@ config COMMON_CLK_HI3798CV200 + help + Build the clock driver for hi3798cv200. + ++config COMMON_CLK_HI3516A ++ tristate "Hi3516A Clock Driver" ++ depends on ARCH_HI3516A || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3516A. ++ ++config COMMON_CLK_HI3516CV500 ++ tristate "Hi3516CV500 Clock Driver" ++ depends on ARCH_HI3516CV500 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3516CV500. ++ ++config COMMON_CLK_HI3516EV200 ++ tristate "Hi3516EV200 Clock Driver" ++ depends on ARCH_HI3516EV200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3516EV200. ++ ++config COMMON_CLK_HI3516EV300 ++ tristate "Hi3516EV300 Clock Driver" ++ depends on ARCH_HI3516EV300 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3516EV300. ++ ++config COMMON_CLK_HI3518EV300 ++ tristate "Hi3518EV300 Clock Driver" ++ depends on ARCH_HI3518EV300 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3518EV300. ++ ++config COMMON_CLK_HI3516DV200 ++ tristate "Hi3516DV200 Clock Driver" ++ depends on ARCH_HI3516DV200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3516DV200. ++ ++config COMMON_CLK_HI3516DV300 ++ tristate "Hi3516DV300 Clock Driver" ++ depends on ARCH_HI3516DV300 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3516DV300. ++ ++config COMMON_CLK_HI3556V200 ++ tristate "Hi3556V200 Clock Driver" ++ depends on ARCH_HI3556V200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3556V200. ++ ++config COMMON_CLK_HI3559V200 ++ tristate "Hi3559V200 Clock Driver" ++ depends on ARCH_HI3559V200 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3559V200. ++ ++config COMMON_CLK_HI3562V100 ++ tristate "Hi3562V100 Clock Driver" ++ depends on ARCH_HI3562V100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3562V100. ++ ++config COMMON_CLK_HI3566V100 ++ tristate "Hi3566V100 Clock Driver" ++ depends on ARCH_HI3566V100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3566V100. ++ ++config COMMON_CLK_HI3518EV20X ++ tristate "Hi3518EV20X Clock Driver" ++ depends on ARCH_HI3518EV20X || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3516A. ++ ++config COMMON_CLK_HI3536DV100 ++ tristate "Hi3536DV100 Clock Driver" ++ depends on ARCH_HI3536DV100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3536DV100. ++ ++config COMMON_CLK_HI3559AV100 ++ tristate "Hi3559AV100 Clock Driver" ++ depends on ARCH_HI3559AV100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3559av100. ++ ++config COMMON_CLK_HI3569V100 ++ tristate "Hi3569V100 Clock Driver" ++ depends on ARCH_HI3569V100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3569v100. ++ ++config COMMON_CLK_HI3521A ++ tristate "Hi3521A Clock Driver" ++ depends on ARCH_HI3521A || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3521A. ++ ++config COMMON_CLK_HI3531A ++ tristate "Hi3531A Clock Driver" ++ depends on ARCH_HI3531A || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI_BVT ++ help ++ Build the clock driver for hi3531A. ++ ++config COMMON_CLK_HI3556AV100 ++ tristate "Hi3556AV100 Clock Driver" ++ depends on ARCH_HI3556AV100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3556av100. ++ ++config COMMON_CLK_HI3519AV100 ++ tristate "Hi3519AV100 Clock Driver" ++ depends on ARCH_HI3519AV100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3519av100. ++ ++config COMMON_CLK_HI3568V100 ++ tristate "Hi3568V100 Clock Driver" ++ depends on ARCH_HI3568V100 || COMPILE_TEST ++ select RESET_HISI ++ default ARCH_HISI ++ help ++ Build the clock driver for hi3568v100. ++ + config COMMON_CLK_HI6220 + bool "Hi6220 Clock Driver" + depends on ARCH_HISI || COMPILE_TEST +@@ -46,7 +238,7 @@ config COMMON_CLK_HI6220 + + config RESET_HISI + bool "HiSilicon Reset Controller Driver" +- depends on ARCH_HISI || COMPILE_TEST ++ depends on ARCH_HISI || COMPILE_TEST || ARCH_HISI_BVT + select RESET_CONTROLLER + help + Build reset controller driver for HiSilicon device chipsets. +diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile +index b2441b99f..91dc23fdb 100644 +--- a/drivers/clk/hisilicon/Makefile ++++ b/drivers/clk/hisilicon/Makefile +@@ -14,6 +14,7 @@ obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o + obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o + obj-$(CONFIG_COMMON_CLK_HI3798CV200) += crg-hi3798cv200.o + obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o ++obj-$(CONFIG_COMMON_CLK_HI3516DV300) += clk-hi3516dv300.o + obj-$(CONFIG_RESET_HISI) += reset.o + obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o + obj-$(CONFIG_STUB_CLK_HI3660) += clk-hi3660-stub.o +diff --git a/drivers/clk/hisilicon/clk-hi3516dv300.c b/drivers/clk/hisilicon/clk-hi3516dv300.c +new file mode 100644 +index 000000000..1a2ab9975 +--- /dev/null ++++ b/drivers/clk/hisilicon/clk-hi3516dv300.c +@@ -0,0 +1,271 @@ ++/* ++ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include "clk.h" ++#include "crg.h" ++#include "reset.h" ++ ++static struct hisi_fixed_rate_clock hi3516dv300_fixed_rate_clks[] __initdata = { ++ { HI3516DV300_FIXED_3M, "3m", NULL, 0, 3000000, }, ++ { HI3516DV300_FIXED_6M, "6m", NULL, 0, 6000000, }, ++ { HI3516DV300_FIXED_12M, "12m", NULL, 0, 12000000, }, ++ { HI3516DV300_FIXED_24M, "24m", NULL, 0, 24000000, }, ++ { HI3516DV300_FIXED_25M, "25m", NULL, 0, 25000000, }, ++ { HI3516DV300_FIXED_50M, "50m", NULL, 0, 50000000, }, ++ { HI3516DV300_FIXED_54M, "54m", NULL, 0, 54000000, }, ++ { HI3516DV300_FIXED_83P3M, "83.3m", NULL, 0, 83300000, }, ++ { HI3516DV300_FIXED_100M, "100m", NULL, 0, 100000000, }, ++ { HI3516DV300_FIXED_125M, "125m", NULL, 0, 125000000, }, ++ { HI3516DV300_FIXED_150M, "150m", NULL, 0, 150000000, }, ++ { HI3516DV300_FIXED_163M, "163m", NULL, 0, 163000000, }, ++ { HI3516DV300_FIXED_200M, "200m", NULL, 0, 200000000, }, ++ { HI3516DV300_FIXED_250M, "250m", NULL, 0, 250000000, }, ++ { HI3516DV300_FIXED_257M, "257m", NULL, 0, 257000000, }, ++ { HI3516DV300_FIXED_300M, "300m", NULL, 0, 300000000, }, ++ { HI3516DV300_FIXED_324M, "324m", NULL, 0, 324000000, }, ++ { HI3516DV300_FIXED_342M, "342m", NULL, 0, 342000000, }, ++ { HI3516DV300_FIXED_342M, "375m", NULL, 0, 375000000, }, ++ { HI3516DV300_FIXED_396M, "396m", NULL, 0, 396000000, }, ++ { HI3516DV300_FIXED_400M, "400m", NULL, 0, 400000000, }, ++ { HI3516DV300_FIXED_448M, "448m", NULL, 0, 448000000, }, ++ { HI3516DV300_FIXED_500M, "500m", NULL, 0, 500000000, }, ++ { HI3516DV300_FIXED_540M, "540m", NULL, 0, 540000000, }, ++ { HI3516DV300_FIXED_600M, "600m", NULL, 0, 600000000, }, ++ { HI3516DV300_FIXED_750M, "750m", NULL, 0, 750000000, }, ++ { HI3516DV300_FIXED_1000M, "1000m", NULL, 0, 1000000000, }, ++ { HI3516DV300_FIXED_1500M, "1500m", NULL, 0, 1500000000UL, }, ++}; ++ ++static const char *sysaxi_mux_p[] __initconst = { ++ "24m", "200m", "300m" ++}; ++static const char *sysapb_mux_p[] __initconst = {"24m", "50m"}; ++static const char *uart_mux_p[] __initconst = {"24m", "6m"}; ++static const char *fmc_mux_p[] __initconst = {"24m", "100m", "150m", "163m", "200m", "257m", "300m", "396m"}; ++static const char *eth_mux_p[] __initconst = {"100m", "54m"}; ++static const char *mmc_mux_p[] __initconst = {"100m", "50m", "25m"}; ++static const char *pwm_mux_p[] __initconst = {"3m", "50m", "24m", "24m"}; ++ ++static u32 sysaxi_mux_table[] = {0, 1, 2}; ++static u32 sysapb_mux_table[] = {0, 1}; ++static u32 uart_mux_table[] = {0, 1}; ++static u32 fmc_mux_table[] = {0, 1, 2, 3, 4, 5, 6, 7}; ++static u32 eth_mux_table[] = {0, 1}; ++static u32 mmc_mux_table[] = {1, 2, 3}; ++static u32 pwm_mux_table[] = {0, 1, 2, 3}; ++ ++static struct hisi_mux_clock hi3516dv300_mux_clks[] __initdata = { ++ { ++ HI3516DV300_SYSAXI_CLK, "sysaxi_mux", sysaxi_mux_p, ++ ARRAY_SIZE(sysaxi_mux_p), ++ CLK_SET_RATE_PARENT, 0x80, 6, 2, 0, sysaxi_mux_table, ++ }, ++ { ++ HI3516DV300_SYSAPB_CLK, "sysapb_mux", sysapb_mux_p, ++ ARRAY_SIZE(sysapb_mux_p), ++ CLK_SET_RATE_PARENT, 0x80, 10, 1, 0, sysapb_mux_table, ++ }, ++ { ++ HI3516DV300_FMC_MUX, "fmc_mux", fmc_mux_p, ARRAY_SIZE(fmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x144, 2, 3, 0, fmc_mux_table, ++ }, ++ { ++ HI3516DV300_MMC0_MUX, "mmc0_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x148, 2, 2, 0, mmc_mux_table, ++ }, ++ { ++ HI3516DV300_MMC1_MUX, "mmc1_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x160, 2, 2, 0, mmc_mux_table, ++ }, ++ { ++ HI3516DV300_MMC2_MUX, "mmc2_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x154, 2, 2, 0, mmc_mux_table, ++ }, ++ { ++ HI3516DV300_UART_MUX, "uart_mux0", uart_mux_p, ++ ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 18, 1, 0, uart_mux_table, ++ }, ++ { ++ HI3516DV300_UART1_MUX, "uart_mux1", uart_mux_p, ++ ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 19, 1, 0, uart_mux_table, ++ }, ++ { ++ HI3516DV300_UART2_MUX, "uart_mux2", uart_mux_p, ++ ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 20, 1, 0, uart_mux_table, ++ }, ++ { ++ HI3516DV300_UART3_MUX, "uart_mux3", uart_mux_p, ++ ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 21, 1, 0, uart_mux_table, ++ }, ++ { ++ HI3516DV300_UART4_MUX, "uart_mux4", uart_mux_p, ++ ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 22, 1, 0, uart_mux_table, ++ }, ++ { ++ HI3516DV300_PWM_MUX, "pwm_mux", pwm_mux_p, ++ ARRAY_SIZE(pwm_mux_p), ++ CLK_SET_RATE_PARENT, 0x1bc, 8, 2, 0, pwm_mux_table, ++ }, ++ /* ethernet clock select */ ++ { ++ HI3516DV300_ETH_MUX, "eth_mux", eth_mux_p, ARRAY_SIZE(eth_mux_p), ++ CLK_SET_RATE_PARENT, 0x16c, 7, 1, 0, eth_mux_table, ++ }, ++}; ++ ++static struct hisi_fixed_factor_clock hi3516dv300_fixed_factor_clks[] __initdata ++ = { ++ { ++ HI3516DV300_SYSAXI_CLK, "clk_sysaxi", "sysaxi_mux", 1, 4, ++ CLK_SET_RATE_PARENT ++ }, ++}; ++ ++static struct hisi_gate_clock hi3516dv300_gate_clks[] __initdata = { ++ { ++ HI3516DV300_FMC_CLK, "clk_fmc", "fmc_mux", ++ CLK_SET_RATE_PARENT, 0x144, 1, 0, ++ }, ++ { ++ HI3516DV300_MMC0_CLK, "clk_mmc0", "mmc0_mux", ++ CLK_SET_RATE_PARENT, 0x148, 1, 0, ++ }, ++ { ++ HI3516DV300_MMC1_CLK, "clk_mmc1", "mmc1_mux", ++ CLK_SET_RATE_PARENT, 0x160, 1, 0, ++ }, ++ { ++ HI3516DV300_MMC2_CLK, "clk_mmc2", "mmc2_mux", ++ CLK_SET_RATE_PARENT, 0x154, 1, 0, ++ }, ++ { ++ HI3516DV300_UART0_CLK, "clk_uart0", "uart_mux0", ++ CLK_SET_RATE_PARENT, 0x1b8, 0, 0, ++ }, ++ { ++ HI3516DV300_UART1_CLK, "clk_uart1", "uart_mux1", ++ CLK_SET_RATE_PARENT, 0x1b8, 1, 0, ++ }, ++ { ++ HI3516DV300_UART2_CLK, "clk_uart2", "uart_mux2", ++ CLK_SET_RATE_PARENT, 0x1b8, 2, 0, ++ }, ++ { ++ HI3516DV300_UART3_CLK, "clk_uart3", "uart_mux3", ++ CLK_SET_RATE_PARENT, 0x1b8, 3, 0, ++ }, ++ { ++ HI3516DV300_UART4_CLK, "clk_uart4", "uart_mux4", ++ CLK_SET_RATE_PARENT, 0x1b8, 4, 0, ++ }, ++ { ++ HI3516DV300_I2C0_CLK, "clk_i2c0", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 11, 0, ++ }, ++ { ++ HI3516DV300_I2C1_CLK, "clk_i2c1", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 12, 0, ++ }, ++ { ++ HI3516DV300_I2C2_CLK, "clk_i2c2", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 13, 0, ++ }, ++ { ++ HI3516DV300_I2C3_CLK, "clk_i2c3", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 14, 0, ++ }, ++ { ++ HI3516DV300_I2C4_CLK, "clk_i2c4", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 15, 0, ++ }, ++ { ++ HI3516DV300_I2C5_CLK, "clk_i2c5", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 16, 0, ++ }, ++ { ++ HI3516DV300_I2C6_CLK, "clk_i2c6", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 17, 0, ++ }, ++ { ++ HI3516DV300_I2C7_CLK, "clk_i2c7", "50m", ++ CLK_SET_RATE_PARENT, 0x1b8, 18, 0, ++ }, ++ { ++ HI3516DV300_SPI0_CLK, "clk_spi0", "100m", ++ CLK_SET_RATE_PARENT, 0x1bc, 12, 0, ++ }, ++ { ++ HI3516DV300_SPI1_CLK, "clk_spi1", "100m", ++ CLK_SET_RATE_PARENT, 0x1bc, 13, 0, ++ }, ++ { ++ HI3516DV300_SPI2_CLK, "clk_spi2", "100m", ++ CLK_SET_RATE_PARENT, 0x1bc, 14, 0, ++ }, ++ { ++ HI3516DV300_ETH0_CLK, "clk_eth0", "eth_mux", ++ CLK_SET_RATE_PARENT, 0x16c, 1, 0, ++ }, ++ { ++ HI3516DV300_DMAC_CLK, "clk_dmac", NULL, ++ CLK_SET_RATE_PARENT, 0x194, 1, 0, ++ }, ++ { ++ HI3516DV300_DMAC_AXICLK, "axiclk_dmac", NULL, ++ CLK_SET_RATE_PARENT, 0x194, 2, 0, ++ }, ++ { ++ HI3516DV300_PWM_CLK, "clk_pwm", "pwm_mux", ++ CLK_SET_RATE_PARENT, 0x1bc, 7, 0, ++ }, ++}; ++ ++static void __init hi3516dv300_clk_init(struct device_node *np) ++{ ++ struct hisi_clock_data *clk_data; ++ ++ clk_data = hisi_clk_init(np, HI3516DV300_NR_CLKS); ++ if (!clk_data) ++ return; ++ if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) ++ hibvt_reset_init(np, HI3516DV300_NR_RSTS); ++ ++ hisi_clk_register_fixed_rate(hi3516dv300_fixed_rate_clks, ++ ARRAY_SIZE(hi3516dv300_fixed_rate_clks), ++ clk_data); ++ hisi_clk_register_mux(hi3516dv300_mux_clks, ARRAY_SIZE(hi3516dv300_mux_clks), ++ clk_data); ++ hisi_clk_register_fixed_factor(hi3516dv300_fixed_factor_clks, ++ ARRAY_SIZE(hi3516dv300_fixed_factor_clks), clk_data); ++ hisi_clk_register_gate(hi3516dv300_gate_clks, ++ ARRAY_SIZE(hi3516dv300_gate_clks), clk_data); ++} ++ ++CLK_OF_DECLARE(hi3516dv300_clk, "hisilicon,hi3516dv300-clock", ++ hi3516dv300_clk_init); ++ +diff --git a/drivers/clk/hisilicon/clk-hi3519av100.c b/drivers/clk/hisilicon/clk-hi3519av100.c +new file mode 100644 +index 000000000..657767941 +--- /dev/null ++++ b/drivers/clk/hisilicon/clk-hi3519av100.c +@@ -0,0 +1,559 @@ ++/* ++ * Hi3519A Clock Driver ++ * ++ * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include "clk.h" ++#include "reset.h" ++ ++struct hi3519av100_pll_clock { ++ u32 id; ++ const char *name; ++ const char *parent_name; ++ u32 ctrl_reg1; ++ u8 frac_shift; ++ u8 frac_width; ++ u8 postdiv1_shift; ++ u8 postdiv1_width; ++ u8 postdiv2_shift; ++ u8 postdiv2_width; ++ u32 ctrl_reg2; ++ u8 fbdiv_shift; ++ u8 fbdiv_width; ++ u8 refdiv_shift; ++ u8 refdiv_width; ++}; ++ ++struct hi3519av100_clk_pll { ++ struct clk_hw hw; ++ u32 id; ++ void __iomem *ctrl_reg1; ++ u8 frac_shift; ++ u8 frac_width; ++ u8 postdiv1_shift; ++ u8 postdiv1_width; ++ u8 postdiv2_shift; ++ u8 postdiv2_width; ++ void __iomem *ctrl_reg2; ++ u8 fbdiv_shift; ++ u8 fbdiv_width; ++ u8 refdiv_shift; ++ u8 refdiv_width; ++}; ++ ++static struct hi3519av100_pll_clock hi3519av100_pll_clks[] __initdata = { ++ { ++ HI3519AV100_APLL_CLK, "apll", NULL, 0x0, 0, 24, 24, 3, 28, 3, ++ 0x4, 0, 12, 12, 6 ++ }, ++}; ++ ++#define to_pll_clk(_hw) container_of(_hw, struct hi3519av100_clk_pll, hw) ++ ++/* soc clk config */ ++static struct hisi_fixed_rate_clock hi3519av100_fixed_rate_clks[] __initdata = { ++ { HI3519AV100_FIXED_2376M, "2376m", NULL, 0, 2376000000UL, }, ++ { HI3519AV100_FIXED_1188M, "1188m", NULL, 0, 1188000000, }, ++ { HI3519AV100_FIXED_594M, "594m", NULL, 0, 594000000, }, ++ { HI3519AV100_FIXED_297M, "297m", NULL, 0, 297000000, }, ++ { HI3519AV100_FIXED_148P5M, "148p5m", NULL, 0, 148500000, }, ++ { HI3519AV100_FIXED_74P25M, "74p25m", NULL, 0, 74250000, }, ++ { HI3519AV100_FIXED_792M, "792m", NULL, 0, 792000000, }, ++ { HI3519AV100_FIXED_475M, "475m", NULL, 0, 475000000, }, ++ { HI3519AV100_FIXED_340M, "340m", NULL, 0, 340000000, }, ++ { HI3519AV100_FIXED_72M, "72m", NULL, 0, 72000000, }, ++ { HI3519AV100_FIXED_400M, "400m", NULL, 0, 400000000, }, ++ { HI3519AV100_FIXED_200M, "200m", NULL, 0, 200000000, }, ++ { HI3519AV100_FIXED_54M, "54m", NULL, 0, 54000000, }, ++ { HI3519AV100_FIXED_27M, "27m", NULL, 0, 1188000000, }, ++ { HI3519AV100_FIXED_37P125M, "37p125m", NULL, 0, 37125000, }, ++ { HI3519AV100_FIXED_3000M, "3000m", NULL, 0, 3000000000UL, }, ++ { HI3519AV100_FIXED_1500M, "1500m", NULL, 0, 1500000000, }, ++ { HI3519AV100_FIXED_500M, "500m", NULL, 0, 500000000, }, ++ { HI3519AV100_FIXED_250M, "250m", NULL, 0, 250000000, }, ++ { HI3519AV100_FIXED_125M, "125m", NULL, 0, 125000000, }, ++ { HI3519AV100_FIXED_1000M, "1000m", NULL, 0, 1000000000, }, ++ { HI3519AV100_FIXED_600M, "600m", NULL, 0, 600000000, }, ++ { HI3519AV100_FIXED_750M, "750m", NULL, 0, 750000000, }, ++ { HI3519AV100_FIXED_150M, "150m", NULL, 0, 150000000, }, ++ { HI3519AV100_FIXED_75M, "75m", NULL, 0, 75000000, }, ++ { HI3519AV100_FIXED_300M, "300m", NULL, 0, 300000000, }, ++ { HI3519AV100_FIXED_60M, "60m", NULL, 0, 60000000, }, ++ { HI3519AV100_FIXED_214M, "214m", NULL, 0, 214000000, }, ++ { HI3519AV100_FIXED_107M, "107m", NULL, 0, 107000000, }, ++ { HI3519AV100_FIXED_100M, "100m", NULL, 0, 100000000, }, ++ { HI3519AV100_FIXED_50M, "50m", NULL, 0, 50000000, }, ++ { HI3519AV100_FIXED_25M, "25m", NULL, 0, 25000000, }, ++ { HI3519AV100_FIXED_24M, "24m", NULL, 0, 24000000, }, ++ { HI3519AV100_FIXED_3M, "3m", NULL, 0, 3000000, }, ++ { HI3519AV100_FIXED_100K, "100k", NULL, 0, 100000, }, ++ { HI3519AV100_FIXED_400K, "400k", NULL, 0, 400000, }, ++ { HI3519AV100_FIXED_49P5M, "49p5m", NULL, 0, 49500000, }, ++ { HI3519AV100_FIXED_99M, "99m", NULL, 0, 99000000, }, ++ { HI3519AV100_FIXED_187P5M, "187p5m", NULL, 0, 187500000, }, ++ { HI3519AV100_FIXED_198M, "198m", NULL, 0, 198000000, }, ++}; ++ ++ ++static const char *fmc_mux_p[] __initdata = { ++ "24m", "100m", "150m", "198m", "250m", "300m", "396m" ++}; ++static u32 fmc_mux_table[] = {0, 1, 2, 3, 4, 5, 6}; ++ ++static const char *mmc_mux_p[] __initdata = { ++ "100k", "25m", "49p5m", "99m", "187p5m", "150m", "198m", "400k" ++}; ++static u32 mmc_mux_table[] = {0, 1, 2, 3, 4, 5, 6, 7}; ++ ++static const char *sysapb_mux_p[] __initdata = { ++ "24m", "50m", ++}; ++static u32 sysapb_mux_table[] = {0, 1}; ++ ++static const char *sysbus_mux_p[] __initdata = { ++ "24m", "300m" ++}; ++static u32 sysbus_mux_table[] = {0, 1}; ++ ++static const char *uart_mux_p[] __initdata = {"50m", "24m", "3m"}; ++static u32 uart_mux_table[] = {0, 1, 2}; ++ ++static const char *a53_1_clksel_mux_p[] __initdata = { ++ "24m", "apll", "vpll", "792m" ++}; ++static u32 a53_1_clksel_mux_table[] = {0, 1, 2, 3}; ++ ++static struct hisi_mux_clock hi3519av100_mux_clks[] __initdata = { ++ { ++ HI3519AV100_FMC_MUX, "fmc_mux", fmc_mux_p, ARRAY_SIZE(fmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x170, 2, 3, 0, fmc_mux_table, ++ }, ++ ++ { ++ HI3519AV100_MMC0_MUX, "mmc0_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a8, 24, 3, 0, mmc_mux_table, ++ }, ++ ++ { ++ HI3519AV100_MMC1_MUX, "mmc1_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x1ec, 24, 3, 0, mmc_mux_table, ++ }, ++ ++ { ++ HI3519AV100_MMC2_MUX, "mmc2_mux", mmc_mux_p, ARRAY_SIZE(mmc_mux_p), ++ CLK_SET_RATE_PARENT, 0x214, 24, 3, 0, mmc_mux_table, ++ }, ++ ++ { ++ HI3519AV100_SYSAPB_MUX, "sysapb_mux", sysapb_mux_p, ARRAY_SIZE(sysapb_mux_p), ++ CLK_SET_RATE_PARENT, 0xe8, 3, 1, 0, sysapb_mux_table ++ }, ++ ++ { ++ HI3519AV100_SYSBUS_MUX, "sysbus_mux", sysbus_mux_p, ARRAY_SIZE(sysbus_mux_p), ++ CLK_SET_RATE_PARENT, 0xe8, 0, 1, 1, sysbus_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART0_MUX, "uart0_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 0, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART1_MUX, "uart1_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 2, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART2_MUX, "uart2_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 4, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART3_MUX, "uart3_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 6, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART4_MUX, "uart4_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 8, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART5_MUX, "uart5_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 10, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART6_MUX, "uart6_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 12, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART7_MUX, "uart7_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 14, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_UART8_MUX, "uart8_mux", uart_mux_p, ARRAY_SIZE(uart_mux_p), ++ CLK_SET_RATE_PARENT, 0x1a4, 28, 2, 1, uart_mux_table ++ }, ++ ++ { ++ HI3519AV100_A53_1_MUX, "a53_1_mux", a53_1_clksel_mux_p, ARRAY_SIZE(a53_1_clksel_mux_p), ++ CLK_SET_RATE_PARENT, 0xe4, 10, 2, 3, a53_1_clksel_mux_table ++ }, ++ ++}; ++ ++static struct hisi_fixed_factor_clock hi3519av100_fixed_factor_clks[] __initdata ++ = { ++ ++}; ++ ++static struct hisi_gate_clock hi3519av100_gate_clks[] __initdata = { ++ { ++ HI3519AV100_FMC_CLK, "clk_fmc", "fmc_mux", ++ CLK_SET_RATE_PARENT, 0x170, 1, 0, ++ }, ++ { ++ HI3519AV100_MMC0_CLK, "clk_mmc0", "mmc0_mux", ++ CLK_SET_RATE_PARENT, 0x1a8, 28, 0, ++ }, ++ { ++ HI3519AV100_MMC1_CLK, "clk_mmc1", "mmc1_mux", ++ CLK_SET_RATE_PARENT, 0x1ec, 28, 0, ++ }, ++ { ++ HI3519AV100_MMC2_CLK, "clk_mmc2", "mmc2_mux", ++ CLK_SET_RATE_PARENT, 0x214, 28, 0, ++ }, ++ { ++ HI3519AV100_UART0_CLK, "clk_uart0", "uart0_mux", ++ CLK_SET_RATE_PARENT, 0x198, 16, 0, ++ }, ++ { ++ HI3519AV100_UART1_CLK, "clk_uart1", "uart1_mux", ++ CLK_SET_RATE_PARENT, 0x198, 17, 0, ++ }, ++ { ++ HI3519AV100_UART2_CLK, "clk_uart2", "uart2_mux", ++ CLK_SET_RATE_PARENT, 0x198, 18, 0, ++ }, ++ { ++ HI3519AV100_UART3_CLK, "clk_uart3", "uart3_mux", ++ CLK_SET_RATE_PARENT, 0x198, 19, 0, ++ }, ++ { ++ HI3519AV100_UART4_CLK, "clk_uart4", "uart4_mux", ++ CLK_SET_RATE_PARENT, 0x198, 20, 0, ++ }, ++ { ++ HI3519AV100_UART5_CLK, "clk_uart5", "uart5_mux", ++ CLK_SET_RATE_PARENT, 0x198, 21, 0, ++ }, ++ { ++ HI3519AV100_UART6_CLK, "clk_uart6", "uart6_mux", ++ CLK_SET_RATE_PARENT, 0x198, 22, 0, ++ }, ++ { ++ HI3519AV100_UART7_CLK, "clk_uart7", "uart7_mux", ++ CLK_SET_RATE_PARENT, 0x198, 23, 0, ++ }, ++ { ++ HI3519AV100_UART8_CLK, "clk_uart8", "uart8_mux", ++ CLK_SET_RATE_PARENT, 0x198, 29, 0, ++ }, ++ { ++ HI3519AV100_ETH_CLK, "clk_eth", NULL, ++ CLK_SET_RATE_PARENT, 0x0174, 1, 0, ++ }, ++ { ++ HI3519AV100_ETH_MACIF_CLK, "clk_eth_macif", NULL, ++ CLK_SET_RATE_PARENT, 0x0174, 5, 0, ++ }, ++ /* i2c */ ++ { ++ HI3519AV100_I2C0_CLK, "clk_i2c0", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 16, 0, ++ }, ++ { ++ HI3519AV100_I2C1_CLK, "clk_i2c1", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 17, 0, ++ }, ++ { ++ HI3519AV100_I2C2_CLK, "clk_i2c2", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 18, 0, ++ }, ++ { ++ HI3519AV100_I2C3_CLK, "clk_i2c3", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 19, 0, ++ }, ++ { ++ HI3519AV100_I2C4_CLK, "clk_i2c4", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 20, 0, ++ }, ++ { ++ HI3519AV100_I2C5_CLK, "clk_i2c5", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 21, 0, ++ }, ++ { ++ HI3519AV100_I2C6_CLK, "clk_i2c6", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 22, 0, ++ }, ++ { ++ HI3519AV100_I2C7_CLK, "clk_i2c7", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 23, 0, ++ }, ++ { ++ HI3519AV100_I2C8_CLK, "clk_i2c8", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 24, 0, ++ }, ++ { ++ HI3519AV100_I2C9_CLK, "clk_i2c9", "50m", ++ CLK_SET_RATE_PARENT, 0x01a0, 25, 0, ++ }, ++ { ++ HI3519AV100_SPI0_CLK, "clk_spi0", "100m", ++ CLK_SET_RATE_PARENT, 0x0198, 24, 0, ++ }, ++ { ++ HI3519AV100_SPI1_CLK, "clk_spi1", "100m", ++ CLK_SET_RATE_PARENT, 0x0198, 25, 0, ++ }, ++ { ++ HI3519AV100_SPI2_CLK, "clk_spi2", "100m", ++ CLK_SET_RATE_PARENT, 0x0198, 26, 0, ++ }, ++ { ++ HI3519AV100_SPI3_CLK, "clk_spi3", "100m", ++ CLK_SET_RATE_PARENT, 0x0198, 27, 0, ++ }, ++ { ++ HI3519AV100_SPI4_CLK, "clk_spi4", "100m", ++ CLK_SET_RATE_PARENT, 0x0198, 28, 0, ++ }, ++ { ++ HI3519AV100_EDMAC_AXICLK, "axi_clk_edmac", NULL, ++ CLK_SET_RATE_PARENT, 0x16c, 6, 0, ++ }, ++ { ++ HI3519AV100_EDMAC_CLK, "clk_edmac", NULL, ++ CLK_SET_RATE_PARENT, 0x16c, 5, 0, ++ }, ++ { ++ HI3519AV100_EDMAC1_AXICLK, "axi_clk_edmac1", NULL, ++ CLK_SET_RATE_PARENT, 0x16c, 9, 0, ++ }, ++ { ++ HI3519AV100_EDMAC1_CLK, "clk_edmac1", NULL, ++ CLK_SET_RATE_PARENT, 0x16c, 8, 0, ++ }, ++ { ++ HI3519AV100_VDMAC_CLK, "clk_vdmac", NULL, ++ CLK_SET_RATE_PARENT, 0x14c, 5, 0, ++ }, ++}; ++ ++static void hi3519av100_calc_pll(u32 *frac_val, ++ u32 *postdiv1_val, ++ u32 *postdiv2_val, ++ u32 *fbdiv_val, ++ u32 *refdiv_val, ++ u64 rate) ++{ ++ u64 rem; ++ *frac_val = 0; ++ rem = do_div(rate, 1000000); ++ *fbdiv_val = rate; ++ *refdiv_val = 24; ++ if ((rem * (1 << 24)) > ULLONG_MAX) { ++ pr_err("Data over limits!\n"); ++ return; ++ } ++ rem = rem * (1 << 24); ++ do_div(rem, 1000000); ++ *frac_val = rem; ++} ++ ++static int clk_pll_set_rate(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct hi3519av100_clk_pll *clk = to_pll_clk(hw); ++ u32 frac_val, postdiv1_val, postdiv2_val, fbdiv_val, refdiv_val; ++ u32 val; ++ ++ postdiv1_val = postdiv2_val = 0; ++ ++ hi3519av100_calc_pll(&frac_val, &postdiv1_val, &postdiv2_val, ++ &fbdiv_val, &refdiv_val, rate); ++ ++ val = readl_relaxed(clk->ctrl_reg1); ++ val &= ~(((1 << clk->frac_width) - 1) << clk->frac_shift); ++ val &= ~(((1 << clk->postdiv1_width) - 1) << clk->postdiv1_shift); ++ val &= ~(((1 << clk->postdiv2_width) - 1) << clk->postdiv2_shift); ++ ++ val |= frac_val << clk->frac_shift; ++ val |= postdiv1_val << clk->postdiv1_shift; ++ val |= postdiv2_val << clk->postdiv2_shift; ++ writel_relaxed(val, clk->ctrl_reg1); ++ ++ val = readl_relaxed(clk->ctrl_reg2); ++ val &= ~(((1 << clk->fbdiv_width) - 1) << clk->fbdiv_shift); ++ val &= ~(((1 << clk->refdiv_width) - 1) << clk->refdiv_shift); ++ ++ val |= fbdiv_val << clk->fbdiv_shift; ++ val |= refdiv_val << clk->refdiv_shift; ++ writel_relaxed(val, clk->ctrl_reg2); ++ ++ return 0; ++} ++ ++static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct hi3519av100_clk_pll *clk = to_pll_clk(hw); ++ u64 frac_val, fbdiv_val; ++ u32 val; ++ u64 tmp, rate; ++ u32 refdiv_val; ++ ++ val = readl_relaxed(clk->ctrl_reg1); ++ val = val >> clk->frac_shift; ++ val &= ((1 << clk->frac_width) - 1); ++ frac_val = val; ++ ++ val = readl_relaxed(clk->ctrl_reg2); ++ val = val >> clk->fbdiv_shift; ++ val &= ((1 << clk->fbdiv_width) - 1); ++ fbdiv_val = val; ++ ++ val = readl_relaxed(clk->ctrl_reg2); ++ val = val >> clk->refdiv_shift; ++ val &= ((1 << clk->refdiv_width) - 1); ++ refdiv_val = val; ++ ++ /* rate = 24000000 * (fbdiv + frac / (1<<24) ) / refdiv */ ++ rate = 0; ++ if ((24000000 * fbdiv_val) > ULLONG_MAX) { ++ pr_err("Data over limits!\n"); ++ return 0; ++ } ++ tmp = 24000000 * fbdiv_val; ++ rate += tmp; ++ do_div(rate, refdiv_val); ++ ++ return rate; ++} ++ ++static int clk_pll_determine_rate(struct clk_hw *hw, ++ struct clk_rate_request *req) ++{ ++ return req->rate; ++} ++ ++static struct clk_ops clk_pll_ops = { ++ .set_rate = clk_pll_set_rate, ++ .determine_rate = clk_pll_determine_rate, ++ .recalc_rate = clk_pll_recalc_rate, ++}; ++ ++void __init hi3519av100_clk_register_pll(struct hi3519av100_pll_clock *clks, ++ int nums, struct hisi_clock_data *data) ++{ ++ int i; ++ void __iomem *base = NULL; ++ ++ if (clks == NULL || data == NULL) ++ return; ++ ++ base = data->base; ++ for (i = 0; i < nums; i++) { ++ struct hi3519av100_clk_pll *p_clk = NULL; ++ struct clk *clk = NULL; ++ struct clk_init_data init; ++ ++ p_clk = kzalloc(sizeof(*p_clk), GFP_KERNEL); ++ if (!p_clk) ++ return; ++ ++ init.name = clks[i].name; ++ init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; ++ init.parent_names = ++ (clks[i].parent_name ? &clks[i].parent_name : NULL); ++ init.num_parents = (clks[i].parent_name ? 1 : 0); ++ init.ops = &clk_pll_ops; ++ ++ p_clk->ctrl_reg1 = base + clks[i].ctrl_reg1; ++ p_clk->frac_shift = clks[i].frac_shift; ++ p_clk->frac_width = clks[i].frac_width; ++ p_clk->postdiv1_shift = clks[i].postdiv1_shift; ++ p_clk->postdiv1_width = clks[i].postdiv1_width; ++ p_clk->postdiv2_shift = clks[i].postdiv2_shift; ++ p_clk->postdiv2_width = clks[i].postdiv2_width; ++ ++ p_clk->ctrl_reg2 = base + clks[i].ctrl_reg2; ++ p_clk->fbdiv_shift = clks[i].fbdiv_shift; ++ p_clk->fbdiv_width = clks[i].fbdiv_width; ++ p_clk->refdiv_shift = clks[i].refdiv_shift; ++ p_clk->refdiv_width = clks[i].refdiv_width; ++ p_clk->hw.init = &init; ++ ++ clk = clk_register(NULL, &p_clk->hw); ++ if (IS_ERR(clk)) { ++ kfree(p_clk); ++ pr_err("%s: failed to register clock %s\n", ++ __func__, clks[i].name); ++ continue; ++ } ++ ++ data->clk_data.clks[clks[i].id] = clk; ++ } ++} ++ ++static void __init hi3519av100_clk_init(struct device_node *np) ++{ ++ struct hisi_clock_data *clk_data; ++ ++ clk_data = hisi_clk_init(np, HI3519AV100_NR_CLKS); ++ if (!clk_data) ++ return; ++ if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) ++ hibvt_reset_init(np, HI3519AV100_NR_RSTS); ++ ++ hisi_clk_register_fixed_rate(hi3519av100_fixed_rate_clks, ++ ARRAY_SIZE(hi3519av100_fixed_rate_clks), ++ clk_data); ++ hisi_clk_register_mux(hi3519av100_mux_clks, ARRAY_SIZE(hi3519av100_mux_clks), ++ clk_data); ++ hisi_clk_register_fixed_factor(hi3519av100_fixed_factor_clks, ++ ARRAY_SIZE(hi3519av100_fixed_factor_clks), clk_data); ++ hisi_clk_register_gate(hi3519av100_gate_clks, ++ ARRAY_SIZE(hi3519av100_gate_clks), clk_data); ++ ++ hi3519av100_clk_register_pll(hi3519av100_pll_clks, ++ ARRAY_SIZE(hi3519av100_pll_clks), clk_data); ++} ++ ++CLK_OF_DECLARE(hi3519av100_clk, "hisilicon,hi3519av100-clock", ++ hi3519av100_clk_init); +diff --git a/drivers/clk/hisilicon/clk-hisi-phase.c b/drivers/clk/hisilicon/clk-hisi-phase.c +index ba6afad66..b13b91609 100644 +--- a/drivers/clk/hisilicon/clk-hisi-phase.c ++++ b/drivers/clk/hisilicon/clk-hisi-phase.c +@@ -77,7 +77,7 @@ static int hisi_clk_set_phase(struct clk_hw *hw, int degrees) + + val = readl(phase->reg); + val &= ~phase->mask; +- val |= regval << phase->shift; ++ val |= (unsigned int)regval << phase->shift; + writel(val, phase->reg); + + spin_unlock_irqrestore(phase->lock, flags); +diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c +index 54d9fdc93..9ca4fc05f 100644 +--- a/drivers/clk/hisilicon/clk.c ++++ b/drivers/clk/hisilicon/clk.c +@@ -82,6 +82,10 @@ struct hisi_clock_data *hisi_clk_init(struct device_node *np, + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data->clk_data); + return clk_data; + err_data: ++ if (base) { ++ iounmap(base); ++ base = NULL; ++ } + kfree(clk_data); + err: + return NULL; +diff --git a/drivers/clk/hisilicon/crg.h b/drivers/clk/hisilicon/crg.h +index 803f6ba6d..a84758660 100644 +--- a/drivers/clk/hisilicon/crg.h ++++ b/drivers/clk/hisilicon/crg.h +@@ -13,7 +13,7 @@ struct hisi_reset_controller; + + struct hisi_crg_funcs { + struct hisi_clock_data* (*register_clks)(struct platform_device *pdev); +- void (*unregister_clks)(struct platform_device *pdev); ++ void (*unregister_clks)(const struct platform_device *pdev); + }; + + struct hisi_crg_dev { +diff --git a/drivers/clk/hisilicon/reset.c b/drivers/clk/hisilicon/reset.c +index 93cee17db..e9a03d924 100644 +--- a/drivers/clk/hisilicon/reset.c ++++ b/drivers/clk/hisilicon/reset.c +@@ -87,6 +87,36 @@ static const struct reset_control_ops hisi_reset_ops = { + .deassert = hisi_reset_deassert, + }; + ++#ifdef CONFIG_ARCH_HISI_BVT ++int __init hibvt_reset_init(struct device_node *np, ++ int nr_rsts) ++{ ++ struct hisi_reset_controller *rstc; ++ ++ rstc = kzalloc(sizeof(*rstc), GFP_KERNEL); ++ if (!rstc) ++ return -ENOMEM; ++ ++ rstc->membase = of_iomap(np, 0); ++ if (!rstc->membase){ ++ kfree(rstc); ++ return -EINVAL; ++ } ++ ++ spin_lock_init(&rstc->lock); ++ ++ rstc->rcdev.owner = THIS_MODULE; ++ rstc->rcdev.nr_resets = nr_rsts; ++ rstc->rcdev.ops = &hisi_reset_ops; ++ rstc->rcdev.of_node = np; ++ rstc->rcdev.of_reset_n_cells = 2; ++ rstc->rcdev.of_xlate = hisi_reset_of_xlate; ++ ++ return reset_controller_register(&rstc->rcdev); ++} ++EXPORT_SYMBOL_GPL(hibvt_reset_init); ++#endif ++ + struct hisi_reset_controller *hisi_reset_init(struct platform_device *pdev) + { + struct hisi_reset_controller *rstc; +diff --git a/drivers/clk/hisilicon/reset.h b/drivers/clk/hisilicon/reset.h +index 81ff9e9e3..5954bdf91 100644 +--- a/drivers/clk/hisilicon/reset.h ++++ b/drivers/clk/hisilicon/reset.h +@@ -11,6 +11,9 @@ struct hisi_reset_controller; + + #ifdef CONFIG_RESET_CONTROLLER + struct hisi_reset_controller *hisi_reset_init(struct platform_device *pdev); ++#ifdef CONFIG_ARCH_HISI_BVT ++int __init hibvt_reset_init(struct device_node *np, int nr_rsts); ++#endif + void hisi_reset_exit(struct hisi_reset_controller *rstc); + #else + static inline +diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig +index 39f4d8866..ddf6f7373 100644 +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -347,6 +347,14 @@ config ARM_ARCH_TIMER_EVTSTREAM + config ARM_ARCH_TIMER_OOL_WORKAROUND + bool + ++config ARM_ARCH_TIMER_VCT_ACCESS ++ bool "Support for ARM architected timer virtual counter access in userspace" ++ default n ++ depends on ARM_ARCH_TIMER ++ help ++ This option enables support for reading the ARM architected timer's ++ virtual counter in userspace. ++ + config FSL_ERRATUM_A008585 + bool "Workaround for Freescale/NXP Erratum A-008585" + default y +@@ -402,6 +410,12 @@ config ARM_TIMER_SP804 + select CLKSRC_MMIO + select TIMER_OF if OF + ++config TIMER_HISP804 ++ bool "Support for hisilicon SP804 module" ++ depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP ++ select CLKSRC_MMIO ++ select TIMER_OF if OF ++ + config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK + bool + depends on ARM_GLOBAL_TIMER +diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile +index 1c444cc3b..1a184f6ba 100644 +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -69,6 +69,7 @@ obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o + obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o + obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o + obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp804.o ++obj-$(CONFIG_TIMER_HISP804) += timer-hisp804.o + obj-$(CONFIG_ARCH_HAS_TICK_BROADCAST) += dummy_timer.o + obj-$(CONFIG_KEYSTONE_TIMER) += timer-keystone.o + obj-$(CONFIG_INTEGRATOR_AP_TIMER) += timer-integrator-ap.o +diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c +index f4881764b..d435d1266 100644 +--- a/drivers/clocksource/arm_arch_timer.c ++++ b/drivers/clocksource/arm_arch_timer.c +@@ -631,7 +631,8 @@ static bool arch_timer_counter_has_wa(void) + } + #else + #define arch_timer_check_ool_workaround(t,a) do { } while(0) +-#define arch_timer_this_cpu_has_cntvct_wa() ({false;}) ++#define arch_timer_this_cpu_has_cntvct_wa() \ ++ ({IS_ENABLED(CONFIG_ARM_ARCH_TIMER_VCT_ACCESS) ? false : true;}) + #define arch_timer_counter_has_wa() ({false;}) + #endif /* CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND */ + +diff --git a/drivers/clocksource/timer-hisp804.c b/drivers/clocksource/timer-hisp804.c +new file mode 100644 +index 000000000..b2c857a41 +--- /dev/null ++++ b/drivers/clocksource/timer-hisp804.c +@@ -0,0 +1,356 @@ ++/****************************************************************************** ++ * Copyright (C) 2017 Hisilicon Technologies CO.,LTD. ++ * ++ * Licensed under the Apache License, Version 2.0 (the "License"); ++ * you may not use this file except in compliance with the License. ++ * You may obtain a copy of the License at ++ * ++ * http://www.apache.org/licenses/LICENSE-2.0 ++ * ++ * Unless required by applicable law or agreed to in writing, software ++ * distributed under the License is distributed on an "AS IS" BASIS, ++ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++ * See the License for the specific language governing permissions and ++ * limitations under the License. ++ * ++ * Create By Cai Zhiying 2017.2.4 ++ * ++******************************************************************************/ ++ ++#define pr_fmt(fmt) "hisp804: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define TIMER_LOAD 0x00 /* ACVR rw */ ++#define TIMER_VALUE 0x04 /* ACVR ro */ ++#define TIMER_CTRL 0x08 /* ACVR rw */ ++#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */ ++#define TIMER_CTRL_32BIT (1 << 1) /* CVR */ ++#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */ ++#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */ ++#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */ ++#define TIMER_CTRL_IE (1 << 5) /* VR */ ++#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */ ++#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */ ++ ++#define TIMER_INTCLR 0x0c /* ACVR wo */ ++#define TIMER_RIS 0x10 /* CVR ro */ ++#define TIMER_MIS 0x14 /* CVR ro */ ++#define TIMER_BGLOAD 0x18 /* CVR rw */ ++ ++#define CPU_TASKS_FROZEN 0x0010 ++ ++struct hisp804_clocksource { ++ void __iomem *base; ++ struct clocksource clksrc; ++}; ++ ++#define to_hiclksrc(e) \ ++ container_of(e, struct hisp804_clocksource, clksrc) ++ ++static struct hisp804_clocksource hisp804_clksrc; ++ ++static void __iomem *hisp804_sched_clock_base; ++ ++struct hisp804_clockevent_device { ++ struct clock_event_device clkevt; ++ struct irqaction action; ++ void __iomem *base; ++ unsigned long rate; ++ unsigned long reload; ++ char name[16]; ++}; ++ ++#define to_hiclkevt(e) \ ++ container_of(e, struct hisp804_clockevent_device, clkevt) ++ ++static struct hisp804_clockevent_device __percpu *hisp804_clkevt; ++ ++static void hisp804_clocksource_enable(void __iomem *base) ++{ ++ writel(0, base + TIMER_CTRL); ++ writel(0xffffffff, base + TIMER_LOAD); ++ writel(0xffffffff, base + TIMER_VALUE); ++ writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, ++ base + TIMER_CTRL); ++} ++ ++static void hisp804_clocksource_resume(struct clocksource *cs) ++{ ++ hisp804_clocksource_enable(to_hiclksrc(cs)->base); ++} ++ ++static u64 notrace hisp804_sched_clock_read(void) ++{ ++ return ~readl_relaxed(hisp804_sched_clock_base + TIMER_VALUE); ++} ++ ++static cycle_t hisp804_clocksource_read(struct clocksource *cs) ++{ ++ return ~(cycle_t)readl_relaxed(to_hiclksrc(cs)->base + TIMER_VALUE); ++} ++ ++static void __init hisp804_clocksource_init(void __iomem *base, ++ unsigned long rate) ++{ ++ hisp804_clksrc.base = base; ++ hisp804_clksrc.clksrc.name = "hisp804"; ++ hisp804_clksrc.clksrc.rating = 499; ++ hisp804_clksrc.clksrc.read = hisp804_clocksource_read; ++ hisp804_clksrc.clksrc.resume = hisp804_clocksource_resume; ++ hisp804_clksrc.clksrc.mask = CLOCKSOURCE_MASK(32); ++ hisp804_clksrc.clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; ++ ++ hisp804_clocksource_enable(base); ++ ++ clocksource_register_hz(&hisp804_clksrc.clksrc, rate); ++ ++ hisp804_sched_clock_base = base; ++ sched_clock_register(hisp804_sched_clock_read, 32, rate); ++} ++ ++static int hisp804_clockevent_shutdown(struct clock_event_device *clkevt) ++{ ++ struct hisp804_clockevent_device *hiclkevt = to_hiclkevt(clkevt); ++ ++ writel(0, hiclkevt->base + TIMER_CTRL); ++ ++ return 0; ++} ++ ++static int hisp804_clockevent_set_next_event(unsigned long next, ++ struct clock_event_device *clkevt) ++{ ++ unsigned long ctrl; ++ struct hisp804_clockevent_device *hiclkevt = to_hiclkevt(clkevt); ++ ++ writel(TIMER_CTRL_32BIT, hiclkevt->base + TIMER_CTRL); ++ ++ writel(next, hiclkevt->base + TIMER_LOAD); ++ writel(next, hiclkevt->base + TIMER_LOAD); ++ ++ ctrl = TIMER_CTRL_32BIT | ++ TIMER_CTRL_IE | ++ TIMER_CTRL_ONESHOT | ++ TIMER_CTRL_ENABLE; ++ writel(ctrl, hiclkevt->base + TIMER_CTRL); ++ ++ return 0; ++} ++ ++static int sp804_clockevent_set_periodic(struct clock_event_device *clkevt) ++{ ++ unsigned long ctrl; ++ struct hisp804_clockevent_device *hiclkevt = to_hiclkevt(clkevt); ++ ++ writel(TIMER_CTRL_32BIT, hiclkevt->base + TIMER_CTRL); ++ ++ writel(hiclkevt->reload, hiclkevt->base + TIMER_LOAD); ++ writel(hiclkevt->reload, hiclkevt->base + TIMER_LOAD); ++ ++ ctrl = TIMER_CTRL_32BIT | ++ TIMER_CTRL_IE | ++ TIMER_CTRL_PERIODIC | ++ TIMER_CTRL_ENABLE; ++ writel(ctrl, hiclkevt->base + TIMER_CTRL); ++ ++ return 0; ++} ++ ++static irqreturn_t hisp804_clockevent_timer_interrupt(int irq, void *dev_id) ++{ ++ struct clock_event_device *clkevt = dev_id; ++ struct hisp804_clockevent_device *hiclkevt = to_hiclkevt(clkevt); ++ ++ /* clear the interrupt */ ++ writel(1, hiclkevt->base + TIMER_INTCLR); ++ ++ clkevt->event_handler(clkevt); ++ ++ return IRQ_HANDLED; ++} ++ ++static int hisp804_clockevent_setup(struct hisp804_clockevent_device *hiclkevt) ++{ ++ struct clock_event_device *clkevt = &hiclkevt->clkevt; ++ ++ writel(0, hiclkevt->base + TIMER_CTRL); ++ ++ BUG_ON(setup_irq(clkevt->irq, &hiclkevt->action)); ++ ++ irq_force_affinity(clkevt->irq, clkevt->cpumask); ++ ++ clockevents_config_and_register(clkevt, hiclkevt->rate, 0xf, ++ 0x7fffffff); ++ ++ return 0; ++} ++ ++static void hisp804_clockevent_stop(struct hisp804_clockevent_device *hiclkevt) ++{ ++ struct clock_event_device *clkevt = &hiclkevt->clkevt; ++ ++ pr_info("disable IRQ%d cpu #%d\n", clkevt->irq, smp_processor_id()); ++ ++ disable_irq(clkevt->irq); ++ ++ remove_irq(clkevt->irq, &hiclkevt->action); ++ ++ clkevt->set_state_shutdown(clkevt); ++} ++ ++static int hisp804_clockevent_cpu_notify(struct notifier_block *self, ++ unsigned long action, void *hcpu) ++{ ++ /* ++ * Grab cpu pointer in each case to avoid spurious ++ * preemptible warnings ++ */ ++ switch (action & ~CPU_TASKS_FROZEN) { ++ case CPU_ONLINE: ++ hisp804_clockevent_setup(this_cpu_ptr(hisp804_clkevt)); ++ break; ++ case CPU_DEAD: ++ hisp804_clockevent_stop(this_cpu_ptr(hisp804_clkevt)); ++ break; ++ default: ++ break; ++ } ++ ++ return NOTIFY_OK; ++} ++ ++static struct notifier_block hisp804_clockevent_cpu_nb = { ++ .notifier_call = hisp804_clockevent_cpu_notify, ++}; ++ ++static void __init clockevent_init(struct hisp804_clockevent_device *hiclkevt, ++ void __iomem *base, int irq, int cpu, ++ unsigned long rate, unsigned long reload) ++{ ++ struct irqaction *action = NULL; ++ struct clock_event_device *clkevt = NULL; ++ ++ hiclkevt->base = base; ++ hiclkevt->rate = rate; ++ hiclkevt->reload = reload; ++ snprintf(hiclkevt->name, sizeof(hiclkevt->name), "clockevent %d", cpu); ++ ++ clkevt = &hiclkevt->clkevt; ++ ++ clkevt->name = hiclkevt->name; ++ clkevt->cpumask = cpumask_of(cpu); ++ clkevt->irq = irq; ++ clkevt->set_next_event = hisp804_clockevent_set_next_event; ++ clkevt->set_state_shutdown = hisp804_clockevent_shutdown; ++ clkevt->set_state_periodic = sp804_clockevent_set_periodic; ++ clkevt->features = CLOCK_EVT_FEAT_PERIODIC | ++ CLOCK_EVT_FEAT_ONESHOT | ++ CLOCK_EVT_FEAT_DYNIRQ; ++ clkevt->rating = 400; ++ ++ action = &hiclkevt->action; ++ ++ action->name = hiclkevt->name; ++ action->dev_id = hiclkevt; ++ action->irq = irq; ++ action->flags = IRQF_TIMER | IRQF_NOBALANCING; ++ action->handler = hisp804_clockevent_timer_interrupt; ++} ++ ++static int __init hisp804_timer_init(struct device_node *node) ++{ ++ int ret, irq, ix, nr_cpus; ++ struct clk *clk1 = NULL, *clk2 = NULL; ++ void __iomem *base = NULL; ++ unsigned long rate1, rate2, reload1, reload2; ++ ++ hisp804_clkevt = alloc_percpu(struct hisp804_clockevent_device); ++ if (!hisp804_clkevt) { ++ pr_err("can't alloc memory.\n"); ++ goto out; ++ } ++ ++ clk1 = of_clk_get(node, 0); ++ if (IS_ERR(clk1)) ++ goto out_free; ++ ++ clk_prepare_enable(clk1); ++ ++ rate1 = clk_get_rate(clk1); ++ reload1 = DIV_ROUND_CLOSEST(rate1, HZ); ++ ++ /* Get the 2nd clock if the timer has 3 timer clocks */ ++ if (of_count_phandle_with_args(node, "clocks", "#clock-cells") == 3) { ++ clk2 = of_clk_get(node, 1); ++ if (IS_ERR(clk2)) { ++ pr_err("hisp804: %s clock not found: %d\n", node->name, ++ (int)PTR_ERR(clk2)); ++ goto out_free; ++ } ++ clk_prepare_enable(clk2); ++ rate2 = clk_get_rate(clk2); ++ reload2 = DIV_ROUND_CLOSEST(rate2, HZ); ++ } else { ++ rate2 = rate1; ++ reload2 = rate2; ++ } ++ ++ nr_cpus = of_irq_count(node); ++ if (nr_cpus > num_possible_cpus()) ++ nr_cpus = num_possible_cpus(); ++ ++ /* local timer for each CPU */ ++ for (ix = 0; ix < nr_cpus; ix++) { ++ irq = irq_of_parse_and_map(node, ix); ++ base = of_iomap(node, ix + 1); ++ if (!base) { ++ pr_err("can't iomap timer %d\n", ix); ++ while (--ix >= 0) ++ iounmap(per_cpu_ptr(hisp804_clkevt, ix)->base); ++ goto out_free; ++ } ++ ++ clockevent_init(per_cpu_ptr(hisp804_clkevt, ix), base, irq, ++ ix, rate2, reload2); ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) { ++ pr_err("can't iomap timer %d\n", 0); ++ goto out_unmap; ++ } ++ ++ hisp804_clocksource_init(base, rate1); ++ ++ ret = hi_register_cpu_notifier(&hisp804_clockevent_cpu_nb); ++ if (ret) ++ goto out_notifier; ++ ++ hisp804_clockevent_setup(this_cpu_ptr(hisp804_clkevt)); ++ ++ return 0; ++ ++out_notifier: ++ iounmap(base); ++out_unmap: ++ for (ix = 0; ix < nr_irqs; ix++) ++ iounmap(per_cpu_ptr(hisp804_clkevt, ix)->base); ++out_free: ++ free_percpu(hisp804_clkevt); ++out: ++ return -ENODEV; ++} ++CLOCKSOURCE_OF_DECLARE(hisp804, "hisilicon,hisp804", hisp804_timer_init); +\ No newline at end of file +diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig +index 08013345d..96107fbef 100644 +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -328,6 +328,20 @@ config K3_DMA + Support the DMA engine for Hisilicon K3 platform + devices. + ++config HIEDMACV310 ++ tristate "Hisilicon EDMAC Controller support" ++ depends on ARCH_HISI_BVT ++ select DMA_ENGINE ++ select DMA_VIRTUAL_CHANNELS ++ help ++ The Direction Memory Access(EDMA) is a high-speed data transfer ++ operation. It supports data read/write between peripherals and ++ memories without using the CPU. ++ Hisilicon EDMA Controller(EDMAC) directly transfers data between ++ a memory and a peripheral, between peripherals, or between memories. ++ This avoids the CPU intervention and reduces the interrupt handling ++ overhead of the CPU. ++ + config LPC18XX_DMAMUX + bool "NXP LPC18xx/43xx DMA MUX for PL080" + depends on ARCH_LPC18XX || COMPILE_TEST +@@ -710,7 +724,6 @@ config ZX_DMA + help + Support the DMA engine for ZTE ZX family platform devices. + +- + # driver files + source "drivers/dma/bestcomm/Kconfig" + +diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile +index 948a8da05..c5f89432d 100644 +--- a/drivers/dma/Makefile ++++ b/drivers/dma/Makefile +@@ -82,7 +82,7 @@ obj-$(CONFIG_XGENE_DMA) += xgene-dma.o + obj-$(CONFIG_ZX_DMA) += zx_dma.o + obj-$(CONFIG_ST_FDMA) += st_fdma.o + obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/ +- ++obj-$(CONFIG_HIEDMACV310) += hiedmacv310.o + obj-y += mediatek/ + obj-y += qcom/ + obj-y += ti/ +diff --git a/drivers/dma/hiedmacv310.c b/drivers/dma/hiedmacv310.c +new file mode 100644 +index 000000000..a198c9224 +--- /dev/null ++++ b/drivers/dma/hiedmacv310.c +@@ -0,0 +1,1443 @@ ++/* ++ * driver/dma/hiedmacv310.c ++ * ++ * The Hiedma Controller v310 Device Driver for HiSilicon ++ * ++ * Copyright (c) 2020 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "hiedmacv310.h" ++#include "dmaengine.h" ++#include "virt-dma.h" ++ ++#define DRIVER_NAME "hiedmacv310" ++ ++#define MAX_TSFR_LLIS 512 ++#define EDMACV300_LLI_WORDS 64 ++#define EDMACV300_POOL_ALIGN 64 ++#define BITS_PER_HALF_WORD 32 ++#define ERR_STATUS_REG_NUM 3 ++ ++typedef struct hiedmac_lli { ++ u64 next_lli; ++ u32 reserved[5]; ++ u32 count; ++ u64 src_addr; ++ u64 dest_addr; ++ u32 config; ++ u32 pad[3]; ++} hiedmac_lli; ++ ++struct hiedmac_sg { ++ dma_addr_t src_addr; ++ dma_addr_t dst_addr; ++ size_t len; ++ struct list_head node; ++}; ++ ++struct transfer_desc { ++ struct virt_dma_desc virt_desc; ++ dma_addr_t llis_busaddr; ++ u64 *llis_vaddr; ++ u32 ccfg; ++ size_t size; ++ bool done; ++ bool cyclic; ++}; ++ ++enum edmac_dma_chan_state { ++ HIEDMAC_CHAN_IDLE, ++ HIEDMAC_CHAN_RUNNING, ++ HIEDMAC_CHAN_PAUSED, ++ HIEDMAC_CHAN_WAITING, ++}; ++ ++struct hiedmacv310_dma_chan { ++ bool slave; ++ int signal; ++ int id; ++ struct virt_dma_chan virt_chan; ++ struct hiedmacv310_phy_chan *phychan; ++ struct dma_slave_config cfg; ++ struct transfer_desc *at; ++ struct hiedmacv310_driver_data *host; ++ enum edmac_dma_chan_state state; ++}; ++ ++struct hiedmacv310_phy_chan { ++ unsigned int id; ++ void __iomem *base; ++ spinlock_t lock; ++ struct hiedmacv310_dma_chan *serving; ++}; ++ ++struct hiedmacv310_driver_data { ++ struct platform_device *dev; ++ struct dma_device slave; ++ struct dma_device memcpy; ++ void __iomem *base; ++ struct regmap *misc_regmap; ++ void __iomem *crg_ctrl; ++ struct hiedmacv310_phy_chan *phy_chans; ++ struct dma_pool *pool; ++ unsigned int misc_ctrl_base; ++ int irq; ++ unsigned int id; ++ struct clk *clk; ++ struct clk *axi_clk; ++ struct reset_control *rstc; ++ unsigned int channels; ++ unsigned int slave_requests; ++ unsigned int max_transfer_size; ++}; ++ ++#ifdef DEBUG_HIEDMAC ++void dump_lli(const u64 *llis_vaddr, unsigned int num) ++{ ++ hiedmac_lli *plli = (hiedmac_lli *)llis_vaddr; ++ unsigned int i; ++ ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "lli num = 0%d\n", num); ++ for (i = 0; i < num; i++) { ++ printk("lli%d:lli_L: 0x%llx\n", i, plli[i].next_lli & 0xffffffff); ++ printk("lli%d:lli_H: 0x%llx\n", i, (plli[i].next_lli >> BITS_PER_HALF_WORD) & 0xffffffff); ++ printk("lli%d:count: 0x%x\n", i, plli[i].count); ++ printk("lli%d:src_addr_L: 0x%llx\n", i, plli[i].src_addr & 0xffffffff); ++ printk("lli%d:src_addr_H: 0x%llx\n", i, (plli[i].src_addr >> BITS_PER_HALF_WORD) & 0xffffffff); ++ printk("lli%d:dst_addr_L: 0x%llx\n", i, plli[i].dest_addr & 0xffffffff); ++ printk("lli%d:dst_addr_H: 0x%llx\n", i, (plli[i].dest_addr >> BITS_PER_HALF_WORD) & 0xffffffff); ++ printk("lli%d:CONFIG: 0x%x\n", i, plli[i].config); ++ } ++} ++ ++#else ++void dump_lli(u64 *llis_vaddr, unsigned int num) ++{ ++} ++#endif ++ ++static inline struct hiedmacv310_dma_chan *to_edamc_chan(const struct dma_chan *chan) ++{ ++ return container_of(chan, struct hiedmacv310_dma_chan, virt_chan.chan); ++} ++ ++static inline struct transfer_desc *to_edmac_transfer_desc( ++ const struct dma_async_tx_descriptor *tx) ++{ ++ return container_of(tx, struct transfer_desc, virt_desc.tx); ++} ++ ++static struct dma_chan *hiedmac_find_chan_id( ++ const struct hiedmacv310_driver_data *hiedmac, ++ int request_num) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = NULL; ++ ++ list_for_each_entry(edmac_dma_chan, &hiedmac->slave.channels, ++ virt_chan.chan.device_node) { ++ if (edmac_dma_chan->id == request_num) ++ return &edmac_dma_chan->virt_chan.chan; ++ } ++ return NULL; ++} ++ ++static struct dma_chan *hiedma_of_xlate(struct of_phandle_args *dma_spec, ++ struct of_dma *ofdma) ++{ ++ struct hiedmacv310_driver_data *hiedmac = ofdma->of_dma_data; ++ struct hiedmacv310_dma_chan *edmac_dma_chan = NULL; ++ struct dma_chan *dma_chan = NULL; ++ struct regmap *misc = NULL; ++ unsigned int signal, request_num; ++ unsigned int reg = 0; ++ unsigned int offset = 0; ++ ++ if (!hiedmac) ++ return NULL; ++ ++ misc = hiedmac->misc_regmap; ++ ++ if (dma_spec->args_count != 2) { /* check num of dts node args */ ++ hiedmacv310_error("args count not true!\n"); ++ return NULL; ++ } ++ ++ request_num = dma_spec->args[0]; ++ signal = dma_spec->args[1]; ++ ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "host->id = %d,signal = %d, request_num = %d\n", ++ hiedmac->id, signal, request_num); ++ ++ if (misc != NULL) { ++#ifdef CONFIG_ACCESS_M7_DEV ++ offset = hiedmac->misc_ctrl_base; ++ reg = 0xc0; ++ regmap_write(misc, offset, reg); ++#else ++ offset = hiedmac->misc_ctrl_base + (request_num & (~0x3)); ++ regmap_read(misc, offset, ®); ++ /* set misc for signal line */ ++ reg &= ~(0x3f << ((request_num & 0x3) << 3)); ++ reg |= signal << ((request_num & 0x3) << 3); ++ regmap_write(misc, offset, reg); ++#endif ++ } ++ ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "offset = 0x%x, reg = 0x%x\n", offset, reg); ++ ++ dma_chan = hiedmac_find_chan_id(hiedmac, request_num); ++ if (!dma_chan) { ++ hiedmacv310_error("DMA slave channel is not found!\n"); ++ return NULL; ++ } ++ ++ edmac_dma_chan = to_edamc_chan(dma_chan); ++ edmac_dma_chan->signal = request_num; ++ return dma_get_slave_channel(dma_chan); ++} ++ ++static int hiedmacv310_devm_get(struct hiedmacv310_driver_data *hiedmac) ++{ ++ struct platform_device *platdev = hiedmac->dev; ++ struct resource *res = NULL; ++ ++ hiedmac->clk = devm_clk_get(&(platdev->dev), "apb_pclk"); ++ if (IS_ERR(hiedmac->clk)) { ++ return PTR_ERR(hiedmac->clk); ++ } ++ ++ hiedmac->axi_clk = devm_clk_get(&(platdev->dev), "axi_aclk"); ++ if (IS_ERR(hiedmac->axi_clk)) { ++ return PTR_ERR(hiedmac->axi_clk); ++ } ++ ++ hiedmac->irq = platform_get_irq(platdev, 0); ++ if (unlikely(hiedmac->irq < 0)) ++ return -ENODEV; ++ ++ hiedmac->rstc = devm_reset_control_get(&(platdev->dev), "dma-reset"); ++ if (IS_ERR(hiedmac->rstc)) ++ return PTR_ERR(hiedmac->rstc); ++ ++ res = platform_get_resource(platdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ hiedmacv310_error("no reg resource\n"); ++ return -ENODEV; ++ } ++ ++ hiedmac->base = devm_ioremap_resource(&(platdev->dev), res); ++ if (IS_ERR(hiedmac->base)) ++ return PTR_ERR(hiedmac->base); ++ return 0; ++} ++ ++static int hiedmacv310_of_property_read(struct hiedmacv310_driver_data *hiedmac) ++{ ++ struct platform_device *platdev = hiedmac->dev; ++ struct device_node *np = platdev->dev.of_node; ++ int ret; ++ ++ if (!of_find_property(np, "misc_regmap", NULL) || ++ !of_find_property(np, "misc_ctrl_base", NULL)) ++ hiedmac->misc_regmap = 0; ++ else { ++ hiedmac->misc_regmap = syscon_regmap_lookup_by_phandle(np, "misc_regmap"); ++ if (IS_ERR(hiedmac->misc_regmap)) ++ return PTR_ERR(hiedmac->misc_regmap); ++ ++ ret = of_property_read_u32(np, "misc_ctrl_base", &(hiedmac->misc_ctrl_base)); ++ if (ret) { ++ hiedmacv310_error("get dma-misc_ctrl_base fail\n"); ++ return -ENODEV; ++ } ++ } ++ ret = of_property_read_u32(np, "devid", &(hiedmac->id)); ++ if (ret) { ++ hiedmacv310_error("get hiedmac id fail\n"); ++ return -ENODEV; ++ } ++ ret = of_property_read_u32(np, "dma-channels", &(hiedmac->channels)); ++ if (ret) { ++ hiedmacv310_error("get dma-channels fail\n"); ++ return -ENODEV; ++ } ++ ret = of_property_read_u32(np, "dma-requests", &(hiedmac->slave_requests)); ++ if (ret) { ++ hiedmacv310_error("get dma-requests fail\n"); ++ return -ENODEV; ++ } ++ hiedmacv310_trace(HIEDMACV310_REG_TRACE_LEVEL, "dma-channels = %d, dma-requests = %d\n", ++ hiedmac->channels, hiedmac->slave_requests); ++ return 0; ++} ++ ++static int get_of_probe(struct hiedmacv310_driver_data *hiedmac) ++{ ++ struct platform_device *platdev = hiedmac->dev; ++ int ret; ++ ++ ret = hiedmacv310_devm_get(hiedmac); ++ if (ret) { ++ return ret; ++ } ++ ++ ret = hiedmacv310_of_property_read(hiedmac); ++ if (ret) { ++ return ret; ++ } ++ ++ return of_dma_controller_register(platdev->dev.of_node, ++ hiedma_of_xlate, hiedmac); ++} ++ ++static void hiedmac_free_chan_resources(struct dma_chan *chan) ++{ ++ vchan_free_chan_resources(to_virt_chan(chan)); ++} ++ ++static size_t read_residue_from_phychan( ++ struct hiedmacv310_dma_chan *edmac_dma_chan, ++ struct transfer_desc *tsf_desc) ++{ ++ size_t bytes; ++ u64 next_lli; ++ struct hiedmacv310_phy_chan *phychan = edmac_dma_chan->phychan; ++ unsigned int i, index; ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ hiedmac_lli *plli = NULL; ++ ++ next_lli = (hiedmacv310_readl(hiedmac->base + hiedmac_cx_lli_l(phychan->id)) & ++ (~(HIEDMAC_LLI_ALIGN - 1))); ++ next_lli |= ((u64)(hiedmacv310_readl(hiedmac->base + hiedmac_cx_lli_h( ++ phychan->id)) & 0xffffffff) << BITS_PER_HALF_WORD); ++ bytes = hiedmacv310_readl(hiedmac->base + hiedmac_cx_curr_cnt0( ++ phychan->id)); ++ if (next_lli != 0) { ++ /* It means lli mode */ ++ bytes += tsf_desc->size; ++ index = (next_lli - tsf_desc->llis_busaddr) / sizeof(*plli); ++ plli = (hiedmac_lli *)(tsf_desc->llis_vaddr); ++ for (i = 0; i < index; i++) ++ bytes -= plli[i].count; ++ } ++ return bytes; ++} ++ ++static enum dma_status hiedmac_tx_status(struct dma_chan *chan, ++ dma_cookie_t cookie, ++ struct dma_tx_state *txstate) ++{ ++ enum dma_status ret; ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ struct virt_dma_desc *vd = NULL; ++ struct transfer_desc *tsf_desc = NULL; ++ unsigned long flags; ++ size_t bytes; ++ ++ ret = dma_cookie_status(chan, cookie, txstate); ++ if (ret == DMA_COMPLETE) { ++ return ret; ++ } ++ ++ if (edmac_dma_chan->state == HIEDMAC_CHAN_PAUSED && ret == DMA_IN_PROGRESS) { ++ ret = DMA_PAUSED; ++ return ret; ++ } ++ ++ spin_lock_irqsave(&edmac_dma_chan->virt_chan.lock, flags); ++ vd = vchan_find_desc(&edmac_dma_chan->virt_chan, cookie); ++ if (vd) { ++ /* no been trasfer */ ++ tsf_desc = to_edmac_transfer_desc(&vd->tx); ++ bytes = tsf_desc->size; ++ } else { ++ /* trasfering */ ++ tsf_desc = edmac_dma_chan->at; ++ ++ if (!(edmac_dma_chan->phychan) || !tsf_desc) { ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ return ret; ++ } ++ bytes = read_residue_from_phychan(edmac_dma_chan, tsf_desc); ++ } ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ dma_set_residue(txstate, bytes); ++ return ret; ++} ++ ++static struct hiedmacv310_phy_chan *hiedmac_get_phy_channel( ++ const struct hiedmacv310_driver_data *hiedmac, ++ struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ struct hiedmacv310_phy_chan *ch = NULL; ++ unsigned long flags; ++ int i; ++ ++ for (i = 0; i < hiedmac->channels; i++) { ++ ch = &hiedmac->phy_chans[i]; ++ ++ spin_lock_irqsave(&ch->lock, flags); ++ ++ if (!ch->serving) { ++ ch->serving = edmac_dma_chan; ++ spin_unlock_irqrestore(&ch->lock, flags); ++ break; ++ } ++ spin_unlock_irqrestore(&ch->lock, flags); ++ } ++ ++ if (i == hiedmac->channels) { ++ return NULL; ++ } ++ ++ return ch; ++} ++ ++static void hiedmac_write_lli(const struct hiedmacv310_driver_data *hiedmac, ++ const struct hiedmacv310_phy_chan *phychan, ++ const struct transfer_desc *tsf_desc) ++{ ++ hiedmac_lli *plli = (hiedmac_lli *)tsf_desc->llis_vaddr; ++ ++ if (plli->next_lli != 0x0) ++ hiedmacv310_writel((plli->next_lli & 0xffffffff) | HIEDMAC_LLI_ENABLE, ++ hiedmac->base + hiedmac_cx_lli_l(phychan->id)); ++ else ++ hiedmacv310_writel((plli->next_lli & 0xffffffff), ++ hiedmac->base + hiedmac_cx_lli_l(phychan->id)); ++ ++ hiedmacv310_writel(((plli->next_lli >> 32) & 0xffffffff), ++ hiedmac->base + hiedmac_cx_lli_h(phychan->id)); ++ hiedmacv310_writel(plli->count, hiedmac->base + hiedmac_cx_cnt0(phychan->id)); ++ hiedmacv310_writel(plli->src_addr & 0xffffffff, ++ hiedmac->base + hiedmac_cx_src_addr_l(phychan->id)); ++ hiedmacv310_writel((plli->src_addr >> 32) & 0xffffffff, ++ hiedmac->base + hiedmac_cx_src_addr_h(phychan->id)); ++ hiedmacv310_writel(plli->dest_addr & 0xffffffff, ++ hiedmac->base + hiedmac_cx_dest_addr_l(phychan->id)); ++ hiedmacv310_writel((plli->dest_addr >> 32) & 0xffffffff, ++ hiedmac->base + hiedmac_cx_dest_addr_h(phychan->id)); ++ hiedmacv310_writel(plli->config, ++ hiedmac->base + hiedmac_cx_config(phychan->id)); ++} ++ ++static void hiedmac_start_next_txd(struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct hiedmacv310_phy_chan *phychan = edmac_dma_chan->phychan; ++ struct virt_dma_desc *vd = vchan_next_desc(&edmac_dma_chan->virt_chan); ++ struct transfer_desc *tsf_desc = to_edmac_transfer_desc(&vd->tx); ++ unsigned int val; ++ list_del(&tsf_desc->virt_desc.node); ++ edmac_dma_chan->at = tsf_desc; ++ hiedmac_write_lli(hiedmac, phychan, tsf_desc); ++ val = hiedmacv310_readl(hiedmac->base + hiedmac_cx_config(phychan->id)); ++ hiedmacv310_trace(HIEDMACV310_REG_TRACE_LEVEL, " HIEDMAC_Cx_CONFIG = 0x%x\n", val); ++ hiedmacv310_writel(val | HIEDMAC_CXCONFIG_LLI_START, ++ hiedmac->base + hiedmac_cx_config(phychan->id)); ++} ++ ++static void hiedmac_start(struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct hiedmacv310_phy_chan *ch; ++ ch = hiedmac_get_phy_channel(hiedmac, edmac_dma_chan); ++ if (!ch) { ++ hiedmacv310_error("no phy channel available !\n"); ++ edmac_dma_chan->state = HIEDMAC_CHAN_WAITING; ++ return; ++ } ++ edmac_dma_chan->phychan = ch; ++ edmac_dma_chan->state = HIEDMAC_CHAN_RUNNING; ++ hiedmac_start_next_txd(edmac_dma_chan); ++} ++ ++static void hiedmac_issue_pending(struct dma_chan *chan) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ unsigned long flags; ++ spin_lock_irqsave(&edmac_dma_chan->virt_chan.lock, flags); ++ if (vchan_issue_pending(&edmac_dma_chan->virt_chan)) { ++ if (!edmac_dma_chan->phychan && edmac_dma_chan->state != HIEDMAC_CHAN_WAITING) ++ hiedmac_start(edmac_dma_chan); ++ } ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++} ++ ++static void hiedmac_free_txd_list(struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ LIST_HEAD(head); ++ vchan_get_all_descriptors(&edmac_dma_chan->virt_chan, &head); ++ vchan_dma_desc_free_list(&edmac_dma_chan->virt_chan, &head); ++} ++ ++static int hiedmac_config(struct dma_chan *chan, ++ struct dma_slave_config *config) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ if (!edmac_dma_chan->slave) { ++ hiedmacv310_error("slave is null!"); ++ return -EINVAL; ++ } ++ edmac_dma_chan->cfg = *config; ++ return 0; ++} ++ ++static void hiedmac_pause_phy_chan(const struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct hiedmacv310_phy_chan *phychan = edmac_dma_chan->phychan; ++ unsigned int val; ++ int timeout; ++ ++ val = hiedmacv310_readl(hiedmac->base + hiedmac_cx_config(phychan->id)); ++ val &= ~CCFG_EN; ++ hiedmacv310_writel(val, hiedmac->base + hiedmac_cx_config(phychan->id)); ++ /* Wait for channel inactive */ ++ for (timeout = 2000; timeout > 0; timeout--) { ++ if (!((0x1 << phychan->id) & hiedmacv310_readl(hiedmac->base + HIEDMAC_CH_STAT))) ++ break; ++ hiedmacv310_writel(val, hiedmac->base + hiedmac_cx_config(phychan->id)); ++ udelay(1); ++ } ++ if (timeout == 0) ++ hiedmacv310_error(":channel%u timeout waiting for pause, timeout:%d\n", ++ phychan->id, timeout); ++} ++ ++static int hiedmac_pause(struct dma_chan *chan) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&edmac_dma_chan->virt_chan.lock, flags); ++ if (!edmac_dma_chan->phychan) { ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ return 0; ++ } ++ hiedmac_pause_phy_chan(edmac_dma_chan); ++ edmac_dma_chan->state = HIEDMAC_CHAN_PAUSED; ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ return 0; ++} ++ ++static void hiedmac_resume_phy_chan(const struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct hiedmacv310_phy_chan *phychan = edmac_dma_chan->phychan; ++ unsigned int val; ++ val = hiedmacv310_readl(hiedmac->base + hiedmac_cx_config(phychan->id)); ++ val |= CCFG_EN; ++ hiedmacv310_writel(val, hiedmac->base + hiedmac_cx_config(phychan->id)); ++} ++ ++static int hiedmac_resume(struct dma_chan *chan) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&edmac_dma_chan->virt_chan.lock, flags); ++ ++ if (!edmac_dma_chan->phychan) { ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ return 0; ++ } ++ ++ hiedmac_resume_phy_chan(edmac_dma_chan); ++ edmac_dma_chan->state = HIEDMAC_CHAN_RUNNING; ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ ++ return 0; ++} ++ ++void hiedmac_phy_free(struct hiedmacv310_dma_chan *chan); ++static void hiedmac_desc_free(struct virt_dma_desc *vd); ++static int hiedmac_terminate_all(struct dma_chan *chan) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&edmac_dma_chan->virt_chan.lock, flags); ++ if (!edmac_dma_chan->phychan && !edmac_dma_chan->at) { ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ return 0; ++ } ++ ++ edmac_dma_chan->state = HIEDMAC_CHAN_IDLE; ++ ++ if (edmac_dma_chan->phychan) ++ hiedmac_phy_free(edmac_dma_chan); ++ if (edmac_dma_chan->at) { ++ hiedmac_desc_free(&edmac_dma_chan->at->virt_desc); ++ edmac_dma_chan->at = NULL; ++ } ++ hiedmac_free_txd_list(edmac_dma_chan); ++ spin_unlock_irqrestore(&edmac_dma_chan->virt_chan.lock, flags); ++ ++ return 0; ++} ++ ++static u32 get_width(enum dma_slave_buswidth width) ++{ ++ switch (width) { ++ case DMA_SLAVE_BUSWIDTH_1_BYTE: ++ return HIEDMAC_WIDTH_8BIT; ++ case DMA_SLAVE_BUSWIDTH_2_BYTES: ++ return HIEDMAC_WIDTH_16BIT; ++ case DMA_SLAVE_BUSWIDTH_4_BYTES: ++ return HIEDMAC_WIDTH_32BIT; ++ case DMA_SLAVE_BUSWIDTH_8_BYTES: ++ return HIEDMAC_WIDTH_64BIT; ++ default: ++ hiedmacv310_error("check here, width warning!\n"); ++ return ~0; ++ } ++} ++ ++static unsigned int hiedmac_set_config_value(enum dma_transfer_direction direction, ++ unsigned int addr_width, ++ unsigned int burst, ++ unsigned int signal) ++{ ++ unsigned int config, width; ++ ++ if (direction == DMA_MEM_TO_DEV) { ++ config = HIEDMAC_CONFIG_SRC_INC; ++ } else { ++ config = HIEDMAC_CONFIG_DST_INC; ++ } ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "addr_width = 0x%x\n", addr_width); ++ width = get_width(addr_width); ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "width = 0x%x\n", width); ++ config |= width << HIEDMAC_CONFIG_SRC_WIDTH_SHIFT; ++ config |= width << HIEDMAC_CONFIG_DST_WIDTH_SHIFT; ++ hiedmacv310_trace(HIEDMACV310_REG_TRACE_LEVEL, "tsf_desc->ccfg = 0x%x\n", config); ++ hiedmacv310_trace(HIEDMACV310_CONFIG_TRACE_LEVEL, "burst = 0x%x\n", burst); ++ config |= burst << HIEDMAC_CONFIG_SRC_BURST_SHIFT; ++ config |= burst << HIEDMAC_CONFIG_DST_BURST_SHIFT; ++ if (signal >= 0) { ++ hiedmacv310_trace(HIEDMACV310_REG_TRACE_LEVEL, "edmac_dma_chan->signal = %d\n", signal); ++ config |= (unsigned int)signal << HIEDMAC_CXCONFIG_SIGNAL_SHIFT; ++ } ++ config |= HIEDMAC_CXCONFIG_DEV_MEM_TYPE << HIEDMAC_CXCONFIG_TSF_TYPE_SHIFT; ++ return config; ++} ++ ++struct transfer_desc *hiedmac_init_tsf_desc(struct dma_chan *chan, ++ enum dma_transfer_direction direction, ++ dma_addr_t *slave_addr) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ struct transfer_desc *tsf_desc; ++ unsigned int burst = 0; ++ unsigned int addr_width = 0; ++ unsigned int maxburst = 0; ++ tsf_desc = kzalloc(sizeof(*tsf_desc), GFP_NOWAIT); ++ if (!tsf_desc) ++ return NULL; ++ if (direction == DMA_MEM_TO_DEV) { ++ *slave_addr = edmac_dma_chan->cfg.dst_addr; ++ addr_width = edmac_dma_chan->cfg.dst_addr_width; ++ maxburst = edmac_dma_chan->cfg.dst_maxburst; ++ } else if (direction == DMA_DEV_TO_MEM) { ++ *slave_addr = edmac_dma_chan->cfg.src_addr; ++ addr_width = edmac_dma_chan->cfg.src_addr_width; ++ maxburst = edmac_dma_chan->cfg.src_maxburst; ++ } else { ++ kfree(tsf_desc); ++ hiedmacv310_error("direction unsupported!\n"); ++ return NULL; ++ } ++ ++ if (maxburst > (HIEDMAC_MAX_BURST_WIDTH)) ++ burst |= (HIEDMAC_MAX_BURST_WIDTH - 1); ++ else if (maxburst == 0) ++ burst |= HIEDMAC_MIN_BURST_WIDTH; ++ else ++ burst |= (maxburst - 1); ++ ++ tsf_desc->ccfg = hiedmac_set_config_value(direction, addr_width, ++ burst, edmac_dma_chan->signal); ++ hiedmacv310_trace(HIEDMACV310_REG_TRACE_LEVEL, "tsf_desc->ccfg = 0x%x\n", tsf_desc->ccfg); ++ return tsf_desc; ++} ++ ++static int hiedmac_fill_desc(const struct hiedmac_sg *dsg, ++ struct transfer_desc *tsf_desc, ++ unsigned int length, unsigned int num) ++{ ++ hiedmac_lli *plli = NULL; ++ ++ if (num >= MAX_TSFR_LLIS) { ++ hiedmacv310_error("lli out of range. \n"); ++ return -ENOMEM; ++ } ++ ++ plli = (hiedmac_lli*)(tsf_desc->llis_vaddr); ++ memset(&plli[num], 0x0, sizeof(*plli)); ++ ++ plli[num].src_addr = dsg->src_addr; ++ plli[num].dest_addr = dsg->dst_addr; ++ plli[num].config = tsf_desc->ccfg; ++ plli[num].count = length; ++ tsf_desc->size += length; ++ ++ if (num > 0) { ++ plli[num - 1].next_lli = (tsf_desc->llis_busaddr + (num) * sizeof( ++ *plli)) & (~(HIEDMAC_LLI_ALIGN - 1)); ++ plli[num - 1].next_lli |= HIEDMAC_LLI_ENABLE; ++ } ++ return 0; ++} ++ ++static void free_dsg(struct list_head *dsg_head) ++{ ++ struct hiedmac_sg *dsg = NULL; ++ struct hiedmac_sg *_dsg = NULL; ++ ++ list_for_each_entry_safe(dsg, _dsg, dsg_head, node) { ++ list_del(&dsg->node); ++ kfree(dsg); ++ } ++} ++ ++static int hiedmac_add_sg(struct list_head *sg_head, ++ dma_addr_t dst, dma_addr_t src, ++ size_t len) ++{ ++ struct hiedmac_sg *dsg = NULL; ++ ++ if (len == 0) { ++ hiedmacv310_error("Transfer length is 0. \n"); ++ return -ENOMEM; ++ } ++ ++ dsg = (struct hiedmac_sg *)kzalloc(sizeof(*dsg), GFP_NOWAIT); ++ if (!dsg) { ++ free_dsg(sg_head); ++ hiedmacv310_error("alloc memory for dsg fail.\n"); ++ return -ENOMEM; ++ } ++ ++ list_add_tail(&dsg->node, sg_head); ++ dsg->src_addr = src; ++ dsg->dst_addr = dst; ++ dsg->len = len; ++ return 0; ++} ++ ++static int hiedmac_add_sg_slave(struct list_head *sg_head, ++ dma_addr_t slave_addr, dma_addr_t addr, ++ size_t length, ++ enum dma_transfer_direction direction) ++{ ++ dma_addr_t src = 0; ++ dma_addr_t dst = 0; ++ if (direction == DMA_MEM_TO_DEV) { ++ src = addr; ++ dst = slave_addr; ++ } else if (direction == DMA_DEV_TO_MEM) { ++ src = slave_addr; ++ dst = addr; ++ } else { ++ hiedmacv310_error("invali dma_transfer_direction.\n"); ++ return -ENOMEM; ++ } ++ return hiedmac_add_sg(sg_head, dst, src, length); ++} ++ ++static int hiedmac_fill_sg_for_slave(struct list_head *sg_head, ++ dma_addr_t slave_addr, ++ struct scatterlist *sgl, ++ unsigned int sg_len, ++ enum dma_transfer_direction direction) ++{ ++ struct scatterlist *sg = NULL; ++ int tmp, ret; ++ size_t length; ++ dma_addr_t addr; ++ if (sgl == NULL) { ++ hiedmacv310_error("sgl is null!\n"); ++ return -ENOMEM; ++ } ++ ++ for_each_sg(sgl, sg, sg_len, tmp) { ++ addr = sg_dma_address(sg); ++ length = sg_dma_len(sg); ++ ret = hiedmac_add_sg_slave(sg_head, slave_addr, addr, length, direction); ++ if (ret) ++ break; ++ } ++ return ret; ++} ++ ++static inline int hiedmac_fill_sg_for_m2m_copy(struct list_head *sg_head, ++ dma_addr_t dst, dma_addr_t src, ++ size_t len) ++{ ++ return hiedmac_add_sg(sg_head, dst, src, len); ++} ++ ++static int hiedmac_fill_sg_for_cyclic(struct list_head *sg_head, ++ dma_addr_t slave_addr, ++ dma_addr_t buf_addr, size_t buf_len, ++ size_t period_len, ++ enum dma_transfer_direction direction) ++{ ++ size_t count_in_sg = 0; ++ size_t trans_bytes; ++ int ret; ++ while (count_in_sg < buf_len) { ++ trans_bytes = min(period_len, buf_len - count_in_sg); ++ count_in_sg += trans_bytes; ++ ret = hiedmac_add_sg_slave(sg_head, slave_addr, buf_addr + count_in_sg, count_in_sg, direction); ++ if (ret) ++ return ret; ++ } ++ return 0; ++} ++ ++static inline unsigned short get_max_width(dma_addr_t ccfg) ++{ ++ unsigned short src_width = (ccfg & HIEDMAC_CONTROL_SRC_WIDTH_MASK) >> HIEDMAC_CONFIG_SRC_WIDTH_SHIFT; ++ unsigned short dst_width = (ccfg & HIEDMAC_CONTROL_DST_WIDTH_MASK) >> HIEDMAC_CONFIG_DST_WIDTH_SHIFT; ++ return 1 << max(src_width, dst_width); /* to byte */ ++} ++ ++static int hiedmac_fill_asg_lli_for_desc(struct hiedmac_sg *dsg, ++ struct transfer_desc *tsf_desc, ++ unsigned int *lli_count) ++{ ++ int ret; ++ unsigned short width = get_max_width(tsf_desc->ccfg); ++ ++ while (dsg->len != 0) { ++ size_t lli_len = MAX_TRANSFER_BYTES; ++ lli_len = (lli_len / width) * width; /* bus width align */ ++ lli_len = min(lli_len, dsg->len); ++ ret = hiedmac_fill_desc(dsg, tsf_desc, lli_len, *lli_count); ++ if (ret) ++ return ret; ++ ++ if (tsf_desc->ccfg & HIEDMAC_CONFIG_SRC_INC) ++ dsg->src_addr += lli_len; ++ if (tsf_desc->ccfg & HIEDMAC_CONFIG_DST_INC) ++ dsg->dst_addr += lli_len; ++ dsg->len -= lli_len; ++ (*lli_count)++; ++ } ++ return 0; ++} ++ ++static int hiedmac_fill_lli_for_desc(struct list_head *sg_head, ++ struct transfer_desc *tsf_desc) ++{ ++ struct hiedmac_sg *dsg = NULL; ++ struct hiedmac_lli *last_plli = NULL; ++ unsigned int lli_count = 0; ++ int ret; ++ ++ list_for_each_entry(dsg, sg_head, node) { ++ ret = hiedmac_fill_asg_lli_for_desc(dsg, tsf_desc, &lli_count); ++ if (ret) ++ return ret; ++ } ++ ++ if (tsf_desc->cyclic) { ++ last_plli = (hiedmac_lli *)((uintptr_t)tsf_desc->llis_vaddr + ++ (lli_count - 1) * sizeof(*last_plli)); ++ last_plli->next_lli = tsf_desc->llis_busaddr | HIEDMAC_LLI_ENABLE; ++ } else { ++ last_plli = (hiedmac_lli *)((uintptr_t)tsf_desc->llis_vaddr + ++ (lli_count - 1) * sizeof(*last_plli)); ++ last_plli->next_lli = 0; ++ } ++ dump_lli(tsf_desc->llis_vaddr, lli_count); ++ return 0; ++} ++ ++static struct dma_async_tx_descriptor *hiedmac_prep_slave_sg( ++ struct dma_chan *chan, struct scatterlist *sgl, ++ unsigned int sg_len, enum dma_transfer_direction direction, ++ unsigned long flags, void *context) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct transfer_desc *tsf_desc = NULL; ++ dma_addr_t slave_addr = 0; ++ int ret; ++ LIST_HEAD(sg_head); ++ if (sgl == NULL) { ++ hiedmacv310_error("sgl is null!\n"); ++ return NULL; ++ } ++ ++ tsf_desc = hiedmac_init_tsf_desc(chan, direction, &slave_addr); ++ if (!tsf_desc) ++ return NULL; ++ ++ tsf_desc->llis_vaddr = dma_pool_alloc(hiedmac->pool, GFP_NOWAIT, ++ &tsf_desc->llis_busaddr); ++ if (!tsf_desc->llis_vaddr) { ++ hiedmacv310_error("malloc memory from pool fail !\n"); ++ goto err_alloc_lli; ++ } ++ ++ ret = hiedmac_fill_sg_for_slave(&sg_head, slave_addr, sgl, sg_len, direction); ++ if (ret) ++ goto err_fill_sg; ++ ret = hiedmac_fill_lli_for_desc(&sg_head, tsf_desc); ++ free_dsg(&sg_head); ++ if (ret) ++ goto err_fill_sg; ++ return vchan_tx_prep(&edmac_dma_chan->virt_chan, &tsf_desc->virt_desc, flags); ++ ++err_fill_sg: ++ dma_pool_free(hiedmac->pool, tsf_desc->llis_vaddr, tsf_desc->llis_busaddr); ++err_alloc_lli: ++ kfree(tsf_desc); ++ return NULL; ++} ++ ++static struct dma_async_tx_descriptor *hiedmac_prep_dma_m2m_copy( ++ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src, ++ size_t len, unsigned long flags) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct transfer_desc *tsf_desc = NULL; ++ LIST_HEAD(sg_head); ++ u32 config = 0; ++ int ret; ++ ++ if (!len) ++ return NULL; ++ ++ tsf_desc = kzalloc(sizeof(*tsf_desc), GFP_NOWAIT); ++ if (tsf_desc == NULL) { ++ hiedmacv310_error("get tsf desc fail!\n"); ++ return NULL; ++ } ++ ++ tsf_desc->llis_vaddr = dma_pool_alloc(hiedmac->pool, GFP_NOWAIT, ++ &tsf_desc->llis_busaddr); ++ if (!tsf_desc->llis_vaddr) { ++ hiedmacv310_error("malloc memory from pool fail !\n"); ++ goto err_alloc_lli; ++ } ++ ++ config |= HIEDMAC_CONFIG_SRC_INC | HIEDMAC_CONFIG_DST_INC; ++ config |= HIEDMAC_CXCONFIG_MEM_TYPE << HIEDMAC_CXCONFIG_TSF_TYPE_SHIFT; ++ /* max burst width is 16 ,but reg value set 0xf */ ++ config |= (HIEDMAC_MAX_BURST_WIDTH - 1) << HIEDMAC_CONFIG_SRC_BURST_SHIFT; ++ config |= (HIEDMAC_MAX_BURST_WIDTH - 1) << HIEDMAC_CONFIG_DST_BURST_SHIFT; ++ config |= HIEDMAC_MEM_BIT_WIDTH << HIEDMAC_CONFIG_SRC_WIDTH_SHIFT; ++ config |= HIEDMAC_MEM_BIT_WIDTH << HIEDMAC_CONFIG_DST_WIDTH_SHIFT; ++ tsf_desc->ccfg = config; ++ ret = hiedmac_fill_sg_for_m2m_copy(&sg_head, dst, src, len); ++ if (ret) ++ goto err_fill_sg; ++ ret = hiedmac_fill_lli_for_desc(&sg_head, tsf_desc); ++ free_dsg(&sg_head); ++ if (ret) ++ goto err_fill_sg; ++ return vchan_tx_prep(&edmac_dma_chan->virt_chan, &tsf_desc->virt_desc, flags); ++ ++err_fill_sg: ++ dma_pool_free(hiedmac->pool, tsf_desc->llis_vaddr, tsf_desc->llis_busaddr); ++err_alloc_lli: ++ kfree(tsf_desc); ++ return NULL; ++} ++ ++ ++static struct dma_async_tx_descriptor *hiedmac_prep_dma_cyclic( ++ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, ++ size_t period_len, enum dma_transfer_direction direction, ++ unsigned long flags) ++{ ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(chan); ++ struct hiedmacv310_driver_data *hiedmac = edmac_dma_chan->host; ++ struct transfer_desc *tsf_desc = NULL; ++ dma_addr_t slave_addr = 0; ++ LIST_HEAD(sg_head); ++ int ret; ++ ++ tsf_desc = hiedmac_init_tsf_desc(chan, direction, &slave_addr); ++ if (!tsf_desc) ++ return NULL; ++ ++ tsf_desc->llis_vaddr = dma_pool_alloc(hiedmac->pool, GFP_NOWAIT, ++ &tsf_desc->llis_busaddr); ++ if (!tsf_desc->llis_vaddr) { ++ hiedmacv310_error("malloc memory from pool fail !\n"); ++ goto err_alloc_lli; ++ } ++ ++ tsf_desc->cyclic = true; ++ ret = hiedmac_fill_sg_for_cyclic(&sg_head, slave_addr, buf_addr, buf_len, period_len, direction); ++ if (ret) ++ goto err_fill_sg; ++ ret = hiedmac_fill_lli_for_desc(&sg_head, tsf_desc); ++ free_dsg(&sg_head); ++ if (ret) ++ goto err_fill_sg; ++ return vchan_tx_prep(&edmac_dma_chan->virt_chan, &tsf_desc->virt_desc, flags); ++ ++err_fill_sg: ++ dma_pool_free(hiedmac->pool, tsf_desc->llis_vaddr, tsf_desc->llis_busaddr); ++err_alloc_lli: ++ kfree(tsf_desc); ++ return NULL; ++} ++ ++static void hiedmac_phy_reassign(struct hiedmacv310_phy_chan *phy_chan, ++ struct hiedmacv310_dma_chan *chan) ++{ ++ phy_chan->serving = chan; ++ chan->phychan = phy_chan; ++ chan->state = HIEDMAC_CHAN_RUNNING; ++ ++ hiedmac_start_next_txd(chan); ++} ++ ++static void hiedmac_terminate_phy_chan(struct hiedmacv310_driver_data *hiedmac, ++ const struct hiedmacv310_dma_chan *edmac_dma_chan) ++{ ++ unsigned int val; ++ struct hiedmacv310_phy_chan *phychan = edmac_dma_chan->phychan; ++ hiedmac_pause_phy_chan(edmac_dma_chan); ++ val = 0x1 << phychan->id; ++ hiedmacv310_writel(val, hiedmac->base + HIEDMAC_INT_TC1_RAW); ++ hiedmacv310_writel(val, hiedmac->base + HIEDMAC_INT_ERR1_RAW); ++ hiedmacv310_writel(val, hiedmac->base + HIEDMAC_INT_ERR2_RAW); ++} ++ ++void hiedmac_phy_free(struct hiedmacv310_dma_chan *chan) ++{ ++ struct hiedmacv310_driver_data *hiedmac = chan->host; ++ struct hiedmacv310_dma_chan *p = NULL; ++ struct hiedmacv310_dma_chan *next = NULL; ++ ++ list_for_each_entry(p, &hiedmac->memcpy.channels, virt_chan.chan.device_node) { ++ if (p->state == HIEDMAC_CHAN_WAITING) { ++ next = p; ++ break; ++ } ++ } ++ ++ if (!next) { ++ list_for_each_entry(p, &hiedmac->slave.channels, virt_chan.chan.device_node) { ++ if (p->state == HIEDMAC_CHAN_WAITING) { ++ next = p; ++ break; ++ } ++ } ++ } ++ hiedmac_terminate_phy_chan(hiedmac, chan); ++ ++ if (next) { ++ spin_lock(&next->virt_chan.lock); ++ hiedmac_phy_reassign(chan->phychan, next); ++ spin_unlock(&next->virt_chan.lock); ++ } else { ++ chan->phychan->serving = NULL; ++ } ++ ++ chan->phychan = NULL; ++ chan->state = HIEDMAC_CHAN_IDLE; ++} ++ ++bool handle_irq(struct hiedmacv310_driver_data *hiedmac, int chan_id) ++{ ++ struct hiedmacv310_dma_chan *chan = NULL; ++ struct hiedmacv310_phy_chan *phy_chan = NULL; ++ struct transfer_desc *tsf_desc = NULL; ++ unsigned int channel_tc_status, channel_err_status[ERR_STATUS_REG_NUM]; ++ ++ phy_chan = &hiedmac->phy_chans[chan_id]; ++ chan = phy_chan->serving; ++ if (!chan) { ++ hiedmacv310_error("error interrupt on chan: %d!\n", chan_id); ++ return 0; ++ } ++ tsf_desc = chan->at; ++ ++ channel_tc_status = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_TC1_RAW); ++ channel_tc_status = (channel_tc_status >> chan_id) & 0x01; ++ if (channel_tc_status) ++ hiedmacv310_writel(channel_tc_status << chan_id, hiedmac->base + HIEDMAC_INT_TC1_RAW); ++ ++ channel_tc_status = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_TC2); ++ channel_tc_status = (channel_tc_status >> chan_id) & 0x01; ++ if (channel_tc_status) ++ hiedmacv310_writel(channel_tc_status << chan_id, hiedmac->base + HIEDMAC_INT_TC2_RAW); ++ channel_err_status[0] = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_ERR1); ++ channel_err_status[1] = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_ERR2); ++ channel_err_status[2] = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_ERR3); ++ if ((channel_err_status[0] | channel_err_status[1] | channel_err_status[2]) & (1 << chan_id)) { ++ hiedmacv310_error("Error in hiedmac %d!,ERR1 = 0x%x,ERR2 = 0x%x,ERR3 = 0x%x\n", ++ chan_id, channel_err_status[0], ++ channel_err_status[1], channel_err_status[2]); ++ hiedmacv310_writel(1 << chan_id, hiedmac->base + HIEDMAC_INT_ERR1_RAW); ++ hiedmacv310_writel(1 << chan_id, hiedmac->base + HIEDMAC_INT_ERR2_RAW); ++ hiedmacv310_writel(1 << chan_id, hiedmac->base + HIEDMAC_INT_ERR3_RAW); ++ } ++ ++ spin_lock(&chan->virt_chan.lock); ++ ++ if (tsf_desc->cyclic) { ++ vchan_cyclic_callback(&tsf_desc->virt_desc); ++ spin_unlock(&chan->virt_chan.lock); ++ return 1; ++ } ++ chan->at = NULL; ++ tsf_desc->done = true; ++ vchan_cookie_complete(&tsf_desc->virt_desc); ++ ++ if (vchan_next_desc(&chan->virt_chan)) ++ hiedmac_start_next_txd(chan); ++ else ++ hiedmac_phy_free(chan); ++ spin_unlock(&chan->virt_chan.lock); ++ return 1; ++} ++ ++static irqreturn_t hiemdacv310_irq(int irq, void *dev) ++{ ++ struct hiedmacv310_driver_data *hiedmac = (struct hiedmacv310_driver_data *)dev; ++ u32 mask = 0; ++ unsigned int channel_status, temp, i; ++ ++ channel_status = hiedmacv310_readl(hiedmac->base + HIEDMAC_INT_STAT); ++ if (!channel_status) { ++ hiedmacv310_error("channel_status = 0x%x\n", channel_status); ++ return IRQ_NONE; ++ } ++ ++ for (i = 0; i < hiedmac->channels; i++) { ++ temp = (channel_status >> i) & 0x1; ++ if (temp) ++ mask |= handle_irq(hiedmac, i) << i; ++ } ++ return mask ? IRQ_HANDLED : IRQ_NONE; ++} ++ ++static inline void hiedmac_dma_slave_init(struct hiedmacv310_dma_chan *chan) ++{ ++ chan->slave = true; ++} ++ ++static void hiedmac_desc_free(struct virt_dma_desc *vd) ++{ ++ struct transfer_desc *tsf_desc = to_edmac_transfer_desc(&vd->tx); ++ struct hiedmacv310_dma_chan *edmac_dma_chan = to_edamc_chan(vd->tx.chan); ++ dma_descriptor_unmap(&vd->tx); ++ dma_pool_free(edmac_dma_chan->host->pool, tsf_desc->llis_vaddr, tsf_desc->llis_busaddr); ++ kfree(tsf_desc); ++} ++ ++static int hiedmac_init_virt_channels(struct hiedmacv310_driver_data *hiedmac, ++ struct dma_device *dmadev, ++ unsigned int channels, bool slave) ++{ ++ struct hiedmacv310_dma_chan *chan = NULL; ++ int i; ++ INIT_LIST_HEAD(&dmadev->channels); ++ ++ for (i = 0; i < channels; i++) { ++ chan = kzalloc(sizeof(struct hiedmacv310_dma_chan), GFP_KERNEL); ++ if (!chan) { ++ hiedmacv310_error("fail to allocate memory for virt channels!"); ++ return -1; ++ } ++ ++ chan->host = hiedmac; ++ chan->state = HIEDMAC_CHAN_IDLE; ++ chan->signal = -1; ++ ++ if (slave) { ++ chan->id = i; ++ hiedmac_dma_slave_init(chan); ++ } ++ chan->virt_chan.desc_free = hiedmac_desc_free; ++ vchan_init(&chan->virt_chan, dmadev); ++ } ++ return 0; ++} ++ ++void hiedmac_free_virt_channels(struct dma_device *dmadev) ++{ ++ struct hiedmacv310_dma_chan *chan = NULL; ++ struct hiedmacv310_dma_chan *next = NULL; ++ ++ list_for_each_entry_safe(chan, next, &dmadev->channels, virt_chan.chan.device_node) { ++ list_del(&chan->virt_chan.chan.device_node); ++ kfree(chan); ++ } ++} ++ ++static void hiedmacv310_prep_dma_device(struct platform_device *pdev, ++ struct hiedmacv310_driver_data *hiedmac) ++{ ++ dma_cap_set(DMA_MEMCPY, hiedmac->memcpy.cap_mask); ++ hiedmac->memcpy.dev = &pdev->dev; ++ hiedmac->memcpy.device_free_chan_resources = hiedmac_free_chan_resources; ++ hiedmac->memcpy.device_prep_dma_memcpy = hiedmac_prep_dma_m2m_copy; ++ hiedmac->memcpy.device_tx_status = hiedmac_tx_status; ++ hiedmac->memcpy.device_issue_pending = hiedmac_issue_pending; ++ hiedmac->memcpy.device_config = hiedmac_config; ++ hiedmac->memcpy.device_pause = hiedmac_pause; ++ hiedmac->memcpy.device_resume = hiedmac_resume; ++ hiedmac->memcpy.device_terminate_all = hiedmac_terminate_all; ++ hiedmac->memcpy.directions = BIT(DMA_MEM_TO_MEM); ++ hiedmac->memcpy.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; ++ ++ dma_cap_set(DMA_SLAVE, hiedmac->slave.cap_mask); ++ dma_cap_set(DMA_CYCLIC, hiedmac->slave.cap_mask); ++ hiedmac->slave.dev = &pdev->dev; ++ hiedmac->slave.device_free_chan_resources = hiedmac_free_chan_resources; ++ hiedmac->slave.device_tx_status = hiedmac_tx_status; ++ hiedmac->slave.device_issue_pending = hiedmac_issue_pending; ++ hiedmac->slave.device_prep_slave_sg = hiedmac_prep_slave_sg; ++ hiedmac->slave.device_prep_dma_cyclic = hiedmac_prep_dma_cyclic; ++ hiedmac->slave.device_config = hiedmac_config; ++ hiedmac->slave.device_resume = hiedmac_resume; ++ hiedmac->slave.device_pause = hiedmac_pause; ++ hiedmac->slave.device_terminate_all = hiedmac_terminate_all; ++ hiedmac->slave.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); ++ hiedmac->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; ++} ++ ++static int hiedmacv310_init_chan(struct hiedmacv310_driver_data *hiedmac) ++{ ++ int i, ret; ++ hiedmac->phy_chans = kzalloc((hiedmac->channels * sizeof( ++ struct hiedmacv310_phy_chan)), ++ GFP_KERNEL); ++ if (!hiedmac->phy_chans) { ++ hiedmacv310_error("malloc for phy chans fail!"); ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < hiedmac->channels; i++) { ++ struct hiedmacv310_phy_chan *phy_ch = &hiedmac->phy_chans[i]; ++ phy_ch->id = i; ++ phy_ch->base = hiedmac->base + hiedmac_cx_base(i); ++ spin_lock_init(&phy_ch->lock); ++ phy_ch->serving = NULL; ++ } ++ ++ ret = hiedmac_init_virt_channels(hiedmac, &hiedmac->memcpy, hiedmac->channels, ++ false); ++ if (ret) { ++ hiedmacv310_error("fail to init memory virt channels!"); ++ goto free_phychans; ++ } ++ ++ ret = hiedmac_init_virt_channels(hiedmac, &hiedmac->slave, hiedmac->slave_requests, ++ true); ++ if (ret) { ++ hiedmacv310_error("fail to init slave virt channels!"); ++ goto free_memory_virt_channels; ++ } ++ return 0; ++ ++free_memory_virt_channels: ++ hiedmac_free_virt_channels(&hiedmac->memcpy); ++free_phychans: ++ kfree(hiedmac->phy_chans); ++ return -ENOMEM; ++} ++ ++static void hiedmacv310_free_chan(struct hiedmacv310_driver_data *hiedmac) ++{ ++ hiedmac_free_virt_channels(&hiedmac->slave); ++ hiedmac_free_virt_channels(&hiedmac->memcpy); ++ kfree(hiedmac->phy_chans); ++} ++ ++static void hiedmacv310_prep_phy_device(const struct hiedmacv310_driver_data *hiedmac) ++{ ++ clk_prepare_enable(hiedmac->clk); ++ clk_prepare_enable(hiedmac->axi_clk); ++ reset_control_deassert(hiedmac->rstc); ++ ++ hiedmacv310_writel(HIEDMAC_ALL_CHAN_CLR, hiedmac->base + HIEDMAC_INT_TC1_RAW); ++ hiedmacv310_writel(HIEDMAC_ALL_CHAN_CLR, hiedmac->base + HIEDMAC_INT_TC2_RAW); ++ hiedmacv310_writel(HIEDMAC_ALL_CHAN_CLR, hiedmac->base + HIEDMAC_INT_ERR1_RAW); ++ hiedmacv310_writel(HIEDMAC_ALL_CHAN_CLR, hiedmac->base + HIEDMAC_INT_ERR2_RAW); ++ hiedmacv310_writel(HIEDMAC_ALL_CHAN_CLR, hiedmac->base + HIEDMAC_INT_ERR3_RAW); ++ hiedmacv310_writel(HIEDMAC_INT_ENABLE_ALL_CHAN, ++ hiedmac->base + HIEDMAC_INT_TC1_MASK); ++ hiedmacv310_writel(HIEDMAC_INT_ENABLE_ALL_CHAN, ++ hiedmac->base + HIEDMAC_INT_TC2_MASK); ++ hiedmacv310_writel(HIEDMAC_INT_ENABLE_ALL_CHAN, ++ hiedmac->base + HIEDMAC_INT_ERR1_MASK); ++ hiedmacv310_writel(HIEDMAC_INT_ENABLE_ALL_CHAN, ++ hiedmac->base + HIEDMAC_INT_ERR2_MASK); ++ hiedmacv310_writel(HIEDMAC_INT_ENABLE_ALL_CHAN, ++ hiedmac->base + HIEDMAC_INT_ERR3_MASK); ++} ++ ++static struct hiedmacv310_driver_data* hiedmacv310_prep_hiedmac_device(struct platform_device *pdev) ++{ ++ int ret; ++ struct hiedmacv310_driver_data *hiedmac = NULL; ++ ssize_t trasfer_size; ++ ++ ret = dma_set_mask_and_coherent(&(pdev->dev), DMA_BIT_MASK(64)); ++ if (ret) ++ return NULL; ++ ++ hiedmac = kzalloc(sizeof(*hiedmac), GFP_KERNEL); ++ if (!hiedmac) { ++ hiedmacv310_error("malloc for hiedmac fail!"); ++ return NULL; ++ } ++ ++ hiedmac->dev = pdev; ++ ++ ret = get_of_probe(hiedmac); ++ if (ret) { ++ hiedmacv310_error("get dts info fail!"); ++ goto free_hiedmac; ++ } ++ ++ hiedmacv310_prep_dma_device(pdev, hiedmac); ++ hiedmac->max_transfer_size = MAX_TRANSFER_BYTES; ++ trasfer_size = MAX_TSFR_LLIS * EDMACV300_LLI_WORDS * sizeof(u32); ++ ++ hiedmac->pool = dma_pool_create(DRIVER_NAME, &(pdev->dev), ++ trasfer_size, EDMACV300_POOL_ALIGN, 0); ++ if (!hiedmac->pool) { ++ hiedmacv310_error("create pool fail!"); ++ goto free_hiedmac; ++ } ++ ++ ret = hiedmacv310_init_chan(hiedmac); ++ if (ret) { ++ goto free_pool; ++ } ++ return hiedmac; ++ ++free_pool: ++ dma_pool_destroy(hiedmac->pool); ++free_hiedmac: ++ kfree(hiedmac); ++ return NULL; ++} ++ ++static void free_hiedmac_device(struct hiedmacv310_driver_data *hiedmac) ++{ ++ hiedmacv310_free_chan(hiedmac); ++ dma_pool_destroy(hiedmac->pool); ++ kfree(hiedmac); ++} ++ ++static int __init hiedmacv310_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct hiedmacv310_driver_data *hiedmac = NULL; ++ ++ hiedmac = hiedmacv310_prep_hiedmac_device(pdev); ++ if (hiedmac == NULL) { ++ return -ENOMEM; ++ } ++ ++ ret = request_irq(hiedmac->irq, hiemdacv310_irq, 0, DRIVER_NAME, hiedmac); ++ if (ret) { ++ hiedmacv310_error("fail to request irq"); ++ goto free_hiedmac; ++ } ++ hiedmacv310_prep_phy_device(hiedmac); ++ ret = dma_async_device_register(&hiedmac->memcpy); ++ if (ret) { ++ hiedmacv310_error("%s failed to register memcpy as an async device - %d\n", __func__, ret); ++ goto free_irq_res; ++ } ++ ++ ret = dma_async_device_register(&hiedmac->slave); ++ if (ret) { ++ hiedmacv310_error("%s failed to register slave as an async device - %d\n", __func__, ret); ++ goto free_memcpy_device; ++ } ++ return 0; ++ ++free_memcpy_device: ++ dma_async_device_unregister(&hiedmac->memcpy); ++free_irq_res: ++ free_irq(hiedmac->irq, hiedmac); ++free_hiedmac: ++ free_hiedmac_device(hiedmac); ++ return -ENOMEM; ++} ++ ++static int hiemda_remove(struct platform_device *pdev) ++{ ++ int err = 0; ++ return err; ++} ++ ++static const struct of_device_id hiedmacv310_match[] = { ++ { .compatible = "hisilicon,hiedmacv310" }, ++ {}, ++}; ++ ++static struct platform_driver hiedmacv310_driver = { ++ .remove = hiemda_remove, ++ .driver = { ++ .name = "hiedmacv310", ++ .of_match_table = hiedmacv310_match, ++ }, ++}; ++ ++static int __init hiedmacv310_init(void) ++{ ++ return platform_driver_probe(&hiedmacv310_driver, hiedmacv310_probe); ++} ++subsys_initcall(hiedmacv310_init); ++ ++static void __exit hiedmacv310_exit(void) ++{ ++ platform_driver_unregister(&hiedmacv310_driver); ++} ++module_exit(hiedmacv310_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Hisilicon"); +diff --git a/drivers/dma/hiedmacv310.h b/drivers/dma/hiedmacv310.h +new file mode 100644 +index 000000000..1fc093945 +--- /dev/null ++++ b/drivers/dma/hiedmacv310.h +@@ -0,0 +1,153 @@ ++/* ++ * driver/dma/hiedmacv310.h ++ * ++ * The Hiedma Controller v310 Device Driver for HiSilicon ++ * ++ * Copyright (c) 2020 HiSilicon Technologies Co., Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++#ifndef __HIEDMACV310_H__ ++#define __HIEDMACV310_H__ ++ ++/* debug control */ ++#define HIEDMACV310_CONFIG_TRACE_LEVEL 3 ++#define HIEDMACV310_TRACE_LEVEL 0 ++#define HIEDMACV310_REG_TRACE_LEVEL 3 ++#define HIEDMACV310_TRACE_FMT KERN_INFO ++ ++#ifdef DEBUG_HIEDMAC ++#define hiedmacv310_trace(level, msg...) do { \ ++ if ((level) >= HIEDMACV310_TRACE_LEVEL) { \ ++ printk(HIEDMACV310_TRACE_FMT"%s:%d: ", __func__, __LINE__); \ ++ printk(msg); \ ++ printk("\n"); \ ++ } \ ++} while (0) ++ ++ ++#define hiedmacv310_assert(cond) do { \ ++ if (!(cond)) { \ ++ printk(KERN_ERR "Assert:hiedmacv310:%s:%d\n", \ ++ __func__, \ ++ __LINE__); \ ++ BUG(); \ ++ } \ ++} while (0) ++ ++#define hiedmacv310_error(s...) do { \ ++ printk(KERN_ERR "hiedmacv310:%s:%d: ", __func__, __LINE__); \ ++ printk(s); \ ++ printk("\n"); \ ++} while (0) ++ ++#else ++ ++#define hiedmacv310_trace(level, msg...) ++#define hiedmacv310_assert(level, msg...) ++#define hiedmacv310_error(level, msg...) ++ ++#endif ++ ++#define hiedmacv310_readl(addr) ((unsigned int)readl((void *)(addr))) ++ ++#define hiedmacv310_writel(v, addr) do { writel(v, (void *)(addr)); \ ++} while (0) ++ ++ ++#define MAX_TRANSFER_BYTES 0xffff ++ ++/* reg offset */ ++#define HIEDMAC_INT_STAT 0x0 ++#define HIEDMAC_INT_TC1 0x4 ++#define HIEDMAC_INT_TC2 0x8 ++#define HIEDMAC_INT_ERR1 0xc ++#define HIEDMAC_INT_ERR2 0x10 ++#define HIEDMAC_INT_ERR3 0x14 ++ ++#define HIEDMAC_INT_TC1_MASK 0x18 ++#define HIEDMAC_INT_TC2_MASK 0x1c ++#define HIEDMAC_INT_ERR1_MASK 0x20 ++#define HIEDMAC_INT_ERR2_MASK 0x24 ++#define HIEDMAC_INT_ERR3_MASK 0x28 ++ ++#define HIEDMAC_INT_TC1_RAW 0x600 ++#define HIEDMAC_INT_TC2_RAW 0x608 ++#define HIEDMAC_INT_ERR1_RAW 0x610 ++#define HIEDMAC_INT_ERR2_RAW 0x618 ++#define HIEDMAC_INT_ERR3_RAW 0x620 ++ ++#define hiedmac_cx_curr_cnt0(cn) (0x404 + (cn) * 0x20) ++#define hiedmac_cx_curr_src_addr_l(cn) (0x408 + (cn) * 0x20) ++#define hiedmac_cx_curr_src_addr_h(cn) (0x40c + (cn) * 0x20) ++#define hiedmac_cx_curr_dest_addr_l(cn) (0x410 + (cn) * 0x20) ++#define hiedmac_cx_curr_dest_addr_h(cn) (0x414 + (cn) * 0x20) ++ ++#define HIEDMAC_CH_PRI 0x688 ++#define HIEDMAC_CH_STAT 0x690 ++#define HIEDMAC_DMA_CTRL 0x698 ++ ++#define hiedmac_cx_base(cn) (0x800 + (cn) * 0x40) ++#define hiedmac_cx_lli_l(cn) (0x800 + (cn) * 0x40) ++#define hiedmac_cx_lli_h(cn) (0x804 + (cn) * 0x40) ++#define hiedmac_cx_cnt0(cn) (0x81c + (cn) * 0x40) ++#define hiedmac_cx_src_addr_l(cn) (0x820 + (cn) * 0x40) ++#define hiedmac_cx_src_addr_h(cn) (0x824 + (cn) * 0x40) ++#define hiedmac_cx_dest_addr_l(cn) (0x828 + (cn) * 0x40) ++#define hiedmac_cx_dest_addr_h(cn) (0x82c + (cn) * 0x40) ++#define hiedmac_cx_config(cn) (0x830 + (cn) * 0x40) ++ ++#define HIEDMAC_ALL_CHAN_CLR 0xff ++#define HIEDMAC_INT_ENABLE_ALL_CHAN 0xff ++ ++ ++#define HIEDMAC_CONFIG_SRC_INC (1 << 31) ++#define HIEDMAC_CONFIG_DST_INC (1 << 30) ++ ++#define HIEDMAC_CONFIG_SRC_WIDTH_SHIFT 16 ++#define HIEDMAC_CONFIG_DST_WIDTH_SHIFT 12 ++#define HIEDMAC_WIDTH_8BIT 0b0 ++#define HIEDMAC_WIDTH_16BIT 0b1 ++#define HIEDMAC_WIDTH_32BIT 0b10 ++#define HIEDMAC_WIDTH_64BIT 0b11 ++#ifdef CONFIG_64BIT ++#define HIEDMAC_MEM_BIT_WIDTH HIEDMAC_WIDTH_64BIT ++#else ++#define HIEDMAC_MEM_BIT_WIDTH HIEDMAC_WIDTH_32BIT ++#endif ++ ++#define HIEDMAC_MAX_BURST_WIDTH 16 ++#define HIEDMAC_MIN_BURST_WIDTH 1 ++#define HIEDMAC_CONFIG_SRC_BURST_SHIFT 24 ++#define HIEDMAC_CONFIG_DST_BURST_SHIFT 20 ++ ++#define HIEDMAC_LLI_ALIGN 0x40 ++#define HIEDMAC_LLI_DISABLE 0x0 ++#define HIEDMAC_LLI_ENABLE 0x2 ++ ++#define HIEDMAC_CXCONFIG_SIGNAL_SHIFT 0x4 ++#define HIEDMAC_CXCONFIG_MEM_TYPE 0x0 ++#define HIEDMAC_CXCONFIG_DEV_MEM_TYPE 0x1 ++#define HIEDMAC_CXCONFIG_TSF_TYPE_SHIFT 0x2 ++#define HIEDMAC_CXCONFIG_LLI_START 0x1 ++ ++#define HIEDMAC_CXCONFIG_ITC_EN 0x1 ++#define HIEDMAC_CXCONFIG_ITC_EN_SHIFT 0x1 ++ ++#define CCFG_EN 0x1 ++ ++#define HIEDMAC_CONTROL_SRC_WIDTH_MASK GENMASK(18, 16) ++#define HIEDMAC_CONTROL_DST_WIDTH_MASK GENMASK(14, 12) ++#endif +diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c +index f1b53dd1d..0825ad601 100644 +--- a/drivers/gpio/gpio-pl061.c ++++ b/drivers/gpio/gpio-pl061.c +@@ -289,6 +289,9 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) + struct pl061 *pl061; + struct gpio_irq_chip *girq; + int ret, irq; ++#ifdef CONFIG_ARCH_HISI_BVT ++ int gpio_idx; ++#endif + + pl061 = devm_kzalloc(dev, sizeof(*pl061), GFP_KERNEL); + if (pl061 == NULL) +@@ -301,7 +304,20 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) + raw_spin_lock_init(&pl061->lock); + pl061->gc.request = gpiochip_generic_request; + pl061->gc.free = gpiochip_generic_free; ++#ifdef CONFIG_ARCH_HISI_BVT ++ if (dev->of_node) { ++ gpio_idx = of_alias_get_id(dev->of_node, "gpio"); ++ if (gpio_idx < 0) ++ return -ENOMEM; ++ pl061->gc.base = gpio_idx * PL061_GPIO_NR; ++ } ++ ++ if (pl061->gc.base < 0) ++ pl061->gc.base = -1; ++#else + pl061->gc.base = -1; ++#endif ++ + pl061->gc.get_direction = pl061_get_direction; + pl061->gc.direction_input = pl061_direction_input; + pl061->gc.direction_output = pl061_direction_output; +diff --git a/drivers/gpu/drm/hisilicon/Kconfig b/drivers/gpu/drm/hisilicon/Kconfig +index cc5a244db..d69de65db 100644 +--- a/drivers/gpu/drm/hisilicon/Kconfig ++++ b/drivers/gpu/drm/hisilicon/Kconfig +@@ -5,3 +5,4 @@ + + source "drivers/gpu/drm/hisilicon/hibmc/Kconfig" + source "drivers/gpu/drm/hisilicon/kirin/Kconfig" ++source "drivers/gpu/drm/hisilicon/hismart/Kconfig" +diff --git a/drivers/gpu/drm/hisilicon/Makefile b/drivers/gpu/drm/hisilicon/Makefile +index 69dec6084..4d4968e65 100644 +--- a/drivers/gpu/drm/hisilicon/Makefile ++++ b/drivers/gpu/drm/hisilicon/Makefile +@@ -5,3 +5,4 @@ + + obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc/ + obj-$(CONFIG_DRM_HISI_KIRIN) += kirin/ ++obj-$(CONFIG_DRM_HISI_HISMART) += hismart/ +diff --git a/drivers/gpu/drm/hisilicon/hismart/Kconfig b/drivers/gpu/drm/hisilicon/hismart/Kconfig +new file mode 100644 +index 000000000..ffc8564a8 +--- /dev/null ++++ b/drivers/gpu/drm/hisilicon/hismart/Kconfig +@@ -0,0 +1,8 @@ ++config DRM_HISI_HISMART ++ tristate "DRM Support for Hisilicon Smart Media / Smart Vision SoC chipset" ++ depends on DRM && (ARM || ARM64) ++ select DRM_KMS_HELPER ++ select DRM_GEM_CMA_HELPER ++ help ++ Choose this option to enable DRM on Hisilicon Smart Media / Smart Vision SoC chipset ++ +diff --git a/drivers/gpu/drm/hisilicon/hismart/Makefile b/drivers/gpu/drm/hisilicon/hismart/Makefile +new file mode 100644 +index 000000000..e89172f24 +--- /dev/null ++++ b/drivers/gpu/drm/hisilicon/hismart/Makefile +@@ -0,0 +1,27 @@ ++KERNEL_DIR := $(srctree) ++SDK_ROOT_DIR = $(shell cd $(KERNEL_DIR)/../../../../../device/soc/hisilicon/hi3516dv300/sdk_linux/drv && /bin/pwd) ++$(warning SDK_ROOT_DIR= $(SDK_ROOT_DIR)) ++EXTRA_CFLAGS += -I$(SDK_ROOT_DIR)/mpp/cbb/vo/vo_dev/drm_hal \ ++ -I$(SDK_ROOT_DIR)/mpp/component/hifb/drm_hal \ ++ -I$(SDK_ROOT_DIR)/mpp/component/hdmi/src/mkp/drm_hal \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/include \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/include/adapt \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/based/arch/hi3516cv500/include/hi3516cv500 \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/vo/vo_dev/include \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/vo/vo_dev/include/adapt \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/vo/include/adapt \ ++ -I$(SDK_ROOT_DIR)/mpp/cbb/vo/include \ ++ -I$(SDK_ROOT_DIR)/osal/include ++$(warning CONFIG_DRM_HISI_HISMART = $(CONFIG_DRM_HISI_HISMART)) ++hi_drm-y := \ ++ hi_drm_drv.o \ ++ hi_drm_crtc.o \ ++ hi_adp_crtc.o \ ++ hi_drm_hdmitx.o \ ++ hi_adp_hdmitx.o \ ++ hi_drm_func_ext.o \ ++ hi_drm_mipitx.o \ ++ hi_adp_mipitx.o ++ ++obj-y += hi_drm.o ++ +diff --git a/drivers/gpu/drm/hisilicon/hismart/drm_hal_mipitx.h b/drivers/gpu/drm/hisilicon/hismart/drm_hal_mipitx.h +new file mode 100644 +index 000000000..88192d01f +--- /dev/null ++++ b/drivers/gpu/drm/hisilicon/hismart/drm_hal_mipitx.h +@@ -0,0 +1,91 @@ ++/* ++ * Copyright (c) Hisilicon Technologies Co., Ltd. 2020-2020. All rights reserved. ++ * Description: Hisilicon DRM driver ++ * Author: Hisilicon multimedia software group ++ * Create: 2020-7-29 ++ */ ++ ++#ifndef __DRM_HAL_MIPITX_H__ ++#define __DRM_HAL_MIPITX_H__ ++ ++/* output timming */ ++enum IntfSync { ++ OUTPUT_USER = 0, /* User timing */ ++ OUTPUT_PAL, /* PAL standard */ ++ OUTPUT_NTSC, /* NTSC standard */ ++ OUTPUT_1080P24, /* 1920 x 1080 at 24 Hz. */ ++ OUTPUT_1080P25, /* 1920 x 1080 at 25 Hz. */ ++ OUTPUT_1080P30, /* 1920 x 1080 at 30 Hz. */ ++ OUTPUT_720P50, /* 1280 x 720 at 50 Hz. */ ++ OUTPUT_720P60, /* 1280 x 720 at 60 Hz. */ ++ OUTPUT_1080I50, /* 1920 x 1080 at 50 Hz, interlace. */ ++ OUTPUT_1080I60, /* 1920 x 1080 at 60 Hz, interlace. */ ++ OUTPUT_1080P50, /* 1920 x 1080 at 50 Hz. */ ++ OUTPUT_1080P60, /* 1920 x 1080 at 60 Hz. */ ++ OUTPUT_576P50, /* 720 x 576 at 50 Hz. */ ++ OUTPUT_480P60, /* 720 x 480 at 60 Hz. */ ++ OUTPUT_800X600_60, /* VESA 800 x 600 at 60 Hz (non-interlaced) */ ++ OUTPUT_1024X768_60, /* VESA 1024 x 768 at 60 Hz (non-interlaced) */ ++ OUTPUT_1280X1024_60, /* VESA 1280 x 1024 at 60 Hz (non-interlaced) */ ++ OUTPUT_1366X768_60, /* VESA 1366 x 768 at 60 Hz (non-interlaced) */ ++ OUTPUT_1440X900_60, /* VESA 1440 x 900 at 60 Hz (non-interlaced) CVT Compliant */ ++ OUTPUT_1280X800_60, /* 1280*800@60Hz VGA@60Hz */ ++ OUTPUT_1600X1200_60, /* VESA 1600 x 1200 at 60 Hz (non-interlaced) */ ++ OUTPUT_1680X1050_60, /* VESA 1680 x 1050 at 60 Hz (non-interlaced) */ ++ OUTPUT_1920X1200_60, /* VESA 1920 x 1600 at 60 Hz (non-interlaced) CVT (Reduced Blanking) */ ++ OUTPUT_640X480_60, /* VESA 640 x 480 at 60 Hz (non-interlaced) CVT */ ++ OUTPUT_960H_PAL, /* ITU-R BT.1302 960 x 576 at 50 Hz (interlaced) */ ++ OUTPUT_960H_NTSC, /* ITU-R BT.1302 960 x 480 at 60 Hz (interlaced) */ ++ OUTPUT_1920X2160_30, /* 1920x2160_30 */ ++ OUTPUT_2560X1440_30, /* 2560x1440_30 */ ++ OUTPUT_2560X1440_60, /* 2560x1440_60 */ ++ OUTPUT_2560X1600_60, /* 2560x1600_60 */ ++ OUTPUT_3840X2160_24, /* 3840x2160_24 */ ++ OUTPUT_3840X2160_25, /* 3840x2160_25 */ ++ OUTPUT_3840X2160_30, /* 3840x2160_30 */ ++ OUTPUT_3840X2160_50, /* 3840x2160_50 */ ++ OUTPUT_3840X2160_60, /* 3840x2160_60 */ ++ OUTPUT_4096X2160_24, /* 4096x2160_24 */ ++ OUTPUT_4096X2160_25, /* 4096x2160_25 */ ++ OUTPUT_4096X2160_30, /* 4096x2160_30 */ ++ OUTPUT_4096X2160_50, /* 4096x2160_50 */ ++ OUTPUT_4096X2160_60, /* 4096x2160_60 */ ++ OUTPUT_320X240_60, /* For ota5182 at 60 Hz (8bit) */ ++ OUTPUT_320X240_50, /* For ili9342 at 50 Hz (6bit) */ ++ OUTPUT_240X320_50, /* Hi3559AV100: For ili9341 at 50 Hz (6bit) */ ++ OUTPUT_240X320_60, /* For ili9341 at 60 Hz (16bit) */ ++ OUTPUT_800X600_50, /* For LCD at 50 Hz (24bit) */ ++ OUTPUT_720X1280_60, /* For MIPI DSI Tx 720 x1280 at 60 Hz */ ++ OUTPUT_1080X1920_60, /* For MIPI DSI Tx 1080x1920 at 60 Hz */ ++ OUTPUT_7680X4320_30, /* For HDMI2.1 at 30 Hz */ ++}; ++ ++struct DispInfo { ++ unsigned int width; ++ unsigned int hbp; ++ unsigned int hfp; ++ unsigned int hsw; ++ unsigned int height; ++ unsigned int vbp; ++ unsigned int vfp; ++ unsigned int vsw; ++ unsigned int frameRate; ++ unsigned int intfType; ++ enum IntfSync intfSync; ++ unsigned int minLevel; ++ unsigned int maxLevel; ++ unsigned int defLevel; ++}; ++ ++struct DispOperations { ++ int (*init)(unsigned int dev_id); ++ int (*on)(unsigned int dev_id); ++ int (*off)(unsigned int dev_id); ++ int (*setBacklight)(unsigned int dev_id, unsigned int level); ++ int (*getDispInfo)(unsigned int dev_id, struct DispInfo *info); ++}; ++ ++struct DispOperations *GetDispOps(void); ++ ++#endif /* __DRM_HAL_MIPITX_H__ */ ++ +diff --git a/drivers/gpu/drm/hisilicon/hismart/hi_adp_crtc.c b/drivers/gpu/drm/hisilicon/hismart/hi_adp_crtc.c +new file mode 100755 +index 000000000..897f7838f +--- /dev/null ++++ b/drivers/gpu/drm/hisilicon/hismart/hi_adp_crtc.c +@@ -0,0 +1,777 @@ ++/* ++ * Copyright (c) Hisilicon Technologies Co., Ltd. 2020-2020. All rights reserved. ++ * Description: Hisilicon DRM driver ++ * Author: Hisilicon multimedia software group ++ * Create: 2020-7-29 ++ */ ++ ++#include "hi_adp_crtc.h" ++#include ++#include ++#include ++#include