From 32de336141045dd7fe27d998a0a018e57f7071cb Mon Sep 17 00:00:00 2001 From: songzhengchao Date: Mon, 18 Jul 2022 10:30:51 +0800 Subject: [PATCH] Implement Dopt on backend and Bug fix arm64 c-calling conv push x30 stackmapoint support return type void llvm prologue support callee save registers bug fix lib/Transforms/Scalar/RewriteStatepointsForGC.cpp bug inttoptrs in an integral address space are currently ill-defined issue:https://gitee.com/openharmony-sig/third_party_llvm-project/issues/I5LDCC?from=project-issue Signed-off-by: songzhengchao --- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 26 +++++++++++++++++++ .../Target/AArch64/AArch64RegisterInfo.cpp | 3 ++- llvm/lib/Target/X86/X86ISelLowering.cpp | 5 ++++ .../Scalar/RewriteStatepointsForGC.cpp | 10 +++++++ 4 files changed, 43 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp index 1d0f1344357d..2a42bd5af902 100644 --- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp +++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp @@ -128,6 +128,9 @@ private: void calculateCallFrameInfo(MachineFunction &MF); void calculateSaveRestoreBlocks(MachineFunction &MF); +#ifdef ARK_GC_SUPPORT + void RecordCalleeSaveRegisterAndOffset(MachineFunction &MF, std::vector &CSI); +#endif void spillCalleeSavedRegs(MachineFunction &MF); void calculateFrameObjectOffsets(MachineFunction &MF); @@ -594,6 +597,26 @@ static void insertCSRRestores(MachineBasicBlock &RestoreBlock, } } +#ifdef ARK_GC_SUPPORT +void PEI::RecordCalleeSaveRegisterAndOffset(MachineFunction &MF, std::vector &CSI) +{ + MachineModuleInfo &MMI = MF.getMMI(); + MachineFrameInfo &MFI = MF.getFrameInfo(); + const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); + Function &func = const_cast(MF.getFunction()); + for (std::vector::const_iterator + I = CSI.begin(), E = CSI.end(); I != E; ++I) { + int64_t Offset = MFI.getObjectOffset(I->getFrameIdx()); + unsigned Reg = I->getReg(); + unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, true); + std::string key = std::string("DwarfReg") + std::to_string(DwarfRegNum); + std::string value = std::to_string(Offset); + Attribute attr = Attribute::get(func.getContext(), key.c_str(), value.c_str()); + func.addAttribute(AttributeList::FunctionIndex, attr); + } +} +#endif + void PEI::spillCalleeSavedRegs(MachineFunction &MF) { // We can't list this requirement in getRequiredProperties because some // targets (WebAssembly) use virtual registers past this point, and the pass @@ -634,6 +657,9 @@ void PEI::spillCalleeSavedRegs(MachineFunction &MF) { for (MachineBasicBlock *RestoreBlock : RestoreBlocks) insertCSRRestores(*RestoreBlock, CSI); } +#ifdef ARK_GC_SUPPORT + RecordCalleeSaveRegisterAndOffset(MF, CSI); +#endif } } diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp index 0533a6938dd1..3f1a9d4e8c9f 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp @@ -317,7 +317,8 @@ AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const { markSuperRegs(Reserved, AArch64::W29); markSuperRegs(Reserved, AArch64::W30); } - if (MF.getFunction().getCallingConv() == CallingConv::WebKit_JS) { + if ((MF.getFunction().getCallingConv() == CallingConv::WebKit_JS) || + (MF.getFunction().getCallingConv() == CallingConv::C)) { markSuperRegs(Reserved, AArch64::W30); } #endif diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 1e2407c7e7f6..f20b78aa918a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -3958,8 +3958,13 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, ++NumTailCalls; } +#ifdef ARK_GC_SUPPORT + assert(!(isVarArg && canGuaranteeTCO(CallConv) && (CallConv != CallingConv::GHC)) && + "Var args not supported with calling convention fastcc, ghc or hipe"); +#else assert(!(isVarArg && canGuaranteeTCO(CallConv)) && "Var args not supported with calling convention fastcc, ghc or hipe"); +#endif // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp index b7830555bf73..bee609e28487 100644 --- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp +++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp @@ -521,6 +521,16 @@ static BaseDefiningValueResult findBaseDefiningValue(Value *I) { return BaseDefiningValueResult( ConstantPointerNull::get(cast(I->getType())), true); } +#ifndef ARK_GC_SUPPORT + // inttoptrs in an integral address space are currently ill-defined. We + // treat them as defining base pointers here for consistency with the + // constant rule above and because we don't really have a better semantic + // to give them. Note that the optimizer is always free to insert undefined + // behavior on dynamically dead paths as well. + // issue:https://gitee.com/openharmony/arkcompiler_ets_runtime/issues/I5L2AP?from=project-issue + if (isa(I)) + return BaseDefiningValueResult(I, true); +#endif if (CastInst *CI = dyn_cast(I)) { Value *Def = CI->stripPointerCasts(); -- Gitee