From 3887fd81bf5dd7f31e5a4a3f4ef5218a4ae97a7e Mon Sep 17 00:00:00 2001 From: Roman Zhuykov Date: Fri, 1 Mar 2024 13:50:39 +0300 Subject: [PATCH] [ArkRuntime] AArch64: Adjust ArkFast calling conventions Take floating point temporary registers into account Signed-off-by: Roman Zhuykov --- llvm/lib/Target/AArch64/AArch64ArkGcCallingConvention.td | 2 +- llvm/lib/Target/AArch64/AArch64CallingConvention.td | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64ArkGcCallingConvention.td b/llvm/lib/Target/AArch64/AArch64ArkGcCallingConvention.td index 5190ea36c3b6..5485ac4c90da 100644 --- a/llvm/lib/Target/AArch64/AArch64ArkGcCallingConvention.td +++ b/llvm/lib/Target/AArch64/AArch64ArkGcCallingConvention.td @@ -506,7 +506,7 @@ def CSR_AArch64_ArkInt : CalleeSavedRegs<(add FP)>; def CSR_AArch64_ArkFast5 : CalleeSavedRegs<(add (sub (sequence "X%u", 5, 27), X16, X17), LR, - (sequence "D%u", 0, 31))>; + (sequence "D%u", 0, 29))>; def CSR_AArch64_ArkFast4 : CalleeSavedRegs<(add CSR_AArch64_ArkFast5, X4)>; diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.td b/llvm/lib/Target/AArch64/AArch64CallingConvention.td index dbc5b5eb2218..0094ee3e3129 100644 --- a/llvm/lib/Target/AArch64/AArch64CallingConvention.td +++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.td @@ -505,7 +505,7 @@ def CSR_AArch64_ArkInt : CalleeSavedRegs<(add FP)>; def CSR_AArch64_ArkFast5 : CalleeSavedRegs<(add (sub (sequence "X%u", 5, 27), X16, X17), LR, - (sequence "D%u", 0, 31))>; + (sequence "D%u", 0, 29))>; def CSR_AArch64_ArkFast4 : CalleeSavedRegs<(add CSR_AArch64_ArkFast5, X4)>; -- Gitee