Add mips o32 fpxx support in libunwind · Pull Request !81 · OpenHarmony/third_party_llvm-project

Support for fp32 and fp64 mips o32 modes was initially added in D41968. That 
patch proposed different handling of fp32 and fp64 cases depending on the
__mips_fpr value (32 or 64). In case of fpxx, __mips_fpr is 0, and no special
case was implemented for it. Instead of creating a 3rd separate case for that,
this patch tries to unify the logic for fp32, fp64 and fpxx. There are some
key points:

- FPU registers size for fpxx is determined in runtime. See the documentation
  in p.5.6 of "MIPS Architecture For Programmers Volume I-B: Introduction to
  the microMIPS32TM Architecture". The document is available at
  https://www.mips.com/products/architectures/mips32-2/.
- unw_fpr_t is float for fp32, double for fp64 and uint64_t for fpxx. For fpxx,
  if FPU registers are 32-bit, we only use the first 4 bytes of uint64_t to
  store the register value.
- FPU registers are stored in a buffer of 256 = 32 * 8 bytes. In case if size
  of the registers is 32 bit, they are stored in pairs:
  f0 f0 f0 f0 f1 f1 f1 f1 .. .. .. .. .. .. .. .. f2 f2 f2 f2 f3 f3 f3 f3 etc
- The case of 32-bit FPU registers is not tested yet. Qemu only supports mips
  CPUs with either 64-bit FPU register size or no FPU at all. There is also no
  hardware available with such specs.

类型	指派人员	状态
审查	hhj	进行中 (0/1人)
测试	openharmony_ci	进行中 (0/1人)

OpenHarmony/third_party_llvm-project .gitee-modal { width: 500px !important; }

搜索帮助

OpenHarmony/third_party_llvm-project