diff --git a/clang/lib/AST/ItaniumMangle.cpp b/clang/lib/AST/ItaniumMangle.cpp
index e3f91d6624b91148f0de6f88ff4b26fea1173189..74aa7000306845b8d8a8bdb5b8892f63d313a98b 100644
--- a/clang/lib/AST/ItaniumMangle.cpp
+++ b/clang/lib/AST/ItaniumMangle.cpp
@@ -1499,9 +1499,7 @@ void CXXNameMangler::mangleUnqualifiedName(
   {
     if (const CXXRecordDecl *A = dyn_cast<const CXXRecordDecl>(GD.getDecl()))
     {
-      // todo: if class info is signed, then we must mangle also the name of non polymorphic classes.
-      isPac = langOptions.PointerAuthMangleClass
-        && (!A->hasDefinition() || A->isPolymorphic()) && !A->isNoPac();
+      isPac = langOptions.PointerAuthMangleClass && !A->isNoPac();
     }
   }
   if (pauth_func)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 40d6198b3f218bcb22e0736ca3b4fd6bc544726d..86c1b4f62746148bcbe05c2735e9f47fab0a8e48 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -11242,7 +11242,7 @@ SDValue AArch64TargetLowering::LowerRETURNADDR(SDValue Op,
   // Armv8.3-A architectures. On Armv8.3-A and onwards XPACI is available so use
   // that instead.
   SDNode *St;
-  if (Subtarget->hasPAuth()) {
+  if (Subtarget->hasPAuth() && !Subtarget->hasPAuthHintOnly()) {
     St = DAG.getMachineNode(AArch64::XPACI, DL, VT, ReturnAddress);
   } else {
     // XPACLRI operates on LR therefore we must move the operand accordingly.
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 500c1d8f3ab89331eb9262adb5c357b9a2a97a98..8375c59421bdf4273efc2bc98d518a5dc195e27f 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -6636,7 +6636,7 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
             MF, TII, AArch64::LR, AArch64::GPR64RegClass, I.getDebugLoc());
       }
 
-      if (STI.hasPAuth()) {
+      if (STI.hasPAuth() && !STI.hasPAuthHintOnly()) {
         MIB.buildInstr(AArch64::XPACI, {DstReg}, {MFReturnAddr});
       } else {
         MIB.buildCopy({Register(AArch64::LR)}, {MFReturnAddr});
@@ -6663,7 +6663,7 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
     else {
       MFI.setReturnAddressIsTaken(true);
 
-      if (STI.hasPAuth()) {
+      if (STI.hasPAuth() && !STI.hasPAuthHintOnly()) {
         Register TmpReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
         MIB.buildInstr(AArch64::LDRXui, {TmpReg}, {FrameAddr}).addImm(1);
         MIB.buildInstr(AArch64::XPACI, {DstReg}, {TmpReg});