From bfdf9d6545568aba0cdcaf0dbeb4180071e6744b Mon Sep 17 00:00:00 2001 From: xionglei6 Date: Wed, 27 Oct 2021 14:38:42 +0800 Subject: [PATCH] modify for init Signed-off-by: xionglei6 --- u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx.c | 3 +++ u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx_hal.c | 3 +-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx.c b/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx.c index 17f7b2a264..b25d275be3 100755 --- a/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx.c +++ b/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx.c @@ -33,6 +33,8 @@ #define DTYPE_DCS_WRITE1 0x15 // 0x23 short write, 2 parameter #define DTYPE_DCS_LWRITE 0x39 // 0x29 long write +extern void pwm_mipi_lcm(); + typedef struct { combo_dev_cfg_t dev_cfg; } mipi_tx_dev_ctx_t; @@ -502,6 +504,7 @@ int mipi_tx_display(unsigned int vosync) udelay(10000); /* delay 10000 us for the stable signal */ PLE_PRIVATE_VO_InitScreen480x960(); udelay(10000); + pwm_mipi_lcm(); /* step 3 : enable mipi_tx controller. */ ret = mipi_tx_ioctl(HI_MIPI_TX_ENABLE, (unsigned long)0); diff --git a/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx_hal.c b/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx_hal.c index 04fd0e86f0..8173c433e7 100755 --- a/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx_hal.c +++ b/u-boot-2020.01/product/hiosd/mipi_tx/hi3516cv500/mipi_tx_hal.c @@ -958,7 +958,7 @@ static void reset_mipi_lcm() mdelay(120); } -static void pwm_mipi_lcm() +void pwm_mipi_lcm() { unsigned long mipi_tx_multip_gpio_addr; @@ -976,7 +976,6 @@ static void pwm_mipi_lcm() int mipi_tx_drv_init(void) { int ret; - pwm_mipi_lcm(); reset_mipi_lcm(); ret = mipi_tx_drv_reg_init(); -- Gitee