From 36eb783fc7b28cea1f00a7876af253eb49c7f57a Mon Sep 17 00:00:00 2001 From: xupenghu_huaweipc Date: Fri, 10 Apr 2020 09:36:53 +0800 Subject: [PATCH 01/54] add bsp/stm32/stm32l010-st-nucleo --- bsp/stm32/README.md | 2 + bsp/stm32/stm32l010-st-nucleo/.config | 364 +++ bsp/stm32/stm32l010-st-nucleo/.gitignore | 42 + bsp/stm32/stm32l010-st-nucleo/Kconfig | 21 + bsp/stm32/stm32l010-st-nucleo/README.md | 120 + bsp/stm32/stm32l010-st-nucleo/SConscript | 15 + bsp/stm32/stm32l010-st-nucleo/SConstruct | 60 + .../applications/SConscript | 11 + .../stm32l010-st-nucleo/applications/main.c | 33 + .../board/CubeMX_Config/.mxproject | 14 + .../board/CubeMX_Config/CubeMX_Config.ioc | 114 + .../board/CubeMX_Config/Inc/main.h | 71 + .../CubeMX_Config/Inc/stm32l0xx_hal_conf.h | 302 ++ .../board/CubeMX_Config/Inc/stm32l0xx_it.h | 65 + .../board/CubeMX_Config/Src/main.c | 238 ++ .../CubeMX_Config/Src/stm32l0xx_hal_msp.c | 149 + .../board/CubeMX_Config/Src/stm32l0xx_it.c | 145 + .../CubeMX_Config/Src/system_stm32l0xx.c | 279 ++ bsp/stm32/stm32l010-st-nucleo/board/Kconfig | 48 + .../stm32l010-st-nucleo/board/SConscript | 34 + bsp/stm32/stm32l010-st-nucleo/board/board.c | 69 + bsp/stm32/stm32l010-st-nucleo/board/board.h | 50 + .../board/linker_scripts/link.icf | 29 + .../board/linker_scripts/link.lds | 157 + .../board/linker_scripts/link.sct | 16 + .../stm32l010-st-nucleo/figures/board.jpg | Bin 0 -> 161179 bytes bsp/stm32/stm32l010-st-nucleo/project.ewd | 2834 +++++++++++++++++ bsp/stm32/stm32l010-st-nucleo/project.ewp | 2259 +++++++++++++ bsp/stm32/stm32l010-st-nucleo/project.eww | 10 + bsp/stm32/stm32l010-st-nucleo/project.uvoptx | 932 ++++++ bsp/stm32/stm32l010-st-nucleo/project.uvprojx | 717 +++++ bsp/stm32/stm32l010-st-nucleo/rtconfig.h | 170 + bsp/stm32/stm32l010-st-nucleo/rtconfig.py | 143 + bsp/stm32/stm32l010-st-nucleo/template.ewp | 2031 ++++++++++++ bsp/stm32/stm32l010-st-nucleo/template.eww | 10 + bsp/stm32/stm32l010-st-nucleo/template.uvoptx | 192 ++ .../stm32l010-st-nucleo/template.uvprojx | 395 +++ 37 files changed, 12141 insertions(+) create mode 100644 bsp/stm32/stm32l010-st-nucleo/.config create mode 100644 bsp/stm32/stm32l010-st-nucleo/.gitignore create mode 100644 bsp/stm32/stm32l010-st-nucleo/Kconfig create mode 100644 bsp/stm32/stm32l010-st-nucleo/README.md create mode 100644 bsp/stm32/stm32l010-st-nucleo/SConscript create mode 100644 bsp/stm32/stm32l010-st-nucleo/SConstruct create mode 100644 bsp/stm32/stm32l010-st-nucleo/applications/SConscript create mode 100644 bsp/stm32/stm32l010-st-nucleo/applications/main.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/.mxproject create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/main.h create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_hal_conf.h create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_it.h create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/main.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_hal_msp.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_it.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/system_stm32l0xx.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/Kconfig create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/SConscript create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/board.c create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/board.h create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.lds create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.sct create mode 100644 bsp/stm32/stm32l010-st-nucleo/figures/board.jpg create mode 100644 bsp/stm32/stm32l010-st-nucleo/project.ewd create mode 100644 bsp/stm32/stm32l010-st-nucleo/project.ewp create mode 100644 bsp/stm32/stm32l010-st-nucleo/project.eww create mode 100644 bsp/stm32/stm32l010-st-nucleo/project.uvoptx create mode 100644 bsp/stm32/stm32l010-st-nucleo/project.uvprojx create mode 100644 bsp/stm32/stm32l010-st-nucleo/rtconfig.h create mode 100644 bsp/stm32/stm32l010-st-nucleo/rtconfig.py create mode 100644 bsp/stm32/stm32l010-st-nucleo/template.ewp create mode 100644 bsp/stm32/stm32l010-st-nucleo/template.eww create mode 100644 bsp/stm32/stm32l010-st-nucleo/template.uvoptx create mode 100644 bsp/stm32/stm32l010-st-nucleo/template.uvprojx diff --git a/bsp/stm32/README.md b/bsp/stm32/README.md index a414e4a4c0..942e040b18 100644 --- a/bsp/stm32/README.md +++ b/bsp/stm32/README.md @@ -1,3 +1,4 @@ + # STM32 BSP 说明 STM32 系列 BSP 目前支持情况如下表所示: @@ -43,6 +44,7 @@ STM32 系列 BSP 目前支持情况如下表所示: | [stm32h743-st-nucleo](stm32h743-st-nucleo) | ST 官方 STM32H743-nucleo 开发板 | | [stm32h747-st-discovery](stm32h747-st-discovery) | ST 官方 STM32H747I-discovery 开发板 | | **L0 系列** | | +| [stm32l010-st-nucleo](stm32l010-st-nucleo) | ST 官方 STM32L010-nucleo 开发板 | | [stm32l053-st-nucleo](stm32l053-st-nucleo) | ST 官方 STM32L053-nucleo 开发板 | | **L4 系列** | | | [stm32l4r9-st-eval](stm32l4r9-st-eval) | ST 官方 STM32L4R9I-EVAL 开发板 | diff --git a/bsp/stm32/stm32l010-st-nucleo/.config b/bsp/stm32/stm32l010-st-nucleo/.config new file mode 100644 index 0000000000..1b8152d27b --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/.config @@ -0,0 +1,364 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=256 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" +CONFIG_RT_VER_NUM=0x40003 +CONFIG_ARCH_ARM=y +# CONFIG_RT_USING_CPU_FFS is not set +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M0=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=1024 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set +CONFIG_RT_LIBC_USING_TIME=y + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_QSDK is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AT24CXX is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_NNOM is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L0=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32L010RB=y + +# +# Onboard Peripheral Drivers +# +# CONFIG_BSP_USING_USB_TO_USART is not set + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART2=y +# CONFIG_BSP_UART2_RX_USING_DMA is not set +# CONFIG_BSP_USING_UDID is not set + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32l010-st-nucleo/.gitignore b/bsp/stm32/stm32l010-st-nucleo/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32l010-st-nucleo/Kconfig b/bsp/stm32/stm32l010-st-nucleo/Kconfig new file mode 100644 index 0000000000..79b160b856 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32l010-st-nucleo/README.md b/bsp/stm32/stm32l010-st-nucleo/README.md new file mode 100644 index 0000000000..6b8613bb36 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/README.md @@ -0,0 +1,120 @@ + +# NUCLEO-L010RB 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO-L010RB 开发板的 BSP (板级支持包) 说明。 + +主要内容如下: + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。在进阶使用指南章节,将会介绍更多高级功能,帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-L010RB 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核的开发板,绿色的 Nucleo 标志显示了这款芯片是低功耗系列,板载 ST-LINK/V2-1 调试器/编程器,该开发板具有丰富的扩展接口,且与Arduino™ nano 接口兼容,可以方便验证 STM32L010RB 芯片的性能。 + +开发板外观如下图所示: + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下: + +- MCU:STM32L010RB + - 主频 32MHz + - 128KB FLASH + - 20KB RAM + - 512 byte EEPROM +- 常用外设 + - LED:3个,USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄色) + - 按键:1个,B1(兼具唤醒功能,PC13),B2(RESET) +- 常用接口:USB 支持 3 种不同接口:虚拟 COM 端口、大容量存储和调试端口;arduino 接口等 +- 调试接口:标准 SWD + +开发板更多详细信息请参考[STMicroelectronics NUCLEO-L010RB](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l010rb.html#overview)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下: + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART2 | +| SPI | 暂不支持 | | +| I2C | 暂不支持 | | +| RTC | 暂不支持 | | +| PWM | 暂不支持 | | +| USB Device | 暂不支持 | | +| IWG | 暂不支持 | | +| **扩展模块** | **支持情况** | **备注** | + +## 使用说明 + +使用说明分为如下两个章节: + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程,并且支持 GCC 开发环境。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC,打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序,在通过 microUSB 连接开发板的基础上,点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后,系统会自动运行,观察开发板上 LED 的运行效果,红色 LED1 和 LED3 常亮、黄色 LED2 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2,在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Apr 9 2020 + 2006 - 2020 Copyright by rt-thread team +msh > + +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口 2 的功能,如果需使用更多高级功能,需要利用 ENV 工具对BSP 进行配置,步骤如下: + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程,配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息,请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息,请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +- 维护人: [xph](https://github.com/xupenghu) +- 邮箱: diff --git a/bsp/stm32/stm32l010-st-nucleo/SConscript b/bsp/stm32/stm32l010-st-nucleo/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32l010-st-nucleo/SConstruct b/bsp/stm32/stm32l010-st-nucleo/SConstruct new file mode 100644 index 0000000000..5fcb889bc2 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32L0xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32l010-st-nucleo/applications/SConscript b/bsp/stm32/stm32l010-st-nucleo/applications/SConscript new file mode 100644 index 0000000000..01eb940dfb --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = os.path.join(str(Dir('#')), 'applications') +src = Glob('*.c') +CPPPATH = [cwd, str(Dir('#'))] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32l010-st-nucleo/applications/main.c b/bsp/stm32/stm32l010-st-nucleo/applications/main.c new file mode 100644 index 0000000000..8541bd3b9f --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/applications/main.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift change to new framework + */ + +#include +#include +#include + +/* defined the LED pin: PA5 */ +#define LED0_PIN GET_PIN(A, 5) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..8450d50e58 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/.mxproject @@ -0,0 +1,14 @@ +[PreviousGenFiles] +HeaderPath=D:/GitHub/rt-thread/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc +HeaderFiles=stm32l0xx_it.h;stm32l0xx_hal_conf.h;main.h; +SourcePath=D:/GitHub/rt-thread/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src +SourceFiles=stm32l0xx_it.c;stm32l0xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h;Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h;Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32l0xx_it.c;..\Src\stm32l0xx_hal_msp.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;../\Src/system_stm32l0xx.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;../\Src/system_stm32l0xx.c;../Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;null; +HeaderPath=..\Drivers\STM32L0xx_HAL_Driver\Inc;..\Drivers\STM32L0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L0xx\Include;..\Drivers\CMSIS\Include;..\Inc; +CDefines=USE_HAL_DRIVER;STM32L010xB;USE_HAL_DRIVER;STM32L010xB; + diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..fd1de238ea --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,114 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +KeepUserPlacement=false +Mcu.Family=STM32L0 +Mcu.IP0=NVIC +Mcu.IP1=RCC +Mcu.IP2=SYS +Mcu.IP3=USART2 +Mcu.IPNb=4 +Mcu.Name=STM32L010RBTx +Mcu.Package=LQFP64 +Mcu.Pin0=PC14-OSC32_IN +Mcu.Pin1=PC15-OSC32_OUT +Mcu.Pin2=PH0-OSC_IN +Mcu.Pin3=PH1-OSC_OUT +Mcu.Pin4=PA2 +Mcu.Pin5=PA3 +Mcu.Pin6=VP_SYS_VS_Systick +Mcu.PinsNb=7 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32L010RBTx +MxCube.Version=5.3.0 +MxDb.Version=DB.5.0.30 +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PCC.Checker=true +PCC.Line=STM32L0x0 Value Line +PCC.MCU=STM32L010RBTx +PCC.PartNumber=STM32L010RBTx +PCC.Seq0=0 +PCC.Series=STM32L0 +PCC.Temperature=25 +PCC.Vdd=3.0 +PH0-OSC_IN.Mode=HSE-External-Oscillator +PH0-OSC_IN.Signal=RCC_OSC_IN +PH1-OSC_OUT.Mode=HSE-External-Oscillator +PH1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32L010RBTx +ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.11.2 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=STM32L010RB_Test.ioc +ProjectManager.ProjectName=STM32L010RB_Test +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_Init-USART2-false-HAL-true +RCC.AHBFreq_Value=32000000 +RCC.APB1Freq_Value=32000000 +RCC.APB1TimFreq_Value=32000000 +RCC.APB2Freq_Value=32000000 +RCC.APB2TimFreq_Value=32000000 +RCC.FCLKCortexFreq_Value=32000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=32000000 +RCC.HSE_VALUE=8000000 +RCC.HSI16_VALUE=16000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=32000000 +RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI16_VALUE,HSI_VALUE,I2C1Freq_Value,LPTIMFreq_Value,LPUARTFreq_Value,LSI_VALUE,MCOPinFreq_Value,MSI_VALUE,PLLCLKFreq_Value,PLLMUL,PLLSourceVirtual,PWRFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIMFreq_Value,TimerFreq_Value,USART2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,WatchDogFreq_Value +RCC.LPTIMFreq_Value=32000000 +RCC.LPUARTFreq_Value=32000000 +RCC.LSI_VALUE=37000 +RCC.MCOPinFreq_Value=32000000 +RCC.MSI_VALUE=2097000 +RCC.PLLCLKFreq_Value=32000000 +RCC.PLLMUL=RCC_PLLMUL_8 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.PWRFreq_Value=32000000 +RCC.RTCFreq_Value=37000 +RCC.RTCHSEDivFreq_Value=4000000 +RCC.SYSCLKFreq_VALUE=32000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.TIMFreq_Value=32000000 +RCC.TimerFreq_Value=32000000 +RCC.USART2Freq_Value=32000000 +RCC.VCOInputFreq_Value=8000000 +RCC.VCOOutputFreq_Value=64000000 +RCC.WatchDogFreq_Value=37000 +USART2.IPParameters=VirtualMode-Asynchronous +USART2.VirtualMode-Asynchronous=VM_ASYNC +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=custom diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..dd129ce7c3 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,71 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l0xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_hal_conf.h b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_hal_conf.h new file mode 100644 index 0000000000..224365aeb3 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_hal_conf.h @@ -0,0 +1,302 @@ +/** + ****************************************************************************** + * @file stm32l0xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32l0xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L0xx_HAL_CONF_H +#define __STM32L0xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED + /*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)2097000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator for USB (HSI48) value. + */ +#if !defined (HSI48_VALUE) +#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz. + The real value may vary depending on the variations + in voltage and temperature. */ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define PREREAD_ENABLE 1U +#define BUFFER_CACHE_DISABLE 0U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l0xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l0xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l0xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l0xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l0xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l0xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l0xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l0xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l0xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l0xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l0xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l0xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l0xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32l0xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l0xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l0xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32l0xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l0xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l0xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l0xx_hal_rtc.h" + +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l0xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l0xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l0xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l0xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l0xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l0xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l0xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l0xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l0xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l0xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L0xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_it.h b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_it.h new file mode 100644 index 0000000000..e75e56bd0b --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Inc/stm32l0xx_it.h @@ -0,0 +1,65 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l0xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L0xx_IT_H +#define __STM32L0xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void SVC_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L0xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..0cb4860658 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/main.c @@ -0,0 +1,238 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +UART_HandleTypeDef huart2; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART2_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART2_UART_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_8; + RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART2_Init 2 */ + + /* USER CODE END USART2_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_hal_msp.c b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_hal_msp.c new file mode 100644 index 0000000000..3570c90a39 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_hal_msp.c @@ -0,0 +1,149 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32l0xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF4_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_it.c b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_it.c new file mode 100644 index 0000000000..52e4aa9e44 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/stm32l0xx_it.c @@ -0,0 +1,145 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l0xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l0xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M0+ Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable Interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVC_IRQn 0 */ + + /* USER CODE END SVC_IRQn 0 */ + /* USER CODE BEGIN SVC_IRQn 1 */ + + /* USER CODE END SVC_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L0xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l0xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/system_stm32l0xx.c b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/system_stm32l0xx.c new file mode 100644 index 0000000000..814b0c752e --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/CubeMX_Config/Src/system_stm32l0xx.c @@ -0,0 +1,279 @@ +/** + ****************************************************************************** + * @file system_stm32l0xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l0xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + *

© Copyright(c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l0xx_system + * @{ + */ + +/** @addtogroup STM32L0xx_System_Private_Includes + * @{ + */ + +#include "stm32l0xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Defines + * @{ + */ +/************************* Miscellaneous Configuration ************************/ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field. + This value must be a multiple of 0x100. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */ + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L0xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ +void SystemInit (void) +{ +/*!< Set MSION bit */ + RCC->CR |= (uint32_t)0x00000100U; + + /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ + RCC->CFGR &= (uint32_t) 0x88FF400CU; + + /*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFF6U; + + /*!< Reset HSI48ON bit */ + RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; + + /*!< Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFFU; + + /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ + RCC->CFGR &= (uint32_t)0xFF02FFFFU; + + /*!< Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI + * value as defined by the MSI range. + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00U: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos; + SystemCoreClock = (32768U * (1U << (msirange + 1U))); + break; + case 0x04U: /* HSI used as system clock */ + if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) + { + SystemCoreClock = HSI_VALUE / 4U; + } + else + { + SystemCoreClock = HSI_VALUE; + } + break; + case 0x08U: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + default: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; + pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; + plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U; + + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + if (pllsource == 0x00U) + { + /* HSI oscillator clock selected as PLL clock entry */ + if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) + { + SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv); + } + else + { + SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); + } + } + else + { + /* HSE selected as PLL clock entry */ + SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); + } + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/Kconfig b/bsp/stm32/stm32l010-st-nucleo/board/Kconfig new file mode 100644 index 0000000000..13ef4ec408 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/Kconfig @@ -0,0 +1,48 @@ +menu "Hardware Drivers Config" + +config SOC_STM32L010RB + bool + select SOC_SERIES_STM32L0 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_USB_TO_USART + bool "Enable USB TO USART (uart2)" + select BSP_USING_UART2 + default y + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART2 + bool "Enable UART2" + default y + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + endif + source "../libraries/HAL_Drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32l010-st-nucleo/board/SConscript b/bsp/stm32/stm32l010-st-nucleo/board/SConscript new file mode 100644 index 0000000000..74f501ff9b --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/SConscript @@ -0,0 +1,34 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32l0xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32L0xx_HAL/CMSIS/Device/ST/STM32L0xx/Source/Templates/gcc/startup_stm32l053xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32L0xx_HAL/CMSIS/Device/ST/STM32L0xx/Source/Templates/arm/startup_stm32l053xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32L0xx_HAL/CMSIS/Device/ST/STM32L0xx/Source/Templates/iar/startup_stm32l053xx.s'] + +# STM32L052xx || STM32L053xx || STM32L062xx +# STM32L063xx || STM32L072xx || STM32L073xx +# STM32L082xx || STM32L083xx +# You can select chips from the list above +CPPDEFINES = ['STM32L053xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/stm32/stm32l010-st-nucleo/board/board.c b/bsp/stm32/stm32l010-st-nucleo/board/board.c new file mode 100644 index 0000000000..858d59660f --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/board.c @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit; + + /**Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = 16; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_4; + RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the Systick interrupt time + */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); + + /**Configure the Systick + */ + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); +} diff --git a/bsp/stm32/stm32l010-st-nucleo/board/board.h b/bsp/stm32/stm32l010-st-nucleo/board/board.h new file mode 100644 index 0000000000..9ca68af470 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (128 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +/* Internal SRAM memory size[Kbytes] <8-64>, Default: 36 */ +#define STM32_SRAM_SIZE 20 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#if defined(__CC_ARM) || defined(__CLANG_ARM) +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOARD_H__ */ diff --git a/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf new file mode 100644 index 0000000000..24d6f5275c --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf @@ -0,0 +1,29 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; + +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x0400; +define symbol __ICFEDIT_size_heap__ = 0x0000; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, last block CSTACK}; \ No newline at end of file diff --git a/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.lds b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.lds new file mode 100644 index 0000000000..2280d5e461 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.lds @@ -0,0 +1,157 @@ +/* + * linker script for STM32L4XX with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128k /* 128KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 20k /* 20KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + + . = ALIGN(4); + + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } > RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } > RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.sct b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.sct new file mode 100644 index 0000000000..418dc4b9fe --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.sct @@ -0,0 +1,16 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00020000 { ; load region size_region + ER_IROM1 0x08000000 0x00020000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + RW_IRAM1 0x20000000 0x00005000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/stm32/stm32l010-st-nucleo/figures/board.jpg b/bsp/stm32/stm32l010-st-nucleo/figures/board.jpg new file mode 100644 index 0000000000000000000000000000000000000000..f5322e602d4a8945c4856c2077570de872ed59ac GIT binary patch literal 161179 zcmeFa2UJu`(G| zd*2G-jBv6-*wac$(Q7S87R+$+32|_P98UqjD+25l z;Naro#CiLpzZeYI$G1P)#r7TVXCB-49|t~w_fvL!5b&#ijv)S5|2)C`-}{Gy`-9&T z5RUsZzfbXln>?6cS^r8g!W*s0oDFNn>u%wtV;2A(fNJw~wkm$@A zq6_EFp1VLsN<>6TcJ0z7vP+k)T_8F+ekMN(|9ZtCK6j3og!nuO$@$A9BqW!y7m~|A zs$BT5Fu=SAE)W7PKoTAf9e{fQ2k!z7W&+gZSxh62I4I?5oRb3-7<+)4#XWTzpMdbp z*>gDmio^kM@qQuC130H}@NiGzo+iL2JdH=h4I(e#ow{+6^R$GT=_NXc$6WZA!;*_6 z=^4n>KbUdzI6mo-B47;H*qqveIPqRdDSmoWIzrQ2=3}Ze-_>5NY3O#zvrm04Gdr@k zUZ*`Tjcn|n-AylR8kpPDws7@}$|!FhoZsh{)3J1W5uI7lGPH1T0URMv+EXVo5#XQZ zJrUss=fzW?1P*kUPIEmDyNs3KgL=;@IRK|)?XrEMgbzclQu5^;=rC}xB?>+L%6~{1%`0-a0Q0fX@3X2a&#=( zV&*s3y_08ss|r0BnzrDprLvNn5|VWG=ZZUR+7FLAiL0dWERL;ZWhz^1kuKOc2 zmjy=pO(z14UNAIi>zLxHF7WfNVgUR}&$f@v9ZP!o`H{uP$*(?=-*+GzGJGMnk~enP zX;~D60a`g}1SiykR_$ubhu})pwUqZ1%h&A#Vdd?3K7qc2`BBVUUGZa8ZDwYWKtIlJ z&)E2Bq8Fwx0I}tTeE3F5PwRP7pGyU{S(5{+JZ1}nUn~tEDr{P(UbXuL+3vaZPA*}9 zC9NuxHM}P>iSbV50=Q>*H=Y(@0GYz!jr3iuTD@k4dvsis;(%ZOvT|EbuB zivU9mp87qPb~FUp=O1VgH^kYGS3V?oq%T$1pty4!U9p>#h5-n}-=G@uMK!&Ba&cbs zg+zw*$Q+WN;t&}h95Kjp+7~SJK8`ew5Jk+RRhM19EMIG(Uo98zZS^M;WAGp4t4jZJ z;4{CW=Kd9*%2&5IZZ+5NYrMRxqNlAL?)YO?7|FuOviLwDJL4C$Dl{n*EvlH=_IcTv zpPs*f;CzeNl)?kz{6|N&1)|5nCJk=rQx9;e@%{S_UVDmKSPpi^2JeNEE{`eHh_gF* z>77y^EE?h-IyUOCEN&P_-@yPMJZo$}H8icWYc{OliIvQXuMtpnvh(Yo4&Bp7*%q5D zUo~31KgNfwPe?4#N%lXE8%M|>+mAUsO(fyuWzi84R^#2RZYe$0?Xk-~A%k$IJLv1Z zoV2*I&+i5&7BL!RLQ8}*r{@QyVk4B@c;8=n!eVPjLgb58U*zk{Gid9wFH28~ng+{4 zz7r2(fW`F3y`Jd_d<(VQ0|ni9BOKl(MIEjUwQ~)78JXf4=Lo)E*FShjvfQw1Gq3j| ze4lsC*0rv{OEIyz-Jr&4e|WzJQQUO|gY5Kvrnb6wwdvYZ3QB#uPvPHJU0qt#TRWC{ z_ehcyTy_VROkQr|xIo7$1}qo6j*}LKkm5brvkMkMC_B`uC1gl;-fX(`#TYD#zmKzA zG#`N+S!OoknA@%0FkW@k!;gM6505^(fu?Erims2YzyPxJdtzk`S<~iP3M2ki??wE5 zFhGyq^>d>W@syL_`(-uO$j#p*i#y)b{o*YmsfM;BC0#_JC{2V46&ap--CFk08$>73 zb6=jCnjRf{=@fUwQq<6)WpK^A_SpA0P__yAWi{RoF;dQ#V^_2EnK51-(E}ey7(`AO z$>uC(R1^idWi99dtt7VkgGF8FU6N3ZL?;-HY@VWo7=ro(26$X2B+^*Fcg-yJjRmBI zj-a67!=YILeaqd6229V7X)ieztKlYGW!aCtntx;fp`=>YY)M)mccHG+#sJ)5FA@U56)W&8T>*Cl zZ4GkTXl}#Hc!hfS055TgI@xuqyrKd=F)$QqlvpSJwxg*Kb#@rNC`T{7r=mKer`HG$3i9c3iAzutSb@Bk#$IYzzMy&4D53SRExnQB7it zuV~5ca+JyU#u~m{M?lp~!2) zeBwOF>Gq_>r-}}G1}okp!WDB`Zu!2cLCr!Lo=JHo`vKl$mNaFnbJI5k>1geT+Uc2& z%V&-|tm|(Kqb7@1>&wwri&S^;SA%LVgh8KI4wnk1l-L*8?U6&`mrJf+A4Fe~BHvv_ z6YK=MkYBF5w9Zs#jSy{NOi(erB zW10LX6!Uz`jhmv~BHd5l( zVDLR(8J%n-`(|(gLbcfgF6+Y^<67PA>7!@0XN$WdkoG~o}ckTCK=@sxjwj*JyJ(FcmlSK^hsg7ehtnF4)Z>3y2s$rp! z9C#c``d!rsrZu6sR0=O>juN5%_VP~1GTFTI^!PdbJ`I^C@o$gA%6WI|CKVwtTQ>B~ zX70(Q5zAa8Z$VdHX>ok9)18XTX6@|FUN^q^yCPw1yCrwVN|2&STZwU*d$ubi;zL(m z2+)x&>FTxxFGkWDc0)?WD#pBQUHC*-D|UU#crn07Jp%rAuebJzLi63=qG`3y6KgqM@#R%Zx)UXv9^$w)^W4{~zxja|P1%B7b6s>0tUkRkI5=;eWSpPB&vE%( zwbYi7%=eDb)jU6OugdG=6G0XmyDn%Nq|Mh`%FT^l`S2AkYPv6hDo2ze{7EU3v)se^ zxgwbi9Ic)Dt*D0nQ1te9$ueI|?}_cAt=Wy%QDvn`EBV%kyomv9x_r^rWE-{=#@iHw zPYh??0*(q&DU?SreCQa?wq@x-1E>E6mp*YN0iQtuk^XBJX&BHE~nX3tLq<%a`Izu!JYQNlt=ft&wM` zyN!|tXmX-B2lm904I|b+=6}3P6YG+18w>MLwVrrUau~Y6qDXm$&kglj)dIA-UAb4j zRTrd&_j0q__3nouYvhIF#NQOOuOcd#qPTZyI@l_5&4>b+gx9lohiQyn`vYN1$59P$ z*N)1y8c?^;4yqIpnpGR@Wk|)K#mNrDh7Y>j_gN7HZCaAbEtFHROtds%Kv(x#tetYu zZs>608DC*4lHCOAley!YrYX*38Q^5v-K>ARXKTH5m>`}$1SzqzYGB@CB7vh_1i)9q&wo+5;cuDP1r&u_ri}>CxbI|u?0mF$zLTj)`5n0wWen3 z^}(y#inwk&O=x-X#g91A7>lP`wBN~y79QC5H0jhkiode)y{OA7W1P~mp}V=+a+G3w z50w+-Hj{>2p*u))pR#_A&`|t4q0q-_VD6;6kH3*{X8krb$ULyPR9j z?pBn{msC;~VcYD?8&BFkt@vR8Q3KZEu1POZagDx=T2E#)n@nKXvbeqwfz+~|=pFWR z^mMf=BqsOUsyfO)*nW!p;@Uqyq_qoC-;fz&KXw{~8lc(LKcV5siHP_l|L*z%<7MNc z6>@Sd#}(r#qid^9j8Ox|8#?T0_8pUNc}5Zy$u1=C94MIDzARO6LtudfIpomw;>t-l zfBIs>ZbMq(8coXZvkaV7SM(h4f#aF&L3b>b1q1sXekZ@0nOJ7PoPv zwTw&xM;=FViPHgzxR+e%u37A-_~wfZ1%3h7!r2j2;bsV$!Y4`DWzfJ#B|W(@N?<*j zCT)MDx?@e-HYevXSt*xN%!OM`pGUYH2m|n5RDj$*9I9O#Say*!auuCk*>yjLzcc5c zLFO7AVSqhwL4NeiRA8i-1K*68FnxQPjgJ^MFC{}&NAjQOy9yD`Uh82L*%)FgjPE_p zzdAJ_=t1mfaH_Z>ro_XZbqv0-IEGHF*a2@bTS`HJj)leTPsbo{7DmU;1vW*&TosL$ zuL^!CpIY%6>RB(S(6;fC%B8oBnW8OyIr`O~{HMR;q5O zx@ysRvL8;;TK4vhlGUTN8qvu&gKELcTtii%dtBc8dM25YTLsBUk^N5a&UTODqjAFn z8X8oSm)yu2$*!aA)pN=DPHFv9hc!=Cmj{>DKU?mj$=dhCvyATK7_WF5D>_Wp77bKA z^J-y**>_-o+7_P|$Fo9<2{$vNY7g~H%ETvC?;pM+{Dfe!4rOnW=XibvD*ao`Y>Y(5jRg}xa0~2Q?%f-zz4zRmN zOtxiSXw|M`xqKV$SNX>SKy>Egz9ORmmT02~EY0xb&OOnP5~mv-J{oRAG7XDplighK zUVe3g6nxPOs))_ZXy|XR#@Qql#haw-ghcs|A9IeGE=PuPDB)x z-@p5Q($>~W*by0FJSnr9N?l!;69BVBnd~TziWTnK8TRk79UvMl2q;W4#fb^ zsxUx$399LoxB9d&F+Hjw8r8HQp%SQ1(cSZ2C0tf>_zeBPPtC1vWo8ui8>T^L-|uB@i~sJk&J#W}fd zigfYxy1*Ho7En+gII-xds#%ybUBecamyry6{myVAR4i~J)HXqNC(k&)Ye)z^i&~$L4ZXtE@tL^yu z$Iely*+&?B6KweG+PjYddgVh>p$5?j-5>00h*pcL%ieyV*@AL7CrM#CxeeBQ_)m`6?fY{wzR{?4D#-}Bc(6^=dohg#r!>Gk#vGhBYEI&D->5NTaABEe2rMSz#ci9a z2VTyeZy08 zyTV&n)i%M_M3!V_%ne120d`+A_uZ6x=B*RV3oh<0*q+1gOk!Dr@t3@E-ZD++-J*B` z8XD#N3Ha!CAqL3z@y)AgI-3L23K)C8G3`~QEDj@(W^xoa5%P1T-;50mvk*3Bbwb~| z5^k{M*B-l$I$*1E5TCgsYImmFu4cP8a}E$pAp~vGVwo7N{9J|vEz6ELBg_d zA5sN6Ru`;QBIKtLpJX)5s}lff1M99l-C_V30b5epX(CAr7F%j8!E zLbYNm_cdNAf4N-rY~Z=GF>H6t+pWBMLSqs&1HKmMSnYkI@YV2DJ$^QiWLI_64?K42 z74_YzZ!@siY8-GGgp=SxVhGmQK($FS24br zw2|1MX;oy6J8Hiy_@F?J?l^h>x*;-W7t!3DJ{L;jWt0AC^`JVVZjiI0s-aV?LBWNJ z1_PXT^__ayfXwX|=|h`BH!Cv0N*tc_Qd6mNl|ojNIByUWa{(K=YvQe71lhy8sb&5 zh5=KbqgaTj#j1;|(Qd_YSYq5BuT<_Xb=Y7IR8)g3Rw;WdcY?MwDZRL@odv$pb#Uv9 zwcPzDln?Em4&5%yf`|_^w!UirR`!U1B5Ab*7QDM^8?)EPgI~&Hf9i&s3Y#c#V+({_ znS}^O1mKt72pT!eA1z84%Fm^p(R{!8(bm+d${7j6$D3Tzv0PlOIqcd@4ED!iTEb~E z3S*L`;mmdGmH6}-ZpRg0$g-5W#KSBA7wp%urh zC1p9&3QXUQE1bpN4WZLB*L0QeU7t+%P@prC(&l|XX`rizYwI&AxY=*fGj<-ak~kGU zj6m`wM5=!}>O#_N*)BGBuG+>OioeYY3@2xffO+ z@Gyv|_6xGUt-0pr5moTxcRc;yPFD`i)i?B3N6qvtiY8T+3>f$9$-RZ_szj*p>c1Lc z7pd!fVc?ayQ%uc|0q6>43pZ`wAR~|2Rb@IV=sDu;9u0S3l`I25?eE(I6chN{|H-J~D#W3R-;bR+X1+55-L``*an&->(>Zw31YU zW^429)(o{Ybg5#iDxK9v6fE!!3O>Pp8)aQf?#RwN;u9`nM=XgdiYta8Wz^6*#6!9V zW@T&TEhAN5vP9FH8&vqTmKwUp+=?bsK6^LhWeev`MU@gM5ZUJ1sx%W9?uqIkQgT); z^H)Tp?spB;Z4?*w=8jX44y;Yjd5yO3ee_39qEDYI(M3`%_E{Ei`iYib#cl4VoY?0p zFL6EcmF?=)D{eSK^sQ8jAJc;0(?1^i?&%b0+{!T>(U!X1bh&z}!b$%Fy$ky|I&adr zOUg1+3Vlb^M7^umS8!nWk-;8G$NSKM;*e@9IR!*WOoiO9vT+7jf<1_om zSznSCV$BYh7;n<_9+qQ(TNuE(C3@G#2>dvNj35Q&G*4Y^=t1*&ilB*8`;g#A(Bz}V z_BqYhcA*0b?2+mUs{i!_GlE%T)ck7)kDHAH5Rg<*K84+!0{{X_aDx%M$9Mu`Jb|5G z+%nu@|8Oli#mh3k$$X&t1SfQY+W@cU!4tc!1_0;m9j)QcsxHp$yvh; zfv`KFP=Gr_p>P)%7J+E9JmE60rnsS3T~pgf>-Qu*8X=r zuyn#u(#{$FQ#K+q7i&9bYxoIs5P#-`T1r_@@rPc7u`F;|!OLHLzxcPltJ*tTBj8RT z{wkJI%HA3Nt2@b+SJ(;+k+D!?_1t?`ZYhW zc`PxQV#NlOpcX&a{7bW%;6C(!YE}bc_XB?45pq`#%i-iW4{=1;>sUd-!3F24HQe%- z`be+{bxJ-U(D5V7IUUF?Qe;yS0w3^aGL{8}}Q+bpqE1ufJ$`PaxQt{}Xb;^E+4uz%>S7 z{^NnSh(-TL6z2a6?nD<@)>xB;cT&QdF0Avy&*KEfaZ)&i-6cOMW2FZGl9PpirN=Ia zQzw`o^?t5t+`AxK@ccOj)Y#mK3&Rf^aN<*dCkMiQXyOEog8&t|3uey%aM0R706Wm$ zAOKb{bqAq87vc%&ugl+H*qT@l|2+Oi@Eh?{L~I%EVu!Vp*pA?vAza|*PXDs%A%fm&)(?2m=3QJ_C}!=lu^c)PGOwlTP6~*;zxNPTF=#*oBGnk9JO<;6U(2@FX}X zC`kXUEdonNgp2(@K==qpYfJ0jHdjUi%U$&Z2J#>_b#X?>LE%tGQ)j3-2mmxa?0?-n z&i)|ALa-PGm?bTk{O|5Ro{OX1KW;%M%Ks-s*~#*sw<&y6J7-N(%YRUjK%jPZnoxIV z1t)n;Wu;%{kMI}xAH-*@5RRS_cGi}^G)4NO^YXvIV9yE6p%$htC+7H!E7Z~XKagwx z0{@fzoSCH*!Vcm1H|1XV!CzADHv+5zs3722U7vAA*n>BCC+Oep-B~-(F#a2q$n3GpFf^He>{Euc>4VD^!elI^T*TYkEhQcPoF=YK7TxY z{&@QQ@$~uQ>GQ|a=Z~k)A5Wh@o<4s(eg1g*{PFbpAOJIPW11GY4_JYDXYh17$=QPxSN|6jw15=&M+)Vv>*sq1`cxs(-S=C>tX6_1(trL zKV3wWO`UAvp!?5XbV?qMv|xz{PzSpK0Xtv{?zdZ>?6zYC1O7L12RGAC^!j7hpWwvT z0MsmIig?7z+1Xx*ogMDPW{QoIzy?9U*xgO-**V!b*Z~o7cY9NaE!3IT3<~agi_&e> zG|}J5 zY6}L#_UnY&$ypuxml*$%+6lXP&8`l0Lby0WpddN@UzKHC!IuAL1M|i_4Jf3;%{`AugJItiSp$sEECwS&Syeoo*F;QZYo`(M#BepmTNr+%YPrVX|MP+LMj z+#*cvq!ADoEK3DxQ92oE4naX~ZVny^P98o1K|x7rK4~5vE&&NaUVaHl0iIuV|6T{= z#%6A9F2v6v#myxkC@H|n&&SCr!wY64rMbEJr37Rp`FUgne$`cgJ2{)eAy904*t*tW zT_`7?AU_`;l+~OM!p{of<>6x$;N#+Dg_xOhahY**@<2E^PwERvIYLcA7cWiFz3bQP z{LAxDN`sg7XV{RxQA0t0FsLXUHjD@>haf8_w2(J(~#~ltXAr6ioq{;|$YYUJ6 zNQ#X(@()sQk(h%%X8%iKbBK@y!VzW)&KGN#sU?)%#vW=3{s-`{;SxG=hX7j!#pC`v zTtP|-bQH9(wgVB^CGca!q@j-1u26GXM+A)aWDW~i{|8-i@Jb7Camw(^Nb?GUBi&g|nNfBUHi?oY?$Bz3GQ!Z=@&U@>#*71Mpo>XG5nMM z(ZC-K{L#Q44gAr-9}WCpq=CO))1Ywh(ZUUU3Hw`ExVzX_(37xmKZ36Pm#(;f9eBTw zztzMBLBsux_^)P8!ouMoaCY%+x)3>#4~7W$)~;_8~_m_Ce5J=yFE_n9Jw4?R+jn^&iv@PP5` zu0f=?Qi^Z#l56tGnBO|<^fW@&87r?A)J2>B+4B>DcbF(%rxSx%3SBmQRwlgu?*(AG|68h~-+Cc4%}+lrHYFqD34fHQ|E#>JpFndqW1QaE zG>4S&C{#ZN24-%3;-;5qqzH5sM8?~y+{uUgn}?Or0sznKl-%8^v5846LG0j2`-vmuZc=VTUJ9vCfjlVz(azU7N%~&-~6>8fkF1Pp7ndv z)`lX{7d1(qu0JCMu#33oR$%u<<`5skP+7+U6k8A z`NX>=zVPe9M5o61n9Twy+>RCTTC;g;;_j^P#ptNJZ4YB5G-g$0cAP>stl6J?Rmg^u z(ow1I+@cYCMwN;h-Y-*>Avs!BTEC%qIZ*F6`UhO4mjm;+<#9qms*chnSVb055V+Et!Og>TTot zRo4`7jZhqXdMO@sfA*b+p_U5ka^aL;icJn;D&otO>gByl_H6D&2d@*qdKG;(Uecd1 zbPPrnmr^{`3@4|z+OsFpd&s3MKwnYVm25mwGrXR)W_d%%`o89qJNp4XA3dq+J{ytm z{YTs4i|P4qx8$TXW*a)cmMmHpjDDA(dElyvGZg`!VeS>tp3J^2na~p>!Q7{K{gpE1 zIYu?4_%jY)_n~zR@YNs!UCb}cH;%v5v2y=G@S_0yOqBd<9R-?=G~!zk?hpJHxodYs z6NhrHWwS1#Xs3MpXts%veW99e;|;gHQtNUSU^_Lr_!rVxl}qjOZ_?YS738K6X$bI0D4H!*w8eA0 z0-V$2m0~pEM7L43$9)<*i@*Vyv+6(v24FFMG&Yuz>2Tn)+@dkpP<4 zT4$4ta(LUqD7lmzBU~)8I!;KI_GO|1B`IBVd%~oXukC*RGHh%dwmfhPdFL_0Dg;L> zhVC;&_dePrz87_Lmo72#RGdW?9IHpH&7E-myxmU#+`erk8a_WFgRJdJ%(gpDF6J}zuJ#EO(#Gst>RXRB8 z=0U_5Rptb>()fO0jX8SfvMS@7ev0V?%}AWe?~dm$YJF?7Rlb*Y8DXF)od5b=btomS zTJ0wfAGycWNgP50eZz2F^|Ok+rFm%jZVb*( z)!AbG*xF5G>FiS!d3%&o^p|-dQ7iIU}$Gk7UR46`=uSI2*xMpbVUI??D1-{?y zj4a(SX0AiNU=>CFS1woMZ@kVSW(ZQ~vkx@aQX5Z{o1I8{}8_VW$ig2U^0GFDczrOC0#}~CCt#+guPZKM8MyzRqW%+Vhspj70*G>a{QaZ+c zti&v37i827`?tKCBzr%u7i*TD$6Y_q_xdUybzj|=3yMS+l>$Z57S-=s_A-x3@WSYC zM!x;rqR;X+CkjZU5%P559}TJa$3ub%ruV>>zHUVKyKmlC_oIo4jp z+542iiOI@l(?BwV%UML4OVj-Rgf3YoZ76@eFM8T%r_Z3>yVYmZWXYM8Y64|R8^ptx zCvYK*VTN|Vj4tt(+5(r8!s&f z*1-_eSW;8O5Dssd6sP*C!zHiCeNo|NT0~>SylU*SkOhm4=iFLB?#UPw5p1_K_uofZ zgycZ)P+Pv^x48E@?7{Aq)XPS0CYr3Xd73F;aJdT`xsy)03b48ay|jCb%}Y*nsD45a z5i0v>d)aul@lLUy2!%HNA?fDRffrtF1U%ejSLHi7cd+8j5Q8u%Z69y z4$VHa5YfIFX@FWYRXMS5WPeCv9D@-Bt)mG0i`muyKt4A0(?un6)*AyhhJ* zd|Q*@vT)+H?$XlFR?C{?H_lo3iyn9!wHh2fdFS{-u!B-$F;_nQV~Z!yfltN;kXbcd zk(L>b-4KC{qn7;ou>rboU zi}+mHgl|B6n$X70-J?GHZkG5VZW+#d!9^9e(_)k|EIl0V+#X1`{#8Ox&znT`*)z@` zlj=ufOQc?K-NI^v`y|Z!_1r|#SiNd_w0F%I?FEq{u1|J- z&~(JL7i`AbZeo=1C#4rDTOn~S>_+Q7B|oBkYRSM%S3LEs zuLdRT2D05c@Y_XXFqL7H3<+0uN`PnT#Vgqt$MtbUnpW38m3#5rIEa{#hn9<7&lrHF zc^mZ?#2GtWBHNsnAI__A*;yW~0Xs({c>$gPT=Rq8!pbtaPnsbyU& z9yesIGoVs)sgO^5yv5d3#f_-SyCY%?_XD-U?G?Vgi}D{Ev!1_48lt^lf-!RHhlC6} z=(Z=B*9N1?gp}qD{F&y|3vuz5c_{3&XL{p9JnAe=Z7nHo?dG%`lF_uMY2Dh9J-mKu ziB*L@FE{y=ZAJua{;ixz>&3ox_c^I!e(@DA(hmon2WCuK^FaWwUn>cbZQd)=F{|49Ed%8`Hjt7nO)0%6pUrRN zg%J6XFpD(tsOEiE!=t^!5_W@yA<(xr`j%Hmdwgd3@!T53GQuJBQ^+>o7A*A*hn2bg zdyyMZEnZf-^Mr0P47*mf?T|VH<#PC|?>8mxejAW-P`8at&dl1Qbd(vGA!fIQ*_no&beC6d}GD zDnwm4Gey&;>my~y-vn2f3M}PQ7Uktzc;-HRya|cx?p_}ixOy*Vp!j?41^gJBDjfPa z#)E#+nxwi5N4f2+kecd3!L_zrdkzujZ_&3?zlYkrHD%}^GneSkZujb*$QKce@wR(_ zfBb6ObpH@Z6GlZ%<8i$^qR{KWcm>n{-@y=fOMUe&dbvcMH!%?wec=m-z``+EXt*kQ z`@+gKbyH4xxq^Y%Gxz1&&V-!buw~jmb#N;Yd`o~=vHQ%gAUVndce~@>flZI=95 zMPYVpJn1rPmv0*=Ipl{63~1fGPf*XWVK6xN#h`hv9&uHfZ^@0j{Z1mwx{c3!0p=j) zM=6g;-hN()TDDAtre?~|K0413{W*uH%h#%YVgIPS z$MTEVys@F=0U@>UZTaAyYg)>U&p3(RKQX(T7ejlK2*9-1BWD6Ews`#5nMcW6Cz zHMlhQj^mf!zRkLU&n9130!`k{%ymEakTa9*hv}jV`oUi&SiF5$_j=TXTug|sZ3$iR zd|0b4IYv33rv~mv>c42X@|1e71&aXiDn) zD%iHK^dZW|5&XEr@y-_-o}8~;?G&Dfb#BxPdiNa+t^p0*dvt@ z2{C5q4NRgRP(Yb~U#Rj?*at>q;==siPcNmmA&5H|1+xOr`CHd=rt=EA4;He9$6Q-V zW=RgHDLQjK>?w7pmvYTfO~;+0;f~!S^Ro=qmGt)mn7dEw2dlSwLG%N9ViImo0Io(U z-qWieu3P)d7}XIRDs0mv;S4OVu|E>O%2$7r(nZdgZ8=v)LL+X1Jg5mSTdZ|ALnkD> z{ONV20-0TjQwqn_NVOvL5ITA!4^kQ(=~HfxpABb>oON23td=d?l~&tcR(%@jDo;;1 z=tJ)j#Sn2sh_{WGTxj{wYjN$d2ANOSazg0S)<%gJw^S<@Z?%1VKh7g4)S6>E{Xq4! zIrXga)6oXFpfR*+*y9$gyhg+S$|)|=VmYFjZFo@renRm;nZa;l;Yym${+qo*_Kt#{ z*8S+#&i7e~#R{8aQtUcKt`i)tHa1G|k?go9Ir3NbX&Os7`vkh{ZI`3PqhtY7Y?u+!T^UgJurMI2AQR3&%6#QIkAuO`g_7sQzRbBOSLPfVp zT~$=C-j{Q$l5f9$HiwN^B=C~HPPb)$2o(kE2I`$Bsi0qClEvWqMCcn`gVk**wxfW@ zIk>Mf8H3vV;!>{o=t`(5O?DrPei?5%;M@P?FqRe=y-+{qMq3x|p5Z*8Y z<0UQhU1BAl!E6j5 zuC#uEh5sOouIGw2;CVKVbfmj%Ri;<0ZezmhM3ukZ(EeWna-@!Jyek-e=0`-?gLA-O zi|>1Uz1?`!YRIBFUtj9}#*}&g?nTI!g2;R7vqMZM(uea$D^8!r*T-wt_R=P&2Yb*) z?+Nhrm|xv_I1?m{j=-Dihjm?@%P1RDtI@PYlur3R0DA!&kUjc9lDh7f6ddzV)@znP zd1~kL<;u9@=FwM!65@veX@+$?VLe~2`vnx6>&B`QQBNj0ikG@xxt>`qHaQHp%4jwk z9TtESiD=zW{rvK*Tnx|RkVS}Kg;Bkr+)`{*gGi8%H!N_YQdFf5yQiethZ=*%xAeR| zK$No&Um~kW?M$_zD?5JPXugFO-8tImVu%y12pamBzjdgC()4|rwUeZ9t}K)tyzM0k z8Tm3TIw%f`rmLNQ@qN5zhlWHtSj>0o6%1+l>5z4K6Wza8&EA~viaNT8ZoSy#!Joho zRJd`e>TSgLT29=U-0gmg%r2dK9_QtDb<%xHw`6=e=#o0?^cQN!7hQ&=pP!C-u5~J0 z`4Qf-0umsoyLegi8%f<@){*wps|`NN4~q8kVkyPe*OAw3J{vg<&2S4(iOi^WryDU! z5TLG4UgR^d6|*=1f9j};&Ik-!9@EVq<33kQ(Qs2+ydsMWs4)0qH4>s2W)j1GtTs5< zmJ^VZL#BCJ>pq!e);le{M*xzvrG5;!d|FM0O2ymh0A4r1@5}c__J*~Pi3q(vcdsUb zQtIB>ya54s`VZPKXRi`%scCCoOnS~se4P6gKp)z%NK=1Z_tb<#*Ha4PrBAWp?A)M? z^SmlnC->%%($n>`HL}cMKco*8`rT98m#KK6;K)<~aqVl2_I*T}@PlDNnqV0%7vDV5 zMDLbdwB~}nZRWu3d!l0o{}0=ZL4T9Y z6q9)$&ysgF<*Cy&j%#n~HOQsS;jn{C6=6G&AFsr$g%<%caJ1<4?Vm?29 zhi;hNaZfuu$h`mBo94;J0@o)tI-lkAqWqN-ZICZ}5*VqaW)s%M3`)jmpG}PGF*peN zD=;P*2hgt5zsq-z>I-;Bb$)#;KdjCJ`bxTZ*)*$L&3Q2Yy+h%M$&JC~O79Q;oqcjT zK?P3=&M3VMm*C-+?UiA9rFv1BD7>$oRb;DLK4-OcS?dvPsLeVnoRvm;vp7uYyhLl( z2O!`HVOA^ewdH`e>74h4S-jUiv>xtafVISbe%RG*d})+Qk|Cq%8g$<1qU3T&yVrBq z;78(;nixO|Yvazt3Hik1^(T$t;`{`mUEsH zSnBY3+iht+yyK=Mxvu(+sTq>OM`@V!Q2HP+CMjODdm(tUJ%@?^j5;?4IQ#57r^Yd? zxlST}pxt=AVrL6ql3=(l^$@4~`a0KQYPN1|g3ndPkS}J->2E(z+h%jQFAr1n_3F$l z)90k-Jbxqv&CK#QQl0)fsQ1-y?I3DspPR?+m3*=6Oh7dU)O1H12#r}99!YTtqXW^Y~AV_xiLs3I;gF<{V)?APkd zkWgYc%5l8MRh-j`M(l@fT>mUK1-s&U)Vu;K-|?i?dmB5*5cWRV%gvFjr^`O1o=!7c z9dM1|^MMwPn+99Nn$_Y}>2_aQPW$$BsnM6qVex=u^0Pc$%YywtZ}??7nb#@VuPTrU z94f2Ip}k)h+P%kYY7it{junyUi_(xI98p4b-8Vf9>ORucxjKiLtIS{|*ZZpzJ5nlp zXWms9c0+?~eajl*)w)*7=4p;}O3h*+G~an$lOBzq?_AG6vDU<+tvCl%8h3;Gn+R= zPKy+^Xs9WwGKAlUIt1Tg!DD|Bl_GVqRa?+3N+jk$A^N_|1uRLC>`- z!j+dFeaTT!fE0-6`onHyk?VCw_LEBplWZRG_9>*5l>`W(YF{3Pvfr2A$!Z|Z-XWb) zS#OkyNnR(850HJP$S3X$wcf8cezkOZI;(ksA|N@D&N=F(0=am4jBeta)kO4>ME!6} zrNPepbJ!t;^F1F!48Rc_ zaizP{Wl|QJ9M#LVs>65c|swM`RK9mHfrf-U9c4OWuA&tl)dbY3oXb~do#)Kg%X zJ$EXrBkrDqZ?2N)bj3tT6kIU=E1Q~p>dnz+h{qidW`p2+sz~cv1{!{A<1r@n> zbH}dRiqlrnbUxi#v1n^srXXxA+k5?5?UE_0ku* z%;iu!QlL`$()J|pJ!z6e$o_^((n_uLNXOLhks_H45sa<{WfM?%Lt9H>3sR)XtvOq) zQI>b{T0-4ZkHGN)sX4_n{H#auEDy@H7)Z&fMibSVpQnY@%ct!IEI5y?(Oa{z(`z0{ z+*-v=JC@3K@i9h)C(TA%+;sH|&m=G2A7H6ejt@6ZpaxR?+mf%vcY|x_Hk@{?v0V>1<}*#`xn+ zx4=m<&HQ5G+oTj85j*0ofJp8D7|)$8_!-)EtC+RD5~UlrXP1mL_PNID);o+nYABDSq3_8kI3(`=K9csNrV3deWfiR%_PKt))fsOk zizuuJZ&|Ee za!-Q0`8=HaDmmBje*J267hUNVF6%VYrPfpfoaxf%xTHj66gkFq>9|fe$9U28ldxMa zw=eRNKD&RB%RS;Aghnicv}z&sxB)ZtfAIdV)v}X1>$5-Xe#VtR55jN3mdSaxrCJz4 zCdE9%mwzE4yacbJ*qW#j9v9~x%WTvA(czWiu`)-&UQZPfF(;7?Jwa$;>%&_AmKgl9 z%+M{@b;|5QRNSE&y}0T9AI*(1)T%EcK4J!)T#_@do79`o0+Zqt_O#wt>kUC zZS_8R&zrwmetcc{*8juXTL-lnzHh$JLQ4fGS}4*Mg1Z;D;x0jg71uy_Oo!yz;ncY9%zcTZ_Gr6DVzCPD=b)a?{9-OQ^ zCycnyu2d!LqD2P?5xH;7m>aW|s^Ut&T6`#Ax%};3NUy9mEbUg#>b@k`+QZ=ke|@Z| zf%VSN@GeXSvuu`FQ+e`Uqpej(_uWY4Qm3-FZFpGo=iL;k92M>17$SCsYHrWDg@zz7lI5kI&2 zHFfak`Mvb!iab?7lLQzRF-JidzZtM*TJ29%6+e+^u$bwEB8R;*oLQ>73LsCY45 zU_|AVC3qAmtpA8vmq1=V+3ub@wb>_EcfWQHN;?MpW+94*f#LVd#u0*0TZ^|jEQ;vk zQ#Oj@;F?zLolB+kVv*oFuj}RmaX;lb z6x|GQeQS>_>8Fvynx%H{B^4o~Z>)#XZzV3&THDvg#m3oWT zXuu3E59{dY#MZ_tFyyvhw|IAJE~^;N7q%EE>Z&BYDIcC9)7t_?E_C1?;a2}wj&d1d z$_5vVi^#wlkoHT$^idblyAvhp&@2#n%l%YlOe}i})hUB+BjGpGV8i_s3Qs953n!s1 zzNKQrJU%aro6*n{ZlMqebj(sKwo&5))LJaAY^M3Kt=`{EE`g{qR350Y&88U4%ZQeW zNaG9tt0Aqj~i!u|A=?TE2V( z-n4s^o)g(X4$kb|cf}c(i4hBDSgh8=EZi=QLa1DtsS;s=zL0Kr#-3a@zQ=$nZ96?* zqZuY`sn18f!Y9)sW7jjDyx8IAPSzcb?cQvEdR=J%UY2aSE+6<6kWQRR_JcQ%Ei22WPeXx*Zsgk>R%`o78&7-oa?U96YU+`-DSBFsnhqMP zMDihhhBEa*R?FZyr9dRSWR>0gjYdtOQr5&^3BiZ&^a;WbF_9;KV6!3omnvEuQQB#! zacqO|ZhZCEbI!ZLQ8KJ`{|RhXq{jQ~AySDCb-MD!j;t33+lv1CWih;)EBX40RjR$4 zqW}RY+YJ96^sH6qqFN0zP|hb6S{s~J_uMMl(wiQ0H(05qRWu_?nOhA1 zaCfud{ggYl(stJ@=ab2p@aN#CU9bnAQep-Aa3w1?`>0{i#S<8}giwewFs5eW400*Z z6RvfDYL5B_f-xH;@3*-;I(@qrU^0l+M}gY`aF`Z6*>?yy$52zrpzx}4g;`+!d)s73 zfQARJ3U?7W+wNoC;(hMs;X$$o&g!$r8~fkWe`Ah(Lp~szX4cBZj$GW;9#5F*o@}0; zOshzJ)-U5qt<3_NTQI9Gzikm5AhHE3A|Ez+{ljawM0-%Ew3;1CPVOJ89-?2Vf1_oE zHY-1>5$RZX?FwfoNjvHp|4A5FOv^ov_tI7TF=>8{wiBr`9o2QGjLD|GNo5C)_LDNx zIjzM}6Cg%Ks&TC;&?SNALLqdtK6G0806MEyzpP{>+WFxl=8ylI%lq(7FUzyC8={-U z+o1~yfzI&X)QCSh71@V*DQ0;LZTx00J~$*=q90V^=+A>xlWqCixo?#p({9sh7XO+d zdQ}#0QT(D5UQVm%imO92F1ux?x8?rz&_#he-7Lj^EvLbSA_(4(NLC6Q12`Bz$vtu# zDb26@3bjVOPVriCAf;F6d0`Y6@{#qM79rmCF8uysVp3@0ig>##%+dy=)vLWGdN|mx z#zOrIL9-~A5dAW)U%|GN6_P_Gb;6~?nhToOi(_01E}K}{JQTF>2##c(k4iG_R|g>m z`D5r6zAonzyFF@6#3)BXbH4G5?NH=TT|w^#gWKXiyyToa z;)`ZQdwKs#l?H{v>7NPVoR*N1`N~wsZ_s<1=8=Qq3LZi|+ zHgf&qG;}r%oLzWJqu4TSV>0fcEtpE7!cS){xq)hBc%U5MVxiDyZaDzHdRE}$B+h`x zNnHIiHSV~b%Se& z@u2?`+aS_)l}5YaleLslT*DYm&hdnLjLJO;;kFDB1OTs>{ygbpOflq^)w9xc$^Vwe;SX;=@hW9_bSBD7k7HzZDOG}L= zN{!k_FRcBjf2(kEH>h_|oP8rDhPN<_mIgAvyK6%6!FAWnsC#hxlTnwVlL-DM#H;&s zWaX|M-(#1{r>r`ux{M7;+|x*}}MXd(JZOK}kg*~jqmQn=nyuaiv7=j3_-A=NDG;~SjGgosyedz!GXZ2qAH_c-XT)s_-))7((1cWB=Rc2Ot)d#e02Rk;0`%}!V3DWt?ngNY16!rA&Yd=*^ z2$N}_t@?qoAjW>gOMbi6{=~KG8Wun2%A1|ZgFZOz1Kx4gQ^r>U)%4gtUqRT5(;T)~ zVV&_Tt*H(LAQ`4gV7w}8^_wJ;97lDCcKr=%Df@{?L}HCtZLpm&_<)tK4&%Mide}E& z-I_4D9B_U3Yy*Q~^ZxDiGBB|unj?j>VJ^1AZgh@Uq405*U4h-R#Z%~y);4X&WiVD! zoGmzWZo6G2*BK->$2{-~KSs61=`Z4^4k4qsW(!ZAgFL{|wIkS6UnD`Wf{v5v0VU9P zn99XvRwT!b*2mX&(PM`hZXsSz;TO_30Y7t~j>fgbgd(hT5z(%jFlrZIvF20L7pm-D zdWVlnPgIj0leQ$prn!_>LEcn?G8o!T-Hg4OJMDj~j>i$D(wxO&>hJf@<~I95N^{9S zJfZs`z3Eit@2;^+tMH<1+_*Iwt=kin;C%Y%*8Syp_U6M=iA(#A;HI|5GZToa(~DukKQHY{$sS&GNyUZExX&lg$$llz`Ik%ux8_Gk97S`=$~5 ztguKyzW7=BtJuqDAy@oVg^*%H|Wm4daiGGN1rTH z;g-2;uYbCa`#IK#iWu?HNde!Cx(^=Ehl$-=@;7yUU&h2$nSyrS_FXXBM}z;@v=P!y zYe0IHBriL0Y05hf_VrguZ|h)!8ZVh=iEL!PC0e@&sD!ES5N+K4Li@i9Eq%mseWezj zO*eIUN5CA<%okc-$j{>ce{9!(V`*uaIzb}mvZL2A4-y)UQ_<4!4!=3cVKr-IsP2yQ z`fQ;6N1=}AS42a`*L{h#CG(Gwjh*RMZ~$_!BG2H`zSH+arAZnyN> z;5O=@7wQ{6g?ecfDE_PHzc%A~=o`o=CeiB<87p2jc2wIxmZifil3OI1mqj0f_ra&{ z@vO=VJnr&*(y|`vQ|YZE@zdK&KbmgLR;Na3?||?o(@ms)`57KbzD8LZ*0ViKP(z>$ z=P+cZ=u@T(woKedlKfaseXmF&3ZY0J0SFA4ws|L#KTY#yW@l8}b7dnaw|Of-5X1eY zQc?tc^!nfqkt>O4Q>uzp{BKGX;R#d!@L0fgw?Q^{ z_-dV*9qv%fV9M(MhI_!r9JkQo?=agpXCu*s&$_n~Bf@D{8dJd-?W(6fn=*lw_2e8d zXy-hhV^UXFX#8U9TUj2zA$)e87W@1g+_l(Kb`$5EC-F2ni8Q7RnA{_oUiyhjSh`@^ zEZxIH%y~IBARp?|*iIeZUY;YA8nlq&8`P(O+?O-eP3k3G0pkx;LDX_t<}~A>SIJ8!z9ls+t!Vo|3FIwSt(d$4O0=*} zsU-Y&DyF0_5>!KH$x-V+IhDG!jSA=LQ1rGx3GQLIl+_w*swx7}*5h1>WBLw=56|A~ zU|mH3zvlFs1p&I_jLxjHf80T|n>W3l+mcqUm&qlcxiQ&vUo9wK$6lm!vQs%N=NdyZ z5kOTu{f|nBPxU5hy^Ei{S;j|Lw3U2@_B@q=HASIc*83D=B#0z zwg(LDiaNRI+})8i2jm+t^ot0Yyjr49I$NAL&rsl1tDL#}ccdO>ij17)S5(jws-mWLbX?cN z)5H75Nr$FlCHeTeTGP$IsuEQ%x`T}kvd0cS7Y|Kg5qW`1ii)Y@4i(J8P}}$R&OdS! zUrpSX7T&W=-MiiKMC>5k*_wn<7evQO%yZ)cACl`6I<7_V)onF+)25FFxS>XmUU#U{ zb3S~XseHfHgnF%fQ`Ci62^e*EvHQLH&L6YC*lf1%;jy&6+?oA4CHAY`VFyw;@Pe}; z)5xzZBCA&2XKJl!c6OWQgmShykh=8bP0Tjg-6yVV{hEzKZv-G~w_8#v0A9`08DsaT z=H?4H;$NQ)DFHdheqtAN7@9@rTaSx-qg9pW6dn=0pwI*DR@o)V@6FYV>!nAyp&S;o z-M7Y@;B)e37_WJWzTYQ*s!MF30tGQP4mYf-L<+~;Ug9~|;p+R&)W4e$cr;YA&qc1; zK8`R?#%BrGGs42DLL6ZNW8deYH${nM%L2Oi68(3Dc~MxDsKNUXm&IA}uIwJ_uT9>; z(f6R!;rBq5+l%$!t4k+pdAjZ2C7{hy2?6!MpUlMi_l*4s-~+CbHB2c+dATVHVWYEQ zDyO~x(kGf87%@m-R9})na$z|iT5+9jFWyA ziC(LR^HXjufwhnD_2eD=-2i%(QI2VfpOo~qXqS_V6Dr(~YN~CVYquW}5kOS&4MQ~h zlc)^sGm_rm8*!E$NY@9OIbcLr1`l&e+Wyj2x!V_>Z1{`Lj{Q1h=uMIbYiT48>KHt6 z_AV}WoL0(+d@t5{a=YJXi3Detu8Oo=D<@J8!-soa+8$y)TD_jD;p6ehPuQMZV}ZFp zjic3BlxHrG5NC!GBufm(2TSnVi~e4WklzeueHBNhIGyk{eXMqR#HVa9VF&$G+Ro&9 zWqR>aqKnw=IL5jZNmWC__Ym;qI~Uur`KMPaeK#IRtvJd zsr~uUdfv6-*a(|>;ri}P5=SD84P#u?M3i@v_Dr$ecn?7LgslTX{GBm$Y%$B@SQ<|1J5&xrc7W!8KGjB#WHby(2qR7Qes;tbZf@ZMYAA~o=Cwf6-9rdIOcWeJUfTWK3($J5W zsi_XTW2B)+AQ}CzeKk;jTF5!8^I`VT`mwJF<(}5Ixt}6smB7oQ!@}M@#w#r>+cx4+ zyH#c&$2JhfQ%Ag9@gu-Nb;H5RibVB$xDJ_gP|D?t6Vc|52A-?RtMBJVc;QS!n1q__ z6;B_@-6ufqJa(~@85WY2qLg*t?0v{&=~o) zh+Ve(WBRIq`v>KFgbB9v$CENF?^iQK_Q5@!tDPQA7$f9rwsxz;HTCwO!DjiUiV@^N zGT1=gs8Thmm%*@(;5b{@TX{5)5tldmZLIk;krypB(SUs9hZr_edbMf1u6!1-T)yX3 zUChX!W0bDDf>89mZ^Q;lJc&Gg_;6<$vG}z_THpWF0PV(T%v|3QO#viyHv`WayQ8LG z`=(r2C@UmL(36PTz>eoNlz5chCPQd#Ak;12f_EHOZF5BtW0S_4lC)_WW6Hr*S~I4h8)X&Jil9@0K)i6Y{#b4$!hOwCq?s z>HWiUSW9Pc6;@NS_w`)p*pe{SZVG8uL1Lf|OpMg#@adq-042v_P76FGLe~rU4jugzi0zepI=pRvkw}PYK!q%DFR)0GlLjUEJvt-4Bt*#}-p+ zu`7${AD!Fdn=mo!!;nJ?vZnfTGe{AO888h=re`;x$(qHf0#dV9uW(GOWU(NXqIa@Q^Yj!>}wBV^!eG96n*N40(FsBL}Qs6}Q* z_Px$B=?-U4s8K9vCb>GxSB-Pa<@^z43A1gYu8OdrmzAU%Y;O@PZuF*<9hkZMO!(LM z6V=VwSpq!${Kq~*Hnjdc)pwG3f?Aspj|*N^&_}t#j8iFZ%V^U0RdPwk&4t0l^p{Uy z56rA}P&vV;8V*Vwl2+0h)El={N}r<=oerySSa+id@5pf^O@}$jLS}<7WkXiS;>VJ* zGE+`VLDw-l&(%=)CLONz%fsF)|^hCTSZqHFKd%pRb5 zH(2bWHXnF=IR;V=7X85^*!~dc+X6H7eFzFsxfp`oa))qB3+XH#qlqhWOHp%Xi5|Wy z=mS$%ez*-+Cuw~JApgyH;=8TaL%(X2Eh-(qzlG{GQ;dGq($PyrF4&KmLtVkL!tV1J z|8=3Kelz7Uj=3z4X^THP2(B;f2fW9I^*oO?<(V z*|EROQ-?tC#&$qBUyK4*7P+^#^N8F2G?;Eh(#4HyNy?M_hPZ%CTwVv3)&(ij_1l5I z=oeZ~?)y77t1lo3H(M8YnD$^GV<6E?`KKuUpD5RFOFe@@3w(fu>q50>(ZE zH<;hBF9XH7XeLipE2wFF>!?u`r!;>z=>Yd_K7-Kq-t=!dn#p%xE z=?Xp(jVs0UQ zPf(O&=`u=oF859O-)x&&RWDle8i~0(ro%kd-g{~hA05tm;;=h~z5W4~6*L8u(rLqe zUp||zwsUp;n)Gm=wXLQ`F45#}s6bR-B6apHPrH`A=4ug~U~lL#>r@1iNPpwrn}2v8 zo0}W4&bK4R)}&u1O#iZ#Vqicw>B`P2huGMzp0$z5v)OEz_tAszYx^+m?a5)NZ^qTr zZ_O{=UPP#uThS!lM9M)ap=7LYf~&f{rzB2|wkGJ|SG5Yo*2MaBp3K$!gG9!@#MKuc zRZ|->1k}jlGDrO+N&1?X!Dc!(n+?{=fx;F3?ytx>5PHSLluxVibB6!n30p))j@wr3 zwo?C1iz^(+v*KZ3)F3m7d)p8zF+(8!Adb$NH`eFx&)aoz0{svT%cxhnzLjj(>_?Zo zN13?JjfKImxY3=zsF$sn2|geHD5f+}HLp%HOxeB68;vTehqX#O#HO<}VMJv3w^JBh z9P?|&=Je(}ZU%W{RU^L5G;4GmU=iS)pT$kDiueJK`NhkYPIoOn|6E2XdhMxK{FeDC z02jH?xP#ta9)Qo`omLys6P1Btn4ycM?nVoAizM}37{od@&7ksXr_%qy!cyLg3QSh>qN*SEu^!Qfa!gO*9piMjA?N^`tWB1Z3~nxAv!Q$7;SF_^;LQ@yN*KezPw( zI?K6!)OBs1B-}bb0 zDRa0@Ie+IEL(JHtx5C-cv@v6cPl2Ke&p$`L0PT%B6XtRh$3w@<;18AA{-?1rRf!WM zygWvN7cd_m#mNR}8@n4|{d3&j z27%pqwPr0p^G3%xpBOvpv=Hr4Y)dLScCD(YGmAE0WWtjHVHQ+Vn16VGbsqs>zwo$q zWY#Rd1Tj?I@?A#{pvA=|70a+Kyo*uM7sZ#)2m4((8X}l==gv(&m4~22xP3N;k5~jh z=@^)JAL?{qTv28`$?cH+BpBsV8XsA)Ky01pg4fF}o zhZ^Utef7Pvtwfpjcei{Y(a1$NqjkiMWOw5Q_ZA_qF&VTlKSEtIL86r^H=#9iLO(sC z^r5k$weKq&25~Uefg4>*cH(XH2!ZQVEJabq+}b2O>ciMn$aKOtQKjIEuFherTrkEG$$@_p#fFb@{YIzadas-#{K@mqrz9nj7`5$}8Ntx2#bH zbob_S+DEYLmj=+oqZK&Rk&Io2Lf~D&p3)=svzKt09JUsO$B|~?^xP)9)9eXrmn-Jw z(sWU|-@-7x_IU+TTBKEM=7`~AN?IbDachInyeI_|L`wQw#b<|WM0{#^T0`M7&naBLi|!#_;st>_ zXhQ>HtZ7uq~d|9}HidS{1;B3H!Y5n*-%A+m1YsG5- z?%@-Vz7Ows**?cj)<2XK(YIoHGPSag?A$Neis`Pk7|J%#Zyz?<(mSf!{QxJlYn=yB4w$v5l{pHykaMG{*qm>jsu zL-Y4P4H~aGsXzggfmu^M5KzqzE@cxX{b^~5t1iw@-M?RkNY7!7zhPMxFR>o!&dr}< z$iFKev&zqKxw4cAmzzGJWLTjA!Q|0cKh%-^Uoo0-fw(V!Ozw*JjIPvb>o(UCAdO+3W%C56UgUP)D(_y?| zXlOe&F|WHO&3Y73PZv^CfiAV8MjY2<-uXAik2*J2_1e9o^E z#Gjp17vDd$T}f~o0^z`JALAs1%FU97xp+gq!}8V{!(2hV(Ml@dJk>^!sw}w zmHR_XZDdAsm`{n}4~I9sXtS=6wU!-KY$?OD6Q)*4b>&&Lt*x~M<4v=3bB4kxvxZvC z)Q*1K{m8t4y1+pHHWboo6{RL}Fln*r$9*{NGCtm)X5*zMB7K(~wB?s&#KZgo;-w~I zcTTsgo%vtXbHmhDbUgrxx-si2i8hk0^($5HX634(5NVsMr}-n_0^J-kG*%^Dz;tg7 zAvd6_0a%%haEJr~EGj4+%9?j(`_ehS)cQ8PAdh9a8Bt|URj5cSo9&mlRfX}bPwy%B zU!l~Xngs5|GE|BcOxA}e@L zRcs%xmJByZ4_;|SM|!0Dpjhqdt%gYn~fVgmJQcY&s{95;_Z~u544A?AeI*X-o)VK4@sY7(X z-H5_bi|UuHH*S~Jh6*1AGfej#27dmi_^oFBMH#Tf$L)5=9B4gX1-h@OQsxSkZgh4L zje2dF1&USOsI9z$G-@A+*jXB@o%3 zrO~$7Q^;ub!ka6aksHkB9Cy!-9Y`Z!f^^+gIzO5N-B7j8*TdYCmHuuJm1svj$uXIx zp(eQZeWu1u_FKr!$h2AFdhJ?bkUR+&RW?ep4192H>CGa|$mb8HFP)wI(dJK55I=m_ zwFL}wDR?d`$*WLd>zC4}dm;pze71D7ACL>^Rq>>IE3f-m`2$pr7Vdk$!uI}Kh2+ZA zd)4SD4ZephA%# zrebIdK36jiqig9NPd#RQr^PSmtsQ4P$_K^WX+5`E*Q?*pq7Ej(ps>kHzU%{f_uJ** zXvtRp2O>`XQ0+hc;ZL(^MW_^ zt^p>AHYn@or^J%~&{84>x-ZF%+@(KZV17BD`bK0ekMq0@)`wnOT4j-uJ=@;9 zgdTUgVp@N%N^8u}71iEq9>lr3`e5SB>b%gQO~x=mVcMFerb?_m$yLHvHU;lD{4J?e z&(zj=Fg^y#DVT+kZ(CErH-+Ax2Ui1!g}xttxM64lapve#SA4Yn^d~c;ZF)w;nh#J7 z`FM!U$+Kzfkks^6>0z$?ro$K8kC(42?szD#1o$!(mMS+AV&)Ng{?Otq)bEEiWQDe8 zs0cMHoc%Rmqc`?^elvjws@HkkK7^!^s$E=4@*SW?4CxxqO|N?iLv#JoSOhmWplP-( zTM4#wgL5q3;u&X}tMB(E$ni1Xc-~ircj@rW3D+>ah9G}d6n{rrd1U#oi25&)0t z?h^DD%){^1F?sjn=f&%LLIf%O+@O-u*`U`9Wh({@h1o&{68<$}{+j1KhzSF%!|cU2 z!kDfLBh6xG`n1+6JhyW74Y~;V29@`8b`HX0$%bB!72|rE$&u2B_Z(S+xgGK`Lq`m* zW?c5D!I730v|B{gWUor%j_wcZ3A-eXPYCgVHy&w3PMSAHXvmhdrJ`{lWw~c6Yc;Ce z(_xL=u^sVpx*uK%C&%0fn}z88`G*IQWq^%K!o2(}r+zxZ-b(s|6??zTuHaPYDAGbp-8;N(y7eUk$XC$Ilm96E?3f?u?pGwH)xH5y;Mfwp?0M)TgN{ zO#&jS4SSX@4xY(&Ly_r#@O!KfW|mxZtL3VibVgpEiX5dA!+Ik*@Z(@flCyzoLM@xA zo60p?QCAoU8+En1#EVY1J1ehD2%20#1-~fs-tiW{?k7#lU&_#w7WD^D+lg69q#2oS zig>SY|De<}P*2g)QF}#!%nltSaqOmxpH@BRdL~~&P03JENP{oZ~HGj7n!Rh zA8zt4{}5e3YZWwz5jsfTyg1v2_vssL3DU8-V%%+CxOj^nLrq*bZHkJM^Gyrp#Bb)% zH!W@33@iJ&wXf7#aYh}n;y*9QFYGeyyynP51qlPtXAKU{tcQQ0hEEPtyC$d?TuJ$U zqR$1tWERzZ$*PZSz6en+cjjcjS1Lm8o?`8OxN`wJ4yTV+0VJ=3Z=TB&JHIh|?qq78xXdDxY@Mj5#zG3^jpix5pC}JkR{K0W zSg>42iIp@-G>26ZNSP<`+}XX(jArm7rj%=b^;q zaYB{k6O|PVMjc;elIwJ0cyx9Ln4RM?#{#M6(^|(LCh`{I3*XC`$kN5PT;4VJ7mS60 z@Wc6gH+xTC$}URcHkHR~CNY?qaeJ@1OAuY3)d8HpGhT>l8^t_=1HeMYx@%^y%lnBtTRl-OA8-^U1-y!j2ES zIExWLi`sUAl3s)L>bvUF z$^f#Yu*sf<-Z4^-EeY6VXbAh>_?!rP?f%qP)bj?H<+R7uZbvBy3wzk{60=^y$dHx= zl~0SX{ut*NJvl|ixN9(>feF#PP!)^(FjEV?lAN%N$==5wYyI?>GYip1PpAwjJn167 zlk0U0veT0f&%53qxXs%@Q!umjH}Bm%kRCvG-Y@WDRcXNS3BK=iWiXIe0I>sVhmDOl zD~+-skyP;!=cb%XkDNhoA_e6sAuUDmi&Tf%H3<`rEVpa?8uqV@K0!=A;Ng+0u?>ez z-~o6L7+lTdo}}cPbM5cBuki3H09kl=jN$J_?$=rXQ5FU(H22$s%0l14dN_q1&(i}H zOEsvt*RmeF9g=i#YHr`FwTo-)Gt<)HdNoUp#I>S2z_?}^QB(kAU`H|e#9r85mKE>3 z3e|&kPyg8sb6OqkB3)EcB+UT$aN_uPUz%&+xoIV?U*ErN_)mx|-~SsR3w(Y()8Tt^ zCp-9CvZjvcwQSw~IUJ1P{fGDcq=m=eLtW+veCwfY`?PN<=PqY2<&Ox%uFNB_2<5&* zmN=2Lk)E{8kGGM`E+3~xSh(}t#&&-_$-$ibMI7oSY#w-=m2rkM>)kH;YGqSMCoE_0 z+aJcYkd4@g&L1L7uS;b$-CP?M-R4M?Ta)$mnf%I2OYQN$=xZf1Ufz*Rk~yU#c<)255_#-Zd285`UCC9eRmus-CAv_3#*5u~omkT0 zx~Oh+6Ykj-M(e>7v1vq4X>HZZ#F8R)+Yt9hjj73N-oD;50vuL48i6I5AzOCS5*i&k z6W_La-E;SER&U1ZQJOd}MbR0barj{6bKIK{B{I$NG73QG#H(Xfmq!xHo!z-$M7qD~ z_8g7D6Np?{e);s!m7GKSloIZ@m<>i-(fK;_=MKz$H$arsgcIz>;;s%uw<_5)u%3LG z{#{<28AaQ0@@wctv7f+&VYprJSD6FzrHKVIwl2D`o$i&4*6ysdUtNi%@MQO>4Bfox zUwVf4fB)PcE37r@>UIs?6R%}#P+EQ@{psP)L{8nX$<)=c(>8xj-?~st_&ayap8b(u z?qL-rBimR;Ww$iBb$hPZBn?v_^QdiM(Xi_9qeh%KuI3c;S6mT!=(U}*61+cLCprgl zMiqw>-DXyaXpvcbIbo0<4gR#M)M1GlpMC@3*Lacj&hyf^NcOnbVcI9`63q>0?gg77 ztpM1o-?jm<6wRWy<5j3Lp`WVy$MQfRH&dV730-i;P0`kcbo;ip55kgx;^=xc`1d`I zTQ0&P3uaPX+Dw(CS!eh*+^rKlac1wd@I0~XhFweXx~S3)CBA%f+9~!@a|`#->D*xi z(LIDP8|4|wu^7Vt=lpSnUj;q0Ty_zMQ9vrOaX4RP$BFv zAHB*pGR?}ICRV)E>%D4*3!KL61h{cOn5%P}davgz3fF9Q^P(H_`RzCOlEBF; z!x#aj@)1`L`<)h>$E?o;2^V(zVp5;7n2ua=+NKHIM<$poV@$QzdWTv;F)E>RZSelpI?z$4TAG;H1Sn`hM>(*vPuKyA!cyoRA)*s#4 z^W)E9_N0AsYl5?EX zm+J#PR*pD5O&YdIJa{FU>$bGs<=RccLY-$Us7A74PY@OCYvin_rkblrBSJiFv3kbi z*WGG*-%_!>$2HDnZ->A`pF;`PNke2v-`1CCqPO=x_6DGZRq>$VDzaQhIhnffYC(qd^ zIRlax0Zvq=nJWqkh2_rye;;<>xoV5tIbzKIz!XpFsm(so=h@yf>)#A3`;_-#qO4b?YL+Uk8=jw-9*; zdpLHpkIkeN)zS7T72wQye-XM0MWR~TPZsAPMy11B#mi7saMbeU!!r2RP;sVxlrkr0 zp4L>BbR`3)U7FE3=+)h?!w`w}zSYTpg7gxaj$R;ub~0*?@6X+RH4>L|Jmx)ruU$b> zzjpYoY)?4%ZiCv1dk1$`u3bea6FmsR)mD0sArH;=RIWG<`Ea8QH~;VokM8t*oK-Mv zcKIJ3yj^zX?lHduYx>a0?|k4^`)FF0`R1iheJ}3iS?Ey5jZ*Io-Nrw>pp@Ilebgf} zok#8UhTAFck3coMug_JiQh)w#pryWl?yA+U7CY4T^iIAhHG2{kS`0DC?0iiWHtmXY z3BrQzOxgTL+mdsVGwXTdtMT34?X8nPjw<<5vcoq#ln;^(c&J?)VDY@SKM#o`QwIlx zXGRkG#}Vp*`(905G~;d$n2q)5y;T79M(3SY-j1BOf<~+2a3BoXSPtYc(d#Rao-|3J zi>(pSC1&b=!UHZsV2PvlsAcHkv$G3r5k$Xbzj)S22R#Woz05f;8I0>g`Ew}+LsL(O&h5(>+(FF)!*1j zM9%?N{^5CZ;e@(O-Mx9b$A&2XFw6mxuW3*g_>T{0hFjjLxIptMC1RI_=|{laT($hB zTKKPsHHoC;N>dUiyDi}eL|CW0;la0U-e_Mp(Be2ylFRq4P#eug!=q~vFUFv8Kr^z7 zM@9G^hufM4{$Wr6u#q1{D8Ve8_wy(I(wWyT(T zJr%oE4T~=(YOW>f-cOI{n0@JA+r#v5R^~lQK;k4?9Fr?KJXe3{1bI896nL zGjn0&BV&0(j#2?7X~U)|p)a$2PvxKB-fYBc>a{l~)f0X{#N%-xl-o#7;xsnUFJ9(& z1ZIhj%cs!coX@I-Kn?_@Off-C7R<*(rtovOFO4bJ)y^tjYTbUkXbkGzaDTFad0yseQqz6B zaY6O)?fTzrEKlQ}*Hp})ZJAvKO4u}K&LE|xIOuBB7)j-kSUzg_;Ka7UZCc7}4TX`e z@ru!$kH{jsc$-cU5PYL!mfT};U2#P=PH=s?}n!L^9th)Ob2+PO*KCNg3F zW(f$xgsq7u{9eQn8hzaS5$rK~-GM01)AObIYORfy;Dm_l8L-Qh z0~u6RN?~{ux*a8T+{PAQk_zN`IBPgOYH69FJN4&gZbXTvM znem))a59L(6o?8<*AiSVX0)!9KwO3#rcZ5i!&j^Qxyr$fRXB$ z5S1Uu>1|cS3j+|lE$Q)0dFRni`0%*j%0BPt?V9Mys8SC4<~XW2nB<|>8!VL9WtEr$jzeh72G#?BW0!oJ|)ZXp;wRFekaY9%yF zCreCMSkubhgE5HN+E=Vmht`&o-HQyYyj>B7|DMuhh)etGu{94V_=C-`GIYA?$ zZAgcc=h@%RF(9|_2zNQ_GWyWNpN`9w<1sS5+M!yw5$kI4s;6WINLHmfd9T0bHIReX zF7`>_W{&(CDSggwAw$$0YdD%vA zf+^g2eH`ixF!Hi@rWu`FtsEciFhH-$Yl-r%P&(nM*BcsL_%K@=el8@$znAbGU!teHyp+-_Q z70vR);|+poqbZ;j3*C_5&8q06D>lU%yO9pNnG8KjYjyn^9NN3b@{HSC*h9L%6|O+F zoe5{khi<%kM-si;6_7wGG1hW|T3|mE85No;5TVxnL1yPz{#GAUqIi$-Q$W^> znxL9(%WV=X)uF~)7v}Z zfZ4RdE=jNJ)M#crtyL1sjZ~E7LNR>}bvlxA#RmqQqpHl62_p640l_wEs!Pqol>Zo=cSOZP-lq;yx)c`7t}flT%CF*G3|%h-6NTXSG9i&fr(_o!8}q^q;8 z?KyP{n!okS%nu_d=*{E)Tzax9Zj!fZ#_u_v#mmLIg}H5w{5X~Ug6^deoBrAK!I!}<$- zGm*SPMdwOiLr|d;jS!A8&8bN!tWD$qHXbjIG82mM5JhvOD}8BUU|5@_&*TqB_W1Vf zSYTG&mSZHJ5(EUk28g__WlTlCBZ+V#uqmhP+#9)7-g4D8UM}rH;@uo^=7cpCf;}QXwAh?az7F&l4QT2={kbFh~a)>5{F~ zlO-G**EDBCTfRp;E6Ft30~YR0I~yC7`e3t?@G9=tq_PkT z%YEXik>^|=|M)@l9iQX#&2TI4v3p7n^_e1maoYLPh0Kq;*a|!MAU(5>D4JNLjDFsS?c7G{xQY9X^--0Xqhn7# z25c!=4`bBE&Hf+C-uf-dH;UH<1ymFf1f)Si8l)RUI)w2EG)@R-KYvd><6+Vm@?TTpn^6NyY)7MBV z_l7TnuX)w<`QUC;ls6Q;)s*h=w(Qw~RF1TC!oFV2Ze24=U*}^<@1Yui8(LB=97yN9 zzB;HK625Hc8^uT_OQW4{yB)gY)^Z)~`lRkTGY{31lbWmkFQ%IhD+^BU?`xM1wAPH_ zk8BghK`MK=@e+{F&)EblRPlwvri&}Sd*B-xj@Cj;6BWpN=*_;o&YccalQtVjRqUZS z9audaJ$UFo6}EzK&xbVB-$_8$=T62U2i*O^)o7O*RYrh3Pb6v1wGo3dXz!g?dpTCZ z!$wC=r_^uEvsvUY`@r>bpp!>*N#C39Gx2lBnTGzt83Md&0*{Z}>=eD=%sdq*RF{*V z(2*0SqyeAo9`EFF$n3_w|9O+4a}Mql@=se_GJYI^cs}O-owY&~K;|aa)seY{WktoK zn{@8eGlE`Aa}$DsSY=}$!elt?v^`qhg?Hp#g;-)Z^fP1pNYs$uh)`_p_4A5yfw0xg zFC_prxY=hx%BOK!0Xe?G!&g1V<>}lyQ%X2GdzJR`xQ2y6fUDTq{gqgg_qUlGfUJO- z#iTTm%SNaW4CV+RRp(CXKee(it_;pk;+(bQ?GgNS@ArO#(B<-r&SmBjRG}km4bTkLFgUnt{2sZYDJc;DkyT>U<&IF1tm`JkQEkrY-haiw zQQ_2x(BL3uQ?-5fU;n!0pq^8}QgdyZS6T0;8~4b13iWdyyCN8cfJ(r-b<~yHRncbF zK#pYPmLZbn7X%@NiMiP`MkAJuWvJ!zO-P=_sL*a%+4G`zKHo3caj#+u9anFS{@Y`A z%|%A1?kCPeC-cXZ9&o zX^cJPyzI|snPaeZ{f_^1+*LKE>VyL7(Ziad@Vb-=EUtq`nG|NisKshGo*Z%XSeoN~ zNw${q<@Y=(-OhlS`?lI)JMGJ72;s2tg*!tUGD2r-`}NYl|5#7%dfZk^XNf?n9D*bs zZkzyT>S#_(N;X3H(QYXlFz1kXC73ePfa-ZAEUeqqG!br-+z7xgn(0+}qfGS{f0!Y! z^p&n6LZ2#XC<;JytVM31!w+Yj9PPzAz-1SCV(ZIcxJ@_Hz!4+q)YklW%PzaN9?*Un z#^OK;JmXS22SzVZC6sTJc_oclp4d(nl5s-t&$z0YkpUE&G-s~u)?8~3#ud7Y-gc}O zEk9e$4RtF8awTU37!j(tWo1=`0~>oYck z>PvlV9BfwN?;Mo@IV+91BvIFD{L7hmi7&AYTlN_4+_8S><4i_fhhK@@JwqEk?w-wL zueiJn(yjP2=6nAvjL?z(KP>740m6^jjBz1(ggj`jwiQJxo@=<5=#3B0B1-B{4tG;v zFu7e`SVlJMzu;_<)!^rv7GdNTn$#}xlvoLhl&tu@Bf&YI=B50cO5ryXYP$@mruAa8}CYAW%AB;2sc`x z1BZGv~=mpSoIb;u~FZ}~Cy_lCu?cIFk z!284gq8$XAP<>5VWglMZN@2ip#-&UTj!f4#K^_II+8dJhYTi&&5H6lq`TxqT9i7R6$s{1pd`;Wdt)PE@ExiQ*nl8Vr3`6}Nbl%)-7WJ61mJC|L+kN9niwnPPxT?VO zVZB(u2CA5QL+cg4R-%TG<5`@XzV@J`{9-cod3K}ppYv-LG%0)>6+k#w7gD| zQx^fT2c;MB&W-JF&kdzN+Mi$P{fEU{ISSPNe#AL8TydWj6@hF>67YL!-<|2drD$p4 zS@=Zx3V%$d@isqxQ$}&dmGnMAJu976Un5vt+WB=hwEX6z3rXNEw$VsM^d+c&HU$GAaFr66*l{ z4W&oG}Coujy`f!gQxqIKo|gZ5UCjep!VHPWfYPndUcDRerk8sW)F z0YSE|xE^Jwx0N98I5_I<>iIWVGNnPXv5EW!ipr9zDpHHjSCy6G`qL?#>^v`3ea(Z4 z`1qc&yOU{D3|A#h!~dwv=JF*5i#@xpy{;q-@BFCYK5aj#j5QVW0_W-P+&Jzg&mN7@ z)QXb){J3E~ojURYi$a|5KFkSe$N`eiziMlyf4M3lh=s%0y)lo;5;1wtlyP+TkFwq) z_5A&+!(Hd|Q)^ETJZ(0U&J*|W1LjdQO2L8%2rxGJUi>f}LSd--Maii_xp;ykJgOl3 zyksOO$>-uQqIpnyb8}X5u4%1X2(|DqQJbIm_d)oSQpLZ0dLrixGSkrql7aoPfcN^E z7Z;3F?25!III!j724Kd;Thq1)WQM-e<@nJ7U7MwQ6?yGD%LQ@Dw29YwCpH#l$62IP zeouf=#)&n2R9!w*Lm?JxZDSmXLx=DRJboXiS79$JV}}+WLZT`FjWVQCir8RV+w91& zx-fkXR$dQ*ki#$AH=bcA`sPJ+?1V=_Z!-vs=SR6>n3chKLS;xjXR(e=nEA1)092;M z^=>O5O&HC||8`8_6^ zgPL}kLfbF4wcX08eMbfye_Si-(biVgx5!PWJ7P=LXq5dMW@4pxHOuGp)&y;6Z@5s= zy%rjg{z(fzLPFQ&y}eh6()={1xzu>);^L}fK@%oZf+F8J#EOO~xbNWW5dKzl#v<;k zpKZt)p$ytwIL73$-v2#R*`tepYZ`b-Ee%@rQqcB=(v+@6MiJ?u?i62i-OibBx-H~8 z?Dtz69lqG(m^w^+%jrZpwHenGb5ag1&7CWW&1o#z%Bfh;nvqB)hb{;bAE7p+41`g&o4bh$#cuqH+Hc#sjG zwk4$r=}Np?i*obO1*^sWhlSL#c1`0-USLp@y78BtnzTBb5#dCW$qPMhqh=ORhE}em zq@--p3+Zeyvix8X$*QZK!=59rT2x~T)PKLhP?~+PR_0<>tFiAp_h0j1@g&%L4<`ye zLvMpT-j42=Y;B3c6d#++R)_TFmmbIuiTg?QX@wezAB#&^LEoVs1kk5Xh~aRePx~$_ zn}V%@ENfCc2maC;HlEpZwe|YGMptf_IKby9x&^Mz)$sMR7dg2@LwKImM9teJ{((Xo z)yg!S*r4`Khku+=Qmue`a68A>VGk`!|Q0`k(AxQ-+j?4k2DB?)PG7SwKR?ch9bC@o5` z(SKh-lu};euPYy0^l>?cIcLDeEYT8|bKCNe1p;}EfIGX70Idcecvw9@;2es0CetEw zbC*T!C6XnQ(suZfnN~x|-G{y-{aWF3+5_@xiCd+nWuUN7mLc6~i~joxA92^Nmd%CM zV4nSklj{ikEhU{#*xXiGV($Q@?h{#rI4YCHW+4iuF~eWZ9_tL5;4g>a(h%M{tK;RNsM^BltcSRWsMu+|;3~o9aBi8Y*N%C-{ou zCxm7BUlFW;EDDs8oS`iXe4n3Nmf>67UdXt_61=ed_s^eu$=^VN<-96|ss-x$}jnllrZPs?{ z{*~w6K4eLM;Y-rc7N3ES+sx#;Z*f8`0%(~r(q3#=gsfR(x7lP)UiTpyKJ?=HecV5n z3L9cjC@o5>eI6X1--wpS)^P^m=h|sJO^|){zE_hy%pBwJiE zO|Er*^o}KaFV)X=Nqc6iuAA5tUbo@DKAzv^hb_2kVVbgJ&|tVkzmOgZ0ZyqGm!ZDE zRD>TV<&{a5h8iJ)oN&g?Y5)yco6R!{grO_NA($vy(>l?8-UEr){(0`B;yspds%=gCMN~-1CGXo4~0^k52!qTo){W)*|gyQi7rey-#gFaQW=)j`u-kXA6s%{ zcjM*Mj!5)rZ;9CcRz|{9<~;wP3!cWUWE8lD{|?nT*C<{gP4|_kQw$rMwy^2nSX~mF zG3f2a>mGitls8~w8pjcr-30$Q$;v0doAO+S%n- zB```dfrPu~CrT!T$-JGDp?=LMAFoLAEv--S@#u4WbfX z9Nf^Us36qh>oy++>ANCW-*goVPh91w$01o>{YMKp+aGyq=V`>R3z6M-A0CP}9V(Ly z5ATw@Vn)0oDlj2UL-Xg+Qvf;G>uK5Jfl}^x>km(^sL~lxTZy*F!j}z(f-j$%P-@sO zRB5U!-vd*sl8P?^9FXF4O&>{+sn(mJ5L|hA`4`HGJp!VXg0U(nH@=3XsacH*xRsJ+ z>OiSc)ZHLEQ4Y^V;MiDce6Yy*2fr)u|3Z03n2a1no(C~D@y(jTQlc6>Vj$JQgLAEBXIy>!l^Wa@9Y$R*f9E_N)_-Fk}J3cAne zgIRrlSjH+@+7@ZmvE@ArXB;l29e1Dmtf+$KRJcb!)+|t5z#VDPE8l=d8hPqvzUKP2hiC2W%Yg@|tj4?5q4r#|i`KWENNC}+ekpd;Vi|X~P{w4; zTf36X*H81lqbe=P?rboa%ip#??+spsFm$C!H^WbtI%v8u%f09`*(UbXihXe&(K$my zXFyW#h(q1E-w*z<+1g$W0EUu5HUOAZvhCxgB5z z5rr{U>169`@wMFpObUM?7|Q4~B4dM_sf?%D=Qv*6@{21}YQo4%sU0?ZBi)ZwPfWTn zj3)KGA65I9hf>M!DX7?i%pcQ?M5^HOguLQmD}LvVt>5F5K)xMgw+M6%Nr={q_JVTdEa#Fw!u9+@~<{C#10zMC;#D{u+sbC50oinVFjcuyjr@GKvIb* z-0Y8XQDq*iuL=hrm;9c#3M2gVnwR$uQpsk$bcNsMg;^EmGvf%j^&9JRP>S7u&d+_q zZqw{~-qp!~Y_>JfT(_pww@&)^yDM#d9N5sw>c!$<O1cPBdD&)c<0H$x5hL#_3q-)nTYg zeyCWRErR{z%PND^tNukh&$e>?Hqs z@6*dmm|YIL3&rZBbp35+jjx3pO~Ha8G@vz0z{S!o&u5pz_LO|r5=Op%lFk_*4YJYj>{m?Ut)LuAL__+6yqap$J$$R7T;J${uOgGM(*J8kc z<|Xu$_q+HcSTgl<#%ZEpF~W}TzA}@;RkvrJm>)9RUdunY=CajjBLZ9J3U123q*f z&;W%L6;22ac2Ty?`2c0&1NK|jRJJ1&x(j{ZIGh5I+IKzIkRmndV~Xi!ltCRjKP$`S zsHmtCei@F2Sj=z){*oAy`s9;ydQrbUKpTQIp=m=>)qTtsLsj&-`Zc>;%YmqVIFAx@ zf%Jr7oB`~)VKCw#dt97lg@l#5FH?RN4St|MLO)xZCRO{Tm`BbFfV@w&eZPZoVmKDR z>Q)$J*e(jScxDPTMe+1yj%JQLWPkDvT#kO$DqEobe}|j?&ukfT$o=!jPK@u9rL}UQ zGf>{T4oL@hz3B*@B5`khWsN>UQJ+uW{qWwnKV94ROjXtyC6!AOIIk^InT2kE?Cp}J zL*Kz>5_ptyYvnUG} zda$==ee$_9SonuOVo9_hOO(Sy=T^p=mbknytq{Ps$DCG6%ix8JMHxx?Z2}2abTVr^ zOu0CbP!R<9eS=Ru`T3gTcaBtp*~k^$U{&s;WtQe-)>(_xIz+giTnuOqp;-|cKR{R4 zwT;#ApB)}N;Jsko9)oN+c5d{{wI|ARCVzf+hwGwV+go#e;zef_&t3L8@tA{!O4A>y^d%nHKJS`|Zpe{i$t(&4i4eMaR~{O`&m?RS8OZE4pPVMx<$Q-tT` zTT%Kq6yzm#_R}emU!Q(mP9u1kmcMY+w7Z!4^5dk`Z;lM-9$z1K6EV6Xzr-ybKaV*D zv|T+i)Bg~@M^hG;`Eeoo7g8TAO0J^=>JMD2N+kFmx~vfKBnDDQ;51TJd!RWiTC?c5 z8cLI)j9)6J*{@v4j)z5RE%@Ope#Yx?Xw^I+*_y7sraVCT6a>D>dH*&i|wgNf~0LvZHS)>w)Z7M~|#*XEnL4B;kBow~?CZTw z!#_R)OrzZ~qQv*koFk-QRo^U7T7HUD@$<>nr#mm{_5v!1_5|;xO!of6()C>sxbw9@ zWg;PH_iimHxE4p{hJ8eJy7xlUj6N^Fq;Ez~`_C@VafY!$q>-h|R07l4Mt(`8@M&Yr z?E&uE{4f(hd#|nh+wP00@y){>DE{- zyMkGNJzslL)2{DEv{lzM{f8BqS8wRR)lw(I)t6&gkwN~qe_3GPq&|0WQdz~~jx!0{ z-kP%#B)`tNi3nbSG;=w5S)U|hq5>5kp9?UO(??qpskq;3$+}Puz4{h^6a4(q*nd7K zllJnDRabiRNE^*v5tA(so0(|tuEKrylxiQH zLllX)IVF1V&BZ0L>nB zP^H)ICsHsI+)#EZwKj4huvUQp&fB3QChGNJdX5*JZPd;JC+{>)i*ySr>oHx-IH!X} zsntbyjHiASfe&)1Wc-Ue|FsDmJiZf~ zFQ_Xjx$!fmMZr{d#3*A!txJc@>fVljctnA>!ZI=`G^XQ~Qx^R^zGe7qM(nsI=ZnxA zl$w<#G88z51+?u^Wkz}MybWedw#Pu=#3*S#1eXW*Y^vO9zNUoX@9M$^7o*siYvk02Ruy2}lM&LKc?1%90{1IjdCu?Z(yW(@&MRAgJ*t>>*E= zagMpUlNKulzT$7sAi~Qkd4bYK{>`0V{HxJ~=~*jnclC{YFkP$q1^lbN^$;H9s*4Bc z0<@L`9-ycinwMlHR z=zw5bJLi|jw*O|^ZH_raB8%JH8_sIWuyiu(e(>`6(qo?$=iicDX0?xoG zNsjhhIIwUSJj}DsDtN-z4!R(WlEwzlM)t;IO|o~l>RPO(rQr}PnefW?Y=eE`q(o?( zI2M;Wnr@@sg;tDdZ}QC;+{4Xz^*LW5ytm5@*orHws*8$Heo>G~kj5Gt!|BZPJz9^L zR5`7;PF4~NeYn*)`At`=UTZdBdLjQD^BRQ|vp%}lJ@_(2N;CF6Z+ z!3GwrEFDlb+4l+XXhuPc_gLr2=jDun5!5wQMG4H)=1){T?Be&QRtr)rE$~M^p}Or; ziICpVK@S2mrO9EI?>d!&=ATPljMZ|VJgw6x!FY2v5YuaFE1vhCmqmXH&7c}4F>>cn z1>scVbz9E|I@J0`*`TBUdFD1#D?TcKi<#*zFoc=;)%boz=*5eUZ=%&HP{`Byp~gRR z6z_z*!f{M-H6(cdMdWj(Sf)cmc;NysVq-25+jeB9bIuwc&0!3(y2Tx<;nEBk2BR$X zg_?MF!KPEM%23mh6C`!XP{DVB7nm7V7s3%!mYqGMr*!iN-#3~T$SC*LsKJNQ2nuGr z-H>(iJ{ox(Jl#4y1=OhA>25gaXL#9ac`STtxCeQ^oUCjPu6_W8%TlDdH?Z z49esil4x#fR076cD3c$_H{+&Vm@vleXW~=ibb@lL(2TOR(u5G#4K_F9%nHhAfSGfB zl9QmDHR~U-dSwdBNO2Ntf0pXzmH2{lzNCAsZ zrVewGOzHGDd~BeA)I<2t6W861M(V1AJe^1#OFTVERC;?L1LdE}iMBF_rXSj9e`J%M?Rjxe_l6hE7jP75 zvmJ|Fy{Ipzq|j@4Cw_>adqgbpw^`)SUB~4zGC8IzRy|*nOso6t8gqlUSh>vV3x8|Q z40F?6E%A=MzsuXZ)(|WWd*)9}$0RdVN%vrPECPMaGM8iBTP-j+r>!_SxJ>VEu*JM$ zU&67Egm2e@SFU-S>W*;8>GPjG&_DvoqhisXhox3_yRV1ZcOkq2fM|=c`rbINwH$!o zIcme_Nol~V5l8IH^a86j-r3tR4hdZk+&PU`%^Pe|`6au*?&)^ToT}TtX{&e4v2H74 zO*+a~#q`AOaY|wC;g@lN^dYiyZ4A;M1IZvO@%p=0fs-WSPR+dMx!N09a^y>^Kp<_J z3spk?=UotGsfztSid8H{dhdqo+SHXGMCZg|QG4dr@alrww6c6sq@pW{=YWe0_$wRr zFEY)=?s2TVtgDoNOF!a>h*q#qvJ33*2ck3%^qR+f*x1>EJ2RG3}<%rYeOK2s5+xgWc z$E#B5TxRZpTeU0|L;n-hA)=_E3uy=}lb#$R#|cQTM$?dRRt+z8gdYEgWovdRwDjk& zy-IjXVQt9LWnN6Lx-54<>+;KeY+YxaNNaIH{@qT79qkYalxEN{0S8Lm(dh=PLE^0p z8|qxm)!coPfHAQf!vs-0vf|&4^BuGfY)RFN>231gHDw=}HODT#Wvp83{g#2vnar}m z&apd@c#vj~QSWV&J#`$AR5Z1c5_P0IeE1-)IjTDugnJOF%y#0^^9bUs)0<{8RUAvv zq0=>SJrYqAyyAOUzwAghZY_pt)g6;bqm3mvE;z_(dQ(jc)IIoOncQ7`DXK(aA{-YG z>x@s=;e{cz{y{mPO!|$hml42*K<0JC50ABd7vc*WYv3G`SWT(_NHXFFpsSgu>?gwu+b^t5p32LCx}Xa z1srVj1aalg=(I@0(cX4T5?K3^93TSBZOxrEb z?=h{TU@Pv^1Xa}F%UgPHM$I~TiFRCd+HH(=;4L}T^@`4S1dl>2IE-sSO^v@>BHzWQ zO==9SK6&nbD7Zh@DY=v?C>I}BSz%gX*;@SlEI(1>HQSyT+sX*3buN;Q=D6^?TsB{;wfQ^_>l^8!$LsRqSq%yKIG}~ZL$-Z zB&kV7*=VjeRx_u!@@(fvCbp6gIR?t&nzDkJ3yyv?{SQkjLQ&Iw!0amQpm^cI>st=j z7c|v|E3re#Z^$i$e%K$I(+pZ_4;(Z7sIUxc6KdXJHhm?Cg$;@zutm0WmC`8 zx{6KntbI07+f}8!Sf94hL~^{j%g1`9>(MTN$aGB@5C1o&k&)W)+tGugdg@m6>p@5b zo6E@C(%Z}?61(Srzf&BqY9Hq^PtQI&1`R%oe`pkxq{KiM z6(0T<7yf_SVP@<~c=7CE{gETcmkC>Yu8lPy!Vq@zuFdV?U4w&l;hu4`fz-1N>zf{H zIPZ-_sFlJi-DWw*+Y0-l03rLfI9?gOR##2nn*j@E^6Lv-U6tt%Z`k$wXi(*bKSu23 z<*`e`f8Cgdk_?SuaU8~cAbjxyDPp9sgq&aGWn70M6;zX~AW z#IKc6RtDhrhv(vgu>81f>n=NdL)l6N z>;wNI<~=g?C%*rbuN&XED1C+#E^6`X5*1BKQD@5$D{{VXsxt*=d9=#mx{N)$e%mAk zcIUDFu=MA`WU%AwwSCyI*)E?TRR~dzqxJfNhxb)!HHOorZLyci0a7Uwn9$Ia_!~tG zu$9ib+7T^?ue>R@Fdz=-a*q8({@xuXJW=@7*g;Q$MB;hX3mj0RL1Wm_hZV2SA3{?} z^Imb7F#aN%4eJ_dzWJ83)iFcI)~R&)g|gnvv;Q}`Bc?%Yz1(v{B(fv3$rtFT_YjNs z!`XU!0>eSMyNemhtSlSErV)s?i4|cCeXk!4-S+NS*fjnvP}Ffby8}*Rh@&U1rctGl zmzbU#E?$~UWL(AmTh9D;^09%#Fdfx6 zlWtU|F_~II4B8-vch=PI8rp#xx|`V5OP&_nRmjTNOj z>^01T)JsOD%tP$kgw^!1jEi+$NaY2qlq^<8eRt07G$^Xlu6Fe@t7U+T4flm9LeS2DJb?NJz$0l>ndr1~i|kUA`G= zfFgYX=4Xs*_>-=+c2C}*jj=&0rBk6x+i&K>cZ`hD@I;-Yd?WfFQg$i|GRu7Nolfykh}Y-d`E;#XK1Cz9n#l z7btYvi(aH`t2ofo=Ki8GZ{hp$5d713awD(6H#i?q1^M9ySrE?Z>CXU#f+8!d$mlh~ zF{aqqAKl|4Ohxd&mfwnqV&jdNA6n`i!~>oe4Uuw^H#>8~3!4O|38dlLYTs1d-R%7Q zATo`5Y$h$97uH`=sYn(m?O(uIOScEZpQUL|=>iNfOFo?6lVggq*0c+U-s8@bIzv(n zLW`?QrrjMFb#v%@adE!7ey;SMP^PEtx0;}fd=@1GcCOCCW_py%QOTCnp7XzlgU{9U~VbT1q6dv3$4e>T-p7B=XF zQa5qanlfdSuLd+X@)@oQ%^8g=QohcdP-ch^VLp= zOFs8WhLTu75Z~y9=0ea2&xVN^pe^<)#COAY#ci!wzm(K{;pc0I;l;5*;Ab7)Td49h-R?z1)9F^(!-td&g_44)7q8~@eCAYTgW_>!%iO>d;)JJl_ zAXOfgN!wzR22fU&AlX0NZaxw|wr^G~BV)sTox%Y=nNiW96FWJpHfUucQj(Q0O9x;; z7WUpI|;^gsMsYsTZ?0&eC<@m%HOzZ&I3thv3JF?V3)*CExv4Qm^g*92gEliDOo{eOB`7gvJhd|Ep_NFiouW3^82Jx-s9H zu?Np+^SMOx=GZa4z%?rSpsW0T0PSlcq|okD1c&#{0B9s7l;L(vK2P}#jXnwT&G07V zG_|tbmskHFx@B;84$bJ}MgnqA zYVD{ouPPVt8l0Sxl{A*vS7nxSp-_P~PUJo6m<-pu+%Fx9QD3eW_&dp6T>k6JTK_p@ zUMDC5nahkUq0-9oQPfi*V}h6FSA~Ih_1kr7b+qLfZaB)cz~bLY&oH;~#l`1q$Vov+=Qxo?-SQgW%%k!tJ-Q`m2$foC3W@CW;BA@2RJuRckgex0uoO+f;>z91T=Q? zQ*ezU*nKmC%UcZZ)w*h<*&uUA`WDJR6NzxsfXQZM{R!w`%XOXA>ndIZdfa zz=i8V_8*qhp$R)A)o8}XAP+Xp)lSIkV1P4%CV?>w7Rx2f+L@8tF@@>EpQphQvNcez za?43v54TddmOLwo2u>M3NQLoavZ_GrD=+VVSR?O>?wsmtjXB;~T$0T%(Wo{G3!6cy z9~TB4+qsctktsj8+W9F0`$i8H2Q{oWP?XL$g&|z3p{0+ch6W_*-VP2-`DyzpqDR)P z@5oTdng#IDmFLcxN`m^O&?+gGzK$A{E4bfEhZUNt-#qi;c(07-5;1QXjrN)vvU(w) zHCWf7N^Df;?Ml4(;@NM3Ic2>3!ljKskqcnJMbjht-qKikkt&cAw*~}EEk?eDX60Qb z9#TUITN!ylkOQHmgXkr-s>XO(EGc2A!tv@@kGGS31!P?b@dpme|$T==BuxtZpSC`79B z+9pfc*Ui>HVhd`N787wA}V~`&o-KuLk;HLtiK_1&(lQ z8P-Ij8Z>94zn9^_I4%B4)T1lMT2hS${zP#YcfU34A9HbI62RHZerdPqjke6xB&PC+ z_#(-EQidy&J?w?3nr^yF3h8sDNWz(JsS5s6zJ_zkr47CkA~fU;;%@Kq^Q>Cx_T;`< zx@cGe&80o8&t$pDMCU*@bC3LKqzvBz8}BT0lTZylFrHctNd$TmBlS5}cJ+ifuia8!smN{v}QlbQotmLZI$HtVCM|Y2rv5Ue%X; zy!49ewX`*WA2n`r*d823-%7S8YUm?lX+-1=)%&zS`udG2+d7Ub+C>MLMp%6C*?Cvf zA_bmzZ1V*5Qr1PwRmsR>&Gp0dU061tw!xFurUB8#8>P?Z{+kl@puV_(P}(3ZDGaXi zT`Esi*)ag?r+Cw-x#F0S9g3ehQLhXmq`8lhW0wtRkGgG_lw@Q{T72Iqz&Z*kuuDx@ zeQ?v7kWSpyTz)@U<22~EPk8Xx>9-oBjLEatcerbgqB+dO>7d#hizHUP+htG24;^3D zx{gJTD!v82lF!r(mf;epz=jFe)Ghm8&Lut!A?X~qmh!lXg6fhyf!IVLWJ3i-460w>|S z8SXhV0F(sMQuy+I&BIk*PPX(G^D~-Xib|E(W%f?mn>?ke;U$2DkacyK z(Dw4sXWKY?*cIs+>xhC>IMHN#ueBr)>jlN2IPmKqh1OQWvon4;cZM=4IWg3hD^zOr&3HAH6s1KDYKSp&zZ#D^=B0+nxvK_+s8;@bT z%OiV7>9w&sKSnO8ytnhORDZiVzLrarR{ODh`BKVn8)_gt zkm`eQsdY%@5e|_EXL9R9;T4FUxhhpWU47%1+PF+$Ai7 z(qE@m9xPTKrP?VNvedJ?)o+$R?pbJRatC%MXR*Kc8A{lwaQzlxF0;MR%%pngfnl5o z&NW|A^_)>}T*JTu{fg5bZ~4mvaS>4}c1DTYQ%wX2$)3)|Gpdv|tw!nHxSQMB$GS(O zfUE_d?yf-1qk{&J;PMLx=jog3BcbadCf0HSAwxIaMo$hx5)~|>?yExPX>Y@XREhK} zwe8nX)PGo&wC8S|j}oD(zw5oPT(MO+=Uy2zYVa0Izxno6F}EMdt25tBQ&wU)EJ8-7qjMjsKl`uHPF&zgmtkPi>4qr5>iB_ z1?AQ1{(wNLcA%$Xq83RvZizx^LhAa9@9U9o%or&ww*K~49r`b&)m}&vnl?2zMv8E) z>BJ~tmemQzB-Gt<_{T#Il&Ai`mel`f*8Fb^Y2~jF&C4f!Qd9ff@I(@Eiv|upofiLC zFp){j{!-5OqPwj1#nzwlGj$E(j?)w4n%cZXGuy7yZ-(y(#Mz@nh`!GWgKllFrzq31 zr|F=|QYwU5VppG8z!!gK_W}}|F)yloSQKt^sYOxfp0)i*v3kw753-`!LxTkB7S3Dy zGxs5Oj#O7O{mr;xAn+uQwmM?KI2_KRx9l-zWO z2n3#YScY(PXxhwv_8@BVtH#q{_5n7FSD8$6LnfuMrc@%6wj$coaTm@vyZ0?OJV@i9 z)Ah9=C$z8e(p(M|BB;sl-3Czc{19D*q!_LJ8i+n#J@M(NWZ`E$1sc1{YSsv%WHjQ)c|^b!NA>Q=yHrY7LuQ zPva`Ie_^kq)hb9I)ZZp+TDC$!fHx9t>2T5#t-_!?H>%C_X+~9(OHOCvuVt{9-KM#} zMtnjFW9HjKqsZmww07@9i8dhWpRnpR@N207SfrvQGEH8lZE5lO!JV?>zV21|g@prC zMO>W9uUI+D$Q^LkGix~myR@JIrF$L5+oz-}-UrV{x%z6)+(qt--!}P5d;eqZ-`pwV z^IkYJ6m~gS{@XpqjO*y8)o6^h(8xEXrkVZj86XPw%Cj6%u3Aktxu#Ui+M~s*n}_oe zSBahvR{T>Z;nz8;wvTToMbLJS;5m*CWi++vcwCm)qBdg1i&89t*9G+T-}e)aJq?T3 zM4!wR;@bnCO`V`GpN*|mU;Db{6G@*4loIRq=r_J(i|g*RZd@cINXpK6Z!UPHn&Gk_Q88%>Rq!8c6l z>Zu@{T{G}RU2H*Ek%cz+32R>(laH&J)o1n>XLP(LPq#md_{`?A-TG}_DPCTB<`Bdj zP%|^=wZB=dC!W<-RnDr)eic1AWxDXYt`~thJ;BY&$ig-#d7)j&3$Vq`E{( zlOe?-EfoO*CzKgFO+}OJ0Cm_?9S=>ncX8(jw^n`F-B9W0l>kfgFX0#$M*gq3$}`_KO-3FqPj=;86p43Yo>V$SyIZ>&ir={T zpZ~SI0~X%#xSt>Dy{q#KtjA#ti1vmN_;61`49;PI;T zRFjiKI=nPeqT;U8Z^jROK!koH*wG6fdNZOzS<7^-PM9tVmXdidZ!hz6rbe-ikhHPv z=^B{sD(~?%jm@KmG{fV2$1WJvQIJ!#v^iSMtIv_y#07{nJS=#t{VjI^q3UMV^yu=p z4=GZ1>dpPT(tldR!sTS6zA}M$TK=V?SU+rxb}QiKCUaTZ(dTS&qNcm82 zZB$g66r~Bqsi>x^(9E0t!~W2w&r*+xe%CnpeYv{ea`Cpp(y@E4#Hoap@$Zc?J@zl3 z^R}I%w5+jv3=b_UXW(!hmF3ea4D7{-nj{ltKaB1!LVxui2<=O?RKc1uqWp$4C?rUd z1AZipt*@dMoa$2?L*+#BVv2kiiV9>$y@_b$^?v?ejGbjrTLILjX^Rw>0tJG!xKrGr zl;TbxxNDH$ZY>mdx8m+jaEd#W-~=h|p+K=B-F*AaemlFfv%8bYpZo7lZtlJ3ocBD> z=VpuYFxmnIjaAGl0%8hvB5V?MU1c0yj!$X)WW-nR-Xx);tL31-;KK+qWSlw6$&ra0 z^T2b(yFaO*mHmez*BzfSa%Ozd{}F998SDvo-D+dXPt-)Hl%r2kX#Vrw#U72th3{n& zvv<{?&HZo5v7P{jFTREjs@o?UBcnQJ{sEo_PUkV?MS0HGJr^TZo-`I`myJ>es`uhe zX=IPh8Dp7mZ;zf200x*ahAi^eZp;YU3|x-qpqZJo%lq8ycX9Q%2j)<<>$he%Ebt@< zmUu-Aukd(RfH=X}XXJ7&IZhg=iXk3cZeB4mpropoc+8TY3Rh84!R1bCeB)S&ZIIn9 zn2ZXQUtdPo_Iiy?Hk%tktq9g!z*70t{!&26gT6spmu`XO9aiwC`8nW=q^iNM$v;v_ z%<}6-&+jzDhXNit8Zx@OA3Nt7TJdNVz>SR%)rlV-(}G^JI-rj$p+g=$N>zRX_zkeC zH!6?fs2(j^!&!x(2l*9K-LJ42lEEftd4eabcGYVbn#Ao5e+%B55bTJvWWv$RN7QyiK%(zj?79agId)6>SZ*pEQ zqehXVI@F_NL>nB1c@(j*JuhZ$zB#1qABs{|S8>He+<`0yJ@zy5CbG8+NN)uji|vt+3r-yIH}jPli-qXw_%-8Dcq0LWhnJvduEqhMD>_Apn(k&8i&kIrBS5dP=vXlw z-&4ID=HzYZ5G{1$1IX2tOw76OAFs6;;>ihqs~H>QY2zqLn%r~E4k3x$n2IkSGV?u036RF&|_8yyk#1{`VGYTd@_9~uno@}PMDZt;=Vf?*IlGG}-L zJGG;079FuMzYva_Id#BAHAt`JF-in3uY6ZLA6K>>9klkkf%TmwcRA1Noel8I@H41T zvdGc=zA(U(=13_k&LKIVy%ZFc@$s90YQou_y_c+|utwg?XMuxdZ)Iwx2oe<-V~cq* zU~C39iJYC&=gnk}Ub>npPK6u{(I~pKL=yx=SXuteeeQN#>;;P0_eJv_Ug}ceckS~J z%pS5E74T)pco`^kQO?!Tb}aMe%HPHE{5vbw6JIm;-^Q50D^yfr7Nqa$sQ>5yIW zp)xM5cg=CS>)vOq2exwB+FIe_(#9E49EIBXwC+fJHL6{d7&XE-2aRS46|-vntv$hh zSxD_@fFqj6uM)7$2Zs2iv_~J)d(YZyqcnrbetw+}VQfTUt{&34Hx6R^4jDYJ`_m50 zn>-L`rgF+0UAUGTGo)VJ1nAV&uQchj`f)kka3bJ-+4ygrW@Y504dRDo4C11&uwsHi zODaZ;EG#Eq{lmv~fTwwj9B2M)O{{~lI97!@xr$^-f~Fvg7Z=nqY;2qh)P1nvS zxHIXZJNF@bUslW){FnrM>z+P!R(=xep958=$7*SCw^venP%!Vg%#t6ry>$CcEGL&u zY`UJr^sp(nI=?t6wu@t1dC^MhN=#Rxg~VSdCJ+rI;az!byDh(+Obdsv7kRJVtWTu& zgdMYGPE~kw7Ii`uKF9IhEzW(o*pVNJX(&FHu83nXY+@$&iQC^e-o_m(jV)3mW*eN9 zA1k)`T#g?$)QQb!Nn$$r1x1y5`LOAe~>~`xJw?09I)(H>YQ5b)S;rHhx?AE67?pR#-sp_NRV@w*x63-fN(KYc6Fj z(uosy6tm2Gq0ZaJ<8A9<-_`BDF`N$uR=h5tKSJRwH775pbFk--(dR7E5I1|AlMsS% zW#*KnoKFw0cT1Y6v>yJwDwef*n`ZR2sXmipB-wcp!g9F#eaCCsK^nCNXzfQRsF3hg3Cqt20uRDn@WOy2r1hlIBJ6BEbh)MTpc=|3$YRt{ zP_yBBqdKs0w^G5BO_KLx0BDdtRJvcdM*K6v-ZqnLuH`dVnxfDDM7YF1t(3+ktOvN_u2p@-tGYKRI{kwr@+7eLy%@$~a8> z3*n_%WHr2Z+4qaY!l3wqVIoUuWuc>44U?^4?UbV}B2`hc1{rNU#t_NIK3=NI@xJj_Ti+QLQ^!Yk-x_l3^zIL|exxB;|Rm0w4DDlg7lIb$i?mj6C}E+8!p89qR= zE!jarIgf0R&L2Z>w!wWd|?<+tmC zD=3%t(a!kr!YQ>=aUUN#8z7MW;0&22qQwj2DEiH{y*TT=A76b0#nn%ckv$*ZgAzMv zj@)v$c!c2mfG6H8N~)DLJP#o`n>uDzslwu%2Q*RpdNwrQAz5ix6cmA)|y8l>u z64Y5z-?p`H%v4-;u;v0N0F9DHEm;dn^7HcxzaF!m*xMZ&i`XfO=-aL;&?lx65;qaN zxLL-*`hrOh`>w!L=Wg&UW(tNXcSi4Sm`9nMJNeF<)5DV%+55{Ne+1B>{5r4)5SC)L zQfN9u$jn5$8}T^>j5==v96jwW@C#gl4C=<>;g#X{ zddlkHQtLQc+8(n_iM6W?wcN5dYqhN=*jrYON)rJ~r7U9K*Sd7Wg&*M0wgElD*m|nt z(qG8L(DWYcq;Rp5T4tQfLBubOTFGx}w)T2R&Uj07e>Qr;xQ{qo5W3f&?)fxMsh+0BC zuQfk^9IU`t16G7~Zy5C>>Co#>?=|=kuhMGsXMPn&epM#gZb6W|!=X;mH>g&>VyLhv zkwqzC<|mOHwV0?R+2mhAOx`VA1i6^mk#@Rxl>VALHAgKPi}^5*wdP^uRsg0eEgSj8 z?7{bqcs>hle^+W^@x$5UKa?2*u?EO{B)=p!mvTrO}Yn#fY4^hs3 zU`rdZ^i0z)_&j^)*b-h=Td9>Ou1zkatrc-}(4M;qQSv@hFAAS|isypfFT`TZ)WBRt zF`N#-k8fs&sOw*|QLMbZ#ENBKQV*h?dJ6nD_QiC7q$DWszG^Pu{jmi1ss6rKVy5&< zc{|(DSJCT_1+ROTzCKCT^}Z&?zYeOBJoUZawqJ0+jW=|Uw-qp{^9}Ld;Q@r$?Ij9Y zZxsz&T8*4JEbtwtXmREZyut0Tx25cMT4nGMh^)wW&t>6LAtty%#audqEeKnh<=BbuF{*ki4h2N_q<*gz3sSZF){ThQI&Nc^imy&^WT`y z?~gPz2YU&SrsdtW{>Y-R)=EZf5yR%~Y!5OT5{7z)pDx4`Z*Pxop7r-%Sxn=7XL z7ty4^CIrRg>oR?ZZy{_@FIh<(0x6(ISgNfc$?M{@W+@I!jpK-AalVjYgj1X2g$!rJ zuE-xY^(d0^+I0OKc2<5AU96u8cCQG==Qv9hE#vsnGs=bfF3V|}#O!YjM`ZJrBqd3Y z&U-m*Tg0#6Wp-Pj)?@riTYQ|5?7Dd7r-v{q*n^+lnbjyHwl5);<-FkW2cSLB}@@;_E1|2B0hk4AS-^-xA9f5cy>RG-s8I$uvU@M%pyiwl|99ZTBC zsbhD%ojj<@(qY#!IDd*&A*=i$^MFN3Oe-EjH5V*(i*nC-V% ze~RpA^vfy}g*LR1M`dx;CDQmPg#1GZVs{lw^~f7|Uyvf+0p05^obg}tf*UYF!(KAk zPybAk9~R0FrJ|-|k2d)77b)g#VjWIkA2!Y78EaQ#h^_f{Mc0+8hWbo`(iJC-L`TX; z%qPOsm3TA$(EZ)nllX^n`qx(idVh4$%eca>qyVfJMEcCT4Z7Sk`-|8g(n}wls@S+0 z<#z|ojeF^|iFM_{6{y%IH+T23N>Z&Dz8mf1SCBk#GyEnyGib;dJy(9d2~9qOcZS!z z)<|y!lvgT+id#au=%;DOF_>&9+gnlojxo5T^5wffD4`fjC6ZU7(NGb!dprM)X~*Z$ z;Ts#he<+P18yTZODC_j(c}=uI-tkml_<$Pv_VBhP{3)YZyPa7{6Qr)bXPwYU`7Ms` z;X|8WwsqFVmNcREd@-S6R2T^kK7n^))*o1?b1j?n_kSo&19b`Ejfn3jPC<8ao=!5P$Mac%+ zQNf>{eT2*Q7WA9%J$e`ao^%D73h>gA8bh5B>_R1F!&VldZf$=Z+-0*6Bbx7;$xe0#*3 zphw&*4wJl&YoIrdJr~JL2I#58>C=p-|TJ=*y|kL%q^_z#fVrZQw}rXzBqBVx zN(WC@70POdcaFezC-37b3p?7^E6dH&mzA9MIl;ZlwSe!f25bR;!APYmyewpE<)~8j zgdmntkFbb)j2*I15))41aR~DRyyh$twc3U0v))Dmj4PxHObs+X6@ReOL@!(*!zgvy zMP~D`#P5Z#06ijJzig)Bf|pHL0j*aqXWu0q&$<|=mpf$Mf%iXGtHk1geHoV!Yap<-5MwmU44I0S`P7Ma}02dr2ZVyAcV zJKsK=$q4(_hxZ=}-7P`@ z@}umBHlpX($@)l_oz2)Eeid|qUXG}`G0we7Yp8%gFaOdCg)Jz(UF__aF08DlLl3W>1_g7B zr`7?`R^Pa^WTZATWnkW1bzz+!yV8nimnU*zYrzBqCs?m4QihvQFsTr`a)!e_fsPF^1DrZ%tg^Br z<)9o4e8eZr3Pm=&+==Hb*0(fQXld({Y(DmFQrj!?u9)wjf1+75$r}w6UeV*Nxw}}= zFB${-SFJR5SusXm8RE14)jFuT3)*7r9e;+Fh}5w>_IH|xpZlrpF~UTHDlRdK$PC}nWz6UGZW3ZzO>z!s3C;nlZN+Sp$Uv)q3I zQO&=zESR+2?k=`ZdoP{U8MH9Pg`vjwDsokPdDon``i@8e<6=x;`}t>%W+%;{?n%c$Q|3^(vg7;XSe|ol8AIM4RVGN|{rAh-J(2#u_ZoD{MrU&T z{I<`>RTGbmHywMMMC{u|9_nwgJQ3R!@r0qP58*Z3nGQEwWov-oUM`i`f|2jeLvwS3 zELLfDT}iK4eThC&pH1GvO+;Nc`slfz57%fDFjze>6L?W*boD7{kA6>(y2wt62tezj zcI-L+xGhE&L;=ikJEt;5W{#U2gKiFG0)rKN8BPk(oOPsW6OIHCkhg%OZPUzFo8>nV=tXY`U@?J!QwQQMD~DV;F}`+m2TL=^qLS1_((OnG5XsTRP{&t|c_`VpqaW z4qs9=T3})XcslNc@F!WpI>_~$)=Fj%juOcX(UfL)w+2!HUbFN!fAx=%$B~DT`pFY0 zT&v-jpAM5`yr>Kj@lYo!sQkEP2AWDl>ZMYa}26^far2W|4o6cqDzp|Ek-{r5>#@V=9 z3j-n8f0c&=+MBer`Ou9jWH=}$bX4B1F4$Mr{GOnch)AVR`b2PU-U=^Sb2Rae1Fa4` z=f`D@{voj%!Mc5=_(f_|%@cywys1!ZI0x0idi)*q!)=fn!!0PDsxpU7rlG^8v7@xA z=Iijz;Z2U`4E)VNQ?tgF%azRq6AhY-l>?sv;63xuSZWlOzH&4l&#Z>rXKJloch&s0Y^#%8oAbC zZGx_4@@FOmUzGh&9ToXzF%m00P;fF`Y;{yeSS1%b3Grp*`xNX7(_cw702a;CA>2NS zp2X^UB`5ZTDFA(xtrYRQi>s$zYyXi?GVZC`3tvA8#nB+?C^~f?&&S2v*Wh(!f�D zryFlxbT&3m$!X|hl~<35%M!U(q!bM9vy}6I!zQ$6-^$xDlw}F+(y7nYK1ZIxw%>Rb z!$T7CwSLV-8iKOIN<{2lq4N_b5B^@3mg3+xxhvWmz>xUtQFE*973AvgU%3V_a6VlX zpMy4Zrn5Z)@p1VX0WRi!HI)S4t(~Z}v-8*4ZZxXH>gTP9dNeON)V)%e7z3Y8+>8Tm zfw{LduD`n4b7H?MVZBe&z~LT#A=8*ZCr8??3|b6TBK6L=6;Sl!Le!2;WOMZN(Q6DB zg4m}@JUY22lv~g$r1V&snaP|nf_!f{M-kIGA^1_@!pXy45H5zsiwx#+yQ5p}&nq@H zKXf#E1cJrB|5+gBCsf3VU<^B~tv(z#c-eE9=Sdy7A%3yy<+r@J1lfz7#*XAfxuEqa zusw(+Do|oU(>o@t(0wq`h_k+xUK5WSNvY+qa3bAtfx2tekgAo3-`^{HAkBVEGOlkwlRUh~`S}tjtwJgDbr)uv zueOEudeUSCH3O(VYEop)zo`~r$^XUnPR^`64c6ar`wvAh_vS8dz75Ik4Ulf!g+J|e z-iV{Gtr`G?yPQ`Z7yF2>3+u#3h~G^?5u&vL+=@^>>e8dB7fu;(@5s2{|NN_X_Q-p^DqeeQt;-6O^*HQWFRbqJ&eaVl{+ z@Ys5H-yx9uR{Z86ukN>>e1fr_9L#f;EMpJ2 z3o$x`8WEaj1)yJblN)zt`?8F!mq4oye#tIALPOlJN^=-0*`Q@)P<~4Ok&GcDA z3q-;wVM#(-?;;+5J$ngp?X&!z*elbtpx<=r@x85T5S|QhG+xe!XVZB&>OD+U3wWNc z>Dq}H&E`(2gIclOtN6&t7J-UWClr=acoS^GSo9VIj9Ia22UpjJhA&?6)lJk$JT)!; zUADMa^>=%=rV9Vvv={gItp89Y*$iE@@A(U`aLN=2JR3fxI%*Rz9$#56X}7P3+k5O$ zhmYWhM*DBs@$fY-q|D7=4bm7=%dd`~hE>}7-Wn_fvE(HijI>Hf0Y%0)=X`mOn2x(E6BPW|XE05Fn+*opz&%@BvoQ;a#DiC~^IuCii*KNaod_2{lEU z6|W%TO7Yll!QJ(l zWR(`_G)j@>A>65}57r?xMp9Ba>3-V3T$*4}qpM9MX+y9@Dc%T{q9Q`qTcHitjZNokP6Lx(vJ{8$?Mb@4b%^$u(cs2~b zKZ7paJN7QsB?d<+%j)O7*SmF}qdl-pqxq$$E;})0*g4aw^Wl7L=#_()K;wtEUT!M1 z>$E|(x2z}Z!8UhYy6Zqa-Oz^E;x54JzsoyUq__MVB%pJb<=K6t06YIZ*&ps9Il1kt5!1!1fUI`4Rd8aj+M zk!^JxyWIcLyCk#IE3RJs@_=g(|yt6d$3w7^;xFckX{&~uPtjLre?LNv8g(t0;XDOk^L5| z74)TLMgFOVEn4GD5$tXX9IPXaj(&qnY7hs#Js{JKg+5FqlZ?ksGvWpNu_78;3wTB@ zNW-aEGVUdnBq2<;5{%0KnnOc|PFsb=7>ahM^Sch>FLFnxaG_M@`wykzHfr{4ssib! zT7Td*bD9JJf^JnHX3zr{$L~W_5OGo2q-b0Q;vKYTVaY9LO-;6Y{w8K*V;NG-;bmad z8xVeoRy28)NuNgOP4^;cT)Lzv9vCjo9#vJ+%!?s2FV!>Tx|nRJ2XbSUqE40ja7@p4 zk}&x)RYWUUL!DU#n+fTkh6CE_$)}4>Cu58XT3c&L1f6`G#zYy7QWN7{c5YR-^x3T^ zH>tevhG!s(;}XNkcZT%~45-@K{bt(8^_)*xX=#f4Tu$vK-!;4p99xZY&)vF;35HOU zs>`(*xWqK4_faf7JJDI_V+@$J<9wtNLqLH2z2>@ELnDUk?quMoqm8(Fl7$!jMC*!{=SfKT zvn3tQe3*(Syo_v&IhPB4S^YtndaPBhB&jwmI$8_nqI)I|;sfpb#0lr`Xv{jFDwWZy5PZPZr{ju=!$6;5_}=5s;%tXJ&bT?FHvLg7 zphr&SU44Ym`!6^H>ZDvPfqn-)29CbRCK1>tvdY$;;Y#@c+w>ZSzqV1ipKCfhmtB_5nj0mUX{?3a* zPP&@;p-C9q&w{9Z)t%KB<{}a20(ssJK2?t0>(7-pFI+2h}G_#27s9b7= zl0W)N08XCY5I#0|_1bTX0z9t64*GWLeTt{7ZiYuU=FVa>yTON*p-wB1amj}AigqtEdAU_mx_)(osEivYS{jQ{$>7Mi|K|ou5?KsNd=veTX~E}iaAkS59K$R zMt+h;i30!`*o)NzXl%9aq09jPB_9RiS%u_f^)-5DQEFgDLW~b4O|p&TaRTZ76eEfw6ioV>e4H3kM4YoVX(x(VHteYS%N! z3hbktgXgvC?C7t*x2EQ{w=-@|;x>+__dE(R@jtc-qZ;*}`%WoFyIOQ{BO~-N>GV*o z{c}GLNg>7W;P<{8@Iid`OIxTh$FYB^TsF1jJ4_)ezp}vmEkTE(hFBe_te-`+syj26P^lc5;KtXy!H|^XrTc>-`}$HK+8OdGC32 zM}~*i?yH?oY>!LheD@BGQk8)5#~qd7UqM1(!4_*B!LFlxvxDLgPY%A3i8m;9&e$)) zrpRbsQ^`#XS|Fo8KE!Idx!tpcH|hTg()*8Ij4p+?&d>gh9GUo+YtK%1b2HsKd?)KV z(8=|`qDou%fj4p^sz2T!jBAn4!lN&frj2?cWG0e}^UjEv+Kn+yIgS@&jP?$hq`6or zX-r9tX|*IgC45yBS5{|v{H}uBY7?CyqVQvpA|5)-cg1lj6l6)6+Cq+sGS0rD@a<%$ zb%(`Ef>(1mFNp2F_>WLCMHEnXgWo?6{6ooNdK7Mz^u3ndTg!;68hI4GYYLrs`UdA> z>F5OXcBa>hJeIldl?xhUFv*22cjCpdi;FV~e4AZRGZA;^2X+hTlmv_I$KI$QS6r*S zm5dCE*7A8o!I-RK8l(6YI$BW-ntHM+1yq9tQ?Z2xMou^TY8S|<1XfZpw+VNjYH~<& zd~O5zX{kN*8Sfe)A@Vn-N2&1kEO0ZNMtursKnidH83$(*5?(5)DVK>WHnN+UT9s)| z)k>;Q_Y*HaEw7WLL_n2fJZ2!pRLj>3l(8o|zg`@60IvIfqTLS2_uDd zK!^(>E1)HB!n^@?ZU|a{`^na}W~s4>lX4nq^P}sJ5tCaJK@(&hFkdLd5)I@U?sXdL z2mf7#*?5<>`+T%R`C9Q=T`UDlYxl8(rMuhjAaeI3xjLuV(SG1Y39$du@D(aAYHNu) z3X?*BNJc%#iqhn_ctnTHd@nLKL+KPoL+GV8K|Siv&O7quWW7pCue}rBOIr<>-W}kC zNugtHI)o{fN^;L^i=P(M8dj;uYHn>?Y=Of|D~SLyy2BuU@p4_i#Fqx5mNO?&L$6 zbRpdh32U>E)kzZB`&|DK6B#`HR5#u;U;m2QsV(M;;!XZ}Z=`y6kz$25E6gWSKy7`Z z{tBOK&=fwM=;HJ)x=)9|b1hBB>LOEdz=b{UbK{zKLsw+AGOn91ll@tfv#AZq?_JH+ z(WQ(Z@2F4~cC;^|MoNNPuvVc4prGPMJ>sU;E7--lwqOsu$EI9CEkh9EB-* z?fGj72lewj19)~h<$J@x1qBAIrG*JKt;CUs)b_oJ(tvD#27Ot~k_<%+ibw$@G*Eu{ z6#HY}B1oO#caf~D#R(XF2R(X%P`ya|Pj8nAS+Kqkz3^kavwS4Kd|$j`N^Y8H#co!0w!=U?c%p3SpyoBUeCSe|sP0 z4@JbKY*K{+7uqM&ZLY6rl+@*ft-88diDOohXl5?yGn)kiL?OvktN3vv16h4G0@4~d`!A~?((g-iUlHcU>08IuD;Y1i`FX;w^%=bN zj28~2Sx^c5`$%wJkG^|KJyDIpOD{KzqTxyh$@Gd!L%jA^`?jIRS2Mde^MBm^$}m#; ztSc{^#RWhy3epL2r77%0-7@d=%zWNVU;&25c1?F5`w%vamnD;8Ig?#uHZ~Hs4&!v0 zgJ#=u`fszbU)%7h5yFJ^$ZhvU&=w6lI}nMjN6@p&$utOFF-7?#KH8Y;+qhKr{E%2} zh6%bRuMGgMT+EMis-+bwh4d+NH{A-0JlxFZS8)}Jw)=GheMzHPuN&v)v{c@1i1DR3 zYmR9E`Sp9_a*C%vt$OC_{XN`W3ucvJj9|o*)NDa%WT{q?F-=_9O;(J^uuIOLesJ+< z;ZoXZRcoSiPUj}u?IJ2ooQ$Q0+8hq`Fc?tINSIOECJfDc zAoD)!%66k&$Dt{hH16-O;;a^QY;BYgWl*)kg2opVa`D&f4n=J(Yn=4f==7Da6ecnI zJTA`4x>o4hVcQ3&>#i@dDdlNW3T6ovSQ@nPayxsBbNi6UHkLb;@j<(#8Q|-?LM6+Z zq^Ovz93f-LLyBTEYhpmB^0;(!jy#p!gT(-@ix3NipS?^y`eWUHc?5=8Or{bdN0U)^P(S#-1?n(*fs?y{* z>cFhjRY$s(Few*$gRs(hvKQ3B#KWW43l)`HsVOKgNvs$9ktYWx(@@qTewVc*@|Cy* zomq-L>BrY%(&d+8f`QlcBp%J$JpNTDie`JUzlq6=sxG-4)N7>m>^+C1w*}O|HT;aB zJ}h}?37H{$&hxzNf$K``?-?L;eAhI`1&}A%QdSjG&YhVn5#w_R{5k2~NdT zEJtLBieBsP5l;sYpX~wZ9*U|-$B4@LF}v~))Hi2 ze->oI|NZTaU_)qkP|MlY`^8f%COMdzOSG)-DIs3Fx7$D3#!E&&n`8D-5HxF%R~5 z`jY53nkou)Z-D!1ZwBu#!~wFTA3C(uaqzEwJ$(M5p!I%-UOwJ8p&IZvRxPggbqIPH zpHni8h(EO*Nr?VK@$&NA=!2aZEl>~NziFi%)Aka}?sy^pr{0E5_ScxUR6^DF9lBZq z%^1%-m-aHd%v$tcOhH8g5zyD^*pxV{%`D%A)G5Bbd|g@Mr}2@wV_BeTP|I7{V)!Cs zSlPE2*}=iOAi?-rz&FOVj6zwDsYK7ChbX386Tfzf1$5v{mmKLR6qSfOKo(2Uf=Bh{b@Rk$`3eUvdA8!^& zZ}A75Qt~Di!{QqRy@t=KE^jgB`TPRI3q-3hIy+SaB&D|N{pwuK*J_=-|7_}7A(4;dX*8?}XC^-{=XZ%5#|-xeR7bY*5qtj?!HtfpOe3@vXSqDIec zQ0#1CR5H~bCsaiET9Z(0>^YQz1s!$0T`9BuwOre#>#0FA=&MXkzt{#`830mgA&wB?oygMqbQ>1)KycZr!y`6-B*#eY;~J)_EzxEcGLG zSl}$~v%}^>aq?vM6mIO)UaPbmTM0g4NmSPFX>oM_j&XU*3$rjoDn&dYOC2iA&(-Ea zOLJ8>J1EY41$6QKm357A-%kphQRv&D>@szKm|(rqGc~i<|_ll|gzg77z zLOD-sT0(~ax`gp=t!|x#RAK#?SUiEM<|gk*SUo6wP9}g2`xeOM2{i=Ai1Z?c<*98IO}%KH^Y&k$wf0Y~ zr&Q2t#l~-)+LO&Ap!2{JsmHLWV279zm^BV?_A@+H9tbVA-Wkpbk|i+eF$2pWgO)?U zD`e-xZ_wPOjS|F*5mrz-Z1#JeSogcCKpaDGR0trhG%hYIEQ#dB`_kg#uXM2=8w;OOSploSbV;vJy@q(aef@F=9v&ckl z(FuQsd`z7)#%Lm|b!-LPrzBL<1=6AXq==#|nu?_00$t@_0Ev|Cy)po{E#lXz7uy3d zpz()jrd%Ys2Q_WTke&Az|E8ZH8{3WT*QJumhQBB&-bi2FyLa@N?+wqg0~f~hxRT^} z6+Cb&<*aCV&hwXJ4gY38vWsWCXO~Un9S6blkk>hxS}YBDr`(>2wYoMlM$0u6<>aAnOp}AX6nPT4W$Y-?pr1iU!7P@>SKN|EzxcbFrw;5a^q#bNT=-t^NKtyPcKm5H+{Xza+rExMeWHLcxo zWlWr6Yi;+DWaNCe=C8x5MxuFZp0nzDb{)rL`o_M9!NL9hl4wO@b%b0xSO|BbS@3~Docx4kJ8DB70d z?hY;PUL-*9;8I+JyOb6!4#AV;7chI1LjB` z*^!&yiYOLv68zG@f&bZD<$*8b54rx9w}PwUhTsVLkBq5ePvV#HXm~Xs69eTYl4f}R zTNi6z4VhmD4pcd3Q6c^uwwFwRxg~X!zbxFnDfNLJs$lpIxg|4~;`E=T}8u zsGF?*)3HUO)aNg2>vCQ7D7~?=m*<>l)#RhQDCIHm1OAJg=h4K3RtbM!;!X0a_p7HGHEQd7p{A%y$ zppFb-tOe{~3_(`DL~6dh}c6-O7DM4gENPI@QuOWI-DQ@_(k$x-^@*RiNW@;Pqf~)G^hWn8ff6+A&}2`}E8B z8wo8@?wf80Us42kRtkjLf^=7Y?zIqeWLb`$@PG8#i^;02LoGpVn|tz<0D@)PN$OYS0z9y=GDVEb?uIeyMv`@T#aak*13AZYKJ z!->nu8UIMAtxaDFtB^}6tIURReM@eCH+e%bN9J}_#VTt}uC6JufUhX&1Wf>H^6-JafMF?WJRKq#1 zO&G`PvxR+m_ORl1nUq?Hb6K`f@$r$GX|+dHNAf_hq~T-uZ{ix!PYytFgmG$HV2`s; z=IBPp%GLEPzQ*-B>@hTYv|ICSS|+xp_JcS(7k_yorT4|oL+U#y4!3QXb9${Y?Y@S^ znh2ri9=H!L@N6-04{3ZuJx@}lcZ2~99vzma;u>K@zTI-<5d5U2wQGG7aB&E8q28ba zyP4IriD1$4^hfmDU98~elRB^;Z=-guG#WL5EVS|*mCht-7X9K`cJSz{2I(P@dVrU` zhZ}Vy&CDk`6ylK{iZ4CmB$^mI+bj-$7xL^$8TO%Y8(%`YW_4+npsa5%R`W;2bjvLQpS!tL)mw;9arVp6-FeY_E2$yu5U3ygKHf` zm{xWlFlc1=aA4BS1TdkQDYTS8rqrP3u=DLHMVmz8g(>9^BZJZm7r2z#3Gz#T<2|n9 zdy5(oeLN93|5Z8-F#fv^DhzUa){;KD=8U%?iYUj*Z374d zU<^}raAXJ|JA37sztiw^ls{X%F&oaDzz-YOm$k+}WQu>$??}W~68SoY)}Vwep%b}T zGpAnDnxdo?kygkoMA9N;oIWQ?WLT*UiW+q zN5aaJ*l6t?z-GUtMc%}2^!N~v*zz~c>x2^J=fgNvj-L~Wbe(@I>T;oqlSVR)^EBgl zQ;_wyg`th;ID-2nzB`Rv;Xe_512X_W_?(z+kGr?ddlnHX^Jynmt{*Be0%Yqx$@U%7 zM-nJ35d3KsnIdfB$;qs8e3JFiU6{4!bU^7(uLGx#iY_h_5`Jt=u%@@Ie)`5?nZfjSgr29(aHO%O|ROO3~~f6=6l)reD<73j?yF&eJvD_i?fm4 zmWEt<#g_A3HeT2&%qRvMpc-zxB*zJK(n}r)3&dhxMp`#FoaG!&ZVBJ^&F?yIpMET_ zd7`Or{V3sO^XnFvU|`k>e=<&WG&tjo|2W+D7353WLsZ}s8JNZH=(9`f#dP}hzUf?l ziPYq=nosrDt)l?bG+hL(Q9|dywvroB0DkQG_ZV-PJOc~e_Af5x_w8LD9KJtj+}0uP>7Z~)#Qk;?1Keh^x84G^ zYv>1MnegRxb_I8Y)U|F8>72*LuCcx$QNBTmUIjv>;wV_5UdX^0?jLN|m7CmglI5Q~ z8&m!Y)$U=EuPvgKE|`f%079u2p#zmEBOHwCsffG}HG8s@+ z(+~n;9PnG_DLj=u#;A95Dr2z|ys!xn$mu_hVF)UblfH>6q`8pT4mA%}-lW<3CV|n$ zenUuBC!t1>b?UOeHC%oXPL{QvTSb7#k{UNMUmy==6$qdP0X299)SC@gRd!!#Vx^NI z-FiB8Z5vF2w1v{9={;T%&H;+PXUHj~DQS_X$GpIM8TsYtd1v6*5=3&IIFCg2ghjr# z(3_)DzW0l#G$+P@K^5R61e&p8c-*0$xE0O8jR>sds9zw-;%SW-(yi*1Q~cCxBVYn) zdQqb)i^^F*63noX3Yv6hL7_owHGTnG8F+8V@z%^DAR_~a8~_QUk-)Epc(LcV@n`D@ zZXVla0FjXbkvlPoA_f{~hG*Nh5XsZ45*pHkorkV&&Yv2S<2UsuPG&V7BIOwFXM}Tw zD>`{SEkT)1t}q;j%Vomxm8+S5Xy}v8EeVA3+zH&oMwOS%X$Y(O$>%mNZ+-@c46lj> zE@i%aCp5M0D5<;Byfc_H%b@`YeU?#A`a?Y=@x(|dO9?+G8=H!FJx zx>0WnluLYB)6Q@hwx*ozuQbAd!87)p9UbooEP1pDUH6#@jxptqvH?`&YeGSMYLHSJI(<>3>>H?WwVW+)@fWt<~sVd`Yl*-ww@bTlmw0z z=fmr2;YxOZP6bcNt0PUd_zmP`0+tNsm&BjiJft+i^8wG_EEo$f9K_k%P#rA|wm%8e zgiC__Q-8~V#s4UA*`0z*mfF~b7e|rH>rLV1j4Btm9X=I_fB|jU>vYd`Sk*~cRK5_T z*bm}}&RZ^g6KjxR@5qweRA7O^PWqguKcW1AKRrI@|5X+o^vC>vH?jYp7ycpsFPkKW zPQPFOoK6?*Y5=I27(^WswxaTDiH(M_Tb8F&Ta{*=^&EUH3|9zL!Sf>0%|}{^3PV}0 z!+}|ZB+k}JlBT`DAb1Mxnmya;A&$5Ls(ZB5A+Ry`{~cnr>JhtpO(lm7vxgOLDaNB> z*TO3&>`e2+^x(gn>kW&j*@k++w!ou6#lEcSts1tjy!XPJ%fdI$n>GlTq;Kb)^0 zclw3okNyOPD`syFRWaw*Q#0mSP%v7a}ch)lS| zS-h9<1xuf#>L)GXwnf90tUC8RZ8Q@6qLWocP2Wy29@|YYt1T%kLdbtEUhfmvEsk{I z{B(_0kV#XkTS(~J+T4;cSI&op0!lxQZZA2A*SeGj|1e{sA?E3 zZN7}*k0l{hO{tyP85&T2~O#=>j3hYY~dy$ z=X(Nj*3Qh0Ffs-`c$#Tb9(^)QG#{gU!>|~4P6bwq>ctuTA)sEsaIm<$NhbZ$ZTeHE zGeh<<*!1R{fs%&ST3DY?J_s<69RzN7TICCX#QWIksw8j@0j*+|t8LzFGmgZc*LKtU*$Y?JW>Fy* zS&%>Q(KxG#Td{0OoF2IKKH=uE=u!SPV?3{3Ojg2$m*H6*T-D>({-NLeCDXr5r=@*i z_ccUjMT*Afblul38atx~x!_H*a_kbKck9Gmg-}j_j`TkZG(4H4ky3QliTVDP8c?ex zh$X+F=(}dzGQhW?a^zr$ga3gH=eAkzGc5mOdr=vlXLf|AByM>i4MTnDodHRiKZ;tI zWZWMdagx8iYEnSc2KPNbjio*9U(nv=H{=8#DC@L8z%~6{B_(eGR6KBa_x?IGZosl( ze$R{Z=jV}OAt^IG5}ie9x3$lc_lo7e+swUa5#I0{$SkN?CW0w;gY>0hz#?+cYMiD< zBMB$PQkMw%>3lxG!`6)u>4y`PK02~!wCkZ>{gL&v{M?MwLbXvi1#T2wN)Pkj6DuCq z`!!{ToG41zLwta6&ys8lf*zOK`tw4?yD+iW**fG|`9t%ghP4Qt=4Q`QI&ft(0)egS3mj((Ufe7)21 z{){Z(yPt1_N9~E84YnT&WW@pww?-`0Mc3>!Sub}T*y7yu_wp|KI&d12YIZ7X%Sr-X zQD(CkF#)r=OQNQ|8r(>yl)!vql%4V^)#ViA_0OUb0?lI!4eBriZWrfnR0}~F&6EBH z43VOC=@e4LXYH$WZ#jQR^3(F|NKD0Pcd8dt}}FGyaF5m8!MxwXjd&Hh#>E8E4v zj<_7F4#xdXAz#VR*MOm)tfE)pohDQ10EO4vMJc6ff#{uo7BMF)%8EjZ*hW28#pheU zbttz69t6AgcKa%sP+y*#euLOJd@wC1QjN{Y`T9Ar;BCx(yj{aHPwU0nC=QZzV-XPg zTCZ<>(^}sTHGTZ=vnLP*y0|aQVg5$ z`Sy&+6h7XB><<#)Xv;&-Y_oaJTJd^F-2*F>Ky`u4)2Ibk+xA-)M|+zWW#WL)vu8UA zz_kU+1b<9o;zPUB(0#t#^}B~21y|nLJ}p=Mfmz!oD$g{4W^!0K2feDOQ{xLs!E2J& zqg1y>5q;ucOh2)H>CQRB@5WGhK9qIu9}Ei-hv)3)y>>;c0D62E4P;t8+tzy@OkPV8 z;~sq(o0(LjulT$Kw%@KS3#6pXW*-O5KlabD^xqhu+g+a2~y z02xeXwrT|2XbwZN9;<4+Jc|9?hkc5bLodOK^1>X(HhNK8$l)5rdx4@(w<jKVSaq#{)`_EvNASX}t$-6tntcvl*ckd>93nM}qPNN`Emi-Nb)1 zH=~Hs7bHlz54Aiby~(Y);`Gj#FWJnSUI?OMBJfef`h7<5xrGbbkgUI8V_&*vQb!UE zji%F#FC5#gsD)4t8A9?i%6*eRQ|kyN!&=}OH^+-Z1k!?yoV?|FX6o_@>I0myUz=VP z+9YG^Whlmqu>>B0m}iI_Fo9@Lwiz_Q<;kff;@$+je={|(M%R0hUeJHU-by-|?_%@O ztc6sK>g}(?UjmEPm7aolis7S_IIep6iOBG$<^O z7o(D~g#_(_h6R1&&}8k_@>59>6PNaY0jG-C9TBSG!q`xiH@%~vXy+K%Q+NFjjn3ha zoh$j}ncHu|w5Y=%xNgr{au3 zmMsC3OZ7_s$t!qy*#iAZ+>P*Q14yG`@J5ptyW01wPdYJ4=SdTP*5CP-n;IH3x;tA; z7WK3`Y58&@+EfZn?RTAwRivg_bF7ZUbaKam0nVmA(1RhFTkRncxQH1R)m^yvpxxt! ze{i0;z_ZKW+wtBZikB93hn!WH2UH2UVA%yE9sDL=gdxR{{gBhyVJj?5fCY$U)wQzE zpl|C``%>c?u4(DLX=M$26Z|s-jzU}<-JH*^o5J=f+78%f72a57BDS!z>-pW#>b04YM;{l zgp9dtwB2zncG;schdc-gzee_(w3X0|Ac1C?L`_x$IyPYMlJ>c4&6=RYmF{*%Bnxan z$BK(sJ9A`&Q{?I*U6;z2GxfLi(d89wII}_3F=BXIX2d7yP74KO3KGZLG63&?G&$>< z|0cqFxJF~q3YC^fobKH@@nci96QP}{E!;rfGb9LFRuiJ0 zS7UAz&pI2IYLrO-na=)>08{Sw2oxidFFZ_HT{=wfjstZr8d#;D$K^zy@ls`QTG&52I-sp^4 z(BC`DaGjDZut)1#kg0Q3N#%%-;ZEI#cEWU1RAQLl-jOr*% z)vpO4CHeBkTIH%r{F?yNLI$}xw40Y}yd_;--#TIu46y);3_)C2EKvSaksc;7Ir=yM z{KT4V2ZksP>Q2}vLkK|Ht~53Ew-oO$_ir;_W2?mQe`#}-48s&z?6OL~#1{)MWY+%` zxq6_ec(>W>)SZSNvo6NW6=4 z*`g;Ft(cyKa>BaVyd6Jo=YtZ)YT6jmzWq`@T&;+CQ0H{sRdnaL@i+;23&%FR{sa1P z{bgGpYw*5emoORk*A(GlS8rAjz3OMN#=*muAwQ90JTeOybC(tX=#~{ zH~J%E2f~9`iqIp6Kjoa%uD(rTiGAcJZ`eRWtZy(a1m{YfsjYHAi`2Y@Wt#$L(22!| zTp#?f_}N?Ui}q8pan_%{^%d}Wq*&h=XNELFL6DXrl)JDyHR~{ z0vZ#`GK0NnIIJ@Kf=wV-UG&w@U1Zl~B$eahJ8fWKDWwQ9Y*_9BFo6EuG){k^-b91&% zjENZ)ep)&KFgWY4amzyE6}|xObF_J#ZXvcB!R^ZVYdwr)^CI9vGpn4TuHcj(1rQVh9%{tb>akahe z*~le&tDB8iIeWwFc{x2qOlzZ$yS3+}4pWY?Ff=lKogo=3K^d~A#l7j)3cjCrksS83 z3k^`jDrGIvj4iC^`lKR5ShVV-h;zs}4|KlH;2Zsme;IMMY9qw1bltNctoavZ62OecuL#-3#fPh$5vlw>uBrK zg2;u!H>CQ;nK*u92(u2J#1Txm)= zaeZ5?eu~xWJe#?%GX4F(Pu9VY58WSegFQ~xBNdmBm%$Rjc@uVxKG_}6Oz_fAa8rjb z4-ivdldSR595@;oMNlV1)z8Bjz>;DGtAubFZDrha^<)PS3U3PEP9RN_+2ZJpp6e)! zGLZEC+I?}2`O*QZU}mrKa!n2HhUsF@;M$+ZshX*u7#aJZ2Ku1{#IOqMGNse=nYOu3 zbUWpj7)vxS|1PZ>_)Lfwn=Gny^*X8Tx6a(syntrrpxrMc^)ewAYX8lxd)GKjIZ8#~ zo)@w7hF?N-Nb^O}>PkSOt=57g%|z7}J?BTP#P&^EToifce-Tsi_Q226TlG9#0`ZF9O+eCm9YY4i0 zBX^jX_pK9@+o|DARlh!vaJ97|<9c<+OGnNfWTca$R3oI*k4tU0 z%W5EEu=x9}Je{3|XE((Z z+PH%rOn7!FYMk|#y&nh+v~=Vb+Xc%w#TQ~V$`vh$(VsCbjW0&bH6NpzydUJ(?xR`0 zRzGp25A9|oVaF6pL}LRXgEp{}!T~h`GEH35oAK{%>xk5;Je7ET$UyH#H@Y+DXsSR5#m0C$q2f`Lpq5Y~liMg_G>S)eVXKX2@p4pL%?4UH^d@iif5ObWFBBW=Q?+C-ikB_ z#?IoE(05M0eNR1T)3{)b2hbF3P)$M9O3!Jq5*AO7_ZTTE

;jc-LZwQQ}`GowK5UEC!rZxpm$a@`oD3qGSk*iwqKF|y^Pmnp4En>pNbku<|aK{Hs6IJPVU7Qn`T{QM#G=AR~^|* z-sJiB?$Q_BKFwFIdasD{5$ZC@WsmLP$K?*|oCk;K&azM`=Z1BQIubx1R7u})O3Z7* zCmn-aAp(^ob1$E>b5@gcm??%U{KyCtaANHuBk0oE7Awk5mlGY?R-h%Wag?V6k)emv zU`tW_L&N!aTeMU_&)yj=uq?3@dJ66&;Wcr(Cfy&hwCd;m9n}mZ)bz3CfZR>CCcS@& z#p8H{I2O#_hmfyQeC``1QjLP$1sd#!jwm0@X1no7tl-V7I0ax{}6ymU8u#kgcqnK330tb&=d2xAwaUkrAWn@d7Fs*jaW^qR+ zh{K+S%$$F3+l)!K#+$oXz6!cV@VZI>m)PR`m!YJ4t53gO_N{yav``RgMxVpZS}jZC z9NqCGb0$tZy56~or|@;y6^Lk)MoQ&RY>9CD-_+g@P~25ug?vfb-TxQ!wYbpXv{$Je=WEXqLt zANQP;L&b`T9dH$!R2q%B$OPt!L>ZfV-mR`ugSajoU<;WdObADd6N5W#NjB)qg4_p$ z@te8(EO5UPILMy0@pbG&?5`R=WBvRP{VN$Ji6$|~X#QX(SvMSRSHbqD(}LZ}frI@b zAi&mXLW8x0N*l<-jq|43ed7C)9I+*RBYW0*g6fklwSU#3+Pl@yU=cjx3 z+1732nTSl`4N;v&k`#ZN`5SbOr>s}~BXfnFDBp*NdwNtVI_JzH@!o(TdPrElf@N7E^(Nn_tyH=A=N(3~z} zf}I`b)X`XaN0y=#if@$S?WEC~Dpz$9#{FSlzfj<5ncl@_=50C#`M%GDlr z_#W@}$~_Y1*Q4titnq8mp32FJg->Dma>&@_JNfwwKyn zos*bfjaO%%EAIrnO5bSP)9%h7p2n0f4l%xUA&cQ0Dsa>2-fJCn_6QK%IohV#j@G&? z;SoX)c|jAR_E)+t*v3~_-(`a~C#RD{TbRvlcFE48MQnw2P+L*KOrc}1*OJ{gL0E%( zQlRC+b7B5{Dz1^Bp3ao1ZqHe+(n^~l(!^DhU(m@mv)@*K!HM~cz-^j0eF|eyCGV$! zLv#te-0>`47Rb8RF#{P$rGmr?%{cr!RJ1sM&noD|yl+$M;9Zx`%B>T*Ux=%KhyJ)p zd^xHE+=mpAgpUZSxtLSb4u8Tiy>pne8@A=gOMvEQ%JG_DX+iFAKIZ9(%s zWmJjyF3j*Ad);WmP|{;_W&C*(~rXZ^qkAtkzfvh?C_?z}N zTbv^zZZ-z}R7F|lxo^|}Dn-T|Hfel5Vma!ecA}vLzmH^zX)x)=@pcGx_mrpU5<*y- zS&+z3zRpfof<3e3X)C8jWPn3Q33le$*9oyxSK;DVSa%#(+{znmer0as9N1pu=*?G3 z%Iog#TtSncTyWupkGH3k`paSoWvyP>`F&yHzlEe%Dp#9*Kqj;7zlkS-56ajow;kCW zuut*&+SQ(Ez(A1A{6NN>>7*PwlR$7-nC240}rg*OehgD%%X^Mh{7JrC>Lm+p zbMBkAUq&yW0{6P^x<(Ku{B#}`7iJRw%mU|uk!>hY=6Kux$=pl}dbu@IlTeY#Wdm|3zt6yLOU1@5rEB<)u3 z{*j9v53MUkW*MruwN1KmE|(M+$K#EIBpt-0e>%Ed`|00|Exe^Ckv1B=$I{$e>e!nL z5@A>h5kpYnz56wuy^`nE=-X{qoP`?O6$nTApW2z%iamS$**P+=#*w`KwcQH9e80XH zBelLT(pAIs`i98y9!uIRsOUXUkK{iz)DxB}v?dgMeI7$M6`BbN<~T8HU&{_jN?u?0 zqWw7xUVk)*eyN>}yt<204Q6ikW;i-Z=WiK=b{_}mlXDus$R=OFipQHaoedZxC6%bw z=Msu(*ZT_bVYVxWVR1Uha(hS3y%3Ki@XhO%nsTgJwQ6!;3BkETVN7!L?tEYt59~>I zao4o}(9X<@m+7edupUY`q!=PL=r-PFuY)0@;M&S%WO$44;u{Y5-vWwt(IU0z>J180 zQZfF|A4VQKhP9e2?J|ms+57W%l!;rZ>$=a#@L2yi(r1Y7FqCC%s5*HkXtXmuM^gXteD0a8B%k$WnF@NQ3`+*~hEgeuv*R`Ay-XDBmyF=|`)>p3^FkGq%t|s%^_#F==GP6(iLAsluUN&B7}HGVf;q zp_!U$xQ&eAps!-U{8Idx*_3O!P&ZoD)t28y-_7;AB+)EXgVW(9?mlcY`;hI7Z6&0q z>t@(>Ubkau|HhZ7)5~(d0>bI`(~#(Kq7nCtRsc7${LhVMiS8AXylU%)IHG ztnk1%+G_WBR>?gZz=z&U5cW(QW?T}f>K9iPw6fD4z2h+SO$+PlZa%t#FzeUs9`4kg z1+^=}hk!`wh_OaOb(%0!t}g;iPp5_FWd%O#;*zP<%O(u3>A zSd60`EK^D;L~zc8AImM)s|b)hq(7b+k@6LOS~zEoZ48?rO`9uLdfviQ5^$buN)}H& zth;K$L^9-rGQE#g6KfbdiyCexx8Q%yq;Y{iX_sNa@p^r*#JEOwvkQp=JQiLy&!sK` ztPA7{t{GAfk#*XlNGe~fyC2-5!?|N4Q@;;oMZOhw(n7Tcaw0BgNtjd_oJ@(zE=3Y3KXCEHDVndSSyTS zPG?8mh~rq#k3s8Z%!%w-y6;^gGXT`Vo>+4YdALT|u{AnN)s6h=%{sVY6h>JA_4Kb` z{v0ISLe$T6F*K^*y1Ir~WN?4XG$Al(y$!-+kq3`Zud2`2en z+(@igoH7+^$sx(Vt|oCoV61=?k_4<`Odyx6X5OX^xn*XXazb zS+*9b6AEu_aEdbL(N6kWhG|=LpBxINF)SaX*C}WlPvWD3cI_R`p?_GF8Z$}OQ-Ao% z=)0`dcsHE}r^Q7ctMCgVs~95uyQh-qa$%q%90*BD&IrSEvKP$Rd26E3ije^8=$EZG zI~BbcVW_Rn>FI}cRApV#14mVnfWK7U?B+XniPTDgE07VluRtf)AF7`W60W=e!U&O`iJI!vtME?(u*3v zsJaWdE;8OpQYRsw^LHi^qJli*aXvnn_x#wCG%Wo)&>^Lt^By4D;rCzepzCwe_Q^z~UiR@IN%fQ{BqkZ>kqs-yHVjxTbFlipZ!#UjBVL zI?zr+{mf&2%Z%769p%kis{=mdqNxy}g4c|zIKiM<(i&tq11XWHYStzkTc$`F^tzM7 zcQAx@6Suh~Ym9w`<%?tkkb#JP$?_m?-oCzV#e6H%8G;pK{7zrx^C09<`!Ov zic={p&A94~D-}W6?!|_`Wv#yKf;GsAHxa+~RpgJ662{UuDdy`33wboH0t*no46Hhv zMf*)}fP~92YjNM!yG~^x01z&4yRkN5a}(*R{5HE}YzGzpy4Kk}^oWUnr)|ZDp!3ox zUj9?bEzEVcJ@4OQ21E8*kRD~!@eH`wBvkil6lp`WnTiLQyII?7*^*R=44U{i6~G?O zY>9tI4bx_IgeeU*R4MDZ$_yLJ^EfDl%a4mi|xZ}Vo&yAnM-=6jhe#;7u+mi=e-N4(&f zQ{G;rnVvXTu&(W&5FZj@i~!-4Dc;fQfd!x$rv3qR&E49rZ+4q6CLymh15mthk%bU~ z()I^sOn02=jMA*fe@2W2Go$}N*C{37euh8x*GMnQ7A-N;*v!NX_Dz?=OuQ|2CI_9v zI82T*QhB;2qa(knMp|mdMJC}N8g-|BuSEi*r^AI8O7bP^*cxrJ3t{mEa`A$sTJ zA|LS@t2o$G!B!>X20QPJPSY+Bi~H_D{J8Pwh{-KqWea_uk&2C)j_y@l;|}?S>kUo^ z`#{ydcPw3-*>@IM0dCF*=86{uPC3>u0*YRYSp^slG6Ds+kCTP+;r?sbK#gPOD0-?! zWGj`#eN9Qg953m+D`kY%mQst2%7jHFTOpG&p=sO`%}rPKfDY{3|45r3<|fms|SIwR2n@)Ux?|--CSs=LCX`HR%tr3ZtzBU zi}%%D^BzdePon15Rp+{FKUk_9B+9Z|(TYTFJ3Bg4Cy;5ZgO`3ug5i_JtD<3yyn+!l zVTqGe972TN&hw=_6bjzt`=MVAG!NeK>AFo-d_Ec49ruUZ1ty3%p_(kRsn1xs#0m`A z8_Dsx(?w795Xn;rFP&=qGfdM9jxq-%~Fl)f^}u*+d8H{7*r z#L_w@Ud#PdD4pPnp;x!E@#^z&hg65g0g z$80AA8`*)^Zswl9HZo?f+HOZT;m@MKP$R9>UW_R`M*KtjD)JkD$VIAZ?H?N1JF5Kx z%w;69>WFE5MXogymG(5tH8cA>dcBs;#FJ3Ck{vSGa-vhLI$8vU6wnyg-~*VOFJDxw zyLx|H-dM_jkNf9Sbs9bbt_LE-Sc2!NK3+eRXZRrr$59PV`cIrS8$gRM>gH4*fd$NcYv z6_O*pD$02GRgL=hVL2d+EeI5xwe{n&)N7or+)SpBGd#&9)!kJcX}4a-+Mc7If+)8- zXR>E_X1%6}RmQxSpgM!g*Oe9OuUgLtV@Hc5CMgGs2KVr0nxH_Nfj!NBJiHI%+WQ^< z&{~feqT;AFrIbx*XHK&|e3@gBVntreDzt2`G~Zp&*lPY7od?UMP0GbU zxUJteG5hc|DZO>Hkz5-tpfkp za?1n!{JgJq2j(0DLFFe2^UCW1l_#&lXerk_5!Y$3il_{4tRE>Tx>43{Tk=Qpf+xXl zx?5A9^Jw})i%ZR=zq$X=M!L#R)-m(u@*)DOf?IXOmy;#=6RiruHM&rBNN~ zF2pM=E}`ptM+^`MX%=~Lj*st_W}~!~+01EB$_gt-$BURRpGuESXRtAyzLQYa<3Nu< zne&gJ9z+fJ8f{I9kSl)1W7rrHDqyjHw%WreO*MKUuv4ILc0PZ{mffef6x@ppD)4eS zb-oTYzxKVXRxjUKzLmUjbJTMMPWE^P2^TPYt}2cyrVi4p)>6}KiwpGy!k)27JMIH$ z9P=8am2HE@!4H|Y4RNP5PpTHw;Bs83c{45oov}w8+MFz z4_WPdW4MpG*mgbyd)dqtQh4XB6zIj(;hR5uN>G*=l}J<3y-62WJ8WwSF)AC`b~*qs z7ix?5zJf@(k4#hDQM^tLCz%)xsR!q7?A8A~W4c{TcNojTCVZxK3)PbS@Qn7u0v`<) z!;a%pO^#j?X{OesUP`ZFKzG zy7>L2m2`@CF?!#B{&4$W=J<=bBs!nJPf(L+dPU61&OI^Vg0@@map&`Joln!|<C58L3iO zc}I)Q*j}QOXMR4|e}leVPhR`IB8hKVG~S$vtVy8foC%|Yxo&u_nrhzLR=~ubrC@jt z99$QcSlhvVR2bG#u3RQMm!$Tx!FP*w@|sNdbi!)I#xG#!CxpJ*M~-NiacIb9;V`0! zSc~~h81n}MToh77V(NZS>vesNcC^));d807NHlBYR!-&N{ucYOcIqfs zLB4-$C7v`@y!1H>^RrV2@l z*<+&6IOXJB1r!RKM748UG?v`a}C2a3va4&$AS=-iE z0VF6DRC6km`SyX`V(ZVOC|?kEOOv1lrNnu8um)$Q-Ho(UqEtn<^U10>Nv5SQleQK7 zT)xAlx_73v>mS`zX}2$L(*=cfJA*n4;wGC6eL>9hfqk!TtI)9!kx+ zO?TKD0 zjG(8eiLdoGDR9y!Ahhb~?Oa!ozH|sl;vEX($77JaE_%w#<+a0rY%1flhHjY6##i*| z%-LS#+BLc8ZF_m&BcG+MH(yhz!eRl|<1wjp3UbP7jB0ri;D&sIwVT1cyfc-kfXo3v zC3u&2P`wza@*zX?N|AD;hCtGBKSPnrZa^a5B+Y=JZI#`s(m}uDJKC#A!Fq4IDn1?B zj@KkWyXW?efA8Di8fS6MjVqKgKa*T+58NXfvB`db)A|Pe2-DUO6W-5aX05qJ^j?u^qq1zR}02i+(JNHjKO%(r}tQ|uDKADM)W3|7XeB5C_w@szUIbO1R z=Ah_raD=VXXJ@w+I;TovX2x0lPhl#Q)}{t{rIZ*wT-{7swpIMe2H+g^a6zG!2|B%L z+TE4(+?NEcO?P&aHyt-OBem$k>yKjE@|de}2?C8wbj`D0 zIC}1vS8yalvrDSp=X0>SA10cG3|IiHoBM?G%7uZ&>+6;}yDsfB!tEsz7TfB9XE7L&FioX8K%ooZPAG@Ahp`&JT-K-ADBw+MBRe5duB01sf-i zcN24(as30;^*OM^G}&*0WxH7KjK4#XQAmbtk(aMj#^hhgD*E;{#p7sfmsj&0f>o{ksYaBjJk2(x47`#ybpCvLL49UnS{o#(^DUhO zf)LAx1Gq@#n0-L5dcaDe5#Zh52xbVNG{eZ2hl>cnTAGT=D~3>T!Z=}-xR_|P3PsLV zF7XF;Zc^<__f9Gtm-iJMz=YWDMlqYh{(1GkmlUUv{(#V^|3%qb|3w|XeVd?yfFKAA z-OUh6BaL*&1Pw|vG*VI`2*}U_45f5T5Yi2Tba#iebOp^BoS7SY5o$Moup;)S-Lelpp9G70H~FaN;{Y1v7D z{|Z?yd$Dd_+Eh$Z4mDJdA;DP~%;N#+X;V>}{RS3hy-k)H4st;S2uyb|L{lb8`4QMQ zKk{eL{OR6rzvIr7(7g16#GHZ^-Vp!Cup{|uqdKv>b^lY?fm`%*&xs!EzP6SNJz|5rJm@CBl0nRE4r-V}rJpZ_js&Yb-V3sRTIZIufxRhP`q$Xj zYJ%}+y%oyww{`uI!wJ&MTwj!*s&BR6&F(Rou#?nZ>Qe=x9dchRHrdV4FDpYg2$EVp z?~$J@Z{3wL3hBIvkH8Zz&3f?Fjx*&I!K>6)c>7=j;ja3|B#K)kGRpPl{1F`Q@iDVI zPBcjTex*IV8CP<@-#kj}KW1vQ-D`E)wsAZCbC&g`*DN!m%G)iJI0;eTO*|9dpl|Cltj{(bVl(Ae+) zCy)1}*Q#t1Kl0|~Oz2xJU7qD-&x%%!W+{C&+qR}JeOb&!b5;%s*&Z}>QVO&|r!Ujr zgE}a2vT21`HHLl%Kd}&xgScylm3vjT|KPd*I)t2*r7Og*jq<#TLsd`0VI##emz2|U z(+;il4SB0jLnD1GfSqFWg(HHlcnSS_bQ|~kRac|wu}LK+0wkfm~?;t0Kj2xLQ62(|s3)fLyg=l3M$( z3ZA_}G%FJ$ncJF2K zEvOV{$L&&*SZnQ<5)+V3eb5q1_n@7#ETf>L@bXg9?wZ-|nC)*t3zIh+TtjcF-(fNm zgJN9|UOVOWa&vvD<=GiWsML6lk~OTqq0_1)YpHIC9~Z2n(Aa3R7Q7G?8+{OgVNZyt ztY#^AUc_2tDU-jZ&+!U4M%v()0$41WL0)9y`yJE-S^HClpGeX_lyUz?D_?kQul zR210}5&e;xOIEX4C_FD`BSTXya>=K_dwS&+m(2H6FnT08-I4?&Qg@bI_- zE{FpWMDBM3zaPgdo>xoNSn~=zAS(YroSMLZ3Z0g$!y%bFw#@qcZTc1U1n5Y=ebICT zI@Pu5C2e}1zVKO62K(0dwX^?vb{uO|>79%t01TN)YnIdH!b}Wv{F|#=R^K1{TstBV z`aHq2ZdrSnNi-&Y82C|?3#G|U@<|m%W+k5QB{rP_&4KRNPx@=geIoV)E`gC#Lu>hm z6aA48w0R8J8z-dIdH;iT8g@pn9P#^2g0yA4&&az*UjOC{1Q>AOHJ* zVf*GzY|e5N(`w+&4Wi zvnRQ>HZlYH*S09fqtH^x&#ZbmTMzcF9o8NuwdU7-tHsfZ1+L1oM>6yJPie{5iPri0 z0~F6~4*uS{O~6=UO2l`C+sDN=4~TRzOHVNL$2 z?A%;cKKUj8^4s?F%>#z5TZ9KWEgt#Rzn?h&W75t0(WIU0E9=j84hjf;oOHL#fTn%? zT7zW;n3Udisd(_W`a2dT&m*Ni+I{l#yvjOBC$-DLxweV)idli9OelPG>rGWz(cqSP z0PW`0b07q(^t+HzI#rw)M z+RmgHf-KF|e5y0dHRI_`@zJK>2NHyU0#3I0yvF>TsxaB3gqY9wH;`V1!*yx|#OO^U zk0Yi9%qOAQI6{uR1=H+mw`sAKAW ztovG~-23otRnKb&lA1px8#GURcKK|hSMeM_y;QNQQ?c(>PuWJa7uQk{h({Kd_@$uQ z(q>LBsG_HytdFj(R~=M*^|3Hz5(RTPGU98BJJQ5la~kR zd(^au82n~+tDcE6-9bZr83}S%1H8QfCqLLyrd9ofOR}(k=A_K+^fM-*$UX-KkVj~7{Wnp6eX!y#6&^ax?k3PzFLU|TY7x`}(NdT%g7n0;0hV6nsPYvxY+Ymc1iLJdT_QU_lFk1B^X5?^r}}_ zGxVt^FBLg)RYT4Bge)a4^cY_iR9un7he)GKBxou$i}1CVjfRuI^TU6| zcQkn(f)@ZyKQ0*DPssB?ocOKUC&NTjOFzSK3SK#RG3ykwy>-@+)4g4%*T*BfV0V_T z6TQFx%v3bOGlYa0UFJj%J|cHT`A( z;n32FI%rPR$cu`R3mPCZIKvjG_fRbP6R;;7Xa6BTl}-Ci=FNfCp?2GO=3-3z?eRl4 z($Dz0%%Mu1NZM|_#O{Fac6eQ zaB_MJ&HvNIu$X#M(7S48A=GREAEQNww7ao2s6lea+VxjliLJH#UjWtr{rmlYKO_84 zvfs(~i(@|TIa|+H)($6*z5RrT?0<^SdTpWR@3vwMnaJuogwd_v?NHyD- zXd_RTpx-vKidlgQ2Z!b?3yaJ9Qj(L$fPRnL_O0f(zGi}B&W;Qw0&{9fys0aL z@(!x>8Wr%DT!cW!2&|W5yKZiZ=Xm^ zYMMWzN8FvPy_qIh4?vZ`$V)NnY#odzUm}|im+dwME~M!<3d;M8Kn7M##_c|$I(pj6 zZv`{uKs(Mg%_Q&a3gDVFPM3WMaN~)H{M_oh#@@|U)LA`XM*2Y=w*{|GxEcf%W(9;h zJBcUU?VE=rJ&^mPpbGY-JCbX+Qs*gpm{Xb}DjO8=ecStnh$|68^h1c$5DEfw3{uza z(tgCXxr>)9~G?!$!k3v_->dQ&iBMqZubKp_s|%A|N#{jf0B;XCs)q z4_pQOa|I+b`M4vJiSV_mya8xDL-54R1LvnJc|HC#!LFhX&W$WH*3GB|zj2G&i{`)r z?AVE=&IkUVh74f88Ob7=9Qcp)a4m$f)rwX?V-aw7sa2(#Xsz85U$d02G~= z2KCE|*L|ff{Mdh-5FmTM$1+^2dm(p0@k`VBH#uj5k8WRy?R=T4oBkK}W$=iBi2}_! zY`zf&urtT-^}GR38a@@$o`FM)N!Wh=aIff%Tp=@I0b=}7{o))g(Vg_jZhKU(X7aR_ z!gDF*#KG@mnq^*zlLVq_95#bY@PfD;#yHIlgmZrkw{K00W`Z^}iBS{*1mgct{_!n+ za+Ikgo$kPzE!tS1yCD4Ko!qBQqMyo9;WUzu$WiT`{Ym@BxoLjlFaCpP8v2Cl>J~rj z`GCU0;50VInpH6_A5`bR=K&oPZMSRbldN&^Hk4;w-uyUIH}k}bQ;BDV+$1{hNd_A8 zpm{1w)E7ll_ytQ!tjsr${LNw>6_$}HiNg`Gu_Txj2ts2ne{M{WPZPuo!V)>=rul`p z+?zE+^g0f8wx|JkCVwz3rn#Gh)#t*PN8IFlti$qy=QXgk3mC4jkkD6d1 z@8la1!_)TXoqaybPRt(?flH(P%JpSsk-S2-8l-iHELlt{!~`ddamWORnb)S@w5#7R z&~S0g74va_0+i^m@D>FYfT0}Oao`_h>ftc)O)o{Z$H|AU$agQ7iIM>ssxIJ+$=o0$C713^A}p4Mt{X4_Pgp)n zF`7>2<;CP(&;LImQU#HPK`LJrRImM)4|40eO!lOBeq_6F-N`s*=aGHv@4jjt9n40z z`38O_e9TCi4oI)}nVy{Lj@H_RvyFA&uxsM))62TtXnT{A7OczryCDB&v%fk@L7rhN zmT#C&P7^+JZ=JI0<<7^R8(p;_wg z_`lE9jb|R}`tC)`$jkq};B@=zvNUX95YumWE=~HB-dSBZhc-9q!R$+L&xZe{ygPiQ z6-RASGYRi^aD9!8?@cJo@18R-G14QGU$Jp@uUBrkzg#)_;!f#F{3gN7KJDYo8q+9s zGH(<{kwP)hj2iQ`;>j*@S0|~sEWCaOG74W2=q9LYL~AGhzTrl zESDc`%eHaI_nE`IF3E(52wY3_i=wzyoTomLu{|mM*>UzgfM>YJBk*(W9dZ<*8)CYWP|aL4{TE;F3g{dY75CAU+x0MM-&yXfZ?V2o6_!x9 zrt#Gf(N7s+iddQys&xctg#Ptht={&^aS0aN3P^PZ?O|cCn&z?o zMVIV#Mn;0B0B%V}*l}m)u-*0C!hj=&l~GR_4AYb6wx8{G@d4Hnj=BuC{cdP)KiRls zy3!hfJA;z+}N(~UdqM#O||B2mSeaNlKtMv5Lsci>)7<@O{F5ECsnPoIIc-hE9Sso%~ zA3sd>pqxy6knv&K8_>^FwpF&^Kw(l7Aqs9-hq&?qVF^K`F0cU%D)ntw;mdr z;U4ql$V~RR?PR&MB`%@+smG4<+wqE@gwWHqU%TGkU%qRZaRXbR^}c3FTy^KpUy93- z+IE$;D>tC*k&M=`@k_>5#05~cq0wiQ4g7vuz?`mIoJ~N&P*9tx)w5ysx`e{gI`A4U zjs_A?_DV^j4;U=Fql?Ny``^y1%CxS#!G7q@UaU7AA?| z)O-47AGkX}TlzTz3X7#KN&*rXp5!Q*#S3xA8-IBUYN&(EGQ}6?zve6w!pA36p3*Zl zTO%V>sukUF%@b2MRCCsOy>0(v50ib9zGj9ASYd`lj8$5|j#qm4GYk6rXjyUW3d;*& zt{EYjSz$#oGj_+)i*W-3IT3Z{B{Eg{wiBB9T$1JGv}E!bTc6_(pOc*l{ET$OMA%;Y zRxZ(Vkg{l31ZyO-*4}`_@c{CaD|RZ@Y0a_TSRFI&mk<{tg?%=}T9PQsKMuMWSmq#KVO&UW?n%q9n_K4e zmOD-_lN08_n(DJ{shOF(M!vesMfwaWGf2|FE_YRKMDmCoF{!9r$4fejF@<@%;{ZWx zj~oZq09k{ z&Q&ODcP?_xPqv@A_Fny3A;9MZ=Hk3xlZ9&FVGrtjt%fN4J`4GmYyM8mq5y;LDdiDk zR~q^zz_Pw*b1FM`KALmAWQ%m>coq%Hk0na4gV95#S&$`f`|9^c4{*B%cmF%BdSEqA zjPx;}EDH$1Uns5u1LW+>2JFh$M&8fiGpt1S?-hUfdGYa26dWi1ujhyVemwc#A93FQ=YJ4*PP+WL z$thYj8%MM@QjhbnKEF_T`^K49vhFI>WPa6QD(CC-9~CS&hjJCT)>t_gi$=W(dZPl) z8m~l*vtEpC-HU#|zWSlOF^R+(I(<#<^+HsCt|KiJ%3Q8brb`C&XVR%NzsxG*`aAnw zR~S-!gGca%g~CFA zY21LX1A6nen&tc-uuSahmPf&)JfsNgYq*6#gQUJ+Vx!Mz>!?0m7R@vv;Lv2e0sZj0 z)wUhgDN3b$^f#7pFT7i?!vWNXIuzbHuDz635pb^>!ggpXGhEwPW_5hs?>Q6%3*Fb| z$S!R?;cGa8q&j+08|zMu@%u=xWPVo6d zx4jjiCB0?`#k?29Zf`K#_;PZ> z?qEvv=v;%kMsn}X(7Z)RKwEn#*IN{vwbZ-vU1_L+U=uJ!nKCU(lhj(3i%if;tKuX; zv&>nF2;Aq_2`~Nhi4WjI9AIbik^y|qh39IwUG+<@=Q3I{BzO2Ap5}@7j9Qw!MuSf} zyX_LC*YhE}3GUjjfZUEaK%A`$>!^)^p_O;*Cn5S%5BuhNOmRi| zL96p+dV?8xU;`XJCAyI*KtL)qwDL-~KxoT!rvS+RDH2StojA=2j(Qx9;>qrsD|^1$ zUY2>(*6%UgUVGX8AqQQa+vqiEf8c_3i0Cv~-C{0Gd9;v?S}4C9V_*m$-7yi~37>DR zxVqn5F8^hGR+DT}#}obli2u=a7Gk7M&G#@y9eO>{^}s^CvqYs|qC!j1fU*anwW)RZ zhIOa&@BTHkzt8SAX@`Y}`3pZPR%CUn-W%e#&~{lPhHZ3zogcK)tKeRW_zzwmil#K% zA(YD4s93#Ft&wqOZU;EnJTlIP_wbJr9trR-pNKiz6KfKgOUa34o=+Sk#ON#D1g%Yj z5ky$1yIxJe{la?id$Jb)jsUWzhTR{9aomwBfr4LnEFNa&=X}D7G@J7~=3_n_sh9ZU zMUb=Ip)FzbHbzs4*f_txID5x*t<%ynh+o3f;*IlfQoy2oYWu~VSm6>Ji zy{G)FO{yDpjb@L7g!Y<5Or>QGrM-f4-Wz^TU45}BLMK@Ml4OKS7W+^wq3|NBhVDqx zMiMA;F=+5eP=GMS=f2mqZRz-Yjl2E3dH01@P=1%&2phr9Q_MZ}*a?c}r4yWrX{ho< zjw5>I`F3sgMuE#S2QMsf(ExrBFj@Oh4X@seGl29Xin+Ho*r7#bwE-FZV6^*mWQsaN;H)t<@w*k&zGcWX3Hx*ryW-e@Cya3xSwcI8q^f1E0u{;yMFsY5XTXtSFP{8MU^FSi9H)Xjz~tC0 zk*m4{VJZJge)h`flFb(b35njt<7{QGx|O!3zd%O)$UH=AYMBv5nEq{Npkq;Geq|XF z(EzW^g+>=5F-YIUprGt`hS(yM{cB~sq~OCz-h$HOeo8$qQ{gjkv?1hmdi+up>~jyz)oQ= zJ{OtzLys9{ef<;tP}!A91f*KZO)o4!j}r<8r;G+;z7PEe&rc_F04#M*(x-(2d^8II zldDl_4?QMVOuoYP)P}44>eR2sC$FT;XNMC8-<&~`RYhcN%M>*r*}WPm_UZeFqI4lv z)(hDo)|^xt3hEuX2pFC7`DHp8V=t-9x9@ge8o7Z-C z7G;grS3@2nm7`sb`z^oUg28Um{wIvj8f2d{8ZNZJN276P61$p$0IwQE*+>gfT8fH> z71m6nR^L^*t~Ue=Tc^H>epx{uRngrhylz+8&DJ`6P5ZX9t_0FcQq22LEmlKFs;SAG* zain$so-lGUE50bGZ%1#GwLYj2Rcdl=uSQ4#E z?PEyJ;Np~n^V9o3V&?+SkY2X9xN{+8Ezq2zBSc_Z;6@l5M$Z%4GY>mo%@N17cWflL zj^`4|QKRLeHrCuF+lO{fOJ{n-pIOc{d86Rvy2Z)enscvAYV~AlPz`*m%ogMRO zeoKh|33-%td>DiJ4uYJX1Mtu}>|BS+>3zaaX=o`xl?nvS)fl4V%62CZ3!8RxnCm#*BOdjd}zBZ?et8|HXJ zPv8eYU2s-(#`Bb*qtZ9$6+E)6+zu9xlg3k$16ZuK$6S`4zl==BWjxj<(@W|yx<9~F zPX(5H%Et?1Df_7(nCo!#GECMfDZ4kHT3D^fh8;UjExusq(eq&u!Nf9!3#{y94PB!h zrOVUNzj#A@%j|Y`#;>4z%QkDw1*yxK3?u%%tLdWd7`S|~SY6W>bgTdM@Je9jkC^cA~gMu9SrlA!T9=v4yfJJF0X5OiLh^p7%~{#+c6uX=eMe=Hk2i>YQvv&E}G9 z3_`;jJ!z*#sP2T*K@{dK@J2rv&?Lc(6f(xey_&S@=TyfOcokQ3@sTKxzAyD-sG`&) z$k}1_bX!fS>9ODyGJ&rLmvw2x_HJH4e2v}tMEL(oR*5bI$&~Sac6A{>R_dKljT1Kz4+;L z5Qbe1om`L>u3Hr0J&#{sotfQsiqLZQzkb4qj~+ge%kDPn7^c;r55>dkZ@f|2_GLMO zTSX+w2V+~7se?5he>kj+bU#&|vtabFtqFerxOsQEp8hAtSSe2@yX4u*LcEm&8T73{ z)7zBT!(ytQ{4rxOYE5{-{kz?y1E=SbM}l(!W{?MBKOdWIVRh`uflf0|<0V@kHmwSE z)D&rPP1ThR6=CRZzAUvyx=p%SKruY6&)xnB~>~_&Lt*wLC-H>4E z!GL`*En~wAQ=vhFxRoY9OzPvP!oI!6QU+wgX2grU?p&zP)QpA*&#C9g-(RD$*RxK( zHnxq;vGjELn!UbRRQQ?cX2bwnogk1l*6vNc`*rOo9jzxLg&J(lS59e=Mdjf!CgX-K zgm^vgMVRUIb=b|4_jU``W7?rn|8mSzs6tW$kR7RLVHS@lB7h)@?im%fhIcv+@)$u+ zTBm0~volrVqWpuSh4hk(l6TdO(O=_}b2&t!;$eiz&VV7lc}zcu@bMWYY-4hj*ur3eh& z0Y8QTWOQ!uhcBW;thE{`{o!Y00|TUtz~Qf%<)x z!Xy`upwIEonXaUp(Fb;^4tv~M_I1fvBLm?SE^k7F?Z37|rj#sDPdtS-LQNwRHSoxe z+2zXRb%i=-QrWn?OKki5WR1{c;j864G0ybjZgu6bEXcWi(Noaf&0*Dz;BIMY+V4e|1Szp|*a}DEvMD--t=_iWbnSEr1dMGz($)B4eg(j9=&? zz-{K&5XpvjnS2wFab&fV+M{I^KQisx!8S2>4D2bR*lOH`(pj4}<~plUyE)Tej>eYy zC1z!E!^(?}xe^uH&LzKdH%4PaW+@F1&OS)Ih)iY*5zR)jE>d=)h_~%6_cM%MB*jqA zyid%{b^R75c%5Rz$`&TSao6eI-vFz9Cy$mnSxG$X^`sL?%UVD;LaaEpD9P52P4qG| z@FkflxSl-8{JD>IiHu~H!BE&(%MV*D57bREVDLng&8IRSA0W#{U1=3&*B>0WKr!Cov*U4nH*Iag=? zD09_3t(^ zlr(TUx}WXa%{Gs1D1lNbYA{jlQ2p_z0#G{i={&vqTGg`fmU*ZCbF2TBN8_^Hw5lj_ z+S8nshJ@n!BBiu4=DQzt?#mAlmOKx*7V>1x;K7l%--8|i?9%p#Lb$emjgO)>jE>Rrp9Qy9`IGBXd|WoPNr25wI?mJB8v+bh-Mfa$ z&k&P}4Bn8y%!yqlq>tZkSyVAxm8W@SDlzE2SSZuqyM7knVe{ zySHyW82;rgwfi-E)todO^d>h~9`c(juz9g39Z`@Z1xH+;^ zx?Gs*MhoZ0*3yMEC<-yFu|-!BSr?$cY#Aeee=S$9;Q3;L-MiOP9E$YY{mpC=6tHf( zdu9fw&(5%S554+SRZ!XWre|`>QOZhxV9-|AjI_bpg_T)1OGen@;!UTh{if{GqJ2KU~fOv+10LPeCT63i3i0hSel3%?UE)Z|z;%w6FYh z9k5tGGLR97BQ|rB4$75(KOOrYJjL<(`H34pb*}7tD?tI2$Rb>_e+R`^<7>brD$gA% zC*gZ^`Afryw3L2wVw6Bti$kKG3tryv=DjOhbM6=zx#pAzsi4<_0=f#Q#o4ys&Bc^% z!(XN&AW)TUHRa2$dz;4MkMg1QlDmo$JX6a}7}9!=$A2J%wWbsOGzz*%5CC4RfzJ5j zAtLsU0p1spteRv3l2;+j)=0^G(RZP_VJH`q!2c@br!?N%C25nRgQdE{560A?#nZ>X z?hGK2kh#`n{}cJauTsp=(<4%V$9Y~|V}kzuf~okbm1}FGP|%OfQFq~ir5q2d#XA2J z0YF@7<bH;iPYl}i+T(N{GFC<*rINg5=;Gd!<#jbh zerPfaepS=`YE<-Tq~$ls4idnwioSx|mhf}V)PL8Ymi!JQy2~)<_Y;n% zd1Q5;k5}uPUM$F0#dpuS>&++TqlSL4BLmUb){Opde5h}P`om!hFn+9;UxA+0l18zg zU*?JDq5m@T+|M{~`LtT?3*vl#Vs^Z&HG1lD9|GW@R~{j?HWB}H>|O59?=W-mFGdg2 zyd?N|Qer@8WPWr)hp>#Z^3PWX9<}-v#VcUf%zI863vOi-13e9$wC_K>#WVjB@=~WY z#S^N$JqglPlbtafeh$yt-_K9f{JEcBmS0?08eWun^XV-$(udK8^gAQJt3-hpC z9JSg{dXuY%ViZ#Y7kW4V`*EYkzok^RRA|HF43vFqI!o0)^WUnav77@zzdGmS|0d?HpgV#7>#vJu)s$ zt9YxM{a_~l(1v9ckh9Jow_*X3AYI7T-8E5+Dh`R#p48H45!3lRhAXP9G|7C#-qUB4 zBh4GM2z)^X8~?#e3tS>Lv)Z^?Q)^Z4hQ@N*6;s`6ZS>h!IYL2BXV2X z`6aJxej^(=n=c%lz2g933SUsTBOlX$_o7|X)2pt!`lF3|@COz;{MdAzW(RXoqL}>y zA-1z^_cxq^edV+j%j0rm6RX`sc821~)DOItlKl9}j1#!CBOkOINx7aR^e-~zcKWG^ z8XBYyGknl{G({wm*;GiK*#;r0cK#1u^d{efp5(KZXKvDsUmZqAek1*P(3fb% z4X)IlYC)J5S1+e##w)%j_XYQOc$awiA7)tD%gW|CwZu4t79k-u^%)-%B_J2LHJO?r z!D#sPxXHm*hvF3rXp7}r`N+xVC1gEC*i&`v zXm#lFm%FymeB(|(#9ih~91CSEFdwyY)fzR;c0-dg>wWeJA(3cLH`-+LOR+gPeQwI# zHY4M>k*=@Uion+Y^%{Es`y~ez1b}^aU`SY9g6t=K`zKzw_~Vc4*>LI-LZCs`#SII5 z{UZO+YH!{~sHLnvnDfo9f9W?y*|(=d@?8tEPo1w%HV&mF*L=$SPueSlk9zxK#_Z4y zyQ0<5j+Bx_j-HrnuHSaSH605%4$IHkbI(tZQkvTY=`(Q7Ps_%Vg+$O&b!7lE`_7#f zXX|a;Co{We2x8DH@=R0#^)HroJaS%-_ab9I7p%PJS~>D)nqa`85QV;Od#{;=Hqq0k z-x4m~x-Ze^cTH93TgbLlH?;tXC^bBpWl+zsf!m6nHzbG77XMm?eypyKor=lgW!u4l zIL#rOAS{Vf_Qju^ok`*IHVv;gx%Ov;N+>)uR@TrE-`Mo4A>QTTe#zgjVF0yrgRObv zkdVIaEV6M8c$xcb7F-=$oa!acub@U*V?5o#`cNkbCW=p(n`6eJ#b|o#+8XKNsAmbk%_msw!M|A>PhW;033i-U|* zs}CeE^w_WTjQCm2VBFj}=WpM9d$=f8?JpRZTQxo3a`pd5N%y}wF8(*-I$g#*dA0h6 zwT+dV2LyyGT|2e2Jztgh&gpLB6Le_h_$WY)ydO>`%i_4a-&5h=1^rgu>u=+RF8x$U zT7LJ)p=xinL4b*wo2f(B2V2X5=0oEM9keQFs=8))3|$eX*LUD~m~MBUr{OKfxY z3SwWy2_;&2U8mL2G)pcE>#U~weZQ?`-^sJcLvPd-C>*qS#PlFzTV2i`x z!pVL%D)u6FPUG!!yle;4_w{f77^tdrDm<=E;%$)$QjdOBGdt_H_@vGaUre{jW!|z- zz18_cB+M00?O%$x@}jCeI8W{=@5m41jzDI?Z-C9mw@rRpt(Bah&@k=oKHn; za=LZwvH8v@EkPHE2%^`uf*$Zqn3iIsdTfN#zY_U)fMoK3kigmRHG^R^Fo>sh`o_+` za<3}8b&Kb*e5*iqZpar;kjd6X;5;${32@5=RW*if;ds!|GH_+ic7iZNsBsSxmYs#4 zpgjFaby^TW(u|9+JWr7}Puj<$<@_MNZ;(i-x%oNDzx(E~IQmH{NIM%`k1w9ji{1OP zbCw;qA=Mur1AbGm)chXt?~vEVUHIylw3LdusoH|WdSrO>dTwoh^vmB@DrC0Zttkfw znc}t>IKQZ2SIIt#P*PLZ_(AxbSlO=76s1A2y6!%&Joke(VTA^|{x*cV(C z&IPA>d{DE*G_x@f6G6WdxAA7_(CKP( z<8P#66=Px)KQud+se(y5v^A1)pgWZ~x~!mY8tqV4thwb=%(&Nd*Iv5wgt_}z>Pbe* zl&tYU-~mEK-7;czN^@r+Swdt#G`9!rm=>`+jbF$PS?GP?n6@uQ$AS;oDDh50wqg{VhWaj`)n1$Gqd-}cJY0(>g)K)S) z$&t}X`u_J>z~BitV%NSGcanL4uWLps)N=5!<#qmltX~xwfSZ=?b9!o?VS36$Bn?^E z3IHOvX#L4^0(6z?E=$eP7;4BqfL6mnN^p@0D$C|$rPztZm2o;5d2;Iy4-Q2w)c9-s zf&;!bj4Y-SYNJ3p91iM2E}Ru8gh`1;BU!3vyJIu_fKS*dyAwq3-+dC$D3YM!1rpIZEvdO`IEDQxL+ydbe0 zz-Rzpr~X6Y+)yFBO@F&sBhV<2Tjnusf)lyipW2nKc-iK{k)?sDwASf$GlvAy?*yfU zvT+!f+mY^bU2`@~;4Vic6E#eW1srRqz!Y6TAAz9x)9^b*?-A%RR9gh_i13kN1hAqH z_1*X;+(5Z8Fl6JPqGEC8i-u|wX0*N<_@moiWNJc3mwz|kOoYtp!78aWZEUrKaR_icoc$L>9obxoX z-4Y~PXzr-O(|IyicW)B&<&FeFVjT0IZ>Xz??YfBMhXNTivgK5v_JlbJoYTQ|9M;fn zENtH57DYP4+&||>A;hf*u%Dq*E6EF;)ZtBeGj!ZjGSqAINc_E1IwlC7NqsyAW!kHE zmu*;vxjS~=51LM`+3J7^9fh1k69jFW{9{w%yG_~8(yt_Xmi2mP>wDG&4gad=p(2^U zB)TzdqIloJv+aF)^y13V)x&~co_y?aPiWO$_)It&R(a@A9h4p7ry%w0_w1tHc#G87 zL?pdlV~sa>3ThYcj!=zN6~7oVQPS{V`u)VUp%%Hi$%p?WT<-Y*aa&^gH z%5plQn)G^aK|QvazgX-B&VTm$S+5_p33=>?{s*sV-DeYf=nYsFcZBi7q!b<>yYLna zPC)w;3zD7zaEnU>!t?-xDVY_Rd6AM>c5Ig`@xXCLL>r-5A|LkcJ#PPk{u7kC*51`9 zV^aC6by_aZk6Rv~Yr4c$Fk~OL>GJH^9;US0$X;~HcAqPY6#Yog2qK`Op<87J(W8!8 z4*k;J)zaFT+P!p~VL8T+;yq*IB1EbmE1Q!JT*6<{8?UU$*-CF%nHV$kiTxMjfZ_#Q zwExIxWr*x;2=l$is`o`_pyx^3n7bQtc=+gJ`G|6xb<&@($Se8+ZUmp|4`FUGqPG@qVPoz zMG?rm@nBhb(^~surCCI}xk;??crkttk~8+(!H?J266_u969Y+$%bP^pvoo!BCU>I4 z>(uEPj`o+7%F+`*_bfd$FE7A##y#fzU@Sjd1QA<2g)+eSsn};PrXW94NhB1LOU*Xd z@kOS*0`mi*%&HS1?1?=P#^+sry;og(U&;BmGfUo+m3%z^rlsFO_-FUYkfkc!O5)R6 ziImb929EwM`+<{3gYRhu$JO+Rv@jO{`k-w12VZziB?OB$!=U$h!j)DATRYa@)(`uR zJ{o4Iwl(WkD|>}ynBY@|RA{S{Ivc;_GEuo}7_n6G{rUk&!;xvFXQiuDs>PMJX@~yc zU`!VrSIg(GPFVK0kna#<=b+PqRgEXZQJ~|kX0>SkK0J#0>b&4-^D9YlIB9We< z#j%{O$LyF_?Driufh5^M5G?>bpqJkoEiPiIJ~2w?y!=V-1xzuM*+ib@`-q?P%2hB) zO=%~-kuLCD_EmvHg{8Y5&tuQyC2E9mdQObb_oTwEg9re&*mLDQryl>DT871Hndp~x zsiQyKF+cbKYBE50w|m`+L@Le4#F>{;z9)oiqR?1rlDiwX%sVao{X8-(ePvue6{PbEZsSc%h6jLfw#c zF%GE_EL(i*`Cej5f(028Mx~|09*DM=4HvlvxNy!Ks-s!#K9o57D16V2y!<{ z5|)b^R!s3k+a^#`uY97t2S^-y zArXHxaMS@&!9S0VFs_;o1CA^Z7# z%MB0PdY6Ji{SkrMe1Q%7wXoxIX3MpDq}CB+u(h!<8-*cJIUYrf;~*zErUWf+3~;Ah zsk+Ey>A$?i@h()-?i8b*rwk7Z4A4yao9popz(LwSJ#lmN?Xbn3M0F{_@)3tthooUyzbi zggJ%*Flh85HFIb#RZG48ow6?!Ay)ssAtt1n5|nU%-2Zm|EZW_CrT3=x^xVvsWLdXv zwx_b2Kg}amXIa4>-r(h^<0#+6aW_$Iuc>KI5*{5(Wo%Yb1wgTl$=`P3H*nnE-{jAA z4{jR2{I-|Rh!_D68$9sXrEI6IfTa-9;=4i9sB6!X4#TeA`N6E_`!#UjET@_KAK=H; zKLC>)MU_`K@wLq_ISB>&G!x2)U9!Wyn7G-t(Qp0bxg&>%qdG zoQA{%gLknBgM)B*Q0EZ0whKL>94cXa#!uaqnr(Avf9lD!Gb{ecM361wcGV`5C+|5y zK!CwGFW6O9E+R&|zJHV)X%_f@FR=FC9ijhQTAG;XxQz7&=Ua3tFUJ^}wC7$?wDV27 z$HxxisjNWqtuVNjY;P&(4k)@eP~*-&LMRo9ZCy7)Sm{y#C`-(ni-=;z0m258iC?f8 zpRqx-vHy!Ko+pk+3eovKcLG;Y$-N5-JwMw-&%T+#))VkgbpwO1-wk>i zcotR}-%#P0c|n7rEufGe7eA>gT6o z5vDv~9mQFI>k240e8#0vr!=ykAQmInj`gRM^s6rlvGE)>@EiWB__Lh5S{P2ZZSIrh z7)4y(Ur{gGrLlcyf*2WtFRyNL1ES?6JYD>w8I!8Rw?+Yc;Zt;z57rOnikX|55ESVUgOdLG6;9dWPV}_t?jA8(49u)=&Dz~ z<~JwigLvHtp=?yq>w4Akt2{_3=tqqF6k$A(-*;~IFxFZXvX`5$pQc*YWxm_d-||@8 zGD!3#ua6eku*dlv-}5cjOF-Ll~#5)##a>Lcd`Fwuz6P!YgDVW(Ia z!Id=QZbR}rS)mt?mJ`Dl<`a%ear*u&pLb51wg2Fo$(a7ta1!j8MQ7HQYt$Vzz6-v=28Q^pp{FniE#*{QYjpcOPLvyE=O zY>znITi>=W^Vc`Sn>ZnF@Tb+3XMfuD>ahhHM+#1F2Ik9;9QO?MoG*jLtc5Zp$Nsp4jUhr(1>+&{%p6+4sSba3#KIdY zMmcQ(9;tn2@-Mbp%Zgg%UvzxkZORIw!f;ALcw;ei6V8q0No6b(54<|YgyuP{Ecq;{ zb1iUFQy+M**Yxugt(T(U0ipsqsmk09W7Kn_`r7;ua3tLmoG`^?!E_jlEyt zycSm91^R1S)z^XMzdiDf=1tCt@FM3t7Y|kQX0{+I-N_PXh2uQ@#TF}S;AoO9O-uwcWT;eeq%IbZ?I5SfQvXcA)s5tyqUq$Mekp1s4;g5hmD}C; zq$Y}ANIwS8Hlw;>Li}j?UcNRvzw24zgb`7;8RBDNbMC`OB5k?5vZ7oQHhM|yXh#&g zMgZOHn&sh-<1!?quA$vO6$P>v!U7W8zveO;iu?Z>Ykq2IA1WQ<97AIELSwEQmJ~YM z8=(MWqDB3P?EgI)QB&FCZ62d*XbogDqJRdeQ8qw9ks$ZrpxHnV(6Z|y4QpIDq;$2Q z$vV8H8aQcuEq^3Ey$}l1DbsW@?eJq#{82u*e*@%D?rbjh>^}>L4If7;yVK*hVXz$6 zQrov0rKP$c2ZNfsa@L&=VmrLoAF|9FQneK2cDu~|gdHnsSWR2`($Y`}hyIjCoH$^u zjUZ+a^?%;nQWQB8{`CkVppuy9>L;+AE3!r+6@|kez*~|COZidxf5K;w5>|zT6Bv_Fz1H5iq-+<>mb6&~~i6o~7G>X9Y5m594q6vU)~dTpf<6OV6&@ zQg`2!Qr+Xe=D;8B)ZN(?qevwGg)w!0b;yF+6@>>14Rv+ZpfAPDOH#ml+48}MDpJ3( zE6XWo3tzVwmlH9C)+RBH8jH4EjA~G$mkgy*fR2(8Ik(odxVjRJ?Qy}R7M%QkSy8r> zf@x&Z#5q=%{<>3V7ajA~?$`k*33UY*4p5+B1Dk%fx7dW5pM==Jwz=EjY5i{q>~Ap$ zR-Qxu(PdHk9=AGm-$wdrw*OVPJj0#PSp4 zTBR`>k)pD^vSw;73wH{Ekgukys;tiAV)7zKwx8SBdJu!dts|cu>8|~PGCmiRjR^*K zIjEz%xxHJwJ7icUj_2YV4MHo@85aKnk1_!Un+?bbg9ce){l~hy z+89n9FWh%Yj!`E45g;p|1U=SDKvP}=)riG#UaDSEQJ8`O3&OBT+?N5-?{j1@Fxq~* z6{kvH`>jA>22P>B8>^t*!f+&s6xO^% z+o|$MPFWlnS2l%VcO+Pw&PT%;d~1N27)qE**r%?6V4DpqH(x5ps!}jnA!UBd zO6bWFA=W#DhJ^7{p}$m;T>Ob2`?_x4F^Zr9Ty9YeF8U$Gr2dzx3g=54{<49s^-1}T zZa;>(G*Ts?7WKX&KfLf|nPZ(O-u&+tVRIHb7YmMzlc+J9c+_t|Sa-(bvTCI1PEfVTQyQ19#DS?XK4J9{ z4M&oT+>mrN)12n21BmPDS0PYEL6S)B1Yf-S3YSQ@_*UKr)A*gahL8YT?nS*LRUqsu z!WdLYIAu0NQ;0z%g$NP8zckFuj8+U*uggaOuw{BWov5Xu1IyQ5zpA0BaN@vI$MC!} zHOOhNuzz`pm64uv;3<{_37@kqb27k)2Rj87ILHyvJCg{O2wZoy=uGt!8 zMli0X%`R@L5G*MShnPPsk9oD873s)(yh}13+>-5V6DJ~BNYx~uDfm|1eB|rsu(|RI z?SDz~c$37YvqaQT=DKP>Ou?0%F9+$~E2^p<-?@hLT`-e)s7N$rQs-o+=49_BceG0w zwcf#y?zyost@M2p;vM6^p-N^2qD36lWhijc;L)n zDFH>C?)Gg&ZhQavTHEQ6=T?v+;SwpQcj7`h7H)mg!i!X-J`PDzI;JL!u`*DVPLD*{ zUUOkavx=0*Ceh%s#5QEI5j6ZvGx5qgU#?H zASdt;-l#!d@v;G!j)Vlua}RmL0(_cOKEa<7+;|nSCpWetpQEq8T0TicR-%KQx)skjD zhlFK7ssQ*55lOH-wetw|yj(dZ1M^@o0ICS&3?QKXgBq#g^_=jAzn-B#$*a2GW03iR zSX5e$-#!`V8%rCx#*ZnK^O*=VtfD>>x|b2&hPl2b>gxC>ZkJTG^EzG27AY+Jg>`)3 z4!TU`AK;4S+<4uCCuO-U%PF3KqLFL73GN4cBnfH&{{8Gf0IJ_L-N&tg*+0M$DFnfE z9<=@saK>}#_0I7q+AR8lR+M|K<_G@|@RM`o{V?cdak*z_IuPa`U`x?H=xuLP^gaId z@ny;nQd+4LFntmK5qh@$|9|2CgR8V8*OM{b+g2Qh{mfQ7Fn&gu@pU6XieTzH$md#p z013*+$^u9Xg6|@;eE+ScdmFF__#5*NK>k*?5I_5;SMnqS5@4Vy%EvJ4IY{A2>W zES2SzL+(nJ6JDn$?s4xGOF5*eXx9sOZG6_!`S0~c1rJXE%>4Z5Y%Akgg_a{yEiwWC zWx%m#&53sXQINsms*u}yUn8#cu=3M$yn13>iE@_T>T|S1)0QX7+}5LQwudY?Cv#%! zM|3{<%%7+Q!cYkT%~$E!(*G*1{NEAnq;(EUJni|0w|WbM<5{0ZJ&x2Evy4W(A1o(N zh9lYhCK#^@%HU}tph3dv4hmI4h>i#Zked@D_aop;$r?Le{R7f{QUB4h#O~o*$&6?a zO{$gh&1GodGsY7YB$=Zp{J-?LE#m?`7<)Nu8OM9k#c>&XH_*i)zS~*qi>nCTnEge+ zT<~GRT3Z`Napme=J_MjrN-Aq(EwaX!WqrV?2$&NmUf{Ipn2R(A6|T=3a+<2_-`~HY zy@VT|wmp`NWybT!HhUeekACxF-5Q;{R3JoJEgH7uz`>X|uXDacW>v-06}b#4iEFO^ zep<#zQ&L`9US6D-!$232qvwc+8)9a|cQQsG3j>9OSyh}83I$ytuz+42aViN;m`oVr z3$JpmQXfROmKG<#rzUiP2@R2z9%1=$Zrqu?eBqJCg`J$BwO=nNX|q>4?f6zi(2V`% z{UUawW4Jm8GW<16zFj)xh?E2-*uVrT8Dcv}hU0p@;=V-VydsnhGEQ+t{Lv(H6PuMl z0D!@g42e|GKvq&6dPQ!$W?7>yLrofVT(=4+u}kqPc`GC4#bPrg#`d+>0q9kYp&wg< zq9n3ywHZ-sYlH%$82)*ypro&CPOX#P@9Q zOI_9+A9(D#8r(f0T}j#&v;--1%LRhz&<*4{UnZkse#c`-s958y8%g{6GexV>$WTLX z{V2(7bku^QpTti1giM5ABNv~zV9;G*xp=YJ02+rlIA-HFbl>|{(!m}zbrDU4gYiCwTTI#c!Q%EB$(#l^R1J#VW_;@y|cjA05_9F|M&59in6X4WrZa)1` zPxaKHF^iqn-|X~iw(~Z(o?Q%;gH;M><*tG9PU;gUur!8 z^W(j$m$UNz$gz^AR(B=+Ljb`Bj6Y(f5JrR=LfY@Zqf><1!ngfj_L@41EIOrOwVo`@ z&aJ4Ss8q?#=kh{6F+yWp)%fMs2^cd9IsPdaKWbm=af9HX80{M|cqN~hQ8a0Id8?TN zgnS%Ye#KvuK=BNX{6MaouR?{RNgv++8*h6UJHEALRCU32pjN!Nm^|?-;XsiBplOiN zM`xIZ3~OY-RMm_~b}A%?y}$s2-W`%s=pS-i+F!0Yd$aP|WBm{((7@Mt=8`m)*-NNY z!X?;Jn^D=#M3zxpXlq}Ef(zutPENsTPUOV00 zebN2a8sC=z)GDeVZL(N6CFRFcmq$MVang^*&JM447aB;EBMHiUP~uh>(S|j`#gqh> zkGG)9oiN?1vV|0#bnPsK(Q^t`H1h`Tp60Z#%#2!1I{tb%>(z3|l(RmD&OBj%^(6)^ zAJ_#=nbkGkE{va+yYe11g4W$@H>tE04H$M)iqzLac##W*+v76nt5wsmW`QSYFiS(> zv6Sq9Oe}SUmwEpC~SE3mdl9^i4Y^edQ3}lv( z5j{h2z%)Rp^t?xrucRr5Ld8y!iWmaaYskCwo*hA&Q}RCM(>{M(JGkwr2UIrWixKTtX8 zXi*QlwuHO+n~w{^SpKx3QpOfUVM||YD#+`|ZwcGp7ce`DEp@{O`!udKjTxkQ+L7m# zd!qgxJmazGi{U{^+RzI^3yN@Ee0u5GdpT*jKOD$)ak0Ulkz<(2sxApZ{z=@Z$Ecu? z=^N1rbWa*gaZi#NmmH$jlo{hzDSegu^5*A44MN1VrnX2?7KaHzE2I2D+IU>g#8gJ_ z9}m4Sq=i6nGm?*N$&Hk6cAaAF&Jrw%A*K~=LvFC?k$J{Rn7MppEZQ<%HRI!aHm5bB zj5Wqp=_1jdBjHqx?y46_{VvjD;$cbo1KGoY4h(uWx|6gv^`f;iEs@cOjx7d<wD+mEsut=&>Ck<%orrUbg=;;u?{}h%`RHTsta&Q~}&P{uSZXRiu$)AmQ=g5F+ zg5m(EdH;Bzpp?<5XT)FOlN0q`|D4*yEG>%B4}#T&@;)KMLY=WK3WM>`6fAVnwz^I6 zQCKA@DKp(M@3|->k&C_u*c`nOy`pIsk`UbM2*!6eFKhm(e>NP%(Hv8u9p0t-F<)=l zqL-%>gAXH}efA9sWL=U|Iq;Amv!;||CpAvfbZy_=w6ESDWmguW5W-Q)Tm^y5X)Me! z&3$9HiD4|7pT;f&B%TG!*eE108JE#{J7q6-@m;D4=dvZ$Y~Y}nfT|ObZ7P3AESyJC zhGoXV#^D!0D^M1Eb~%rXE3p((Rq%BhXO4`nRL~{0jf%+0LGtxpEy=WPzWEtNztEY) zHLl-_YxW`Xce%YeC`uTo)AtCO-G|w7b^I!D^y6qKs(2`1KdS{x4~U#RRqqN+nSz7+ zvQu4FT3cv?aT=4OA1)P45x3`8Yrl>x7`repEkr5X?gi*iT=16QQP$uB;E$;xS|UZ+ zXe@T}E#rYCqGGXdFn(6oFI+AtV_QLm2bWVe0;Wf&L0yjvn>brUGRrxwH%_2nnBh%)SUB-Y{r0-lLe8vau!=N;Y~ zACIES{wCx3l)JK0LS$01TJ~qEw!2)`K#g7AQUe<8ouW`D4=Z(hu)XG3MpQFNR%0De zU<;L8vRy&zL5tKXQfsH#BX#B6k2E|?Kd*+d`rDFql*RJ6_rD$G*k6sNu;a*&5fE;v zgao8J4L^5{n-RAcU<01Ny1X}?o#4IIcEg=JMUpTzwlCK_7{P6C2~IqTSk=OkO7t); zX0?|@6zt(KrIwe2bFrE+s};PJ_kM0H0H5}JGi2LLpU-h+h&;-}wk4oG<61K2an(@= z|6X)pkkUUoxz{JNMGXUmM z>FA7uZEZ8eX>cNtqU0F}!5eG)ksBSjLcV^*R_*^ywfbMZhNn6I06D1t0GobfJ4)W~ zH7R9-11nukjm>bUzVhZFz8B>>Eqv8S)kBB{7Kt{uJg@qx0zbPm%3~70(4Uw1zqUGf z3Z}J&8LU7z6~{D;sH@RnO5)p+@#x`~-`cW|!dD8u-nhY?)xFX-zZ%U;WyM`N+3;(K zTN4sxtTJ-RTBCpYGggiQj1aK*J4Q3KKKozK?|*-wnFOMJ{sVZbTo_MWeiZr_OTCg- ze4F(o{^D~8Qn2?t8oFc_*#z~FKy$>UDphmw7gXlKIW>j?-|Xx)UgsQe>8uW>o+RM* zTV$aASQJ`sDKmR#GpFcZFD&dWO9ge@Wq7$vZrqH+on)EW!FFJP6pBu`om0j8lp<^jpUClB>zB6Sv+aZ`lj+0A-tOv3vWnMlB2pH7eCa355BYr4%K8+~U6&SugCf zhz~ng$a8zPQ!JJC50K&zed|^6s?zqoDTD>JKe_9PBaAH9m30X|)*Uhna42~%;Wc@F z$>yRw1^D;9{~#^PeTIwx`h$H9%E|U(a#8%2vg)|f(GqoqT1HV4n;-0e5UPa$n!U83 z<9nBUo0kQxKqv~Z1I%c%Gq^CH^k_S$MLmHdNC2}=$GD;RH@A!BzEE0jr3GFH1-Db^ z?EA5=yo)E6TrBvdp5fr=`NhMbXZ(zAyW_FQ4{e`rl%z_2xs5GFcs1=AYf1Quzr`-H+h}l4sxipB~zFDmC(tfY%!L z;O$L|`VK*4_NP}qU zvlFu`VlCLD%$$)knv*deS69iLC$|OES9u@jinulQo?F0#u6H$9 zY*VyvvRvshYfoUip1L4r!|4Ag_*yTCR2eK$Cj$fGb{;_ciF^kMdO1}Z6WLJU_$YGD z;LWU+mr4USQm$Ax!33M9H>Ikpq@8Eg8|zQ+j|=>J?ya`KONXos2S?LPnmnd_+Q^h- z?+LoFEdel<5WYGgp?sc>7;Ib$X`d%i^Mx7n@YYRu%;rmkhpV!@ zhiw?o7&EG?|BFD*(w4av2puRw__YdFP;PXX;~*}Hi_%i!VBW| zAHkWb#C0*0gEb3IXE}X&X$d1d2Vy>o)GS^<$XCSqV_2!zDjNZZgI8be( zU-#ydKNBm|^+#gM_fuPAvVX>{&qJyxyZh*Ay!@?Sy(rRiI=$~(izFzkQJ6va@S>;C z6e{zQj8PN{9{vZ|`5+7ND3--qd`SS+y5_k87Eta}M8#ku>UniWXB%8G zI212FZ&+4QhsXSGY21$Slu=vXJ1;6TGt)QH0xW~L8&;wl=lQCrxJn!M=xkt};yk2? zXKIa3&y8Qv&_Kx;WxFt1IkeCq1)ed;ApR9B2Kb~QFPZ>=lIJOg#;DG9^b9h7D+3{% z)^k7m`hI(}3`cT9uhzsR$yu211+@Njq?pZlXWpDI4_c$cStboOWRcViqf#^?DwiSJ;M zH3lXq=0oEQy}NwpaY@M5U#H8rWt@ z-j2Umv{4hqGWow%mlgHz+ZJ&IBNKu&#)mPeW@uZ^+$qB+3bQxev!@zvg;7@Un+G&J z!Y!;?iYXn10s|9UU}jSki%BzSmg}^N(VthLyp_Qj0+0mJ&*+;kVOz9hx;liv2e5g=0E;_}Ynn-T0Iy1;O>$jaQS_+_G zNS*sjhHk&0pRww`wO5BjH_Udy+O8yp%3%Pa+P?aV-6fNL=BIrDMX>U;hn-HwRH4dn zN-vHO)AyLb0Q{cx=fH}mp_UIxf0EkD$B0mXt9TXhe;w zFP*i%aQ16t(bT0)$Wqgd@Z|+KK09wZ&%r~(!mUcoX`bm*8e1|lqev=#u`KV@a*5s) zqs%>puV)CHMNhSeD~POW#C4Hn3}crN`W~VoF(ur&#r0EcGZaY?32I@l$o7+}gMm6> zirjYEo|hgi7Sa3Tm?oo+1w;4pXRHyMuft4VK;1H?24lwi5kJGy9eZn2$MxJ;tEY1U zw;u$&3iU2T|7UUX|HumcXX68w`v~ZHka

2f*dB47zH+$n_z3H2nuC{oeKuFjr#o z(&Mm%{{9hkGG$NpRBsTp2HD{2|9qV$ZG&BeY%E#h52o7!T`rYAoOp7oSF-8q?8t{N zvsYtFO3SB@T2Pb)w1*l!V?1Uj;-i|82+VSt>)kU2zLZ2D6#0nhdTr)u~Y_2HL$kIp@h?H{ks8&2l+`xCT?%%h(`@^WQi z=!-_;a$cUub>#|$XV4Xvo4F8a3)DQnG4F1?cTpL*av@i&1gUSf@-Z*mXstZ2q>4iB za!^XLuQYa6rVN$WL)Nxqk`T%HGePF^aoy5vH|d#0q+Fj^`N^`K;LD;|(PT0iX3{B9 zW&378!fWP*U-GYvRyPR)H+m5w+zlc_SLebc1G#;eVD(vR?>u2jzsF}@f45_{2;s3c zpkPg%SG!2ZBJh#3t$*8hPj_*7CGRL2V-~#PJuRylyZZ zDev1Hx_X9_Ajt62R*;(~dcc#=jJ`%*r3AS*SPZ7-S@DhJI6mX{u}FAXxzozATM)K+ z-9dO!WKBzXFstwhyj+Bxf@1i4r3_iBJ|g&=<)TNT@ZBR>MnDg7^G4_OCy%|S9BSWx zfQIYF`Bu$c+neeyn(SViWUC_5kHL5CcgcLrOH8(=*F}h`*cTexE$xaf7^+w+|-%BH^&SQ>ln1^8Dzdmv~#E!K%&(B7etDcd>z*KO#dka>GeZ@8>ySwf9XOr zMJp>DZ{>c|p_YrtxTUn5fv@PP@||>Uqpj;*S&{UlDwNcOEh!7`o9lMYN%U z@s(fr@9r)8PSC^r8p+lvKkO`rtt7S0ClUO`wf5|HTZaB@F*45{%YcfNEVwl=n&&1)kX4r4d&k-y^c&GbFT1eXuU9ziUe)OL7=uPs-BR}D2> z7lNYSCzg(dg^RU{%e(@tXseH50$a*eLJNIEbp9J2PU` zZCc-IGbr?;rf^C7(9H-p`twskjW ztAe$^-s6+e-e8yY9`9L6R9QDH{Rv#oED{_Z!_)0{3y;6dp;yq;Z?jfS=R)NZbuGLi zHMmleC;o<2@;E#^WMmzLppNXdKx;z+uh*#{J#IjENwZ~JlO?_f2I;0Oj3#> zl&nCnL?r&nH z3);suC88uejWS+DA4``G4^xFh}GiQTA)54jFX^B6@fK#0Vwr*Z*z*7AeNNpjQbVB)0B1ddhVYBr+Q96?ylP7r0w6;WaQXV>5o5*ZIL}zAQL*39RUam zjn^u@N$d1`h2*3s&b$2(n;znxp4t{u^hjzpHbZkZGW2}GS^o1gLUs4?QVt4?dS$Qh zLFe|3D=%F`9gGJbB#P8L>3sno!QteJJ-)c#KRNUes5LHiD5T|V%G}&R z4f=9m>{Mb~fbJ0S#W@?@9sB#qgsqR$uU+!K){D_vg&%}-)_WWyZdid|4&k-o@|biA z+Y^=XPbCM5KgO?*>mICJzHvZTjQAdK7-&1jTt;Otu4QB{``TkVkhILb_a&`&r4fMG z&H9!dKSf*O(q@)OOTfQ!DrI9juTao36ubx>EFxS@-a`*5tZ_@ z-}#p;@oh{t+rAelLyff<7w!6M<5Cp+YeXsRoT{N)GPP7 zA-R&o3|(Y&sav{^_9c{ZE9@WC z-}Kqt(-57dC)VSLcNLvKaQrl(18wl;f#Y8TmmNmat>(pLr3L>nJf zjz%w@+z3ccP`L=Q`-v|%!yPZ)cz_mxJU6;vUwy_XynIkdVsVbox73UZTlmhZAnfH= zK?7xCzee;aYVw^ZWP<&S}SASQ&Xsy$T#QecXXp$EpXCbhF6vknb# zB69VsZh?T7decwOX;(BZNh%U#?0jxp+y#k-VPkf=IW;`i{!;QPB`8hGtl+|z+_R}? zTu7g{a7Y=G(rjXrjUej5AV?9 zMK`-w^}l?i(E8EgFGl)Nwhn}?w(~{;9JO`jIoM?F zA$vM-!{K2n%PI5BC3%)IQg36PHYzU@@R{QefO!z0s${gKzp^gx;pd#FpI5<^02T^U zE$=0k=Y}fDR!f7#f{(<3%o!xnH%zE~nZ6tD**$G_5(Oo7sl_K{r@pTi`xFRO+KJ4G zKuc4rZ}cX$GA4ALa}U#(1>e7I1^jL=0O0FM-2*g=41bqSOp#M2f2_O-i~m}@yi1}< zW0a6DCl#!++ZUprzO{i13U)d92z{2`dsJ#Az8X_aT^|oU&@t^@wfD{+|8u*zJ#wAg z$hjy^bQu+Y<@9yB(dM8y%7>oOWprnq@<>QfYQ+pOYWEc1 zK7jrmA13_A0{;MqsVl#|mL)R%QO!WieaHmn7nqvk!oU#Qa;T$Zy z2D+&VjBf?Z-^Qu~x*sOCCgl0zZTS$I9bIv3nk!Nf;=EfzbhJ}y`mZY_l_}*MGK&bL zd+t=Jdgj~=S^Vm>U?9T&f{)#z*!CPM@JyqMyx5Viyd$mhb;R22aU1Bw%=@^uN)Jg* znlchk$O{hFXCe>t7L$+tsh=qfyr3~>*BbOT*SsR&PfGRrP~Ws%ZA-IBoqI+F-Xh>H z#4%QfkIiPIB?|c_HE+&4ZLyejt+Qd;dERLb?91YazpjInV@gfGnLUN;?YE_s!mms`~EFxMl_|+lU0}n2HUTo%N74@x4VCAGK5QZ-;EqE+TMT)-K+IgImd zhm4{awhg3-rm*m+{T?qzi{nV@Wh~}+F#GxlwL(yTkf$zdS!jUq)R6Un!2EU#%QiK% zRC*Z|2F+eg@&siYbqTv@)C?0AlN;Q7AELo>W%F^GzydqDCl~u<+6>6rD|ri_C1hMfnA>2N~0dgsE?SE3jE|yS^(pJB!Qb zsD&W`HFOFdmNzR#URguuC{v)djIGI^2ry+@#7#>xuS?j z5{qn=7S`j4R6EDxvV~_mMwmUZy(p4*rz` zpOsb!ZUsGK{ev7{-4?jR@}uI-1(WW`gdjU~*QuNnLI-D9MiKzf!b8DMp$%C`h6lb) zVg~h3^(U*w)r-eDgCxPFM*e)5>o3D_Lh%RlUbn|j-#3FMH4mG}>=x$CYu7bd)?eeB zU!fc5Mlvgn;55SBW}E`1NU-PB7R>Ct5Gppf>*h4aLkO7cY~H@x3|?Vh)Lw8oWChMT zz_$4bN{6x77Y+OKVCx7WdPuJ7*Vd${it8OIMqZNa&r@e+1_y7BMBMcW*@UW!bVDRm zd;vZ@jaN78KO7vp4PBiPpY>QvH55m5l7vVvZ;ya&bkE^~<2aQVLnBL4@}`#%DuR^r=h(0S|w*$1=b zB!tZ1u`Y7UbqTQtsY1K`0~9Ou{0&^Mq=p2lJ-M-B3_p(AP?SFtG1%egCTCFVj&s$C+Al>n zKe(Y%zDA!UQ}K+sDq_l4c`wHwEo}(0iFSIi z-I7focnv8BIDUQmdLD%&aQ-W4%0#cZ4yPj=tMRZ5RGevp_u3|{RL2$Aii2;6u7Y@} z-4Rf_rLjiR1a$ZZ@ar990bp_#Dk_-0N({bmP*r!^g&Dudk>pMt6)O3o;wMxl9K)%;VUD{T~pZ%KVqmNn-tRSzNhn%CJ zDM7NQzeier5QGL(;`CeXGgtDIwlZiG=v8CYCv2qYLjyv#yd2xTnIX~n42vodg-!i80?By+D1HfYn~JFe9x#QuXQvPYSo~ zzUBhZ?7_%XZ9x%Vz*t|ZI$cKffspjuVTJ-4j(r03A+(}~$Uu?KIf>=f zWAGH?tteG*J;rB8jXD#`33Q;SHR>P#jPP7Y`@?=6_w-x0pD$giY*cQ2hlS0aCvyUG z2b%3Pd#rV4Prrj1d(Z@0A>jR7~< zBtpE=3R}2IL)u<_7urQ3@Bs?ZcL=NM*UcHo=_XL}jl_iR_R~K=efp*7o4AMQ>-Kq# z_rzlXL{u023VB4+A?=M=9yw&2?~sR<>sQZ-)b>M~!_unpwNrJY$5r6jX3+o1@YITb zJAXZ5nF}JV&)9&H=k>Bak6r9+-mv2+!4^(wb6aOBdkh!~X%eWT37{5oT zIks$UxL8oNt9O&Rz;hU!hRt*0AkI8!HA!uZRO7?Y(4i`O&D0|hJ@VZ z(ZGcq?G1Me`*t)=%fga5xZ{*(uWc=#+p3Ez6fO*(Q2~LH(D^Tv1wTxFpoYssYL9i1 zGS~F2%q;Yd!Z5e9K2b3U`6)ryg3Cn{Pd9Z+?fn}!f=29INNi|eX$d2@QW~1P@AOQP z%fD}0mF30x;HKsTCz`VnHB{xCBEYN>!EltP*vjv`y|CoGh0o#vd}#vW6VjU38N1SO zSnonbk!B8ER>uYOD=h*b^^^FgF(&cnG$V~*F#~mf)rnO2zHVqXYWh?B z)wj+h?%iq`(nwO*h@Ts`E{L(%=&njU>8#eEZAq&Y$Cu=?f3{yyvk~a7$PP}`Qggsp zL^Ds*obWd|T^aSShzbY|6P7iIjB%`v9jG`zy?B>i6{JIHKcTvo*ZC}&R7AOLky=Da z9Loukx5jnWr+sN;E(%ue3Zsn~qN2Dxeqj*O(z!d9dRSKZuiNcE%gX<4o%zp!IYnRl zfQl7e!m5T&=lkbMVNL38#F%SUMIib&*g!rCSr!pVJW$Ef7Gso+X^vnvGpkdrLS}jX z*`^MelfU6+)+aC@>6pUB-zL+!MeG^%VwvYY%>rASl7hT2jP^3q#9wFmKbcHX3onYH z^!i(?Lro3&%KiaZMEgapjE^Ioy1V+XDlMRA2fl-BkyBJWqRnfVBMcI(AV6P%C%4^ z`p3knUD_$S>f&y+quLjnP$a{a0zdTc6o7$4|y17q;(m-A^>zRYN8Zn;<)=ZctK1w8w6dM1kyr>U)WQij zRK6{^x_9_Oc<<+yw=MA!Y87=zbGEHAcM3L_j(TclK}JEPKGOK9+L*c`C3C_AkI>rZ z0p`U2gS58{iZgt_G@B405F}WD#)Ersx8Uw>!M$;JNYLOG+^uo#KqDczyEg9b5;W7l zshz2snw|gd)>gq6zEHf~&GX#%Ip;d5o=9f~j(ZDU+$AR#@b=NErfftlX1oiE1To8M zQmqic(b^vIuQVHjx;T7%az|A1pVVX&iMffS+mjt?SE6Rx9_ye}JI5i&ev0BB z?<02vTHHbQaMDd6q}|qN#Hfi0^|SK z8%K!j3Z*|6jQIDFdOr?7NxP%+6j9x*+5bJFe<>#KBfz^($H`Nd@ zZ>9RS7wbcD|55ahsk0*=t8|3rpWGqJ;ItNPRfQ22zYl zLbUeJAOALgv7u>9>I%)pd1g#dy@8iGxzmJ;t_sZoR~8eCdV8Ar)Q;qbyEr_^Xx8%G zeR%V_NzPXMt%vh=fJ>uSR&tysclYOr^)-iuo4i0{1(B+;YT*_4NOU{}{6wI+sZb^D~8BihPdJR`Zpufv^#J_~0r%mxnG zo2OP+S?Bcp%oRi!E`&o&lKH7cgpQQ7HRzwd-E^7V19_oF=~)gir?s@;w6~J`gQ05c>is;5%gnB)v4A{Ko-`g(esG*83bCtTC>aBhHzSK826iqw}^2uT|=*jqaMh}Sxi4F zik_acQ)UINNx^AWgF8POIycH!@KU)Zw4Mp@!*!LY)Y_Hju9v;uVN)xRzydl_yK@wb zc=DT3NQ=b3ydx)~Rr-2IuW6*H=S0zJTl8N1U5U3fo$9CDlo@%8Bqbya5^FHzqo0dX zR?Xm;hFW4pZX=BmbM!4fw+Dx?l%`m%>bkfAqhV#294N zi=ODdIEYdQ3m?~dSd)|ZZn*Co?LbP8`%5ri*SHwCb=Hx?D8Iw5hcKi$9SapV>5n<) z-lM0!8>YGPHvLM3_T)X-l9o>3YDyKG4Zmq=F$efZl=!w)c*Rln){$on$YP}tFVyY)NPiQYO=B&IWSfnug zz9TX1tFS*;PRYM&8ie>{eArp(oB0_FCQ>Mg&UOhSg{0#hp|Gv6h z4$eT}EJIB!N+4QM7WU4vS)#ICi(ifrUcqNfBmTHzSn`dBL+KIi zls1oI9FLu>G%`Q?qF;c8U23aouww_QHUp3(%9tc$pmA&Ur}%iRNc_80<|6jv(W%8@$Kfq`V(j_KD zbe43u75U)hJnQvx3M6DnqpaRo|ZipCfs=xf!0y2b$1uKD`gg#r0_2k<9cRR%NRS=QQT0l92YC z@j%KQ*igGx27+gEo_rCzxVCq(l4cD6IRUqO!>gFq^JOKqgxXh?ibMwvuL-) z7UIrS_-di`SLSa|U`81NRho!p9F`tU`<2N`p4)24er1g<44X`x6DHwT%451FGflzE z0M7qu_D=NOk2m5*{_(G7tq7MefM8O8v@e)73q@fxe+q^MsS5#h`hjq-8>;P^c9-Zxpdk%hDxjcb|Gv}h(8(s zLTao;aP{7}e|lk!IO(A%YavyJe?Rrq??OvU)%X?+e@=1t_rpUXbdX!=^vo|9<)3tl@9YO`z1){ z;`rQz%H?eNIiq?reQ@jQ^MD!&H!8j({ukLoNg0F=F*4!t_DWk9)8S``xevC&F9()w z4=!+xfG_?w6VH)V=gLDpw{s#Fy&m6rmXg`zGQdPWbso?&#RiRk0F-`4)wNIco`6E5{N(A^f*Uw~oz2rIHm;HQ*8-B1@qFq0;mJ|C5q-#r@JJ94tOR&)- z+0m(Vd39T7?d0=MJ&ue2bK_*U@r29J3`KO=ZM^Z0WcaqPE4;ng?652M~$@?L9g)#*iVx5ySba}zGq;TVyO%2#iQ@#Sk|udu1_He;(-y5eON5C0V+9~i|8ls4>9S|y?CH2}zF6`L zR@f4vH&+DU7^C`JB#_O35|JlO?h)@D(7Y35<&&50Q<=HhxK`HL<{p(~#awIuhDw`n z)h|cSb*^8E!N~2yhZcA=@gD$UCiB#NpH^1mR9`WW4}bY}hMt3iPD%yi{{cQ2sl47l zF|BdD9CYm}FNz*oi5~T?TF2i91JKrX)$~J184K1iHw7RFs>2eAmGI zoQgKx)pDie)qE{Ig8}ro03~{Be$nSY+|!j{|60VX9Tu;4&m)JqFiKL=vEsSRIbuuo zKsU?S#Jm*MJZ;N^Lr%Q6%>yj!|LTG@F8 z?{kqq(zDAiD@_-%IW*-;Alwdrw;j#*TS_$=K*&-8mMIj}opY0?Cy^NpD!(z>9@a0F zekrSdz0B~p^23+P>d~3rbr2pv_G!Ol$U@;@#YGT}8-fSZO#1 z^eex+#Gef(5kFcLlp-F!?5!7SfFj9G>E-;q0;m!-`-iWxrDfQaw3L)$N-B%wv*qIC#crAVmTW6+z@?uGmaOo)9Jz(+qUSOf=Nsc6Op-+JimhuXS(WhK!7-@wx7~_-AeIZpP5;Y^EeX< z_8ceKCtlad!C&a5t`0>YLTe5lTKzUgMjpA#V??edfdl-EZPz0U^ZbyYKxiW;IZ!kb zUZLhYe<1bfbdfwTQ~sLSFe^V9U%v|6-U^Nfm7OPp{#}KkiM3IE@i55ga8KN z=P^d}IG1~J*PZIU`Ty8=2#9I^9L3qJRDPYB5mzrs%HQmhVCa+mh@m9p@p)#pSGP|M z-Hp=2d!;zCfzoCN?Z9Cr6oEX?8CEI%itC~-em(eb%Tg4fW%*aO_Vh@n;}-OPYjXIX z7ENZO?#me4JN}As$0dp-;x)Zk%?DpbN)b9y292Emg?*mo5n=V#ExP z7JtCr@kQ~R&@H%;N!Wg zkArV!?YBg1_2qUx7++)b-7VmUNmmkHD0~*r9!bwOgnq??ZVJvHcN03PC20*G-u#2xc1n;Z1!lHns|N>l87!&C%GzY z>q!{0tba(W$mKF4rHaOv+16OzA);BST8))@LXjp#c$u0qh%bY0{A0}QbzDyks~j;2 z*bVEqU3IhJb!$p0A*-CKUoKSe-A1TqQ*YcO-^y{R|89`Moo8yuRz4>A2S8>LL!B|4 z#6jTNU_^NEP?!B{TRAc!dh|fn?ETQ#81!>tC+Qz{z(qNlgV78msOld^j@z zkqG09WSMYw`Y4c!hV#qBUFR?xf6wZ9yVP#~)KD5*(-m2Z91Zhui4B55OfVBwqRFM7 zOPPQLI!e^^h+}%vOLMs3*wKcu8)m{_N(IVb9}$;$&n-1~pZ2%IgZy3iQ<;cQdD#pp z_+B)X!xIl61Y=>jj)dbz&td`nvLES%w&wSQDp$Fi8(dB7*>uKXi|n)0*tpVib-O zqF?#;>*q4G;S(f(@K^~!B%0eC*gurexc8VP5o;LKdRPrxB34edze?JySGR6CqvA?_ zFyiUdaaQlnD;d!CK3uCwXjC7gw<*TQMzZR*eE@^>*1US})_-~_7#rtA2cK^aQM;EN z6)T!E7bnCam*{`KSWKV`X%cT+*6reOY)J-T@4v6msx zNW+gy3;k|h+^0I--!$8Vr#bwoBs?h-U$(+D`rVwlB!U_q!dKzo-6XkO>6{p7lAO6Z zyyBaB7XF<*o1`LRhtCD3M?*sT3?KyfN2HfY5!bhPE-XWXJkQaUltg-dY<-vBsO{Ah zS$t}DBvU%R5^&Sir<+jQ8N)YHbbpij{H3{~r&~aZgyMB3gH^ma-oxC@5!K4%1FAeJ zp2>_ScH5EWT)7=nIa3k8S*T+x1E)b?N*qAI&ptDE7Z_5&MKKA~`~Wyg7L2dw6$S0t zbIi?oRLJ4YaXoqACJbp>>~wF4yq1FFF`m^cVwJ!6N~M}7fgLrJ&5;&g#PlC`K{Xbs zRPV_E0HkUFFgk9IRk}s%RK1rKaOh5N9;@{;`7XJ4K9!%s`Rz`KMs9*TyPS#wa8_}8 z2)s4VVF~J40^g$`fUC_LL zg0-f;idq#0`dc}XSgYCseDTniHU!r9bAJpBKQ9D zM@b#$aoaOoTipij01QsNv}kt5%hlI~m99YBe>@gt*c7HvaD)om_b!Ap97)l5K}^k_ zM%ow}pf0XV->V|*9Dm4M>f10J4}*J14OCR{Ze65yMzm)+VjbPiY3!5eW!3%g?L%@iR%()6S0s8&&=1wr@~$3|=aS)|<@JQcoTBt2;rh7_ zr&$9OPG~2c<0!9{*6rPFn4==?*uq)1G7k|9MNb7EWE^81@_tCanX^!`_v`IKnHXljfAr`DMO=C;N zs@kbrSY*{2uekfq_18a7=E?W+>?hUxq*y}WkbqX{5m2Bt81*(7kpe)SiaE|U|UYD?m(D`zo=)4R21@el0S zwF>&YC$~Bk-)#vzzIj$XnvF(WTzWm~nFxmTCDK7|W_yo*79>$5oj0Rk2ro(3nN1TR7u z6R)Wp{{VAOpt^|j>wf@cd$=UnmjrvAJb#>JTl2mhWKAW+NNwYlCimTMc_k}jh(4~u zAUj-3S>bPgLG~4Z`2=~boLbCG)PJ;NIqdY(h-3jIl-2B73+m54=OT~%Q`0Y6?S5RR zL7Q+_G}~D&Khr-z7zt!G2pzv~KUmWKJ6`{1HWys-e322}HHY0!-AAWm%v+?q*h-nm zWe?j@umejdy0KT|U=bLB(-CG-hYh<82rg1q z4tSIinLcmd9DZ(OX&375G+0((OcSTFWkx8V+Ce=SNq(u>e+_JDhwi*;LswW%m$aqB zd7P_$ry>VWCSaW$8gzCNJU1L;lw_{wL|vXYdRmRZ5+t;8SC&qw-G62)!B@0ABB+&g z_^uq(&CM>7%w@CNmu{!XOJ{Uc=e+YzR&!$?-Og~5aJYOMKfDK``2bXQr}|$`yr3lY zO~&WY`%h;dp;Eszs2e1YB8gHz7DuBs(vx#8wD7{;S7}B$P0rB!S`pzp(AAP(T&C|R z=HBm3s;WNA3R^JP#yT_FsZA!;ys9XTgDX_;9pEwuWW41nG7;p`0&1VKcKRhL=Dm6_ zEQ^kS*C&p0eGDV0UpsN*nX>M35Q_O_psd=EW6)^h@N@tF&Ek$1y}3Zm+tvk ztAnEH^zi(n)NKN#Bl2ZFyVi1CH%mScxn zZ{7ucf&VlOcm1bK_}S+l0RH9s+6nh8SFr69T^X~*=8d@Rpg2#OUHCzSvy_?}1&-m0 z9&-xE37BLy+wsWKIPg^Fumd-s-hp}mjD@r2XaE7A{rA&ofQO%J0uLvHM6+*l& zlt+$$%VV`aSCi*?UJge~@cmlGSH4qK4({^Q_zFlw*DmP+!QuL{YnGLf03lDzx^XDf zkw64C8<)} zAJDRApJ{?gL|7rbsr{xd^}y)o&Mz?p@!^k(x6QZgQ`3J~nSpX8YOk$#;^j!{F3O^* zL5l}!U)&!TYV#Kca#MakdmRRL99B0QB@b=gvA)S8de&e|tQyv~;J^`TZq@HgYSGhA zimPSP;M7o;g3CKZl(Ap(?+I4N?{zp0xe@EH2;tifhU-HyJiMdvSDxE5PP!PST~c8s zD=WngtF>bJg1eMiB0E{Lu_!VYF&)Y`QWwA=3`q}V1n!*@Y729iSkT;S z?RZhiybH3Cc|7_*K*Wo2o=6oHR(SCr4SDS55sJv!*};TfA@?a}yr#)M9BMA_N1zAl zTlzQB5IT)UXiAdqjg_FAad6@c)@Pv&Zoj)O&L*5mYv0{AHWAXUpX?oFmz~g@jQUY`QeN@cao(F?8dvZvgINXCC=UU-Z2<+V0rVeBh?bB zkJaJ@WJSW{Avfg5SogISImEZ?@VEMZJ<9&)!;t)xZhyME8&L^+s(c^2La4t=?iM>d zEv2J4h8tyjgiWLUS!;T<5MFCgH8~7E7#@DNNDU0j?U?iTwC*z+sJA=3x7O)X>trWv z>*{iBOz{A({%q5=Gp&B|_b?nI20gpJG%(E!4kf!s0qhPJ_4JLj+*NwFRkt4=U)lrL zI;NVJ);|eUdVW2;Y6Ok)z-p&WhrfE!_*+G$XVD-9EC%5h#J-8v`TdO%XC2qp!bmb9ANa1w^)B6V z#c8M0arzXo-b!8ahuqaAS+)3YP4-e$Azyyo)7Y6HT;HvL_!+1SZo}pEZ|Xrgh24r# z%d+TPLL^T=eiIsH9d1MT{riYEfTsb8#4orNlGB=(bI-Hdn&+8zbWSOuN^K`6U>++b zyFiDAof*TlSby|a`85gT< zRNk!kuIRAKC)9tfr6^YyGh;Bsq$AqYcR>V4J~+X+eUw%+k59XDpH_@WjdbpZJJX14 zHH0(u5B3MPm^8I#HFPFVeC2iN50|;Vq4w?^F^`Ud1fvZNU`rCHy4z(q81M8+`QD!4z zb6xD=bNaP~?Lm%3tu{^&cFm7BLSrZV6OemBHu`gdd4llwbCTG<(E1c)gX^@x$;A-t z=#BYrM2??n*0$~O>W?Cm)iQw$6q;74We>g;qN#rSHN48ZYwJXToE}}~>Mc4uq>=`_ z=1SaF_d`R-(rxWCr$VIGmx^o0D@0XkS0mtV6^_~2;6k4Aij)T+-_BU2yFJXr#V6e} zq?*{iBC&!P?eIkopoT*qrKD%TU6VQ?4a@24`c6A$4%!kIMOYEKC@qPa_5TO3Juo{K z3b)>_y*hgEo6kvK;2W!0@-WJ(XJmKJy0@I!hH~0FMPn>9(c7Aryb8Yc$+kCj{uw>I zm>^lou6kBHpxQmXzM^+6+9vpB*)Xc5-fW`@Brm|Bu!UHBSip?kenh{dinJxi?8#I> zZ3z-mwGk_)sOH-rE*j3}yCHrC{LNYl8eQ1AQU#IZ2rCPMCO5BO>-<`>4D2_=_Bd1O zGT23ZY6IwCv+rNy@GpVU%RjYcG?VmjoOai=8(=(Hm5#*&P7qi^FDEBwd+kNF2PgZv ze*!qMMSQxL-6MdeZ`R4JV%PsG0HD@;0dOX)pb6(oyjl7iayjC(UGB-N?$ECP^^Rw- z+r0i5i5{Ij%MF`E^B`1P=So{E6)?E@BYD`UMy|EE!CN+U1Bu{@9Ih&TKJ2WyCl{BC zDJbeU-;mb_qUq8f92WkH%gxOANN=W)4kaMEj4Y`kgRPvAaVH zW=-Q_9|V~pK(=$D*9+qC8)zQo;?-6oX#UF3B)Id-9Da9Mo=sBa-|spTRd-LBCo6T& zU1#&h<7ZJLI(18@)Q~q`sJXQIlZQ0VXrdcjzOmd#dC>DRUfzM4os-A!h_MAj6RH=boXg%zuD5JtHoU62uaF60lH`?(lH%4pp_=-1!}EzhlA7 zKftg|Q=7UT{muhQgUhPmRdQQB`vB441_u;Q;Nm7D#!d>Lm9>N!kYj5}Z8E!a3n~h8 z6Yz~SU4MUlInNy%)pR;)?pZyZk2hY>{WN>lStysG-}#LV?^vic24+;2@_M*3HuO&8 z5x)E;TWtqn&veqZ!^6w`d{c$Za@Z+AI}D26R>t*_K&YR2AVmTa-?Re6U8 zH7hgkRO5BvSIrs}r$wsE-_@bO&yowf2hgtd=bpEWuVk75aOX{ah^Q%YRa09 zfTkyxS<`#-EU&QTu69W%Is_FO+cNU!GXYNcC2J=lDG5-AQT$CS>APE>ntuTJ;mgF9 zH0^&R*zd}_U?6@eO1V0FTkq+ieV5evaa;;wH7-MTSl%lhQx=4mN?_8&eN_C1@Xa^K zZe+m0F6C)$uxMWm=1$A^z-)=Kn~`rXpZmte#%tdtf^$$U+xN3-;ezrnjPsvumXA=% zhL#QL$N68ESaF{?u}JbE>UMUWQy7fEEZ2> zX$R$V?kKhBEUIS$N);UmZm#uivx+PH)c4}mJ{>V@Cx#9@okxDAE^zC=%2SkS+oiuH z20mAvk)1e7ml7kE2bNst8IS)`(7peC+eBjD(q4Ki>=~=nQ|^ckSqZ(WN>o;)ni?lF zcw0GI#?vGHS_GD31mz@s&ZE;PXRy6I?jR04&+as_c`1=LCs&CjYWI-dt_d$h9#@d3 zn!`olm*}p)6WU$fU#jdl>c`X-6K8pPZdSA7C^M9*Ja z)(7l9>np{!T??8vV2c%9`E?2G==q?4L&BUUptNhB|9P=-^_kU_r7$F%7fV5XY?H_G-!;E9*rfUDV zvy^GrR#4bE8K>l71S(qvy6#Z_rMXu4)KL+3QboHV%n8d_7LXIp5zZ+!Uv6FS5+OmsR= zpUx6*s=cLD$Ml?Zwcf3hDtpPG%=r|3DD?H?@M(6R6)wf(3gVVs8v)ZR*%dCRGr}Eq z!YgR^BHYWsxDc0tC$MluRmHS^7n5tU&Knzjf#7B7!HgxLN=8TjoBT78EXqV>$E%p= zod)Ru{OPim!GjPlsplk}HzrqQ4&*nDJm2)>i!eA2(+ZP&fXE)I)VqF7&FhptHaKDD(R6-bS2d%I3;V z1FzF7KRmWwW?j%9(4U#vpXyj$r}WhFT&<}nT*V{G^nG_|R#DieHl|>ZR53)II5ii9 zzM?AGTqjYoCeNiG?R_Mvpdrw!8~XRuP@s{8=})Ig-eZ04593X)XDxW9@3m+Oum*#1 zcDmsc301?*1&;SxoRj7lk~8YtA4`gK^xYH3c5L!vjdj?#VsLz@UGtx~qq$?983TN2 z(=;ewZ0&hzn*m^ z61zXwxAM7b>CiGX4@ahyLFG1Zyeex+RJ!AToY()`0sg=Iz{t>eJrACF@Pfy+3m;&4 zq&zBiQ4P`Lc245Nk-Wyh%#U_MZ$B}5Lqr%dfkqSJ1hL2&#*DwVkQk0^Z|ixYb$-N( zV*R`lJ-XdqXk&eH+7tmvmZp0-jat5sg15bp)<%E_QN*qo18NL-HRLvIKQQIEbG)U_ zp9Q#<)U13*5G&hoZ!yokmpvQg@<0mId>fDgZ*e0%H8QGG@62*HyE1SR6iXti(_6MI z9_-c1Wv7p&&dqFymZLJo*J4h^OJ4k0;<3NHF+5VCU-^pFIQCysc-57CCY+ISDycR8b0SsC0h)A^HPN7MS9Bby=W$4hqsdMk4&wQ>@iZdZD{FNghD6`Bv$ zzwZ743~!q;Z#| zLof!YSzPV#5ad0SQr%PM^dxJNsuyt--MFr~nV!9E}F{AR^yd zXDhD`D^dJku7tNM!V#(EHja^H#UV!(cfDG?3CcfPe)g;5ta}*l$kbfM+kFBCjlkiI zF)HJM6GtquzXF-=>9kJ+Cg{vZ8tz%i8yUQ;ERT3{eGc+}3)8ANYDk$F@E{k;udHee zQcV%5M-J`+Wx{xT?oC{Da$1D9-9^RmF8@kVNwLrEP)dn#6(X!^U&DPWTJCiY1NP7s z$cwfFxHw_a@Hx)Eepfk4R9a>^{wf{(l*|yal0`+=ao_3H++w`*ijva1&C&exs4Cpk zKXAn@&U+UyrbBEzH7Hm*0Wp>lorLv(jw?uKHl%PFH}!%y zh7q{)O9dn##rMP=9letcQAXKcgT0fBb1D3z%D$+KjbELx!6hX&K@*Fudt?>5rh8F0 z^NS}x0%2lJIcgXvjJ(dJ`6^nU$n8q{W^ulP%YKK6IkuFFZBC^nyQrnF*>&v@Kij@z z#enhe_a+QZk$U|^Am%R8Af8%sv4_#UOHK`2zO62dDp`!tE;Kv^DIW31?1N7AhG@#d z)yW@!nj^Ubv;Klp*5UH}!L!3Msm#)7G|!(KcX>&S?eXW6XbVYAGHODOCQOC07vd_V zhMCjEL}x5p9k^4Gmzwy}h+`6fWz-6!U~1J=b(?qFsU_h&Hu9P}aukUs>g*;B`BvX9 zk3pcAqXXXos~#008?TQx8Wx<_OCD16G0*8Ae*jo8xoJ$t&N&BrrnSTkYpX9W;z$h& zps;}d6(0IuFT#rB_u+jk7EX2l0GH-G)~`=BOZSO+o@|fa#Cb1_mhdRq-Kr_p`u=P7 zd^da^qJg{=tlyTKv|k=480j~$*P8qT&<;C{8hyFOdYYcRMZqHDyLv3i( zsoyIlES1bf93~%{@rUKT!2Djz#XdV`A=D1-C1pIRn=H+L73)cT-H#V&43K^p3&x_{ zguxa@xb(I}Pvf=m7he44g9I2lnS$8khKDv?;DeG}+vW zcA)L&@q(bnCmpT+KUd~Q6lF@{QiWqP9&5soK##j3n{erLk6fN*S>!0vV{bRw8m7(Y zLhSCj?CB1bC*-~n<9n&oh&6(rHTee0CQTXq-`Ii0=?*`X9BD(sdGU2Jlogp1q7S>R z|9)S2SpS(*`8=U~WxGIkCA$6bb>){3u`GP{d0)C%^|vDta(Ek{vpqBQc zEJtv?&I)t=IC8Q-8M5JM(2EVdn6)~~n0TIbx1!otMl4@nHumbc_si(K>T$CofZemK zDFM+B9vzwNKL}w3$JG}FQlw7EV(r#cyJTG@AAvUBKf{uILhMt#t682a z@QfdMyY_kgT1V%;J!Gj#y`YE*6%!m4;gLm7FNN5gRiI9z`sYC_h%^P|hTw($OVF>pXki^!t8}d^nn&bM`H^!_SF! zNpN+@Jz9ITkW)s$(6&n59zoUqt(7L=kM3I&Os|jj)~QZ?XS? zjJlF*|LohEC-a9E$%7ShIrQz0ox%pmueK0ay0jWEG|mx-|2UenKhjOmo5+{#;;c@##)!CYGSOc*2%*D57yPh(@+ z(75Su5hF$#Q}` zy;V2#o(|2^V2Ij|W^$h8#F<81QXT*J!DA3b%Vo)6TzTLmu;)Y$p3;j@=(=CKSi3U6 zMSl9YniWHn$7LA|$TUxwbbKvanQ3&~wpqH%DHbWPcf=Fu@aNL3-7oDhgYY=XWbhaL zZ2i`YU3*^ki;)9wj7nCM{PTNNa*>+G|4lpd{$I4SF}D9oJDdOS04%xazCzBiu;FRo ziSh2!usM=D;qni~{vuLN?TuKRUbx>t&=^0pqYucFf? zQs{j~Zd^G*HCp~wrg)*5MM7&yU$2S)`~T%b8rbd~-GYYh>VJi@d<%gFsJ ztY;lpEvfAUxx_TCAL=p!H5Cjlb&S2)sjQ@Z&50+1ZtS_*K|Q-uvmgGdl|ReG!zRa0 z<8uGc$ol{K#Qu+T6*|6jmg@@J&3cPyIJ)QbQtMKX$IJxx$AMy0`bLyzpS9`7@~>m}!+*h9Eau-@k)ChK2+~ z{8?;T?H>TIFjA{WSm_h+QUB+5SvA)du+1yBsJzTNT+3!PC1df-OPjUyqX4&N1v7r+ z+c#elQ>)cNz;)=w9|Tl{n{?jGsDV>z82QX8Hm1Khf6Cvu)yfm8Pj(zDfjBq&#Wwh$ z$H7r>pq2uM94*Ni^J|4x#&J6+W(wg6>w1z<)AY>mrV)lpTSgLrDo0@L8i=Z6xw>Yv z5xX}QPiq>0%ooX6TTz_cL}}J*14Kd|ryTPw}%%^_< zSyH#QyE{(n&Pi~AQZ>(MfrFH%HByHySVLQbB#a-ABXTsz)(ES(sjl64Tf}THXKx~} z)hpeBHsW6E4;H>2s;f%09G03A6R8;9ml{>}NMg3B$xNd!h+XbW2_BUN zOr-IffOd(_r%8VgxdgD*k(Ap}(8-5@%Ii|438HDD6K{Vgoq1 z^WQ$h7}B})+Az_8GjJaoNR`4*^vZkbn{Z7pu1p^*aT^a0nQU=TY4Oy|Ign^rr}d3! zswz*gPK%w-1mUYqooQH+6!QVSrs|Q;QV%9d^nB6j_EhQLG5p+#4`xKF4;T4j49|~^ zwL9;hf3fGJruRROp8VnXHCEJS#6t!H57?Jwd2D8;Q%YsjR8>^4>AJYhb|=N;b=(Fxv#yQd?-E)Ab>Xa<&O8{t zI$3TV)HS8(5jJF{RZ{7sRE_Lz!S4#A^3#^q*cm}%MTaB^C%opvSt9GB1{2%{z3|`a zG=-zhDu4Kcv0RJKkiMEP(KrIy)k-qfaV5&)=jSJ6GFJ`OD-QX{t-T=F2o(&e7%#K4 zqYa)kuM*_!@?$e~{|9isv4V|O)0y1IN{?2obD<}3YbH5lr?djGe^ltHs+Jn)izfgL z&MG!ziNDvkY!Aak4!cf-hP;rgXFxcS$_$Ug_|0fuwj~g zb+fG}mc}T~)t`q|=ggVjg<58mZ+%r^9K`BylVLo0-fY1r@{3v)!r%^_r?ZkiM_W_R)*7 zncmiq*-Xbv?JOWKYBj}U=$k{9`Br!qV=cZA>a(%)Ac77$t1#7)HLqX5NcI`b{CrAz z!n*bk`|xFAt#XkTMe-uOf0xKNGML}o_}U!n3pt~bLp?kzFy7EjGW>@PSFAYtH`c6O z9CGW1zz1kDyv4KqoaMXT9IUaP{TEs1aR0@=C&b7Rqob}Ig27dVKFbfz#;4X}Y zguYVW>NEuBE)>gQRDFgq=U?IwCK{z&Sj=tK{Y`C?_IG}0UJt^%JG)-a5l>pi`$hVa z+;0gH5%q9r7dZ=WX~dSD)uh2?t|j?A@ZL33mKiZXrV$f#x1YwpeD2h_ZkoNSU&QQ4 zQj3ictMXeqFfa$#&*?l*_(`V)^d!TiV#mx@ER$*#%Fu&{PVgk<;6>s)`QZNRv}=#| z$^a^G?CxRpm<)#5o}y%`mdlN}1D( zf%XoKAl#t=8ig?$NBbOexoNy03qO0mJFg_j%eKq9(Vest!h}aEM7k0 zQ-H79aF@@yJHJF)3rKUhtj@9UH{Uk}+qYGn)UiyY>Qvkc{A1p#KJJ+Q-yh5 zkP@0efDoK`@BL=YZ+-L4+?iQx*7ryLIqQA1-c!~&&)IuF`x*ZVoe>wx5KJCIc1V)C zuq%WvU$otc+$!S}B;;Ppnq|M|Dwmg~vs|3*n!bFnwwNjI$twtSlr_VZdyDfdjX;vQ z^Zi{8TAW*@SXgXwmH0P~>B_IK*KYGy7O+Hi^*2AWb2$oET9_J|%-M1|P-9Gx1OEeI zd#8_LE6geV2iINhu7*8P1FOgJmb>hG4jCLq+OetJ;1q)|4}+Yv*4}E`POcIqlyk_4 z#5z3ZKbaUQ2i7yN_hxlf!Bvi#z>x8>-3kIQ82{%!L*qOh)1B_-r-=Fx$=Qx0v@Jsn zTs#Cq+3<5LeQbI{Ta`s7ji(?$@*7G#GDfmTrq9yWDle2sewK*nSreCE#6XuYXLcK*{5Wv0|=Iqosp!c2wrjOXXf0d;&DPFa2L% zEVkMUHDSI_i4UnLWfv9ZSA{-_@CowGhd4V4$)&JI#(hnlG*nEeFyNiI=iBmLZZdV( z($zqkM_%i>tllri59OzMm)rfRgyKiG&r zc~!e*U3Ni0^VmyiDm`zf7CYaVmSVD*s_kCw>;uGRxs=I0(|TOhqy8y_(N)0!F-)&z zGFFq30!}RwsW#txQH?0PZtBwaBvCqoU}{TC!o>ySMqYVq2ud`1KzGws)5VC0oP>5C z2nmTvFiNu^R1MQvA55ne5_2VKW*NY_kdVhM*49jmytnzjJxbQS-@j>9p8Tfm-OI#6 zf9iOn$Ol0WE=qMmq~GIizM)7bbJh5b!w|@M*tM~;s8Jo4KZJ}bZN`%5D7OwmI&ewj z__Ny7>Q+p|{dY7c%er|WmtQp=r(hHMW7-0iY%-;OJNSr*vyHR5JDF`aLg1&-9p>aW@HlgaJ51*i@DyO8yQ7O&S@T~Y5cG4PwcQxN{ zVJV4{B?}bTJ;2k&k>Wv^y#SZo)8KbNm7yG(5vC{KK2A*a-P7W4pW)K#?Y&IbwhVfL z@SRVfUZLr*PB<=**z)JETX7_#%#1f-}H@WMRKy97JxC-Q$_EA zw{}J02Iea_-nJ~me5-$q166&$&R%-h+^D^r$j>p^wHT?W^D&)$(~9(V4W(@v>5)m# z8*>Y)=Ag0c`1bo1(j9^gZ~YZG&t?}RqxhVkJ-^^&(KS+$mya4TlvO@G>Yv~V2FctW z?ov`47dMACcc31mkuB1gD*`j8lnLzeruD?_@1#a>87CC5-&5l}jY?8~|A6n!9ruK< zx6E$!hmLm!JP)M12K6B&8|Od-a}De<&~~-^YM;>`irx*TF4^$g3Ip_~JL&nYPeg&G z91fe>-R>shz_K(7UMALz zkemslc*V}>75*2j=0oI&9=xN{Li;%#2;&Ia0y0P+H=ecX*9sUDx=7Ku$I%D_ ztjcmA z^UNx7Ax<;#o9yJ2252=72L2e`;{$~)DE#ov(t0a`A@)mY z+yo`!SzcATi_Mq&tsLnYJ_|_?Do0FJ>`Wp;HohgL^(V7BXwW7-lDrc*Ax7}GoD}+% zQ@R@IwN9lWEmB*|Gpvu2N9J<}>4;Jut5f4Z@WdWq z=ccWDmOyKZJNhY2B7*4DWQ+6h4_FSGr%>WK%eY$L6m-N$7mNFu zO)IAF9V>V`T)1jU1!qUoQR6N#J-K44KPF9vm(m=06yfay`Z3V;N8`NAj?5>oqV3ttF5j|D2o&55fiNe4L=w`7X4 zTV<{)6>J;|gSKb0M)b2nz(7He?&MTXylzgr*@6WWRv+Nn=7#vz3QrRDrqWhDrJ&u6 zGAWS=Q^`5m5tfEfnRQRluhk;UdR*$^+^ZjXXTFO#vqa(25@iB`c0hN{kO|uWJYS&| z{5D5xZ>*#!AageJGpS*|9pZezeyi@`D>t`SCmKc#Vm)35qoSct$dr%rwrYN)QLB(C z5@ivduh%tNi*3^?@PGulZF4oovK-qd{mHkimnZA7`z`j5Fz;JRzqK`hR zQNzV|pBX}8%;{{aDoC4MN=6t zOSs9@%_C*7tAB^2F{!$wI>yT8+?l`8HT8)B|M)^@cS;GIjz^G`G099xJ*m!Umc>CL zVRYUF{8`hdJzCH-gC%aKS14wyuscbbJGNvF=`UVE>+|+vz3e!T1fJRyp5oEo35g>CjMt#l$EX>(962mNct; zR`JnL&1B*8YeBp~0-SgD*KD_T(rsB~_TZ9z@XS|wG0-$x4Y-0?doy7S%+xm=D<1C_ zj_a|ppR0*V%A|2la ze>$l)JYpp-VKv&658^d{j}_z$pmBq+C@ja;G=ulye~AL!ov*!OLcy4JC9x#@zfB$3 zxwFUso`-ifocK}KdxaDGK{z|OD80y~vBrS>4u%FL#a`2TG1c#RdG)6|3?4L>G8p3? zTE;q%Vqw;K|MeRUP*{WOrN+*&W?jAC{*tc`kdMJshvBJ91&B*bga0>|4AEL3UhRcQXPA@j;W=H$u zg$e~PFtKVz=##Yc7tw^dgWt0Qsg}iPyPJ~J5D$hG+iePyZs4xXh3fGN>jX-7Mr+HP z!`3Y8l1dC*J|zxTm1`4m+olt4w1O9^3rfx5_he?PAJhJb7r`wk71&K_x7fg!wy|<; zd^DPjpo@Mn0dT>MgC5HV=M8P7M;%}6Ga^Lg(rimY$`xKJ$7#isFp3&p$>SZKM@>Ln z$X1yb8;O)ZXbS?;KTyod>1osU8);9dt+s`4=;m@fTdxd_7B~^8Bq7ZGmOG&EnM$}L zzT14mL6{y_JiZ{J-d;&BuArcL=ypi5Sv0em{>j+w#rFw{>UKPD@@|H#>+7(eglha$ zwV_KTR|b+@rz|bOMcgV@dyxQa;9$N3PAbin=IyD@y?^rY#)8gv4W+r>%w-?SvlNif zDAcI9GxEig;c*XGgKSF^-q-Q45-f{VLs5E8X)q6Q9?R04>OFZ%2tig_TQ{Z-SCqpP zzx<$@BK6pjvz|Lr1s(L zlprU5W-diG3LGbA_DNXkwzZVcH{(qcmWOT2JT`hFKD^;c*c%LWQlx|h{4_gL5^g(n^zjc}O^yo3HvaH(%sVtwpup??&D$ymLvAW@tCPHSZ%)r1pBo%4?iU*m#-Fh@q9OGJ`S;)K0Dkq~aaZWB0+e z(^Vr7aA$jBjt*;d&KNm3hk8vjoYjw))rH4J22w;l0x4S`R07L`2XguSya%&RkXe)N zfNvwEBhBqi7;dN!L%aC*p-1650xJAigQ-`sm4cK$cZ~H4dGroqg5iZHX!~pZ@(ZQl z-ZSha!(a|AU-J`992mVgyj`O=w_$&RiFvw3_Cd6{`L#SH8(f?D#l^)g<&>_K4ZHV< zw7Zb`i>_^J6q(X;V5Al&{#~gwov&80B!Ws&rj28sNx9~`VPDEy{T_}5?n44+hW0mI z-PWBgH0}(;L7xZW=z2`Jjn#^j5pN`v<#IlmCB|NOc#q<5?PR6hSTJ;9f~OM$zJ)@A zMzd>yQJWRL0J=f6JFSc~@r;w3Uy4W^$y%or}RDJmy|qd@-y{e1!+Q;?a4jl;Z=It`V`x&qNM*^EJ9?vTN^9zsz+sFWeLw!0&2*%Inij+yzD zi3uy9OFA)Le4@hA67NG(_<5K9gT9)}!{;oC;W(7Gqy9`6J5cz}vBN#VAS2J_E1AN5 zSjC0UVo%O3r;GbV?0}jK+sXo`co|34~Oe^9G8Qo@Zt}sz(Zh=8- zPA0?zdyP_pR3UTU56&l%w2G~+4^9hjDG!DZfnTF~ssVqy2+I8E$e*CrFL zi>`pB9w(R;jEti8Qx%mljk!^zd4Hilfb+5Y3qI`xw$%>-{$~3tNh0vZ+Ac<9bnFP& z%f)lXqY1qTU3t4D%wABi3rA`t^m-uy4t3S!ZHg{-8hX#mwd-{@b3Z-IWQb|P3~xny zEM9Uu!Y8t}V3vNLWxem!^w!S6z8h3VJhMAhrLZ5g8zGk?P?e0`UUBrvfD>yJzdFxj zNIxf*{E9?9FoQ|FBPPx{UjD@L_5c@}cK?%tb()@L;p?X#HZamBh#Cq`%i<6?Q0j>Unw~YrmyR|viXg! z#hS&X0CzVBdp-@$8tD93J3iyjp9Z^$HszJ3s}2}F+6UbM8OHD3wcGY@fs0nBb75My zIxm}cteQ-bQ%HS&=mND}e#q^wW$=~Z7nj zxc@A>^;$}X{3~M_Zf%#L)p;05vv;S0i~9tI%lW9Ri-TLYfEHk0)+t2NQ(scKLI{z4W(`5vl=8c1#;mReSPl|Co7P-$MP9JBGOK3(t zf;DBGot*Z@|7w4p5d?7vBpVy(xX`a7?9}U%k`$>Zmtykz=#(@?K;wlbYaNN znRhm)miwL)W*fgOuXQR));*#8HKTK7$DHG?bKh;acak5~^G2r6Lakq*sc`HvRr-6{OV*gbX$Q%|v_3BlwHhu(s&0pvSql<>{l(qk{t>--8aGcLsywu^TfF`VVm6P(lC=@RQGzT8S%lkoPF>Q{c(Uil zXeJ{KV$=*gxCBtb%IV*!lRz_+dIsNSNbdF+=Cd>^kmkQ!^{CvL*z}w7lkV`v`ql|2 z9}Sf9qxdHKYgeMm}W!uHQ0IMe7vcV=wN$bhMXEfGX$~gj4>OV%;)HXjj z+EK2CZFJ75{fHq9f6E;^IGe+)$Bs+;)}vM`*V=Nll7u(3f+?*OPj8dt?R;f!7u)Hm zU$YlBN54)0C=@=P9PeOv11pqLa(nUOG?C+pl;~;>h?2jgRql!59hIwrf1t4yX}4deZ%#?DC7Ti#{SQS@u%T`lKl4b2AQ2fMVpK=OIGiKb8Pd3^2yLv^}m&75QejPP!G7pjcD!AiXgzO)z>sp>GQOWWZqE0qn1z+9s<~8tRCC z52mY%cP=`NYw8>bTtQ`iS4?IYfS9tsdW?58oAw!>VJW)IDsi2}{so;;hv`k<&~@oB zTCn4d8Io?=SsNCjc2W3>sF1eAKpi;qIK1-FLv4+5=#4epv))fJbQ3Uh!7(Kg6K7x& zQPF?2A9FZhIkQ@q6?#kG;<^|6*HU}VlTx=1hfdNaH_@$?)TSa_k zAdJHF3nZYMX0@JY?d2GEQ$=nevtA}kt0cap=dY;*r!(7Erys1Y-S(Wfc5h}5K|{;p z1H`S~q z-21{AT#Z~$J(M$*<@^ejDB_ICX!&HSlJO`R@Gt!i2}xH*%)Sl5`j7`J?N}9f=TM6l zef$LdyAHeH$LVY&xVbWhmNX41QAtUIJMA9Vd!>+`E&UEn4C*25+6yvnpqm`U^C9>UK# zs&FAqY&Rka7U0*#ODyH$Y&{iiU6AZTQLUpzR61Q|!P?9Nd0#%_oq=_lgTMxwOjz?k zPg$}!iE`e$f5*gg=T;ECt56wd2ZgQ_HDqKq9XM`|Xl%qck4=HTn^MOct5fT?XVcCh z_}9N*F@1lXpAuz2f?ugqA0*lgAg^tcetYe^Th(^4(|99hxLw{hV1;}OMDfo~v@cHk zN`nvmho_w@ub|a*9NIIVtc#U*j4upD31hLB0X4O#{M7Rs`{gQ>>Da8cnZ}cc@1BmD zET52TW5mGQlZ{bAq)G8p>!cVQk#p^l5tnWY)vpny7-0<+?dB1-D*V4?n z$~ST$IZf&0)tq895DOnolP$>jcED!0jaOxRKu3h}!IrSF9tUS_5{DysjT-BmJY@_> z|E)|J`K(FF6xR(4_E5q8deP}uy;Ba3v&X-29y6iYqc^Z^)Ox>hI&X$ikt@DDmwHY2 zuS{aDYK2XK;N4YI^adZ zV`Ae9&8KN~bGcbvHlqZ2F^g*CZlU+Rl&Bmh?bf1&_&e4gYUFmb$t4^-Z9%0ZHyyfi zVrt;$@TvJU=Tr=@qX|pM&NI`#a61Wuhh^b>4SBqz$;Ya9*a~mMBh7(ziS+JqCxS)3 z)R>V@wx1c-^;IRMC z_NzxZc7%mX&AKi3UT^Y{v?;l_I17cZtEP{g9*w_>`ovaO`}DmwRbhJYV(L3gAI!z; z#tdHEpldEpcp7}6Ccs-CBln59M#|)5H?#|N2LLY&B?zm^ivV@ALO=pOVaMAjd|Fx& zZw7!>6}`2niEBQ6RQyYp^5`rP1|6IdFvsg3(MawBzw-B9$6pC#rD!G96>hl&H|p~B z36c@AY2rUggP4ztAh|#fz8b$Mv1-CmyXAZo6L~USqOV_XHHY^j6vJ&C zLrsVUi3tjc+TSQ|$?59@nTaaZfS*mrq}FU{wVV}d3SyRv=L-^<>xW+>qe2BjQojYT;Jl zq=J=rY>O7z^S3`5c;h+ZZ%IO;qLYh?nPerMnCwltSUG1Ca~m;@`mxM2db>A2!VNis z#yZ!bw@Si92rAz1djHpfuAg)msqFb1!82@#G9TQ1wX!dQRr3DH>+={ZFvCc*UHxI$ zQ~vSCMg9l4gl)VAEnGt%`nPLZ?_L|URCH2G$%Rxsmk-NIE@chTAbV!R0y4hMDf6dt zD?pG5U&zeF9`MaYV=U&YL=21Zy#oEq%i78IS_tm1p)FkCjmUZDs2xT91X! zPhiUB@^S&ncsE!lmySh0al#s}aSnUr0^>b%097o1qM7xU~I&P_#)*-wLOTRc8e4JKLlDbhb|_ zIdkAl_#MS!1=T2!!}CCL|3SQ%bNw#G;{gV)h2EeVX6FU;_{v!yR?B#k5s-f~jLpES z%yeVMSO;KcY?Gwt&5-bD47!geuKSABj}DvkIf3<7Ff*6=jZ?H@hc&rt z54u{M@19dzwzy`c$0pdjK_{-J=erjHmskb;+rks!-#9O-!9nMuhbw!Z2boTxNTzcm ztkB0)40Sc+H-assmY*hlV2X9Tdg+Tov#jt*A5wHF{>J&4wC{2=Ac@Af`r!Wk6S0#Ji+1p&~4pgHBb?u^j_vVQyMFf`8*^bWLJC53o0av-;|wijH+AM%x%b*L zgcdq^IcP4c^M7-q7RWCF*Ut|$6NbD#yhSnonD87$S36JblVmpt8%mXvv;k|65%%>a z*XI_vAbOg6f;`JsrH}Kmy7P2bM1suc-jntDWeym(1wzEj*>nqyt?ERmelkKw5GfS$ zF=D+85!rVdPheM77W_l2m8}l8HAF2jIU%uCKhZSg?bMWf{wrTe{Bf)bXWfgh5{_je zbI(`#y&G@uyk6i~<~;im_%{^(AGYKF@3VGN?_>Y$Jh(1NU;mdiFO$!;P?K^}aW2hW zU7|@X9(;k)u-k(K_b4oWN+!XOex9@ED{Ua-UUXRTr`2J7>W`|q)<0lIFW=FAvE%5e z43WtZkq8VBM+@wM@ZoWdihEyYb%IDkc}NsUO$pO_RHPTXR+lnj=(u^@EG;X6LmE1I zS^}OFSEnz|JYoyt73d^NTx$-PAsr_EU~&Q_rJ`z5JD7wU<+{w{a@}J2TB6b0@llAc z&QvkfAuNhYN^%|-amt0(GO$}u!yIKR^{I4p1=p708l5+y&J-2Z-@DLz#e+&|(Ds4* zct_Kd)^-KyKwJ|e)9}H*M(<5kN?isPrWh-a5{CwH3{3cud3%0ot_os3+@crEkE zChSEztATB@#b;Ki0a*s=oCqX5W6#-&qb`we1n=}>)GP^~n$Ms|?KAz>7(pP6yS1R- zvgs%=eHd_YYO7yxkEd6;P^JX*;tm_PD0Pw+yHhQaM!4p2We5M0IcoDIIJVmLgL8N|KM8UT; zQrve81|fY3Zl?G|b%Ds&#kaw;+HaJnDz$+Mk0R;GhyZF-oiREwsCO1mad&cQa!bw9 zakWX`zLTLj`J7L_siigN*}!nT)XgZ=>1>$5)`6;4IACb57f#l*1DEni_X~ZYo92H9 zBd}YmtJ9#EO==+40&Nr?`y>#bt7CIC z3VP{(+8!D>^Np3?NW;Q_%c0jY@_q2*DDSqhRv73aqinFghT>kKT?Y + + 3 + + rt-thread + + ARM + + 1 + + C-SPY + 2 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + + 0 + + C-SPY + 2 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 0 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 0 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 0 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 0 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 0 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 0 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 0 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/project.ewp b/bsp/stm32/stm32l010-st-nucleo/project.ewp new file mode 100644 index 0000000000..ff955eb8e7 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/project.ewp @@ -0,0 +1,2259 @@ + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Kernel + + $PROJ_DIR$\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\src\device.c + + + $PROJ_DIR$\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\..\src\signal.c + + + $PROJ_DIR$\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\src\timer.c + + + + Applications + + $PROJ_DIR$\applications\main.c + + + + Drivers + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\board\CubeMX_Config\Src\stm32l0xx_hal_msp.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\iar\startup_stm32l053xx.s + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c + + + + cpu + + $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m0\cpuport.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m0\context_iar.S + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c + + + $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\completion.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c + + + + finsh + + $PROJ_DIR$\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\..\components\finsh\msh.c + + + + libc + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c + + + + STM32_HAL + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\system_stm32l0xx.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_comp.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc_ex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp_ex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr_ex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rng.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.c + + + $PROJ_DIR$\..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_usart.c + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/project.eww b/bsp/stm32/stm32l010-st-nucleo/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/project.uvoptx b/bsp/stm32/stm32l010-st-nucleo/project.uvoptx new file mode 100644 index 0000000000..97f78109ad --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/project.uvoptx @@ -0,0 +1,932 @@ + + + + 1.0 + +

### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC800 -FD20000000 -FF0STM32L0xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM) + + + 0 + ST-LINKIII-KEIL_SWO + -U0671FF535155878281103613 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32L0xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Kernel + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + ..\..\..\src\signal.c + signal.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Applications + 1 + 0 + 0 + 0 + + 2 + 15 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 3 + 16 + 1 + 0 + 0 + 0 + board\board.c + board.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + board\CubeMX_Config\Src\stm32l0xx_hal_msp.c + stm32l0xx_hal_msp.c + 0 + 0 + + + 3 + 18 + 2 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\arm\startup_stm32l053xx.s + startup_stm32l053xx.s + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart.c + drv_usart.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + cpu + 0 + 0 + 0 + 0 + + 4 + 22 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 4 + 23 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + cpuport.c + 0 + 0 + + + 4 + 26 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 5 + 27 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 5 + 28 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 5 + 29 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 5 + 30 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + + + finsh + 0 + 0 + 0 + 0 + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 37 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + 6 + 38 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 39 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + STM32_HAL + 0 + 0 + 0 + 0 + + 8 + 40 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\system_stm32l0xx.c + system_stm32l0xx.c + 0 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.c + stm32l0xx_hal.c + 0 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_comp.c + stm32l0xx_hal_comp.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.c + stm32l0xx_hal_cortex.c + 0 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc.c + stm32l0xx_hal_crc.c + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc_ex.c + stm32l0xx_hal_crc_ex.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp.c + stm32l0xx_hal_cryp.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp_ex.c + stm32l0xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.c + stm32l0xx_hal_dma.c + 0 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr.c + stm32l0xx_hal_pwr.c + 0 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr_ex.c + stm32l0xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.c + stm32l0xx_hal_rcc.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.c + stm32l0xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 53 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rng.c + stm32l0xx_hal_rng.c + 0 + 0 + + + 8 + 54 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.c + stm32l0xx_hal_gpio.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.c + stm32l0xx_hal_uart.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.c + stm32l0xx_hal_uart_ex.c + 0 + 0 + + + 8 + 57 + 1 + 0 + 0 + 0 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_usart.c + stm32l0xx_hal_usart.c + 0 + 0 + + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/project.uvprojx b/bsp/stm32/stm32l010-st-nucleo/project.uvprojx new file mode 100644 index 0000000000..0e71514be5 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/project.uvprojx @@ -0,0 +1,717 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32L010RBTx + STMicroelectronics + Keil.STM32L0xx_DFP.2.0.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00000800) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC800 -FN1 -FF0STM32L0xx_128 -FS08000000 -FL020000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM)) + 0 + $$Device:STM32L010RBTx$Drivers\CMSIS\Device\ST\STM32L0xx\Include\stm32l0xx.h + + + + + + + + + + $$Device:STM32L010RBTx$CMSIS\SVD\STM32L0x0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 1 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP + DARMCM1.DLL + -pCM0+ + SARMCM3.DLL + + TARMCM1.DLL + -pCM0+ + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0+" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x800 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x800 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + STM32L010xB,USE_HAL_DRIVER + + .;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m0;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common;..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Inc;..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Include;..\libraries\STM32L0xx_HAL\CMSIS\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + components.c + 1 + ..\..\..\src\components.c + + + device.c + 1 + ..\..\..\src\device.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + object.c + 1 + ..\..\..\src\object.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + signal.c + 1 + ..\..\..\src\signal.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + board\board.c + + + stm32l0xx_hal_msp.c + 1 + board\CubeMX_Config\Src\stm32l0xx_hal_msp.c + + + startup_stm32l053xx.s + 2 + ..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\arm\startup_stm32l053xx.s + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + cpu + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + + + finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + STM32_HAL + + + system_stm32l0xx.c + 1 + ..\libraries\STM32L0xx_HAL\CMSIS\Device\ST\STM32L0xx\Source\Templates\system_stm32l0xx.c + + + stm32l0xx_hal.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.c + + + stm32l0xx_hal_comp.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_comp.c + + + stm32l0xx_hal_cortex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.c + + + stm32l0xx_hal_crc.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc.c + + + stm32l0xx_hal_crc_ex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_crc_ex.c + + + stm32l0xx_hal_cryp.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp.c + + + stm32l0xx_hal_cryp_ex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cryp_ex.c + + + stm32l0xx_hal_dma.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.c + + + stm32l0xx_hal_pwr.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr.c + + + stm32l0xx_hal_pwr_ex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr_ex.c + + + stm32l0xx_hal_rcc.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.c + + + stm32l0xx_hal_rcc_ex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.c + + + stm32l0xx_hal_rng.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rng.c + + + stm32l0xx_hal_gpio.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.c + + + stm32l0xx_hal_uart.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.c + + + stm32l0xx_hal_uart_ex.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.c + + + stm32l0xx_hal_usart.c + 1 + ..\libraries\STM32L0xx_HAL\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_usart.c + + + + + + + + + + + + + +
diff --git a/bsp/stm32/stm32l010-st-nucleo/rtconfig.h b/bsp/stm32/stm32l010-st-nucleo/rtconfig.h new file mode 100644 index 0000000000..4d177a0aaf --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/rtconfig.h @@ -0,0 +1,170 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 256 +#define RT_CONSOLE_DEVICE_NAME "uart2" +#define RT_VER_NUM 0x40003 +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M0 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 1024 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32L0 + +/* Hardware Drivers Config */ + +#define SOC_STM32L010RB + +/* Onboard Peripheral Drivers */ + + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART2 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32l010-st-nucleo/rtconfig.py b/bsp/stm32/stm32l010-st-nucleo/rtconfig.py new file mode 100644 index 0000000000..39d6af6879 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/rtconfig.py @@ -0,0 +1,143 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m0' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m0plus -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M0 ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M0' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M0' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32l010-st-nucleo/template.ewp b/bsp/stm32/stm32l010-st-nucleo/template.ewp new file mode 100644 index 0000000000..f390ad7bc1 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/template.ewp @@ -0,0 +1,2031 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/template.eww b/bsp/stm32/stm32l010-st-nucleo/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/stm32/stm32l010-st-nucleo/template.uvoptx b/bsp/stm32/stm32l010-st-nucleo/template.uvoptx new file mode 100644 index 0000000000..7f4a45a0e7 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/template.uvoptx @@ -0,0 +1,192 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC800 -FD20000000 -FF0STM32L0xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM) + + + 0 + ST-LINKIII-KEIL_SWO + -U303030303030303030303031 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L0xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + +
diff --git a/bsp/stm32/stm32l010-st-nucleo/template.uvprojx b/bsp/stm32/stm32l010-st-nucleo/template.uvprojx new file mode 100644 index 0000000000..74da7a4e37 --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/template.uvprojx @@ -0,0 +1,395 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060300::V5.06 update 3 (build 300)::ARMCC + 0 + + + STM32L010RBTx + STMicroelectronics + Keil.STM32L0xx_DFP.2.0.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00000800) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC800 -FN1 -FF0STM32L0xx_128 -FS08000000 -FL020000 -FP0($$Device:STM32L010RBTx$CMSIS\Flash\STM32L0xx_128.FLM)) + 0 + $$Device:STM32L010RBTx$Drivers\CMSIS\Device\ST\STM32L0xx\Include\stm32l0xx.h + + + + + + + + + + $$Device:STM32L010RBTx$CMSIS\SVD\STM32L0x0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 1 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP + DARMCM1.DLL + -pCM0+ + SARMCM3.DLL + + TARMCM1.DLL + -pCM0+ + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0+" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x800 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x800 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + + + + + + + +
-- Gitee From 5fa0656a9ab7b9cfe211cfec6187bdf2fbcefed5 Mon Sep 17 00:00:00 2001 From: z14git Date: Mon, 13 Apr 2020 15:28:12 +0800 Subject: [PATCH 02/54] add PWM1_CONFIG --- .../libraries/HAL_Drivers/config/f1/pwm_config.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h index 1a5575de0c..50ea3791b6 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h @@ -17,6 +17,17 @@ extern "C" { #endif +#ifdef BSP_USING_PWM1 +#ifndef PWM1_CONFIG +#define PWM1_CONFIG \ + { \ + .tim_handle.Instance = TIM1, \ + .name = "pwm1", \ + .channel = 0 \ + } +#endif /* PWM1_CONFIG */ +#endif /* BSP_USING_PWM1 */ + #ifdef BSP_USING_PWM2 #ifndef PWM2_CONFIG #define PWM2_CONFIG \ -- Gitee From 24bc2560efd5903e7a990cbd7adce9923ddbfad6 Mon Sep 17 00:00:00 2001 From: Jianjia Ma Date: Mon, 13 Apr 2020 10:50:55 +0100 Subject: [PATCH 03/54] Fix bug cause HAL SPI timeout The bug affects in SPI mode 1 (probably and mode 2) When changing SPI device, HAL returns timeout error for the first time trying to read/write. --- bsp/stm32/libraries/HAL_Drivers/drv_spi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 914691d2be..3267ffe749 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -257,8 +257,6 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur HAL_NVIC_EnableIRQ(spi_drv->config->dma_tx->dma_irq); } - __HAL_SPI_ENABLE(spi_handle); - LOG_D("%s init done", spi_drv->config->bus_name); return RT_EOK; } -- Gitee From 8e57dcb723071b37e09a06decddc16569ae79a77 Mon Sep 17 00:00:00 2001 From: David Lin Date: Fri, 17 Apr 2020 18:39:04 +0800 Subject: [PATCH 04/54] Update tcpsendpacket.c --- examples/network/tcpsendpacket.c | 37 +++++++++++++++++++------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/examples/network/tcpsendpacket.c b/examples/network/tcpsendpacket.c index 75134c19a2..462de6000d 100644 --- a/examples/network/tcpsendpacket.c +++ b/examples/network/tcpsendpacket.c @@ -1,7 +1,7 @@ #include -#include /* Ϊ˽Ҫnetdb.hͷļ */ -#include /* ʹBSD socketҪsocket.hͷļ */ +#include /* 为了解析主机名,需要包含netdb.h头文件 */ +#include /* 使用BSD socket,需要包含socket.h头文件 */ void tcp_senddata(const char *url, int port, int length) { @@ -10,45 +10,52 @@ void tcp_senddata(const char *url, int port, int length) struct sockaddr_in server_addr; rt_uint8_t *buffer_ptr; - /* ͨڲurlhostַ */ + /* 通过函数入口参数url获得host地址(如果是域名,会做域名解析) */ host = gethostbyname(url); - /* һsocketSOCKET_STREAMTCP */ + /* 创建一个socket,类型是SOCKET_STREAM,TCP类型 */ if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1) { - /* socketʧ */ + /* 创建socket失败 */ rt_kprintf("Socket error\n"); return; } - /* ڴ */ + /* 申请内存 */ buffer_ptr = rt_malloc(length); - /* 췢 */ + if(RT_NULL == buffer_ptr) + { + /* 申请内存失败 */ + rt_kprintf("Not enough memory\n"); + return; + } + + /* 构造发送数据 */ for (index = 0; index < length; index ++) buffer_ptr[index] = index & 0xff; timeout = 100; - /* ÷ͳʱʱ100ms */ + /* 设置发送超时时间100ms */ setsockopt(sock, SOL_SOCKET, SO_SNDTIMEO, &timeout, sizeof(timeout)); - /* ʼԤӵķ˵ַ */ + /* 初始化预连接的服务端地址 */ server_addr.sin_family = AF_INET; server_addr.sin_port = htons(port); server_addr.sin_addr = *((struct in_addr *)host->h_addr); rt_memset(&(server_addr.sin_zero), 0, sizeof(server_addr.sin_zero)); - /* ӵ */ + /* 连接到服务端 */ err = connect(sock, (struct sockaddr *)&server_addr, sizeof(struct sockaddr)); rt_kprintf("TCP thread connect error code: %d\n", err); while (1) { - /* ݵsock */ + /* 发送数据到sock连接 */ result = send(sock, buffer_ptr, length, MSG_DONTWAIT); - if (result < 0) //ݷʹ + if (result < 0) //数据发送错误处理 { rt_kprintf("TCP thread send error: %d\n", result); closesocket(sock); - /* رӣ´ */ + /* 关闭连接,重新创建连接 */ rt_thread_delay(10); if ((sock = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == -1) @@ -59,7 +66,7 @@ void tcp_senddata(const char *url, int port, int length) } else if (result == 0) { - /* ӡsendֵΪ0ľϢ */ + /* 打印send函数返回值为0的警告信息 */ rt_kprintf("\n Send warning,send function return 0.\r\n"); } } @@ -67,7 +74,7 @@ void tcp_senddata(const char *url, int port, int length) #ifdef RT_USING_FINSH #include -/* tcpclientfinsh shell */ +/* 输出tcpclient函数到finsh shell中 */ FINSH_FUNCTION_EXPORT(tcp_senddata, send a packet through tcp connection); #endif -- Gitee From 993835b5ed834e1ab49e637bcac22019b9bc461b Mon Sep 17 00:00:00 2001 From: David Lin Date: Fri, 17 Apr 2020 18:44:15 +0800 Subject: [PATCH 05/54] Update tcpsendpacket.c --- examples/network/tcpsendpacket.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/network/tcpsendpacket.c b/examples/network/tcpsendpacket.c index 462de6000d..47bb562506 100644 --- a/examples/network/tcpsendpacket.c +++ b/examples/network/tcpsendpacket.c @@ -25,7 +25,7 @@ void tcp_senddata(const char *url, int port, int length) if(RT_NULL == buffer_ptr) { /* 申请内存失败 */ - rt_kprintf("Not enough memory\n"); + rt_kprintf("No memory\n"); return; } -- Gitee From 90f41ef8a2a9e7f71343be12d2f73122e17b1fc2 Mon Sep 17 00:00:00 2001 From: David Lin Date: Fri, 17 Apr 2020 19:12:18 +0800 Subject: [PATCH 06/54] Update start_gcc.S --- libcpu/arm/s3c24x0/start_gcc.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libcpu/arm/s3c24x0/start_gcc.S b/libcpu/arm/s3c24x0/start_gcc.S index 4adc458094..cc2b2f6310 100644 --- a/libcpu/arm/s3c24x0/start_gcc.S +++ b/libcpu/arm/s3c24x0/start_gcc.S @@ -191,7 +191,7 @@ reset: copy_loop: ldmia r0!, {r3-r10} /* copy from source address [r0] */ stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_loop /* setup stack */ -- Gitee From 5e507448ee71499aa1fbaa1f273372318f569331 Mon Sep 17 00:00:00 2001 From: David Lin Date: Fri, 17 Apr 2020 19:18:52 +0800 Subject: [PATCH 07/54] Update start_gcc.S --- libcpu/arm/s3c44b0/start_gcc.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libcpu/arm/s3c44b0/start_gcc.S b/libcpu/arm/s3c44b0/start_gcc.S index 65b3d422dd..4c448a344f 100644 --- a/libcpu/arm/s3c44b0/start_gcc.S +++ b/libcpu/arm/s3c44b0/start_gcc.S @@ -107,7 +107,7 @@ reset: copy_loop: ldmia r0!, {r3-r10} /* copy from source address [r0] */ stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_loop #endif -- Gitee From 3b2fa472096d41287ee8cb542e8c1d119a5a8b76 Mon Sep 17 00:00:00 2001 From: luhuadong Date: Fri, 17 Apr 2020 22:14:37 +0800 Subject: [PATCH 08/54] [BSP] add Libraries when scons --dist --- bsp/at32/at32f403a-start/rtconfig.py | 6 +++--- tools/mkdist.py | 26 ++++++++++++++++++++++---- 2 files changed, 25 insertions(+), 7 deletions(-) diff --git a/bsp/at32/at32f403a-start/rtconfig.py b/bsp/at32/at32f403a-start/rtconfig.py index 1d63cabb96..4800f9a871 100644 --- a/bsp/at32/at32f403a-start/rtconfig.py +++ b/bsp/at32/at32f403a-start/rtconfig.py @@ -57,7 +57,7 @@ if PLATFORM == 'gcc': else: CFLAGS += ' -O2' - CXXFLAGS = CFLAGS + CXXFLAGS = CFLAGS POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' @@ -88,7 +88,7 @@ elif PLATFORM == 'armcc': else: CFLAGS += ' -O2' - CXXFLAGS = CFLAGS + CXXFLAGS = CFLAGS CFLAGS += ' -std=c99' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' @@ -136,7 +136,7 @@ elif PLATFORM == 'iar': LFLAGS = ' --config "board/linker_scripts/link.icf"' LFLAGS += ' --entry __iar_program_start' - + CXXFLAGS = CFLAGS EXEC_PATH = EXEC_PATH + '/arm/bin/' diff --git a/tools/mkdist.py b/tools/mkdist.py index 7e4b9a8bbe..e71d767446 100644 --- a/tools/mkdist.py +++ b/tools/mkdist.py @@ -122,7 +122,7 @@ def bsp_update_kconfig(dist_dir): line = line[0:position] + 'default "rt-thread"\n' found = 0 f.write(line) - + def bsp_update_kconfig_library(dist_dir): # change RTT_ROOT in Kconfig if not os.path.isfile(os.path.join(dist_dir, 'Kconfig')): @@ -141,7 +141,7 @@ def bsp_update_kconfig_library(dist_dir): found = 0 f.write(line) - # change board/kconfig path + # change board/kconfig path if not os.path.isfile(os.path.join(dist_dir, 'board/Kconfig')): return @@ -214,12 +214,21 @@ def MkDist_Strip(program, BSP_ROOT, RTT_ROOT, Env): bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) + # copy at32 bsp libiary files + if os.path.basename(os.path.dirname(BSP_ROOT)) == 'at32': + print("=> copy at32 bsp library") + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') + library_dir = os.path.join(dist_dir, 'Libraries') + bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers')) + bsp_copy_files(os.path.join(library_path, 'AT32_Std_Driver'), os.path.join(library_dir, 'AT32_Std_Driver')) + shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) + # do bsp special dist handle - if 'dist_handle' in Env: + if 'dist_handle' in Env: print("=> start dist handle") dist_handle = Env['dist_handle'] dist_handle(BSP_ROOT) - + # get all source files from program for item in program: walk_children(item) @@ -345,6 +354,15 @@ def MkDist(program, BSP_ROOT, RTT_ROOT, Env, rttide = None): bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) + # copy at32 bsp libiary files + if os.path.basename(os.path.dirname(BSP_ROOT)) == 'at32': + print("=> copy at32 bsp library") + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') + library_dir = os.path.join(dist_dir, 'Libraries') + bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers')) + bsp_copy_files(os.path.join(library_path, 'AT32_Std_Driver'), os.path.join(library_dir, 'AT32_Std_Driver')) + shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) + # do bsp special dist handle if 'dist_handle' in Env: print("=> start dist handle") -- Gitee From 805432d315613ed91a3fa52b6a50044bbebb390f Mon Sep 17 00:00:00 2001 From: Maofeng Date: Sun, 19 Apr 2020 17:37:43 +0800 Subject: [PATCH 09/54] [update]modify nrf5x/nrf52840 for [No Softdevice]&[RT_USING_USER_MAIN] --- bsp/nrf5x/libraries/cmsis/SConscript | 17 + bsp/nrf5x/libraries/cmsis/dsp/license.txt | 28 + .../cmsis/include/arm_common_tables.h | 136 + .../cmsis/include/arm_const_structs.h | 79 + bsp/nrf5x/libraries/cmsis/include/arm_math.h | 7030 ++++++++++ .../libraries/cmsis/include/cmsis_armcc.h | 734 + .../libraries/cmsis/include/cmsis_armcc_V6.h | 1800 +++ bsp/nrf5x/libraries/cmsis/include/cmsis_gcc.h | 1373 ++ bsp/nrf5x/libraries/cmsis/include/core_cm0.h | 798 ++ .../libraries/cmsis/include/core_cm0plus.h | 914 ++ bsp/nrf5x/libraries/cmsis/include/core_cm3.h | 1763 +++ bsp/nrf5x/libraries/cmsis/include/core_cm4.h | 1937 +++ bsp/nrf5x/libraries/cmsis/include/core_cm7.h | 2512 ++++ .../libraries/cmsis/include/core_cmFunc.h | 86 + .../libraries/cmsis/include/core_cmInstr.h | 87 + .../libraries/cmsis/include/core_cmSimd.h | 96 + .../libraries/cmsis/include/core_sc000.h | 926 ++ .../libraries/cmsis/include/core_sc300.h | 1745 +++ bsp/nrf5x/libraries/drivers/SConscript | 2 +- bsp/nrf5x/libraries/drivers/drv_uart.c | 163 +- bsp/nrf5x/nrf52840/.config | 26 +- bsp/nrf5x/nrf52840/SConstruct | 3 + bsp/nrf5x/nrf52840/applications/application.c | 31 +- bsp/nrf5x/nrf52840/applications/ble_nus_app.c | 670 - bsp/nrf5x/nrf52840/applications/sdk_config.h | 3991 ------ bsp/nrf5x/nrf52840/applications/startup.c | 98 - bsp/nrf5x/nrf52840/board/Kconfig | 3 +- bsp/nrf5x/nrf52840/board/SConscript | 3 +- bsp/nrf5x/nrf52840/board/app_config.h | 4 + bsp/nrf5x/nrf52840/board/board.c | 218 +- bsp/nrf5x/nrf52840/board/board.h | 13 +- bsp/nrf5x/nrf52840/board/nrfx_config.h | 47 + bsp/nrf5x/nrf52840/board/nrfx_glue.h | 269 + bsp/nrf5x/nrf52840/board/nrfx_log.h | 135 + bsp/nrf5x/nrf52840/board/sdk_config.h | 11698 ++++++++++++++++ bsp/nrf5x/nrf52840/project.uvoptx | 393 +- bsp/nrf5x/nrf52840/project.uvprojx | 186 +- bsp/nrf5x/nrf52840/rtconfig.h | 10 +- bsp/nrf5x/nrf52840/template.uvoptx | 7 + bsp/nrf5x/nrf52840/template.uvprojx | 8 +- 40 files changed, 34716 insertions(+), 5323 deletions(-) create mode 100644 bsp/nrf5x/libraries/cmsis/SConscript create mode 100644 bsp/nrf5x/libraries/cmsis/dsp/license.txt create mode 100644 bsp/nrf5x/libraries/cmsis/include/arm_common_tables.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/arm_const_structs.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/arm_math.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/cmsis_armcc.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/cmsis_armcc_V6.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/cmsis_gcc.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cm0.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cm0plus.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cm3.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cm4.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cm7.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cmFunc.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cmInstr.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_cmSimd.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_sc000.h create mode 100644 bsp/nrf5x/libraries/cmsis/include/core_sc300.h delete mode 100644 bsp/nrf5x/nrf52840/applications/ble_nus_app.c delete mode 100644 bsp/nrf5x/nrf52840/applications/sdk_config.h delete mode 100644 bsp/nrf5x/nrf52840/applications/startup.c create mode 100644 bsp/nrf5x/nrf52840/board/app_config.h create mode 100644 bsp/nrf5x/nrf52840/board/nrfx_config.h create mode 100644 bsp/nrf5x/nrf52840/board/nrfx_glue.h create mode 100644 bsp/nrf5x/nrf52840/board/nrfx_log.h create mode 100644 bsp/nrf5x/nrf52840/board/sdk_config.h diff --git a/bsp/nrf5x/libraries/cmsis/SConscript b/bsp/nrf5x/libraries/cmsis/SConscript new file mode 100644 index 0000000000..6ee62ec6cf --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/SConscript @@ -0,0 +1,17 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" +""") + +# src += ['drv_common.c'] + +path = [cwd + '/include'] + +group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = path) + +Return('group') diff --git a/bsp/nrf5x/libraries/cmsis/dsp/license.txt b/bsp/nrf5x/libraries/cmsis/dsp/license.txt new file mode 100644 index 0000000000..139c1ff8d4 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/dsp/license.txt @@ -0,0 +1,28 @@ +All pre-build libraries contained in the folders "ARM" and "GCC" +are guided by the following license: + +Copyright (C) 2009-2014 ARM Limited. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. diff --git a/bsp/nrf5x/libraries/cmsis/include/arm_common_tables.h b/bsp/nrf5x/libraries/cmsis/include/arm_common_tables.h new file mode 100644 index 0000000000..8742a56991 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/arm_common_tables.h @@ -0,0 +1,136 @@ +/* ---------------------------------------------------------------------- +* Copyright (C) 2010-2014 ARM Limited. All rights reserved. +* +* $Date: 19. October 2015 +* $Revision: V.1.4.5 a +* +* Project: CMSIS DSP Library +* Title: arm_common_tables.h +* +* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions +* +* Target Processor: Cortex-M4/Cortex-M3 +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* -------------------------------------------------------------------- */ + +#ifndef _ARM_COMMON_TABLES_H +#define _ARM_COMMON_TABLES_H + +#include "arm_math.h" + +extern const uint16_t armBitRevTable[1024]; +extern const q15_t armRecipTableQ15[64]; +extern const q31_t armRecipTableQ31[64]; +/* extern const q31_t realCoefAQ31[1024]; */ +/* extern const q31_t realCoefBQ31[1024]; */ +extern const float32_t twiddleCoef_16[32]; +extern const float32_t twiddleCoef_32[64]; +extern const float32_t twiddleCoef_64[128]; +extern const float32_t twiddleCoef_128[256]; +extern const float32_t twiddleCoef_256[512]; +extern const float32_t twiddleCoef_512[1024]; +extern const float32_t twiddleCoef_1024[2048]; +extern const float32_t twiddleCoef_2048[4096]; +extern const float32_t twiddleCoef_4096[8192]; +#define twiddleCoef twiddleCoef_4096 +extern const q31_t twiddleCoef_16_q31[24]; +extern const q31_t twiddleCoef_32_q31[48]; +extern const q31_t twiddleCoef_64_q31[96]; +extern const q31_t twiddleCoef_128_q31[192]; +extern const q31_t twiddleCoef_256_q31[384]; +extern const q31_t twiddleCoef_512_q31[768]; +extern const q31_t twiddleCoef_1024_q31[1536]; +extern const q31_t twiddleCoef_2048_q31[3072]; +extern const q31_t twiddleCoef_4096_q31[6144]; +extern const q15_t twiddleCoef_16_q15[24]; +extern const q15_t twiddleCoef_32_q15[48]; +extern const q15_t twiddleCoef_64_q15[96]; +extern const q15_t twiddleCoef_128_q15[192]; +extern const q15_t twiddleCoef_256_q15[384]; +extern const q15_t twiddleCoef_512_q15[768]; +extern const q15_t twiddleCoef_1024_q15[1536]; +extern const q15_t twiddleCoef_2048_q15[3072]; +extern const q15_t twiddleCoef_4096_q15[6144]; +extern const float32_t twiddleCoef_rfft_32[32]; +extern const float32_t twiddleCoef_rfft_64[64]; +extern const float32_t twiddleCoef_rfft_128[128]; +extern const float32_t twiddleCoef_rfft_256[256]; +extern const float32_t twiddleCoef_rfft_512[512]; +extern const float32_t twiddleCoef_rfft_1024[1024]; +extern const float32_t twiddleCoef_rfft_2048[2048]; +extern const float32_t twiddleCoef_rfft_4096[4096]; + + +/* floating-point bit reversal tables */ +#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) +#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) +#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) +#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) +#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) +#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) +#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) +#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) +#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) + +extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; + +/* fixed-point bit reversal tables */ +#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) +#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) +#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) +#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) +#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) +#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) +#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) +#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) +#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) + +extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; +extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; + +/* Tables for Fast Math Sine and Cosine */ +extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; +extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; +extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; + +#endif /* ARM_COMMON_TABLES_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/arm_const_structs.h b/bsp/nrf5x/libraries/cmsis/include/arm_const_structs.h new file mode 100644 index 0000000000..726d06eb69 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/arm_const_structs.h @@ -0,0 +1,79 @@ +/* ---------------------------------------------------------------------- +* Copyright (C) 2010-2014 ARM Limited. All rights reserved. +* +* $Date: 19. March 2015 +* $Revision: V.1.4.5 +* +* Project: CMSIS DSP Library +* Title: arm_const_structs.h +* +* Description: This file has constant structs that are initialized for +* user convenience. For example, some can be given as +* arguments to the arm_cfft_f32() function. +* +* Target Processor: Cortex-M4/Cortex-M3 +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* -------------------------------------------------------------------- */ + +#ifndef _ARM_CONST_STRUCTS_H +#define _ARM_CONST_STRUCTS_H + +#include "arm_math.h" +#include "arm_common_tables.h" + + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; + extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; + + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; + extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; + + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; + extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; + +#endif diff --git a/bsp/nrf5x/libraries/cmsis/include/arm_math.h b/bsp/nrf5x/libraries/cmsis/include/arm_math.h new file mode 100644 index 0000000000..e21a3cc371 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/arm_math.h @@ -0,0 +1,7030 @@ +/* ---------------------------------------------------------------------- +* Copyright (C) 2010-2015 ARM Limited. All rights reserved. +* +* $Date: 20. October 2015 +* $Revision: V1.4.5 b +* +* Project: CMSIS DSP Library +* Title: arm_math.h +* +* Description: Public header file for CMSIS DSP Library +* +* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0 +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. + * -------------------------------------------------------------------- */ + +/** + * @defgroup groupMath Basic Math Functions + */ + +/** + * @defgroup groupFastMath Fast Math Functions + * This set of functions provides a fast approximation to sine, cosine, and square root. + * As compared to most of the other functions in the CMSIS math library, the fast math functions + * operate on individual values and not arrays. + * There are separate functions for Q15, Q31, and floating-point data. + * + */ + +/** + * @defgroup groupCmplxMath Complex Math Functions + * This set of functions operates on complex data vectors. + * The data in the complex arrays is stored in an interleaved fashion + * (real, imag, real, imag, ...). + * In the API functions, the number of samples in a complex array refers + * to the number of complex values; the array contains twice this number of + * real values. + */ + +/** + * @defgroup groupFilters Filtering Functions + */ + +/** + * @defgroup groupMatrix Matrix Functions + * + * This set of functions provides basic matrix math operations. + * The functions operate on matrix data structures. For example, + * the type + * definition for the floating-point matrix structure is shown + * below: + *
+ *     typedef struct
+ *     {
+ *       uint16_t numRows;     // number of rows of the matrix.
+ *       uint16_t numCols;     // number of columns of the matrix.
+ *       float32_t *pData;     // points to the data of the matrix.
+ *     } arm_matrix_instance_f32;
+ * 
+ * There are similar definitions for Q15 and Q31 data types. + * + * The structure specifies the size of the matrix and then points to + * an array of data. The array is of size numRows X numCols + * and the values are arranged in row order. That is, the + * matrix element (i, j) is stored at: + *
+ *     pData[i*numCols + j]
+ * 
+ * + * \par Init Functions + * There is an associated initialization function for each type of matrix + * data structure. + * The initialization function sets the values of the internal structure fields. + * Refer to the function arm_mat_init_f32(), arm_mat_init_q31() + * and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively. + * + * \par + * Use of the initialization function is optional. However, if initialization function is used + * then the instance structure cannot be placed into a const data section. + * To place the instance structure in a const data + * section, manually initialize the data structure. For example: + *
+ * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
+ * 
+ * where nRows specifies the number of rows, nColumns + * specifies the number of columns, and pData points to the + * data array. + * + * \par Size Checking + * By default all of the matrix functions perform size checking on the input and + * output matrices. For example, the matrix addition function verifies that the + * two input matrices and the output matrix all have the same number of rows and + * columns. If the size check fails the functions return: + *
+ *     ARM_MATH_SIZE_MISMATCH
+ * 
+ * Otherwise the functions return + *
+ *     ARM_MATH_SUCCESS
+ * 
+ * There is some overhead associated with this matrix size checking. + * The matrix size checking is enabled via the \#define + *
+ *     ARM_MATH_MATRIX_CHECK
+ * 
+ * within the library project settings. By default this macro is defined + * and size checking is enabled. By changing the project settings and + * undefining this macro size checking is eliminated and the functions + * run a bit faster. With size checking disabled the functions always + * return ARM_MATH_SUCCESS. + */ + +/** + * @defgroup groupTransforms Transform Functions + */ + +/** + * @defgroup groupController Controller Functions + */ + +/** + * @defgroup groupStats Statistics Functions + */ +/** + * @defgroup groupSupport Support Functions + */ + +/** + * @defgroup groupInterpolation Interpolation Functions + * These functions perform 1- and 2-dimensional interpolation of data. + * Linear interpolation is used for 1-dimensional data and + * bilinear interpolation is used for 2-dimensional data. + */ + +/** + * @defgroup groupExamples Examples + */ +#ifndef _ARM_MATH_H +#define _ARM_MATH_H + +/* ignore some GCC warnings */ +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-conversion" +#pragma GCC diagnostic ignored "-Wconversion" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + +#define __CMSIS_GENERIC /* disable NVIC and Systick functions */ + +#if defined(ARM_MATH_CM7) + #include "core_cm7.h" +#elif defined (ARM_MATH_CM4) + #include "core_cm4.h" +#elif defined (ARM_MATH_CM3) + #include "core_cm3.h" +#elif defined (ARM_MATH_CM0) + #include "core_cm0.h" + #define ARM_MATH_CM0_FAMILY +#elif defined (ARM_MATH_CM0PLUS) + #include "core_cm0plus.h" + #define ARM_MATH_CM0_FAMILY +#else + #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0" +#endif + +#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */ +#include "string.h" +#include "math.h" +#ifdef __cplusplus +extern "C" +{ +#endif + + + /** + * @brief Macros required for reciprocal calculation in Normalized LMS + */ + +#define DELTA_Q31 (0x100) +#define DELTA_Q15 0x5 +#define INDEX_MASK 0x0000003F +#ifndef PI +#define PI 3.14159265358979f +#endif + + /** + * @brief Macros required for SINE and COSINE Fast math approximations + */ + +#define FAST_MATH_TABLE_SIZE 512 +#define FAST_MATH_Q31_SHIFT (32 - 10) +#define FAST_MATH_Q15_SHIFT (16 - 10) +#define CONTROLLER_Q31_SHIFT (32 - 9) +#define TABLE_SIZE 256 +#define TABLE_SPACING_Q31 0x400000 +#define TABLE_SPACING_Q15 0x80 + + /** + * @brief Macros required for SINE and COSINE Controller functions + */ + /* 1.31(q31) Fixed value of 2/360 */ + /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ +#define INPUT_SPACING 0xB60B61 + + /** + * @brief Macro for Unaligned Support + */ +#ifndef UNALIGNED_SUPPORT_DISABLE + #define ALIGN4 +#else + #if defined (__GNUC__) + #define ALIGN4 __attribute__((aligned(4))) + #else + #define ALIGN4 __align(4) + #endif +#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ + + /** + * @brief Error status returned by some functions in the library. + */ + + typedef enum + { + ARM_MATH_SUCCESS = 0, /**< No error */ + ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ + ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ + ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */ + ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ + ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */ + ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ + } arm_status; + + /** + * @brief 8-bit fractional data type in 1.7 format. + */ + typedef int8_t q7_t; + + /** + * @brief 16-bit fractional data type in 1.15 format. + */ + typedef int16_t q15_t; + + /** + * @brief 32-bit fractional data type in 1.31 format. + */ + typedef int32_t q31_t; + + /** + * @brief 64-bit fractional data type in 1.63 format. + */ + typedef int64_t q63_t; + + /** + * @brief 32-bit floating-point type definition. + */ + typedef float float32_t; + + /** + * @brief 64-bit floating-point type definition. + */ + typedef double float64_t; + + /** + * @brief definition to read/write two 16 bit values. + */ +#if defined __CC_ARM + #define __SIMD32_TYPE int32_t __packed + #define CMSIS_UNUSED __attribute__((unused)) + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __SIMD32_TYPE int32_t + #define CMSIS_UNUSED __attribute__((unused)) + +#elif defined __GNUC__ + #define __SIMD32_TYPE int32_t + #define CMSIS_UNUSED __attribute__((unused)) + +#elif defined __ICCARM__ + #define __SIMD32_TYPE int32_t __packed + #define CMSIS_UNUSED + +#elif defined __CSMC__ + #define __SIMD32_TYPE int32_t + #define CMSIS_UNUSED + +#elif defined __TASKING__ + #define __SIMD32_TYPE __unaligned int32_t + #define CMSIS_UNUSED + +#else + #error Unknown compiler +#endif + +#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) +#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr)) +#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr)) +#define __SIMD64(addr) (*(int64_t **) & (addr)) + +#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) + /** + * @brief definition to pack two 16 bit values. + */ +#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ + (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) +#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ + (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) + +#endif + + + /** + * @brief definition to pack four 8 bit values. + */ +#ifndef ARM_MATH_BIG_ENDIAN + +#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ + (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ + (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ + (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) +#else + +#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ + (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ + (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ + (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) + +#endif + + + /** + * @brief Clips Q63 to Q31 values. + */ + static __INLINE q31_t clip_q63_to_q31( + q63_t x) + { + return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? + ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; + } + + /** + * @brief Clips Q63 to Q15 values. + */ + static __INLINE q15_t clip_q63_to_q15( + q63_t x) + { + return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? + ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); + } + + /** + * @brief Clips Q31 to Q7 values. + */ + static __INLINE q7_t clip_q31_to_q7( + q31_t x) + { + return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? + ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; + } + + /** + * @brief Clips Q31 to Q15 values. + */ + static __INLINE q15_t clip_q31_to_q15( + q31_t x) + { + return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? + ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; + } + + /** + * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. + */ + + static __INLINE q63_t mult32x64( + q63_t x, + q31_t y) + { + return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + + (((q63_t) (x >> 32) * y))); + } + +/* + #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM ) + #define __CLZ __clz + #endif + */ +/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */ +#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) ) + static __INLINE uint32_t __CLZ( + q31_t data); + + static __INLINE uint32_t __CLZ( + q31_t data) + { + uint32_t count = 0; + uint32_t mask = 0x80000000; + + while ((data & mask) == 0) + { + count += 1u; + mask = mask >> 1u; + } + + return (count); + } +#endif + + /** + * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. + */ + + static __INLINE uint32_t arm_recip_q31( + q31_t in, + q31_t * dst, + q31_t * pRecipTable) + { + q31_t out; + uint32_t tempVal; + uint32_t index, i; + uint32_t signBits; + + if (in > 0) + { + signBits = ((uint32_t) (__CLZ( in) - 1)); + } + else + { + signBits = ((uint32_t) (__CLZ(-in) - 1)); + } + + /* Convert input sample to 1.31 format */ + in = (in << signBits); + + /* calculation of index for initial approximated Val */ + index = (uint32_t)(in >> 24); + index = (index & INDEX_MASK); + + /* 1.31 with exp 1 */ + out = pRecipTable[index]; + + /* calculation of reciprocal value */ + /* running approximation for two iterations */ + for (i = 0u; i < 2u; i++) + { + tempVal = (uint32_t) (((q63_t) in * out) >> 31); + tempVal = 0x7FFFFFFFu - tempVal; + /* 1.31 with exp 1 */ + /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ + out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); + } + + /* write output */ + *dst = out; + + /* return num of signbits of out = 1/in value */ + return (signBits + 1u); + } + + + /** + * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. + */ + static __INLINE uint32_t arm_recip_q15( + q15_t in, + q15_t * dst, + q15_t * pRecipTable) + { + q15_t out = 0; + uint32_t tempVal = 0; + uint32_t index = 0, i = 0; + uint32_t signBits = 0; + + if (in > 0) + { + signBits = ((uint32_t)(__CLZ( in) - 17)); + } + else + { + signBits = ((uint32_t)(__CLZ(-in) - 17)); + } + + /* Convert input sample to 1.15 format */ + in = (in << signBits); + + /* calculation of index for initial approximated Val */ + index = (uint32_t)(in >> 8); + index = (index & INDEX_MASK); + + /* 1.15 with exp 1 */ + out = pRecipTable[index]; + + /* calculation of reciprocal value */ + /* running approximation for two iterations */ + for (i = 0u; i < 2u; i++) + { + tempVal = (uint32_t) (((q31_t) in * out) >> 15); + tempVal = 0x7FFFu - tempVal; + /* 1.15 with exp 1 */ + out = (q15_t) (((q31_t) out * tempVal) >> 14); + /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ + } + + /* write output */ + *dst = out; + + /* return num of signbits of out = 1/in value */ + return (signBits + 1); + } + + + /* + * @brief C custom defined intrinisic function for only M0 processors + */ +#if defined(ARM_MATH_CM0_FAMILY) + static __INLINE q31_t __SSAT( + q31_t x, + uint32_t y) + { + int32_t posMax, negMin; + uint32_t i; + + posMax = 1; + for (i = 0; i < (y - 1); i++) + { + posMax = posMax * 2; + } + + if (x > 0) + { + posMax = (posMax - 1); + + if (x > posMax) + { + x = posMax; + } + } + else + { + negMin = -posMax; + + if (x < negMin) + { + x = negMin; + } + } + return (x); + } +#endif /* end of ARM_MATH_CM0_FAMILY */ + + + /* + * @brief C custom defined intrinsic function for M3 and M0 processors + */ +#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) + + /* + * @brief C custom defined QADD8 for M3 and M0 processors + */ + static __INLINE uint32_t __QADD8( + uint32_t x, + uint32_t y) + { + q31_t r, s, t, u; + + r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; + s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; + t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; + u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); + } + + + /* + * @brief C custom defined QSUB8 for M3 and M0 processors + */ + static __INLINE uint32_t __QSUB8( + uint32_t x, + uint32_t y) + { + q31_t r, s, t, u; + + r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; + s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; + t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; + u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; + + return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); + } + + + /* + * @brief C custom defined QADD16 for M3 and M0 processors + */ + static __INLINE uint32_t __QADD16( + uint32_t x, + uint32_t y) + { +/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */ + q31_t r = 0, s = 0; + + r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined SHADD16 for M3 and M0 processors + */ + static __INLINE uint32_t __SHADD16( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined QSUB16 for M3 and M0 processors + */ + static __INLINE uint32_t __QSUB16( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined SHSUB16 for M3 and M0 processors + */ + static __INLINE uint32_t __SHSUB16( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined QASX for M3 and M0 processors + */ + static __INLINE uint32_t __QASX( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined SHASX for M3 and M0 processors + */ + static __INLINE uint32_t __SHASX( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined QSAX for M3 and M0 processors + */ + static __INLINE uint32_t __QSAX( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; + s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined SHSAX for M3 and M0 processors + */ + static __INLINE uint32_t __SHSAX( + uint32_t x, + uint32_t y) + { + q31_t r, s; + + r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; + s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; + + return ((uint32_t)((s << 16) | (r ))); + } + + + /* + * @brief C custom defined SMUSDX for M3 and M0 processors + */ + static __INLINE uint32_t __SMUSDX( + uint32_t x, + uint32_t y) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - + ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); + } + + /* + * @brief C custom defined SMUADX for M3 and M0 processors + */ + static __INLINE uint32_t __SMUADX( + uint32_t x, + uint32_t y) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); + } + + + /* + * @brief C custom defined QADD for M3 and M0 processors + */ + static __INLINE int32_t __QADD( + int32_t x, + int32_t y) + { + return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); + } + + + /* + * @brief C custom defined QSUB for M3 and M0 processors + */ + static __INLINE int32_t __QSUB( + int32_t x, + int32_t y) + { + return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); + } + + + /* + * @brief C custom defined SMLAD for M3 and M0 processors + */ + static __INLINE uint32_t __SMLAD( + uint32_t x, + uint32_t y, + uint32_t sum) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + + ( ((q31_t)sum ) ) )); + } + + + /* + * @brief C custom defined SMLADX for M3 and M0 processors + */ + static __INLINE uint32_t __SMLADX( + uint32_t x, + uint32_t y, + uint32_t sum) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + + ( ((q31_t)sum ) ) )); + } + + + /* + * @brief C custom defined SMLSDX for M3 and M0 processors + */ + static __INLINE uint32_t __SMLSDX( + uint32_t x, + uint32_t y, + uint32_t sum) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - + ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + + ( ((q31_t)sum ) ) )); + } + + + /* + * @brief C custom defined SMLALD for M3 and M0 processors + */ + static __INLINE uint64_t __SMLALD( + uint32_t x, + uint32_t y, + uint64_t sum) + { +/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ + return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + + ( ((q63_t)sum ) ) )); + } + + + /* + * @brief C custom defined SMLALDX for M3 and M0 processors + */ + static __INLINE uint64_t __SMLALDX( + uint32_t x, + uint32_t y, + uint64_t sum) + { +/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ + return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + + ( ((q63_t)sum ) ) )); + } + + + /* + * @brief C custom defined SMUAD for M3 and M0 processors + */ + static __INLINE uint32_t __SMUAD( + uint32_t x, + uint32_t y) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + + ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); + } + + + /* + * @brief C custom defined SMUSD for M3 and M0 processors + */ + static __INLINE uint32_t __SMUSD( + uint32_t x, + uint32_t y) + { + return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - + ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); + } + + + /* + * @brief C custom defined SXTB16 for M3 and M0 processors + */ + static __INLINE uint32_t __SXTB16( + uint32_t x) + { + return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | + ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); + } + +#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */ + + + /** + * @brief Instance structure for the Q7 FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of filter coefficients in the filter. */ + q7_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + } arm_fir_instance_q7; + + /** + * @brief Instance structure for the Q15 FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of filter coefficients in the filter. */ + q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + } arm_fir_instance_q15; + + /** + * @brief Instance structure for the Q31 FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of filter coefficients in the filter. */ + q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + } arm_fir_instance_q31; + + /** + * @brief Instance structure for the floating-point FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of filter coefficients in the filter. */ + float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + } arm_fir_instance_f32; + + + /** + * @brief Processing function for the Q7 FIR filter. + * @param[in] S points to an instance of the Q7 FIR filter structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_q7( + const arm_fir_instance_q7 * S, + q7_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q7 FIR filter. + * @param[in,out] S points to an instance of the Q7 FIR structure. + * @param[in] numTaps Number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of samples that are processed. + */ + void arm_fir_init_q7( + arm_fir_instance_q7 * S, + uint16_t numTaps, + q7_t * pCoeffs, + q7_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q15 FIR filter. + * @param[in] S points to an instance of the Q15 FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_q15( + const arm_fir_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q15 FIR filter structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_fast_q15( + const arm_fir_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q15 FIR filter. + * @param[in,out] S points to an instance of the Q15 FIR filter structure. + * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of samples that are processed at a time. + * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if + * numTaps is not a supported value. + */ + arm_status arm_fir_init_q15( + arm_fir_instance_q15 * S, + uint16_t numTaps, + q15_t * pCoeffs, + q15_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 FIR filter. + * @param[in] S points to an instance of the Q31 FIR filter structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_q31( + const arm_fir_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q31 FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_fast_q31( + const arm_fir_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 FIR filter. + * @param[in,out] S points to an instance of the Q31 FIR structure. + * @param[in] numTaps Number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of samples that are processed at a time. + */ + void arm_fir_init_q31( + arm_fir_instance_q31 * S, + uint16_t numTaps, + q31_t * pCoeffs, + q31_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the floating-point FIR filter. + * @param[in] S points to an instance of the floating-point FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_f32( + const arm_fir_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point FIR filter. + * @param[in,out] S points to an instance of the floating-point FIR filter structure. + * @param[in] numTaps Number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of samples that are processed at a time. + */ + void arm_fir_init_f32( + arm_fir_instance_f32 * S, + uint16_t numTaps, + float32_t * pCoeffs, + float32_t * pState, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q15 Biquad cascade filter. + */ + typedef struct + { + int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ + q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ + int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ + } arm_biquad_casd_df1_inst_q15; + + /** + * @brief Instance structure for the Q31 Biquad cascade filter. + */ + typedef struct + { + uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ + q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ + uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ + } arm_biquad_casd_df1_inst_q31; + + /** + * @brief Instance structure for the floating-point Biquad cascade filter. + */ + typedef struct + { + uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ + float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ + } arm_biquad_casd_df1_inst_f32; + + + /** + * @brief Processing function for the Q15 Biquad cascade filter. + * @param[in] S points to an instance of the Q15 Biquad cascade structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df1_q15( + const arm_biquad_casd_df1_inst_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q15 Biquad cascade filter. + * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format + */ + void arm_biquad_cascade_df1_init_q15( + arm_biquad_casd_df1_inst_q15 * S, + uint8_t numStages, + q15_t * pCoeffs, + q15_t * pState, + int8_t postShift); + + + /** + * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q15 Biquad cascade structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df1_fast_q15( + const arm_biquad_casd_df1_inst_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 Biquad cascade filter + * @param[in] S points to an instance of the Q31 Biquad cascade structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df1_q31( + const arm_biquad_casd_df1_inst_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q31 Biquad cascade structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df1_fast_q31( + const arm_biquad_casd_df1_inst_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 Biquad cascade filter. + * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format + */ + void arm_biquad_cascade_df1_init_q31( + arm_biquad_casd_df1_inst_q31 * S, + uint8_t numStages, + q31_t * pCoeffs, + q31_t * pState, + int8_t postShift); + + + /** + * @brief Processing function for the floating-point Biquad cascade filter. + * @param[in] S points to an instance of the floating-point Biquad cascade structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df1_f32( + const arm_biquad_casd_df1_inst_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point Biquad cascade filter. + * @param[in,out] S points to an instance of the floating-point Biquad cascade structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + */ + void arm_biquad_cascade_df1_init_f32( + arm_biquad_casd_df1_inst_f32 * S, + uint8_t numStages, + float32_t * pCoeffs, + float32_t * pState); + + + /** + * @brief Instance structure for the floating-point matrix structure. + */ + typedef struct + { + uint16_t numRows; /**< number of rows of the matrix. */ + uint16_t numCols; /**< number of columns of the matrix. */ + float32_t *pData; /**< points to the data of the matrix. */ + } arm_matrix_instance_f32; + + + /** + * @brief Instance structure for the floating-point matrix structure. + */ + typedef struct + { + uint16_t numRows; /**< number of rows of the matrix. */ + uint16_t numCols; /**< number of columns of the matrix. */ + float64_t *pData; /**< points to the data of the matrix. */ + } arm_matrix_instance_f64; + + /** + * @brief Instance structure for the Q15 matrix structure. + */ + typedef struct + { + uint16_t numRows; /**< number of rows of the matrix. */ + uint16_t numCols; /**< number of columns of the matrix. */ + q15_t *pData; /**< points to the data of the matrix. */ + } arm_matrix_instance_q15; + + /** + * @brief Instance structure for the Q31 matrix structure. + */ + typedef struct + { + uint16_t numRows; /**< number of rows of the matrix. */ + uint16_t numCols; /**< number of columns of the matrix. */ + q31_t *pData; /**< points to the data of the matrix. */ + } arm_matrix_instance_q31; + + + /** + * @brief Floating-point matrix addition. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_add_f32( + const arm_matrix_instance_f32 * pSrcA, + const arm_matrix_instance_f32 * pSrcB, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15 matrix addition. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_add_q15( + const arm_matrix_instance_q15 * pSrcA, + const arm_matrix_instance_q15 * pSrcB, + arm_matrix_instance_q15 * pDst); + + + /** + * @brief Q31 matrix addition. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_add_q31( + const arm_matrix_instance_q31 * pSrcA, + const arm_matrix_instance_q31 * pSrcB, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Floating-point, complex, matrix multiplication. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_cmplx_mult_f32( + const arm_matrix_instance_f32 * pSrcA, + const arm_matrix_instance_f32 * pSrcB, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15, complex, matrix multiplication. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_cmplx_mult_q15( + const arm_matrix_instance_q15 * pSrcA, + const arm_matrix_instance_q15 * pSrcB, + arm_matrix_instance_q15 * pDst, + q15_t * pScratch); + + + /** + * @brief Q31, complex, matrix multiplication. + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_cmplx_mult_q31( + const arm_matrix_instance_q31 * pSrcA, + const arm_matrix_instance_q31 * pSrcB, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Floating-point matrix transpose. + * @param[in] pSrc points to the input matrix + * @param[out] pDst points to the output matrix + * @return The function returns either ARM_MATH_SIZE_MISMATCH + * or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_trans_f32( + const arm_matrix_instance_f32 * pSrc, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15 matrix transpose. + * @param[in] pSrc points to the input matrix + * @param[out] pDst points to the output matrix + * @return The function returns either ARM_MATH_SIZE_MISMATCH + * or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_trans_q15( + const arm_matrix_instance_q15 * pSrc, + arm_matrix_instance_q15 * pDst); + + + /** + * @brief Q31 matrix transpose. + * @param[in] pSrc points to the input matrix + * @param[out] pDst points to the output matrix + * @return The function returns either ARM_MATH_SIZE_MISMATCH + * or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_trans_q31( + const arm_matrix_instance_q31 * pSrc, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Floating-point matrix multiplication + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_mult_f32( + const arm_matrix_instance_f32 * pSrcA, + const arm_matrix_instance_f32 * pSrcB, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15 matrix multiplication + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @param[in] pState points to the array for storing intermediate results + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_mult_q15( + const arm_matrix_instance_q15 * pSrcA, + const arm_matrix_instance_q15 * pSrcB, + arm_matrix_instance_q15 * pDst, + q15_t * pState); + + + /** + * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @param[in] pState points to the array for storing intermediate results + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_mult_fast_q15( + const arm_matrix_instance_q15 * pSrcA, + const arm_matrix_instance_q15 * pSrcB, + arm_matrix_instance_q15 * pDst, + q15_t * pState); + + + /** + * @brief Q31 matrix multiplication + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_mult_q31( + const arm_matrix_instance_q31 * pSrcA, + const arm_matrix_instance_q31 * pSrcB, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_mult_fast_q31( + const arm_matrix_instance_q31 * pSrcA, + const arm_matrix_instance_q31 * pSrcB, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Floating-point matrix subtraction + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_sub_f32( + const arm_matrix_instance_f32 * pSrcA, + const arm_matrix_instance_f32 * pSrcB, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15 matrix subtraction + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_sub_q15( + const arm_matrix_instance_q15 * pSrcA, + const arm_matrix_instance_q15 * pSrcB, + arm_matrix_instance_q15 * pDst); + + + /** + * @brief Q31 matrix subtraction + * @param[in] pSrcA points to the first input matrix structure + * @param[in] pSrcB points to the second input matrix structure + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_sub_q31( + const arm_matrix_instance_q31 * pSrcA, + const arm_matrix_instance_q31 * pSrcB, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Floating-point matrix scaling. + * @param[in] pSrc points to the input matrix + * @param[in] scale scale factor + * @param[out] pDst points to the output matrix + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_scale_f32( + const arm_matrix_instance_f32 * pSrc, + float32_t scale, + arm_matrix_instance_f32 * pDst); + + + /** + * @brief Q15 matrix scaling. + * @param[in] pSrc points to input matrix + * @param[in] scaleFract fractional portion of the scale factor + * @param[in] shift number of bits to shift the result by + * @param[out] pDst points to output matrix + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_scale_q15( + const arm_matrix_instance_q15 * pSrc, + q15_t scaleFract, + int32_t shift, + arm_matrix_instance_q15 * pDst); + + + /** + * @brief Q31 matrix scaling. + * @param[in] pSrc points to input matrix + * @param[in] scaleFract fractional portion of the scale factor + * @param[in] shift number of bits to shift the result by + * @param[out] pDst points to output matrix structure + * @return The function returns either + * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. + */ + arm_status arm_mat_scale_q31( + const arm_matrix_instance_q31 * pSrc, + q31_t scaleFract, + int32_t shift, + arm_matrix_instance_q31 * pDst); + + + /** + * @brief Q31 matrix initialization. + * @param[in,out] S points to an instance of the floating-point matrix structure. + * @param[in] nRows number of rows in the matrix. + * @param[in] nColumns number of columns in the matrix. + * @param[in] pData points to the matrix data array. + */ + void arm_mat_init_q31( + arm_matrix_instance_q31 * S, + uint16_t nRows, + uint16_t nColumns, + q31_t * pData); + + + /** + * @brief Q15 matrix initialization. + * @param[in,out] S points to an instance of the floating-point matrix structure. + * @param[in] nRows number of rows in the matrix. + * @param[in] nColumns number of columns in the matrix. + * @param[in] pData points to the matrix data array. + */ + void arm_mat_init_q15( + arm_matrix_instance_q15 * S, + uint16_t nRows, + uint16_t nColumns, + q15_t * pData); + + + /** + * @brief Floating-point matrix initialization. + * @param[in,out] S points to an instance of the floating-point matrix structure. + * @param[in] nRows number of rows in the matrix. + * @param[in] nColumns number of columns in the matrix. + * @param[in] pData points to the matrix data array. + */ + void arm_mat_init_f32( + arm_matrix_instance_f32 * S, + uint16_t nRows, + uint16_t nColumns, + float32_t * pData); + + + + /** + * @brief Instance structure for the Q15 PID Control. + */ + typedef struct + { + q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ +#ifdef ARM_MATH_CM0_FAMILY + q15_t A1; + q15_t A2; +#else + q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ +#endif + q15_t state[3]; /**< The state array of length 3. */ + q15_t Kp; /**< The proportional gain. */ + q15_t Ki; /**< The integral gain. */ + q15_t Kd; /**< The derivative gain. */ + } arm_pid_instance_q15; + + /** + * @brief Instance structure for the Q31 PID Control. + */ + typedef struct + { + q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ + q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ + q31_t A2; /**< The derived gain, A2 = Kd . */ + q31_t state[3]; /**< The state array of length 3. */ + q31_t Kp; /**< The proportional gain. */ + q31_t Ki; /**< The integral gain. */ + q31_t Kd; /**< The derivative gain. */ + } arm_pid_instance_q31; + + /** + * @brief Instance structure for the floating-point PID Control. + */ + typedef struct + { + float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ + float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ + float32_t A2; /**< The derived gain, A2 = Kd . */ + float32_t state[3]; /**< The state array of length 3. */ + float32_t Kp; /**< The proportional gain. */ + float32_t Ki; /**< The integral gain. */ + float32_t Kd; /**< The derivative gain. */ + } arm_pid_instance_f32; + + + + /** + * @brief Initialization function for the floating-point PID Control. + * @param[in,out] S points to an instance of the PID structure. + * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. + */ + void arm_pid_init_f32( + arm_pid_instance_f32 * S, + int32_t resetStateFlag); + + + /** + * @brief Reset function for the floating-point PID Control. + * @param[in,out] S is an instance of the floating-point PID Control structure + */ + void arm_pid_reset_f32( + arm_pid_instance_f32 * S); + + + /** + * @brief Initialization function for the Q31 PID Control. + * @param[in,out] S points to an instance of the Q15 PID structure. + * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. + */ + void arm_pid_init_q31( + arm_pid_instance_q31 * S, + int32_t resetStateFlag); + + + /** + * @brief Reset function for the Q31 PID Control. + * @param[in,out] S points to an instance of the Q31 PID Control structure + */ + + void arm_pid_reset_q31( + arm_pid_instance_q31 * S); + + + /** + * @brief Initialization function for the Q15 PID Control. + * @param[in,out] S points to an instance of the Q15 PID structure. + * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. + */ + void arm_pid_init_q15( + arm_pid_instance_q15 * S, + int32_t resetStateFlag); + + + /** + * @brief Reset function for the Q15 PID Control. + * @param[in,out] S points to an instance of the q15 PID Control structure + */ + void arm_pid_reset_q15( + arm_pid_instance_q15 * S); + + + /** + * @brief Instance structure for the floating-point Linear Interpolate function. + */ + typedef struct + { + uint32_t nValues; /**< nValues */ + float32_t x1; /**< x1 */ + float32_t xSpacing; /**< xSpacing */ + float32_t *pYData; /**< pointer to the table of Y values */ + } arm_linear_interp_instance_f32; + + /** + * @brief Instance structure for the floating-point bilinear interpolation function. + */ + typedef struct + { + uint16_t numRows; /**< number of rows in the data table. */ + uint16_t numCols; /**< number of columns in the data table. */ + float32_t *pData; /**< points to the data table. */ + } arm_bilinear_interp_instance_f32; + + /** + * @brief Instance structure for the Q31 bilinear interpolation function. + */ + typedef struct + { + uint16_t numRows; /**< number of rows in the data table. */ + uint16_t numCols; /**< number of columns in the data table. */ + q31_t *pData; /**< points to the data table. */ + } arm_bilinear_interp_instance_q31; + + /** + * @brief Instance structure for the Q15 bilinear interpolation function. + */ + typedef struct + { + uint16_t numRows; /**< number of rows in the data table. */ + uint16_t numCols; /**< number of columns in the data table. */ + q15_t *pData; /**< points to the data table. */ + } arm_bilinear_interp_instance_q15; + + /** + * @brief Instance structure for the Q15 bilinear interpolation function. + */ + typedef struct + { + uint16_t numRows; /**< number of rows in the data table. */ + uint16_t numCols; /**< number of columns in the data table. */ + q7_t *pData; /**< points to the data table. */ + } arm_bilinear_interp_instance_q7; + + + /** + * @brief Q7 vector multiplication. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_mult_q7( + q7_t * pSrcA, + q7_t * pSrcB, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q15 vector multiplication. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_mult_q15( + q15_t * pSrcA, + q15_t * pSrcB, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q31 vector multiplication. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_mult_q31( + q31_t * pSrcA, + q31_t * pSrcB, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Floating-point vector multiplication. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_mult_f32( + float32_t * pSrcA, + float32_t * pSrcB, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q15 CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + } arm_cfft_radix2_instance_q15; + +/* Deprecated */ + arm_status arm_cfft_radix2_init_q15( + arm_cfft_radix2_instance_q15 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + +/* Deprecated */ + void arm_cfft_radix2_q15( + const arm_cfft_radix2_instance_q15 * S, + q15_t * pSrc); + + + /** + * @brief Instance structure for the Q15 CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + q15_t *pTwiddle; /**< points to the twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + } arm_cfft_radix4_instance_q15; + +/* Deprecated */ + arm_status arm_cfft_radix4_init_q15( + arm_cfft_radix4_instance_q15 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + +/* Deprecated */ + void arm_cfft_radix4_q15( + const arm_cfft_radix4_instance_q15 * S, + q15_t * pSrc); + + /** + * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + q31_t *pTwiddle; /**< points to the Twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + } arm_cfft_radix2_instance_q31; + +/* Deprecated */ + arm_status arm_cfft_radix2_init_q31( + arm_cfft_radix2_instance_q31 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + +/* Deprecated */ + void arm_cfft_radix2_q31( + const arm_cfft_radix2_instance_q31 * S, + q31_t * pSrc); + + /** + * @brief Instance structure for the Q31 CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + q31_t *pTwiddle; /**< points to the twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + } arm_cfft_radix4_instance_q31; + +/* Deprecated */ + void arm_cfft_radix4_q31( + const arm_cfft_radix4_instance_q31 * S, + q31_t * pSrc); + +/* Deprecated */ + arm_status arm_cfft_radix4_init_q31( + arm_cfft_radix4_instance_q31 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + + /** + * @brief Instance structure for the floating-point CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + float32_t *pTwiddle; /**< points to the Twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + float32_t onebyfftLen; /**< value of 1/fftLen. */ + } arm_cfft_radix2_instance_f32; + +/* Deprecated */ + arm_status arm_cfft_radix2_init_f32( + arm_cfft_radix2_instance_f32 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + +/* Deprecated */ + void arm_cfft_radix2_f32( + const arm_cfft_radix2_instance_f32 * S, + float32_t * pSrc); + + /** + * @brief Instance structure for the floating-point CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ + uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ + float32_t *pTwiddle; /**< points to the Twiddle factor table. */ + uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ + float32_t onebyfftLen; /**< value of 1/fftLen. */ + } arm_cfft_radix4_instance_f32; + +/* Deprecated */ + arm_status arm_cfft_radix4_init_f32( + arm_cfft_radix4_instance_f32 * S, + uint16_t fftLen, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + +/* Deprecated */ + void arm_cfft_radix4_f32( + const arm_cfft_radix4_instance_f32 * S, + float32_t * pSrc); + + /** + * @brief Instance structure for the fixed-point CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ + const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t bitRevLength; /**< bit reversal table length. */ + } arm_cfft_instance_q15; + +void arm_cfft_q15( + const arm_cfft_instance_q15 * S, + q15_t * p1, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + + /** + * @brief Instance structure for the fixed-point CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ + const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t bitRevLength; /**< bit reversal table length. */ + } arm_cfft_instance_q31; + +void arm_cfft_q31( + const arm_cfft_instance_q31 * S, + q31_t * p1, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + + /** + * @brief Instance structure for the floating-point CFFT/CIFFT function. + */ + typedef struct + { + uint16_t fftLen; /**< length of the FFT. */ + const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ + const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ + uint16_t bitRevLength; /**< bit reversal table length. */ + } arm_cfft_instance_f32; + + void arm_cfft_f32( + const arm_cfft_instance_f32 * S, + float32_t * p1, + uint8_t ifftFlag, + uint8_t bitReverseFlag); + + /** + * @brief Instance structure for the Q15 RFFT/RIFFT function. + */ + typedef struct + { + uint32_t fftLenReal; /**< length of the real FFT. */ + uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ + uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ + uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ + q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ + const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ + } arm_rfft_instance_q15; + + arm_status arm_rfft_init_q15( + arm_rfft_instance_q15 * S, + uint32_t fftLenReal, + uint32_t ifftFlagR, + uint32_t bitReverseFlag); + + void arm_rfft_q15( + const arm_rfft_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst); + + /** + * @brief Instance structure for the Q31 RFFT/RIFFT function. + */ + typedef struct + { + uint32_t fftLenReal; /**< length of the real FFT. */ + uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ + uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ + uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ + q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ + const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ + } arm_rfft_instance_q31; + + arm_status arm_rfft_init_q31( + arm_rfft_instance_q31 * S, + uint32_t fftLenReal, + uint32_t ifftFlagR, + uint32_t bitReverseFlag); + + void arm_rfft_q31( + const arm_rfft_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst); + + /** + * @brief Instance structure for the floating-point RFFT/RIFFT function. + */ + typedef struct + { + uint32_t fftLenReal; /**< length of the real FFT. */ + uint16_t fftLenBy2; /**< length of the complex FFT. */ + uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ + uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ + uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ + float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ + float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ + arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ + } arm_rfft_instance_f32; + + arm_status arm_rfft_init_f32( + arm_rfft_instance_f32 * S, + arm_cfft_radix4_instance_f32 * S_CFFT, + uint32_t fftLenReal, + uint32_t ifftFlagR, + uint32_t bitReverseFlag); + + void arm_rfft_f32( + const arm_rfft_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst); + + /** + * @brief Instance structure for the floating-point RFFT/RIFFT function. + */ +typedef struct + { + arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ + uint16_t fftLenRFFT; /**< length of the real sequence */ + float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ + } arm_rfft_fast_instance_f32 ; + +arm_status arm_rfft_fast_init_f32 ( + arm_rfft_fast_instance_f32 * S, + uint16_t fftLen); + +void arm_rfft_fast_f32( + arm_rfft_fast_instance_f32 * S, + float32_t * p, float32_t * pOut, + uint8_t ifftFlag); + + /** + * @brief Instance structure for the floating-point DCT4/IDCT4 function. + */ + typedef struct + { + uint16_t N; /**< length of the DCT4. */ + uint16_t Nby2; /**< half of the length of the DCT4. */ + float32_t normalize; /**< normalizing factor. */ + float32_t *pTwiddle; /**< points to the twiddle factor table. */ + float32_t *pCosFactor; /**< points to the cosFactor table. */ + arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ + arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ + } arm_dct4_instance_f32; + + + /** + * @brief Initialization function for the floating-point DCT4/IDCT4. + * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. + * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. + * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. + * @param[in] N length of the DCT4. + * @param[in] Nby2 half of the length of the DCT4. + * @param[in] normalize normalizing factor. + * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length. + */ + arm_status arm_dct4_init_f32( + arm_dct4_instance_f32 * S, + arm_rfft_instance_f32 * S_RFFT, + arm_cfft_radix4_instance_f32 * S_CFFT, + uint16_t N, + uint16_t Nby2, + float32_t normalize); + + + /** + * @brief Processing function for the floating-point DCT4/IDCT4. + * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure. + * @param[in] pState points to state buffer. + * @param[in,out] pInlineBuffer points to the in-place input and output buffer. + */ + void arm_dct4_f32( + const arm_dct4_instance_f32 * S, + float32_t * pState, + float32_t * pInlineBuffer); + + + /** + * @brief Instance structure for the Q31 DCT4/IDCT4 function. + */ + typedef struct + { + uint16_t N; /**< length of the DCT4. */ + uint16_t Nby2; /**< half of the length of the DCT4. */ + q31_t normalize; /**< normalizing factor. */ + q31_t *pTwiddle; /**< points to the twiddle factor table. */ + q31_t *pCosFactor; /**< points to the cosFactor table. */ + arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ + arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ + } arm_dct4_instance_q31; + + + /** + * @brief Initialization function for the Q31 DCT4/IDCT4. + * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. + * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure + * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure + * @param[in] N length of the DCT4. + * @param[in] Nby2 half of the length of the DCT4. + * @param[in] normalize normalizing factor. + * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. + */ + arm_status arm_dct4_init_q31( + arm_dct4_instance_q31 * S, + arm_rfft_instance_q31 * S_RFFT, + arm_cfft_radix4_instance_q31 * S_CFFT, + uint16_t N, + uint16_t Nby2, + q31_t normalize); + + + /** + * @brief Processing function for the Q31 DCT4/IDCT4. + * @param[in] S points to an instance of the Q31 DCT4 structure. + * @param[in] pState points to state buffer. + * @param[in,out] pInlineBuffer points to the in-place input and output buffer. + */ + void arm_dct4_q31( + const arm_dct4_instance_q31 * S, + q31_t * pState, + q31_t * pInlineBuffer); + + + /** + * @brief Instance structure for the Q15 DCT4/IDCT4 function. + */ + typedef struct + { + uint16_t N; /**< length of the DCT4. */ + uint16_t Nby2; /**< half of the length of the DCT4. */ + q15_t normalize; /**< normalizing factor. */ + q15_t *pTwiddle; /**< points to the twiddle factor table. */ + q15_t *pCosFactor; /**< points to the cosFactor table. */ + arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ + arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ + } arm_dct4_instance_q15; + + + /** + * @brief Initialization function for the Q15 DCT4/IDCT4. + * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. + * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. + * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. + * @param[in] N length of the DCT4. + * @param[in] Nby2 half of the length of the DCT4. + * @param[in] normalize normalizing factor. + * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. + */ + arm_status arm_dct4_init_q15( + arm_dct4_instance_q15 * S, + arm_rfft_instance_q15 * S_RFFT, + arm_cfft_radix4_instance_q15 * S_CFFT, + uint16_t N, + uint16_t Nby2, + q15_t normalize); + + + /** + * @brief Processing function for the Q15 DCT4/IDCT4. + * @param[in] S points to an instance of the Q15 DCT4 structure. + * @param[in] pState points to state buffer. + * @param[in,out] pInlineBuffer points to the in-place input and output buffer. + */ + void arm_dct4_q15( + const arm_dct4_instance_q15 * S, + q15_t * pState, + q15_t * pInlineBuffer); + + + /** + * @brief Floating-point vector addition. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_add_f32( + float32_t * pSrcA, + float32_t * pSrcB, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q7 vector addition. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_add_q7( + q7_t * pSrcA, + q7_t * pSrcB, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q15 vector addition. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_add_q15( + q15_t * pSrcA, + q15_t * pSrcB, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q31 vector addition. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_add_q31( + q31_t * pSrcA, + q31_t * pSrcB, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Floating-point vector subtraction. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_sub_f32( + float32_t * pSrcA, + float32_t * pSrcB, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q7 vector subtraction. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_sub_q7( + q7_t * pSrcA, + q7_t * pSrcB, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q15 vector subtraction. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_sub_q15( + q15_t * pSrcA, + q15_t * pSrcB, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q31 vector subtraction. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in each vector + */ + void arm_sub_q31( + q31_t * pSrcA, + q31_t * pSrcB, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Multiplies a floating-point vector by a scalar. + * @param[in] pSrc points to the input vector + * @param[in] scale scale factor to be applied + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_scale_f32( + float32_t * pSrc, + float32_t scale, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Multiplies a Q7 vector by a scalar. + * @param[in] pSrc points to the input vector + * @param[in] scaleFract fractional portion of the scale value + * @param[in] shift number of bits to shift the result by + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_scale_q7( + q7_t * pSrc, + q7_t scaleFract, + int8_t shift, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Multiplies a Q15 vector by a scalar. + * @param[in] pSrc points to the input vector + * @param[in] scaleFract fractional portion of the scale value + * @param[in] shift number of bits to shift the result by + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_scale_q15( + q15_t * pSrc, + q15_t scaleFract, + int8_t shift, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Multiplies a Q31 vector by a scalar. + * @param[in] pSrc points to the input vector + * @param[in] scaleFract fractional portion of the scale value + * @param[in] shift number of bits to shift the result by + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_scale_q31( + q31_t * pSrc, + q31_t scaleFract, + int8_t shift, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q7 vector absolute value. + * @param[in] pSrc points to the input buffer + * @param[out] pDst points to the output buffer + * @param[in] blockSize number of samples in each vector + */ + void arm_abs_q7( + q7_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Floating-point vector absolute value. + * @param[in] pSrc points to the input buffer + * @param[out] pDst points to the output buffer + * @param[in] blockSize number of samples in each vector + */ + void arm_abs_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q15 vector absolute value. + * @param[in] pSrc points to the input buffer + * @param[out] pDst points to the output buffer + * @param[in] blockSize number of samples in each vector + */ + void arm_abs_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Q31 vector absolute value. + * @param[in] pSrc points to the input buffer + * @param[out] pDst points to the output buffer + * @param[in] blockSize number of samples in each vector + */ + void arm_abs_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Dot product of floating-point vectors. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] blockSize number of samples in each vector + * @param[out] result output result returned here + */ + void arm_dot_prod_f32( + float32_t * pSrcA, + float32_t * pSrcB, + uint32_t blockSize, + float32_t * result); + + + /** + * @brief Dot product of Q7 vectors. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] blockSize number of samples in each vector + * @param[out] result output result returned here + */ + void arm_dot_prod_q7( + q7_t * pSrcA, + q7_t * pSrcB, + uint32_t blockSize, + q31_t * result); + + + /** + * @brief Dot product of Q15 vectors. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] blockSize number of samples in each vector + * @param[out] result output result returned here + */ + void arm_dot_prod_q15( + q15_t * pSrcA, + q15_t * pSrcB, + uint32_t blockSize, + q63_t * result); + + + /** + * @brief Dot product of Q31 vectors. + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] blockSize number of samples in each vector + * @param[out] result output result returned here + */ + void arm_dot_prod_q31( + q31_t * pSrcA, + q31_t * pSrcB, + uint32_t blockSize, + q63_t * result); + + + /** + * @brief Shifts the elements of a Q7 vector a specified number of bits. + * @param[in] pSrc points to the input vector + * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_shift_q7( + q7_t * pSrc, + int8_t shiftBits, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Shifts the elements of a Q15 vector a specified number of bits. + * @param[in] pSrc points to the input vector + * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_shift_q15( + q15_t * pSrc, + int8_t shiftBits, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Shifts the elements of a Q31 vector a specified number of bits. + * @param[in] pSrc points to the input vector + * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_shift_q31( + q31_t * pSrc, + int8_t shiftBits, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Adds a constant offset to a floating-point vector. + * @param[in] pSrc points to the input vector + * @param[in] offset is the offset to be added + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_offset_f32( + float32_t * pSrc, + float32_t offset, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Adds a constant offset to a Q7 vector. + * @param[in] pSrc points to the input vector + * @param[in] offset is the offset to be added + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_offset_q7( + q7_t * pSrc, + q7_t offset, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Adds a constant offset to a Q15 vector. + * @param[in] pSrc points to the input vector + * @param[in] offset is the offset to be added + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_offset_q15( + q15_t * pSrc, + q15_t offset, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Adds a constant offset to a Q31 vector. + * @param[in] pSrc points to the input vector + * @param[in] offset is the offset to be added + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_offset_q31( + q31_t * pSrc, + q31_t offset, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Negates the elements of a floating-point vector. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_negate_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Negates the elements of a Q7 vector. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_negate_q7( + q7_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Negates the elements of a Q15 vector. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_negate_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Negates the elements of a Q31 vector. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] blockSize number of samples in the vector + */ + void arm_negate_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Copies the elements of a floating-point vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_copy_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Copies the elements of a Q7 vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_copy_q7( + q7_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Copies the elements of a Q15 vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_copy_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Copies the elements of a Q31 vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_copy_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Fills a constant value into a floating-point vector. + * @param[in] value input value to be filled + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_fill_f32( + float32_t value, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Fills a constant value into a Q7 vector. + * @param[in] value input value to be filled + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_fill_q7( + q7_t value, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Fills a constant value into a Q15 vector. + * @param[in] value input value to be filled + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_fill_q15( + q15_t value, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Fills a constant value into a Q31 vector. + * @param[in] value input value to be filled + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_fill_q31( + q31_t value, + q31_t * pDst, + uint32_t blockSize); + + +/** + * @brief Convolution of floating-point sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1. + */ + void arm_conv_f32( + float32_t * pSrcA, + uint32_t srcALen, + float32_t * pSrcB, + uint32_t srcBLen, + float32_t * pDst); + + + /** + * @brief Convolution of Q15 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). + */ + void arm_conv_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + q15_t * pScratch1, + q15_t * pScratch2); + + +/** + * @brief Convolution of Q15 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1. + */ + void arm_conv_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst); + + + /** + * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + */ + void arm_conv_fast_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst); + + + /** + * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). + */ + void arm_conv_fast_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + q15_t * pScratch1, + q15_t * pScratch2); + + + /** + * @brief Convolution of Q31 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + */ + void arm_conv_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst); + + + /** + * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + */ + void arm_conv_fast_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst); + + + /** + * @brief Convolution of Q7 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). + */ + void arm_conv_opt_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst, + q15_t * pScratch1, + q15_t * pScratch2); + + + /** + * @brief Convolution of Q7 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1. + */ + void arm_conv_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst); + + + /** + * @brief Partial convolution of floating-point sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_f32( + float32_t * pSrcA, + uint32_t srcALen, + float32_t * pSrcB, + uint32_t srcBLen, + float32_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Partial convolution of Q15 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + uint32_t firstIndex, + uint32_t numPoints, + q15_t * pScratch1, + q15_t * pScratch2); + + + /** + * @brief Partial convolution of Q15 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_fast_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_fast_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + uint32_t firstIndex, + uint32_t numPoints, + q15_t * pScratch1, + q15_t * pScratch2); + + + /** + * @brief Partial convolution of Q31 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_fast_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Partial convolution of Q7 sequences + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_opt_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst, + uint32_t firstIndex, + uint32_t numPoints, + q15_t * pScratch1, + q15_t * pScratch2); + + +/** + * @brief Partial convolution of Q7 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data + * @param[in] firstIndex is the first output sample to start with. + * @param[in] numPoints is the number of output points to be computed. + * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2]. + */ + arm_status arm_conv_partial_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst, + uint32_t firstIndex, + uint32_t numPoints); + + + /** + * @brief Instance structure for the Q15 FIR decimator. + */ + typedef struct + { + uint8_t M; /**< decimation factor. */ + uint16_t numTaps; /**< number of coefficients in the filter. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + } arm_fir_decimate_instance_q15; + + /** + * @brief Instance structure for the Q31 FIR decimator. + */ + typedef struct + { + uint8_t M; /**< decimation factor. */ + uint16_t numTaps; /**< number of coefficients in the filter. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + } arm_fir_decimate_instance_q31; + + /** + * @brief Instance structure for the floating-point FIR decimator. + */ + typedef struct + { + uint8_t M; /**< decimation factor. */ + uint16_t numTaps; /**< number of coefficients in the filter. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + } arm_fir_decimate_instance_f32; + + + /** + * @brief Processing function for the floating-point FIR decimator. + * @param[in] S points to an instance of the floating-point FIR decimator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_decimate_f32( + const arm_fir_decimate_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point FIR decimator. + * @param[in,out] S points to an instance of the floating-point FIR decimator structure. + * @param[in] numTaps number of coefficients in the filter. + * @param[in] M decimation factor. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * blockSize is not a multiple of M. + */ + arm_status arm_fir_decimate_init_f32( + arm_fir_decimate_instance_f32 * S, + uint16_t numTaps, + uint8_t M, + float32_t * pCoeffs, + float32_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q15 FIR decimator. + * @param[in] S points to an instance of the Q15 FIR decimator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_decimate_q15( + const arm_fir_decimate_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q15 FIR decimator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_decimate_fast_q15( + const arm_fir_decimate_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q15 FIR decimator. + * @param[in,out] S points to an instance of the Q15 FIR decimator structure. + * @param[in] numTaps number of coefficients in the filter. + * @param[in] M decimation factor. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * blockSize is not a multiple of M. + */ + arm_status arm_fir_decimate_init_q15( + arm_fir_decimate_instance_q15 * S, + uint16_t numTaps, + uint8_t M, + q15_t * pCoeffs, + q15_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 FIR decimator. + * @param[in] S points to an instance of the Q31 FIR decimator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_decimate_q31( + const arm_fir_decimate_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + /** + * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. + * @param[in] S points to an instance of the Q31 FIR decimator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_decimate_fast_q31( + arm_fir_decimate_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 FIR decimator. + * @param[in,out] S points to an instance of the Q31 FIR decimator structure. + * @param[in] numTaps number of coefficients in the filter. + * @param[in] M decimation factor. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * blockSize is not a multiple of M. + */ + arm_status arm_fir_decimate_init_q31( + arm_fir_decimate_instance_q31 * S, + uint16_t numTaps, + uint8_t M, + q31_t * pCoeffs, + q31_t * pState, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q15 FIR interpolator. + */ + typedef struct + { + uint8_t L; /**< upsample factor. */ + uint16_t phaseLength; /**< length of each polyphase filter component. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ + q15_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */ + } arm_fir_interpolate_instance_q15; + + /** + * @brief Instance structure for the Q31 FIR interpolator. + */ + typedef struct + { + uint8_t L; /**< upsample factor. */ + uint16_t phaseLength; /**< length of each polyphase filter component. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ + q31_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */ + } arm_fir_interpolate_instance_q31; + + /** + * @brief Instance structure for the floating-point FIR interpolator. + */ + typedef struct + { + uint8_t L; /**< upsample factor. */ + uint16_t phaseLength; /**< length of each polyphase filter component. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ + float32_t *pState; /**< points to the state variable array. The array is of length phaseLength + numTaps-1. */ + } arm_fir_interpolate_instance_f32; + + + /** + * @brief Processing function for the Q15 FIR interpolator. + * @param[in] S points to an instance of the Q15 FIR interpolator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_interpolate_q15( + const arm_fir_interpolate_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q15 FIR interpolator. + * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. + * @param[in] L upsample factor. + * @param[in] numTaps number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficient buffer. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * the filter length numTaps is not a multiple of the interpolation factor L. + */ + arm_status arm_fir_interpolate_init_q15( + arm_fir_interpolate_instance_q15 * S, + uint8_t L, + uint16_t numTaps, + q15_t * pCoeffs, + q15_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 FIR interpolator. + * @param[in] S points to an instance of the Q15 FIR interpolator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_interpolate_q31( + const arm_fir_interpolate_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 FIR interpolator. + * @param[in,out] S points to an instance of the Q31 FIR interpolator structure. + * @param[in] L upsample factor. + * @param[in] numTaps number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficient buffer. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * the filter length numTaps is not a multiple of the interpolation factor L. + */ + arm_status arm_fir_interpolate_init_q31( + arm_fir_interpolate_instance_q31 * S, + uint8_t L, + uint16_t numTaps, + q31_t * pCoeffs, + q31_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the floating-point FIR interpolator. + * @param[in] S points to an instance of the floating-point FIR interpolator structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_interpolate_f32( + const arm_fir_interpolate_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point FIR interpolator. + * @param[in,out] S points to an instance of the floating-point FIR interpolator structure. + * @param[in] L upsample factor. + * @param[in] numTaps number of filter coefficients in the filter. + * @param[in] pCoeffs points to the filter coefficient buffer. + * @param[in] pState points to the state buffer. + * @param[in] blockSize number of input samples to process per call. + * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if + * the filter length numTaps is not a multiple of the interpolation factor L. + */ + arm_status arm_fir_interpolate_init_f32( + arm_fir_interpolate_instance_f32 * S, + uint8_t L, + uint16_t numTaps, + float32_t * pCoeffs, + float32_t * pState, + uint32_t blockSize); + + + /** + * @brief Instance structure for the high precision Q31 Biquad cascade filter. + */ + typedef struct + { + uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ + q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ + uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */ + } arm_biquad_cas_df1_32x64_ins_q31; + + + /** + * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cas_df1_32x64_q31( + const arm_biquad_cas_df1_32x64_ins_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format + */ + void arm_biquad_cas_df1_32x64_init_q31( + arm_biquad_cas_df1_32x64_ins_q31 * S, + uint8_t numStages, + q31_t * pCoeffs, + q63_t * pState, + uint8_t postShift); + + + /** + * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. + */ + typedef struct + { + uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ + float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ + } arm_biquad_cascade_df2T_instance_f32; + + /** + * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. + */ + typedef struct + { + uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ + float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ + } arm_biquad_cascade_stereo_df2T_instance_f32; + + /** + * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. + */ + typedef struct + { + uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ + float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ + float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ + } arm_biquad_cascade_df2T_instance_f64; + + + /** + * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. + * @param[in] S points to an instance of the filter data structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df2T_f32( + const arm_biquad_cascade_df2T_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels + * @param[in] S points to an instance of the filter data structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_stereo_df2T_f32( + const arm_biquad_cascade_stereo_df2T_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. + * @param[in] S points to an instance of the filter data structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_biquad_cascade_df2T_f64( + const arm_biquad_cascade_df2T_instance_f64 * S, + float64_t * pSrc, + float64_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. + * @param[in,out] S points to an instance of the filter data structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + */ + void arm_biquad_cascade_df2T_init_f32( + arm_biquad_cascade_df2T_instance_f32 * S, + uint8_t numStages, + float32_t * pCoeffs, + float32_t * pState); + + + /** + * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. + * @param[in,out] S points to an instance of the filter data structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + */ + void arm_biquad_cascade_stereo_df2T_init_f32( + arm_biquad_cascade_stereo_df2T_instance_f32 * S, + uint8_t numStages, + float32_t * pCoeffs, + float32_t * pState); + + + /** + * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. + * @param[in,out] S points to an instance of the filter data structure. + * @param[in] numStages number of 2nd order stages in the filter. + * @param[in] pCoeffs points to the filter coefficients. + * @param[in] pState points to the state buffer. + */ + void arm_biquad_cascade_df2T_init_f64( + arm_biquad_cascade_df2T_instance_f64 * S, + uint8_t numStages, + float64_t * pCoeffs, + float64_t * pState); + + + /** + * @brief Instance structure for the Q15 FIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of filter stages. */ + q15_t *pState; /**< points to the state variable array. The array is of length numStages. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ + } arm_fir_lattice_instance_q15; + + /** + * @brief Instance structure for the Q31 FIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of filter stages. */ + q31_t *pState; /**< points to the state variable array. The array is of length numStages. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ + } arm_fir_lattice_instance_q31; + + /** + * @brief Instance structure for the floating-point FIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of filter stages. */ + float32_t *pState; /**< points to the state variable array. The array is of length numStages. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ + } arm_fir_lattice_instance_f32; + + + /** + * @brief Initialization function for the Q15 FIR lattice filter. + * @param[in] S points to an instance of the Q15 FIR lattice structure. + * @param[in] numStages number of filter stages. + * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. + * @param[in] pState points to the state buffer. The array is of length numStages. + */ + void arm_fir_lattice_init_q15( + arm_fir_lattice_instance_q15 * S, + uint16_t numStages, + q15_t * pCoeffs, + q15_t * pState); + + + /** + * @brief Processing function for the Q15 FIR lattice filter. + * @param[in] S points to an instance of the Q15 FIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_fir_lattice_q15( + const arm_fir_lattice_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 FIR lattice filter. + * @param[in] S points to an instance of the Q31 FIR lattice structure. + * @param[in] numStages number of filter stages. + * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. + * @param[in] pState points to the state buffer. The array is of length numStages. + */ + void arm_fir_lattice_init_q31( + arm_fir_lattice_instance_q31 * S, + uint16_t numStages, + q31_t * pCoeffs, + q31_t * pState); + + + /** + * @brief Processing function for the Q31 FIR lattice filter. + * @param[in] S points to an instance of the Q31 FIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_fir_lattice_q31( + const arm_fir_lattice_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + +/** + * @brief Initialization function for the floating-point FIR lattice filter. + * @param[in] S points to an instance of the floating-point FIR lattice structure. + * @param[in] numStages number of filter stages. + * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. + * @param[in] pState points to the state buffer. The array is of length numStages. + */ + void arm_fir_lattice_init_f32( + arm_fir_lattice_instance_f32 * S, + uint16_t numStages, + float32_t * pCoeffs, + float32_t * pState); + + + /** + * @brief Processing function for the floating-point FIR lattice filter. + * @param[in] S points to an instance of the floating-point FIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] blockSize number of samples to process. + */ + void arm_fir_lattice_f32( + const arm_fir_lattice_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q15 IIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of stages in the filter. */ + q15_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */ + q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ + q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */ + } arm_iir_lattice_instance_q15; + + /** + * @brief Instance structure for the Q31 IIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of stages in the filter. */ + q31_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */ + q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ + q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */ + } arm_iir_lattice_instance_q31; + + /** + * @brief Instance structure for the floating-point IIR lattice filter. + */ + typedef struct + { + uint16_t numStages; /**< number of stages in the filter. */ + float32_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */ + float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ + float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */ + } arm_iir_lattice_instance_f32; + + + /** + * @brief Processing function for the floating-point IIR lattice filter. + * @param[in] S points to an instance of the floating-point IIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_iir_lattice_f32( + const arm_iir_lattice_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point IIR lattice filter. + * @param[in] S points to an instance of the floating-point IIR lattice structure. + * @param[in] numStages number of stages in the filter. + * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. + * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1. + * @param[in] pState points to the state buffer. The array is of length numStages + blockSize-1. + * @param[in] blockSize number of samples to process. + */ + void arm_iir_lattice_init_f32( + arm_iir_lattice_instance_f32 * S, + uint16_t numStages, + float32_t * pkCoeffs, + float32_t * pvCoeffs, + float32_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 IIR lattice filter. + * @param[in] S points to an instance of the Q31 IIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_iir_lattice_q31( + const arm_iir_lattice_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 IIR lattice filter. + * @param[in] S points to an instance of the Q31 IIR lattice structure. + * @param[in] numStages number of stages in the filter. + * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. + * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1. + * @param[in] pState points to the state buffer. The array is of length numStages + blockSize. + * @param[in] blockSize number of samples to process. + */ + void arm_iir_lattice_init_q31( + arm_iir_lattice_instance_q31 * S, + uint16_t numStages, + q31_t * pkCoeffs, + q31_t * pvCoeffs, + q31_t * pState, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q15 IIR lattice filter. + * @param[in] S points to an instance of the Q15 IIR lattice structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data. + * @param[in] blockSize number of samples to process. + */ + void arm_iir_lattice_q15( + const arm_iir_lattice_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + +/** + * @brief Initialization function for the Q15 IIR lattice filter. + * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure. + * @param[in] numStages number of stages in the filter. + * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages. + * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages + 1. + * @param[in] pState points to state buffer. The array is of length numStages + blockSize. + * @param[in] blockSize number of samples to process per call. + */ + void arm_iir_lattice_init_q15( + arm_iir_lattice_instance_q15 * S, + uint16_t numStages, + q15_t * pkCoeffs, + q15_t * pvCoeffs, + q15_t * pState, + uint32_t blockSize); + + + /** + * @brief Instance structure for the floating-point LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + float32_t mu; /**< step size that controls filter coefficient updates. */ + } arm_lms_instance_f32; + + + /** + * @brief Processing function for floating-point LMS filter. + * @param[in] S points to an instance of the floating-point LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_f32( + const arm_lms_instance_f32 * S, + float32_t * pSrc, + float32_t * pRef, + float32_t * pOut, + float32_t * pErr, + uint32_t blockSize); + + + /** + * @brief Initialization function for floating-point LMS filter. + * @param[in] S points to an instance of the floating-point LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to the coefficient buffer. + * @param[in] pState points to state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_init_f32( + arm_lms_instance_f32 * S, + uint16_t numTaps, + float32_t * pCoeffs, + float32_t * pState, + float32_t mu, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q15 LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + q15_t mu; /**< step size that controls filter coefficient updates. */ + uint32_t postShift; /**< bit shift applied to coefficients. */ + } arm_lms_instance_q15; + + + /** + * @brief Initialization function for the Q15 LMS filter. + * @param[in] S points to an instance of the Q15 LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to the coefficient buffer. + * @param[in] pState points to the state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + * @param[in] postShift bit shift applied to coefficients. + */ + void arm_lms_init_q15( + arm_lms_instance_q15 * S, + uint16_t numTaps, + q15_t * pCoeffs, + q15_t * pState, + q15_t mu, + uint32_t blockSize, + uint32_t postShift); + + + /** + * @brief Processing function for Q15 LMS filter. + * @param[in] S points to an instance of the Q15 LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_q15( + const arm_lms_instance_q15 * S, + q15_t * pSrc, + q15_t * pRef, + q15_t * pOut, + q15_t * pErr, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q31 LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + q31_t mu; /**< step size that controls filter coefficient updates. */ + uint32_t postShift; /**< bit shift applied to coefficients. */ + } arm_lms_instance_q31; + + + /** + * @brief Processing function for Q31 LMS filter. + * @param[in] S points to an instance of the Q15 LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_q31( + const arm_lms_instance_q31 * S, + q31_t * pSrc, + q31_t * pRef, + q31_t * pOut, + q31_t * pErr, + uint32_t blockSize); + + + /** + * @brief Initialization function for Q31 LMS filter. + * @param[in] S points to an instance of the Q31 LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to coefficient buffer. + * @param[in] pState points to state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + * @param[in] postShift bit shift applied to coefficients. + */ + void arm_lms_init_q31( + arm_lms_instance_q31 * S, + uint16_t numTaps, + q31_t * pCoeffs, + q31_t * pState, + q31_t mu, + uint32_t blockSize, + uint32_t postShift); + + + /** + * @brief Instance structure for the floating-point normalized LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + float32_t mu; /**< step size that control filter coefficient updates. */ + float32_t energy; /**< saves previous frame energy. */ + float32_t x0; /**< saves previous input sample. */ + } arm_lms_norm_instance_f32; + + + /** + * @brief Processing function for floating-point normalized LMS filter. + * @param[in] S points to an instance of the floating-point normalized LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_norm_f32( + arm_lms_norm_instance_f32 * S, + float32_t * pSrc, + float32_t * pRef, + float32_t * pOut, + float32_t * pErr, + uint32_t blockSize); + + + /** + * @brief Initialization function for floating-point normalized LMS filter. + * @param[in] S points to an instance of the floating-point LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to coefficient buffer. + * @param[in] pState points to state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_norm_init_f32( + arm_lms_norm_instance_f32 * S, + uint16_t numTaps, + float32_t * pCoeffs, + float32_t * pState, + float32_t mu, + uint32_t blockSize); + + + /** + * @brief Instance structure for the Q31 normalized LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + q31_t mu; /**< step size that controls filter coefficient updates. */ + uint8_t postShift; /**< bit shift applied to coefficients. */ + q31_t *recipTable; /**< points to the reciprocal initial value table. */ + q31_t energy; /**< saves previous frame energy. */ + q31_t x0; /**< saves previous input sample. */ + } arm_lms_norm_instance_q31; + + + /** + * @brief Processing function for Q31 normalized LMS filter. + * @param[in] S points to an instance of the Q31 normalized LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_norm_q31( + arm_lms_norm_instance_q31 * S, + q31_t * pSrc, + q31_t * pRef, + q31_t * pOut, + q31_t * pErr, + uint32_t blockSize); + + + /** + * @brief Initialization function for Q31 normalized LMS filter. + * @param[in] S points to an instance of the Q31 normalized LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to coefficient buffer. + * @param[in] pState points to state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + * @param[in] postShift bit shift applied to coefficients. + */ + void arm_lms_norm_init_q31( + arm_lms_norm_instance_q31 * S, + uint16_t numTaps, + q31_t * pCoeffs, + q31_t * pState, + q31_t mu, + uint32_t blockSize, + uint8_t postShift); + + + /** + * @brief Instance structure for the Q15 normalized LMS filter. + */ + typedef struct + { + uint16_t numTaps; /**< Number of coefficients in the filter. */ + q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ + q15_t mu; /**< step size that controls filter coefficient updates. */ + uint8_t postShift; /**< bit shift applied to coefficients. */ + q15_t *recipTable; /**< Points to the reciprocal initial value table. */ + q15_t energy; /**< saves previous frame energy. */ + q15_t x0; /**< saves previous input sample. */ + } arm_lms_norm_instance_q15; + + + /** + * @brief Processing function for Q15 normalized LMS filter. + * @param[in] S points to an instance of the Q15 normalized LMS filter structure. + * @param[in] pSrc points to the block of input data. + * @param[in] pRef points to the block of reference data. + * @param[out] pOut points to the block of output data. + * @param[out] pErr points to the block of error data. + * @param[in] blockSize number of samples to process. + */ + void arm_lms_norm_q15( + arm_lms_norm_instance_q15 * S, + q15_t * pSrc, + q15_t * pRef, + q15_t * pOut, + q15_t * pErr, + uint32_t blockSize); + + + /** + * @brief Initialization function for Q15 normalized LMS filter. + * @param[in] S points to an instance of the Q15 normalized LMS filter structure. + * @param[in] numTaps number of filter coefficients. + * @param[in] pCoeffs points to coefficient buffer. + * @param[in] pState points to state buffer. + * @param[in] mu step size that controls filter coefficient updates. + * @param[in] blockSize number of samples to process. + * @param[in] postShift bit shift applied to coefficients. + */ + void arm_lms_norm_init_q15( + arm_lms_norm_instance_q15 * S, + uint16_t numTaps, + q15_t * pCoeffs, + q15_t * pState, + q15_t mu, + uint32_t blockSize, + uint8_t postShift); + + + /** + * @brief Correlation of floating-point sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + void arm_correlate_f32( + float32_t * pSrcA, + uint32_t srcALen, + float32_t * pSrcB, + uint32_t srcBLen, + float32_t * pDst); + + + /** + * @brief Correlation of Q15 sequences + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + */ + void arm_correlate_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + q15_t * pScratch); + + + /** + * @brief Correlation of Q15 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + + void arm_correlate_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst); + + + /** + * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + + void arm_correlate_fast_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst); + + + /** + * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + */ + void arm_correlate_fast_opt_q15( + q15_t * pSrcA, + uint32_t srcALen, + q15_t * pSrcB, + uint32_t srcBLen, + q15_t * pDst, + q15_t * pScratch); + + + /** + * @brief Correlation of Q31 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + void arm_correlate_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst); + + + /** + * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + void arm_correlate_fast_q31( + q31_t * pSrcA, + uint32_t srcALen, + q31_t * pSrcB, + uint32_t srcBLen, + q31_t * pDst); + + + /** + * @brief Correlation of Q7 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. + * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). + */ + void arm_correlate_opt_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst, + q15_t * pScratch1, + q15_t * pScratch2); + + + /** + * @brief Correlation of Q7 sequences. + * @param[in] pSrcA points to the first input sequence. + * @param[in] srcALen length of the first input sequence. + * @param[in] pSrcB points to the second input sequence. + * @param[in] srcBLen length of the second input sequence. + * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. + */ + void arm_correlate_q7( + q7_t * pSrcA, + uint32_t srcALen, + q7_t * pSrcB, + uint32_t srcBLen, + q7_t * pDst); + + + /** + * @brief Instance structure for the floating-point sparse FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ + float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */ + float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ + int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ + } arm_fir_sparse_instance_f32; + + /** + * @brief Instance structure for the Q31 sparse FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ + q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */ + q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ + int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ + } arm_fir_sparse_instance_q31; + + /** + * @brief Instance structure for the Q15 sparse FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ + q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */ + q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ + int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ + } arm_fir_sparse_instance_q15; + + /** + * @brief Instance structure for the Q7 sparse FIR filter. + */ + typedef struct + { + uint16_t numTaps; /**< number of coefficients in the filter. */ + uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ + q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */ + q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ + uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ + int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ + } arm_fir_sparse_instance_q7; + + + /** + * @brief Processing function for the floating-point sparse FIR filter. + * @param[in] S points to an instance of the floating-point sparse FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] pScratchIn points to a temporary buffer of size blockSize. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_sparse_f32( + arm_fir_sparse_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + float32_t * pScratchIn, + uint32_t blockSize); + + + /** + * @brief Initialization function for the floating-point sparse FIR filter. + * @param[in,out] S points to an instance of the floating-point sparse FIR structure. + * @param[in] numTaps number of nonzero coefficients in the filter. + * @param[in] pCoeffs points to the array of filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] pTapDelay points to the array of offset times. + * @param[in] maxDelay maximum offset time supported. + * @param[in] blockSize number of samples that will be processed per block. + */ + void arm_fir_sparse_init_f32( + arm_fir_sparse_instance_f32 * S, + uint16_t numTaps, + float32_t * pCoeffs, + float32_t * pState, + int32_t * pTapDelay, + uint16_t maxDelay, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q31 sparse FIR filter. + * @param[in] S points to an instance of the Q31 sparse FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] pScratchIn points to a temporary buffer of size blockSize. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_sparse_q31( + arm_fir_sparse_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + q31_t * pScratchIn, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q31 sparse FIR filter. + * @param[in,out] S points to an instance of the Q31 sparse FIR structure. + * @param[in] numTaps number of nonzero coefficients in the filter. + * @param[in] pCoeffs points to the array of filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] pTapDelay points to the array of offset times. + * @param[in] maxDelay maximum offset time supported. + * @param[in] blockSize number of samples that will be processed per block. + */ + void arm_fir_sparse_init_q31( + arm_fir_sparse_instance_q31 * S, + uint16_t numTaps, + q31_t * pCoeffs, + q31_t * pState, + int32_t * pTapDelay, + uint16_t maxDelay, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q15 sparse FIR filter. + * @param[in] S points to an instance of the Q15 sparse FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] pScratchIn points to a temporary buffer of size blockSize. + * @param[in] pScratchOut points to a temporary buffer of size blockSize. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_sparse_q15( + arm_fir_sparse_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + q15_t * pScratchIn, + q31_t * pScratchOut, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q15 sparse FIR filter. + * @param[in,out] S points to an instance of the Q15 sparse FIR structure. + * @param[in] numTaps number of nonzero coefficients in the filter. + * @param[in] pCoeffs points to the array of filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] pTapDelay points to the array of offset times. + * @param[in] maxDelay maximum offset time supported. + * @param[in] blockSize number of samples that will be processed per block. + */ + void arm_fir_sparse_init_q15( + arm_fir_sparse_instance_q15 * S, + uint16_t numTaps, + q15_t * pCoeffs, + q15_t * pState, + int32_t * pTapDelay, + uint16_t maxDelay, + uint32_t blockSize); + + + /** + * @brief Processing function for the Q7 sparse FIR filter. + * @param[in] S points to an instance of the Q7 sparse FIR structure. + * @param[in] pSrc points to the block of input data. + * @param[out] pDst points to the block of output data + * @param[in] pScratchIn points to a temporary buffer of size blockSize. + * @param[in] pScratchOut points to a temporary buffer of size blockSize. + * @param[in] blockSize number of input samples to process per call. + */ + void arm_fir_sparse_q7( + arm_fir_sparse_instance_q7 * S, + q7_t * pSrc, + q7_t * pDst, + q7_t * pScratchIn, + q31_t * pScratchOut, + uint32_t blockSize); + + + /** + * @brief Initialization function for the Q7 sparse FIR filter. + * @param[in,out] S points to an instance of the Q7 sparse FIR structure. + * @param[in] numTaps number of nonzero coefficients in the filter. + * @param[in] pCoeffs points to the array of filter coefficients. + * @param[in] pState points to the state buffer. + * @param[in] pTapDelay points to the array of offset times. + * @param[in] maxDelay maximum offset time supported. + * @param[in] blockSize number of samples that will be processed per block. + */ + void arm_fir_sparse_init_q7( + arm_fir_sparse_instance_q7 * S, + uint16_t numTaps, + q7_t * pCoeffs, + q7_t * pState, + int32_t * pTapDelay, + uint16_t maxDelay, + uint32_t blockSize); + + + /** + * @brief Floating-point sin_cos function. + * @param[in] theta input value in degrees + * @param[out] pSinVal points to the processed sine output. + * @param[out] pCosVal points to the processed cos output. + */ + void arm_sin_cos_f32( + float32_t theta, + float32_t * pSinVal, + float32_t * pCosVal); + + + /** + * @brief Q31 sin_cos function. + * @param[in] theta scaled input value in degrees + * @param[out] pSinVal points to the processed sine output. + * @param[out] pCosVal points to the processed cosine output. + */ + void arm_sin_cos_q31( + q31_t theta, + q31_t * pSinVal, + q31_t * pCosVal); + + + /** + * @brief Floating-point complex conjugate. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_conj_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t numSamples); + + /** + * @brief Q31 complex conjugate. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_conj_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q15 complex conjugate. + * @param[in] pSrc points to the input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_conj_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t numSamples); + + + /** + * @brief Floating-point complex magnitude squared + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_squared_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q31 complex magnitude squared + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_squared_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q15 complex magnitude squared + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_squared_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t numSamples); + + + /** + * @ingroup groupController + */ + + /** + * @defgroup PID PID Motor Control + * + * A Proportional Integral Derivative (PID) controller is a generic feedback control + * loop mechanism widely used in industrial control systems. + * A PID controller is the most commonly used type of feedback controller. + * + * This set of functions implements (PID) controllers + * for Q15, Q31, and floating-point data types. The functions operate on a single sample + * of data and each call to the function returns a single processed value. + * S points to an instance of the PID control data structure. in + * is the input sample value. The functions return the output value. + * + * \par Algorithm: + *
+   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+   *    A0 = Kp + Ki + Kd
+   *    A1 = (-Kp ) - (2 * Kd )
+   *    A2 = Kd  
+ * + * \par + * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant + * + * \par + * \image html PID.gif "Proportional Integral Derivative Controller" + * + * \par + * The PID controller calculates an "error" value as the difference between + * the measured output and the reference input. + * The controller attempts to minimize the error by adjusting the process control inputs. + * The proportional value determines the reaction to the current error, + * the integral value determines the reaction based on the sum of recent errors, + * and the derivative value determines the reaction based on the rate at which the error has been changing. + * + * \par Instance Structure + * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. + * A separate instance structure must be defined for each PID Controller. + * There are separate instance structure declarations for each of the 3 supported data types. + * + * \par Reset Functions + * There is also an associated reset function for each data type which clears the state array. + * + * \par Initialization Functions + * There is also an associated initialization function for each data type. + * The initialization function performs the following operations: + * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. + * - Zeros out the values in the state buffer. + * + * \par + * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. + * + * \par Fixed-Point Behavior + * Care must be taken when using the fixed-point versions of the PID Controller functions. + * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. + * Refer to the function specific documentation below for usage guidelines. + */ + + /** + * @addtogroup PID + * @{ + */ + + /** + * @brief Process function for the floating-point PID Control. + * @param[in,out] S is an instance of the floating-point PID Control structure + * @param[in] in input sample to process + * @return out processed output sample. + */ + static __INLINE float32_t arm_pid_f32( + arm_pid_instance_f32 * S, + float32_t in) + { + float32_t out; + + /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ + out = (S->A0 * in) + + (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); + + /* Update state */ + S->state[1] = S->state[0]; + S->state[0] = in; + S->state[2] = out; + + /* return to application */ + return (out); + + } + + /** + * @brief Process function for the Q31 PID Control. + * @param[in,out] S points to an instance of the Q31 PID Control structure + * @param[in] in input sample to process + * @return out processed output sample. + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using an internal 64-bit accumulator. + * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. + * Thus, if the accumulator result overflows it wraps around rather than clip. + * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. + * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. + */ + static __INLINE q31_t arm_pid_q31( + arm_pid_instance_q31 * S, + q31_t in) + { + q63_t acc; + q31_t out; + + /* acc = A0 * x[n] */ + acc = (q63_t) S->A0 * in; + + /* acc += A1 * x[n-1] */ + acc += (q63_t) S->A1 * S->state[0]; + + /* acc += A2 * x[n-2] */ + acc += (q63_t) S->A2 * S->state[1]; + + /* convert output to 1.31 format to add y[n-1] */ + out = (q31_t) (acc >> 31u); + + /* out += y[n-1] */ + out += S->state[2]; + + /* Update state */ + S->state[1] = S->state[0]; + S->state[0] = in; + S->state[2] = out; + + /* return to application */ + return (out); + } + + + /** + * @brief Process function for the Q15 PID Control. + * @param[in,out] S points to an instance of the Q15 PID Control structure + * @param[in] in input sample to process + * @return out processed output sample. + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using a 64-bit internal accumulator. + * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. + * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. + * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. + * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. + * Lastly, the accumulator is saturated to yield a result in 1.15 format. + */ + static __INLINE q15_t arm_pid_q15( + arm_pid_instance_q15 * S, + q15_t in) + { + q63_t acc; + q15_t out; + +#ifndef ARM_MATH_CM0_FAMILY + __SIMD32_TYPE *vstate; + + /* Implementation of PID controller */ + + /* acc = A0 * x[n] */ + acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); + + /* acc += A1 * x[n-1] + A2 * x[n-2] */ + vstate = __SIMD32_CONST(S->state); + acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc); +#else + /* acc = A0 * x[n] */ + acc = ((q31_t) S->A0) * in; + + /* acc += A1 * x[n-1] + A2 * x[n-2] */ + acc += (q31_t) S->A1 * S->state[0]; + acc += (q31_t) S->A2 * S->state[1]; +#endif + + /* acc += y[n-1] */ + acc += (q31_t) S->state[2] << 15; + + /* saturate the output */ + out = (q15_t) (__SSAT((acc >> 15), 16)); + + /* Update state */ + S->state[1] = S->state[0]; + S->state[0] = in; + S->state[2] = out; + + /* return to application */ + return (out); + } + + /** + * @} end of PID group + */ + + + /** + * @brief Floating-point matrix inverse. + * @param[in] src points to the instance of the input floating-point matrix structure. + * @param[out] dst points to the instance of the output floating-point matrix structure. + * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. + * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. + */ + arm_status arm_mat_inverse_f32( + const arm_matrix_instance_f32 * src, + arm_matrix_instance_f32 * dst); + + + /** + * @brief Floating-point matrix inverse. + * @param[in] src points to the instance of the input floating-point matrix structure. + * @param[out] dst points to the instance of the output floating-point matrix structure. + * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. + * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. + */ + arm_status arm_mat_inverse_f64( + const arm_matrix_instance_f64 * src, + arm_matrix_instance_f64 * dst); + + + + /** + * @ingroup groupController + */ + + /** + * @defgroup clarke Vector Clarke Transform + * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. + * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents + * in the two-phase orthogonal stator axis Ialpha and Ibeta. + * When Ialpha is superposed with Ia as shown in the figure below + * \image html clarke.gif Stator current space vector and its components in (a,b). + * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta + * can be calculated using only Ia and Ib. + * + * The function operates on a single sample of data and each call to the function returns the processed output. + * The library provides separate functions for Q31 and floating-point data types. + * \par Algorithm + * \image html clarkeFormula.gif + * where Ia and Ib are the instantaneous stator phases and + * pIalpha and pIbeta are the two coordinates of time invariant vector. + * \par Fixed-Point Behavior + * Care must be taken when using the Q31 version of the Clarke transform. + * In particular, the overflow and saturation behavior of the accumulator used must be considered. + * Refer to the function specific documentation below for usage guidelines. + */ + + /** + * @addtogroup clarke + * @{ + */ + + /** + * + * @brief Floating-point Clarke transform + * @param[in] Ia input three-phase coordinate a + * @param[in] Ib input three-phase coordinate b + * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha + * @param[out] pIbeta points to output two-phase orthogonal vector axis beta + */ + static __INLINE void arm_clarke_f32( + float32_t Ia, + float32_t Ib, + float32_t * pIalpha, + float32_t * pIbeta) + { + /* Calculate pIalpha using the equation, pIalpha = Ia */ + *pIalpha = Ia; + + /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ + *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib); + } + + + /** + * @brief Clarke transform for Q31 version + * @param[in] Ia input three-phase coordinate a + * @param[in] Ib input three-phase coordinate b + * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha + * @param[out] pIbeta points to output two-phase orthogonal vector axis beta + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using an internal 32-bit accumulator. + * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. + * There is saturation on the addition, hence there is no risk of overflow. + */ + static __INLINE void arm_clarke_q31( + q31_t Ia, + q31_t Ib, + q31_t * pIalpha, + q31_t * pIbeta) + { + q31_t product1, product2; /* Temporary variables used to store intermediate results */ + + /* Calculating pIalpha from Ia by equation pIalpha = Ia */ + *pIalpha = Ia; + + /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ + product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); + + /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ + product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); + + /* pIbeta is calculated by adding the intermediate products */ + *pIbeta = __QADD(product1, product2); + } + + /** + * @} end of clarke group + */ + + /** + * @brief Converts the elements of the Q7 vector to Q31 vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_q7_to_q31( + q7_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + + /** + * @ingroup groupController + */ + + /** + * @defgroup inv_clarke Vector Inverse Clarke Transform + * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases. + * + * The function operates on a single sample of data and each call to the function returns the processed output. + * The library provides separate functions for Q31 and floating-point data types. + * \par Algorithm + * \image html clarkeInvFormula.gif + * where pIa and pIb are the instantaneous stator phases and + * Ialpha and Ibeta are the two coordinates of time invariant vector. + * \par Fixed-Point Behavior + * Care must be taken when using the Q31 version of the Clarke transform. + * In particular, the overflow and saturation behavior of the accumulator used must be considered. + * Refer to the function specific documentation below for usage guidelines. + */ + + /** + * @addtogroup inv_clarke + * @{ + */ + + /** + * @brief Floating-point Inverse Clarke transform + * @param[in] Ialpha input two-phase orthogonal vector axis alpha + * @param[in] Ibeta input two-phase orthogonal vector axis beta + * @param[out] pIa points to output three-phase coordinate a + * @param[out] pIb points to output three-phase coordinate b + */ + static __INLINE void arm_inv_clarke_f32( + float32_t Ialpha, + float32_t Ibeta, + float32_t * pIa, + float32_t * pIb) + { + /* Calculating pIa from Ialpha by equation pIa = Ialpha */ + *pIa = Ialpha; + + /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */ + *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; + } + + + /** + * @brief Inverse Clarke transform for Q31 version + * @param[in] Ialpha input two-phase orthogonal vector axis alpha + * @param[in] Ibeta input two-phase orthogonal vector axis beta + * @param[out] pIa points to output three-phase coordinate a + * @param[out] pIb points to output three-phase coordinate b + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using an internal 32-bit accumulator. + * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. + * There is saturation on the subtraction, hence there is no risk of overflow. + */ + static __INLINE void arm_inv_clarke_q31( + q31_t Ialpha, + q31_t Ibeta, + q31_t * pIa, + q31_t * pIb) + { + q31_t product1, product2; /* Temporary variables used to store intermediate results */ + + /* Calculating pIa from Ialpha by equation pIa = Ialpha */ + *pIa = Ialpha; + + /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ + product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); + + /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ + product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); + + /* pIb is calculated by subtracting the products */ + *pIb = __QSUB(product2, product1); + } + + /** + * @} end of inv_clarke group + */ + + /** + * @brief Converts the elements of the Q7 vector to Q15 vector. + * @param[in] pSrc input pointer + * @param[out] pDst output pointer + * @param[in] blockSize number of samples to process + */ + void arm_q7_to_q15( + q7_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + + /** + * @ingroup groupController + */ + + /** + * @defgroup park Vector Park Transform + * + * Forward Park transform converts the input two-coordinate vector to flux and torque components. + * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents + * from the stationary to the moving reference frame and control the spatial relationship between + * the stator vector current and rotor flux vector. + * If we consider the d axis aligned with the rotor flux, the diagram below shows the + * current vector and the relationship from the two reference frames: + * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame" + * + * The function operates on a single sample of data and each call to the function returns the processed output. + * The library provides separate functions for Q31 and floating-point data types. + * \par Algorithm + * \image html parkFormula.gif + * where Ialpha and Ibeta are the stator vector components, + * pId and pIq are rotor vector components and cosVal and sinVal are the + * cosine and sine values of theta (rotor flux position). + * \par Fixed-Point Behavior + * Care must be taken when using the Q31 version of the Park transform. + * In particular, the overflow and saturation behavior of the accumulator used must be considered. + * Refer to the function specific documentation below for usage guidelines. + */ + + /** + * @addtogroup park + * @{ + */ + + /** + * @brief Floating-point Park transform + * @param[in] Ialpha input two-phase vector coordinate alpha + * @param[in] Ibeta input two-phase vector coordinate beta + * @param[out] pId points to output rotor reference frame d + * @param[out] pIq points to output rotor reference frame q + * @param[in] sinVal sine value of rotation angle theta + * @param[in] cosVal cosine value of rotation angle theta + * + * The function implements the forward Park transform. + * + */ + static __INLINE void arm_park_f32( + float32_t Ialpha, + float32_t Ibeta, + float32_t * pId, + float32_t * pIq, + float32_t sinVal, + float32_t cosVal) + { + /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ + *pId = Ialpha * cosVal + Ibeta * sinVal; + + /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ + *pIq = -Ialpha * sinVal + Ibeta * cosVal; + } + + + /** + * @brief Park transform for Q31 version + * @param[in] Ialpha input two-phase vector coordinate alpha + * @param[in] Ibeta input two-phase vector coordinate beta + * @param[out] pId points to output rotor reference frame d + * @param[out] pIq points to output rotor reference frame q + * @param[in] sinVal sine value of rotation angle theta + * @param[in] cosVal cosine value of rotation angle theta + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using an internal 32-bit accumulator. + * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. + * There is saturation on the addition and subtraction, hence there is no risk of overflow. + */ + static __INLINE void arm_park_q31( + q31_t Ialpha, + q31_t Ibeta, + q31_t * pId, + q31_t * pIq, + q31_t sinVal, + q31_t cosVal) + { + q31_t product1, product2; /* Temporary variables used to store intermediate results */ + q31_t product3, product4; /* Temporary variables used to store intermediate results */ + + /* Intermediate product is calculated by (Ialpha * cosVal) */ + product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); + + /* Intermediate product is calculated by (Ibeta * sinVal) */ + product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); + + + /* Intermediate product is calculated by (Ialpha * sinVal) */ + product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); + + /* Intermediate product is calculated by (Ibeta * cosVal) */ + product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); + + /* Calculate pId by adding the two intermediate products 1 and 2 */ + *pId = __QADD(product1, product2); + + /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ + *pIq = __QSUB(product4, product3); + } + + /** + * @} end of park group + */ + + /** + * @brief Converts the elements of the Q7 vector to floating-point vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q7_to_float( + q7_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @ingroup groupController + */ + + /** + * @defgroup inv_park Vector Inverse Park transform + * Inverse Park transform converts the input flux and torque components to two-coordinate vector. + * + * The function operates on a single sample of data and each call to the function returns the processed output. + * The library provides separate functions for Q31 and floating-point data types. + * \par Algorithm + * \image html parkInvFormula.gif + * where pIalpha and pIbeta are the stator vector components, + * Id and Iq are rotor vector components and cosVal and sinVal are the + * cosine and sine values of theta (rotor flux position). + * \par Fixed-Point Behavior + * Care must be taken when using the Q31 version of the Park transform. + * In particular, the overflow and saturation behavior of the accumulator used must be considered. + * Refer to the function specific documentation below for usage guidelines. + */ + + /** + * @addtogroup inv_park + * @{ + */ + + /** + * @brief Floating-point Inverse Park transform + * @param[in] Id input coordinate of rotor reference frame d + * @param[in] Iq input coordinate of rotor reference frame q + * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha + * @param[out] pIbeta points to output two-phase orthogonal vector axis beta + * @param[in] sinVal sine value of rotation angle theta + * @param[in] cosVal cosine value of rotation angle theta + */ + static __INLINE void arm_inv_park_f32( + float32_t Id, + float32_t Iq, + float32_t * pIalpha, + float32_t * pIbeta, + float32_t sinVal, + float32_t cosVal) + { + /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */ + *pIalpha = Id * cosVal - Iq * sinVal; + + /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */ + *pIbeta = Id * sinVal + Iq * cosVal; + } + + + /** + * @brief Inverse Park transform for Q31 version + * @param[in] Id input coordinate of rotor reference frame d + * @param[in] Iq input coordinate of rotor reference frame q + * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha + * @param[out] pIbeta points to output two-phase orthogonal vector axis beta + * @param[in] sinVal sine value of rotation angle theta + * @param[in] cosVal cosine value of rotation angle theta + * + * Scaling and Overflow Behavior: + * \par + * The function is implemented using an internal 32-bit accumulator. + * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. + * There is saturation on the addition, hence there is no risk of overflow. + */ + static __INLINE void arm_inv_park_q31( + q31_t Id, + q31_t Iq, + q31_t * pIalpha, + q31_t * pIbeta, + q31_t sinVal, + q31_t cosVal) + { + q31_t product1, product2; /* Temporary variables used to store intermediate results */ + q31_t product3, product4; /* Temporary variables used to store intermediate results */ + + /* Intermediate product is calculated by (Id * cosVal) */ + product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31); + + /* Intermediate product is calculated by (Iq * sinVal) */ + product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); + + + /* Intermediate product is calculated by (Id * sinVal) */ + product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); + + /* Intermediate product is calculated by (Iq * cosVal) */ + product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); + + /* Calculate pIalpha by using the two intermediate products 1 and 2 */ + *pIalpha = __QSUB(product1, product2); + + /* Calculate pIbeta by using the two intermediate products 3 and 4 */ + *pIbeta = __QADD(product4, product3); + } + + /** + * @} end of Inverse park group + */ + + + /** + * @brief Converts the elements of the Q31 vector to floating-point vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q31_to_float( + q31_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + /** + * @ingroup groupInterpolation + */ + + /** + * @defgroup LinearInterpolate Linear Interpolation + * + * Linear interpolation is a method of curve fitting using linear polynomials. + * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line + * + * \par + * \image html LinearInterp.gif "Linear interpolation" + * + * \par + * A Linear Interpolate function calculates an output value(y), for the input(x) + * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values) + * + * \par Algorithm: + *
+   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+   *       where x0, x1 are nearest values of input x
+   *             y0, y1 are nearest values to output y
+   * 
+ * + * \par + * This set of functions implements Linear interpolation process + * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single + * sample of data and each call to the function returns a single processed value. + * S points to an instance of the Linear Interpolate function data structure. + * x is the input sample value. The functions returns the output value. + * + * \par + * if x is outside of the table boundary, Linear interpolation returns first value of the table + * if x is below input range and returns last value of table if x is above range. + */ + + /** + * @addtogroup LinearInterpolate + * @{ + */ + + /** + * @brief Process function for the floating-point Linear Interpolation Function. + * @param[in,out] S is an instance of the floating-point Linear Interpolation structure + * @param[in] x input sample to process + * @return y processed output sample. + * + */ + static __INLINE float32_t arm_linear_interp_f32( + arm_linear_interp_instance_f32 * S, + float32_t x) + { + float32_t y; + float32_t x0, x1; /* Nearest input values */ + float32_t y0, y1; /* Nearest output values */ + float32_t xSpacing = S->xSpacing; /* spacing between input values */ + int32_t i; /* Index variable */ + float32_t *pYData = S->pYData; /* pointer to output table */ + + /* Calculation of index */ + i = (int32_t) ((x - S->x1) / xSpacing); + + if (i < 0) + { + /* Iniatilize output for below specified range as least output value of table */ + y = pYData[0]; + } + else if ((uint32_t)i >= S->nValues) + { + /* Iniatilize output for above specified range as last output value of table */ + y = pYData[S->nValues - 1]; + } + else + { + /* Calculation of nearest input values */ + x0 = S->x1 + i * xSpacing; + x1 = S->x1 + (i + 1) * xSpacing; + + /* Read of nearest output values */ + y0 = pYData[i]; + y1 = pYData[i + 1]; + + /* Calculation of output */ + y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); + + } + + /* returns output value */ + return (y); + } + + + /** + * + * @brief Process function for the Q31 Linear Interpolation Function. + * @param[in] pYData pointer to Q31 Linear Interpolation table + * @param[in] x input sample to process + * @param[in] nValues number of table values + * @return y processed output sample. + * + * \par + * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. + * This function can support maximum of table size 2^12. + * + */ + static __INLINE q31_t arm_linear_interp_q31( + q31_t * pYData, + q31_t x, + uint32_t nValues) + { + q31_t y; /* output */ + q31_t y0, y1; /* Nearest output values */ + q31_t fract; /* fractional part */ + int32_t index; /* Index to read nearest output values */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + index = ((x & (q31_t)0xFFF00000) >> 20); + + if (index >= (int32_t)(nValues - 1)) + { + return (pYData[nValues - 1]); + } + else if (index < 0) + { + return (pYData[0]); + } + else + { + /* 20 bits for the fractional part */ + /* shift left by 11 to keep fract in 1.31 format */ + fract = (x & 0x000FFFFF) << 11; + + /* Read two nearest output values from the index in 1.31(q31) format */ + y0 = pYData[index]; + y1 = pYData[index + 1]; + + /* Calculation of y0 * (1-fract) and y is in 2.30 format */ + y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); + + /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ + y += ((q31_t) (((q63_t) y1 * fract) >> 32)); + + /* Convert y to 1.31 format */ + return (y << 1u); + } + } + + + /** + * + * @brief Process function for the Q15 Linear Interpolation Function. + * @param[in] pYData pointer to Q15 Linear Interpolation table + * @param[in] x input sample to process + * @param[in] nValues number of table values + * @return y processed output sample. + * + * \par + * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. + * This function can support maximum of table size 2^12. + * + */ + static __INLINE q15_t arm_linear_interp_q15( + q15_t * pYData, + q31_t x, + uint32_t nValues) + { + q63_t y; /* output */ + q15_t y0, y1; /* Nearest output values */ + q31_t fract; /* fractional part */ + int32_t index; /* Index to read nearest output values */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + index = ((x & (int32_t)0xFFF00000) >> 20); + + if (index >= (int32_t)(nValues - 1)) + { + return (pYData[nValues - 1]); + } + else if (index < 0) + { + return (pYData[0]); + } + else + { + /* 20 bits for the fractional part */ + /* fract is in 12.20 format */ + fract = (x & 0x000FFFFF); + + /* Read two nearest output values from the index */ + y0 = pYData[index]; + y1 = pYData[index + 1]; + + /* Calculation of y0 * (1-fract) and y is in 13.35 format */ + y = ((q63_t) y0 * (0xFFFFF - fract)); + + /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ + y += ((q63_t) y1 * (fract)); + + /* convert y to 1.15 format */ + return (q15_t) (y >> 20); + } + } + + + /** + * + * @brief Process function for the Q7 Linear Interpolation Function. + * @param[in] pYData pointer to Q7 Linear Interpolation table + * @param[in] x input sample to process + * @param[in] nValues number of table values + * @return y processed output sample. + * + * \par + * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. + * This function can support maximum of table size 2^12. + */ + static __INLINE q7_t arm_linear_interp_q7( + q7_t * pYData, + q31_t x, + uint32_t nValues) + { + q31_t y; /* output */ + q7_t y0, y1; /* Nearest output values */ + q31_t fract; /* fractional part */ + uint32_t index; /* Index to read nearest output values */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + if (x < 0) + { + return (pYData[0]); + } + index = (x >> 20) & 0xfff; + + if (index >= (nValues - 1)) + { + return (pYData[nValues - 1]); + } + else + { + /* 20 bits for the fractional part */ + /* fract is in 12.20 format */ + fract = (x & 0x000FFFFF); + + /* Read two nearest output values from the index and are in 1.7(q7) format */ + y0 = pYData[index]; + y1 = pYData[index + 1]; + + /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ + y = ((y0 * (0xFFFFF - fract))); + + /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ + y += (y1 * fract); + + /* convert y to 1.7(q7) format */ + return (q7_t) (y >> 20); + } + } + + /** + * @} end of LinearInterpolate group + */ + + /** + * @brief Fast approximation to the trigonometric sine function for floating-point data. + * @param[in] x input value in radians. + * @return sin(x). + */ + float32_t arm_sin_f32( + float32_t x); + + + /** + * @brief Fast approximation to the trigonometric sine function for Q31 data. + * @param[in] x Scaled input value in radians. + * @return sin(x). + */ + q31_t arm_sin_q31( + q31_t x); + + + /** + * @brief Fast approximation to the trigonometric sine function for Q15 data. + * @param[in] x Scaled input value in radians. + * @return sin(x). + */ + q15_t arm_sin_q15( + q15_t x); + + + /** + * @brief Fast approximation to the trigonometric cosine function for floating-point data. + * @param[in] x input value in radians. + * @return cos(x). + */ + float32_t arm_cos_f32( + float32_t x); + + + /** + * @brief Fast approximation to the trigonometric cosine function for Q31 data. + * @param[in] x Scaled input value in radians. + * @return cos(x). + */ + q31_t arm_cos_q31( + q31_t x); + + + /** + * @brief Fast approximation to the trigonometric cosine function for Q15 data. + * @param[in] x Scaled input value in radians. + * @return cos(x). + */ + q15_t arm_cos_q15( + q15_t x); + + + /** + * @ingroup groupFastMath + */ + + + /** + * @defgroup SQRT Square Root + * + * Computes the square root of a number. + * There are separate functions for Q15, Q31, and floating-point data types. + * The square root function is computed using the Newton-Raphson algorithm. + * This is an iterative algorithm of the form: + *
+   *      x1 = x0 - f(x0)/f'(x0)
+   * 
+ * where x1 is the current estimate, + * x0 is the previous estimate, and + * f'(x0) is the derivative of f() evaluated at x0. + * For the square root function, the algorithm reduces to: + *
+   *     x0 = in/2                         [initial guess]
+   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+   * 
+ */ + + + /** + * @addtogroup SQRT + * @{ + */ + + /** + * @brief Floating-point square root function. + * @param[in] in input value. + * @param[out] pOut square root of input value. + * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if + * in is negative value and returns zero output for negative values. + */ + static __INLINE arm_status arm_sqrt_f32( + float32_t in, + float32_t * pOut) + { + if (in >= 0.0f) + { + +#if (__FPU_USED == 1) && defined ( __CC_ARM ) + *pOut = __sqrtf(in); +#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + *pOut = __builtin_sqrtf(in); +#elif (__FPU_USED == 1) && defined(__GNUC__) + *pOut = __builtin_sqrtf(in); +#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000) + __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); +#else + *pOut = sqrtf(in); +#endif + + return (ARM_MATH_SUCCESS); + } + else + { + *pOut = 0.0f; + return (ARM_MATH_ARGUMENT_ERROR); + } + } + + + /** + * @brief Q31 square root function. + * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. + * @param[out] pOut square root of input value. + * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if + * in is negative value and returns zero output for negative values. + */ + arm_status arm_sqrt_q31( + q31_t in, + q31_t * pOut); + + + /** + * @brief Q15 square root function. + * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. + * @param[out] pOut square root of input value. + * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if + * in is negative value and returns zero output for negative values. + */ + arm_status arm_sqrt_q15( + q15_t in, + q15_t * pOut); + + /** + * @} end of SQRT group + */ + + + /** + * @brief floating-point Circular write function. + */ + static __INLINE void arm_circularWrite_f32( + int32_t * circBuffer, + int32_t L, + uint16_t * writeOffset, + int32_t bufferInc, + const int32_t * src, + int32_t srcInc, + uint32_t blockSize) + { + uint32_t i = 0u; + int32_t wOffset; + + /* Copy the value of Index pointer that points + * to the current location where the input samples to be copied */ + wOffset = *writeOffset; + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the input sample to the circular buffer */ + circBuffer[wOffset] = *src; + + /* Update the input pointer */ + src += srcInc; + + /* Circularly update wOffset. Watch out for positive and negative value */ + wOffset += bufferInc; + if (wOffset >= L) + wOffset -= L; + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *writeOffset = (uint16_t)wOffset; + } + + + + /** + * @brief floating-point Circular Read function. + */ + static __INLINE void arm_circularRead_f32( + int32_t * circBuffer, + int32_t L, + int32_t * readOffset, + int32_t bufferInc, + int32_t * dst, + int32_t * dst_base, + int32_t dst_length, + int32_t dstInc, + uint32_t blockSize) + { + uint32_t i = 0u; + int32_t rOffset, dst_end; + + /* Copy the value of Index pointer that points + * to the current location from where the input samples to be read */ + rOffset = *readOffset; + dst_end = (int32_t) (dst_base + dst_length); + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the sample from the circular buffer to the destination buffer */ + *dst = circBuffer[rOffset]; + + /* Update the input pointer */ + dst += dstInc; + + if (dst == (int32_t *) dst_end) + { + dst = dst_base; + } + + /* Circularly update rOffset. Watch out for positive and negative value */ + rOffset += bufferInc; + + if (rOffset >= L) + { + rOffset -= L; + } + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *readOffset = rOffset; + } + + + /** + * @brief Q15 Circular write function. + */ + static __INLINE void arm_circularWrite_q15( + q15_t * circBuffer, + int32_t L, + uint16_t * writeOffset, + int32_t bufferInc, + const q15_t * src, + int32_t srcInc, + uint32_t blockSize) + { + uint32_t i = 0u; + int32_t wOffset; + + /* Copy the value of Index pointer that points + * to the current location where the input samples to be copied */ + wOffset = *writeOffset; + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the input sample to the circular buffer */ + circBuffer[wOffset] = *src; + + /* Update the input pointer */ + src += srcInc; + + /* Circularly update wOffset. Watch out for positive and negative value */ + wOffset += bufferInc; + if (wOffset >= L) + wOffset -= L; + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *writeOffset = (uint16_t)wOffset; + } + + + /** + * @brief Q15 Circular Read function. + */ + static __INLINE void arm_circularRead_q15( + q15_t * circBuffer, + int32_t L, + int32_t * readOffset, + int32_t bufferInc, + q15_t * dst, + q15_t * dst_base, + int32_t dst_length, + int32_t dstInc, + uint32_t blockSize) + { + uint32_t i = 0; + int32_t rOffset, dst_end; + + /* Copy the value of Index pointer that points + * to the current location from where the input samples to be read */ + rOffset = *readOffset; + + dst_end = (int32_t) (dst_base + dst_length); + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the sample from the circular buffer to the destination buffer */ + *dst = circBuffer[rOffset]; + + /* Update the input pointer */ + dst += dstInc; + + if (dst == (q15_t *) dst_end) + { + dst = dst_base; + } + + /* Circularly update wOffset. Watch out for positive and negative value */ + rOffset += bufferInc; + + if (rOffset >= L) + { + rOffset -= L; + } + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *readOffset = rOffset; + } + + + /** + * @brief Q7 Circular write function. + */ + static __INLINE void arm_circularWrite_q7( + q7_t * circBuffer, + int32_t L, + uint16_t * writeOffset, + int32_t bufferInc, + const q7_t * src, + int32_t srcInc, + uint32_t blockSize) + { + uint32_t i = 0u; + int32_t wOffset; + + /* Copy the value of Index pointer that points + * to the current location where the input samples to be copied */ + wOffset = *writeOffset; + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the input sample to the circular buffer */ + circBuffer[wOffset] = *src; + + /* Update the input pointer */ + src += srcInc; + + /* Circularly update wOffset. Watch out for positive and negative value */ + wOffset += bufferInc; + if (wOffset >= L) + wOffset -= L; + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *writeOffset = (uint16_t)wOffset; + } + + + /** + * @brief Q7 Circular Read function. + */ + static __INLINE void arm_circularRead_q7( + q7_t * circBuffer, + int32_t L, + int32_t * readOffset, + int32_t bufferInc, + q7_t * dst, + q7_t * dst_base, + int32_t dst_length, + int32_t dstInc, + uint32_t blockSize) + { + uint32_t i = 0; + int32_t rOffset, dst_end; + + /* Copy the value of Index pointer that points + * to the current location from where the input samples to be read */ + rOffset = *readOffset; + + dst_end = (int32_t) (dst_base + dst_length); + + /* Loop over the blockSize */ + i = blockSize; + + while (i > 0u) + { + /* copy the sample from the circular buffer to the destination buffer */ + *dst = circBuffer[rOffset]; + + /* Update the input pointer */ + dst += dstInc; + + if (dst == (q7_t *) dst_end) + { + dst = dst_base; + } + + /* Circularly update rOffset. Watch out for positive and negative value */ + rOffset += bufferInc; + + if (rOffset >= L) + { + rOffset -= L; + } + + /* Decrement the loop counter */ + i--; + } + + /* Update the index pointer */ + *readOffset = rOffset; + } + + + /** + * @brief Sum of the squares of the elements of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_power_q31( + q31_t * pSrc, + uint32_t blockSize, + q63_t * pResult); + + + /** + * @brief Sum of the squares of the elements of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_power_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult); + + + /** + * @brief Sum of the squares of the elements of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_power_q15( + q15_t * pSrc, + uint32_t blockSize, + q63_t * pResult); + + + /** + * @brief Sum of the squares of the elements of a Q7 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_power_q7( + q7_t * pSrc, + uint32_t blockSize, + q31_t * pResult); + + + /** + * @brief Mean value of a Q7 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_mean_q7( + q7_t * pSrc, + uint32_t blockSize, + q7_t * pResult); + + + /** + * @brief Mean value of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_mean_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult); + + + /** + * @brief Mean value of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_mean_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult); + + + /** + * @brief Mean value of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_mean_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult); + + + /** + * @brief Variance of the elements of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_var_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult); + + + /** + * @brief Variance of the elements of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_var_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult); + + + /** + * @brief Variance of the elements of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_var_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult); + + + /** + * @brief Root Mean Square of the elements of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_rms_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult); + + + /** + * @brief Root Mean Square of the elements of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_rms_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult); + + + /** + * @brief Root Mean Square of the elements of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_rms_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult); + + + /** + * @brief Standard deviation of the elements of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_std_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult); + + + /** + * @brief Standard deviation of the elements of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_std_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult); + + + /** + * @brief Standard deviation of the elements of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output value. + */ + void arm_std_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult); + + + /** + * @brief Floating-point complex magnitude + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_f32( + float32_t * pSrc, + float32_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q31 complex magnitude + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_q31( + q31_t * pSrc, + q31_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q15 complex magnitude + * @param[in] pSrc points to the complex input vector + * @param[out] pDst points to the real output vector + * @param[in] numSamples number of complex samples in the input vector + */ + void arm_cmplx_mag_q15( + q15_t * pSrc, + q15_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q15 complex dot product + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] numSamples number of complex samples in each vector + * @param[out] realResult real part of the result returned here + * @param[out] imagResult imaginary part of the result returned here + */ + void arm_cmplx_dot_prod_q15( + q15_t * pSrcA, + q15_t * pSrcB, + uint32_t numSamples, + q31_t * realResult, + q31_t * imagResult); + + + /** + * @brief Q31 complex dot product + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] numSamples number of complex samples in each vector + * @param[out] realResult real part of the result returned here + * @param[out] imagResult imaginary part of the result returned here + */ + void arm_cmplx_dot_prod_q31( + q31_t * pSrcA, + q31_t * pSrcB, + uint32_t numSamples, + q63_t * realResult, + q63_t * imagResult); + + + /** + * @brief Floating-point complex dot product + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[in] numSamples number of complex samples in each vector + * @param[out] realResult real part of the result returned here + * @param[out] imagResult imaginary part of the result returned here + */ + void arm_cmplx_dot_prod_f32( + float32_t * pSrcA, + float32_t * pSrcB, + uint32_t numSamples, + float32_t * realResult, + float32_t * imagResult); + + + /** + * @brief Q15 complex-by-real multiplication + * @param[in] pSrcCmplx points to the complex input vector + * @param[in] pSrcReal points to the real input vector + * @param[out] pCmplxDst points to the complex output vector + * @param[in] numSamples number of samples in each vector + */ + void arm_cmplx_mult_real_q15( + q15_t * pSrcCmplx, + q15_t * pSrcReal, + q15_t * pCmplxDst, + uint32_t numSamples); + + + /** + * @brief Q31 complex-by-real multiplication + * @param[in] pSrcCmplx points to the complex input vector + * @param[in] pSrcReal points to the real input vector + * @param[out] pCmplxDst points to the complex output vector + * @param[in] numSamples number of samples in each vector + */ + void arm_cmplx_mult_real_q31( + q31_t * pSrcCmplx, + q31_t * pSrcReal, + q31_t * pCmplxDst, + uint32_t numSamples); + + + /** + * @brief Floating-point complex-by-real multiplication + * @param[in] pSrcCmplx points to the complex input vector + * @param[in] pSrcReal points to the real input vector + * @param[out] pCmplxDst points to the complex output vector + * @param[in] numSamples number of samples in each vector + */ + void arm_cmplx_mult_real_f32( + float32_t * pSrcCmplx, + float32_t * pSrcReal, + float32_t * pCmplxDst, + uint32_t numSamples); + + + /** + * @brief Minimum value of a Q7 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] result is output pointer + * @param[in] index is the array index of the minimum value in the input buffer. + */ + void arm_min_q7( + q7_t * pSrc, + uint32_t blockSize, + q7_t * result, + uint32_t * index); + + + /** + * @brief Minimum value of a Q15 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output pointer + * @param[in] pIndex is the array index of the minimum value in the input buffer. + */ + void arm_min_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult, + uint32_t * pIndex); + + + /** + * @brief Minimum value of a Q31 vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output pointer + * @param[out] pIndex is the array index of the minimum value in the input buffer. + */ + void arm_min_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult, + uint32_t * pIndex); + + + /** + * @brief Minimum value of a floating-point vector. + * @param[in] pSrc is input pointer + * @param[in] blockSize is the number of samples to process + * @param[out] pResult is output pointer + * @param[out] pIndex is the array index of the minimum value in the input buffer. + */ + void arm_min_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult, + uint32_t * pIndex); + + +/** + * @brief Maximum value of a Q7 vector. + * @param[in] pSrc points to the input buffer + * @param[in] blockSize length of the input vector + * @param[out] pResult maximum value returned here + * @param[out] pIndex index of maximum value returned here + */ + void arm_max_q7( + q7_t * pSrc, + uint32_t blockSize, + q7_t * pResult, + uint32_t * pIndex); + + +/** + * @brief Maximum value of a Q15 vector. + * @param[in] pSrc points to the input buffer + * @param[in] blockSize length of the input vector + * @param[out] pResult maximum value returned here + * @param[out] pIndex index of maximum value returned here + */ + void arm_max_q15( + q15_t * pSrc, + uint32_t blockSize, + q15_t * pResult, + uint32_t * pIndex); + + +/** + * @brief Maximum value of a Q31 vector. + * @param[in] pSrc points to the input buffer + * @param[in] blockSize length of the input vector + * @param[out] pResult maximum value returned here + * @param[out] pIndex index of maximum value returned here + */ + void arm_max_q31( + q31_t * pSrc, + uint32_t blockSize, + q31_t * pResult, + uint32_t * pIndex); + + +/** + * @brief Maximum value of a floating-point vector. + * @param[in] pSrc points to the input buffer + * @param[in] blockSize length of the input vector + * @param[out] pResult maximum value returned here + * @param[out] pIndex index of maximum value returned here + */ + void arm_max_f32( + float32_t * pSrc, + uint32_t blockSize, + float32_t * pResult, + uint32_t * pIndex); + + + /** + * @brief Q15 complex-by-complex multiplication + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_mult_cmplx_q15( + q15_t * pSrcA, + q15_t * pSrcB, + q15_t * pDst, + uint32_t numSamples); + + + /** + * @brief Q31 complex-by-complex multiplication + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_mult_cmplx_q31( + q31_t * pSrcA, + q31_t * pSrcB, + q31_t * pDst, + uint32_t numSamples); + + + /** + * @brief Floating-point complex-by-complex multiplication + * @param[in] pSrcA points to the first input vector + * @param[in] pSrcB points to the second input vector + * @param[out] pDst points to the output vector + * @param[in] numSamples number of complex samples in each vector + */ + void arm_cmplx_mult_cmplx_f32( + float32_t * pSrcA, + float32_t * pSrcB, + float32_t * pDst, + uint32_t numSamples); + + + /** + * @brief Converts the elements of the floating-point vector to Q31 vector. + * @param[in] pSrc points to the floating-point input vector + * @param[out] pDst points to the Q31 output vector + * @param[in] blockSize length of the input vector + */ + void arm_float_to_q31( + float32_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the floating-point vector to Q15 vector. + * @param[in] pSrc points to the floating-point input vector + * @param[out] pDst points to the Q15 output vector + * @param[in] blockSize length of the input vector + */ + void arm_float_to_q15( + float32_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the floating-point vector to Q7 vector. + * @param[in] pSrc points to the floating-point input vector + * @param[out] pDst points to the Q7 output vector + * @param[in] blockSize length of the input vector + */ + void arm_float_to_q7( + float32_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the Q31 vector to Q15 vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q31_to_q15( + q31_t * pSrc, + q15_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the Q31 vector to Q7 vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q31_to_q7( + q31_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the Q15 vector to floating-point vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q15_to_float( + q15_t * pSrc, + float32_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the Q15 vector to Q31 vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q15_to_q31( + q15_t * pSrc, + q31_t * pDst, + uint32_t blockSize); + + + /** + * @brief Converts the elements of the Q15 vector to Q7 vector. + * @param[in] pSrc is input pointer + * @param[out] pDst is output pointer + * @param[in] blockSize is the number of samples to process + */ + void arm_q15_to_q7( + q15_t * pSrc, + q7_t * pDst, + uint32_t blockSize); + + + /** + * @ingroup groupInterpolation + */ + + /** + * @defgroup BilinearInterpolate Bilinear Interpolation + * + * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. + * The underlying function f(x, y) is sampled on a regular grid and the interpolation process + * determines values between the grid points. + * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. + * Bilinear interpolation is often used in image processing to rescale images. + * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types. + * + * Algorithm + * \par + * The instance structure used by the bilinear interpolation functions describes a two dimensional data table. + * For floating-point, the instance structure is defined as: + *
+   *   typedef struct
+   *   {
+   *     uint16_t numRows;
+   *     uint16_t numCols;
+   *     float32_t *pData;
+   * } arm_bilinear_interp_instance_f32;
+   * 
+ * + * \par + * where numRows specifies the number of rows in the table; + * numCols specifies the number of columns in the table; + * and pData points to an array of size numRows*numCols values. + * The data table pTable is organized in row order and the supplied data values fall on integer indexes. + * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers. + * + * \par + * Let (x, y) specify the desired interpolation point. Then define: + *
+   *     XF = floor(x)
+   *     YF = floor(y)
+   * 
+ * \par + * The interpolated output point is computed as: + *
+   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+   *           + f(XF + 1, YF) * (x-XF)*(1-(y-YF))
+   *           + f(XF, YF + 1) * (1-(x-XF))*(y-YF)
+   *           + f(XF + 1, YF + 1) * (x-XF)*(y-YF)
+   * 
+ * Note that the coordinates (x, y) contain integer and fractional components. + * The integer components specify which portion of the table to use while the + * fractional components control the interpolation processor. + * + * \par + * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. + */ + + /** + * @addtogroup BilinearInterpolate + * @{ + */ + + + /** + * + * @brief Floating-point bilinear interpolation. + * @param[in,out] S points to an instance of the interpolation structure. + * @param[in] X interpolation coordinate. + * @param[in] Y interpolation coordinate. + * @return out interpolated value. + */ + static __INLINE float32_t arm_bilinear_interp_f32( + const arm_bilinear_interp_instance_f32 * S, + float32_t X, + float32_t Y) + { + float32_t out; + float32_t f00, f01, f10, f11; + float32_t *pData = S->pData; + int32_t xIndex, yIndex, index; + float32_t xdiff, ydiff; + float32_t b1, b2, b3, b4; + + xIndex = (int32_t) X; + yIndex = (int32_t) Y; + + /* Care taken for table outside boundary */ + /* Returns zero output when values are outside table boundary */ + if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1)) + { + return (0); + } + + /* Calculation of index for two nearest points in X-direction */ + index = (xIndex - 1) + (yIndex - 1) * S->numCols; + + + /* Read two nearest points in X-direction */ + f00 = pData[index]; + f01 = pData[index + 1]; + + /* Calculation of index for two nearest points in Y-direction */ + index = (xIndex - 1) + (yIndex) * S->numCols; + + + /* Read two nearest points in Y-direction */ + f10 = pData[index]; + f11 = pData[index + 1]; + + /* Calculation of intermediate values */ + b1 = f00; + b2 = f01 - f00; + b3 = f10 - f00; + b4 = f00 - f01 - f10 + f11; + + /* Calculation of fractional part in X */ + xdiff = X - xIndex; + + /* Calculation of fractional part in Y */ + ydiff = Y - yIndex; + + /* Calculation of bi-linear interpolated output */ + out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff; + + /* return to application */ + return (out); + } + + + /** + * + * @brief Q31 bilinear interpolation. + * @param[in,out] S points to an instance of the interpolation structure. + * @param[in] X interpolation coordinate in 12.20 format. + * @param[in] Y interpolation coordinate in 12.20 format. + * @return out interpolated value. + */ + static __INLINE q31_t arm_bilinear_interp_q31( + arm_bilinear_interp_instance_q31 * S, + q31_t X, + q31_t Y) + { + q31_t out; /* Temporary output */ + q31_t acc = 0; /* output */ + q31_t xfract, yfract; /* X, Y fractional parts */ + q31_t x1, x2, y1, y2; /* Nearest output values */ + int32_t rI, cI; /* Row and column indices */ + q31_t *pYData = S->pData; /* pointer to output table values */ + uint32_t nCols = S->numCols; /* num of rows */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + rI = ((X & (q31_t)0xFFF00000) >> 20); + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + cI = ((Y & (q31_t)0xFFF00000) >> 20); + + /* Care taken for table outside boundary */ + /* Returns zero output when values are outside table boundary */ + if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) + { + return (0); + } + + /* 20 bits for the fractional part */ + /* shift left xfract by 11 to keep 1.31 format */ + xfract = (X & 0x000FFFFF) << 11u; + + /* Read two nearest output values from the index */ + x1 = pYData[(rI) + (int32_t)nCols * (cI) ]; + x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1]; + + /* 20 bits for the fractional part */ + /* shift left yfract by 11 to keep 1.31 format */ + yfract = (Y & 0x000FFFFF) << 11u; + + /* Read two nearest output values from the index */ + y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ]; + y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1]; + + /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */ + out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32)); + acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32)); + + /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */ + out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32)); + acc += ((q31_t) ((q63_t) out * (xfract) >> 32)); + + /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */ + out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32)); + acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); + + /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */ + out = ((q31_t) ((q63_t) y2 * (xfract) >> 32)); + acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); + + /* Convert acc to 1.31(q31) format */ + return ((q31_t)(acc << 2)); + } + + + /** + * @brief Q15 bilinear interpolation. + * @param[in,out] S points to an instance of the interpolation structure. + * @param[in] X interpolation coordinate in 12.20 format. + * @param[in] Y interpolation coordinate in 12.20 format. + * @return out interpolated value. + */ + static __INLINE q15_t arm_bilinear_interp_q15( + arm_bilinear_interp_instance_q15 * S, + q31_t X, + q31_t Y) + { + q63_t acc = 0; /* output */ + q31_t out; /* Temporary output */ + q15_t x1, x2, y1, y2; /* Nearest output values */ + q31_t xfract, yfract; /* X, Y fractional parts */ + int32_t rI, cI; /* Row and column indices */ + q15_t *pYData = S->pData; /* pointer to output table values */ + uint32_t nCols = S->numCols; /* num of rows */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + rI = ((X & (q31_t)0xFFF00000) >> 20); + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + cI = ((Y & (q31_t)0xFFF00000) >> 20); + + /* Care taken for table outside boundary */ + /* Returns zero output when values are outside table boundary */ + if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) + { + return (0); + } + + /* 20 bits for the fractional part */ + /* xfract should be in 12.20 format */ + xfract = (X & 0x000FFFFF); + + /* Read two nearest output values from the index */ + x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; + x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; + + /* 20 bits for the fractional part */ + /* yfract should be in 12.20 format */ + yfract = (Y & 0x000FFFFF); + + /* Read two nearest output values from the index */ + y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; + y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; + + /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */ + + /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */ + /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */ + out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u); + acc = ((q63_t) out * (0xFFFFF - yfract)); + + /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */ + out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u); + acc += ((q63_t) out * (xfract)); + + /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */ + out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u); + acc += ((q63_t) out * (yfract)); + + /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */ + out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u); + acc += ((q63_t) out * (yfract)); + + /* acc is in 13.51 format and down shift acc by 36 times */ + /* Convert out to 1.15 format */ + return ((q15_t)(acc >> 36)); + } + + + /** + * @brief Q7 bilinear interpolation. + * @param[in,out] S points to an instance of the interpolation structure. + * @param[in] X interpolation coordinate in 12.20 format. + * @param[in] Y interpolation coordinate in 12.20 format. + * @return out interpolated value. + */ + static __INLINE q7_t arm_bilinear_interp_q7( + arm_bilinear_interp_instance_q7 * S, + q31_t X, + q31_t Y) + { + q63_t acc = 0; /* output */ + q31_t out; /* Temporary output */ + q31_t xfract, yfract; /* X, Y fractional parts */ + q7_t x1, x2, y1, y2; /* Nearest output values */ + int32_t rI, cI; /* Row and column indices */ + q7_t *pYData = S->pData; /* pointer to output table values */ + uint32_t nCols = S->numCols; /* num of rows */ + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + rI = ((X & (q31_t)0xFFF00000) >> 20); + + /* Input is in 12.20 format */ + /* 12 bits for the table index */ + /* Index value calculation */ + cI = ((Y & (q31_t)0xFFF00000) >> 20); + + /* Care taken for table outside boundary */ + /* Returns zero output when values are outside table boundary */ + if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) + { + return (0); + } + + /* 20 bits for the fractional part */ + /* xfract should be in 12.20 format */ + xfract = (X & (q31_t)0x000FFFFF); + + /* Read two nearest output values from the index */ + x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; + x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; + + /* 20 bits for the fractional part */ + /* yfract should be in 12.20 format */ + yfract = (Y & (q31_t)0x000FFFFF); + + /* Read two nearest output values from the index */ + y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; + y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; + + /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */ + out = ((x1 * (0xFFFFF - xfract))); + acc = (((q63_t) out * (0xFFFFF - yfract))); + + /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */ + out = ((x2 * (0xFFFFF - yfract))); + acc += (((q63_t) out * (xfract))); + + /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */ + out = ((y1 * (0xFFFFF - xfract))); + acc += (((q63_t) out * (yfract))); + + /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */ + out = ((y2 * (yfract))); + acc += (((q63_t) out * (xfract))); + + /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */ + return ((q7_t)(acc >> 40)); + } + + /** + * @} end of BilinearInterpolate group + */ + + +/* SMMLAR */ +#define multAcc_32x32_keep32_R(a, x, y) \ + a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32) + +/* SMMLSR */ +#define multSub_32x32_keep32_R(a, x, y) \ + a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32) + +/* SMMULR */ +#define mult_32x32_keep32_R(a, x, y) \ + a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32) + +/* SMMLA */ +#define multAcc_32x32_keep32(a, x, y) \ + a += (q31_t) (((q63_t) x * y) >> 32) + +/* SMMLS */ +#define multSub_32x32_keep32(a, x, y) \ + a -= (q31_t) (((q63_t) x * y) >> 32) + +/* SMMUL */ +#define mult_32x32_keep32(a, x, y) \ + a = (q31_t) (((q63_t) x * y ) >> 32) + + +#if defined ( __CC_ARM ) + /* Enter low optimization region - place directly above function definition */ + #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) + #define LOW_OPTIMIZATION_ENTER \ + _Pragma ("push") \ + _Pragma ("O1") + #else + #define LOW_OPTIMIZATION_ENTER + #endif + + /* Exit low optimization region - place directly after end of function definition */ + #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) + #define LOW_OPTIMIZATION_EXIT \ + _Pragma ("pop") + #else + #define LOW_OPTIMIZATION_EXIT + #endif + + /* Enter low optimization region - place directly above function definition */ + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + + /* Exit low optimization region - place directly after end of function definition */ + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define LOW_OPTIMIZATION_ENTER + #define LOW_OPTIMIZATION_EXIT + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#elif defined(__GNUC__) + #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") )) + #define LOW_OPTIMIZATION_EXIT + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#elif defined(__ICCARM__) + /* Enter low optimization region - place directly above function definition */ + #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) + #define LOW_OPTIMIZATION_ENTER \ + _Pragma ("optimize=low") + #else + #define LOW_OPTIMIZATION_ENTER + #endif + + /* Exit low optimization region - place directly after end of function definition */ + #define LOW_OPTIMIZATION_EXIT + + /* Enter low optimization region - place directly above function definition */ + #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \ + _Pragma ("optimize=low") + #else + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #endif + + /* Exit low optimization region - place directly after end of function definition */ + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#elif defined(__CSMC__) + #define LOW_OPTIMIZATION_ENTER + #define LOW_OPTIMIZATION_EXIT + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#elif defined(__TASKING__) + #define LOW_OPTIMIZATION_ENTER + #define LOW_OPTIMIZATION_EXIT + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #define IAR_ONLY_LOW_OPTIMIZATION_EXIT + +#endif + + +#ifdef __cplusplus +} +#endif + + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#endif /* _ARM_MATH_H */ + +/** + * + * End of file. + */ diff --git a/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc.h b/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc.h new file mode 100644 index 0000000000..74c49c67de --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc.h @@ -0,0 +1,734 @@ +/**************************************************************************//** + * @file cmsis_armcc.h + * @brief CMSIS Cortex-M Core Function/Instruction Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CMSIS_ARMCC_H +#define __CMSIS_ARMCC_H + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) + #error "Please use ARM Compiler Toolchain V4.0.677 or later!" +#endif + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_INLINE uint32_t __get_IPSR(void) +{ + register uint32_t __regIPSR __ASM("ipsr"); + return(__regIPSR); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_INLINE uint32_t __get_APSR(void) +{ + register uint32_t __regAPSR __ASM("apsr"); + return(__regAPSR); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_INLINE uint32_t __get_xPSR(void) +{ + register uint32_t __regXPSR __ASM("xpsr"); + return(__regXPSR); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + return(__regProcessStackPointer); +} + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + __regProcessStackPointer = topOfProcStack; +} + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + return(__regMainStackPointer); +} + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + __regMainStackPointer = topOfMainStack; +} + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + + +#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) + +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xFFU); +} + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + register uint32_t __regBasePriMax __ASM("basepri_max"); + __regBasePriMax = (basePri & 0xFFU); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & (uint32_t)1); +} + +#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ + + +#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +__STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + register uint32_t __regfpscr __ASM("fpscr"); + return(__regfpscr); +#else + return(0U); +#endif +} + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + register uint32_t __regfpscr __ASM("fpscr"); + __regfpscr = (fpscr); +#endif +} + +#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ + + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __nop + + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI __wfi + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __wfe + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __sev + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +#define __ISB() do {\ + __schedule_barrier();\ + __isb(0xF);\ + __schedule_barrier();\ + } while (0U) + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() do {\ + __schedule_barrier();\ + __dsb(0xF);\ + __schedule_barrier();\ + } while (0U) + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() do {\ + __schedule_barrier();\ + __dmb(0xF);\ + __schedule_barrier();\ + } while (0U) + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in integer value. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV __rev + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in two unsigned short values. + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) +{ + rev16 r0, r0 + bx lr +} +#endif + +/** + \brief Reverse byte order in signed short value + \details Reverses the byte order in a signed short value with sign extension to integer. + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) +{ + revsh r0, r0 + bx lr +} +#endif + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +#define __ROR __ror + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __breakpoint(value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) + #define __RBIT __rbit +#else +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ + return(result); +} +#endif + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __clz + + +#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) + +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) +#else + #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) +#else + #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) +#else + #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXB(value, ptr) __strex(value, ptr) +#else + #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXH(value, ptr) __strex(value, ptr) +#else + #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXW(value, ptr) __strex(value, ptr) +#else + #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __clrex + + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __ssat + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __usat + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) +{ + rrx r0, r0 + bx lr +} +#endif + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRBT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRHT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRT(value, ptr) __strt(value, ptr) + +#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ + +#define __SADD8 __sadd8 +#define __QADD8 __qadd8 +#define __SHADD8 __shadd8 +#define __UADD8 __uadd8 +#define __UQADD8 __uqadd8 +#define __UHADD8 __uhadd8 +#define __SSUB8 __ssub8 +#define __QSUB8 __qsub8 +#define __SHSUB8 __shsub8 +#define __USUB8 __usub8 +#define __UQSUB8 __uqsub8 +#define __UHSUB8 __uhsub8 +#define __SADD16 __sadd16 +#define __QADD16 __qadd16 +#define __SHADD16 __shadd16 +#define __UADD16 __uadd16 +#define __UQADD16 __uqadd16 +#define __UHADD16 __uhadd16 +#define __SSUB16 __ssub16 +#define __QSUB16 __qsub16 +#define __SHSUB16 __shsub16 +#define __USUB16 __usub16 +#define __UQSUB16 __uqsub16 +#define __UHSUB16 __uhsub16 +#define __SASX __sasx +#define __QASX __qasx +#define __SHASX __shasx +#define __UASX __uasx +#define __UQASX __uqasx +#define __UHASX __uhasx +#define __SSAX __ssax +#define __QSAX __qsax +#define __SHSAX __shsax +#define __USAX __usax +#define __UQSAX __uqsax +#define __UHSAX __uhsax +#define __USAD8 __usad8 +#define __USADA8 __usada8 +#define __SSAT16 __ssat16 +#define __USAT16 __usat16 +#define __UXTB16 __uxtb16 +#define __UXTAB16 __uxtab16 +#define __SXTB16 __sxtb16 +#define __SXTAB16 __sxtab16 +#define __SMUAD __smuad +#define __SMUADX __smuadx +#define __SMLAD __smlad +#define __SMLADX __smladx +#define __SMLALD __smlald +#define __SMLALDX __smlaldx +#define __SMUSD __smusd +#define __SMUSDX __smusdx +#define __SMLSD __smlsd +#define __SMLSDX __smlsdx +#define __SMLSLD __smlsld +#define __SMLSLDX __smlsldx +#define __SEL __sel +#define __QADD __qadd +#define __QSUB __qsub + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ + ((int64_t)(ARG3) << 32U) ) >> 32U)) + +#endif /* (__CORTEX_M >= 0x04) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCC_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc_V6.h b/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc_V6.h new file mode 100644 index 0000000000..cd13240ce3 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/cmsis_armcc_V6.h @@ -0,0 +1,1800 @@ +/**************************************************************************//** + * @file cmsis_armcc_V6.h + * @brief CMSIS Cortex-M Core Function/Instruction Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CMSIS_ARMCC_V6_H +#define __CMSIS_ARMCC_V6_H + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Control Register (non-secure) + \details Returns the content of the non-secure Control Register when in secure mode. + \return non-secure Control Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Control Register (non-secure) + \details Writes the given value to the non-secure Control Register when in secure state. + \param [in] control Control Register value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control) +{ + __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); +} +#endif + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get IPSR Register (non-secure) + \details Returns the content of the non-secure IPSR Register when in secure state. + \return IPSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get APSR Register (non-secure) + \details Returns the content of the non-secure APSR Register when in secure state. + \return APSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get xPSR Register (non-secure) + \details Returns the content of the non-secure xPSR Register when in secure state. + \return xPSR Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psp" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Process Stack Pointer (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. + \return PSP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp"); +} +#endif + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msp" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Main Stack Pointer (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. + \return MSP Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Main Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp"); +} +#endif + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Priority Mask (non-secure) + \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. + \return Priority Mask value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Mask (non-secure) + \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + \param [in] priMask Priority Mask + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) +{ + __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); +} +#endif + + +#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ + +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Base Priority (non-secure) + \details Returns the current value of the non-secure Base Priority register when in secure state. + \return Base Priority register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Base Priority (non-secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state. + \param [in] basePri Base Priority value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value) +{ + __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory"); +} +#endif + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Base Priority with condition (non_secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value) +{ + __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory"); +} +#endif + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Fault Mask (non-secure) + \details Returns the current value of the non-secure Fault Mask register when in secure state. + \return Fault Mask register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Fault Mask (non-secure) + \details Assigns the given value to the non-secure Fault Mask register when in secure state. + \param [in] faultMask Fault Mask value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); +} +#endif + + +#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ + + +#if (__ARM_ARCH_8M__ == 1U) + +/** + \brief Get Process Stack Pointer Limit + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + \return PSPLIM Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ +/** + \brief Get Process Stack Pointer Limit (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \return PSPLIM Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer Limit + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) +{ + __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); +} + + +#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) +{ + __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); +} +#endif + + +/** + \brief Get Main Stack Pointer Limit + \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + \return MSPLIM Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + + return(result); +} + + +#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ +/** + \brief Get Main Stack Pointer Limit (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. + \return MSPLIM Register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer Limit + \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) +{ + __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); +} + + +#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ +/** + \brief Set Main Stack Pointer Limit (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. + \param [in] MainStackPtrLimit Main Stack Pointer value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) +{ + __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); +} +#endif + +#endif /* (__ARM_ARCH_8M__ == 1U) */ + + +#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=4 */ + +/** + \brief Get FPSCR + \details eturns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +#define __get_FPSCR __builtin_arm_get_fpscr +#if 0 +__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + uint32_t result; + + __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + __ASM volatile (""); + return(result); +#else + return(0); +#endif +} +#endif + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get FPSCR (non-secure) + \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state. + \return Floating Point Status/Control register value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + uint32_t result; + + __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ + __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) ); + __ASM volatile (""); + return(result); +#else + return(0); +#endif +} +#endif + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +#define __set_FPSCR __builtin_arm_set_fpscr +#if 0 +__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); + __ASM volatile (""); +#endif +} +#endif + +#if (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set FPSCR (non-secure) + \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state. + \param [in] fpscr Floating Point Status/Control value to set + */ +__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ + __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc"); + __ASM volatile (""); +#endif +} +#endif + +#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ + + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __builtin_arm_nop + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI __builtin_arm_wfi + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __builtin_arm_wfe + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __builtin_arm_sev + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +#define __ISB() __builtin_arm_isb(0xF); + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() __builtin_arm_dsb(0xF); + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() __builtin_arm_dmb(0xF); + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in integer value. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV __builtin_bswap32 + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in two unsigned short values. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV16 __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ +#if 0 +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} +#endif + + +/** + \brief Reverse byte order in signed short value + \details Reverses the byte order in a signed short value with sign extension to integer. + \param [in] value Value to reverse + \return Reversed value + */ + /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) +{ + int32_t result; + + __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ + /* ToDo: ARMCC_V6: check if __builtin_arm_rbit is supported */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ +#endif + return(result); +} + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __builtin_clz + + +#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ + +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDREXB (uint8_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDREXH (uint16_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDREXW (uint32_t)__builtin_arm_ldrex + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXB (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXH (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXW (uint32_t)__builtin_arm_strex + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __builtin_arm_clrex + + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +/*#define __SSAT __builtin_arm_ssat*/ +#define __SSAT(ARG1,ARG2) \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __builtin_arm_usat +#if 0 +#define __USAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) +#endif + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); +} + +#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ + + +#if (__ARM_ARCH_8M__ == 1U) + +/** + \brief Load-Acquire (8 bit) + \details Executes a LDAB instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire (16 bit) + \details Executes a LDAH instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire (32 bit) + \details Executes a LDA instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief Store-Release (8 bit) + \details Executes a STLB instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (16 bit) + \details Executes a STLH instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (32 bit) + \details Executes a STL instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Load-Acquire Exclusive (8 bit) + \details Executes a LDAB exclusive instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDAEXB (uint8_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (16 bit) + \details Executes a LDAH exclusive instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDAEXH (uint16_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (32 bit) + \details Executes a LDA exclusive instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDAEX (uint32_t)__builtin_arm_ldaex + + +/** + \brief Store-Release Exclusive (8 bit) + \details Executes a STLB exclusive instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXB (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (16 bit) + \details Executes a STLH exclusive instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXH (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (32 bit) + \details Executes a STL exclusive instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEX (uint32_t)__builtin_arm_stlex + +#endif /* (__ARM_ARCH_8M__ == 1U) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (__ARM_FEATURE_DSP == 1U) /* ToDo: ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */ + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#define __SSAT16(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +#define __USAT16(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +#define __PKHBT(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +#define __PKHTB(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + if (ARG3 == 0) \ + __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ + else \ + __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__ARM_FEATURE_DSP == 1U) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCC_V6_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/cmsis_gcc.h b/bsp/nrf5x/libraries/cmsis/include/cmsis_gcc.h new file mode 100644 index 0000000000..bb89fbba9e --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/cmsis_gcc.h @@ -0,0 +1,1373 @@ +/**************************************************************************//** + * @file cmsis_gcc.h + * @brief CMSIS Cortex-M Core Function/Instruction Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef __CMSIS_GCC_H +#define __CMSIS_GCC_H + +/* ignore some GCC warnings */ +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-conversion" +#pragma GCC diagnostic ignored "-Wconversion" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + + \return xPSR Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); +} + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t result; + + __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); +} + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (__CORTEX_M >= 0x03U) + +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); +} + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + +#endif /* (__CORTEX_M >= 0x03U) */ + + +#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + uint32_t result; + + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + __ASM volatile (""); + return(result); +#else + return(0); +#endif +} + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) + /* Empty asm statement works as a scheduling barrier */ + __ASM volatile (""); + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); + __ASM volatile (""); +#endif +} + +#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ + + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +__attribute__((always_inline)) __STATIC_INLINE void __NOP(void) +{ + __ASM volatile ("nop"); +} + + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFI(void) +{ + __ASM volatile ("wfi"); +} + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +__attribute__((always_inline)) __STATIC_INLINE void __WFE(void) +{ + __ASM volatile ("wfe"); +} + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +__attribute__((always_inline)) __STATIC_INLINE void __SEV(void) +{ + __ASM volatile ("sev"); +} + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +__attribute__((always_inline)) __STATIC_INLINE void __ISB(void) +{ + __ASM volatile ("isb 0xF":::"memory"); +} + + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); +} + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__attribute__((always_inline)) __STATIC_INLINE void __DMB(void) +{ + __ASM volatile ("dmb 0xF":::"memory"); +} + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in integer value. + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + return __builtin_bswap32(value); +#else + uint32_t result; + + __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in two unsigned short values. + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief Reverse byte order in signed short value + \details Reverses the byte order in a signed short value with sign extension to integer. + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + return (short)__builtin_bswap16(value); +#else + int32_t result; + + __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +#endif +} + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] value Value to rotate + \param [in] value Number of Bits to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ +#endif + return(result); +} + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __builtin_clz + + +#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) + +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + return(result); +} + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void) +{ + __ASM volatile ("clrex" ::: "memory"); +} + + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) ); +} + +#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#define __SSAT16(ARG1,ARG2) \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +#define __USAT16(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +#define __PKHBT(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +#define __PKHTB(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + if (ARG3 == 0) \ + __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ + else \ + __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__CORTEX_M >= 0x04) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +#endif /* __CMSIS_GCC_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cm0.h b/bsp/nrf5x/libraries/cmsis/include/core_cm0.h new file mode 100644 index 0000000000..b43ce5539f --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cm0.h @@ -0,0 +1,798 @@ +/**************************************************************************//** + * @file core_cm0.h + * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0_H_GENERIC +#define __CORE_CM0_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M0 + @{ + */ + +/* CMSIS CM0 definitions */ +#define __CM0_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __CM0_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ + __CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0_H_DEPENDANT +#define __CORE_CM0_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0_REV + #define __CM0_REV 0x0000U + #warning "__CM0_REV not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M0 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + uint32_t RESERVED0; + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M0 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/* Interrupt Priorities are WORD accessible only under ARMv6M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cm0plus.h b/bsp/nrf5x/libraries/cmsis/include/core_cm0plus.h new file mode 100644 index 0000000000..89e2285ed7 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cm0plus.h @@ -0,0 +1,914 @@ +/**************************************************************************//** + * @file core_cm0plus.h + * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0PLUS_H_GENERIC +#define __CORE_CM0PLUS_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex-M0+ + @{ + */ + +/* CMSIS CM0+ definitions */ +#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0PLUS_H_DEPENDANT +#define __CORE_CM0PLUS_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0PLUS_REV + #define __CM0PLUS_REV 0x0000U + #warning "__CM0PLUS_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex-M0+ */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if (__VTOR_PRESENT == 1U) +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0+ header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M0+ Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/* Interrupt Priorities are WORD accessible only under ARMv6M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cm3.h b/bsp/nrf5x/libraries/cmsis/include/core_cm3.h new file mode 100644 index 0000000000..88f5e65fcf --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cm3.h @@ -0,0 +1,1763 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM3_H_GENERIC +#define __CORE_CM3_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M3 + @{ + */ + +/* CMSIS CM3 definitions */ +#define __CM3_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ + __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x03U) /*!< Cortex-M Core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM3_H_DEPENDANT +#define __CORE_CM3_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM3_REV + #define __CM3_REV 0x0200U + #warning "__CM3_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M3 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#if (__CM3_REV < 0x0201U) /* core r2p1 */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#else +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ +#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U)) + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +#else + uint32_t RESERVED1[1U]; +#endif +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ +#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ +#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M3 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in NVIC and returns the active bit. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + */ +__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cm4.h b/bsp/nrf5x/libraries/cmsis/include/core_cm4.h new file mode 100644 index 0000000000..d02b11136d --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cm4.h @@ -0,0 +1,1937 @@ +/**************************************************************************//** + * @file core_cm4.h + * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM4_H_GENERIC +#define __CORE_CM4_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M4 + @{ + */ + +/* CMSIS CM4 definitions */ +#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ + __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x04U) /*!< Cortex-M Core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #if (__FPU_PRESENT == 1) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ +#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM4_H_DEPENDANT +#define __CORE_CM4_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM4_REV + #define __CM4_REV 0x0000U + #warning "__CM4_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M4 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ +#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ +#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if (__FPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M4 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#if (__FPU_PRESENT == 1U) + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in NVIC and returns the active bit. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + */ +__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cm7.h b/bsp/nrf5x/libraries/cmsis/include/core_cm7.h new file mode 100644 index 0000000000..b1de1be499 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cm7.h @@ -0,0 +1,2512 @@ +/**************************************************************************//** + * @file core_cm7.h + * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM7_H_GENERIC +#define __CORE_CM7_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M7 + @{ + */ + +/* CMSIS CM7 definitions */ +#define __CM7_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __CM7_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ + __CM7_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x07U) /*!< Cortex-M Core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #if (__FPU_PRESENT == 1) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ +#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM7_H_DEPENDANT +#define __CORE_CM7_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM7_REV + #define __CM7_REV 0x0000U + #warning "__CM7_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __ICACHE_PRESENT + #define __ICACHE_PRESENT 0U + #warning "__ICACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DCACHE_PRESENT + #define __DCACHE_PRESENT 0U + #warning "__DCACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DTCM_PRESENT + #define __DTCM_PRESENT 0U + #warning "__DTCM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M7 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[1U]; + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED3[93U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 1 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ + +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ +#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ + +#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ +#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ + +#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ +#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED3[981U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ +#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ +#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if (__FPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/* Media and FP Feature Register 2 Definitions */ + +/*@} end of group CMSIS_FPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M4 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#if (__FPU_PRESENT == 1U) + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in NVIC and returns the active bit. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + */ +__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = SCB->MVFR0; + if ((mvfr0 & 0x00000FF0UL) == 0x220UL) + { + return 2UL; /* Double + Single precision FPU */ + } + else if ((mvfr0 & 0x00000FF0UL) == 0x020UL) + { + return 1UL; /* Single precision FPU */ + } + else + { + return 0UL; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## Cache functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_CacheFunctions Cache Functions + \brief Functions that configure Instruction and Data cache. + @{ + */ + +/* Cache Size ID Register Macros */ +#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) +#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) + + +/** + \brief Enable I-Cache + \details Turns on I-Cache + */ +__STATIC_INLINE void SCB_EnableICache (void) +{ + #if (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable I-Cache + \details Turns off I-Cache + */ +__STATIC_INLINE void SCB_DisableICache (void) +{ + #if (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate I-Cache + \details Invalidates I-Cache + */ +__STATIC_INLINE void SCB_InvalidateICache (void) +{ + #if (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Enable D-Cache + \details Turns on D-Cache + */ +__STATIC_INLINE void SCB_EnableDCache (void) +{ + #if (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways--); + } while (sets--); + __DSB(); + + SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable D-Cache + \details Turns off D-Cache + */ +__STATIC_INLINE void SCB_DisableDCache (void) +{ + #if (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways--); + } while (sets--); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate D-Cache + \details Invalidates D-Cache + */ +__STATIC_INLINE void SCB_InvalidateDCache (void) +{ + #if (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways--); + } while (sets--); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean D-Cache + \details Cleans D-Cache + */ +__STATIC_INLINE void SCB_CleanDCache (void) +{ + #if (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | + ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways--); + } while (sets--); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean & Invalidate D-Cache + \details Cleans and Invalidates D-Cache + */ +__STATIC_INLINE void SCB_CleanInvalidateDCache (void) +{ + #if (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways--); + } while (sets--); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Invalidate by address + \details Invalidates D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if (__DCACHE_PRESENT == 1U) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t)addr; + int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCIMVAC = op_addr; + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Clean by address + \details Cleans D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if (__DCACHE_PRESENT == 1) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t) addr; + int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCCMVAC = op_addr; + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Clean and Invalidate by address + \details Cleans and invalidates D_Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if (__DCACHE_PRESENT == 1U) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t) addr; + int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCCIMVAC = op_addr; + op_addr += linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/*@} end of CMSIS_Core_CacheFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cmFunc.h b/bsp/nrf5x/libraries/cmsis/include/core_cmFunc.h new file mode 100644 index 0000000000..979696f50a --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cmFunc.h @@ -0,0 +1,86 @@ +/**************************************************************************//** + * @file core_cmFunc.h + * @brief CMSIS Cortex-M Core Function Access Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CMFUNC_H +#define __CORE_CMFUNC_H + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ +*/ + +/*------------------ RealView Compiler -----------------*/ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + +/*------------------ ARM Compiler V6 -------------------*/ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #include "cmsis_armcc_V6.h" + +/*------------------ GNU Compiler ----------------------*/ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + +/*------------------ ICC Compiler ----------------------*/ +#elif defined ( __ICCARM__ ) + #include + +/*------------------ TI CCS Compiler -------------------*/ +#elif defined ( __TMS470__ ) + #include + +/*------------------ TASKING Compiler ------------------*/ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + +/*------------------ COSMIC Compiler -------------------*/ +#elif defined ( __CSMC__ ) + #include + +#endif + +/*@} end of CMSIS_Core_RegAccFunctions */ + +#endif /* __CORE_CMFUNC_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cmInstr.h b/bsp/nrf5x/libraries/cmsis/include/core_cmInstr.h new file mode 100644 index 0000000000..f474b0e6f3 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cmInstr.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * @file core_cmInstr.h + * @brief CMSIS Cortex-M Core Instruction Access Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CMINSTR_H +#define __CORE_CMINSTR_H + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/*------------------ RealView Compiler -----------------*/ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + +/*------------------ ARM Compiler V6 -------------------*/ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #include "cmsis_armcc_V6.h" + +/*------------------ GNU Compiler ----------------------*/ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + +/*------------------ ICC Compiler ----------------------*/ +#elif defined ( __ICCARM__ ) + #include + +/*------------------ TI CCS Compiler -------------------*/ +#elif defined ( __TMS470__ ) + #include + +/*------------------ TASKING Compiler ------------------*/ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + +/*------------------ COSMIC Compiler -------------------*/ +#elif defined ( __CSMC__ ) + #include + +#endif + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + +#endif /* __CORE_CMINSTR_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_cmSimd.h b/bsp/nrf5x/libraries/cmsis/include/core_cmSimd.h new file mode 100644 index 0000000000..66bf5c2a72 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_cmSimd.h @@ -0,0 +1,96 @@ +/**************************************************************************//** + * @file core_cmSimd.h + * @brief CMSIS Cortex-M SIMD Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CMSIMD_H +#define __CORE_CMSIMD_H + +#ifdef __cplusplus + extern "C" { +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +/*------------------ RealView Compiler -----------------*/ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + +/*------------------ ARM Compiler V6 -------------------*/ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #include "cmsis_armcc_V6.h" + +/*------------------ GNU Compiler ----------------------*/ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + +/*------------------ ICC Compiler ----------------------*/ +#elif defined ( __ICCARM__ ) + #include + +/*------------------ TI CCS Compiler -------------------*/ +#elif defined ( __TMS470__ ) + #include + +/*------------------ TASKING Compiler ------------------*/ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + +/*------------------ COSMIC Compiler -------------------*/ +#elif defined ( __CSMC__ ) + #include + +#endif + +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CMSIMD_H */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_sc000.h b/bsp/nrf5x/libraries/cmsis/include/core_sc000.h new file mode 100644 index 0000000000..44db659f84 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_sc000.h @@ -0,0 +1,926 @@ +/**************************************************************************//** + * @file core_sc000.h + * @brief CMSIS SC000 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC000_H_GENERIC +#define __CORE_SC000_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC000 + @{ + */ + +/* CMSIS SC000 definitions */ +#define __SC000_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __SC000_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ + __SC000_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_SC (000U) /*!< Cortex secure core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC000_H_DEPENDANT +#define __CORE_SC000_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC000_REV + #define __SC000_REV 0x0000U + #warning "__SC000_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC000 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED0[1U]; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + uint32_t RESERVED1[154U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the SC000 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of SC000 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/* Interrupt Priorities are WORD accessible only under ARMv6M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/cmsis/include/core_sc300.h b/bsp/nrf5x/libraries/cmsis/include/core_sc300.h new file mode 100644 index 0000000000..5b58f49ea5 --- /dev/null +++ b/bsp/nrf5x/libraries/cmsis/include/core_sc300.h @@ -0,0 +1,1745 @@ +/**************************************************************************//** + * @file core_sc300.h + * @brief CMSIS SC300 Core Peripheral Access Layer Header File + * @version V4.30 + * @date 20. October 2015 + ******************************************************************************/ +/* Copyright (c) 2009 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC300_H_GENERIC +#define __CORE_SC300_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC3000 + @{ + */ + +/* CMSIS SC300 definitions */ +#define __SC300_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ +#define __SC300_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ +#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ + __SC300_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ + +#define __CORTEX_SC (300U) /*!< Cortex secure core */ + + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + #define __STATIC_INLINE static __inline + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ + #define __STATIC_INLINE static inline + +#elif defined ( __TMS470__ ) + #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + #define __STATIC_INLINE static inline + +#elif defined ( __CSMC__ ) + #define __packed + #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ + #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ + #define __STATIC_INLINE static inline + +#else + #error Unknown compiler +#endif + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TMS470__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "core_cmInstr.h" /* Core Instruction Access */ +#include "core_cmFunc.h" /* Core Function Access */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC300_H_DEPENDANT +#define __CORE_SC300_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC300_REV + #define __SC300_REV 0x0000U + #warning "__SC300_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC300 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED1[129U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + uint32_t RESERVED1[1U]; +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ +#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ +#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Cortex-M3 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the NVIC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in NVIC and returns the active bit. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + */ +__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) < 0) + { + return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__STATIC_INLINE void NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for (;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/nrf5x/libraries/drivers/SConscript b/bsp/nrf5x/libraries/drivers/SConscript index c02a3ebfbe..1bd5bdb0a9 100644 --- a/bsp/nrf5x/libraries/drivers/SConscript +++ b/bsp/nrf5x/libraries/drivers/SConscript @@ -8,7 +8,7 @@ cwd = GetCurrentDir() src = Split(""" """) -if GetDepend(['RT_USING_SERIAL']): +if GetDepend(['BSP_USING_UART']): src += ['drv_uart.c'] # src += ['drv_common.c'] diff --git a/bsp/nrf5x/libraries/drivers/drv_uart.c b/bsp/nrf5x/libraries/drivers/drv_uart.c index 49cd01997a..b310fa57a4 100644 --- a/bsp/nrf5x/libraries/drivers/drv_uart.c +++ b/bsp/nrf5x/libraries/drivers/drv_uart.c @@ -1,76 +1,49 @@ -#include "board.h" -#include "drv_uart.h" - -#include "nrf_drv_common.h" -#include "nrf_drv_uart.h" -#include "app_util_platform.h" -#include "nrf_gpio.h" - #include +#include +#include "drv_uart.h" static struct rt_serial_device _serial0_0; -#if USE_UART0_1 -static struct rt_serial_device _serial0_1; -#endif +static void uart_event_hander(nrfx_uart_event_t const *p_event,void *p_context); typedef struct { struct rt_serial_device *serial; - nrf_drv_uart_t uart; + nrfx_uart_t uart; uint32_t rx_pin; uint32_t tx_pin; + nrfx_uart_event_handler_t event_handler; } UART_CFG_T; + UART_CFG_T uart0 = { - .uart = NRF_DRV_UART_INSTANCE(0), + .uart = NRFX_UART_INSTANCE(0), #ifdef RT_USING_CONSOLE .rx_pin = 8, - .tx_pin = 6 + .tx_pin = 6, + .event_handler = uart_event_hander, #else .rx_pin = 19, .tx_pin = 20 #endif }; - -#if USE_UART0_1 -UART_CFG_T uart1 = { - .uart = NRF_DRV_UART_INSTANCE(0), - .rx_pin = 3, - .tx_pin = 4 -}; -#endif - UART_CFG_T *working_cfg = RT_NULL; -void UART0_IRQHandler(void) +static void uart_event_hander(nrfx_uart_event_t const *p_event,void *p_context) { - if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_ERROR) - && nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_ERROR)) - { - nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_ERROR); - } - - if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_RXDRDY) - && nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY)) + + if (p_event->type == NRFX_UART_EVT_RX_DONE) { rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_RX_IND); } - - if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_TXDRDY) - && nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY)) - { - rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_TX_DONE); - } - - if (nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXTO)) + if (p_event->type == NRFX_UART_EVT_TX_DONE) { - rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_RX_TIMEOUT); + } } static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configure *cfg) { - nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG; + nrfx_uart_config_t config = NRFX_UART_DEFAULT_CONFIG(uart0.tx_pin,uart0.rx_pin); UART_CFG_T *instance = &uart0; RT_ASSERT(serial != RT_NULL); @@ -81,7 +54,7 @@ static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configu instance = (UART_CFG_T*)serial->parent.user_data; } - nrf_uart_disable(instance->uart.reg.p_uart); + nrfx_uart_uninit(&(instance->uart)); switch (cfg->baud_rate) { @@ -100,42 +73,24 @@ static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configu if (cfg->parity == PARITY_NONE) { - config.parity = NRF_UART_PARITY_EXCLUDED; + config.hal_cfg.parity = NRF_UART_PARITY_EXCLUDED; } else { - config.parity = NRF_UART_PARITY_INCLUDED; + config.hal_cfg.parity = NRF_UART_PARITY_INCLUDED; } - config.hwfc = NRF_UART_HWFC_DISABLED; - config.interrupt_priority = APP_IRQ_PRIORITY_LOWEST; - config.pselcts = 0; - config.pselrts = 0; + config.hal_cfg.hwfc = NRF_UART_HWFC_DISABLED; config.pselrxd = instance->rx_pin; config.pseltxd = instance->tx_pin; - nrf_gpio_pin_set(config.pseltxd); - nrf_gpio_cfg_output(config.pseltxd); - nrf_gpio_pin_clear(config.pseltxd); - nrf_gpio_cfg_input(config.pselrxd, NRF_GPIO_PIN_NOPULL); - nrf_uart_baudrate_set(instance->uart.reg.p_uart, config.baudrate); - nrf_uart_configure(instance->uart.reg.p_uart, config.parity, config.hwfc); - nrf_uart_txrx_pins_set(instance->uart.reg.p_uart, config.pseltxd, config.pselrxd); - - if (config.hwfc == NRF_UART_HWFC_ENABLED) - { - nrf_uart_hwfc_pins_set(instance->uart.reg.p_uart, config.pselrts, config.pselcts); - } - - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY); - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY); - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXTO); - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_ERROR); - - nrf_uart_int_enable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_RXTO | NRF_UART_INT_MASK_ERROR); - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart), config.interrupt_priority); - nrf_uart_enable(instance->uart.reg.p_uart); - // nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX); + nrfx_uart_init(&(instance->uart), &config, instance->event_handler); + + nrf_uart_int_enable(instance->uart.p_reg, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_RXTO | NRF_UART_INT_MASK_ERROR); + nrf_uart_int_disable(instance->uart.p_reg, NRF_UART_INT_MASK_TXDRDY); + + nrfx_uart_rx_enable(&(instance->uart)); + working_cfg = instance; return RT_EOK; } @@ -155,40 +110,22 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) { /* disable interrupt */ case RT_DEVICE_CTRL_CLR_INT: - nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STOPRX); - nrf_uart_int_disable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY - | NRF_UART_INT_MASK_RXTO - | NRF_UART_INT_MASK_ERROR); - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart)); break; /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY); - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXTO); - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_ERROR); - /* Enable RX interrupt. */ - nrf_uart_int_enable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY - | NRF_UART_INT_MASK_RXTO - | NRF_UART_INT_MASK_ERROR); - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart), APP_IRQ_PRIORITY_LOWEST); - nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX); break; case RT_DEVICE_CTRL_CUSTOM: if ((rt_uint32_t)(arg) == UART_CONFIG_BAUD_RATE_9600) { instance->serial->config.baud_rate = 9600; - nrf_uart_baudrate_set(instance->uart.reg.p_uart, NRF_UART_BAUDRATE_9600); } else if ((rt_uint32_t)(arg) == UART_CONFIG_BAUD_RATE_115200) { instance->serial->config.baud_rate = 115200; - nrf_uart_baudrate_set(instance->uart.reg.p_uart, NRF_UART_BAUDRATE_115200); } - - // _uart_cfg(instance->serial, &(instance->serial->config)); - // nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX); + _uart_cfg(instance->serial, &(instance->serial->config)); break; case RT_DEVICE_CTRL_PIN: @@ -199,12 +136,7 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) break; case RT_DEVICE_POWERSAVE: - nrf_uart_disable(instance->uart.reg.p_uart); - nrf_uart_txrx_pins_disconnect(instance->uart.reg.p_uart); - nrf_gpio_pin_clear(instance->rx_pin); - nrf_gpio_cfg_output(instance->rx_pin); - nrf_gpio_pin_clear(instance->tx_pin); - nrf_gpio_cfg_output(instance->tx_pin); + nrfx_uart_uninit(&(instance->uart)); break; case RT_DEVICE_WAKEUP: @@ -221,7 +153,7 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) static int _uart_putc(struct rt_serial_device *serial, char c) { UART_CFG_T *instance = working_cfg; - + int rtn = 1; RT_ASSERT(serial != RT_NULL); if (serial->parent.user_data != RT_NULL) @@ -229,16 +161,19 @@ static int _uart_putc(struct rt_serial_device *serial, char c) instance = (UART_CFG_T*)serial->parent.user_data; } - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY); - nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTTX); - nrf_uart_txd_set(instance->uart.reg.p_uart, (uint8_t)c); - while (!nrf_uart_event_check(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY)) + nrf_uart_event_clear(instance->uart.p_reg, NRF_UART_EVENT_TXDRDY); + nrf_uart_task_trigger(instance->uart.p_reg, NRF_UART_TASK_STARTTX); + nrf_uart_txd_set(instance->uart.p_reg, (uint8_t)c); + while (!nrf_uart_event_check(instance->uart.p_reg, NRF_UART_EVENT_TXDRDY)) { - } - - return 1; + //wait for TXD send + } + return rtn; } +/* + @note: this function is invaild ,the cause of the problem is [nrfx_uart.c - line 340] +*/ static int _uart_getc(struct rt_serial_device *serial) { int ch = -1; @@ -250,13 +185,9 @@ static int _uart_getc(struct rt_serial_device *serial) { instance = (UART_CFG_T*)serial->parent.user_data; } - - if (nrf_uart_event_check(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY)) - { - nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY); - ch = (int)(nrf_uart_rxd_get(instance->uart.reg.p_uart)); - } - + + ch = (int)(nrf_uart_rxd_get(instance->uart.p_reg)); + return ch; } @@ -276,14 +207,6 @@ void rt_hw_uart_init(void) _serial0_0.ops = &_uart_ops; uart0.serial = &_serial0_0; - rt_hw_serial_register(&_serial0_0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart0); - -#if USE_UART0_1 - config.bufsz = UART0_RB_SIZE; - _serial0_1.config = config; - _serial0_1.ops = &_uart_ops; - uart1.serial = &_serial0_1; - rt_hw_serial_register(&_serial0_1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart1); -#endif + rt_hw_serial_register(&_serial0_0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart0); } diff --git a/bsp/nrf5x/nrf52840/.config b/bsp/nrf5x/nrf52840/.config index e1441d9c6a..36e39de794 100644 --- a/bsp/nrf5x/nrf52840/.config +++ b/bsp/nrf5x/nrf52840/.config @@ -74,7 +74,9 @@ CONFIG_RT_VER_NUM=0x40003 # RT-Thread Components # CONFIG_RT_USING_COMPONENTS_INIT=y -# CONFIG_RT_USING_USER_MAIN is not set +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 # # C++ features @@ -112,7 +114,7 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set CONFIG_RT_USING_SERIAL=y -CONFIG_RT_SERIAL_USING_DMA=y +# CONFIG_RT_SERIAL_USING_DMA is not set CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set @@ -327,6 +329,7 @@ CONFIG_RT_USING_LIBC=y # peripheral libraries and drivers # # CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_STM32_SDIO is not set @@ -338,6 +341,8 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_SIGNAL_LED is not set # CONFIG_PKG_USING_LEDBLINK is not set # CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_INFRARED is not set @@ -357,13 +362,16 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_RC522 is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set # CONFIG_PKG_USING_MAX7219 is not set # CONFIG_PKG_USING_BEEP is not set -CONFIG_PKG_USING_NRF5X_SDK=y -CONFIG_PKG_NRF5X_SDK_PATH="/packages/peripherals/nrf5x_sdk" -# CONFIG_PKG_USING_NRF5X_SDK_V1300 is not set -CONFIG_PKG_USING_NRF5X_SDK_LATEST_VERSION=y -CONFIG_PKG_NRF5X_SDK_VER="latest" +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +CONFIG_PKG_USING_NRFX=y +CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx" +CONFIG_PKG_USING_NRFX_V210=y +# CONFIG_PKG_USING_NRFX_LATEST_VERSION is not set +CONFIG_PKG_NRFX_VER="v2.1.0" # # miscellaneous packages @@ -409,12 +417,12 @@ CONFIG_SOC_NRF52840=y # # Onboard Peripheral Drivers # -CONFIG_BSP_USING_JLINK_TO_USART=y +# CONFIG_BSP_USING_JLINK_TO_USART is not set # # On-chip Peripheral Drivers # -CONFIG_BSP_USING_GPIO=y +# CONFIG_BSP_USING_GPIO is not set CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART0=y # CONFIG_BSP_USING_UART1 is not set diff --git a/bsp/nrf5x/nrf52840/SConstruct b/bsp/nrf5x/nrf52840/SConstruct index 20d41c40ae..2ac1ce6674 100644 --- a/bsp/nrf5x/nrf52840/SConstruct +++ b/bsp/nrf5x/nrf52840/SConstruct @@ -50,5 +50,8 @@ objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) # include drivers objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript'))) +# include cmsis +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'cmsis', 'SConscript'))) + # make a building DoBuilding(TARGET, objs) diff --git a/bsp/nrf5x/nrf52840/applications/application.c b/bsp/nrf5x/nrf52840/applications/application.c index 1135d82e16..ce53a6dce9 100644 --- a/bsp/nrf5x/nrf52840/applications/application.c +++ b/bsp/nrf5x/nrf52840/applications/application.c @@ -25,23 +25,24 @@ #include #endif -void rt_init_thread_entry(void* parameter) -{ - extern rt_err_t ble_init(void); - - ble_init(); -} +#include +#define DK_BOARD_LED_1 13 -int rt_application_init(void) +int main(void) { - rt_thread_t tid; - - tid = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024, - RT_THREAD_PRIORITY_MAX / 3, 20); - if (tid != RT_NULL) - rt_thread_startup(tid); - - return 0; + int count = 1; + nrf_gpio_cfg_output(DK_BOARD_LED_1); + + while (count++) + { + nrf_gpio_pin_set(DK_BOARD_LED_1); + rt_thread_mdelay(500); + + nrf_gpio_pin_clear(DK_BOARD_LED_1); + rt_thread_mdelay(500); + + } + return RT_EOK; } diff --git a/bsp/nrf5x/nrf52840/applications/ble_nus_app.c b/bsp/nrf5x/nrf52840/applications/ble_nus_app.c deleted file mode 100644 index f4a51493ed..0000000000 --- a/bsp/nrf5x/nrf52840/applications/ble_nus_app.c +++ /dev/null @@ -1,670 +0,0 @@ -#include "nordic_common.h" -#include "nrf.h" -#include "ble_hci.h" -#include "ble_advdata.h" -#include "ble_advertising.h" -#include "ble_conn_params.h" -#include "softdevice_handler.h" -#include "nrf_ble_gatt.h" -#include "app_timer.h" -#include "ble_nus.h" -#include "app_util_platform.h" - -#include - -typedef rt_size_t (*BLE_NOTIFY_T)(rt_uint8_t *buf, rt_uint16_t size); - -#define STACK_EVT_MQ_NUM 10 - -#define FAST_ADV() \ - do { \ - uint32_t err_code; \ - err_code = ble_advertising_start(BLE_ADV_MODE_FAST); \ - APP_ERROR_CHECK(err_code); \ - } while(0) - -typedef enum -{ - STACK_EV_DISCON = 1, - STACK_EV_DISPATCH = 2, - STACK_EV_KEY = 4, -} STACK_EV_E; - -typedef struct -{ - rt_list_t node; - void* evt; -} evt_list_t; - -typedef enum -{ - STACK_STATE_IDLE = 0, - STACK_STATE_ADV = 1, - STACK_STATE_CON = 2, - STACK_STATE_DISC = 3 -} STACK_STATE_E; - -STACK_STATE_E stack_state = STACK_STATE_IDLE; - -rt_event_t stack_event; -rt_sem_t sd_evt_sem; -rt_mq_t stack_evt_mq; -rt_uint8_t *evt_sample; - -BLE_NOTIFY_T rx_notify = RT_NULL; - -// Low frequency clock source to be used by the SoftDevice -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} - - -#define CONN_CFG_TAG 1 /**< A tag that refers to the BLE stack configuration we set with @ref sd_ble_cfg_set. Default tag is @ref BLE_CONN_CFG_TAG_DEFAULT. */ - -#define APP_FEATURE_NOT_SUPPORTED BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2 /**< Reply when unsupported features are requested. */ - -#define DEVICE_NAME "Nordic_UART" /**< Name of device. Will be included in the advertising data. */ -#define NUS_SERVICE_UUID_TYPE BLE_UUID_TYPE_VENDOR_BEGIN /**< UUID type for the Nordic UART Service (vendor specific). */ - -#define APP_ADV_INTERVAL 64 /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */ -#define APP_ADV_TIMEOUT_IN_SECONDS 30 /**< The advertising timeout (in units of seconds). */ - -#define MIN_CONN_INTERVAL MSEC_TO_UNITS(20, UNIT_1_25_MS) /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */ -#define MAX_CONN_INTERVAL MSEC_TO_UNITS(75, UNIT_1_25_MS) /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */ -#define SLAVE_LATENCY 0 /**< Slave latency. */ -#define CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */ -#define FIRST_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(5000) /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */ -#define NEXT_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(30000) /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */ -#define MAX_CONN_PARAMS_UPDATE_COUNT 3 /**< Number of attempts before giving up the connection parameter negotiation. */ - -#define DEAD_BEEF 0xDEADBEEF /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */ - -#define UART_TX_BUF_SIZE 256 /**< UART TX buffer size. */ -#define UART_RX_BUF_SIZE 256 /**< UART RX buffer size. */ - -static ble_nus_t m_nus; /**< Structure to identify the Nordic UART Service. */ -static uint16_t m_conn_handle = BLE_CONN_HANDLE_INVALID; /**< Handle of the current connection. */ - -static nrf_ble_gatt_t m_gatt; /**< GATT module instance. */ -static ble_uuid_t m_adv_uuids[] = {{BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}}; /**< Universally unique service identifier. */ -static uint16_t m_ble_nus_max_data_len = BLE_GATT_ATT_MTU_DEFAULT - 3; /**< Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */ - -/**@brief Function for assert macro callback. - * - * @details This function will be called in case of an assert in the SoftDevice. - * - * @warning This handler is an example only and does not fit a final product. You need to analyse - * how your product is supposed to react in case of Assert. - * @warning On assert from the SoftDevice, the system can only recover on reset. - * - * @param[in] line_num Line number of the failing ASSERT call. - * @param[in] p_file_name File name of the failing ASSERT call. - */ -void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name) -{ - app_error_handler(DEAD_BEEF, line_num, p_file_name); -} - - -/**@brief Function for the GAP initialization. - * - * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of - * the device. It also sets the permissions and appearance. - */ -static void gap_params_init(void) -{ - uint32_t err_code; - ble_gap_conn_params_t gap_conn_params; - ble_gap_conn_sec_mode_t sec_mode; - - BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode); - - err_code = sd_ble_gap_device_name_set(&sec_mode, - (const uint8_t *) DEVICE_NAME, - strlen(DEVICE_NAME)); - APP_ERROR_CHECK(err_code); - - memset(&gap_conn_params, 0, sizeof(gap_conn_params)); - - gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL; - gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL; - gap_conn_params.slave_latency = SLAVE_LATENCY; - gap_conn_params.conn_sup_timeout = CONN_SUP_TIMEOUT; - - err_code = sd_ble_gap_ppcp_set(&gap_conn_params); - APP_ERROR_CHECK(err_code); -} - - -/**@brief Function for handling the data from the Nordic UART Service. - * - * @details This function will process the data received from the Nordic UART BLE Service and send - * it to the UART module. - * - * @param[in] p_nus Nordic UART Service structure. - * @param[in] p_data Data to be send to UART module. - * @param[in] length Length of the data. - */ -/**@snippet [Handling the data received over BLE] */ -static void nus_data_handler(ble_nus_t * p_nus, uint8_t * p_data, uint16_t length) -{ - rt_kprintf("Received data from BLE NUS. Writing data on UART.\r\n"); - - for (uint32_t i = 0; i < length; i++) - { - rt_kprintf("%02x ", p_data[i]); - } - - // ble_send(p_data, length); - - if (rx_notify != RT_NULL) - { - rx_notify(p_data, length); - } -} -/**@snippet [Handling the data received over BLE] */ - - -/**@brief Function for initializing services that will be used by the application. - */ -static void services_init(void) -{ - uint32_t err_code; - ble_nus_init_t nus_init; - - memset(&nus_init, 0, sizeof(nus_init)); - - nus_init.data_handler = nus_data_handler; - - err_code = ble_nus_init(&m_nus, &nus_init); - APP_ERROR_CHECK(err_code); -} - - -/**@brief Function for handling an event from the Connection Parameters Module. - * - * @details This function will be called for all events in the Connection Parameters Module - * which are passed to the application. - * - * @note All this function does is to disconnect. This could have been done by simply setting - * the disconnect_on_fail config parameter, but instead we use the event handler - * mechanism to demonstrate its use. - * - * @param[in] p_evt Event received from the Connection Parameters Module. - */ -static void on_conn_params_evt(ble_conn_params_evt_t * p_evt) -{ - uint32_t err_code; - - if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED) - { - err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE); - APP_ERROR_CHECK(err_code); - } -} - - -/**@brief Function for handling errors from the Connection Parameters module. - * - * @param[in] nrf_error Error code containing information about what went wrong. - */ -static void conn_params_error_handler(uint32_t nrf_error) -{ - APP_ERROR_HANDLER(nrf_error); -} - - -/**@brief Function for initializing the Connection Parameters module. - */ -static void conn_params_init(void) -{ - uint32_t err_code; - ble_conn_params_init_t cp_init; - - memset(&cp_init, 0, sizeof(cp_init)); - - cp_init.p_conn_params = NULL; - cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY; - cp_init.next_conn_params_update_delay = NEXT_CONN_PARAMS_UPDATE_DELAY; - cp_init.max_conn_params_update_count = MAX_CONN_PARAMS_UPDATE_COUNT; - cp_init.start_on_notify_cccd_handle = BLE_GATT_HANDLE_INVALID; - cp_init.disconnect_on_fail = false; - cp_init.evt_handler = on_conn_params_evt; - cp_init.error_handler = conn_params_error_handler; - - err_code = ble_conn_params_init(&cp_init); - APP_ERROR_CHECK(err_code); -} - -/**@brief Function for handling advertising events. - * - * @details This function will be called for advertising events which are passed to the application. - * - * @param[in] ble_adv_evt Advertising event. - */ -static void on_adv_evt(ble_adv_evt_t ble_adv_evt) -{ - // uint32_t err_code; - - switch (ble_adv_evt) - { - case BLE_ADV_EVT_FAST: - // err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING); - // APP_ERROR_CHECK(err_code); - stack_state = STACK_STATE_ADV; - rt_kprintf("ble fast advert\n"); - break; - case BLE_ADV_EVT_IDLE: - // sleep_mode_enter(); - stack_state = STACK_STATE_IDLE; - rt_kprintf("advert idle\n"); - break; - default: - break; - } -} - - -/**@brief Function for the application's SoftDevice event handler. - * - * @param[in] p_ble_evt SoftDevice event. - */ -static void on_ble_evt(ble_evt_t * p_ble_evt) -{ - uint32_t err_code; - - switch (p_ble_evt->header.evt_id) - { - case BLE_GAP_EVT_CONNECTED: - // err_code = bsp_indication_set(BSP_INDICATE_CONNECTED); - // APP_ERROR_CHECK(err_code); - m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle; - stack_state = STACK_STATE_CON; - rt_kprintf("Connected\r\n"); - break; // BLE_GAP_EVT_CONNECTED - - case BLE_GAP_EVT_DISCONNECTED: - // err_code = bsp_indication_set(BSP_INDICATE_IDLE); - // APP_ERROR_CHECK(err_code); - m_conn_handle = BLE_CONN_HANDLE_INVALID; - stack_state = STACK_STATE_DISC; - rt_kprintf("Disconnected\r\n"); - break; // BLE_GAP_EVT_DISCONNECTED - - case BLE_GAP_EVT_SEC_PARAMS_REQUEST: - // Pairing not supported - err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL); - APP_ERROR_CHECK(err_code); - break; // BLE_GAP_EVT_SEC_PARAMS_REQUEST - - case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST: - { - ble_gap_data_length_params_t dl_params; - - // Clearing the struct will effectivly set members to @ref BLE_GAP_DATA_LENGTH_AUTO - memset(&dl_params, 0, sizeof(ble_gap_data_length_params_t)); - err_code = sd_ble_gap_data_length_update(p_ble_evt->evt.gap_evt.conn_handle, &dl_params, NULL); - APP_ERROR_CHECK(err_code); - } break; - - case BLE_GATTS_EVT_SYS_ATTR_MISSING: - // No system attributes have been stored. - err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0); - APP_ERROR_CHECK(err_code); - break; // BLE_GATTS_EVT_SYS_ATTR_MISSING - - case BLE_GATTC_EVT_TIMEOUT: - // Disconnect on GATT Client timeout event. - err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle, - BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); - APP_ERROR_CHECK(err_code); - break; // BLE_GATTC_EVT_TIMEOUT - - case BLE_GATTS_EVT_TIMEOUT: - // Disconnect on GATT Server timeout event. - err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle, - BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); - APP_ERROR_CHECK(err_code); - break; // BLE_GATTS_EVT_TIMEOUT - - case BLE_EVT_USER_MEM_REQUEST: - err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL); - APP_ERROR_CHECK(err_code); - break; // BLE_EVT_USER_MEM_REQUEST - - case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST: - { - ble_gatts_evt_rw_authorize_request_t req; - ble_gatts_rw_authorize_reply_params_t auth_reply; - - req = p_ble_evt->evt.gatts_evt.params.authorize_request; - - if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID) - { - if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ) || - (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) || - (req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL)) - { - if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE) - { - auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE; - } - else - { - auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ; - } - auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED; - err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle, - &auth_reply); - APP_ERROR_CHECK(err_code); - } - } - } break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST - - default: - // No implementation needed. - break; - } -} - - -/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice - * event handler. - * - * @details This function is called from the SoftDevice event interrupt handler after a - * SoftDevice event has been received. - * - * @param[in] p_ble_evt SoftDevice event. - */ -static void ble_evt_dispatch(ble_evt_t * p_ble_evt) -{ - if (rt_mq_send(stack_evt_mq, p_ble_evt, p_ble_evt->header.evt_len) != RT_EOK) - { - rt_kprintf("dispatch malloc failure\n"); - } - else - { - rt_event_send(stack_event, STACK_EV_DISPATCH); - } -} - -static rt_err_t evt_dispatch_worker(void) -{ - ble_evt_t * p_ble_evt = (ble_evt_t *)evt_sample; - rt_err_t err; - - err = rt_mq_recv(stack_evt_mq, (void*)evt_sample, BLE_STACK_EVT_MSG_BUF_SIZE, RT_WAITING_NO); - - if (RT_EOK == err) - { - ble_conn_params_on_ble_evt(p_ble_evt); - nrf_ble_gatt_on_ble_evt(&m_gatt, p_ble_evt); - ble_nus_on_ble_evt(&m_nus, p_ble_evt); - on_ble_evt(p_ble_evt); - ble_advertising_on_ble_evt(p_ble_evt); - // bsp_btn_ble_on_ble_evt(p_ble_evt); - - rt_kprintf("ble evt dispatch\n"); - } - - return err; -} - -static uint32_t _softdevice_evt_schedule(void) -{ - rt_sem_release(sd_evt_sem); - - return NRF_SUCCESS; -} - -/**@brief Function for the SoftDevice initialization. - * - * @details This function initializes the SoftDevice and the BLE event interrupt. - */ -static void ble_stack_init(void) -{ - uint32_t err_code; - - nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC; - - // Initialize SoftDevice. - SOFTDEVICE_HANDLER_INIT(&clock_lf_cfg, _softdevice_evt_schedule); - - // Fetch the start address of the application RAM. - uint32_t ram_start = 0; - err_code = softdevice_app_ram_start_get(&ram_start); - APP_ERROR_CHECK(err_code); - - // Overwrite some of the default configurations for the BLE stack. - ble_cfg_t ble_cfg; - - // Configure the maximum number of connections. - memset(&ble_cfg, 0, sizeof(ble_cfg)); - ble_cfg.gap_cfg.role_count_cfg.periph_role_count = BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT; - ble_cfg.gap_cfg.role_count_cfg.central_role_count = 0; - ble_cfg.gap_cfg.role_count_cfg.central_sec_count = 0; - err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, ram_start); - APP_ERROR_CHECK(err_code); - - // Configure the maximum ATT MTU. - memset(&ble_cfg, 0x00, sizeof(ble_cfg)); - ble_cfg.conn_cfg.conn_cfg_tag = CONN_CFG_TAG; - ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_BLE_GATT_MAX_MTU_SIZE; - err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, ram_start); - APP_ERROR_CHECK(err_code); - - // Configure the maximum event length. - memset(&ble_cfg, 0x00, sizeof(ble_cfg)); - ble_cfg.conn_cfg.conn_cfg_tag = CONN_CFG_TAG; - ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = 320; - ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count = BLE_GAP_CONN_COUNT_DEFAULT; - err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, ram_start); - APP_ERROR_CHECK(err_code); - - // Enable BLE stack. - err_code = softdevice_enable(&ram_start); - APP_ERROR_CHECK(err_code); - - // Subscribe for BLE events. - err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch); - APP_ERROR_CHECK(err_code); -} - -/**@brief Function for handling events from the GATT library. */ -static void gatt_evt_handler(nrf_ble_gatt_t * p_gatt, const nrf_ble_gatt_evt_t * p_evt) -{ - if ((m_conn_handle == p_evt->conn_handle) && (p_evt->evt_id == NRF_BLE_GATT_EVT_ATT_MTU_UPDATED)) - { - m_ble_nus_max_data_len = p_evt->params.att_mtu_effective - OPCODE_LENGTH - HANDLE_LENGTH; - rt_kprintf("Data len is set to 0x%X(%d)\r\n", m_ble_nus_max_data_len, m_ble_nus_max_data_len); - } - rt_kprintf("ATT MTU exchange completed. central 0x%x peripheral 0x%x\r\n", p_gatt->att_mtu_desired_central, p_gatt->att_mtu_desired_periph); -} - -/**@brief Function for initializing the GATT library. */ -static void gatt_init(void) -{ - ret_code_t err_code; - - err_code = nrf_ble_gatt_init(&m_gatt, gatt_evt_handler); - APP_ERROR_CHECK(err_code); - - err_code = nrf_ble_gatt_att_mtu_periph_set(&m_gatt, 64); - APP_ERROR_CHECK(err_code); -} - -/**@brief Function for initializing the Advertising functionality. - */ -static void advertising_init(void) -{ - uint32_t err_code; - ble_advdata_t advdata; - ble_advdata_t scanrsp; - ble_adv_modes_config_t options; - - // Build advertising data struct to pass into @ref ble_advertising_init. - memset(&advdata, 0, sizeof(advdata)); - advdata.name_type = BLE_ADVDATA_FULL_NAME; - advdata.include_appearance = false; - advdata.flags = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE; - - memset(&scanrsp, 0, sizeof(scanrsp)); - scanrsp.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]); - scanrsp.uuids_complete.p_uuids = m_adv_uuids; - - memset(&options, 0, sizeof(options)); - options.ble_adv_fast_enabled = true; - options.ble_adv_fast_interval = APP_ADV_INTERVAL; - options.ble_adv_fast_timeout = APP_ADV_TIMEOUT_IN_SECONDS; - - err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL); - APP_ERROR_CHECK(err_code); - - ble_advertising_conn_cfg_tag_set(CONN_CFG_TAG); -} - -/**@brief Function for handling app_uart events. - * - * @details This function will receive a single character from the app_uart module and append it to - * a string. The string will be be sent over BLE when the last character received was a - * 'new line' '\n' (hex 0x0A) or if the string has reached the maximum data length. - */ -/**@snippet [Handling the data received over UART] */ -void uart_event_handle(rt_device_t uart) -{ - uint8_t data_array[BLE_NUS_MAX_DATA_LEN]; - rt_size_t size = 0; - uint32_t err_code; - - size = rt_device_read(uart, 0, data_array, BLE_NUS_MAX_DATA_LEN); - - if (size <= 0) - { - return; - } - - do - { - err_code = ble_nus_string_send(&m_nus, data_array, size); - if ( (err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_BUSY) ) - { - APP_ERROR_CHECK(err_code); - } - } while (err_code == NRF_ERROR_BUSY); -} -/**@snippet [Handling the data received over UART] */ - -/**@brief Function for initializing the UART module. - */ -/**@snippet [UART Initialization] */ -static rt_bool_t _stack_init(void) -{ - uint32_t err_code; - - stack_event = rt_event_create("stackev", RT_IPC_FLAG_FIFO); - sd_evt_sem = rt_sem_create("sdsem", 0, RT_IPC_FLAG_FIFO); - stack_evt_mq = rt_mq_create("stackmq", BLE_STACK_EVT_MSG_BUF_SIZE, STACK_EVT_MQ_NUM, RT_IPC_FLAG_FIFO); - evt_sample = rt_malloc(BLE_STACK_EVT_MSG_BUF_SIZE); - - if (!stack_event || !sd_evt_sem || !stack_evt_mq || !evt_sample) - { - rt_kprintf("uart rx sem create failure\n"); - return RT_FALSE; - } - - // Initialize. - err_code = app_timer_init(); - APP_ERROR_CHECK(err_code); - - ble_stack_init(); - gap_params_init(); - gatt_init(); - services_init(); - advertising_init(); - conn_params_init(); - - return RT_TRUE; -} - -/**@brief Application main function. - */ -static void _stack_thread(void *parameter) -{ - rt_tick_t next_timeout = (rt_tick_t)RT_WAITING_FOREVER; - - FAST_ADV(); - // Enter main loop. - for (;;) - { - rt_uint32_t event = 0; - rt_tick_t dispatch_timeout = RT_WAITING_NO; - - rt_event_recv(stack_event, STACK_EV_DISCON | STACK_EV_DISPATCH | STACK_EV_KEY, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, next_timeout, &event); - - if (evt_dispatch_worker() != RT_EOK) - { - dispatch_timeout = (rt_tick_t)RT_WAITING_FOREVER; - } - - if (event & STACK_EV_DISCON) - { - if (BLE_CONN_HANDLE_INVALID != m_conn_handle) - { - sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION); - } - } - - if (event & STACK_EV_KEY) - { - if (stack_state != STACK_STATE_CON && stack_state != STACK_STATE_ADV) - { - FAST_ADV(); - } - } - - next_timeout = (rt_tick_t)RT_WAITING_FOREVER; - - if (dispatch_timeout < next_timeout) - { - next_timeout = dispatch_timeout; - } - } -} - -static void _softdevice_thread(void* parameter) -{ - for (;;) - { - rt_sem_take(sd_evt_sem, RT_WAITING_FOREVER); - intern_softdevice_events_execute(); - } -} - -rt_err_t ble_init(void) -{ - rt_thread_t thread; - - _stack_init(); - - thread = rt_thread_create("sdth", _softdevice_thread, RT_NULL, 512, 0, 10); - - if (thread != RT_NULL) - { - rt_thread_startup(thread); - } - else - { - return RT_ERROR; - } - - thread = rt_thread_create("bleth", _stack_thread, RT_NULL, 2048, 1, 10); - - if (thread != RT_NULL) - { - return rt_thread_startup(thread); - } - - return RT_ERROR; -} diff --git a/bsp/nrf5x/nrf52840/applications/sdk_config.h b/bsp/nrf5x/nrf52840/applications/sdk_config.h deleted file mode 100644 index 72abeeed7c..0000000000 --- a/bsp/nrf5x/nrf52840/applications/sdk_config.h +++ /dev/null @@ -1,3991 +0,0 @@ - - -#ifndef SDK_CONFIG_H -#define SDK_CONFIG_H -// <<< Use Configuration Wizard in Context Menu >>>\n -#ifdef USE_APP_CONFIG -#include "app_config.h" -#endif -// nRF_BLE - -//========================================================== -// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module - - -#ifndef BLE_ADVERTISING_ENABLED -#define BLE_ADVERTISING_ENABLED 1 -#endif - -// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands - - -#ifndef BLE_DTM_ENABLED -#define BLE_DTM_ENABLED 0 -#endif - -// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library - - -#ifndef BLE_RACP_ENABLED -#define BLE_RACP_ENABLED 0 -#endif - -// NRF_BLE_GATT_ENABLED - nrf_ble_gatt - GATT module -//========================================================== -#ifndef NRF_BLE_GATT_ENABLED -#define NRF_BLE_GATT_ENABLED 1 -#endif -#if NRF_BLE_GATT_ENABLED -// NRF_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size that is passed to the @ref sd_ble_enable function. -#ifndef NRF_BLE_GATT_MAX_MTU_SIZE -#define NRF_BLE_GATT_MAX_MTU_SIZE 158 -#endif - -#endif //NRF_BLE_GATT_ENABLED -// - -// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) - - -#ifndef NRF_BLE_QWR_ENABLED -#define NRF_BLE_QWR_ENABLED 0 -#endif - -// PEER_MANAGER_ENABLED - peer_manager - Peer Manager - - -#ifndef PEER_MANAGER_ENABLED -#define PEER_MANAGER_ENABLED 0 -#endif - -// -//========================================================== - -// nRF_BLE_Services - -//========================================================== -// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client - - -#ifndef BLE_ANCS_C_ENABLED -#define BLE_ANCS_C_ENABLED 0 -#endif - -// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client - - -#ifndef BLE_ANS_C_ENABLED -#define BLE_ANS_C_ENABLED 0 -#endif - -// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client - - -#ifndef BLE_BAS_C_ENABLED -#define BLE_BAS_C_ENABLED 0 -#endif - -// BLE_BAS_ENABLED - ble_bas - Battery Service - - -#ifndef BLE_BAS_ENABLED -#define BLE_BAS_ENABLED 0 -#endif - -// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service - - -#ifndef BLE_CSCS_ENABLED -#define BLE_CSCS_ENABLED 0 -#endif - -// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client - - -#ifndef BLE_CTS_C_ENABLED -#define BLE_CTS_C_ENABLED 0 -#endif - -// BLE_DIS_ENABLED - ble_dis - Device Information Service - - -#ifndef BLE_DIS_ENABLED -#define BLE_DIS_ENABLED 0 -#endif - -// BLE_GLS_ENABLED - ble_gls - Glucose Service - - -#ifndef BLE_GLS_ENABLED -#define BLE_GLS_ENABLED 0 -#endif - -// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service - - -#ifndef BLE_HIDS_ENABLED -#define BLE_HIDS_ENABLED 0 -#endif - -// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client -//========================================================== -#ifndef BLE_HRS_C_ENABLED -#define BLE_HRS_C_ENABLED 0 -#endif -#if BLE_HRS_C_ENABLED -// BLE_HRS_C_RR_INTERVALS_MAX_CNT - Maximum number of RR_INTERVALS per notification to be decoded -#ifndef BLE_HRS_C_RR_INTERVALS_MAX_CNT -#define BLE_HRS_C_RR_INTERVALS_MAX_CNT 30 -#endif - -#endif //BLE_HRS_C_ENABLED -// - -// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service - - -#ifndef BLE_HRS_ENABLED -#define BLE_HRS_ENABLED 0 -#endif - -// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service - - -#ifndef BLE_HTS_ENABLED -#define BLE_HTS_ENABLED 0 -#endif - -// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client - - -#ifndef BLE_IAS_C_ENABLED -#define BLE_IAS_C_ENABLED 0 -#endif - -// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service - - -#ifndef BLE_IAS_ENABLED -#define BLE_IAS_ENABLED 0 -#endif - -// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client - - -#ifndef BLE_LBS_C_ENABLED -#define BLE_LBS_C_ENABLED 0 -#endif - -// BLE_LBS_ENABLED - ble_lbs - LED Button Service - - -#ifndef BLE_LBS_ENABLED -#define BLE_LBS_ENABLED 0 -#endif - -// BLE_LLS_ENABLED - ble_lls - Link Loss Service - - -#ifndef BLE_LLS_ENABLED -#define BLE_LLS_ENABLED 0 -#endif - -// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service - - -#ifndef BLE_NUS_C_ENABLED -#define BLE_NUS_C_ENABLED 0 -#endif - -// BLE_NUS_ENABLED - ble_nus - Nordic UART Service - - -#ifndef BLE_NUS_ENABLED -#define BLE_NUS_ENABLED 1 -#endif - -// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client - - -#ifndef BLE_RSCS_C_ENABLED -#define BLE_RSCS_C_ENABLED 0 -#endif - -// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service - - -#ifndef BLE_RSCS_ENABLED -#define BLE_RSCS_ENABLED 0 -#endif - -// BLE_TPS_ENABLED - ble_tps - TX Power Service - - -#ifndef BLE_TPS_ENABLED -#define BLE_TPS_ENABLED 0 -#endif - -// -//========================================================== - -// nRF_Drivers - -//========================================================== -// APP_USBD_ENABLED - app_usbd - USB Device library -//========================================================== -#ifndef APP_USBD_ENABLED -#define APP_USBD_ENABLED 0 -#endif -#if APP_USBD_ENABLED -// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> - - -// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ - -#ifndef APP_USBD_VID -#define APP_USBD_VID 0 -#endif - -// APP_USBD_PID - Product ID <0x0000-0xFFFF> - - -// Selected Product ID - -#ifndef APP_USBD_PID -#define APP_USBD_PID 0 -#endif - -// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> - - -// Device version, will be converted automatically to BCD notation. Use just decimal values. - -#ifndef APP_USBD_DEVICE_VER_MAJOR -#define APP_USBD_DEVICE_VER_MAJOR 1 -#endif - -// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> - - -// Device version, will be converted automatically to BCD notation. Use just decimal values. - -#ifndef APP_USBD_DEVICE_VER_MINOR -#define APP_USBD_DEVICE_VER_MINOR 0 -#endif - -#endif //APP_USBD_ENABLED -// - -// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver -//========================================================== -#ifndef CLOCK_ENABLED -#define CLOCK_ENABLED 1 -#endif -#if CLOCK_ENABLED -// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency - -// <0=> Default (64 MHz) - -#ifndef CLOCK_CONFIG_XTAL_FREQ -#define CLOCK_CONFIG_XTAL_FREQ 0 -#endif - -// CLOCK_CONFIG_LF_SRC - LF Clock Source - -// <0=> RC -// <1=> XTAL -// <2=> Synth - -#ifndef CLOCK_CONFIG_LF_SRC -#define CLOCK_CONFIG_LF_SRC 1 -#endif - -// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef CLOCK_CONFIG_IRQ_PRIORITY -#define CLOCK_CONFIG_IRQ_PRIORITY 7 -#endif - -// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef CLOCK_CONFIG_LOG_ENABLED -#define CLOCK_CONFIG_LOG_ENABLED 0 -#endif -#if CLOCK_CONFIG_LOG_ENABLED -// CLOCK_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef CLOCK_CONFIG_LOG_LEVEL -#define CLOCK_CONFIG_LOG_LEVEL 3 -#endif - -// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef CLOCK_CONFIG_INFO_COLOR -#define CLOCK_CONFIG_INFO_COLOR 0 -#endif - -// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef CLOCK_CONFIG_DEBUG_COLOR -#define CLOCK_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //CLOCK_CONFIG_LOG_ENABLED -// - -#endif //CLOCK_ENABLED -// - -// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver -//========================================================== -#ifndef COMP_ENABLED -#define COMP_ENABLED 0 -#endif -#if COMP_ENABLED -// COMP_CONFIG_REF - Reference voltage - -// <0=> Internal 1.2V -// <1=> Internal 1.8V -// <2=> Internal 2.4V -// <4=> VDD -// <7=> ARef - -#ifndef COMP_CONFIG_REF -#define COMP_CONFIG_REF 1 -#endif - -// COMP_CONFIG_MAIN_MODE - Main mode - -// <0=> Single ended -// <1=> Differential - -#ifndef COMP_CONFIG_MAIN_MODE -#define COMP_CONFIG_MAIN_MODE 0 -#endif - -// COMP_CONFIG_SPEED_MODE - Speed mode - -// <0=> Low power -// <1=> Normal -// <2=> High speed - -#ifndef COMP_CONFIG_SPEED_MODE -#define COMP_CONFIG_SPEED_MODE 2 -#endif - -// COMP_CONFIG_HYST - Hystheresis - -// <0=> No -// <1=> 50mV - -#ifndef COMP_CONFIG_HYST -#define COMP_CONFIG_HYST 0 -#endif - -// COMP_CONFIG_ISOURCE - Current Source - -// <0=> Off -// <1=> 2.5 uA -// <2=> 5 uA -// <3=> 10 uA - -#ifndef COMP_CONFIG_ISOURCE -#define COMP_CONFIG_ISOURCE 0 -#endif - -// COMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef COMP_CONFIG_INPUT -#define COMP_CONFIG_INPUT 0 -#endif - -// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef COMP_CONFIG_IRQ_PRIORITY -#define COMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// COMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef COMP_CONFIG_LOG_ENABLED -#define COMP_CONFIG_LOG_ENABLED 0 -#endif -#if COMP_CONFIG_LOG_ENABLED -// COMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef COMP_CONFIG_LOG_LEVEL -#define COMP_CONFIG_LOG_LEVEL 3 -#endif - -// COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMP_CONFIG_INFO_COLOR -#define COMP_CONFIG_INFO_COLOR 0 -#endif - -// COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMP_CONFIG_DEBUG_COLOR -#define COMP_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //COMP_CONFIG_LOG_ENABLED -// - -#endif //COMP_ENABLED -// - -// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver -//========================================================== -#ifndef EGU_ENABLED -#define EGU_ENABLED 0 -#endif -#if EGU_ENABLED -// SWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SWI_CONFIG_LOG_ENABLED -#define SWI_CONFIG_LOG_ENABLED 0 -#endif -#if SWI_CONFIG_LOG_ENABLED -// SWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SWI_CONFIG_LOG_LEVEL -#define SWI_CONFIG_LOG_LEVEL 3 -#endif - -// SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_INFO_COLOR -#define SWI_CONFIG_INFO_COLOR 0 -#endif - -// SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_DEBUG_COLOR -#define SWI_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //SWI_CONFIG_LOG_ENABLED -// - -#endif //EGU_ENABLED -// - -// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver -//========================================================== -#ifndef GPIOTE_ENABLED -#define GPIOTE_ENABLED 1 -#endif -#if GPIOTE_ENABLED -// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins -#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4 -#endif - -// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef GPIOTE_CONFIG_IRQ_PRIORITY -#define GPIOTE_CONFIG_IRQ_PRIORITY 7 -#endif - -// GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef GPIOTE_CONFIG_LOG_ENABLED -#define GPIOTE_CONFIG_LOG_ENABLED 0 -#endif -#if GPIOTE_CONFIG_LOG_ENABLED -// GPIOTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef GPIOTE_CONFIG_LOG_LEVEL -#define GPIOTE_CONFIG_LOG_LEVEL 3 -#endif - -// GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef GPIOTE_CONFIG_INFO_COLOR -#define GPIOTE_CONFIG_INFO_COLOR 0 -#endif - -// GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef GPIOTE_CONFIG_DEBUG_COLOR -#define GPIOTE_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //GPIOTE_CONFIG_LOG_ENABLED -// - -#endif //GPIOTE_ENABLED -// - -// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver -//========================================================== -#ifndef I2S_ENABLED -#define I2S_ENABLED 0 -#endif -#if I2S_ENABLED -// I2S_CONFIG_SCK_PIN - SCK pin <0-31> - - -#ifndef I2S_CONFIG_SCK_PIN -#define I2S_CONFIG_SCK_PIN 31 -#endif - -// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> - - -#ifndef I2S_CONFIG_LRCK_PIN -#define I2S_CONFIG_LRCK_PIN 30 -#endif - -// I2S_CONFIG_MCK_PIN - MCK pin -#ifndef I2S_CONFIG_MCK_PIN -#define I2S_CONFIG_MCK_PIN 255 -#endif - -// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> - - -#ifndef I2S_CONFIG_SDOUT_PIN -#define I2S_CONFIG_SDOUT_PIN 29 -#endif - -// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> - - -#ifndef I2S_CONFIG_SDIN_PIN -#define I2S_CONFIG_SDIN_PIN 28 -#endif - -// I2S_CONFIG_MASTER - Mode - -// <0=> Master -// <1=> Slave - -#ifndef I2S_CONFIG_MASTER -#define I2S_CONFIG_MASTER 0 -#endif - -// I2S_CONFIG_FORMAT - Format - -// <0=> I2S -// <1=> Aligned - -#ifndef I2S_CONFIG_FORMAT -#define I2S_CONFIG_FORMAT 0 -#endif - -// I2S_CONFIG_ALIGN - Alignment - -// <0=> Left -// <1=> Right - -#ifndef I2S_CONFIG_ALIGN -#define I2S_CONFIG_ALIGN 0 -#endif - -// I2S_CONFIG_SWIDTH - Sample width (bits) - -// <0=> 8 -// <1=> 16 -// <2=> 24 - -#ifndef I2S_CONFIG_SWIDTH -#define I2S_CONFIG_SWIDTH 1 -#endif - -// I2S_CONFIG_CHANNELS - Channels - -// <0=> Stereo -// <1=> Left -// <2=> Right - -#ifndef I2S_CONFIG_CHANNELS -#define I2S_CONFIG_CHANNELS 1 -#endif - -// I2S_CONFIG_MCK_SETUP - MCK behavior - -// <0=> Disabled -// <2147483648=> 32MHz/2 -// <1342177280=> 32MHz/3 -// <1073741824=> 32MHz/4 -// <805306368=> 32MHz/5 -// <671088640=> 32MHz/6 -// <536870912=> 32MHz/8 -// <402653184=> 32MHz/10 -// <369098752=> 32MHz/11 -// <285212672=> 32MHz/15 -// <268435456=> 32MHz/16 -// <201326592=> 32MHz/21 -// <184549376=> 32MHz/23 -// <142606336=> 32MHz/30 -// <138412032=> 32MHz/31 -// <134217728=> 32MHz/32 -// <100663296=> 32MHz/42 -// <68157440=> 32MHz/63 -// <34340864=> 32MHz/125 - -#ifndef I2S_CONFIG_MCK_SETUP -#define I2S_CONFIG_MCK_SETUP 536870912 -#endif - -// I2S_CONFIG_RATIO - MCK/LRCK ratio - -// <0=> 32x -// <1=> 48x -// <2=> 64x -// <3=> 96x -// <4=> 128x -// <5=> 192x -// <6=> 256x -// <7=> 384x -// <8=> 512x - -#ifndef I2S_CONFIG_RATIO -#define I2S_CONFIG_RATIO 2000 -#endif - -// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef I2S_CONFIG_IRQ_PRIORITY -#define I2S_CONFIG_IRQ_PRIORITY 7 -#endif - -// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef I2S_CONFIG_LOG_ENABLED -#define I2S_CONFIG_LOG_ENABLED 0 -#endif -#if I2S_CONFIG_LOG_ENABLED -// I2S_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef I2S_CONFIG_LOG_LEVEL -#define I2S_CONFIG_LOG_LEVEL 3 -#endif - -// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_INFO_COLOR -#define I2S_CONFIG_INFO_COLOR 0 -#endif - -// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_DEBUG_COLOR -#define I2S_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //I2S_CONFIG_LOG_ENABLED -// - -#endif //I2S_ENABLED -// - -// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver -//========================================================== -#ifndef LPCOMP_ENABLED -#define LPCOMP_ENABLED 0 -#endif -#if LPCOMP_ENABLED -// LPCOMP_CONFIG_REFERENCE - Reference voltage - -// <0=> Supply 1/8 -// <1=> Supply 2/8 -// <2=> Supply 3/8 -// <3=> Supply 4/8 -// <4=> Supply 5/8 -// <5=> Supply 6/8 -// <6=> Supply 7/8 -// <8=> Supply 1/16 (nRF52) -// <9=> Supply 3/16 (nRF52) -// <10=> Supply 5/16 (nRF52) -// <11=> Supply 7/16 (nRF52) -// <12=> Supply 9/16 (nRF52) -// <13=> Supply 11/16 (nRF52) -// <14=> Supply 13/16 (nRF52) -// <15=> Supply 15/16 (nRF52) -// <7=> External Ref 0 -// <65543=> External Ref 1 - -#ifndef LPCOMP_CONFIG_REFERENCE -#define LPCOMP_CONFIG_REFERENCE 3 -#endif - -// LPCOMP_CONFIG_DETECTION - Detection - -// <0=> Crossing -// <1=> Up -// <2=> Down - -#ifndef LPCOMP_CONFIG_DETECTION -#define LPCOMP_CONFIG_DETECTION 2 -#endif - -// LPCOMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef LPCOMP_CONFIG_INPUT -#define LPCOMP_CONFIG_INPUT 0 -#endif - -// LPCOMP_CONFIG_HYST - Hysteresis - - -#ifndef LPCOMP_CONFIG_HYST -#define LPCOMP_CONFIG_HYST 0 -#endif - -// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef LPCOMP_CONFIG_IRQ_PRIORITY -#define LPCOMP_CONFIG_IRQ_PRIORITY 7 -#endif - -// LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef LPCOMP_CONFIG_LOG_ENABLED -#define LPCOMP_CONFIG_LOG_ENABLED 0 -#endif -#if LPCOMP_CONFIG_LOG_ENABLED -// LPCOMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef LPCOMP_CONFIG_LOG_LEVEL -#define LPCOMP_CONFIG_LOG_LEVEL 3 -#endif - -// LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef LPCOMP_CONFIG_INFO_COLOR -#define LPCOMP_CONFIG_INFO_COLOR 0 -#endif - -// LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef LPCOMP_CONFIG_DEBUG_COLOR -#define LPCOMP_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //LPCOMP_CONFIG_LOG_ENABLED -// - -#endif //LPCOMP_ENABLED -// - -// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver -//========================================================== -#ifndef PDM_ENABLED -#define PDM_ENABLED 0 -#endif -#if PDM_ENABLED -// PDM_CONFIG_MODE - Mode - -// <0=> Stereo -// <1=> Mono - -#ifndef PDM_CONFIG_MODE -#define PDM_CONFIG_MODE 1 -#endif - -// PDM_CONFIG_EDGE - Edge - -// <0=> Left falling -// <1=> Left rising - -#ifndef PDM_CONFIG_EDGE -#define PDM_CONFIG_EDGE 0 -#endif - -// PDM_CONFIG_CLOCK_FREQ - Clock frequency - -// <134217728=> 1000k -// <138412032=> 1032k (default) -// <142606336=> 1067k - -#ifndef PDM_CONFIG_CLOCK_FREQ -#define PDM_CONFIG_CLOCK_FREQ 138412032 -#endif - -// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef PDM_CONFIG_IRQ_PRIORITY -#define PDM_CONFIG_IRQ_PRIORITY 7 -#endif - -// PDM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PDM_CONFIG_LOG_ENABLED -#define PDM_CONFIG_LOG_ENABLED 0 -#endif -#if PDM_CONFIG_LOG_ENABLED -// PDM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PDM_CONFIG_LOG_LEVEL -#define PDM_CONFIG_LOG_LEVEL 3 -#endif - -// PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PDM_CONFIG_INFO_COLOR -#define PDM_CONFIG_INFO_COLOR 0 -#endif - -// PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PDM_CONFIG_DEBUG_COLOR -#define PDM_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //PDM_CONFIG_LOG_ENABLED -// - -#endif //PDM_ENABLED -// - -// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module -//========================================================== -#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED -#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0 -#endif -#if PERIPHERAL_RESOURCE_SHARING_ENABLED -// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef COMMON_CONFIG_LOG_ENABLED -#define COMMON_CONFIG_LOG_ENABLED 0 -#endif -#if COMMON_CONFIG_LOG_ENABLED -// COMMON_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef COMMON_CONFIG_LOG_LEVEL -#define COMMON_CONFIG_LOG_LEVEL 3 -#endif - -// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_INFO_COLOR -#define COMMON_CONFIG_INFO_COLOR 0 -#endif - -// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_DEBUG_COLOR -#define COMMON_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //COMMON_CONFIG_LOG_ENABLED -// - -#endif //PERIPHERAL_RESOURCE_SHARING_ENABLED -// - -// POWER_ENABLED - nrf_drv_power - POWER peripheral driver -//========================================================== -#ifndef POWER_ENABLED -#define POWER_ENABLED 0 -#endif -#if POWER_ENABLED -// POWER_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef POWER_CONFIG_IRQ_PRIORITY -#define POWER_CONFIG_IRQ_PRIORITY 7 -#endif - -// POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef POWER_CONFIG_DEFAULT_DCDCEN -#define POWER_CONFIG_DEFAULT_DCDCEN 0 -#endif - -// POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator - - -// This settings means only that components for DCDC regulator are installed and it can be enabled. - -#ifndef POWER_CONFIG_DEFAULT_DCDCENHV -#define POWER_CONFIG_DEFAULT_DCDCENHV 0 -#endif - -#endif //POWER_ENABLED -// - -// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver -//========================================================== -#ifndef PPI_ENABLED -#define PPI_ENABLED 0 -#endif -#if PPI_ENABLED -// PPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PPI_CONFIG_LOG_ENABLED -#define PPI_CONFIG_LOG_ENABLED 0 -#endif -#if PPI_CONFIG_LOG_ENABLED -// PPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PPI_CONFIG_LOG_LEVEL -#define PPI_CONFIG_LOG_LEVEL 3 -#endif - -// PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PPI_CONFIG_INFO_COLOR -#define PPI_CONFIG_INFO_COLOR 0 -#endif - -// PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PPI_CONFIG_DEBUG_COLOR -#define PPI_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //PPI_CONFIG_LOG_ENABLED -// - -#endif //PPI_ENABLED -// - -// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver -//========================================================== -#ifndef PWM_ENABLED -#define PWM_ENABLED 1 -#endif -#if PWM_ENABLED -// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN -#define PWM_DEFAULT_CONFIG_OUT0_PIN 2 -#endif - -// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN -#define PWM_DEFAULT_CONFIG_OUT1_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN -#define PWM_DEFAULT_CONFIG_OUT2_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> - - -#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN -#define PWM_DEFAULT_CONFIG_OUT3_PIN 31 -#endif - -// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 MHz - -#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK -#define PWM_DEFAULT_CONFIG_BASE_CLOCK 7 -#endif - -// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode - -// <0=> Up -// <1=> Up and Down - -#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE -#define PWM_DEFAULT_CONFIG_COUNT_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value -#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE -#define PWM_DEFAULT_CONFIG_TOP_VALUE 46 -#endif - -// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode - -// <0=> Common -// <1=> Grouped -// <2=> Individual -// <3=> Waveform - -#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE -#define PWM_DEFAULT_CONFIG_LOAD_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode - -// <0=> Auto -// <1=> Triggered - -#ifndef PWM_DEFAULT_CONFIG_STEP_MODE -#define PWM_DEFAULT_CONFIG_STEP_MODE 0 -#endif - -// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY -#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// PWM0_ENABLED - Enable PWM0 instance - - -#ifndef PWM0_ENABLED -#define PWM0_ENABLED 1 -#endif - -// PWM1_ENABLED - Enable PWM1 instance - - -#ifndef PWM1_ENABLED -#define PWM1_ENABLED 0 -#endif - -// PWM2_ENABLED - Enable PWM2 instance - - -#ifndef PWM2_ENABLED -#define PWM2_ENABLED 0 -#endif - -// PWM_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef PWM_CONFIG_LOG_ENABLED -#define PWM_CONFIG_LOG_ENABLED 0 -#endif -#if PWM_CONFIG_LOG_ENABLED -// PWM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef PWM_CONFIG_LOG_LEVEL -#define PWM_CONFIG_LOG_LEVEL 3 -#endif - -// PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PWM_CONFIG_INFO_COLOR -#define PWM_CONFIG_INFO_COLOR 0 -#endif - -// PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef PWM_CONFIG_DEBUG_COLOR -#define PWM_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //PWM_CONFIG_LOG_ENABLED -// - -// PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM. - -// The workaround uses interrupts to wake up the CPU and ensure -// it is active when PWM is about to start a DMA transfer. For -// initial transfer, done when a playback is started via PPI, -// a specific EGU instance is used to generate the interrupt. -// During the playback, the PWM interrupt triggered on SEQEND -// event of a preceding sequence is used to protect the transfer -// done for the next sequence to be played. -//========================================================== -#ifndef PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 -#endif -#if PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -// PWM_NRF52_ANOMALY_109_EGU_INSTANCE - EGU instance used by the nRF52 Anomaly 109 workaround for PWM. - -// <0=> EGU0 -// <1=> EGU1 -// <2=> EGU2 -// <3=> EGU3 -// <4=> EGU4 -// <5=> EGU5 - -#ifndef PWM_NRF52_ANOMALY_109_EGU_INSTANCE -#define PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5 -#endif - -#endif //PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -// - -#endif //PWM_ENABLED -// - -// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver -//========================================================== -#ifndef QDEC_ENABLED -#define QDEC_ENABLED 0 -#endif -#if QDEC_ENABLED -// QDEC_CONFIG_REPORTPER - Report period - -// <0=> 10 Samples -// <1=> 40 Samples -// <2=> 80 Samples -// <3=> 120 Samples -// <4=> 160 Samples -// <5=> 200 Samples -// <6=> 240 Samples -// <7=> 280 Samples - -#ifndef QDEC_CONFIG_REPORTPER -#define QDEC_CONFIG_REPORTPER 0 -#endif - -// QDEC_CONFIG_SAMPLEPER - Sample period - -// <0=> 128 us -// <1=> 256 us -// <2=> 512 us -// <3=> 1024 us -// <4=> 2048 us -// <5=> 4096 us -// <6=> 8192 us -// <7=> 16384 us - -#ifndef QDEC_CONFIG_SAMPLEPER -#define QDEC_CONFIG_SAMPLEPER 7 -#endif - -// QDEC_CONFIG_PIO_A - A pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_A -#define QDEC_CONFIG_PIO_A 31 -#endif - -// QDEC_CONFIG_PIO_B - B pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_B -#define QDEC_CONFIG_PIO_B 31 -#endif - -// QDEC_CONFIG_PIO_LED - LED pin <0-31> - - -#ifndef QDEC_CONFIG_PIO_LED -#define QDEC_CONFIG_PIO_LED 31 -#endif - -// QDEC_CONFIG_LEDPRE - LED pre -#ifndef QDEC_CONFIG_LEDPRE -#define QDEC_CONFIG_LEDPRE 511 -#endif - -// QDEC_CONFIG_LEDPOL - LED polarity - -// <0=> Active low -// <1=> Active high - -#ifndef QDEC_CONFIG_LEDPOL -#define QDEC_CONFIG_LEDPOL 1 -#endif - -// QDEC_CONFIG_DBFEN - Debouncing enable - - -#ifndef QDEC_CONFIG_DBFEN -#define QDEC_CONFIG_DBFEN 0 -#endif - -// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable - - -#ifndef QDEC_CONFIG_SAMPLE_INTEN -#define QDEC_CONFIG_SAMPLE_INTEN 0 -#endif - -// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef QDEC_CONFIG_IRQ_PRIORITY -#define QDEC_CONFIG_IRQ_PRIORITY 7 -#endif - -// QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef QDEC_CONFIG_LOG_ENABLED -#define QDEC_CONFIG_LOG_ENABLED 0 -#endif -#if QDEC_CONFIG_LOG_ENABLED -// QDEC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef QDEC_CONFIG_LOG_LEVEL -#define QDEC_CONFIG_LOG_LEVEL 3 -#endif - -// QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef QDEC_CONFIG_INFO_COLOR -#define QDEC_CONFIG_INFO_COLOR 0 -#endif - -// QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef QDEC_CONFIG_DEBUG_COLOR -#define QDEC_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //QDEC_CONFIG_LOG_ENABLED -// - -#endif //QDEC_ENABLED -// - -// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver -//========================================================== -#ifndef RNG_ENABLED -#define RNG_ENABLED 0 -#endif -#if RNG_ENABLED -// RNG_CONFIG_ERROR_CORRECTION - Error correction - - -#ifndef RNG_CONFIG_ERROR_CORRECTION -#define RNG_CONFIG_ERROR_CORRECTION 0 -#endif - -// RNG_CONFIG_POOL_SIZE - Pool size -#ifndef RNG_CONFIG_POOL_SIZE -#define RNG_CONFIG_POOL_SIZE 32 -#endif - -// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef RNG_CONFIG_IRQ_PRIORITY -#define RNG_CONFIG_IRQ_PRIORITY 7 -#endif - -// RNG_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef RNG_CONFIG_LOG_ENABLED -#define RNG_CONFIG_LOG_ENABLED 0 -#endif -#if RNG_CONFIG_LOG_ENABLED -// RNG_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef RNG_CONFIG_LOG_LEVEL -#define RNG_CONFIG_LOG_LEVEL 3 -#endif - -// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RNG_CONFIG_INFO_COLOR -#define RNG_CONFIG_INFO_COLOR 0 -#endif - -// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RNG_CONFIG_DEBUG_COLOR -#define RNG_CONFIG_DEBUG_COLOR 0 -#endif - -// RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. - - -#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED -#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 -#endif - -#endif //RNG_CONFIG_LOG_ENABLED -// - -#endif //RNG_ENABLED -// - -// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver -//========================================================== -#ifndef RTC_ENABLED -#define RTC_ENABLED 0 -#endif -#if RTC_ENABLED -// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> - - -#ifndef RTC_DEFAULT_CONFIG_FREQUENCY -#define RTC_DEFAULT_CONFIG_FREQUENCY 32768 -#endif - -// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering - - -#ifndef RTC_DEFAULT_CONFIG_RELIABLE -#define RTC_DEFAULT_CONFIG_RELIABLE 0 -#endif - -// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY -#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// RTC0_ENABLED - Enable RTC0 instance - - -#ifndef RTC0_ENABLED -#define RTC0_ENABLED 0 -#endif - -// RTC1_ENABLED - Enable RTC1 instance - - -#ifndef RTC1_ENABLED -#define RTC1_ENABLED 0 -#endif - -// RTC2_ENABLED - Enable RTC2 instance - - -#ifndef RTC2_ENABLED -#define RTC2_ENABLED 0 -#endif - -// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt -#ifndef NRF_MAXIMUM_LATENCY_US -#define NRF_MAXIMUM_LATENCY_US 2000 -#endif - -// RTC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef RTC_CONFIG_LOG_ENABLED -#define RTC_CONFIG_LOG_ENABLED 0 -#endif -#if RTC_CONFIG_LOG_ENABLED -// RTC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef RTC_CONFIG_LOG_LEVEL -#define RTC_CONFIG_LOG_LEVEL 3 -#endif - -// RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RTC_CONFIG_INFO_COLOR -#define RTC_CONFIG_INFO_COLOR 0 -#endif - -// RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef RTC_CONFIG_DEBUG_COLOR -#define RTC_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //RTC_CONFIG_LOG_ENABLED -// - -#endif //RTC_ENABLED -// - -// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver -//========================================================== -#ifndef SAADC_ENABLED -#define SAADC_ENABLED 1 -#endif -#if SAADC_ENABLED -// SAADC_CONFIG_RESOLUTION - Resolution - -// <0=> 8 bit -// <1=> 10 bit -// <2=> 12 bit -// <3=> 14 bit - -#ifndef SAADC_CONFIG_RESOLUTION -#define SAADC_CONFIG_RESOLUTION 2 -#endif - -// SAADC_CONFIG_OVERSAMPLE - Sample period - -// <0=> Disabled -// <1=> 2x -// <2=> 4x -// <3=> 8x -// <4=> 16x -// <5=> 32x -// <6=> 64x -// <7=> 128x -// <8=> 256x - -#ifndef SAADC_CONFIG_OVERSAMPLE -#define SAADC_CONFIG_OVERSAMPLE 0 -#endif - -// SAADC_CONFIG_LP_MODE - Enabling low power mode - - -#ifndef SAADC_CONFIG_LP_MODE -#define SAADC_CONFIG_LP_MODE 0 -#endif - -// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SAADC_CONFIG_IRQ_PRIORITY -#define SAADC_CONFIG_IRQ_PRIORITY 7 -#endif - -// SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SAADC_CONFIG_LOG_ENABLED -#define SAADC_CONFIG_LOG_ENABLED 0 -#endif -#if SAADC_CONFIG_LOG_ENABLED -// SAADC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SAADC_CONFIG_LOG_LEVEL -#define SAADC_CONFIG_LOG_LEVEL 3 -#endif - -// SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SAADC_CONFIG_INFO_COLOR -#define SAADC_CONFIG_INFO_COLOR 0 -#endif - -// SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SAADC_CONFIG_DEBUG_COLOR -#define SAADC_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //SAADC_CONFIG_LOG_ENABLED -// - -#endif //SAADC_ENABLED -// - -// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver -//========================================================== -#ifndef SPIS_ENABLED -#define SPIS_ENABLED 0 -#endif -#if SPIS_ENABLED -// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// SPIS_DEFAULT_MODE - Mode - -// <0=> MODE_0 -// <1=> MODE_1 -// <2=> MODE_2 -// <3=> MODE_3 - -#ifndef SPIS_DEFAULT_MODE -#define SPIS_DEFAULT_MODE 0 -#endif - -// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order - -// <0=> MSB first -// <1=> LSB first - -#ifndef SPIS_DEFAULT_BIT_ORDER -#define SPIS_DEFAULT_BIT_ORDER 0 -#endif - -// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> - - -#ifndef SPIS_DEFAULT_DEF -#define SPIS_DEFAULT_DEF 255 -#endif - -// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> - - -#ifndef SPIS_DEFAULT_ORC -#define SPIS_DEFAULT_ORC 255 -#endif - -// SPIS0_ENABLED - Enable SPIS0 instance - - -#ifndef SPIS0_ENABLED -#define SPIS0_ENABLED 0 -#endif - -// SPIS1_ENABLED - Enable SPIS1 instance - - -#ifndef SPIS1_ENABLED -#define SPIS1_ENABLED 0 -#endif - -// SPIS2_ENABLED - Enable SPIS2 instance - - -#ifndef SPIS2_ENABLED -#define SPIS2_ENABLED 0 -#endif - -// SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SPIS_CONFIG_LOG_ENABLED -#define SPIS_CONFIG_LOG_ENABLED 0 -#endif -#if SPIS_CONFIG_LOG_ENABLED -// SPIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SPIS_CONFIG_LOG_LEVEL -#define SPIS_CONFIG_LOG_LEVEL 3 -#endif - -// SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPIS_CONFIG_INFO_COLOR -#define SPIS_CONFIG_INFO_COLOR 0 -#endif - -// SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPIS_CONFIG_DEBUG_COLOR -#define SPIS_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //SPIS_CONFIG_LOG_ENABLED -// - -// SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for SPIS. - - -// The workaround uses a GPIOTE channel to generate interrupts -// on falling edges detected on the CSN line. This will make -// the CPU active for the moment when SPIS starts DMA transfers, -// and this way the transfers will be protected. -// This workaround uses GPIOTE driver, so this driver must be -// enabled as well. - -#ifndef SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 -#endif - -#endif //SPIS_ENABLED -// - -// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver -//========================================================== -#ifndef SPI_ENABLED -#define SPI_ENABLED 0 -#endif -#if SPI_ENABLED -// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// SPI0_ENABLED - Enable SPI0 instance -//========================================================== -#ifndef SPI0_ENABLED -#define SPI0_ENABLED 0 -#endif -#if SPI0_ENABLED -// SPI0_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI0_USE_EASY_DMA -#define SPI0_USE_EASY_DMA 1 -#endif - -// SPI0_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI0_DEFAULT_FREQUENCY -#define SPI0_DEFAULT_FREQUENCY 1073741824 -#endif - -#endif //SPI0_ENABLED -// - -// SPI1_ENABLED - Enable SPI1 instance -//========================================================== -#ifndef SPI1_ENABLED -#define SPI1_ENABLED 0 -#endif -#if SPI1_ENABLED -// SPI1_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI1_USE_EASY_DMA -#define SPI1_USE_EASY_DMA 1 -#endif - -// SPI1_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI1_DEFAULT_FREQUENCY -#define SPI1_DEFAULT_FREQUENCY 1073741824 -#endif - -#endif //SPI1_ENABLED -// - -// SPI2_ENABLED - Enable SPI2 instance -//========================================================== -#ifndef SPI2_ENABLED -#define SPI2_ENABLED 0 -#endif -#if SPI2_ENABLED -// SPI2_USE_EASY_DMA - Use EasyDMA - - -#ifndef SPI2_USE_EASY_DMA -#define SPI2_USE_EASY_DMA 1 -#endif - -// SPI2_DEFAULT_FREQUENCY - Use EasyDMA - - -#ifndef SPI2_DEFAULT_FREQUENCY -#define SPI2_DEFAULT_FREQUENCY 1 -#endif - -#endif //SPI2_ENABLED -// - -// SPI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SPI_CONFIG_LOG_ENABLED -#define SPI_CONFIG_LOG_ENABLED 0 -#endif -#if SPI_CONFIG_LOG_ENABLED -// SPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SPI_CONFIG_LOG_LEVEL -#define SPI_CONFIG_LOG_LEVEL 3 -#endif - -// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_INFO_COLOR -#define SPI_CONFIG_INFO_COLOR 0 -#endif - -// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_DEBUG_COLOR -#define SPI_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //SPI_CONFIG_LOG_ENABLED -// - -// SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for SPIM. - - -// The workaround uses interrupts to wake up the CPU by catching -// a start event of zero-length transmission to start the clock. This -// ensures that the DMA transfer will be executed without issues and -// that the proper transfer will be started. See more in the Errata -// document or Anomaly 109 Addendum located at -// https://infocenter.nordicsemi.com/ - -#ifndef SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 -#endif - -#endif //SPI_ENABLED -// - -// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver -//========================================================== -#ifndef TIMER_ENABLED -#define TIMER_ENABLED 0 -#endif -#if TIMER_ENABLED -// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz -// <8=> 62.5 kHz -// <9=> 31.25 kHz - -#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY -#define TIMER_DEFAULT_CONFIG_FREQUENCY 0 -#endif - -// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation - -// <0=> Timer -// <1=> Counter - -#ifndef TIMER_DEFAULT_CONFIG_MODE -#define TIMER_DEFAULT_CONFIG_MODE 0 -#endif - -// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width - -// <0=> 16 bit -// <1=> 8 bit -// <2=> 24 bit -// <3=> 32 bit - -#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH -#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 -#endif - -// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY -#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// TIMER0_ENABLED - Enable TIMER0 instance - - -#ifndef TIMER0_ENABLED -#define TIMER0_ENABLED 0 -#endif - -// TIMER1_ENABLED - Enable TIMER1 instance - - -#ifndef TIMER1_ENABLED -#define TIMER1_ENABLED 0 -#endif - -// TIMER2_ENABLED - Enable TIMER2 instance - - -#ifndef TIMER2_ENABLED -#define TIMER2_ENABLED 0 -#endif - -// TIMER3_ENABLED - Enable TIMER3 instance - - -#ifndef TIMER3_ENABLED -#define TIMER3_ENABLED 0 -#endif - -// TIMER4_ENABLED - Enable TIMER4 instance - - -#ifndef TIMER4_ENABLED -#define TIMER4_ENABLED 0 -#endif - -// TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TIMER_CONFIG_LOG_ENABLED -#define TIMER_CONFIG_LOG_ENABLED 0 -#endif -#if TIMER_CONFIG_LOG_ENABLED -// TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TIMER_CONFIG_LOG_LEVEL -#define TIMER_CONFIG_LOG_LEVEL 3 -#endif - -// TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TIMER_CONFIG_INFO_COLOR -#define TIMER_CONFIG_INFO_COLOR 0 -#endif - -// TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TIMER_CONFIG_DEBUG_COLOR -#define TIMER_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //TIMER_CONFIG_LOG_ENABLED -// - -#endif //TIMER_ENABLED -// - -// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver -//========================================================== -#ifndef TWIS_ENABLED -#define TWIS_ENABLED 0 -#endif -#if TWIS_ENABLED -// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 -#ifndef TWIS_DEFAULT_CONFIG_ADDR0 -#define TWIS_DEFAULT_CONFIG_ADDR0 0 -#endif - -// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 -#ifndef TWIS_DEFAULT_CONFIG_ADDR1 -#define TWIS_DEFAULT_CONFIG_ADDR1 0 -#endif - -// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL -#define TWIS_DEFAULT_CONFIG_SCL_PULL 0 -#endif - -// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up - -#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL -#define TWIS_DEFAULT_CONFIG_SDA_PULL 0 -#endif - -// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// TWIS0_ENABLED - Enable TWIS0 instance - - -#ifndef TWIS0_ENABLED -#define TWIS0_ENABLED 0 -#endif - -// TWIS1_ENABLED - Enable TWIS1 instance - - -#ifndef TWIS1_ENABLED -#define TWIS1_ENABLED 0 -#endif - -// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once - - -// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. - -#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 -#endif - -// TWIS_NO_SYNC_MODE - Remove support for synchronous mode - - -// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. - -#ifndef TWIS_NO_SYNC_MODE -#define TWIS_NO_SYNC_MODE 0 -#endif - -// TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TWIS_CONFIG_LOG_ENABLED -#define TWIS_CONFIG_LOG_ENABLED 0 -#endif -#if TWIS_CONFIG_LOG_ENABLED -// TWIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TWIS_CONFIG_LOG_LEVEL -#define TWIS_CONFIG_LOG_LEVEL 3 -#endif - -// TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWIS_CONFIG_INFO_COLOR -#define TWIS_CONFIG_INFO_COLOR 0 -#endif - -// TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWIS_CONFIG_DEBUG_COLOR -#define TWIS_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //TWIS_CONFIG_LOG_ENABLED -// - -#endif //TWIS_ENABLED -// - -// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver -//========================================================== -#ifndef TWI_ENABLED -#define TWI_ENABLED 0 -#endif -#if TWI_ENABLED -// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k - -#ifndef TWI_DEFAULT_CONFIG_FREQUENCY -#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 -#endif - -// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init - - -#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT -#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 -#endif - -// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - - -#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 -#endif - -// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// TWI0_ENABLED - Enable TWI0 instance -//========================================================== -#ifndef TWI0_ENABLED -#define TWI0_ENABLED 0 -#endif -#if TWI0_ENABLED -// TWI0_USE_EASY_DMA - Use EasyDMA (if present) - - -#ifndef TWI0_USE_EASY_DMA -#define TWI0_USE_EASY_DMA 0 -#endif - -#endif //TWI0_ENABLED -// - -// TWI1_ENABLED - Enable TWI1 instance -//========================================================== -#ifndef TWI1_ENABLED -#define TWI1_ENABLED 0 -#endif -#if TWI1_ENABLED -// TWI1_USE_EASY_DMA - Use EasyDMA (if present) - - -#ifndef TWI1_USE_EASY_DMA -#define TWI1_USE_EASY_DMA 0 -#endif - -#endif //TWI1_ENABLED -// - -// TWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef TWI_CONFIG_LOG_ENABLED -#define TWI_CONFIG_LOG_ENABLED 0 -#endif -#if TWI_CONFIG_LOG_ENABLED -// TWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef TWI_CONFIG_LOG_LEVEL -#define TWI_CONFIG_LOG_LEVEL 3 -#endif - -// TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWI_CONFIG_INFO_COLOR -#define TWI_CONFIG_INFO_COLOR 0 -#endif - -// TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef TWI_CONFIG_DEBUG_COLOR -#define TWI_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //TWI_CONFIG_LOG_ENABLED -// - -// TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for TWIM. - - -// The workaround uses interrupts to wake up the CPU by catching -// the start event of zero-frequency transmission, clear the -// peripheral, set desired frequency, start the peripheral, and -// the proper transmission. See more in the Errata document or -// Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/ - -#ifndef TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 -#endif - -#endif //TWI_ENABLED -// - -// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver -//========================================================== -#ifndef UART_ENABLED -#define UART_ENABLED 1 -#endif -#if UART_ENABLED -// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef UART_DEFAULT_CONFIG_HWFC -#define UART_DEFAULT_CONFIG_HWFC 0 -#endif - -// UART_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included - -#ifndef UART_DEFAULT_CONFIG_PARITY -#define UART_DEFAULT_CONFIG_PARITY 0 -#endif - -// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 57600 baud - -#ifndef UART_DEFAULT_CONFIG_BAUDRATE -#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 -#endif - -// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY -#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 -#endif - -// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA - - -#ifndef UART_EASY_DMA_SUPPORT -#define UART_EASY_DMA_SUPPORT 0 -#endif - -// UART_LEGACY_SUPPORT - Driver supporting Legacy mode - - -#ifndef UART_LEGACY_SUPPORT -#define UART_LEGACY_SUPPORT 1 -#endif - -// UART0_ENABLED - Enable UART0 instance -//========================================================== -#ifndef UART0_ENABLED -#define UART0_ENABLED 1 -#endif -#if UART0_ENABLED -// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - - -#ifndef UART0_CONFIG_USE_EASY_DMA -#define UART0_CONFIG_USE_EASY_DMA 0 -#endif - -#endif //UART0_ENABLED -// - -// UART_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef UART_CONFIG_LOG_ENABLED -#define UART_CONFIG_LOG_ENABLED 0 -#endif -#if UART_CONFIG_LOG_ENABLED -// UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef UART_CONFIG_LOG_LEVEL -#define UART_CONFIG_LOG_LEVEL 3 -#endif - -// UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef UART_CONFIG_INFO_COLOR -#define UART_CONFIG_INFO_COLOR 0 -#endif - -// UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef UART_CONFIG_DEBUG_COLOR -#define UART_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //UART_CONFIG_LOG_ENABLED -// - -#endif //UART_ENABLED -// - -// USBD_ENABLED - nrf_drv_usbd - USB driver -//========================================================== -#ifndef USBD_ENABLED -#define USBD_ENABLED 0 -#endif -#if USBD_ENABLED -// USBD_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef USBD_CONFIG_IRQ_PRIORITY -#define USBD_CONFIG_IRQ_PRIORITY 7 -#endif - -// NRF_DRV_USBD_DMASCHEDULER_MODE - USBD SMA scheduler working scheme - -// <0=> Prioritized access -// <1=> Round Robin - -#ifndef NRF_DRV_USBD_DMASCHEDULER_MODE -#define NRF_DRV_USBD_DMASCHEDULER_MODE 0 -#endif - -// NRF_USBD_DRV_LOG_ENABLED - Enable logging - - -#ifndef NRF_USBD_DRV_LOG_ENABLED -#define NRF_USBD_DRV_LOG_ENABLED 0 -#endif - -#endif //USBD_ENABLED -// - -// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver -//========================================================== -#ifndef WDT_ENABLED -#define WDT_ENABLED 0 -#endif -#if WDT_ENABLED -// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode - -// <1=> Run in SLEEP, Pause in HALT -// <8=> Pause in SLEEP, Run in HALT -// <9=> Run in SLEEP and HALT -// <0=> Pause in SLEEP and HALT - -#ifndef WDT_CONFIG_BEHAVIOUR -#define WDT_CONFIG_BEHAVIOUR 1 -#endif - -// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> - - -#ifndef WDT_CONFIG_RELOAD_VALUE -#define WDT_CONFIG_RELOAD_VALUE 2000 -#endif - -// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef WDT_CONFIG_IRQ_PRIORITY -#define WDT_CONFIG_IRQ_PRIORITY 7 -#endif - -// WDT_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef WDT_CONFIG_LOG_ENABLED -#define WDT_CONFIG_LOG_ENABLED 0 -#endif -#if WDT_CONFIG_LOG_ENABLED -// WDT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef WDT_CONFIG_LOG_LEVEL -#define WDT_CONFIG_LOG_LEVEL 3 -#endif - -// WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef WDT_CONFIG_INFO_COLOR -#define WDT_CONFIG_INFO_COLOR 0 -#endif - -// WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef WDT_CONFIG_DEBUG_COLOR -#define WDT_CONFIG_DEBUG_COLOR 0 -#endif - -#endif //WDT_CONFIG_LOG_ENABLED -// - -#endif //WDT_ENABLED -// - -// -//========================================================== - -// nRF_Libraries - -//========================================================== -// APP_FIFO_ENABLED - app_fifo - Software FIFO implementation - - -#ifndef APP_FIFO_ENABLED -#define APP_FIFO_ENABLED 1 -#endif - -// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher - - -#ifndef APP_GPIOTE_ENABLED -#define APP_GPIOTE_ENABLED 0 -#endif - -// APP_PWM_ENABLED - app_pwm - PWM functionality - - -#ifndef APP_PWM_ENABLED -#define APP_PWM_ENABLED 0 -#endif - -// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler -//========================================================== -#ifndef APP_SCHEDULER_ENABLED -#define APP_SCHEDULER_ENABLED 1 -#endif -#if APP_SCHEDULER_ENABLED -// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature - - -#ifndef APP_SCHEDULER_WITH_PAUSE -#define APP_SCHEDULER_WITH_PAUSE 0 -#endif - -// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling - - -#ifndef APP_SCHEDULER_WITH_PROFILER -#define APP_SCHEDULER_WITH_PROFILER 0 -#endif - -#endif //APP_SCHEDULER_ENABLED -// - -// APP_TIMER_ENABLED - app_timer - Application timer functionality -//========================================================== -#ifndef APP_TIMER_ENABLED -#define APP_TIMER_ENABLED 1 -#endif -#if APP_TIMER_ENABLED -// APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. - -// <0=> 32768 Hz -// <1=> 16384 Hz -// <3=> 8192 Hz -// <7=> 4096 Hz -// <15=> 2048 Hz -// <31=> 1024 Hz - -#ifndef APP_TIMER_CONFIG_RTC_FREQUENCY -#define APP_TIMER_CONFIG_RTC_FREQUENCY 0 -#endif - -// APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef APP_TIMER_CONFIG_IRQ_PRIORITY -#define APP_TIMER_CONFIG_IRQ_PRIORITY 7 -#endif - -// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. -// Size of the queue depends on how many timers are used -// in the system, how often timers are started and overall -// system latency. If queue size is too small app_timer calls -// will fail. - -#ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE -#define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10 -#endif - -// APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler - - -#ifndef APP_TIMER_CONFIG_USE_SCHEDULER -#define APP_TIMER_CONFIG_USE_SCHEDULER 0 -#endif - -// APP_TIMER_WITH_PROFILER - Enable app_timer profiling - - -#ifndef APP_TIMER_WITH_PROFILER -#define APP_TIMER_WITH_PROFILER 0 -#endif - -// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on - - -// If option is enabled RTC is kept running even if there is no active timers. -// This option can be used when app_timer is used for timestamping. - -#ifndef APP_TIMER_KEEPS_RTC_ACTIVE -#define APP_TIMER_KEEPS_RTC_ACTIVE 0 -#endif - -// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. - -// <0=> 0 -// <1=> 1 - -#ifndef APP_TIMER_CONFIG_SWI_NUMBER -#define APP_TIMER_CONFIG_SWI_NUMBER 0 -#endif - -#endif //APP_TIMER_ENABLED -// - -// APP_TWI_ENABLED - app_twi - TWI transaction manager - - -#ifndef APP_TWI_ENABLED -#define APP_TWI_ENABLED 0 -#endif - -// APP_UART_ENABLED - app_uart - UART driver -//========================================================== -#ifndef APP_UART_ENABLED -#define APP_UART_ENABLED 1 -#endif -#if APP_UART_ENABLED -// APP_UART_DRIVER_INSTANCE - UART instance used - -// <0=> 0 - -#ifndef APP_UART_DRIVER_INSTANCE -#define APP_UART_DRIVER_INSTANCE 0 -#endif - -#endif //APP_UART_ENABLED -// - -// APP_USBD_CLASS_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class - - -#ifndef APP_USBD_CLASS_AUDIO_ENABLED -#define APP_USBD_CLASS_AUDIO_ENABLED 0 -#endif - -// APP_USBD_CLASS_HID_ENABLED - app_usbd_hid - USB HID class - - -#ifndef APP_USBD_CLASS_HID_ENABLED -#define APP_USBD_CLASS_HID_ENABLED 0 -#endif - -// APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic - - -#ifndef APP_USBD_HID_GENERIC_ENABLED -#define APP_USBD_HID_GENERIC_ENABLED 0 -#endif - -// APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard - - -#ifndef APP_USBD_HID_KBD_ENABLED -#define APP_USBD_HID_KBD_ENABLED 0 -#endif - -// APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse - - -#ifndef APP_USBD_HID_MOUSE_ENABLED -#define APP_USBD_HID_MOUSE_ENABLED 0 -#endif - -// BUTTON_ENABLED - app_button - buttons handling module - - -#ifndef BUTTON_ENABLED -#define BUTTON_ENABLED 1 -#endif - -// CRC16_ENABLED - crc16 - CRC16 calculation routines - - -#ifndef CRC16_ENABLED -#define CRC16_ENABLED 0 -#endif - -// CRC32_ENABLED - crc32 - CRC32 calculation routines - - -#ifndef CRC32_ENABLED -#define CRC32_ENABLED 0 -#endif - -// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library - - -#ifndef ECC_ENABLED -#define ECC_ENABLED 0 -#endif - -// FDS_ENABLED - fds - Flash data storage module -//========================================================== -#ifndef FDS_ENABLED -#define FDS_ENABLED 0 -#endif -#if FDS_ENABLED -// FDS_OP_QUEUE_SIZE - Size of the internal queue. -#ifndef FDS_OP_QUEUE_SIZE -#define FDS_OP_QUEUE_SIZE 4 -#endif - -// FDS_CHUNK_QUEUE_SIZE - Determines how many @ref fds_record_chunk_t structures can be buffered at any time. -#ifndef FDS_CHUNK_QUEUE_SIZE -#define FDS_CHUNK_QUEUE_SIZE 8 -#endif - -// FDS_MAX_USERS - Maximum number of callbacks that can be registered. -#ifndef FDS_MAX_USERS -#define FDS_MAX_USERS 8 -#endif - -// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. -// One of the virtual pages is reserved by the system for garbage collection. -// Therefore, the minimum is two virtual pages: one page to store data and -// one page to be used by the system for garbage collection. The total amount -// of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES -// @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes. - -#ifndef FDS_VIRTUAL_PAGES -#define FDS_VIRTUAL_PAGES 3 -#endif - -// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual page of flash memory, expressed in number of 4-byte words. - - -// By default, a virtual page is the same size as a physical page. -// The size of a virtual page must be a multiple of the size of a physical page. -// <1024=> 1024 -// <2048=> 2048 - -#ifndef FDS_VIRTUAL_PAGE_SIZE -#define FDS_VIRTUAL_PAGE_SIZE 1024 -#endif - -#endif //FDS_ENABLED -// - -// FSTORAGE_ENABLED - fstorage - Flash storage module -//========================================================== -#ifndef FSTORAGE_ENABLED -#define FSTORAGE_ENABLED 1 -#endif -#if FSTORAGE_ENABLED -// FS_QUEUE_SIZE - Configures the size of the internal queue. -// Increase this if there are many users, or if it is likely that many -// operation will be queued at once without waiting for the previous operations -// to complete. In general, increase the queue size if you frequently receive -// @ref FS_ERR_QUEUE_FULL errors when calling @ref fs_store or @ref fs_erase. - -#ifndef FS_QUEUE_SIZE -#define FS_QUEUE_SIZE 4 -#endif - -// FS_OP_MAX_RETRIES - Number attempts to execute an operation if the SoftDevice fails. -// Increase this value if events return the @ref FS_ERR_OPERATION_TIMEOUT -// error often. The SoftDevice may fail to schedule flash access due to high BLE activity. - -#ifndef FS_OP_MAX_RETRIES -#define FS_OP_MAX_RETRIES 3 -#endif - -// FS_MAX_WRITE_SIZE_WORDS - Maximum number of words to be written to flash in a single operation. -// Tweaking this value can increase the chances of the SoftDevice being -// able to fit flash operations in between radio activity. This value is bound by the -// maximum number of words which the SoftDevice can write to flash in a single call to -// @ref sd_flash_write, which is 256 words for nRF51 ICs and 1024 words for nRF52 ICs. - -#ifndef FS_MAX_WRITE_SIZE_WORDS -#define FS_MAX_WRITE_SIZE_WORDS 1024 -#endif - -#endif //FSTORAGE_ENABLED -// - -// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release - - -#ifndef HARDFAULT_HANDLER_ENABLED -#define HARDFAULT_HANDLER_ENABLED 0 -#endif - -// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI -//========================================================== -#ifndef HCI_MEM_POOL_ENABLED -#define HCI_MEM_POOL_ENABLED 0 -#endif -#if HCI_MEM_POOL_ENABLED -// HCI_TX_BUF_SIZE - TX buffer size in bytes. -#ifndef HCI_TX_BUF_SIZE -#define HCI_TX_BUF_SIZE 600 -#endif - -// HCI_RX_BUF_SIZE - RX buffer size in bytes. -#ifndef HCI_RX_BUF_SIZE -#define HCI_RX_BUF_SIZE 600 -#endif - -// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. -#ifndef HCI_RX_BUF_QUEUE_SIZE -#define HCI_RX_BUF_QUEUE_SIZE 4 -#endif - -#endif //HCI_MEM_POOL_ENABLED -// - -// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI -//========================================================== -#ifndef HCI_SLIP_ENABLED -#define HCI_SLIP_ENABLED 0 -#endif -#if HCI_SLIP_ENABLED -// HCI_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 57600 baud - -#ifndef HCI_UART_BAUDRATE -#define HCI_UART_BAUDRATE 30801920 -#endif - -// HCI_UART_FLOW_CONTROL - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef HCI_UART_FLOW_CONTROL -#define HCI_UART_FLOW_CONTROL 0 -#endif - -// HCI_UART_RX_PIN - UART RX pin -#ifndef HCI_UART_RX_PIN -#define HCI_UART_RX_PIN 8 -#endif - -// HCI_UART_TX_PIN - UART TX pin -#ifndef HCI_UART_TX_PIN -#define HCI_UART_TX_PIN 6 -#endif - -// HCI_UART_RTS_PIN - UART RTS pin -#ifndef HCI_UART_RTS_PIN -#define HCI_UART_RTS_PIN 5 -#endif - -// HCI_UART_CTS_PIN - UART CTS pin -#ifndef HCI_UART_CTS_PIN -#define HCI_UART_CTS_PIN 7 -#endif - -#endif //HCI_SLIP_ENABLED -// - -// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport -//========================================================== -#ifndef HCI_TRANSPORT_ENABLED -#define HCI_TRANSPORT_ENABLED 0 -#endif -#if HCI_TRANSPORT_ENABLED -// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. -#ifndef HCI_MAX_PACKET_SIZE_IN_BITS -#define HCI_MAX_PACKET_SIZE_IN_BITS 8000 -#endif - -#endif //HCI_TRANSPORT_ENABLED -// - -// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module - - -#ifndef LED_SOFTBLINK_ENABLED -#define LED_SOFTBLINK_ENABLED 0 -#endif - -// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module - - -#ifndef LOW_POWER_PWM_ENABLED -#define LOW_POWER_PWM_ENABLED 0 -#endif - -// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator -//========================================================== -#ifndef MEM_MANAGER_ENABLED -#define MEM_MANAGER_ENABLED 0 -#endif -#if MEM_MANAGER_ENABLED -// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> - - -#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT -#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1 -#endif - -// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. -// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE -#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32 -#endif - -// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> - - -#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT -#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. -// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE -#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256 -#endif - -// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> - - -#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT -#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. -// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE -#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256 -#endif - -// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> - - -#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT -#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. -// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE -#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320 -#endif - -// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> - - -#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT -#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. -// Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE -#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444 -#endif - -// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> - - -#ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT -#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. -// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE -#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64 -#endif - -// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> - - -#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT -#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0 -#endif - -// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. -// Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized. - -#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE -#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32 -#endif - -// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module. - - -#ifndef MEM_MANAGER_ENABLE_LOGS -#define MEM_MANAGER_ENABLE_LOGS 0 -#endif - -// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. - - -#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK -#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0 -#endif - -#endif //MEM_MANAGER_ENABLED -// - -// NRF_CSENSE_ENABLED - nrf_csense - Capacitive sensor module -//========================================================== -#ifndef NRF_CSENSE_ENABLED -#define NRF_CSENSE_ENABLED 0 -#endif -#if NRF_CSENSE_ENABLED -// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. -#ifndef NRF_CSENSE_PAD_HYSTERESIS -#define NRF_CSENSE_PAD_HYSTERESIS 15 -#endif - -// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. -#ifndef NRF_CSENSE_PAD_DEVIATION -#define NRF_CSENSE_PAD_DEVIATION 70 -#endif - -// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. -#ifndef NRF_CSENSE_MIN_PAD_VALUE -#define NRF_CSENSE_MIN_PAD_VALUE 20 -#endif - -// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. -#ifndef NRF_CSENSE_MAX_PADS_NUMBER -#define NRF_CSENSE_MAX_PADS_NUMBER 20 -#endif - -// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. -#ifndef NRF_CSENSE_MAX_VALUE -#define NRF_CSENSE_MAX_VALUE 1000 -#endif - -// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. -// This is used when capacitive sensor does not use COMP. - -#ifndef NRF_CSENSE_OUTPUT_PIN -#define NRF_CSENSE_OUTPUT_PIN 26 -#endif - -#endif //NRF_CSENSE_ENABLED -// - -// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor low-level module -//========================================================== -#ifndef NRF_DRV_CSENSE_ENABLED -#define NRF_DRV_CSENSE_ENABLED 0 -#endif -#if NRF_DRV_CSENSE_ENABLED -// USE_COMP - Use the comparator to implement the capacitive sensor driver. - -// Due to Anomaly 84, COMP I_SOURCE is not functional. It has too high a varation. -//========================================================== -#ifndef USE_COMP -#define USE_COMP 0 -#endif -#if USE_COMP -// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). -#ifndef TIMER0_FOR_CSENSE -#define TIMER0_FOR_CSENSE 1 -#endif - -// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). -#ifndef TIMER1_FOR_CSENSE -#define TIMER1_FOR_CSENSE 2 -#endif - -// MEASUREMENT_PERIOD - Single measurement period. -// Time of a single measurement can be calculated as -// T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). -// I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad. - -#ifndef MEASUREMENT_PERIOD -#define MEASUREMENT_PERIOD 20 -#endif - -#endif //USE_COMP -// - -#endif //NRF_DRV_CSENSE_ENABLED -// - -// NRF_QUEUE_ENABLED - nrf_queue - Queue module - - -#ifndef NRF_QUEUE_ENABLED -#define NRF_QUEUE_ENABLED 0 -#endif - -// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. - - -#ifndef NRF_STRERROR_ENABLED -#define NRF_STRERROR_ENABLED 1 -#endif - -// RETARGET_ENABLED - retarget - Retargeting stdio functions - - -#ifndef RETARGET_ENABLED -#define RETARGET_ENABLED 1 -#endif - -// SLIP_ENABLED - slip - SLIP encoding and decoding - - -#ifndef SLIP_ENABLED -#define SLIP_ENABLED 0 -#endif - -// app_usbd_cdc_acm - USB CDC ACM class - -//========================================================== -// APP_USBD_CLASS_CDC_ACM_ENABLED - Enabling USBD CDC ACM Class library - - -#ifndef APP_USBD_CLASS_CDC_ACM_ENABLED -#define APP_USBD_CLASS_CDC_ACM_ENABLED 0 -#endif - -// APP_USBD_CDC_ACM_LOG_ENABLED - Enables logging in the module. - - -#ifndef APP_USBD_CDC_ACM_LOG_ENABLED -#define APP_USBD_CDC_ACM_LOG_ENABLED 0 -#endif - -// -//========================================================== - -// app_usbd_msc - USB MSC class - -//========================================================== -// APP_USBD_CLASS_MSC_ENABLED - Enabling USBD MSC Class library - - -#ifndef APP_USBD_CLASS_MSC_ENABLED -#define APP_USBD_CLASS_MSC_ENABLED 0 -#endif - -// APP_USBD_MSC_CLASS_LOG_ENABLED - Enables logging in the module. - - -#ifndef APP_USBD_MSC_CLASS_LOG_ENABLED -#define APP_USBD_MSC_CLASS_LOG_ENABLED 0 -#endif - -// -//========================================================== - -// -//========================================================== - -// nRF_Log - -//========================================================== -// NRF_LOG_ENABLED - nrf_log - Logging -//========================================================== -#ifndef NRF_LOG_ENABLED -#define NRF_LOG_ENABLED 0 -#endif -#if NRF_LOG_ENABLED -// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string -//========================================================== -#ifndef NRF_LOG_USES_COLORS -#define NRF_LOG_USES_COLORS 0 -#endif -#if NRF_LOG_USES_COLORS -// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_COLOR_DEFAULT -#define NRF_LOG_COLOR_DEFAULT 0 -#endif - -// NRF_LOG_ERROR_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_ERROR_COLOR -#define NRF_LOG_ERROR_COLOR 0 -#endif - -// NRF_LOG_WARNING_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef NRF_LOG_WARNING_COLOR -#define NRF_LOG_WARNING_COLOR 0 -#endif - -#endif //NRF_LOG_USES_COLORS -// - -// NRF_LOG_DEFAULT_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef NRF_LOG_DEFAULT_LEVEL -#define NRF_LOG_DEFAULT_LEVEL 3 -#endif - -// NRF_LOG_DEFERRED - Enable deffered logger. - -// Log data is buffered and can be processed in idle. -//========================================================== -#ifndef NRF_LOG_DEFERRED -#define NRF_LOG_DEFERRED 0 -#endif -#if NRF_LOG_DEFERRED -// NRF_LOG_DEFERRED_BUFSIZE - Size of the buffer for logs in words. -// Must be power of 2 - -#ifndef NRF_LOG_DEFERRED_BUFSIZE -#define NRF_LOG_DEFERRED_BUFSIZE 256 -#endif - -#endif //NRF_LOG_DEFERRED -// - -// NRF_LOG_USES_TIMESTAMP - Enable timestamping - - -// Function for getting the timestamp is provided by the user - -#ifndef NRF_LOG_USES_TIMESTAMP -#define NRF_LOG_USES_TIMESTAMP 0 -#endif - -#endif //NRF_LOG_ENABLED -// - -// nrf_log_backend - Logging sink - -//========================================================== -// NRF_LOG_BACKEND_MAX_STRING_LENGTH - Buffer for storing single output string -// Logger backend RAM usage is determined by this value. - -#ifndef NRF_LOG_BACKEND_MAX_STRING_LENGTH -#define NRF_LOG_BACKEND_MAX_STRING_LENGTH 256 -#endif - -// NRF_LOG_TIMESTAMP_DIGITS - Number of digits for timestamp -// If higher resolution timestamp source is used it might be needed to increase that - -#ifndef NRF_LOG_TIMESTAMP_DIGITS -#define NRF_LOG_TIMESTAMP_DIGITS 8 -#endif - -// NRF_LOG_BACKEND_SERIAL_USES_UART - If enabled data is printed over UART -//========================================================== -#ifndef NRF_LOG_BACKEND_SERIAL_USES_UART -#define NRF_LOG_BACKEND_SERIAL_USES_UART 0 -#endif -#if NRF_LOG_BACKEND_SERIAL_USES_UART -// NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 57600 baud - -#ifndef NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE -#define NRF_LOG_BACKEND_SERIAL_UART_BAUDRATE 30801920 -#endif - -// NRF_LOG_BACKEND_SERIAL_UART_TX_PIN - UART TX pin -#ifndef NRF_LOG_BACKEND_SERIAL_UART_TX_PIN -#define NRF_LOG_BACKEND_SERIAL_UART_TX_PIN 4 -#endif - -// NRF_LOG_BACKEND_SERIAL_UART_RX_PIN - UART RX pin -#ifndef NRF_LOG_BACKEND_SERIAL_UART_RX_PIN -#define NRF_LOG_BACKEND_SERIAL_UART_RX_PIN 3 -#endif - -// NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN - UART RTS pin -#ifndef NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN -#define NRF_LOG_BACKEND_SERIAL_UART_RTS_PIN 5 -#endif - -// NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN - UART CTS pin -#ifndef NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN -#define NRF_LOG_BACKEND_SERIAL_UART_CTS_PIN 7 -#endif - -// NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled - -#ifndef NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL -#define NRF_LOG_BACKEND_SERIAL_UART_FLOW_CONTROL 0 -#endif - -// NRF_LOG_BACKEND_UART_INSTANCE - UART instance used - -// <0=> 0 - -#ifndef NRF_LOG_BACKEND_UART_INSTANCE -#define NRF_LOG_BACKEND_UART_INSTANCE 0 -#endif - -#endif //NRF_LOG_BACKEND_SERIAL_USES_UART -// - -// NRF_LOG_BACKEND_SERIAL_USES_RTT - If enabled data is printed using RTT -//========================================================== -#ifndef NRF_LOG_BACKEND_SERIAL_USES_RTT -#define NRF_LOG_BACKEND_SERIAL_USES_RTT 0 -#endif -#if NRF_LOG_BACKEND_SERIAL_USES_RTT -// NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE - RTT output buffer size. -// Should be equal or bigger than \ref NRF_LOG_BACKEND_MAX_STRING_LENGTH. -// This value is used in Segger RTT configuration to set the buffer size -// if it is bigger than default RTT buffer size. - -#ifndef NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE -#define NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE 512 -#endif - -#endif //NRF_LOG_BACKEND_SERIAL_USES_RTT -// - -// -//========================================================== - -// -//========================================================== - -// nRF_Segger_RTT - -//========================================================== -// segger_rtt - SEGGER RTT - -//========================================================== -// SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. -// Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE -// or this value is actually used. It depends on which one is bigger. - -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 64 -#endif - -// SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2 -#endif - -// SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16 -#endif - -// SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2 -#endif - -// SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full. - - -// The following modes are supported: -// - SKIP - Do not block, output nothing. -// - TRIM - Do not block, output as much as fits. -// - BLOCK - Wait until there is space in the buffer. -// <0=> SKIP -// <1=> TRIM -// <2=> BLOCK_IF_FIFO_FULL - -#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE -#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0 -#endif - -// -//========================================================== - -// -//========================================================== - -// <<< end of configuration section >>> -#endif //SDK_CONFIG_H - diff --git a/bsp/nrf5x/nrf52840/applications/startup.c b/bsp/nrf5x/nrf52840/applications/startup.c deleted file mode 100644 index a48524814c..0000000000 --- a/bsp/nrf5x/nrf52840/applications/startup.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * File : startup.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2015, RT-Thread Develop Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://openlab.rt-thread.com/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2015-03-01 Yangfs the first version - * 2015-03-27 Bernard code cleanup. - */ - -#include -#include - -#include "board.h" - -/** - * @addtogroup NRF52832 - */ - -/*@{*/ - -extern int rt_application_init(void); - -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#define NRF_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) -#elif __ICCARM__ -#pragma section="HEAP" -#define NRF_SRAM_BEGIN (__segment_end("HEAP")) -#else -extern int __bss_end; -#define NRF_SRAM_BEGIN (&__bss_end) -#endif - -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* init board */ - rt_hw_board_init(); - - /* show version */ - rt_show_version(); - - /* init tick */ - rt_system_tick_init(); - - /* init kernel object */ - rt_system_object_init(); - - /* init timer system */ - rt_system_timer_init(); - -#ifdef RT_USING_HEAP - rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)CHIP_SRAM_END); -#endif - - /* init scheduler system */ - rt_system_scheduler_init(); - -#ifdef RT_USING_COMPONENTS_INIT - rt_components_init(); -#endif - - /* init application */ - rt_application_init(); - - /* init timer thread */ - rt_system_timer_thread_init(); - - /* init idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main(void) -{ - /* disable interrupt first */ - // rt_hw_interrupt_disable(); - - /* startup RT-Thread RTOS */ - rtthread_startup(); - - return 0; -} - -/*@}*/ diff --git a/bsp/nrf5x/nrf52840/board/Kconfig b/bsp/nrf5x/nrf52840/board/Kconfig index 37a160f9ac..b7edace9e8 100644 --- a/bsp/nrf5x/nrf52840/board/Kconfig +++ b/bsp/nrf5x/nrf52840/board/Kconfig @@ -2,8 +2,9 @@ menu "Hardware Drivers Config" config SOC_NRF52840 bool + config SOC_NRF52840 select RT_USING_COMPONENTS_INIT - # select RT_USING_USER_MAIN + select RT_USING_USER_MAIN default y menu "Onboard Peripheral Drivers" diff --git a/bsp/nrf5x/nrf52840/board/SConscript b/bsp/nrf5x/nrf52840/board/SConscript index abe43c5729..27bcddd310 100644 --- a/bsp/nrf5x/nrf52840/board/SConscript +++ b/bsp/nrf5x/nrf52840/board/SConscript @@ -5,6 +5,7 @@ from building import * cwd = GetCurrentDir() src = Glob('*.c') CPPPATH = [cwd] +define = ['USE_APP_CONFIG'] -group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,) +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH,CPPDEFINES = define) Return('group') diff --git a/bsp/nrf5x/nrf52840/board/app_config.h b/bsp/nrf5x/nrf52840/board/app_config.h new file mode 100644 index 0000000000..7909dd55b4 --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/app_config.h @@ -0,0 +1,4 @@ +#ifndef APP_CONFIG_H +#define APP_CONFIG_H + +#endif //APP_CONFIG_H diff --git a/bsp/nrf5x/nrf52840/board/board.c b/bsp/nrf5x/nrf52840/board/board.c index 7ff8bfd9c4..d62fbee9f3 100644 --- a/bsp/nrf5x/nrf52840/board/board.c +++ b/bsp/nrf5x/nrf52840/board/board.c @@ -1,205 +1,38 @@ -#include "board.h" -#include "drv_uart.h" -#include "app_util_platform.h" -#include "nrf_drv_common.h" -#include "nrf_systick.h" -#include "nrf_rtc.h" -#include "nrf_drv_clock.h" -#include "softdevice_handler.h" -#include "nrf_drv_uart.h" -#include "nrf_gpio.h" - #include #include +#include -#define TICK_RATE_HZ RT_TICK_PER_SECOND -#define SYSTICK_CLOCK_HZ ( 32768UL ) - -#define NRF_RTC_REG NRF_RTC1 - /* IRQn used by the selected RTC */ -#define NRF_RTC_IRQn RTC1_IRQn - /* Constants required to manipulate the NVIC. */ -#define NRF_RTC_PRESCALER ( (uint32_t) (ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) ) - /* Maximum RTC ticks */ -#define NRF_RTC_MAXTICKS ((1U<<24)-1U) - -static volatile uint32_t m_tick_overflow_count = 0; -#define NRF_RTC_BITWIDTH 24 -#define OSTick_Handler RTC1_IRQHandler -#define EXPECTED_IDLE_TIME_BEFORE_SLEEP 2 +#include "board.h" +#include "drv_uart.h" void SysTick_Configuration(void) { - nrf_drv_clock_lfclk_request(NULL); - - /* Configure SysTick to interrupt at the requested rate. */ - nrf_rtc_prescaler_set(NRF_RTC_REG, NRF_RTC_PRESCALER); - nrf_rtc_int_enable (NRF_RTC_REG, RTC_INTENSET_TICK_Msk); - nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_CLEAR); - nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_START); - nrf_rtc_event_enable(NRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk); - - NVIC_SetPriority(NRF_RTC_IRQn, 0xF); - NVIC_EnableIRQ(NRF_RTC_IRQn); -} - -static rt_tick_t _tick_distance(void) -{ - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); - - uint32_t systick_counter = nrf_rtc_counter_get(NRF_RTC_REG); - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK); - - /* check for overflow in TICK counter */ - if(nrf_rtc_event_pending(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW)) - { - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW); - m_tick_overflow_count++; - } - - return ((m_tick_overflow_count << NRF_RTC_BITWIDTH) + systick_counter) - rt_tick_get(); + /* Set interrupt priority */ + NVIC_SetPriority(SysTick_IRQn, 0xf); + + /* Configure SysTick to interrupt at the requested rate. */ + nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND); + nrf_systick_val_clear(); + nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE + | NRF_SYSTICK_CSR_ENABLE); } -void OSTick_Handler( void ) +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) { - uint32_t diff; - - /* enter interrupt */ + /* enter interrupt */ rt_interrupt_enter(); - diff = _tick_distance(); - while((diff--) > 0) - { - if (rt_thread_self() != RT_NULL) - { - rt_tick_increase(); - } - } + rt_tick_increase(); + /* leave interrupt */ rt_interrupt_leave(); } -static void _wakeup_tick_adjust(void) -{ - uint32_t diff; - uint32_t level; - - level = rt_hw_interrupt_disable(); - - diff = _tick_distance(); - - rt_tick_set(rt_tick_get() + diff); - - if (rt_thread_self() != RT_NULL) - { - struct rt_thread *thread; - /* check time slice */ - thread = rt_thread_self(); - - if (thread->remaining_tick <= diff) - { - /* change to initialized tick */ - thread->remaining_tick = thread->init_tick; - - /* yield */ - rt_thread_yield(); - } - else - { - thread->remaining_tick -= diff; - } - - /* check timer */ - rt_timer_check(); - } - - rt_hw_interrupt_enable(level); -} - -static void _sleep_ongo( uint32_t sleep_tick ) -{ - uint32_t enterTime; - uint32_t entry_tick; - - /* Make sure the SysTick reload value does not overflow the counter. */ - if ( sleep_tick > NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP ) - { - sleep_tick = NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP; - } - - rt_enter_critical(); - - enterTime = nrf_rtc_counter_get(NRF_RTC_REG); - - { - uint32_t wakeupTime = (enterTime + sleep_tick) & NRF_RTC_MAXTICKS; - - /* Stop tick events */ - nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_TICK_MASK); - - /* Configure CTC interrupt */ - nrf_rtc_cc_set(NRF_RTC_REG, 0, wakeupTime); - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); - nrf_rtc_int_enable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK); - - entry_tick = rt_tick_get(); - - __DSB(); - - if ( sleep_tick > 0 ) - { -#ifdef SOFTDEVICE_PRESENT - if (softdevice_handler_is_enabled()) - { - uint32_t err_code = sd_app_evt_wait(); - APP_ERROR_CHECK(err_code); - } - else -#endif - { - /* No SD - we would just block interrupts globally. - * BASEPRI cannot be used for that because it would prevent WFE from wake up. - */ - do{ - __WFE(); - } while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1])); - } - } - - nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK); - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); - - _wakeup_tick_adjust(); - - /* Correct the system ticks */ - { - - nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK); - nrf_rtc_int_enable (NRF_RTC_REG, NRF_RTC_INT_TICK_MASK); - /* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */ - NVIC_ClearPendingIRQ(NRF_RTC_IRQn); - } - - // rt_kprintf("entry tick:%u, expected:%u, current tick:%u\n", entry_tick, sleep_tick, rt_tick_get()); - } - - rt_exit_critical(); -} - - -void rt_hw_system_powersave(void) -{ - uint32_t sleep_tick; - - sleep_tick = rt_timer_next_timeout_tick() - rt_tick_get(); - - if ( sleep_tick >= EXPECTED_IDLE_TIME_BEFORE_SLEEP) - { - // rt_kprintf("sleep entry:%u\n", rt_tick_get()); - _sleep_ongo( sleep_tick ); - } -} void rt_hw_board_init(void) { @@ -207,14 +40,16 @@ void rt_hw_board_init(void) /* Activate deep sleep mode */ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - nrf_drv_clock_init(); - // nrf_drv_clock_hfclk_request(0); SysTick_Configuration(); - - rt_thread_idle_sethook(rt_hw_system_powersave); - + +#if defined(RT_USING_HEAP) + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + +#ifdef RT_USING_SERIAL rt_hw_uart_init(); +#endif #ifdef RT_USING_CONSOLE rt_console_set_device(RT_CONSOLE_DEVICE_NAME); @@ -223,5 +58,6 @@ void rt_hw_board_init(void) #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif + } diff --git a/bsp/nrf5x/nrf52840/board/board.h b/bsp/nrf5x/nrf52840/board/board.h index f9d291792a..021abe9f95 100644 --- a/bsp/nrf5x/nrf52840/board/board.h +++ b/bsp/nrf5x/nrf52840/board/board.h @@ -5,7 +5,18 @@ #include "nrf.h" -#define CHIP_SRAM_END (0x20000000 + 64*1024) +#if defined(__CC_ARM) || defined(__CLANG_ARM) +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END (0x20000000 + 64*1024) void rt_hw_board_init(void); diff --git a/bsp/nrf5x/nrf52840/board/nrfx_config.h b/bsp/nrf5x/nrf52840/board/nrfx_config.h new file mode 100644 index 0000000000..b006b6bcd5 --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/nrfx_config.h @@ -0,0 +1,47 @@ +/** + * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_CONFIG_H__ +#define NRFX_CONFIG_H__ + +// TODO - temporary redirection +#include + +#endif // NRFX_CONFIG_H__ diff --git a/bsp/nrf5x/nrf52840/board/nrfx_glue.h b/bsp/nrf5x/nrf52840/board/nrfx_glue.h new file mode 100644 index 0000000000..28025dafae --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/nrfx_glue.h @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRFX_GLUE_H__ +#define NRFX_GLUE_H__ + +// THIS IS A TEMPLATE FILE. +// It should be copied to a suitable location within the host environment into +// which nrfx is integrated, and the following macros should be provided with +// appropriate implementations. +// And this comment should be removed from the customized file. + +#ifdef __cplusplus +extern "C" { +#endif +#include +#include "nrf.h" +/** + * @defgroup nrfx_glue nrfx_glue.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +// Uncomment this line to use the standard MDK way of binding IRQ handlers +// at linking time. +#include + +//------------------------------------------------------------------------------ + +/** + * @brief Macro for placing a runtime assertion. + * + * @param expression Expression to be evaluated. + */ +#define NRFX_ASSERT(expression) + +/** + * @brief Macro for placing a compile time assertion. + * + * @param expression Expression to be evaluated. + */ +#define NRFX_STATIC_ASSERT(expression) + +//------------------------------------------------------------------------------ + +/** + * @brief Macro for setting the priority of a specific IRQ. + * + * @param irq_number IRQ number. + * @param priority Priority to be set. + */ +#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) NVIC_SetPriority(irq_number, priority) + +/** + * @brief Macro for enabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_ENABLE(irq_number) NVIC_EnableIRQ(irq_number) + +/** + * @brief Macro for checking if a specific IRQ is enabled. + * + * @param irq_number IRQ number. + * + * @retval true If the IRQ is enabled. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number) +static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number) +{ + return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32))); +} + + +/** + * @brief Macro for disabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number) +static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number) +{ + NVIC_DisableIRQ(irq_number); +} + + +/** + * @brief Macro for setting a specific IRQ as pending. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_SET(irq_number) + +/** + * @brief Macro for clearing the pending status of a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_CLEAR(irq_number) + +/** + * @brief Macro for checking the pending status of a specific IRQ. + * + * @retval true If the IRQ is pending. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_PENDING(irq_number) + +/** @brief Macro for entering into a critical section. */ +#define NRFX_CRITICAL_SECTION_ENTER() + +/** @brief Macro for exiting from a critical section. */ +#define NRFX_CRITICAL_SECTION_EXIT() + +//------------------------------------------------------------------------------ + +/** + * @brief When set to a non-zero value, this macro specifies that + * @ref nrfx_coredep_delay_us uses a precise DWT-based solution. + * A compilation error is generated if the DWT unit is not present + * in the SoC used. + */ +#define NRFX_DELAY_DWT_BASED 0 + +/** + * @brief Macro for delaying the code execution for at least the specified time. + * + * @param us_time Number of microseconds to wait. + */ +#define NRFX_DELAY_US(us_time) + +//------------------------------------------------------------------------------ + +/** @brief Atomic 32-bit unsigned type. */ +#define nrfx_atomic_t + +/** + * @brief Macro for storing a value to an atomic object and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value to store. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_STORE(p_data, value) + +/** + * @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value of the second operand in the OR operation. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_OR(p_data, value) + +/** + * @brief Macro for running a bitwise AND operation on an atomic object + * and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value of the second operand in the AND operation. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_AND(p_data, value) + +/** + * @brief Macro for running a bitwise XOR operation on an atomic object + * and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value of the second operand in the XOR operation. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_XOR(p_data, value) + +/** + * @brief Macro for running an addition operation on an atomic object + * and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value of the second operand in the ADD operation. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_ADD(p_data, value) + +/** + * @brief Macro for running a subtraction operation on an atomic object + * and returning its previous value. + * + * @param[in] p_data Atomic memory pointer. + * @param[in] value Value of the second operand in the SUB operation. + * + * @return Previous value of the atomic object. + */ +#define NRFX_ATOMIC_FETCH_SUB(p_data, value) + +//------------------------------------------------------------------------------ + +/** + * @brief When set to a non-zero value, this macro specifies that the + * @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined + * in a customized way and the default definitions from @c + * should not be used. + */ +#define NRFX_CUSTOM_ERROR_CODES 0 + +//------------------------------------------------------------------------------ + +/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */ +#define NRFX_DPPI_CHANNELS_USED 0 + +/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */ +#define NRFX_DPPI_GROUPS_USED 0 + +/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */ +#define NRFX_PPI_CHANNELS_USED 0 + +/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */ +#define NRFX_PPI_GROUPS_USED 0 + +/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */ +#define NRFX_EGUS_USED 0 + +/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */ +#define NRFX_TIMERS_USED 0 + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_GLUE_H__ diff --git a/bsp/nrf5x/nrf52840/board/nrfx_log.h b/bsp/nrf5x/nrf52840/board/nrfx_log.h new file mode 100644 index 0000000000..80d8efbdf1 --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/nrfx_log.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRFX_LOG_H__ +#define NRFX_LOG_H__ + +// THIS IS A TEMPLATE FILE. +// It should be copied to a suitable location within the host environment into +// which nrfx is integrated, and the following macros should be provided with +// appropriate implementations. +// And this comment should be removed from the customized file. + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_log nrfx_log.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +/** + * @brief Macro for logging a message with the severity level ERROR. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_ERROR(format, ...) + +/** + * @brief Macro for logging a message with the severity level WARNING. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_WARNING(format, ...) + +/** + * @brief Macro for logging a message with the severity level INFO. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_INFO(format, ...) + +/** + * @brief Macro for logging a message with the severity level DEBUG. + * + * @param format printf-style format string, optionally followed by arguments + * to be formatted and inserted in the resulting string. + */ +#define NRFX_LOG_DEBUG(format, ...) + + +/** + * @brief Macro for logging a memory dump with the severity level ERROR. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level WARNING. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level INFO. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_INFO(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level DEBUG. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length) + + +/** + * @brief Macro for getting the textual representation of a given error code. + * + * @param[in] error_code Error code. + * + * @return String containing the textual representation of the error code. + */ +#define NRFX_LOG_ERROR_STRING_GET(error_code) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_LOG_H__ diff --git a/bsp/nrf5x/nrf52840/board/sdk_config.h b/bsp/nrf5x/nrf52840/board/sdk_config.h new file mode 100644 index 0000000000..aeffd2905c --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/sdk_config.h @@ -0,0 +1,11698 @@ +/** + * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + + +#ifndef SDK_CONFIG_H +#define SDK_CONFIG_H +// <<< Use Configuration Wizard in Context Menu >>>\n +#ifdef USE_APP_CONFIG +#include "app_config.h" +#endif +// nRF_BLE + +//========================================================== +// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module + + +#ifndef BLE_ADVERTISING_ENABLED +#define BLE_ADVERTISING_ENABLED 0 +#endif + +// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands + + +#ifndef BLE_DTM_ENABLED +#define BLE_DTM_ENABLED 0 +#endif + +// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library + + +#ifndef BLE_RACP_ENABLED +#define BLE_RACP_ENABLED 0 +#endif + +// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) +//========================================================== +#ifndef NRF_BLE_QWR_ENABLED +#define NRF_BLE_QWR_ENABLED 0 +#endif +// NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. +#ifndef NRF_BLE_QWR_MAX_ATTR +#define NRF_BLE_QWR_MAX_ATTR 0 +#endif + +// + +// PEER_MANAGER_ENABLED - peer_manager - Peer Manager +//========================================================== +#ifndef PEER_MANAGER_ENABLED +#define PEER_MANAGER_ENABLED 0 +#endif +// PM_MAX_REGISTRANTS - Number of event handlers that can be registered. +#ifndef PM_MAX_REGISTRANTS +#define PM_MAX_REGISTRANTS 3 +#endif + +// PM_FLASH_BUFFERS - Number of internal buffers for flash operations. +// Decrease this value to lower RAM usage. + +#ifndef PM_FLASH_BUFFERS +#define PM_FLASH_BUFFERS 4 +#endif + +// PM_CENTRAL_ENABLED - Enable/disable central-specific Peer Manager functionality. + + +// Enable/disable central-specific Peer Manager functionality. + +#ifndef PM_CENTRAL_ENABLED +#define PM_CENTRAL_ENABLED 1 +#endif + +// PM_SERVICE_CHANGED_ENABLED - Enable/disable the service changed management for GATT server in Peer Manager. + + +// If not using a GATT server, or using a server wihout a service changed characteristic, +// disable this to save code space. + +#ifndef PM_SERVICE_CHANGED_ENABLED +#define PM_SERVICE_CHANGED_ENABLED 1 +#endif + +// PM_PEER_RANKS_ENABLED - Enable/disable the peer rank management in Peer Manager. + + +// Set this to false to save code space if not using the peer rank API. + +#ifndef PM_PEER_RANKS_ENABLED +#define PM_PEER_RANKS_ENABLED 1 +#endif + +// PM_LESC_ENABLED - Enable/disable LESC support in Peer Manager. + + +// If set to true, you need to call nrf_ble_lesc_request_handler() in the main loop to respond to LESC-related BLE events. If LESC support is not required, set this to false to save code space. + +#ifndef PM_LESC_ENABLED +#define PM_LESC_ENABLED 0 +#endif + +// PM_RA_PROTECTION_ENABLED - Enable/disable protection against repeated pairing attempts in Peer Manager. +//========================================================== +#ifndef PM_RA_PROTECTION_ENABLED +#define PM_RA_PROTECTION_ENABLED 0 +#endif +// PM_RA_PROTECTION_TRACKED_PEERS_NUM - Maximum number of peers whose authorization status can be tracked. +#ifndef PM_RA_PROTECTION_TRACKED_PEERS_NUM +#define PM_RA_PROTECTION_TRACKED_PEERS_NUM 8 +#endif + +// PM_RA_PROTECTION_MIN_WAIT_INTERVAL - Minimum waiting interval (in ms) before a new pairing attempt can be initiated. +#ifndef PM_RA_PROTECTION_MIN_WAIT_INTERVAL +#define PM_RA_PROTECTION_MIN_WAIT_INTERVAL 4000 +#endif + +// PM_RA_PROTECTION_MAX_WAIT_INTERVAL - Maximum waiting interval (in ms) before a new pairing attempt can be initiated. +#ifndef PM_RA_PROTECTION_MAX_WAIT_INTERVAL +#define PM_RA_PROTECTION_MAX_WAIT_INTERVAL 64000 +#endif + +// PM_RA_PROTECTION_REWARD_PERIOD - Reward period (in ms). +// The waiting interval is gradually decreased when no new failed pairing attempts are made during reward period. + +#ifndef PM_RA_PROTECTION_REWARD_PERIOD +#define PM_RA_PROTECTION_REWARD_PERIOD 10000 +#endif + +// + +// PM_HANDLER_SEC_DELAY_MS - Delay before starting security. +// This might be necessary for interoperability reasons, especially as peripheral. + +#ifndef PM_HANDLER_SEC_DELAY_MS +#define PM_HANDLER_SEC_DELAY_MS 0 +#endif + +// + +// +//========================================================== + +// nRF_BLE_Services + +//========================================================== +// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client + + +#ifndef BLE_ANCS_C_ENABLED +#define BLE_ANCS_C_ENABLED 0 +#endif + +// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client + + +#ifndef BLE_ANS_C_ENABLED +#define BLE_ANS_C_ENABLED 0 +#endif + +// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client + + +#ifndef BLE_BAS_C_ENABLED +#define BLE_BAS_C_ENABLED 0 +#endif + +// BLE_BAS_ENABLED - ble_bas - Battery Service +//========================================================== +#ifndef BLE_BAS_ENABLED +#define BLE_BAS_ENABLED 0 +#endif +// BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_BAS_CONFIG_LOG_ENABLED +#define BLE_BAS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_BAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_BAS_CONFIG_LOG_LEVEL +#define BLE_BAS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_BAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_BAS_CONFIG_INFO_COLOR +#define BLE_BAS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_BAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_BAS_CONFIG_DEBUG_COLOR +#define BLE_BAS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service + + +#ifndef BLE_CSCS_ENABLED +#define BLE_CSCS_ENABLED 0 +#endif + +// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client + + +#ifndef BLE_CTS_C_ENABLED +#define BLE_CTS_C_ENABLED 0 +#endif + +// BLE_DIS_ENABLED - ble_dis - Device Information Service + + +#ifndef BLE_DIS_ENABLED +#define BLE_DIS_ENABLED 0 +#endif + +// BLE_GLS_ENABLED - ble_gls - Glucose Service + + +#ifndef BLE_GLS_ENABLED +#define BLE_GLS_ENABLED 0 +#endif + +// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service + + +#ifndef BLE_HIDS_ENABLED +#define BLE_HIDS_ENABLED 0 +#endif + +// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client + + +#ifndef BLE_HRS_C_ENABLED +#define BLE_HRS_C_ENABLED 0 +#endif + +// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service + + +#ifndef BLE_HRS_ENABLED +#define BLE_HRS_ENABLED 0 +#endif + +// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service + + +#ifndef BLE_HTS_ENABLED +#define BLE_HTS_ENABLED 0 +#endif + +// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client + + +#ifndef BLE_IAS_C_ENABLED +#define BLE_IAS_C_ENABLED 0 +#endif + +// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service +//========================================================== +#ifndef BLE_IAS_ENABLED +#define BLE_IAS_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_IAS_CONFIG_LOG_ENABLED +#define BLE_IAS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_IAS_CONFIG_LOG_LEVEL +#define BLE_IAS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_IAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_IAS_CONFIG_INFO_COLOR +#define BLE_IAS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_IAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_IAS_CONFIG_DEBUG_COLOR +#define BLE_IAS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client + + +#ifndef BLE_LBS_C_ENABLED +#define BLE_LBS_C_ENABLED 0 +#endif + +// BLE_LBS_ENABLED - ble_lbs - LED Button Service + + +#ifndef BLE_LBS_ENABLED +#define BLE_LBS_ENABLED 0 +#endif + +// BLE_LLS_ENABLED - ble_lls - Link Loss Service + + +#ifndef BLE_LLS_ENABLED +#define BLE_LLS_ENABLED 0 +#endif + +// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service + + +#ifndef BLE_NUS_C_ENABLED +#define BLE_NUS_C_ENABLED 0 +#endif + +// BLE_NUS_ENABLED - ble_nus - Nordic UART Service +//========================================================== +#ifndef BLE_NUS_ENABLED +#define BLE_NUS_ENABLED 0 +#endif +// BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_NUS_CONFIG_LOG_ENABLED +#define BLE_NUS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_NUS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_NUS_CONFIG_LOG_LEVEL +#define BLE_NUS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_NUS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_NUS_CONFIG_INFO_COLOR +#define BLE_NUS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_NUS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_NUS_CONFIG_DEBUG_COLOR +#define BLE_NUS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client + + +#ifndef BLE_RSCS_C_ENABLED +#define BLE_RSCS_C_ENABLED 0 +#endif + +// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service + + +#ifndef BLE_RSCS_ENABLED +#define BLE_RSCS_ENABLED 0 +#endif + +// BLE_TPS_ENABLED - ble_tps - TX Power Service + + +#ifndef BLE_TPS_ENABLED +#define BLE_TPS_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Core + +//========================================================== +// NRF_MPU_LIB_ENABLED - nrf_mpu_lib - Module for MPU +//========================================================== +#ifndef NRF_MPU_LIB_ENABLED +#define NRF_MPU_LIB_ENABLED 0 +#endif +// NRF_MPU_LIB_CLI_CMDS - Enable CLI commands specific to the module. + + +#ifndef NRF_MPU_LIB_CLI_CMDS +#define NRF_MPU_LIB_CLI_CMDS 0 +#endif + +// + +// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Stack guard +//========================================================== +#ifndef NRF_STACK_GUARD_ENABLED +#define NRF_STACK_GUARD_ENABLED 0 +#endif +// NRF_STACK_GUARD_CONFIG_SIZE - Size of the stack guard. + +// <5=> 32 bytes +// <6=> 64 bytes +// <7=> 128 bytes +// <8=> 256 bytes +// <9=> 512 bytes +// <10=> 1024 bytes +// <11=> 2048 bytes +// <12=> 4096 bytes + +#ifndef NRF_STACK_GUARD_CONFIG_SIZE +#define NRF_STACK_GUARD_CONFIG_SIZE 7 +#endif + +// + +// +//========================================================== + +// nRF_Crypto + +//========================================================== +// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library. +//========================================================== +#ifndef NRF_CRYPTO_ENABLED +#define NRF_CRYPTO_ENABLED 1 +#endif +// NRF_CRYPTO_ALLOCATOR - Memory allocator + + +// Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected, the user has to create 'nrf_crypto_allocator.h' file that contains NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE, and NRF_CRYPTO_ALLOC_ON_STACK. +// <0=> Default +// <1=> User macros +// <2=> On stack (alloca) +// <3=> C dynamic memory (malloc) +// <4=> SDK Memory Manager (nrf_malloc) + +#ifndef NRF_CRYPTO_ALLOCATOR +#define NRF_CRYPTO_ALLOCATOR 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend. + +// The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310_BL. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310_BL. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED - CC310_BL SHA-256 hash functionality. + + +// CC310_BL backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED - nrf_cc310_bl buffers to RAM before running hash operation + + +// Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian +// Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED - Enable Interrupts while support using CC310 bl. + + +// Select a library version compatible with the configuration. When interrupts are disable, a version named _noint must be used + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend. + +// The CC310 hardware-accelerated cryptography backend (only available on nRF52840). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED - Enable the AES CBC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED - Enable the AES CTR mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED - Enable the AES ECB mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED - Enable the AES CBC_MAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED - Enable the AES CMAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED - Enable the AES CCM mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED - Enable the AES CCM* mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED - Enable the secp160r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED - Enable the secp160r2 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED - Enable the secp192r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED - Enable the secp384r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED - Enable the secp521r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED - Enable the secp160k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED - Enable the secp192k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED - Enable the secp224k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED - Enable the secp256k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED - Enable the Curve25519 curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED - Enable the Ed25519 curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED - CC310 SHA-256 hash functionality. + + +// CC310 backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED - CC310 SHA-512 hash functionality + + +// CC310 backend implementation for SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED - CC310 HMAC using SHA-256 + + +// CC310 backend implementation for HMAC using hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED - CC310 HMAC using SHA-512 + + +// CC310 backend implementation for HMAC using SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED - Enable RNG support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED - Enable Interrupts while support using CC310. + + +// Select a library version compatible with the configuration. When interrupts are disable, a version named _noint must be used + +#ifndef NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED - Enable the AES EAX mode using Cifra. + + +#ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED - Enable the AES CBC mode mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED - Enable the AES CTR mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED - Enable the AES CFB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED - Enable the AES ECB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED - Enable the AES CBC MAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED - Enable the AES CMAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED - Enable the AES CCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED - Enable the AES GCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED - Enable secp384r1 (NIST 384-bit) curve + + +// Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED - Enable secp521r1 (NIST 521-bit) curve + + +// Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED - Enable secp192k1 (Koblitz 192-bit) curve + + +// Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED - Enable secp224k1 (Koblitz 224-bit) curve + + +// Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED - Enable bp256r1 (Brainpool 256-bit) curve + + +// Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED - Enable bp384r1 (Brainpool 384-bit) curve + + +// Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED - Enable bp512r1 (Brainpool 512-bit) curve + + +// Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED - Enable Curve25519 curve + + +// Enable this setting if you need Curve25519 support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED - Enable mbed TLS SHA-256 hash functionality. + + +// mbed TLS backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED - Enable mbed TLS SHA-512 hash functionality. + + +// mbed TLS backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED - Enable mbed TLS HMAC using SHA-256. + + +// mbed TLS backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED - Enable mbed TLS HMAC using SHA-512. + + +// mbed TLS backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED - Enable the micro-ecc backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED - Enable the nRF HW RNG backend. + +// The nRF HW backend provide access to RNG peripheral in nRF5x devices. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED - Enable mbed TLS CTR-DRBG algorithm. + + +// Enable mbed TLS CTR-DRBG standardized by NIST (NIST SP 800-90A Rev. 1). The nRF HW RNG is used as an entropy source for seeding. + +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_SW_ENABLED - Enable the legacy nRFx sw for crypto. + +// The nRF SW cryptography backend (only used in bootloader context). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED - nRF SW hash backend support for SHA-256 + + +// The nRF SW backend provide access to nRF SDK legacy hash implementation of SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_OBERON_ENABLED - Enable the Oberon backend + +// The Oberon backend +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_OBERON_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using Oberon. + + +#ifndef NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED - Enable secp256r1 curve + + +// Enable this setting if you need secp256r1 curve support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED - Enable Curve25519 ECDH + + +// Enable this setting if you need Curve25519 ECDH support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED - Enable Ed25519 signature scheme + + +// Enable this setting if you need Ed25519 support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED - Oberon SHA-256 hash functionality + + +// Oberon backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED - Oberon SHA-512 hash functionality + + +// Oberon backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED - Oberon HMAC using SHA-256 + + +// Oberon backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED - Oberon HMAC using SHA-512 + + +// Oberon backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_OPTIGA_ENABLED - Enable the nrf_crypto Optiga Trust X backend. + +// Enables the nrf_crypto backend for Optiga Trust X devices. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_OPTIGA_ENABLED +#define NRF_CRYPTO_BACKEND_OPTIGA_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED - Optiga backend support for RNG + + +// The Optiga backend provide external chip RNG. + +#ifndef NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED - Optiga backend support for ECC secp256r1 + + +// The Optiga backend provide external chip ECC using secp256r1. + +#ifndef NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED - Big-endian byte order in raw Curve25519 data + + +// Enable big-endian byte order in Curve25519 API, if set to 1. Use little-endian, if set to 0. + +#ifndef NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED +#define NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED 0 +#endif + +// + +// +//========================================================== + +// nRF_DFU + +//========================================================== +// ble_dfu - Device Firmware Update + +//========================================================== +// BLE_DFU_ENABLED - Enable DFU Service. + + +#ifndef BLE_DFU_ENABLED +#define BLE_DFU_ENABLED 0 +#endif + +// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. + + +#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS +#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 +#endif + +// +//========================================================== + +// +//========================================================== + +// nRF_Drivers + +//========================================================== +// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver - legacy layer +//========================================================== +#ifndef COMP_ENABLED +#define COMP_ENABLED 0 +#endif +// COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef + +#ifndef COMP_CONFIG_REF +#define COMP_CONFIG_REF 1 +#endif + +// COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential + +#ifndef COMP_CONFIG_MAIN_MODE +#define COMP_CONFIG_MAIN_MODE 0 +#endif + +// COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed + +#ifndef COMP_CONFIG_SPEED_MODE +#define COMP_CONFIG_SPEED_MODE 2 +#endif + +// COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV + +#ifndef COMP_CONFIG_HYST +#define COMP_CONFIG_HYST 0 +#endif + +// COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA + +#ifndef COMP_CONFIG_ISOURCE +#define COMP_CONFIG_ISOURCE 0 +#endif + +// COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_INPUT +#define COMP_CONFIG_INPUT 0 +#endif + +// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_IRQ_PRIORITY +#define COMP_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver - legacy layer + + +#ifndef EGU_ENABLED +#define EGU_ENABLED 0 +#endif + +// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer +//========================================================== +#ifndef GPIOTE_ENABLED +#define GPIOTE_ENABLED 0 +#endif +// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef GPIOTE_CONFIG_IRQ_PRIORITY +#define GPIOTE_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver - legacy layer +//========================================================== +#ifndef I2S_ENABLED +#define I2S_ENABLED 0 +#endif +// I2S_CONFIG_SCK_PIN - SCK pin <0-31> + + +#ifndef I2S_CONFIG_SCK_PIN +#define I2S_CONFIG_SCK_PIN 31 +#endif + +// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> + + +#ifndef I2S_CONFIG_LRCK_PIN +#define I2S_CONFIG_LRCK_PIN 30 +#endif + +// I2S_CONFIG_MCK_PIN - MCK pin +#ifndef I2S_CONFIG_MCK_PIN +#define I2S_CONFIG_MCK_PIN 255 +#endif + +// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> + + +#ifndef I2S_CONFIG_SDOUT_PIN +#define I2S_CONFIG_SDOUT_PIN 29 +#endif + +// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> + + +#ifndef I2S_CONFIG_SDIN_PIN +#define I2S_CONFIG_SDIN_PIN 28 +#endif + +// I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave + +#ifndef I2S_CONFIG_MASTER +#define I2S_CONFIG_MASTER 0 +#endif + +// I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned + +#ifndef I2S_CONFIG_FORMAT +#define I2S_CONFIG_FORMAT 0 +#endif + +// I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right + +#ifndef I2S_CONFIG_ALIGN +#define I2S_CONFIG_ALIGN 0 +#endif + +// I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 + +#ifndef I2S_CONFIG_SWIDTH +#define I2S_CONFIG_SWIDTH 1 +#endif + +// I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right + +#ifndef I2S_CONFIG_CHANNELS +#define I2S_CONFIG_CHANNELS 1 +#endif + +// I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 + +#ifndef I2S_CONFIG_MCK_SETUP +#define I2S_CONFIG_MCK_SETUP 536870912 +#endif + +// I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x + +#ifndef I2S_CONFIG_RATIO +#define I2S_CONFIG_RATIO 2000 +#endif + +// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef I2S_CONFIG_IRQ_PRIORITY +#define I2S_CONFIG_IRQ_PRIORITY 6 +#endif + +// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef I2S_CONFIG_LOG_ENABLED +#define I2S_CONFIG_LOG_ENABLED 0 +#endif +// I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef I2S_CONFIG_LOG_LEVEL +#define I2S_CONFIG_LOG_LEVEL 3 +#endif + +// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef I2S_CONFIG_INFO_COLOR +#define I2S_CONFIG_INFO_COLOR 0 +#endif + +// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef I2S_CONFIG_DEBUG_COLOR +#define I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver - legacy layer +//========================================================== +#ifndef LPCOMP_ENABLED +#define LPCOMP_ENABLED 0 +#endif +// LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 + +#ifndef LPCOMP_CONFIG_REFERENCE +#define LPCOMP_CONFIG_REFERENCE 3 +#endif + +// LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down + +#ifndef LPCOMP_CONFIG_DETECTION +#define LPCOMP_CONFIG_DETECTION 2 +#endif + +// LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef LPCOMP_CONFIG_INPUT +#define LPCOMP_CONFIG_INPUT 0 +#endif + +// LPCOMP_CONFIG_HYST - Hysteresis + + +#ifndef LPCOMP_CONFIG_HYST +#define LPCOMP_CONFIG_HYST 0 +#endif + +// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef LPCOMP_CONFIG_IRQ_PRIORITY +#define LPCOMP_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver +//========================================================== +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif +// NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth +// <131073=> External Low Swing +// <196609=> External Full Swing + +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +// NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR +#define NRFX_CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR +#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver +//========================================================== +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif +// NRFX_COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef + +#ifndef NRFX_COMP_CONFIG_REF +#define NRFX_COMP_CONFIG_REF 1 +#endif + +// NRFX_COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential + +#ifndef NRFX_COMP_CONFIG_MAIN_MODE +#define NRFX_COMP_CONFIG_MAIN_MODE 0 +#endif + +// NRFX_COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed + +#ifndef NRFX_COMP_CONFIG_SPEED_MODE +#define NRFX_COMP_CONFIG_SPEED_MODE 2 +#endif + +// NRFX_COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV + +#ifndef NRFX_COMP_CONFIG_HYST +#define NRFX_COMP_CONFIG_HYST 0 +#endif + +// NRFX_COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA + +#ifndef NRFX_COMP_CONFIG_ISOURCE +#define NRFX_COMP_CONFIG_ISOURCE 0 +#endif + +// NRFX_COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_COMP_CONFIG_INPUT +#define NRFX_COMP_CONFIG_INPUT 0 +#endif + +// NRFX_COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_COMP_CONFIG_INFO_COLOR +#define NRFX_COMP_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR +#define NRFX_COMP_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver +//========================================================== +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif +// NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver +//========================================================== +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif +// NRFX_I2S_CONFIG_SCK_PIN - SCK pin <0-31> + + +#ifndef NRFX_I2S_CONFIG_SCK_PIN +#define NRFX_I2S_CONFIG_SCK_PIN 31 +#endif + +// NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> + + +#ifndef NRFX_I2S_CONFIG_LRCK_PIN +#define NRFX_I2S_CONFIG_LRCK_PIN 30 +#endif + +// NRFX_I2S_CONFIG_MCK_PIN - MCK pin +#ifndef NRFX_I2S_CONFIG_MCK_PIN +#define NRFX_I2S_CONFIG_MCK_PIN 255 +#endif + +// NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> + + +#ifndef NRFX_I2S_CONFIG_SDOUT_PIN +#define NRFX_I2S_CONFIG_SDOUT_PIN 29 +#endif + +// NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> + + +#ifndef NRFX_I2S_CONFIG_SDIN_PIN +#define NRFX_I2S_CONFIG_SDIN_PIN 28 +#endif + +// NRFX_I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave + +#ifndef NRFX_I2S_CONFIG_MASTER +#define NRFX_I2S_CONFIG_MASTER 0 +#endif + +// NRFX_I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned + +#ifndef NRFX_I2S_CONFIG_FORMAT +#define NRFX_I2S_CONFIG_FORMAT 0 +#endif + +// NRFX_I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right + +#ifndef NRFX_I2S_CONFIG_ALIGN +#define NRFX_I2S_CONFIG_ALIGN 0 +#endif + +// NRFX_I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 + +#ifndef NRFX_I2S_CONFIG_SWIDTH +#define NRFX_I2S_CONFIG_SWIDTH 1 +#endif + +// NRFX_I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right + +#ifndef NRFX_I2S_CONFIG_CHANNELS +#define NRFX_I2S_CONFIG_CHANNELS 1 +#endif + +// NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 + +#ifndef NRFX_I2S_CONFIG_MCK_SETUP +#define NRFX_I2S_CONFIG_MCK_SETUP 536870912 +#endif + +// NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x + +#ifndef NRFX_I2S_CONFIG_RATIO +#define NRFX_I2S_CONFIG_RATIO 2000 +#endif + +// NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_INFO_COLOR +#define NRFX_I2S_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR +#define NRFX_I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver +//========================================================== +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 + +#ifndef NRFX_LPCOMP_CONFIG_REFERENCE +#define NRFX_LPCOMP_CONFIG_REFERENCE 3 +#endif + +// NRFX_LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down + +#ifndef NRFX_LPCOMP_CONFIG_DETECTION +#define NRFX_LPCOMP_CONFIG_DETECTION 2 +#endif + +// NRFX_LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_LPCOMP_CONFIG_INPUT +#define NRFX_LPCOMP_CONFIG_INPUT 0 +#endif + +// NRFX_LPCOMP_CONFIG_HYST - Hysteresis + + +#ifndef NRFX_LPCOMP_CONFIG_HYST +#define NRFX_LPCOMP_CONFIG_HYST 0 +#endif + +// NRFX_LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR +#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR +#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_NFCT_ENABLED - nrfx_nfct - NFCT peripheral driver +//========================================================== +#ifndef NRFX_NFCT_ENABLED +#define NRFX_NFCT_ENABLED 0 +#endif +// NRFX_NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_NFCT_CONFIG_IRQ_PRIORITY +#define NRFX_NFCT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_NFCT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED +#define NRFX_NFCT_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_NFCT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL +#define NRFX_NFCT_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_NFCT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_NFCT_CONFIG_INFO_COLOR +#define NRFX_NFCT_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_NFCT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_NFCT_CONFIG_DEBUG_COLOR +#define NRFX_NFCT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver +//========================================================== +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif +// NRFX_PDM_CONFIG_MODE - Mode + +// <0=> Stereo +// <1=> Mono + +#ifndef NRFX_PDM_CONFIG_MODE +#define NRFX_PDM_CONFIG_MODE 1 +#endif + +// NRFX_PDM_CONFIG_EDGE - Edge + +// <0=> Left falling +// <1=> Left rising + +#ifndef NRFX_PDM_CONFIG_EDGE +#define NRFX_PDM_CONFIG_EDGE 0 +#endif + +// NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k + +#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ +#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032 +#endif + +// NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PDM_CONFIG_INFO_COLOR +#define NRFX_PDM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR +#define NRFX_PDM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver +//========================================================== +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif +// NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. + +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN +#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0 +#endif + +// NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. + +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV +#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0 +#endif + +// + +// NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator +//========================================================== +#ifndef NRFX_PPI_ENABLED +#define NRFX_PPI_ENABLED 0 +#endif +// NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PPI_CONFIG_LOG_ENABLED +#define NRFX_PPI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PPI_CONFIG_LOG_LEVEL +#define NRFX_PPI_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PPI_CONFIG_INFO_COLOR +#define NRFX_PPI_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR +#define NRFX_PPI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver +//========================================================== +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif +// NRFX_PWM0_ENABLED - Enable PWM0 instance + + +#ifndef NRFX_PWM0_ENABLED +#define NRFX_PWM0_ENABLED 0 +#endif + +// NRFX_PWM1_ENABLED - Enable PWM1 instance + + +#ifndef NRFX_PWM1_ENABLED +#define NRFX_PWM1_ENABLED 0 +#endif + +// NRFX_PWM2_ENABLED - Enable PWM2 instance + + +#ifndef NRFX_PWM2_ENABLED +#define NRFX_PWM2_ENABLED 0 +#endif + +// NRFX_PWM3_ENABLED - Enable PWM3 instance + + +#ifndef NRFX_PWM3_ENABLED +#define NRFX_PWM3_ENABLED 0 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> + + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> + + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> + + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> + + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz + +#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK +#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode + +// <0=> Up +// <1=> Up and Down + +#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE +#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE +#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform + +#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE +#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode + +// <0=> Auto +// <1=> Triggered + +#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE +#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0 +#endif + +// NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_INFO_COLOR +#define NRFX_PWM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR +#define NRFX_PWM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver +//========================================================== +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 +#endif +// NRFX_QDEC_CONFIG_REPORTPER - Report period + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples + +#ifndef NRFX_QDEC_CONFIG_REPORTPER +#define NRFX_QDEC_CONFIG_REPORTPER 0 +#endif + +// NRFX_QDEC_CONFIG_SAMPLEPER - Sample period + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us + +#ifndef NRFX_QDEC_CONFIG_SAMPLEPER +#define NRFX_QDEC_CONFIG_SAMPLEPER 7 +#endif + +// NRFX_QDEC_CONFIG_PIO_A - A pin <0-31> + + +#ifndef NRFX_QDEC_CONFIG_PIO_A +#define NRFX_QDEC_CONFIG_PIO_A 31 +#endif + +// NRFX_QDEC_CONFIG_PIO_B - B pin <0-31> + + +#ifndef NRFX_QDEC_CONFIG_PIO_B +#define NRFX_QDEC_CONFIG_PIO_B 31 +#endif + +// NRFX_QDEC_CONFIG_PIO_LED - LED pin <0-31> + + +#ifndef NRFX_QDEC_CONFIG_PIO_LED +#define NRFX_QDEC_CONFIG_PIO_LED 31 +#endif + +// NRFX_QDEC_CONFIG_LEDPRE - LED pre +#ifndef NRFX_QDEC_CONFIG_LEDPRE +#define NRFX_QDEC_CONFIG_LEDPRE 511 +#endif + +// NRFX_QDEC_CONFIG_LEDPOL - LED polarity + +// <0=> Active low +// <1=> Active high + +#ifndef NRFX_QDEC_CONFIG_LEDPOL +#define NRFX_QDEC_CONFIG_LEDPOL 1 +#endif + +// NRFX_QDEC_CONFIG_DBFEN - Debouncing enable + + +#ifndef NRFX_QDEC_CONFIG_DBFEN +#define NRFX_QDEC_CONFIG_DBFEN 0 +#endif + +// NRFX_QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable + + +#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN +#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0 +#endif + +// NRFX_QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_QDEC_CONFIG_INFO_COLOR +#define NRFX_QDEC_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR +#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver +//========================================================== +#ifndef NRFX_QSPI_ENABLED +#define NRFX_QSPI_ENABLED 0 +#endif +// NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> + + +#ifndef NRFX_QSPI_CONFIG_SCK_DELAY +#define NRFX_QSPI_CONFIG_SCK_DELAY 1 +#endif + +// NRFX_QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef NRFX_QSPI_CONFIG_XIP_OFFSET +#define NRFX_QSPI_CONFIG_XIP_OFFSET 0 +#endif + +// NRFX_QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO + +#ifndef NRFX_QSPI_CONFIG_READOC +#define NRFX_QSPI_CONFIG_READOC 0 +#endif + +// NRFX_QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef NRFX_QSPI_CONFIG_WRITEOC +#define NRFX_QSPI_CONFIG_WRITEOC 0 +#endif + +// NRFX_QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit + +#ifndef NRFX_QSPI_CONFIG_ADDRMODE +#define NRFX_QSPI_CONFIG_ADDRMODE 0 +#endif + +// NRFX_QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 + +#ifndef NRFX_QSPI_CONFIG_MODE +#define NRFX_QSPI_CONFIG_MODE 0 +#endif + +// NRFX_QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 + +#ifndef NRFX_QSPI_CONFIG_FREQUENCY +#define NRFX_QSPI_CONFIG_FREQUENCY 15 +#endif + +// NRFX_QSPI_PIN_SCK - SCK pin value. +#ifndef NRFX_QSPI_PIN_SCK +#define NRFX_QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_PIN_CSN - CSN pin value. +#ifndef NRFX_QSPI_PIN_CSN +#define NRFX_QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_PIN_IO0 - IO0 pin value. +#ifndef NRFX_QSPI_PIN_IO0 +#define NRFX_QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_PIN_IO1 - IO1 pin value. +#ifndef NRFX_QSPI_PIN_IO1 +#define NRFX_QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_PIN_IO2 - IO2 pin value. +#ifndef NRFX_QSPI_PIN_IO2 +#define NRFX_QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_PIN_IO3 - IO3 pin value. +#ifndef NRFX_QSPI_PIN_IO3 +#define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY +#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver +//========================================================== +#ifndef NRFX_RNG_ENABLED +#define NRFX_RNG_ENABLED 0 +#endif +// NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction + + +#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION +#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1 +#endif + +// NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY +#define NRFX_RNG_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_RNG_CONFIG_LOG_ENABLED +#define NRFX_RNG_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_RNG_CONFIG_LOG_LEVEL +#define NRFX_RNG_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RNG_CONFIG_INFO_COLOR +#define NRFX_RNG_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR +#define NRFX_RNG_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver +//========================================================== +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif +// NRFX_RTC0_ENABLED - Enable RTC0 instance + + +#ifndef NRFX_RTC0_ENABLED +#define NRFX_RTC0_ENABLED 0 +#endif + +// NRFX_RTC1_ENABLED - Enable RTC1 instance + + +#ifndef NRFX_RTC1_ENABLED +#define NRFX_RTC1_ENABLED 0 +#endif + +// NRFX_RTC2_ENABLED - Enable RTC2 instance + + +#ifndef NRFX_RTC2_ENABLED +#define NRFX_RTC2_ENABLED 0 +#endif + +// NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +#ifndef NRFX_RTC_MAXIMUM_LATENCY_US +#define NRFX_RTC_MAXIMUM_LATENCY_US 2000 +#endif + +// NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> + + +#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY +#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768 +#endif + +// NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering + + +#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE +#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0 +#endif + +// NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RTC_CONFIG_INFO_COLOR +#define NRFX_RTC_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR +#define NRFX_RTC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver +//========================================================== +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif +// NRFX_SAADC_CONFIG_RESOLUTION - Resolution + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit + +#ifndef NRFX_SAADC_CONFIG_RESOLUTION +#define NRFX_SAADC_CONFIG_RESOLUTION 1 +#endif + +// NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x + +#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE +#define NRFX_SAADC_CONFIG_OVERSAMPLE 0 +#endif + +// NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode + + +#ifndef NRFX_SAADC_CONFIG_LP_MODE +#define NRFX_SAADC_CONFIG_LP_MODE 0 +#endif + +// NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SAADC_CONFIG_INFO_COLOR +#define NRFX_SAADC_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR +#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver +//========================================================== +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif +// NRFX_SPIM0_ENABLED - Enable SPIM0 instance + + +#ifndef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED 0 +#endif + +// NRFX_SPIM1_ENABLED - Enable SPIM1 instance + + +#ifndef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED 0 +#endif + +// NRFX_SPIM2_ENABLED - Enable SPIM2 instance + + +#ifndef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED 0 +#endif + +// NRFX_SPIM3_ENABLED - Enable SPIM3 instance + + +#ifndef NRFX_SPIM3_ENABLED +#define NRFX_SPIM3_ENABLED 0 +#endif + +// NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features + + +#ifndef NRFX_SPIM_EXTENDED_ENABLED +#define NRFX_SPIM_EXTENDED_ENABLED 0 +#endif + +// NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP + +#ifndef NRFX_SPIM_MISO_PULL_CFG +#define NRFX_SPIM_MISO_PULL_CFG 1 +#endif + +// NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIM_CONFIG_INFO_COLOR +#define NRFX_SPIM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR +#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver +//========================================================== +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif +// NRFX_SPIS0_ENABLED - Enable SPIS0 instance + + +#ifndef NRFX_SPIS0_ENABLED +#define NRFX_SPIS0_ENABLED 0 +#endif + +// NRFX_SPIS1_ENABLED - Enable SPIS1 instance + + +#ifndef NRFX_SPIS1_ENABLED +#define NRFX_SPIS1_ENABLED 0 +#endif + +// NRFX_SPIS2_ENABLED - Enable SPIS2 instance + + +#ifndef NRFX_SPIS2_ENABLED +#define NRFX_SPIS2_ENABLED 0 +#endif + +// NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> + + +#ifndef NRFX_SPIS_DEFAULT_DEF +#define NRFX_SPIS_DEFAULT_DEF 255 +#endif + +// NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> + + +#ifndef NRFX_SPIS_DEFAULT_ORC +#define NRFX_SPIS_DEFAULT_ORC 255 +#endif + +// NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_INFO_COLOR +#define NRFX_SPIS_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR +#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver +//========================================================== +#ifndef NRFX_SPI_ENABLED +#define NRFX_SPI_ENABLED 0 +#endif +// NRFX_SPI0_ENABLED - Enable SPI0 instance + + +#ifndef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED 0 +#endif + +// NRFX_SPI1_ENABLED - Enable SPI1 instance + + +#ifndef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED 0 +#endif + +// NRFX_SPI2_ENABLED - Enable SPI2 instance + + +#ifndef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED 0 +#endif + +// NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP + +#ifndef NRFX_SPI_MISO_PULL_CFG +#define NRFX_SPI_MISO_PULL_CFG 1 +#endif + +// NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPI_CONFIG_LOG_ENABLED +#define NRFX_SPI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SPI_CONFIG_LOG_LEVEL +#define NRFX_SPI_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPI_CONFIG_INFO_COLOR +#define NRFX_SPI_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR +#define NRFX_SPI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator +//========================================================== +#ifndef NRFX_SWI_ENABLED +#define NRFX_SWI_ENABLED 0 +#endif +// NRFX_EGU_ENABLED - Enable EGU support + + +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +// NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver + + +#ifndef NRFX_SWI0_DISABLED +#define NRFX_SWI0_DISABLED 0 +#endif + +// NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver + + +#ifndef NRFX_SWI1_DISABLED +#define NRFX_SWI1_DISABLED 0 +#endif + +// NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver + + +#ifndef NRFX_SWI2_DISABLED +#define NRFX_SWI2_DISABLED 0 +#endif + +// NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver + + +#ifndef NRFX_SWI3_DISABLED +#define NRFX_SWI3_DISABLED 0 +#endif + +// NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver + + +#ifndef NRFX_SWI4_DISABLED +#define NRFX_SWI4_DISABLED 0 +#endif + +// NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver + + +#ifndef NRFX_SWI5_DISABLED +#define NRFX_SWI5_DISABLED 0 +#endif + +// NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SWI_CONFIG_LOG_ENABLED +#define NRFX_SWI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SWI_CONFIG_LOG_LEVEL +#define NRFX_SWI_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SWI_CONFIG_INFO_COLOR +#define NRFX_SWI_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR +#define NRFX_SWI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver +//========================================================== +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif +// NRFX_TIMER0_ENABLED - Enable TIMER0 instance + + +#ifndef NRFX_TIMER0_ENABLED +#define NRFX_TIMER0_ENABLED 0 +#endif + +// NRFX_TIMER1_ENABLED - Enable TIMER1 instance + + +#ifndef NRFX_TIMER1_ENABLED +#define NRFX_TIMER1_ENABLED 0 +#endif + +// NRFX_TIMER2_ENABLED - Enable TIMER2 instance + + +#ifndef NRFX_TIMER2_ENABLED +#define NRFX_TIMER2_ENABLED 0 +#endif + +// NRFX_TIMER3_ENABLED - Enable TIMER3 instance + + +#ifndef NRFX_TIMER3_ENABLED +#define NRFX_TIMER3_ENABLED 0 +#endif + +// NRFX_TIMER4_ENABLED - Enable TIMER4 instance + + +#ifndef NRFX_TIMER4_ENABLED +#define NRFX_TIMER4_ENABLED 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation + +// <0=> Timer +// <1=> Counter + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE +#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH +#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TIMER_CONFIG_INFO_COLOR +#define NRFX_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR +#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver +//========================================================== +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif +// NRFX_TWIM0_ENABLED - Enable TWIM0 instance + + +#ifndef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED 0 +#endif + +// NRFX_TWIM1_ENABLED - Enable TWIM1 instance + + +#ifndef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED 0 +#endif + +// NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 +#endif + +// NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit + + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 +#endif + +// NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIM_CONFIG_INFO_COLOR +#define NRFX_TWIM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR +#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver +//========================================================== +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif +// NRFX_TWIS0_ENABLED - Enable TWIS0 instance + + +#ifndef NRFX_TWIS0_ENABLED +#define NRFX_TWIS0_ENABLED 0 +#endif + +// NRFX_TWIS1_ENABLED - Enable TWIS1 instance + + +#ifndef NRFX_TWIS1_ENABLED +#define NRFX_TWIS1_ENABLED 0 +#endif + +// NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once + + +// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. + +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +// NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode + + +// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. + +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIS_CONFIG_INFO_COLOR +#define NRFX_TWIS_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR +#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver +//========================================================== +#ifndef NRFX_TWI_ENABLED +#define NRFX_TWI_ENABLED 0 +#endif +// NRFX_TWI0_ENABLED - Enable TWI0 instance + + +#ifndef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED 0 +#endif + +// NRFX_TWI1_ENABLED - Enable TWI1 instance + + +#ifndef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED 0 +#endif + +// NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k + +#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 +#endif + +// NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit + + +#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 +#endif + +// NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWI_CONFIG_LOG_ENABLED +#define NRFX_TWI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWI_CONFIG_LOG_LEVEL +#define NRFX_TWI_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWI_CONFIG_INFO_COLOR +#define NRFX_TWI_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR +#define NRFX_TWI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver +//========================================================== +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif +// NRFX_UARTE0_ENABLED - Enable UARTE0 instance +#ifndef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED 0 +#endif + +// NRFX_UARTE1_ENABLED - Enable UARTE1 instance +#ifndef NRFX_UARTE1_ENABLED +#define NRFX_UARTE1_ENABLED 0 +#endif + +// NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC +#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 +#endif + +// NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY +#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 +#endif + +// NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <8388608=> 31250 baud +// <10289152=> 38400 baud +// <15007744=> 56000 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 +#endif + +// NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver +//========================================================== +#ifndef NRFX_UART_ENABLED +#define NRFX_UART_ENABLED 1 +#endif +// NRFX_UART0_ENABLED - Enable UART0 instance +#ifndef NRFX_UART0_ENABLED +#define NRFX_UART0_ENABLED 1 +#endif + +// NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC +#define NRFX_UART_DEFAULT_CONFIG_HWFC 0 +#endif + +// NRFX_UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY +#define NRFX_UART_DEFAULT_CONFIG_PARITY 0 +#endif + +// NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3866624=> 14400 baud +// <5152768=> 19200 baud +// <7729152=> 28800 baud +// <8388608=> 31250 baud +// <10309632=> 38400 baud +// <15007744=> 56000 baud +// <15462400=> 57600 baud +// <20615168=> 76800 baud +// <30924800=> 115200 baud +// <61845504=> 230400 baud +// <67108864=> 250000 baud +// <123695104=> 460800 baud +// <247386112=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 +#endif + +// NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 4 +#endif + +// NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UART_CONFIG_LOG_ENABLED +#define NRFX_UART_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UART_CONFIG_LOG_LEVEL +#define NRFX_UART_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UART_CONFIG_INFO_COLOR +#define NRFX_UART_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UART_CONFIG_DEBUG_COLOR +#define NRFX_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_USBD_ENABLED - nrfx_usbd - USBD peripheral driver +//========================================================== +#ifndef NRFX_USBD_ENABLED +#define NRFX_USBD_ENABLED 0 +#endif +// NRFX_USBD_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_USBD_CONFIG_IRQ_PRIORITY +#define NRFX_USBD_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_USBD_CONFIG_DMASCHEDULER_MODE - USBD DMA scheduler working scheme + +// <0=> Prioritized access +// <1=> Round Robin + +#ifndef NRFX_USBD_CONFIG_DMASCHEDULER_MODE +#define NRFX_USBD_CONFIG_DMASCHEDULER_MODE 0 +#endif + +// NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers + + +// This option gives priority to isochronous transfers. +// Enabling it assures that isochronous transfers are always processed, +// even if multiple other transfers are pending. +// Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm +// function is called, so the option is independent of the algorithm chosen. + +#ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST +#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 +#endif + +// NRFX_USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready + + +// If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent. +// Else, there will be no response. + +#ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP +#define NRFX_USBD_CONFIG_ISO_IN_ZLP 0 +#endif + +// + +// NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver +//========================================================== +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif +// NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT + +#ifndef NRFX_WDT_CONFIG_BEHAVIOUR +#define NRFX_WDT_CONFIG_BEHAVIOUR 1 +#endif + +// NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> + + +#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE +#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 +#endif + +// NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver + +// <0=> Include WDT IRQ handling +// <1=> Remove WDT IRQ handling + +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +// NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_WDT_CONFIG_INFO_COLOR +#define NRFX_WDT_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR +#define NRFX_WDT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer +//========================================================== +#ifndef NRF_CLOCK_ENABLED +#define NRF_CLOCK_ENABLED 0 +#endif +// CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth +// <131073=> External Low Swing +// <196609=> External Full Swing + +#ifndef CLOCK_CONFIG_LF_SRC +#define CLOCK_CONFIG_LF_SRC 1 +#endif + +// CLOCK_CONFIG_LF_CAL_ENABLED - Calibration enable for LF Clock Source + + +#ifndef CLOCK_CONFIG_LF_CAL_ENABLED +#define CLOCK_CONFIG_LF_CAL_ENABLED 0 +#endif + +// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef CLOCK_CONFIG_IRQ_PRIORITY +#define CLOCK_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer +//========================================================== +#ifndef PDM_ENABLED +#define PDM_ENABLED 0 +#endif +// PDM_CONFIG_MODE - Mode + +// <0=> Stereo +// <1=> Mono + +#ifndef PDM_CONFIG_MODE +#define PDM_CONFIG_MODE 1 +#endif + +// PDM_CONFIG_EDGE - Edge + +// <0=> Left falling +// <1=> Left rising + +#ifndef PDM_CONFIG_EDGE +#define PDM_CONFIG_EDGE 0 +#endif + +// PDM_CONFIG_CLOCK_FREQ - Clock frequency + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k + +#ifndef PDM_CONFIG_CLOCK_FREQ +#define PDM_CONFIG_CLOCK_FREQ 138412032 +#endif + +// PDM_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef PDM_CONFIG_IRQ_PRIORITY +#define PDM_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer +//========================================================== +#ifndef POWER_ENABLED +#define POWER_ENABLED 0 +#endif +// POWER_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef POWER_CONFIG_IRQ_PRIORITY +#define POWER_CONFIG_IRQ_PRIORITY 6 +#endif + +// POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. + +#ifndef POWER_CONFIG_DEFAULT_DCDCEN +#define POWER_CONFIG_DEFAULT_DCDCEN 0 +#endif + +// POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. + +#ifndef POWER_CONFIG_DEFAULT_DCDCENHV +#define POWER_CONFIG_DEFAULT_DCDCENHV 0 +#endif + +// + +// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer + + +#ifndef PPI_ENABLED +#define PPI_ENABLED 0 +#endif + +// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer +//========================================================== +#ifndef PWM_ENABLED +#define PWM_ENABLED 0 +#endif +// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> + + +#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN +#define PWM_DEFAULT_CONFIG_OUT0_PIN 31 +#endif + +// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> + + +#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN +#define PWM_DEFAULT_CONFIG_OUT1_PIN 31 +#endif + +// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> + + +#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN +#define PWM_DEFAULT_CONFIG_OUT2_PIN 31 +#endif + +// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> + + +#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN +#define PWM_DEFAULT_CONFIG_OUT3_PIN 31 +#endif + +// PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz + +#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK +#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 +#endif + +// PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode + +// <0=> Up +// <1=> Up and Down + +#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE +#define PWM_DEFAULT_CONFIG_COUNT_MODE 0 +#endif + +// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE +#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 +#endif + +// PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform + +#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE +#define PWM_DEFAULT_CONFIG_LOAD_MODE 0 +#endif + +// PWM_DEFAULT_CONFIG_STEP_MODE - Step mode + +// <0=> Auto +// <1=> Triggered + +#ifndef PWM_DEFAULT_CONFIG_STEP_MODE +#define PWM_DEFAULT_CONFIG_STEP_MODE 0 +#endif + +// PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// PWM0_ENABLED - Enable PWM0 instance + + +#ifndef PWM0_ENABLED +#define PWM0_ENABLED 0 +#endif + +// PWM1_ENABLED - Enable PWM1 instance + + +#ifndef PWM1_ENABLED +#define PWM1_ENABLED 0 +#endif + +// PWM2_ENABLED - Enable PWM2 instance + + +#ifndef PWM2_ENABLED +#define PWM2_ENABLED 0 +#endif + +// PWM3_ENABLED - Enable PWM3 instance + + +#ifndef PWM3_ENABLED +#define PWM3_ENABLED 0 +#endif + +// + +// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer +//========================================================== +#ifndef QDEC_ENABLED +#define QDEC_ENABLED 0 +#endif +// QDEC_CONFIG_REPORTPER - Report period + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples + +#ifndef QDEC_CONFIG_REPORTPER +#define QDEC_CONFIG_REPORTPER 0 +#endif + +// QDEC_CONFIG_SAMPLEPER - Sample period + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us + +#ifndef QDEC_CONFIG_SAMPLEPER +#define QDEC_CONFIG_SAMPLEPER 7 +#endif + +// QDEC_CONFIG_PIO_A - A pin <0-31> + + +#ifndef QDEC_CONFIG_PIO_A +#define QDEC_CONFIG_PIO_A 31 +#endif + +// QDEC_CONFIG_PIO_B - B pin <0-31> + + +#ifndef QDEC_CONFIG_PIO_B +#define QDEC_CONFIG_PIO_B 31 +#endif + +// QDEC_CONFIG_PIO_LED - LED pin <0-31> + + +#ifndef QDEC_CONFIG_PIO_LED +#define QDEC_CONFIG_PIO_LED 31 +#endif + +// QDEC_CONFIG_LEDPRE - LED pre +#ifndef QDEC_CONFIG_LEDPRE +#define QDEC_CONFIG_LEDPRE 511 +#endif + +// QDEC_CONFIG_LEDPOL - LED polarity + +// <0=> Active low +// <1=> Active high + +#ifndef QDEC_CONFIG_LEDPOL +#define QDEC_CONFIG_LEDPOL 1 +#endif + +// QDEC_CONFIG_DBFEN - Debouncing enable + + +#ifndef QDEC_CONFIG_DBFEN +#define QDEC_CONFIG_DBFEN 0 +#endif + +// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable + + +#ifndef QDEC_CONFIG_SAMPLE_INTEN +#define QDEC_CONFIG_SAMPLE_INTEN 0 +#endif + +// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef QDEC_CONFIG_IRQ_PRIORITY +#define QDEC_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer +//========================================================== +#ifndef QSPI_ENABLED +#define QSPI_ENABLED 0 +#endif +// QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> + + +#ifndef QSPI_CONFIG_SCK_DELAY +#define QSPI_CONFIG_SCK_DELAY 1 +#endif + +// QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef QSPI_CONFIG_XIP_OFFSET +#define QSPI_CONFIG_XIP_OFFSET 0 +#endif + +// QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO + +#ifndef QSPI_CONFIG_READOC +#define QSPI_CONFIG_READOC 0 +#endif + +// QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef QSPI_CONFIG_WRITEOC +#define QSPI_CONFIG_WRITEOC 0 +#endif + +// QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit + +#ifndef QSPI_CONFIG_ADDRMODE +#define QSPI_CONFIG_ADDRMODE 0 +#endif + +// QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 + +#ifndef QSPI_CONFIG_MODE +#define QSPI_CONFIG_MODE 0 +#endif + +// QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 + +#ifndef QSPI_CONFIG_FREQUENCY +#define QSPI_CONFIG_FREQUENCY 15 +#endif + +// QSPI_PIN_SCK - SCK pin value. +#ifndef QSPI_PIN_SCK +#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_CSN - CSN pin value. +#ifndef QSPI_PIN_CSN +#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO0 - IO0 pin value. +#ifndef QSPI_PIN_IO0 +#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO1 - IO1 pin value. +#ifndef QSPI_PIN_IO1 +#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO2 - IO2 pin value. +#ifndef QSPI_PIN_IO2 +#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO3 - IO3 pin value. +#ifndef QSPI_PIN_IO3 +#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef QSPI_CONFIG_IRQ_PRIORITY +#define QSPI_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer +//========================================================== +#ifndef RNG_ENABLED +#define RNG_ENABLED 0 +#endif +// RNG_CONFIG_ERROR_CORRECTION - Error correction + + +#ifndef RNG_CONFIG_ERROR_CORRECTION +#define RNG_CONFIG_ERROR_CORRECTION 1 +#endif + +// RNG_CONFIG_POOL_SIZE - Pool size +#ifndef RNG_CONFIG_POOL_SIZE +#define RNG_CONFIG_POOL_SIZE 64 +#endif + +// RNG_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef RNG_CONFIG_IRQ_PRIORITY +#define RNG_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer +//========================================================== +#ifndef RTC_ENABLED +#define RTC_ENABLED 0 +#endif +// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> + + +#ifndef RTC_DEFAULT_CONFIG_FREQUENCY +#define RTC_DEFAULT_CONFIG_FREQUENCY 32768 +#endif + +// RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering + + +#ifndef RTC_DEFAULT_CONFIG_RELIABLE +#define RTC_DEFAULT_CONFIG_RELIABLE 0 +#endif + +// RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// RTC0_ENABLED - Enable RTC0 instance + + +#ifndef RTC0_ENABLED +#define RTC0_ENABLED 0 +#endif + +// RTC1_ENABLED - Enable RTC1 instance + + +#ifndef RTC1_ENABLED +#define RTC1_ENABLED 0 +#endif + +// RTC2_ENABLED - Enable RTC2 instance + + +#ifndef RTC2_ENABLED +#define RTC2_ENABLED 0 +#endif + +// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +#ifndef NRF_MAXIMUM_LATENCY_US +#define NRF_MAXIMUM_LATENCY_US 2000 +#endif + +// + +// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer +//========================================================== +#ifndef SAADC_ENABLED +#define SAADC_ENABLED 0 +#endif +// SAADC_CONFIG_RESOLUTION - Resolution + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit + +#ifndef SAADC_CONFIG_RESOLUTION +#define SAADC_CONFIG_RESOLUTION 1 +#endif + +// SAADC_CONFIG_OVERSAMPLE - Sample period + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x + +#ifndef SAADC_CONFIG_OVERSAMPLE +#define SAADC_CONFIG_OVERSAMPLE 0 +#endif + +// SAADC_CONFIG_LP_MODE - Enabling low power mode + + +#ifndef SAADC_CONFIG_LP_MODE +#define SAADC_CONFIG_LP_MODE 0 +#endif + +// SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef SAADC_CONFIG_IRQ_PRIORITY +#define SAADC_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer +//========================================================== +#ifndef SPIS_ENABLED +#define SPIS_ENABLED 0 +#endif +// SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// SPIS_DEFAULT_MODE - Mode + +// <0=> MODE_0 +// <1=> MODE_1 +// <2=> MODE_2 +// <3=> MODE_3 + +#ifndef SPIS_DEFAULT_MODE +#define SPIS_DEFAULT_MODE 0 +#endif + +// SPIS_DEFAULT_BIT_ORDER - SPIS default bit order + +// <0=> MSB first +// <1=> LSB first + +#ifndef SPIS_DEFAULT_BIT_ORDER +#define SPIS_DEFAULT_BIT_ORDER 0 +#endif + +// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> + + +#ifndef SPIS_DEFAULT_DEF +#define SPIS_DEFAULT_DEF 255 +#endif + +// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> + + +#ifndef SPIS_DEFAULT_ORC +#define SPIS_DEFAULT_ORC 255 +#endif + +// SPIS0_ENABLED - Enable SPIS0 instance + + +#ifndef SPIS0_ENABLED +#define SPIS0_ENABLED 0 +#endif + +// SPIS1_ENABLED - Enable SPIS1 instance + + +#ifndef SPIS1_ENABLED +#define SPIS1_ENABLED 0 +#endif + +// SPIS2_ENABLED - Enable SPIS2 instance + + +#ifndef SPIS2_ENABLED +#define SPIS2_ENABLED 0 +#endif + +// + +// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer +//========================================================== +#ifndef SPI_ENABLED +#define SPI_ENABLED 0 +#endif +// SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP + +#ifndef NRF_SPI_DRV_MISO_PULLUP_CFG +#define NRF_SPI_DRV_MISO_PULLUP_CFG 1 +#endif + +// SPI0_ENABLED - Enable SPI0 instance +//========================================================== +#ifndef SPI0_ENABLED +#define SPI0_ENABLED 0 +#endif +// SPI0_USE_EASY_DMA - Use EasyDMA + + +#ifndef SPI0_USE_EASY_DMA +#define SPI0_USE_EASY_DMA 1 +#endif + +// + +// SPI1_ENABLED - Enable SPI1 instance +//========================================================== +#ifndef SPI1_ENABLED +#define SPI1_ENABLED 0 +#endif +// SPI1_USE_EASY_DMA - Use EasyDMA + + +#ifndef SPI1_USE_EASY_DMA +#define SPI1_USE_EASY_DMA 1 +#endif + +// + +// SPI2_ENABLED - Enable SPI2 instance +//========================================================== +#ifndef SPI2_ENABLED +#define SPI2_ENABLED 0 +#endif +// SPI2_USE_EASY_DMA - Use EasyDMA + + +#ifndef SPI2_USE_EASY_DMA +#define SPI2_USE_EASY_DMA 1 +#endif + +// + +// + +// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer +//========================================================== +#ifndef TIMER_ENABLED +#define TIMER_ENABLED 0 +#endif +// TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz + +#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY +#define TIMER_DEFAULT_CONFIG_FREQUENCY 0 +#endif + +// TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation + +// <0=> Timer +// <1=> Counter + +#ifndef TIMER_DEFAULT_CONFIG_MODE +#define TIMER_DEFAULT_CONFIG_MODE 0 +#endif + +// TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit + +#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH +#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 +#endif + +// TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// TIMER0_ENABLED - Enable TIMER0 instance + + +#ifndef TIMER0_ENABLED +#define TIMER0_ENABLED 0 +#endif + +// TIMER1_ENABLED - Enable TIMER1 instance + + +#ifndef TIMER1_ENABLED +#define TIMER1_ENABLED 0 +#endif + +// TIMER2_ENABLED - Enable TIMER2 instance + + +#ifndef TIMER2_ENABLED +#define TIMER2_ENABLED 0 +#endif + +// TIMER3_ENABLED - Enable TIMER3 instance + + +#ifndef TIMER3_ENABLED +#define TIMER3_ENABLED 0 +#endif + +// TIMER4_ENABLED - Enable TIMER4 instance + + +#ifndef TIMER4_ENABLED +#define TIMER4_ENABLED 0 +#endif + +// + +// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer +//========================================================== +#ifndef TWIS_ENABLED +#define TWIS_ENABLED 0 +#endif +// TWIS0_ENABLED - Enable TWIS0 instance + + +#ifndef TWIS0_ENABLED +#define TWIS0_ENABLED 0 +#endif + +// TWIS1_ENABLED - Enable TWIS1 instance + + +#ifndef TWIS1_ENABLED +#define TWIS1_ENABLED 0 +#endif + +// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once + + +// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. + +#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +// TWIS_NO_SYNC_MODE - Remove support for synchronous mode + + +// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. + +#ifndef TWIS_NO_SYNC_MODE +#define TWIS_NO_SYNC_MODE 0 +#endif + +// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +#ifndef TWIS_DEFAULT_CONFIG_ADDR0 +#define TWIS_DEFAULT_CONFIG_ADDR0 0 +#endif + +// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +#ifndef TWIS_DEFAULT_CONFIG_ADDR1 +#define TWIS_DEFAULT_CONFIG_ADDR1 0 +#endif + +// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL +#define TWIS_DEFAULT_CONFIG_SCL_PULL 0 +#endif + +// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL +#define TWIS_DEFAULT_CONFIG_SDA_PULL 0 +#endif + +// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer +//========================================================== +#ifndef TWI_ENABLED +#define TWI_ENABLED 0 +#endif +// TWI_DEFAULT_CONFIG_FREQUENCY - Frequency + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k + +#ifndef TWI_DEFAULT_CONFIG_FREQUENCY +#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 +#endif + +// TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init + + +#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT +#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 +#endif + +// TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit + + +#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 +#endif + +// TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// TWI0_ENABLED - Enable TWI0 instance +//========================================================== +#ifndef TWI0_ENABLED +#define TWI0_ENABLED 0 +#endif +// TWI0_USE_EASY_DMA - Use EasyDMA (if present) + + +#ifndef TWI0_USE_EASY_DMA +#define TWI0_USE_EASY_DMA 0 +#endif + +// + +// TWI1_ENABLED - Enable TWI1 instance +//========================================================== +#ifndef TWI1_ENABLED +#define TWI1_ENABLED 0 +#endif +// TWI1_USE_EASY_DMA - Use EasyDMA (if present) + + +#ifndef TWI1_USE_EASY_DMA +#define TWI1_USE_EASY_DMA 0 +#endif + +// + +// + +// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer +//========================================================== +#ifndef UART_ENABLED +#define UART_ENABLED 0 +#endif +// UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef UART_DEFAULT_CONFIG_HWFC +#define UART_DEFAULT_CONFIG_HWFC 0 +#endif + +// UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef UART_DEFAULT_CONFIG_PARITY +#define UART_DEFAULT_CONFIG_PARITY 0 +#endif + +// UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef UART_DEFAULT_CONFIG_BAUDRATE +#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 +#endif + +// UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6 +#endif + +// UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA + + +#ifndef UART_EASY_DMA_SUPPORT +#define UART_EASY_DMA_SUPPORT 1 +#endif + +// UART_LEGACY_SUPPORT - Driver supporting Legacy mode + + +#ifndef UART_LEGACY_SUPPORT +#define UART_LEGACY_SUPPORT 1 +#endif + +// UART0_ENABLED - Enable UART0 instance +//========================================================== +#ifndef UART0_ENABLED +#define UART0_ENABLED 0 +#endif +// UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA + + +#ifndef UART0_CONFIG_USE_EASY_DMA +#define UART0_CONFIG_USE_EASY_DMA 1 +#endif + +// + +// UART1_ENABLED - Enable UART1 instance +//========================================================== +#ifndef UART1_ENABLED +#define UART1_ENABLED 0 +#endif +// + +// + +// USBD_ENABLED - nrf_drv_usbd - Software Component +//========================================================== +#ifndef USBD_ENABLED +#define USBD_ENABLED 0 +#endif +// USBD_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef USBD_CONFIG_IRQ_PRIORITY +#define USBD_CONFIG_IRQ_PRIORITY 6 +#endif + +// USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme + +// <0=> Prioritized access +// <1=> Round Robin + +#ifndef USBD_CONFIG_DMASCHEDULER_MODE +#define USBD_CONFIG_DMASCHEDULER_MODE 0 +#endif + +// USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers + + +// This option gives priority to isochronous transfers. +// Enabling it assures that isochronous transfers are always processed, +// even if multiple other transfers are pending. +// Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm +// function is called, so the option is independent of the algorithm chosen. + +#ifndef USBD_CONFIG_DMASCHEDULER_ISO_BOOST +#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 +#endif + +// USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready + + +// If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent. +// Else, there will be no response. +// NOTE: This option does not work on Engineering A chip. + +#ifndef USBD_CONFIG_ISO_IN_ZLP +#define USBD_CONFIG_ISO_IN_ZLP 0 +#endif + +// + +// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer +//========================================================== +#ifndef WDT_ENABLED +#define WDT_ENABLED 0 +#endif +// WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT + +#ifndef WDT_CONFIG_BEHAVIOUR +#define WDT_CONFIG_BEHAVIOUR 1 +#endif + +// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> + + +#ifndef WDT_CONFIG_RELOAD_VALUE +#define WDT_CONFIG_RELOAD_VALUE 2000 +#endif + +// WDT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef WDT_CONFIG_IRQ_PRIORITY +#define WDT_CONFIG_IRQ_PRIORITY 6 +#endif + +// + +// +//========================================================== + +// nRF_Drivers_External + +//========================================================== +// NRF_TWI_SENSOR_ENABLED - nrf_twi_sensor - nRF TWI Sensor module + + +#ifndef NRF_TWI_SENSOR_ENABLED +#define NRF_TWI_SENSOR_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Libraries + +//========================================================== +// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher + + +#ifndef APP_GPIOTE_ENABLED +#define APP_GPIOTE_ENABLED 0 +#endif + +// APP_PWM_ENABLED - app_pwm - PWM functionality + + +#ifndef APP_PWM_ENABLED +#define APP_PWM_ENABLED 0 +#endif + +// APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler +//========================================================== +#ifndef APP_SCHEDULER_ENABLED +#define APP_SCHEDULER_ENABLED 0 +#endif +// APP_SCHEDULER_WITH_PAUSE - Enabling pause feature + + +#ifndef APP_SCHEDULER_WITH_PAUSE +#define APP_SCHEDULER_WITH_PAUSE 0 +#endif + +// APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling + + +#ifndef APP_SCHEDULER_WITH_PROFILER +#define APP_SCHEDULER_WITH_PROFILER 0 +#endif + +// + +// APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI +//========================================================== +#ifndef APP_SDCARD_ENABLED +#define APP_SDCARD_ENABLED 0 +#endif +// APP_SDCARD_SPI_INSTANCE - SPI instance used + +// <0=> 0 +// <1=> 1 +// <2=> 2 + +#ifndef APP_SDCARD_SPI_INSTANCE +#define APP_SDCARD_SPI_INSTANCE 0 +#endif + +// APP_SDCARD_FREQ_INIT - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_INIT +#define APP_SDCARD_FREQ_INIT 67108864 +#endif + +// APP_SDCARD_FREQ_DATA - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_DATA +#define APP_SDCARD_FREQ_DATA 1073741824 +#endif + +// + +// APP_TIMER_ENABLED - app_timer - Application timer functionality +//========================================================== +#ifndef APP_TIMER_ENABLED +#define APP_TIMER_ENABLED 0 +#endif +// APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. + +// <0=> 32768 Hz +// <1=> 16384 Hz +// <3=> 8192 Hz +// <7=> 4096 Hz +// <15=> 2048 Hz +// <31=> 1024 Hz + +#ifndef APP_TIMER_CONFIG_RTC_FREQUENCY +#define APP_TIMER_CONFIG_RTC_FREQUENCY 1 +#endif + +// APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef APP_TIMER_CONFIG_IRQ_PRIORITY +#define APP_TIMER_CONFIG_IRQ_PRIORITY 6 +#endif + +// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. +// Size of the queue depends on how many timers are used +// in the system, how often timers are started and overall +// system latency. If queue size is too small app_timer calls +// will fail. + +#ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE +#define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10 +#endif + +// APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler + + +#ifndef APP_TIMER_CONFIG_USE_SCHEDULER +#define APP_TIMER_CONFIG_USE_SCHEDULER 0 +#endif + +// APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on + + +// If option is enabled RTC is kept running even if there is no active timers. +// This option can be used when app_timer is used for timestamping. + +#ifndef APP_TIMER_KEEPS_RTC_ACTIVE +#define APP_TIMER_KEEPS_RTC_ACTIVE 0 +#endif + +// APP_TIMER_SAFE_WINDOW_MS - Maximum possible latency (in milliseconds) of handling app_timer event. +// Maximum possible timeout that can be set is reduced by safe window. +// Example: RTC frequency 16384 Hz, maximum possible timeout 1024 seconds - APP_TIMER_SAFE_WINDOW_MS. +// Since RTC is not stopped when processor is halted in debugging session, this value +// must cover it if debugging is needed. It is possible to halt processor for APP_TIMER_SAFE_WINDOW_MS +// without corrupting app_timer behavior. + +#ifndef APP_TIMER_SAFE_WINDOW_MS +#define APP_TIMER_SAFE_WINDOW_MS 300000 +#endif + +// App Timer Legacy configuration - Legacy configuration. + +//========================================================== +// APP_TIMER_WITH_PROFILER - Enable app_timer profiling + + +#ifndef APP_TIMER_WITH_PROFILER +#define APP_TIMER_WITH_PROFILER 0 +#endif + +// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. + + +#ifndef APP_TIMER_CONFIG_SWI_NUMBER +#define APP_TIMER_CONFIG_SWI_NUMBER 0 +#endif + +// +//========================================================== + +// + +// APP_USBD_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class + + +#ifndef APP_USBD_AUDIO_ENABLED +#define APP_USBD_AUDIO_ENABLED 0 +#endif + +// APP_USBD_ENABLED - app_usbd - USB Device library +//========================================================== +#ifndef APP_USBD_ENABLED +#define APP_USBD_ENABLED 0 +#endif +// APP_USBD_VID - Vendor ID. <0x0000-0xFFFF> + + +// Note: This value is not editable in Configuration Wizard. +// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ + +#ifndef APP_USBD_VID +#define APP_USBD_VID 0 +#endif + +// APP_USBD_PID - Product ID. <0x0000-0xFFFF> + + +// Note: This value is not editable in Configuration Wizard. +// Selected Product ID + +#ifndef APP_USBD_PID +#define APP_USBD_PID 0 +#endif + +// APP_USBD_DEVICE_VER_MAJOR - Major device version <0-99> + + +// Major device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MAJOR +#define APP_USBD_DEVICE_VER_MAJOR 1 +#endif + +// APP_USBD_DEVICE_VER_MINOR - Minor device version <0-9> + + +// Minor device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MINOR +#define APP_USBD_DEVICE_VER_MINOR 0 +#endif + +// APP_USBD_DEVICE_VER_SUB - Sub-minor device version <0-9> + + +// Sub-minor device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_SUB +#define APP_USBD_DEVICE_VER_SUB 0 +#endif + +// APP_USBD_CONFIG_SELF_POWERED - Self-powered device, as opposed to bus-powered. + + +#ifndef APP_USBD_CONFIG_SELF_POWERED +#define APP_USBD_CONFIG_SELF_POWERED 1 +#endif + +// APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps. <0-500> + + +#ifndef APP_USBD_CONFIG_MAX_POWER +#define APP_USBD_CONFIG_MAX_POWER 100 +#endif + +// APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events. + + +// Enable processing power events in USB event handler. + +#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS +#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1 +#endif + +// APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue. + +// This is the default configuration when all the events are placed into internal queue. +// Disable it when an external queue is used like app_scheduler or if you wish to process all events inside interrupts. +// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. +// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable, and disable. +//========================================================== +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE +#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1 +#endif +// APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of the event queue. <16-64> + + +// The size of the queue for the events that would be processed in the main loop. + +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE +#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32 +#endif + +// APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode. + + +// Normal queue - SOF events are pushed normally into the event queue. +// Compress queue - SOF events are counted and binded with other events or executed when the queue is empty. +// This prevents the queue from filling up with SOF events. +// Interrupt - SOF events are processed in interrupt. +// <0=> Normal queue +// <1=> Compress queue +// <2=> Interrupt + +#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE +#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1 +#endif + +// + +// APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF. + + +// The function app_usbd_sof_timestamp_get is implemented if the logger is enabled. +// Use it when initializing the logger. +// SOF processing is always enabled when this configuration parameter is active. +// Note: This option is configured outside of APP_USBD_CONFIG_LOG_ENABLED. +// This means that it works even if the logging in this very module is disabled. + +#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE +#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0 +#endif + +// APP_USBD_CONFIG_DESC_STRING_SIZE - Maximum size of the NULL-terminated string of the string descriptor. <31-254> + + +// 31 characters can be stored in the internal USB buffer used for transfers. +// Any value higher than 31 creates an additional buffer just for descriptor strings. + +#ifndef APP_USBD_CONFIG_DESC_STRING_SIZE +#define APP_USBD_CONFIG_DESC_STRING_SIZE 31 +#endif + +// APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED - Enable UTF8 conversion. + + +// Enable UTF8-encoded characters. In normal processing, only ASCII characters are available. + +#ifndef APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED +#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED 0 +#endif + +// APP_USBD_STRINGS_LANGIDS - Supported languages identifiers. + +// Note: This value is not editable in Configuration Wizard. +// Comma-separated list of supported languages. +#ifndef APP_USBD_STRINGS_LANGIDS +#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US) +#endif + +// APP_USBD_STRING_ID_MANUFACTURER - Define manufacturer string ID. + +// Setting ID to 0 disables the string. +//========================================================== +#ifndef APP_USBD_STRING_ID_MANUFACTURER +#define APP_USBD_STRING_ID_MANUFACTURER 1 +#endif +// APP_USBD_STRINGS_MANUFACTURER_EXTERN - Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by macro or declared as a global variable. + + +#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN +#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0 +#endif + +// APP_USBD_STRINGS_MANUFACTURER - String descriptor for the manufacturer name. + +// Note: This value is not editable in Configuration Wizard. +// Comma-separated list of manufacturer names for each defined language. +// Use @ref APP_USBD_STRING_DESC macro to create string descriptor from a NULL-terminated string. +// Use @ref APP_USBD_STRING_RAW8_DESC macro to create string descriptor from comma-separated uint8_t values. +// Use @ref APP_USBD_STRING_RAW16_DESC macro to create string descriptor from comma-separated uint16_t values. +// Alternatively, configure the macro to point to any internal variable pointer that already contains the descriptor. +// Setting string to NULL disables that string. +// The order of manufacturer names must be the same like in @ref APP_USBD_STRINGS_LANGIDS. +#ifndef APP_USBD_STRINGS_MANUFACTURER +#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor") +#endif + +// + +// APP_USBD_STRING_ID_PRODUCT - Define product string ID. + +// Setting ID to 0 disables the string. +//========================================================== +#ifndef APP_USBD_STRING_ID_PRODUCT +#define APP_USBD_STRING_ID_PRODUCT 2 +#endif +// APP_USBD_STRINGS_PRODUCT_EXTERN - Define whether @ref APP_USBD_STRINGS_PRODUCT is created by macro or declared as a global variable. + + +#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN +#define APP_USBD_STRINGS_PRODUCT_EXTERN 0 +#endif + +// APP_USBD_STRINGS_PRODUCT - String descriptor for the product name. + +// Note: This value is not editable in Configuration Wizard. +// List of product names that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER. +#ifndef APP_USBD_STRINGS_PRODUCT +#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52 USB Product") +#endif + +// + +// APP_USBD_STRING_ID_SERIAL - Define serial number string ID. + +// Setting ID to 0 disables the string. +//========================================================== +#ifndef APP_USBD_STRING_ID_SERIAL +#define APP_USBD_STRING_ID_SERIAL 3 +#endif +// APP_USBD_STRING_SERIAL_EXTERN - Define whether @ref APP_USBD_STRING_SERIAL is created by macro or declared as a global variable. + + +#ifndef APP_USBD_STRING_SERIAL_EXTERN +#define APP_USBD_STRING_SERIAL_EXTERN 0 +#endif + +// APP_USBD_STRING_SERIAL - String descriptor for the serial number. + +// Note: This value is not editable in Configuration Wizard. +// Serial number that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER. +#ifndef APP_USBD_STRING_SERIAL +#define APP_USBD_STRING_SERIAL APP_USBD_STRING_DESC("000000000000") +#endif + +// + +// APP_USBD_STRING_ID_CONFIGURATION - Define configuration string ID. + +// Setting ID to 0 disables the string. +//========================================================== +#ifndef APP_USBD_STRING_ID_CONFIGURATION +#define APP_USBD_STRING_ID_CONFIGURATION 4 +#endif +// APP_USBD_STRING_CONFIGURATION_EXTERN - Define whether @ref APP_USBD_STRINGS_CONFIGURATION is created by macro or declared as global variable. + + +#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN +#define APP_USBD_STRING_CONFIGURATION_EXTERN 0 +#endif + +// APP_USBD_STRINGS_CONFIGURATION - String descriptor for the device configuration. + +// Note: This value is not editable in Configuration Wizard. +// Configuration string that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER. +#ifndef APP_USBD_STRINGS_CONFIGURATION +#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration") +#endif + +// + +// APP_USBD_STRINGS_USER - Default values for user strings. + +// Note: This value is not editable in Configuration Wizard. +// This value stores all application specific user strings with the default initialization. +// The setup is done by X-macros. +// Expected macro parameters: +// @code +// X(mnemonic, [=str_idx], ...) +// @endcode +// - @c mnemonic: Mnemonic of the string descriptor that would be added to +// @ref app_usbd_string_desc_idx_t enumerator. +// - @c str_idx : String index value, can be set or left empty. +// For example, WinUSB driver requires descriptor to be present on 0xEE index. +// Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...))) +// - @c ... : List of string descriptors for each defined language. +#ifndef APP_USBD_STRINGS_USER +#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1")) +#endif + +// + +// APP_USBD_HID_ENABLED - app_usbd_hid - USB HID class +//========================================================== +#ifndef APP_USBD_HID_ENABLED +#define APP_USBD_HID_ENABLED 0 +#endif +// APP_USBD_HID_DEFAULT_IDLE_RATE - Default idle rate for HID class. <0-255> + + +// 0 means indefinite duration, any other value is multiplied by 4 milliseconds. Refer to Chapter 7.2.4 of HID 1.11 Specification. + +#ifndef APP_USBD_HID_DEFAULT_IDLE_RATE +#define APP_USBD_HID_DEFAULT_IDLE_RATE 0 +#endif + +// APP_USBD_HID_REPORT_IDLE_TABLE_SIZE - Size of idle rate table. <1-255> + + +// Must be higher than the highest report ID used. + +#ifndef APP_USBD_HID_REPORT_IDLE_TABLE_SIZE +#define APP_USBD_HID_REPORT_IDLE_TABLE_SIZE 4 +#endif + +// + +// APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic + + +#ifndef APP_USBD_HID_GENERIC_ENABLED +#define APP_USBD_HID_GENERIC_ENABLED 0 +#endif + +// APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard + + +#ifndef APP_USBD_HID_KBD_ENABLED +#define APP_USBD_HID_KBD_ENABLED 0 +#endif + +// APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse + + +#ifndef APP_USBD_HID_MOUSE_ENABLED +#define APP_USBD_HID_MOUSE_ENABLED 0 +#endif + +// APP_USBD_MSC_ENABLED - app_usbd_msc - USB MSC class + + +#ifndef APP_USBD_MSC_ENABLED +#define APP_USBD_MSC_ENABLED 0 +#endif + +// CRC16_ENABLED - crc16 - CRC16 calculation routines + + +#ifndef CRC16_ENABLED +#define CRC16_ENABLED 0 +#endif + +// CRC32_ENABLED - crc32 - CRC32 calculation routines + + +#ifndef CRC32_ENABLED +#define CRC32_ENABLED 0 +#endif + +// ECC_ENABLED - ecc - Elliptic Curve Cryptography Library + + +#ifndef ECC_ENABLED +#define ECC_ENABLED 0 +#endif + +// FDS_ENABLED - fds - Flash data storage module +//========================================================== +#ifndef FDS_ENABLED +#define FDS_ENABLED 0 +#endif +// Pages - Virtual page settings + +// Configure the number of virtual pages to use and their size. +//========================================================== +// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. +// One of the virtual pages is reserved by the system for garbage collection. +// Therefore, the minimum is two virtual pages: one page to store data and one page to be used by the system for garbage collection. +// The total amount of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES * @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes. + +#ifndef FDS_VIRTUAL_PAGES +#define FDS_VIRTUAL_PAGES 3 +#endif + +// FDS_VIRTUAL_PAGE_SIZE - The size of a virtual flash page. + + +// Expressed in number of 4-byte words. +// By default, a virtual page is the same size as a physical page. +// The size of a virtual page must be a multiple of the size of a physical page. +// <1024=> 1024 +// <2048=> 2048 + +#ifndef FDS_VIRTUAL_PAGE_SIZE +#define FDS_VIRTUAL_PAGE_SIZE 1024 +#endif + +// FDS_VIRTUAL_PAGES_RESERVED - The number of virtual flash pages that are used by other modules. +// FDS module stores its data in the last pages of the flash memory. +// By setting this value, you can move flash end address used by the FDS. +// As a result the reserved space can be used by other modules. + +#ifndef FDS_VIRTUAL_PAGES_RESERVED +#define FDS_VIRTUAL_PAGES_RESERVED 0 +#endif + +// +//========================================================== + +// Backend - Backend configuration + +// Configure which nrf_fstorage backend is used by FDS to write to flash. +//========================================================== +// FDS_BACKEND - FDS flash backend. + + +// NRF_FSTORAGE_SD uses the nrf_fstorage_sd backend implementation using the SoftDevice API. Use this if you have a SoftDevice present. +// NRF_FSTORAGE_NVMC uses the nrf_fstorage_nvmc implementation. Use this setting if you don't use the SoftDevice. +// <1=> NRF_FSTORAGE_NVMC +// <2=> NRF_FSTORAGE_SD + +#ifndef FDS_BACKEND +#define FDS_BACKEND 2 +#endif + +// +//========================================================== + +// Queue - Queue settings + +//========================================================== +// FDS_OP_QUEUE_SIZE - Size of the internal queue. +// Increase this value if you frequently get synchronous FDS_ERR_NO_SPACE_IN_QUEUES errors. + +#ifndef FDS_OP_QUEUE_SIZE +#define FDS_OP_QUEUE_SIZE 4 +#endif + +// +//========================================================== + +// CRC - CRC functionality + +//========================================================== +// FDS_CRC_CHECK_ON_READ - Enable CRC checks. + +// Save a record's CRC when it is written to flash and check it when the record is opened. +// Records with an incorrect CRC can still be 'seen' by the user using FDS functions, but they cannot be opened. +// Additionally, they will not be garbage collected until they are deleted. +//========================================================== +#ifndef FDS_CRC_CHECK_ON_READ +#define FDS_CRC_CHECK_ON_READ 0 +#endif +// FDS_CRC_CHECK_ON_WRITE - Perform a CRC check on newly written records. + + +// Perform a CRC check on newly written records. +// This setting can be used to make sure that the record data was not altered while being written to flash. +// <1=> Enabled +// <0=> Disabled + +#ifndef FDS_CRC_CHECK_ON_WRITE +#define FDS_CRC_CHECK_ON_WRITE 0 +#endif + +// + +// +//========================================================== + +// Users - Number of users + +//========================================================== +// FDS_MAX_USERS - Maximum number of callbacks that can be registered. +#ifndef FDS_MAX_USERS +#define FDS_MAX_USERS 4 +#endif + +// +//========================================================== + +// + +// HARDFAULT_HANDLER_ENABLED - hardfault_default - HardFault default handler for debugging and release + + +#ifndef HARDFAULT_HANDLER_ENABLED +#define HARDFAULT_HANDLER_ENABLED 0 +#endif + +// HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI +//========================================================== +#ifndef HCI_MEM_POOL_ENABLED +#define HCI_MEM_POOL_ENABLED 0 +#endif +// HCI_TX_BUF_SIZE - TX buffer size in bytes. +#ifndef HCI_TX_BUF_SIZE +#define HCI_TX_BUF_SIZE 600 +#endif + +// HCI_RX_BUF_SIZE - RX buffer size in bytes. +#ifndef HCI_RX_BUF_SIZE +#define HCI_RX_BUF_SIZE 600 +#endif + +// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. +#ifndef HCI_RX_BUF_QUEUE_SIZE +#define HCI_RX_BUF_QUEUE_SIZE 4 +#endif + +// + +// HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI +//========================================================== +#ifndef HCI_SLIP_ENABLED +#define HCI_SLIP_ENABLED 0 +#endif +// HCI_UART_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud + +#ifndef HCI_UART_BAUDRATE +#define HCI_UART_BAUDRATE 30801920 +#endif + +// HCI_UART_FLOW_CONTROL - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef HCI_UART_FLOW_CONTROL +#define HCI_UART_FLOW_CONTROL 0 +#endif + +// HCI_UART_RX_PIN - UART RX pin +#ifndef HCI_UART_RX_PIN +#define HCI_UART_RX_PIN 31 +#endif + +// HCI_UART_TX_PIN - UART TX pin +#ifndef HCI_UART_TX_PIN +#define HCI_UART_TX_PIN 31 +#endif + +// HCI_UART_RTS_PIN - UART RTS pin +#ifndef HCI_UART_RTS_PIN +#define HCI_UART_RTS_PIN 31 +#endif + +// HCI_UART_CTS_PIN - UART CTS pin +#ifndef HCI_UART_CTS_PIN +#define HCI_UART_CTS_PIN 31 +#endif + +// + +// HCI_TRANSPORT_ENABLED - hci_transport - HCI transport +//========================================================== +#ifndef HCI_TRANSPORT_ENABLED +#define HCI_TRANSPORT_ENABLED 0 +#endif +// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. +#ifndef HCI_MAX_PACKET_SIZE_IN_BITS +#define HCI_MAX_PACKET_SIZE_IN_BITS 8000 +#endif + +// + +// LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module + + +#ifndef LED_SOFTBLINK_ENABLED +#define LED_SOFTBLINK_ENABLED 0 +#endif + +// LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module + + +#ifndef LOW_POWER_PWM_ENABLED +#define LOW_POWER_PWM_ENABLED 0 +#endif + +// MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator +//========================================================== +#ifndef MEM_MANAGER_ENABLED +#define MEM_MANAGER_ENABLED 0 +#endif +// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> + + +#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT +#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1 +#endif + +// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. +// Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE +#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32 +#endif + +// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> + + +#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT +#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. +// Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE +#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256 +#endif + +// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> + + +#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT +#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. +// Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE +#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256 +#endif + +// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> + + +#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT +#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. +// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE +#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320 +#endif + +// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> + + +#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT +#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. +// Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE +#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444 +#endif + +// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> + + +#ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT +#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. +// Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE +#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64 +#endif + +// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> + + +#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT +#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0 +#endif + +// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. +// Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized. + +#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE +#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32 +#endif + +// MEM_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef MEM_MANAGER_CONFIG_LOG_ENABLED +#define MEM_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// MEM_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef MEM_MANAGER_CONFIG_LOG_LEVEL +#define MEM_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// MEM_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MEM_MANAGER_CONFIG_INFO_COLOR +#define MEM_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// MEM_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MEM_MANAGER_CONFIG_DEBUG_COLOR +#define MEM_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. + + +#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK +#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0 +#endif + +// + +// NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module +//========================================================== +#ifndef NRF_BALLOC_ENABLED +#define NRF_BALLOC_ENABLED 1 +#endif +// NRF_BALLOC_CONFIG_DEBUG_ENABLED - Enables debug mode in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 +#endif +// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS +#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 +#endif + +// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> + + +#ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS +#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS 1 +#endif + +// NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. + + +#ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED +#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 +#endif + +// NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 +#endif + +// NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. + + +#ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED +#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 +#endif + +// NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_CLI_CMDS 0 +#endif + +// + +// + +// NRF_CSENSE_ENABLED - nrf_csense - Capacitive sensor module +//========================================================== +#ifndef NRF_CSENSE_ENABLED +#define NRF_CSENSE_ENABLED 0 +#endif +// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. +#ifndef NRF_CSENSE_PAD_HYSTERESIS +#define NRF_CSENSE_PAD_HYSTERESIS 15 +#endif + +// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. +#ifndef NRF_CSENSE_PAD_DEVIATION +#define NRF_CSENSE_PAD_DEVIATION 70 +#endif + +// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. +#ifndef NRF_CSENSE_MIN_PAD_VALUE +#define NRF_CSENSE_MIN_PAD_VALUE 20 +#endif + +// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. +#ifndef NRF_CSENSE_MAX_PADS_NUMBER +#define NRF_CSENSE_MAX_PADS_NUMBER 20 +#endif + +// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. +#ifndef NRF_CSENSE_MAX_VALUE +#define NRF_CSENSE_MAX_VALUE 1000 +#endif + +// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. +// This is used when capacitive sensor does not use COMP. + +#ifndef NRF_CSENSE_OUTPUT_PIN +#define NRF_CSENSE_OUTPUT_PIN 26 +#endif + +// + +// NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor low-level module +//========================================================== +#ifndef NRF_DRV_CSENSE_ENABLED +#define NRF_DRV_CSENSE_ENABLED 0 +#endif +// USE_COMP - Use the comparator to implement the capacitive sensor driver. + +// Due to Anomaly 84, COMP I_SOURCE is not functional. It has too high a varation. +//========================================================== +#ifndef USE_COMP +#define USE_COMP 0 +#endif +// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). +#ifndef TIMER0_FOR_CSENSE +#define TIMER0_FOR_CSENSE 1 +#endif + +// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). +#ifndef TIMER1_FOR_CSENSE +#define TIMER1_FOR_CSENSE 2 +#endif + +// MEASUREMENT_PERIOD - Single measurement period. +// Time of a single measurement can be calculated as +// T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). +// I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad. + +#ifndef MEASUREMENT_PERIOD +#define MEASUREMENT_PERIOD 20 +#endif + +// + +// + +// NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library +//========================================================== +#ifndef NRF_FSTORAGE_ENABLED +#define NRF_FSTORAGE_ENABLED 0 +#endif +// nrf_fstorage - Common settings + +// Common settings to all fstorage implementations +//========================================================== +// NRF_FSTORAGE_PARAM_CHECK_DISABLED - Disable user input validation + + +// If selected, use ASSERT to validate user input. +// This effectively removes user input validation in production code. +// Recommended setting: OFF, only enable this setting if size is a major concern. + +#ifndef NRF_FSTORAGE_PARAM_CHECK_DISABLED +#define NRF_FSTORAGE_PARAM_CHECK_DISABLED 0 +#endif + +// +//========================================================== + +// nrf_fstorage_sd - Implementation using the SoftDevice + +// Configuration options for the fstorage implementation using the SoftDevice +//========================================================== +// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations +// Increase this value if API calls frequently return the error @ref NRF_ERROR_NO_MEM. + +#ifndef NRF_FSTORAGE_SD_QUEUE_SIZE +#define NRF_FSTORAGE_SD_QUEUE_SIZE 4 +#endif + +// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy +// Increase this value if events frequently return the @ref NRF_ERROR_TIMEOUT error. +// The SoftDevice might fail to schedule flash access due to high BLE activity. + +#ifndef NRF_FSTORAGE_SD_MAX_RETRIES +#define NRF_FSTORAGE_SD_MAX_RETRIES 8 +#endif + +// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation +// This value must be a multiple of four. +// Lowering this value can increase the chances of the SoftDevice being able to execute flash operations in between radio activity. +// This value is bound by the maximum number of bytes that can be written to flash in a single call to @ref sd_flash_write. +// That is 1024 bytes for nRF51 ICs and 4096 bytes for nRF52 ICs. + +#ifndef NRF_FSTORAGE_SD_MAX_WRITE_SIZE +#define NRF_FSTORAGE_SD_MAX_WRITE_SIZE 4096 +#endif + +// +//========================================================== + +// + +// NRF_GFX_ENABLED - nrf_gfx - GFX module + + +#ifndef NRF_GFX_ENABLED +#define NRF_GFX_ENABLED 0 +#endif + +// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module + + +#ifndef NRF_MEMOBJ_ENABLED +#define NRF_MEMOBJ_ENABLED 1 +#endif + +// NRF_PWR_MGMT_ENABLED - nrf_pwr_mgmt - Power management module +//========================================================== +#ifndef NRF_PWR_MGMT_ENABLED +#define NRF_PWR_MGMT_ENABLED 0 +#endif +// NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED - Enables pin debug in the module. + +// Selected pin will be set when CPU is in sleep mode. +//========================================================== +#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED +#define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED 0 +#endif +// NRF_PWR_MGMT_SLEEP_DEBUG_PIN - Pin number + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected + +#ifndef NRF_PWR_MGMT_SLEEP_DEBUG_PIN +#define NRF_PWR_MGMT_SLEEP_DEBUG_PIN 31 +#endif + +// + +// NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED - Enables CPU usage monitor. + + +// Module will trace percentage of CPU usage in one second intervals. + +#ifndef NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED +#define NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED 0 +#endif + +// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED - Enable standby timeout. +//========================================================== +#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED +#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED 0 +#endif +// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). +// Shutdown procedure will begin no earlier than after this number of seconds. + +#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S +#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S 3 +#endif + +// + +// NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED - Enables FPU event cleaning. + + +#ifndef NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED +#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 0 +#endif + +// NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY - Blocked shutdown procedure will be retried every second. + + +#ifndef NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY +#define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY 0 +#endif + +// NRF_PWR_MGMT_CONFIG_USE_SCHEDULER - Module will use @ref app_scheduler. + + +#ifndef NRF_PWR_MGMT_CONFIG_USE_SCHEDULER +#define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER 0 +#endif + +// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. +// The number of stages of the shutdown process. + +#ifndef NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT +#define NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT 3 +#endif + +// + +// NRF_QUEUE_ENABLED - nrf_queue - Queue module +//========================================================== +#ifndef NRF_QUEUE_ENABLED +#define NRF_QUEUE_ENABLED 0 +#endif +// NRF_QUEUE_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_QUEUE_CLI_CMDS +#define NRF_QUEUE_CLI_CMDS 0 +#endif + +// + +// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator + + +#ifndef NRF_SECTION_ITER_ENABLED +#define NRF_SECTION_ITER_ENABLED 1 +#endif + +// NRF_SORTLIST_ENABLED - nrf_sortlist - Sorted list + + +#ifndef NRF_SORTLIST_ENABLED +#define NRF_SORTLIST_ENABLED 1 +#endif + +// NRF_SPI_MNGR_ENABLED - nrf_spi_mngr - SPI transaction manager + + +#ifndef NRF_SPI_MNGR_ENABLED +#define NRF_SPI_MNGR_ENABLED 0 +#endif + +// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. + + +#ifndef NRF_STRERROR_ENABLED +#define NRF_STRERROR_ENABLED 1 +#endif + +// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager + + +#ifndef NRF_TWI_MNGR_ENABLED +#define NRF_TWI_MNGR_ENABLED 0 +#endif + +// SLIP_ENABLED - slip - SLIP encoding and decoding + + +#ifndef SLIP_ENABLED +#define SLIP_ENABLED 0 +#endif + +// TASK_MANAGER_ENABLED - task_manager - Task manager. +//========================================================== +#ifndef TASK_MANAGER_ENABLED +#define TASK_MANAGER_ENABLED 0 +#endif +// TASK_MANAGER_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef TASK_MANAGER_CLI_CMDS +#define TASK_MANAGER_CLI_CMDS 0 +#endif + +// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created +#ifndef TASK_MANAGER_CONFIG_MAX_TASKS +#define TASK_MANAGER_CONFIG_MAX_TASKS 2 +#endif + +// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) +#ifndef TASK_MANAGER_CONFIG_STACK_SIZE +#define TASK_MANAGER_CONFIG_STACK_SIZE 1024 +#endif + +// TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED - Enable stack profiling. + + +#ifndef TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED +#define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED 1 +#endif + +// TASK_MANAGER_CONFIG_STACK_GUARD - Configures stack guard. + +// <0=> Disabled +// <4=> 32 bytes +// <5=> 64 bytes +// <6=> 128 bytes +// <7=> 256 bytes +// <8=> 512 bytes + +#ifndef TASK_MANAGER_CONFIG_STACK_GUARD +#define TASK_MANAGER_CONFIG_STACK_GUARD 7 +#endif + +// + +// app_button - buttons handling module + +//========================================================== +// BUTTON_ENABLED - Enables Button module + + +#ifndef BUTTON_ENABLED +#define BUTTON_ENABLED 0 +#endif + +// BUTTON_HIGH_ACCURACY_ENABLED - Enables GPIOTE high accuracy for buttons + + +#ifndef BUTTON_HIGH_ACCURACY_ENABLED +#define BUTTON_HIGH_ACCURACY_ENABLED 0 +#endif + +// +//========================================================== + +// app_usbd_cdc_acm - USB CDC ACM class + +//========================================================== +// APP_USBD_CDC_ACM_ENABLED - Enabling USBD CDC ACM Class library + + +#ifndef APP_USBD_CDC_ACM_ENABLED +#define APP_USBD_CDC_ACM_ENABLED 0 +#endif + +// APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE - Send ZLP on write with same size as endpoint + + +// If enabled, CDC ACM class will automatically send a zero length packet after transfer which has the same size as endpoint. +// This may limit throughput if a lot of binary data is sent, but in terminal mode operation it makes sure that the data is always displayed right after it is sent. + +#ifndef APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE +#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1 +#endif + +// +//========================================================== + +// nrf_cli - Command line interface + +//========================================================== +// NRF_CLI_ENABLED - Enable/disable the CLI module. + + +#ifndef NRF_CLI_ENABLED +#define NRF_CLI_ENABLED 0 +#endif + +// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to the command handler. +#ifndef NRF_CLI_ARGC_MAX +#define NRF_CLI_ARGC_MAX 12 +#endif + +// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI built-in commands. + + +#ifndef NRF_CLI_BUILD_IN_CMDS_ENABLED +#define NRF_CLI_BUILD_IN_CMDS_ENABLED 1 +#endif + +// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for a single command. +#ifndef NRF_CLI_CMD_BUFF_SIZE +#define NRF_CLI_CMD_BUFF_SIZE 128 +#endif + +// NRF_CLI_ECHO_STATUS - CLI echo status. If set, echo is ON. + + +#ifndef NRF_CLI_ECHO_STATUS +#define NRF_CLI_ECHO_STATUS 1 +#endif + +// NRF_CLI_WILDCARD_ENABLED - Enable wildcard functionality for CLI commands. + + +#ifndef NRF_CLI_WILDCARD_ENABLED +#define NRF_CLI_WILDCARD_ENABLED 0 +#endif + +// NRF_CLI_METAKEYS_ENABLED - Enable additional control keys for CLI commands like ctrl+a, ctrl+e, ctrl+w, ctrl+u + + +#ifndef NRF_CLI_METAKEYS_ENABLED +#define NRF_CLI_METAKEYS_ENABLED 0 +#endif + +// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. +#ifndef NRF_CLI_PRINTF_BUFF_SIZE +#define NRF_CLI_PRINTF_BUFF_SIZE 23 +#endif + +// NRF_CLI_HISTORY_ENABLED - Enable CLI history mode. +//========================================================== +#ifndef NRF_CLI_HISTORY_ENABLED +#define NRF_CLI_HISTORY_ENABLED 1 +#endif +// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history. +#ifndef NRF_CLI_HISTORY_ELEMENT_SIZE +#define NRF_CLI_HISTORY_ELEMENT_SIZE 32 +#endif + +// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects. +#ifndef NRF_CLI_HISTORY_ELEMENT_COUNT +#define NRF_CLI_HISTORY_ELEMENT_COUNT 8 +#endif + +// + +// NRF_CLI_VT100_COLORS_ENABLED - CLI VT100 colors. + + +#ifndef NRF_CLI_VT100_COLORS_ENABLED +#define NRF_CLI_VT100_COLORS_ENABLED 1 +#endif + +// NRF_CLI_STATISTICS_ENABLED - Enable CLI statistics. + + +#ifndef NRF_CLI_STATISTICS_ENABLED +#define NRF_CLI_STATISTICS_ENABLED 1 +#endif + +// NRF_CLI_LOG_BACKEND - Enable logger backend interface. + + +#ifndef NRF_CLI_LOG_BACKEND +#define NRF_CLI_LOG_BACKEND 1 +#endif + +// NRF_CLI_USES_TASK_MANAGER_ENABLED - Enable CLI to use task_manager + + +#ifndef NRF_CLI_USES_TASK_MANAGER_ENABLED +#define NRF_CLI_USES_TASK_MANAGER_ENABLED 0 +#endif + +// +//========================================================== + +// nrf_fprintf - fprintf function. + +//========================================================== +// NRF_FPRINTF_ENABLED - Enable/disable fprintf module. + + +#ifndef NRF_FPRINTF_ENABLED +#define NRF_FPRINTF_ENABLED 1 +#endif + +// NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED - For each printed LF, function will add CR. + + +#ifndef NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED +#define NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED 1 +#endif + +// NRF_FPRINTF_DOUBLE_ENABLED - Enable IEEE-754 double precision formatting. + + +#ifndef NRF_FPRINTF_DOUBLE_ENABLED +#define NRF_FPRINTF_DOUBLE_ENABLED 0 +#endif + +// +//========================================================== + +// +//========================================================== + +// nRF_Log + +//========================================================== +// NRF_LOG_ENABLED - nrf_log - Logger +//========================================================== +#ifndef NRF_LOG_ENABLED +#define NRF_LOG_ENABLED 0 +#endif +// Log message pool - Configuration of log message pool + +//========================================================== +// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. +// If a small value is set, then performance of logs processing +// is degraded because data is fragmented. Bigger value impacts +// RAM memory utilization. The size is set to fit a message with +// a timestamp and up to 2 arguments in a single memory object. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_SIZE +#define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 +#endif + +// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects +// If a small value is set, then it may lead to a deadlock +// in certain cases if backend has high latency and holds +// multiple messages for long time. Bigger value impacts +// RAM memory usage. + +#ifndef NRF_LOG_MSGPOOL_ELEMENT_COUNT +#define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 +#endif + +// +//========================================================== + +// NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. + + +// If set then oldest logs are overwritten. Otherwise a +// marker is injected informing about overflow. + +#ifndef NRF_LOG_ALLOW_OVERFLOW +#define NRF_LOG_ALLOW_OVERFLOW 1 +#endif + +// NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). + + +// Must be power of 2 and multiple of 4. +// If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 +// <2048=> 2048 +// <4096=> 4096 +// <8192=> 8192 +// <16384=> 16384 + +#ifndef NRF_LOG_BUFSIZE +#define NRF_LOG_BUFSIZE 1024 +#endif + +// NRF_LOG_CLI_CMDS - Enable CLI commands for the module. + + +#ifndef NRF_LOG_CLI_CMDS +#define NRF_LOG_CLI_CMDS 0 +#endif + +// NRF_LOG_DEFAULT_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LOG_DEFAULT_LEVEL +#define NRF_LOG_DEFAULT_LEVEL 3 +#endif + +// NRF_LOG_DEFERRED - Enable deffered logger. + + +// Log data is buffered and can be processed in idle. + +#ifndef NRF_LOG_DEFERRED +#define NRF_LOG_DEFERRED 1 +#endif + +// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. + + +#ifndef NRF_LOG_FILTERS_ENABLED +#define NRF_LOG_FILTERS_ENABLED 0 +#endif + +// NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED - Enable use of critical region for non deffered mode when flushing logs. + + +// When enabled NRF_LOG_FLUSH is called from critical section when non deffered mode is used. +// Log output will never be corrupted as access to the log backend is exclusive +// but system will spend significant amount of time in critical section + +#ifndef NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED +#define NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED 0 +#endif + +// NRF_LOG_STR_PUSH_BUFFER_SIZE - Size of the buffer dedicated for strings stored using @ref NRF_LOG_PUSH. + +// <16=> 16 +// <32=> 32 +// <64=> 64 +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 + +#ifndef NRF_LOG_STR_PUSH_BUFFER_SIZE +#define NRF_LOG_STR_PUSH_BUFFER_SIZE 128 +#endif + +// NRF_LOG_STR_PUSH_BUFFER_SIZE - Size of the buffer dedicated for strings stored using @ref NRF_LOG_PUSH. + +// <16=> 16 +// <32=> 32 +// <64=> 64 +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 + +#ifndef NRF_LOG_STR_PUSH_BUFFER_SIZE +#define NRF_LOG_STR_PUSH_BUFFER_SIZE 128 +#endif + +// NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string +//========================================================== +#ifndef NRF_LOG_USES_COLORS +#define NRF_LOG_USES_COLORS 0 +#endif +// NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_COLOR_DEFAULT +#define NRF_LOG_COLOR_DEFAULT 0 +#endif + +// NRF_LOG_ERROR_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_ERROR_COLOR +#define NRF_LOG_ERROR_COLOR 2 +#endif + +// NRF_LOG_WARNING_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LOG_WARNING_COLOR +#define NRF_LOG_WARNING_COLOR 4 +#endif + +// + +// NRF_LOG_USES_TIMESTAMP - Enable timestamping + +// Function for getting the timestamp is provided by the user +//========================================================== +#ifndef NRF_LOG_USES_TIMESTAMP +#define NRF_LOG_USES_TIMESTAMP 0 +#endif +// NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) or 0 to use app_timer frequency. +#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY +#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 0 +#endif + +// + +// nrf_log module configuration + +//========================================================== +// nrf_log in nRF_Core + +//========================================================== +// NRF_MPU_LIB_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MPU_LIB_CONFIG_LOG_ENABLED +#define NRF_MPU_LIB_CONFIG_LOG_ENABLED 0 +#endif +// NRF_MPU_LIB_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MPU_LIB_CONFIG_LOG_LEVEL +#define NRF_MPU_LIB_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_MPU_LIB_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_LIB_CONFIG_INFO_COLOR +#define NRF_MPU_LIB_CONFIG_INFO_COLOR 0 +#endif + +// NRF_MPU_LIB_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MPU_LIB_CONFIG_DEBUG_COLOR +#define NRF_MPU_LIB_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_STACK_GUARD_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_STACK_GUARD_CONFIG_LOG_ENABLED +#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 +#endif +// NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL +#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR +#define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 +#endif + +// NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR +#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// TASK_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TASK_MANAGER_CONFIG_LOG_ENABLED +#define TASK_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TASK_MANAGER_CONFIG_LOG_LEVEL +#define TASK_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_INFO_COLOR +#define TASK_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR +#define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// nrf_log in nRF_Drivers + +//========================================================== +// CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef CLOCK_CONFIG_LOG_ENABLED +#define CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef CLOCK_CONFIG_LOG_LEVEL +#define CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_INFO_COLOR +#define CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef CLOCK_CONFIG_DEBUG_COLOR +#define CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef COMP_CONFIG_LOG_ENABLED +#define COMP_CONFIG_LOG_ENABLED 0 +#endif +// COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef COMP_CONFIG_LOG_LEVEL +#define COMP_CONFIG_LOG_LEVEL 3 +#endif + +// COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_INFO_COLOR +#define COMP_CONFIG_INFO_COLOR 0 +#endif + +// COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef COMP_CONFIG_DEBUG_COLOR +#define COMP_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef GPIOTE_CONFIG_LOG_ENABLED +#define GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef GPIOTE_CONFIG_LOG_LEVEL +#define GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_INFO_COLOR +#define GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef GPIOTE_CONFIG_DEBUG_COLOR +#define GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef LPCOMP_CONFIG_LOG_ENABLED +#define LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef LPCOMP_CONFIG_LOG_LEVEL +#define LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +// LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_INFO_COLOR +#define LPCOMP_CONFIG_INFO_COLOR 0 +#endif + +// LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef LPCOMP_CONFIG_DEBUG_COLOR +#define LPCOMP_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// MAX3421E_HOST_CONFIG_LOG_ENABLED - Enable logging in the module +//========================================================== +#ifndef MAX3421E_HOST_CONFIG_LOG_ENABLED +#define MAX3421E_HOST_CONFIG_LOG_ENABLED 0 +#endif +// MAX3421E_HOST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef MAX3421E_HOST_CONFIG_LOG_LEVEL +#define MAX3421E_HOST_CONFIG_LOG_LEVEL 3 +#endif + +// MAX3421E_HOST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MAX3421E_HOST_CONFIG_INFO_COLOR +#define MAX3421E_HOST_CONFIG_INFO_COLOR 0 +#endif + +// MAX3421E_HOST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MAX3421E_HOST_CONFIG_DEBUG_COLOR +#define MAX3421E_HOST_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRFX_USBD_CONFIG_LOG_ENABLED - Enable logging in the module +//========================================================== +#ifndef NRFX_USBD_CONFIG_LOG_ENABLED +#define NRFX_USBD_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_USBD_CONFIG_LOG_LEVEL +#define NRFX_USBD_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_USBD_CONFIG_INFO_COLOR +#define NRFX_USBD_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_USBD_CONFIG_DEBUG_COLOR +#define NRFX_USBD_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PDM_CONFIG_LOG_ENABLED +#define PDM_CONFIG_LOG_ENABLED 0 +#endif +// PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PDM_CONFIG_LOG_LEVEL +#define PDM_CONFIG_LOG_LEVEL 3 +#endif + +// PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_INFO_COLOR +#define PDM_CONFIG_INFO_COLOR 0 +#endif + +// PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PDM_CONFIG_DEBUG_COLOR +#define PDM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// PPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PPI_CONFIG_LOG_ENABLED +#define PPI_CONFIG_LOG_ENABLED 0 +#endif +// PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PPI_CONFIG_LOG_LEVEL +#define PPI_CONFIG_LOG_LEVEL 3 +#endif + +// PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_INFO_COLOR +#define PPI_CONFIG_INFO_COLOR 0 +#endif + +// PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PPI_CONFIG_DEBUG_COLOR +#define PPI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef PWM_CONFIG_LOG_ENABLED +#define PWM_CONFIG_LOG_ENABLED 0 +#endif +// PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PWM_CONFIG_LOG_LEVEL +#define PWM_CONFIG_LOG_LEVEL 3 +#endif + +// PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_INFO_COLOR +#define PWM_CONFIG_INFO_COLOR 0 +#endif + +// PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PWM_CONFIG_DEBUG_COLOR +#define PWM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef QDEC_CONFIG_LOG_ENABLED +#define QDEC_CONFIG_LOG_ENABLED 0 +#endif +// QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef QDEC_CONFIG_LOG_LEVEL +#define QDEC_CONFIG_LOG_LEVEL 3 +#endif + +// QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_INFO_COLOR +#define QDEC_CONFIG_INFO_COLOR 0 +#endif + +// QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef QDEC_CONFIG_DEBUG_COLOR +#define QDEC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RNG_CONFIG_LOG_ENABLED +#define RNG_CONFIG_LOG_ENABLED 0 +#endif +// RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RNG_CONFIG_LOG_LEVEL +#define RNG_CONFIG_LOG_LEVEL 3 +#endif + +// RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_INFO_COLOR +#define RNG_CONFIG_INFO_COLOR 0 +#endif + +// RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RNG_CONFIG_DEBUG_COLOR +#define RNG_CONFIG_DEBUG_COLOR 0 +#endif + +// RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. + + +#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED +#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 +#endif + +// + +// RTC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef RTC_CONFIG_LOG_ENABLED +#define RTC_CONFIG_LOG_ENABLED 0 +#endif +// RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef RTC_CONFIG_LOG_LEVEL +#define RTC_CONFIG_LOG_LEVEL 3 +#endif + +// RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_INFO_COLOR +#define RTC_CONFIG_INFO_COLOR 0 +#endif + +// RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef RTC_CONFIG_DEBUG_COLOR +#define RTC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SAADC_CONFIG_LOG_ENABLED +#define SAADC_CONFIG_LOG_ENABLED 0 +#endif +// SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SAADC_CONFIG_LOG_LEVEL +#define SAADC_CONFIG_LOG_LEVEL 3 +#endif + +// SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_INFO_COLOR +#define SAADC_CONFIG_INFO_COLOR 0 +#endif + +// SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SAADC_CONFIG_DEBUG_COLOR +#define SAADC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPIS_CONFIG_LOG_ENABLED +#define SPIS_CONFIG_LOG_ENABLED 0 +#endif +// SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPIS_CONFIG_LOG_LEVEL +#define SPIS_CONFIG_LOG_LEVEL 3 +#endif + +// SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_INFO_COLOR +#define SPIS_CONFIG_INFO_COLOR 0 +#endif + +// SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPIS_CONFIG_DEBUG_COLOR +#define SPIS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// SPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SPI_CONFIG_LOG_ENABLED +#define SPI_CONFIG_LOG_ENABLED 0 +#endif +// SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SPI_CONFIG_LOG_LEVEL +#define SPI_CONFIG_LOG_LEVEL 3 +#endif + +// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_INFO_COLOR +#define SPI_CONFIG_INFO_COLOR 0 +#endif + +// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_DEBUG_COLOR +#define SPI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TIMER_CONFIG_LOG_ENABLED +#define TIMER_CONFIG_LOG_ENABLED 0 +#endif +// TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TIMER_CONFIG_LOG_LEVEL +#define TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_INFO_COLOR +#define TIMER_CONFIG_INFO_COLOR 0 +#endif + +// TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TIMER_CONFIG_DEBUG_COLOR +#define TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWIS_CONFIG_LOG_ENABLED +#define TWIS_CONFIG_LOG_ENABLED 0 +#endif +// TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWIS_CONFIG_LOG_LEVEL +#define TWIS_CONFIG_LOG_LEVEL 3 +#endif + +// TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_INFO_COLOR +#define TWIS_CONFIG_INFO_COLOR 0 +#endif + +// TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWIS_CONFIG_DEBUG_COLOR +#define TWIS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// TWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef TWI_CONFIG_LOG_ENABLED +#define TWI_CONFIG_LOG_ENABLED 0 +#endif +// TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef TWI_CONFIG_LOG_LEVEL +#define TWI_CONFIG_LOG_LEVEL 3 +#endif + +// TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_INFO_COLOR +#define TWI_CONFIG_INFO_COLOR 0 +#endif + +// TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef TWI_CONFIG_DEBUG_COLOR +#define TWI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef UART_CONFIG_LOG_ENABLED +#define UART_CONFIG_LOG_ENABLED 0 +#endif +// UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef UART_CONFIG_LOG_LEVEL +#define UART_CONFIG_LOG_LEVEL 3 +#endif + +// UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_INFO_COLOR +#define UART_CONFIG_INFO_COLOR 0 +#endif + +// UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef UART_CONFIG_DEBUG_COLOR +#define UART_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// USBD_CONFIG_LOG_ENABLED - Enable logging in the module +//========================================================== +#ifndef USBD_CONFIG_LOG_ENABLED +#define USBD_CONFIG_LOG_ENABLED 0 +#endif +// USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef USBD_CONFIG_LOG_LEVEL +#define USBD_CONFIG_LOG_LEVEL 3 +#endif + +// USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_INFO_COLOR +#define USBD_CONFIG_INFO_COLOR 0 +#endif + +// USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef USBD_CONFIG_DEBUG_COLOR +#define USBD_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef WDT_CONFIG_LOG_ENABLED +#define WDT_CONFIG_LOG_ENABLED 0 +#endif +// WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef WDT_CONFIG_LOG_LEVEL +#define WDT_CONFIG_LOG_LEVEL 3 +#endif + +// WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_INFO_COLOR +#define WDT_CONFIG_INFO_COLOR 0 +#endif + +// WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef WDT_CONFIG_DEBUG_COLOR +#define WDT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// nrf_log in nRF_Libraries + +//========================================================== +// APP_BUTTON_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_BUTTON_CONFIG_LOG_ENABLED +#define APP_BUTTON_CONFIG_LOG_ENABLED 0 +#endif +// APP_BUTTON_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_BUTTON_CONFIG_LOG_LEVEL +#define APP_BUTTON_CONFIG_LOG_LEVEL 3 +#endif + +// APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL +#define APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// APP_BUTTON_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_BUTTON_CONFIG_INFO_COLOR +#define APP_BUTTON_CONFIG_INFO_COLOR 0 +#endif + +// APP_BUTTON_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_BUTTON_CONFIG_DEBUG_COLOR +#define APP_BUTTON_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_TIMER_CONFIG_LOG_ENABLED +#define APP_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_LOG_LEVEL +#define APP_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL +#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_INFO_COLOR +#define APP_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_DEBUG_COLOR +#define APP_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED +#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL +#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR +#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR +#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module. +//========================================================== +#ifndef APP_USBD_CONFIG_LOG_ENABLED +#define APP_USBD_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_CONFIG_LOG_LEVEL +#define APP_USBD_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CONFIG_INFO_COLOR +#define APP_USBD_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_CONFIG_DEBUG_COLOR +#define APP_USBD_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED +#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL +#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR +#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR +#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED +#define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL +#define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR +#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR +#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED +#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 +#endif +// NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR +#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 +#endif + +// NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR +#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BALLOC_CONFIG_LOG_ENABLED +#define NRF_BALLOC_CONFIG_LOG_ENABLED 0 +#endif +// NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_LOG_LEVEL +#define NRF_BALLOC_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL +#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_INFO_COLOR +#define NRF_BALLOC_CONFIG_INFO_COLOR 0 +#endif + +// NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR +#define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED +#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED 0 +#endif +// NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL +#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR +#define NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR 0 +#endif + +// NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR +#define NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED +#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED 0 +#endif +// NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL +#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR +#define NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR 0 +#endif + +// NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR +#define NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED +#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED 0 +#endif +// NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL +#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR +#define NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR 0 +#endif + +// NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR +#define NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 +#endif +// NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR +#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 +#endif + +// NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED +#define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 +#endif +// NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL +#define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_INFO_COLOR +#define NRF_CLI_UART_CONFIG_INFO_COLOR 0 +#endif + +// NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR +#define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED +#define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 +#endif +// NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL +#define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR +#define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 +#endif + +// NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR +#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_PWR_MGMT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_PWR_MGMT_CONFIG_LOG_ENABLED +#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 +#endif +// NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL +#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR +#define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 +#endif + +// NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR +#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED +#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL +#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_INFO_COLOR +#define NRF_QUEUE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR +#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. +//========================================================== +#ifndef NRF_SDH_ANT_LOG_ENABLED +#define NRF_SDH_ANT_LOG_ENABLED 0 +#endif +// NRF_SDH_ANT_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_ANT_LOG_LEVEL +#define NRF_SDH_ANT_LOG_LEVEL 3 +#endif + +// NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_INFO_COLOR +#define NRF_SDH_ANT_INFO_COLOR 0 +#endif + +// NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_ANT_DEBUG_COLOR +#define NRF_SDH_ANT_DEBUG_COLOR 0 +#endif + +// + +// NRF_SDH_BLE_LOG_ENABLED - Enable logging in SoftDevice handler (BLE) module. +//========================================================== +#ifndef NRF_SDH_BLE_LOG_ENABLED +#define NRF_SDH_BLE_LOG_ENABLED 1 +#endif +// NRF_SDH_BLE_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_BLE_LOG_LEVEL +#define NRF_SDH_BLE_LOG_LEVEL 3 +#endif + +// NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_INFO_COLOR +#define NRF_SDH_BLE_INFO_COLOR 0 +#endif + +// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_BLE_DEBUG_COLOR +#define NRF_SDH_BLE_DEBUG_COLOR 0 +#endif + +// + +// NRF_SDH_LOG_ENABLED - Enable logging in SoftDevice handler module. +//========================================================== +#ifndef NRF_SDH_LOG_ENABLED +#define NRF_SDH_LOG_ENABLED 1 +#endif +// NRF_SDH_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_LOG_LEVEL +#define NRF_SDH_LOG_LEVEL 3 +#endif + +// NRF_SDH_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_INFO_COLOR +#define NRF_SDH_INFO_COLOR 0 +#endif + +// NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_DEBUG_COLOR +#define NRF_SDH_DEBUG_COLOR 0 +#endif + +// + +// NRF_SDH_SOC_LOG_ENABLED - Enable logging in SoftDevice handler (SoC) module. +//========================================================== +#ifndef NRF_SDH_SOC_LOG_ENABLED +#define NRF_SDH_SOC_LOG_ENABLED 1 +#endif +// NRF_SDH_SOC_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SDH_SOC_LOG_LEVEL +#define NRF_SDH_SOC_LOG_LEVEL 3 +#endif + +// NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_INFO_COLOR +#define NRF_SDH_SOC_INFO_COLOR 0 +#endif + +// NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SDH_SOC_DEBUG_COLOR +#define NRF_SDH_SOC_DEBUG_COLOR 0 +#endif + +// + +// NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED +#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 +#endif +// NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL +#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR +#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 +#endif + +// NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR +#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED +#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 +#endif +// NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL +#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR +#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 +#endif + +// NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR +#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// PM_LOG_ENABLED - Enable logging in Peer Manager and its submodules. +//========================================================== +#ifndef PM_LOG_ENABLED +#define PM_LOG_ENABLED 1 +#endif +// PM_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef PM_LOG_LEVEL +#define PM_LOG_LEVEL 3 +#endif + +// PM_LOG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PM_LOG_INFO_COLOR +#define PM_LOG_INFO_COLOR 0 +#endif + +// PM_LOG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef PM_LOG_DEBUG_COLOR +#define PM_LOG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// nrf_log in nRF_Serialization + +//========================================================== +// SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED +#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 +#endif +// SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL +#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 +#endif + +// SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR +#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 +#endif + +// SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR +#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// +//========================================================== + +// + +// NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter + + +#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED +#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 +#endif + +// +//========================================================== + +// nRF_NFC + +//========================================================== +// NFC_AC_REC_ENABLED - nfc_ac_rec - NFC NDEF Alternative Carrier record encoder + + +#ifndef NFC_AC_REC_ENABLED +#define NFC_AC_REC_ENABLED 0 +#endif + +// NFC_AC_REC_PARSER_ENABLED - nfc_ac_rec_parser - Alternative Carrier record parser + + +#ifndef NFC_AC_REC_PARSER_ENABLED +#define NFC_AC_REC_PARSER_ENABLED 0 +#endif + +// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - AD data for OOB pairing encoder +//========================================================== +#ifndef NFC_BLE_OOB_ADVDATA_ENABLED +#define NFC_BLE_OOB_ADVDATA_ENABLED 0 +#endif +// ADVANCED_ADVDATA_SUPPORT - Non-mandatory AD types for BLE OOB pairing are encoded inside the NDEF message (e.g. service UUIDs) + +// <1=> Enabled +// <0=> Disabled + +#ifndef ADVANCED_ADVDATA_SUPPORT +#define ADVANCED_ADVDATA_SUPPORT 0 +#endif + +// + +// NFC_BLE_OOB_ADVDATA_PARSER_ENABLED - nfc_ble_oob_advdata_parser - BLE OOB pairing AD data parser + + +#ifndef NFC_BLE_OOB_ADVDATA_PARSER_ENABLED +#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED 0 +#endif + +// NFC_BLE_PAIR_LIB_ENABLED - nfc_ble_pair_lib - Library parameters +//========================================================== +#ifndef NFC_BLE_PAIR_LIB_ENABLED +#define NFC_BLE_PAIR_LIB_ENABLED 0 +#endif +// NFC_BLE_PAIR_LIB_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_BLE_PAIR_LIB_LOG_ENABLED +#define NFC_BLE_PAIR_LIB_LOG_ENABLED 0 +#endif +// NFC_BLE_PAIR_LIB_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_BLE_PAIR_LIB_LOG_LEVEL +#define NFC_BLE_PAIR_LIB_LOG_LEVEL 3 +#endif + +// NFC_BLE_PAIR_LIB_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_BLE_PAIR_LIB_INFO_COLOR +#define NFC_BLE_PAIR_LIB_INFO_COLOR 0 +#endif + +// NFC_BLE_PAIR_LIB_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_BLE_PAIR_LIB_DEBUG_COLOR +#define NFC_BLE_PAIR_LIB_DEBUG_COLOR 0 +#endif + +// + +// NFC_BLE_PAIR_LIB_SECURITY_PARAMETERS - Common Peer Manager security parameters. + +//========================================================== +// BLE_NFC_SEC_PARAM_BOND - Enables device bonding. + +// If bonding is enabled at least one of the BLE_NFC_SEC_PARAM_KDIST options must be enabled. +//========================================================== +#ifndef BLE_NFC_SEC_PARAM_BOND +#define BLE_NFC_SEC_PARAM_BOND 1 +#endif +// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. + + +#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC +#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 +#endif + +// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. + + +#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID +#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 +#endif + +// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. + + +#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC +#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 +#endif + +// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. + + +#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID +#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 +#endif + +// + +// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 + +#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 +#endif + +// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 + +#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 +#endif + +// +//========================================================== + +// + +// NFC_BLE_PAIR_MSG_ENABLED - nfc_ble_pair_msg - NDEF message for OOB pairing encoder + + +#ifndef NFC_BLE_PAIR_MSG_ENABLED +#define NFC_BLE_PAIR_MSG_ENABLED 0 +#endif + +// NFC_CH_COMMON_ENABLED - nfc_ble_pair_common - OOB pairing common data + + +#ifndef NFC_CH_COMMON_ENABLED +#define NFC_CH_COMMON_ENABLED 0 +#endif + +// NFC_EP_OOB_REC_ENABLED - nfc_ep_oob_rec - EP record for BLE pairing encoder + + +#ifndef NFC_EP_OOB_REC_ENABLED +#define NFC_EP_OOB_REC_ENABLED 0 +#endif + +// NFC_HS_REC_ENABLED - nfc_hs_rec - Handover Select NDEF record encoder + + +#ifndef NFC_HS_REC_ENABLED +#define NFC_HS_REC_ENABLED 0 +#endif + +// NFC_LE_OOB_REC_ENABLED - nfc_le_oob_rec - LE record for BLE pairing encoder + + +#ifndef NFC_LE_OOB_REC_ENABLED +#define NFC_LE_OOB_REC_ENABLED 0 +#endif + +// NFC_LE_OOB_REC_PARSER_ENABLED - nfc_le_oob_rec_parser - LE record parser + + +#ifndef NFC_LE_OOB_REC_PARSER_ENABLED +#define NFC_LE_OOB_REC_PARSER_ENABLED 0 +#endif + +// NFC_NDEF_LAUNCHAPP_MSG_ENABLED - nfc_launchapp_msg - Encoding data for NDEF Application Launching message for NFC Tag + + +#ifndef NFC_NDEF_LAUNCHAPP_MSG_ENABLED +#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED 0 +#endif + +// NFC_NDEF_LAUNCHAPP_REC_ENABLED - nfc_launchapp_rec - Encoding data for NDEF Application Launching record for NFC Tag + + +#ifndef NFC_NDEF_LAUNCHAPP_REC_ENABLED +#define NFC_NDEF_LAUNCHAPP_REC_ENABLED 0 +#endif + +// NFC_NDEF_MSG_ENABLED - nfc_ndef_msg - NFC NDEF Message generator module +//========================================================== +#ifndef NFC_NDEF_MSG_ENABLED +#define NFC_NDEF_MSG_ENABLED 0 +#endif +// NFC_NDEF_MSG_TAG_TYPE - NFC Tag Type + +// <2=> Type 2 Tag +// <4=> Type 4 Tag + +#ifndef NFC_NDEF_MSG_TAG_TYPE +#define NFC_NDEF_MSG_TAG_TYPE 2 +#endif + +// + +// NFC_NDEF_MSG_PARSER_ENABLED - nfc_ndef_msg_parser - NFC NDEF message parser module +//========================================================== +#ifndef NFC_NDEF_MSG_PARSER_ENABLED +#define NFC_NDEF_MSG_PARSER_ENABLED 0 +#endif +// NFC_NDEF_MSG_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_NDEF_MSG_PARSER_LOG_ENABLED +#define NFC_NDEF_MSG_PARSER_LOG_ENABLED 0 +#endif +// NFC_NDEF_MSG_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_NDEF_MSG_PARSER_LOG_LEVEL +#define NFC_NDEF_MSG_PARSER_LOG_LEVEL 3 +#endif + +// NFC_NDEF_MSG_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_NDEF_MSG_PARSER_INFO_COLOR +#define NFC_NDEF_MSG_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_NDEF_RECORD_ENABLED - nfc_ndef_record - NFC NDEF Record generator module + + +#ifndef NFC_NDEF_RECORD_ENABLED +#define NFC_NDEF_RECORD_ENABLED 0 +#endif + +// NFC_NDEF_RECORD_PARSER_ENABLED - nfc_ndef_record_parser - NFC NDEF Record parser module +//========================================================== +#ifndef NFC_NDEF_RECORD_PARSER_ENABLED +#define NFC_NDEF_RECORD_PARSER_ENABLED 0 +#endif +// NFC_NDEF_RECORD_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_NDEF_RECORD_PARSER_LOG_ENABLED +#define NFC_NDEF_RECORD_PARSER_LOG_ENABLED 0 +#endif +// NFC_NDEF_RECORD_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_NDEF_RECORD_PARSER_LOG_LEVEL +#define NFC_NDEF_RECORD_PARSER_LOG_LEVEL 3 +#endif + +// NFC_NDEF_RECORD_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_NDEF_RECORD_PARSER_INFO_COLOR +#define NFC_NDEF_RECORD_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_NDEF_TEXT_RECORD_ENABLED - nfc_text_rec - Encoding data for a text record for NFC Tag + + +#ifndef NFC_NDEF_TEXT_RECORD_ENABLED +#define NFC_NDEF_TEXT_RECORD_ENABLED 0 +#endif + +// NFC_NDEF_URI_MSG_ENABLED - nfc_uri_msg - Encoding data for NDEF message with URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_MSG_ENABLED +#define NFC_NDEF_URI_MSG_ENABLED 0 +#endif + +// NFC_NDEF_URI_REC_ENABLED - nfc_uri_rec - Encoding data for a URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_REC_ENABLED +#define NFC_NDEF_URI_REC_ENABLED 0 +#endif + +// NFC_PLATFORM_ENABLED - nfc_platform - NFC platform module for Clock control. +//========================================================== +#ifndef NFC_PLATFORM_ENABLED +#define NFC_PLATFORM_ENABLED 0 +#endif +// NFC_PLATFORM_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_PLATFORM_LOG_ENABLED +#define NFC_PLATFORM_LOG_ENABLED 0 +#endif +// NFC_PLATFORM_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_PLATFORM_LOG_LEVEL +#define NFC_PLATFORM_LOG_LEVEL 3 +#endif + +// NFC_PLATFORM_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_PLATFORM_INFO_COLOR +#define NFC_PLATFORM_INFO_COLOR 0 +#endif + +// NFC_PLATFORM_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_PLATFORM_DEBUG_COLOR +#define NFC_PLATFORM_DEBUG_COLOR 0 +#endif + +// + +// + +// NFC_T2T_PARSER_ENABLED - nfc_type_2_tag_parser - Parser for decoding Type 2 Tag data +//========================================================== +#ifndef NFC_T2T_PARSER_ENABLED +#define NFC_T2T_PARSER_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T2T_PARSER_LOG_ENABLED +#define NFC_T2T_PARSER_LOG_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T2T_PARSER_LOG_LEVEL +#define NFC_T2T_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T2T_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T2T_PARSER_INFO_COLOR +#define NFC_T2T_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_T4T_APDU_ENABLED - nfc_t4t_apdu - APDU encoder/decoder for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_APDU_ENABLED +#define NFC_T4T_APDU_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_APDU_LOG_ENABLED +#define NFC_T4T_APDU_LOG_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_APDU_LOG_LEVEL +#define NFC_T4T_APDU_LOG_LEVEL 3 +#endif + +// NFC_T4T_APDU_LOG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_APDU_LOG_COLOR +#define NFC_T4T_APDU_LOG_COLOR 0 +#endif + +// + +// + +// NFC_T4T_CC_FILE_PARSER_ENABLED - nfc_t4t_cc_file - Capability Container file for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_ENABLED +#define NFC_T4T_CC_FILE_PARSER_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_ENABLED +#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_LEVEL +#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T4T_CC_FILE_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_CC_FILE_PARSER_INFO_COLOR +#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED - nfc_t4t_hl_detection_procedures - NDEF Detection Procedure for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED 0 +#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED 0 +#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL 3 +#endif + +// NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR +#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR 0 +#endif + +// + +// APDU_BUFF_SIZE - Size (in bytes) of the buffer for APDU storage +#ifndef APDU_BUFF_SIZE +#define APDU_BUFF_SIZE 250 +#endif + +// CC_STORAGE_BUFF_SIZE - Size (in bytes) of the buffer for CC file storage +#ifndef CC_STORAGE_BUFF_SIZE +#define CC_STORAGE_BUFF_SIZE 64 +#endif + +// + +// NFC_T4T_TLV_BLOCK_PARSER_ENABLED - nfc_t4t_tlv_block - TLV block for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_TLV_BLOCK_PARSER_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED 0 +#endif +// NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED 0 +#endif +// NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR +#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// +//========================================================== + +// nRF_SoftDevice + +//========================================================== +// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler +//========================================================== +#ifndef NRF_SDH_BLE_ENABLED +#define NRF_SDH_BLE_ENABLED 0 +#endif +// BLE Stack configuration - Stack configuration parameters + +// The SoftDevice handler will configure the stack with these parameters when calling @ref nrf_sdh_ble_default_cfg_set. +// Other libraries might depend on these values; keep them up-to-date even if you are not explicitely calling @ref nrf_sdh_ble_default_cfg_set. +//========================================================== +// NRF_SDH_BLE_GAP_DATA_LENGTH <27-251> + + +// Requested BLE GAP data length to be negotiated. + +#ifndef NRF_SDH_BLE_GAP_DATA_LENGTH +#define NRF_SDH_BLE_GAP_DATA_LENGTH 27 +#endif + +// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. +#ifndef NRF_SDH_BLE_PERIPHERAL_LINK_COUNT +#define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT 0 +#endif + +// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. +#ifndef NRF_SDH_BLE_CENTRAL_LINK_COUNT +#define NRF_SDH_BLE_CENTRAL_LINK_COUNT 0 +#endif + +// NRF_SDH_BLE_TOTAL_LINK_COUNT - Total link count. +// Maximum number of total concurrent connections using the default configuration. + +#ifndef NRF_SDH_BLE_TOTAL_LINK_COUNT +#define NRF_SDH_BLE_TOTAL_LINK_COUNT 1 +#endif + +// NRF_SDH_BLE_GAP_EVENT_LENGTH - GAP event length. +// The time set aside for this connection on every connection interval in 1.25 ms units. + +#ifndef NRF_SDH_BLE_GAP_EVENT_LENGTH +#define NRF_SDH_BLE_GAP_EVENT_LENGTH 6 +#endif + +// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. +#ifndef NRF_SDH_BLE_GATT_MAX_MTU_SIZE +#define NRF_SDH_BLE_GATT_MAX_MTU_SIZE 23 +#endif + +// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. +#ifndef NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE +#define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE 1408 +#endif + +// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. +#ifndef NRF_SDH_BLE_VS_UUID_COUNT +#define NRF_SDH_BLE_VS_UUID_COUNT 0 +#endif + +// NRF_SDH_BLE_SERVICE_CHANGED - Include the Service Changed characteristic in the Attribute Table. + + +#ifndef NRF_SDH_BLE_SERVICE_CHANGED +#define NRF_SDH_BLE_SERVICE_CHANGED 0 +#endif + +// +//========================================================== + +// BLE Observers - Observers and priority levels + +//========================================================== +// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. +// This setting configures the number of priority levels available for BLE event handlers. +// The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_BLE_OBSERVER_PRIO_LEVELS +#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 4 +#endif + +// BLE Observers priorities - Invididual priorities + +//========================================================== +// BLE_ADV_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Advertising module. + +#ifndef BLE_ADV_BLE_OBSERVER_PRIO +#define BLE_ADV_BLE_OBSERVER_PRIO 1 +#endif + +// BLE_ANCS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Apple Notification Service Client. + +#ifndef BLE_ANCS_C_BLE_OBSERVER_PRIO +#define BLE_ANCS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_ANS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Alert Notification Service Client. + +#ifndef BLE_ANS_C_BLE_OBSERVER_PRIO +#define BLE_ANS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_BAS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Battery Service. + +#ifndef BLE_BAS_BLE_OBSERVER_PRIO +#define BLE_BAS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_BAS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Battery Service Client. + +#ifndef BLE_BAS_C_BLE_OBSERVER_PRIO +#define BLE_BAS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_BPS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Blood Pressure Service. + +#ifndef BLE_BPS_BLE_OBSERVER_PRIO +#define BLE_BPS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Connection parameters module. + +#ifndef BLE_CONN_PARAMS_BLE_OBSERVER_PRIO +#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 1 +#endif + +// BLE_CONN_STATE_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Connection State module. + +#ifndef BLE_CONN_STATE_BLE_OBSERVER_PRIO +#define BLE_CONN_STATE_BLE_OBSERVER_PRIO 0 +#endif + +// BLE_CSCS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Cycling Speed and Cadence Service. + +#ifndef BLE_CSCS_BLE_OBSERVER_PRIO +#define BLE_CSCS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_CTS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Current Time Service Client. + +#ifndef BLE_CTS_C_BLE_OBSERVER_PRIO +#define BLE_CTS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_DB_DISC_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Database Discovery module. + +#ifndef BLE_DB_DISC_BLE_OBSERVER_PRIO +#define BLE_DB_DISC_BLE_OBSERVER_PRIO 1 +#endif + +// BLE_DFU_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the DFU Service. + +#ifndef BLE_DFU_BLE_OBSERVER_PRIO +#define BLE_DFU_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_DIS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Device Information Client. + +#ifndef BLE_DIS_C_BLE_OBSERVER_PRIO +#define BLE_DIS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_GLS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Glucose Service. + +#ifndef BLE_GLS_BLE_OBSERVER_PRIO +#define BLE_GLS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_HIDS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Human Interface Device Service. + +#ifndef BLE_HIDS_BLE_OBSERVER_PRIO +#define BLE_HIDS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_HRS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Heart Rate Service. + +#ifndef BLE_HRS_BLE_OBSERVER_PRIO +#define BLE_HRS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_HRS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Heart Rate Service Client. + +#ifndef BLE_HRS_C_BLE_OBSERVER_PRIO +#define BLE_HRS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_HTS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Health Thermometer Service. + +#ifndef BLE_HTS_BLE_OBSERVER_PRIO +#define BLE_HTS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_IAS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Immediate Alert Service. + +#ifndef BLE_IAS_BLE_OBSERVER_PRIO +#define BLE_IAS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_IAS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Immediate Alert Service Client. + +#ifndef BLE_IAS_C_BLE_OBSERVER_PRIO +#define BLE_IAS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_LBS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the LED Button Service. + +#ifndef BLE_LBS_BLE_OBSERVER_PRIO +#define BLE_LBS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_LBS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the LED Button Service Client. + +#ifndef BLE_LBS_C_BLE_OBSERVER_PRIO +#define BLE_LBS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_LLS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Link Loss Service. + +#ifndef BLE_LLS_BLE_OBSERVER_PRIO +#define BLE_LLS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_LNS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Location Navigation Service. + +#ifndef BLE_LNS_BLE_OBSERVER_PRIO +#define BLE_LNS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_NUS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the UART Service. + +#ifndef BLE_NUS_BLE_OBSERVER_PRIO +#define BLE_NUS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_NUS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the UART Central Service. + +#ifndef BLE_NUS_C_BLE_OBSERVER_PRIO +#define BLE_NUS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_OTS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Object transfer service. + +#ifndef BLE_OTS_BLE_OBSERVER_PRIO +#define BLE_OTS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_OTS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Object transfer service client. + +#ifndef BLE_OTS_C_BLE_OBSERVER_PRIO +#define BLE_OTS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_RSCS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Running Speed and Cadence Service. + +#ifndef BLE_RSCS_BLE_OBSERVER_PRIO +#define BLE_RSCS_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_RSCS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Running Speed and Cadence Client. + +#ifndef BLE_RSCS_C_BLE_OBSERVER_PRIO +#define BLE_RSCS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_TPS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the TX Power Service. + +#ifndef BLE_TPS_BLE_OBSERVER_PRIO +#define BLE_TPS_BLE_OBSERVER_PRIO 2 +#endif + +// BSP_BTN_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Button Control module. + +#ifndef BSP_BTN_BLE_OBSERVER_PRIO +#define BSP_BTN_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NRF_BLE_BMS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Bond Management Service. + +#ifndef NRF_BLE_BMS_BLE_OBSERVER_PRIO +#define NRF_BLE_BMS_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_CGMS_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Contiuon Glucose Monitoring Service. + +#ifndef NRF_BLE_CGMS_BLE_OBSERVER_PRIO +#define NRF_BLE_CGMS_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_ES_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Eddystone module. + +#ifndef NRF_BLE_ES_BLE_OBSERVER_PRIO +#define NRF_BLE_ES_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the GATT Service Client. + +#ifndef NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO +#define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_GATT_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the GATT module. + +#ifndef NRF_BLE_GATT_BLE_OBSERVER_PRIO +#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 1 +#endif + +// NRF_BLE_GQ_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the GATT Queue module. + +#ifndef NRF_BLE_GQ_BLE_OBSERVER_PRIO +#define NRF_BLE_GQ_BLE_OBSERVER_PRIO 1 +#endif + +// NRF_BLE_QWR_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Queued writes module. + +#ifndef NRF_BLE_QWR_BLE_OBSERVER_PRIO +#define NRF_BLE_QWR_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_SCAN_OBSERVER_PRIO +// Priority for dispatching the BLE events to the Scanning Module. + +#ifndef NRF_BLE_SCAN_OBSERVER_PRIO +#define NRF_BLE_SCAN_OBSERVER_PRIO 1 +#endif + +// PM_BLE_OBSERVER_PRIO - Priority with which BLE events are dispatched to the Peer Manager module. +#ifndef PM_BLE_OBSERVER_PRIO +#define PM_BLE_OBSERVER_PRIO 1 +#endif + +// +//========================================================== + +// +//========================================================== + + +// + +// NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler +//========================================================== +#ifndef NRF_SDH_ENABLED +#define NRF_SDH_ENABLED 0 +#endif +// Dispatch model + +// This setting configures how Stack events are dispatched to the application. +//========================================================== +// NRF_SDH_DISPATCH_MODEL + + +// NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. +// NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. +// NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. +// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT +// <1=> NRF_SDH_DISPATCH_MODEL_APPSH +// <2=> NRF_SDH_DISPATCH_MODEL_POLLING + +#ifndef NRF_SDH_DISPATCH_MODEL +#define NRF_SDH_DISPATCH_MODEL 0 +#endif + +// +//========================================================== + +// Clock - SoftDevice clock configuration + +//========================================================== +// NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. + +// <0=> NRF_CLOCK_LF_SRC_RC +// <1=> NRF_CLOCK_LF_SRC_XTAL +// <2=> NRF_CLOCK_LF_SRC_SYNTH + +#ifndef NRF_SDH_CLOCK_LF_SRC +#define NRF_SDH_CLOCK_LF_SRC 1 +#endif + +// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. +#ifndef NRF_SDH_CLOCK_LF_RC_CTIV +#define NRF_SDH_CLOCK_LF_RC_CTIV 0 +#endif + +// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. +// How often (in number of calibration intervals) the RC oscillator shall be calibrated +// if the temperature has not changed. + +#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV +#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 +#endif + +// NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. + +// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM +// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM +// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM +// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM +// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM +// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM +// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM +// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM +// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM +// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM +// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM +// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM + +#ifndef NRF_SDH_CLOCK_LF_ACCURACY +#define NRF_SDH_CLOCK_LF_ACCURACY 7 +#endif + +// +//========================================================== + +// SDH Observers - Observers and priority levels + +//========================================================== +// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. +// This setting configures the number of priority levels available for the SoftDevice request event handlers. +// The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_REQ_OBSERVER_PRIO_LEVELS +#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 +#endif + +// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. +// This setting configures the number of priority levels available for the SoftDevice state event handlers. +// The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STATE_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 +#endif + +// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. +// This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). +// The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_STACK_OBSERVER_PRIO_LEVELS +#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS 2 +#endif + + +// State Observers priorities - Invididual priorities + +//========================================================== +// CLOCK_CONFIG_STATE_OBSERVER_PRIO +// Priority with which state events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO +#define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// POWER_CONFIG_STATE_OBSERVER_PRIO +// Priority with which state events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_STATE_OBSERVER_PRIO +#define POWER_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// RNG_CONFIG_STATE_OBSERVER_PRIO +// Priority with which state events are dispatched to this module. + +#ifndef RNG_CONFIG_STATE_OBSERVER_PRIO +#define RNG_CONFIG_STATE_OBSERVER_PRIO 0 +#endif + +// +//========================================================== + +// Stack Event Observers priorities - Invididual priorities + +//========================================================== +// NRF_SDH_ANT_STACK_OBSERVER_PRIO +// This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. +// Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. +// Zero is the highest priority. + +#ifndef NRF_SDH_ANT_STACK_OBSERVER_PRIO +#define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 +#endif + +// NRF_SDH_BLE_STACK_OBSERVER_PRIO +// This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. +// Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. +// Zero is the highest priority. + +#ifndef NRF_SDH_BLE_STACK_OBSERVER_PRIO +#define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 +#endif + +// NRF_SDH_SOC_STACK_OBSERVER_PRIO +// This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. +// Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. +// Zero is the highest priority. + +#ifndef NRF_SDH_SOC_STACK_OBSERVER_PRIO +#define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 +#endif + +// +//========================================================== + +// +//========================================================== + + +// + +// NRF_SDH_SOC_ENABLED - nrf_sdh_soc - SoftDevice SoC event handler +//========================================================== +#ifndef NRF_SDH_SOC_ENABLED +#define NRF_SDH_SOC_ENABLED 0 +#endif +// SoC Observers - Observers and priority levels + +//========================================================== +// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. +// This setting configures the number of priority levels available for the SoC event handlers. +// The priority level of a handler determines the order in which it receives events, with respect to other handlers. + +#ifndef NRF_SDH_SOC_OBSERVER_PRIO_LEVELS +#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS 2 +#endif + +// SoC Observers priorities - Invididual priorities + +//========================================================== +// BLE_DFU_SOC_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the DFU Service. + +#ifndef BLE_DFU_SOC_OBSERVER_PRIO +#define BLE_DFU_SOC_OBSERVER_PRIO 1 +#endif + +// CLOCK_CONFIG_SOC_OBSERVER_PRIO +// Priority with which SoC events are dispatched to the Clock driver. + +#ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO +#define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// POWER_CONFIG_SOC_OBSERVER_PRIO +// Priority with which SoC events are dispatched to the Power driver. + +#ifndef POWER_CONFIG_SOC_OBSERVER_PRIO +#define POWER_CONFIG_SOC_OBSERVER_PRIO 0 +#endif + +// +//========================================================== + +// +//========================================================== + + +// + +// +//========================================================== + +// <<< end of configuration section >>> +#endif //SDK_CONFIG_H + diff --git a/bsp/nrf5x/nrf52840/project.uvoptx b/bsp/nrf5x/nrf52840/project.uvoptx index 968aaa21de..7d8a5a4f97 100644 --- a/bsp/nrf5x/nrf52840/project.uvoptx +++ b/bsp/nrf5x/nrf52840/project.uvoptx @@ -73,7 +73,7 @@ 0 - 0 + 1 0 1 @@ -171,6 +171,13 @@ + + 1 + 1 + 0 + 2 + 10000000 + @@ -352,7 +359,7 @@ Applications - 0 + 1 0 0 0 @@ -368,70 +375,70 @@ 0 0 + + + + Drivers + 1 + 0 + 0 + 0 - 2 + 3 16 1 0 0 0 - applications\ble_nus_app.c - ble_nus_app.c + board\board.c + board.c 0 0 - 2 + 3 17 1 0 0 0 - applications\startup.c - startup.c + ..\libraries\drivers\drv_uart.c + drv_uart.c 0 0 - Drivers - 0 + nrfx + 1 0 0 0 - 3 + 4 18 1 0 0 0 - board\board.c - board.c + packages\nrfx-v2.1.0\drivers\src\nrfx_adc.c + nrfx_adc.c 0 0 - 3 + 4 19 1 0 0 0 - ..\libraries\drivers\drv_uart.c - drv_uart.c + packages\nrfx-v2.1.0\drivers\src\nrfx_clock.c + nrfx_clock.c 0 0 - - - - BLE_STACK - 0 - 0 - 0 - 0 4 20 @@ -439,8 +446,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\common\ble_advdata.c - ble_advdata.c + packages\nrfx-v2.1.0\drivers\src\nrfx_comp.c + nrfx_comp.c 0 0 @@ -451,8 +458,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\common\ble_conn_params.c - ble_conn_params.c + packages\nrfx-v2.1.0\drivers\src\nrfx_dppi.c + nrfx_dppi.c 0 0 @@ -463,8 +470,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\common\ble_conn_state.c - ble_conn_state.c + packages\nrfx-v2.1.0\drivers\src\nrfx_egu.c + nrfx_egu.c 0 0 @@ -475,8 +482,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\common\ble_srv_common.c - ble_srv_common.c + packages\nrfx-v2.1.0\drivers\src\nrfx_gpiote.c + nrfx_gpiote.c 0 0 @@ -487,8 +494,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\nrf_ble_gatt\nrf_ble_gatt.c - nrf_ble_gatt.c + packages\nrfx-v2.1.0\drivers\src\nrfx_i2s.c + nrfx_i2s.c 0 0 @@ -499,8 +506,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\ble_services\ble_nus\ble_nus.c - ble_nus.c + packages\nrfx-v2.1.0\drivers\src\nrfx_ipc.c + nrfx_ipc.c 0 0 @@ -511,8 +518,8 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\ble\ble_advertising\ble_advertising.c - ble_advertising.c + packages\nrfx-v2.1.0\drivers\src\nrfx_lpcomp.c + nrfx_lpcomp.c 0 0 @@ -523,231 +530,331 @@ 0 0 0 - packages\nrf5x_sdk-latest\components\softdevice\common\softdevice_handler\softdevice_handler.c - softdevice_handler.c + packages\nrfx-v2.1.0\drivers\src\nrfx_nfct.c + nrfx_nfct.c 0 0 - - - - NRF_DRIVERS - 0 - 0 - 0 - 0 - 5 + 4 28 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\hal\nrf_saadc.c - nrf_saadc.c + packages\nrfx-v2.1.0\drivers\src\nrfx_nvmc.c + nrfx_nvmc.c 0 0 - 5 + 4 29 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\common\nrf_drv_common.c - nrf_drv_common.c + packages\nrfx-v2.1.0\drivers\src\nrfx_pdm.c + nrfx_pdm.c 0 0 - 5 + 4 30 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\clock\nrf_drv_clock.c - nrf_drv_clock.c + packages\nrfx-v2.1.0\drivers\src\nrfx_power.c + nrfx_power.c 0 0 - 5 + 4 31 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\gpiote\nrf_drv_gpiote.c - nrf_drv_gpiote.c + packages\nrfx-v2.1.0\drivers\src\nrfx_ppi.c + nrfx_ppi.c 0 0 - 5 + 4 32 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\pwm\nrf_drv_pwm.c - nrf_drv_pwm.c + packages\nrfx-v2.1.0\drivers\src\nrfx_pwm.c + nrfx_pwm.c 0 0 - 5 + 4 33 1 0 0 0 - packages\nrf5x_sdk-latest\components\drivers_nrf\saadc\nrf_drv_saadc.c - nrf_drv_saadc.c + packages\nrfx-v2.1.0\drivers\src\nrfx_qdec.c + nrfx_qdec.c 0 0 - 5 + 4 34 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\log\src\nrf_log_backend_serial.c - nrf_log_backend_serial.c + packages\nrfx-v2.1.0\drivers\src\nrfx_qspi.c + nrfx_qspi.c 0 0 - 5 + 4 35 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\log\src\nrf_log_frontend.c - nrf_log_frontend.c + packages\nrfx-v2.1.0\drivers\src\nrfx_rng.c + nrfx_rng.c 0 0 - 5 + 4 36 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\timer\app_timer_rtthread.c - app_timer_rtthread.c + packages\nrfx-v2.1.0\drivers\src\nrfx_rtc.c + nrfx_rtc.c 0 0 - 5 + 4 37 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\util\app_error.c - app_error.c + packages\nrfx-v2.1.0\drivers\src\nrfx_saadc.c + nrfx_saadc.c 0 0 - 5 + 4 38 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\util\app_error_weak.c - app_error_weak.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spi.c + nrfx_spi.c 0 0 - 5 + 4 39 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\util\app_util_platform.c - app_util_platform.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spim.c + nrfx_spim.c 0 0 - 5 + 4 40 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\util\nrf_assert.c - nrf_assert.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spis.c + nrfx_spis.c 0 0 - 5 + 4 41 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\util\sdk_mapped_flags.c - sdk_mapped_flags.c + packages\nrfx-v2.1.0\drivers\src\nrfx_systick.c + nrfx_systick.c 0 0 - 5 + 4 42 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\fstorage\fstorage.c - fstorage.c + packages\nrfx-v2.1.0\drivers\src\nrfx_temp.c + nrfx_temp.c 0 0 - 5 + 4 43 1 0 0 0 - packages\nrf5x_sdk-latest\components\libraries\strerror\nrf_strerror.c - nrf_strerror.c + packages\nrfx-v2.1.0\drivers\src\nrfx_timer.c + nrfx_timer.c 0 0 - 5 + 4 44 1 0 0 0 - packages\nrf5x_sdk-latest\components\toolchain\system_nrf52840.c - system_nrf52840.c + packages\nrfx-v2.1.0\drivers\src\nrfx_twi.c + nrfx_twi.c 0 0 - 5 + 4 45 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_twi_twim.c + nrfx_twi_twim.c + 0 + 0 + + + 4 + 46 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_twim.c + nrfx_twim.c + 0 + 0 + + + 4 + 47 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_twis.c + nrfx_twis.c + 0 + 0 + + + 4 + 48 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_uart.c + nrfx_uart.c + 0 + 0 + + + 4 + 49 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_uarte.c + nrfx_uarte.c + 0 + 0 + + + 4 + 50 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_usbd.c + nrfx_usbd.c + 0 + 0 + + + 4 + 51 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_usbreg.c + nrfx_usbreg.c + 0 + 0 + + + 4 + 52 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\drivers\src\nrfx_wdt.c + nrfx_wdt.c + 0 + 0 + + + 4 + 53 + 1 + 0 + 0 + 0 + packages\nrfx-v2.1.0\mdk\system_nrf52840.c + system_nrf52840.c + 0 + 0 + + + 4 + 54 2 0 0 0 - packages\nrf5x_sdk-latest\components\toolchain\arm\arm_startup_nrf52840.s + packages\nrfx-v2.1.0\mdk\arm_startup_nrf52840.s arm_startup_nrf52840.s 0 0 @@ -761,8 +868,8 @@ 0 0 - 6 - 46 + 5 + 55 1 0 0 @@ -773,8 +880,8 @@ 0 - 6 - 47 + 5 + 56 1 0 0 @@ -785,8 +892,8 @@ 0 - 6 - 48 + 5 + 57 1 0 0 @@ -797,8 +904,8 @@ 0 - 6 - 49 + 5 + 58 1 0 0 @@ -809,8 +916,8 @@ 0 - 6 - 50 + 5 + 59 2 0 0 @@ -829,8 +936,8 @@ 0 0 - 7 - 51 + 6 + 60 1 0 0 @@ -841,8 +948,8 @@ 0 - 7 - 52 + 6 + 61 1 0 0 @@ -853,8 +960,8 @@ 0 - 7 - 53 + 6 + 62 1 0 0 @@ -865,8 +972,8 @@ 0 - 7 - 54 + 6 + 63 1 0 0 @@ -877,8 +984,8 @@ 0 - 7 - 55 + 6 + 64 1 0 0 @@ -889,8 +996,8 @@ 0 - 7 - 56 + 6 + 65 1 0 0 @@ -901,8 +1008,8 @@ 0 - 7 - 57 + 6 + 66 1 0 0 @@ -913,8 +1020,8 @@ 0 - 7 - 58 + 6 + 67 1 0 0 @@ -925,8 +1032,8 @@ 0 - 7 - 59 + 6 + 68 1 0 0 @@ -945,8 +1052,8 @@ 0 0 - 8 - 60 + 7 + 69 1 0 0 @@ -957,8 +1064,8 @@ 0 - 8 - 61 + 7 + 70 1 0 0 @@ -969,8 +1076,8 @@ 0 - 8 - 62 + 7 + 71 1 0 0 @@ -989,8 +1096,8 @@ 0 0 - 9 - 63 + 8 + 72 1 0 0 @@ -1001,8 +1108,8 @@ 0 - 9 - 64 + 8 + 73 1 0 0 @@ -1013,8 +1120,8 @@ 0 - 9 - 65 + 8 + 74 1 0 0 @@ -1025,8 +1132,8 @@ 0 - 9 - 66 + 8 + 75 1 0 0 diff --git a/bsp/nrf5x/nrf52840/project.uvprojx b/bsp/nrf5x/nrf52840/project.uvprojx index f09f8dfcaf..babb19e132 100644 --- a/bsp/nrf5x/nrf52840/project.uvprojx +++ b/bsp/nrf5x/nrf52840/project.uvprojx @@ -10,13 +10,13 @@ rtthread 0x4 ARM-ADS - 5060422::V5.06 update 4 (build 422)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC 0 nRF52840_xxAA Nordic Semiconductor - NordicSemiconductor.nRF_DeviceFamilyPack.8.12.0 + NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1 http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/ IRAM(0x20000000,0x00040000) IROM(0x00000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE @@ -54,7 +54,7 @@ 0 0 1 - 0 + 1 .\build\ 1 0 @@ -274,7 +274,7 @@ 1 - 0x22000 + 0x0 0xde000 @@ -336,9 +336,9 @@ 0 --reduce_paths - NRF52_PAN_55, NRF52_PAN_12, NRF52_PAN_15, NRF52_PAN_58, SWI_DISABLE0, SOFTDEVICE_PRESENT, NRF52_PAN_54, NRF52, BLE_STACK_SUPPORT_REQD, NRF52_PAN_51, NRF52_PAN_36, RTTHREAD, CONFIG_GPIO_AS_PINRESET, NRF52_PAN_64, NRF52_PAN_20, NRF52_PAN_74, NRF52840_XXAA, S132, NRF_SD_BLE_API_VERSION=4, NRF52_PAN_31, RT_USING_ARM_LIBC + NRF52840_XXAA, USE_APP_CONFIG, RT_USING_ARM_LIBC - .;..\..\..\include;applications;.;board;..\libraries\drivers;packages\nrf5x_sdk-latest\components;packages\nrf5x_sdk-latest\components\softdevice\common\softdevice_handler;packages\nrf5x_sdk-latest\components\softdevice\s132\headers;packages\nrf5x_sdk-latest\components\softdevice\s132\headers\nrf52;packages\nrf5x_sdk-latest\components\ble\common;packages\nrf5x_sdk-latest\components\ble\nrf_ble_gatt;packages\nrf5x_sdk-latest\components\ble\ble_advertising;packages\nrf5x_sdk-latest\components\ble\ble_services\ble_nus;packages\nrf5x_sdk-latest\components;packages\nrf5x_sdk-latest\components\device;packages\nrf5x_sdk-latest\components\drivers_nrf\delay;packages\nrf5x_sdk-latest\components\drivers_nrf\uart;packages\nrf5x_sdk-latest\components\drivers_nrf\clock;packages\nrf5x_sdk-latest\components\drivers_nrf\gpiote;packages\nrf5x_sdk-latest\components\drivers_nrf\common;packages\nrf5x_sdk-latest\components\drivers_nrf\hal;packages\nrf5x_sdk-latest\components\drivers_nrf\pwm;packages\nrf5x_sdk-latest\components\drivers_nrf\saadc;packages\nrf5x_sdk-latest\components\libraries\util;packages\nrf5x_sdk-latest\components\libraries\timer;packages\nrf5x_sdk-latest\components\libraries\fstorage;packages\nrf5x_sdk-latest\components\libraries\experimental_section_vars;packages\nrf5x_sdk-latest\components\libraries\log;packages\nrf5x_sdk-latest\components\libraries\log\src;packages\nrf5x_sdk-latest\components\libraries\strerror;packages\nrf5x_sdk-latest\components\toolchain\cmsis\include;packages\nrf5x_sdk-latest\components\toolchain;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common + .;..\..\..\include;applications;.;board;..\libraries\drivers;packages\nrfx-v2.1.0;packages\nrfx-v2.1.0\drivers;packages\nrfx-v2.1.0\drivers\include;packages\nrfx-v2.1.0\mdk;packages\nrfx-v2.1.0\hal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\cmsis\include @@ -354,7 +354,7 @@ 0 --cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74 - BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74 + @@ -462,16 +462,6 @@ 1 applications\application.c - - ble_nus_app.c - 1 - applications\ble_nus_app.c - - - startup.c - 1 - applications\startup.c - @@ -490,142 +480,192 @@ - BLE_STACK + nrfx - ble_advdata.c + nrfx_adc.c 1 - packages\nrf5x_sdk-latest\components\ble\common\ble_advdata.c + packages\nrfx-v2.1.0\drivers\src\nrfx_adc.c - ble_conn_params.c + nrfx_clock.c 1 - packages\nrf5x_sdk-latest\components\ble\common\ble_conn_params.c + packages\nrfx-v2.1.0\drivers\src\nrfx_clock.c - ble_conn_state.c + nrfx_comp.c 1 - packages\nrf5x_sdk-latest\components\ble\common\ble_conn_state.c + packages\nrfx-v2.1.0\drivers\src\nrfx_comp.c - ble_srv_common.c + nrfx_dppi.c 1 - packages\nrf5x_sdk-latest\components\ble\common\ble_srv_common.c + packages\nrfx-v2.1.0\drivers\src\nrfx_dppi.c - nrf_ble_gatt.c + nrfx_egu.c 1 - packages\nrf5x_sdk-latest\components\ble\nrf_ble_gatt\nrf_ble_gatt.c + packages\nrfx-v2.1.0\drivers\src\nrfx_egu.c - ble_nus.c + nrfx_gpiote.c 1 - packages\nrf5x_sdk-latest\components\ble\ble_services\ble_nus\ble_nus.c + packages\nrfx-v2.1.0\drivers\src\nrfx_gpiote.c - ble_advertising.c + nrfx_i2s.c 1 - packages\nrf5x_sdk-latest\components\ble\ble_advertising\ble_advertising.c + packages\nrfx-v2.1.0\drivers\src\nrfx_i2s.c - softdevice_handler.c + nrfx_ipc.c 1 - packages\nrf5x_sdk-latest\components\softdevice\common\softdevice_handler\softdevice_handler.c + packages\nrfx-v2.1.0\drivers\src\nrfx_ipc.c + + + nrfx_lpcomp.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_lpcomp.c + + + nrfx_nfct.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_nfct.c + + + nrfx_nvmc.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_nvmc.c + + + nrfx_pdm.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_pdm.c + + + nrfx_power.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_power.c + + + nrfx_ppi.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_ppi.c + + + nrfx_pwm.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_pwm.c + + + nrfx_qdec.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_qdec.c + + + nrfx_qspi.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_qspi.c + + + nrfx_rng.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_rng.c + + + nrfx_rtc.c + 1 + packages\nrfx-v2.1.0\drivers\src\nrfx_rtc.c - - - - NRF_DRIVERS - - nrf_saadc.c + nrfx_saadc.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\hal\nrf_saadc.c + packages\nrfx-v2.1.0\drivers\src\nrfx_saadc.c - nrf_drv_common.c + nrfx_spi.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\common\nrf_drv_common.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spi.c - nrf_drv_clock.c + nrfx_spim.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\clock\nrf_drv_clock.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spim.c - nrf_drv_gpiote.c + nrfx_spis.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\gpiote\nrf_drv_gpiote.c + packages\nrfx-v2.1.0\drivers\src\nrfx_spis.c - nrf_drv_pwm.c + nrfx_systick.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\pwm\nrf_drv_pwm.c + packages\nrfx-v2.1.0\drivers\src\nrfx_systick.c - nrf_drv_saadc.c + nrfx_temp.c 1 - packages\nrf5x_sdk-latest\components\drivers_nrf\saadc\nrf_drv_saadc.c + packages\nrfx-v2.1.0\drivers\src\nrfx_temp.c - nrf_log_backend_serial.c + nrfx_timer.c 1 - packages\nrf5x_sdk-latest\components\libraries\log\src\nrf_log_backend_serial.c + packages\nrfx-v2.1.0\drivers\src\nrfx_timer.c - nrf_log_frontend.c + nrfx_twi.c 1 - packages\nrf5x_sdk-latest\components\libraries\log\src\nrf_log_frontend.c + packages\nrfx-v2.1.0\drivers\src\nrfx_twi.c - app_timer_rtthread.c + nrfx_twi_twim.c 1 - packages\nrf5x_sdk-latest\components\libraries\timer\app_timer_rtthread.c + packages\nrfx-v2.1.0\drivers\src\nrfx_twi_twim.c - app_error.c + nrfx_twim.c 1 - packages\nrf5x_sdk-latest\components\libraries\util\app_error.c + packages\nrfx-v2.1.0\drivers\src\nrfx_twim.c - app_error_weak.c + nrfx_twis.c 1 - packages\nrf5x_sdk-latest\components\libraries\util\app_error_weak.c + packages\nrfx-v2.1.0\drivers\src\nrfx_twis.c - app_util_platform.c + nrfx_uart.c 1 - packages\nrf5x_sdk-latest\components\libraries\util\app_util_platform.c + packages\nrfx-v2.1.0\drivers\src\nrfx_uart.c - nrf_assert.c + nrfx_uarte.c 1 - packages\nrf5x_sdk-latest\components\libraries\util\nrf_assert.c + packages\nrfx-v2.1.0\drivers\src\nrfx_uarte.c - sdk_mapped_flags.c + nrfx_usbd.c 1 - packages\nrf5x_sdk-latest\components\libraries\util\sdk_mapped_flags.c + packages\nrfx-v2.1.0\drivers\src\nrfx_usbd.c - fstorage.c + nrfx_usbreg.c 1 - packages\nrf5x_sdk-latest\components\libraries\fstorage\fstorage.c + packages\nrfx-v2.1.0\drivers\src\nrfx_usbreg.c - nrf_strerror.c + nrfx_wdt.c 1 - packages\nrf5x_sdk-latest\components\libraries\strerror\nrf_strerror.c + packages\nrfx-v2.1.0\drivers\src\nrfx_wdt.c system_nrf52840.c 1 - packages\nrf5x_sdk-latest\components\toolchain\system_nrf52840.c + packages\nrfx-v2.1.0\mdk\system_nrf52840.c arm_startup_nrf52840.s 2 - packages\nrf5x_sdk-latest\components\toolchain\arm\arm_startup_nrf52840.s + packages\nrfx-v2.1.0\mdk\arm_startup_nrf52840.s diff --git a/bsp/nrf5x/nrf52840/rtconfig.h b/bsp/nrf5x/nrf52840/rtconfig.h index 0a0c76deef..1741c7dd7b 100644 --- a/bsp/nrf5x/nrf52840/rtconfig.h +++ b/bsp/nrf5x/nrf52840/rtconfig.h @@ -46,6 +46,9 @@ /* RT-Thread Components */ #define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 /* C++ features */ @@ -74,7 +77,6 @@ #define RT_USING_DEVICE_IPC #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL -#define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN @@ -138,8 +140,8 @@ /* peripheral libraries and drivers */ -#define PKG_USING_NRF5X_SDK -#define PKG_USING_NRF5X_SDK_LATEST_VERSION +#define PKG_USING_NRFX +#define PKG_USING_NRFX_V210 /* miscellaneous packages */ @@ -153,11 +155,9 @@ /* Onboard Peripheral Drivers */ -#define BSP_USING_JLINK_TO_USART /* On-chip Peripheral Drivers */ -#define BSP_USING_GPIO #define BSP_USING_UART #define BSP_USING_UART0 diff --git a/bsp/nrf5x/nrf52840/template.uvoptx b/bsp/nrf5x/nrf52840/template.uvoptx index cb8b2f9436..2e5f9fc2ac 100644 --- a/bsp/nrf5x/nrf52840/template.uvoptx +++ b/bsp/nrf5x/nrf52840/template.uvoptx @@ -171,6 +171,13 @@ + + 1 + 1 + 0 + 2 + 10000000 + diff --git a/bsp/nrf5x/nrf52840/template.uvprojx b/bsp/nrf5x/nrf52840/template.uvprojx index 5e6a2c37e7..9a8aa49622 100644 --- a/bsp/nrf5x/nrf52840/template.uvprojx +++ b/bsp/nrf5x/nrf52840/template.uvprojx @@ -16,7 +16,7 @@ nRF52840_xxAA Nordic Semiconductor - NordicSemiconductor.nRF_DeviceFamilyPack.8.12.0 + NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1 http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/ IRAM(0x20000000,0x00040000) IROM(0x00000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE @@ -54,7 +54,7 @@ 0 0 1 - 0 + 1 .\build\ 1 0 @@ -274,7 +274,7 @@ 1 - 0x22000 + 0x0 0xde000 @@ -354,7 +354,7 @@ 0 --cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74 - BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S132 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74 + -- Gitee From bcda77bc438fdb20e4a8410fcf4825794ab0148c Mon Sep 17 00:00:00 2001 From: Huaqi Fang <578567190@qq.com> Date: Mon, 20 Apr 2020 10:33:32 +0800 Subject: [PATCH 10/54] [DOC] Add Nuclei to main README.md Mainly display Nuclei processor support Signed-off-by: Huaqi Fang <578567190@qq.com> --- README.md | 2 +- README_zh.md | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 09156b6ca4..d0ca35c957 100644 --- a/README.md +++ b/README.md @@ -86,7 +86,7 @@ RT-Thread supports many architectures, and has covered the major architectures i - **ARM9**:manufacturers like Allwinner、Xilinx 、GOKE - **ARM11**:manufacturers like Fullhan - **MIPS32**:manufacturers like loongson、Ingenic -- **RISC-V**:manufacturers like Hifive、Kendryte +- **RISC-V**:manufacturers like Hifive、Kendryte、[Nuclei](https://nucleisys.com/) - **ARC**:manufacturers like SYNOPSYS - **DSP**:manufacturers like TI - **C-Sky** diff --git a/README_zh.md b/README_zh.md index 4d1cc3e9e5..9cdfa30722 100644 --- a/README_zh.md +++ b/README_zh.md @@ -89,7 +89,7 @@ RT-Thread RTOS 支持许多架构,并且已经涵盖了当前应用中的主 - MIPS32:如芯片制造商loongson、Ingenic -- RISC-V:如芯片制造商Hifive、Kendryte +- RISC-V:如芯片制造商Hifive、Kendryte、[芯来Nuclei](https://nucleisys.com/) - ARC:如芯片制造商SYNOPSYS -- Gitee From 3b20282e13ec4d369238141f9bf980f38a742e1f Mon Sep 17 00:00:00 2001 From: xupenghu_huaweipc Date: Mon, 20 Apr 2020 19:20:56 +0800 Subject: [PATCH 11/54] add bsp/stm32l010rb-nucleo, fix some pr suggest. --- .travis.yml | 1 + bsp/stm32/stm32l010-st-nucleo/README.md | 2 +- bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.travis.yml b/.travis.yml index 82421e993c..8b4f03006a 100644 --- a/.travis.yml +++ b/.travis.yml @@ -107,6 +107,7 @@ env: - RTT_BSP='stm32/stm32h743-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32h747-st-discovery' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l4r9-st-eval' RTT_TOOL_CHAIN='sourcery-arm' + - RTT_BSP='stm32/stm32l010-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l053-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l432-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l475-atk-pandora' RTT_TOOL_CHAIN='sourcery-arm' diff --git a/bsp/stm32/stm32l010-st-nucleo/README.md b/bsp/stm32/stm32l010-st-nucleo/README.md index 6b8613bb36..c69bbe14fa 100644 --- a/bsp/stm32/stm32l010-st-nucleo/README.md +++ b/bsp/stm32/stm32l010-st-nucleo/README.md @@ -29,7 +29,7 @@ NUCLEO-L010RB 开发板是 ST 官方推出的一款基于 ARM Cortex-M0+ 内核 - 20KB RAM - 512 byte EEPROM - 常用外设 - - LED:3个,USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄色) + - LED:3个,USB communication(LD1 双色),power LED(LD3 红色),user LED(LD2 黄色) - 按键:1个,B1(兼具唤醒功能,PC13),B2(RESET) - 常用接口:USB 支持 3 种不同接口:虚拟 COM 端口、大容量存储和调试端口;arduino 接口等 - 调试接口:标准 SWD diff --git a/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf index 24d6f5275c..1d998fe063 100644 --- a/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf +++ b/bsp/stm32/stm32l010-st-nucleo/board/linker_scripts/link.icf @@ -26,4 +26,4 @@ do not initialize { section .noinit }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; -place in RAM_region { readwrite, last block CSTACK}; \ No newline at end of file +place in RAM_region { readwrite, last block CSTACK}; -- Gitee From e822924176aadd746013b00d3d3626865e0e19ee Mon Sep 17 00:00:00 2001 From: xiangxistu Date: Tue, 21 Apr 2020 21:14:20 +0800 Subject: [PATCH 12/54] [update] support uart2 Signed-off-by: xiangxistu --- bsp/stm32/stm32f103-gizwits-gokitv21/.config | 84 +++++++++++++++---- .../CubeMX_Config/Src/stm32f1xx_hal_msp.c | 46 ++++++++++ .../stm32f103-gizwits-gokitv21/board/Kconfig | 8 ++ .../project.uvprojx | 14 ---- .../stm32f103-gizwits-gokitv21/rtconfig.h | 12 +-- 5 files changed, 125 insertions(+), 39 deletions(-) diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/.config b/bsp/stm32/stm32f103-gizwits-gokitv21/.config index aef45f1590..50885e3d05 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/.config +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/.config @@ -64,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x40002 +CONFIG_RT_VER_NUM=0x40003 CONFIG_ARCH_ARM=y CONFIG_RT_USING_CPU_FFS=y CONFIG_ARCH_ARM_CORTEX_M=y @@ -126,7 +126,6 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_MTD is not set # CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set @@ -134,15 +133,10 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set - -# -# Using Hardware Crypto drivers -# +# CONFIG_RT_USING_TOUCH is not set # CONFIG_RT_USING_HWCRYPTO is not set - -# -# Using WiFi -# +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_WIFI is not set # @@ -156,6 +150,7 @@ CONFIG_RT_USING_PIN=y # # CONFIG_RT_USING_LIBC is not set # CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_LIBC_USING_TIME is not set # # Network @@ -176,11 +171,6 @@ CONFIG_RT_USING_PIN=y # # CONFIG_RT_USING_LWIP is not set -# -# Modbus master and slave stack -# -# CONFIG_RT_USING_MODBUS is not set - # # AT commands # @@ -210,10 +200,13 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_WEBCLIENT is not set # CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set @@ -235,6 +228,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set # CONFIG_PKG_USING_ATSRV_SOCKET is not set # CONFIG_PKG_USING_WIZNET is not set @@ -247,12 +241,28 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_AZURE is not set # CONFIG_PKG_USING_TENCENT_IOTHUB is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set # CONFIG_PKG_USING_IPMSG is not set # CONFIG_PKG_USING_LSSDP is not set # CONFIG_PKG_USING_AIRKISS_OPEN is not set # CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_CMUX is not set # # security packages @@ -260,6 +270,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_MBEDTLS is not set # CONFIG_PKG_USING_libsodium is not set # CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set # # language packages @@ -274,6 +285,8 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set # # tools packages @@ -286,6 +299,12 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set # # system packages @@ -303,6 +322,11 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set # # peripheral libraries and drivers @@ -310,6 +334,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_SENSORS_DRIVERS is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_U8G2 is not set @@ -318,15 +343,33 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_SX12XX is not set # CONFIG_PKG_USING_SIGNAL_LED is not set # CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_INFRARED is not set # CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set # CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set # # miscellaneous packages @@ -337,12 +380,15 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set # CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set # # samples: kernel and components samples @@ -354,6 +400,12 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_HELLO is not set # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_UKAL is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32F1=y @@ -372,8 +424,10 @@ CONFIG_SOC_STM32F103C8=y CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y +CONFIG_BSP_USING_UART2=y # CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_I2C1 is not set +# CONFIG_BSP_USING_UDID is not set # # Board extended module Drivers diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c b/bsp/stm32/stm32f103-gizwits-gokitv21/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c index 99fed4303e..12171ceb42 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c @@ -117,6 +117,34 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) /* USER CODE END USART1_MspInit 1 */ } + + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLUP; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } } @@ -146,6 +174,24 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) /* USER CODE END USART1_MspDeInit 1 */ } + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } } diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/board/Kconfig b/bsp/stm32/stm32f103-gizwits-gokitv21/board/Kconfig index 63948e6b26..63afb79a2f 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/board/Kconfig +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/board/Kconfig @@ -31,6 +31,14 @@ menu "On-chip Peripheral Drivers" bool "Enable UART1 RX DMA" depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA default n + config BSP_USING_UART2 + bool "Enable UART2" + default n + + config BSP_UART1_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n endif menuconfig BSP_USING_SPI diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/project.uvprojx b/bsp/stm32/stm32f103-gizwits-gokitv21/project.uvprojx index abce08c317..45218d9445 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/project.uvprojx +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/project.uvprojx @@ -392,13 +392,6 @@ ..\..\..\src\components.c - - - cpu.c - 1 - ..\..\..\src\cpu.c - - device.c @@ -732,13 +725,6 @@ ..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c - - - stm32f1xx_hal_sram.c - 1 - ..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c - - stm32f1xx_hal_gpio.c diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.h b/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.h index 27752e4b61..4c0dc473f8 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.h +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.h @@ -39,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x40002 +#define RT_VER_NUM 0x40003 #define ARCH_ARM #define RT_USING_CPU_FFS #define ARCH_ARM_CORTEX_M @@ -82,12 +82,6 @@ #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN -/* Using Hardware Crypto drivers */ - - -/* Using WiFi */ - - /* Using USB */ @@ -105,9 +99,6 @@ /* light weight TCP/IP stack */ -/* Modbus master and slave stack */ - - /* AT commands */ @@ -170,6 +161,7 @@ #define BSP_USING_GPIO #define BSP_USING_UART #define BSP_USING_UART1 +#define BSP_USING_UART2 /* Board extended module Drivers */ -- Gitee From e1bd3673fd428ffbfd04d2f51a1a9be6fbfe832d Mon Sep 17 00:00:00 2001 From: luhuadong Date: Wed, 22 Apr 2020 16:58:10 +0800 Subject: [PATCH 13/54] [AT32 BSP] do bsp special dist handle --- bsp/at32/at32f403a-start/Kconfig | 3 +-- bsp/at32/at32f403a-start/rtconfig.py | 7 +++++++ bsp/at32/tools/sdk_dist.py | 19 +++++++++++++++++++ tools/mkdist.py | 18 ------------------ 4 files changed, 27 insertions(+), 20 deletions(-) create mode 100644 bsp/at32/tools/sdk_dist.py diff --git a/bsp/at32/at32f403a-start/Kconfig b/bsp/at32/at32f403a-start/Kconfig index 7a400db91f..1a3b4b75bc 100644 --- a/bsp/at32/at32f403a-start/Kconfig +++ b/bsp/at32/at32f403a-start/Kconfig @@ -17,6 +17,5 @@ config PKGS_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" -source "../libraries/Kconfig" +source "../Libraries/Kconfig" source "board/Kconfig" - diff --git a/bsp/at32/at32f403a-start/rtconfig.py b/bsp/at32/at32f403a-start/rtconfig.py index 4800f9a871..5f2f01ca76 100644 --- a/bsp/at32/at32f403a-start/rtconfig.py +++ b/bsp/at32/at32f403a-start/rtconfig.py @@ -1,4 +1,5 @@ import os +import sys # toolchains options ARCH='arm' @@ -141,3 +142,9 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/at32/tools/sdk_dist.py b/bsp/at32/tools/sdk_dist.py new file mode 100644 index 0000000000..01ff930b20 --- /dev/null +++ b/bsp/at32/tools/sdk_dist.py @@ -0,0 +1,19 @@ +import os +import sys +import shutil +cwd_path = os.getcwd() +sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) + +# BSP dist function +def dist_do_building(BSP_ROOT): + from mkdist import bsp_copy_files + import rtconfig + + dist_dir = os.path.join(BSP_ROOT, 'dist', os.path.basename(BSP_ROOT)) + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') + library_dir = os.path.join(dist_dir, 'Libraries') + print("=> copy bsp drivers") + bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers')) + print("=> copy bsp library") + bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE), os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE)) + shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) diff --git a/tools/mkdist.py b/tools/mkdist.py index 2f12ad8f12..d83020f755 100644 --- a/tools/mkdist.py +++ b/tools/mkdist.py @@ -214,15 +214,6 @@ def MkDist_Strip(program, BSP_ROOT, RTT_ROOT, Env): bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) - # copy at32 bsp libiary files - if os.path.basename(os.path.dirname(BSP_ROOT)) == 'at32': - print("=> copy at32 bsp library") - library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') - library_dir = os.path.join(dist_dir, 'Libraries') - bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers')) - bsp_copy_files(os.path.join(library_path, 'AT32_Std_Driver'), os.path.join(library_dir, 'AT32_Std_Driver')) - shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) - # do bsp special dist handle if 'dist_handle' in Env: print("=> start dist handle") @@ -354,15 +345,6 @@ def MkDist(program, BSP_ROOT, RTT_ROOT, Env, rttide = None): bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) - # copy at32 bsp libiary files - if os.path.basename(os.path.dirname(BSP_ROOT)) == 'at32': - print("=> copy at32 bsp library") - library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') - library_dir = os.path.join(dist_dir, 'Libraries') - bsp_copy_files(os.path.join(library_path, 'rt_drivers'), os.path.join(library_dir, 'rt_drivers')) - bsp_copy_files(os.path.join(library_path, 'AT32_Std_Driver'), os.path.join(library_dir, 'AT32_Std_Driver')) - shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) - # copy nuclei bsp libiary files if os.path.basename(os.path.dirname(BSP_ROOT)) == 'nuclei': print("=> copy nuclei bsp library") -- Gitee From ef00e50ad5603573346a3a1ba8497550af66a26a Mon Sep 17 00:00:00 2001 From: yangjie Date: Thu, 23 Apr 2020 16:21:01 +0800 Subject: [PATCH 14/54] =?UTF-8?q?[bsp][stm32l475-atk-pandora]=E5=B0=86SPI3?= =?UTF-8?q?=E9=85=8D=E7=BD=AE=E4=B8=BA=20transmit=20only=20master=20?= =?UTF-8?q?=E6=A8=A1=E5=BC=8F=EF=BC=8C=E9=98=B2=E6=AD=A2LCD=E6=A8=A1?= =?UTF-8?q?=E5=9D=97=E4=BD=BF=E7=94=A8=E7=9A=84PIN=E8=84=9A=E8=A2=ABSPI3?= =?UTF-8?q?=5FMISO=E5=8D=A0=E7=94=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../board/CubeMX_Config/.mxproject | 8 +- .../board/CubeMX_Config/STM32L475VE.ioc | 655 +++++++++--------- .../CubeMX_Config/Src/stm32l4xx_hal_msp.c | 6 +- 3 files changed, 332 insertions(+), 337 deletions(-) diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/.mxproject index b2abade8d0..f56464c131 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/.mxproject @@ -1,14 +1,14 @@ [PreviousGenFiles] -HeaderPath=E:/1-thread-source/rt-thread-h/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Inc +HeaderPath=E:/1-thread-source/rt-thread_f/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Inc HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; -SourcePath=E:/1-thread-source/rt-thread-h/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src +SourcePath=E:/1-thread-source/rt-thread_f/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c; +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;..\\Src/system_stm32l4xx.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;..\\Src/system_stm32l4xx.c;..\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; +SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;..\\Src/system_stm32l4xx.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;..\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;..\\Src/system_stm32l4xx.c;..\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; CDefines=USE_HAL_DRIVER;STM32L475xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc index 13064b21c0..5b1083a232 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc @@ -1,366 +1,363 @@ #MicroXplorer Configuration settings - do not modify -ADC1.Channel-15\#ChannelRegularConversion=ADC_CHANNEL_14 -ADC1.IPParameters=Rank-15\#ChannelRegularConversion,Channel-15\#ChannelRegularConversion,SamplingTime-15\#ChannelRegularConversion,OffsetNumber-15\#ChannelRegularConversion,NbrOfConversionFlag,master -ADC1.NbrOfConversionFlag=1 -ADC1.OffsetNumber-15\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.Rank-15\#ChannelRegularConversion=1 -ADC1.SamplingTime-15\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 -ADC1.master=1 -File.Version=6 -KeepUserPlacement=false Mcu.Family=STM32L4 -Mcu.IP0=ADC1 -Mcu.IP1=IWDG -Mcu.IP10=SPI2 -Mcu.IP11=SPI3 -Mcu.IP12=SYS -Mcu.IP13=TIM1 -Mcu.IP14=TIM2 -Mcu.IP15=TIM4 -Mcu.IP16=TIM15 -Mcu.IP17=TIM16 -Mcu.IP18=TIM17 -Mcu.IP19=USART1 -Mcu.IP2=LPTIM1 -Mcu.IP20=USART2 -Mcu.IP21=USB_OTG_FS -Mcu.IP3=NVIC +ProjectManager.MainLocation=Src +PA6.Mode=Full_Duplex_Master +SH.S_TIM4_CH2.ConfNb=1 +RCC.USART1Freq_Value=80000000 +RCC.SAI1Freq_Value=13714285.714285715 +USART2.IPParameters=VirtualMode-Asynchronous +RCC.CortexFreq_Value=80000000 +SPI3.Direction=SPI_DIRECTION_2LINES +VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer +SPI3.VirtualType=VM_MASTER +ProjectManager.KeepUserCode=true +Mcu.UserName=STM32L475VETx +SPI1.VirtualType=VM_MASTER +SPI2.VirtualType=VM_MASTER +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +TIM1.IPParameters=Channel-PWM Generation1 CH1 +PC10.Signal=SDMMC1_D2 +PC12.Signal=SDMMC1_CK +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +RCC.PLLSAI1RoutputFreq_Value=48000000 +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_ADC1_Init-ADC1-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true,11-MX_TIM17_Init-TIM17-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_TIM15_Init-TIM15-false-HAL-true,14-MX_TIM4_Init-TIM4-false-HAL-true,15-MX_TIM1_Init-TIM1-false-HAL-true,16-MX_SAI1_Init-SAI1-false-HAL-true,17-MX_SPI3_Init-SPI3-false-HAL-true,18-MX_TIM2_Init-TIM2-false-HAL-true,19-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true +SAI1.VirtualProtocol-SAI_A_BASIC=VM_BASIC_PROTOCOL +VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled +SAI1.Instance-SAI_A_MasterWithClock=SAI$Index_Block_A +PA11.Mode=Device_Only +RCC.RTCFreq_Value=32768 +RCC.USART2Freq_Value=80000000 +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +SH.S_TIM1_CH1.ConfNb=1 +USART1.IPParameters=VirtualMode-Asynchronous +PB11.Signal=S_TIM2_CH4 +PB13.Signal=SPI2_SCK +PB15.Signal=SPI2_MOSI +PinOutPanel.RotationAngle=0 +RCC.MCO1PinFreq_Value=80000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +ProjectManager.StackSize=0x400 +PB3\ (JTDO-TRACESWO).Signal=SPI3_SCK +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK +RCC.I2C3Freq_Value=80000000 +RCC.LPTIM1Freq_Value=80000000 Mcu.IP4=QUADSPI Mcu.IP5=RCC -Mcu.IP6=RTC -Mcu.IP7=SAI1 -Mcu.IP8=SDMMC1 -Mcu.IP9=SPI1 +RCC.FCLKCortexFreq_Value=80000000 +Mcu.IP2=LPTIM1 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +Mcu.IP3=NVIC +Mcu.IP0=ADC1 +Mcu.IP1=IWDG +PA12.Signal=USB_OTG_FS_DP +Mcu.UserConstants= +PE11.Mode=Single Bank +RCC.VCOSAI1OutputFreq_Value=96000000 +SAI1.VirtualMode-SAI_B_SyncSlave=VM_SLAVE +RCC.SDMMCFreq_Value=48000000 +Mcu.ThirdPartyNb=0 +SPI1.Direction=SPI_DIRECTION_2LINES +RCC.HCLKFreq_Value=80000000 +PE2.Mode=SAI_A_MasterWithClock Mcu.IPNb=22 -Mcu.Name=STM32L475V(C-E-G)Tx -Mcu.Package=LQFP100 +TIM2.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 +ProjectManager.PreviousToolchain= +RCC.APB2TimFreq_Value=80000000 +VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC.Signal=SAI1_VP_$IpInstance_SAIB_SAI_BASIC +SPI1.CalculateBaudRate=40.0 MBits/s +Mcu.Pin6=PC15-OSC32_OUT (PC15) +RCC.SAI2Freq_Value=13714285.714285715 +Mcu.Pin7=PH0-OSC_IN (PH0) +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +Mcu.Pin8=PH1-OSC_OUT (PH1) +PE5.Signal=SAI1_SCK_A +Mcu.Pin9=PA2 +RCC.AHBFreq_Value=80000000 +PB13.Locked=true Mcu.Pin0=PE2 +PE14.Locked=true Mcu.Pin1=PE3 -Mcu.Pin10=PA3 -Mcu.Pin11=PA5 -Mcu.Pin12=PA6 -Mcu.Pin13=PA7 -Mcu.Pin14=PC5 -Mcu.Pin15=PE9 -Mcu.Pin16=PE10 -Mcu.Pin17=PE11 -Mcu.Pin18=PE12 -Mcu.Pin19=PE13 Mcu.Pin2=PE4 -Mcu.Pin20=PE14 -Mcu.Pin21=PE15 -Mcu.Pin22=PB10 -Mcu.Pin23=PB11 -Mcu.Pin24=PB13 -Mcu.Pin25=PB14 -Mcu.Pin26=PB15 -Mcu.Pin27=PC8 -Mcu.Pin28=PC9 -Mcu.Pin29=PA9 Mcu.Pin3=PE5 -Mcu.Pin30=PA10 -Mcu.Pin31=PA11 -Mcu.Pin32=PA12 -Mcu.Pin33=PA13 (JTMS-SWDIO) -Mcu.Pin34=PA14 (JTCK-SWCLK) -Mcu.Pin35=PC10 -Mcu.Pin36=PC11 -Mcu.Pin37=PC12 -Mcu.Pin38=PD2 -Mcu.Pin39=PB3 (JTDO-TRACESWO) +RCC.USART3Freq_Value=80000000 Mcu.Pin4=PE6 -Mcu.Pin40=PB4 (NJTRST) -Mcu.Pin41=PB5 -Mcu.Pin42=PB7 -Mcu.Pin43=PB8 -Mcu.Pin44=VP_IWDG_VS_IWDG -Mcu.Pin45=VP_LPTIM1_VS_LPTIM_counterModeInternalClock -Mcu.Pin46=VP_RTC_VS_RTC_Activate -Mcu.Pin47=VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC -Mcu.Pin48=VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC -Mcu.Pin49=VP_SYS_VS_Systick Mcu.Pin5=PC14-OSC32_IN (PC14) -Mcu.Pin50=VP_TIM1_VS_ClockSourceINT -Mcu.Pin51=VP_TIM2_VS_ClockSourceINT -Mcu.Pin52=VP_TIM4_VS_ClockSourceINT -Mcu.Pin53=VP_TIM15_VS_ClockSourceINT -Mcu.Pin54=VP_TIM16_VS_ClockSourceINT -Mcu.Pin55=VP_TIM17_VS_ClockSourceINT -Mcu.Pin6=PC15-OSC32_OUT (PC15) -Mcu.Pin7=PH0-OSC_IN (PH0) -Mcu.Pin8=PH1-OSC_OUT (PH1) -Mcu.Pin9=PA2 -Mcu.PinsNb=56 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32L475VETx -MxCube.Version=5.6.0 -MxDb.Version=DB.5.0.60 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +ProjectManager.ProjectBuild=false +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +RCC.HSE_VALUE=8000000 +TIM4.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.ForceEnableDMAVector=true -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +SH.ADCx_IN14.ConfNb=1 +Mcu.IP10=SPI2 +USART2.VirtualMode-Asynchronous=VM_ASYNC NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -PA10.Mode=Asynchronous -PA10.Signal=USART1_RX -PA11.Mode=Device_Only -PA11.Signal=USB_OTG_FS_DM -PA12.Mode=Device_Only -PA12.Signal=USB_OTG_FS_DP -PA13\ (JTMS-SWDIO).Mode=Serial_Wire -PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO -PA14\ (JTCK-SWCLK).Mode=Serial_Wire -PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK -PA2.Mode=Asynchronous -PA2.Signal=USART2_TX -PA3.Mode=Asynchronous -PA3.Signal=USART2_RX -PA5.Mode=Full_Duplex_Master -PA5.Signal=SPI1_SCK -PA6.Mode=Full_Duplex_Master -PA6.Signal=SPI1_MISO -PA7.Mode=Full_Duplex_Master -PA7.Signal=SPI1_MOSI -PA9.Mode=Asynchronous -PA9.Signal=USART1_TX -PB10.Signal=S_TIM2_CH3 -PB11.Signal=S_TIM2_CH4 -PB13.Locked=true -PB13.Mode=Full_Duplex_Master -PB13.Signal=SPI2_SCK -PB14.Locked=true +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +Mcu.IP12=SYS +Mcu.IP11=SPI3 +ADC1.OffsetNumber-15\#ChannelRegularConversion=ADC_OFFSET_NONE +Mcu.IP18=TIM17 +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 +Mcu.IP17=TIM16 +MxDb.Version=DB.5.0.60 +PE15.Locked=true +Mcu.IP19=USART1 +Mcu.IP14=TIM2 +Mcu.IP13=TIM1 +PE13.Signal=QUADSPI_BK1_IO1 +Mcu.IP16=TIM15 +ProjectManager.BackupPrevious=false +Mcu.IP15=TIM4 +RCC.VCOInputFreq_Value=8000000 +TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +PE9.Signal=S_TIM1_CH1 PB14.Mode=Full_Duplex_Master -PB14.Signal=SPI2_MISO -PB15.Locked=true -PB15.Mode=Full_Duplex_Master -PB15.Signal=SPI2_MOSI -PB3\ (JTDO-TRACESWO).Locked=true -PB3\ (JTDO-TRACESWO).Mode=Full_Duplex_Master -PB3\ (JTDO-TRACESWO).Signal=SPI3_SCK -PB4\ (NJTRST).Mode=Full_Duplex_Master -PB4\ (NJTRST).Signal=SPI3_MISO -PB5.Locked=true -PB5.Mode=Full_Duplex_Master -PB5.Signal=SPI3_MOSI -PB7.Locked=true +PB5.Mode=TX_Only_Simplex_Unidirect_Master +File.Version=6 +PC9.Mode=SD_4_bits_Wide_bus +SPI2.CalculateBaudRate=40.0 MBits/s +SAI1.InitProtocol-SAI_A_MasterWithClock=Enable +SH.S_TIM4_CH2.0=TIM4_CH2,PWM Generation2 CH2 +PE2.Signal=SAI1_MCLK_A PB7.Signal=S_TIM4_CH2 +Mcu.IP21=USB_OTG_FS PB8.Locked=true -PB8.Signal=S_TIM4_CH3 -PC10.Mode=SD_4_bits_Wide_bus -PC10.Signal=SDMMC1_D2 -PC11.Mode=SD_4_bits_Wide_bus -PC11.Signal=SDMMC1_D3 -PC12.Mode=SD_4_bits_Wide_bus -PC12.Signal=SDMMC1_CK -PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator -PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN -PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator -PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT -PC5.Signal=ADCx_IN14 -PC8.Mode=SD_4_bits_Wide_bus -PC8.Signal=SDMMC1_D0 -PC9.Mode=SD_4_bits_Wide_bus -PC9.Signal=SDMMC1_D1 -PD2.Mode=SD_4_bits_Wide_bus -PD2.Signal=SDMMC1_CMD -PE10.Mode=Single Bank -PE10.Signal=QUADSPI_CLK -PE11.Mode=Single Bank -PE11.Signal=QUADSPI_NCS -PE12.Locked=true -PE12.Mode=Single Bank -PE12.Signal=QUADSPI_BK1_IO0 -PE13.Locked=true +Mcu.IP20=USART2 +RCC.PLLRCLKFreq_Value=80000000 PE13.Mode=Single Bank -PE13.Signal=QUADSPI_BK1_IO1 -PE14.Locked=true -PE14.Mode=Single Bank -PE14.Signal=QUADSPI_BK1_IO2 -PE15.Locked=true -PE15.Mode=Single Bank -PE15.Signal=QUADSPI_BK1_IO3 -PE2.Mode=SAI_A_MasterWithClock -PE2.Signal=SAI1_MCLK_A -PE3.Mode=SAI_B_SyncSlave -PE3.Signal=SAI1_SD_B +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false PE4.Mode=SAI_A_MasterWithClock +ADC1.Channel-15\#ChannelRegularConversion=ADC_CHANNEL_14 PE4.Signal=SAI1_FS_A -PE5.Mode=SAI_A_MasterWithClock -PE5.Signal=SAI1_SCK_A -PE6.Mode=SAI_A_MasterWithClock -PE6.Signal=SAI1_SD_A -PE9.Signal=S_TIM1_CH1 -PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator -PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN -PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator -PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT -PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=true -ProjectManager.BackupPrevious=false -ProjectManager.CompilerOptimize=6 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=false -ProjectManager.CustomerFirmwarePackage= -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32L475VETx -ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 -ProjectManager.FreePins=false +PE10.Signal=QUADSPI_CLK +VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=0 -ProjectManager.MainLocation=Src -ProjectManager.NoMain=false -ProjectManager.PreviousToolchain= -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=STM32L475VE.ioc +VP_TIM1_VS_ClockSourceINT.Mode=Internal ProjectManager.ProjectName=STM32L475VE -ProjectManager.StackSize=0x400 -ProjectManager.TargetToolchain=MDK-ARM V5 +ADC1.Rank-15\#ChannelRegularConversion=1 +SAI1.OutputDrive-SAI_A_MasterWithClock=SAI_OUTPUTDRIVE_ENABLE +Mcu.Package=LQFP100 +SAI1.AudioFrequency-SAI_A_MasterWithClock=SAI_AUDIO_FREQUENCY_44K +PA6.Signal=SPI1_MISO +SPI2.Mode=SPI_MODE_MASTER +SPI3.Mode=SPI_MODE_MASTER +SH.ADCx_IN14.0=ADC1_IN14,IN14-Single-Ended +NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true ProjectManager.ToolChainLocation= -ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_ADC1_Init-ADC1-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true,11-MX_TIM17_Init-TIM17-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_TIM15_Init-TIM15-false-HAL-true,14-MX_TIM4_Init-TIM4-false-HAL-true,15-MX_TIM1_Init-TIM1-false-HAL-true,16-MX_SAI1_Init-SAI1-false-HAL-true,17-MX_SPI3_Init-SPI3-false-HAL-true,18-MX_TIM2_Init-TIM2-false-HAL-true,19-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true -RCC.ADCFreq_Value=48000000 -RCC.AHBFreq_Value=80000000 -RCC.APB1Freq_Value=80000000 -RCC.APB1TimFreq_Value=80000000 -RCC.APB2Freq_Value=80000000 -RCC.APB2TimFreq_Value=80000000 -RCC.CortexFreq_Value=80000000 -RCC.DFSDMFreq_Value=80000000 -RCC.FCLKCortexFreq_Value=80000000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=80000000 -RCC.HSE_VALUE=8000000 -RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=80000000 -RCC.I2C2Freq_Value=80000000 -RCC.I2C3Freq_Value=80000000 -RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value -RCC.LPTIM1Freq_Value=80000000 -RCC.LPTIM2Freq_Value=80000000 -RCC.LPUART1Freq_Value=80000000 -RCC.LSCOPinFreq_Value=32000 RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=80000000 -RCC.MSI_VALUE=4000000 -RCC.PLLN=20 +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00 +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +RCC.LSCOPinFreq_Value=32000 +PA10.Signal=USART1_RX +USB_OTG_FS.VirtualMode=Device_Only +RCC.DFSDMFreq_Value=80000000 +PC11.Mode=SD_4_bits_Wide_bus +ADC1.SamplingTime-15\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 RCC.PLLPoutputFreq_Value=22857142.85714286 -RCC.PLLQoutputFreq_Value=80000000 -RCC.PLLRCLKFreq_Value=80000000 +RCC.APB1TimFreq_Value=80000000 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +RCC.LPUART1Freq_Value=80000000 +SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI2.Direction=SPI_DIRECTION_2LINES +PC5.Signal=ADCx_IN14 +USB_OTG_FS.IPParameters=VirtualMode +PB13.Mode=Full_Duplex_Master +SH.S_TIM2_CH4.ConfNb=1 +PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PE12.Locked=true +PE3.Mode=SAI_B_SyncSlave +ProjectManager.CustomerFirmwarePackage= +PB15.Locked=true +PB3\ (JTDO-TRACESWO).Locked=true RCC.PLLSAI1N=12 -RCC.PLLSAI1PoutputFreq_Value=13714285.714285715 -RCC.PLLSAI1QoutputFreq_Value=48000000 -RCC.PLLSAI1RoutputFreq_Value=48000000 -RCC.PLLSAI2PoutputFreq_Value=9142857.142857144 -RCC.PLLSAI2RoutputFreq_Value=32000000 +PA3.Signal=USART2_RX +PA5.Mode=Full_Duplex_Master +PE12.Mode=Single Bank +VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate +RCC.MSI_VALUE=4000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.PWRFreq_Value=80000000 -RCC.RNGFreq_Value=48000000 -RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE -RCC.RTCFreq_Value=32768 -RCC.SAI1Freq_Value=13714285.714285715 -RCC.SAI2Freq_Value=13714285.714285715 -RCC.SDMMCFreq_Value=48000000 +PA14\ (JTCK-SWCLK).Mode=Serial_Wire +RCC.PLLQoutputFreq_Value=80000000 +ProjectManager.ProjectFileName=STM32L475VE.ioc +TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 +PA7.Mode=Full_Duplex_Master +PA10.Mode=Asynchronous +Mcu.PinsNb=55 +VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Mode=SAI_A_BASIC +ProjectManager.NoMain=false +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +ADC1.IPParameters=Rank-15\#ChannelRegularConversion,Channel-15\#ChannelRegularConversion,SamplingTime-15\#ChannelRegularConversion,OffsetNumber-15\#ChannelRegularConversion,NbrOfConversionFlag,master +SAI1.MClockEnable-SAI_A_MasterWithClock=SAI_MASTERCLOCK_ENABLE +PC11.Signal=SDMMC1_D3 RCC.SWPMI1Freq_Value=80000000 -RCC.SYSCLKFreq_VALUE=80000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=80000000 -RCC.UART5Freq_Value=80000000 -RCC.USART1Freq_Value=80000000 -RCC.USART2Freq_Value=80000000 -RCC.USART3Freq_Value=80000000 -RCC.USBFreq_Value=48000000 -RCC.VCOInputFreq_Value=8000000 -RCC.VCOOutputFreq_Value=160000000 -RCC.VCOSAI1OutputFreq_Value=96000000 -RCC.VCOSAI2OutputFreq_Value=64000000 -SAI1.AudioFrequency-SAI_A_MasterWithClock=SAI_AUDIO_FREQUENCY_44K +PC8.Signal=SDMMC1_D0 +PE10.Mode=Single Bank +PC10.Mode=SD_4_bits_Wide_bus +VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Signal=SAI1_VP_$IpInstance_SAIA_SAI_BASIC +ProjectManager.DefaultFWLocation=true SAI1.ErrorAudioFreq-SAI_A_MasterWithClock=-72.09 % -SAI1.IPParameters=Instance-SAI_A_MasterWithClock,VirtualMode-SAI_A_MasterWithClock,MClockEnable-SAI_A_MasterWithClock,RealAudioFreq-SAI_A_MasterWithClock,ErrorAudioFreq-SAI_A_MasterWithClock,InitProtocol-SAI_A_MasterWithClock,VirtualProtocol-SAI_A_BASIC,AudioFrequency-SAI_A_MasterWithClock,OutputDrive-SAI_A_MasterWithClock,Instance-SAI_B_SyncSlave,VirtualMode-SAI_B_SyncSlave,InitProtocol-SAI_B_SyncSlave,VirtualProtocol-SAI_B_BASIC -SAI1.InitProtocol-SAI_A_MasterWithClock=Enable -SAI1.InitProtocol-SAI_B_SyncSlave=Enable -SAI1.Instance-SAI_A_MasterWithClock=SAI$Index_Block_A -SAI1.Instance-SAI_B_SyncSlave=SAI$Index_Block_B -SAI1.MClockEnable-SAI_A_MasterWithClock=SAI_MASTERCLOCK_ENABLE -SAI1.OutputDrive-SAI_A_MasterWithClock=SAI_OUTPUTDRIVE_ENABLE +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer +ProjectManager.DeletePrevious=true +PB14.Locked=true +RCC.VCOSAI2OutputFreq_Value=64000000 +VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT +RCC.FamilyName=M +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +USART1.VirtualMode-Asynchronous=VM_ASYNC +PA3.Mode=Asynchronous SAI1.RealAudioFreq-SAI_A_MasterWithClock=53.571 KHz -SAI1.VirtualMode-SAI_A_MasterWithClock=VM_MASTER -SAI1.VirtualMode-SAI_B_SyncSlave=VM_SLAVE -SAI1.VirtualProtocol-SAI_A_BASIC=VM_BASIC_PROTOCOL -SAI1.VirtualProtocol-SAI_B_BASIC=VM_BASIC_PROTOCOL -SH.ADCx_IN14.0=ADC1_IN14,IN14-Single-Ended -SH.ADCx_IN14.ConfNb=1 +PA9.Mode=Asynchronous SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 -SH.S_TIM1_CH1.ConfNb=1 -SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3 -SH.S_TIM2_CH3.ConfNb=1 -SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4 -SH.S_TIM2_CH4.ConfNb=1 -SH.S_TIM4_CH2.0=TIM4_CH2,PWM Generation2 CH2 -SH.S_TIM4_CH2.ConfNb=1 +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT +ProjectManager.TargetToolchain=MDK-ARM V5 +TIM4.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation2 CH2 +Mcu.Pin51=VP_TIM4_VS_ClockSourceINT +Mcu.Pin52=VP_TIM15_VS_ClockSourceINT +Mcu.Pin50=VP_TIM2_VS_ClockSourceINT SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3 -SH.S_TIM4_CH3.ConfNb=1 -SPI1.CalculateBaudRate=40.0 MBits/s -SPI1.Direction=SPI_DIRECTION_2LINES -SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate -SPI1.Mode=SPI_MODE_MASTER -SPI1.VirtualType=VM_MASTER -SPI2.CalculateBaudRate=40.0 MBits/s -SPI2.Direction=SPI_DIRECTION_2LINES +Mcu.Pin53=VP_TIM16_VS_ClockSourceINT +Mcu.Pin54=VP_TIM17_VS_ClockSourceINT +PA9.Signal=USART1_TX +VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT +PB5.Locked=true SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate -SPI2.Mode=SPI_MODE_MASTER -SPI2.VirtualType=VM_MASTER +RCC.USBFreq_Value=48000000 +PE11.Signal=QUADSPI_NCS +Mcu.Pin48=VP_SYS_VS_Systick +Mcu.Pin49=VP_TIM1_VS_ClockSourceINT +RCC.PLLSAI1PoutputFreq_Value=13714285.714285715 +Mcu.Pin46=VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC +Mcu.Pin47=VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC +PB10.Signal=S_TIM2_CH3 +SAI1.VirtualMode-SAI_A_MasterWithClock=VM_MASTER +SH.S_TIM4_CH3.ConfNb=1 +VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC.Mode=SAI_B_BASIC +PB14.Signal=SPI2_MISO +PD2.Mode=SD_4_bits_Wide_bus +RCC.PLLSAI2RoutputFreq_Value=32000000 +PA5.Signal=SPI1_SCK +Mcu.Pin40=PB5 +Mcu.Pin41=PB7 +PC12.Mode=SD_4_bits_Wide_bus +Mcu.Pin44=VP_LPTIM1_VS_LPTIM_counterModeInternalClock +Mcu.Pin45=VP_RTC_VS_RTC_Activate +Mcu.Pin42=PB8 +board=custom +Mcu.Pin43=VP_IWDG_VS_IWDG +SAI1.IPParameters=Instance-SAI_A_MasterWithClock,VirtualMode-SAI_A_MasterWithClock,MClockEnable-SAI_A_MasterWithClock,RealAudioFreq-SAI_A_MasterWithClock,ErrorAudioFreq-SAI_A_MasterWithClock,InitProtocol-SAI_A_MasterWithClock,VirtualProtocol-SAI_A_BASIC,AudioFrequency-SAI_A_MasterWithClock,OutputDrive-SAI_A_MasterWithClock,Instance-SAI_B_SyncSlave,VirtualMode-SAI_B_SyncSlave,InitProtocol-SAI_B_SyncSlave,VirtualProtocol-SAI_B_BASIC +RCC.VCOOutputFreq_Value=160000000 +ProjectManager.LastFirmware=true +PB15.Mode=Full_Duplex_Master +TIM4.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +RCC.APB2Freq_Value=80000000 +PE14.Signal=QUADSPI_BK1_IO2 +RCC.UART4Freq_Value=80000000 SPI3.CalculateBaudRate=40.0 MBits/s -SPI3.Direction=SPI_DIRECTION_2LINES -SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate -SPI3.Mode=SPI_MODE_MASTER -SPI3.VirtualType=VM_MASTER -TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 -TIM1.IPParameters=Channel-PWM Generation1 CH1 +PE6.Mode=SAI_A_MasterWithClock +PE15.Signal=QUADSPI_BK1_IO3 +MxCube.Version=5.6.0 +Mcu.Pin37=PC12 +Mcu.Pin38=PD2 +Mcu.Pin35=PC10 +VP_TIM2_VS_ClockSourceINT.Mode=Internal +RCC.I2C1Freq_Value=80000000 +SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3 +Mcu.Pin36=PC11 +SPI1.Mode=SPI_MODE_MASTER +Mcu.Pin39=PB3 (JTDO-TRACESWO) +PE14.Mode=Single Bank +PB3\ (JTDO-TRACESWO).Mode=TX_Only_Simplex_Unidirect_Master +RCC.RNGFreq_Value=48000000 +PE5.Mode=SAI_A_MasterWithClock +RCC.PLLSAI1QoutputFreq_Value=48000000 +Mcu.Pin30=PA10 +RCC.ADCFreq_Value=48000000 +VP_SYS_VS_Systick.Mode=SysTick TIM2.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 -TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 -TIM2.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 -TIM4.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 -TIM4.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 -TIM4.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation2 CH2 -USART1.IPParameters=VirtualMode-Asynchronous -USART1.VirtualMode-Asynchronous=VM_ASYNC -USART2.IPParameters=VirtualMode-Asynchronous -USART2.VirtualMode-Asynchronous=VM_ASYNC -USB_OTG_FS.IPParameters=VirtualMode -USB_OTG_FS.VirtualMode=Device_Only -VP_IWDG_VS_IWDG.Mode=IWDG_Activate +Mcu.Pin33=PA13 (JTMS-SWDIO) +Mcu.Pin34=PA14 (JTCK-SWCLK) +Mcu.Pin31=PA11 +Mcu.Pin32=PA12 +VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +SH.S_TIM2_CH3.ConfNb=1 +PE6.Signal=SAI1_SD_A +RCC.UART5Freq_Value=80000000 +ProjectManager.FreePins=false +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value +ProjectManager.AskForMigrate=true +Mcu.Name=STM32L475V(C-E-G)Tx +RCC.LPTIM2Freq_Value=80000000 +Mcu.Pin26=PB15 +PE12.Signal=QUADSPI_BK1_IO0 +Mcu.Pin27=PC8 +PA2.Signal=USART2_TX +Mcu.Pin24=PB13 +ProjectManager.UnderRoot=false +Mcu.Pin25=PB14 +PE13.Locked=true +Mcu.IP8=SDMMC1 +Mcu.IP9=SPI1 +Mcu.Pin28=PC9 +Mcu.IP6=RTC +PC8.Mode=SD_4_bits_Wide_bus +Mcu.Pin29=PA9 +Mcu.IP7=SAI1 +ProjectManager.CoupleFile=false +PA13\ (JTMS-SWDIO).Mode=Serial_Wire +RCC.SYSCLKFreq_VALUE=80000000 +Mcu.Pin22=PB10 +PB5.Signal=SPI3_MOSI +Mcu.Pin23=PB11 +Mcu.Pin20=PE14 +ADC1.master=1 +Mcu.Pin21=PE15 +PA12.Mode=Device_Only +NVIC.ForceEnableDMAVector=true +RCC.PLLSAI2PoutputFreq_Value=9142857.142857144 +KeepUserPlacement=false +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +ProjectManager.CompilerOptimize=6 +SAI1.Instance-SAI_B_SyncSlave=SAI$Index_Block_B +PA11.Signal=USB_OTG_FS_DM VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG -VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00 -VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock -VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled -VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate -VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Mode=SAI_A_BASIC -VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC.Signal=SAI1_VP_$IpInstance_SAIA_SAI_BASIC -VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC.Mode=SAI_B_BASIC -VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC.Signal=SAI1_VP_$IpInstance_SAIB_SAI_BASIC -VP_SYS_VS_Systick.Mode=SysTick -VP_SYS_VS_Systick.Signal=SYS_VS_Systick VP_TIM15_VS_ClockSourceINT.Mode=Internal -VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT -VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer -VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT -VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer -VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT -VP_TIM1_VS_ClockSourceINT.Mode=Internal -VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT -VP_TIM2_VS_ClockSourceINT.Mode=Internal -VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +ProjectManager.HeapSize=0x200 +Mcu.Pin15=PE9 +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +Mcu.Pin16=PE10 +Mcu.Pin13=PA7 +SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4 +Mcu.Pin14=PC5 +Mcu.Pin19=PE13 +ProjectManager.ComputerToolchain=false +Mcu.Pin17=PE11 +RCC.HSI_VALUE=16000000 +Mcu.Pin18=PE12 VP_TIM4_VS_ClockSourceINT.Mode=Internal -VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT -board=custom +SAI1.VirtualProtocol-SAI_B_BASIC=VM_BASIC_PROTOCOL +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +ADC1.NbrOfConversionFlag=1 +Mcu.Pin11=PA5 +Mcu.Pin12=PA6 +RCC.PLLN=20 +Mcu.Pin10=PA3 +PB7.Locked=true +PE3.Signal=SAI1_SD_B +PA2.Mode=Asynchronous +PB8.Signal=S_TIM4_CH3 +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock +RCC.PWRFreq_Value=80000000 +PC9.Signal=SDMMC1_D1 +PD2.Signal=SDMMC1_CMD +RCC.I2C2Freq_Value=80000000 +RCC.APB1Freq_Value=80000000 +SAI1.InitProtocol-SAI_B_SyncSlave=Enable +ProjectManager.DeviceId=STM32L475VETx +ProjectManager.LibraryCopy=0 +PE15.Mode=Single Bank +PA7.Signal=SPI1_MOSI diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index 1b25bb7567..7dc7cc3ad7 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -478,10 +478,9 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) __HAL_RCC_GPIOB_CLK_ENABLE(); /**SPI3 GPIO Configuration PB3 (JTDO-TRACESWO) ------> SPI3_SCK - PB4 (NJTRST) ------> SPI3_MISO PB5 ------> SPI3_MOSI */ - GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; @@ -551,10 +550,9 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) /**SPI3 GPIO Configuration PB3 (JTDO-TRACESWO) ------> SPI3_SCK - PB4 (NJTRST) ------> SPI3_MISO PB5 ------> SPI3_MOSI */ - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5); + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_5); /* USER CODE BEGIN SPI3_MspDeInit 1 */ -- Gitee From ae724e447f951a1406f3dab75ffe84fc4a29072d Mon Sep 17 00:00:00 2001 From: luhuadong Date: Fri, 24 Apr 2020 02:46:01 +0800 Subject: [PATCH 15/54] [BSP] Add stm32l412-st-nucleo BSP --- bsp/stm32/stm32l412-st-nucleo/.config | 357 +++ bsp/stm32/stm32l412-st-nucleo/.gitignore | 42 + bsp/stm32/stm32l412-st-nucleo/Kconfig | 21 + bsp/stm32/stm32l412-st-nucleo/README.md | 116 + bsp/stm32/stm32l412-st-nucleo/SConscript | 15 + bsp/stm32/stm32l412-st-nucleo/SConstruct | 60 + .../applications/SConscript | 9 + .../stm32l412-st-nucleo/applications/main.c | 33 + .../board/CubeMX_Config/.mxproject | 14 + .../board/CubeMX_Config/CubeMX_Config.ioc | 201 ++ .../board/CubeMX_Config/Inc/main.h | 95 + .../CubeMX_Config/Inc/stm32l4xx_hal_conf.h | 450 +++ .../board/CubeMX_Config/Inc/stm32l4xx_it.h | 69 + .../board/CubeMX_Config/Src/main.c | 280 ++ .../CubeMX_Config/Src/stm32l4xx_hal_msp.c | 149 + .../board/CubeMX_Config/Src/stm32l4xx_it.c | 203 ++ .../CubeMX_Config/Src/system_stm32l4xx.c | 337 ++ bsp/stm32/stm32l412-st-nucleo/board/Kconfig | 74 + .../stm32l412-st-nucleo/board/SConscript | 39 + bsp/stm32/stm32l412-st-nucleo/board/board.c | 87 + bsp/stm32/stm32l412-st-nucleo/board/board.h | 41 + .../board/linker_scripts/link.icf | 33 + .../board/linker_scripts/link.lds | 158 + .../board/linker_scripts/link.sct | 15 + .../stm32l412-st-nucleo/figures/board.jpg | Bin 0 -> 91973 bytes bsp/stm32/stm32l412-st-nucleo/project.ewd | 2834 +++++++++++++++++ bsp/stm32/stm32l412-st-nucleo/project.ewp | 2329 ++++++++++++++ bsp/stm32/stm32l412-st-nucleo/project.eww | 10 + bsp/stm32/stm32l412-st-nucleo/project.uvoptx | 186 ++ bsp/stm32/stm32l412-st-nucleo/project.uvprojx | 893 ++++++ bsp/stm32/stm32l412-st-nucleo/rtconfig.h | 178 ++ bsp/stm32/stm32l412-st-nucleo/rtconfig.py | 144 + bsp/stm32/stm32l412-st-nucleo/template.ewp | 2031 ++++++++++++ bsp/stm32/stm32l412-st-nucleo/template.eww | 10 + bsp/stm32/stm32l412-st-nucleo/template.uvoptx | 186 ++ .../stm32l412-st-nucleo/template.uvprojx | 386 +++ 36 files changed, 12085 insertions(+) create mode 100644 bsp/stm32/stm32l412-st-nucleo/.config create mode 100644 bsp/stm32/stm32l412-st-nucleo/.gitignore create mode 100644 bsp/stm32/stm32l412-st-nucleo/Kconfig create mode 100644 bsp/stm32/stm32l412-st-nucleo/README.md create mode 100644 bsp/stm32/stm32l412-st-nucleo/SConscript create mode 100644 bsp/stm32/stm32l412-st-nucleo/SConstruct create mode 100644 bsp/stm32/stm32l412-st-nucleo/applications/SConscript create mode 100644 bsp/stm32/stm32l412-st-nucleo/applications/main.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/.mxproject create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/main.h create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/main.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/system_stm32l4xx.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/Kconfig create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/SConscript create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/board.c create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/board.h create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.icf create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.sct create mode 100644 bsp/stm32/stm32l412-st-nucleo/figures/board.jpg create mode 100644 bsp/stm32/stm32l412-st-nucleo/project.ewd create mode 100644 bsp/stm32/stm32l412-st-nucleo/project.ewp create mode 100644 bsp/stm32/stm32l412-st-nucleo/project.eww create mode 100644 bsp/stm32/stm32l412-st-nucleo/project.uvoptx create mode 100644 bsp/stm32/stm32l412-st-nucleo/project.uvprojx create mode 100644 bsp/stm32/stm32l412-st-nucleo/rtconfig.h create mode 100644 bsp/stm32/stm32l412-st-nucleo/rtconfig.py create mode 100644 bsp/stm32/stm32l412-st-nucleo/template.ewp create mode 100644 bsp/stm32/stm32l412-st-nucleo/template.eww create mode 100644 bsp/stm32/stm32l412-st-nucleo/template.uvoptx create mode 100644 bsp/stm32/stm32l412-st-nucleo/template.uvprojx diff --git a/bsp/stm32/stm32l412-st-nucleo/.config b/bsp/stm32/stm32l412-st-nucleo/.config new file mode 100644 index 0000000000..ed539bf2a8 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/.config @@ -0,0 +1,357 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=256 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" +CONFIG_RT_VER_NUM=0x40001 +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set +CONFIG_RT_USING_RTC=y +# CONFIG_RT_USING_SOFT_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +CONFIG_RT_USING_WDT=y +# CONFIG_RT_USING_AUDIO is not set + +# +# Using WiFi +# +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# Modbus master and slave stack +# +# CONFIG_RT_USING_MODBUS is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# ARM CMSIS +# +# CONFIG_RT_USING_CMSIS_OS is not set +# CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L4=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32L432KC=y + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_STLINK_TO_USART=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART2=y +# CONFIG_BSP_UART2_RX_USING_DMA is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set +# CONFIG_BSP_USING_WDT is not set + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32l412-st-nucleo/.gitignore b/bsp/stm32/stm32l412-st-nucleo/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32l412-st-nucleo/Kconfig b/bsp/stm32/stm32l412-st-nucleo/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32l412-st-nucleo/README.md b/bsp/stm32/stm32l412-st-nucleo/README.md new file mode 100644 index 0000000000..73b83e6fee --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/README.md @@ -0,0 +1,116 @@ +# NUCLEO32-L412 开发板 BSP 说明 + +## 简介 + +本文档为ST官方 NUCLEO32-L412 开发板的 BSP (板级支持包) 说明。 + +主要内容如下: + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。在进阶使用指南章节,将会介绍更多高级功能,帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +对于 NUCLEO32-L412,内核是 Cortex-M4,绿色的 Nucleo 标志显示了这款芯片是低功耗系列,板载 ST-LINK/V2-1 调试器/编程器,迷你尺寸,mirco USB 接口,可数的外设,Arduino™ nano 兼容的接口。 + +开发板外观如下图所示: + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下: + +- MCU:STM32L412RBT6P,主频 80MHz,128KB FLASH ,40KB RAM。 +- 常用外设 + - LED:4个,LD1(COM 双色),LD2(5V_USB 红色),LD3(5V_PWR 绿色),LD4(USER 绿色) + - 按键:2个,用户按键(B1),复位按键(B2) +- 常用接口:USB 支持 3 种不同接口:虚拟 COM 端口、大容量存储和调试端口。 +- 调试接口:板载 ST-LINK/V2-1 调试器。 + +开发板更多详细信息请参考【STMicroelectronics】 [NUCLEO-L412RB-P](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-l412rb-p.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下: + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | UART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART2 | +| SPI | 暂不支持 | SPI1 即将支持 | +| I2C | 暂不支持 | 软件 I2C 即将支持 | +| RTC | 支持 | 支持外部晶振和内部低速时钟 | +| PWM | 暂不支持 | 即将支持 | +| USB Device | 暂不支持 | 即将支持 | +| IWG | 支持 | 独立看门狗,未开启窗口模式 | +| **扩展模块** | **支持情况** | **备注** | + + +## 使用说明 + +使用说明分为如下两个章节: + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程,并且支持 GCC 开发环境。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC,打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序,在通过 microUSB 连接开发板的基础上,点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后,系统会自动运行,观察开发板上 LED 的运行效果,红色 LD1 和 LD2 常亮、黄色色 LD3 会周期性闪烁。 + +USB 虚拟 COM 端口默认连接串口 2,在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.0 build Jan 9 2020 + 2006 - 2020 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口2 的功能,如果需使用更多高级功能,需要利用 ENV 工具对 BSP 进行配置,步骤如下: + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程,配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 开机时如果不能打印 RT-Thread 版本信息,请将BSP中串口 GPIO 速率调低 +- 开机时如果不能打印 RT-Thread 版本信息,请重新选择 PC 端串口调试软件的串口号 + +## 联系人信息 + +维护人: + +- [luhuadong](https://github.com/luhuadong), 邮箱: \ No newline at end of file diff --git a/bsp/stm32/stm32l412-st-nucleo/SConscript b/bsp/stm32/stm32l412-st-nucleo/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32l412-st-nucleo/SConstruct b/bsp/stm32/stm32l412-st-nucleo/SConstruct new file mode 100644 index 0000000000..c4b3facad7 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32L4xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32l412-st-nucleo/applications/SConscript b/bsp/stm32/stm32l412-st-nucleo/applications/SConscript new file mode 100644 index 0000000000..4939638d41 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/applications/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [str(Dir('#')), cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32l412-st-nucleo/applications/main.c b/bsp/stm32/stm32l412-st-nucleo/applications/main.c new file mode 100644 index 0000000000..ad5174ccb7 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/applications/main.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-24 luhuadong first version + */ + +#include +#include +#include + +/* defined the LED0 pin: PB3 */ +#define LED0_PIN GET_PIN(B, 3) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..2bfa20ea63 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/.mxproject @@ -0,0 +1,14 @@ +[PreviousGenFiles] +HeaderPath=/home/rudy/workspace_hd/Projects/rt-thread/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc +HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; +SourcePath=/home/rudy/workspace_hd/Projects/rt-thread/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src +SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l412xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/mpu_armv8.h; + +[PreviousUsedIarFiles] +SourceFiles=../Src/main.c;../Src/stm32l4xx_it.c;../Src/stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..//Src/system_stm32l4xx.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;..//Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; +HeaderPath=../Drivers/STM32L4xx_HAL_Driver/Inc;../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32L4xx/Include;../Drivers/CMSIS/Include;../Inc; +CDefines=USE_HAL_DRIVER;STM32L412xx;USE_HAL_DRIVER;USE_HAL_DRIVER; + diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..4727ba50c3 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,201 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +KeepUserPlacement=false +Mcu.Family=STM32L4 +Mcu.IP0=NVIC +Mcu.IP1=RCC +Mcu.IP2=SYS +Mcu.IP3=USART2 +Mcu.IPNb=4 +Mcu.Name=STM32L412RBTxP +Mcu.Package=LQFP64 +Mcu.Pin0=PC13 +Mcu.Pin1=PC14-OSC32_IN (PC14) +Mcu.Pin10=PA7 +Mcu.Pin11=PB13 +Mcu.Pin12=PA13 (JTMS/SWDIO) +Mcu.Pin13=PA14 (JTCK/SWCLK) +Mcu.Pin14=PB3 (JTDO/TRACESWO) +Mcu.Pin15=VP_SYS_VS_Systick +Mcu.Pin2=PC15-OSC32_OUT (PC15) +Mcu.Pin3=PH0-OSC_IN (PH0) +Mcu.Pin4=PH1-OSC_OUT (PH1) +Mcu.Pin5=PA2 +Mcu.Pin6=PA3 +Mcu.Pin7=PA4 +Mcu.Pin8=PA5 +Mcu.Pin9=PA6 +Mcu.PinsNb=16 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32L412RBTxP +MxCube.Version=5.5.0 +MxDb.Version=DB.5.0.50 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +PA13\ (JTMS/SWDIO).GPIOParameters=GPIO_Label +PA13\ (JTMS/SWDIO).GPIO_Label=TMS +PA13\ (JTMS/SWDIO).Locked=true +PA13\ (JTMS/SWDIO).Mode=Serial_Wire +PA13\ (JTMS/SWDIO).Signal=SYS_JTMS-SWDIO +PA14\ (JTCK/SWCLK).GPIOParameters=GPIO_Label +PA14\ (JTCK/SWCLK).GPIO_Label=TCK +PA14\ (JTCK/SWCLK).Locked=true +PA14\ (JTCK/SWCLK).Mode=Serial_Wire +PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK +PA2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label +PA2.GPIO_Label=USART_TX +PA2.GPIO_PuPd=GPIO_NOPULL +PA2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA2.Locked=true +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label +PA3.GPIO_Label=USART_RX +PA3.GPIO_PuPd=GPIO_NOPULL +PA3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PA3.Locked=true +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA4.GPIOParameters=GPIO_Label +PA4.GPIO_Label=SMPS_EN [ADP5301ACBZ_VEN] +PA4.Locked=true +PA4.Signal=GPIO_Output +PA5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP +PA5.GPIO_Label=SMPS_V1 +PA5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP +PA5.GPIO_PuPd=GPIO_NOPULL +PA5.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PA5.Locked=true +PA5.Signal=GPIO_Output +PA6.GPIOParameters=GPIO_PuPd,GPIO_Label +PA6.GPIO_Label=SMPS_PG [ADP5301ACBZ_OUTOK] +PA6.GPIO_PuPd=GPIO_PULLUP +PA6.Locked=true +PA6.Signal=GPIO_Input +PA7.GPIOParameters=GPIO_Label +PA7.GPIO_Label=SMPS_SW [TS3A44159PWR_IN1_2] +PA7.Locked=true +PA7.Signal=GPIO_Output +PB13.GPIOParameters=GPIO_Label +PB13.GPIO_Label=LD4 [green Led] +PB13.Locked=true +PB13.Signal=GPIO_Output +PB3\ (JTDO/TRACESWO).GPIOParameters=GPIO_Label +PB3\ (JTDO/TRACESWO).GPIO_Label=SWO +PB3\ (JTDO/TRACESWO).Locked=true +PB3\ (JTDO/TRACESWO).Signal=SYS_JTDO-SWO +PC13.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI +PC13.GPIO_Label=B1 [Blue PushButton] +PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING +PC13.GPIO_PuPd=GPIO_NOPULL +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSC32_IN\ (PC14).Locked=true +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +PC15-OSC32_OUT\ (PC15).Locked=true +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PCC.Checker=false +PCC.Line=STM32L4x2 +PCC.MCU=STM32L412RBTxP +PCC.PartNumber=STM32L412RBTxP +PCC.Seq0=0 +PCC.Series=STM32L4 +PCC.Temperature=25 +PCC.Vdd=3.0 +PH0-OSC_IN\ (PH0).GPIOParameters=GPIO_Label +PH0-OSC_IN\ (PH0).GPIO_Label=MCO +PH0-OSC_IN\ (PH0).Locked=true +PH0-OSC_IN\ (PH0).Mode=HSE-External-Clock-Source +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Locked=true +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32L412RBTxP +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=EWARM V8.32 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort= +RCC.ADCFreq_Value=80000000 +RCC.AHBFreq_Value=80000000 +RCC.APB1Freq_Value=80000000 +RCC.APB1TimFreq_Value=80000000 +RCC.APB2Freq_Value=80000000 +RCC.APB2TimFreq_Value=80000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=80000000 +RCC.FCLKCortexFreq_Value=80000000 +RCC.FLatency=FLASH_LATENCY_4 +RCC.FamilyName=M +RCC.HCLKFreq_Value=80000000 +RCC.HSE_VALUE=8000000 +RCC.HSI48_VALUE=48000000 +RCC.HSICalibrationValue=16 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=80000000 +RCC.I2C2Freq_Value=80000000 +RCC.I2C3Freq_Value=80000000 +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FLatency,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSICalibrationValue,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIAutoCalibration,MSI_VALUE,PLLN,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PREFETCH_ENABLE,PWRFreq_Value,RNGFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.LPTIM1Freq_Value=80000000 +RCC.LPTIM2Freq_Value=80000000 +RCC.LPUART1Freq_Value=80000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=80000000 +RCC.MSIAutoCalibration=DISABLED +RCC.MSI_VALUE=4000000 +RCC.PLLN=40 +RCC.PLLQoutputFreq_Value=80000000 +RCC.PLLRCLKFreq_Value=80000000 +RCC.PREFETCH_ENABLE=1 +RCC.PWRFreq_Value=80000000 +RCC.RNGFreq_Value=4000000 +RCC.SYSCLKFreq_VALUE=80000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.USART1Freq_Value=80000000 +RCC.USART2Freq_Value=80000000 +RCC.USART3Freq_Value=80000000 +RCC.USBFreq_Value=4000000 +RCC.VCOInputFreq_Value=4000000 +RCC.VCOOutputFreq_Value=160000000 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +USART2.IPParameters=VirtualMode-Asynchronous +USART2.VirtualMode-Asynchronous=VM_ASYNC +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=NUCLEO-L412RB-P +boardIOC=true diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..b6a62ec316 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,95 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define B1_Pin GPIO_PIN_13 +#define B1_GPIO_Port GPIOC +#define MCO_Pin GPIO_PIN_0 +#define MCO_GPIO_Port GPIOH +#define USART_TX_Pin GPIO_PIN_2 +#define USART_TX_GPIO_Port GPIOA +#define USART_RX_Pin GPIO_PIN_3 +#define USART_RX_GPIO_Port GPIOA +#define SMPS_EN_Pin GPIO_PIN_4 +#define SMPS_EN_GPIO_Port GPIOA +#define SMPS_V1_Pin GPIO_PIN_5 +#define SMPS_V1_GPIO_Port GPIOA +#define SMPS_PG_Pin GPIO_PIN_6 +#define SMPS_PG_GPIO_Port GPIOA +#define SMPS_SW_Pin GPIO_PIN_7 +#define SMPS_SW_GPIO_Port GPIOA +#define LD4_Pin GPIO_PIN_13 +#define LD4_GPIO_Port GPIOB +#define TMS_Pin GPIO_PIN_13 +#define TMS_GPIO_Port GPIOA +#define TCK_Pin GPIO_PIN_14 +#define TCK_GPIO_Port GPIOA +#define SWO_Pin GPIO_PIN_3 +#define SWO_GPIO_Port GPIOB +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 0000000000..b944963fc2 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,450 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_HAL_CONF_H +#define __STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DFSDM_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" + #include "stm32l4xx_hal_rcc_ex.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" + #include "stm32l4xx_hal_dma_ex.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32l4xx_hal_pka.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h new file mode 100644 index 0000000000..1bedbf684d --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_IT_H +#define __STM32L4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..ce0385a5af --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/main.c @@ -0,0 +1,280 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +UART_HandleTypeDef huart2; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART2_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART2_UART_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART2_Init 2 */ + + /* USER CODE END USART2_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOA, SMPS_EN_Pin|SMPS_V1_Pin|SMPS_SW_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LD4_GPIO_Port, LD4_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : B1_Pin */ + GPIO_InitStruct.Pin = B1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : SMPS_EN_Pin SMPS_V1_Pin SMPS_SW_Pin */ + GPIO_InitStruct.Pin = SMPS_EN_Pin|SMPS_V1_Pin|SMPS_SW_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pin : SMPS_PG_Pin */ + GPIO_InitStruct.Pin = SMPS_PG_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLUP; + HAL_GPIO_Init(SMPS_PG_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : LD4_Pin */ + GPIO_InitStruct.Pin = LD4_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(LD4_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c new file mode 100644 index 0000000000..4e7628b29c --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,149 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32l4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c new file mode 100644 index 0000000000..8f827e4821 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/system_stm32l4xx.c b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/system_stm32l4xx.c new file mode 100644 index 0000000000..26bd517974 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/CubeMX_Config/Src/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l412-st-nucleo/board/Kconfig b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig new file mode 100644 index 0000000000..181be78e77 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig @@ -0,0 +1,74 @@ +menu "Hardware Drivers Config" + +config SOC_STM32L432KC + bool + select SOC_SERIES_STM32L4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + config BSP_USING_STLINK_TO_USART + bool "Enable STLINK TO USART (uart2)" + select BSP_USING_UART + select BSP_USING_UART2 + default y +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART2 + bool "Enable UART2" + default n + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + menuconfig BSP_USING_ONCHIP_RTC + bool "Enable RTC" + select RT_USING_RTC + select RT_USING_LIBC + default n + if BSP_USING_ONCHIP_RTC + choice + prompt "Select clock source" + default BSP_RTC_USING_LSE + + config BSP_RTC_USING_LSE + bool "RTC USING LSE" + + config BSP_RTC_USING_LSI + bool "RTC USING LSI" + endchoice + endif + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + source "../libraries/HAL_Drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32l412-st-nucleo/board/SConscript b/bsp/stm32/stm32l412-st-nucleo/board/SConscript new file mode 100644 index 0000000000..6c39045b35 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/SConscript @@ -0,0 +1,39 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32l4xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l412xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l412xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/startup_stm32l412xx.s'] + +# STM32L412xx || STM32L422xx || STM32L431xx +# STM32L432xx || STM32L433xx || STM32L442xx +# STM32L443xx || STM32L451xx || STM32L452xx +# STM32L462xx || STM32L471xx || STM32L475xx +# STM32L476xx || STM32L485xx || STM32L486xx +# STM32L496xx || STM32L4A6xx || STM32L4R5xx +# STM32L4R7xx || STM32L4R9xx || STM32L4S5xx +# STM32L4S7xx || STM32L4S9xx +# You can select chips from the list above +CPPDEFINES = ['STM32L412xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/stm32/stm32l412-st-nucleo/board/board.c b/bsp/stm32/stm32l412-st-nucleo/board/board.c new file mode 100644 index 0000000000..f1896c3dc5 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/board.c @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-24 luhuadong first version + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit; + + /**Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 16; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the Systick interrupt time + */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); + + /**Configure the Systick + */ + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + + /**Enable MSI Auto calibration + */ + HAL_RCCEx_EnableMSIPLLMode(); + + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); +} diff --git a/bsp/stm32/stm32l412-st-nucleo/board/board.h b/bsp/stm32/stm32l412-st-nucleo/board/board.h new file mode 100644 index 0000000000..e88c9168b4 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/board.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-24 luhuadong first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (128 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +#define STM32_SRAM1_SIZE (32) +#define STM32_SRAM1_START (0x20000000) +#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) + +#define HEAP_BEGIN STM32_SRAM1_START +#define HEAP_END STM32_SRAM1_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.icf b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.icf new file mode 100644 index 0000000000..1d95e70851 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM1_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM1_end__ = 0x2000BFFF; +define symbol __ICFEDIT_region_RAM2_start__ = 0x10000000; +define symbol __ICFEDIT_region_RAM2_end__ = 0x10003FFF; + +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x0400; +define symbol __ICFEDIT_size_heap__ = 0x0000; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__]; +define region RAM2_region = mem:[from __ICFEDIT_region_RAM2_start__ to __ICFEDIT_region_RAM2_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM1_region { section .sram }; +place in RAM2_region { readwrite, last block CSTACK}; diff --git a/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds new file mode 100644 index 0000000000..a20112b7ef --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds @@ -0,0 +1,158 @@ +/* + * linker script for STM32L4XX with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256KB flash */ + RAM1 (rw) : ORIGIN = 0x20000000, LENGTH = 48k /* 48K sram */ + RAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 16k /* 16K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + + . = ALIGN(4); + + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM2 + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM2 + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM2 + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.sct b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.sct new file mode 100644 index 0000000000..ed86f920e0 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00040000 { ; load region size_region + ER_IROM1 0x08000000 0x00040000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM2 0x10000000 0x00004000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg b/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg new file mode 100644 index 0000000000000000000000000000000000000000..e21bbd934302a4c79c173094eb931c2855e442ce GIT binary patch literal 91973 zcmce-c{E%7`!1}bqNti_X{)N{nui)5S`?Mk7;_#~LlU8;3W84N=_y4~@~9z#m}9D; z=Az~ZqJ~6KQzb>DL>%Aqd)Il_djI;p=d5-1UZ20R*JtOt_ult#-Pe6GbF##8#mv~$ znB~k_7M3%oC(Fqk%LA4(|A)taHu*o?;>?+oFDyKl&gh&eJ9p+5%UPZ?=XlPX^stDZ z{?7~lwKvQEbDTMQ?)-&|te4o>IZiLYU12$U=G?in=g(cZaQ^)1)e)z^vz+I-aP_8= z!9`w6H`ZJJe9Euh6*m zO&*z=S=-p!f$SX|-Jf}QdU->jfkDA9LJ*;0Z{9}7#Ky%Zq@};l$jthXo%5-%sJH}O ziYcqDtH(7oHZ`|&b@%l4^?w~0oS4K<5vFHmi6rv!kCoN6pX(dc-@AMJv;+E|!~ftq z!*cF_ne4xS{eN)roZ>or{`|S~tpCAv=4{C6I>&SV!cC=%R}Cy#-TZlPDZjeJXZWt5 zrjt!V#frlJG+>-v;I=ABlKLNL{}b7N57_JfEoA=-*#C=*$a4AInbU`Nj)z5`g~`18 zDS_qx`l>oZkEU8hD4eiZjqlz600)^SDPYRBV?d29-g@Km^^m}84FfcDi2O>vSBl4? z;(MKj#%%EJt0-UnxSXo^R&XIbEIe`hT$gt8aCCn{$&}A_(6fey7%vyF?NlM%Km1=u zNEWB>rXLpyyOA&P8J4J8Lz(|wUx%*Ae5O_DCsH>=p*vbqB{~WVSDl>fVvk71i zc)upp$K&gJUKb6F_M?l_^ z-=3h9)#ooqZA=&WT}6Cj8D37kdRaklHAc_pB|=2QnNfJXroT$3wjxMMCID?=#{2$u zhPSD-v2!gbdD3)05rVabS(gcI$v-kIk}>TnlF-!mQbP>NnBpXbWzlt}<)!Uel!doQ zMNCI*(2UrcJ($x4h*AI4aIT9+3+t=GI5|V??6}Lq=nCAUN_)0QH4)yTwXZ*@s!PjW zUQ)u20BOt}auGT0J>Ko^0G+-dJy3gi!UF0AVcA;~AST>)ka_8VU84Yu!+fA7rsD;d zwN=7#SJBrI-8wqxckBtvg)1j4uUDO!Un8X`UN0lB(qoP3L*%@GgFZ)K5<0b?)+HVj zwixXjG_QAEsz*d1_7hZaTH`Q!e;dyUyHilqs=S`{B<*+XZ>=5rof8&@zz#WN+lwmR zgJRXwCN3g%>DgQz$5|w}MrQzOD>qkO7cP$*P@8QvD9fcQ`UKyf<9C89a14lykYTY6 zS7zqFSLOV6M*5G+VF0Qsie4h+=i+GfO1x<8Cs;OPeu$A{5Ssn{pN|n0lH4An(tU~( z4*6X6cUNsT!ja7*PY^_|JRcoN_LL<23ZMwpY^Q>@>{GTWW(x;<30d?XE{tlfl?2Y6 zuuL1=2>#_ypI(vbI$3yEn!nH3IbrEE>{u$zT&!M;Ze=ZcYCVczjT@ zifP*KnV%towJ_!_d~voa%nc3u$Hk#F%=1&D$v5-JgGOryaE8)(R9}brg95ZAW;oiM@W)iD#GuNuNW3u9x{DKAcmToIy zd(HOCRDr7ybiX=C7T-P9+m+#Ch?aKy+3uL3OTXRxtU1)lD*d@-Qd^PYB9Iq=6MlNP zs||Xk3dkw*zI50VY<(um%HPFTuw+1SAv`#1)uDxC5mNRw3 z-s4ZDpZvBG?Ug^DIA$6wuy?}3UOJ&x6&I$S9SqGpB2Vvci^)IYG&XJTUTa4y&#Sl$ z@KI;8?X!_tj}kA%xhClWlY1?@$@iFjZI@jX;j!hhrPM3sz`V(TH^pps-lqd?rdzfl zz3pMMB^=z2?P6`FPq5MDBAN-oq%BFaq5_ecqzsT?2*7!809^*4rhy$mHs>Yii6pGF<}MdY4wTQ zzo+sBe|IyIQ9_4=4j8}4SVs@**_T&|vh~ios@zX8GEUL6Z`7{I0G2h83b%MOV1)M* zb_oH|%SUsP!0gZB9sZGH;%pu)sn_TZreAKh0!gifS00(nl~;dfxxFpN#l>~e;vIF7 zWN26H5ZW8R7>B)^l4`)CF28c4cxF%^(F=mB<_P)k=z8|(9!4Upi} z0rHcsIEF$`4HS341XdDH}P|u1s(H7XhP1Pq#*qx%mfJW0C$#iyRD@^e5@Y zp;)F!s>tlmhAe?B5hN(!yG1E+(b%i0!~QlR|E5@m+pSSK=D6Z^I62W~Ou=KqCpeKa zY;;>g8R6FlB4(nO!jI;|JBeJWq#dz!%b#UL*HS-*jp{HQyVevTYU_0OSB1o+N86N7 zdtGcmMStA-bS8VAls3ORz-Gh7rg*1w@LHwokMHx^WlBlSxd{mX>(^Pad0wHB4`j^m zVKfcvB{gk|0k(y|G-a}$04$%->c1CF%h`PV_})#+WS><6WjPbfz(kGQpZ=6c7un1g!&86c;PI;AhmThWa#D6zpN$<&vX2u!ny}vQqjOS}1M&Bt0qXv*foNsHtvy zThUtnhwbA)`gBj-rUnh$AE#s6L^AA1Y&A1IAN~D&PCIv{$v5Li1Df(DEN}CF5s2n_ zCcWBQJU7Lj{iavB;u@1ho-}N1t5>_*5vg4heh+jy?%6Edaz0H{{OvyHUk_p{m<=R@dxdFf8z~%8Wf! z5Th}(hXsTyrZF!>bs96Ys7_>1cgLmmsCvKCxXCw6-aKIugk1d@DM;Pj5R()kWT-eJ zo{}%scf>EqQ`Tsn7|$v+G_xfVP426kULD&Kp#GqqZy<6P1EW=>mzI+=kPXQ)X;mWk zs*-}rrw?(8aNDs$8Rsd9XX{;N<9Sivdz(wL^7JIWbPLLf6nr3*Um_Jd+T8QSiikT_ zlujgv)nEnyjzyj22{hxXXyNj{;QV~&ra3_pMuGOSlLwIws5l~xnz)xV} z@xQjpJP>6wb?FQIDdy>}(ct@5Tp!l}cB^kcN_qt&KHt};d(BJCzkR zmq+tiK6zqk#K-dATxb5kj~+omFAhz%IXLTDc{zZBPIDvI`m91*1>v`^_TSR<9vspn z{xPhGuD&RA!jgk}iIWcMxQY~Succ;UxQa=s@i~BO@+QK!ey#^))iy0jRUU>0g|7#% z?`;l?8@;ywM0I@!yU@D@npPJCy%0Sc^+{@bd%4Z)i`a!@^!~9*_ivc;%p5fF>89#g ze!Lp+B5}6s_iVXIXb6AuA`OyBT+{${TRwsp#Tn@kPFU6=mcsS9IAKfPW36ZWi#M3^ z)L(gJ^kqA|+UM{g&Tz}gVAu)E<<7uQKlMU#Nk{VBCIsTd-O8sLpvJ^Ig{lYMw7$hc zfg07)=lfi+qy-VrlZyg^9wqF$?En zLa#1&j~gDYjCNnw=vTH+7SnanF)L`*>tk&ELw}C&)iRyDSgm%?r+jm6uJj*`ohyGc zdNjY>__*@wOZV9#-Z{ul>JWI=i3CcHW!%*l2bSO((oig|(j*YUIAbY8&)8(g}ovDD^NmM@xrSrI?Qxp-^s## zG-*>K2lb1;3B;D|?s2V4$O$cmg}V}FhqoIzeLAJG&9oij|~p1~KDX(#fWep-^;ksmir?{+DGERX+5 z`y=_+_}5x4c1N_w&`lhR_8MXfM1L)Y7@OJEHU2&=i!ZR@_d@j~=q;r5#|f*O zWbW;HIlu1@_~-jtnHtn)N@2Ie!{5W21k~dMd|l6tQ2EiExFQhzgysD6$>8hyv@aC3 z{?y=2U2d}at4ex`F0AvQ`V!8<9n_IVn6|8&OinAwTAOitz`5&aAkjm+_uZU@4Z4+& zI=!?0arz!AhAA?6!r~pr@GnP{bUV`%%Qg>VyTMoIAT_3>^3+7oL8L4mE`hIrUo1w# zgJUu|(D?04=S#UzjgQGo`V>>F81ab7ev>i@z~f%G^v5!6_2YM>+98GM_HaAm;$JP} zOXf3^RIK#soUSLkP(C)MsiuPxt0&8gr^ zno-JMl@S#EE2L_xVlYpxS7x{SPqOsDj2s0I$ZW*xlHY^;(Y)p<*!6YEb&uq_fM0 zNPb44Bh-*_rx1hf!xkEpb&G7~z~>Lh0=QEH^w4*g#Lv3UBl>OXC?_n5IC)zSN|Io{ z1VyqVS}m2!yG4EhLzXwi1(KujoW~hy#rtj1CCR#jGxiHEgC!c=th84p_DHVd%K9ii zq^CP zSM{<4X{xzyIpOzi)q|3KuP}A3bgt*v49a@Gr|$cIAO;o0_YC4{>`z!AnLu&ihLSbf zI2bZsXjOi@b<%TazB}-Oe&s+{ zusgsOW?hmgV71aSl^(5OY-;^yh{?u5VeJKTM#?cB(%&3CK*YhgDo!4c?#nq+L zi$qt|?_7MVk6YY=Ex`l3iC~7zFsz%1tBm(o%YWrg2J%L^{cIGcNJ-aR@&&Im3Ly-N^z8$*sEqXfb3B8T#wB+|{zwLz|2VHmHoYM3Q5aJ76A?e`3oR$1fwR45*sqP_zyB||It~IiC zWz_koUrm;&20MLPlX}4G#F}7*W*7339&Xu_F|`8V+bc>taoQPDM~X_l_-{(imL@X2 zPho@t)oR?eTjg%0PbsZ9N${2Te-{GUG{f!EN~vZQTg!kfyq?B!_8vF!zRjDSd==`# zXw7EJXo8RGXsk$d5ka8+CSFen+QGJW95(IRQ4{`~_#zc~NXYZPp&kHxp*?mi;dw#hpIRsuIi}XtL9|cqfkEyxJ0*rKJhnpuKW5zp(-Iq zZGXQw9yU~N(;UT3j}(PpoqjaF)vk2vD@7uw7X{jt8Rm4%5;#8pjD<+wbhn-`z9Lvx zqRVlmm{wkv2Lsi9p2BVBt(i8~PQv|sFQIu)^L9Nw`W?^q&{8Rua{etp-bV8 z=6<6P1n0J%^4ovW7~SBy(;1)|kNG9>v{ zqz!-n7-CKPn<6l>z^mBhWsNoGN$fjy*j8A!kxZFr)2>SO;GdRBvetzF{u?U*p7+h} z!Z@+03|v&wK~8ESlg$NrXKDw>&4K6!Wdh@w;?$~ci>S^M7D_Th3w#;z#;Sq-inJq) zcnxP?_yKjjQ9rpyh0t^j3G&Ju!*(1+aq5ds^npNfo>b?8WGh`5M!G|fBZOUclyB%D z1GyVAbKZ*3V|$3$t^C{6*nbp8qqlV2gGv=t=d{#xS>}45)jiPh`qts0_=XtUKN_9m zT1VdD@y3>UcL?--CU4(BsC)@&0mbVmdKJ+>8#GeddQVtlRp<3h@IijOKM(gDw?H(F zoSqk+c9Tnrev(^($EN-y@GD{)4FxG0Cbdb}0As7>KvhuO&?1F`e z=5`_V+y-aKokAKmQJ_61!TEgigTOz~r41zgu1+7Sq4N86;iZ}&nAJzmiMJGbj%vA? zb%M3!laFbTL0R+TJw$B2P(n?osb!(ipqfNtmrY^Z8#91^xgplf(#)dEDj>=4y69BJ z;%j~0Uv6~M5YnhPln`)A{^o#R2S4(IZ!L}2C;Qs#-TZlQHi~<`V%;5MDD*(!U0{*< zb7GmJ+CKWjY)%3o-Pl76nBO$Of|;u3cXAo);kGybwMPo zb!xwc5QtT=t+LqqD@NG$fH^QkB($mhx1!_1+OMcHNNGydTVDcPyjxq~!>_+Xi)+X0 z=cIDXt!4lEL7aQY_r)uFd;Dy1NA`_q>+o}ZQ1R-}#A9)ri>^LWU(< zDPBh$5=d&{o4H4yvnz6@d&VkreRiQ?ub3l~ggJmwOTHS;{)dNO)mL}x+h30DVrjvS zIFCd`PIe|&gF;eae2m!pNUT}3k7}u1@nvm)tTe!8%?gkuiTm??lk*spXuDza?e6&N zP90sH&w@Z!JKipQl@*Z3u~=rKO{A{J5rHtw)BXo7L z)4?Vmw0PyT`b#vU-=z52HPqwl^Ng3DoHmnu*40}|#b+HKQgb7o3a=)FH2yO$i8sG( zJQMmG71QAjyh!h73KF8r=;|=kC5NhhV`^%W*Vr`qu|~Vj(F@E{6sJX@;|wC?Nfv2p znh3u$iR$4+nv7LU5W39GQ@LTZgHt|=1BrS~lm!29j4$ILZ#P}XwkD31yIc50Ap zxX8PHQ;;nb(30>v=*RKL)e@3Oz`OpBc0CkVZbh=sb)RlgC*}UXVGp>S_^Mu|+K9feo3d<&?*v?ZT8l4idYz%ccb{O#gn7+=_W8$r^^K z>Q=mbTH)xPuy};f%PSx)tf~7EpgvcgslV~TJDd=vG$pc7FHX3BW_b#Ens8j&A8yF@ zjWiOFvS_R^=ILoT643155lr@w>hIulBif)7;f85v7H(6bqHkY_bbrh_*poTDbWp2Q9-3C*( zeO$kOYtK|IH&5T82{-vo+lzR+HhnX|S^TOe9|eJYBc17Y$?om0kag!&AEE0>Idj;s zjr~a{xg#8O9n2P;@UgVZx86;75M7t}hcU|EO&5&s@yaez#tbGEyv%$2?4C`H8m51f z|K}7&$5rqksM^L~GjpjNz@DD|7P32{58rUT0erp4b|dvceY$-uMKNY?&Kr)qe*{;C zC99anOb~vBCnn!FPwSHX8nlalKbWBZvH59kgfHnejF+eMX@~n5axc4ZR8l2 zQ%0?*AjX~cdz1U4v5op%YN9Y*sfRD2Et1$jr(9!$Jp5M`E?N1JTdT`mr`rNqK(8z2 zFLEZtx7I+^)9gV9M%gr_#=hBy0k0r{y)FEejsI@Y3WnR!#T%K4fnEXcfY&rG)fsL$ z3X>8LA5~TQua$k(ADJWHpgfycVEk1*t)rosP(qKcoZAGm8^>47K@MHB(9p&jgOEEV zEgu^2@ZgZf1oKTs^sh1JSY;zWhmyeDXZ4r|+{yhOTG5Yx75Oi8sY!!+0IF!g z2g2gd<}Z=TWqzke_L*T_9R`R>5@*s^9Iz(Z^v7aeFH@|68!~lh$7mt#_e5;8FT@U! zqYpAg+vyFas$N|Sh+6F5>Zj&U+a5=^3nCq;3RzJw^k)9WXobC0cJBk`&0O<0wgg|s zee`-xWOm7ni_0*2U1 zFpHv=P{c;s3CorW<&6!6`Ofd(xsB5>mbfj|O^YtUO%UKf*R;{c^&yCbNAd}Yh}nkL zM3MV)ejg+6M2_lnGH-f=>od@aLHg0Ou*kaOVlu}GOUw=isi-X{z*J?9jc@B{c#vU3 zmzMFWx?;?}2v=!E_I0~B!gwO~=_L`{W?IerGP{u)U-p*r<3j5hJ9JvVQj9=(kFDz* zZ*uU>eRe2-H&~$I?FL5Q%e@nAm2s``!uEBU_r;l(N$Wt>%!`N*GJIG-438n$8FLq7 zV3qY*O4ABC)hRV`zTDVUrz4AxnN0TfTtJFbgdQxL zG(mzWh`4=%?D)b#wz#%>93JaQPzyrr_oPF9DWk_jE^p$FEBgo5Fc-5qvy6c1#Sp6Q(QTHp?IakUEZu>{EH<`Dy;Sy0N zz-&P%2BCxXCjJbxI6I(`5PZ;rbJz*SYHLLfc}_MYwZschp)Uyc?)QobOzf{%MxkdG zb3^l;g4*g||D3asQ*kua(L?&)e24W_kk7XvIxd73$UV)NYI|&_!TsQVaYDJ7X6Zz+ z&~%2*V9DP#Y9zKv+vTJxHh>P+>Um-kp8sysXVYtRIj%dErgFO4bzR!K=>;Oq9&)Tx z-h)A9Ey`VPC54i=H~IptlF%|~R#W1gquYg$VyHH{zeC8W>tH%kf{N~sFmsA-ZBLW! zE@6%>u)q1sn?V1P%%7ZJeA{j;*9qdv_CmL1@N44Ysk@a?Jr0YSi=qWiA-&MRPl%Bn zvy?T*37l*)0PcAAmkx*w+-eqa2|HnVGUes4=Usn4Hzf1WK(aowH=ycjWllQkh*(s` zM%6KfmDGzGW#uZX1vAAJPjeA?WGA>jBwF8BF6H zqk!@Y35meM2*0R~f8ESP6y|Mj-+cH8i~2iZ{+LTMLvF4|OlY*Wd9u&r!?kiwbKa!l z?PnN(G6pI8ei@)-AEqW%mM00EPiz#tWL=*5T!ZIX_It1BZ~mb%cZx5|gFV|S zoS!pr%OU}o;r)a$jEp=mXR>^oH^9W?6l|?gRI>gxiRSUx_zAz4?MnHZ1}$P5O)ju4 z)D`A6mt1%8mrt9i5yPZ3arN;a@BF2O3VAJaV7*yK(>UGt7x&wo6P7PkLbE@gAV6gB zYorO)&zUk(P>T3GOos{Nil^)^f0}igp@-XLF?o*lEys04NgY>Vpy^ZDP(03j_$jB6 zY8!OzNj*V9$BE`}9NT&-pgRAXzFmcUCZ;{Er=AQmISszU5}gY?)p%8`mkG)xzrUvi zevstLzL{8v{jSYf5)X&NAtCZ3ZDe`jD<&la{^5Q{y8?Nn;b(K3(;|SZhzQ+;Zoks` zb)w7Ek1+Ur!|l4pj(hdn?%F^tZ%5}x3Q|@j!s^poVp`NJF8@2>W|e2NXw#g_wcksg z^h{PIf7x9Xj$}uGE<~4=+MxHNpx-wK(+>Mp-Pz3eto4N`QLpP5xw2K)T&172n!NlL zco)bC;(Xh$mgP>h@n`qr2iRiphuxo+MR>|34KNmcyk+CRQ@6q?y9SfYvveoxiTcmi z&zVzw-;^vm(!nN~%$daz!M znyEZFyY)dy-LTuKByMFfrYNav@aOGxBbdCS*21d!o!7EMvqVwP=-bTjks2*8E_`uf zj~j&0h3|2aEq;^XZ1a0Cs6aR)nHjO{!KhB0K=F5?Iuw0Zh5Dz8OOsvdd`%cPT*UMQsiBHJ?h*# zFBsANi0ZMBT{`dhwdyoUzG`17$rUW?*;+q!Lp!KJ1ramiVt5_i$|GuoUbj0eNy8jw z9I-NF>0TZbm{SKON!xirj2b$zCySLZult$H}UP{5*9qF$Ssim8sYG@D#pGkyQK9rZ;&B~Z9rZi%^`l$YMf!V0 z!WK5d@)po#kZAz{OSR(q#y}HDu_IJ~nysK%`Ges8nk2W9BI>rPCrP>nH$ynb#@1we zs$)$6DH6vGWi*{BFBxSTzVH%rRY=?N{WTl+x8@nUCbKkBE!XYN=BFyHhcRAn(Eyb^ zHaAMW7VPemx3ba`d5b$M$>o~EHgNJ{YqQ7bp~aG4tgA4^VtBqUzStfz98kWhme=|u z`-%#$=q0jC4W|2s*W518O68c-eR68&=y{}V;%RTvM1q(E>H|D+wt7j#I5MJ#b}Ie4wL2s^3MHgq!ZZE_Tp!z!YkxdNd|W zOyVw0_D0Qk?rt4gPUc$2b~05co*4P<)<9gzN69G#IWO~hbMZ?RLS{I3GJNtf@ya0FE}5#!m?oW1&P!StD@LWE54 z0{=vxn~Ij)U{-COqv~;mzmTJ5aUwdlTn5`Tn14sp=b;3Dq<3GDXBsd^#!zS@qgtr7 zQc)fw+?NL}%XqA=P$|5$FTG)xBF zhYJGUNxYWu^K*B*o}BXmextD=SwN^TsTkYVdiRVIqQLgAj&J>2{-;he>$o&hICA_D z+`}z`v`e=f3;G4U_EJ zaU7vy*_W6Zda8(pO%m!gxVJ(6laaqzBPmbLw90{=`lQxldVh{nMD}4l1)Eub)m<$J z4)JsMB+%;mVZr{_e-NhQ{b-^c!>567k@BQN1aYu@r;t+D*TVg>Rr^q(nUyxujD{(w zmg{q27vC1(J<{gvKG)(a+6Q$^6|=BVB?H!3pNG?77MP45&R%c((3xJ)io)SM>rT=S ztQO&$j1|Vk@VS4$4_eUL@Lg5%+WGBK(F~>Rz|a^I&35pXSA36=kRLEjrpyg2#=%*rq&FUCYl(L>4Hq6S>aAtbDdB^4NJ z5mW4;AEzn`f4ViG(Co(3fE&X}|8j3Juj32hwZEPv?)`cp>YWbjkqHEhAZU5OZMZ?G`g?PDS@7JN6q8n1YDRQCqy9nyz*)QbGZRf!(8* zeb42X6ZaGjMh^P-EGud1NCZb>_a!y^Rf0;pIL$dSO)HFVv8&kptp8p%nDNMH&<5?N zPy&k?ER+*tk5S|wda!9Odbcs-$gwUBCYWucEfkhg6j5wLE(EAShD-a3fRjTVSJxre zc#R^wLj0ajR9HKHmm4#$1tq;rlaTWr*RHq9aF4hAUGuT89Zm)JgE{x~Ilp@|RjCc{ zma-Y{pI{C7V$GkYZq!XFpc9Dq?_+`~3PT|fKG&e?ijDyk zgHMB&ecYnQ&iMPZ7>@D;U!~9LU0?JLYj1>wljb?PBK0U$@j9kuh{aw(=B>7|{Y36_ zkOtRhEj`l%7zmAUZ`SdBgSov87LVP;A~u*Ss%>E7#<2_A=vY4|yM$kB27Y^9<4dnY*KqaitDU6hi5i75 zSaaPQph^<4&@ONC<8pW~U8NID0Y#XTI$knG=@PCFGIJH?d|gkCfe>%y#~izEx8lwGhk&r5Ab)kC?)Tz&> z?=?yk@1~qa5UB+DR>`tWwh{!|mO?9E7Sd5v>yP#IIAx%ck#hMr#)>0kX!3UiP=Ddw z8(QmXT4R30@)VfiNok6#~!`+n&SB%XG>EvdE=v|?#qLz+1 zEP*^5;un#+<ed#+Ez?b^(HpUGvqSEw`1u+7LKL5t znSqKS`q&O{{Z}YXrUt@NN0-WB1dn?7dJjr_(p$0V_!#U1*ZbXdza-ZXAM{7jP2DkX z;H~tRdGDcLvYrF2qc_DIm&6u(l%ed)YZp0c>fBe+m zcb_9!v$t5UT;YwoN0DJ>VDTPx7$%;5b}-$@`*xFkamvCAKqHBD8&qOJIp}68P}Sc+ z#EL8EUKZ46nMCn;hOTz9iVgL04xinN7cG^=#hYQ3;f?x z>MsITvdFMye>LTbx@+ZRh{5pE&G;lGK5v_{<MWNoZe9L0 zhstSNZRZw^s(k7fegq2NiL^(#y*XhCE@-3>=A4Qfk6L{AER6#4ZW{4DIrHCKtmMY+ zH7pa~er+;RYD2$PKUzm)8659L?udn}UDxQTwZBkJDeB;C)mJZwDstR#9EnCRY*cSN zFiHNq6)(ggTfY7Ymq(5>V(cLwP3YL=-#IQ(gCJ#(H0hO_4wTVYwFux}RKY}~26wWK z3H2g3FG69rUu36$PIO0jUAyD8D)<~MkY2KSsvyq!v2dOuOeImo-W9Gd+-k&)ZU0~v z>8UeL#|FA~gc!!tIu5j^pk!;ZUu?aWUj?>(iYxC_`gtm#G(E;t)F7f$Qr+NQY9m-o zGeULlQVw(fQ*F$uca#Dnio#3dr{?wdF2*0^3r(pFThkIK)|)84`Z*Vq-l4M8%Rj?< zOA1Oi9G?mBmb@b+9{I(I@r;3-J3ix=CY)?1ql-YE*Ue-ttPf$G3-Sfs&8m=P#ES~b z{>G$DpbuIGo7BI0s))t?Znb?Z<_12pJ|ph-vU{oAwo}{cO`*)GD4YF50^*y-Zhyje zC6NAbp*3rdDunDk@xFXTtI`X|@%qbY8Bx1?Sxv_iY~(RB5bhIe)x=}l23942RwgFV~Q7B)qDGHsPv0{NU`Wmv;EAAm!VX>C&8{Z8o!sju6pd%O93uj@(bp^ z-0!zMuW#2jE?+3Pz@Nii-)$j+~%*tVO(2J8gNIv4z$gw@v6fEJZm`Dm1C5d zy3}#aTck(u&|=U9dZ2BWsGqvm#=g)sf^ZiUd7DYgznwqzSb#R{ckhi;N6w=0bW7r4{8&r{FHh?eCm}<)p^kpthp|xe7_5a0#Dm zbA;!_(%6n8T*W#aNZ=iAX!*SL?fIhRx9XYi&XgzUq;E?6)hP{-b}8`Q`h9# zePh&HK86-N;8FBae4$(~^Z55qvY5sNIROz(48HU4=XfQ(A;m88z2CGMnPBOb4+(X) z)$g4>cBcN#c%%?|dj%kP+&~X3ob}F^q13y|VhTP#Tp47qWM1BS@Me@>vmvz0slR7+457*+=T+F&12{);pv3^lSkOMmk zLzggBVKw0XTBQ`+FZ{?Llf%DOX|k86{B@pO_w^)n7Rl?OHFXWg=6SpFO355*jI`mWP=vsjkJCwM%fv zmCO8RS_Xh8iKr*!u6!(7+dAyujvyr~54qM*rCuU~e380^-WtSJOyRnS#agu5O|qi1dhd|@_MGFe7epYh6uUL{h~R188c3b&5x<~g66NOsCpp!(igBbq zuE+B_Hcb2YAPq_ZEsb#snLPfS3#lG%?h)J{ed;%_D_Vx1Z=d>AS>-;SOVH7$E|YfN zwu{Y{)5VUu9sQzpbcM41qUGlLUR4EkTy}uz35~U0D265aLn@#l%V6qxy<54Do7-_y zs@_k>eYW>8?T54%yc<`x6S|)`ytq>oF!d^G=1+1Mf;fY=(;VEp*95J` zzAg|^vr*zgt2x?x+aycNJ@huKziEL-SoVSJ6I2P_)XgJn#bOZ01J*6{+hQl)IJ7pR zGi6BnjA!jN8{b?R5kbetb@36Hmns+)(2z+DRFy5-3gKbrYT&SP*-M+9h z^97iuMa#ENNb;BDj*+HRZn|%YTMRFUM?tSCwftBiW99VhF6w@!_MKx z=S=f%xy&@8Q-z)p(M0TNZNCCFo~1-$iVs%rQ~wBnGRH=gu0m|Oj1}6# z=v8%E(ynEgxaX^ZVGTcs@WoHZb^G&9-8tYS9n&R?)7jt442K5Fbh4VooxXk(?SKIc z)K#3KPynTDEp3nQha{%tcLABBUf6SzgDi_NV*YwO2B({)Jvr<(@~T%PREg7_sgAJ^t%u5 z*7o|H`mnaD(;GIeluyK zZeep?E1{f#c~_wfM}_YL&}D@EXT5CrWy_lA%j3iTqIJTOF)Q%z#%Ehb&Knzk;}?6} zLlK&fIZ)egWbh82_BCl^bk1ORKSY)(*})G>p4_@Qb;|P+U3Kdl2%r|`o686H%-O#? zWfHc;*xZ~-rH%}ZtEj6fy$>6bCfpRB;hdV`%S{Q8>s}e3(yn^?OZ@Vav3>pzvex2; z(xtf#zZr$4jgAKWPVbww(TVizCGVoi`s8P3i%(mhIsv97t0#ON_{~E>S(ZJ|z)H`_ zcVQz*Ws2S(fBgCTM@g>59h59?E_I+;VZ2t?w2xC>HS;4@;bR$SV&wQp4}EajD!5EU z)u+DJ;US-nx1~D2>0z?9eNGuebUbV!Z23wOkoT9GSDKqArKrxd>01Ln`Q}RQWeO;< z;?Qu}FKU-==P`-n3^&RgX(6?Up^sOf*NuN(&OOPMJL;dR{C>kk5U3|q9LGss9xqEw z?eZnY0a1PR|Ql*QO2qAcAJ-#*8%6ViZvtGbHAYp?uPr$d(l;7tGh5WtvSB0DFXehgv=;L1m zOU4-eHEruqm~Kf+SvmTTDY@BojvASswIZrVVvYt1Ba(ESS1!^L2)nE!HBh@Bt!|(3 z#m)bt^&h9@?6j4_r&68xo~QW+1}h#NEgn$C2l)U)V8KT2p%~AsdRnvv)hdm~wWhG8 ze{l)Hf(gMU95TftAUI7$;6qXxQ3U-MczB4e;m_ql=ltD2XKqCMtI(y3 zfQt4kSkv-;LR(dgqZ4oSRV?D(2@sg z2tg|#ujQ1Lg%`;_U8)C_CU!T12LZ)E-;Jix3tM38kLJXSFPEN&GL@;(2}py7?+9e@ z)lIGGDBhgM(+6)rl~eoL9V0@M!j~BKhyR7Km2z(>L`LZ5R-%4qFu14e=`gaT#EN?L z3P!>P-`Lnh#e6GaonrV<*FBPtFN(2Dz(F36*Beg17Nsz!V=u94BgRhZt+V&QmoYh0 zUPjwLqFMBp^ELDv)_YYlywvC*N`?sXF7O}G2FD$e#N$If0YF5r5PeE*De+jk`Wl{( z1-;qA|G5h6sb2m-?G331v+kZq96}^aFHtT3oH@hrrAMs%IV0*128wbtq`>g#Ka6DS z3`m7*6KFdV9L5hK^f@rN)VvZ-DxRC&TLD(=WC>5}nZ5tiz(;9r;^1-PYR~dsk@0lX zPxy<+`;BxJjJHhwDgx=LZB81^;Z5ls)Im1%+ox2=R0|lPOPjJug`k1ip_@3>I~T6R zJ}bzNrPPP`jxyt@+$~KvrA0xKWCQF;k+41U0Mw7 zE-H|F$~Nl%gkEN&?eZBaJ%!$@H(}VG$XlyzynYL z-D6PFCh8})uT-3_atJ+5>Js)yyEvdFR!#-qYj>m`tYIoPZyTT(dU=K)x~6oDuhja@ zh78ZMs9dLUklb`{yG@1$LzG{4nLJMVbEegg!P(TSj|&`70%~2qewC|qw=qJANFWDb z1N!V2N*T^BSa<54QGT4~Jgake-QbDkG+(Y;D5kQrt{4LKi4|`)*_uZ6ah#`1+@o`! z=rUBt_oGw7iT^RKS0lBj4>I@w_t%vj9oK58o+uTt(w=WkXg;wP`;o^-0#P;J^2iS|%1E~pY-#uQZ16se#8dev(fdk!Iq0(M(Qka9&8&B z!lIk!T_DWM(Y%}XbYEwWw&$-z-6%sRE}06|75_q8oo_C9L9ZH0b(M=w=G%5RF43Jz z|2|N<6D5LZ_mm+2In%FQcpBK3;X_USjpU~IHw$y{gMkvn%e}`h8sq8W-@YBk%u-1V z8R%+no?e{}sNJ!c-PTcMY9MuhX@)7|JXK@+`tlelSwCY~v3ey%seC$X^X<3SeZLY4?bi_Xn}NMBm_^Zg z_U80$3+I-;-l~VG7()Y&xHMB)+mFtKi1X(=}|Fo8|2w&L{_n9kmY1Rh>w@UoFTcT;w|cs&s%!#&51 zJ>(0xJy0MwLTlKjo;XmhMs$9jyLdgCrK{2x)X@x+!gMxkSLKM2SZ>@6-p}}1MnzFX z#LwtRL8wjrU4nE=NMIE(m3i=CLI+$~hl5izcNqq^A>p=p7Wjnz}Uguf|4_V z!`r*DzC){GFT;vHb)x*0IXOr^%FyAbv5qd8Pw1#dkRi^_)a)a!O>d%IM+`(N!)ON2 z({6ZJ7|lLYxth7*Em=akf1;y=*LN(B>RS|^))V`|WTWk-1Rj`%L`qnUGndG^90aB) zH-sdO39a2Q%iQ9Nk|$!6z1zF-?(2;-c3fSJ#1z=3xxn+*+#oj75&Q3m-@%_VfiDRL z9QRUdD8Uw9L8i{-ZsllG>VR~d4lm18H*Eo8hJIFQ$C7-*Eht+|*SeZtx+N3_@73_VMqXl7RF@zJ{H^rozT_$BQ`(tdi z=6vV8uj?nS+;=?lJ+b*dj=`1@ODy-&YHo`u6JLS!r zH*3lxH~1to9?^4Zhuk-IH;k>=O8M0JEe9=1C1MxLG8d6#wV5>vsRXj?5XbM&;nns;dP9&=(ae`rG+Qmo897{va> zO5%L>#9*yNnb3@MeX_#>)MI*v#+8bdohtNbom4(L3OvZ@!(Kp0+-ucJ&mdc~Lo}R( zLP(yKYlUSSxf<#P5yO&ey^9pmq#(IzuTI$$?(_NqyUyUSv=N9Iy2OW6t?a4Z)aQIs z$B=FJ!UBh;00g^iF3xKiNtx&PsRV^-FBpRx)gSJ=i$34H^LVnNz;mx+C)ai)@bOOf z4_$I#(viMs)FnEY5;vBRM^K@hh(3Nk?ra|kS38^nZ95yd*xNJ5CgUcD)TW+&Aw{+f z6y4YO?G4o9y1S`*7d`;Pb8d!7{Zz<_H49)!=hpEfzgMGSI!DoB=(k>nZD^htb!7;qo=u7vp{K>`TI4fW${5}J zNu6ZFw9i!9L2+p!$y~kAq(LY({2e3+d^fO~ah57^*gd5qPFYIQSiDL%Ue;vFB9*Bc z89JfM`uuL2T4RZ7FpS^F@C)S_>FR1%5B2;=v}tf~Minn0$29p~Ptco}0|UHb)Qc4=d4YY0|qsqc}OqqH@3%8IFh>Z7nBlwx>5+2$kfv z=6>dBguEpcc0`y|O-3!ztbgvJOqao_f6nkCUS&#`H~;0nLFU#9P6f z*9u>))x0r{ah$DW4TW0*b^vGdwP#55dGPfYsT=m_)bxi5<@Wpu#r`%$5GR7IOL#WV zj8-PfD6`DY9%yA*(9cMJ&OAf1183GdCQ*pLzw|5u?J>*Hjt0&^?k;pSozN4m42%ku z^oABfd|<4u5T|y>eLYs=3HXzTQ;GqYz$d=&qa!Vk-7uNbV?a4M&rRc(%v2!vrEPm_ce6v%|R~xVWNz2NhiqZM+Df43eG@^QuDm~U&dpZfp6|=zGWcOpH)t9O``Vo{ zM)i{nxw4d#B{q7J-WUq%tR?;KL2@7m)PBkRF1e*U#eC|Z0kiQ9uMsu0HHRIE9L1q=t4RyV&_%P6%Ka^^m*dl+AQS*Ec( zxySMp%yLoFv3mPvXfedT?B#%+J@Qx4s*VnTd>U}%M)9`d%Y~dk>#SU)H%B0T^V5-wxKm^c3oEZVW5+l3XApymL6{Tf4_bkQO5E zpHtNjw6Pd~M6laaa-CM18nVT%;xNI`h4@m~oel+!K12q+O}lqzr43hKpMFUBH95Iu z{{pVoAz+CQUQjA7x-?;!L3KB4Ai|rs;O6AkShW#0LJ1f3gno+xWW0|&nzhhd?M@Be zAWZnW^X-0~aLFf48>Eu5z!xZ}ll2u;HDnAD9kF+j!4o{#b%xsdvP+n*(pREPO^B(Q zM*0S#-Nz^k&%kW{)E~26Vl=%Z-GQw4#?ciUy8wP*#jY99EGssh8#azK!k?&)ogZn- zTmXW_!imE{!Jiu~27X6gu8Na)&GixbYG^rC{<6~0;pip}W%Vp%quQ)?vw5w0)KT7W zwwn5eRWKf$FnYW8@=69Kf416Q<>N3%YVaX0C{$hx;?OsZwi9W3KMlE;nfbE%(o`kr zUg>mh9`h1SxubTY-3W~WZwV<)ACkICVxd}{5l ze3@#IR7?vd^S|s;rE@Y^DAgb~xU$l{-sArLtu1pwciToic%gwr?JpkJvyv^V*WFWZ z-Z1Ia{4MdZyBSMpTCo& z_dKs@wJjJK3nis$)O&2ygZi_(vkQm}-mpWXX@-w->3e!gKhf@omuh1|PdGm60_~n& zhF(5pR~#1ZoZ{1(;`!2g2B&?I*5p3F;Wkoq4BFSa@0Pmux$Z(Sglx>7Y0m4GGIo=W z)bXEc!q}y`jyg)%#mnbR{}?>tCCh`niE202`HD?6yUP&YMiC|st{@M`7c&Lf{!l6;k?Fcb7&wb|by$CX58HGg#o~F-={|yUVb{$0rNu{N~Cq4hbTfF*( zG@C(5<<9V(Spah8F041CE+_B_$QUxJrhR$mCl>bX-Q zmgZvgSvJK*L(|SuZb5{w8CQzi2?lAQ9NSy)+b%QZow!!~Biz(JqHDfp5wtx}9>`nO z5FAvs8T}aF(lLdJ(!#R)+|J&7Bw*qlq}sRq6jvkXSZ$?R9Rs!{ytiME6`?k7m?hh0 z?0A#H#ePvluGm6flqfxXKa_r(pVd*~l9gGyoUw2sK3htYz-ecLRff1VPfnB$#C0>c zGY;RinXDvOP}@)6dES!EXZVr@+`kY(y4LrbG@}7BXk8gADE#!TQg$ zfY)o{w7fZx6iBvCJrEV{IWA3LsA4zVh)Ls!!X6>|WV59a`@P%I@BK5EpliP$sPCX3 zkdVJTygr}r5dP9wf4@Bdn|TLF0iIB2j@1BcyQ4DB+6F@dQ$h3gi9 z>hVzxo8whDJY5N5Wnq;YS{8Qw9LZ-3VHa-7b;OLWQ8XWY;51e#@D|sPA8O#KnW#?d ze}rYx%5e<09eD4QE$dh;G_kstX7(Io6|$>rKE%s=$4d$8T?G@OVyxMXZ>IV87RFiE zSUHg8$K#;Lrq$v*t!7UPQ(utmV^Mq+*kcH7^3NGdIzROUIQR%D83O+38U(5@k2Lz~ z*XHqhuO%xPud%GT@6N96FpZb1Ga&|VFs1P0cn`Jt2)KgPtj~mRL%f2L(PFRpAixsP zk2{D?jFO@80EfPg!SY6E#!Eg+^7cjBLW>NG**DNd&E}bRlVFDrc^1tySNv3&r68s* z%aJ+i^1UH{O+f!n)KZiZ-I*r6LU=WgNS*`j#@WJzT5x1*u8r_wG>qhh3-o!G*X|qZ zmirpBWLjxXuHGq+A!&|$8}FBeD01Wn0ks`_w_kJ|Q-30)J6Q;vi1&e@VUuH_wQLI< zrpc2po+upzvd_D_LA+GQan)*Dmn4izOheph5Q?Uc}{(5Zw>WkR3tOub8T zGd2GL*jTyjzd>7q;}^*$tv79JZ)*9ZjGFH_)N6XQJIL>unQ3OcFcTu|eVOqt%eU=& zAffm?C>@=KN$Vl@O?~X~eS^F;e3Op9og<%arTNY20ebRjsz*HlQVO#_9_(FY1Io4N zi@-m1Vj5mC{y@kup&u*^B{BiFkiUf66kZqhezWBEtXdMTYW&f3?Ka$td?43+n0smE zd19GL>8g8QG}V4AO-$~zbAO4%(R*B)TGu7KA*PZ+@Die10s=3;)?*B{4CSf3YXOv( z&+jY_M03%ztT`xxbwaZg_h=qdZ<@CIM(*pu6WtR#<~W!Gf0nZQFSs5z{aj3jnwP30 zQL}`EHW34a)=ro_euUD$VWe0s9ykj8V@f7PCoq_7Y^g^Xh>(d3sa^p@PrsRWY}?%p z9NVHNatuehekjd{?EJAK@TF4$@4->rPqnkuliv0#os?qtdsAXNy8PtTwWQ0c^b@C& zfpaY>mXiT8Gb_`cYA5JNxh7JjMJQM;#1wiRKQ8;(a~hnF`M7## zRz^H7UAh8lJK&wGq1CsndIcmqZWYhZCWPk7Rb&*VmAR+vAxq;M(=~dY=2!{#*$?%MezcZcJf3YrYm)RG)edvtc(cCInzYJyk4c70K=K zM92EZX-ql3xvjCoJYoy6Q|69VctdG#{=oSuMHlnMb}UfV-#1M%Z5m0S2`wE~N2*Z5 z7&qXk3k8J!t>tO+=qn~$$b!XJNUkTO6W87!!3bLrTQskz)ew7>ZupiXe$pG?(nLKi z9_#yarrw#sb7Xs31+W~%Q@a1^lA_-uk}(Ya_PTPayFusFZgVNm=XdmHu*A@AR>bU* zZAa1Y3Jk8S9eDM#XmMw(sfgJ1Rz9XxX~6D*b>E2l;n(I#<_)(EFOl(`pCv1U&*)CO zMlIAL+Auj0)mYj~iYkw;Mhu%y?_<19OfpnF@6K2Yi%2RtlM(zFN?=v2^idVp_H45#H4{a+$kQygE zbSz~pt_Ep6%kYiHZW6oL>AFDc_%l+!?^q9o@%$0~AFVWYo-pgiENDFz$vfhlzZ;~e z^(6eT_{C}5UvUAo3sQ(bXMls?Ng%1o^t7}an!!3!F;Aa&rST>tO3?1B7epuKkukGL zb#o*)0|@(4yb^^LBb|Xogl`Vb1!nbOf-$a@-}!&MVoWlBMh$BKjjQ*po|-v8QjOA` z0N_Amaegq}*uJ5Kx_y)pg1LUsG4BpH+Z-h1PHY`TT~8kxwvI4ixPzEDc?GGLn1ne+ z3eyJA?P@ffHKK8P`FDuUeHNshuIl&D+*UWgKK@tiH%xEPKt;zbsQ2z}6`8!_m$UA> zM0S=bR(f_{9egZ+Kd;loVZE6HnXN7&W;cA*;d___v{|@4)4@4!)wXcl#$+r;pf@X4 zHxtFTI+TB0<@hgQ1-i23c)W0D0+nl*Fr(`7g-^_eIW$Bbaf;`|$vZ+pwUxGJQ8Ux9 zynGZ;G^7CEu+b?>j^2u*_wFt82wC^R(zH#eX=91oz(}g~K16K}#1=shng6PW9xhgo zR2N=>A@arn-8C>*^TsWfbGH9sWO8}046w8*yYq>a(Anws34H|%bj4Mf#X>~9HA zK!R&F)ej%<+N8IEc{8wmACOcRP4C;6JxwQS>#f;xR#cm3IAA*Zhp}?^Fq$*5cRbeZ za|=91)C$6BM#3s(1o~2)v%^gn#Jvislz0hM!b4yAnjEcPJ!bZC&Q`&8Ha7VAMo6c= z8DO3Mb0(wol1}t{Fj9){%klLmgQNT#cw=@Dp#3JVXO0s3nl{>F1J(0@p(6Bo?qO@5 z5WF9~71m%-;|i^>d)1oz+&P{Do4wo{FQeykwf`PATm7^2Zv&HVW#=K`a~YjetFo?H zza*F}!GKdo?HSUdV;Z!3nU4OafItZ2D;UA{8PXH5?m&pTva9UMD`oG=kcNtlamXPW zahP|NMM%`(e(Z~|+3?QdjIHX(cSf0pY5Yp~Y&HRp+}CsQ6aQuQe|;DG`Rp3+;qL;h z$fH>m#p*1|H@PwH|Ih_?qw@AxJJyPI#YmnqC&w2nc4oh_rDO!v_QAKaPUIfEqt2!2 z5ZQ#XP;mqH!+zP5)%S`{i{uFB9rq^FWW@dWrX9#^6|>k$CZCZ65$V|aT-<_+kIj2= zC2ES|pIp=Nn&+;M9oNm*yAVmXHB$-k0PGdIOB;cKa^)Dk5R!aqMG0A28lhst(_9JtC<+K}ovfSY@0#O=U z-Bh!-x{xN6A+2g>;RcsU5`TWL{dYtvaN2(kHVOU&Q2t^_jlq7l??(xA{dD1hCT-l7B&u%NOwx&}F^Rl+RgutTsS zGG6MZXa+ak6OQ&;fE+r_w&pF0d)iS> z+_Xv$MQiy`y|*l-MjJzl&2+W6wv@K}i~BJJ9^Z^OncaW!8nYNH_kL&2bHr8}smTs; z_6?L^8q)(SoA#kuUtR@0*Z=xh& zDJzy|2Y>+?(hhm|EfiMu;}rtC9I+`>Rm|5>ZYo-Yt#PBj10IeZ)4?gveDY_gf@|%g z+4JqufiR$qTUhSQumCtjrB{npI5$hbMhSyC-8U2`l5$1ewv4D^C|JdZe=(m@Y%}LZ znj+DGbDy$lO^hhICl_Y4_(YANfp0|+jDtm&5`0|w4F3HrDfZWgd#S9i79X-_{aRVm z`$cgRz(VYKGwlY~%;LhW#kKY;6H(i|Cibglsox&n;MHA_IDP&NE*d2rn1-V^GfWh<;F^$zh)HB-IZP_Y1%a_O@Bm?CQ_EQN6FTatI4@Xs%c*Uj(xrGJqiNR;NDN8R24m`B z2Gm+%4Q%}x5Ly`dh%ld`0 zLwJzrG;I*3cB}vPJ^J!WVu|>i%}1*&tm6#IC`UG!;&-WSz^2H%FnK*&5hHL%edg!r zH{+QyTOv9owwM)~W(M%`jAG?AN6l=5A!b&bS=o6yAM85o@@8klvxDy^1Ydu2E}k>@ z97_IY`sX&kz#&gWZ)OGe@41tRs84Qr+xGk~-NyRWNlJNfVw;ENkMWVpo9hnhT9}-; zA*c*tQ6fzV!|jaccZwejC4F*~PFhJeJRt(VMO@xb8Wl}YSy4$WWe3zVnckbBHwu{u}NnPKU2dEqd}-Kn8fr<5-x z{Ok#p@s)N0@|lP{qZ}azN>#NMRMoO`^tt|5_d$Jb+*o{)UL1D>eVI$Jk2N!ghM_$m|6?sMCnW><96^?j-B99I$Y zliEt&>vk=OE>Txh!m??X2pDmJ#rbZQ%ZJ=8CtPQT7)YzCvf67T6w^1$eSY$b9DFmn zv32|Ni9T~CihWAw1(iU)kc6T;+m`knzS<Tr)V`!Qjmj;i={kJ(y$X zJ*7JAyAN5uqn|`E%62+SDdJRH@j2p0A#iGdjttp4Zs{sWKcPhFWse@HDF#-oZ7~i? zK}QTXR7S&pbe*B4b(L5Dqxf~f)wSpQKrL43i`_8n{O4SnWMit)jS{zd0YPFPSrxQ_ zf6i(f=OM-=;32v0%&pa!(bW5XGPTC>Sx~E5QHAfDM=no#;{?}uRloKda3uHIS06lq z<~8YP zXAygP0}0qfV~QEPG;I7f-WHAIrRJpP*H}{K;Zh8dZOUOjk~I%b5yZVY$oLB(1ZSOz zB0MEI{4$7yMYDHq_YwK7x~gS8KkRPB{>-46JK^cBpw@UD&K1G!bPNg-r8;ik)1Hn( zK}gx0ptU5u1{9D#t`N$0P1e<#J-{AV-q>6TDAg_Z7~uGci~VRn8uWoz?t3V7xKK6y z7RPzn*?x*Vg;$6UO)kvdn&}7U<=4EA>8lRj8+YrSuJW9RhInnS;CD&*!H zsDrOvx^!VpnKj2{-47UkE89GhCDQ@vNthY8 z=s*+D*L9VKJhVXsXe$g(Vs~~!MmTIs9VT%~FpC0BwT7T_Nc>`?(XZkC!k$f}6!|Ms zS9dW-VSWk5AJqT$$BNNp?c3=C_xY1Z^`Rlb^lSBi(UOl67J(*kwzUN-W@IG)IRovU z2OsL3z5x~gJ@1^=+wN5b5(W2miI#rs5|}(d4+~@EKnf$O%6PqWlA6%JGXXminG|=J zc~Upd$<@j4QQI$-_-^V`>`%YtP8Az!pWazoSVlm|>Ai@QPGcr7Ux#w}lV9hTAdx{* z~x2CGs==i8k1dw5FW|d4`cdt)NkPgoh#+v)Oso^DPAN-q7Tzq z5l@s@p*g4hR>T~XR=)3?(?ff1MXx}|*#WyWq?FLBN~f!YzqV)XU4RK8=6-a~y(mcpjI1Ar!-^u$ zBoMkU;N_V-RIxl1eT8zN6ozsi!$Q3zx@Nw|bNuyLkj7W}9{SIw+erKTf|sFBRZ{c| z|3-};M={;Yl%=nzf$*h6-V8#=migDfCrW-Topj$9zMvvfPESkAUfTEEVXogF6^|^q zW+ymG!xZ^GD^4&6pwZ14|1uPS^4yM|zrt}D5lrynoZ9a+c5ms<>nVsMY#xiIzZ6fb z!*yRF%?||N4J+ziQ4X-phyb`3{~0qgZRbsdb;X}EB9B6Dwc8M$#>uV1)y#6s;R|hK`F;AGMuK*dgT-iA7wf|DqX*mFtPXYHk5vhYY?#>EAUpJ(6Xs> z@d|U!)roz!{nO7fn%}zhrC+HP+ar;?@1ZA85{xsNpHWYhhtNnRSb@P!b`)!A=Nx%ArE?3Owl0|KW)|lPU zx7-rtBUks{2tEIgvdfONq5?}K!rnr{4NHpa{0qX8o7oMlC*}CR zuh8?-_eRzGAM9Do#)IS0u_-PVVxIRjkzJ`!2bZLF0sqkuS$mB0QC3-k19hjO#_7;& zw)4fzv6t|2ZC>onH~3ZsY(}5`pqai~zt7e%XFB?``PW`h&=sD|*&HEwFE83GbecyF z5DnyQDrsFclp1}^Jy;FT=?{2TyMXxi~cVu-1IwLzvs(|(SVRi znnB!ZG1p_|j;;sEKmHlo_1Po#J?2$dYpYdO5zQV)1CFDIPsih;(UT~%;A)K#)+X%IIOeVtj2=A?9fjWK_b>ZM;4i zV{AMP(pAL-GNQFNom<2B_~S>-6*T9bIG8?XITO`DLi$d>&Uf$a;pYicH8WF%1{5Pk7cjD))fe`)3$x2L@uRiVA3!DI92$HD$O-$m zD`EH#@AfA)BA5}(e(+_a>4`pFp|6V*FpV*8Q%pmnxxujGfNJ=PLMbQoFP!%9e9DMs zA)J1zrIz!Z-jppnfd^M_cisEz z&hHj=)mNC*D@#m%tJ?IA5DdHVojwgDR+!htbD4L?tlsC-rJ!O3>(ub(LC93dyDvuP zAR(o4lCr<+JTfl{*BhTxWxZ6FIL3eJ{p3gca!ZJSF}GH-{P4C@j$7T%@zAr`4Yk@_ zTf(^M5TYPQq@*!N;O?+5bs|nv!M)-}a|a#=1ST%6n->T6Wf@BbVBXOog5Jf_cW-#o zlfJ9A$9?;+QdTrm{Xt=>$)$x|-nEj8G{C!&ta1<$F{}VH0fzrtE?$41tie8GXN?~C zzPgm{cH^yrNF3v5Oo_X=IkvR#1Ku!9^Vi789YgJk-`AQW9W%pr=C*8X9U$+`3*_~F zw&TLO{U#Tt3em7oOTe>D0gipOJ!nkwt55t!h_EH(79eCOF+--M+io?vl+6QV_BEz0P z32(}y)v_%H>tsFt93s1qfU6DvUfh^F5C}C`RSViUdb0G8eqs;!4^wDyRgv!(l_#Vm z_t^k>22K9t{o#Shc^0Xsw*;-Pt^Ynl2bzTQl|;2Ap(Tbv#$hNhK`MH*}i74N_HLMQNnX%CO zenao&i1?bBZ-Ksl%h7V!+zW2&y%j3;lZ0aX)#eydg}=NQufnq+BBkR~m~+Pg9UJGW z#p82HMk}joWvFOX%p}5OZ|K`ZG02JI2;8eLq9?Vb&kf(_;G_rW3jgzBXFsJ_Ysr%K zHy9wg@U?$y?YhpKYa6ei?x4uR=xueU z=)Xy%t#HTH)qgYWCY6;}VCDy%ZIdAOTSqos1<^o&mV@zhJW3v6Oy*B4qv~ZuyhplF z<;}@hUeY%g61}unfudk(x5#d8IE{C$qK8?w$#EG*sd~>XSm*d5zC7ta z&QPMNX-OUu`RWmY7BM>rF%1Cz&E`)bN_K~=;vUcP?Qb%l@=Mrj-21_nag*aSnDl=o zC>?FuFh#oXLdUxw$5B`c3^autPOJ@aALFcxdv})-p{ssqm|~V?pVc=B)h7ud`IVxB z>$)1`S~DL$oB8F}$3ZgaTjZl%$yiS55KmkJ4CG|hf=IDxV3_JtwQ+2mbYLzjv~FK8 z42)4(Rz@sw7e7ok&(8@Sr0G%mm*al!$k?jcj8GE>u}Q=hJ;`zSyzO{1T2vSy-j5~h zcitPAJyaOGx-m;SUCe`*|7efTNBcKf$V@$X*=|^|Sr06OdbgpqT1Zcu?Xs68;|;!4 z+x1yZ``*KEOcO>NL(2q4<;_A?oY;e>pr&`!rn7;CYI^9Kqdz7;&h$Mbf?OQStU?+% zLprn9!Jo7C<$K&mPg4Q(i>;L-H6e zUBehKbaqiOsfTW8M0uZ>_*BW_Brr7hoO-gOwk_UY!qt(x?viKI)P&2kZ3XsRKIp_x zE5B_OGM&I%l1n+G)DZFh&XBVHv8) z?sBbS-j$fM3GecJbKA7(K`HuP&k5&9jMAFk1~8_P`aMT_*Cx5mnoi&(gpU<$IHL3l zMA>cE02n%}l=iZ`$J7<`#sTAqGH3xFQ$08LV-k{Su5{Wxzby9P&zXkmYMZsnnEok( z25a_*n;X;Bj^3X9EDqTy+4g6#mHuXCwURp-*@HTr(QwO}Z@3_YR$F$ZS$Xaac|hg4 zj5exxP%eP8yOo?-U5eZRx_-VW*hOauP z%D-ujUTCd)H|Swl@ajUv)1+;~f`vxydph~gjMv2(JRH5^=W!WxXDRN;+YOlt8S&!h zk%17&UmJ_EQ#;DrI8*#xKZx$>Z0q$D8-Ts&)4M3!7^l{e(R4rXz~H@M5c^KS)^Q+h zg>sRA{V%$yq+vy0++Qnao#2kZgO<0gEvT{2bMp$KGAK&-#t1=UsQbSFUPDV3?-x5v ztqONagb#1~C#Hw-ULcc|m!cB;iuw7^8LsB;IAZweLS9DK1;mzf%WNPZVk^L%EnFFJ z^jDMkHRpW48HPbEy=ptZR_zD;LGA*0IPGmq3te#%d7bq&b284cG$K@_&hg=h84p$r z>_07Z_>Gv+{*>#QXY)LO%7Ux6+f=wz527x5o(&f#gs|KN=WGv@~Q!sd=0Qd4+dE%jm+aT}$ z*{e%m@rQZxG?ROb|4#Iy#=S(SV{y%ae6q?S>#L$>wJPQ&F`?1sl@OOpx0}1Vvi;30b*9ny93BkN3pk z$~W)+pnVN7+JN?eKhENx5Bn&UN1q^-SM*j(ddkf)YFMz#Ih zJrJ0^$bR&W9!BJf_=V-u1l;KYYvB2xcOGn%j<+(dN)QUh()Ax%b8Ko6Qy5O|5E{0h z&C>awRwBq9%mLejJ=@4Vau%ve@p}RB)oHjFcl|owMblL0ryhfWk8-DH_8--~CU-Cp`bjbvl&b)Hzuf@`C}RMNyc{LFdLc{C~(hVO5O_#&45= z*bh83a<8(oKhtB7+a3F+O1&+23fM=m{IbL{YO`G_nTGR9S7eNkv+ z+EL*F#4daBy3wY~aW<8fQnMSrm!^jEpUms*h&Pm>HCSt zFM?wc+YWpjvh#8H-I^l(z~OpNyG2w zU^OImW~M$46#F`qEh9<)0Wj+{nkVl9GNT3%4NSrM!C%x^?3waaM=nQS6^`bTqprU+ z?y_J4vR_4F|Y*eX*t09)Vab;z1IpFJm=Sja{xtFKtdyuLI-qSF1 z@KuQ)-dN+MPYK$e`{vw;Hp|fhJ(QIaLWBpKb)6+WnvuA3V%krpap8X3IXe0e{$2xw znPa*Wu?KiPIKC*elw_lTh3Ksg?a4NIxv!UmMY(49l$19D)Rv@4!o$Cn@WZZ>|6w0H zWE=2SsQ)=L9AAmv6q@!`4pi0~W4SQ&IUs-?R}>LbYpd{SXz<~gPvnZoj_*0E-Xo{~ zME8U+faZ}+qF?Mx<2bg;f!f-)3ycW`AbE1nKL`6hP&(j?`AKq_8!df-FCr1PK-qPg& zOh^NLKuOyI*oWN~x^&4j7^76354s~kto5s>j^@GErOU3*1UxW}`{I;$!5s}(pZWy2 zQDLVyLUQQW$JcvG32ziXAtJP2P2T(FRLJ%CG%YKvvI;2zgC^w5du$F> zJo=rdkoF-@EX+7jm6OmVj4?`AzEv&Xhz9X0YTQ^$1uOpcs5y}t`7HUaFbHORvtKf?ot zpGvWxvrtzt1}%GJ_85u2`F^G&|I+6%t6O0{y4Hf&0_Mf2@p|OL_|Xv^MWl{>Z%e^9 zZk1Fe9k6JhYD@8x)zEY4Z1bO_;bz>BNaO`<(4qV1gKZ6?h~n!9(Se=q4xhX)UHez_ z&c!?DB3{N=Ay(e5Y{-)<<3cvtqei*Q&2R#HM&O?ZZ&8Me%BC8Y{mrDzFgw$#jEgME zsMOd^`%+wv7Vf=MK`Qx)AxnGc3`(HGsP<8od9M3_rP|0`=wC;?6CTQ^sLY{CgW?b8 z|5bcjFDbn$BN+!5XQwLy&19i<+qBG7bBDRh4vwXn#xehGBCl?~%~_GUV2CIMc9hIZ5K0@xUxx0c zmRtvjX?NezVFpAjC{4oB|9t;pR@nxBi41^RgQX-oY15mxFC1?US!NBkFS^^EUFa8K zX!g63(Gh$zhGLJVnpQ3E%yqc_S|l;X{8%^Ir#s87{VQfDD9P-A7RV4un{*P8Q5JQF zA=gSbFZ;?cphjV9_0s$(9PIv4^3>6Wa1uU@uSA7*C7%q_^)c?o|2bpT&^ZN4d)&Lj zoP~9ysYeP1&W?`G9twjsMh^6^4*EjWCWd*Qyvj9tZP9?v(e^S~c`bDR%3WVqZ{>1U zT2>CDSe*J)|L4MqC%uV`{dlTD?(XkCb9ZG-6mhS&A8Gk+V}Ro-9j9~GFO;mLwPj;z zH`BZzJ?M#RAXfhRxf6gB44Ho<=2_wVT&pCI!E^g?A$l%_9Jv9eua<-M*uu;^FYLGy$vIo8q=2Tu|_v6c|Imc&>i(@jZW~!?xXgiF_WSN!7WUQ2( zeV%-Pty`s>|5$5i25IGE!I@0YXT-jO$8Y>-qIIPdmS*(h@q=oH0$*(?xZZPq)0yKD zCbG;EqJ<3K1a>`X6|cR9`%4QA6oSU;k-~H$u+-~0DZY%{THr3MWCm9=4^}R`jyH^9 zOAK6&9|XE%HieUjH{Wq74(9BJW!gK6*PK(kX-X;#p1qZUhUIPd!6P8H`PXI_D^08; zdim6w-Ds=7pqU00I;|?NU2@^LxQKKp_;bc+3TG3lYZfst%3(3F6ROdMcO9tPl8A}} z#-iH5f^M+5-Zh3ZJ*;9A%%;aHL*Nicx=rW_ZVBbZ_z^KWj+MY(*eR7dHQ4znr0dG5 z>%5Ur)ax)<1mE157QNv zLUzT%XKoZ*Z{J@2_JN4J|3T(?%G++Ncp&kD)vdoS-Vt06y9+jO{seB^P3b0USc1Wx zx7JO$AzKgN0Rc|}GmR#7?$$xZLVc;CU0Kemrm?1u)2+tTid|V-!bF;dl{`*FS3buFBXk=JVufz+EKZm|U+mE3 zsEksI8t-P;yYi2H-|_f|+5bb?w=Qy4h*W10>72n_YJkQU$Bp_HFDHoUk z9DSQ^3xW(?__bYbCN}$*j(F4kqnL_ons?51Qori#5cEzlhOU6QbV=@cwqF!K>d9Y0 zQ{RZkOH7(V-pMlNbj!`>i|2NFW?WC~Ziy^JR4gre*%hBm7neC3ov~-kG(K2ZavXUy zoV?&LIwp>5UeD8Y7cP@GS!1}~cTGuHfb+jgb-%)n-J$DS!3waw(Es4p6j#Roo3Y0xi>AkKmT_vV%ooV4Gb)0ed0epw*SDQ z5>eB6eI`!NYEAC@KTEC(hu^aHfEtdmXMnM0>^`iz=cCCyq{S-NU-ofT`B~#FVSA{` zESE;$)bY9mifCe}|L`#lo$k3mHeWZ9QIv8weYI&k&lN9#i6^4(Q&n=kpMHURBdEvT4x_>+-U)FFXKVJaL|b?bl4%-|hF z?Ytkf6zbBniIjBks&F-;zpRw*lpJHgF6BO zmsFk*>)U%*aBwDtok5hCCr<1T>GQbM&B6UNj+V{omoNAzc~AK+sZ)8hSqO$4iDe>(f0e(jsH_| z3}i&;iV2RIy;SB-`*ww^5Bjt&lE?GEro!+gJ8XnZ)S*OXs$SHSor$r(lIKTQ zs;|VbOH%JVm|)R;VXWhQV>JET%;KzX!wkRau!yH@+-Hexd{)*QzeJbV#;55HvI0@HI3XnGTWo>I^zF^AD1|$h!R)3HY+%yv zGqP|jg5bQkJG~D@4wWqIp3Q(#ATmp~c75XtO>@b{>gXc1=42Ru(=up1t71JUWW5_* zi~4Q(p-1a1@PF49e`K{lspk`C)>7@f-iGj&Wrx0yU$JfC))Imj(ILk?6|J`NzKf{C zP@byhNylfJ1W>-ChBWYa25J<9zD=>8bx??B`18^G0R?WbUxb-=xY5|@nkwU%3GQ)+ zr&F=O>tu+a`6cWI{Kk~^-(S?4tjUu2yX^TaQr|ETo(JQZRX(Xr| z@me}YOvGKWZbV|eP4O*x0lhDXu8)dw-d!g2cN=r>^3~1kovmtq%34GbDO^9#zvS^X zPRcbM$ot-(&3(NDeYpLRJ^xj>PV=SW3t9gfMFI`lS{H z#!P0?HgUC9Y4-vhTtuFSmu@>EeO?qwMLG{6_A|-aYWf#O)ERcr*;nc#Eg~#TlF~3n z$W6~E4~@l6pMF@9nd0w^b*`~7I}nP}*PHI&vlsRzYtFA_#>&HJ&U%N&zN%=(02YJY zJgGz?7?uA;F8?}~fY{4tq=Ch7CE-HtZpGaj{C8>I(NTF(O^-` z?Q}8)GBVjy@H)T-PmV8=1bYh6;36$zAvp2i_T^YqWdJ7c!n75i1L!55a|VqcTiW|B z2GVC;6I4xrqXek)(}|<5HF?r%uIdNdS$F06mrhcW*W6SIim(>SJHTg#KH6KWBMbHw zmnr1C!J#RJQTtXCyaJ^ z{AEYa5lJQU&j{PllUA;w-3l1yjxDq@{dgf-f*FhtK$09X?5dK=heB2|5tsn`S|04& zGoqu{ZdWmi3LQ1?U6Y||Jsx5L!~UXQsdG5py0epuE+1?5_=D;(c_p(~1UC$R1@ zTdbNEZ5!&^d1skyR1zl(J^%f=-c}RawZ1K`?(3eWqHh2-8ugL>m<28OtBcF1H?vAx zJ_D9|e|3>sFWs+Ffo42=Vpwz$tn=qbX>XPF#b%sjz?eWUm4WQ><)BS4NV2+cY4*h% zu!5csN+P{)>6Cb;*E)Gv4TvR45@C^7t$|?1?kwkj;MYrG&e$*kihn6Zv;Qe9N{^g? z)TooIzU!%=B0A!_G9u99%nGLmP<-ui$s@P23$m}Q)}iqod2-vCb{8AV6v0!VVik+1 zzl{}vOB6bL+tF`Eu8{?oVmde{>5iPL;;4d?0IlfD=MXtu-l26(%|x37;Y!@A#qzgT z#}hR9_AG{8h&Hw19JtMjDEh0Kv0)q(C?d3I(aY&^9cd=Ia7IlGxec;7*Ye5}h{DcA zpuQ|U>YUk|@6PA|O`|Kg;+cD`(p!FoTjNmjt+|p%T&(!2&Y+>A;SSpa({COoL!zb? zUt&({*YgCesAFYT@xg;mgYQtFg*J?v+NZ!y6(K7$ zyK2UikgBpvoou!y=DI@sisrmJ-!!1V>5XG~(zD-9JI5|#toLdGV&@$4pSEYDT>`Qv zksGqaIo@XNvdVYgJ4<^hx7vP3pDbY3;6fa+@AcoF842|FLju+;_58r8_Mgm)hCxA( zJEb#Sn;I;3T_9^GR<|;0&Z`uZt;FVLDmYavMXvmJLzQZ5zy(xfU}}I!-@SCJGj=J|hEmzF5~Z+3-+)f1X=+}?mIejB>8@A6Z^5fOyA~FIY1nmH`KqBa4qy~ z)Ut;JO0jOAHQEW~0$=AZ9zCW%{+t6?Nr>jGX>&Rmg+Eb!LGdkz0Cc;+GGJnZRoFIB z)&oNb2u7i@s(CvvP<-Fl^f`%!G9qozY*y$!;>mF%?saqek|*?pN9NBryE~VMf^G}u zDik%Sc%dS8bq6eNrFb_2_V$fuKl4A>LD`D0-IJ*<+zkzG(I3%{bRB+_M`l+xalVX# z(O5O0Quh_HP+a3d)g$Zf!FuefA2)znYFAPg?@o7orfYiv?|wkpe0jnbm5;HG4!d`0 zJ4xlFgaF%_q(WyHUW-(M;cZ93K~O`zW_+d3F}dVfiC5m;>>d?pWQL50w`$*H_2Hop zM%{@T66#?;>Faj&?Ft12kco+aA((Pj@=Lb_cG2CzfJbw5JlY=d^&p1IcC+&eVhk^o z0yzs>(22$|>b@53X};p?XbhyJL*v;e$%mU5-+wyqo+Pp^QVLD*C$1kutM!Shl=uai zxy9W&{VIv{@@>J&v-BB|7bU|grZ-?W+t3rY9Y3r{2ePWYa09fX4wlQ?**zfV20!6iVZf!}ZE~>kAO)-lt$+c=s z{#Ujkdh$4^+AYoYEupo6p$4OBeDw|8I0<(wq99i`zo4Vhj$#HWIyO}9-7vx0DW5lF zqee(MW~u%MTy&}u03T!1)3X|q$^e=HX=~F2S1_Z-Q#Qg@!?y=z?m{#~eLl&~XR)D< zXxGm%hxqMt{#cY`R)Tb&||=X2~_Fks({UwbudYw83KN;&Cg_#?q6+xiLBeYD?TDJc$xzYex=xmuvVi=@0Nr}P@bb%I;)9a zhS+-d^Y^F84&*xD_1d;)5xvbD$|a0y|K)fY=jE|KBE z2KU#DMx4YlDe@N*6vbYMN8m?Nmzs20KIe9ePjSHzY2FzBBesj(E`Gltd1u*<^jzEL z%+5>KAHkXt4F}V=fKQ{HjV{a~R-Ium{Anb`ja1#st4@IsuRI7E#VfHA3PYwdmp59d zrErH+p|Ng#;%s32ja?i3@l82^QW&TZQM{Gqjtn8PbjHy6om<`p+?ci-P zu`(!KW?fcM`BGzgZCp%F*<_%AscxRw^dRX^njKTwmmXr>f_iX(w9?C?f_}*x&&q8#1mTYP-Fc(u28Lh&9`yd9#W@ndr1p&GnO3>;X;)BGFWw= zN=eFUv;-Rb-mnq(R`N1%wMl3qP^@=Y<54ZO3oI&TF>WRcDW(|d2hwsa?~CnbkG$vN zQkQz(c!G!m(dWQ@rX7J7U~{z_@*&YU~CrTsKFUfF8e`9Xd*AP`YtuqJlQ;Xqg6fbkS5Kf;By3bt4xoXKX$Zn(p3{G9{N)A z;)7%xkFNRbOx2FjNK=^-axhuPBSGyt*}q@o(L~^gYi|RU?K7?$dc#q+i>gGOW+iR~sy zqQqtw7Z>amw-`FzF3k8CVG7;T%-BIvwiC+KenA4Q}&3ZR@BZ>rKFQLvLYR zef@#@8b(KZiViqL7auSm>S~!{J;RT$6aotk1_52wohv`sI=Lk@-JN5`h*C_j5PMRN zCJo%V*kRxiCdw(h_rnq$Icpa*MZq1bLRIYJ4Gq$FSfXBf(~FLJ>wVrn9r2UJ?rq3R zn-2N0IC&?j(B6&yQS-~zvBjinr`J5CP-xu}kF?82=eVzGF1??&bmgvVfk8G{#KbF9 zEjuv43fLwMiAm$YrIhh`CC5J*4L}aueP*E9>XTTXLbcI+y({KR@yVY}={3c!hJ?gc z&)p<^IkNZeF!UTxA@V55@@9X174o6moi!c8QV`gE9awD`I+JY4MN8C?8BkYr{Aq5b z4WuE%i>{Am%5ftwd3Md-76;Y^<2F);byEeK6BJD!e**R)&cCSk>RP9Z00-LXv zeh{X1DFXm!`5Qm0(;5MrL#f7>y2X{LS^?5k|RTB#s52|R_>fzBH`Q)6l{@@*!_{VKX8djJc}^Z%cHi$=W5vkA zY3MO$pi)tzp=_mK$}%R_HXHBHtnWdG3t#^_-e2RucHMYe>hb{+J7)n%-R#{64oXxP zGqB%cU*>?bu7uJ$#5&bu>PX9R@>_weC!mZ7yC8Y`;2HCYfOelLDIR{j9P#eI#zE>u z(o|Q^cRR_RGL%p23E*4vW({~>A*%=!yJb^d&`*_*rzs2be;Q8D7+HpV*V{}-n3^EZ zbgndkcd6;@FJM__dMQA5DkFsY+miOj`iyT-J_3g-Tp;Z2F(duu-)$=Kd$dG)rYhb| zi@b~HwbSNCP1cbTDmrOJjV<2ahWR*Cr_1POZcK|wA)joRBx>+8Sp3LtDSo^uN0yM^ zTOT+WHSx+3&pM~;&JoNYT9m%t5qae%3^HFYQylUzlbkS!j34p$W_{9(-a{1f?M)SU zYOp12VyU1B^wn+M+Hvs*V=r<0#QIvac1N>0H(Sk@7?x|Lmf9xeH_G>~NlnWio&D5V zEca473J~*eyv--{9jgh8EBj!^sJuDJSn9nzEG+tM&tg+i*{C8FDYP!4-zU+m->^2{ z3T+K(tepWaebGN=pmf(jV5rC>X_!52Tk?7CU@u#(u6h)K!#=@QuO zzzxQG*9tCFD8AZcMBi9c*6ptXF`@j24!^5V9*@4ass!dP71N{+E{i8QIm~JORa+w_ z_g?PteMeV;@nW-jwBl+)!o%B}cw7@f~^trQ8TTS5Xa~Mxm#Gx=_ zjBt&q1Gx%}b$xq#h7nGnHTsYKeuhlYW zRc1`ccSXdeV4t1B zDWJJE!XID#t|HvojoOzb8Cwj$PKp>!uDL3-54AU+uHvWNSlC&fYfOJ18`(!ZZ8&Y1 z_Nxf}Rq*l}hsO?A^n)jY={gpAt3jNzpUcZd+}$7lbK@WVfmP1xNj151VS<_&um@`z z>KkK&1NFfO&NrFXtQ)rU4Dvne3!J)lvs^qkzKNHlo9m>ml&+9Y%FHU%)Zr2w({a=? zU3#OZI+lJuX|~TJKqe+BF)0yib7%IQYnYC#6HTT|W3sF{h2F0M&PEX^2mf^%oIeZq zSZ%6=u94YeE{#E`%2O2!pGN&+V6y@+-e|o|C5|)n{Zy8ubMr!UyPX?$w-Kb2KL8s= zW7ze=sf(Ds-g#8x3>(*}YDqAN`=dF#=C({D4=ApO7?10Mc z$Ady&ch2)#eSH~$S8PqdeH`%f{+m%Ur!BGpMkyR9@1o0BIhJ;FRx-`8>3;-0x_#3&6XfPIF^G z`{@)~8ixGYAuOYw7IB%v@tr!3AL;4qx32>VytQ+C>UuxY)rjV!sDFix0W9!N4IxV|v@&tTu%%lU%E1^UhkZe%g&M=|@~jYJGj%!VSsp;zz1{ zzpkX0996pYpFL>Lt@w}8RNxucQ;n5m)qH?+&~Tsb2a1mV ziV?NgEh3GdzoLT444;6CMU=;^Lc*_&tnQZ$nn)FMn>VFn>~~m{6`3uQgxj@*KAV%!2sPKo`&2#7Q^tVhxI87|&gf6S@t~yC z`U6r8S?Zn(81K%U>f~8alu2jWI1MQ~yKRN{keNK*pbn`eO4tVyTgH#J45>1TbQRCb zvLbtL4auyze&g{pz=eGU!AK~-xsW1bKd$;RkA3%~-sm9n{Dz6?OjaGfMSH^t3R#Xz zg>o6z8OcL5F%Ap)(rd38Gm^iBr#9M{8YFJtBxv>}h6CaJ+wi9oaQp9+)n1U=GQ$Zo zA!J0j=Obw=neufJqCoQ+4`?qQq>aJ~+lB2JX3A$O@d{cPB)9bzhqvvhYduFW{H7DK z|2$T{It7yR_}ZnF&lnXc@!JX&U8rLeZ>{Y=it-AZc)u;0W{;Am9om3x(nt5bmVvD- z>{vu_J7l50<~k^|CIMCe`2J|$z1bD#uQhX&j^%FWJ8D6z zi4Q2{^v=C`isNw2LN7MiKUrtlS+L)3=n!k3GzTZxKP$6$>KCfG%9n3Q%}~5AF_~mE;t%=D+}SSF$F_%6%pJBM zNxS1;Xx6TO@pd{w1qPQXGs{()sjxDT+cGbjL*CjqxcBkhhS!pYrVv(Ftc&Q^X;jgQ%8G$6=~n{ZImfw6l~#P%olCyy!%8)J zA}s>62*VPpKb>SR8atvV&|=l}b_UyY(!Ks6RoiE$itHbl7iJ-+!I3}4b(zwqk61}# zdx>tu(CfE~FP>a-;xT;px3h$50?Rts;gYq}`@-Pc){`e!Ql>cHK(SvgQ&pEbauTxG z68Gj9b>{sUr-v;QCv54eh*HEGsX1YrtM6)-WZIX_4d|4=N&DzVJIlqigrpLOxrfuX zdr*uv?h-;w1=I~Ry{oqOuOErVu|_R5=`MnM!IMmo#p?ZdB4DH9qwU}X&spayO3aCfMda%RKbTLD%C`uWUokR%Wui_qv-(ENCh>y$UA+UHqU~xbKdnc$U&Eqk zqOiCMBU?B$qDQIAWlIT%orYVW3pTj+n7-T*PHjX{aiAS2K%`~V)$3HDBGldfU)tQh_nh5CT<`} z|9ML9=Fc%fraJ^$snac!EA@#l+nRZK$cN!KJ0b+z8WpBNIPWaSh5By?=-k*Jnund$&;U`YC}|yFh&Lf-7;Qb0_42*$}v}O*WxbX2pjl0^G9_8em~%NBKe56 zRZ$N`z=ICf*E0rXg>hj#S5+E3u#nRa6#vu1m|*K@`7t2RMrm~OF7ZBFVj^8GGkzzb zPODc&G`m5XaS|&vjpR2=!cco~GiapfJoSS@3w@FQomUC`VYD%#!V~xBw5dmifIn6Bem{k~6ROsH{{OfAR4=J*!BvM`2w{|Q>*j@iM_-`@IKSTZ; zgstgZ&Pgn>eAL3hBLZbmEO_r%ASnGqc2+ppK%ZJl=_g2G`IvQ~9@Q|}ZcrQ0bL@@$ zHNU)dYF3q7Jnzu&hn%w)n!1qBMUB+8$9a~gA0*R;M(TgOTqjrjjc;Reby;<$M}9fj zcXlGNWtYQbh(w3#@T(=Cf*5D*L9f2II^Nc&CSTgsJ3&fc!|h% zKd9jHrb6w7&LtZue=pjNu$#yUQ?#c<6USzGM-RJ`y&u4wwIU z_@b%!$VOMB_o}&~O1)6kk<+rX;4q0Ru?`5aO2q{0_Iz47yaDqjM&!q|y`yqa^vM}k zlde<8^NjbsvV7{xZTnZ-Z=Ckc>*Fx=);hR7)WKR#k32o^rs>pv0r>A`&wi_Cy_{(; zheYDxypLA=7&*-_+}goaX-b4@wU@#);J%pD0$#7lW)H>$S>zKP!&v2k8t0VPlep9-qO9#ny?NDS&F+uqM)^PNwx`WX zs(>O;f$_%^t3X1`9^wnt!1o}l(RO%L9*)I?9QiwrF2E}BS3J^L-t>K%E1zlM%+5VuFX$5<6?3A?LkrV$axj z%M_5lG^3F|jPq8so<1JU5NJs=0#(+hq*js5=ahfyZhA7TR`F8Mx&i=%km%7tHA1ihycy8JA_YT`k&Ca>y(l=Dd4@Vn-?ONLy z5^=-6lWr#~A}_6~TLDwN-($#>wWPP{qeZ>3N?&$9U=w6Ha;&P1g@J zcheaW3f)9epLG`MX)FY1Ej!~AuK_kEaOYd-ZPV$K=c+?Kfj}n zb|_O~e+)o~`FwCI(yiw59ls^p?o(?ZFxly~e2pUHD8nNy7oy&9rqF^(FZPuyk6dCk z1L_rfK^wFda)rniWRLSty{8VzPxF6lbc#jhCiYp$p~U& z&xinFIW|ld{%j^N^-hs&ZQVV*xISp4dkaJYgBu zq(x-6&NT2u|Fn||_d!!!YcPq%4NdMppc@ncQiE@-N*{7XD(0grk?uWQG`8!UH@?Dw z5{gj`7!Pdvk78P4Pf^`-delmq4qug!k99{-WpOA@P!Zj z<%Dss=GXiO8Fn)gKx+w}U>$#HNq}k**?WCyx0Y{Qny&6M_Jg862N(nOi8#rQyPk@? z52xS{k8A*~e^RjBd!u=Vz_0XrO?P5dfvgzd+idM$;@WsZOo*8LStM9 zD_jk?hZ#cLpm6C|V;A51GTOm*b%7;Vv4g|*+(yRtdClWc z7-9YEkaWQN|6J;ZKQQz6x$L?rd0LgxImt?liHVCL#d#QAqI#`T*LDZvnmq|yRtci% zVtMgWn=Pzj-RUk7)tSaj-&SgEr`eed6?#f#$U5Q$#ATjqB1S+d}I&1F|pb} z#Z4dVSBbBVziFM&9`pnyR3N?WFn#&OvpbCnd=i)MDD}kr@MX5WHYrm7-{g$b5Aj6J z8#_zvGZ;h!uK*bn6(JYzVM@ZBX1bz+mhZz=i?QrcJa5sS@*;9qT+X;-!|X%`!yv)5 zzS90bo6&XfR;e*qID5~x!9SMVMxoiE&jYsAz@j@ggHw<8MO`4PqGs zZ{19@8tAx{2;MzSpd^WTwQST9_#RMH!IJ?TGY(T2=UYIW=z*u^>*jG+sL!Ex!dX8X zRjg^!r?(@vhIUDa69*FZ`Whg{Kv5S2=B#A%$8*TJL>xtn^mHhZcBn z?peIVq1@JL4bBYT6I@b;cvT13u#UHp6Z_hyQIH=yif^;hrVAjD849x=B^wFLJBABP z!Jp@8=6C1cmA8LPhOVh3cJJoX+bzJk8z|xakd;4bZ{#i{USD)EX+eWq>^v1`GEC(@ z@CxeRiVA^T4#PGtZuWMP>{`E7`y8t}0(TIk)!z6)R}gZSw5-M+ldadFF zR9L0a+vepzwhfF@MJ=<_UMzHU(qlQwWxEE0di9oAe^=_bOlZ4X}4z-}k4>M*?uI#0|& zJ{rwO+a`7Kc>90X*r<0MU^6Bpp~Thpu({v*-s!Q1WIfU$V4vKz>nN!H<+wfJFz^N* z7(}!^#OBgJk?R|o04JO%wWoXGJaDU`a+eAsjbWn$I%#+9Dz+8F z+#(Lb$>Fx1P^n6EJZR%Upmf(R;`dkuYP4qmJ>F2|=UWt1{StA1jiZXUETVxSACcPG{YUZ)C(^yj4pRqqRk`i>1ARqoREuA(hO+DRd z5RffY9?+cyT&^pV1?IUHDVwP-l6J}KhO-_1WW`hPB%(nR>N{I+8P%UBGqvwQ`Ar&x zwFy_*ws*uAmd=Q~jOM;mdsf=BAtcCZl>PRlnZ`_9qQw8MeNUu_xeWqpff6PB@#APB z4^4s0jd6*trW|{-S^{f9!$U zN*|Nv{F2hml>^V=CDSC6l*Uh^G;m&PsRg3zk9KjLx}7CXRDe^WebBb+vG{9;<9VaY zW4o}lRWbCBtPk_3=ZHn@{>I72%X`J8U0DapL%!B&irmJ-KljiiPKxOfQ z7MN-OJk1aN$fJoFuHuwF)f!5TBcZ1ux@+GrIwR$Bl#oUzhXNE z=iENu+H|kr&gU-}dBfX52*QrweSh1UO&s!z!IXpxARO>_i-i# zWW-=E-k+0qnb$sWn39736oa3@gc@Vd8#1f5X3Tzh&1qjX6qYP$^)xhocwc#XRQj-N zmS044XQF9PkCQWXi?$v9X8co|X%6*9Q<1g>-9_UsvgybY`g{o{SRsVT`CDtmv z1k?GjwZGMnrFY5`V~i;<3#et0mh%!tSKumcbK+4(m9A#2j|86>iJC%+#wzQ)M#Su< zw|%Df!jKeTlI1I`O7vz=fYVnZpjrhNVBHsP0#+dG_R=>Czf7|;26P~DuiIa9sETWU`ip6(Rj>iJMj{^ z6~sik-DXb(#Cs;r+a26#m4^zWPL-!YYE3!3vaAt(rm#Va9b(PYp@xrCsY%?FftST5 zr-%;DM+6z7)Ou0vo?-`e-C_LHiJplE*xIv!d~}Ojg$|@u=OKy1h!fi?xm+#1$-ZAc zOMUzMRc~sO%|WrPVzJ7^Am(A4{mr1_lnLt7um!3JC7jT@e3zn&6+7Os&3&L@uMIdwoRRL@HSnojkEWd znpohfn5zE!=HB8^oX_q@_Kn#;_zPJ|V%KuLaU@Xb0XJ`M#j9zr{t_1;jeUVut~Haz zJGg2>qK#1MpFDN4Ar(&GSY>(rw>TmfP2OU0f@vZU0a*DF_E*gG+Lp!*vfIf{1?`I| zpMZE7oNm`IA3;p>lzWW&ugAK+Vod)&4dQzY*C55u?CW1>?^YAJF4Ay5hZqF2cXIC| zc2k%yxb1VlF;4u=yBDHnp^Ao)+79#coWd_W{^mLvdI8jY`2P(E+;|O6iXcD6!ltB| zw2^^;uV1@idqR8Roqds+a9!5H!SE6FRIKM*&V~B#rOQv71U`~#3``X(b(_b*ky zQxL|v;Krzc#(z~EotHk#U1=I)6zw7w*H;}4xiT`x=0Ima0P<&W;AHv|h@==TKd)q? z1LUn5RJi>`d4A|UJUUTL6v?2`7*9W1y7{RU9ufBzwr*_Hs<-C9k3)QG>sKeSAdZRox|ni@9`{+aDckErn!* zN@>`FkxO*HWjcQXrwb`HczXgFi!>_Md*3BgW)_zf_d2&~t{#dh84&Y4({$CiL7h?Q z?CXq8rkMHC|Dt$f6A7VKXGR$NS$TD{P^ZCNu%F=6h5fAdTI}tPd2gEJeYotH!j#xq zL>LFPSA6yKD=DVW-uoA<*nRVJJ}F^`K0M(=G@Hia-_;9*aqDy2V^*?pJTM3P%M!yh zM!h{|uXt6*>bBikOI_YIcI)0uS@m?;b|G0jrP#4N#q~`g4btw(5$@bLekTiyJ9`!pQ9%%mX#eZ_a-p>@wb&1{(g&Ybco zvg;M?Kg&=5RuaAQziTpwbL>4c!HGQ*z68t8I8>YdN`7RRH2I|Svq!96Lrt#xvI5CopK zfS+6g%D07Yf4H^$`za9UGHP6A#w*)dc}JwMbRW6*e*d=84`#4B{M5CYEnqbN0YV`aJVV{Qk@0(0k{;Qh%6O#c&H|b zvW0o~#QVaamGYbzF-I+v&%_Pf@<0Nolkp~3Z{Cv`fSbfR(I%|k)jSbkxbJ>ph}#!` zEAC5k&~%!z9F+AHw$bug7yYF><7lDR9hgd85@f~616Qupo_xkj5n|`;;i(^465}gB z-Mqqc4~Zku4FfE){dG34k~Iy(c^~BQ$=OEo zW_J%(3T>OUO&QeMlsDNW$2p2A#>Rtwr&s0RKUNH`N~y*`Ui-1uZLRE%Dt*QKSqlB( z7BPUSz`phlSc1i6Q3m%0j6`(L-~-j`^~9M7xT0{ZeCxiiey#ofjm;jAQ*6Z;@vC@s zR^OQOTT-OPxsq_Qf04-_x}q!kYN-l=%DTsD4*pz|Vj!Q%wzmEIA^RhtWY6Ji=sNm|z88^-)%%I3 zx30c*@BsAT&943D|GQ>RHn)R)9_kL0nF@%QL|=r^?tjE4FZBLc2>rpsukJIb>K&3j z@8^s3ntpBBk!;I(@B^JSvq-RUo2rFTHefkmQOhUYl5+3Rwa!3lNp90B*B}t6k9OrK z>z0j;(C>ZjbGNyFgebLt$K_q;Y|~r$Abf=aKnb?KS1SM952<4L?3c7oWeCmF9u{TvB#zyk{I8#Ea_7WdG`zT2PD*%dtNJtDIVMmJ5qeT0`VckpgP zq3=Me9(iBHatM5W-B9yiz~)Rdrlh1Oo44 zj(7~ZZK|LsA9O|QE{~4-A=Dq~=xDcuRWHK7m<(gM{EKAWy<5~W9tid~hoMelB_wBT z0Ff^AH4b{x?hXyHPBcn{l)uCe>h*qm??pOIO3;?bj_>8 z*3Wk?{qVwNBcZIG>rHf_piC{)iJfGwUXy8Yh5=Z=xjcZBx>e3Sj&^%eGP$rX(ko)v zixm$OmO$ysA)^xb%ggRQo36+-kCNm6zNu!hqq0zcR(MybKj}F++((-F9x$8G^AY4b zKWjXOtK-5zTR>)rl!(=gr6*`UfM^IVb9eCL(aU`Le;snO13lwZw~WXtpYJXC`%AnH zh8OWlUIQWbAc~s3a$&NQ1&wSeURlG*MJeL%70QBN$8fSOvI(%~AAKEuUw5bb%W^W; zy|OF7H`!$vrn=RlULB)xN1tHxFtI1>M!o^!0m9R1yKfY5A~4&uDb(6gv}~@6^X|-c z>-tNy9X{02bE5skx9+>A2!w{d0S|$_B}uZCoB8_01j_bWIJ6(OI0J(`;CO)1M(#aqpt=wIel@fRrLD_k83 z8ShJa_7S0$p%PhEVpr*Bk52UW<8^%r?`(1cPU4?A!@3llcxL(%%i#B7EmU;Mcw-qd z%PAX&R@qkReVZ5j^cqVSJ^r%`UNQ@Mwe#~1&;00Sm>-*IJvLJ_`_NgRamk!=3ecTD z!zlUIl>Ab--ZY#o?{R%2Ng};WGV=$&e%X?D7H_e8dJ-~Ho=0Y9-{<&i9*4XHFG)Rm za|FjL|*Y}w)Z#wtO*oyO77(7VD+V`zmtYvc55A*6(*$)&NA{Ph#(h+$bEr_1v zIncByOd^PkF&XlF8eRVf6&YC8U1j~;GPHy@CCy-}jJP!z2QdX&8sbVPPtzWW2yLrO z5<4}6mPAo%a-?s=@vdb=0iF8dEUS2pmtdQ|T#)?Jv{frhuS&Ibr77gz_NeF}vMw7D zo6ig|uTuEx8JfvA_@eUI$h!N|#MlcdMlg}~zqcBqklm}KD%{zcoKz5!d4-((f0#PYpr+P%>+3lx zB279{Rho2>-W3D{43Q2A5S1D*bRe9BDrWU`%dp_L54sE>c|lPrf|mQ*12NZD(6WZ~ik%(Q7~9@JP6<#=%cFm*dVG?+ z%oo(X$N|P4b-dTAvn)EG|L+Pn+G7XK3P550yP}GYU*g-Cz|R>@QS}Qe%S1|C)_+0a zr*9WIrjCp8>%==1*g1dq?_V;4TwT7;bT|ReNp4?CB8Z$A)8Sq;b`Jh!A; zkl8ZQ!}m}!MU*&7vJq(uiU9XObo=5<+*r12pf(CA9C!^XNBUV`o^KKSUF6QM5Gjmg zAGVTsv4|Tvujdh@FDeWvy>39RoQZ z&b8cMRVUEbk=_(O(oW-YRitF(tB6hgKMLzw*vij@UcP}7j<5$do2gV- zx{5UF;gW8BSsLg@w6M{0qBM!7YT`_)A)< z7{H-`h1=7l_k4Ip@=u-V?x06{1atPNVxnIG^P#}}&AJ^`#HtI}eK2;9&S0v%QsIsr z^ygs}$NW49A!*SMML{pJ+vQ=dknr`-B@2`^r`mBT8GwVO4hB%&fBZq(0<;S{4#aFl z30WsknrIXhfMY}y7H>hq+)kU5us_e9e}u`bBwJ^+g0nY9M295Skgfd+y?R=}0^+(- zV;%DgZV^`agOlI23E~syrdvD!5K*mSJE*>6h?*L z=~F*6U4sYJB!^Wg7uP2O@m+HA3TL9a0bzumq64Ks2@5KI2T^Is`Z6Dqd$}bYzGa|0 zGo2=|J*31$KNGlT{&tScOu76*b7^u>H`}|MREBL`#$3`tOb9<5FWLvYLp7dMzXLRG za3Zx#$)52jgK~Q+ZPV}N7(V0Q;7O{xdl7)J|M_lcI+qx1yuEfbQ$4YOTWd-qNI52{ z5MxgSo>A0D8{Y!Fx7%-$)`}ua;lNfD`s|HIWnrXe%#41zS*Q`TB{n67LHnRvRd+n< zdJVKp%qe=*ep~zCcO&>*A2w9H1MnAiH%RB&lWDG%QrL6Y4N8z%`%J4@Frh-tm>dvY z>A%zj?Gh`5!u%Mkf>k`LFk2q$X)&Hg!S_7BmSm0*2KN5J!yQf zuDq+kE!$1_@+Hge0U^s>+sr`Rx3X~X#`=8TVd5U^au8FD{k17|6$CMt%ROVMH(Ti$ zIjsak(c_cp1n`H~2}U5(jc=;-Iea9>2BH9m4&mSqG8alob+6d*9tsupZT?wATWH`Eati`HBT7o3(4?ds5W=5}eOi)$+hQUXll-fVX zzjKYR0+2A#>2y6*4!C+SYeIDSDsNfGf+`leQfAZVriGc4;S52 z1z3bid*&BeYr1_bmo_1PZS%|Ip5#*m%PHXgx7_ppqM#&;gGiL1XxOoJ{WBXGTp-58N5nf@ktj^+j}y$;POnm zehuvlM3?y4n}O29rj;Fz3BfUWq<`+;((eg#@o#qWpWCV0srI>s%<;9QC^jRGSGC=P z=uGa_Cm5{%-uv40;n{dQ-Gj5b0dMN%;Er4QMND#0W>|3-JKLOL`HJ(T;Pu^c3nvxW z?9zd+K!xNW-R=~)bRh8{!_3=4&|)CNK-l<^$NXXDNs>p_%dFtSj;r!ULvJW<#QBS6 zty_v!*N2YF(eA)A$d&Tm@6QLrzl7e#mIQyqn7cT)q)p1=Z)+}1R8fQ#^ImGfmp+_X zwgi!BQPP?UDD_E{m;+%<0;QHr^gJn@?G%lRxL#QQMP1FiT(@A*H5V`Ulc?5Y+3Udq z`w3#Qm|7imo-n_OdUO_Nb(-PSl(HpipU?%>!rlolFcAKZOIufV{M@=ETqGXF{}^qE zUQTVe>xfm5r8lz%%EXhm z<+jRrjnh@bOnN2eZjNCnl9deWjcR6ttN&fW!UukpKw_-oHAI(`*(%uelS$j7lSY-y-u*ROkMfR9orj1?DUnm%7#mHvLUKUfT(eSJe;Z$;=f zlkt~e1DF(wW?;MWpDX#@rys(v{MB%#L^sU-Y{hLA^@WV(I7@5W^*mn`tU6E%4*m{A zy}looNSH<}F@XVJ3?oop=*xXQP^LeTX^@!s0nOs~?Dh}e00M*4p2G{9oc-acgNhdq zt|iSV)?A@cCl9@w(if+7KrXPae7wWQ<*3>yKJa8Yl=d2L#I;aadr_9v6y@|txl6uY zwO4i2bon3Nj59d;iR-ZI7IS6hJ3p%A&4qs`|M0w{XS6zT!L-hMJMiR6!aqI_pRCL$ zT_SO4#tnq^ z$?-*jo4=lhOW*%sm}Z4z@N;}h=PN_)Shc71*7Wabzvor)#u=9EyvQ^0b0eD|$8A$7 zcn1<_|4O}sm7ei$(Lvwm!SDP^pUm_+0N`B?8rnCOGR%5mDI>-H#C&78ie6z8#Jiyt z$SI85H7tQfqOM*!^ilQOmdm;5FH-eW>3wiz)g@=6Qr`nu0Yauu&6~Blq|Cat>MHXQ zq#*6_{YyE@;*RcAK?6`ogSq@(19ZFeNO3-CG-7X@0-R-47_cwH;Pbq_p52r3r2DGx z>aziT>MlAa=OLUbS&O{?yBi-I8Rl0srQpquiJ7=$edZq#vnA8JFfnUH`fUThpFy<# z*RGNh@j_-RP-{#e4jEI)$g9@J%bsc0GZGPuLxQ6pdVM1_R)v*%7eV8DbsiFSrL4ju zOeE`b#LeMTB}M{SFCQ9aZC^OO`i(4>z|dmg@@+FAHpMnUb4^N~LbHI{P?OuQMT?9i z^nD;5m`|1aRdG^`ImZbTRh9Q~2$$zJg=t-vYw=)v*%dEjfu{R#CfnOo=byI|$zR9F>`1s@xIM3(h>IBnTd;5VB`WI#4 z&e_BmaIX=AOt)%Bn7V!dP2_SzVt4cPu=q-m3U6QH=T^hB%4GJH`Vah7!nG9Jxh19gtdhsdqbjhN%UUGq~aPBdT=|YkEoWOM5tCbxrOrYsjr`$Nyn)N3vFG&?&b1q-&Eh=s!@chS!1*l9G4rWimRhuS!f;)3Wpm?#m}4v*#` zzqUC!(%p-7Z!t^+$6O9f2NI(pHd0|bx6})7Urs+EM-rU+qSSRcd$ee>dB2G&RS+4Z z*v(vDSFxo_$oo31DULsFxO%Ar9757MvPJ{1#d*)?sQECelK(h=p4s{EFO7NqId*ZkJFpQ^M~9R^&_+ zle=sC7KcZlb%Oo$nYaD3$%i*L6FVv@th}$+VE*^`-mYAX@g3Srs zFXEM{4-KR*tA_SR8qqK9{sI}T=;c+gEqD?-XtvWCq_3JcPga)8&-o1_;ZkcI{(q}$ zQ+6^gvZ}(+FLNVJkuHQH%nJ0}mjOV7DX?dJS4~a6WWEp>##Q_N%SD$ti<1c3u7%>T z-)(HU&zn0oA>02xQ}S|>>+4C3zO~B^`Q81qp#IUw zaxPDKH1oa0MQ4#H9))@>*d%ja8GX3=dF`O#^$)& z2EY?vOB+NuefeNE?xpWKFY^p_5D-T>BD#qivF$v+@JNmTl4wHvJw22S;nVe;Dq@NH z6XJzgk5els*cWwwQUOGFu8UH;rOTA+bmLQ+xJ#0lXgd9LMvlpc%x*nQ?N840r=>pX zO7gPe1F8RA3EnFwE=ioYsr6?V9624Uc>jtDel>CONoKj&SA1LH;lX0g(M8Udo!D2_y*?IZghzbmNi6d*ajAq*1F*{u6w3hxS-$hpjpxTdn}q0lzkOf8 zstar-bkNs46j;xBE=L0J@U$IM-R6WDog_O`K0&J-2K(P;?y%eOO5GuMYcG3)g87Lv zJzDrWcv^!dcl*o{G;rV3Khs+1U^(mW{$Sthu7r@9m{7C$QX$}&;1*<{Ye*Xe^&QMG znk`XMavb~7%QY36Aiz}>jYLW2)*;5)86<(}%AA3^xK_7PI@{mAEs9Sd)LbKuG1mSDeE~Mif+6$@LU$fFpV2w-qAK84NN=*nv7=j zC-%#CJ&!AttfuzTO(KouMi}#6IR$;m|H*wgVnmjS=2$!$33eBboFPfOTqI_!bM{Sk zndNYs7h0y?oJlFX)7UBQTWGal464s^Y=2-dEF1k>{Z-na;-FVe1Y?eLx%chT;;AZC z<~S#=0d#9P#OU*3alwl6k4hU|ZBv(Npr+o>GxCyd8kl5q^z-eP-AFA#razug0I3ly zF%AxdQ!)VE{-<29wv{Y&hKW(w$!ya+f7;0TE&*4zxFl~c))Ky2Jt5`r{_=FR6-*Fd z{Wb5VDjMx4^}1{P;9T?Y06c~8_*yqf-}TFSq18-l)*~YzL3wZEaP8ybJ#IzHAZnx- z>0m^$BGvWH1Y}H}dM!~J49PiVK>_YAE)1>xHl*goi$vpb1Y(cCpx zREb7}K@MUikGu&(5(cA!E$tI1wGyCe1(d&i_E&I%hSO{zklPe}l+AhTu$zFf=^SC# z4tqfK_K4t_9V@Y{xcORqy5xrwmkc7xZ>z~X@%t;c^*b7nJI(^qg(j9?%ZOs*W+q)T z72?0%h?hnAOPGd>A9j!BGX?~R1&QA(eAdU*-GPvq{qKq)Wr6H$=h>;c6xwPNf;Ubl zWNI)}7ot21oI;O_w{3?IDh!EiF9m2#-CdhN%p?Ym>WuxuwA_ z=h9TR381>NqYH1$7+U&$EJ1aO;l3Ze!%!tWiEip}{8)hrhbGu!za`VY}s(~@v>er=OcrKGVD=}CFS0UQF zC{E^2EThYnFqyc#zk^Rm_v0|wtsEa;@A^}|7Ne4%v#?^oEn)P@_VK^APYqG9bMug2 zTJ)EkNFsoxjM3z_MdFR<7XFe51iYTH3yKU@J$T*Y?Drqeo$PvhGA!0hFbnqgS)?jG zUnc1#tXr?1ojxTEQbnc!CybFXxw55l&K*P?1T#Y@IS6iOw%!lPRvqH`2%oKfA-wsi zC8QZyd)RF>bsP(IN2r-4_cA{z#gCL471+*QDu&E=)XpSmY619?nI3_gaMhwVLJ(YC zl%c(5`NH@7(S*&!(a>K~YCWp<`6mpfy*QqemimP0z60~6B3yQJ_`jX>Ofb36CN?~& z#(equtoAMO&n3lPxecpHC@a?BbP|5}`PGqEY>e7Bm;FCNin_nITga*Aqq{okgf4f945 z982(CvQ9} z$l+veGR`B%Dg6hUV1PW^`L@VbGX|`0*EfB1^Qmg}MpbOqNV*r(ScI1D#G49~ZjrmC zYGQX4C%AHl2_YJFRE)bp{s(KPWH~-PJ}_H;Fn+KpaC@6OF-%=)xubfnVwGEAIQtc` zO{-hgkrPl`9G?*4jej!mJgs{#3N`Y)T_3jPS%}v=dFRvehj~_C8I0{QOd$mZOvxVS ze}0{N4ia;=PLG8%t}f{qM9tSCGHJs5`+`w%55fc(v70D>6t@HY@x%EE&x4#G4!-2gtO8efoEWWNK{V4m(r0o1M9Qq^#Hyj;toBJML|=G1`qdGCCQbK{nr%&U>jX-$fYJdSU(a?7 z(%^M(;Gh$ZPx}G@8~?F2z!a|MI~4u!mE3XCSUb-Ch{q1VR19y5Meg>kfnU}u=%sU zxWY`G5mVF#95fj>CD!Z}vV*brFiWvhV7fsD$LzPtYQ}pnk1$es(k6OC{w5pem%AQP zoX2nsYDC3UQvFKbJHEf0%9NQMg z_C_+mVu?{p{rE=uUpaUK%R^kFg%r!PtA&vx#bf3GB@Tc5An49`s=rE?aucd-#meV+U_&a6=29yc*$ zTfZof8N6A=L@~=l>JzQPgvsdGOKu81CFi^+M1Bl6m`*}RB(1zi?z&W&md^~Tcnoz5 zk;W>egYzM7R^E7IzI`3%>LA1UE_3I1lqsnrR$Z=AzZ5`f>61pxaisnC!7FOvZKT3D z)%F@9LYl5;0t;i<=E!wC7l^8=*sXXYKR0{DNU=2`=yU6*alzvhjx=tI3S4-6MNy{H z6=;x=n)Ur!T-2+qCkRh&-CHjus$+yquQ*`iKK7#?cL3DegpFlEsGBF-PVx?^+VPOOg!|##{t_$I=J4RR zILPgj0g0M7AY1YGTIxYyL(U1fL|I#S zT6BT6JkS8Yx@BcA%XzkT8jWA%k<#i^QVa<$b>nEL6L=uNiFOB>>1Uq16D+fVMwQ#$ z`CFt}U8V5j4(6?Q>rMRW1y6_|`y)8_CNOFYcP|FooD3={0mjWr_{t6k2MjXgPC^T? z+iSDxMFV(VcNiV=6I@B)${TgNJR4kEUhz&l3wNkuUIFbgcV%V~)OJUy1{gI+9>=R5 z4v02SVrM<&W!T_ASPt`ia*opyh`LQ*b`4y#^1LGCDZNKjYWAXmy$X>t8V|e+=R|p^ z!<;nwBRwrQx^j5O6w2OX;IiBA^e|<}@-6NZ2wQqGZ0l=#ZIM8#_~3nlfJ<~3pXw*n zfORU9b5q-ZY%fui)*@~OYvF1%52|t!w-DD^6?+|6rMr=3C;ln0aS{_XC>W6nc3t5a zZkT#Fno+2%WNcn0yeIVaqFh{?6~K^~QVP%Y7Ph!;%a(aE)mrRaEbFJZcRIO&Gl-{9 z#*MN-0-ceyv_jC0Q9l6iJI*rKqbW9>KY=(>^Std^yPd|*-yUf?UJ+t)(d;i1b-Gk@ z+W&DS6QsD{Kv4?}@Dxt?=vyS=p00U|l8PX@+kz{0bf=k}3YKho*TrfZCIxY6L4TgK zde-4`V>-BT5{dM>`AB8FPGG^1OW8;TRfSw2veMgaM(P?~G<2`VgtaPQknXnaGgAAl zx^HJR?@h|v>33J79o_2p5HNYI}olF6if_krC+vA!auh9`oDwn#?`thE7YuPBqyLk%fuek>gpYvLXAEM1G zOJCo6V+c;WJZ{R2^Y=DK7$^^jXP$)!RB^_4V-kmJ5W^|=$>z2X4}H3en##-DrULC? zc#O#+0|+giTiYq84cn1HK~ypfDyIdouUl+EH}AS}OjUkUDFST@hlvuPC{e zl2^4PKoM^OQ=CV5mpx~Tk#?=Mb59f6g(pIv4)?o7+m^~F9)3+)_5Sz=5QTN!&vB`_ z%^hLMpsoGmW+NjT{Kh77DO|C_!w4EI%IDVss+zv=)5^4CvY)c*Rp9S3N~X?X>6ArrZ@>Pn^V z%{h^IODH%6TItFG(U0)EFanXa;&;_eFtG?ud%)15g_D;6>J9>NTz;FP!D?o05i+>g zz^|czfTEzTLX@&lmncSB(uB@*zsmux0iW~lOKd=<)x_>PuKwdOM}z7I;q11H&4hdY z44JXfYv)=SKlQgbsVt|K%Y`9X^9g~&um`k7Desso@&xjt3H zt$OZ=60XL~Zc|+s_0!RxYYvkk18F`69(x{+f1X#S6lN@scRNiXK93dWMVI{0GcgU{ zvB(wTtdFQ$mS{wd)UXZy3=+t{%%5tCA72!j{9W>tXq z1h!;J;vjtEbuZ}SNhZ?jYe40=b~XOjpkr#+(RWb~&BCg*kZT@xwk5#?tkjeIYgZhe zwvJk){HvtmBDt3R-t=v_;KyTyAj;Bdt3G9VX*m+Jik#H?0H&(GvpYjno9MC+ya6<@ zD=67>cPf1*ktzHo8BiR{Ggf+Y=y0Fx=brE=^wkkUN4$Nny?O%ozEOPmWicVS&97(jl-r2A6 z(+95%V?I>pFiTqxOt_y0GnnWkhv@3_g!WnFXTGeS>0a4c^9D51{F^|4m?upWJlXkL z?1!XAaPq}`CR_ryuVER#7p!DF&=1)8?nv+Xp+mVJk5z}tcFn;2|=$n%NCB7I2Y>H7c`3N@5*(MYV*wBYuWP2bRmJ~uT~z2}Z6 z2y1PTQGO%;;6v`lLMg!{XMsC5-+Lraa|Fm%k?KwaP{_PX+Brv=69F1-GAu1}_ew;^ zhmZuWTvn>#kS{e;f~bFU+QB0B(7w$9RFb++>%JrP>qK#Xe-N%EMFs~>| zYm7ROt4cBbMzk$mXWs@kcjw}$_;J&9pQ-vLkIa_il#1~gm-RRN^5cj%l?=Jz`M4QR zlxjO?`{c{XG(KtQjb{i?nRMMm0FdZuGV$eHYK_{QHEQ6kF`R$G9CZJC0@*VPyTs?F z>5)i?_nEM2%utqmlRsl+Q&T&>_w^&<2qd82Kst^)IZ1o5n=r+(?Z76hW|(XwnQS#h zM}mFh19yuNl7owbHv)R+J_Th zG)Ta?&QDeQii8m=PND_=X&1#KU(4`zmMkq;?^w>{T%Gi%eRE7v(9kBppsh^~CA0Hz z4$HKUza+HD?;|~8`2V8he(IO}p&S|0XhzpPuhYY;kYtfS7n!5PXIT&bP7>lu1gwiHSMI3jNkaxfY<88arwF|tnk@nu zPuT~m#k<7^21CmW)}UVBUxl_jTRthccALgF=ZR>M57=X+!T4h5U`U6c-{sm$=gE=h z!h_80fid7b1&UhWE-TskJsj_LC>cgUaA~0lM5Q`s5k+rW_98LFU+expPs!`%9P6pD zp+S@<;B^CpxXOr!ND8)tf! z%@$eFX#Ts9)8VV^WF`U-;p0Zxk%c=VS_O*QCiBLQ`HY>AM{V4rH4H%|3*n9t5C0B) zQ5=-n029aGaa7aaPwWJTE^<-C2wW(Yyf4iiO|lEf5B6z7Mhl*%%wcfHz7>Y-#s&89 zm==9^=GPFL^~M~}(e}s=UHaes#uDGiGAvG%EShi?M%5fa#hAlf%$@Z-a5p^G;=f6Vfll*T0)KQa)?82cLY-<7Z2Y!3*oCf%<} z%<=#X4n{lt){A&mbJwvj_;{gVmT8>W1cs~Yc8p1!sew>p){@uP7>O4^+~lAC|I(7{ zaIMLWw%0V(2h%swcxZak!}B%d{{8Wh|+Eqc=!;b{ADc#)d0*s@2l`$qtzsgP-a5%G{x9#&&CRR+B};+J#U?EmN)T z1xs?0D%w>{$Xf%-?p7rxfhyOvn8gyx&y$QRF2`#+OVc zaS}Xp&`dD1>)A=>x-C@yHazWz$BLP{n2(f4)vM-9dv#DLL^SNELUHBkgz1LCltRm_ zx(=pq2ESgyelW{FXVB~tYV=tOyO98{?n-(XHzIfg**AGvrL~+@8=E-mKw#*UECT&? zeyiKT$$!Ygz;X4SZ~*%yYq$!ro?u{{ARr6y(T5GOcKf9w81b>>wRF|B(n68t{ro#V zjfHtCtAh3b8%22Un(z82<82QOp1cYF{(C zkDW>GP6PQh}TD6phuIrG6f5 z%V*1vf-_!!z4z&tgxF<2aEVNzOYG`8=Q31|DL!n4;ENxlKi~ zYY1nuZlpDCRHjwNrKH8}th~WMq^`IqFR*ayRP_-Ao<15JaDB$>XU+UsulgYiO&HV9S4e}|$`>#n$ zF~SoYpD{UVMn|=r)2FOL^`<)h4KJ#xTof`HGIL@>5g=m#W)&k&>n0_+2Xcv{iK-+f zKTX`l*iCAxyFvyRbP$TM3_Z>K*?cYCg`!dRBbL}EJH=pCiIj=>^UEQWC54k{G{j2i z=oVnxrs)e2n!ZnVS_(&4y&wx;=Au_L=pK`@<8$hWOsw{l$nJLsVMjwD#|H{hAs`8} zrn=A*C`fgwyIrEA!#jXN2OL{?D1Qf#mX>q(oct7wc-qj$WPz~VR*$slYKV=--cs*i zHrSwT6wx1c1hSOkcbURLUHARV1~VBT#Nk62!_YhV1>fC{pdK4z{z{|n4%2$g96O!Z z8k+>w?CW|N`O)8AdvQHCgZGuMz?e;y^;JvX7Pn;yVPkgeZ%$j~Qyq&Vp_8CthP?1u~)CbMj_H~x?dfGo&!v@3K_+2d&BZ>m^p z^~Boy`_M#&&04^Be)A$dTslsP8SK&T0Ka6yzF+ywE>m$F?`|CTT%jz}>fHU3w(~rI z>O+>)~L?Ue$mc;FHJ@g zB$Re?G8X)~Vv!L0qy8_)##srgWouQoQfF&%|7x1cq~w^B(vi>RZaa4QZJ7{k zhkLJ~N#|=P+6I}j>G3nzY@rJh=Gc6ZnY%Euca^Xd9U@IuiuOzVI~sx2FoZE|!EWQ) z=)Yg8*OOK?*{5WVz)VOGLkko#2ZTxFmf+1175;&6IAO~lwx?Evt!)IxT!M$`CmR>d z?JSqy?djSsvRmyQ@IN41g}uQJ#tU@+wrPlL6^$qD9p{+4Blk;-xY}@ld9-%K7iZX8l{OyEHTZxn+-X%-kvZ? zDMS{I{0MNIfB7||)_v~+dU*>?${}C>u=#p@yIh=K@5Z`Z0K({#Thaz%5UgZ>-0wkWW`uL(65h6v&H=;z6J}d*Kqkk6p#;Cev z_mzPDT-I%%Rv1BGCL;9gM7uIrmt31^qWuy2J&WR#i2VvbDgN$f8Ad;(oMMLzR_j7{ zmYArlF3azKXaV+6im29e;BKN7*khfj61p65iTNWO7N34llV&-!A^`&}*44G0jt}=w zo$GQe2@9R!vw|wee#0~rS~PocKwKk*N;@U(AFZIqqkyoS1Aqug=q{O{drb{wrBJ`d z;~?ba*a}xX)@t$5m|w})n}XK%3zgsMKcK9%T5{_G`VK;u8kVB&0bXD3kr$antxhJU ztq}IfJ#}sQU=G+Fihya(;S)j`UA7z$d~%%`5lIe~P7JKT>wMWBRBslILUPL1GLr{VQJvYHx^?yW?aO2HLPFKLY#tU-nv3y=bOZZ-T&I+p5CEP5efLN4a0eo@@ywO6JIu%`Ia+7O=U* zKhm%qpLdn($G8iApWgHE*z=n$*K7T~wB2x0k1iLWQI`Pft_h1DI6jJe*{OoyDYfKd z4eb@vX4Qxe%&&!!+ik7zszMyrggq^reQjuR8Ulp5bNM=PxKQPG4YF1^^#-+G*R%SA9JrIuVE%g!( zC>YoxMq_E#_at*F6;vd(}>g#6kuB~&MI_7;}-0RH?dO8@Dq1A_Q2nOx>6ti4QDtiOje33#|EczC6GBB`!M+U;FzT@AB20NWp|h=v≶IAKh zx!A$n;gZXPQn<*`a_;zhYl&IQ6&>@UyLfgBpPjl`hsbk1O>f|KPPspNw5JbhYzOAA zgHn2~PHpYD@uPS(qozp(wwy&rS)}>94JxPo`n1?mmsXu!>=4Vd=@~g>&>qLyBdt(WGkH#Pz>&wMeCP zc<@U27A~Yre6-}2f9V791V$5MMwaw%4(bL251ZPZl3vy(h!W}TO;pW&RaWot3(9uA ztWhZG!g}FqOtMwAY~sbbd@%s>`DebESV?clklntg9Lgg?u`9ig7a{OyPvx8Bi$5_K zpCnF?KF_dARjM}Sf)I4TVNdy+5b}A&j;4F05Pk*@}};o zJ)893`9Xc!-<>u+t;!KwJm_A&f~3#LsFS+ zqr>?8t>ec*&m)8Zn+9kaNUJ$8#9BI6AlatWBkf|3^mG>gyHZxu;h{yTAQ zqPz32GkPqum9C5Rl^HW-yoj@pUz!!B{C9;s4zP^cA6$-7MA3x*uCQCXo~7XbTH0I$ z_^mk5>*<4@cQsK^h_M3CpoUr}#5v`Z)>ET3V7mLOC9rie0I-^Tz?O;e$DS;z%zO+vN}pr=X=*Y*-DkRe=NLHE>yhcV8Z$uHynK)`_G=cKZ3srVXU3vd z<@ImL6Lwj*td+3-#o{RuC4JSr-LFQd%*gvqkkVqn*+({+nc7|wp ztIQYcL2`QMLnN%{%(!;({?uBdYQg=^W4`-n7Ps4TkTa3TxBLaXU5-)EZFf|iJY=y8Wv0nJcJ5%k`ihU)f!67;L%FOInvt?_AsymFCx z|0*SW)*V4FX+M;>R$os3cZH^vuN2ug({-W*;|^g&ChCtnj`me(#i@hxkt0td!K91& z23A`pM)9YIFtB`*F5}l}wBs!gkvOIiE&84DhHww6cp3=`aQ^ZQe#d!Uh_qi{Ie+PJ7yZ)BE>qx;d9*KZMN&2^ySw^)>R1YeBPk=Mryh5s zyEICD`;;f;`MxFjZvAuhAnBppu~aal(!~MuC6FX8(3v>2k2-vSzL85oTWz-Q{T1_| z((J|mYY@N7yZUzy7W;zcdj~h#VI)$E-KlxT?+c1`h4yq%x~u^D^vna})qUYylfV7| z^KniD+M-fkx$6AL*1$JDk|4uL{R>D|aKq-@R6%`hL^TA@6ExixWGNJ9aDc&)Mm`+^ z#zc`%>hZ4^d+J&fUF*#t<>4`)dv?d?U|qBb5_2R^itWkjzSE`-R9z! z1v_}fkyf^bSwD zS_|HI@YFla46*`<1HEd0{FIu>8!;Zjr1`Ha+5uD25GY-q8~&Z$nK9dGV39l@m9S~neXZn|hcG<6-EFUZ~OPvdr1BX6eRabmVRvyXM z=gtaIpmxLnXvH_=TU;^)Gwl5`=GE4&X1$Jo%E`Ao*KqkT>8{1ZJ7! zRTx=zb285`C8@#mXCA_9to=;Ey#=-lvzQqZ2-V~qN4x%ag@=Noh;}P#G2>vj>{{x! z$~f{ozc6czwxtTUwLpV4CE%V+__gMSfa_ax&fWb2SY!HNhA&$3O+&H;Al>%z5lJyj{u!M9!A5 z{~c-l-&Y7cWL)+=S*fr55q+~&I9L6;fUjY;`OErIT6)GS3m+SqhtL`5y+C-uCYrs~ zZdpUC^POev$`UQggi?bB{!0Q|s+Sezi1YwU*f6Amc)etg<9h8!o4 zBxjO)es7Bohc4U$Vntv)$bgbdBsI?afo~~`3j8LZ8dpS1H?lGB6H{1W>*?oqo7@7C znvba3q#k~*<{C70-sIOW;I0kS|cH)&h?d8uE zRCn34-1BmJyD@aPFlD(k*uD+y@~NO~qL`q=v?oTata)e}TE<;}%Idq8t?B6^(zJEt z^xK^;DzZKw1im&`Xqu}48BlnLA5E9c;!~0dF64I|9)<_i{Yme^M@D`nrR8Ggk*{4* zIyW%BrEZ$C$!3$s2L22h6aHzR`NRBrBPM>>SQ}5D`piEY)2A!HuM+Uz6^mSw@tw4l z6D!IS)ilRsoetW6E!sf=R*CD{TqVw?hRKaCyu34qEyZ(it24dK!uDkKko&nd%}E=u z*7i1_YgN=5RFo~m9h%7#@V?g66*8>HiVcwQYBzxGlwHy;EUVQ3lc)!W=D45S#&sTB zJh{>~d+H_?bI&$c?v^J#wejx$kaV>|88E7exK61?2f5lcHAxKk^Q^UQ><`Qzt^7=R znY0=+cBcn$bl08_Go321ya;<$;Gl0H%(V!&GX^P%Db8osp$7%_g!8w#Pl3;I*Qc&z z>*!#|sBkjNhzV(`t*GdYe{4NDr%B%3Tm6v^uN$fPZu_G=eZ$Ld0Hh#i=~jrm zdq%>jMafO6*X%0qPiv6z4ufOqKA@u#UD#hp-Nq!=jZMiy-__>zVmLVr@O~@ z&W&}GTm4M_opWZ1)uGrqh~m;0u*69Xbk9R#Oi4%Fp7HI1v)hXTAW?`GJ^-;I~hZRistk{y9mtwQC9#+6Eb1)LqbSs&pTXwE@_9@ zUdMY1K?yiCPh4vj_<%#OS^?n6*La8>#TdGYUC=jc$Ti7vH)=4dJE8tnras5Y&6UN$ zJV>V?-Z(ErPBDiIIIVHIjX)qd>@k=&0Fxgatsc-TAsNncI>9VePVLL>jbwYY_^KJ8DTai1z zbX}tPs7I?=;44ow`YZe~yq*R6^ks8fhRud2JEiJeY`f!*I^Rlc@EZV)V-*?lkm@=K zoO!+}g>Zf7euVB4{em)`_P=<|T(Nn!o?M2^?Mdoi-a)v$XiF`eta^iOx=+U!k>%it zh$MDIg1cJ4SKQn0PRX?2*CoW$JejsX?d-TMU+h6OaVpw6h2Vzz@`;`d@Dey(pxh42 zg8QS{Kitlq2Y9Zh$xP@mY>?Vg_?UZhT2mQPQHv3{R$5Y~ z7*or)R8u$=@rfT$PXh1H&2O2`M|lz(8=f6FgkhE(#MfB{Yd)a{bHe1_c!*v%DVLn& z=V<58m3q#8r*k-4g(x;r#+`C+7;vVU`h>MJrg2KyL@>5PRvs9I#X0~4p#}~SaLq?Dj|fN8M7p@ zEtZ^?(<-MTlw&zw%*<)dGv~z|Le6Z?+K8ODVivRO_x}9xyWPJ3eZPOW@dvY+_v`g~ zKOc|B{ed|{W?+D!(3{5*gSDg>PEu6fG34?DvJS5!(Wb=Iz#QKnNF%l*vNjb5e3)Wq zD!p>|!;zM`ly63gl>LdN3+6s(dL>UU|G3ou*eog?q?2u`VH(WVybXYZbxzglBr29n ztVIVqSRqdvO{{XiCJ$}_8}ht#GG!EDhy|n2+pS__ zv}?J_jD<)wU7!T0$*o2?>=x0eiLpcpqOuTJ?~D+Kl+syvn-n7Jz99FgJ|#c+F>CKb zzkAu4ZRx6sXEGIXi?NA-N6VWl3RiUsyHyp?$Qby{jGoJ;5$ z&sENYCimP$bw!^4t%JnE8`O+^Cl_)Ok!t0os<7}eQY12*=9bd-C zo0Y@v7Qj_~ZcY$_^kiYPhJSCP3) zChOc2PVTw!GI|LB@^F_Qm&F-l(vZ)7Si(YwBSw2y z2l`m!hn9!&Tvc?tR9zDLn%6s!M`aSaZttyuC?}LnT})+9Euw|k2->MGAi&B2u|Lx+ z9#3*^)OZmXfs|PK=CO`xgGem;nKvS0--olm7w2fzR@2fPX&1SpL1mHZ*g!wcasLdv zaf4G4L!(^ELY+zv@Ajk|D-_^ylA_u!F#J=f{F8f=F=LtDbSYS4-y-%GQS$S_(X~wbv}puan!#=MD@MijSdZ==W%2-0 zUU|T#Nw*XueqBRTLsEi5;QdI~72iJEQ#LjGZBI-uL^uxVLj#O0qje2h`bhJ`a&&cG=LA`G(v0-F801TGYga-IScW9 zt`Kn_hu8#9I&4ulHu|~>pE}JfT8YE*s%lZZohuz~*O_4kpt{U?3DM0Rr0{|>{1c_U zv2DyJuvcx}8tGS<%p_N?=>$$BG>5;+v9hVr*&^%>aV}OMk7{nZEQ)e3R^V|QU8n&2 z=@@xOyCMC{vw=JET5f06x6#+iYXKlyX;XX_g)*VLDYq^HV2L#HF z?)5FPMN0~;Hq=M1+oyB@2VE_pyQrL3O2i3ePy6h5(L*7o_)6JK1@=>U;dHjhwZeKbOzqch$j zQ!(}P`B45m%JxpC3Qw0reRMfOxJ@w~F?4a2==S&Tgmnu5y0ykjOAt3n2VGc~lsVjs z`3b#(-K>p%^M#6)OU%FAysq9>xp`CTnIYDO8Yn5|Uv??`A`1Pq2nSZ;D&+yLljzm% zT#MaVPqDhi$WHTHPHtApYdxjnDcA-%a4^2W)T0dUQ2&*vsoI8L zQp_NlRqg@Jih01rPawwZ%nZ%&vYZdgB5tAJx+?zt(3!EX zUy)EeGi~)<+snX>t@N10XdN^4#NQh+-hXrGFUL6_%(`tc#nkN4Sdj~U&r!a4s)2EH zbzESqT3=z9V}BqIBUNv2_%Rp1uWZcGlHN;+@AAis0rVPuV3K!~9Sa%d7{3wR8*7WT+cWQgAvfG|+=b@GyY#@dNs0VYEP)hkok(MFz$MwePv%<$zkMXG&Je zCeca?KD=?C_>o%HBM|o!*q!;OBUx__alpwqKZ&8h3S*O*;_U{!@!cVg?VHLfN7>D; zBWjH#npAUxl_ZM3HDlCPS3iC(t&bhI16O^SVDP$N^=qxj)p)6A+>V7BbkFvb01L1c zw8_eK%t1)-%C`;zY=7F`8~3K+8OUfrtG=Td<8Wo#K?_Iv|e^ zhO&Jj{jMR2EwjQAAks-+(3epez_Tj|2=zJE{o-dvn}Q(7^l_q>bf7l6f;Il?}j6P#~($M$(vs- zN{Xcj%^|<4M3q~Eu1rQ^BiL>;vshHE>w_;T*eEYoQf7Z<^e!Y3GQSC}$7 zv!+=Fa`YDR1--tkzF*I-r3OzIEbi?Fil-IP<9v8BTvI6i(#N^NqUpf% zU%wgbvauKlJEPrAo_gszCC{?0SRK#Vxzna4J zD0AJbnu`mY{fu-Fu;&`+P_~uJebs%8*V{wPC1kr@#6w-wm_hjwitlUYAoB}TtCXhP zEZUs-=C9^SR47?Yz0S=xyyOX2KH;+ZGY#1`Y2p5NX04o z3ynXJ^mQKAJqzQ9_%A-JnD4MMlivJOIhlQ$D#SA!l?iw@(vv1nt594s@zb zh=XKg#BpUfS8B(V^2ax%3@7Rq2y+YUP;g^Ql=uE7p_Tg?3pQ73`_~67d+_44bWr-= zL)B0gn#)s(>jrtE-@SO$`=kH+-mmJIr&eM>64tHq-yZp>BXB9f z7KKHTFmt*mN}crAEylp^`!d>&OSqvWA>G_L{g;txUN6ieb>{qN|J4&lAMTUJDmj8r z2hg;X2)X-?ikJ?*K1`^#)n%0b8L4m0*bk4j#;Z=6SZ80(OX`V^7H8EHa#^Fd1##0q z&OIaLa4%6F`TTW2?#E7@R@XheZEXRyeRD(42%}W4d733e>@bxa?Q{3P(pqyz$82Qg z{@ZJ@>id8ye|*?S!)jUqsL<(E;fk+b0Q!`^BRj<*{#}{R{89fMv2Gh~yUO-7iQ=52 zUy2=gO}O+@Y}>e@@y)c0eM|1BLRnq10COr(&Q`s>=fFTDR&k79#Z%9$5Z7;$Y5&7E zQ!hI~!SJ)jccKk-wtM{Hm&aJeCqJ+M*u`v08%`g9URX_a^Qqdl&MZGqHiM++tqL;C z^qWTO|B?P@+;}0i`XXHH!Vu^tZ`FG~gXb>VhEOZ&H_{0r+NZ)Xl6GjW_`>oxI{*8{ zJH3y1FFHwOXi3XNWC9Iq=vK$y+0X^cvy7jWbG8#4mCC)mKM^VofGPVM{QsO@{olTh zKyXK2lW5-T+7r)#T}G&f>3_0Xbm+m8f{%L*616>liXx^Y#YT3l67tUPghJ$?_3RuE zrXxN4zaxo(3e5*f<|Y&0DPh4C>i`dF#9^MbwR}lZtZ7ub_08He#lF=gJ-}84c-f%` z=AAC|;CH7VYoZ)GoWCqpAun8)y4imDQS^$`Km31i5mR8k==?A*b_x!k5l?3WvORAo zePAzfd)LPVu>1Hv3$(ht9uf`2?Gb^gk6>?=KRk%Z4($^l+zC zJmY+|Qy-Vwq&S7RGCGNu!DE@Xtq;eLrX8FbWTw7$SRS?dg8j`AtG|A1taX{S{PBw2 zs~VUqG5maBZgfBpZWRYZwc*?aC`&$&Yv_;N$0q(7ngKLX}Q-s=&|d zX1#>^>$u)g3%>9*Y$;vaPG`L%@fP_h%(xDO=54C+cL;pCM8~SUo@-M0Y^=7C`Z%-B zD{ouW-#2?2qbm9~0qGv%oOqdRO4dv&U;9!#a zgwfq_S;UM;5*aPFQ0p9Cv36Z~p!;?Hx|qB9Bwd)&t?(zTUpGGVjo{M5C3+ z!XFrk-j$c)ElzI!lfB%g$@?b%Eyl7HUYp#?gR*~{W)L{EjRi*%t~Fl9$lX9(AIk~? zOVxXINySQ@XXfUF76QdyVpw9ly10a4H)|NX@S0=mLD%I!$DUp>0(zT)OX2Ez`zXvB zmT5YUblAJo{LagZWR5szW#8D0M4un@vc@p-3!b1x2k5qNXnYV09tD!f01xL3xNag@OR`*oufF&}LC z9`#qRrzfpg8L7kqpYip1+!(j@6W9BkC=zsN#V{eO2%t_au5>O)uI4H+`dxuD^?CKv z1Yj~j8dkzT3up}{!(QI@&Qy7??!z}^%e2g=A$kdR>D&DyE7ioz_08n&_{${Sj;S`? z3+89ydYNhsG1I@RYpsCtJaLas_*dM z5tngwh!6|vqL)~uCQ;Fu|a@b!&ggFI@UFPD$YQ{I~aWl@4-f}3)mrmcaPBPcY%~zk>jLyw3A^(n#@~_-{#^3+a+?|SK@D5P>bs#+9e;H8r{)iAA| zZ@9*e<5UIwoqiSn090#fSAC)EdWG@I6M7!wivIyGcT{7>Uhf$GKIC!oH67!Int@CE zx0q)y8cDJ4C})Vt_ZH98ELr)S-8|!eJYVaea!PY??&CM^QA$wu3DnM^1v#>)tw!vo zA}B=M+*D<(|J?F)*R|>`rv<5>QjFg$yGAzkdm%I8HPhB=tZo3j*i8`&^9utp+=}Yo zT;B}i$ITlR!!q%k2|uf9hAX#}e8o&Hu?D3?$BV8q*t#*>36Ll9M4rSNh`)k+Q;R7x zz`_((q#zh@(+#!I1<{`jxTJ(3o?p{q0YQ`Cx2qY;r0?JHJ2GD3E551YS_%6twYDwT zH2GeyW<#;eUC{aQ730F?RpV3)Pf9Tz$U+FfmBR)#VgB&SU8!|h!;R|U_<+Tj zocm4imNI3yby2DD#nctS8^&k+>k9t_fQII!rmPkR$f-$R#3(^uJ99ub@)z|r&beo+ z1u45qC@)Lgy)8+T!H6!N{rI*2P!`>OiS$@SER2W3l@2pHELIBz@NBt42&H2-!${?# z`yRRUnawp7nHbh|DDUKZaB0tpoFDjJ#MeI4r-n1)NekMb?>Y7Hf#JbYoim}Rtsm6F zWI?vyzcu$VC$YRw5JuWpSrtqCkVNKm^ezrXUHdj^H<(wsjXZ%wVs zvAxF-EK0|jG$hWCnMZbuJz;J8Eb5ze98>RZ^sQeGBrs;ygo2*KAAgy(3iR@SDO2y) z_uI+6+OnSa1h@`kCIa`*UNO(Ke^feAa^kxGfjnU0TDD$>+Xf|OI(&OhkbfAhXb-=+ zoLVjLUK{?RTQfoDMJiOGM5AEZf`BT@G5{aqxnihVD8p)F)BQkeh_0ol`#p;!hCX8(h-p+!SFfO zVzbw(ZyjndK$~)mSVuP2hapAQ0cKC?{1*w^i5?UsEVDl8CH)U@Ks`0rb7FIj8-Luu zbCXhnI7=)NY$mi;Ro6M~Yzjey&Bi^4xus55V;nvU+D|^Jc27RlA30>@@iQc#vbyra z<6j(Km&9+hcO4!u&q>rMxf>65GOH8R8#-Hh2+cGtY4P!a_H5j+927D@p2~FhzpM;8 zmtjwSd^4qo5?I!B2~LMOrv55_P@-ogr|P$#AaQk@zuX}X)>r@=fA!+a8>`D{qJN() z?mqHmv1I3`Ldy8j1%h>b&DZ(IuRQK1h)i~6n>Imj*2rU&CzlkzwjbMmu(Tq6e`(kC zd%)1Zn-_d9e}<&=E^p69dwk5k{N(+ANA&!;f}=SHVXeZus~)8}n!*DESbR;bqs8v8 z^`~vW)7oSV&oZnkD^R=o)wy3X*=37Xz^LgWd)=DpR$CC}#H@Txu<)=N34n|lwa?Q*CN%Y`|P=n zkc0+-I$!=@AI#;KHoqd{xVOWuG8YmE&`WTxD4Re>{xuH|@r}iJn_|{9>HVg4F8u)j zze+Z9kiuU&3$rS&h*x#-t($P`<1WK4&TQ;%JVC|A_WbU-nV(L2irIZ{EU=#H68O{9 zw!~!0AuO>k5L%nex|QwfInb-3qDwyXP_a&jLT@ft{Mfk3t}L~8t%Gxa3AW-D%rt-C zq+r6Eo@Z_-+%Q>&fxH$H>-VMN>Lk1t@mtMabPHam(c_y2jX1ZTDe#&FL@+f3vgAMO z7Kx^VYGGdpeY4&X7Xdg^fNs1Oq2?3~G-L98B_T|jVNOpZ;@L9?E+&*+5MOxw-Eb?1 zaUVUUvs~2?<$!@>_rpzvf=0tM;hESLVXEdi1I%HukiLph;y?lEAb0UQZd05uy5eUh zsT&oT$~>8Xhap0d#q0aPcHckn)O^!-&u$bsI#2(T8;8PboyG~0B zLEFYM87K9_--3bN-RnZ1WLNa`Oczpm%h*@)+HGc_Mg<)Khb9l=JdSUpSlhQPlOf6n zY6(l9C;PCGQfty&o@yiy_bcFBab{LaGZ0Os+fOf`*2$_b%|#zcn%>>G)A-^WrpN-V z0x*dwIHqHV+m$MItlqvv1@?Qi!7+r7+30ET;NpY0|v zYgB#$X8z!R2!NN*dplb4yb$-4kMRQV>$kOZPIv_(x`-jrrTuhVX2U^l%B;-(2FSZqzN8~N z==q+@bDwtH%h1Wb+@Ygy^Qh9X*8K>R=_bBHn6l|SUsfzhGqi-L@-B3>2*XWTIC(Pg z!vgRx_)e(6@2jZhv`W#PY1K=)|7NFTQ%5I$L)(*MoldIqB=Fm~CX25?42_K+e)+&t z6&U#CO3dlw7ocX2ql=*VGIX2-0AN!F=H?E1VxSHjSNOjp*!$ND;+EC^|K#NV%V&@t z8YaTaF{MtS?G#q5GERow7|2Yb z&#fdX?k?Bsc*cCzOd^z#P7LKk{=BYu)XW$j^*x;%ZvHIUf~Uv*T+1!e{!{KSYaZDt z0jtj@MztvQPT!dcr@uOV1bN&e+3N0J-%k$xDdo<(of{1R0SdXmu1lUMD(N8`SHgj_ ztHL~Jc!Wi3Epd29h5aDVJn!`E}DmREI+~f)FZ%k!CK7D*; zfmWKo$=H4kJT}x@r(9CLwUIe7PbxbXN+t%?3+0Lfx56hs;~-9Je(+nC;LsVo5y3^F zSS9^@I!nXx!?lldbszsbavwnS?&e_gHcSt65qn~Oc^1_*%vUWF4$}&U{3bOGlwFMe z;URX2ocFHY=iCx&c-miIHOfO4BvW4ksRr}!C*dB0H%-+%%g=$hL`=Kl9LqdQc{0NMmTq?z9{=P`aZ>m z1=Aq$fqdswI$v-{7etmBuNb$yBW`dkkpdNs{y3A0mmlG!`;L=J+eOi0O9g|B&*x)K zm`T4fLW4mJt94}Je$vJO<06Fbx9La=Ka#QCK8+%px8B%oF6)N`n@soy5+NpcTBBfM zv60VY7!zG_Zbl_N{`lFsDQq1}qvU zXJ|5PP(BPCp8K(!ZM@L+o84iapiCd?Tn92iMyb=++%CtHgRGs`H1>pX&R!H{u`yFb zvqI=sE-v~;pLUzhg>=WQu@Vcr0f^Qplw@raC1+suY!lb@wKAykCCb&vK}Csdm+db% zV3T8V7ME+EvkED(%(k182@HSy17q#uwA}&)z2&L`^Ww#x4&=oi>{^50Rz02%(kQgQq)FZ|A4Q)&a|`K zXdOwwqzImo89uw;nzor(@?<(X9Y<@7-Q*IHSJ{=D;P*j$VgrfQ42J=N=+2?Rg0)?1 zTT6-!ksnSq^*J%ISuQNB;XtjOIzxMhNq4{Wg18LbG-B93jMn3&uMbGlySG4s=VbZ$ zP-AY4nD~E{Q?3oY^rQ{(%{!y0&dj$SioqUaH(+gxitM@`*y<@eTFwC#B)~9-hN5w( z_f0juRa!hRJ5|f|^>BQ1CoWs6|JZ?1;CNJbK@3pjv!)X<=+NS+v6N#q@SOc}xZBtn z;2_w_mwa|C%XGBH-*9K-K}&4na^x+>UXc52qSdVjHTM=pX77=+e;Yq+{<&d$c^|q7&%RdFM7jUEd_#-u1ID=g!^j?ws@Nx`{fLt_30LM0O2k`;tZ0*e*e*T{tR`es+40sZ` zL*)G(20Vn)Fg#GY3cfiGwIsB)C9l{t)Dj`TvXZpXmq@TbXcz*W6q1lfuDrme-e)}F z9wjtSs9oQvYo5F9G7%f2&Z-@+`)mIM^{qSN{?cgj{qhz=+^Q|~UhOQ5n$Cc@tf5PF z0^Dv>1ZabJB;zNXpLxucsWxqyaJ{Z-yzYL0NMN&)fJ*AqUIfd%&Y5pvklu0p=}G4~R{`U9R(Hrk6epNz!MROaKOl)Lc!MJ% zafqhq4adw2)wOvYrUIzvusz2!UL_KDC$_+&8%jILE{;Q9gx`E(z-6Gf!1w!sugY6Y zLW!+X+1VfsJH|u59QoA)9{Vf1nd$`vt2SIEQ=Q4I>tn26U@c4O0l&%Y=JO1Z%d&TN zbpn{<*vO6!RIhCb&$zaS4OUxE9ems0ULLzqB4ffI3M5QChTfsY+9W4Y!CfGM!0mV7 zwj3Or7t+F{w93X7yTTljVNKgzDYVZ7!17qm(PKxXOoG?Ml)kaVwxiU|dles5g(4cT zPty(s9Glol400FPB#{%&EV6L;sgdtT^9fm}K`Qd;15)5-i0rRv&;@p+{b(UmmM9S$ zqbFGEeG6V6AtG=`sIdfAdyf^5#({ShY850xzwZGFUwuvRc$iVX5o5S3e|5TUUao$a z)-<7Ke7XH!-1~y6PcCpr8#CoCHE+49blBg~z6Rr0i3VgklHaIuHthQNWSYyQNB^u$F zM!wenoGtdSpP{XxwD_z1q}RJjEB^Q0?rYQ%TY=~jMZGdwsgb?i4+h6xwthj7M&)~4 z`=I+}w^w}EV38M8yTjyYrpK>u24YUx8a(CRcST(7)!#;o?Yvy=^D|RTZG?3Z2ll*T z0uN2-!e0_V5TY1<8IMOvI_1*2-9YZixy?ruBUZD@3aVG|l5G2yiA~5KQ!D$Vw4I+A zF883pRPhn_*#Zr>Y5pC}Hq^6SC-ptUk{> zzqXaoc(n#G9zEZ^=0s1N5dH561|0*s1n8OE3-5OG&aWC=9uHK=(l_3cFnk#K^%FbR zX)H`B-?csDm2;t+{DjOHnkHH0k3hdfpgrYR8RhTG82F(MygA+LRm6>T$>Sp&=W-O1 zZq?<38rRi2iIryvHG-qmBPN*gPwHkH-5m?L)b#931Cc8}RIv~%lvhoCWeGI}a zH}$0GvCLDWj~W~gk^Kxp?X27FtNCViaPtdqUUZD$^`=ug2Gy2Z6NEROZ#gyDxr;jA zwJxl{43HD((A{7`+jA*2#!HGU_DuW3&OWUcBQa;leY(2?e4=c+71eVFT!)o_%UMqi z^eloVB}fP-k~i|Kx0J|9ywn#f9yX>EfT8fMG}ot3&V}7c`a-9=jn=Czw8nG{TG&jQ zUprsk)LK-!ejA84dmXj_QQ5$mpJ5g_)LHL`U6>g+SSGHM|H8V78DlTD<<51)efsDl zF}|i;h4B{9i*=1!j~k;q-jzc7JU)nnhw%C)$5&xt>_D0na1%7z;`d$Z49fOPoAx-z zJTR~n)v-XUCoasWjN{lZhUW0}8&2%-zH2clgN0aDVrC#P%^*kbeL`1viaPcH z44H|z!wCXz5aYsJhue6hq-fk>H5O2sE z)eEiUjznB#W|}j)N6pdE#w*4tHUPiFMT#Hw>$IX`Ad2IH{TU+MnQ+@O4lw|9fXV;^ zx!rKHKA)=+&^wLQBo*wM@JXp9bM6^D;QKoEKhF?MWg2724qwa@or0irAFzd)GY;c` z#0@!tr#e7R(L4_aTAnEvF^|71H&@Oox+6)X7E+`dE9i^J<9K+X!*?Q!2S0AVP`3WEi6sMcxbx zG;QV0-a{%toj2%Ts~YRO?J5(tpo~eAchYMXJrP@()}8I;mfAQDw@owS3!KxkvAcCE z&B`-mmQk8L0g@85(gXw-)iCmf%s$j?&k38rpUW>&X|bgki#`FnGOV#W+-|>Hv?Hqw zu2);IC~UiJE&*MvNJEAy6KNUD<6!$J7y865z@YF3Ftn@$D@W4HIyBo@ZPU=aiCQ;z zW+z;1+j3&2eg6cjQII?dUwCxNHaV1E{AaGhnDoRBf>h^X=@p&qgspF>ZLUw-+^(B5 z?)Y)FX)F+;v!z{5P|{$Ds3@xZok>}{j(s{`9Rh(DS!6~OiI{Cq9m=R53w~;#5H3F*-qGravy*g4+K8a0CD>W=xZK})roCzUz zTM41c=zn=HNbM}}qJSE)HnG~#LSjq(O(>iQJ{4Ww0;wQlXXfwF8W$fn6@rhay9rtt zZ$rkEF8a8g)6i|b#Swi{=U4HfGOqX6T6K(2LAte4bQ6C(GKx zg$Zh16h`Y;6V${|yCjMQj}g}T25Wo_d$H(tF~Qk{??>-jvLyj-o1@d0f-|y@V{w-- zIxj5j4;7h*75ECaNmq#R>wss01CHdTR!P{+ps$ev2CJUswyhfWmM0EDNX)8 zzuqQ6ty@=u8nrYNTNsqu^8Q1DAKFK~JGItSFq@T(@*q3j6mDg(vhY3OORoKe+`W~g z8N?Up#ek&Ok}4BnCZ%&lv6tK=N4s-WfYlLIq`IHcy}-LRFADPsglJF%C-n4bl;+_; z{tFg<;poy1#o+!cnpAF#ICF&a+@dNXQ=|TF4uV?7O#?O1zMuC^8s@>GJf1i|N z3lb3f0*7URp+lFrWT+HC2fb)fwz~3=Q9EVoPoLQqQhX>S={=oIOi!vn$Q&q zIFsULtugAL(WhRePT7M!X74ovyM!hlE*A8?pzUPS2Wl}4D8@{pG8gTt z`Ek4osO^f)^q&hN6kXw5mBE^Q`J(?#617_HrXyk_fWFbu60jv!T<3*7R7OHc>jhR$ zENRj_^Y?+Pr{h_^tLDNnb{4T8U$4ijUNXYj<-P)c9=R>_##s1WO?^i&Gryd^i{E6et(tjIw&)@G5l3x2} zay(@xCtUgV;To|Vv@>!0OFlR zqNm!q!h_F^jWP6*FZx!JoY(IqNz2s-foyvKot?JsJ8jE--)pil;UKBlSmKZzjW<JY{OsnBkIQMiH5#4hyhG_EHvo~6@6o(jk@ zv?L9OY2(;45F!IVoMHUz1b75XY>Zst{aXQI@5ZXg zdN{hih!lc>_2!R_?S5`~vS*-_*D02ph5mjcz{i+sIofi=1J~}4L&YF3=+-9{8{ieG z4oXFN%4=O}KUdN+c~kF`$^c{YUPrh|cV4yTMwbq36kabTkrYpGs2<^1sYDY_6S4+8 z+-gP$Ihyta<5xYH-r#V*8j!Npt<54rXxV+=I=tFA8a@|<6teo) zh|#;#3ZA!P&{wV9$L&uy^@7gLp9}fMyCvy?j`H z`SEJ0z>laWi+9Uq2Ch|Z%Io$r{oF3*-aY{FgKx6zy)_STJS~073HKXsG%=P_3v$5z z@n)>0xEfHh6ksa{vM$?+P(i8*V=tOxRp}gdpB>K+oTs-1Hk#_1M*=;o5qRkbz-^yL zXo>n*Phj|8<~X-Giyt55>qbu(aqCI$>)VN%c{PshZ^NVu2pKU&Yyr$_W)QB>m91&b z^sG!$QN+uQwAdms?1JqFjNO&!^13W7p#!tFiH$(>#=!i`8XrtOWqy!;^#G?lAqM&_ z?y$5?)0J&Po6C4B{E$7wd;wTqGPfa()v@=81m=@6uWRX6#T^g|Z^@G!r7PAlgirk9 zNp-i;cBJa3We0{%T);$h=2^sL0GdV2^dx@Cxot6u44iYL2m&X}SM?6DmJ@V{wu-}I zN6<81hA!Aet$GeVJ>Qx?HD`f?^_HwP1&=?+Yv+NVjUc0<*Z252* zZ>hJ(wp}rW&i!cR@X1+Y(`bt~mgCN+-l*Kjw86j6j8;p|Q<6{lLF|#~y`c*>q3Z0C z-WE1cx0c7;wmWt7E8CMUuI;P0&S4;KuHHZu^z>F1&b2%!GjOoLM!ar}cuuE-_2Wu( z(b(q7?@eZlX8{c0J*%Pl)^vp5J|d271_n&vw{Rngg_Qm1NDJhNZ$Xa1VnEbkk^juv zS89me^qU7^x^x90o!sc)KyRh*e_~m+hi%+*5#OYQ)RBLM-O1%ziLv85433N=cZSZv z+XS*#19&G z}H1Rx;RuUI!GJP7KQncG}>hgFi*`$RL{Iy-Nc&r@{*zEAx$f_;~7O}|-( za9^dZ+^vujew|U9T9tak0V8j}{$g4naw)`8@>g;WO&+alenRIHc>FL%o}g%9He6{X z5YuBc{-%pkau@jVpEukBR)nn;I)dXZg_2A5tryGqr^O#KGkPj{QMcR0wweKl8#b*z zkr>n@8T;~@{{SNsfyhA`P6XzOq1?n>(x@CzAv^GKbA6UYG~uPnHfG#1&(lNhr&}H^ z{3QAaN)fd{PNL_rLl!$yVMzuQsHV`V0}G_8g`5E&BaYKHZeyC z=OxU7u*w1a&YCLZs-V3_y;wqLw^U8u?H$q=N7AwUro;tW^j=3Eacw_jt`x4;nr>!ygV}HkN~GTZ{zie1524xcwgO!!EBG2I!;H^Q-&!55gCskS*$$N3gSC z-;aV_1549kwx23|AJvWZe_++jxnOIJu6?9NK(c5#%C6KKm7gAa##;&6j&x-R%m|O}2jY_`!&e^dq~%G|e>K3iQX|M$@}d%=I~kN8K69MiAS zUalRu%{lAErRQe!HJbcdi!c%I9IE}h-N5W)n#n1#lHv+vREu^#w;voFzk{55 zv3{?WUAwq>j0`?&po{qL$T>E-dtPLCE8yS?9WP+bj>KD>#D2FrjcCeF$A{A(w;wju zPi(67H$$XNh=gHZypq>$Wh63ed{V5z6<}jMw}>iOB&!b4wl6G98Wz_j1nTtg=O=Y6jrI9!)V?*`?U6pcd_!>YpUW>4 zz7I`H)A*w}`lUlaAG%meu0Uj`hQYC1(Afd+d7#dDv2Qyj@ zlJ3qG%Cn8>zDm_x#X;D~-7N0>s5Vl-JZ68HGQEY8Cgf#|MksTxv7_lw0hD>WqyYmN zALdEp)p|nR3Fif9QtIdAN0+`ZT8idPF3!B0AGeaJt2KcIu$T~$3Q0AP=9@uMO}eAb zz~h_DG6$zH33w_t_GOL^LE&!Ubw?aHzKhJ)*qA2gGO6u+VDN;SA^NdL6Q5~YI4>@! zHOykK*{$_ls%c8~9?j8wOSa2*cK3Q~slnoQIa=>Qj82mHTLczKktF^$vHr@{rr+}@ zk{!dVt0c@(wv46(B2%w+BTsXTG&C6P2pWQSj^8qO-IT#O?*vqZk@9?y$~gul=(0P= zUzHpIDjk`m=XhYlF=%UIM>BBNjEDmFv493WB_H}qo^us(^y=$pn~|2 zuVij+6&YV|}wJamDNy z1YU9tSpygIX#u=~!NE8GQC2KUJ{}n0{%7UVN~6hn<}M1VopCEK{Y2pNDPO1L9Rt*DX;G=YL>z$r&(_rw^6EFRbaD#1=K_ z7vcQ9a5@mzzN&lI#-`Uu<=ZnZPK@K|TB%K27^Ar}7vMe+X`9Eu7RY;)1#rWd3I~E% z+~!??C%eqJx)};$oaW#`=Vy8fomX!S3AKhfEZR4`L4*qfXgZ*^UD_ap$^TuY^Z)DZ zJcF8A`>wCYf`CZxO$DSE=}3elN(<6^C{d{aA<`t&c$6kZl&VxIp%;Nb1OiA2C@4q^ z5Fn5sB_NQ9!~h}Z$^GG-dB5HBe0jd@nLV>-_TDr9xvq7s^;>S7EdB*n)kHW>YQR&- zz8W!Yr5V#`)ZZ*IcfYe_n}L^m>M4y&_;qy0%lq}sE6&VQOa!1!`?CzNLsg+dDUOqB zYD`#;QZise7_;$&*upZS8^qUTfyG*Sqwc#$?#jX&Q3j!P(}TVdc~{W!$U0N5+5tyO z4(Y(zeJXxnvRY9_Xr}12h%bu!lmPP_BnlwN^>!b6x=Wxbg3;j2$C|f6KCRP!jLEDu z&sK6twNgR2(eRgoNo3k^9)9UaA$B@=>UlDObMY>7tn-KWJzL>Z0f575I-a-18fKcl zI>6WjzDBpv!Q^%9J7@&23&=dM#$V(dj>NOg&E9#qd#Anr)Xib0LWD0mav@LhGDFHA zuRBRMCG?5Nv^RAUZwGHL4i@aE0Kk!z+s=Z0oWJ8VOj|lzbp)M2L8xT9c@-^lxO4$` zUu|(mZAImshHIUvlA#)7vGhDWf?&OHg86ei@+uUL)4dr_U%2$8oXqPz2+E*Fy|UHws#EB5KF;+? z9V99Y{~EAE&fa2UwR1r5g9;PF=cGw98HSR)hjaF=v~LbF#*tD6w6Vot z?W#6G_C3zFIws|{#f3lplU@#9oU28JYU<$2aB83W zJ+5t@vM$#PpI$k2a+l)&x|{-Ms`@nfq%;Erlb7mb?EjF(nB4G9`D^;?;T9NbFbt4| z%3J5>XIhjvNetuP6 ze@6*ZYY|lZVA%;0&1?SI#$dZfVDE{f%F^nC00`!Bf?06YyX@WTODW29RF+QU1y9!a z$Tt&L&oQUM)q??nM@G>8}|2dQ^ zb#yCMi3)l!y{oyi4AdWlhDm%DSXcZ3W_N{MG-QLdD(+f%^isa$QtIZpAd0cU@ zDMnu$&{T%NE#N(uJUtrokDt)m20{Wy^R*f7w{py`9~6mM2UnR`M7f6cdu6#w+&GJF z{dMN!>o*6(wI>Gd+d6-ALj8OBi}!jVRh=CjQHa-_kACUn^!0fn_n>ckHy&B|BI}Jx zG|q`hQzF#1b!+Bwq{b8+b3B|XoOnRUx|rf?Qe5mRxuj|IbRuu zjrvkiNnnLiS<={(d7L$`lJR|y04*u$+UZ1*@XnRCALgBX(F*FJmMT6fzI!brPK~dc z6KZM(G5}g4ABv#z?hx7 zA%0$`El{G+cN<;Z!KQ(PkH{6lrAnUVMK@eGkfVLF#0*Cgu0RDQWPW+>oO#@Qnh6M6 zixZ_f(nNjUe<3uUGcH`se0~|US6xdBw8JL9^!S~!(bN9DlEQ&Rb+OUB?qRP+l_5Lx zZby1fIp8{{+C`=QKrv9-b?DE3C~hO3O0-<2IDad+n#rXT3ye;F8S7j-LJ=i;=5_UU z*NxBV{AsQx;T4e6jf_eCcNcnk&|D@)bqWgUai*)yFAT2GbXLKaW0lEsiOS&|=RQTt zBqwW%U-u3qDTT+WpYLcvS?n5FERM~lUN9E4_gos&*7>5@v|hhVKwELDjLZ%_`Y<0m z%$xS3OfQVt+^oLwq$sYa^j_U?rOK|H<}yA0>LBspvX~kT;3TC|P!QH^sXJ=Bj#4P{ z-Znao%c-?)@DrAvAZ{|)`cHIX9cYaw-iAY&7wH0MS{nj3_Nj!uQ>64c+LCcoHBUBS{lBslVgZ3bzKAhbhwDVyZz>xZ``OWupe@y^Bg4_q^+&=cf zVDjpM*O81J18Mq2a&iXUzMPg1&bC3fe!raU3Uiz`hh7#X1^sAe5_rBLS314`s12`s zI%kYuXrXm3&MyVOW;SPW#VYR|6Z10XYvqYV)T7dt-iuJ$xjWE6h&HuX943qazMUoDLGFZ zd@1r>nnhAp;mfyzLnE&FsfHHT+M41wKW(}@Cp0JZk8$Q$D-F)%>dl2O4m&11A(_&S(A2s1>tB{`I|cEg7Aj7BVHfBQG> z?rDPgY1ap0T<{alv+Z(MT9{4={`noB-E!2&Dd_%nRA2Uq1F)~7SM;=)IruIFK!}nY zFcheJPWb_OwKaJNTcC_j_!G}Vjz^FW2LI&eMPGSG*fn3YB3re^RVrzB^%UtuUgQ9t zssxuS9TlLGkjtE(c($-RnjIn|Lx!xL0Zs>_l^&V=u`cA(y>5ugU-d34;#O3gh3~TH z!u=owr?8Kq8eM)4twD^7Sv~56o~1FFF{&XhSGk6r4?H$o8nTHuxW6qNiIjNgN+D;BdM3}rbErK6&m6?3|`^*3dRFa6!7`DpZ6q&U9nep>O*#RVB0_0!&N7Gh?#k*G*YnLw`U{ z#nt{@J=C(AZ5a}L!s8uSNvNW=sO~vd5>D7ut_Y683CEu7fH3V zufisD2ZV46x@>kOUUy>5(B~y20wfZ_Y#|DYoNm&e1MJ4grMU2#*%4p+3gb@a2nC~} z)>md-+5NLQly)gGeuzTo@zSjSDEKLjmr(VBOayc3BsZyEoz`0Xtm5?@bX(Ml=_?|% z$1L!Ovj8VG<5X}fupaN8o*u!1stWP;!T?b261E)jA3BpEx4{jFffV+4A1g@!)Hq(+ z2m>+;lo0!gXsd6;+vjWw2kdrAZh*x=9!-fA7%`?vI94x+V>jou%L+-c4sW4_4qNCO z1@Ym9Iw?<6{&X-{Iw?(!lrb1bH#sz0fq5E={*8#`Rn7E0eIINf;t~IKp9~*(GvY%YzWsE^ z5=EJ(i1_osUN%XSd(aa4*4*ZeoR=rWr~GTHhPJ}KSqw1*sIxaejz$eXl;5~H>LW5Q zh5}I>WJFrwi|U)Dt-vBOSIBsf{35GJ>ZUQA6PCX{Ll$E7arKrb_`SstS{4%5OyZY; z+~9fgkLUHWPP$(X)`7N}+SeUct`fb+V__9LH%%3#^F$y2Jbmyd#Ztg+j;H z76U-`kmY+$ZcGTA@Fh6bk0oVob|UHV{hM1;E>_<<-Vqm&%7ViNT8q%tQ=O46!{L=H zFxgMwHXvPyoX`c$WQgM3VZl=em{wZV+92=FGxZxvK=diV^z7Xcn9wk2vUJTi+%M(GJa9FwHpbMA>-rLhw zWHD}xgA_0qc;u^HCB<@h=*<1ri@3%|x>4Y&nFG=B%s+9|QtFbovKGiu&^pdoZ`0O( zkz{BvYiIQ1*^|}P2bW7=dS{5ePLq8;J+hx91<+m;ztxGv*qadIM5+MlCT)1p3C{g_ zKQ5$B+{ zI!HKQN^sFu5HKA=a=#n&Iha+;LOgIl&>1g$uo-8>Ol07h<#JMxIoyGHt$Bk{mk~*l zR36#WCVO~7)x!oWX%;grGuv*i3m8~Xyu@f%)N~Nos3U7nboZ|*-x3$qrtoFp)OLgb z3DRa=fFBlBRW&Uj>?;!i*#O4;&;zxpp+~x4K_ed5US6eQ-B}D#<8tRCwXA^+*F=y| z3P9qTRk8nSi_IX`62UquHM}m2b#zu7^r{=-yqogmZEDVX4)NfE?I4SV%E)-0if&Q& zSt|tVi13}^@anX|@pfU%4T7-hw?=2G)(b*2#x-7=?m|W->}iUd1ENIX-ZZcKsf&XG zj9Zk5=5#Gfi=m5f&cQIE>J>;=s!Z{CM_2CG61KKL_8wrrW?&=KrKPhx{&VkbB&E2d zk&ih9f6}kXro5kt$k4_Q4(7Me@{LiHh@|F#YU?zDRjwAg1r{utp=gQfrC6uszsTE7+Wa1l)BwE@JMLS}1y%7={i&h^#I#UE1HQ^d}sz=IhGxC+c z)^!|sY`Q?3osAa@aORqKq2DIIk5d2Z#!D}LBv<-hi+18~jEWw5r7NUM zL$XrhS6GG}+eCy?JG0(z4|5HSmiOCY9?sqZIzncvjoPEt28lJ}4VBxN8EQ5)!X1LG zo-oYAkc*Z0$iF`*R8+`M@LsYIb>m10ElgB+og3{EeK7PeU?8hnMBQOlw=SnbZ>shu z;Yjwxoq4L@mt^R-k4qkcl$%yKXKXKKPOe;OdxVqIVJN=%LoP@R~aGqUU{8qD= zwvz!Kg7c$&8cDY*areGsqND}h;I~L|wV=Pd;tF`GXTQ9YvLzLhc>=!c0vK3(9BLu0mf4fg+b=ymX#~am0N-#vN}22dRmKBm5Yi zw1T`*OlEPHkeh983Qw3dxMD2cv(XpSw6u8SsY}i%>4DZBMF)yo*v-)Wl&fEAW_UC; z2?EJWmhUw{>$@t<#zI;=&x+|-fVRv>7H%u`GY@B)%#L2E!=$Oix*hn1>vO-mccmP% zEqYsKf_z)i$nLhlw7|5OgaswLk?XDIqL(i^xqHj&DR9I*Su04Bjl<@w3Koj2v(EMKo#`@W?dI|S~Xk9*RXo~gbFLIHdd$SJ;+*CoFk;#cTKO? zH#u*$*iIW(7dw zD)If)QdO63^i1}>k8QBsARg+*)ZRGdD=Pl(AUjA0_uvnF!IY{`W1@srKXv85G`PT+ z!oqojdR6EOrTw>NQG=3PTN3A|H1#>fXwmx^k&(1mi@K!+i=fLAVrkA6F)?x6_kMkW zNOz^4FTg{8E5H|8f3!$>eqdbJadj8FxPA8E?;roXJ|lGOlvI2ISejopeG+k^Eq6v# zN#^{Si}7CC(d$X@G~G`d=wrQL3u|tX3E{W84Gzr3AXk}gjcz-TU+Tr52S>N}Lk{%J z7d&JZ?Zw}Yzo@KP&B2Q}=&dK`5M*Vb5Cym^y0WM^yLjeN#nagpQ}TdxvRk5*s8^=( z3^#1p6!$y3=o!3w=T*pJCcMdQ&{LqDyxw^)XW6|gF>Afz(o=bsu?+QfsYi9=>@AUJ z+Qe%FYioxc6Jsqw$o(&}qB`NH^G1Sg3pxVF(H^b-CN_vm=F-HHG{jl7;Fjes`U z>DgV7h2|X!FVMUy+d7=O7ke5-R>I3WQ8dl2MEeKNvs9hMKDl(8^7+%qU#%6V#T6N| z$*ErYz#{mAl7;_lw@O&QeAxtebDe2M)HLR)@^myB_P}$SH++7|{d;EOEP3cvojgV6G!yAUZLlaYn;!$z(@b zetfBRa~JNt&jIpW+O}a@>2C(;r10!9I0a$Hcq+;HtiZ;eq^QzCxk6o?*-yT+>1X)j z9vX+=)%+?ytd^uwmvCd-NXOEsvb;=wfb`4CCjHU6s19HDQ&TPXHq~YwyC#90jn!J9 zrT%D<_ohfFq{&}?)Xp|{DyI;*TPmBmpg+hS6H=qf^!20iL!tyDUkn>^=N)ffHJNWx zm7;80YTk*IH)sEgZOz|Kc;`eO27yY?IAc6-dKkH2<)I@P4B5sXAId}@<&g}oOaC&d z(6=oO$nHL$dfbr;$1S`n-Hpht+E&zTv~&CBsv5V92lIB%*%`K~uN4y)Dy(#m`4B@uTqqyrxe8mTR^le2;`S zCAoT)8zzU&{3W+8$wMDX%RB`3-+U&Ro?p7)HE4Nj36&cAc*ph{%Gv~x+xK^qMT+K-4yrfM^D5=L~DH|y9O za5uf{v{bnxrZ(I0u!XppS^s?9@C6Io2uQ%6)sFzW`=s`08#{NE$% z!slN6vxU3y0#de^QpPU*^=t|0wNjhf_|od@n)k&mFWRF3Z5raEilrs--|XzNDm$u* z-?#U^akB6TciZWlCl)Q6bk^P8R2+p?wMIgXgQ(14`um6fMezP_g82W%eU^V0{s%c< BFpU5J literal 0 HcmV?d00001 diff --git a/bsp/stm32/stm32l412-st-nucleo/project.ewd b/bsp/stm32/stm32l412-st-nucleo/project.ewd new file mode 100644 index 0000000000..4b27053590 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/project.ewd @@ -0,0 +1,2834 @@ + + + 3 + + rt-thread + + ARM + + 1 + + C-SPY + 2 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + + 0 + + C-SPY + 2 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 0 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 0 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 0 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 0 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 0 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 0 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 0 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/bsp/stm32/stm32l412-st-nucleo/project.ewp b/bsp/stm32/stm32l412-st-nucleo/project.ewp new file mode 100644 index 0000000000..79cb2f4c71 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/project.ewp @@ -0,0 +1,2329 @@ + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Kernel + + $PROJ_DIR$\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\src\cpu.c + + + $PROJ_DIR$\..\..\..\src\device.c + + + $PROJ_DIR$\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\..\src\signal.c + + + $PROJ_DIR$\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\src\timer.c + + + + Applications + + $PROJ_DIR$\applications\main.c + + + + Drivers + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\board\CubeMX_Config\Src\stm32l4xx_hal_msp.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\iar\startup_stm32l432xx.s + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c + + + + cpu + + $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c + + + $PROJ_DIR$\..\..\..\components\drivers\rtc\rtc.c + + + $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\completion.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\watchdog\watchdog.c + + + + finsh + + $PROJ_DIR$\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\..\components\finsh\msh.c + + + + libc + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c + + + + dlib + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\libc.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\rmtx.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\stdio.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c + + + + STM32_HAL + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + + + $PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_wwdg.c + + + diff --git a/bsp/stm32/stm32l412-st-nucleo/project.eww b/bsp/stm32/stm32l412-st-nucleo/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvoptx b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx new file mode 100644 index 0000000000..d18ee55260 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx @@ -0,0 +1,186 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 5 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U066AFF534854845187093307 -O206 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_256 -FL040000 -FS08000000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) + + + 0 + JL2CM3 + -U -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32L475VETx$CMSIS\Flash\STM32L4xx_512.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + + + 0 + + 1 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + +
diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvprojx b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx new file mode 100644 index 0000000000..85d9948d49 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx @@ -0,0 +1,893 @@ + + + 2.1 +
### uVision Project, (C) Keil Software
+ + + rt-thread + 0x4 + ARM-ADS + 5060300::V5.06 update 3 (build 300)::ARMCC + + + STM32L432KCUx + STMicroelectronics + Keil.STM32L4xx_DFP.2.0.0 + http://www.keil.com/pack + IRAM(0x20000000,0x0000C000) IRAM2(0x10000000,0x00004000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM)) + 0 + $$Device:STM32L432KCUx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L432KCUx$CMSIS\SVD\STM32L4x2.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 1 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xc000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER, STM32L432xx, RT_USING_ARM_LIBC + + .;..\..\..\include;.;applications;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + + + components.c + 1 + ..\..\..\src\components.c + + + + + cpu.c + 1 + ..\..\..\src\cpu.c + + + + + device.c + 1 + ..\..\..\src\device.c + + + + + idle.c + 1 + ..\..\..\src\idle.c + + + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + + + irq.c + 1 + ..\..\..\src\irq.c + + + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + + + mem.c + 1 + ..\..\..\src\mem.c + + + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + + + object.c + 1 + ..\..\..\src\object.c + + + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + + + signal.c + 1 + ..\..\..\src\signal.c + + + + + thread.c + 1 + ..\..\..\src\thread.c + + + + + timer.c + 1 + ..\..\..\src\timer.c + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + board\board.c + + + + + stm32l4xx_hal_msp.c + 1 + board\CubeMX_Config\Src\stm32l4xx_hal_msp.c + + + + + startup_stm32l432xx.s + 2 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l432xx.s + + + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + cpu + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + + + rtc.c + 1 + ..\..\..\components\drivers\rtc\rtc.c + + + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + + + watchdog.c + 1 + ..\..\..\components\drivers\watchdog\watchdog.c + + + + + finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + + + libc + + + libc.c + 1 + ..\..\..\components\libc\compilers\armlibc\libc.c + + + + + mem_std.c + 1 + ..\..\..\components\libc\compilers\armlibc\mem_std.c + + + + + stubs.c + 1 + ..\..\..\components\libc\compilers\armlibc\stubs.c + + + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + STM32_HAL + + + system_stm32l4xx.c + 1 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c + + + + + stm32l4xx_hal.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + + + stm32l4xx_hal_comp.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + + + stm32l4xx_hal_cortex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + + + stm32l4xx_hal_crc.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + + + stm32l4xx_hal_crc_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + + + stm32l4xx_hal_cryp.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + + + stm32l4xx_hal_cryp_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + + + stm32l4xx_hal_dma.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + + + stm32l4xx_hal_dma_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + + + stm32l4xx_hal_exti.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + + + + + stm32l4xx_hal_pwr.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + + + stm32l4xx_hal_rcc.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + + + stm32l4xx_hal_rng.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + + + + + stm32l4xx_hal_gpio.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + + + stm32l4xx_hal_uart.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + + + stm32l4xx_hal_uart_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + + + stm32l4xx_hal_usart.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + + + + + stm32l4xx_hal_usart_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + + + + + stm32l4xx_hal_rtc.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + + + + + stm32l4xx_hal_rtc_ex.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + + + + + stm32l4xx_hal_iwdg.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + + + + + stm32l4xx_hal_wwdg.c + 1 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_wwdg.c + + + + + + +
diff --git a/bsp/stm32/stm32l412-st-nucleo/rtconfig.h b/bsp/stm32/stm32l412-st-nucleo/rtconfig.h new file mode 100644 index 0000000000..f5182e5999 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/rtconfig.h @@ -0,0 +1,178 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 256 +#define RT_CONSOLE_DEVICE_NAME "uart2" +#define RT_VER_NUM 0x40001 +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_USING_PIN +#define RT_USING_RTC +#define RT_USING_WDT + +/* Using WiFi */ + + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_USING_LIBC + +/* Network */ + +/* Socket abstraction layer */ + + +/* light weight TCP/IP stack */ + + +/* Modbus master and slave stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* ARM CMSIS */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32L4 + +/* Hardware Drivers Config */ + +#define SOC_STM32L432KC + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_STLINK_TO_USART + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART2 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32l412-st-nucleo/rtconfig.py b/bsp/stm32/stm32l412-st-nucleo/rtconfig.py new file mode 100644 index 0000000000..ab166e687d --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/rtconfig.py @@ -0,0 +1,144 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + #EXEC_PATH = r'C:\Users\XXYYZZ' + EXEC_PATH = r'/home/rudy/opt/gcc-arm-none-eabi-7-2017-q4-major/bin/' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict --scatter "board\linker_scripts\link.sct"' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32l412-st-nucleo/template.ewp b/bsp/stm32/stm32l412-st-nucleo/template.ewp new file mode 100644 index 0000000000..f390ad7bc1 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/template.ewp @@ -0,0 +1,2031 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/stm32/stm32l412-st-nucleo/template.eww b/bsp/stm32/stm32l412-st-nucleo/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/stm32/stm32l412-st-nucleo/template.uvoptx b/bsp/stm32/stm32l412-st-nucleo/template.uvoptx new file mode 100644 index 0000000000..d18ee55260 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/template.uvoptx @@ -0,0 +1,186 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 5 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U066AFF534854845187093307 -O206 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_256 -FL040000 -FS08000000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) + + + 0 + JL2CM3 + -U -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32L475VETx$CMSIS\Flash\STM32L4xx_512.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + + + 0 + + 1 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + +
diff --git a/bsp/stm32/stm32l412-st-nucleo/template.uvprojx b/bsp/stm32/stm32l412-st-nucleo/template.uvprojx new file mode 100644 index 0000000000..01e792faf7 --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/template.uvprojx @@ -0,0 +1,386 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060300::V5.06 update 3 (build 300)::ARMCC + + + STM32L432KCUx + STMicroelectronics + Keil.STM32L4xx_DFP.2.0.0 + http://www.keil.com/pack + IRAM(0x20000000,0x0000C000) IRAM2(0x10000000,0x00004000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM)) + 0 + $$Device:STM32L432KCUx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L432KCUx$CMSIS\SVD\STM32L4x2.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 1 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0xc000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + +
-- Gitee From 03eb616ff6f5227efd6bb786f33294283bf96246 Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Fri, 24 Apr 2020 08:46:56 +0800 Subject: [PATCH 16/54] [tools] fix c99/siginfo_t issue caused by gcc_version --- tools/utils.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/utils.py b/tools/utils.py index 9459396544..67ce098ccd 100644 --- a/tools/utils.py +++ b/tools/utils.py @@ -273,7 +273,7 @@ def VersionCmp(ver1, ver2): def GCCC99Patch(cflags): import building - gcc_version = building.GetDepend('GCC_VERSION') + gcc_version = building.GetDepend('GCC_VERSION_STR') if gcc_version: gcc_version = gcc_version.replace('"', '') if VersionCmp(gcc_version, "4.8.0") == 1: -- Gitee From db327dc2e6736843a41012b3903df2dd69cc432a Mon Sep 17 00:00:00 2001 From: luhuadong Date: Fri, 24 Apr 2020 21:58:06 +0800 Subject: [PATCH 17/54] [BSP] Adjust RCC for stm32l412-st-nucleo BSP --- bsp/stm32/stm32l412-st-nucleo/README.md | 2 +- bsp/stm32/stm32l412-st-nucleo/applications/main.c | 12 ++++++------ bsp/stm32/stm32l412-st-nucleo/board/board.c | 3 +-- 3 files changed, 8 insertions(+), 9 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/README.md b/bsp/stm32/stm32l412-st-nucleo/README.md index 73b83e6fee..ce4af7d1f8 100644 --- a/bsp/stm32/stm32l412-st-nucleo/README.md +++ b/bsp/stm32/stm32l412-st-nucleo/README.md @@ -86,7 +86,7 @@ USB 虚拟 COM 端口默认连接串口 2,在终端工具里打开相应的串 ```bash \ | / - RT - Thread Operating System - / | \ 4.0.0 build Jan 9 2020 + / | \ 4.0.3 build Apr 24 2020 2006 - 2020 Copyright by rt-thread team msh > ``` diff --git a/bsp/stm32/stm32l412-st-nucleo/applications/main.c b/bsp/stm32/stm32l412-st-nucleo/applications/main.c index ad5174ccb7..2511e7a3bc 100644 --- a/bsp/stm32/stm32l412-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l412-st-nucleo/applications/main.c @@ -12,20 +12,20 @@ #include #include -/* defined the LED0 pin: PB3 */ -#define LED0_PIN GET_PIN(B, 3) +/* defined the LD4 pin: PB13 */ +#define LD4_PIN GET_PIN(B, 13) int main(void) { int count = 1; - /* set LED0 pin mode to output */ - rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + /* set LD4 pin mode to output */ + rt_pin_mode(LD4_PIN, PIN_MODE_OUTPUT); while (count++) { - rt_pin_write(LED0_PIN, PIN_HIGH); + rt_pin_write(LD4_PIN, PIN_HIGH); rt_thread_mdelay(500); - rt_pin_write(LED0_PIN, PIN_LOW); + rt_pin_write(LD4_PIN, PIN_LOW); rt_thread_mdelay(500); } diff --git a/bsp/stm32/stm32l412-st-nucleo/board/board.c b/bsp/stm32/stm32l412-st-nucleo/board/board.c index f1896c3dc5..70a17da702 100644 --- a/bsp/stm32/stm32l412-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l412-st-nucleo/board/board.c @@ -33,8 +33,7 @@ void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 16; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLN = 40; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) -- Gitee From d47f03788fc8dd50e75b30b33dae9085f7e2ebe1 Mon Sep 17 00:00:00 2001 From: luhuadong <870179822@qq.com> Date: Fri, 24 Apr 2020 23:43:28 +0800 Subject: [PATCH 18/54] [BSP] update stm32l412-st-nucleo mdk5 project --- bsp/stm32/stm32l412-st-nucleo/project.uvoptx | 928 +++++++++++++++++- bsp/stm32/stm32l412-st-nucleo/project.uvprojx | 251 ++--- 2 files changed, 985 insertions(+), 194 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvoptx b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx index d18ee55260..6d8b572748 100644 --- a/bsp/stm32/stm32l412-st-nucleo/project.uvoptx +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx @@ -73,7 +73,7 @@ 0 - 0 + 1 0 1 @@ -100,7 +100,10 @@ 1 0 0 - 5 + 1 + 0 + 0 + 6 @@ -117,17 +120,12 @@ 0 ST-LINKIII-KEIL_SWO - -U066AFF534854845187093307 -O206 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) + -U0672FF495649657867191218 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) 0 UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_256 -FL040000 -FS08000000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM) - - - 0 - JL2CM3 - -U -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32L475VETx$CMSIS\Flash\STM32L4xx_512.FLM) + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) @@ -163,11 +161,19 @@ 0 - - - 0 + 0 + 0 + + + + + + + + 1 + 0 0 2 10000000 @@ -176,11 +182,907 @@ - Source Group 1 + Kernel + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\..\src\cpu.c + cpu.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + ..\..\..\src\signal.c + signal.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 1 + 15 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Applications + 1 + 0 + 0 + 0 + + 2 + 16 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 3 + 17 + 1 + 0 + 0 + 0 + board\board.c + board.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + board\CubeMX_Config\Src\stm32l4xx_hal_msp.c + stm32l4xx_hal_msp.c + 0 + 0 + + + 3 + 19 + 2 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l432xx.s + startup_stm32l432xx.s + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart.c + drv_usart.c + 0 + 0 + + + 3 + 22 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + cpu + 0 + 0 + 0 + 0 + + 4 + 23 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 4 + 26 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + cpuport.c + 0 + 0 + + + 4 + 27 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 5 + 28 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 5 + 29 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\rtc\rtc.c + rtc.c + 0 + 0 + + + 5 + 30 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 5 + 36 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + 5 + 38 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\watchdog\watchdog.c + watchdog.c + 0 + 0 + + + + + finsh + 0 + 0 + 0 + 0 + + 6 + 39 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 40 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + 6 + 41 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 42 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\libc.c + libc.c + 0 + 0 + + + 7 + 43 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\mem_std.c + mem_std.c + 0 + 0 + + + 7 + 44 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\stubs.c + stubs.c + 0 + 0 + + + 7 + 45 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + STM32_HAL 0 0 0 0 + + 8 + 46 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c + system_stm32l4xx.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + stm32l4xx_hal.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + stm32l4xx_hal_comp.c + 0 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + stm32l4xx_hal_cortex.c + 0 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + stm32l4xx_hal_crc.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + stm32l4xx_hal_crc_ex.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + stm32l4xx_hal_cryp.c + 0 + 0 + + + 8 + 53 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + stm32l4xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 54 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + stm32l4xx_hal_dma.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + stm32l4xx_hal_dma_ex.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + stm32l4xx_hal_exti.c + 0 + 0 + + + 8 + 57 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + stm32l4xx_hal_pwr.c + 0 + 0 + + + 8 + 58 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + stm32l4xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 59 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + stm32l4xx_hal_rcc.c + 0 + 0 + + + 8 + 60 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + stm32l4xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 61 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + stm32l4xx_hal_rng.c + 0 + 0 + + + 8 + 62 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + stm32l4xx_hal_gpio.c + 0 + 0 + + + 8 + 63 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + stm32l4xx_hal_uart.c + 0 + 0 + + + 8 + 64 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + stm32l4xx_hal_uart_ex.c + 0 + 0 + + + 8 + 65 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + stm32l4xx_hal_usart.c + 0 + 0 + + + 8 + 66 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + stm32l4xx_hal_usart_ex.c + 0 + 0 + + + 8 + 67 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + stm32l4xx_hal_rtc.c + 0 + 0 + + + 8 + 68 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + stm32l4xx_hal_rtc_ex.c + 0 + 0 + + + 8 + 69 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + stm32l4xx_hal_iwdg.c + 0 + 0 + + + 8 + 70 + 1 + 0 + 0 + 0 + ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_wwdg.c + stm32l4xx_hal_wwdg.c + 0 + 0 + diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvprojx b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx index 85d9948d49..f00e076f51 100644 --- a/bsp/stm32/stm32l412-st-nucleo/project.uvprojx +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx @@ -1,42 +1,46 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ rt-thread 0x4 ARM-ADS - 5060300::V5.06 update 3 (build 300)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 - STM32L432KCUx + STM32L412CBTx STMicroelectronics - Keil.STM32L4xx_DFP.2.0.0 - http://www.keil.com/pack - IRAM(0x20000000,0x0000C000) IRAM2(0x10000000,0x00004000) IROM(0x08000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE - - - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L432KCUx$CMSIS\Flash\STM32L4xx_256.FLM)) + Keil.STM32L4xx_DFP.2.3.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00008000) IRAM2(0x10000000,0x00002000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_128 -FS08000000 -FL020000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM)) 0 - $$Device:STM32L432KCUx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h - - - - - - - - - - $$Device:STM32L432KCUx$CMSIS\SVD\STM32L4x2.svd + $$Device:STM32L412CBTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L412CBTx$CMSIS\SVD\STM32L412.svd 0 0 - - - - - + + + + + 0 0 @@ -58,8 +62,8 @@ 0 0 - - + + 0 0 0 @@ -68,8 +72,8 @@ 0 0 - - + + 0 0 0 @@ -79,14 +83,14 @@ 1 0 fromelf --bin !L --output rtthread.bin - + 0 0 0 0 0 - + 0 @@ -100,8 +104,8 @@ 0 0 3 - - + + 1 @@ -135,10 +139,10 @@ 1 BIN\UL2CM3.DLL "" () - - - - + + + + 0 @@ -171,7 +175,7 @@ 0 0 "Cortex-M4" - + 0 0 0 @@ -180,6 +184,7 @@ 0 0 2 + 0 1 0 8 @@ -188,7 +193,7 @@ 0 0 3 - 3 + 4 0 0 0 @@ -240,12 +245,12 @@ 0 0x20000000 - 0xc000 + 0x8000 1 0x8000000 - 0x40000 + 0x20000 0 @@ -270,7 +275,7 @@ 1 0x8000000 - 0x40000 + 0x20000 1 @@ -295,15 +300,15 @@ 0 0x20000000 - 0x10000 + 0x8000 0 - 0x0 - 0x0 + 0x10000000 + 0x2000 - + 1 @@ -320,6 +325,7 @@ 0 0 1 + 0 0 1 1 @@ -329,9 +335,9 @@ 0 0 - + USE_HAL_DRIVER, STM32L432xx, RT_USING_ARM_LIBC - + .;..\..\..\include;.;applications;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include @@ -347,10 +353,10 @@ 0 0 - - - - + + + + @@ -362,13 +368,13 @@ 0 0x08000000 0x20000000 - + .\board\linker_scripts\link.sct - - - - - + + + + + @@ -381,99 +387,71 @@ 1 ..\..\..\src\clock.c
-
- components.c 1 ..\..\..\src\components.c - - cpu.c 1 ..\..\..\src\cpu.c - - device.c 1 ..\..\..\src\device.c - - idle.c 1 ..\..\..\src\idle.c - - ipc.c 1 ..\..\..\src\ipc.c - - irq.c 1 ..\..\..\src\irq.c - - kservice.c 1 ..\..\..\src\kservice.c - - mem.c 1 ..\..\..\src\mem.c - - mempool.c 1 ..\..\..\src\mempool.c - - object.c 1 ..\..\..\src\object.c - - scheduler.c 1 ..\..\..\src\scheduler.c - - signal.c 1 ..\..\..\src\signal.c - - thread.c 1 ..\..\..\src\thread.c - - timer.c 1 @@ -499,36 +477,26 @@ 1 board\board.c - - stm32l4xx_hal_msp.c 1 board\CubeMX_Config\Src\stm32l4xx_hal_msp.c - - startup_stm32l432xx.s 2 ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l432xx.s - - drv_gpio.c 1 ..\libraries\HAL_Drivers\drv_gpio.c - - drv_usart.c 1 ..\libraries\HAL_Drivers\drv_usart.c - - drv_common.c 1 @@ -544,29 +512,21 @@ 1 ..\..\..\libcpu\arm\common\backtrace.c - - div0.c 1 ..\..\..\libcpu\arm\common\div0.c - - showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - cpuport.c 1 ..\..\..\libcpu\arm\cortex-m4\cpuport.c - - context_rvds.S 2 @@ -582,71 +542,51 @@ 1 ..\..\..\components\drivers\misc\pin.c - - rtc.c 1 ..\..\..\components\drivers\rtc\rtc.c - - serial.c 1 ..\..\..\components\drivers\serial\serial.c - - completion.c 1 ..\..\..\components\drivers\src\completion.c - - dataqueue.c 1 ..\..\..\components\drivers\src\dataqueue.c - - pipe.c 1 ..\..\..\components\drivers\src\pipe.c - - ringblk_buf.c 1 ..\..\..\components\drivers\src\ringblk_buf.c - - ringbuffer.c 1 ..\..\..\components\drivers\src\ringbuffer.c - - waitqueue.c 1 ..\..\..\components\drivers\src\waitqueue.c - - workqueue.c 1 ..\..\..\components\drivers\src\workqueue.c - - watchdog.c 1 @@ -662,15 +602,11 @@ 1 ..\..\..\components\finsh\shell.c - - cmd.c 1 ..\..\..\components\finsh\cmd.c - - msh.c 1 @@ -686,22 +622,16 @@ 1 ..\..\..\components\libc\compilers\armlibc\libc.c - - mem_std.c 1 ..\..\..\components\libc\compilers\armlibc\mem_std.c - - stubs.c 1 ..\..\..\components\libc\compilers\armlibc\stubs.c - - time.c 1 @@ -717,169 +647,121 @@ 1 ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c - - stm32l4xx_hal.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c - - stm32l4xx_hal_comp.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c - - stm32l4xx_hal_cortex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c - - stm32l4xx_hal_crc.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c - - stm32l4xx_hal_crc_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c - - stm32l4xx_hal_cryp.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c - - stm32l4xx_hal_cryp_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c - - stm32l4xx_hal_dma.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c - - stm32l4xx_hal_dma_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c - - stm32l4xx_hal_exti.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c - - stm32l4xx_hal_pwr.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c - - stm32l4xx_hal_pwr_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c - - stm32l4xx_hal_rcc.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c - - stm32l4xx_hal_rcc_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c - - stm32l4xx_hal_rng.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c - - stm32l4xx_hal_gpio.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c - - stm32l4xx_hal_uart.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c - - stm32l4xx_hal_uart_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c - - stm32l4xx_hal_usart.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c - - stm32l4xx_hal_usart_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c - - stm32l4xx_hal_rtc.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c - - stm32l4xx_hal_rtc_ex.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c - - stm32l4xx_hal_iwdg.c 1 ..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c - - stm32l4xx_hal_wwdg.c 1 @@ -890,4 +772,11 @@ + + + + + + + -- Gitee From b3dc8111db8f6e2ea44bc0fbc99b7493cab5a57e Mon Sep 17 00:00:00 2001 From: luhuadong <870179822@qq.com> Date: Fri, 24 Apr 2020 23:46:38 +0800 Subject: [PATCH 19/54] [BSP] update stm32l412-st-nucleo mdk5 project --- bsp/stm32/stm32l412-st-nucleo/.config | 130 +++++++++++--- bsp/stm32/stm32l412-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32l412-st-nucleo/project.uvoptx | 160 ++++++++---------- bsp/stm32/stm32l412-st-nucleo/project.uvprojx | 13 +- bsp/stm32/stm32l412-st-nucleo/rtconfig.h | 16 +- 5 files changed, 193 insertions(+), 128 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/.config b/bsp/stm32/stm32l412-st-nucleo/.config index ed539bf2a8..288363f85b 100644 --- a/bsp/stm32/stm32l412-st-nucleo/.config +++ b/bsp/stm32/stm32l412-st-nucleo/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -63,8 +64,9 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" -CONFIG_RT_VER_NUM=0x40001 +CONFIG_RT_VER_NUM=0x40003 CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set @@ -111,8 +113,10 @@ CONFIG_FINSH_ARG_MAX=10 # CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set @@ -122,18 +126,19 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_MTD is not set # CONFIG_RT_USING_PM is not set CONFIG_RT_USING_RTC=y +# CONFIG_RT_USING_ALARM is not set # CONFIG_RT_USING_SOFT_RTC is not set # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set CONFIG_RT_USING_WDT=y # CONFIG_RT_USING_AUDIO is not set - -# -# Using WiFi -# +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_WIFI is not set # @@ -147,6 +152,7 @@ CONFIG_RT_USING_WDT=y # CONFIG_RT_USING_LIBC=y # CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set # # Network @@ -158,14 +164,14 @@ CONFIG_RT_USING_LIBC=y # CONFIG_RT_USING_SAL is not set # -# light weight TCP/IP stack +# Network interface device # -# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_NETDEV is not set # -# Modbus master and slave stack +# light weight TCP/IP stack # -# CONFIG_RT_USING_MODBUS is not set +# CONFIG_RT_USING_LWIP is not set # # AT commands @@ -180,16 +186,9 @@ CONFIG_RT_USING_LIBC=y # # Utilities # -# CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set - -# -# ARM CMSIS -# -# CONFIG_RT_USING_CMSIS_OS is not set -# CONFIG_RT_USING_RTT_CMSIS is not set # CONFIG_RT_USING_LWP is not set # @@ -203,9 +202,14 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_WEBCLIENT is not set # CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set @@ -227,7 +231,9 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set # CONFIG_PKG_USING_WIZNET is not set # @@ -237,8 +243,28 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_GAGENT_CLOUD is not set # CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_AZURE is not set -# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_TENCENT_IOTHUB is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set # CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set # # security packages @@ -246,6 +272,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_MBEDTLS is not set # CONFIG_PKG_USING_libsodium is not set # CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set # # language packages @@ -259,6 +286,9 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set # # tools packages @@ -271,6 +301,13 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_URLENCODE is not set # # system packages @@ -288,21 +325,56 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set # # peripheral libraries and drivers # +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set -# CONFIG_PKG_USING_AHT10 is not set -# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_BUTTON is not set -# CONFIG_PKG_USING_MPU6XXX is not set # CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set # # miscellaneous packages @@ -313,11 +385,15 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set # CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set # # samples: kernel and components samples @@ -328,13 +404,20 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set # CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_UKAL is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32L4=y # # Hardware Drivers Config # -CONFIG_SOC_STM32L432KC=y +CONFIG_SOC_STM32L412RB=y # # Onboard Peripheral Drivers @@ -351,6 +434,9 @@ CONFIG_BSP_USING_UART2=y # CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_ONCHIP_RTC is not set # CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_CRC is not set +# CONFIG_BSP_USING_RNG is not set +# CONFIG_BSP_USING_UDID is not set # # Board extended module Drivers diff --git a/bsp/stm32/stm32l412-st-nucleo/board/Kconfig b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig index 181be78e77..339e77bea4 100644 --- a/bsp/stm32/stm32l412-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig @@ -1,6 +1,6 @@ menu "Hardware Drivers Config" -config SOC_STM32L432KC +config SOC_STM32L412RB bool select SOC_SERIES_STM32L4 select RT_USING_COMPONENTS_INIT diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvoptx b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx index 6d8b572748..54b8659855 100644 --- a/bsp/stm32/stm32l412-st-nucleo/project.uvoptx +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvoptx @@ -73,7 +73,7 @@ 0 - 1 + 0 0 1 @@ -119,13 +119,13 @@ 0 - ST-LINKIII-KEIL_SWO - -U0672FF495649657867191218 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("") -D00(00000000) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) + ST-LINKIII-KEIL_SWO + -U0672FF495649657867191218 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32L412CBTx$CMSIS\Flash\STM32L4xx_128.FLM) @@ -218,18 +218,6 @@ 0 0 0 - ..\..\..\src\cpu.c - cpu.c - 0 - 0 - - - 1 - 4 - 1 - 0 - 0 - 0 ..\..\..\src\device.c device.c 0 @@ -237,7 +225,7 @@ 1 - 5 + 4 1 0 0 @@ -249,7 +237,7 @@ 1 - 6 + 5 1 0 0 @@ -261,7 +249,7 @@ 1 - 7 + 6 1 0 0 @@ -273,7 +261,7 @@ 1 - 8 + 7 1 0 0 @@ -285,7 +273,7 @@ 1 - 9 + 8 1 0 0 @@ -297,7 +285,7 @@ 1 - 10 + 9 1 0 0 @@ -309,7 +297,7 @@ 1 - 11 + 10 1 0 0 @@ -321,7 +309,7 @@ 1 - 12 + 11 1 0 0 @@ -333,7 +321,7 @@ 1 - 13 + 12 1 0 0 @@ -345,7 +333,7 @@ 1 - 14 + 13 1 0 0 @@ -357,7 +345,7 @@ 1 - 15 + 14 1 0 0 @@ -371,13 +359,13 @@ Applications - 1 + 0 0 0 0 2 - 16 + 15 1 0 0 @@ -397,7 +385,7 @@ 0 3 - 17 + 16 1 0 0 @@ -409,7 +397,7 @@ 3 - 18 + 17 1 0 0 @@ -421,19 +409,19 @@ 3 - 19 + 18 2 0 0 0 - ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l432xx.s - startup_stm32l432xx.s + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l412xx.s + startup_stm32l412xx.s 0 0 3 - 20 + 19 1 0 0 @@ -445,7 +433,7 @@ 3 - 21 + 20 1 0 0 @@ -457,7 +445,7 @@ 3 - 22 + 21 1 0 0 @@ -477,7 +465,7 @@ 0 4 - 23 + 22 1 0 0 @@ -489,7 +477,7 @@ 4 - 24 + 23 1 0 0 @@ -501,7 +489,7 @@ 4 - 25 + 24 1 0 0 @@ -513,7 +501,7 @@ 4 - 26 + 25 1 0 0 @@ -525,7 +513,7 @@ 4 - 27 + 26 2 0 0 @@ -545,7 +533,7 @@ 0 5 - 28 + 27 1 0 0 @@ -557,7 +545,7 @@ 5 - 29 + 28 1 0 0 @@ -569,7 +557,7 @@ 5 - 30 + 29 1 0 0 @@ -581,7 +569,7 @@ 5 - 31 + 30 1 0 0 @@ -593,7 +581,7 @@ 5 - 32 + 31 1 0 0 @@ -605,7 +593,7 @@ 5 - 33 + 32 1 0 0 @@ -617,7 +605,7 @@ 5 - 34 + 33 1 0 0 @@ -629,7 +617,7 @@ 5 - 35 + 34 1 0 0 @@ -641,7 +629,7 @@ 5 - 36 + 35 1 0 0 @@ -653,7 +641,7 @@ 5 - 37 + 36 1 0 0 @@ -665,7 +653,7 @@ 5 - 38 + 37 1 0 0 @@ -685,7 +673,7 @@ 0 6 - 39 + 38 1 0 0 @@ -697,7 +685,7 @@ 6 - 40 + 39 1 0 0 @@ -709,7 +697,7 @@ 6 - 41 + 40 1 0 0 @@ -729,7 +717,7 @@ 0 7 - 42 + 41 1 0 0 @@ -741,7 +729,7 @@ 7 - 43 + 42 1 0 0 @@ -753,7 +741,7 @@ 7 - 44 + 43 1 0 0 @@ -765,7 +753,7 @@ 7 - 45 + 44 1 0 0 @@ -785,7 +773,7 @@ 0 8 - 46 + 45 1 0 0 @@ -797,7 +785,7 @@ 8 - 47 + 46 1 0 0 @@ -809,7 +797,7 @@ 8 - 48 + 47 1 0 0 @@ -821,7 +809,7 @@ 8 - 49 + 48 1 0 0 @@ -833,7 +821,7 @@ 8 - 50 + 49 1 0 0 @@ -845,7 +833,7 @@ 8 - 51 + 50 1 0 0 @@ -857,7 +845,7 @@ 8 - 52 + 51 1 0 0 @@ -869,7 +857,7 @@ 8 - 53 + 52 1 0 0 @@ -881,7 +869,7 @@ 8 - 54 + 53 1 0 0 @@ -893,7 +881,7 @@ 8 - 55 + 54 1 0 0 @@ -905,7 +893,7 @@ 8 - 56 + 55 1 0 0 @@ -917,7 +905,7 @@ 8 - 57 + 56 1 0 0 @@ -929,7 +917,7 @@ 8 - 58 + 57 1 0 0 @@ -941,7 +929,7 @@ 8 - 59 + 58 1 0 0 @@ -953,7 +941,7 @@ 8 - 60 + 59 1 0 0 @@ -965,7 +953,7 @@ 8 - 61 + 60 1 0 0 @@ -977,7 +965,7 @@ 8 - 62 + 61 1 0 0 @@ -989,7 +977,7 @@ 8 - 63 + 62 1 0 0 @@ -1001,7 +989,7 @@ 8 - 64 + 63 1 0 0 @@ -1013,7 +1001,7 @@ 8 - 65 + 64 1 0 0 @@ -1025,7 +1013,7 @@ 8 - 66 + 65 1 0 0 @@ -1037,7 +1025,7 @@ 8 - 67 + 66 1 0 0 @@ -1049,7 +1037,7 @@ 8 - 68 + 67 1 0 0 @@ -1061,7 +1049,7 @@ 8 - 69 + 68 1 0 0 @@ -1073,7 +1061,7 @@ 8 - 70 + 69 1 0 0 diff --git a/bsp/stm32/stm32l412-st-nucleo/project.uvprojx b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx index f00e076f51..acb15e8337 100644 --- a/bsp/stm32/stm32l412-st-nucleo/project.uvprojx +++ b/bsp/stm32/stm32l412-st-nucleo/project.uvprojx @@ -138,7 +138,7 @@ 1 BIN\UL2CM3.DLL - "" () + @@ -336,7 +336,7 @@ 0 - USE_HAL_DRIVER, STM32L432xx, RT_USING_ARM_LIBC + USE_HAL_DRIVER, STM32L412xx, RT_USING_ARM_LIBC .;..\..\..\include;.;applications;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include @@ -392,11 +392,6 @@ 1 ..\..\..\src\components.c - - cpu.c - 1 - ..\..\..\src\cpu.c - device.c 1 @@ -483,9 +478,9 @@ board\CubeMX_Config\Src\stm32l4xx_hal_msp.c - startup_stm32l432xx.s + startup_stm32l412xx.s 2 - ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l432xx.s + ..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l412xx.s drv_gpio.c diff --git a/bsp/stm32/stm32l412-st-nucleo/rtconfig.h b/bsp/stm32/stm32l412-st-nucleo/rtconfig.h index f5182e5999..4c3726610c 100644 --- a/bsp/stm32/stm32l412-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32l412-st-nucleo/rtconfig.h @@ -39,8 +39,9 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLE_DEVICE_NAME "uart2" -#define RT_VER_NUM 0x40001 +#define RT_VER_NUM 0x40003 #define ARCH_ARM +#define RT_USING_CPU_FFS #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M4 @@ -79,13 +80,11 @@ #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN #define RT_USING_RTC #define RT_USING_WDT -/* Using WiFi */ - - /* Using USB */ @@ -98,10 +97,10 @@ /* Socket abstraction layer */ -/* light weight TCP/IP stack */ +/* Network interface device */ -/* Modbus master and slave stack */ +/* light weight TCP/IP stack */ /* AT commands */ @@ -113,9 +112,6 @@ /* Utilities */ -/* ARM CMSIS */ - - /* RT-Thread online packages */ /* IoT - internet of things */ @@ -160,7 +156,7 @@ /* Hardware Drivers Config */ -#define SOC_STM32L432KC +#define SOC_STM32L412RB /* Onboard Peripheral Drivers */ -- Gitee From 2099924e20fab8529cbd31487833a03368d23125 Mon Sep 17 00:00:00 2001 From: bigmagic Date: Sun, 26 Apr 2020 09:52:31 +0800 Subject: [PATCH 20/54] add raspi3 mbox option --- bsp/raspberry-pi/raspi3-64/driver/mbox.c | 401 +++++++++++++++++++++++ bsp/raspberry-pi/raspi3-64/driver/mbox.h | 64 +++- 2 files changed, 464 insertions(+), 1 deletion(-) diff --git a/bsp/raspberry-pi/raspi3-64/driver/mbox.c b/bsp/raspberry-pi/raspi3-64/driver/mbox.c index 1d995340d6..dc09ecab4b 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/mbox.c +++ b/bsp/raspberry-pi/raspi3-64/driver/mbox.c @@ -47,3 +47,404 @@ int mbox_call(unsigned char ch, int mmu_enable) } return 0; } + +int bcm283x_mbox_hardware_get_model(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_MODEL; + mbox[3] = 4; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + return mbox[5]; +} + +int bcm283x_mbox_hardware_get_revison(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_REV; + mbox[3] = 4; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + return mbox[5]; +} + +int bcm283x_mbox_hardware_get_mac_address(uint8_t * mac) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_MAC_ADDRESS; + mbox[3] = 6; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + char * mac_str = (char *)&mbox[5]; + mac[0] = mac_str[0]; + mac[1] = mac_str[1]; + mac[2] = mac_str[2]; + mac[3] = mac_str[3]; + mac[4] = mac_str[4]; + mac[5] = mac_str[5]; + return 0; +} + + +int bcm283x_mbox_hardware_get_serial(rt_uint64_t* sn) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_SERIAL; + mbox[3] = 8; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + sn = (rt_uint64_t *)&mbox[5]; + + return 0; +} + +int bcm283x_mbox_hardware_get_arm_memory(rt_uint32_t * base, rt_uint32_t * size) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_ARM_MEMORY; + mbox[3] = 8; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + *base = mbox[5]; + *size = mbox[6]; + + return 0; + +} + +int bcm283x_mbox_hardware_get_vc_memory(rt_uint32_t * base, rt_uint32_t * size) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_HARDWARE_GET_VC_MEMORY; + mbox[3] = 8; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + *base = mbox[5]; + *size = mbox[6]; + + return 0; +} + +int bcm283x_mbox_clock_get_turbo(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_GET_TURBO; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = 0; // id + mbox[6] = 0; // val + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != 0) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_clock_set_turbo(int level) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_SET_TURBO; + mbox[3] = 8; // buffer size + mbox[4] = 8; // len + + mbox[5] = 0; // id + mbox[6] = level ? 1 : 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != 0) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_clock_get_state(int id) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_GET_STATE; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = id; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return (mbox[6] & 0x3); +} + +int bcm283x_mbox_clock_set_state(int id, int state) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_SET_STATE; + mbox[3] = 8; // buffer size + mbox[4] = 8; // len + + mbox[5] = id; // id + mbox[6] = state & 0x3; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return (mbox[6] & 0x3); +} + +int bcm283x_mbox_clock_get_rate(int id) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_GET_RATE; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = id; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_clock_set_rate(int id, int rate) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_SET_RATE; + mbox[3] = 8; // buffer size + mbox[4] = 8; // len + + mbox[5] = id; // id + mbox[6] = rate; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_clock_get_max_rate(int id) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_GET_MAX_RATE; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = id; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_clock_get_min_rate(int id) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_CLOCK_GET_MIN_RATE; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = id; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_power_get_state(int id) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_POWER_GET_STATE; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = id; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return (mbox[6] & 0x3); +} + +int bcm283x_mbox_power_set_state(int id, int state) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_POWER_SET_STATE; + mbox[3] = 8; // buffer size + mbox[4] = 8; // len + + mbox[5] = id; // id + mbox[6] = state & 0x3; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != id) + { + return -1; + } + + return (mbox[6] & 0x3); +} + +int bcm283x_mbox_temp_get(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_TEMP_GET; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = 0; //id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != 0) + { + return -1; + } + + return mbox[6]; +} + +int bcm283x_mbox_temp_get_max(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_TEMP_GET_MAX; + mbox[3] = 8; // buffer size + mbox[4] = 4; // len + + mbox[5] = 0; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + + if(mbox[5] != 0) + { + return -1; + } + + return mbox[6]; +} diff --git a/bsp/raspberry-pi/raspi3-64/driver/mbox.h b/bsp/raspberry-pi/raspi3-64/driver/mbox.h index eb7eb0318c..f235691d7b 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/mbox.h +++ b/bsp/raspberry-pi/raspi3-64/driver/mbox.h @@ -12,7 +12,7 @@ #ifndef __MBOX_H__ #define __MBOX_H__ - +#include /* a properly aligned buffer */ extern volatile unsigned int* mbox; @@ -56,7 +56,69 @@ extern volatile unsigned int* mbox; #define MMU_ENABLE 1 #define MMU_DISABLE 0 +/* + * raspi hardware info + */ +enum { + MBOX_TAG_HARDWARE_GET_MODEL = 0x00010001, + MBOX_TAG_HARDWARE_GET_REV = 0x00010002, + MBOX_TAG_HARDWARE_GET_MAC_ADDRESS = 0x00010003, + MBOX_TAG_HARDWARE_GET_SERIAL = 0x00010004, + MBOX_TAG_HARDWARE_GET_ARM_MEMORY = 0x00010005, + MBOX_TAG_HARDWARE_GET_VC_MEMORY = 0x00010006, + MBOX_TAG_HARDWARE_GET_CLOCKS = 0x00010007, +}; + +/* + * raspi clock + */ +enum { + MBOX_TAG_CLOCK_GET_TURBO = 0x00030009, + MBOX_TAG_CLOCK_SET_TURBO = 0x00038009, + MBOX_TAG_CLOCK_GET_STATE = 0x00030001, + MBOX_TAG_CLOCK_SET_STATE = 0x00038001, + MBOX_TAG_CLOCK_GET_RATE = 0x00030002, + MBOX_TAG_CLOCK_SET_RATE = 0x00038002, + MBOX_TAG_CLOCK_GET_MAX_RATE = 0x00030004, + MBOX_TAG_CLOCK_GET_MIN_RATE = 0x00030007, +}; + +/* + * raspi power + */ +enum { + MBOX_TAG_POWER_GET_STATE = 0x00020001, + MBOX_TAG_POWER_SET_STATE = 0x00028001, +}; + +/* + * raspi temperature + */ +enum { + MBOX_TAG_TEMP_GET = 0x00030006, + MBOX_TAG_TEMP_GET_MAX = 0x0003000A, +}; + #define MBOX_ADDR 0xc00000 int mbox_call(unsigned char ch, int mmu_enable); +int bcm283x_mbox_hardware_get_model(void); +int bcm283x_mbox_hardware_get_revison(void); +int bcm283x_mbox_hardware_get_mac_address(uint8_t * mac); +int bcm283x_mbox_hardware_get_serial(rt_uint64_t* sn); +int bcm283x_mbox_hardware_get_arm_memory(rt_uint32_t * base, rt_uint32_t * size); +int bcm283x_mbox_hardware_get_vc_memory(rt_uint32_t * base, rt_uint32_t * size); +int bcm283x_mbox_clock_get_turbo(void); +int bcm283x_mbox_clock_set_turbo(int level); +int bcm283x_mbox_clock_get_state(int id); +int bcm283x_mbox_clock_set_state(int id, int state); +int bcm283x_mbox_clock_get_rate(int id); +int bcm283x_mbox_clock_set_rate(int id, int rate); +int bcm283x_mbox_clock_get_max_rate(int id); +int bcm283x_mbox_clock_get_min_rate(int id); +int bcm283x_mbox_power_get_state(int id); +int bcm283x_mbox_power_set_state(int id, int state); +int bcm283x_mbox_temp_get(void); +int bcm283x_mbox_temp_get_max(void); + #endif -- Gitee From 6251fc93b6e8be24391bd17db9f1540d740491f2 Mon Sep 17 00:00:00 2001 From: bigmagic Date: Sun, 26 Apr 2020 09:53:41 +0800 Subject: [PATCH 21/54] [bsp/raspi]fix hdmi driver --- bsp/raspberry-pi/raspi3-64/driver/drv_fb.c | 164 ++++++++++++++++++--- 1 file changed, 145 insertions(+), 19 deletions(-) diff --git a/bsp/raspberry-pi/raspi3-64/driver/drv_fb.c b/bsp/raspberry-pi/raspi3-64/driver/drv_fb.c index d4abc4fd60..cabaded5fd 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/drv_fb.c +++ b/bsp/raspberry-pi/raspi3-64/driver/drv_fb.c @@ -15,9 +15,10 @@ #include "drv_fb.h" #include "mmu.h" -#define LCD_WIDTH (640) +#define LCD_WIDTH (800) #define LCD_HEIGHT (480) #define LCD_DEPTH (32) +#define LCD_BPP (32) #define TAG_ALLOCATE_BUFFER 0x00040001 #define TAG_SET_PHYS_WIDTH_HEIGHT 0x00048003 @@ -28,6 +29,39 @@ #define TAG_SET_VIRT_OFFSET 0x00048009 #define TAG_END 0x00000000 + +enum { + MBOX_TAG_FB_GET_GPIOVIRT = 0x00040010, + MBOX_TAG_FB_ALLOCATE_BUFFER = 0x00040001, + MBOX_TAG_FB_RELEASE_BUFFER = 0x00048001, + MBOX_TAG_FB_BLANK_SCREEN = 0x00040002, + MBOX_TAG_FB_GET_PHYS_WH = 0x00040003, + MBOX_TAG_FB_TEST_PHYS_WH = 0x00044003, + MBOX_TAG_FB_SET_PHYS_WH = 0x00048003, + MBOX_TAG_FB_GET_VIRT_WH = 0x00040004, + MBOX_TAG_FB_TEST_VIRT_WH = 0x00044004, + MBOX_TAG_FB_SET_VIRT_WH = 0x00048004, + MBOX_TAG_FB_GET_DEPTH = 0x00040005, + MBOX_TAG_FB_TEST_DEPTH = 0x00044005, + MBOX_TAG_FB_SET_DEPTH = 0x00048005, + MBOX_TAG_FB_GET_PIXEL_ORDER = 0x00040006, + MBOX_TAG_FB_TEST_PIXEL_ORDER = 0x00044006, + MBOX_TAG_FB_SET_PIXEL_ORDER = 0x00048006, + MBOX_TAG_FB_GET_ALPHA_MODE = 0x00040007, + MBOX_TAG_FB_TEST_ALPHA_MODE = 0x00044007, + MBOX_TAG_FB_SET_ALPHA_MODE = 0x00048007, + MBOX_TAG_FB_GET_PITCH = 0x00040008, + MBOX_TAG_FB_GET_VIRT_OFFSET = 0x00040009, + MBOX_TAG_FB_TEST_VIRT_OFFSET = 0x00044009, + MBOX_TAG_FB_SET_VIRT_OFFSET = 0x00048009, + MBOX_TAG_FB_GET_OVERSCAN = 0x0004000a, + MBOX_TAG_FB_TEST_OVERSCAN = 0x0004400a, + MBOX_TAG_FB_SET_OVERSCAN = 0x0004800a, + MBOX_TAG_FB_GET_PALETTE = 0x0004000b, + MBOX_TAG_FB_TEST_PALETTE = 0x0004400b, + MBOX_TAG_FB_SET_PALETTE = 0x0004800b, +}; + #define LCD_DEVICE(dev) (struct rt_hdmi_fb_device*)(dev) static struct rt_hdmi_fb_device _hdmi; @@ -75,7 +109,7 @@ rt_err_t hdmi_fb_control(rt_device_t dev, int cmd, void *args) info->bits_per_pixel= LCD_DEPTH; info->width = lcd->width; info->height = lcd->height; - info->framebuffer = lcd->fb;//(rt_uint8_t *)lcd->fb; + info->framebuffer = lcd->fb; } break; } @@ -119,38 +153,122 @@ rt_err_t rt_hdmi_fb_device_init(struct rt_hdmi_fb_device *hdmi_fb, const char *n return RT_EOK; } -int hdmi_fb_init(void) +rt_uint32_t bcm283x_mbox_fb_get_gpiovirt(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_FB_GET_GPIOVIRT; + mbox[3] = 4; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + return (mbox[5] & 0x3fffffff); +} + +rt_uint32_t bcm283x_mbox_fb_get_pitch(void) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_FB_GET_PITCH; + mbox[3] = 4; // buffer size + mbox[4] = 0; // len + + mbox[5] = 0; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); + return mbox[5]; +} + +void bcm283x_mbox_fb_set_porder(int rgb) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_FB_SET_PIXEL_ORDER; + mbox[3] = 4; // buffer size + mbox[4] = 4; // len + + mbox[5] = rgb; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); +} + +void bcm283x_mbox_fb_setoffset(int xoffset, int yoffset) +{ + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_FB_SET_VIRT_OFFSET; + mbox[3] = 8; // buffer size + mbox[4] = 8; // len + + mbox[5] = xoffset; // id + mbox[6] = yoffset; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); +} + + +void bcm283x_mbox_fb_setalpha(int alpha) +{ + + mbox[0] = 8*4; // length of the message + mbox[1] = MBOX_REQUEST; // this is a request message + + mbox[2] = MBOX_TAG_FB_SET_ALPHA_MODE; + mbox[3] = 4; // buffer size + mbox[4] = 4; // len + + mbox[5] = alpha; // id + mbox[6] = 0; + + mbox[7] = MBOX_TAG_LAST; + mbox_call(8, MMU_DISABLE); +} + +void *bcm283x_mbox_fb_alloc(int width, int height, int bpp, int nrender) { mbox[0] = 4 * 35; mbox[1] = MBOX_REQUEST; mbox[2] = TAG_ALLOCATE_BUFFER;//get framebuffer, gets alignment on request - mbox[3] = 8; - mbox[4] = 0; - mbox[5] = 4096; //FrameBufferInfo.pointer - mbox[6] = 0; //FrameBufferInfo.size + mbox[3] = 8; //size + mbox[4] = 4; //len + mbox[5] = 4096; //The design of MBOX driver forces us to give the virtual address 0x3C100000 + mbox[6] = 0; //FrameBufferInfo.size mbox[7] = TAG_SET_PHYS_WIDTH_HEIGHT; mbox[8] = 8; - mbox[9] = 0; - mbox[10] = LCD_WIDTH; - mbox[11] = LCD_HEIGHT; + mbox[9] = 8; + mbox[10] = width; + mbox[11] = height; mbox[12] = TAG_SET_VIRT_WIDTH_HEIGHT; mbox[13] = 8; - mbox[14] = 0; - mbox[15] = LCD_WIDTH; - mbox[16] = LCD_HEIGHT; + mbox[14] = 8; + mbox[15] = width; + mbox[16] = height * nrender; mbox[17] = TAG_SET_DEPTH; mbox[18] = 4; - mbox[19] = 0; - mbox[20] = 16; //FrameBufferInfo.depth RGB 565 + mbox[19] = 4; + mbox[20] = bpp; mbox[21] = TAG_SET_PIXEL_ORDER; mbox[22] = 4; mbox[23] = 0; - mbox[24] = 1; //RGB, not BGR preferably + mbox[24] = 0; //RGB, not BGR preferably mbox[25] = TAG_GET_PITCH; mbox[26] = 4; @@ -167,17 +285,25 @@ int hdmi_fb_init(void) mbox_call(MBOX_CH_PROP, MMU_DISABLE); - _hdmi.fb = (rt_uint8_t *)(uintptr_t)(mbox[5] & 0x3FFFFFFF); + return (void *)((rt_uint64_t)(mbox[5] & 0x3fffffff)); +} +int hdmi_fb_init(void) +{ + _hdmi.fb = (rt_uint8_t *)bcm283x_mbox_fb_alloc(LCD_WIDTH, LCD_HEIGHT, LCD_BPP, 1); + bcm283x_mbox_fb_setoffset(0, 0); + bcm283x_mbox_fb_set_porder(0); _hdmi.width = LCD_WIDTH; _hdmi.height = LCD_HEIGHT; _hdmi.depth = LCD_DEPTH; _hdmi.pitch = 0; _hdmi.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB888; - armv8_map((unsigned long)_hdmi.fb, (unsigned long)_hdmi.fb, 0x200000, MEM_ATTR_MEMORY); + armv8_map((unsigned long)_hdmi.fb, (unsigned long)_hdmi.fb, 0x200000, MEM_ATTR_IO); + + rt_hw_dcache_invalidate_range((unsigned long)_hdmi.fb,LCD_WIDTH * LCD_HEIGHT * 3); - rt_kprintf("_hdmi.fb is %p\n", _hdmi.fb); + //rt_kprintf("_hdmi.fb is %p\n", _hdmi.fb); rt_hdmi_fb_device_init(&_hdmi, "lcd"); return 0; -- Gitee From 609911bee9c1235151f5328e7dcae9880d6861f6 Mon Sep 17 00:00:00 2001 From: Fu Wei Date: Tue, 14 Apr 2020 14:53:39 +0800 Subject: [PATCH 22/54] [RISC-V:K210]Add UART1~3 support for K210 This patch adds UART1~3 support for K210, and separates the rt_uart_ops of UARTHS from UART. This patch add configs in Kconfig for configuring the pins of UARTx, please check the sysctl_set_power_mode for the pins in the io_config_init of bsp/k210/driver/drv_io_config.c Signed-off-by: Fu Wei --- bsp/k210/driver/Kconfig | 39 ++++- bsp/k210/driver/drv_io_config.c | 22 ++- bsp/k210/driver/drv_uart.c | 296 ++++++++++++++++++++++++++++---- 3 files changed, 314 insertions(+), 43 deletions(-) diff --git a/bsp/k210/driver/Kconfig b/bsp/k210/driver/Kconfig index 4d38a7c9b2..8acbf5202c 100644 --- a/bsp/k210/driver/Kconfig +++ b/bsp/k210/driver/Kconfig @@ -2,17 +2,44 @@ config BSP_USING_UART_HS bool "Enable High Speed UART" default y -config BSP_USING_UART1 - bool "Enable UART1 (GPIO0/1)" +menu "General Purpose UARTs" + +menuconfig BSP_USING_UART1 + bool "Enable UART1" default n + if BSP_USING_UART1 + config BSP_UART1_TXD_PIN + int "uart1 TXD pin number" + default 20 + config BSP_UART1_RXD_PIN + int "uart1 RXD pin number" + default 21 + endif -config BSP_USING_UART2 - bool "Enable UART2 (GPIO0/1)" +menuconfig BSP_USING_UART2 + bool "Enable UART2" default n + if BSP_USING_UART2 + config BSP_UART2_TXD_PIN + int "uart2 TXD pin number" + default 28 + config BSP_UART2_RXD_PIN + int "uart2 RXD pin number" + default 27 + endif -config BSP_USING_UART3 - bool "Enable UART3 (GPIO0/1)" +menuconfig BSP_USING_UART3 + bool "Enable UART3" default n + if BSP_USING_UART3 + config BSP_UART3_TXD_PIN + int "uart3 TXD pin number" + default 22 + config BSP_UART3_RXD_PIN + int "uart3 RXD pin number" + default 23 + endif +endmenu config BSP_USING_I2C1 bool "Enable I2C1 (GPIO0/1)" diff --git a/bsp/k210/driver/drv_io_config.c b/bsp/k210/driver/drv_io_config.c index cd0e8f27f6..3098537eae 100644 --- a/bsp/k210/driver/drv_io_config.c +++ b/bsp/k210/driver/drv_io_config.c @@ -63,6 +63,18 @@ static struct io_config #endif #endif +#ifdef BSP_USING_UART1 + IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX), + IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX), +#endif +#ifdef BSP_USING_UART2 + IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX), + IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX), +#endif +#ifdef BSP_USING_UART3 + IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX), + IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX), +#endif }; static int print_io_config() @@ -89,7 +101,15 @@ int io_config_init(void) sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18); sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18); sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18); - +#ifdef BSP_USING_UART2 + // for IO-27/28 + sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33); +#endif +#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3) + // for IO-20~23 + sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33); +#endif + for(i = 0; i < count; i++) { fpioa_set_function(io_config[i].io_num, io_config[i].func); diff --git a/bsp/k210/driver/drv_uart.c b/bsp/k210/driver/drv_uart.c index 7e22d40c5d..830b14cbbc 100644 --- a/bsp/k210/driver/drv_uart.c +++ b/bsp/k210/driver/drv_uart.c @@ -17,10 +17,12 @@ #include #include -// #include "uart.h" +#include "uart.h" #include "uarths.h" #include "plic.h" +#define UART_DEFAULT_BAUDRATE 115200 + static volatile uarths_t *const _uarths = (volatile uarths_t *)UARTHS_BASE_ADDR; struct device_uart @@ -29,22 +31,71 @@ struct device_uart rt_uint32_t irqno; }; -static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg); +static rt_err_t rt_uarths_configure(struct rt_serial_device *serial, struct serial_configure *cfg); +static rt_err_t uarths_control(struct rt_serial_device *serial, int cmd, void *arg); +static int drv_uarths_putc(struct rt_serial_device *serial, char c); +static int drv_uarths_getc(struct rt_serial_device *serial); + +static void uarths_irq_handler(int irqno, void *param); + +static rt_err_t rt_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg); static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg); static int drv_uart_putc(struct rt_serial_device *serial, char c); static int drv_uart_getc(struct rt_serial_device *serial); static void uart_irq_handler(int irqno, void *param); +const struct rt_uart_ops _uart_hs_ops = +{ + rt_uarths_configure, + uarths_control, + drv_uarths_putc, + drv_uarths_getc, + RT_NULL +}; + const struct rt_uart_ops _uart_ops = { - uart_configure, + rt_uart_configure, uart_control, drv_uart_putc, drv_uart_getc, + //TODO: add DMA support RT_NULL }; +/* START ported from kendryte standalone sdk uart.c */ +#define __UART_BRATE_CONST 16 + +volatile uart_t* const _uart[3] = +{ + (volatile uart_t*)UART1_BASE_ADDR, + (volatile uart_t*)UART2_BASE_ADDR, + (volatile uart_t*)UART3_BASE_ADDR +}; + +void uart_init(uart_device_number_t channel) +{ + sysctl_clock_enable(SYSCTL_CLOCK_UART1 + channel); + sysctl_reset(SYSCTL_RESET_UART1 + channel); +} + +/* END ported from kendryte standalone sdk uart.c */ +static inline uart_device_number_t _get_uart_channel(rt_uint32_t addr) +{ + switch (addr) + { + case UART1_BASE_ADDR: + return UART_DEVICE_1; + case UART2_BASE_ADDR: + return UART_DEVICE_2; + case UART3_BASE_ADDR: + return UART_DEVICE_3; + default: + return UART_DEVICE_MAX; + } +} + /* * UART Initiation */ @@ -62,7 +113,7 @@ int rt_hw_uart_init(void) serial = &serial_hs; uart = &uart_hs; - serial->ops = &_uart_ops; + serial->ops = &_uart_hs_ops; serial->config = config; serial->config.baud_rate = 115200; @@ -86,36 +137,79 @@ int rt_hw_uart_init(void) serial->ops = &_uart_ops; serial->config = config; - serial->config.baud_rate = 115200; + serial->config.baud_rate = UART_DEFAULT_BAUDRATE; uart->hw_base = UART1_BASE_ADDR; uart->irqno = IRQN_UART1_INTERRUPT; + uart_init(UART_DEVICE_1); + rt_hw_serial_register(serial, - "uarths", + "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); } #endif #ifdef BSP_USING_UART2 + { + static struct rt_serial_device serial2; + static struct device_uart uart2; + + serial = &serial2; + uart = &uart2; + + serial->ops = &_uart_ops; + serial->config = config; + serial->config.baud_rate = UART_DEFAULT_BAUDRATE; + + uart->hw_base = UART2_BASE_ADDR; + uart->irqno = IRQN_UART2_INTERRUPT; + + uart_init(UART_DEVICE_2); + + rt_hw_serial_register(serial, + "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); + } #endif #ifdef BSP_USING_UART3 + { + static struct rt_serial_device serial3; + static struct device_uart uart3; + + serial = &serial3; + uart = &uart3; + + serial->ops = &_uart_ops; + serial->config = config; + serial->config.baud_rate = UART_DEFAULT_BAUDRATE; + + uart->hw_base = UART3_BASE_ADDR; + uart->irqno = IRQN_UART3_INTERRUPT; + + uart_init(UART_DEVICE_3); + + rt_hw_serial_register(serial, + "uart3", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); + } #endif return 0; } /* - * UART interface + * UARTHS interface */ -static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +static rt_err_t rt_uarths_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { - rt_uint32_t baud_div; struct device_uart *uart; - uint32_t freq = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU); - uint16_t div = freq / cfg->baud_rate - 1; + uint32_t freq_hs = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU); + uint16_t div_hs = freq_hs / cfg->baud_rate - 1; RT_ASSERT(serial != RT_NULL); serial->config = *cfg; @@ -125,7 +219,7 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co if (uart->hw_base == UARTHS_BASE_ADDR) { - _uarths->div.div = div; + _uarths->div.div = div_hs; _uarths->txctrl.txen = 1; _uarths->rxctrl.rxen = 1; _uarths->txctrl.txcnt = 0; @@ -137,13 +231,14 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co } else { + return (-1); /* other uart */ } return (RT_EOK); } -static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg) +static rt_err_t uarths_control(struct rt_serial_device *serial, int cmd, void *arg) { struct device_uart *uart; @@ -160,7 +255,7 @@ static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg case RT_DEVICE_CTRL_SET_INT: /* install interrupt */ - rt_hw_interrupt_install(uart->irqno, uart_irq_handler, + rt_hw_interrupt_install(uart->irqno, uarths_irq_handler, serial, serial->parent.parent.name); rt_hw_interrupt_umask(uart->irqno); break; @@ -169,38 +264,168 @@ static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg return (RT_EOK); } -static int drv_uart_putc(struct rt_serial_device *serial, char c) + +static int drv_uarths_putc(struct rt_serial_device *serial, char c) +{ + struct device_uart *uart = serial->parent.user_data; + RT_ASSERT(uart->hw_base == UARTHS_BASE_ADDR); + + while (_uarths->txdata.full); + _uarths->txdata.data = (uint8_t)c; + + return (1); +} + +static int drv_uarths_getc(struct rt_serial_device *serial) +{ + struct device_uart *uart = serial->parent.user_data; + RT_ASSERT(uart->hw_base == UARTHS_BASE_ADDR); + + uarths_rxdata_t recv = _uarths->rxdata; + if (recv.empty) + return EOF; + else + return (recv.data & 0xff); + /* Receive Data Available */ + + return (-1); +} + +/* UARTHS ISR */ +static void uarths_irq_handler(int irqno, void *param) +{ + struct rt_serial_device *serial = (struct rt_serial_device *)param; + struct device_uart *uart = serial->parent.user_data; + RT_ASSERT(uart->hw_base == UARTHS_BASE_ADDR); + + /* read interrupt status and clear it */ + if (_uarths->ip.rxwm) + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); +} + +/* + * UART interface + */ +static rt_err_t rt_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct device_uart *uart; + uart_bitwidth_t data_width = (uart_bitwidth_t)cfg->data_bits ; + uart_stopbit_t stopbit = (uart_stopbit_t)cfg->stop_bits; + uart_parity_t parity = (uart_parity_t)cfg->parity; + + uint32_t freq = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0); + uint32_t divisor = freq / (uint32_t)cfg->baud_rate; + uint8_t dlh = divisor >> 12; + uint8_t dll = (divisor - (dlh << 12)) / __UART_BRATE_CONST; + uint8_t dlf = divisor - (dlh << 12) - dll * __UART_BRATE_CONST; + + RT_ASSERT(serial != RT_NULL); + serial->config = *cfg; uart = serial->parent.user_data; - if (uart->hw_base == UARTHS_BASE_ADDR) + RT_ASSERT(uart != RT_NULL); + + uart_device_number_t channel = _get_uart_channel(uart->hw_base); + RT_ASSERT(channel != UART_DEVICE_MAX); + + RT_ASSERT(data_width >= 5 && data_width <= 8); + if (data_width == 5) { - while (_uarths->txdata.full); - _uarths->txdata.data = (uint8_t)c; + RT_ASSERT(stopbit != UART_STOP_2); } else { - /* other uart */ + RT_ASSERT(stopbit != UART_STOP_1_5); } - return (1); + uint32_t stopbit_val = stopbit == UART_STOP_1 ? 0 : 1; + uint32_t parity_val; + switch (parity) + { + case UART_PARITY_NONE: + parity_val = 0; + break; + case UART_PARITY_ODD: + parity_val = 1; + break; + case UART_PARITY_EVEN: + parity_val = 3; + break; + default: + RT_ASSERT(!"Invalid parity"); + break; + } + + _uart[channel]->LCR |= 1u << 7; + _uart[channel]->DLH = dlh; + _uart[channel]->DLL = dll; + _uart[channel]->DLF = dlf; + _uart[channel]->LCR = 0; + _uart[channel]->LCR = (data_width - 5) | + (stopbit_val << 2) | + (parity_val << 3); + _uart[channel]->LCR &= ~(1u << 7); + _uart[channel]->IER |= 0x80; /* THRE */ + _uart[channel]->FCR = UART_RECEIVE_FIFO_1 << 6 | + UART_SEND_FIFO_8 << 4 | + 0x1 << 3 | + 0x1; + + return (RT_EOK); } -static int drv_uart_getc(struct rt_serial_device *serial) +static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg) { - int ret = -1; - struct device_uart *uart = serial->parent.user_data; + struct device_uart *uart; - if (uart->hw_base == UARTHS_BASE_ADDR) + uart = serial->parent.user_data; + uart_device_number_t channel = _get_uart_channel(uart->hw_base); + + RT_ASSERT(uart != RT_NULL); + RT_ASSERT(channel != UART_DEVICE_MAX); + + switch (cmd) { - uarths_rxdata_t recv = _uarths->rxdata; - if (recv.empty) - return EOF; - else - return (recv.data & 0xff); + case RT_DEVICE_CTRL_CLR_INT: + /* Disable the UART Interrupt */ + rt_hw_interrupt_mask(uart->irqno); + _uart[channel]->IER &= ~0x1; + break; + + case RT_DEVICE_CTRL_SET_INT: + /* install interrupt */ + rt_hw_interrupt_install(uart->irqno, uart_irq_handler, + serial, serial->parent.parent.name); + rt_hw_interrupt_umask(uart->irqno); + _uart[channel]->IER |= 0x1; + break; } + return (RT_EOK); +} + +static int drv_uart_putc(struct rt_serial_device *serial, char c) +{ + struct device_uart *uart = serial->parent.user_data; + uart_device_number_t channel = _get_uart_channel(uart->hw_base); + RT_ASSERT(channel != UART_DEVICE_MAX); + + while (_uart[channel]->LSR & (1u << 5)); + _uart[channel]->THR = c; + + return (1); +} + +static int drv_uart_getc(struct rt_serial_device *serial) +{ + struct device_uart *uart = serial->parent.user_data; + uart_device_number_t channel = _get_uart_channel(uart->hw_base); + RT_ASSERT(channel != UART_DEVICE_MAX); + + if (_uart[channel]->LSR & 1) + return (char)(_uart[channel]->RBR & 0xff); + else + return EOF; /* Receive Data Available */ return (-1); @@ -209,21 +434,20 @@ static int drv_uart_getc(struct rt_serial_device *serial) /* UART ISR */ static void uart_irq_handler(int irqno, void *param) { - rt_ubase_t isr; struct rt_serial_device *serial = (struct rt_serial_device *)param; struct device_uart *uart = serial->parent.user_data; + uart_device_number_t channel = _get_uart_channel(uart->hw_base); + RT_ASSERT(channel != UART_DEVICE_MAX); /* read interrupt status and clear it */ - if (uart->hw_base == UARTHS_BASE_ADDR) - { - if (_uarths->ip.rxwm) - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } + if (_uart[channel]->LSR) + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); } /* WEAK for SDK 0.5.6 */ -RT_WEAK void uart_debug_init(int uart_channel) +RT_WEAK void uart_debug_init(uart_device_number_t uart_channel) { } + -- Gitee From 5bddcd378e18f838e8f9126f615bae42b0c37c9c Mon Sep 17 00:00:00 2001 From: Wayne Lin Date: Mon, 27 Apr 2020 10:25:36 +0800 Subject: [PATCH 23/54] Get stuck issue after open-close-open CAN device. Signed-off-by: Wayne Lin --- components/drivers/can/can.c | 1 + 1 file changed, 1 insertion(+) diff --git a/components/drivers/can/can.c b/components/drivers/can/can.c index 3d60dbaa55..9f4612355b 100644 --- a/components/drivers/can/can.c +++ b/components/drivers/can/can.c @@ -422,6 +422,7 @@ static rt_err_t rt_can_close(struct rt_device *dev) tx_fifo = (struct rt_can_tx_fifo *)can->can_tx; RT_ASSERT(tx_fifo != RT_NULL); + rt_sem_detach(&(tx_fifo->sem)); rt_free(tx_fifo); dev->open_flag &= ~RT_DEVICE_FLAG_INT_TX; can->can_tx = RT_NULL; -- Gitee From c7b74a1e8ffe1ae07d72ef83afff636f0193b106 Mon Sep 17 00:00:00 2001 From: NU-LL <1125934312@qq.com> Date: Tue, 28 Apr 2020 13:33:15 +0800 Subject: [PATCH 24/54] support SPI/ADC/TIME on-chip peripheral driver --- bsp/stm32/stm32l476-st-nucleo/README.md | 5 ++ bsp/stm32/stm32l476-st-nucleo/board/Kconfig | 79 +++++++++++++++++++++ 2 files changed, 84 insertions(+) diff --git a/bsp/stm32/stm32l476-st-nucleo/README.md b/bsp/stm32/stm32l476-st-nucleo/README.md index cd8ad13f9c..bb174c6b0d 100644 --- a/bsp/stm32/stm32l476-st-nucleo/README.md +++ b/bsp/stm32/stm32l476-st-nucleo/README.md @@ -43,8 +43,13 @@ | UART | 支持 | UART2 | | IIC | 支持 | 软件模拟 | | RTC | 支持 | 支持外部晶振和内部低速时钟 | +| SPI | 支持 | SPI1/2/3 | +| ADC | 支持 | | +| TIME | 支持 | TIME15/16/17 | | **扩展模块** | **支持情况** | **备注** | +注意:部分片上外设默认没有使能,如需使用请在CubeMX中使能相应外设 + ## 使用说明 使用说明分为如下两个章节: diff --git a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig index 5089c9f623..4ecb1a6e42 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig @@ -89,6 +89,85 @@ menu "On-chip Peripheral Drivers" endif endif + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + + config BSP_USING_SPI2 + bool "Enable SPI2 BUS" + default n + + config BSP_SPI2_TX_USING_DMA + bool "Enable SPI2 TX DMA" + depends on BSP_USING_SPI2 + default n + + config BSP_SPI2_RX_USING_DMA + bool "Enable SPI2 RX DMA" + depends on BSP_USING_SPI2 + select BSP_SPI2_TX_USING_DMA + default n + + config BSP_USING_SPI3 + bool "Enable SPI3 BUS" + default n + + config BSP_SPI3_TX_USING_DMA + bool "Enable SPI3 TX DMA" + depends on BSP_USING_SPI3 + default n + + config BSP_SPI3_RX_USING_DMA + bool "Enable SPI3 RX DMA" + depends on BSP_USING_SPI3 + select BSP_SPI3_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + config BSP_USING_TIM15 + bool "Enable TIM15" + default n + + config BSP_USING_TIM16 + bool "Enable TIM16" + default n + + config BSP_USING_TIM17 + bool "Enable TIM17" + default n + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + menuconfig BSP_USING_ONCHIP_RTC bool "Enable RTC" select RT_USING_RTC -- Gitee From 9d374f873cc9d3f0ee1af5f463fcaeee75d5f6e8 Mon Sep 17 00:00:00 2001 From: hphuang Date: Tue, 28 Apr 2020 19:07:08 +0800 Subject: [PATCH 25/54] mstorage.c: fix the issue that _read_capacity() returns the wrong last valid address of storage medium --- components/drivers/usb/usbdevice/class/mstorage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/drivers/usb/usbdevice/class/mstorage.c b/components/drivers/usb/usbdevice/class/mstorage.c index 43fb25afe4..a681b8212f 100644 --- a/components/drivers/usb/usbdevice/class/mstorage.c +++ b/components/drivers/usb/usbdevice/class/mstorage.c @@ -426,7 +426,7 @@ static rt_size_t _read_capacity(ufunction_t func, ustorage_cbw_t cbw) data = (struct mstorage*)func->user_data; buf = data->ep_in->buffer; - sector_count = data->geometry.sector_count; + sector_count = data->geometry.sector_count - 1; /* Last Logical Block Address */ sector_size = data->geometry.bytes_per_sector; buf[0] = sector_count >> 24; -- Gitee From 79b44d29ad2c03b0634635797fb60b810b29eba3 Mon Sep 17 00:00:00 2001 From: Maofeng Date: Tue, 28 Apr 2020 03:23:09 +0800 Subject: [PATCH 26/54] [bsp\nrf5x]Support BSP UART0 --- bsp/nrf5x/libraries/drivers/drv_uart.c | 129 ++++++++++++++----------- bsp/nrf5x/nrf52840/board/Kconfig | 17 +++- bsp/nrf5x/nrf52840/rtconfig.h | 3 + 3 files changed, 89 insertions(+), 60 deletions(-) diff --git a/bsp/nrf5x/libraries/drivers/drv_uart.c b/bsp/nrf5x/libraries/drivers/drv_uart.c index b310fa57a4..08c7148353 100644 --- a/bsp/nrf5x/libraries/drivers/drv_uart.c +++ b/bsp/nrf5x/libraries/drivers/drv_uart.c @@ -1,59 +1,83 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-28 xckhmf Modify for + * + */ #include #include #include "drv_uart.h" -static struct rt_serial_device _serial0_0; -static void uart_event_hander(nrfx_uart_event_t const *p_event,void *p_context); +#ifdef BSP_USING_UART typedef struct { struct rt_serial_device *serial; nrfx_uart_t uart; + uint8_t rx_byte; + uint16_t rx_length; uint32_t rx_pin; uint32_t tx_pin; nrfx_uart_event_handler_t event_handler; -} UART_CFG_T; +} drv_uart_cfg_t; - -UART_CFG_T uart0 = { +#ifdef BSP_USING_UART0 +static struct rt_serial_device _serial_0; +static void uart0_event_hander(nrfx_uart_event_t const *p_event,void *p_context); +drv_uart_cfg_t m_uart0_cfg = { .uart = NRFX_UART_INSTANCE(0), -#ifdef RT_USING_CONSOLE - .rx_pin = 8, - .tx_pin = 6, - .event_handler = uart_event_hander, -#else - .rx_pin = 19, - .tx_pin = 20 -#endif + .rx_byte = 0, + .rx_length = 0, + .rx_pin = BSP_UART0_RX_PIN, + .tx_pin = BSP_UART0_TX_PIN, + .event_handler = uart0_event_hander }; -UART_CFG_T *working_cfg = RT_NULL; +#endif /* BSP_USING_UART0 */ -static void uart_event_hander(nrfx_uart_event_t const *p_event,void *p_context) -{ - +#ifdef BSP_USING_UART1 + #error not support UART1. Use UART0 instead. +#endif /* BSP_USING_UART1 */ + +#ifdef BSP_USING_UART0 +static void uart0_event_hander(nrfx_uart_event_t const *p_event,void *p_context) +{ if (p_event->type == NRFX_UART_EVT_RX_DONE) { - rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_RX_IND); + if(p_event->data.rxtx.bytes == 1) + { + m_uart0_cfg.rx_length = p_event->data.rxtx.bytes; + + /* rx_byte equal p_data */ + //m_uart0_cfg.rx_byte = *(p_event->data.rxtx.p_data); + + rt_hw_serial_isr(m_uart0_cfg.serial, RT_SERIAL_EVENT_RX_IND); + } + nrfx_uart_rx(&(m_uart0_cfg.uart),&m_uart0_cfg.rx_byte,1); } if (p_event->type == NRFX_UART_EVT_TX_DONE) { - + /* @TODO:[RT_DEVICE_FLAG_INT_TX]*/ } } +#endif /* BSP_USING_UART0 */ static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configure *cfg) { - nrfx_uart_config_t config = NRFX_UART_DEFAULT_CONFIG(uart0.tx_pin,uart0.rx_pin); - UART_CFG_T *instance = &uart0; + nrfx_uart_config_t config = NRFX_UART_DEFAULT_CONFIG(BSP_UART0_TX_PIN,BSP_UART0_RX_PIN); + drv_uart_cfg_t *instance = RT_NULL; RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); - - if (serial->parent.user_data != RT_NULL) + + if (serial->parent.user_data == RT_NULL) { - instance = (UART_CFG_T*)serial->parent.user_data; + return -RT_ERROR; } - + instance = (drv_uart_cfg_t*)serial->parent.user_data; nrfx_uart_uninit(&(instance->uart)); switch (cfg->baud_rate) @@ -83,28 +107,23 @@ static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configu config.hal_cfg.hwfc = NRF_UART_HWFC_DISABLED; config.pselrxd = instance->rx_pin; config.pseltxd = instance->tx_pin; - - nrfx_uart_init(&(instance->uart), &config, instance->event_handler); - nrf_uart_int_enable(instance->uart.p_reg, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_RXTO | NRF_UART_INT_MASK_ERROR); + nrfx_uart_init(&(instance->uart), &config, instance->event_handler); + nrfx_uart_rx(&(instance->uart),&(instance->rx_byte),1); nrf_uart_int_disable(instance->uart.p_reg, NRF_UART_INT_MASK_TXDRDY); - - nrfx_uart_rx_enable(&(instance->uart)); - - working_cfg = instance; return RT_EOK; } static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) { - UART_CFG_T *instance = working_cfg; - + drv_uart_cfg_t *instance = NULL; RT_ASSERT(serial != RT_NULL); - if (serial->parent.user_data != RT_NULL) + if (serial->parent.user_data == RT_NULL) { - instance = (UART_CFG_T*)serial->parent.user_data; + return -RT_ERROR; } + instance = (drv_uart_cfg_t*)serial->parent.user_data; switch (cmd) { @@ -129,10 +148,7 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) break; case RT_DEVICE_CTRL_PIN: - if (working_cfg != instance) - { - _uart_cfg(instance->serial, &(instance->serial->config)); - } + _uart_cfg(instance->serial, &(instance->serial->config)); break; case RT_DEVICE_POWERSAVE: @@ -152,13 +168,13 @@ static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg) static int _uart_putc(struct rt_serial_device *serial, char c) { - UART_CFG_T *instance = working_cfg; + drv_uart_cfg_t *instance = NULL; int rtn = 1; RT_ASSERT(serial != RT_NULL); if (serial->parent.user_data != RT_NULL) { - instance = (UART_CFG_T*)serial->parent.user_data; + instance = (drv_uart_cfg_t*)serial->parent.user_data; } nrf_uart_event_clear(instance->uart.p_reg, NRF_UART_EVENT_TXDRDY); @@ -171,23 +187,21 @@ static int _uart_putc(struct rt_serial_device *serial, char c) return rtn; } -/* - @note: this function is invaild ,the cause of the problem is [nrfx_uart.c - line 340] -*/ static int _uart_getc(struct rt_serial_device *serial) { int ch = -1; - UART_CFG_T *instance = working_cfg; - + drv_uart_cfg_t *instance = NULL; RT_ASSERT(serial != RT_NULL); if (serial->parent.user_data != RT_NULL) { - instance = (UART_CFG_T*)serial->parent.user_data; + instance = (drv_uart_cfg_t*)serial->parent.user_data; + } + if(instance->rx_length) + { + ch = instance->rx_byte; + instance->rx_length--; } - - ch = (int)(nrf_uart_rxd_get(instance->uart.p_reg)); - return ch; } @@ -202,11 +216,14 @@ void rt_hw_uart_init(void) { struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; - config.bufsz = RT_SERIAL_RB_BUFSZ; - _serial0_0.config = config; - _serial0_0.ops = &_uart_ops; - uart0.serial = &_serial0_0; +#ifdef BSP_USING_UART0 + _serial_0.config = config; + _serial_0.ops = &_uart_ops; + m_uart0_cfg.serial = &_serial_0; + rt_hw_serial_register(&_serial_0, "uart0", \ + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &m_uart0_cfg); +#endif /* BSP_USING_UART0 */ - rt_hw_serial_register(&_serial0_0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart0); } +#endif /* BSP_USING_UART */ diff --git a/bsp/nrf5x/nrf52840/board/Kconfig b/bsp/nrf5x/nrf52840/board/Kconfig index b7edace9e8..e05787c775 100644 --- a/bsp/nrf5x/nrf52840/board/Kconfig +++ b/bsp/nrf5x/nrf52840/board/Kconfig @@ -2,14 +2,14 @@ menu "Hardware Drivers Config" config SOC_NRF52840 bool - config SOC_NRF52840 + config SOC_NRF52840 select RT_USING_COMPONENTS_INIT select RT_USING_USER_MAIN default y menu "Onboard Peripheral Drivers" config BSP_USING_JLINK_TO_USART - bool "Enable JLINK TO USART (uart0)" + bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)" select BSP_USING_UART select BSP_USING_UART0 default y @@ -30,11 +30,20 @@ menu "On-chip Peripheral Drivers" config BSP_USING_UART0 bool "Enable UART0" default y - + if BSP_USING_UART0 + config BSP_UART0_RX_PIN + int "uart0 rx pin number" + range 0 31 + default 8 + config BSP_UART0_TX_PIN + int "uart0 tx pin number" + range 0 31 + default 6 + endif config BSP_USING_UART1 bool "Enable UART1" default n - endif + endif endmenu endmenu diff --git a/bsp/nrf5x/nrf52840/rtconfig.h b/bsp/nrf5x/nrf52840/rtconfig.h index 1741c7dd7b..c63c401e68 100644 --- a/bsp/nrf5x/nrf52840/rtconfig.h +++ b/bsp/nrf5x/nrf52840/rtconfig.h @@ -155,10 +155,13 @@ /* Onboard Peripheral Drivers */ +#define BSP_USING_JLINK_TO_USART /* On-chip Peripheral Drivers */ #define BSP_USING_UART #define BSP_USING_UART0 +#define BSP_UART0_RX_PIN 8 +#define BSP_UART0_TX_PIN 6 #endif -- Gitee From 572df0f5bfaad8827948401227705733466dc419 Mon Sep 17 00:00:00 2001 From: XYX12306 <2669599387@qq.com> Date: Wed, 29 Apr 2020 09:37:30 +0800 Subject: [PATCH 27/54] add bsp/stm32/stm32f413-st-nucleo --- bsp/stm32/stm32f413-st-nucleo/.config | 376 +++ bsp/stm32/stm32f413-st-nucleo/.gitignore | 42 + .../EventRecorderStub.scvd | 9 + bsp/stm32/stm32f413-st-nucleo/Kconfig | 21 + bsp/stm32/stm32f413-st-nucleo/README.md | 107 + bsp/stm32/stm32f413-st-nucleo/SConscript | 15 + bsp/stm32/stm32f413-st-nucleo/SConstruct | 60 + .../applications/SConscript | 12 + .../stm32f413-st-nucleo/applications/main.c | 33 + .../board/CubeMX_Config/.mxproject | 17 + .../board/CubeMX_Config/CubeMX_Config.ioc | 261 ++ .../board/CubeMX_Config/Inc/main.h | 125 + .../CubeMX_Config/Inc/stm32f4xx_hal_conf.h | 452 +++ .../board/CubeMX_Config/Inc/stm32f4xx_it.h | 84 + .../board/CubeMX_Config/Src/main.c | 345 ++ .../CubeMX_Config/Src/stm32f4xx_hal_msp.c | 246 ++ .../board/CubeMX_Config/Src/stm32f4xx_it.c | 218 ++ .../CubeMX_Config/Src/system_stm32f4xx.c | 743 +++++ bsp/stm32/stm32f413-st-nucleo/board/Kconfig | 66 + .../stm32f413-st-nucleo/board/SConscript | 37 + bsp/stm32/stm32f413-st-nucleo/board/board.c | 61 + bsp/stm32/stm32f413-st-nucleo/board/board.h | 50 + .../board/linker_scripts/link.icf | 28 + .../board/linker_scripts/link.lds | 157 + .../board/linker_scripts/link.sct | 15 + .../stm32f413-st-nucleo/figures/board.png | Bin 0 -> 716431 bytes bsp/stm32/stm32f413-st-nucleo/project.ewd | 2834 +++++++++++++++++ bsp/stm32/stm32f413-st-nucleo/project.ewp | 2256 +++++++++++++ bsp/stm32/stm32f413-st-nucleo/project.eww | 10 + .../stm32f413-st-nucleo/project.uvgui.19827 | 1319 ++++++++ bsp/stm32/stm32f413-st-nucleo/project.uvopt | 1129 +++++++ bsp/stm32/stm32f413-st-nucleo/project.uvoptx | 944 ++++++ bsp/stm32/stm32f413-st-nucleo/project.uvproj | 715 +++++ bsp/stm32/stm32f413-st-nucleo/project.uvprojx | 711 +++++ bsp/stm32/stm32f413-st-nucleo/rtconfig.h | 172 + bsp/stm32/stm32f413-st-nucleo/rtconfig.py | 143 + bsp/stm32/stm32f413-st-nucleo/template.ewp | 2031 ++++++++++++ bsp/stm32/stm32f413-st-nucleo/template.eww | 10 + bsp/stm32/stm32f413-st-nucleo/template.uvopt | 162 + bsp/stm32/stm32f413-st-nucleo/template.uvoptx | 196 ++ bsp/stm32/stm32f413-st-nucleo/template.uvproj | 407 +++ .../stm32f413-st-nucleo/template.uvprojx | 394 +++ 42 files changed, 17013 insertions(+) create mode 100644 bsp/stm32/stm32f413-st-nucleo/.config create mode 100644 bsp/stm32/stm32f413-st-nucleo/.gitignore create mode 100644 bsp/stm32/stm32f413-st-nucleo/EventRecorderStub.scvd create mode 100644 bsp/stm32/stm32f413-st-nucleo/Kconfig create mode 100644 bsp/stm32/stm32f413-st-nucleo/README.md create mode 100644 bsp/stm32/stm32f413-st-nucleo/SConscript create mode 100644 bsp/stm32/stm32f413-st-nucleo/SConstruct create mode 100644 bsp/stm32/stm32f413-st-nucleo/applications/SConscript create mode 100644 bsp/stm32/stm32f413-st-nucleo/applications/main.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/.mxproject create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/main.h create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_it.h create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/main.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_it.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/system_stm32f4xx.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/Kconfig create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/SConscript create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/board.c create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/board.h create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.icf create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.lds create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.sct create mode 100644 bsp/stm32/stm32f413-st-nucleo/figures/board.png create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.ewd create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.ewp create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.eww create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.uvgui.19827 create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.uvopt create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.uvoptx create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.uvproj create mode 100644 bsp/stm32/stm32f413-st-nucleo/project.uvprojx create mode 100644 bsp/stm32/stm32f413-st-nucleo/rtconfig.h create mode 100644 bsp/stm32/stm32f413-st-nucleo/rtconfig.py create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.ewp create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.eww create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.uvopt create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.uvoptx create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.uvproj create mode 100644 bsp/stm32/stm32f413-st-nucleo/template.uvprojx diff --git a/bsp/stm32/stm32f413-st-nucleo/.config b/bsp/stm32/stm32f413-st-nucleo/.config new file mode 100644 index 0000000000..d8d4619864 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/.config @@ -0,0 +1,376 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart3" +CONFIG_RT_VER_NUM=0x40003 +CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set +CONFIG_RT_LIBC_USING_TIME=y + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_NNOM is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32F4=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32F413ZH=y + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_STLINK_TO_USART=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +# CONFIG_BSP_USING_UART2 is not set +CONFIG_BSP_USING_UART3=y +# CONFIG_BSP_UART3_RX_USING_DMA is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set +# CONFIG_BSP_USING_USBD is not set +# CONFIG_BSP_USING_RNG is not set +# CONFIG_BSP_USING_UDID is not set + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32f413-st-nucleo/.gitignore b/bsp/stm32/stm32f413-st-nucleo/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32f413-st-nucleo/EventRecorderStub.scvd b/bsp/stm32/stm32f413-st-nucleo/EventRecorderStub.scvd new file mode 100644 index 0000000000..2956b29683 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/Kconfig b/bsp/stm32/stm32f413-st-nucleo/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32f413-st-nucleo/README.md b/bsp/stm32/stm32f413-st-nucleo/README.md new file mode 100644 index 0000000000..083970d56b --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/README.md @@ -0,0 +1,107 @@ +# NUCLEO-F413ZH 开发板 BSP 说明 + +## 简介 + +本文档为 RT-Thread 开发团队为 NUCLEO-F413ZH 开发板的 BSP (板级支持包) 说明。 + +主要内容如下: + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。在进阶使用指南章节,将会介绍更多高级功能,帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +探索者 NUCLEO-F413ZH 是意法半导体推出的一款基于 ARM Cortex-M4 内核的开发板,最高主频为 100Mhz,该开发板具有丰富的板载资源,可以充分发挥 NUCLEO-F413ZH 的芯片性能。 + +开发板外观如下图所示: + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下: + +- MCU:STM32F413ZH,主频 100MHz,1536KB FLASH ,320KB RAM +- 常用外设 + - LED:8个,user LED (绿色,PC9,LD1;蓝色,PB7,LD2;红色,PB14,LD3), USB communication (LD4), over current (LD5), power LED (黄色,LD6), USB FAULT (LD7), VBUS (LD8)。 + - 按键:2个,B1(USER,PC13),B2(RESET) +- 常用接口:USB 支持 3 种不同接口:虚拟 COM 端口、大容量存储和调试端口等。 +- 调试接口,板载 ST-LINK/V2-1 调试器。 + +开发板更多详细信息请参考意法半导体 [NUCLEO-F413ZH 开发板介绍](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-nucleo-boards/nucleo-f413zh.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下: + +| **片上外设** | **支持情况** | **备注** | +| :------------ | :----------: | :-----------------------------------: | +| GPIO | 支持 | | +| UART | 支持 | UART2,UART3 | +| Onchip Flash | 支持 | | +| USB Device | 支持 | | + +## 使用说明 + +使用说明分为如下两个章节: + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程,并且支持 GCC 开发环境。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。 + +#### 硬件连接 + +使用 Type-A to Micro-B 线连接开发板和 PC 供电,黄色 LED LD6 (PWR) 和 LD4 (COM) 会点亮。 + +#### 编译下载 + +双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。 + +> 工程默认配置使用 xxx 仿真器下载程序,在通过 xxx 连接开发板的基础上,点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后,系统会自动运行,观察开发板上 LD2 的运行效果,蓝色 LD2 会周期性闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Apr 28 2020 + 2006 - 2020 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口 3 的功能,更多高级功能需要利用 ENV 工具对 BSP 进行配置,步骤如下: + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程,配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [flybreak](https://github.com/XYX12306) ,邮箱:<2669599387@qq.com> \ No newline at end of file diff --git a/bsp/stm32/stm32f413-st-nucleo/SConscript b/bsp/stm32/stm32f413-st-nucleo/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32f413-st-nucleo/SConstruct b/bsp/stm32/stm32f413-st-nucleo/SConstruct new file mode 100644 index 0000000000..945cb55a52 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32F4xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32f413-st-nucleo/applications/SConscript b/bsp/stm32/stm32f413-st-nucleo/applications/SConscript new file mode 100644 index 0000000000..6f66f7ab73 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/applications/SConscript @@ -0,0 +1,12 @@ +import rtconfig +from building import * + +cwd = GetCurrentDir() +CPPPATH = [cwd, str(Dir('#'))] +src = Split(""" +main.c +""") + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32f413-st-nucleo/applications/main.c b/bsp/stm32/stm32f413-st-nucleo/applications/main.c new file mode 100644 index 0000000000..9f63c9a7ff --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/applications/main.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include +#include +#include + +/* defined the LED2 pin: PB7 */ +#define LED2_PIN GET_PIN(B, 7) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..373c6cc6de --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/.mxproject @@ -0,0 +1,17 @@ +[PreviousGenFiles] +HeaderPath=H:/RT-Thread/rt-thread/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc +HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h; +SourcePath=H:/RT-Thread/rt-thread/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src +SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f413xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; + +[PreviousUsedIarFiles] +SourceFiles=..\Src\main.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null; +HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../\Src/system_stm32f4xx.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null; +HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc; + diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..a939b37e7b --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,261 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +KeepUserPlacement=true +Mcu.Family=STM32F4 +Mcu.IP0=NVIC +Mcu.IP1=RCC +Mcu.IP2=SYS +Mcu.IP3=USART3 +Mcu.IP4=USB_OTG_FS +Mcu.IPNb=5 +Mcu.Name=STM32F413Z(G-H)Tx +Mcu.Package=LQFP144 +Mcu.Pin0=PC13 +Mcu.Pin1=PC14-OSC32_IN +Mcu.Pin10=PC9 +Mcu.Pin11=PA8 +Mcu.Pin12=PA9 +Mcu.Pin13=PA10 +Mcu.Pin14=PA11 +Mcu.Pin15=PA12 +Mcu.Pin16=PA13 +Mcu.Pin17=PA14 +Mcu.Pin18=PB3 +Mcu.Pin19=PB7 +Mcu.Pin2=PC15-OSC32_OUT +Mcu.Pin20=VP_SYS_VS_Systick +Mcu.Pin3=PH0 - OSC_IN +Mcu.Pin4=PH1 - OSC_OUT +Mcu.Pin5=PB14 +Mcu.Pin6=PD8 +Mcu.Pin7=PD9 +Mcu.Pin8=PG6 +Mcu.Pin9=PG7 +Mcu.PinsNb=21 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F413ZHTx +MxCube.Version=5.1.0 +MxDb.Version=DB.5.0.10 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false +PA10.GPIOParameters=GPIO_Label +PA10.GPIO_Label=USB_ID +PA10.Locked=true +PA10.Signal=USB_OTG_FS_ID +PA11.GPIOParameters=GPIO_Label +PA11.GPIO_Label=USB_DM +PA11.Locked=true +PA11.Mode=Device_Only +PA11.Signal=USB_OTG_FS_DM +PA12.GPIOParameters=GPIO_Label +PA12.GPIO_Label=USB_DP +PA12.Locked=true +PA12.Mode=Device_Only +PA12.Signal=USB_OTG_FS_DP +PA13.GPIOParameters=GPIO_Label +PA13.GPIO_Label=TMS +PA13.Locked=true +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.GPIOParameters=GPIO_Label +PA14.GPIO_Label=TCK +PA14.Locked=true +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PA8.GPIOParameters=GPIO_Label +PA8.GPIO_Label=USB_SOF [TP1] +PA8.Locked=true +PA8.Mode=Activate_SOF_FS +PA8.Signal=USB_OTG_FS_SOF +PA9.GPIOParameters=GPIO_Label +PA9.GPIO_Label=USB_VBUS +PA9.Locked=true +PA9.Mode=Activate_VBUS +PA9.Signal=USB_OTG_FS_VBUS +PB14.GPIOParameters=GPIO_Label +PB14.GPIO_Label=LD3 [Red] +PB14.Locked=true +PB14.Signal=GPIO_Output +PB3.GPIOParameters=GPIO_Label +PB3.GPIO_Label=SWO +PB3.Locked=true +PB3.Signal=SYS_JTDO-SWO +PB7.GPIOParameters=GPIO_Label +PB7.GPIO_Label=LD2 [Blue] +PB7.Locked=true +PB7.Signal=GPIO_Output +PC13.GPIOParameters=GPIO_Label +PC13.GPIO_Label=USER_Btn [B1] +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSC32_IN.Locked=true +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Locked=true +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PC9.GPIOParameters=GPIO_Label +PC9.GPIO_Label=LD1 [Green] +PC9.Locked=true +PC9.Signal=GPIO_Output +PCC.Checker=false +PCC.Line=STM32F413/423 +PCC.MCU=STM32F413Z(G-H)Tx +PCC.PartNumber=STM32F413ZHTx +PCC.Seq0=0 +PCC.Series=STM32F4 +PCC.Temperature=25 +PCC.Vdd=null +PD8.GPIOParameters=GPIO_Label +PD8.GPIO_Label=STLK_RX [STM32F103CBT6_PA3] +PD8.Locked=true +PD8.Mode=Asynchronous +PD8.Signal=USART3_TX +PD9.GPIOParameters=GPIO_Label +PD9.GPIO_Label=STLK_TX [STM32F103CBT6_PA2] +PD9.Locked=true +PD9.Mode=Asynchronous +PD9.Signal=USART3_RX +PG6.GPIOParameters=GPIO_Label +PG6.GPIO_Label=USB_PowerSwitchOn [STMPS2151STR_EN] +PG6.Locked=true +PG6.Signal=GPIO_Output +PG7.GPIOParameters=GPIO_Label +PG7.GPIO_Label=USB_OverCurrent [STMPS2151STR_FAULT] +PG7.Locked=true +PG7.Signal=GPIO_Input +PH0\ -\ OSC_IN.GPIOParameters=GPIO_Label +PH0\ -\ OSC_IN.GPIO_Label=MCO +PH0\ -\ OSC_IN.Locked=true +PH0\ -\ OSC_IN.Mode=HSE-External-Clock-Source +PH0\ -\ OSC_IN.Signal=RCC_OSC_IN +PH1\ -\ OSC_OUT.Mode=HSE-External-Clock-Source +PH1\ -\ OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32F413ZHTx +ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.24.2 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true,4-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true +RCC.48MHZClocksFreq_Value=24000000 +RCC.ADC12outputFreq_Value=72000000 +RCC.ADC34outputFreq_Value=72000000 +RCC.AHBFreq_Value=96000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV2 +RCC.APB1Freq_Value=48000000 +RCC.APB1TimFreq_Value=96000000 +RCC.APB2Freq_Value=96000000 +RCC.APB2TimFreq_Value=96000000 +RCC.CortexFreq_Value=96000000 +RCC.DFSDM2AudioFreq_Value=48000000 +RCC.DFSDMAudioFreq_Value=48000000 +RCC.DFSDMFreq_Value=96000000 +RCC.EthernetFreq_Value=8000000 +RCC.FCLKCortexFreq_Value=96000000 +RCC.FMPI2C1Freq_Value=48000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=96000000 +RCC.HSE_VALUE=8000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=8000000 +RCC.I2C2Freq_Value=8000000 +RCC.I2C3Freq_Value=8000000 +RCC.I2S1Freq_Value=48000000 +RCC.I2S2Freq_Value=48000000 +RCC.I2SClocksFreq_Value=48000000 +RCC.IPParameters=48MHZClocksFreq_Value,ADC12outputFreq_Value,ADC34outputFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDM2AudioFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FMPI2C1Freq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2S1Freq_Value,I2S2Freq_Value,I2SClocksFreq_Value,LPTimerFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SQoutputFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SoutputFreq_Value,PLLM,PLLMCOFreq_Value,PLLMUL,PLLN,PLLP,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLRoutputFreq_Value,PRESCALERUSB,PWRFreq_Value,RNGFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAI1AFreq_Value,SAI1BFreq_Value,SDIOFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,SYSCLKSourceVirtual,TIM15Freq_Value,TIM16Freq_Value,TIM17Freq_Value,TIM1Freq_Value,TIM20Freq_Value,TIM2Freq_Value,TIM3Freq_Value,TIM8Freq_Value,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOI2SInputFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutput2Freq_Value,VCOOutputFreq_Value,VcooutputI2S,WatchDogFreq_Value +RCC.LPTimerFreq_Value=48000000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=16000000 +RCC.MCO2PinFreq_Value=96000000 +RCC.MCOFreq_Value=72000000 +RCC.PLLCLKFreq_Value=96000000 +RCC.PLLI2SPCLKFreq_Value=48000000 +RCC.PLLI2SQCLKFreq_Value=48000000 +RCC.PLLI2SQoutputFreq_Value=48000000 +RCC.PLLI2SRCLKFreq_Value=48000000 +RCC.PLLI2SoutputFreq_Value=48000000 +RCC.PLLM=8 +RCC.PLLMCOFreq_Value=72000000 +RCC.PLLMUL=RCC_PLL_MUL9 +RCC.PLLN=384 +RCC.PLLP=RCC_PLLP_DIV4 +RCC.PLLQ=8 +RCC.PLLQCLKFreq_Value=48000000 +RCC.PLLQoutputFreq_Value=48000000 +RCC.PLLRCLKFreq_Value=192000000 +RCC.PLLRoutputFreq_Value=192000000 +RCC.PRESCALERUSB=RCC_USBCLKSOURCE_PLL_DIV1_5 +RCC.PWRFreq_Value=96000000 +RCC.RNGFreq_Value=48000000 +RCC.RTCFreq_Value=32000 +RCC.RTCHSEDivFreq_Value=4000000 +RCC.SAI1AFreq_Value=8000000 +RCC.SAI1BFreq_Value=8000000 +RCC.SDIOFreq_Value=48000000 +RCC.SYSCLKFreq_VALUE=96000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.SYSCLKSourceVirtual=RCC_SYSCLKSOURCE_PLLCLK +RCC.TIM15Freq_Value=72000000 +RCC.TIM16Freq_Value=72000000 +RCC.TIM17Freq_Value=72000000 +RCC.TIM1Freq_Value=72000000 +RCC.TIM20Freq_Value=72000000 +RCC.TIM2Freq_Value=72000000 +RCC.TIM3Freq_Value=72000000 +RCC.TIM8Freq_Value=72000000 +RCC.UART4Freq_Value=36000000 +RCC.UART5Freq_Value=36000000 +RCC.USART1Freq_Value=72000000 +RCC.USART2Freq_Value=36000000 +RCC.USART3Freq_Value=36000000 +RCC.USBFreq_Value=48000000 +RCC.VCOI2SInputFreq_Value=500000 +RCC.VCOI2SOutputFreq_Value=96000000 +RCC.VCOInputFreq_Value=1000000 +RCC.VCOInputMFreq_Value=500000 +RCC.VCOOutput2Freq_Value=8000000 +RCC.VCOOutputFreq_Value=384000000 +RCC.VcooutputI2S=48000000 +RCC.WatchDogFreq_Value=32000 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +USART3.IPParameters=VirtualMode +USART3.VirtualMode=VM_ASYNC +USB_OTG_FS.IPParameters=VirtualMode +USB_OTG_FS.VirtualMode=Device_Only +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=NUCLEO-F413ZH +boardIOC=true diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..04267febcc --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,125 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define USER_Btn_Pin GPIO_PIN_13 +#define USER_Btn_GPIO_Port GPIOC +#define MCO_Pin GPIO_PIN_0 +#define MCO_GPIO_Port GPIOH +#define LD3_Pin GPIO_PIN_14 +#define LD3_GPIO_Port GPIOB +#define STLK_RX_Pin GPIO_PIN_8 +#define STLK_RX_GPIO_Port GPIOD +#define STLK_TX_Pin GPIO_PIN_9 +#define STLK_TX_GPIO_Port GPIOD +#define USB_PowerSwitchOn_Pin GPIO_PIN_6 +#define USB_PowerSwitchOn_GPIO_Port GPIOG +#define USB_OverCurrent_Pin GPIO_PIN_7 +#define USB_OverCurrent_GPIO_Port GPIOG +#define LD1_Pin GPIO_PIN_9 +#define LD1_GPIO_Port GPIOC +#define USB_SOF_Pin GPIO_PIN_8 +#define USB_SOF_GPIO_Port GPIOA +#define USB_VBUS_Pin GPIO_PIN_9 +#define USB_VBUS_GPIO_Port GPIOA +#define USB_ID_Pin GPIO_PIN_10 +#define USB_ID_GPIO_Port GPIOA +#define USB_DM_Pin GPIO_PIN_11 +#define USB_DM_GPIO_Port GPIOA +#define USB_DP_Pin GPIO_PIN_12 +#define USB_DP_GPIO_Port GPIOA +#define TMS_Pin GPIO_PIN_13 +#define TMS_GPIO_Port GPIOA +#define TCK_Pin GPIO_PIN_14 +#define TCK_GPIO_Port GPIOA +#define SWO_Pin GPIO_PIN_3 +#define SWO_GPIO_Port GPIOB +#define LD2_Pin GPIO_PIN_7 +#define LD2_GPIO_Port GPIOB +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h new file mode 100644 index 0000000000..9fabadb8c3 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h @@ -0,0 +1,452 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +/* #define HAL_ADC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_I2C_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +/* #define HAL_SPI_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_it.h b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_it.h new file mode 100644 index 0000000000..7a788c296b --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_it.h @@ -0,0 +1,84 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_IT_H +#define __STM32F4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..516049000b --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/main.c @@ -0,0 +1,345 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +UART_HandleTypeDef huart3; + +PCD_HandleTypeDef hpcd_USB_OTG_FS; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART3_UART_Init(void); +static void MX_USB_OTG_FS_PCD_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART3_UART_Init(); + MX_USB_OTG_FS_PCD_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 384; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 8; + RCC_OscInitStruct.PLL.PLLR = 2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) +{ + + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ + +} + +/** + * @brief USB_OTG_FS Initialization Function + * @param None + * @retval None + */ +static void MX_USB_OTG_FS_PCD_Init(void) +{ + + /* USER CODE BEGIN USB_OTG_FS_Init 0 */ + + /* USER CODE END USB_OTG_FS_Init 0 */ + + /* USER CODE BEGIN USB_OTG_FS_Init 1 */ + + /* USER CODE END USB_OTG_FS_Init 1 */ + hpcd_USB_OTG_FS.Instance = USB_OTG_FS; + hpcd_USB_OTG_FS.Init.dev_endpoints = 6; + hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; + hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; + hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd_USB_OTG_FS.Init.Sof_enable = ENABLE; + hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; + hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; + hpcd_USB_OTG_FS.Init.battery_charging_enable = ENABLE; + hpcd_USB_OTG_FS.Init.vbus_sensing_enable = ENABLE; + hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; + if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USB_OTG_FS_Init 2 */ + + /* USER CODE END USB_OTG_FS_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, LD3_Pin|LD2_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(USB_PowerSwitchOn_GPIO_Port, USB_PowerSwitchOn_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LD1_GPIO_Port, LD1_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : USER_Btn_Pin */ + GPIO_InitStruct.Pin = USER_Btn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USER_Btn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : LD3_Pin LD2_Pin */ + GPIO_InitStruct.Pin = LD3_Pin|LD2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pin : USB_PowerSwitchOn_Pin */ + GPIO_InitStruct.Pin = USB_PowerSwitchOn_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(USB_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : USB_OverCurrent_Pin */ + GPIO_InitStruct.Pin = USB_OverCurrent_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USB_OverCurrent_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : LD1_Pin */ + GPIO_InitStruct.Pin = LD1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(LD1_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c new file mode 100644 index 0000000000..d3fdab64dc --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c @@ -0,0 +1,246 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32f4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspInit 0 */ + + /* USER CODE END USART3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART3_CLK_ENABLE(); + + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**USART3 GPIO Configuration + PD8 ------> USART3_TX + PD9 ------> USART3_RX + */ + GPIO_InitStruct.Pin = STLK_RX_Pin|STLK_TX_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN USART3_MspInit 1 */ + + /* USER CODE END USART3_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspDeInit 0 */ + + /* USER CODE END USART3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART3_CLK_DISABLE(); + + /**USART3 GPIO Configuration + PD8 ------> USART3_TX + PD9 ------> USART3_RX + */ + HAL_GPIO_DeInit(GPIOD, STLK_RX_Pin|STLK_TX_Pin); + + /* USER CODE BEGIN USART3_MspDeInit 1 */ + + /* USER CODE END USART3_MspDeInit 1 */ + } + +} + +/** +* @brief PCD MSP Initialization +* This function configures the hardware resources used in this example +* @param hpcd: PCD handle pointer +* @retval None +*/ +void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hpcd->Instance==USB_OTG_FS) + { + /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ + + /* USER CODE END USB_OTG_FS_MspInit 0 */ + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USB_OTG_FS GPIO Configuration + PA8 ------> USB_OTG_FS_SOF + PA9 ------> USB_OTG_FS_VBUS + PA10 ------> USB_OTG_FS_ID + PA11 ------> USB_OTG_FS_DM + PA12 ------> USB_OTG_FS_DP + */ + GPIO_InitStruct.Pin = USB_SOF_Pin|USB_ID_Pin|USB_DM_Pin|USB_DP_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = USB_VBUS_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(USB_VBUS_GPIO_Port, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ + + /* USER CODE END USB_OTG_FS_MspInit 1 */ + } + +} + +/** +* @brief PCD MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hpcd: PCD handle pointer +* @retval None +*/ +void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) +{ + if(hpcd->Instance==USB_OTG_FS) + { + /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */ + + /* USER CODE END USB_OTG_FS_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); + + /**USB_OTG_FS GPIO Configuration + PA8 ------> USB_OTG_FS_SOF + PA9 ------> USB_OTG_FS_VBUS + PA10 ------> USB_OTG_FS_ID + PA11 ------> USB_OTG_FS_DM + PA12 ------> USB_OTG_FS_DP + */ + HAL_GPIO_DeInit(GPIOA, USB_SOF_Pin|USB_VBUS_Pin|USB_ID_Pin|USB_DM_Pin + |USB_DP_Pin); + + /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ + + /* USER CODE END USB_OTG_FS_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_it.c b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_it.c new file mode 100644 index 0000000000..4f557bc4a3 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_it.c @@ -0,0 +1,218 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32f4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/system_stm32f4xx.c b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/system_stm32f4xx.c new file mode 100644 index 0000000000..90376044e6 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/CubeMX_Config/Src/system_stm32f4xx.c @@ -0,0 +1,743 @@ +/** + ****************************************************************************** + * @file system_stm32f4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f4xx_system + * @{ + */ + +/** @addtogroup STM32F4xx_System_Private_Includes + * @{ + */ + + +#include "stm32f4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\ + STM32F412Zx || STM32F412Vx */ + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +/* #define DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\ + STM32F479xx */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ +uint32_t SystemCoreClock = 16000000; +const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting, vector table location and External memory + * configuration. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value + * depends on the application requirements), user has to ensure that HSE_VALUE + * is same as the real frequency of the crystal used. Otherwise, this function + * may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM) +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; + + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register __IO uint32_t index; + + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */ + RCC->AHB1ENR |= 0x000001F8; + + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + FMC_Bank5_6->SDCR[0] = 0x000019E4; + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ + FMC_Bank5_6->SDCMR = 0x00000073; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ + FMC_Bank5_6->SDCMR = 0x00046014; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ + + (void)(tmp); +} +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ +#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +#if defined (DATA_IN_ExtSDRAM) + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register __IO uint32_t index; + +#if defined(STM32F446xx) + /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface + clock */ + RCC->AHB1ENR |= 0x0000007D; +#else + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface + clock */ + RCC->AHB1ENR |= 0x000001F8; +#endif /* STM32F446xx */ + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + +#if defined(STM32F446xx) + /* Connect PAx pins to FMC Alternate function */ + GPIOA->AFR[0] |= 0xC0000000; + GPIOA->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOA->MODER |= 0x00008000; + /* Configure PDx pins speed to 50 MHz */ + GPIOA->OSPEEDR |= 0x00008000; + /* Configure PDx pins Output type to push-pull */ + GPIOA->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOA->PUPDR |= 0x00000000; + + /* Connect PCx pins to FMC Alternate function */ + GPIOC->AFR[0] |= 0x00CC0000; + GPIOC->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOC->MODER |= 0x00000A00; + /* Configure PDx pins speed to 50 MHz */ + GPIOC->OSPEEDR |= 0x00000A00; + /* Configure PDx pins Output type to push-pull */ + GPIOC->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOC->PUPDR |= 0x00000000; +#endif /* STM32F446xx */ + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x000000CC; + GPIOD->AFR[1] = 0xCC000CCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xA02A000A; + /* Configure PDx pins speed to 50 MHz */ + GPIOD->OSPEEDR = 0xA02A000A; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 50 MHz */ + GPIOE->OSPEEDR = 0xAAAA800A; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + /* Configure and enable SDRAM bank1 */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCR[0] = 0x00001954; +#else + FMC_Bank5_6->SDCR[0] = 0x000019E4; +#endif /* STM32F446xx */ + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x000000F3; +#else + FMC_Bank5_6->SDCMR = 0x00000073; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x00044014; +#else + FMC_Bank5_6->SDCMR = 0x00046014; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; +#if defined(STM32F446xx) + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1)); +#else + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); +#endif /* STM32F446xx */ + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); +#endif /* DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ + +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) + +#if defined(DATA_IN_ExtSRAM) +/*-- GPIOs Configuration -----------------------------------------------------*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR |= 0x00000078; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x000000C0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00085AAA; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000CAFFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FMC/FSMC Configuration --------------------------------------------------*/ + /* Enable the FMC/FSMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\ + || defined(STM32F412Zx) || defined(STM32F412Vx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN); + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001011; + FSMC_Bank1->BTCR[3] = 0x00000201; + FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF; +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */ + +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\ + STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */ + (void)(tmp); +} +#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f413-st-nucleo/board/Kconfig b/bsp/stm32/stm32f413-st-nucleo/board/Kconfig new file mode 100644 index 0000000000..ff025ae50e --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/Kconfig @@ -0,0 +1,66 @@ +menu "Hardware Drivers Config" + +config SOC_STM32F413ZH + bool + select SOC_SERIES_STM32F4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_STLINK_TO_USART + bool "Enable STLINK TO USART (uart3)" + select BSP_USING_UART + select BSP_USING_UART3 + default y +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART2 + bool "Enable UART2" + default y + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART3 + bool "Enable UART3" + default y + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + config BSP_USING_USBD + bool "Enable OTGFS as USB device" + select RT_USING_USB_DEVICE + select BSP_USBD_TYPE_FS + default n + + source "../libraries/HAL_Drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32f413-st-nucleo/board/SConscript b/bsp/stm32/stm32f413-st-nucleo/board/SConscript new file mode 100644 index 0000000000..19bd90dc16 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/SConscript @@ -0,0 +1,37 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32f4xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f413xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/arm/startup_stm32f413xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/startup_stm32f413xx.s'] + +# STM32F405xx) || STM32F415xx) || STM32F407xx) || STM32F417xx) +# STM32F427xx) || STM32F437xx) || STM32F429xx) || STM32F439xx) +# STM32F401xC) || STM32F401xE) || STM32F410Tx) || STM32F410Cx) +# STM32F410Rx) || STM32F411xE) || STM32F446xx) || STM32F469xx) +# STM32F479xx) || STM32F412Cx) || STM32F412Rx) || STM32F412Vx) +# STM32F412Zx) || STM32F413xx) || STM32F423xx) +# You can select chips from the list above +CPPDEFINES = ['STM32F413xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/stm32/stm32f413-st-nucleo/board/board.c b/bsp/stm32/stm32f413-st-nucleo/board/board.c new file mode 100644 index 0000000000..b63870d40c --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/board.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include "board.h" + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 384; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 8; + RCC_OscInitStruct.PLL.PLLR = 2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32f413-st-nucleo/board/board.h b/bsp/stm32/stm32f413-st-nucleo/board/board.h new file mode 100644 index 0000000000..cd5e86661c --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-5 SummerGift first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (1536 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +#define STM32_SRAM_SIZE 320 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#if defined(__CC_ARM) || defined(__CLANG_ARM) +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.icf b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.icf new file mode 100644 index 0000000000..28621a18a0 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.icf @@ -0,0 +1,28 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0817FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x0400; +define symbol __ICFEDIT_size_heap__ = 0x0000; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, last block CSTACK}; diff --git a/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.lds b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.lds new file mode 100644 index 0000000000..bdcade75b4 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.lds @@ -0,0 +1,157 @@ +/* + * linker script for STM32F4xx with GNU ld + * bernard.xiong 2009-10-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1536k /* 1536KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 320k /* 128K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + + . = ALIGN(4); + + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.sct b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.sct new file mode 100644 index 0000000000..e5ec52d769 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00180000 { ; load region size_region + ER_IROM1 0x08000000 0x00180000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00050000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/stm32/stm32f413-st-nucleo/figures/board.png b/bsp/stm32/stm32f413-st-nucleo/figures/board.png new file mode 100644 index 0000000000000000000000000000000000000000..7402e531abb2524aad52478df70897374597e3cb GIT binary patch literal 716431 zcmY&;Wl&sE(FTbh`^Y`rPv1x-MQIFFQdBrNI1E`CNfkIa_%t{;gmV<6e-gA?FyP+{-bF92Z!tWp9g-^oXQgp?(Lhbq_~=={@Dw1 z7sXF6wwT`s{_X92kuH0nH?k2Y-8y(xsY`0mr---{Hv9z~b!t!rX+_yR8wEwqrq5;f z<))8A>3zkK&!zybvMu%<-RssfE=Jet(;1hKdG)>D_~cifqn&kUdx6$$o!9vE69b>IP;rS+Md4a5=Hpdvr5W(;q}S-MaT8`x3OKfSnsI5^Zc=rv@^2L217 z?SE$JHJW`Fu79Tv7tDchh;XA_O?ZBOetdQ&si~QMv%I(%HaraZvA9@RQGrUJ{cq(XU^> z=FeH;k5Iz}knU$?Wf9PnRaL2p>S$<$Rb>nB?-Nkh=A*PfhK^283EgUo8Zhtw);)0W z($i0#8MXM0Mi-^5rUvWp2dAW^754P#1Brk&zkXRC@M&vnr<~&uf$|d1@#gWI1zMj+ z^#1oU-xzpi=H}*TNR3Lty^bc*MulK|(CpJFf_Ix5%gV|=$;tvyQBf1JvZB|6jrWOC z3+sx}-w%BorPbO;b;3_&tQ~uLBL(Gcc}-5x?(Fa9x3ximgg~6f*oE3WdalRwYMoZ& znOqSRq>ypmJe}7)wxfvu?k)DNY_A?L3P?mmPoQ___hX6+m7kyAxIo+jFnsLUzxO5= z`-@IEDg_gU;7>tO>$$~pFtdTprOIy}){c)I>=LhO2{U<^P9WR{Hi25&(=-=$XL|@` zsHGwm=2~xnm|`~n^+7we0J*#UV|@Gn-Jdi^Y>M#+$r1`e0fz9j6(tf)yME@SCf86HP5kE)< zy-%hU%;-EVNgkCgjkA=Jni@Je`8o7>-w(*SLJuT#V&z)i{&%8$1TIg_HTYj{PR6Rk z8HPFdc`@fu3LSEKRmy*xA&Mm_ckyrdyn@!3(FHR|;Z$&J9gS6YKrI(*7@x0ld?TtqBxX!X%a@})WKQm&yYgC8_!Yl zICDIPbGTHTV8zme&P6{VVY8&mnEV+^E zZxIKMPh0?+c?#9d%acoq%Wb$Zx+-)DLJt~-voG2Faqp1twnyh)_!Aw`NA|Faiksky zOeDs!O@V28op*(e5)c9OG$Cy$n#|JhdpixQ>K4Z3)$=!>Q417*ynroESdb-En0NbT1W95b<&L44@tjd8 z#}E)TC`t$qOjJrAPVq&ktx?LrV@8XXFwW6u00lXC{B^>S?OXWRw&lHh(zbX9zd^EaG!t`^2pNG{B`E`8Cc> zf#Pquth~)>#|P6RT<>Z62eC#hFSQVX^sTTNd4i*FtG}ZQe-BVx^_~3gzqsu?#Qbh~ zJ79_S-S%5UW7u|`&vuK@j!OnfAt?pRjjB-=hH{_*659Bo>-X_G{&Nl?TaKGfxn%{8 zEL%i^&IZcPsUd{@zZ;^SA}qKL*cxcPK4}R9K#S;wB|%@k-|j zq-!ZxR#lF!#QD{l;%jB$1w+Bp+N`TK>UGxVv###qm8ud&my+ovIWy|0#H%rw8E%9> z*1pbNoCdd-qf)AK{|SQ=6ePb|VMSSHxtg$0C;e#sY{>&FSg6GRq)GOZ13Ec-JWUC? ziw*KC=F=|VhUWjAIHfOZhLn9o%3#&zuky9MgsIvEj$4DXHsOl;6yX*N%In|7Vw{&9 z`G0h6mQWwDv$Yr3@u6j6icUyN8y*E~Tl2<|ixvn&XkSopOizE=T)igo)p<==lMA$< z>9p4Nb=+3|J6)KaM3f%b^p#RT%=j(j&b4m|@=fW1!^c#lYR=mF9-O5)`dFWB@vPRUkor*F#9Qt4);G3~`1}aS9JtMfZtmxsoHs>Z`t6J$}$uciL8N%Igu; z#O#d7CcMZ|xzFO_5MENI3gwjK@Tdmo6m^aYro`Nw(5SE0W}iN3IRTvKxs^54VuII& zi%W|OIVxRwA3Vg}*=Uiad|71KAtVMf!nr{)ZTP03VW3Fl;8$NnE7|Zw=V!*GI7*21 zJSXTIhl*-KLN=@z7BaehFp=WJi7Mcx7P|i8}(h?==6O%DXW;W#ViofuM7G)5L z1W`TRATlF5<}|MV@*DUX6PsL`xTvl(OmPS@Sa5pFR+#C!hrNO6sMOGr>k7W6cZ4D(ExuqSwM$odS78eQxsq;15cFS0|&{l2)BV|!3 zApRyS!my)9UX5Y+D-9}daw{6!4AIcR zl3P9FSCW=Cq>#WH3Qm?&Z|P*WcN1o8=`l)vBo2GxP-5T$Q@zu-d{PuD^U<&rn z_UK}xrmv~eVq-&JMrdl$$|EWPkVlFh`-Vgiap@M3aik>8ctJC(PRn+6E8$M^m-L;D zAqV5BRe~y3GIbG`DbqromC$AzUg`@dZXAVzq@SG-`YIgyS2))ieg3}|N+vf&x_b~a zC(jVzL3Q+FT$io`vu3iH1dBKBg-{5LfM%VEr<$$ac(s)6t z?Br~7gox6^Hp@|4Pa;$iZ*g{zIJ-%OzLShMI53&a*kbP9M?&ro=Um4MM*$qGePAeF zwo?BIuusM_b8^$4P!#X`m#c4d9$a0|(<^)TWBZd2Om%O3;)PGVJB0+II+IC&5XnO9 zsF0ySeg(!-z|mIH^qEDaO;nz-ep`HmD=vU<-PcTXSAGpa^2(eYYOjUiHNcMs`^s=kn9(Cw*+;z%i&)2m zeD^e^q&F5E%-cMkXAubl$fw{>q^2+s%2$7QWvz7lRZSS2>!?^2wtS$}iK&04*1F!N zlWFsVV^x1Jf*t!!v+~)f)lj{+kh=zP;vs*eCRUn>PdAa!FF$BXdxlT_Uuf(Mas9oX^Bb7v9;Gt(ezRRul+2=uHU~dw0s|6-o2rUs+`S=A8e!}<15R7*qG3U8Wzig`zw!L zR-s6UD}+!J3w4dcRa#`0A7Xg@Wnep#I$`R&AY2lvIBeVa_O>8dQcFV{fRSV1r-vp> zha3s8auoC(AG_)6^Y19s5dQn{;<-N;>f41S2FcL@MqofNBdT29k;u zs7jHg0EOd|gt#(Q23W3{U>|;;Cqov@%isSFqJph0@k?b z9<;=#;?(0?m@41v(yEa73fEgQm2t->L5hlK6O*_T$4%tSPrnYZXwv4!01y3$ysOR_ zsaZMH$2TqmfLu!MzDS_l`e?5kq5=h(#^rHPBGZ_7E6t8829wba=C7A`mKMlzjFVnz zC<)oqgs)2WvHNawfFYzvoWA?NsWF1^mxsZk$h|ZTY&@an1wt} z6>(CE5D;Dq14T|Gz>3IOlD6TK{g$p+f@RIEUYa>RfiDp)&~KQPRrD{=G~!f4 zJ{DV-%A)wFyoxba$?3cF{X*^LMyM?==yhRdM>LyNcm1_7R7d%f0Tt!l&PqRJVTBMu zoa#K2~kMk;o^| zj?ReuEMvIyy=d3EU`(DJ<9CN&($}WyV!6!dJLQN3Ex(4bEyzYnkkEJu_zE_c;^~vT z!`rbahLzR6G9;eBiK=4k&f!flmh6q~pDOsdik3L}>h2DOOWE5pHWz#seD5cwG`zHw znxU-7upoYGeUb&N$F9rh?Yp|tqQ$4kj2*Q_q<#CVPdzD$5lagWjB(z8zX-@I$2xJf z(p#^=uG|vm;#4X)ZKI%X30cBIE&M>7nM_fFT~SGz;zE~t;5Po4IvFGU=QeTnOYAEX z({vw!3)}E5pKj#Z;bz1au_q`Hfqq+_2@(&^d7EqGag0Ejn0YsKo3TUHmxKr~*x;u=`L}qEf;~K ziWS*Bs!(E5?a+=fGiKA>_RBB|A!Sv6MT|Rn*>8VYwh3klPg5H}Tse}VA;mmPK@?&m zjb@0oy=o_%+|0-5ocx`Vcah2jd30UyQMHXQ*3p@|!;ar125cKP>(vcCp2065KhfLTGBPNXXKwA~zPKOov@S^SBV9G|WN-E|+b9 z)=hU2`-B$GY9KY z+24tX778>zFw~g+NEi11Gbi14(P85_(zW*B!)J7R#B9hll^dNbVMZp)Lbm7tQ8%Mi zNp75*GY^zqs>YU=Hbfu7hw7kxO{iudtXDv{#o~MKjz%T+Vcw+Ho!I6SVR?NuIz^)e z5Y)5mhr41*%{;cU;gaMgb1!9#qmtOG2f_iST`)?4f&>UD8Jwo`)2in8Nx~!fD=9LS zMN13YCMsHK3Z^3lrs!>JEu}@4M&{qe@>S&~GnN4(8w0`^Ii5jy0_1Lj!nkt!GfAi?O%X48WM$&GX!|@Qx&NnPOue%h3>w3WOBN{wBs!wLu1NPI*?Z!I zBJxG_YWT!VGe)6Y2RLVt`9(oZxn>(#w`5ob_6p@fOlz_2=Be>4urJ^;IX=yTl-eyD zL6c32=BwaJ==V=4)}n>5=*6vrg5X36=5fU&Ta+%O;B;90wp+^;_VzSsPhI8NV~#j7Ql zHxB;NKYJnpO2F=D0w&30E2u%6wS&VKXZr8Nt1Sx1WI5FGz2y;+lA@H!i@+K$jeTxp zA`-5W=$9y;dvG$!i_xP@NVhLBuJ7AlT!EM^mCXDA5653*61qbxAvH%VJ0(@G8&}yl zJ)`IZyG!9idS4taLXBl?RS=gbRdXQjD|xUklVB)_pU=6C z#r1qb>B3iZwXle$9=n~Oz7Fe&k)?Y!63krY?+*f?tI|btf8hC(4_>R4tdyS?ipihj zhHu7Bupw8hP{sRMzPeq)EF=JQUU)7{W{`X!?;S-gRekZ?O$|< zu5J{a76;V`FcP+pm?)Cx3uV1 z!V%h7U!q=gSdWm-^CV~Q{)?LXa^ASy?LZ_bD{5Y;zLIt>bZ@*zw5F`9Qe^9)<%O4B zg^?bFD#Q;?UyR2is4kmTMQqH&5beN{kK9kpKObQDFtwb$4DXEFkiEcP zaQR*yN3IqJy+v@Rvk2nw4$@cUnAW8ih}m8e%usv2aUMK?-j+m&N1DmL5k$$z^h8brJ@!DDn?M5Hu?%gT7tMZIj{{Nk+JMh29;OHpcGMc zuDq%2rOe9X0|PAj>%m}`N186We<;)ywVuQ2L<0sz*DdWE0~I83ssNey!P`7@0;ug! zS$YGcjqyv-Rhf?#(Oc|MVr;&1$p&PvC{(hPJsc7du=rjwcS6SZ1YL_pgHTCP`_|<5 zrQf)h)#sx^njw~2XjLAr4}omKBPGUogl95+ecR~%$qqvyfOCFJ_{~@wi4u3zpW;a~ zk=keFT!q5|VWfIgKRT3y*NH3Ekd&>nhtuweb5~U(5QCvA;b_&M*5+$jv6&8SATu|1PEn>>HMZa37 zxWI?4czY(7UHV@cCZzW9nfB$MH==`EIG9-99Y@tGoSf-CS7imfO5&nQWM5S2rI`nfMA9q!S0p8yocZ>k309?alpHX_8&p_l`?womPB+ z(y(<OwF(CbJ|?P5Qf{YlO*w6wPc`?=8}`DoehLWhraryG1} z>qiqd(%gCQU`!Hwr~QryM?>AYu-Eb$vP+ZDSMBIGVEkR*v4~sN>eP3A}d>x z1co$$cWosclSsE@NH~Q_j&;g(gGl4Y?@P%|Og)z^_1(+3zV1}@%>+az_&xF(F=*wo z+Je!YdqOnSk`}=PhQRHt6GqUwhI?5Mg|l9yug^HK@?H;zVzx&Swo+ z_25Y%`r^r|uh)b))BQ?G8E{C@b+?EN{d;n>+;W5x$8eP2q5Pgt&rFpldIcve6J~!m z|6X}2(+?jY+97|@3X`Hdm?f6LjFyEy_P}C8z0H@kKH_3BNdOpv6#H?CL(@={U17`g zMu$=vc4Ue9Iq`F=d30bP(`9WW^}qlETG(SY@MzuFRbc1%qquwUxzxxc`LTK2nYL6NSSX4_KMQcxWc^R78uU@xElw|nE(JMpB!!B$k}^VRQH=u1L@`na-m zPtG1r3^7F@)!^;06r>;C=8na~5lsHWGwzPu>}JHBi;Pc&(k_)aZn1iZcdnokbH?zh z{lU%^dsP{6Oov15w-D3mW9dPmd69E5a>9c6k2U^?DnN-O(3!?ry|vGC+Qyc8A0v4@pYTO*B?~c zH_F6k`$^ovH>+$}+&6}6byH_^U%Yz$<75%uBrXFNt4AE+KNHiNTh88 zw|UGc8`4X=s1XtB=SpACczr3(!h$-YnGp4~6$AzEd|)~zp@S(EZZOPAsBcb1TzOFo zN->BiG_xF$L#d4pKSU1U9f&@f%&O{t4RIYs{ILsRR*_%3UW{UGd$~5)D@Z3aGO!|P zIXWmRgoLK%oe#281(5anI|KZ$*JiHf8J-;TKZO=+3#qvLgm&&A=DwYWd)_?`Jy;GX zl8>1)60u&|GG$rNJ4DQyU_gxyrF$*kU1hBVq z)heuk$MvC`ZtBi@@-1*+LC*zn)u0-TdyevLB#!;gGp< zFRChh?}kANDFw60f(V^R5S|f^b6ioq(Ke8BBKc!5GvA_%3m3^wQZUAW>_9w$aAT)s z8A1Ak&Rr;sJmnPn&v#OeN)cA^IH)`b1cSq zJ8{v^>AS69*0uY>jv9*axMIdNdm3=3ma2UyG~&yo9^YF3f(XVgP3R#1>IoJK_@E z7-mX&BlDC8i+%Jeo{FdG_<`ilCMy=Pp{1adY&jk=lDVGClau@q*b+G$xW-r$%I`$q z&Is%KE1)iIku<6ac|(aQpbUkcDK9$Kh1cE>NH~2cWfdMgTPczfK}m3Z2O7zbHHu|2 zqK`wXZzIQPiy&b`jSFOe@PXXk80gY~xY222!&IfaZrIP+`t72juunP!`PS&|$OYfl zEL~!m8PJ8aWLRz2oq0F8$5=i8IKJnd=Ur^5KUglz;Y}!(%Ytkdq~2ra!!q{gY+*r1tMH})6d2RQ$i!J>zs3-Nn*?R+~?m9>3e z*t&?f-sT=3uHO^wrSfeCP461}KpuR!d<9U^xR+_x#E*=Da60%mhC3YQ2I<=^<5%Dc zvaA5!vvo1LGVil_4HkqCaHWMcmPMhT8TmoFpUnXtu$SR0$;=<<4z|ZtI0fTR9Vm14 z!yU3r%1P*b;+QX^M%3()U;$x}p`gq?E?H1_IBaRc_k_;#el+4kJCbSAcaEa$!6}W< z>){ea;nxf8b>FR8$E9kttKn#e0_uA>%rl*!;Ym+hoesn=iB)+$r^>=N%hAxQO1`VX zq~?b+8NxI>ff(sLKMb^s9wLu*?{}NN2eLoXN(T;F7#GIbeRf2i&HLD|C&KgkMB-nN z?(GGFJNd|mMeXo;5U~Y56a9A4*>FWy#AO=$F1>vduy#P&i_!Ra6vIbZRogVv3sB*NGwS9OV?EZzqCGdD_Y0H`X$yR21bRaV2BR}BP zJh(Fs1pLIl#6xVymIM$hfNGQd$hCS;(#+X2u!vtSVJVbr(+r!=@O>dA1^6Kpa`1~A5Sk|qZj zNeiUUPw}3aDc-9d+>dd1^-#sc0cSFe>6hCG;HbFuf z2>D2xIM1e4jlMLKWMx%*id7<&ufnYkFc_I**8ND-+mmp{iCiAcZk88GME^2$xtPTK zdGh7vQ8T zt8M$E7Y@igBB(Ag;cO6|SuY{dn1)sWuqR<#m%K1ObYUUn_f{P#B|``P^g~s|D!9qR z)Iy+V?d-kW<2{8z@y^}thli@wxW7hBd=>9HSihm1xe9|ZRj9%A|9Cq3U?~WD-H4tz z*WD$~*yXS$-Y^xZffQlDXJ3NMY?3WW7JCzHBRT3K&OtxQurx_Ky0Tx#&YQ1}BK93# z@Eha0y6&$tPQTTcc8TuU22HRw!x^Xoh?lk;3D|O62-v#zopl|r%|IFQS6N#<=*@FA z*z)0NOeztfkshnHcpR!|yu^0SBR5Z;S5mjHK9l#*gNwmeL3fhqxq3(-i_ zyPR>uRmr}CfvT^6s;lWKlO05e7O+5SRqP&CTy(*IwxduqAv!fu~(J&b+R4|#^&7jb6&37^vQK|nWPtJZ0&F#dYH!_V_( z>Wkx(U;JJWGUf2Q`^k~DT9Md_B(;o5QZvT0aQ2>fgUwqIW$&fcde=72dV?|9VXa7D zwOWgtTC?BeV_EzY*!bFu0p}t$xzQEcD}f(i>j`D2#4TgxfZxULfHop)zbtQ&_sva< z;@2acKK#vvU|Byf9u*fWupr{6(!sj=A!SXJ9kJLAH*(nN8J|7QsWX?4vrklF{%YaQ z5u;pLH@RB@ZU{qBR(V`;xnRqdO4(85!?>C>M|!5Pj09OHugqQkeaEla(TOvo?Zi$} zH<^Z2@h>veP0OC1j9*8z4E8T`#-FvF>UkDwQ!Ag_nm;Menp+$UT`!g1ADdd>9a4 zD-BFz9Algpk`g8j&-$gu7U9~E_Pk-jF+!hMb4Ob}5#5H=4Q4s8(|28kBtS1AD^wyejfoR00}6%Q$ucw{3_G-A51E?! z_W#=Jl&|N-$IcN~g^j6o_4L)~(UPXvq!)Qnh-AM=Bw&xkhaJTfwpBS|to2IpElnq7 zTqrb6*Ia`?P7?Rl)ZjO*?8%ib$;5flx)a!n(*~6l<{2%(nsphXnzzPYI*2~Dc#O35 zO;<0Z0`>|*T0i(Os_CKvb-Secla#^mOll-0XG)kkfNNh>UxJnA9U}{{UsfGX*$g4q zxO{|4jdCImAw57_1wcDs7u$Dv95Vgc5o{op4mUv!Mv97Lm}5Z%CX zbgC3!*k|mP%Bdkcb1FIb)%7BDf5qT6E27d-JNE=navB;L;pv4wKR29NJzH*gH$K@d zg@pSA!<2m1dpSm?Y#fT9JYc*M;X4`!Y8iOr|yaPz2PIVAv>(@2!lx<>{^jq znmDTE7(D~uu>E&yb;j2;&v#=6+t=ZggZ;>qgL?78K?1)o2i8aYLv=3R-rM*1051X_ zfX_GO;nyd~?6hLPIhatn64Sp1eXC{J6Qmjv`Azv9!0cdB1R+PI&di$kc zp6C1~2PAOgfE%1;#}>}qtMGu50e?}s!8g>a6;SoW&UCh{FKw(GZzS!9FKcdS(oVo* z%ZGLP^CCyZx=L?PN-LGrPR~BL7lT2i(TU|lWboL4uG=T+)2&Q$?z+SG%+D5=H^$$N}`cyEtuZfZ{oy-Lqjw0 z)Y(}F9h9Wlk?Q`@y{VwRkzz{k{P@S|;}gVk%H4Lw4epfh65=k-1K=QPR`AYX8IU8E zWjUm#AOUDd@4C+S;YiC;F2sD`AL{;hPj&j7C`vZLOgRvP)M@a~LnryMQO84DI3JD= zMex1-JE#OCFHP*%x;F5Ks(^=f$Tl(~xMPR@gsO6|~bo!T9aQpAls9RbPkIN92f1Dki@*YOuC=4R=txd}l z9i%6wf^4y3L)N$vh&U%!%)pzG_}OO`1quqxs<%1ka%llX#y2rm^M<))>A5wj?a6~5!4jdLLA>Z9*%OB>9bw`*qn!>KpX(AyKX+q)KdK0GX zJvHijSa$KeiwyPL?Q8cuNXOb63;lgHS%kGSCQaGb)k!q#wH|+ZY*^EIkK=!Yv;J~b z~$zmpz6HNyRc^?MFl73aG9*1$u!L3gx(e2cM* zjSP;CKMBzCgtiO}OjGjwvlR*r7HO1d=$@oNhCj?;s?v?gJbic9e3z^wJl-rsHeSV8 zGTZ3=Nu{8H!IIQYMD2xFZRsS@KqbCAd@nH}ZQ2_@{gk@QMtN;sE}_&$X=2Qk8J(BU z1%y($CZTMph9WU42?QjCWfcR7gyV0 zF5g8k@y6C5&Oe`q^HT>tPkvh%+|8eGWE|w0c7M_|1|&EJizG+fVHTG9U~kmJo8c;E zibx{Gd7kj6*p#9?m}?>m3JS$CNAU*N^6~?^Eh6kIiNY{DI2G8nb#yIxVM_ZbMX=@` zx>|ru60_2e&%0)^qX)#K;aCcH*c~$TmCQGe_uEzSbt7L6Q z!q71mxmxgb>f3*Wv5(s>E7{XRbm~j`qkhJy$D|SvR*gIKpN2OitXP7OW`AaM?9}6Q zo`I_ZoQ>z0i|lnjL&DLIKo1`V`$2YwTmea2VXePU>o&Ig0IA63v4m=TovEX?Ei^d+ zM=hR8;Kz(5QVF{1ZDrok!hS{5{Z`z-PieX44XUYOR#<*`YB+`cFx?Dn3p9kWR)86F zs}+TLZQs_&2`fpBSdAB#-l7*50uUsK4|#8BX54@$)WvOScx_>We6`zw_fV>n`~5wi zXhd{vW;Anc7vUwVH;LC+c)i`mlPmktUUfQEKgQBl6qWCrukKajgbat~?u8H)*hrs8 z*SUZQFkxO)t&STyXqJ9z12OW5;g%%lFx?J~4i@iMXi$fRAmWYt2tuK_J<5b@#C^)a z?@5U*^d~7>b16`n2Mo+I&U*EIIE6rWrvqO;{mDUvmsbAqFBQtTMI%ZjZja0Vbkw)S zrzB3=pIkQo;K))7p9)Ihx`#_5Js-bCZC({GZb-0>Eh_VP$IPY9ZzL3HckY+bXi3KA z_kgkfc!l=xQxENW?TNCVqID};Abl$$%ONW~%f6Q&URY}6=5(ZfyXSq|dCS_>_PhA) z>Bsx+7M&xLO^W;N*Qd)7lX#IZWU3BnfhFgAJHDOG$JU+APXC}MLeaRV3qO?KM4R!^ zxvy}1T^*D{a%baGQQ~B&92@1TnBAiU_d%4fknSrLjex9U%$R(3;ULD13u-{stYE~R z9ZrILg4x%;#1eb6V;isqAE}lqkbUi|BF{cB&>OjcM^b6YR5|dkqc7^bbK_2Qs8O8` zfw9$z%7Oy%TnTToA-eBJut`gznhYX@LbhB3NSNuVQsR+lr9GIMqOQIzsZz+rY4V;T zIw4}xm4)Hl2l;Pm=;*8gF zi!3j;TR2$aDBGGuh>fR?KX{YHf`oBd7l`c_Q-7rCZsD2dYI_f-)Nzs5EC1n0_lEXv zasVW!-`^=k+};g*2?pT)22XZl|DHW%;Pg6iH+3Z*@MmJ7tXbeG`Fv-^**RN5i=)$J z$&;1u)H!EbSEzU(nPrCWwyOW}*NF-`p(Q#gl!cyuvPvi{`6VCm3EWPfpg6|5bL7t1 z<@|8ZGKWJF>c0)ro1k8#nt`-Wqp4n^yH>F>zweBDvNUDn2Gp5T1g)GdbQM@#JfSCL z;6*pAB`8ivY(&7>(97t02u1d4L=hf=p6~o0R;w8!<>9?$SWJrX1zgw>uX!d~=?O{H zuVwX_MQb#G7KoO+mn{w4IYG&YKLJhH8Nb?$N=JV3HI5$ZDo?xheq9P{+m~a~3y_r{P}t!p)t=QK%xuG zKhJsslS5OV$kr|-mC;tAYHo;&DdwfleOY1Oy*}#1CQVbSWiVV_)N7NMCahFb4yQWU zk4WA3My*{wVdS>?iTca-dtSXVIQ@?O?Zh{>9j4W|(#^ipAoTz#bUzEYml@uaHp zccQEDvcg!juohp3M1ZKA?vy!Q@|M&54L)byz5F*9z}7qDpvZ|G`Z?iVX_8~d%0-<% z*--r>RI`N$sK6Jrk?OAY_ZWRe)Sr(c$8V8UX!+ka6AJ&UDwxZZ;Bes3MZ#=8S@<)e z7f%$Eb^XySpzD4|?)mO#>(xA&!(KI=eBDFQH)xMFU4;xAmjU$c3Oj5V!pYA>WCsB* z)sMRV<-*sRE*}j|9Pl+5{npiiJE2+IFU`DYIJC-sbv@1l?K(5@{rgBtF6xBvXhz4l zW3k#Sh?}V{@Z4gyByPLugpE;+q_*f*P@;^L#S~0=kB|Dxbr~lw8W$nI+X2a_7aKLi zi)ql9z97Q~Vsuhchih!4FCSq;XzVn?I9SNpMzb-#ZoqX4W9PsKxB}S(fp$+qhelR! z@4#jlg*6+|{iqb7 zYQrE4?_2%w*|H2zmawB8puqJ1q&r32a{Zu-mf74|{)8ANRk*{RWJb--#3jQ|oH;65 z(FE$%?mygS70S&mZjR?e3%DeeIpBry3_{quj*ClfqmWH6q*EPQR3AWbpga&9-A|F}lOZ&}&0CJ8@-& zk(cH3ukzT&;4n%>tc#m%!IYS|C1Vjm9FV0aO`hC%ItUF@1nP$A9-Dp}Y~hCQz98=S z&`kG?n96H{sGtV;X4?q9u;692Ex}?em|q`S+FjAoPWqH33VZS(+^wb5i<)3Fh>&M* zBh@tUX07S9#iVRIHy4(r&I))TKih0Wy?nlLTK9a#D(i6Q|F$$a5-e>ncwJ>}hAYQ_ zqiu01K@?e$8>lMpp>lHCNyeB3fRW_o2RJS{~oiEU$JMn@9>^#>{Vgag-VXtmZo@$B1-F>Bh65p>-i z>Dq1=$(-&tesc!A`mTFV2v7Fz!LPdxY=H8794~X?cY@x>8~0J5ao(5cIG(!k?T*{j z_F?dC!JaNN!hP&JDdN{9oV~U&o;UX7uak+Ej9=<8Kiag%@@58n2(A;6p^oYMl=Knj zO4s%s$x9jHy#WawiII>T_Q#$N!hU#;I2?W(3;BTH*x(w)t>{S&v4+)WnHraE$>#Uf zlSYjmsB9JLq;$*sgVoIFwJ!LA>ezM^m>@HJ+QwpB!T>mJ1`0Ha$m~)gsZ7-ybqypV9TOnOk51}Z@)2em1I>Dlu*CARdlr%`#%_x533xI z@Fz~*AMsX6@?QS%lx;5X_H8e0>-VD$SKlRO3}4p`wyUM`fIFV>s5cd}KWa+wl!_Kg zq&xM(r=;CY)^=#iE;;fm76aMbd-hwit7;uQX!OW!MaIHDotM@nCf_y+eBf04oM}iV z|GA&QTt}u(B!)M$kSPi(RuBB_F@uTF2Iq>T$ zzo-!>ul5n&fki9k$2tpwyO7+tvl28LzEM5&>nhjTMmIrT_cd->?<4LRh23$*xg^p1 z7IcYwT#2rWl_0Jb>LIGr(P{Doc~(;14WsYGLT*CkU3im{_l6AThU^wt&&3qPU};6FMr zG#h%@z_I$W5&gA}B+^&_38!%)Mo5cx<_&Jf?Z@!P#Bq=9Ll~dmY%MO|IE<}SU&xGc zqjTGOqyW%|YB zsljZxsF9=Xa0rL##m>Jjxn+k=zJ(Z$2#!8Gv&Oob<_N&dD+C&I?fZG7?BS(mKK|OT za3}1HM%6aA=I!)0Iuh)SggzsQfuHSRwK`?_zsg}62OisxFGHR?hIF|b>M>gv)x#zy z)@P>9qY*jg%~UQ+-*$U9?gpO#j(rEMyK%_5eL=-EmKcgq88*U-25UVr=RcovaTw>n6efe_&v~g0 zPt;_jYP9eCWLZMwJfYd{y)n^mz49zU`X6fiE2cSz&umf8>|K*A<1|l==*E6zhSilV z2mjQ2CsTdWcZbgtbsKU_4!3yVQ`c;VLdLT9P|CNsy|@+-`*h(&h-M#vk9H&)*S@3| zf6CsA;KJ5}y`<+Ra5&W)8@I22kgycoc{#HF??|)TgxGmWg+2DjyDtS!r5`vGm5L07|xH`A+fwn z-r8Hm+d?X|!bBEwCtC)B!BiAab7f|ZX9OY+)ctc%#8D5B&h)C$)8)xB{QIocdMWO2~ zqRrtb^|gAx2~N{*ngtbIc#rsbsm%(<)a@j`?v^OOvNA8%;>knD&w}I_?t@Q4R%wU^ z6uC7=@*CZgg@;qo%tN8J7q6-UAFh86?#5<=3hFkD2jSU=pk?ucLZKXetN$*EB9
QB7&=hUsI3p|x|`wQ{)W=D|y!*7N4TK@}wK!Cqy4XD9~ zAH9dyUU?p$kyM0O4t}u#`AK=OurJigA*UXS<{tJ--z>3&hv8t~`?#$lVBOp=8E|9Z zz6i0%1g$bbq|Y%xx5^qJ78zsHUlL0J+eIb<&P^^rW#A_<@D7v|rlFK=^;%pVb~Jj>Ok!!LYmvjw0lF5KiS_rVCKeCnkb_KUBcM77RzfUp z5=#R&W@Sznj@A&!n7nPYU|G3^C@wBUZf-X63Ja9utl0_is4mDuR$4mt9!oW=z^7r@7#t6g8W_wflxy4KNb8feSm}|_evnSNa8q2R8r8LOwvq(?81G8xL|oA z9!~DUyC)2IaAiKOT3>{P`k@Y5gu2;cdC&%@uG zcOHK5x98#V^Zyr87&B+jw@4*>q!a@CaBv@av;G-*hz$DT5=QJpM=beEElAD zg@Bclnc^fFBo#S<@8No+c!gMeXAp~!%52P>Ix#;%0ue~hp;Pa|w!9XcXmF!SJ%mctAR3vARRq*+ znP$XQMX=8@f-B$Kgex9=4tL)BBp$qNKJL4DF7CYH7ThxD8eDV9<+y&%RhWCrt+@M6 zI>LE(;kH}my#88TbLAZT{EEwP?M*k(<=m~r zo%cS08y|WJfBEYr_{Y~);?tCN)LMWRakms_Ub;v*zoKW`83_{KmRKTk;yEg0J&BmK zGgYvSpdi;x$V809p4mqNMp*iUc^>jJxPA$%iH@BBZKC)|PG`-QRw7DQ5$FlS>axIS z(xSb!0d-XsNJ~n_#*Le?=JPM`>5BDu@wNBx*fX!7q06k?O|WNd1_M*T;Pgqxv~p9w zVUoy*Jf8tZ`OlQhv`%1YsPDkbFTRDxp7;&keeXl8TDbvhR%}4r!FW^_RidG$0S1FX zIe+8tj1_7S`Us63gijf|1V? zKNvD$Yq)1x85(bsDXR#UGFwQ8kD}Q&jS@P16)|p*8*cIWktainyTT;cY#cv+9BIkN zQCU`iwCpUb-@FN1wysBEQ5M=-s!>^yN0P}vVp1IP6OSNi-!^O@`NSViL=7E*%)IP& z#^7;Muv0kOs0!??MJM|upj;q4jW99JM^R>x+K_XN#1NgIVvBuAbEORUF|mJ>*uT#l zYeuFv0u?`4R@};MFrr0mLrP9DPMkP~gv8?{#70y!wjnJi3pGs*DCasBC$?Zmhabls z{rDue9y`msP-l_BJJTeUK02cSjQS3wrya-8WG|-3D$=*#>H^7VZ=XUeUixR{%6kI2 zsCzjcFT_&K9bKN;jzd*;nE1Ry>!q?OM@eZBQqz)gf~0cfcpTOBLDUu%FkxzuoKuc! z?$D}yJ=PXm(avPcHjm<9g$0!a)_Ttj8d)4|0pLW59t~_P7ZD~vHxiaH=p+Z3M9mf; z_%L~d>`s%*nZ$CMT)vJ}CRZN}&OtQM(WUxkaL=B6+`79QTbUdsOq{om>v7G- zQmmw-=rRrjnssl(fjNq=#MfmP#rTB-H6`1oy z9k#cOqmRGq_lzl|@^6U6Ns^EeYMwzlF~SD;~ z3MwPfj1DR^eH2YBGS&eM{9F_BE02!zgI$$ad!h>~>zue~(P~_>@YlGFB=Nwl^KkD? zb8-LNJ8{>Ix8k;IZ^Z34+=M%Czk?)l7v{~o6Sq-K&zpNc?w8m&j_)&W%M7F zvdcy%Y9EBv8bwxK1w~B*U1AK*pockOMcBD zLw-A4IyG8q+p#xOjaoAu69tElVGGP23KL?Hn|Ar+{3RW_%rD4hgNe1%#?Gu#`B2g6 zMLYAqfn;D73}ntHvR|J%SgR0=fpu9?+K%Q1ElR4}5SNmz+=AfXp?%mFmxzN2sfbHX zL_>Qks+bcWq;+CvXAoaBTd;8XcD%a%1Pa^Pf6SjhDX}z@SY%2UITRv*tW3Ki#6niD zWYT_;-G=>DHs$1LBX>HT#F3F*h(pH`ah%MaoLPwYgNK#dhpM{tC~Z`snu-5ujtZ-C zG-w;8k~fcIceP7#2-RGV9PewR4BDC3g$i|ugg_M~1tiHq5Y)SAQ~fNQKY&=|^)pGu zAw|W{OBlmpXna1X-7&NnyK%JDquk4*jqBc#=0E~>khz3U$?Az}sw4tjtK3~J79}|N zm1E@+az4oB8C6uioVT!uwe|K<5k}x~43P+F|5^0Ow7+-nuEAV7hl5l`WlWkyM^w0C zO+J?Esg6v8EN&~V{_rTyyX$rQ=*PFZpZTdqM#j%VsxNqD?Cta7DPSNeBMQ1`QLDKQa;Ya2C z)@fpqxx8j(BYZmeT3GI@B84m$_fa4)>@w7x;f=_!*@-V-cXTty7#0?qjeQK0so-EDL!cVh0mdvM#l`*8Ce_u=~6?#G??KaJZL zJjUnuV(#7dOH{OF#i@b@n*#lO70 z3M;eQQDdD%E%Tt==!IVEgu@nsfw?F9^=*korqc2D5Gd*B{cLxQZ3xx6UgQ~vv7=Cj zePtFTwT6*F7i^^hmA()#_4bJ4A7gF~Ge_y5j3n!#T4WWL(Y2Ie=l;C}qP>Vax*zcb zq~s$95w~|YHm+QWW$(U^H(y_b7oU3(Z@lszjvY)!Rb>-us+-Z$+=12(6>1xs(9qI~ z#@048wzs3HqYL$nMwJd##FOnu6Y#`~ujA=oJ;!yug=OzA!REDVkZ~dom4&&eD5ToY z&Y;phfrOMy&^SJ|q2(ZoM=!Dd_%!$x+d`YF_Nmv2IJsK>|$H)>4+i} z4Pj=S05vv@k)DWh$4zCKnZQ6#h-5=1pB_P9e-vZmL+JH0DW`{s#-mVatyp%T6cx^s z?6-a;>~eh!Yf+irg#yk`LXnGUy>#g^YPR0chpaXqQd@n<=m;ZE(}$xaW|XNypy@;k zYvZwljYy&J(y;Eb^IDOU--_eewK$ksin#O~?2AvvntjRmZ2K{6KbD3nI!$pbZ^hSR zN2?ogmMA_-E5pIcF0{+#2&^?PEs|T>$IwNi5Rc)BK4n6eZ%-^er-?-xK(4+gcoSq~ z;z+k|Qn|(J^4ty_u6M&mGHBO@l?#{(ORABTTg+swLMan2Ga(r{$!Tb8XhTtbC+cZA zS2FRpl-re?;>ZP+`|Ex9G_@U@N^B@5Fl1RzBCf`P7AC(Ohxd^ryaYQT785PMLlo*a z918n7Qjyu2<-3Mp5E`$SY9N4$HaE%5gi3A;MG00O>{Q65nu_zYq*juS8(ma)by^3^ zQL&uvZzL9j)=vk(;w7mxQAsC}I2Y`xrDN&9R{joGkLPza;j-1a_)G_MGJ#5JZMbsT zVVrl(9=^U&-OHzdH}PDSNPF(Qom+?|v8m^u3?p z;)|}wZCB367oY7$O{p4nOv2roNu0m2a+X+jn(#k2bz*4?5McW{Np>n)Fck%Zk!@m? z^D3u^#p08>#76$F6N`%g=-}tQRBTdUGGha=1ms^OoOFvqEDo;Q$JcAk(^!?P#%~VQ z;^Pu0TG-z0%#|ZfVBYF9+_+>nE`9c0%q6J^8QgIT$>OGaaQn@7lT_~F>v!Y!I~L&9 zI~L-mx%cAbw?4+=kJjPYm*2zud!N9a_dbmI3+~1BH(ifwue+MAW*)zDm*Q^jpqshs z_6Km`gU{e6@2$blKiq^>xt*xBO`+B(_t9}ftG2^tVWG+~^M40oaYaWFBH)GS@_N}G zZmLX`?g7OVf|I0u{6@P@79;((a|u>4x4Jh27EzZC3y~J@db&9U1v0 z*syIo9(m$1{OVUv;Ku8(#Ld^t!9#b=!*g;C&;9q~k$dmQhaW6Oc6v5RB?)<%rKqoK zM`L|ET3fo%)~QBST|Fx6>KOH?ZEi+GTL)@eJ5b%)iQ@Ve97@ZZhabi-pLqdaY}Y=O-yd zA@>$>`)7$oj!X!-1Y>l@axvsL5KG_CltM1PfoWKXWqaye_@dZ^Mv4~oGy$Cm`euA5 zGMe=Yv23b!V||q!c9$Kopbs-6gP0totD-xT``36~vo0nQaKh&@Bi0>MT+F20ENFzz z&ErIMT`N91RE}~7UHUf=i_HIK_sk%t&W=0^#YSRA7X_4@>nSq~Bd(|mI`(-s#rcy* zMEpk4#_uMl)gdjj9_eN6NH1?kR%sPd*tZ8VDzNcTI(8mUM_HR5g{-I7kJeysryteC z&M#S9PJhunI-lB}h!lR(7h0jk7eX4abWOpixlNXRdYt>#{W1RpV8rp~#_P zNNBR7gM<)@(USSY@Oh&M5U|a`ld!Wv72;qr36Xr&$@?=&MIn|mNJT>H>4lc+ypx1c z-WJ4~k}kyQ`Vg-j!E$cPrZOiIbYpmVe<3zhXwhaFQOLzgHPoQ(^He+Vi(U12V7C_g>0a_lj;|iB$JJkCW4V!^QTvf! zp~h7o9>RIIK8Jt#;Z3;o!fSBRk4Y?l`5pY@|NL`&_rINo@BQ_kBjv~*tfcC@>~Fq@ zAOGYMTzvU;xcr(M@X4xmD6VWob-e*Qo4axGiURz%t$O^~79GC3u?fqX*pJ*Mvyp(} z3`6gVz~qX;O0bc(Q7(?80<@DfW+$PPLt!I)O)f|!!La|GGGaxEQGz0suQ*8(i*nMD z`p<(z+RP1+xLp=-@pxhoc){Q{VARmX| zr>OC;-+iJ?f-~SA5yzg1Ov*sW^ z*`A1J7O%q%_dSD~7Cwo&_dkJ~?^=ktcio3O<~@k{b05LH+aJdL_xuL8KJ;7M_UwDO z|MPu#aP0wX&S*g^9gAAu&*G#iHiTifQ*_8EM7HU-K6xJ=hO>8q{X;PAm5C5%ufncm zEv_!mp_nyNOTbK^SdsVq-P8PyG3M_G%yc^jqG^|g+eKI1s`I0wMUNdvlkn7UU&gC% zzOCF2c+2{Y*tuadj_lrt!@Krk_m*uquy-FaQqvH>{}7Ju+K0p=aX5D101ockjYIo) zVb``Vuz%-P?A^KvN9lCp4<5vkeFw02FTc-qY}~#Bt2b`J=I#5ja@803_~VbUYsVHG z+`AR4KKlSm-g^s+UVjr${PIP-@aji67*~vndMlbcJkS~fFzCej1z>Yfu~W6#-7!WF z3^uke^Vi=kGd3_cxvvt^u3qMikL~5>eg_ER0fM>H$NCI0_xTw;F=tn66rbknmC>3q zapZB<>#OnY%H*D%6u_TVIPh_)6%MBfYi2*v87%JP;c>h=>QpgT=FKf=%0}Ji8HORUX2g;fX$#7}k4BW117@gBd zth7=jc#u!bXrfW-oS{oG&mgf(4Fmf%i?2O(v>C~o7@CMr#}mp)EDdNjMwF;%R->qv zE~eg$-N_Z$us<1zg^kEze!Lo2g(Jjm1IbDwgOFTf@Y~sLmRX!|IVir3YGQhVG9Uvd zNh@;VUfAVpmOqeK)C7kCf`+&i?)VwRQrrV9POig_GP824&XPJCZ8Q@uxd2)DwJ5LC zpr+XfyBrtQSaB>a6{~j~Rz@Ryny<$8xLWuE~zNQa*9+W)UIw4%P@&$00s3fynZAf?e@9f5v3m#Qs&fKSP)x2Ngn)y%R+B=`*<72pb9^ae)IIg_&Da?QBEj;z+ zYTWh9w{h_;58?W|AH!Xb{0etI@C)4g(Bru8{->y{pT>eaAIHNFkW?Oi5jX$(9o+rt z4$S+Iz?spEb~+ZlnXc8wwv^jUxQD2CnU8dZ-0!lu=0@xfc~;-mMLVC84av3kWyY*@YuAHU1LKl}tAzV{y9ee-oJS^OrJ zyt4?aK3R(Q7QKp3m%N7+A1=ekOO|5s;>CEM4rS?QE3j()CTyY;S+{;WmMq~qmVbl; zdp09E;Sdr}9L1W?*WsDx7vZ(HR^s4sxvs@X2V_D^yN#~J3Y*mrt33p(BTP)19i1ri zTS?mmd#53HP5mZf2}EUHt{C*h2RFewi{fuZkqHUbQ8cg(_i3lFqRdAXKLH(G!KxY$ zKCQ4TbHt7GMd?I(5q3C;0UiwW4Pt6!2!q{W49i7DGvny(jVX7*47yDSxQv*X7(qp= z3a{+UMUs{{!P>Kku%q3!2K!la%yH&(lx|-}q&giFV5*}+*N?r#*u8Y1BDl*)ChLl9 zC|3oPb1X^h_s0)4Al=Z5W)jO05^-{R9U65Zw3=clZRkJ=9c2ZD>(Sgsd~qlZ2?h1Y zCuYBJs1#dEHE0jdK<}G?&&PTtvG^U#$v+jbgkwGE(wYbua$~RALt%2!oR6SlbB!vB z`-AjmY%ejR(G4W$w&UZKyRdcVainHdA}zO$TwXFw6If+OBY_kW@W_3g73L-#~(QDnPS9w7(gj5#!om+Eo z=e`DPq#6=pdFen6e)>rq7Pt1IRU1T3X(w)69*>_c+KTIMcobJ(elzCXd>8)Ve}0Fg z@@M$lKRXY9_ZR0OGyWjHc;!7@|J|SAqMu)dA74BNm)vv%-dnW-`IRK~dKGq62XOI{ zbe#7|9sc|3HvHZ4GQ3?v73J{3Xt2R#@W5#g!y%4^Np5pTNh}0EvFKD#(&tLQ^SLtl zWLScvBSA87l1PML+0Ug%WEUP^wiiz<;rnl`$20G)$D1E+!W+xJz;jF2 z;dws3#_zqkbT?jIeHd?SPQXVLC|hz{P}mVhjj9(NnqjDo%w;EYMFvfHhM2!}8+6t} z3NqoUPo^7TZpv#yG$DecLNxz|Y)GmSBxMO1RvQu^lHu4s5mwxH){)F;TtUIMwbDn| z?M88jOwkVvbe}}jPtXvzM4_OzOrXs)LRC9}j7mK|+n#{b{8J`^{d!>I2m!r z)3JBYQM~!a`}oBpPvf;$-@zx#KgV0|EyIx$C-C;tC3tJu60F*^0V_AI!|NoLH%TxD z_wK>Ek5^y|Kf87LIwbBshV`GU$NO)7gxx!jV8yDf_;k%~e7JHuUVmpPoylv;jlR+| zGjTLN0q=jb7Ee641nYL>VCm{aB0>Sp zvwc~M6gqNyVGA9twRYIq6jnlgYUk z8HVk38sT@F5$lVg#pcFuwq@X`rk4&Y1S5&j=!sE?_ENmD-njii?kI*iodaQ-*1jJ;8>##?R3ON`OU~ot3qOC71HwRXHQEM zlp&+I6(_Q4kdR)AywYX`k6t`nf?XwDXk$(q?LEqk;G7iC0XxOH%-%s_ky#Rw(vwIm zELgccu^b0G%dxQkBVv)^#&XSv%{ht+{?3xrCTz^ppoJUR#1_aZXhvC87aCg4sBADG zucQ^(DS0T)DMwLp9ZG4p%lW-G6Kb(9w*v-}iIEK>R}Js24=F>C_qF#SmjqMnlG!(> zSZpzZUkE|EfS{jD@0%vWpPVJSvxE?exD|OWC;2T7xpN=CZ;zq5-HPS8W~|7yU~RGn zYg1Hs^=Jh?$ZWy#)JA+n=kh^ZCEh<;h8GSN;x{{U@ZO#ZtcdTxTXD^JZf7a-JMGH- z9^A1R0>vo0XvwwQM)$xNGT3TX93~h!8%BcX3Sw?XC#&q1VyB0gSe;IT!awzQ5 z)hYO(b4WQ9mRr_^JHN6sumbo|0R~*X^|Mok$_QIdw(jR>f2ez)m)pxzC%Pzkj7hQD&755!@fAva|QzeS3+DMQjmJftj>hTw!xBnio$Z$ui*$=bai^1DN zQXxUwf-o^;u!azf+=}}5h($={4Ep3N?3Y{eMR)T7tfdy!sjfARp#FaH;eV!U0C)DAy6E#?!ScBz9O0Y7n9G|oA zm+mXX$H%I$>`*yAI$Vy=j+A4~kz#D28r*d(7hmj6#pd{YY)vS^UVdla@oMa)u!^s@ zA+0Nb40Q;#1comA6bqKl$})u(Iv16j07xRxF&E{AN^;oINn#P=5Q4E19OWWCA(MY~ zF(eIzSjJ8f%PhHA-TiR62N3a(66j`>0S-p)cL{4LkGXZUa~Ox(`cb75*G~87BCrxc zU2=|x;A^57R6C~7Y92ynl>sYuBqFV{6Z=z&u=PM9)^6I1&0F?k>*l@6kl@cg{Ty31 z@51^ow&B$`7vtHNU&cEml@C^Yf?vP<0)F+$k^Y^@eSDZ|O2D{pdrkdm~n_+ki#yeu~wb z;;`*tDc)ZhkJKVF>e!hY+W^#N<|u`b5Q~k(Vxn^qVzCKHGtY!fyle}H1MM-qomh`G)dn1~^kH$j3U8-$pv)QqIT$Ny-FPQg z!}hbGHyj|T*b#Mm(9<)3ak(OWY#ihLeHe%Y(Hms_8w?1C!wCEBN(ixZd4hQ5KoJtn z%-e4umOk!-);@_+l3kW%3~4f;Ks}6iQq}myraaVY{ph0ml~G~8I#P$!E=4^55Fqn_UDb7U*MGk=(xD91how##jB3{dC!%RkS< zM=AoKrW^U?MiNUlu3B~k*IfGuuAOtEaxvaN|J`@++2WUBXe~ur+!mDO9>wyv-o;fv zx(t_G&d*$PI~FYb1(vVch}^-6~Rm5q44B*twWf>s}f z-9jRvOVU`QOza^7-XL@`mA*$@%OKnWa56bwun%_TfITuBPKHY!gCzYBNh8FfWgq!v zXfQ)Y?@9RB7K%e8ad=54w(coq27^xaO%q8!hhn6dKv?aXMjLIvhiY3cc1s?9 zu`&@)uS>^E+Y9l=wp@I)w-Dr1|^ga>}(Z z*d=^jrY{*mli7&S8!RB2@v2kZ2*6qx~CtsxDF0+>;98(S@=^b<~%qzJ^y(!FnVt(txGib8*!9f8-$bykB%}Y@e>Zhyc+9FomjsXD}0wnIyo{aJ+-?`Czv=kp;JmYZYQ zN$Mn#o*@kMk7A^603*G<=nIl`=w>WN6Z*P)&>QuWSe%f_H{0Doys*Cr2UM&*D{)c| zmoxF@mK6%IumVmsAD8$rV499M|NLIt5WdZ5yKs3sx`vAAS-pv6y>FoKpT;N7HVtRXct1yrb#)PiSk~9~;9yG+s+`iew6iP(xp>d-8G(hbNt`}!@^zuO6ekl$PUsUj z<#3pskCEr%SU#zBAdx^MlWDFwR*vsovk-srgG=#~AI-tfesUEq{OPqyeE*8u@fYXc zfU6&P4f{&1NMez$ZjpO3XrU$OYF#~w0@X9*4v@8VIxKx>HL5b|;nzfAwG5$wq>?~o zcq_?Fh-D)SK8?ik!k!jfydn!9tC>9dUgVV0g9q-s z9rZC3bAzJ zytR7#)rtnZUL56i4nm^~LCYdFkXUrwW-Z&Piy}bp?Nt=Bfhx_#^7tExh3y`qOYyTPWptO7&&?#6P70J#gCB3k)#5;B53;&q$gHM~H&Mm2KU5@) z8j|y_k`Am)sKB903sRf?bhw=;*U@EBI2Codu_d(vhs!&0tX6{q6&*N8ZpI)>Fro!FFS#CzK+u{+0w?5-dVm1*(F+C)4?GI{WmgLrb~QQZ5^Ry^?D z4lFrTftR-C;=xbjapiMsanI62c$O~m{&#lZsSkGJGm^?jn^W)?O^6e+7M#JL-s8M9Jg|NChh~?!ztf=r~Yx@uhcUrliI7|SI zuwP^-uEi(QyZ{>3k%sSAsUz5%T7#rA6_QHYQB-e4J=JYhy&k3I9mp?iKxS?glC#PX zmtKg2iP=a@EX2{HSvY(=8;6r}aWE+xd*d^(FD?zoNI=JqWg|Ym0Edp|VaNVV989ml z3O?Sy_;dVf^UINu$F?gdLtbeEg^>pPPgG;u(JE{{T#d?3iifT! zsylt?FbANgW3jsBE{L{+wAp36^@oRLrvmeMT`<+u~;k=Wmbh) zV!<$C(S8K{5kyHcBRxGB>5d`h^`Nh(7b8Q%{EQoZx0N*#K#RkN=XU2|XLH~iiA83t zpvHrV+jBw{#ilwp4jU*?=ro1+%rWi@$uEU?^z`8x9B;D0$b7IFBXHYT2R0Igk>Xyf zgI=v+&3h<%qY9}Q4NgVWFFIa<-Bl_yM=0b1v&5nznaFL;|764xjKnFR&qBD~AszNl)+N+JKDMkW?g199g=A)?3b&ku)=cNc_KDL^;I_}xlxtbGQ*p>}Li*}5o8sqaryfP zaNb>uF!zpMhT#qyztLwGMytNh99K>xI@jhE}Rn@;+J}lgb=O9Zb$T z5_r9T6uQVX6&{IzByN-GXz0jf)QT-UKw@D(@X^CZhs@st5W_R?Vs5QW10cc*Jqe?r_=Es&w zJ7_YXo&k>5`%zB$rXdKdi7!C~bD@=@L=LBR&;cH3zmv&^}Xj>3l^1HCNSdS0)=HtmFJFzWSgY|UbuN|nw{0|P` zt>cZ%OAnr2lZ0nJk0&{GVn=2h7G*c%#!nBDxJ<~@5QGkqxanw%Nq*&~KIBKKa@iMa zvTdkk`=)XmJ}oq&jBZM9%q3(Yx51T>OcDlyOb0uqUF(M06i^P8Nqi-_Fyx-@YLbv# zj2k6jiaIayOkt}H*kT19i=*?(x8g)s2pw+rAKj=sI7sI>K>!(2&XYl#h`EjQ}eH#MDMG-$iQvPH8@m`QLnx(JL66N$y>?qMGHD;FqtGG80y~0QEBMLmg9w}QG4L)m)kImD$d0m8-~4a0=>++0e&t+JA}n-uU}U<@mQV< zPh|)3d{zWyY!5TRePe?MALgs!^^ibD@xMW%Fd$&RxFXXgncvDk-E9w9-TXvV>Ew=!9qCpe?rXW3}5LPa%SQ{RH}s(Pp! zTHrNW;im=DvLUP4;cF_~__*ANJTmSv%K$zv(;>rq5-E<8h&K^vXiYy$RU^Bz4_&Sa z7)d5hvapbgMecz>b!#H~{vmPt+=@6AaWA5x2bd@-HgrmQ5q7NHhWB513m0EK2N%q_ z3>RN>34V0(k4Q8ZC~^K}7vit};k&r{{LAp_lP_cWsx8RLuO?ynVWtAf%c(?5qY-9y zW>Xt2x>Hmk5Fo(mI|k6)Nj1QIPGZ5&U7LYBcUEH)3qQpU{C0Pzk(QXO7M?@|uA6_Ch3INplA6hT#n z5o}Ls!He6{Q9!kxq3K4EX&Ae5yYRxwBiK#1vnk(z-)zajye0dwII$I*YyEhBa~2kD z&&JU*6Lx2J;Gv!Axb*EU_#{q)EFIUMtis|1w!J#6kjwgNHC{QAho#5qwAlX{+{Tad z^~j_0m3iTWROG%rGB2CB6(JX+++mbTQQni+l=upAQBLTyE#(f0GW&rLMuRzm9Tf)r zI;9H_9je7%?)M?KMGHU2?m@VZ&N3{Ai$N?$M>ae3jPR1Mk(CNMCQaMOwK8i6C1{H>ePG9Yu zpc@%SlP-u(GK@XY4TF;+M9xjnRa@CMmdGTG1Ys31=ypHYS8_R8 z*giqFh1|wh?uu&b9V4-f!|NJUW}{Fsj}EdX-{|O7h~?#~5qx2u9cd@Skyn;m@P1YY z%qBbf`uZ?BI*ReBN%Rd*z(vR6^?EVf(}$_SL5$M5MCoSwqTLu9psJV{K_5w|!R*3s z_Y~roj)LtQh(!+3g;^Wz(UVA22N6dFb;3N3J*|D%R2@JeUo&(6lDTb9$G0P)GsJxY z-O(tFx&Rv4549xfn$mJKRn0 zAoJL9f~*1l$c%DVy^m8g*j{HxH9IZa9LDziM%1#{vE#Y zW_82m^uca(lZ~B<`#4+3xfCH5xhas&6okg$M`>jT@`@T2$I@kJ$Ns~+@aZeB;`#d? z#1H=Id-%~0{sq@uHV4;TaV6&boNj@je(jZ4ZCNi0in!3B5V`m1hNCZYW4Km7pz{GGqV5B}zV;_v_a zdAQ*Fe~+uKz7#*Z=tBJLf~)Z_KfD49=RJOjui>!NKM*;wdl=(Y=%rE!qRqNUkDbw01xn zjKRltRJRTzq1=oLu0zjt>`1P{D_LE5`gje#C~;$Ji3iK6rW3lXFz92b<+?xImyP5m zC-Pc7D5kqPoZW(T2bi-Z27Hm(ju&_2;;BvPcrC65ZzVP2rM(4MmC=f0HCAj$t;aJ5 z%W(htJiNWJ5ufbU;*Gt{SewUfAW>E8`>;5x3X3!A@YbOYtjYCab)gr_^K8%&>HT&( zLOG62P!U2A!jSVR4uXo1NQfk?4Ez2)av`al3U7FdH9C#{*aU`pXW&;{C$NX2WnZMl>=7 zpJ$Mwj%3Ge)!PKzJurAE*a(CgXBbTu{vGL~xa>ilkwjtfDu=)wbQp3X*hbr6p&BsS z$IxLLLxp7sO>)VAvj=t=#K83iyaZE*kIqUCcL(UA93HtT8QY2O*~Itc7TX>fmfk-| z!O{)6u+YNol#!VxDs^%sbi|Gmbx!2dkrO(g<$mh<`ti~(bjiRY0~x?db7ROtEd=POU{kwT5{&fUuQLn&H;_ z;kB}Vm0PJtA$Ji?N>9c3DAnBzcXo>8An`TJA3!X$=0Yrf5{n#b|B_e;G$a;LLLVn~ zAig%F5Q~MbqPeLPX=!OlOiV;dN(ypva*%Z_9=q3VKxSel75<e28munpLNhn8 zvG*j_r&Z7@YmiT+S8SWYjsiWl=cs98Wz78q^j10f?|{SZQNn6>D}-^jkV9W4JCzm* z=Jd5ILM-XoRcKc`(a>ItoqM-n#p{c(=<%oUvmgHmKlOJUbtixuwWUD}t84RUy~6P^IR3hmm6J z#a4pifhrF+7dx@Lj;k-d4s)-)5%aFO5|1yKhez(b6*paR5nakZ;U_=)DK5D18iiOMxa%ow zSh)w~C7md(HDYH~5SJ`Y#$Uf%fxlZ?kMF-*fW@g!CQ2BM9d0@Yppq zG_v{kK7!!!_CD0wXOxNdm||%6Poaovu8T=1t~kXoie&8&%AGSHUMN>d8<{ihe#yIj zIzu4hl`HRu(ZX%^jRU#O4&*bpj&MJc^wT)rHiS%D3=O>#%%fhaun0=2po5?g}EuujrdPGd)F1Rv*Vv8~pLQm(JYJ5A!V<0#)t;_oKcoy5+J z2#&T+qJrDoLY1B0;=^8@4^?yu6u&syF@wFWql!x%3{o{y0t=YPokf)(xaw>Xbm%-v zXv{(7{ELvw@4A-LOb3$)iW{eZQWK=ad2Q3v(Y1|WIUVaqRS~4Ng<$oKAtr8} zzp0GiBVh=b$HL=?kVs@;j;z-koj|Zhrhb{C;~YdURc&AQNq%kuk!~3UD8v1`;pt)j zM~3MDW?+o;Ll^3SmZ2xX1O}(5wuj&_MiBFn(EKM6a!nJcC{);f#6N{tmXqJ`)6R~_tg~4E~DJ*p8ZNO`vu$X(dJS7{E!(} z9roeToGFxAhtb9LuB~?9qdYadjsQjm*fxU$7@87tIb*Wl8OGEUW=3d#CJDmw_ay0O zxF69d`^X!`o5!k|3z2Um7GHFX@O^=0F2UutiSfGpEGGZ_a8(D{(i0c>350 z4Gy(Opoy}5)iI=`R-vLskD~HcBpiuH(lLr(KF`moMoDH7{3QQk*55m6bx5euDuO0* z2C;bll*Hl-c0+5hL$17c$<*~S?39*G8H&opX=JB;d_t!HXB%5rLwj11SAwFX3?%P6 zg2VAeN;Hx^)oK>n-W25JH=u*--cVu2W=1PPLJns%5e*8ud`N4sP`z4^+TcXHX9{XL z4(y~|S8>q;@8hCJ zKf(XLXECmMeHT`id2zrngID5P5tr8l3pG)!rV*s;fV)4*!)+Vuu!#<4rw3TLzYI4l+k>5rPNcP1aJ)u?YhU;Re|N`gm^c4H zlFRM*(a&$eCD+`I#~ywHFFpSX9)9F$Ty@PYxco;yQ{sm|x`HHgCGNfJ3GCW>3{_=a zC@fZE8?E8@-burGt5i5|wHoIwEyZ&sVRYJKXs0!Z3jrUonqEuk#QJJC@~L*ExN4k( zXmwGY`ueG=sZ_l&7J4@oWe)-@!~k<3NR=I=nhX*+{DE=i3WMs=AL45St`G}7;GaZ{ ziEgrtg53w|4rMxuO8#!1{Ukj6J-Jh#oxoAq6;Tc!YKRUY{w=rgRrB*TB#jew-3l1V z=pHR!w^9JcHyLO1hQL?IcC6xe<2s_KW`9Udo#>1p$vB2&e*dKe4c;&C;H@+R4(le+ z$pVdU58_z!AlRMCsHr0D431T}5m)6<=BwMM^5faWDm-(d9&cq?5Kkdc%v>sHjvz$P zD`wv>&#b_nMmx&+n>7TULaOo2c^%3jl|tJf)-vZFkMF`8oxs!OBlvA`4BI*e(I{f4 zXG%G@CHKg2k-+R$y4}pfh>kI*O=^@>)I-O8mWzjn+$2sj+lk`J6O6zW4j|AIQ-*VU zWVBOoOgWL?LLg4<=*HfzDJ;!*;=^JOcBm(@GP4yeBof!aGzo!VE=rvw;bH&CB!_nP zotgc{RVkBJYFRHL0&HwYxgxv0cU-wZkeh+7ff<39*v70A+UN2>Y5sA2I%pZ*UUsVeZRNSeZe<%IGH1#G-@B5M8;yi=$^4 z_Sh7h{GLbFK{AR2PEx#Zy=*(D3rJ_MnGiT%3yB!gqLt9msd52BR2``RHaQq0##B z{^3%j>H1-CL}7Fh+lXBjlD^CUU||4=KzF}Cnc1!~Y@E7>4u1x@>M#>p;BT}8Tl3<#t2#GTav1nXuY!Zv*OJWIqNi2HWO0ChU5KE1-7l)|Q zS0^>#K!q1asMOXbYO%jGND%77dwWZf*%3n%iN(P6=T@3<_9 zPHd^MAg$GkM7GbZi+17%_q~VfuAhf1=G=szTyh&OzWOfQbLV|{^r6Q|IQQYw%dW*m z|MWv#_QUh>vkR}o#h2WK2kv)X>dil2TgSKga&-WDtVa%~GEn9>D1HKgaz79OKR(}CZli-BN%1|o6Dhk6@pMd;byhms5#@Rei{m7S zw^VC>ys@zW2TOcxYXX}%6ZZgCoXErH$yG=q@*d(!KWDqYxxWaR)^U`vT^AoJR)~e# z0dHs9vA%f(OY$5zq#Z{C0cbyk#c$SRlUxQA@?xDMv#l2^j#O|RgV@MidcRDE4V1j| zKhMGkIcygjiIMBmb0h4=D7Mo5Zm!TFo;E7aGlLAG?W*Kjlu`^Ob@=eau3~)BI)ZEV zs_{sE4?d?ueCA*cG8(jKrAn8!I9d@z4b_hvqBxv-0Fluk8r$j-pOlH?)QLKf6pFLN)A^{!!e(G#n%dx!A7O(1(-?C$buX$ZYbXmi@uzM42PRI#MH}%Z5tZ zsB%&~$cXa0Jp}b0l0t8c?xdGah{Ph-j@ZK_GOoXu>mA_Va$QD@fBSpsPW$-#gCQmC zBqJvy5*lT0bt~s8g25n(W#}u3CB*%b3qBnLVl&;GT}B(y={UH469KuAiKdO5L=Ii+ z*2Hqu7`u_(XhAy#lZ)-a<^od)`oIJUg@5<)_j|{bK^`lK%+D1Bl-SlBLMjDg3qLDE z-{YG-_#&ebo`4%;L;SIc5ljvDVPK*cLzDfOm>j|A;1I?JhLl5MgG1ezm>R(3Km;?x zY%Jz;XQvx)@6AU%U8F)RBAVsGP9YZ7&zZzxgP#bf7*RP0YmMN)1N;!?6uTHB_myY1B`94OW*i6Ed8jL1Dg zXsvy6yjP}Sn1)`aoOgG_cGn&c*|I#PyF~}kGA2N zMJw^r;`Mlb@kTuT_Imtk$u_+F`4POcBMmF!%kf24Bevu=p<3&Pkr}G9^ucHwf!RKZ zqB1+G=}*gBdeA_1+(r5KR; z<2+Qor>7?u*CL0-dI%zsFcl^rO`b_u`6#nsA1Py=@G+M~afBpa&0O2pY(aLb9abtz zQORZYVWjiHY?89yfBiSAbd@N6GL8^NUZ)esa ziFq1F0DJ0C6*jl^VHItTXPqMB?5b2#j55eC>vY~chpH0ITCfG|Gl1NX~N03K`+SlO6h5{Yx*amw@ zpt}h`W&DjjZT;BZ5JhbGBpu5jqLF^(>htdIK6J;36Ft4?9-U&o^upIYj{Y8gPQ-?v zZbYUo2}hOB_+xzt#ALoR)+GBxZoCy>{&dF%Ff=G+GolcSJ$6zF<@^r`)Fp@RBqR^L z5pFv%$rqu3p#X9Rpi%2!vDo1A1t@xg7#tjd$!LR<@7WwaxcFJC!;gVbFZu)B=;!wP zeNp6@#<7L&@}cLJV8c4XzkHch`b(w8wx0vbn0+C_197(Eca$@oRa*9m46gp6wGV?`DIn|)d zbU|E|*(F>8@(ej-C)a=(*mi9e<^i2;r(7C9VPYa~I=Rj&=ILt(N|Dg%gMoe8Qm;aN zWhy5R2Tf>-~g!g;?77ys=A%sxm5s!XhLcI)b%(4r6yhItuC< zQQp*!ZTpTQDXU1CZen?6BMz4t6k@RjrwCAEkbA((Fgc@)`mzhD&@Qr&%$|TkEJlwH zI!fFQ7m39Yfu3?hOKLA_bE4KcihUJktfD0>q5?hMK8&{y)?-g?6oo9xPYDI;8{h485oz z@HBI~8%*3TFI5$lpWebp_ep3Bqa+*9X#pK1lWP4*?9H|zNhSAQpT?Cd)A6^<<8e!> z77LE)apC*vxODL`tSBV`w)nA=O5}>?H{m;T7vZ|=Zo-@^uExa|U4=_8xd!vDxf&15 zy$$!>wEzp}--QLY&%+H@T!WuqdNZ!Q{vQ15S8rhF&O{WIb|@D}Zp=5~x@C#@?g#n! z?$Ugm|8Wl9$ugj(%c_ve8oIir*;cG9v}0qj1uIh;vAeK~&MSfrCY07o!W3fh#$Y9} z*!(>TSlFeYnF}7eO9^*?LO_CKq!0_;OMoGV!$P$3A+{9-uX5)+IkdCCP=)x8AXZZW zzQfWAN{VE^anqF7d|$4hj(&*!$V*gLVd)`}t@0i6I%K7fJBPESE1 zhm1to$>B1Ygi(lP4aq2nPNKwl5+5da;%Mg(ww5`OsUK0M$Vjd;<6wIave-{siX93F z?`9%=lGKQt&`GRowBl2$g0~9QSXS;t5exX^rlh{z$B>7lYZ=}brx z6c2J;MpwHX8kK_pPS@KwbR&EH-cOWj!Kg2ep=nFg*r6pb+9?zu$pWz z$TcE%3p|k^am4@~LD+2cz-sYPXgXoAn&B{75FyD~%|7H5bYKaEN{VVgAr_hM%uZ$P zB(comstn$cSuNj#`w-7AF8C{`Fi6pMe%D$5uELJk_-#k)DV(~*u@la7* zkL37FR8(~#rML;3v&*n8zY>SbE3r2N3D4edL9Uh$v++ax zJH&(t!AREDv#`}90+~6sj8d(^Hiq3fYP`KYk8Z+*SGE`6y@Vzl)efVSzwsemMtrjy zot`NeH7qKA-b&l4;%{hJ)S0;?#OfxLmDV6Tt5AuI>{3+Li~3iiq0@}AhIZ6-XpmQ4 zfsFhDRMfSjx?T-4m4x09f5Bl0_$3r>QJjM$M|`O1BN_}K;$d52XdPy_*jAVo*wa1Fv6pu1&Wy1h|l zxUI>>@9=kJz9@=fx<(U4f)-VpAkymWRQyw@V7@e4`v_{&s3+?;^9R)2_6l_r$BVQ$ z&bH5JbSpzkYrP}bFBf0d>5$8Hw35&oE&a;GekMw6gCnL44fZNSsrjD12Z{MzC}o>l zf+u0{O(LD{b8TWHwvo72rmC>=L^Db>{ZJbtREDEi)iHwy_qU>;rWeJ9daU|%IX11^ zfR!uOVe5eu>~c=y5rWW~nkdoS#MmfgqJT9e~||nF*p4=$veNG_}>DuC*3DGOavc zbvo%Z%d64R+J;y-go$b9N3S1ctgB8sULis5B05Nxvh7adiw-L%o}?(S~YTGdru?(N=<`~AP4m(2Wk zzw4Zt@4EKev*$4Lq`IrBtKRpKTORrSP%CRhKxhoIOKPDo^`Km7M-}m-oMKRBxevX) zAFVxiq^-J*#D{vzBkAXd6w6&UIxBvk*Z>rsORS5^#bv)hoOii`hU#+2$_r3lPMj!A zhr7!qc)Ppen(I}ZJ#~g{nu@aG95j^Xp|&U+iIFkz^$NoY??gmVz-o1LPKKVJcE$}- zqzzGEihS#5e2g5#eYkzT5ky(oJX7*8fP_ihnFRA2H1~G~Reb zTxviF9ZDnxa!RoZag|!B#1vG*H!L2hi8-(mM+Gj5sW9&x1r!_ydVa6bPQlpDG0Y;u z%UH$wk5Z2$63YX&ryv%w<@mppSn@gWMX<;#c}7%H?daJ7i_7&04a-4HY%wwwcBIsE zQ29mRkc%(;6N^wskSL`3I1;UZ2OWmUA^jI(5j#UV#Qtrfk6jRprH_QdB8Y`W5Q|`V z4S}ge*GE$6MYHAxN}9S+roD~p9Gs^@$`DxEiF1j~I2a>CsOk>l*in8A&4F*B8ftdn z4h|ZF`UX@SWHN0BDhX;Au6QCUG689+Imk%QlOFv7qNH5l37I7*rgcmv>ExEzAUZh( zfe}$sc>18QWHdAy*+KewEj{eq79^J&klxshN4^Tk>t0TCJv;r++KfBmkD!CRxEI(zu zW5+jA=}LueMIsiGkyUJ2Woc#UpsMWPb81=@k!xHlPKgtL#NPXqS_5j#1Q;SuHQTzD z{Yp%|wGTaknc~7=za^0nn@BoSqcjo#ba$i$V5|KOYU=b*sm;8P7U&2<3VkQE926zB zTC@*5mTY|;C0&Dv>U)>pN$_eQ2p2bZQkg%5lEhGD9FP`!4g8)0)_rlyFd7N2jjW3b z5@tCETTKtuJFmB%pe$1UifFM)%4@MhOT_t78tLvxRz~)#s+K`I)d!H9Zj)FZf*g%9 z;fVQ}^}O#=*01<{t(m|{XMR};j6E2I&%X7-=bs+MM{C#Pt4*I_-P(__bp2+G-hUNS zPle)I(|ve1Kf(_QB{*H8ga`XrI9-TL*^lf}1H$vvh!Cf;i%m#q>X**>hy%-3Uay5? zQmjXG^PU8;h&7q+J_2;#O|+1KErSoy(<#y$i(O!kkj4JumZ^hZ{Q!1^SKum%rsW}> z66;VLY!=GhpN{-MPCHcgRth}>vM92Q+7|S7T9KEPjP#sjBxfa|s<94zw}$B!iV+}I5>`=vbn9sT#vIdGq@N}SPoN-X3-iCDT? zhe;{~S_(q)DT)oZQE9w^(&knQTRp1TA2QN&5E2rCG>+4dz#uqXal>WjYa9~|XrKtp zsZm2l=BP2>qx%D$&mdg~#UblKOfR+Y9z{y$Hj+>q8&-U;h@M`i?Lk7B3cDT7W8)W} zBFNVhVFBI<@b`e5+XZ~{@E6Dd@p zA&~`$%dbOxVGZ1_haf0A8FeaJPrk3DgBC2b8t%CURB=$(^9B_J3=w)kV`GOWNb8Io ztmd0A5qykhstFb?OA80B!gvdEevd}Q&Q0>FsNv@{*pXABm3DhI8Xus9(&utq1p;JN z_%+&aJh>D>RXS8#_*uq>XeN;83~jXW7FzXA#D+)0qS0fpvquWepjD}H-8TpoRdobL z6Uodhoy)P%_73;7VyK&>8J`AcCr{dLH5ErMnsjzlvxDaI=VBsaK0z&2HGtp@6;cZ= zsA(GFb@rh~Ie<#ua1EVSeNz|8>e`T7Wkn7hRajm#X72FCKg`^UXI^*(e|qjkyfktw zrp{h~l^?9aie)P?7}Wd|Na*^?;1&0s6h_D$`QAnb1&6Agf6N3oFi)J?L}6Ogqe6fFrw1pPCxgNsfs&O(UP1tOeFH*I@Y4;3-hU>CtcOs8px z5Qzol@SuVW^b9~jMlMn_(vg^!g3#zlD0Lb%G&De7TaTtP8SYb6-_&)WKD`)aahWjH zG{MrMMM-8Z%5pQIZjhnVWd4rJBUC@-r-X9w%QtOiwebRZdpB)>sqvLBY!Dv^|) z4`quU4NWS3Mj8rIlhD#gM_OEi(xQ44=F3o4Qcn`Iqa?o+g;}|fSIJ;)(ee8Vppez0 zMcxd%(Ts+od{kv+pfD{9Rdl;S*Ta#LkcFJAVpu4G%1i4|Q{9Zjv2{=VmX?CCF{>(!OTyw?47w-FnI=+%v^*ebJyWFD|TS=4sZCB-j<46fms3( zvEC9>*e&HUs_ntz#vvmo1-%2^$Vg2=dQu`v@^X-ukpi1lgTjg& zxL=P#VucC2BTMoAac`VTtwBDCPb;QV`{+_gieh)5So;x4-b7mKj#h%IxgQ;dUU*jD z#F=yp@7VzNbOl0k>C&q-h)XMgw_hmhT#nd;H0(Ka1`e))h%ahJNWK!jnF<7!+2C5z zijd}8NHO0>Fv;y$mJSC~^*E7j$I%Qce27oE@@~j&_oZNub;f>FQp{YubQ(K$ZbfW- z7zzqAkewY1FRx43xM3+ST{wxe7ag#C)dxsQj^({-VK>Ne-QyBI*|-Lmo!pR30u=G` zRAS1XqC`s}XRwMC;di8UGjrS1B3!!&;41Ryh|L)y?~Z}@FN&TbN=!dm%ytx#1UH8k z;V4BxG6jHGq7XY_bCkE}j3_v=Rfy);jw{n6SJ5M_bJp{95ncVqkP2MOY-FF|IOa8J zDJZqPPay{FRDm{?;w^k%R?M+PlR7~6RKP9K}H9m)Zbub-Jp6OK(WG# z!X`Z`3A~1OewLvd3Ie`R#%H4I;hLqDwk%7og+<-@Kw4llvqIbXX!?m*Oe7SeS?mt` zkHn&AvPvi3^9toCDA%H}(u{(dR^-V#5T36=l&lreExm|i!=(}YD)}Adh8t7~w2<~E zB!eEbsC3XMwQ#=Vh{~c8G}ktuy0n}Ck%%LQPf7sPH^6(Xl;QaCe~Zlr*7`>b-;mt+YsqDzW9efmXTBi2Ayx#1g@db-t_% z=Sg}l1f|Pq4G1bxOT;4Mz;TWYA|(EB~u)*PQ)6G zec%r5c@+xlmC(wy&^K$?wkFgx)FU`D96GBBwY9a-C`gX6DQL(oM`K1QbR`YYmeipk zrx-1DjZm?jI!pxnoD70`AqsQyplwkjJ}wE34GJlb(Dk4w>^N`|=>=7A@(e<8m0Zed z+RQeumNh|HQwgstmvQ#^Nw~XsAwRbo#f2gpViWXQ8|3xPQlId}7`V9yV)vfoaB{qc zs-jBNmDl1_Jur^MGIP;>%$%?mtL7}k{E5@Cbk_TrH~jFbNMP96`h<%3!C#5R zB=XbK%5)FjL=OqS&D4c1(T)UBk(ygWmm+q3W?Ak_(^EMdN3j$>p`{jzkO35M+{)YO z5={o2KYt#j`8hDPG$7E+1=(5gh)W0|xO+gQZN_zPFGPohAvrc0*IXP)wna$HpsKIf_8+NS)aVW_2vPTt4ug@Y%jKM`y57-3J)LO z#Lb%>yysYa_UUT2?^#^Dasf*|Sd7rH01WoG(F(Z-+PnSa8p{m zxAQw~BrriN$t0GCcmKa47LtKNWuy%h0Vw-OD0C6Feljad>k#7D*k8xmuqLn$-_aUx zPP5~~NG(2(x8buG3qA@{;Ioi=YzvlQYfue7^^svmYBv_gv}2633;_|1Xwu#X-6?JL z12mb3pdfgOghVE>C~jmii1|KtV*Onh^EpaO5bC?LB}ayAR^< z5Bsrc#U?D9y9#TTeTJoLzs4uKPU7oJ*RaDQL^}J>#17PCxd)9==Y59*EtC6Hj%dYX%Q&{ zj4UD`qLoF=&x%fIAqW_);v7sLY@JleZ9US0ZMm!gh2>S~xz&UF{NK%+12CwRi1Z6W ztJa7-Izt!7O9%?Sj)cT0ghU0xH^>Y759~r#S~4thC9-4UksR)Wr~o$vd0wU>bi@UR z<4Dg)mbR(}g@@v**ERTu1R*gc8R3x;2n-I!`HL6P*4>4|vQqfFp26kgJ8}8kF$ z2S-;oIJ;jXDK$u8iGqB*5qQlN@xfk*3E*dWI^mqdF+?ZE^FHY^ zhXj7dMTc_)+RJppbTqtAx64lOcXL6MpD&^V{BZs1RUF>4PfF8$Ty_V~f9Hia-}w^L zW~|1HcP3-rd$TZm_H0ahXFh(u;4_T-))8*m?eH${lOk0#a9oOW6(SgFh5eBfH!Zw* z5a%=G2xtGPrgPB^h!oJb&_}h|XB$L2g;;lom~Or=wUuSyHtGyU60-@4ni}+Vu%F7R zIo2#tG#eoziHoU7aoRn*tPw4(Z5)?YWU!ER+_mIex1Y5!k)ExV!dq6W)Hg7`;3#4khfksm=K6ePmjL%PD)S@pjYxNc^ zUi$^!Teu8M7R<+rh4Zjt{<~N@=N&A6e<7BCuo~|zS%cY2Kg7EqY{K}(pX23~d$8(M zs6>)tz2Q)f77k?{$l>=D5IG%^6-Z_UH}%pH8t$QiLb_fzNEakxpwWeu)JTcDvh#}( zpPY^>S3Pk(EEYbIsc;XDhfi1{q7t%^OEHv|n#+EigcypXoccCtqfoQ54H`{1McW`< zbSEsfo6@-=J>8L+q#}sLKti*0KcwJ(2pz%SLSbO;eT+s!KMD30+6}`fqCnh}V#5mG zI;nhgy$TyWO0mW<7oT}mV&&ybEIpruPrUN6-YpXgFQj9=S2@1&%*J;AVuY3(rA2?? zSo9WQ9KZ7i885u?GJgN^ ztN1;M3v6U(oInrcuWRvvDs#;J%aw)A)qP$9lauQpCT!r0njX0Fr z0_QS2Jj<;JskXs4rxEexe6PYLMLgCRd!gqbHqs*hdt$NKL_~zYPb_V8E4Gdy3XxuP z^wWV-C5J{Q;Il1T;pF9nCS4N;mJY=^*^=_NsdXsL%fsnoM-Uzngo45>WaOnHD8e6m z_w7JwVIKO;Hl&3|AulPEt|K32RSn7u(s9-KB2rQlq~L%FBoi^UmRnRvLajkgejcv- z`@_-c3j3}N`6WfjNuY~Ki-4>mAK5u+@bdGA(^U`1>YoN045ZQy^Sy?e!gR=33bPY& z;oM1rMVv$|asEE=cfO3c!0Skj4o6Z{B)r`{;7))MAYD^Y18+AEeoq`~iwaPjk%nMz zZz-E%L4GM5njT@yp>RxI_&w$=*n~NA-@&ZeQ!#z|bWEK-55HZt9b>m$#<_SMuB2OW zGPwq^hTBNd-Gw)arJ8C!rLjv2d*f1|Lnhs^I2@|!zb9=c7Njyj5bogE>TG*JfpibX zPO4wFL%B)?Lvu67O%^H&3y=^Kg_4qTl(R332wtEd7kmZ!PA|UxHJ+?2H6QgPXt~k`rP>Y|aid;mK?BE9lTw4y>Uz{s-RH|%kY3t=yh=K-dJS6mTnop% ztVx3!l?^iDPaVarp4eb8_R|%xzD*okt+&w8^N9FL*FY?6BY_ApU}7;!qJWN4%;fMr zdj2k^IfptP!$_+$y?o zt)>^n;wS*IT(0jzqpDTf6=t#y|JM?5;LpxgdbCLc&BG`MPNF*X4pV@pH?NmQ6Y3bOok$jhkGuV2H_ z?OU;Q%2X_#I2B7KzJvMiyoXtH7UQkCOEBld&2Wj$W+!srrt?Se1on4+mV__YJN&9Kg7jpTVoozJQlr zcoVO_J_8?qwjUue#mFg9N+nNbL@w=bc6~o`8U~PG--n9E9yH6XP%B$;B%&7nRedNX zK#44x71l=x&6OjrKn}TS0BY+XG}Zx#G_N|gx0W4E%g(Q5rx!&!)WsrF7hCwdjVku( z*_NlJh3zWBcC_`0`Qd)F_1vKQ9gwow?caA8u~E?&>gmJd+fUF$^7HYHg3i=~jNA%* z`OOaO`few_-?|-}zxYy0U%TbUACZ)mk2-~kBoTw?psSFTq(NC*faDl|oI1W2A)x`N zk;~yi0RQOAFL2`A8C<%27LHfWW9zoBaK_;Tsuj&h$jX7g(`Cf_Uq@C-0wN+JaNgMk zm)yKiR-=MkWtFC__V3saUpF_nUbq0K%Z}KzX%hk?lL*p-h>Xv`C!cP`ym|BR$tR!S z;K76VVb5M1y?B)_d6kWs9H!5hjH&O=$IssT7-PRZ505-6u9tRVM|cVjCg$Q&K@Gy>W@(#s zc(D$r!g8gIm9gwUS?p^ybj%_Vn@Eb+*K-H0tzue?jWnS37Ij`NDK`^ zd{hVm{I4N^P9h{E3_7I+CIV+X@AI15RYXSn(ee4x&AYpJdZ$0dJ^ zpS~26#=VPoC(Ob-<0fL}n~HJcCt>1*=@>V9BBqR+hJ_rDvuDl2__rrv z+PJB>bn+4^47a3EB%zB;OnuYITBOli;S%{@{G4H)cf}6Vtv**2!nG06o z*#&#C@?a$V%6pNfdq@nshiI7{=L{{tQVPP z2hheM4j_v*v)cNkU16
oFh2@`IU=mQD&YKAJjiqP6cn`o!5k+dUNOpTIFqiL+@6 z9FMD|)2c&YT_>EXhp;TyP}yA#|`oxpmkqPe5TVcN^1uyE!Ay!+lV zjG4Ct3qSi7*OCfR-zhQ-K7qn`SDLpq*hIszBhY0SOl@eCYtY!NMT^mfLMr}7eJe^D z_?({hwYmv4B$kTmT3T2GtXdJ>RSlEj>6w~Fx~wWTPL{46E-CrQQ0O4jwNkCvprZOy z%jp8@EL1U8DuXW6lUSK?J!KTEvrB<{t>9WBC%#yfhMje)f4x;y@L|QkED1 z&(pi$c6b7Ty>=8=ri22qDqM$SP7GtGF2%BHBTvi6GL8eEBen z6+@_&lSrE^kT;rfGPVgmW!)&Cl`bdI78&j!IJ*(4BAAQnw4 zoeIm}BNih8KpeOdgF*nYrCo&KX+sn1x2m$1_g{w&TPwOqzRfZX(lg7^)_IG{uNgb` z9mn>sw@bvb>BEn(fB$}*Ah?&1&}&KD!J$cTyLbeV{w|0Lyo#%iC*W}E05URDpte{L z920{rKm348uFh~cdjeOSF5t^ANeXlq4H_LmKOg7z@5MC|kJnXaT)A=u$IhOEPjDpU zEo>(OYfwNGzWr)DyqukJ>C`D)JbNCWfBrer^2(uNAB{`N#Rn@t#JlglE9G-{b#=w5 z^A~W*GYEBB8%pb1uDNgeJP@edm2JW7(&extOF(H!|nl z1z53U8J5qVikb8PJ8rO!MLadJrf4;ipovFAtmjs`LlgVBNVImN`yK{Z#~pN1 zo!xgS#%{yh^%(uUhj!b2m`Q?ySOh^?*bd?hoze0LZ3Hxnp@W1%H{U)4JL_C3f@nI# zHvMjiR4i;qF@~&Nw>XYOJMwpq6LFZl)pC~t_A&fO7+LHK*%XM0hPx=?cb_Zn!be^u zbYC|R&$_%?*$p2K^fc`~Y5RELFyLO*4gW$lN@>Sb7K(e@5XbE>npGYDg;QZ|;;e{p zEQ2JLK8Og%|9&bgzM>m`89Fqv!>U-hB_x78{Vg~oG~?s*afnvmMk-aXZ=oK=v|vT_ zY;>HcVn=Zyt40@`JVAYZZ*hb)3zkD$}(=vRzVihL6IR?|G&B8c#><>Qv2A+`_ zsMhon6z)Mu2c)56YG&^hQ#~eQ2b4-R5)%^<9UU!|tb#n0*3_b)LWar)CF1E|GIL81 z8=t~~SO!g#9-2lIiSITP)_bUC!{)a?LN1krU!5Lh9Ne`e;AS?OQrf0^59RVZNRdBA zuAc8@og}M<5L0bOQjHaf#Y#kE)nfimAN*?OmcK5}zcO+(Mv^S2kA5E0Mn8u`JHAAG zs3+!-SSCO72fXppn;1)C`TFw%hz!j`L1rV0bL7aC^&q6YAFhqG$12)l1&~2&Y*zI` zBN9=G_ABc`mi{q{OplO52^?F@PS)IkW)575SlG$L4ir5*nT~2p+j^U%a!)FTHbKhl z@KnThJ5`%yR$T>Z|@yOPH8nh-}*f+5hyQTaDcDpReZPo8)Ro^^V)lnSJ?pHQ<| zJ%aeY|NeVvAv?La7V7q!sO9_i9=(D~r_bZUDLN+-%$}XQ;2#=|DmvT?s=Ju%5RQq9 zx8m&?OEGrJ7)*L+0>)3BjByiYeRaZ}!*1Dp9Src9en&|idw^FNRt=geM+`R^^pjCW^Y%KUe6Ew+e? z`6lW(9;-D&h|8;`AnQhT>tiW}LZ$fu0+Jd~C#SlnFf^KmAkr(R<(6aPr(5vu{AGA= z(Q>>qdp;H}BC&|wlgn3Q;ljn3KYtMxEnI@7B$NeG0x!%*vO(hNXN>jT7A8X@a=ga*2(QWAu6=!qoq z4}_QCe1;OfHJykmH={(+i)JJH2{AaDSnMFSmKU^0+l|Hdwh(Z|$@})sd;fLB@|Rs< zV)5S6+W+qs?`iL-@*@iEh%V`Xy7vJZcoDU|VC?If& z;C1C}s3iFfc;%?*V$}TGA;?K8O=5=@Erf>ZRjhp&Ed5fB2(cbgO8_p{-9v-%HUdLZ zux$2wSU7bm7EGRmjqlUiP8m;|{U+wmnuhr^r()iu379r&G{zHMQ8?7`8~9B7vu;dIRxE?)ll zVb394xa@|5hfiSdp2H~1tzfC)-}gX8AkCwMyk4e9gsKz4bSSa>%!G2e6lGLFYu{pc zfJ_3pd#V{eIqh&vY{L1tD!3=tBE6vpqN)kwQRU>W>-$7SfH=XeiYK`5ctcAaXAMsCkMD)IDue) zAIRl$UULT$GV}4(cRS&F%^QJ!-Xw`&?A`Sv3JMA+Sh`R^_ZfK388NOtxbEmg(zu9I zbS2_oteF5|F!UijG!0um-2qQWD*1CxII{N$4(&SvyQvS|J&%wtGhxe~^AfQ*I5|?1e!$rir|{jj?TCs`qjSE4GaLt#&V*s*<};YLY!jxw zI|VB@e1L_^mf+oa%Q1S>5lsK~5+X9Kyk@!)l8J^SZ#4}{VNzK2(2!URosXoTk7_=l zElP?bm;<};U=6ub%6kG zgo2K3|KT&(@X;qY=WrAOUas(VzQn%wF=9i)p{mzozjq?Wto#NO=B&fanaeR}l2|Zb zh7T4k#`5I^`nm67{^F&WIQbpSo%24{toleIm-+84k%(pPg83w+nQ#fuL8W0B)%syH zQGw^z8Bn2WlcExf@H>rE;n}iI3eMZ;A!u7|bjk$4?80iS`RGd$)FQ0^=nK}_`xrBJ zBFT%wbI}sKzi6rCj27{6-rPkJ!3pva#4>i`JNRJZK19>1q&3~f>4*kgEu_$@e+W<6 z16;`Kg^t;7cBLNnz3chS%za(Ul{j7;oV)`R38;8dj*$IFb^ky?wufF;+#*TdpufP5}CQq7m*b%jup%e7xaw_BaBrIb!$r&vE|D5u7-A7>-viNmCtj z=DdgF$4=tn*^4-|_YnNNf)F2(C55ThnCU)Bdf*yXhXj&G3T;__wFQ~9`8ibGcfIR2F@4vBDSs@p=929KU~8f7yN)Rua3m)&p(IX z{pz3b%YPVw7k@qiqkl63$F?p6yk^9fYdOH_ zAPKG_)w0;rt~b(g@cm-@x5YxW!*;TeK!gAg#m){W<jUGGif*-&74$cl2aAeOe zTyQuAj{twPh~#RNgjvZ|2ynZC^r%pzMTQ{osuLoEf}m1rArfchmNjDQj|Xv)Lcsr; z2mDxe5!~~#^Q39l$|e(nE;%8|#~)!nt_b$K%62}36WA|b_J!-o zb2zzUCp^!el^k|tNGK}RHaIHpVySx;t_7Fl^l5Kw+p-xhS1#k&(Noy5?<{sF)Z>Fo zQMj6EKsAY_mfvX@Ab3%HnT?%NWM~W3Zx2CWn1D1$VCWkVkBhV^}q2u^*{ zk%3k^Xc3Ox#&K0CZ^ubjHym-ijMGO?F?Y&*%ztMt-kCfVbLY;*-1isa zo%iMt#HaA}83gzD@!q_}1b)7E&O*$XF$2q%EkjsjDHN(ak{C-CJLTd;cdI_%!P8^@0x!@AXLaQ4(iRF*VQ`FBdG3M`$sr4-{L4jD~} z6m?tV5K0x{hr$XuMylYH-wY?26}bd%@5WA?PL!ciEX0!_L~fLr=1#bjTi{r1LR7;L zQWSSkN9Q8K{P>mY;E}IDL`6FS@{Pz;-jsH!=4oyty{Qi(-dzjtS*$fR(tXG%@DfXv zD3Dv(?iA(%_&aXE)PEluI+zZMZ*fqx+DP{yyGf@HDV$Z5h{RyL2Nx2HUo!<8ug$I6 zjJ-j*@ULz~vI(HRL=m6&uBA(>G($$h6w!^vcH_?8N76ys|1x4}?;^NpEYe9&8(USx z7!o_fq;o7(MsbEmIGv)P1sjrxC0pd5ATjvY3?Wv`_wn1mj4Z~7*E1wy32MHBW04IA zt71d45(Tj+N!g7i+Vu7ZQsh#tN@Rx|BC*^@27T~`ixHT<-vgUNiV;}fj)^%|ak{#m^A((`!n#TPOD?J0O;+!U<(XbZf9 zl2K5uC#m#HMWKAUowiP8id+v@lK#{) ziTKCUh4|NtmH6GsENo6Oqh8mK{2BvJB+C)XQ7a-LRIXvG^Vp8OJ*4LnWQxfs>y2 zgn;$KSD#|v_AjO49T3L*>_TCw9N&I>7&|}PjL(*@!0{iy$NGiy5#ZyCDqiE+`eCg0 zEkG_EV^B~g_7fn3{QYp@ydw^taKgC~E7mwC;2K?}IM7y2QfT3r6!EtDdMJv-A~FH1 zx0MRi*o$@oO<&JlX`8O5<5XmL6^E4THT^hv@gj~pJHgk(7jY4B z*uHrOLW2^iUT;D-@EFdaiCFpdc9Iph&5F_uzho?L-dgdyO z9yEzZ55(eQ2tw!j*Fl@N#p5S#N~5 zx3{!@v!A5m9~1$1Pe17~C?pC;kDSDJ-~Ncu&`>GV%i#kDvFrQ2$jvB)#?UQ==xL|B z6E0nx$x^r8A%N2{v3|2C9K*}aDDHTI6zg4_DQrO~ot2-m5Boz4QD(diYGH|3VpUy; z7iWte0s$4BNNBhzMQ&)|XI&?;1l5>PLGfKiq2QISM4t98!b;2t$W^0~B0&&KGsj~S z1zA*~0%yFU5t>;k#Rjv`!Kj3A=n*?;2hrPpLncpvRDl3)P;!K~`NLyd7qaBSX zz>ZUXa1F{wsk|SK-f0*+V;#m#TZz{vOvC7jZ)57X(HQm8b9m#WSMcidFXG?+_4jz; z`B(AEi_c*k31`gsNm%*e7w`;AM`4{2l`?VqTn$5gGuqS|m=sMozIPYC+x!Ji9Nves zr%&SJk3YttgU7IQ$6jpNydArC?!$&P>-hQsoIJW4KW_hm3iC_&cn3*~dMd4mBCCc6 z!91HCM}$iVrF~8$q0+b!uz@Q&V2VRJmN=)uU-u9(R2QGQr{TpDaoASHx~$}2&C_Gz zK|hR`{we9BrDOT?KaRlOO>0n_7LD;QJcpNl`$vp_eKN+q zF&&?Lv<9TmOBCuwO@d2s~>{ujuHAzHEm!db{fY@8Fr(M^RaCGc&V%VeBsx91EANLr0FW* z5aQw^P*RqSyngVYpX^2 zTlZ_1kdz*Q@HjstWkta&&>ex10lZc_G7ECycEuTSQPD_=Pegih3LMX0gu}_xkX2Sg z-=d+j2tx#mI4qkO8;7W{a9nkAk=}1LnowR`B84f*&CWq-X(>udN~Dabetv#18jUC` zD??zAKiuf1d`Vb-0oQQh(g`?TK8d2jboey^A2}7mr=(pv)xLG_5nS;J#&H)Pob-#q z8DRVSTpWg^hJB5`I~F`=w&*zRBOk^N*y`(mnv|(0%Cm z9%Hvi%0|K=;23(uYlHCj3x=1M7tT6fgpal2E~1WNLP;P~nFpa6c!2W$$H*g4@2u&?r&(HT z%hMo~;92_skkLtqv>W2=NfXI=*Uke7Ac3eGRdBiBjI~SG!^bxcDXHZM4o*WtVlfiJ zli+*RhvR!YVn{Oav1vGT>;k^pwiju|a_LM-M5!576hb2JOauFEifRzi@@|w6ORp=3 z;nC15MXJuG%J-_)A>K5IBEEJ$s}@DJK?&=`W&;uIQ|y2(Ge5%BR5|ht52U<8A|_%` zp;AgLrxYZ_-@Q|`AY@2cKVxLK(8PNb8yKp)9>b-e9$&@Q;ghg(oG7-SfY;Pa*DqY^ z07Yt#{UO@;UM(LLbgW9cbP@i_VD6#tA4d1!BPd7^E!|Iua7R~4#)lbtbBO)QOM z@ES6A8RbMJS-YYAF&&7g09GV#p1dQyN5KkHldDXqeaoSF_)(k`ENj=>v~R^ZJ^%P?m8yLfBTcuXEM3U9vh zJjRWD6K}uy7XI-2XYsGU`W;5U@jBifGg=~+57vJQ7ykrgSE^A_ql2oM_oYz7ELT8L zRe>YBcVO!mn{Z(F54dvqg0vXBXyGz!*zgI~t^JVX@+~%h`4xPqu&;YM;mXC6NKZ*X zcxWu@Ypir~1ZPDr4u_WGaJU*rlPx%uqr;=p7Zl2S4d zA0LmQfi4X6wWF`E8%m{;Aa@-GgGEYfefI2G0)#t!uDcMB-QeMU8Ang;M`BtWufq%{ zcQ>55aGb#H1uyTbxO&w^A{LRkw5{F7=iG4e)IRtIxxvl*A_>J4Zaz+kOo%|oKrc$F zD{$4>1wq#d{7%l&?x(Y-PD=+I74?nKsnpVI!F~aB7}w$LaSfq?L2wo7JuV&tJ-vvF zj-h+Kj2M!W$O$guQ#m;~;lhOrXlrYeLesdo3R3YzK%ftTg1vcN&bZ=u3M!=x-t|wg z?ouv}h1VdoSc{#<9I$QQQGE2>J~+o_W1D{=)?bQ)Pfa&u0!YO=SI6C_#KK1#NygSm zwcOJ$6>FCWxqeq#+Y&`XP_PcNJ-Y8o#A09{HPHDG2caN&L`BBq=+UG2Zr2WcyX!}+ z+xQXOJbciivvZ7hBfqi+TX+A6uRdFg69<08_Afrdhs!^JPfP-u?Hy9Awrd`KSg~w1 ze%SgwyxrWfZuv^gnl=;5NG6|rx&>j83HV{xe!TnM0xVs+6!YfHV4b?a)7b$V_;>!U zA&@t<(q(p{QQL(IV<*Dujqsow+L+voFLRAp?3a!0iM1#oXnR)L@x8wsVJ!r5y2gDZ zWB+Tu=xggnW@09GZrg*{xB|4abV04|hFa4Ni^hh^!U~)^bOJS{RcKKfaqf}_HhuLY za;r2b*ABx;ME1^BBY_N1MQjqlFGAX6w9`2?^x#+~`=??6j+GW%%&9|e?-Pkw+{?8n zCm=U=+((1;7F4YFD$7HJ7n>zwN#f^;bn7CU<+U^l>S8sr>CXI$EQl%VfsCME$`V$_ z_mL>%{O&s5r&omv2a2rtJgNr!v(!?+-zKp;jn~s{dmt4l*%^!2)L|KVEM@p?>%1k+ zA{gx?X}UfU^GqBtx06)tCOTZYqMDm`QGG+~>U>Hn2L6qy^NzH2TEyvldiq{0fBZKQ zi>dV zI>x;5rZn~S>g(h1`#-*nXP$onuZ|pr(UWIk=|@{}!7mlb6$a#2nILPlL9Mhy(PV^D z&5DakfoE_G+=F8glUoU|m>ldl;|3>A6TLEFlwLM74H(=@^63fglFk$peJpYGh@%vx>8o&MLf5fl<2VILGmbD9z8R&{x zV}(q;W6>pB5hPA7{gnvjHvWpeStTw`@Y!H)AWZ{1tug1?$)#7)j%CRN87fmGS z2G;4W*e1Bt4B|qb1qVVa;m;m^or5bZrv;6syHHUyXwA1sEF>2ai-E)<6#|?=5Qg=J zln-4T@Upgw^^<$-nDSH0nIMkr`Gl+9WkJ9--7RPZIml_)N%Kz?2coSobe84-uuw;muUFbc6Fn4edQ!vwSRv}{yW%A`1EnVFfmc<#Iubyr8g$!iol1&0ad z!?RYQrRDps=K5hnVkftHY)mF5=sXJS`Wop7r{l8jyAEin5FeL z%YD91x5%+)?HEKW>)c8wW2I}<+waiTJVxg&3c?mGJXuFOzS)8U`*vc_uJ5ts^UvUT z?gComde|&oNKDOyr>_s==B;}J(+N3lNN?Sh~ zZGFh7H6gX38z;l+aV>{!MOR&Fd5rS5hd3ONhWQtwu!@4L-q;Igk02=wyu8_f^o(M- zdxWB_&Q2wN4_0E1p7kKkqSQC);O6d!%4#`kTWq*|EgZ)$c%wKTX;avIXl9#Ki|KCy zxsJ}qH&2f!iUN_jR)np(5?cn>#A<|Ab>R?2L$R8mO>(NTii6)83Wi$}>5EMPRi+-4 z@NfL8+Td4iK^=cK_X#q&%P}{Eb_zN%{-pCY9Ta$-12A_Fz}7d6p1wO6>b-|vzE6~P zvDLq85c{01GY<>aeTidkQ4+C;2*j1be#_0Mm#LvQb)lXrrlL`Un5+`y$XXDR zUV*qm6;;Sx6g0LYrBs7>+S8QcI>hCcpvh=KQ=?K^EEcEGb%y(>Zhe3x{R2d4fvZix z7m;NsC{6MG+b@2Ge<7&|*YeHExu{7A#oP(wFy^&4Fn-iDj3o)JU-K1w1Cx+dBu7S- z0dDzSm~b>*B9(u=(2VCU*5TU%IziPCWKF%;9VDHuQcebb0$jRMgLafpnMg}gIZ7!5XbcTv0)lp(-B^smodyx>H_E0hvX z4GrGrcNpP!Js1h`sZv6xsK_KK2x$l1_CsE#AjQ%W8Q&Aizi;Kw)e?Crn>831xPi_N ziYAo`p~1musH;Q0m1>i~qGucE>EvTcibr-I!I@KzXi&9*no3&874K0Kd~Ak33=nk$ zadfvo{)t%l`@bg^jzfu9*cZigmZ)=k?`Tbah04n-ii~|AJT&vrD0%^^u6BPKP6hPSJ$~AvHP< z+el6>=g#8j?p<{Mdy$iqgVU!^OKT~@$$k6XRwO5i>8LQAJ$(U11v1pDTcyNv+72q{ zzPqR=SgLvNIcA`R_$3Yix+c^@#=3~Av*AFl9+xQVMNF}Z+7?vHnxP@F*Vb!LU85n1 zvd&0CMyh)gMXkZu1D(Dd6;(~dGZV@hbjU1eLPlXDol-xlbhnV+&<}Qf#E{5COUy`a z?1O7+6S7EX$$UPFh&NOqCU>v?R6sIlgHaNpwGz#yd!@>x64e1u8_?dy*xG6%<{!P($*H zQ{O@aNw%8zq;0=R5+RZNL@Y*Kuhix}eRMLtH#pXM=|Z|W9{bR4?MIiT9~~xs9tFF# zdk`k}V*?3B9GGqAxHNX%hKYj1Oh+r$SHzAs8(on|eIX?r``=G2LnMitu#;fKO|}te z+W6SY-^HW2=`Oxcye@KKiGxiO~=yjk6^{_qnNUA3C2&Jgy|E;V(yHom^N_|#*LkXx89zK zSKgS2kz*!c!t~jg_WoK-UG^EiIURsFB7AXkKPpI4)y>@!$~u!y~^Hamt4XtG$5~^&=GW`S^w|_~a^3#(UFRJ9+JWY`7bcE2vBeq= zl#KLZIT9;0a4qb@_+#n#*(n+R<)Q-5UaG~ng@cf5hEdnthl43P#F0SKc+Jrq!6NlR zSeYIE849TRoYHy^8ahv%g?5?5@^tF*r@}TDhsH!{v)y808@JwtjpSk_xmZ}N!nJUe zh`^MlHd<>ct5&LKmDWzj*n<4ZD#%m>hI$cdMvjugdUT70LuDJPN}Hvikm7KuNi6u+ z>X4H!B29D9ur4#Q8&Q}qUMC>wyQLi6#bqKUni(D44^dI0Mqx=Um8_0xRf+1_MikI> zG{|-69e9AIW-~#pmVa+WO_h>B+Deh3;dfTS%I_23D{nNQzLvtl%lzHm%&vmSsnO1RY-%#0oPbqY+(^Ygz|U+)Rz^ABuZK?40eOQ-3YuC{)X3L5 z(AoM3w@DgylDCEZy|J(g#Yx#Hqa%>>ds_)6M!FM=*o{XJ8RnR|E4HJW`J9!`!%in- zet}9AUm&K8n-I*0J7NEzW?zMU0Dw5 zDypzmxSlg7apCw;iC9EL@IyyWVDr}R;BetGwru+zvGIvgId$0u`BjY+kXBSt*opK9 zI&(M2{{R&=IIehqtb?jD61sOh8kBa(+Xqo{iw=PJr0o`mb9>ky+i>HyNQ=yR^on{4Hal80dP&IiblspZBe7cVO96L{ zoljsiv!8VlgLx0O&OYMmFuF(p9UNP26nOIP`%+d@u}0K%lY*YtZtq}!>Fk8DoA*3G zd>vpvGT+CLN$jqBN-P#ZD#T@*D1uxhViCgszlm6kx-M9ZeG;LFaMmK1iXe|sNi*i)oq6xmt$cww z>$c+Cb0J8kIw%skH|jf4rRYLA-AEIaTpfWiy{R1@=?zfO#>(#j$0HjM*?0#m%{}?|y^HV_t>R z>3z6xa2pP9UX4Vb^CXsW81?!Xyz%-ZOq#p^pMJRuzM*NzDpMkXAnRQ@gh?l}FyeR> z{>P~r{N{8izRBxFv;G#EbvNPP0$eVqGGp874my1O`q$2O`dm^2KYU9A`rjiqYVs8`qeA@WFVccfh z+S`ZO7jH;;^#5&-6dpID)`+E8w62Msp zEIqw+2v+uClFR^~AL@UE8@$%upQbK4MQ#iB6Qiz2I>{~0q4bix`v@MwWegAi2IzQt zsJw?-sW$n2>|Rgv%6C7ZQ+a>~{MOKGKY72wk$ z0EomQC2$gl@#ti-3QOVb>Q2XFg;G(E#`0PdiF3u9Ys{+tmfZ-k$Jtca=6rh=8EMp%J*k?+PF| z9XfiF;NMDIQNxLjsk})Im6-l!u@LMv#xAHdB0tGPG%0RER?BuIxb}5FrXXsk0BlD- z>m`x>uGY|jZaPPct%JB><7XORwscEQSxrIH!lI+1?Mj_4`-H!m;^RVqxF>?;{q=Q)1DOQngeVVhYPdRUi&w ziOwOdmvGQ`4X{JpU}x_U3qm9x+T3<_aPhNHujV%KyeJ~{#{d~y9L}LiFm%$b^gyBQ zLv>RpO6sT-Wj5s2S>Y0%fn}TbVAh5&@aBXG_;}+geD~P~e6e;J7SEoA$z#W3;`kYO zYwQ$^eOtJfiFo&ejadBYkJ#%HD-lahT?g`OT2VvCB8o&T9NdYuHk=7BLbB#At`)ap ze@HFjH0)R;8jQd$wVqtp&QeT!gqDLw4jnQh{HcD8Sb_og|iFDZPPnX)pFfHsM%YGaNH?@F}psKTj_a zOTC3^i^QV-iCBzgwh>2}nZ@!`5o%8=_S>+LM5NO8lw9l_U}Abq&k@*0(ClV?Sx6Y7 zo>~dALgAZ59}x4yZ2vZ@Eiv6@?|6EsQiSgz9!uLSRh^H}%t0zr8;b*hTGkyMJ^Bge zLdb}Su&o4ND+iP~aMr1FVb%|cXkGV)RjP>@uBFwY2-Rq4Shg~l#I z`rL)HXBZqVc}Tf#!edg9Q(T4Ulx#Tpg`?5bjhO5T1SRGnwV(#B-l5R(9vc)ogk|Nk zpS82S`z7-0CpL&MG_CAUX1Xg4$5U(XT@qOaQd3hQqr=s;XpmD-M+_RE@Kj;=Mn5!) zTI8g~BPJ{m^_3OGtuD4nFZ*me+phy=jT#k2xyVe3MR`#+l$vI!^&(G-g|8WLd-w(& zqz09hmC$H(ba_2=Y%S2V*eD>xx)lN3c3X~@M%}k^VU_F_rtZeM`MhY?`#f~`N(@PjHV4pbN1T4z9iJ7ro z_@?MS{0$^Ajt3q4p)?&$9PgqqYww`=>Y}J(Ulmhf;$Wtj3bRtUh-7`@ILUt-u?Ui| zvjPNBh$2Eqw2FbrVi!A9#7-a%NI@E+2%-^xBYqaIo2Vw97FHIYGYVp%;t;Au1Td^? z?m(@w2eOs{+S7JqR2y){I~wB`Z^W;tF+o8uQ!B;SI+9Ziso_Tf*#!j4%&$k_bUv#!~ zayhwL508ogOgNQ^5hp6~v(qyC=1d7T=Tf%=g|zZy&*x9k`7`qgBlR698MOl$6>Yf(~7Q*c8(B z7&$dY$P7cMqMA%7QX@R03E3p}Cc{H2D-I62Mlszgrg$WWM9>x~jKy?>IMv)i;?a@# zby_RTY%8;|4Hh~~6Q!Wu*g*%@&4F)cKktKDM=;g5NrcnfV&VOEb3h4T;(O_$>zi~` z(d?g8$r?T{-m5kBNFqqX(xPdFN@XP&*`Ze1pd$meG}}ln{ZjZ9E8Ua;2eI~HG7<23 zogMA{1fUxvw|fNA0Xmam4ED3W=&CH@yn@(L%zoA(Dehh=IAI(6o5-9f4%3N{B4%-~ zbZDaJ`TJjrfzP+~+(XYGNr&XyN|F-iTLihZ3*sTkTL&IdLHAIB+t5ZE*Q~SB0o>=` zi8xp!HnveqE5|(5bU#7nCc&nIGM)wyI^j}D{9=PfwU`c47}&zM|pk;nj4#>ZQ}s}0Z2$lMtOM^Qb~-$4foPzw9;jmbfO)H zq1SXt8-8?J8|vgLR5#QiIWAsGJDeGx3~i$tjdeQ6s#M6$tAJlXn6zzOt3 z5eZ@lxqU2ZyuUP|2}kVm}gF{%!0(!tL7Z zPZ#ec*Fx7NGOmind$FrfOkGD#MaVQezBS0AP&(OL_DIuQN$Lu zzg0vs80bKb+`apUpl-~R^BJ@ZHW?%9_xdERoIaF0fEg&qYp zW|R`N>KjZ@YdWAZbfbzYqeNjw7D2g^AevI&28Y0W6zJ|Eveb;dSE6twEC=tqgRm!CO|^QzmJb~X`9u9d-+ zq>^X?HoF%{j^#l86Vx;gATdLQ$=^F-#H>%~SSH}j=bobr8-?rFu25ao!QsdcSoF?l zxH#;^xN+m~+8g8Xr{~7umC>{C;a7X$6P1nZ8XZz(2KdTuVdAL_{Nija{^epL{`Ghs zHfObxxJ4qiJ~+fRA+V}fiigxdkSM3+7h(H@GaFH(8$z@B7CS%H9E(IOW{L$WC_6j4 z=><-if2Z|{E0 zcBYf8GlRGbC7p*`b}dqL14uR8M7rq?WE@<1Ew_+d(?zvK;It25SftkFwVTBGj!xQp zf}WxG35=9*3VjE%^D9tZR)d`EJk-_Ip|PW=#$2T9~4rt`#9 zwubF$p#!zE*yyNCbek;%`a+_clFmu&s4BGFMWS**$`*S)UyV$84>$y*>8Vbt`F3%3 zV(`8cY1u}{B1$U>RpgN|Qj7{UomyA~pFm&4#rPv9H40Jwo>IP-w5VkC*?U>{6$l6= zAjgIvHzNTNLB8;DcST%6Dn&p$4CYq2U-Ly+z;yz9IAX&6Sp0GE%6Yb99f`ajfdL`# z^Y=w?pbx>*8?iCLIDY()6hqC%&k&m;EP6TzTElL!mO-4Vsg_H-1Fw5~BFM)R@xcM` za=ZwKgNLDSQc4>){Qbgk<%$~u{rnN+;fydZH#k%HmZW8)zx|H1p6KJ_18;8+1c&&+ zFW497T`pt)2?|JS8(kb-GXdX5(PXo79C4hqNiO^rfnUu22q$#|{cPtNw%K{*6HE*; z;ul^W7!g8n_kWCk4!Vb*Uyx&O*&|f4j~Gclb~+c6ASc=!K`MVC77348#1yA+EMh9m zA{;s0vmoh666c*ecktwiAe0B>hkJr5{-^)`HxLUi`fnAg9YHL5K`fM0e<2pRL@Yh1 z*Y%)=#8NGYg=Fv-Vi`St9^M=~1Mkk6fgo>3T)%J_PKUq8$sf03!{UWly>vO=n>`03 zUw#pzM!t#{N4|yG%QoV?Z!$7vR+QA+r3k}S)f!aQ(2A;r3htD0JY>rBD4{yZRCIIT zTKG7Kq}on|6;ojoPex;bYazS|;!laC5O17F#=!=5kR~egbR{N!cL^ij`3RFozKsd5 zzmCzbzJNt@r()CkC7ATq^LYL@Bd}olD2y643NO*I2x574^lW_e^KWFn(Njd&L4 z!Y+(D5KqTafnT1l$8Sy*;2V*voM2t2=)je9EgaLd@GY`S+ag1XObEl?oe+X@tNCI^aD)y-+ z(*QIU0%u`0a&wBLfsvb=EA3Je3&#~zHAqU!kV;W$1)}*}Vrn`HO3Dx(9V-!sAf3NF zC*GHunJqmR8X1j5s?WmGDuhPGlZf~kg=Gi}jYL*vE(-IC5fd3l0BS^fY5}TiTF{~u zQ@jJv+o{Ie2*w25zeg-Bo%f|3LLxG>wTt9VmtSYM|wkL1y6p-D_15aH~M=Ko*i&m`Fus@rr=B3i}fW&eOITU5$JckHVlB(*3 zCq+tz;SQVzdFI?O_p*2|O3Tkooyd(U* zJdm9lhxo`q=?vPzWBb|WC3KEfxVd?d04^bbq~&<|G>OJT%KPK#>B&CYgC1T_yOsTw zrHu|ogwrW0s==Xy$KmPjhA5IsdQ`YXERH8n!`MuhB-i5dMOTu~RfGlwBc6m8b^RL7 z9Xfz~l3u4}2ubmIaB*=#adAEx8f#EcmWPDQWE^oggQ9AZ-i?Q76LH_fh6{?a&W?w$ zvu;J?VX;nWqmvM8)`D14t@rU&k{++SH{qAwT^Ql_2qQf2V8pe4{PUF-tO?O0Sx3ji zcCmEaWj`9GNO?*s|A!IF4Sq3g6P4)SDq>3HZxs{YBNli?<}x*vfU;HOm+nNPwG$0& zz*;JW8g(aRRI+8&M%30>aMdLk6W*GQw?|FElnG<;$;QR_aKRL;n=>AtES`&X3+H0Z z;>C0=b1;6?t8^}-Fm~)%ELr^_T>KMJP)mDVZp&dvzpUeEBW>`MC*rW9&R^ z+Hw%rBXf{hp+RD~8rQ3DVB+yK{Nu?A{0m*npB;*^qo7*~&7xNKB2PJl$RY!xim1}d z42aB?BfV0OMyg=7{WeslL8xilrJUS?SWIHRm!M+0OLCz@AbDsAC^{BBi^$1sVi8-& zt^8dq@{8%PRyql>)!f=a^-Q&{5druJY(|2eh9IkL<7*_KDpeN>nru?=L2&}wF{c($ zbXH|l)Wv)*PT7a>N-J_T99&e@z1?DGVh`-S?2`kJAhQfhMM+hrXul1$tsh0@brRTz zaDeA!XCfsj4uL_}QCU@nkkBBcrX?dKH3{M2AxKM0L3VbAl-)2dFB=(|X^4r5LViK6 zG)0k=6pxaULP_C@a5Q;&dD1ESl#~=Y6uu|O9|io5Y<^Bmco^zrbX=*~sE{>NII%9< zNXEQw0rCpof2%lW!Xg%%P2FO8?*R)R=`zHYS*`s(+UPdAdg$;d#M%hpjU*>`3Wibv z5_EP=VmmnNRZL5X#9u}H+!PXsW3~pRtUKa6lq7*BzBh#+bTFwNxqPmfy~J07KKqA_E@W?A z4}KL`L6@S$h_Krj;X`nDy^j$tH}Oxtx9~4c&DdUc9~Fdo;b2=^ThY_Q&;P%bSfr_r zzfnwVFawLuE`Y2b&Gs&;tiKRT*I$XHmc&wCZTc&*yghm*#*Unbx88UaiZ!s&WEa;tSHuhF5lS}V>h}n`;OqElPlb5fzMt%PxV`cxVU`C z6*gF@EGo3^@a1z6r8iJPU?`)~4psFaEVB~%4Q6=QfCX-OSm{*>KLdeMI2NyByy=jJ z!yM@~9MN%tSiZd|IhJW-regA&V=;sGvuMFQEMK-5%Rg9zxihEWjaQz-D=)u>7hW2T zXP%#cQRC+0({B#LKROS2H3p`1;?{eGeu6oc!r7I3{ zl^faNjCWB@!l=*k?{JQo)igX-$1e<%J%I3RJ_J}WB= zxmnqWqjD|hdy`_Lkq{k?%JK>%B&H#+L`IVCK?4Pd*oe^3`Vj0Ef0tN9X!CZ~LpL3a zy^W5c?-8BYAe?jTXymZfv;MRMay9E!1p3qy#IxDQTnmgi5nqcs0f_8_BJ{kPLp+Ow z@qKs+yk%YRk#*yIt{Ew8hdPe+fLb#Wn_3}bJBW10#47lg8&JTuk%)yrBS@u<;M2mN zH3Xv$IvKIpD;!Is?FOPtRj6p^HS#)=El+SU#{lXjBxoNXtgKbqW=oSVh5ffvwVUWN z1+fTHvGq{E4DhpiZ$nNnttWW;czDA3=spCVJ&fS3S|lnblrDx zH6#gN|F~0H=h(h`J5F3Ufe*KQiSXof_Wxd}DUSX^ENb>CTkk`Zs;t;@&;h&l?Z?%t zV*TeL)~;EPJ-d!bQK9Q~owynpj};$%g%js4;nIb(*t=_o6uBcUF$dQ6$H*>FNyH)& z#O>X;3;S4BY}knH2aZC{Ygds}jKp2D*exl}mPo0I@6+)S_(>{log7yb2sPEWu$FE8 z4_*Zr5v;+8h+zny0?`x^V*O2oQxfFze=M>5b;0(3S)NXb z{I80h7Ehc87I{B392qUvE-1|%Xg0AJNidoY)GOOj-`q|zFi;Jc;N%v7QDdgzwNYd7 z(rd5c`In!;w9zkP@*6K;%!|+A?UAqJt&yWJ?#;IdzAuo3Mq>2Xx3NSbmN*iNRysr_ ztJR^pR*(873+fuwaC5ze@4ovE`}gd^i6aN_;hL2=#*VY)(=Tx1;9*>0=lSM~FK~ob z`~2BsaJ+OHE*ISq6_^T**cL5sC9$+ggF?%}-J~Ueu#T!|pR1Z}kQ;m9Y6ND|v8=sX zick_u6dU?WZ#tH9={VRz#o0WF_)H}x{OE)cbH5-t&cgUN#$)uGZ)5hH1z5fABP?CM z1`{UFAgPSPOE12GmtGi!KR+`8BS+80Ctn_bUqlWH=1unM5+ql#s?&dyA%fOoGd0gJ7OzIMU=mg3p=WwDqTs^Rko3cI1t1%R};ZS#=)f((_13+ z2mw+|`P8brQ9wd0YOvC|v?8KJjUwwE#5T6!Ok@FElPZuwLaefo{P+j$WG1ogS7W0~ zX}bd&8PxIf;wyCUNh(7H3BROLfug)}#70J=u3CnIoJ=Xpq^hNf4ka0xB#8QY8RFw( zP(yP(w!*9EO^bax_&}BRMJp z_2s1~$<9JzRFo8^CNsAfiCLw{VV{dBYDS{WM)ht%u3l{Y<#_5~U3C&%sYb=3b*I=t z*Z%YXq}W#7MS$<+KySAWQt97?T-||lQT52wJ%O4e+R3`J@x2fkumtJMdOhm8?n|3nawr(w3Up{74n;Ne z!Y^Aboe3e2O1q-O4l8O%f*660;y~;QGxj}zR&3&69}bl6TpSSVbOvWR zE*)K5QK42t+1`a}wGlt;KTa32R}zJ1&R)dsy+`30oFoaIX7*jT>#;a?;yj|`k`NRc zj$M29)6txSOkR7tz?j0AMCi_Sz>-OOte zXHp6|J~p4Yf&)j7<9c8)ysrmh`}e!y>K#I|yoY+?+11DlEZ(#kmppyp>Ej6px)wn| zwbd5h)|4O&=TmO6bxo0OvILooV zXb>Q_AoBnK|MW>jK~&jnj}DTz*eLaXFR_T-LVu$OQql2IYa606pl!EwJ|z~)Sp{pq zQLJ11L@X6zhY*S7imN}~7(ErQjC>0(y!tX;c==h(81pJ7k9;1l|LOM_`P_3Plvn>s zEEC3%WF}0+^7WhG7MO&>S_A6p4QOmKqmjTPqIha_t#G{Tg0H^%3TI9prz>*A=FdLC z(S7@HXxAQ`VFx;}a}U<8SdQa|58&*XBXGWQ7JI%s08gi2XemFNsqpKlvRb-t6Q~Jr zs(UEa^SSn6c9bEi`x|f}nFwOpaIIX*M;*cPg?Ax|B@G8vR3Ai!q#QM7?DN2{mVS%z zqb6eFo0BAB89#9v<}F-;xeJzH!ldbVYxH=${@Po3?Uk{3{)H(d+xPJC7yIE8O7&c+ zM-~-+P|YpOa>&KckCfo&hl}yd$pY-irgG#6H|qK&ViAYKnzTKTDeNSfUWrud>E!h6 zR4pR9F;%u!tPL21Yq-db-O~+5N;z7ety2l%g=$A zmxnanmCv6qUA};%c}-OmS3&W`s=`8C zA$TN)haopL1y|0UlY&qtBxk`tG8sul4TvjIA+FjCmn0dYs$2gqu~Qmt$5cTg%dZ7a65-Sm*7(g-G(31q?mQaTpey4C@V*9Qr zVrSo9iG{^LV$q3>0PT0Au>W~+@o+u33*i@zA>QRI&K^C8^Osrgayc5Ut!OaXC1UyP z%de$Fn7j8K!l5H)5FD3Fu}X}hyYP?7#5db^;tZX`DTnjeymdRyI$wo#fG&^slwWVd zj|Yz7+?C6?=yHw@<0w8Su{7wd&{7nMK51rqh@Fb!Y>cV@G5cU2_PYgQ^Y-s>`rHLv zaCFAjZ+F5cBu-i@lM|RjvMRCgqc3ofWOvHp6b>HTkBb*CqoGy{Bk#GcWe{6;?8WvU zzK5IRC0x014nO{|7d`^+EIdEdl8c?{s+0*5f-LJcPP)gr9zDY4iEk^i4ZEKe8j zO&l11t4K*|{zlPCZiU2RrOLNZ8Jju@V(rqQG_hS%Nm7w3+R)hChH?@@Ws?!-+^^%g zwX>3t{Rdd3s-`Zg(qO|!iZ)l@>N#%^@kACn~8p(0T>@i`?) zMi9$fryP9hUV%_85JqCz{(N z8I^0Ossk4Z{@JV>5o<|I`wZ~0t?dE22s$DIpIMMgAEc~&;!#CKtn0leWlazWfRs z*Q~?I{m0lx)?(L|?YMB{BtBlg3VZmzQv|q;E7wqg9>?wjr+6Kw;TvCs9Az&`>`&m7 zu0)uuhk$(Zr*e!W?0de-l#6HzVwJc6yi!k{%i-=r1fYjz8x*icBp#lMk zB`70V)hoK;ncfV?I2j_U+mNanfKA_pE(*3=1W_wRo0vKiYf$10kO-a6p#^FR$?a7t zD6|@lXeDFY38dn*cQhSip_=1TOw;v|_$V4gG57KF=u*U1R~vD`#%t@k^@RPOLW*or zN>NzCwr?VEw-A4FwSy>7_CqJyl%zGl@9g7a8-Eu85(h0qQt4@>D{6m2MgIue)(6N* zOTo3vClTd$1=;cb(sp217cZ3L%P4GmP}k6mBPWjIt4$x_dn*3#w`{>KwwwF4Ac~+) zx=S5Ay+ZKOn)Nt--~gO1oW=f~Kj6}(OQ?`F!c4NLkePAp&|w_f`yEak`WAbB{2X6? zwF#LydD1~`vEx&07Z;(6?4oXXua){XT=b8`k3Vk5frEQ+=b-D;=t+icwzKNOdC5I3*MQAaU;jW z>GE~-a2y!v%G+AI*e7~P#%zPm0jNn@TGqRjmDZv)U}Vk%{Ng&@h?5!r=+%W0f!!G4 zZNdnz7W|{X5x?|q$1kq+U_`)ejPU5eKY3~KNy!k(%y*^f(f@mirHusgH;P0oV&{q= z7PFXgA+hKMv9$d}EN%ahSmZwu%ee9Q!>G~tw-;Z=pI&+muRQl>yz%l282$Pic=PqA zr1GnO`8{5FShoIiIQbsYK2^DCvgr*Q(-gCr()gZeE2H~to;2G?|i&^Hs!Cxl2&ZQ zg44lxVbf85-zK~_b1~+TRF~$*ShR2@7B5`vL4%EriXqKB`GWW3V z+azK)T16g~w*NpZI-=6QCl<5u!QUkoJ&TTmL4?96G4{hDJPRiya*(VYKs}vE1)ukC zG^2=vR@wUq1_E4r_ao@}T~^zDmqDqX93o(2GgUne3)=a2BII{(mms(Sij)V) ztg*l$C_1VI3APScDZz zmyvWfVEK}zSh@5AtY5tb@6UglJALJ{PipmX$D7VuIbs(m$3kgl^ z*Oe+L>$T`7F^M3VV)0z8bBG;yYSV2g%sYn`T7*-&Nw62uaoJ{K{nJJgC;mXo`W8xA zWUdqu1VlI{K`L7DzD~A1U5f}X+CKb{ZbRe-8A3xR$3G#ZrsomlBp0zu%)m!8AGKx? ze&#-UMPOQzi=FCyz%nS6Zn6Hx-%WI=hK|Qbj*Uiqh!S7u^+dnZHVR={pyp?aB$a7632dQ`|5M) zOiXcwjCI+Ce7eY!M~_iBe2Tp!l|4UvCgosCNza6lnAFMpZKoR-F}XzD=sCV~8Z+F@ zj7I$}R_uMLBQ@{>>-l%$aG0G8tf9ITfhx_d1PCiXgT$iIcB7NZpquK-*wRU$7?$?> zH&Q8y@E1w~U_C3Mf&(VArXPoWbMeyBE%+bf7vi^n8i_yr{?8cu<|vGNYcz@Ebv*aX z%lPfDpTmpKkCGC7O`JFpV`k39vd!P)Qe+llt28KYT{ChOuh z3{5>~Yo=P{qqTVun&x2=*h4f@rG?7}vD!HvqjoxC>cwchd8z`VPL^ZgVSZ-gBc$62 zv~@SJ#xV&~ce!Hr=7U)B)el&)=2I;BU?Wzp`T{Fh7BBx8i&t;LicLRY!J5rj{rL`j zvh5Hy@4Se}6d7doolq!9bRyPOgBG<~Gir=hRB*6W5uoauZKzdPQ7dob&mAOIx+*>Y z#@Gdgsf%RTO^3z$CnFfdJ?U=3q!kPI6cpxRDTIVs#7CmjuuuVa5_oKEON$6{NWd_) zJ%WnFAP(u(SU3;}X!QiN-QFqK<(Gj9{$9+EUBMDl*NajkJ2qbzeWR6sFV+lftpq{V z2RTXtKvBd_FdYe{wX2sMzl&pVzJ2h_xi`H7hn?&GMfLe-_Vuuy_^8W$j;| zU&WtSELlS`TEm~$Vb$UlSi5XB)-NZiu&n)H4c4%%Te%J!R&T&Z>p#Z(3l`&p4_0E` z+Ku??%PmMwPD5jZLW*=O!lv}~l9Y{h^mp`0hvGWK?l0Db2(?A{@$6CL<))&cL58}fM%HZ` z+WXmt9IF)Fu#!Y9-C{cG4thxFqL?TGL>Z?08x~m+d+$p{9PI3Bdx)0)r$yT*c5{h{ z0K@~9HWEo&=hMv^b`e5^0^mQE`_gOTJ>tE8`8!k3ARVa)&I#$jsGSbRM3QR}DbZQ}Q(3;v%P?&>@j>qBSf0o4oVF8|SyL1H}j=r#I z#i7xn7HeRj`KxyWDvqbgK_e#11cNppfu`m>8cZ4eO=%e>5C}VU33&(5eXtT zJRLfdNF~gB?RX&V5YwC6N%DQDDQkwyWnWymdI??u9`N+>kWx|$CnU~FDU}NN2Y5^Q zfIK`M;l@XAe^c2WvF2BiHOAsXGb(zbWqrh7_dD= zC-Jn8gP@zFW@^6;CCNU(0=yS0)=-A=kA6e=2Y(WaKb?zjA05jO{)g9H{4(G%35CD= z(Z$3JVMJ^%UvI%U&ocO>)Ji)Ot>U~_*FzY3iQ@wl`8_v@-Ti2`i4+)Oi#f$(D+$Nc zfvCt>iC7*yc`O}|yekOefAQ}>Pb{reSX5f_n~zaLCT(Fw5SyffPzqXjCGB%#*DW$W zJ1!f?OsQ!Rk0chgj;fZ=3vwE?4WN%;WzqD&NHwb>E6Eg{Xsk0yMbXrS+J-*l)D7X7 ze*wm9+>K}7--OZQXXDvtUcd{_K7-d@dJ(U^_6A;g`3*e#=hrauwefiCt+y~`$`p*9 zH4pEs+l0ejQAlmHpjy$6IzEb!-y)K&PANxAQ$3C)DBxV&2H)I9cqNn}sZ@>JIvZTl zbhw&jLPN8j?nzALbigA|gRm+S0&|-XRiH$zs*g&W;1B^A*u#TgWIt#b`VDr+Ym?hlE(K4Vp(uJ1dGpvVE(tqF@MumtfJdm z|KZnIw|)yYe7Fr8KG}wq{QZNEzsItVzQwA~c1VxwzdVev#41$Qw4$`sfF?Q-K`g}$ zN)#$uP^`A1OxubEWh+U=il&xssfbMy4cc~+OS?oYDk?P%3BzEy^H*Xql2|Nk7eOqo zwtkiYDZGW9YEBfhbUObg3?w5XiA8K97J)2vB#-L0Cy1!FvCdR*rlatxvLKuNL>$iZ zFES%n*)J{L3neXfkcmZWv9=&KL5O%wDP=aq7g7Y!6^W!_f>exT9-Wm$Nstz#Qq!oU z60{;NIRmTKeJtfa7sRr1)kduNU>z3B7r8**r^{Q850(d&i1)5sy7sTcvS#TjiCoq!BMI^M74I+SdsguERan1f1ItEyLdCp% z`6?3IY64drT2vYWzMO7R$-3ozG;68WyU{Loxe@5a)@!wmPLJeb?6@z*gtD70=<94n za$FQbBEnHtRf(L0Xv78iAT25wDUpFlj}1nCdMu)-@?D)Ake(KY(y}5nx2Vw8+Yh^l zOVvIok%~~M|ECa(NJlKlMIx3?;z(ydl(aJ;5s3)$3y0qoH+Y;ohY&A!63Y?z21dZ# z)*}&%qthvbMY|v>&K)sf*WrAgU`}GO>$;#b8gTK71AP6jAT;6{VxvP48WeyN4rfqY zRRL>v2d-ZCgtIrv<+?LGy`ABA-3?bR@cn*q#HicQS{_KmqHh=Lh7>f`ZscZE;Mjrl zaO3-3Jg>mr>#CH8M>rvI0M~3bO8IxLI6J_LpY7s)0Zv!XVb6gdkwRh-JF*0^{IGi$ z0>eU(?3sc1t0{1By@mtl9Z+Xf!_ZHWK|E(p?)xZbeICxcftSxH@DEo> z8lEJK>m5(sO2j?>w3kxqC3#{Q%rLFiO@g)4a7o%;FsEX0V;NgNLtE(x>h7r_aL|V4l3J$Qa+zU zkjb{*k}lLT093J&3R-TUNPQO>_5Dbf_n}r=9HYe~Q0c@rJ62)?Nv75yLfKmgf-I^Y zlr{Atxvn3_Bg!y;uOk*7xPZwsW@FSFui&*8|A5gWpTk?DN8**2UcyVyzKSs;- z&YCs@b2#v4to#_?pSzB;NitFGQqP zrFIB%!)-L%pU^oxB#_=hw&DhI72POTiRngydb1ssEdxkW3}J<1D!z+s#8QU{O!?+K zW_@-P^FBX;DXVv3^2(i8Lr&XhtZdJHfJ#CJi&PAj)wvtrpG`DfqBL!#Nlh8ot z+egLLqPHM3uNd*ES*UJomWU-WEn9kCYqVkS!DD!5_Ip^qay^zTUWu9S%)^+sCgROe z<1l&BJ5t{DWlL5`jzo~h-ztJw)=CbB#6p4+L?jUlfBuVG*&v+Ja=IA0q!o*w63a?K zEOafaSCF_!Dzj(L#hNwik)Kxtb&C!O@yW=|DMnRAJ%K70l_eFZscwLt^>1juN4Itd z%?3JN5_uOvxUse#Y4LFg^6{1q?}?28N#UXJynGQ?FP?=POMs^*T1uN4--S4h8U6Jr*#s@I&M>$_d}#pj*reqS%Ctw z!UmLPm7y%R1fI^<;O`X+3;RMsY8tM3yP~GPjQvjyISD&5Is*aM6QSYQZmw0q!^ss1 zv2m!at%a)Dh|*#i!u=wlsA-1UY=@iAb%caoM{a&P@(Z$&l#&Jy|5${@<*^ToB!ptx zpVvu3wzC~9_FiP?l)>Tj6)5W)QJj;9f~-Okeg@oK{V5in#u&Tm=7+MPN(xIYWEGW2 zO-RB;hl|Ka&ZhfsMMQ8Myf2)Aq9h+JiQOR8hfE9nQOZrLrshn zJ113ivJo<1V&ol+a8=Qb=rAHgkKbHV;&+#-@yClbc-^%DZ+Mhrq)QUsbq~S@?-=Zl zDnwwB0fiK}YT|O25DUGmYdRpaZ5SX!Y zx^X157>o8hVfhIcOqlu(W=x-i31eQxgt4z;{J6L9`m1y+FTaUVuZmq^ukp2USi133 zEcoObe0SCtDYaHAdMm1H?Woc8p|q(@S_4t&Td^}%4L>zd#QTbpb-^LH7}X?6pQ^jK znAJg6e}ZNX`fHWF@Nc+@@;)Hfa0@5=Go%#EjaCt=Tg1HTg@J&o*7i%pBIj#0%`Dnm zs4+c4so@a`mM+G0oA-Hx0Nw+Istpw+7LmbjjY}q0Ii=&Bz1Q&ChW!}1WGlul{T6R7 z*dmn)%fFF`<;4|S@EpnI#gF&nrA-GgYxfm+7wS;J9$3=UDQ!EJ@pH?YbaYgDC^SaY zH?=^iFhMDACF%5_uB8tOUayGF)}rqu2(gnX?Q}bKC|i0-jzc7wn?IFdXf#webd?4@ z+e$}=DYizE48*Q5(JvIj0V$uJJu0p-qFmmFygD;t3gyUZvLRDpM{rRiGF9yeE78I^ zt_-OaS}5s|T19*+1C=%F&@2vMnjcH&GYaZ^kXmMeieM{pyJ$={X^yg*-VnzIn|<}bmDRU7D3mSFtbQ}NP^Bk{uXuTgwV!0cJ`CBl(Ng2W-n zV>O9lwU{dVKoq(W7U5hZ0{LmWOgt}K&R^dDAwU1)H6P-WwIAUlKCWL$f?2WluTxu{g4CFM_Z8!o$NuN_=+R)fs0GAHcaI2jOsdKQ5m+h5&Cj_C@3vM0$rK4O^2SrHrU!aQBl>5!n{VbQrI+BH6bH0S&F?i zI5>!b{yWfVY$(kxgS<+?I_^YRd?Ir5(&)G~Fq!ofoHd9^DMEUF9mOsQxZ@sdbXjH* zZMcnnlh@TG*CQ=8A8jTp$)yR3`exKs%aIV5g=V>tF0>tq@!6=QQ0SravKmZiCJ7}( zCy-?7&`YAKEU809dJ-P?5@2o;Y=<7gpeFd|6w+#cD2lpZy@>yY}yuphpEf5K8#EDY1c?cqbRI|1V4LXvG zR)o2>Njtb?B%~@?H!>=^anvmp(^h|vNh>yC!NR%N@!jY6_Uknq*zaM{dowVZIN%hHtcG^f)wV;W97H*RT;zGFCF@l-Tky4SInEb! z!oRW&hyC(!Jx2?YJc1h@<3bwAr~M)7IpExB$9$^$P{w=AG2O$7;9L~Yxzw^Dgrlh@ zXf|o6{Aty+ydM#`PNV9CqOlc8W{ zd><;qr&lxa$=L{OIvt9SPX=TCVPC8}coiECI%C(~tJt&816wbrVfVE{oD3>Ma!of% zYC2F>+l5la9h7P4kQCySeFtjj3ad%tsm6QAFh4{-ds?Mx0QDLYJDrAs*J@O^!=P$~ zzS)MB<~B5v7^>=9Q6{sZoP=Cc+lHn_x|`-6s7U_$c9M;y4>}ebJF-T{@2OFvrb;E{ zOA#f%pqfOkLUDOL^2=&bE7u~ov<4L_iV^YNCIj2r0E@l@Eee7w6}1Sur#Ih6HwRto zF#95Z7wL7)U1Ezf@28}ar2`?+aJ}Y(ydtXjRFX2m{GD0z=oHpq;ew@fEOY5p z*f&_FPn(UoB%b#dEu$k5!q@qKd<^=t@N7sdELqlQjwnLd&O(w z{lcyMgYAwfFPxmc!_KG-S_aM?r4BP_R?EQ#|h{w@`hmf9>0&fo=I9+na$%BV+ zV8?EpJ$4c&j~v6HeFt#i>^Zo)y29VzA6Z#B2nmlyO`U>(PEsL2b`Ly6s|Wxp0Hy0` zX{T5cMUaIcmfqH4y)T}gT_40k3oN$$PL%_PInjP7nT zGc$9$ncLm%HnrQ#%xp`xYzr*QmSizAvvfc@%%meGGe6(+ZnY=#-7k~ef6dCu@8w$O z=)gXE*RFb?>aDkKk&GxJlti;ni_EQ&^cC_T5J`TxKP%m2Bc#L6$Y+)B+$51mxkZ5E zIVj~RQIT{=u+(}`J074;GVxNa%bx#gVh{~A?Cg7vCOSHIBRU?)^INE88)4Ui+WQcG zf~e0U8G_lSJe|;!oXQ&?D>x)sGF*~8m4I6UyXIpEU7&?Idrlu^G+IyJ&LUQHV{?dsV^vQqA`>?ZE1Q zD*S#&2Kof35f|TznkvA>*Bw^COhS=8Y#K?_4aBKNyAL-TNT{v6kL**m_4m8CD&}=d zw5EsP)?v>it8O{jTyY<#Y*^Ag;eskA$gTGoQ^4@BdYk?-Jl1IA(D z!nsIKzKWXC6hw!g!m_VE#K1mpV{q>Q=+~n+AN%3;=U>8`{fA-nybrPYWE4`WyeKJl zp{BY4X>?g7^q49VKmkGi%S#nFTGoZ2VjotYNkNu{jhZ*%NMUh^AL#RPEpd!IYAq3B^dLG|(w|aGJI_sMLcLRWqGU z_tpX8G>m#5j9M4;H8#{%(dCqxkyofka+VeeX;goiwaCshp{T&hI<%q2NVg~1eMu_S zBxbV^4IO76PhfkizxsYqvaqtB82Si}k$x!S& zdLGA)2O%RRA8}DBC@ZOBN9kmn15BRBsIjsxWq*n0C#dgy0?CzhEhY(}SEEp&s-=4= z$JwA@lu-4nv<7_r?Mj7MCQq6{XEGhrWI~;;V&2@vB%3*yIAI#bkDG#tVCn!OUQpK1qhbx?fX>W#$5<2$=|}%o1WD0X?0(pUY!PnKO0PzfIl?(ac?liQ^_? z%$V^cvoTn_=v}0zWud&R3Kw|3SE8a7Vv&{mk{+g|S8 zLXFgfBs!ZaT)lh^XXwuMY}t-oo3G>(o_z_)KJKn+R#R9^0J?% zmz&|>^ShmNQFgXp0+F@l5h{sES+-kB_7B^@qF9WD}=&eVdeA{|Ny*s*j@(J7Uv zHMhei>$&Jo+B^^7G6-39LdQB2{M6qkVG=_LnfSaC_)5iksN?a7yA7-lKkG^&>SQ&( z%vZVCf9fr69;->&n!!P$)-^t)Ghv_NJ(fLWnqB;?5DRfvoTHFRox2_e$)ru^_}@k> zHY$g5UeNc~iV&n}!?`p&jznt_qq~J7Rz?JG;(=_9;%Z6=3>Wy}eW^NSi_d5>?8YnQ zC}pKs8y-XNx(l64k_X;|MjQSO5d_H`}LhL*ng~T!oit|k_#AE4OUj)Wo;3N(I{>RWLpPJ?5Sm8j49O_IndDj~bcPvUUX8v9|UJ+7iMub?8YHn>ruwbPZ|MrmD_ z68&bPf~lhIPpk6dM4FW(Qi1gsvhd~pEBGNG32V+KV&2ved~qrTTVqxD{B#O-9gRTf z^;=>O<$ETlsh2`I_K)~@cXmqfS=w#GowWz18l3)O0h9W#9$CR`Av63CY?&~C> z7*SYOfzrwv#3rU-%l2JZPmq20{g3e4t35Db!W2xMLZ>=u8fMTr2&lim61w;{M_v6b1;uCWG;(5pUL-U(Fx6-J{Pk{ zTu(fuag6fl5N$sfbyORK~IohlfD!BBA(6AOdi*wSW|NgA^)Ml8meI9?3xn zf~sBu30R(zfe?z57P5N}{ePRMk+d$7c0^oOH?jP`OELfinb%gQZR!sdQpjUJauBw-9W)Lr0$l1HUhGx8;^j?7x_e zZLwM$r@FmV)q-qd4mm{$yFZ$##U<+v?4qSvmZd|SwjS429&8B7Ll*JNPXe`)Fe;q) z5KRGlxU>=bi8bYZ+4rO!&Aw(dx*I4KpRoUvL@1u@UV^?&)*?MXmFF&^NM`#|)QBMV zT{Yap!E_5!%=eM3=|DhqISLGP1SGKMUR9yiP4UfZw%n0O z$VVh3k}oY)BZ(=Cu07oP1ebIVk;!Awj3}Y_vfV;GU7Mq!f!O1t^Pz}sAnAGNuqb9* ze2>sf@h>ihya@-3m)F}xtnGB(fr`JCM=Z`G220ik>SFdW5eLNtsJOHiqU-IMp6uz|iqnZEWb@?nSV_B5tFR^_ zQ<==KAzO#mG-5}B8rNyvE|Ms=Mpi5PLCb#QcK z0HYV`IwuT{W-76EROsEPFx*5=WurnYl~hkEI+_BW!_I5f*d3)pjJ5;2B8qSLdcPEhu3tDbur4#yCiPK2%bf zB$ZLQRd#Q;`hBPdfhD)GFIJ7vT%$rPwU&0OVGClzsA}qTC@HT(T4oMH!>`h<=uoZFV(HRl7&>HxLMRhSFyqHfQr48r zCfExx2yqDTPnC&w5`jVQhwKnpPiG;d z(%3;)qBxa1bOKbLRNXB+W`i;m_Wwu3!s9(97EkLfWz9=s?HvSb+EGX_DkdJSiO)kA z87G?nxH7U7#kzVp3ABdBCkUlrJy+3+3srRP)vd@UsZiS?kK!=6ihYgWze0c(Vo9Pq zFRH(foss28wmpEEL?KB&WoO5*Qa_H-vZUVtH0?KdJ_J{1J^U`elH<-z(JOPpGE^s{ z60*sbY%>s}@{>$zQAAf!^9VRw;#Y`8Cd@-qYEf#rsVq=c`5&T&u0%^*j^J->F0&yn zw_eG8SMGg+GCBmk1PZXueRK?s4UZ7vxQ9>AWn=30t2kcTt`LCHd0*MX$3@a}H#fuE zN;2W2-Ouy%wxOk-_r${f<9H0&P1MixmPZdsrjx{Siv$;43!EfVolJKiRd<7q<}uwL z?=35?K{ns}uOb$Q+lx9XP=}`(7B<{Eqo2>&2z)Z>!;>U~SEw41VrfPVD~b091+3uI zN*jULkD#o4T*@s*J^{&0wN$~{izb+d6j~5o=0pwwqm;m{YkiDN0{oGL3gojfoYvgH z@~CQ@Eo;EClZiN&Vj}p7#k_?z+fL!RS6)K@{{1n0$WV+QF&e}BypGWW-p06LgD_^u z5R73be(Qx-@a7B8q2C*?;n`PT!uW;n;818R5@?IHDm&`5PGygBt;Pwx&Z3NOs~qjn zu;UqAE$oynbRQ%LXD9!bbPntkRDMz<6SIK?W1-@(Iaus;9aJGgC=M%~inT>q)o!;) zloJ)Btr2xB8d(i2>G^GbRPa${y-)XY8?_n-40JZtDyOnl@`e+Mh~>3kFYzKQhhWdn zwIf!8*$0v^^Jorcoh-sv(Kc+OQ(S#M6|Zf)im_)3Fmz7@R>f5E^G%3RH(>X5JpytY zk;=xMq-j9D(Sx`$ExtULffZqeI9=q%zUyVURzOmdd|(z5|E8T-_4P8W`06XHTl+nN zLoQGOmqBCDL8q@pow^3)*;z=AyoTc^j^KPy0ItVGA}r(*bZQmSV_IaAy+u7xDR$S@RHZM{_qnA&@;*);I|8=~%DnIc3PsD?pu|&ZVRbf#-ve5TAtb%MqA8doIS1#01bM zvP>5DGI1)M3Ej(Nx)Yw)OuCslBp!KfB8AB0@smh8Gf4>IG=zL+DDTbYInS4{VG^Re zKYhw{es4Aw&LyFcRD@jSNmQ5&fzi3lC!r{FEWGX|bV-Z&IGfitXy8zc8Z{P|E`=gK zE(tq#?8eoESk#zwbb^IQOwLl$u`Amovs25^laK1r*Zu?+l7Qq}Gy3kp;uVs)qin$} zsdOmr34VOex^c+fC{oy;B&QXHCmeh<^H@U2ZjyxzM=3ja^3lnD>}lrb*yn5nd7FeB z6Oe2z51=E!*o9>H`_|U`s3oyE`MQmSV64BXOzJz^o`Bc}i=@%#?|LXYWz#i3$;#m( zDDzkz9@9yHbPCWlKZK*{fs%tuN;|*nDd{~|@Mm31gN><%W@(e)Q&XITf1);>UivS-N+Gh-W&< zI6)!oB>-EA?lxYpmi1BI^aN34m(9s+|NPCXbOr(HE<_scpn}&JRbG!`&qE6Ahp>`# zB-3=VqZ2#hbC68%mhB@fjt5HeNn@kT>olUdvmJWYe-=q=Q5o>Rw`HR5@hY6Cp{t;H zZFW=G@|+q1d2$tP$g$;(4Bo*T04Hr@=XJgj6?MBm29rFVNB=ioz`$N_Vo(U(T%eeO-Q7A$z`KGouNZWh8E=pUYEg#4c~9XH=lftl}nf6hwoP*=t3Z}3-eJy zLeXl~s8v;?C_NRCmo8xcfj!u@dpq{--G!rv55iPei`>*Se7@uZEF=hjK=uFa2cKf) zr(fZ#cR$1@ya%80y-(hG5ARUD&!KCXMfb9hs$R;GU3(F9A^=4>rKo59df8SS1V7oT zSfZq4Wqt#dya29R=Rk2;IrJto9ZMEAZr+OByZ2$k`b`ua1JSSF0EJX0PNY-%kyxfb zB^Hu~6d{aR{N3sD8qaq=&uP&-aV_)zL^@B2W$ur}B7`HvvS7{vx-Yt%8T0e?SRD0_g&xt_Zmf`aODWYc+-Rce%orKX0P zXr_8@C7D>=bj&ih!Tv<9K@-8SiI0AgtSl~e*5B(Mmsf~I`raLq!Xu?vTL|)PBp8x` zlh5l(5cRDO>1b{%#L~z*l!z_2j6ld_E|R!-E+i94?=HmBz+(!bbQ24SP{@VPWj;qTIa^6CRz8=Ibs58V%g(Yl zAMhL{Q#G-s<*qVWA7cepL{;ItxJrC+H5cns%8^fGOChMOPNQR`fFeFCLqmBEAd8RU zOu}p=4LX=Qw(sy9Gd4t*V|Te9?_96Od+{2SvkoQjW>ta(VFYC-!L-7C4@Z*qIGjsC zOk&tl(1d7>8Ctr)=K3x)@ItL_(5X;RH?VHpcTh+2G_*fL9mRVj``qV2sW@2Z#`bhG zwxk%8by}6Yj-YfsGT0v_V{|ov{YsS+N75^JeGMq+U|sQZ4$l+bFV+uTlFRQSdHLZY zhF(;{9<<=hMm_Tltg%o1kh1W;`8yk`8}ue30mEBq2?BNbY2(<%#Itk;1!bK zJ!_DR2C~?azfV3wn7|>?JldxH|vqh(&L< zLZdVD!aHbjsZt2Kve}G-l`6$YzuLgYU)OpAH9T1#!Jw((2CbzB)jB=A9W7AXOt9z; zaGD)dTTN`RY?N$}l4!1$$Ezj78u>h5Q;&^Q(Yvzhu_B`Z8;fork~e+T#UfnHb|P2R zfuwu~)@(V7!Gi~*PoF;M-K#%(z1at^J^Nd{@`qpJ)fXgZ*vokH#U6P6*U#aVKmGx| zUw;kHz3~P{5ikyf#vrA}qAZLoDyjX`%5#n0gF3S;4s2D$CEjS!8c>r%ghPNk}X@XEPgJ3$IT|mB)0j@N<$ctj;JQyvAQ1vm8#vyQ#WHvKt4{=Z6sH9A~?;0(0mv6Ua!Q)XpIt$wl1Oy5Hi- ztnwj3dj~;fEm(FY8Asx(P^fQL%CX35?2Dk9&#psYt{Ruib%@s5+4$`^Qo_cfZo{d# z3Pk1`c&=S2sWjr_kG@n=dH?Xk57@9_gOV1$sI&yCS`}(k6{spJKwe4=u7{n+y7g{#PPVd7 zc~Vl6a-JrW2|Arl$x=OX0l33;{q@t{05mJ%iHE}KcTSARx zSZx{!YYrXIteJB#Wbklh^?g}cC1iuCE8*90f~1|2pRMdQUqUBsHZ;J;>#g_PB(Xf8 z3!w5RFi9HwQtu;Vn{Of8cmrA&-2uU0qMAz0UC=cGs`|%DM3n0xg&rS^U3XB%K3eYV zp0t%nAP>pKF3!bIVj;9XbtjeJC%HA`Ifr~Ds&(~ zdly$o3J3EWu;Ho(f1A+a_$w7~CdLJJ8u z<~}eeqY2Mkltqpn%!<4X{s{*iM~0~ZGg5(Z*KgyiLf|rAFQ)J?kmMY^&rW+2>a9Mw zjV|~pZrde%ocAh?*ZzJb@a!Qqp1FJv&s=?kX9An>lLH!zy6Qs!30l(d*t`$WNQ`S? zgD^Xsh=_?r`|W$(d?Jy?QvSlf{|jQVD8%Az=s*Mo+x<(i?d3x4$Hj{3~Ag z{qI@+h!=kIJbwQ#zr`CQnjSB`fZx6J5{6N6?!6R^Bs!J~0%#S<<-eO)G_-YfwmWnR z9@N%4P)gTUSlfo9*R(hpW59)E6HY~|NGxug%rN3Wh6C43j}cJPf^W}e<6=ZU3ajg> zmhK~r%4SbY4Z?~@Q05!RQZ*vFq!BwMiYzz{yCbu3p|A!CMh^}Y*s=0jF%BiF5s;)p zmbQT^=Pq)K)cEG>l~}fH84escK*A8>*oI@LP9lu=@_NiwM1%$5%;8>HUS1xO^ZO2sReKSuaw>DAMfz4;&o$s`o*w5D%jvx7()qfHgdxP@q8pK8 zHt>E4vDA}Lgjl@tI{!8kEG1;z#_#9}vKAj*3)Q#2@ixit2AaD_NbM93^$(RHn+z)X z9KK&J!#C_JDb;=w<$YW=0~=#Z2v5_4-4_;uX{^2r%P6>(hLz($o*#uIrV1BH$9NxE zw#T6PK{kOkkSvmGc!=ccE_@ngz<$jm6!AAIi9uI19XMI&!zoD}bzO@*+2oFGPDsV& z?t;N~4`$~>UgIN{`^p+485XRedn|U|Mhg3#k;q#}#UHC}M+F}%-1iZlT7zu0k0f{x zDmqNrp|*> z`(#|O8ZIekx8F!oYTfeZYM~{5Rzul}NS=yjC@qGiyN5|h_DbjVI*wBfxS|=*%T*@l^a{B`$(5uIm zbRe~$9!a@Y6tnlp9wiCIdKBpVC{xSI^D?An6`{C7%lgqFy~2t(s-VIu4|JLql#^g= z##<;ZbfToH9_4(kioa*3Qq!|;%T@PLSR;GI$RbHujM{{fYPzF{1YEh6h|5>vapd>~ ztoVK#zWU||?Adn$Az_g?7kB|%wrs&S-+Y4&JN6+dE1&0*j|-Q=QC3=mVj+=&p25Q#V% zdH(coaXU&hn2?DOi#*ETbSy$F^LV{;S*DO+CzCXX4;zJ%BSz!M;p2*1k;t%fVVBtk z>yTTbr7JW+PXdwDDUEahlF(CjSd=7?7fM|?OEq0X1ztihi!5zI9xX(^?Y;tDvd6p# zim);-uGhBXFvUUviKmbNakY#jQQ?4!1Y&EWW1%v3Hc}+kQwUNm*OL$={M6PanGOh; z^^b7ANP}|)T2#C46A)XlKdl;Zwp&Qmb|Rsw6-mZB2rKa+UFA~*p^@LSk(6W@O@_Vd zDN=m(cc}Dv&q$Cyg;*ZIzS`tPcPjgMG!h`(=0+twL$&?}&SlkOd4w4sgqyJ}sS&5kx)7=ELb>HJ ziqvf=R<~pQj`Mi6_ei|@RzJM{W-q)%H}dAI&ne~gS6{))FTSJ@%WwbnkNDj$e}zB( z=686uM{kT<@+l5QWFlGZL0*vwWmT^Kc48@`3KL=}C$Ut~wUqF^QtLewS!6$qM5YIHsETK zN-ke3s3ehS9-^l92~_6$(7PY7?psjFlT_x>6@0Mp z9encc`}kndJD4?Y5@wTJ7Ro%uj0HHb|2P5z!jMy-VuxTSrW$m!BTLw=U*-uK?ze3Az}Pj z0+Kb7Nv+&nL$#KYx$8_gj8nnbqP1_jtZMk@~wc~ zCPQIYaqcq7n8cD*s6u9rT8UH?VrgrBj3)Lo3Pw=yBBaWPfI>HT+fYbQ4lnSbn1E=! z31!ckJo`fgW*CsbK9tB84=2{3nqZBo-_CUULh7hrcDe zLCPqCgDP6`b)75JAiUZJ{=Bl|;NeVyRl^e{9F`^t#RRR3`A$R^80kD7kXRnVN<8rK zeJ5RskcpHgx*(57R^?NS{zxp6NK_&&vo(Ii65ZARlLAor4uB%5ul^s{o>JXaa zz@c;tPUO0j4dNPj9v=5SH2R<5iXJ#o(1Np9t8h6*ix`y)1#BOCvUS*+WWe4Gy7F`n z3cWx?ksC)Mif|&j9H(OSh_AY#?3{Wz+k+L+I&9Cb$B}FUlFjWfv%XBMHx;k1+9`8E z64cPWJ%E!AS{4oZ+hnV4Iy4uF(AUoQ+DRI8UL;2g>%vM>v9KO(GJho^NFwT5?!ebZ zw?o`;_~kjp0GX@7L2>OR`16WP}jz;U6OJ^L-2c=|CzLMph}rLI~<6W7l0}fkQq zD^V1Q%S}e^;K?_2DHDzwl^MHt9l+{UYm|Mc6Oxlqn3#ruy~mN1kc$SHD6~^G$$~dB zd4o)hQR$Rg?&45pJ>C!1U|zTmpC)fYRUBLC-63+*6gPua%pSZy7!TRLGkcNd#k@@=(4Z)t_r(xNQJtg<$ulGmCRn4vBu`DiSt(A!B)9#onn516c*X-0K96{oI~4yO@DBT3KHM3QJwvQVq&o@z+C z73^hI>PFOPn|Tf{s%t&Z%>)B2riuWsl{7p;rt;kAMQnUFX3u;Flg3V`JDAfw!99Hz zW{jVNIg=;jg9Y>P@jDB#WbQ1?BJj?cBop2XFl*)_oH`YZ=-6yj)zWQwZ%}-6QQ_TW z2VsXMq4;D7hs9{DM`n7dLT(im6$-(~@SV7*4?p}6JzjeqLk0}`kyQS_ZbgVi+>;D_ z2}uZH$WYi!86JCDek2uzSbi)*I)6?=LMSrFB1MQ)R^Bg|HD4J9lk)zO50rTpSxX~B zVQ;_H8()3(4K{Dyh84?KBZ%ZuSgA#Fri4suC^ zlVxq#o8`gL6e~&ydRl@-G+pPJOf$}tc!YG~toN}qwi=lP2JIsPYqbwiyl=I9k7AsT z;a>MbNA|mB0%R+lhMq)YlgWDTJ%w0~=T#$2Ln4!7uxw1I#C0$GC>>C`iJ+eC#**EU z2+OQRt@l23JYR!{Ak_3oQSw42^>i#PEsqp@Q07=9yM~uapKPUTc#N1LD?+lgF!35{ zB&w>^f>Jsd107SL>oJOXzUS)Naj=+f-q8dD+gDrr6LgS>Hs`sqKGUXT{wUFRBEHT} zAZ){q)G~xns3q_`PnCD#f~FNa_oQG_220Y$*o=Z?x zHER8BBn~03+vsS042SEUQYSWIpR0uquZ_aGMM8}wT2ZzsCg^$_C^DOQjW^KTMzKxz z=b^xs)Gs!-kK(8SuEr+1m3n^8uaJ>Aa1l)IHj;evT{QDp4ek~a*9{o%+`)M@Fgn16 zXAV8U&rSkAztn-B9;?9OYidOEo*vhxi8s~!+D&@cDk1uym+A)>#G}3 z#1}s;FymC@d%@fES~&r5TQzIt1=Np%6ew|5|6mo~oV^6S1`WdNZ@h@U zy3U*AFKHDWT}8b2S)_FYCIYq^YezO0Ji z{@+Y2)wV8W_^Z0k1fzolVe+DgM54Dpro*^J1?z*AE~l=}#d9T*5Kt?19#mJDpe4za z$(kIMTOpQ;Y9~}AO*KnxO|wEQ4t+h$8mB@mWpy@%RI2H->v+9&>UuaVRFG7-vQe3x z3d+K3tfq3Ts`ZjkyeO}!M{xxmUZE9Pc_!o*)9KaNQ6%h^XdYq-&K3>v-h?<+w-6P0b?&DO7P9c^Y9|4=4_OhxC z+oCIwOSM`=5Wi4p!BsjIVzlB846Iin7LTmJcT&{(?!mymEfe#0nN0UR!tTU;oGqpx zA;7bl;HyiiI8K>wKgP zN3}>)8!>2Yh7~cq7E$H0kg~etK8mRHS6)fQi842?(DAQ{)Z!!^dl<1J&wCrS#KdaW ziI(+{$FeU)kKpP~q0NxSIexjLKgz|qtRtIto@L45GE zu}#X*U7JEIk}%UvVi8AeX8*R>8sYM^vJYwL41Msn^7G9tBrS?_zAoE+EBjeB-C>;& zH=VLEU@J+z1C=c;*qzaYmo^qDr1DcCmf%j3Ofe<}gQ$Mke5ck#@L7X0kE z50eug;2iIj3}J~QlO(^}g9@?kWCr$MEz$w~@o+lxZ93 z6j}-D4XCq{+#CY@eiB3r8&DT?HZ~gPEjBbzX;5v^W!b$CVWBdUjmbPz9cDWpsVbdq z_hD}6f`iJ#W^aT+=Y)$YOHHy+lYnY$KGeCJpp&%pMp}L=6{N3;zj+JQh8EP2)HHU! zM-rEHLk3AD!)7J}?lq?3@O{CZ#DL{0ws1@f6nvtq%L7BdV#6ps*(n3{U zjhZqlI1*A`ks5JnB`BavDycM}x`vPWg(xj3Qrv8nS_g+)_P)@wGc_VHAzfMcDEpnv zB(cn&y99IREXK5{b1-k#B7FSbXZYyd"ZW7edpm`TD}JV)kO=3?K@LkJCyhPuWE zH*W`>eWz~9IVgimHKZ(@zEF{FI^7r1Mpcslt z6C|a}OeM9;G-V}y_Yl`p2O?2me?D11dAzJ=kw~&`Vo`{Rgd`5;sdJIYFqxB)3I92B z<|t+E+`0VC`N~k&Op=VG>7ObIE~n4OEV?mCDbugtAdDR|9@nm2Q_{EW-Mbf&QCCn^ zU551ZbfjnIpp5Rt?k2#HNbBkBl`RCCACcJWpf}VLRH>M$Y)eb3;Uk!ZRJ373SScNh z0fAW-)!;5exz6N2rR_wl#ucQ;&PS9C(DFboWb19tYR4JPD66E50 z0F6yDdq3g%-KW56K|9^1&EF0)f26iqa(3N@+TV$A0{QBzIwTMTV>NB~{!~1|3hYRx zgN`CGq_N-aOLbs#qz1+I+c1$xG;}%^0oGJAqG~0Ij6~_UP2!<4Cjl=H$;Dc}x3%;J z76n(~sOkX%D!Pzqd7y+8>-d=}_gy7&Nkck*!m4&WN6l9Gp@U*m|so9TuzXy6^?lBke>+=r$b4U~ZS6B<4IqkvU2DIaU z2Hn6v2Q=ezI>swJ$6@=f;hD1}mk=kW1|%Y)j>3@FSj%fzRdg56oi>no=z31*@XX`DoGAIiYbk5=M;@%aCEt`)!L54@3a4;zhilRPJv z=`JF}V@MN^@#q07?-md6KnBJB{eOQov3O+vi24pVy{+u{U98wHXn7Oj^Q%#4@IXy~ zu6DH}uhxZ>QUkQSYi0t2Q`WioXg68GjqFG|+J0Fy6w8KvoVB~N>Je6EG~>&VYHW`; z;96xfa;^91Tw1Z>z!gkgx(DMw-G=9Syox?O-@vGWy)o$R*U;nn7x4B=uc7xFZ{m&D z-@;pO_C~K^V=#EpQVe`|J(eCzMx^!*@@fdc+9qg>?F4EM%G3mUQS!D1Xv{v6OB)r| zJvxUQY!p;lN~Ya=?3fQ>WCyAx5m~)A6=JbEZ&0n#Daf|UBo)~bRaQbvey3UjZJme5 z^+=RhH?h>2Nf;Ko2pb8&)TR)Nh7Lw!_d#Q@C=Rhs??J7OR+OH$NQR*Feq>b{QBi9} zag~l_NW!WkG10EpRr(cTku3nUJXRSArjp;w(RN@%WI1*cBocL0nl(Np-&X})TCCwV z4kwwhe+5&ouKwYavQd$butXq#wTejo-)$1{!|8NW)G6oaIO~Zuo(;>ORrc9hha_M#` z;#7nn#CZr|$S#r+nk>6QP8v5sc`hN!LN4;2@_8W^nP=g-D#K>{{&YI9nKSwKtXayU zOj!syi_T>x31!B#d6+-%U4_^rU)j(hBhj~SeNASs-5cW6O$v#nUnE~F78u4!+hm>`)!kjQ2qDfc{v zimpR8Mk|#}(*%7h`>LCQPFB{}%bJ*$$4dBidp#W>kLM!j(R_ktS6P#h?R&#bS|2Z+h}$P~%bl#JPFTEc zEbVlCbRX?EVQgxL%2AJ6*>zPW_}Mlkg3%`mKR<24KLPvly3v{m&&Q{`I_LY;AjCdx4eF(<~3>vVK3BZ=io4Ef{+9zP^d-@o%;ODvMl zNX9+uB~61wJjk#JKa*2hN6_@a&hHrA9sJvXf=UZ3{g$%#hlDjsWSGg|Wy7NyV5MZ3 zZs9<-gVxuBoq0{zQ`m-YE|%i+BZ&ykv7>~JA)OxY+ihpjchdWKW!Nl?o-_dm_w7Q^ zsUtYHZzn!pvIK9w@)}-#?gjk(pZ+)A?D01G3>bSZ<)4JxXok=ZO^6<~Eemspw2yRP`h+trc308D+J06xEoZt8vh6NOTde zOVxp6NhXAsw-G2L;_jg`nOWKhY+#QXbs!Fb>~v`)S{X~PB+2C!sStEN82fhZ#`h~$ zVcmw!I2CviQHg0NuGXSltwxPTjpW2A1f4s9&6~C&EHoS`$!Q2Udk)1#rHH>CudF(s zJ7W$ej2@50a~I;1cR#`sSui+lHWtpDr$mZ_)hYp@Z zer_e|Whl%i?d~qT0;+tJ^db^vQ^U5ETdqS%MVWFw8QEEgh>V8K;ekPK#h0Hi!_dK_ zNp4dyo@K)LsU(Z3B#Q3PVj+sBb1Cw-kjP{i1`|?|p|BrGMVb63vHW?|m<)kEEt4nn zGgGHx+B6c@3_2fW%?e%0%!NvsGKrs?y;yNE{pna{OrNE!yD=J#ID7W2;$CDo$%6b+ z5{nvoqesc(A-b<|7b!5HinmAb3_?(2#SfS zW?W6FKtysOOCFL7YfxZqLSnT8r(;SHk#9m&o&n{wE7X$&`bSFkVGH}LQ`S+*a5($9 zv_G5wE=;oSg!jfmvapG};dPd|Z!3GqOD6O(y0t34R!WkRVN7MAI6o_+4lbE1Y++k= zv?yC4IFu-`R+uT!C5yqH(wlg3FA3pH3;y;(S2wAgYs53OF+UG#$4?Gf(Kq%14)FN1 z6YL}a6aN0J9Uo_QB8hl?%nyt`Yr+56WyIgf9{4AHcqX6;KMicg&ra3jr$^lQr=woH z7+8g zOv2B8-wX4XEJj9ZB8sw7kdqRJ-CMSx&s#l}Jy@Rmx@)- zCORdpT_F|$kZO&D2RA4YUinoX6luIlDI*D%Y8#Y^^lGZcT9S&s&c^z+v%Z}$lOS~} zhq4F1PIntS!YgrIeM^brNz~my0Xtd*!DGs)416A^$Dwo&4)HUw#co(6O$EvH#PKs& zx$HX<%Svq9u?wLQ(MZcLp~ExK?P!$U2(!`?5Pb0re)wS>cJ11Oy?gg#|GtB$)#{KC zn@A9rbsqDvfaSx*?<>Uefe^|3ckuB$AK>%%KE|g@KE$HgvoLl1SeA*HLnp9#{Z?$< zya$=-#qhALS?#SPX?E%cDsG8Tk+4{{uWGidtP(BqONv-mY9yp2VdtK`2%ytCa`+@h zj+lUf14byjMLu;bl5|qiv4~R<*C8bFbVy5vyo5v)BB6_VN5ezh^XJN!35wi&L+ z-vzhhnWIkpGWaHbcGQ7C1p2U|_6a6O>ha7GokA|}k`==41FOn`o;yqNk9#fnMc8eU z6Tf?=K_RBUJ>kXw4s5}%&bHu}ht2q(JJlGxF9S=WY&fBNfDF1kLIpDHz|yRT=tp<+ z{NXJ0znqVw6g)=@GoeA7LM-$xxclhe_~QTk_g52(JXaK!|0WgCZK|VY)KGy%Mn(5M|G`<4#NbK-3puA$&TL2&OX z4Y-z#*Wi9cwS5Qq*1O0w-A1ym3u#6PVfK)Cs6=_}I{tR4v4x$io#f=^Z~IWGqGPLa zqOiI}DbVED_0eM-3I1>x!Eu;h5K|tJxf;>7Fwkesc_ejVwi<5-np|X~+O}oF7%GZa|%8Krx zu+$XnJ#Y{ggTrwA*jbDjJy~%qGRHD`;!J|Okcfm43n@s7mbq9kNA_L$x3J$z=Z&;5V>(?pe^r1sI%;SfiyMW^d52K`@49!hc{cgH! z)~i=m)r$~x*TZ3V!_$5j+WIbp71SbC--sfDp$x06*l`-8r@n)UljiXnW@6;fQQh@H zhc<59IP@6I`@D1`Qg!u+D!1Znayg1!w~?=6n=CdfQD>6b+e3F>XLQ2kkdc4}6cnnl zY10ub=665%ZacpIb`@59w+7#Sy%Jw9U5@v@-hfY*Z$nsI9yAmeZOtucX>39(OTF96 z`+rN>3#d%CT)rV`m+Z*M$WTbSMbi0G(8(rrD!q>)wnJG{*FctQYHDKNb`fvtQDqY0 z>&NaRmylVY?XGX)nuJN`Wvig6aVdGsd~{oq8_eYH&b}@~hE=v(xR}I#pt*}w2M|(y z1L3A8IIX^e&#qJ=L?+K40N!f(9S$_rUQR-p2xUEHzey;iNZ-2 zpfMmZH5(}zdANKv2JuNbNY5%oZb3CtGl~(Ln2xOcLR6|H({DA5W+yZn2Qq7&xR_pz z3u$$@O3=TW??y41zlaSgG*^!rB_#6^G`73Ao~Fl{_-X{C)Z#+68R5kqx*tDuHam*d zTBum(LM)}GR+Ls4c}{jzsrfr3z(RWKVs#r-#a?L3JkXL*jC3|B{0$+Of+8bIO0B3f z@iV3y2*|Qx_1P30jw;3W^U1iHp+mLfKDNiyVt^=_oi+5 z?6c3Xe*Jo^AxP~eNS(fP5%C%6NX||}az;D?&ddJZYq4S7dYlgk#F-N(ad`g$)T-3V zMpO$4+A~D`kDG{DbO1_Dun7cb`Fs3ig#=U_R;uh8 zCHhOki)EPA*Tl9ZN>4KEHrzn1&5vT00cF*d3c185C*jJqNH|Ik|3_l^6S>F=eM$fFW2o{R zp8Kp>3c(1mOqncc`h`elDPHcHpVC<|9ky2EPVv0VC(FCW}hGu^Q8oWOE+8@%rw8BiXxIyf?egB@4%171* zdEI>7)ulu>mQ-1A`^PbxM~}Ln+<9;xzMHp|V434V(HJpt5%wPo;rY=yG(X_|v0&5s zgE+MRJbdgEZV4WtXcS_pqa$$;&eX2E2ui3#cu_O*2*460S4?*l&+8Uq31HtpV||RT zA}bYQDIo}-&(@)W-*3Gw`={K2UFNG>Ko|ar!Phh9;%d{Jzl{pFZ=<02K2$;5kt_ge{T#MGytO|19I=)REra_ z;QjA$=u#SzN=5l=QC3w)5b`Uff&gAxrp4teQ8<3$49*0cr;1vRPd;0UAJ%QguH6Ut zxPh;ILlwUnC(p9s9ovNrURP9Z5w5At*q2d>)0GVfHQdL>>$Nyn)rE5;f~7%8h^Y1= z&vg%lu17eVScjt-7KG~WVN0GW2nRz)%NPF0oa4cW78XGrn!?)k8M32{dD^Xz+e{?M3B4$cD`%ma^7HG8cUP_1Cy|H5%2GT4ZMxAvdoAHEJ7NbSRQyUglTidS!@NLj8lo zqOf?$2RMBAFfIjOAhGYn_usF@-n|E~Z{GpllPy@eay762JDfUsR@w64yKmRvyA>Oe zU7&(&9A=W$;&jil@Xtu0UuJQ zE`%d9J`S4F68LRar8G5mLQhd=Z}cIrsu+1$Nl1^rf|RgegdRPN!jw$3`I}%e7}3;F z4^?FzvQnc_n3IIk{B+c5v~W4=(a>@qaft;eD>t&e-BQ-Bh?^+L)hLd|Bav@1zhp+-D&q7BdNb>eT%w&0ng9z1i(kDs2WOQFm8*-5@nNAk>} z2K@9?2mUemKK?1>0e%wDz}HAh$81XZn+sn2eP|Q@;gS=-4l`n6x(C}dH&9N(qqal6 zy$xycDY$p<9@*j{IpscXf^YtXe}6TxNX{Q~^CQ#}3?(A0zWpXGs0BxkA7evbr{tCj zyL=Jng8~s47>J_M3MwVqZ*L0>66-CIK0J<|>|}3w05y-FZ)i~R=;WKbkY~J!V%t6B zY1@!qLPcNWpo-pw9zEVdZ#t4UUws|D-gpxO`n-kT{qmpj>)-zxZ}jYeKm6ghc>U!U zFyM_h(D&6>@%G!pFz1~W-NaJnM2T8Y7eF^q?S#?Lgq$3b!s$!+X4y&wEQ2ltW666T z;-gQ##O5u#NH%Ac`G%FNSL5K3eF(lBh*N=was1p_91gjn5X<>$J92pw%2|z@V|6%D z)PzF*y(O+3N#;&ehzf8&!O`ey97#7RVV3(Unz5G8OQ>KgY1gw1Hk8!gL{O0f-=2;` zHUac>L<&wtX5mD9B_^-Eh;M@maka#aOC+9ECo-`+N{{cust{P#i7@_1d|fMwN!A4p zl7{1^l0~}6+yu3?fsV2fdYuhsi!9iBfO4Kssf4Kdc@KFHWY7DOat*3gbD ze5gVyF)3L{%PBxyQZmk;Kd+Rq@N4{>QQ6=tGb5J@uaT~_7%Nw-!G|AwiltvI!$-A3+KOw;X}tNpf0XKhN7k` zd#iL0g^6ofI9D$-Ih?h_c2-CikBvv=nmTdon-s{~{I{3L~*R z9SWN^b*|!CrYXZ>voLVL5dJ+CiHV6QEiF}2&&XPqigGmy^UG0LsfU>^UiKh&)!!k3 zb}5gtm`*Z_M?@yzi?6=L@#Dv_bJuok+_avgJOl5){}GA&eb(b5rM$EFT^u-Y7~8k) z!MY!|V(0FoD6h6qbxU?=)+LEW?|sPr26Q$ypfoodqehLQYZ!?gdv_xuI#L;N2w)%n zY{5KC88`rQ`QEgFLokNdFn0KOyxn^^Mvi5jzWD||8#e|kKmHIQ=g%QIIa#^Br|XKE z>e-$OiVz$ghD%p2^*!ESHqL=-aB8R|DdrfqtNfow=ikcXp9;(2xA5hL4UeU zA(jx5>CWAU5lW#N&h~csTp+FmUqY?ctO(TfqI?{`a0Ve4Pb2wiDDq+=5fyj_B^fzz zTkKF**C01L6K7BD$JrD6aQWgX96z`V!51%41gT(iwxPWX=wNZu!O0fl5{%O%Ly>e} z&2%beb35DLeKfG%B(zyaw?gQG%F&$?Kc5b5XPO6l3)^tU0(_BZM>4T9n6H1CY{N0b zLlp7v3zbdCb`aydk70Jxjk90YipcA_jS6C41_^6vPA7hIP@|B_PXqlV5iS1igdYDy zV)^^Sb^P0bzd7#2Px$vQ!<+ETNxF`}+a!;A{IB3!cqV}4azdiWe992m-yHKPLtsBS z-pcQYd+8wIbl`6T84O7?#F| zFj8G*m8cPwkdD->JUWzolvS!wLM5A)U4ooqHH^H0?v_VNt{iFT7OHA9fkM`g=$%c_ z*&Cr{tJl~&P-VG^d{u)|a>_j@sIX!6`rUZ-&0b2x*Q?LJf|rzhV86s4e)BI1vHb42 z-{XZBp2e##KCh5Uzt>(vpFX1%$8tD09f>6l6caeBHAWanDrSjLQQ5Fz!!E2@yAfxp z%CE=7vlD-V^&7Y0*zvR2v1^~=U_Sfu3miXn1VJIE=~@oq+cm3joa#Qs-hdrR#RxUt z#@VWNl8GMS`iID4<2snFN3^z4A(j#^kgUCdJ#i|mjaK2~a5a`(sz9ZyjW)Rz8MO__ zvfRhk7!&rVdl92M$oSnq6`6ziF(ORn zSY%jMQnyHmwYU`_mFd%DZbF8|W+>stl8iDoHdaYPbLPw$#Kpy+sJKAMb(WfzjT{n; zjg~@$n>ZF_v7!Gin%kc!*^jex%8`!n2?@q~@4ZK-)epl555+hFf4_l4(RbKb^d2_@118VKFxKyovD2_zz(2i^qR@jX zcRLEI%yh*bv=BGcRduMT*3w-TAUrA->$mL2J4?R6=#kSfu>VN(?K21?g|r3_!}Rf! zlrpgY2);iFE0)tK?>~W%b3rJ|$%Cm@2c1fzg!8wy-$fGZ?C7ZzxDs>*8IhsLkGX;? zCl4U@N+>)oE2=aUjOR|_^w|Rl4?T;>5E9d+Kpfk%8>)gziW5I{mKKWLE=clBXN@q*qs6flGxj7&W`{=nz_KIfHUdj-;s}owS7e}w zYl6{cLB!>7Jm|WGC%4EK{QpQo!~Vj*znWNtR3wiNF-BPd>*;t*pz+c2){sn8Y}Dnb z(dba4HKM3oi?SNCLM#%tr>CO+b7C>M+gQ5EMPqA5HSa(TZ%C=G9p#1&6jb|>Q)0xo ztG43xxB8%W@4o2y`dfJ8KQfz%2Qiq$$L$5wTf6DD4Oq)hqlyLI^BqtCEo=UxO|42EoR`@`BzIB@V7wrt&n zZbC4+oC!#Ga#va4^7tXLLWjPE0=QG6T7r4ri1n;KT` zL^u$Q4!d9%$p^Ip~huX$FD3Qc`E?{@EQz4fuNl2;d#D%hY94c+b z#6W^(yd9s#*I<5V4rW{~#Cj6W2MI>(*FV8U^L?y~$U{`6xS)1a*t?X~{X#5t4j~pd ziN!-A@uSw;1}&AC6bYU%Nd%liEbK@m6)85VW~=KaEUw#1vAJ%+?z~BLcY~#qor7c~ zG5vhhl3-K>7OlBnNvfEdU4ewuB3!$kf$(c72o8(Gxu8g@(0D{#OGR*K94-Y#;p&wn zB*f(*Gp!PJY9E2f1H0{(LM#r)UHE)YV6ohQkFH9#DsF6k4B3mjxQz9amkW)q7Afgz zSi62BHf`B~)hpMbPw&AP&~Mm}6X)U}2>Oy$S%L^i2;y3lRQP-@!(HM?#H|QnJRJ^` zs4sN?eA$B>K?K`yoSOvYy53zoV>e@{+)1DAQ!Lv+Zh7RHcW? zD481kFgqzG*vHDN`C6?N7QXg$q(Smq$(j#wD;CzHx#5YD?%v%-k=NFS8j1~-&ySdr zQWRNjsK0j?C0dO#+$r;w1N!tOxeP(Cz60?_-ywKmz(~9?d?H@x(HHaH`wZckg-EK< zA)%}ebB$m;GhGNQ? z@yafvvJPqN=qcF0?>MeqjYob)7HkF+n!SEFO;$K;d~`P}#IkkQP8`^_0jGCu#+jWP zv3u201f4vJT1^$Q3$y6LwqwgSipm39ar)3M1RmXweVaF-Dz^+;6Z@XEmBiAi5Q}V} z=42bUQNUPDvYg;9{4C9EbCR%AvW&?IAqg+ewB1Ar>sEq}F0;R0tZhdy zAFq>CN(sPaeEnjc0jXLNS;GTZTb>a6NGOf$V^$BEeC=rEJ(k>X8e(es-R>;LQu278 zO8B~@xTz$j+!kXZe0H1%wD%*)OYrudD6> zX5xAwk16SFD*4?UirsP^uZZuZ-vTlOw|E@O0}47Gx3S|k8d{o=mYf3ICr8|25z65E zf9c;}O)S3p2dMWwfQR<6kri{J^D!Ct4sQn8-qir7*{N*n+2C%1&mph1p~Zijg%)4t zR_bZbc|%1hOHxOxOuUg;>dbzqbbeIpT2QKPMj3BZp{f~~V-Z-r(nj1>#(0-oLtk4 zVvQB$H5ODFP7oERqL>0&mk;+?-R^j@F88wD!#rFAAhzSAAY(N z+ji~2;S$l? z4svD+o8POrn%wa4+{u}B0|)Z=K559Ax9+8*FA)l*8bRv~b`S;nGoKvL-Ft+!#Y-++E35Q{RK(fveff@% zkqn8+#JvoI39(F_I-P{lJ?y3s8jGyJm*Kc^V<%(y@X^XJRZ&rqvW`WDn?l1b(5<8@ zEAg{)^HEA??``NJp>z-XNpzSDIZODfO5=jw;DttQL3L#v)D%Wqwi}JX35&CVpxBJ^ zN{w>;b+ty+Y7NSBnZq#|U987W)JqB__F)OQkwtuxl1CQFRW?0Fru!b&gy&&Ja3;=` zc@b9KjLqj0F?hzuc;W34c;(H3c=6S@@%$^V>>pY`cffM%nmIhw9oAL?wpf(5bx`J$aZi57w{GP>dKn3d07C z#F!D|F`A`szmXU>eilVYEQ;xX^>xG%lBxsKxs|2ZerO*yZCj6hd$-~6ZkC-}v0?dgy7w2UxRh*mjxuAP^|+yGRm;8#6+>{RrYrY zVShhB%#AXb5l9jA;Kpq{xpN=)Nh<$AwDDh0EH1aKzP}46Z;tGmDBH=(e#;86xEtXA zaj$40mL@9OMlUU;yAwWV2Ru~0vVVi@3TUD_HaVNAiklT;(ODXx);I8mv=NvZ=vEpP zV##O4eYg2IUhF##|M=`{==pXZg;;vL{2ZS9?JpE!`ImqB7ySPBzsGBIG6Q<{!9bS& z!wDdZS7Q6Q6cS4lir6{JB@&E^qmGu>Y~`_wRESAP!}&|$2#dImGv|VF{M1EU42i;} z&}dwah{wgyt4K&mLq={6iYvQKh(E_GAsko6_mUxDQz^2`sAq3^`G)EcBz z5)@>(u%2o{cLS064uqG`I@dNM!9$Q|{TK-jLM)}4MqJEtu~X;acti>I24&$$cnMBM ztFi1%HqPYw5m@ZRXUC$j_&^vA=a3Ymwb&k`qphv`6R}k3*!V16EF=#h726$!R3uG} z)$x$!krFT=`$@_Yl2;u zM6t>O)3%md$jvEXDMWI5GU8Jbkerc@=!7^#T#v!kxCC5{Pgd4`NrKV*G8M&?4&G+E zA|FLEoo1cEii#R7#U=^2?FrNrR|#>sN|pjYNxzoAWgt$f`Mzu`?eg4)-O`SFwtJ7k z1B-k&w-7;R&*0eU>R(!Z(CpI6sjQ!{0D15JC_rdene&7TSo(jbN(*Z~>Ek#t3 z8u9vDSRUa)hzU5#_VsN+Elw7yaV)pywqeC$gSWF}my(GQk z4YV}Krb3dETEMPN$zJ-j=m|D;rd9&tEvlS$6xWc2H62K=X~kDNgYn9wPwaka=%-9=<>Cqh#i z5uIO;#8Nr}-ZQ%UzCMx!%gcu|yUnQ}GQ$To?}Ps4 zigMBrb@>7=pFfS9jr;yMe>k zH7Mr2)A8?Xt_RqdP>%!ox0GSHlgW+9(6u8xHUsFqqvXt&>6P2k2>-&rznWNVycrg% zP!Df3u?Y?WhNvJbRjipHVdA5Kf6H!>26hqy)uxfQ&cuqcH9a9{Ng5PZI6>$sx#(#* z1?Y`db|xzNN=++DRBgytw%0V@t(#k6JnF!r;pc$seHZOIq*#!KDg^4xRE=3bK0 z<<*y7MxQ?Y&~MOi44C>Z2F(2qOAkczhP9GdT&U32qrBQfV(}^jqSkvz77cJx*+~)C zWS47W=Wr5a>zjGLk^)?!?AODz&gDHHB=3G&bvr4-$knJF|OC%KvG3B^3)y3 zsccrZXO7LcBBR=mG`6~2^?l^AMU+^&OOde)RTh#am7|((s;!h&>B=MvFAqzViU4s;-aBb>O+$6QFXIj$c9}eN1HM+-Pk7izoXPWN?#cV^;V~fY@SiS_6k<^v%OoKc zS?NDRDf8yMqmYZFlo>X36c#R6thf_da}f~{p{!+*-7k}q(vX^#gMwleoFr!<79kWN z7I7?2Hl(ba3dF{xlZ1+Rje5k!CSdp8!>H8@;k2N+sU7L*naE1d#*OwHXlZDMwx$-B zgChupmGH6d9CX$`Nvz2JDB;^qwr3$0T?0_)0=8eT!?$4?d>N|8qLU??iWKC0)x5etRDu%To5I03_lPEd$t;>39fy&O*$XM(!c z4ZXRMq|!wJc#D1SAqC4Vl2x{ncP%m`2)U^-NR180xf6SFIXr~@T8&zx4JXb9;l$Bn zxN?c0A9R)kv=3`neaHGvhThYmkc#AM` z)M?E~)HfL|8vT!*he`xu)xtig%n2l2!DFYx`^&#>#r9wd`k zzK*cqgc{gcavy8bTlssBU?l~_Q

)nZp>I}#d+CuEPn%nl^hG~jG#H15>%#{Sn6 z%Y9JPAf6|1oopB121N6BudzfEP_I(`gt2jjx3lmul%ES@1CD6od(A9-uCp}4B9r+% zu1$tzsLYg2vB=m4Qg?ZcAC;;W6q8tTHC>1)Z^p7?NtnGQj1BrcdJOD~{(auU;GVBz zz?-k2&ug!v*UNM$z_Ms7c4pneiDDqA;x@7=J!>0f zGqMgitaKETrP;+grQ)h>Y(!mC6VIsyHh(LxjYLOcagtahs>{ynwi9@s7N-oGu((O4 zvN%zSq@;LSoRUt%(a6u-fLAgv(0$4JB&(~1t;8dK=*3m7iFyg%x=so2<44k$EgJ&$k@Od9#*usy{Yvv*hTJj0r zp7AvntUrsbah3QoC>bjw@{q`Wo<-4dwcH8^(Z?v!f(>n`v(shP7;x#rRjm7Z6GrtJ zhXFkYVql-a7){3_u4T;VDHt_k68iTY$@?-JLFXcnlUG9lXocR=!oI^kBEzaAToHZO zt|#Ewu_H*lei>E887R$7L~y`igoIvFBGK}5%dl_fVVvA|2yx+85PvNcmjaGq{e~4t z;b)B$HYT=FGgWc-oCXDz47E}qT6`4F6jzevTxV^Dk;2AKXRSB85F8ePFP1LD+KoGL z?9>HBMkQeDmYw+MqmPuWvCjvbMmW!5)A}E<{M&D^Xwf3{={*3wdk#j#)np2RyL6x~ zq-7V7$S9;8?MTekp@ssml5X)@O%sl$>995=7a0V5J+ah6huM1b5%dlxHuC;|w)#7q zI2MRAr!V4@&%eai-+h75v-@!2I6{pX3w>8=PZr8y>$mTuxHdu|_ z>5X_lq8Lk)G)N&PlWVX((}iQ2JIJ8XveVHR*;cORSP)g^z=7+@xOGE#Lgwwel=7GU z{nf-mmqbvr;LG4#e0(t*?*yh}VPFQ{xs-M)Dim^Dj81v5MVSYd^76%n# z@wt4=JDEX8;-=-E_&)tQ}nu<=wT;04zNt-VOWAi>l6K}F?MQY=@8hD

JIs=@fy5$dwgq%;UN%&My1Atj4)Z;w2&q^Nw@^od zxs+wZy#0}Qbxk0i-yDhGtO>zOD+2M-7YFhBhnvys^PPBm`9VDY$qw{d9)RaQID)?4 zhGXE;%b2?@njN|UIs$wxiBd>KAr`UxJ`xK_rLLKZUnWz9SQ;c_D~W~o_unHHA$)Ni zvW=~SollCB4&`a_@j4C8CORJ;r$L4i`FcIcnq=c|k#X>LrR~V1v6&9Ay2eaGP~-gh ztN8TO71*(FKhM*Q?1ExmyN!fYPY0sHwdf@5*?%1S4xFI9-;1coI20C^D2whSmfq!d zpuD04IR*JBE~jHjOQpKKg7Qk0vP-F~c9+N^3HOx=bXj>nT_Klge_HS;dB9{{%DB;E zlp?PQfynzpD$3$W7I8Jonidvi(w^@L5lO0Zau9oj6!B2G!xvdE)M z-pk7SNpwQ8_)rp2idzW@zJlEB5)|ZDqO`OQnpzhc2_Q0Q@1UEPc@_uVpO?g)kzGV( zx)Cc^uEf=AmvQ>caje;}4OJQg(y|Ja`92|*qeo6Fi6=YS?<&M{;&cddi?no&kJzqB z`jUE{ZCb*OW%yBchPAgpMm1e(NRdg2Dw1t_Wl`^lcbDVE;WP1k|M7Tf@C3XzYAT*1 z0sM2X!T7_dN%+;kx%hZjD2n-c0jGocW+e0bWyG9#*?^8jU=U$(`yq4=KU8%#WMvfN z#I7@#Gj0I}_WCzsk^FAs$4)1?Ol4h-VI?s}(1DDJT#Z&Yi`!%^NYGZ+D8RfdhtN^vKD4KM6&}dYr!yL;N!m zM;dYAauQZ-I)RiD7b0?P_;6P+rhk7NpB;@xNM!>`=vuUNRyJ=d@zH@D#}DDlH7jxW z&}jq)gy6joKEkAFV&le*3h5m=bsA;7hT|o- zP{@0B+;R^qGK`2NdF@PdW5L-h>?vzQNJ$&=Ni>7q*Pgvq3X`H zrPA6^qH!Wy->U3qKl^Mc&gZ#cqQeozAjLqtX&^AE90YtST$S04YJ&qMIwy+iJjhmi z@Y%Y9c!P@O%^tn*(ZV^%jlF_!+TSxf*WrtI=Hcbv`~rjCdL7UG@)vmXg%>fXSAX>A zKLMi`uEg>K(YRJ5xwUL4A`2Im*F$5ti7Ig~mUb4ZYWjGYI}%q?PttHv-8rbhgj8IO zw8?&|c-fDEfa#(tw^7ae+MmEeAkf>pK!ZYX6;Qo_Ms{vl4BF5pYQG&Gey^dO$7Tm{ z_#U91>cnEa1HGQE#&JhUu6L=(g`uBqLEra(z?&mSW9qcgIJ9FW&K}u>fWVX3uw^^m z8aNJPrY**pNd(ZLlQCk-0%hyv5B7yC(L6?~IwKXG>?Bucy@#d_HcF2Vb?iWHDp$SE zj+UkyBow-m|Dd=PxAK>ZwMB+K>Eft*Wj}g9+lNx9`06F1%=eIF!Oys5_(DR2tEjg3 zAn?q7oIbh}rw<*)b*jJM&=5Kn4eLdZ&}%^m3qFH$RGy*1XQ@8VW5e$4xRQ_vf7d;@ zTkk`o^&=&r9O)TJ(AL(l-Dz-vzX2nawEVNjPQs!|bQD8|W7;U$ z`{iSd9=ilnrhQ5hn2V9a=}e|Bpu?C&5}1jZ(-&dv=xLZbSyJFH#`tkFFlEwQ0^JPd zb$M;pjK#|5M^2oMNwXGWG+oKWDf2LX;%qvWxfnilA|{NXdl^T!#Lr3Yvfc#IIkOj{ zxVRizO&yM%JdK3xER4B2Y#bK+5y1WK?=~+s-7;p~JSFYmS zMem|V-$Cd)yl3Ldl}Kf%D>ES)>e75=F=u&x8SCdE zjK*dJojQP12Y2A=m0+s(BXmO-mCx@!cM?VBT0|zqV(AxD>KnIU-?p9j@Q3fP=HOne zTd@vRg;jJSW>`H=w0S9*&9`8tc+^rjrjv9f{I3TH2c zV(F??c=y8(@WTd)BHe|Zd-u@2oJ2s-IUGH4io)m+<}ZE^Q>M?wWZAlU;rm##ZW~F6 zF14}_*}3H?wcSOj^)3#cPsi+!wjiOkdI^F8(a%2^y<681n1YV8CiYmXWZudbYYi+&>165KjRe*?hSzM7bs(|{nx~mW)5>G< zM%H)FC0XeB+zpT5bpb6ruFppm>9~y=A(lcHdh=Xgobd$)NaWGHNeBzvhtR;iNKA^M zI?ct@`5$B8=ouI}elB|U8;f4UCZYed`B*~r7_Gkv7wg^1`=e@LN8vS?ophZ|t+3Ep zX{gW|{2fZ#ZWqbmKPvwonf!VA&xpnDmU)85RNk^5#eEc(RN(O81Bj0eK|yvLawHv0 zWDFZ^Fdb?g>qdv*2m(*!C1j*tM`n5))p;1!@7j*A*f@CFc}^r2NwZN>U?Qnh!(h}Z z#1a;lg3yF)914oS@QHKq@~gctcKAq4C2-9iH5LoTPr_6x#_=O&VAPm*Fl5*~g-C=T zq)g^_CXpB>P3SK2+USvVB2(sL+?eSKvB;woAs_kfI0D9q3DYoQ9EoVgB8(()2?duHc7lcb7HwksV8#_4GU>d%{JghG zUiXt+I?#IKKHAu}CCaX$y-QKC?|t+kf-YTDcI1?-00993IC$_N0dXqc?%NM<^&5yc zdiNv2^ic>!2)C}yG}aA@ZtBt|AerK^S3WPsn+3O@;?jzkhg$G`e&A=X_lLm}%{ZMz3! zbpwe=&)=wpiVm@`ss=HssqBjxifhiu$yOp0yPszvIxZd&Q8CEQD?(;Yk&-|(C$9`C z>G>!qszxn^ozCFGk;}PAsq`Z*&yEA<(vYX2gJORzq53QJ+#-Qx!RUCR1XUE%AT;rQ z`|KUi)YQ_o+hB6(P^cYD_=vUR<5$5w8n~pN*lgivzJzRIBj$vto~*x;;B|bPaaUp zjSq>x9`AA2V!HVwz3|~ybcRHtFE3m zhK++F9cFf59hIAk?nU23i!C>epR@9H`A!klNgcl<(Q+Es4b<>^S80a_FItV4$A5_7 zX!^Ix$%!RnEHCksvE91h4;tNdC|A?~%!$7l(v>3J402u}Icj zC0ek7?yf;Lb9?k-Zl%Z2xjGOLmyV_1t-=AS#-Iy<2s#svb*pz^?S`EwBCwWLR$~{H z-@#pb2|&R(bM!biuU(J#KmG#eE?tF-K-0U+=#X1X2Y)?WMvd@pCZ)p}~N=2@0 zHpP1-i`4S;^{8;PLGA5=nu3K7sIfL7#r_akUdd8@3xzHUIliuHddU0TjBI@ua)}UC ze7}}$Oaz9E)wB5{(eMbx6ftddtw#@@CP~i1f_WcdigU+cs7-o%oHi?Cz+J_Me>jDU+#*mEclD}UHU5G_;I zedsh+WYdYoUQIx1TqZ6CUO~X=FwB_xF5c`j25MC@=-+n~A4j0~z=?E$ z3vv4V6`Z+nS;)Yj7& zv*Rq{tT$2aeMl1TLPdoG`T4cT%Tpn@NR7>_%3Jo47*PL{hQ0K7g&`F^cqel+5TW z)Q_PJyd=#R`!hkA#NzuMC*?~1lCj1a* zz?Kvn4&*oD`zSs3W;NoPg>8y$rNQY(3x$aN#yw^GXR}k%B~cLaH`NXbY>H?Z)^=E2 z2)=M0{yRLQV2Wq|^B{O#Pn{i>NYnEpJ{86!(<--uFrWq5);qxW) zF>CZ-yf=M3-k&=Y6NU}J%<*HXeuiR5uigX_63ftOnECN0Y&n~X#HwbLsT?FeH_63| z>e_nL)VXPk`KYrhap!rZHOMKhLT<4}i58O(;8Ll%FJ7e>E}7kl)>oGBA<=_mnd^-?Tf`Xvq>Jc=bBeT}hG=3?CF@fbO5 z6o!o$g8^eF;=L{B5Lw-*?Ael#Q;T&$`B;96cDb+?m)Oz6DjQMFc9C4uiqtYM388y( z{x6k(k4*l&{Aa{s^*`bJk~-wR5{jOZTZWZuH)7+abxK+K8HK>u+4y$FI;iXDK=ek1 zSeAeJHMXtagw@}EhYuDl!8`ANf-6x;@XGHr+(%RW6Ew4~yq*TwT|N?N6S7#(KODY{ z=pqZw#TH}Ljx!iGW|l$-qXrF87R!#Odl6z8IefA*TqVRYm^$$yH1v9{ z7Y4l52ZP@3g8{6=A-(!4Br~G_AdDU|OiAW>?8s^4_0YHoXfODTN3+cNO#Jd_u>)0K>=4BZ*JL*ipPsBc@{5;E5PSS2_>lTwh~5$)O$>i%mEbUx|HJOR)D!F;<3U;_Hhk_~BX!J_|_3 zuHY8{EQAoB$5h>V)=e` zwS&&k&1>?~F|p6rcA%oJ11?^ZxA_S)#0Vi4Go3k&A8LHS+*Be4jn2)X?G z|Nd%XiRZCD3MUwx?JchHj2IlG<6sLtjT@ZunvJB`oh0x^0B0VBNiOMKY>5)yF z_3gEC5{s`}vHKpvBH2D&w_)|%A;?QY#5Nf9Zq#XQsHrsb#+Xq==3nvsZVc}`7(;va zNB`bz@csJY&FBAs!Ee8TF(i{gy?bM5-@fSEqX!*J9}K6B??nYP>!bD9!A6!u6;nZw zuU1)5S!0BTWKvR5gG#jq*AwD!Hs~Bd>>9T2+JT+>4j}wmG_KQ zcVsu!*=f{}@uTvnPH0UorBcP{=@jh1vG_V9=NKtesid*sh$Z`bLhgR4(NyBeFk9qV_Uon zaW!;R{|;IF|57}Svd%&ZpR>r?0$KFxXnF)2U5Y^_ig|yHRFv+HC#W`fu=~&{Y~8*K z-~X^4pMSjplV*K@U55je2s39xJ5^~2zWwq$C1K^JwOjGc7t66_`$1G_Y-pzscSuO6 z_W?mgQnPpOS7L5_f=bszY&oBeBrS!Dx)VpJR6kz54{Np_#k!3a*LY{~2beu;0c1PlxpNj_;evOuV)+^>_^J5h<1exNyYJ~zCMb`ee)5$P1hDMe zRd{#FM@ppE7oUHPd2<(HF;)B5JnrIIbFuWpPq6H>FY)f2`B=Mp6TVx$9iM!+gKaM! z3F>yl>K|akH7$op$#Ja8O7J9HjNbi=^}(F1W5mAsA;o?~s(eY$cIrR@CJ`55&CO4)%`c96|1vEtbI zM7D(p_Nfclu;m2SZ90lo>knZ0h67l=D*&4ghvMS(JQS+zFcNhoKtzIMM8M{;T_u=1 z6!%}{xQp?}b1`5?EWSLNi)|4qthlPpBns!wCgJ3hH8zzN4Ro14(+#Z`<84^9v<$&a!eCnQzCC-P&)aXI*DKGX=S$Dwtyf;g z>o2^3H&}YS_#*mKVTon$LCZb!!*zcmma+<3QX6yr(Gn9omCrN?mfz* z&XJ4rJ7`lMrMGB-^r^vG{Z$_GL7ILKm_l<9}HG9Wwdz@}Cil-v3D1 zR>91_om4;NwGM3FbqGJK-GCLV)?mxdQ}}r4dYq?Pw)kX@s}Yw%uVKYEtFdSMK5XB# z3*UXc3P-4(jgDq?@SJ6Bjhpo*Lq=X%BSm1)y6&LD`2gE4=3#$CISx^@?7WzTW1*>t z%P3cpJ8s>y6;a_4xO_2~gtZQ7iOD!|{44=rAJS5@v2X8T96fRh$w?VX$Z{yvtvp}7 zY8?{dQxSAN1iN<~KvH75@;!N;k)DI~bXG?X9Y*5ySnS)n1JR-3$WP0}j&+-m5R;0? zm~5P&THb##4F|53VfS?nzCB-rW4R3qvFO|#id*;a9yujY#P)Q znvZX;S7SzKDb`kXDp`7K?YB|wBv4nj;>$e*-or^a7E_CW1U=qeb^yJG&c*Yu490K& z*bBemPev8D1ZGTcBWOK73$MMZ3DFuK z(!Cvs^R{9y#oyFW0&tB5c55@5D15A@4%9ktE5pPY4L4Z2kZtiJ;93er$$Y%|#$Y-t z2`8V2$ur-$tLQQTY7z{l53zd*8X|p5{(> z2b{!-nHl0Rc9IS=IkDrIV`gS1Nw&~pW@g4MZEa>0vt?VBZFziSmaMcp9XRLq>384u zZ+dUlu3fcit-0nHqiU_WR^ju{wvhOJK?VFg749O;n)wnH?u(c?^Lfmh_cG?rc@dK* zFT}WUb8v{jTFAIiVeUhfwV&78fu^pjRC^sTT3iGfX=~ucqO17*$x?ir*oI36_GQM7 za(6Qt9E}JFx`3U#H^FYyqS;3B<@KP=?cm=U?BBWu;g?Rs@6;h|T(bgOPMpQ=JA}TuRqiU=Ruf?7;GtL*BqlZmfp8t_Zl!o^qSeCpOrF+g>xW;vx}~nWHQq^La=v z9fZKa4q%XElpaa#(obMv;}Tf3bU=gF1FhPrEOb>t`B*?Xx@6rUOqwto#sgac^qdAi8w-8v_LBVEp5} zuJPkAW6UE|F^^-;lnIzKa~3{XcM73dIuuvAP|J$lm+HXbEU%Jqu86F3XLbvgUT%O- z30XdU!%gt`Df=NXx!1h(0dKS1zPX_cSa1?p95Nie?Ix^br;>}zOaF6r44}F5I_euu z*t6#Vwr|=@+k($mt-)VD`3x5>heBhs!Q^z}a%6# zW4%tW>Q^S+>Ul013?f5Ai7il*X~k7E;ZnK|0T~(ur8gily%K48)ksOt$NoM0k)4{Z z0L!7>`%sjVhvO&DvU8t6W>!9q96g1z=lzh8m4_W965)}th)YOOKFgXjeiz9&j}v&( zvvK;Yk7Bt+)!4cBIL=-OM0#o-4jwp$=!iHJ=9Tb#hmb&EiHT?bh{=Y3Odc*o6(A_H z5x(gfWa|1D*r`06z3fYaXr)iM$r@c$4gxYpUXMJZ3zHE#+BO*2XKFi!6w|OyOC7zq zoYR1$Vl&+Kesr@R$wT?-Iyd~&RLXMH)dZqA28D7Gw<>~2M6CyLwyRj0T#ZAG?JzoA zY{z!k`i4-+{&zG*g%jy&_)%T^<{7Z%Y$#s(@GHz*xQKmd5`O!@L-_6ew1-Ax)YN&H z_r+O!xHk=3sQ^x=dT}wk4VCucvdeWyT9-cW5N@(8efH~UH}s*)bRBkf08>pD((}y- zjjcprL>4Ur7edMSFmbItZFKfWR#h%p^o7C ztWPPn)ZRc*V<#-tdT3I^ph^seZ{%eJC&nN%IvAGPQe5qAL%q|69sJFda}CHWtAe^g zk7g1YRaHIGlhTovoT3aF_PcliNimU#@bkkP^B3a5|NejD@!$Ue(?sZDab%3<797>3k{T!MYRKXHpPx#?@eIer83QLM3=DyxMG9N zt0&1lhz%=0guONkbx8rxXGfq@TY^Ea1}C42v+elrVHW%< zfpO14Wl1t4b7p+2x{*g8+8F1-Q|HR?Wo8TZR$s$q%^=KHAU2{5w@B<1xVXW>o>dQ*ds;xzHLm6o17~_7!c#MlPC5Ho zP|kk+mOV-T*U}kVrxaAv0VX{ zDbFs(qqE*7vv~?L#!kl^g5$XR{)7j9^Lso@aCzuYRAdi7goRVbD~e_6*wL6iWh#N? zv;r(8Rc@%s=1%0bDp`^x`)MGV$EFk~{K%`!+ZB*`^L=(4G6-fEj!rG`w@IO0^3-wgNKhRYs_rev<>HdE-4c(WxL;{ zAnZGE1bg-!!bSgJWf_H|$4}#8P&5u6J&zNod=cOuhCRCv;Owaj@b?YGk%K1?9u|k7 z%khXyD@Cc=i#jr5D}BF)?O#v7x5wgobvOizV*qydZK_4~JI2lz8J$e=*>b$}m$xuu z!4sIlAUps0m+_a+zriO5GI5%|6jFHuDLNpJ0Z2fIlsf@ZU zS8>%j1SeUQt-cRxf=n@qUTLiZRcaUVYfZ?nw3>rC*r@c_LGXaQ$uQ8S^*AdogKGGS!g--}1a?O4{gCg9r~Uz#x4`fs28E5LmQ& zvPf$a93C0AC~IXi7}2T4R2QJJG7jAyDi%<0-XVnt>B~?v zu6SyZl5iR6)f&W;alLz~5WXdLo=w;FC|j z!Ka@s$J%eVDgox$i4(NrSWkxti%mjNjREOp2GlYzDXkWh{=5wL&3X%CWEtk9}k`Mn5j4PZOALsp|ZvWzZ?gm zs=HYxFJem@S)MLb(viyb0}Qz4VSs28Banzmt}d~TL3nAN4hC<}aLOHdm@nJp-QIjv z`CU`%pkgvp+(R&N5ln_n^2l-jc9M~%PIPzop{Jt@#d!tn1WT~}+qKxYh2XtwBX+aX z@7lQmRb_cFYHE>|7>&dGcfsfU86~~^3D&iw!;g$jfz{gyn>>r@k+eWpVQRS!n@l2P zkhGA=8|agIdHz7+WAicyS(=cWQ;ahw&cW~8MTGcY#^HTOaA5y2TsZHKoqG<#_fiPX z`S|0|(bMp`7>whm&STroeYhaEz78C{``sz!`{2-Mz^q#uAi*NIs%)UPem!g(APW7Dj6`tj-Shn=5d7dkM%_(84-uZM%kcDi>KF zzPSUyKB9Pm>(4kE-Ve zR5~|-h+tA>Mnstr;YB)v)ipG^2JWVTA4GnI2USG41_DnV0Yz2{OeYcAkkgD;&J^IC zfNI75d?W$WmmS8uulHi=XIt>_8!IsJlP#F|`EES+>26G3dmiIfoWyIVQt;+PHnZ3 zqz`h*5cP*wz_jye zn0Gycv_l^u<=_X%TJ;n%S3HTL{hy%pGJ!?~ymq`0CAB*2-Fpx*(Q$~0h(dl^GI~5# zq(%kc#O{r#%}<59p%Q1dZNjua{SgoT&;N;Wqefx!>=~FkcNS*MoP;@Zr(*tsnY3B_ zJPk8vP386}m^pJAiQxo{8#hK7;32oF<$b||1(-Bx62AE23s{QcQIi;ez56$k%&ve& zQ;g`#XR-R@H?Z=FL0RMuHhQENeAy&HMz79^93e!TS@9-jX)9-g)kDU9XgBCX995W;8|?gxIm*Zm9V&Lzq9))%jt)_^UZiL{kV;@IBlx7&G$SNSi_4`pgjYC_ zQK>_o%7T1K|FdzW82!v=_|=qG@%Z#-F@EAq1z2X0>4*%ULWVze>==w4^$_M!PRkJ2 zd9&x>nde`@7h8Q9ggmIIcA&Q2i=@Wu$S~eUHS4w1O2x?XG|(S3WO^!tOxpZuU};7CM9#N(1*2>*^pVsaJ& zf+CTWnv2-PEJVj;pju^wjiBP7@^6+oKX*aJr@yjPaz%QP7 zAOCIk8~C>;KES^&`V{}|$uIE#dG>3J`Q`++=Gw6#O^+p^#RxO?BiVTkXR@oPvU*YN zYC@IGjw(A9hPN464O)~sn@~)UXmnkL-rkRTy_5dZ12ey`Gn!y*mPE07G*W%E((mkM zuVO}%8%7t^41KwppsF^sqo%=&Z^H6$zMk>n;(3(qTnzQbd1%}?AF;dMLj0b0khk_Z z1zgg%yotmU8?dkVD&D(Lg`CnlWnNKfX$A5!*TL_Fk$jJ!fb%fJ50}&8) z0c&=z#Lkmjalz*#%1Wz|QfS7JbUP-VtHZOgUK}nhMUcsaC7HQcTdKwZeGitAaDKv= z^dZ4yZIvB6(yCCwx=l+i#+ANn!@zQ#!A-#BM_&Ihu!K^1Ja?`T{xu!26U;hVI>|1~ zFluX|Yp6n6F()Z+60AcSEN&GFV8u7P$>HgjRNR3N2-> zij$vfoL68agEKM!inO=1QF4+!TF6T4t=CY+#;oOas&wpZ#vYtXs>8T9*W$6)R^Z{; z&tv>dnTb3BGp9}dXYS2q6mibSjlf0yxMMY zzhU#V3E*5qAC*OWTMq+f6FOQukdcw0Wc8KXO<|ES$j{D1bZ`*Xf4vOGS`~Vm+OTuO zX88O2BR97IF)@kA$}GU?V?KzFN=GOCugTR5hqZ%2^d=d-OdhtZbg%68UghxZyfn{Ft|MN+mK$>?P+fkl$L zvi?m3B`dGf#$%WWNTO&2d>o#uN`h3GpzLAaZ={*nrK{&K z$Y_Bsy9T{ZJvy7+=;-Kx+Dx)#aKhDbRq2n*R(*>plc(XaM@C^HnfJKI$B?{@$7AEh zQ%O(9*=G7b~Nhr=XU-kQo_(9~>N_uE-cxgxrOtozZ@<99zr7#hAAAhc zr_Y8gH9eakvS8jUJo&_YJhf;67S5l`zBmgrr%lI7i~#ltSx%uKHybsD`LH!MpfHah+z8B1Z^mymWHYO6EW{lDi-Ze!4vzE@o}6QZ-$oQrf#HB>IRm(u;h3&URt>q&o5qu zX|v|Dp{8K|jOmz67XRqOk6`?mvC4CnF;py*#!kensk1SC(Hofa>N2c49D{h4wWP+1 zG6voTbvxAR4j9edN~Twvqm!RoV6wEqYVQISJiN_hOhgEmXMn-#HoE(U(8i$UZtg@^ zS1;@~7n%qxl95(Mws{EV7Is=AO)rh-C5z@-=yZ!G4|rnDYE4r50@stl(dN06C3W;(BNmXd0G z;=HFY^^Mgy9$%w?W@&{<0hL0{6?RTLEH*D0;uSPFSY|T5mZtun1r|H^5ik+6%EME( zjpQI}WF6^vjGqIR)|NhWbzY%b>BKd%ox(!0EFT|boqPwurn{q+&RtGswhx-hDzsRg zIIwM(k^#7{?<)GQ48ZAVM)0L@q!0`QSUOs+qsh|;8&#OI>lVx`n>^ID^4-a6aWd$- zsA{||y>PqQP$`KlQ*x9wG-SR;N=gCpi&RL@Do1W%73w8_RY4{4i)&C?saAlakW99i z<4GOaJ$qK8Klpo3I`6y?gYczSF z(mP9d(pwV7GUY1zqB?{EmCDjom!|obo@?B;E{xm z7J`dKvQ$td8|ZIZ7q6MVC(9AI>0{(%DDpB$c<-R*F0fDxf#QJ*Nmkz!Vgnf5K&Mp= zcVi{8QWBxjXq4OLCU*xSlXGz~EFPbI^$o_4n}|n8J&5s-k5)+Bm@#88dh9ri8Bc#4 zyAV&#{R_^Wia=Sh5msZj0xGS|*WfgH(dlSGhs_OBO${2!j*Bxg5#)0b!566nFGnM- zScPhX2bHyTC@(KYTuc})`JPdhK}b%^B>1PpO24fst5CqDC@)`0^0;B!KKM};#)l`s z&iYMaU1#eETE2UrIq){zhZe$nWD)AleT>SJ@4>$7Ss1rIftt-vB7g5&$gXZdjfFt1 z7lI{g({!P!gJ9o9V(hW9ztj@c5^+A@3_kwyBRuxlBY5PG4`B2k9-@u-y@hmbp|%A zScBk*82XA$nXl8;)`BjV16^(>I$KE`7)O>gJ*RgMEYif&+2 z&K10$=D>=|K75ts!Qvz<)}(u|DZd@dvTRsg=*0R=3-;u?usz9+a}~F7g6$v60Piug zt(?P?aJ^KmI{Ji`CJ!(~?do`bay?vkT|-((4BC6z6krih`R4))3-gL^5iV5`1XvJ{ zV}Oj3Y>Up@>;-Hdf(;$Lh0LqN!{4yu=*YaH=%TZY(A}`jBF?*qBewU#Kjj zI(GC}Or9`Rd5HGZUzXsRkGJF7GZ~1l>qDuwm4MX&6;EET>4C-|6Rr9g0Q$-NhEsFP znh)|oRZ_(}C8Y}$hDQmSlJQt(;CG^>t)FV8pFnd9?j~93ZwMq>?Bs*W3~?9PrcF|F zNXi=0L`nPYZoUD7xfd3DKh&l!2A+1*YMW5e;A97B#nEI9Uftr4RTuN{>KAJJCX&-IE@r*{)$?;SURA{b3WoDVp z9yGBXW$g*cBj#nmZy^}|M}S3cg~@(a26Mf=0~&&^R*W9+X1j?w+Xrd47})RdSY*wu zL-3MuH_=a82{N*n&L6n~rt{Spo763C_cc zM(-qXAd_zEy9qM`sNLOz4iX(VeY=_0-Av!Kxw@%%1{IUFQJT0-zPA&+Y^qyuOw}mRErAzs3 z6OZq8b01!dheXD~&g^O-a1v@T^QJNhv6Vj8+`=H>q0fl|;Wb-W?-kbT z2+nsRsH_d)>gzb0??DD5MNmx(4ri$0Tj9i>6dlf#G*PK^Au=Qq&n$WYufO&l!b9Vc zo|=z~zL#<2&>6h{)`yt%_(V(?Jr0u|8;{2ydRQ3@BikmAnTRK4fv$-&uwv<21P8`Y z%@@HxFc!P_okUb@3OYMGVYiqN7Zrj40!F~4vp9YB2o43=3$5QLum!&fcldj-By5BxVkNo*KS58>r*H>;iW1)sP>^4)OkrrObr8^RC<$2& zZWrU6oiWNnvZz66NfyGBBCul98jPDX5r6#seR%L!zr(2C+=r=Cr(*v6`Is|v4i?T` zh^H1lg{Pl*8c)o70`mwsv!~CYLLs4@JcCAHnJ^7ANpNRRo6FDBG3JqR`0X!#k14Yj z;*?(~ve_>x8(k!XCUi*tL5oXS{nN|7+Ux)>u%9f>Zo!6<+xQ}}9dDOFUTB*o9N3J`__dXr=!eS`i%*jh^c=+?YslL!Pz#6)(R3`p2KK z5EKMhf>i_rG9r(Iozs02ZDdQW&1CG>A-IWpZmN$qb{3DUTE_qr%YDCythonRq|*-r zi)1e~kkJdUG{~&@dN(Q=bn+U>q^g?m*`5GQd;Kd+eD-x^-TU|7_zT{B^(Fk}1p>%| zCzNL`QzuTwM5+}5mU(lZ#G+Rh888VNR@YT->w(414kKyso$Y9CXOI!FabH6-uhr8`Wnz~# zM}~o=i2=H``zAjNGm@ahpvM5|BKSytGObk}Qu11jZOCAGWMQvGD^B3eogtX{@&}kY zYc8Id$Lp9n7BeP|!*n|NV~;#ar=E-Xljz737m_W#iYH!w4~v%V$JsmsY8pMtGQg$k zD`>Qnjaa;j>6`>Of_tl^xNqwHSzwXB&=gG{%ioEqmr>@^B%nYm-jI7u?Y&OOn!U< z9(!<KODVq44e0D$DD=p z@#|my3ito}Z!r4z_bU(I<+;h68FMgy_5uRRA}pG}2n*&cpdyi5UUQZAIWy*x2+HUA z3aH2`nF2K9A7gBy;(PbwuW7NGce64)wCT!i zvVwN>v~{D2vfsgul|=hEpd5Z>&C0?+%G%FVH8wI?i?ttS%T-wPR0aA@m^7`ZZ)``o zx*aLiP55B#G5lfDQ~3R(6R~Oi259JXs^VN^P)2XxuwHpsKYuov1lfZkLnqI}#D#BT z?mHW?`b;*$D|?Vt=S2m9s*Y+!OW zAncUPz%*sF6oZsQ-Y4(?ad=thjH8#^OvaQ};|@w=zK#)Fd=DNEn_9^8)O+rP!$&Fip!)k-CW$ozRv z;n~RxvEZ@UWJe1z1wcO!qxLwt7!k3n;G5Lgvpku^UU?1W4R$nvwD^sTF8fn{{)1KCcTENH>TkZMrPBZHDZ)HsNx;l=nWEFTAoO*mU=$9Y~;G24lP2^uHs zn+|Vb5N+piy##(yij3#VS|cjQO;lJ0l^j`R&YMbN&vL5K2DYbx=u&TQLZi)r8iNVd zRCPsVI%P2@1C>#uzF7(SRuT&*RjV?Ln!eu5YZD-_5}3vJo7<^)NI+~XhnRBflYn4t zxeiHCs4FtU2-M;`Vss(LR8hnFhZ zBa64L)7^IbMF_WxVpn>v&f(9IV=focwyI>h!27&4)c=Ka3Gy!W8>HEXkk1 zoU#tJ;Y;8Qd>_t$_hE=#f&zj|VL=IG3Fqpn2E;@sA}uc)p>ZKdOAJ9nVJhOz9!B`_ zy-1A>LTyPlwtu?{WA6V0#{Blzm^SKuOq~2MX3ic>`X+ZiE?Ia3Dj2JocZ9Mg3TwZo`}LM!a;{hS?!{+{ak@r;uVS3MfDr2|dFl zww+5s5aY~o5|8)P{dgv~1utiI;@v#{zH$JI3wyA-0QgH#A0F{FV?wA6AC=t18mgNw zQw-RgT(2xb=3oqHvbG{6HUaJZ-MBV%0~jP$2yFbw>mLS|cmmg(7b_7&6(C9OWL;{f zy%`p}2U@cYHAXiK>}WQF6=t0owRC_6S07U7@Lz`2;bQr{z|#L6uvi3G$h<7Nc1qo5 zR5D5w*EJ)fz6~FKdjj`Od=d|gpMekFc^Bn*S;$R_L0VKO4)57RhA7#Y2H!%&Hw+-Zu?;o49;kG^3b51@z;t9TP6k(_lVD?RBd}Z}$jCxg z{R{+GlwhE>c2iwY)wnxgVW(;Bp(1N0*pOki@cM;8QvIWo0nkfz)6T%%N~YUJU}+`D zddM_e$)?-bp-qgmW-?_R!KudBj1sjAsm1{uPd8)KE8pUO%={4J=Dv(~-+dRMXXF;a zCWQE$K}2wnvJS}XnG5j7{Fkw49D#G}42+cp&A!}$L+SM>q*|%cHla#)lfXsi&^4ih z!IH5PdIl>BBv=Ggeg;_Nd-*KiiAs_ET6^!1feYZuJ^h~s7L#KDI$6Q8X$Xz{yPD^( zW$-&*=EbGP>!_fv&Zn~560TC#@Ssnlh|1z%nG5?$tf-(57ShLj^K{5iwSeviCj%^T zUs>W>>RGZVdl`foyP&@*{SKX+0+(MbA zgX*w}AaG5&)uv*#CO8WOI*6roG>j=?Y#RXLt&Z;^QMex34xP#rfUNm^A?pSZKHj9>wFD;*}J*N^z z1`>;-9s3WR#ezjIVG{e$!Y5wDq9Nkq4#b5eL>)hf z&_jC=c#e6*sEJ+_j8^1~cmgcZe;SKo+rueUsAF&jf8M&ydZA86Fhjrg>#)chRvHQqQ zloll6MynM`KF4uk$G6B&k3n~n4QCGR!~MVfH~ith|6iE&z#kM~nYUn)a=U9-kx->j zoy?v-TLG2@bLQg71tfh0mN_%0hw27FX}1N)r7=j?dLEWiiR zw=gNR2~TGBVYLC+Wuz*~b78Lx0%{#%{O*I(;6ZXs96GP|;HKb&K*kNhj30je%MI=% zCOhAv$-nPjL>9f;1c#{!%?wH{u4`oB4502iiZzj81~EXrbV-jGO+W12y=ZI*MtkjL zG^d|NSDr7-rRgvhr$JL32xomPY-MrKWv3%ihBjVmL_iUpkb%NXBsP=r8Jc8atUff7 z$!QoV>W!UfF!rIEAXBR8L^hfDCu_E0{6xtKHWllatw2#mDyqtpk&ohj!S3vBgF40qGB&1B;o>If9EYc^WqD5@u^u@IDIVUPn?WrXFQ9~mu^Q` zwgHLy8`v9VfPZEW_6F$@QFR*ytnMDHngUD&DtYcC*4l9$ZQX-xTL!)s0>U70KEDa?9L_{QJrxCkB#CvhC8`*C z3~q%iR|MtAXTjyzl<7b*eYb)HDX@qjLtrOIfvuJ0WWbcPCk6(6XV(w`h3DqB5+cvJ ztV*cJmYoC!we5;>ORShG=R{m79IOKifg`W147sJH@IQGL!DoG-E~|p7tWsIgv4yHe zChN+?ORofPl7S23%mDjLSXO(geN7Uj>7;L zRXA1Ji_3ahqo)HWqUunty9zJKOOsrOb%6d#)x&x*vy8f?n@akeB3%~(QtD94`jN?w zzQqQ_u^$z&ev8_vRN1wQ2;zsb%Ta4!fAijgiX<`J)PglZF<5dw7#B(!urHwy=hJHN z{O3FH?J`XOUg6N4>WX6~;C!UArGE*6u=dOsX;reHjDsiL-tvB|sE6R3WcE87)!EVGH^k znt)GX30sQJh!4>n^)Xt*zk-8ik6ni1sLxScnt`(FD&&?_;$lby(sS~WQ&6NVH=LWB zi{OBZ*tBj9zFzz(meLl?nSlrX_5I*)yh*;1Y=E4u3au+7vwU&;xjo3h1Thp2VjgzKf0PH{jICGYAe2 zWxWK!C*Tqy65_CF=YIN3J=O9ZlBXfmH>u0GOWsr6Qr$ zU%7)y#$pfqQ&LPO`_dI#IlltR;EVM;$)M(9*5ny@ap65Om`1TX5Uhy85z4anl{7gLk z%tFj#L(iNtS(*PaW9-~vVDV2ve7y(xY7Z4lGfc)VXbCVjdj|@NYLwxPK7K(scH%r% zuHJ+dE4SdpiA(VD4aealK3KhG3-%v8j&nX2;CqQO)#^nyJ8q<=3;R-ZxK!7Vb7dX4 zly5}}qj!qqCN{^F<7`bo&evT-P}LPB31v#9373*e;71m|J*ft#;>(dx>p&iGFZAMtp0CogxaVnz)C&*I$Yr4SVAtc=Z3!Ti~B+5n9$)Ex- z4zhIl{I?+U!}fE)(%dei<$6J}1`8cGLw8L9mc1EX9L?{+NqX|}f-5*jbwXv1Jo?kI zGA*`bJ8-nR5638DP8IjSztDmj1}e#dEx=-79ZI4`N9Qf*JXb&$1y6%=mf@1DOF{KP zL8Uxjk=tWQ_090lX@o4<-DqsZg}^|Z4+ucirC>z(1t2Lr8Yd4N#?d1u;r8~xOP_R+ zb&Cq}wA>=F+~)QxFg9I99nT-G?SXHl8+z_1w;l8Z%nBYmMbn33>or8D79cJ<29bUz z5On$gVuF3h&<`RbHyftrHe8HL#);r?1QASP;w~$5c@7@hiF3guU<6VDgiQpJ5FI-_ zyJ8j3b2-nA8Z+yd%CD8y&H9pOO`c`~Ex$Lm-BIT96thql=~EfnP7=O0_|QM&O&*C?O722>9S#QPVXt2f)*Ot( z;yqDVemWapok+(UN0RZE%hgz(*MyBlE!bb$iu2W7sAAui^fNM}TTkHETU!tu8p-~1 z5J#z4j-A+ry$9AKBE*{;_{&oguE?q*t#;gEKC4ptl zwv$-4avP2vzo6V&`}W&!apH_0YBWYv8P&*DCBqT?1q^;4qS5~o*dmspH|A5cg}w*d z#SdTz_!yR`B?_>VmS>?#RR^uri3*hljVy!JAsL6&sI9FX!YtaHK6oQ9Q;_g5G@XWt=^A8cB&MNKel~Ms^;uiwa15ijY8MWuS9ANFe0d ztxNph!8*Q6Y#TLpl$V(hm(_^y|y{GA3kMa41QGq{eH=wGUwr+xtkq8YcP|u>^&dRs>`hqpX06G$98a1GmsObO%>& z30nO4>tBX%fzj@WaaY+}?CxeA*@oPE);s&5_6#bsE0smg(6>vv=NRLajubFlECnRtHO6PQ0?EM|`# zjTdLmz-#jtU<%p6W0NOf^5n^wI%zUyJU$m+ytx{OFGw2y78ocS?Deg1%54vG6C22i z3x0t(a^g7I)E?~Ivlp+u@fO~C_hYQvupK*g9m0xL8}asgA7aOz-8g;zH1;0ci}c)L zHfl94RoZbli|mTkR>JzZRA59%nH@#!{P|Z{kK7()xQQdFMui>JlUY~LL9$t&`zdeF z#%qz)z@TKhii^pWnEA?QxPR(G%$T+SPY__x-%$|xTW=z0S3uj}|oTrsk?~l)# zgGVX7AD%h~qh~&imzQqF>GWEhEw$nO<8cURxQbZT?Ya~zjy4S91Oa7fx)n=P%-BQ~ zB|zem2i*h-Ct0h2%m~oPQnud*lJDD(0ZS7>MXa4_#mdO;>bM0j17;B=dM*`8BkLoV z?Oxh&6V+t6lIFz3V5BD%%CNM9_=9riZ4!V!WR^5DI1MTbNVU>Ox@FNYDv>s-zRvC& z(At_g!uF74riTviMR-II%=Hb>R8%4< zA{=X$EybQadkBVo%7cCz$rL}r>6OupG8DZF)>fX6#|-6xkF&$}Q2}&Hov|a9ll>=_ zn~_pwhA#tYOnelIGUHL05r^oYi#V`#2TF6Q(ARPYu|YXFy+2r)*OQl*hs&3Pv3m7N z96WsidV*N8sUK^C%NVGsFj7ZSibi5JM?9_mC1g@ z{v|1yf&!ut>~|U2$yq32;0z;}UpjRTg&GUX*oKt!9GpCQ9HE!|sLXxY7k#ns z#0liqX-HVFpi1w>+AT+vK>;#@e8-M0SpV&696#g>O`VOvV?{<~G3@@!VfFtUmf*#3 zM=eHA+^6sazX{`oH(5w|TxZSd!)$gMzCl@a9xS+%|eCR-<3$wEA?ZrBNgUS}&R zimMSG7=cgT`xFoUVHE!O+XwN-KRk?4501l}*-vBU^hF9tESNhRPd%{!PcK@ifXl*p z!^%ZWwmtXslX&4-SvP620xSYNV@5wh1#}-~Po0VNj4LuntE5PU29*^~H;GLfNsMG8 zkUK?eH?@`kZMZ?@LBKZjB0IO5Wo<=5TqMq(KBf%eKXvL9B1mA8qXH0r*#{v$M{!`! zR-7PEAK1GcndwPL%F0Eu%7ty&LInDtA+adXwxiU11>{~hS!|@46d#bZNa^&q{js@7 zV@yg)$ivK$9Jh92We8)0saDEJkx5 z47|!lR;G#)zpUP=0L#?LvoLeq3_LN44fx=6%ozPJ9-~a1G3p^aJ!uLa8Z#P?5^R*& zt`jCHz_R$QH8|>UL;#P0;CGWH2hM-?$BH)_sfPr%oa;BotpRU535; zkK*X@b2xbTG&XMDjjxt2$9Xz^WNaka(h2N3a10SCr3h_k#-8MQl(A0I*+8e$RES|^ z74X_rtO0-Rb!<#%gilcuiWnr=UQoAQ$A!u(_$Hu20hVfRukqYbfMxFMU*hq3FVJ}x zV)mGcSTN>cJTZPWrat~4Ci8vfL;}g96Y$XFsS2=+o-rR|=RS|OR`158LOm|kdhz-B zG;D}g;ls1JSRSK66x%O?=Uv4J`!1PgBAZ4)M8HJ>2?iz5)M|HstfOfH0LjstnhWOXn_US#q7-h^#d$tC1S$yE2Zx#xRI_-4(QoDsfBd zlbh&pUq^S-fHGv-(MmEQB0bi+vvezc^G~6I0DWcLAd{EoZP<~n^&$udVCIS48TEW6R`1{16aFu zt&(ta@#4?%(#tPk&#}`a7!F)4w&Hl63map!I9Aw>3wcgl%FsdId z&vG$_R^maDMwvy3z=ud<`K)Pj;yJK|I7;CnfbYAYLO!V2J@Scdo_J@N=-a_dCr8Gw!` zrnSn@>_OJsfRga_#4#TP`UF#TmqAxkkC>oP?Af>lsg(_=_q4M=CE@77LkJJJMDxd~ zvuCh+%N9gs7eYrVnq8^K2aDI?o%g@O>Q(Ep^y@G2=a-+yuB}H=Q>H_y)<|$Gg7@-T zv_`IkC+ZsoSURFURDi|q|2{lnU!gf}IjUvIab^iBD-EbsyQy3pXwZ6~);M9*x#41C z>KiR6$}K@sOft5SSWcTT1Hb*nefZ6<{)C4f7(>Fh5K|`2rDBl>^71TqK0#!`Ux9_h zR&ISg{p7;$Kxf9Z$%=}ZJ8K3;J@6;o$9VPh!l!U(&kMJAc6+hwUP<d*oRCZRoS-(%8*$MMI}_hZ7WDHu0t941Vjgt3$7%tL$s&gWdQrwf z?1-<&^2;T-sP2Wq-a}BA`7FZ<<=)$0|B+i^0wgZQM!-cE+@6nIa3)EW;^E zWRWMyFV)f^NiaLn*(LeNcs{zDEMgX;Z9y&TwT4PXMk>mK%wPsZxz*!t9#Yo#*|~Ks z4(%hGJFpX{4(`Ub^((Pq&DTgtO@z(Uq!1jtGPr@)!n*0>Z(G|2;NW!-KTyi!im9ns z94w=bR!rt!*?b#SWa$S^oW<4+YjASMTAbgv3Fr22L(sWXP*qmLX>sFnU?e{N=u0gB zX05XB%hDy^;PcPFLQ+mC)kH56_5G-&uSDB{%lbP=Hr_xn1B#R7kYU~q_7jgu3M z>AZ(Jnpk!l?wv}Dj%I>!2g}%?GUD9v^EkEd2+r+0jDSN&;Jb4t4z5^D_IJ5)XHm*Q;Xdqk;8)_=6uy6Ms_?`EUOVzxc&3@W>;NDA|c;&X|qqQwSC_NpRJ?(Mj6_8j~#1tB&j z5oa&>;XIX_#$rT9ekpWhOfI&U%}M3V_|Qfl%*iiCW)=z2sogkva5KsalMxek0Y|qi z#(~xEVBhlBaeTuE$c#LN$V-Q?YVlw2msb{H>+YRs=pMqCk&QU5rBAT!&Fq(wz}3R{ zIM*P~S2ZiEjLM)Y4MX?EN;liwipc0Z_PguDxhF}|?%Wmy^24v61(rqz@>+eXf@TCv z9LZ4O$<1f*_SslmwBJ-Rr2hGQHR39};UW6em!+dkQ;BP4HH8Yj_!kSneM^3HLuX77tH&2*11k zS7Z~v!S#epM-aq`?5eEh{{`0DEwl;5lPzKZXw@&3o3V8`Cw2o4WKLRuXB$h<;g zvkL!fGT}X;_EAX0p+< zg)XE!Zz0P&h_m_inEK&z{Nc%$@aU}h7(ZnaCQf<;W5+*;-#+*&{IC0ei9d~-M3pj! zN^PP7EK{e@$?pP7Om-d8DSuAIS1J!|LkMWw;%jlSwiAakj5t&5K^h(EaG^sPp(NRL z9nDl41d0aX3A-q!;;rL zfURMfh$^uln~EZ(rXAsVRvcknB$J%TL|BW-i_^#VVehUDIC)?fJLYce+qNF3kL^Q! zeGOTn8wPhbfl3lV-hj<@1uYDcUKyU>D2%fMtpQ3ct!l#_Yat0mKe zWOult087AyKwLU0fo~U%tlx->yLQ26`wrw6m%!?DBP1{gXOA7h=>xlQKpA?w8;AFA zB})#6({5GrVx2g8Oj$4g(wP%DcXS7i@7;iXoAyCfY(Rmz87V3=oMAiQ4E+M`u=fct z@4*%MI#tTsXpZ?9?(k3Gq-igHh{{5l<=&|POK40I%4^gJi;P8dR2=krJ;E-B!r#{i zCHayVRgJwnci@o+AHpwx`AY>@rcIlHIdkS=8cC}Fgs7B71P}oh83{IgD@<;YEyS}= zEy4@WK0^f~>0PE{()h8MI%xtv`S1f|r6nOYG88+uZo~e4hme!rEB37+hj$NCUVe7YFB0ka&erNY%&)N^Md-)qUxcV)e z+4?DB{PrU7^iJ$t_c>mF`3bDwx*2sHH?c0=1wSiE3j0hhrAd*#4@QRTK$3Ug+BRj~ zpK``3S!@3Y`({c?1EON`(b0cfd3gWbu;Cwh{mbyW$f^mXwL`bAjQ}QS4$g;i$l@w$OC$62q*>~gHc1W8^evR<_aXlTp%jP z<1(H1_0T-{m3Tmc1E-tJ&(jaPyMyT5qjYRprr2g1fQ6kxZii{jeW);Z;hSCO@aWt( z@xb&yQ;{&JlF?6i{6ReSr{7{CC8pTeKir4ubby5uCSs91yr23EKKODs4uzGmgI-6a zi3*6pNKZ9pwo|>3#Ri4NBB!Vn1*Mg!sBJ(N8O*j_hjH|zA5MjK~$d) z!i9@rICk0x(Fw^Yt*&GMvZ1h`6mij+$ToOTVC@Fm0+mgJR19X6vjZnJ+OhFsB+e3$ z{R<69tZ>3i#+_GZL{MT5d@>qvDMyQv`ZgH7Lug=!56)6y+N+E4>&eez!i?vYd$~`~ zo`ZRlCu7{>597i6e~%#xoC2#tVH9C2H6csYh5SM%v~;2#2KnMzo1$1`*1AkE9C>grx5q{v;Qt_)++!ZOFHQR^une2r z4ij+c=p}>p^uW$wD05G;8GzHMP>Sgir?TBRncs$B%DOW}El8n)2_X2zm5< z+`wy*-^#3gtGNjQfxb9!a1Tx$-Ho#ZnSBJA(R=b#S(Mky@CAw?C))-Fq0P89cUZ*^Uq1{}}ld4G7Dv$KIF<9L;ekL$76&P7LeJ zH?1D^PJ&z84f<>ceYY8PET^uAWPs|#OT{E4EveDV`qEJWUqgC{6FHSlsHYT(uXW*2 zS}79Q;oPh%W6K@v%vHlz+m6hZA@~>T5JBLvONu3T7s|=xyZiePmlQ*?wHx7)k`Ocm zKIabLB7<0eiTQ5l!=crsNyQ}sSJ8iWW8LbtSifQgHm_cdjVo7R#p1;zODCwr zzs34xOR(n4&vE+bacE5*gjIFGFW-geGB^CvG$_?|L(BMcJgou;;tNq>8eq&PxDd?z z^HeCwtV2>nD!Q)@C`+*nP%nrM`LWl}0!u}W4vkg@Jvy_dV@OF(R!gT;UFCOl`T*L~ zm(r1L=|EF^7ZQ`sP#Rx^SCfDnEycJsU`2nA79LwZYZ9>tVV50S|~f&~*M z5L71PsVUPjYx;BeXvtn2i6}>|aR8One;Ni1t)UeLN==ik6?Kg!^j_n28ZBgMji^=Y zl^jy4Myq1A4U&+pP8mUBB#UyjG@-q%8)ie3l3S;g0b0dtk&Lm*{c8rYy6&4$vyLPg zpxla)2V`ec`{U?ljY!aS+U=p4iH5F6F%);FHui@Jbr;wU!Wt$P;sD>_M@fk;3`h9Aqek!LSIWj_ZjZZc|{ ztBWj~$LF<{QGu2aKy*|dHS{6Bs;lrR??W2-hlC2%&gB$0?EEK9S&uhkYpw> z@HY+eu$kK(&H=Qx-G;MSX1MpFiww)`=v9EFv4`rb<2uVFDN!Vk)`0SSLEAyb=eiC( zK_?*4PwAKeJ|}QF;4DrarE)pG2i2+yf~}pPGC-j3<#k9h!~yimq);+NE9*t_zsX94 zX|`L?vu$O*h=##mCH;bJsdn`#nUGH(*n{)?Hp2Jd7HnPf6)y5zH4QbWH)#+OAAzS| zeF@8`gtu?oqudJn;De80aJC`6&VjSp2AnNv!G)TBv7`H7M!5M z$WPBi2?1j7p8eRci3)7T0VHG=!6|8MItP$d)&M_(jgd;N@5T_?x(S9RBch|DQCnRD zqs~Ooii6GBgwCETFj_6__j(jDsArJ1U+L{bQE43l!{gy>?*lIxO}#xRRn?KCCZV{n z7CTsOF-`0-^yF?uclwuTP5KB;8K0u7=xcQ3t%5UU89eDLp$_{DKGC(%ZqxasRG8uzk|MFk)YXZxokIJa9nN%&)Fl*X$ zWisSb3!lI-BBj47c}2MiX{KF-ctF7^E6^f#@7*xA zAL{fP=opP0EuHMBlCUtCu7a%b?8n)eW04Y;PY~0@)#h zlB?+kjR8|k7CLL@b|uGCH#!J_VipEc3t6#+%-Py9d_7_YNmawZDn6~r%ZUe3bnNpHUg&Id0lykdMQJLr+95|ZVkYs7nWo6%(pRS($knW_XW&a^b#h| zeHxQyJcAi?{(|w--@v3ri!tW)m3Z{k)p+q+UuC9s5s!1BxCaY12jRKB5jfBGspU2! z1ESHzvbY#*6)+*lF<1`U@Q5%`FQQmRY~+Eyj2aUaGct-y0Ty1j*zheeN$bLErzsEd zdEEjmU03eFMy6%u{w@Z=GW$(v80hne#(Rh$drZ7$Mr0!$S!W$WGo4x3k_;4)34Ve`p9a4b@QBQAx*!;n2Zdh)qhMueXzJQ(?)ZPhNjBueXf=HJlB45Ns;t z*+d=HdWUlmoorK^gZnn!QJ(!&Yiu}w{yb8XqES&yHJcWrtShr+^9~dit6(8fJ9FG0 z%a?3aGCdzSZ~&V&ZBi^EDIJ;h4n(Uvk;h~0O0(mlY5+myZ3LDog4PXXK!MrXgH{r~ z29`_Hej6SVvv#@8<~s;3GQzLI0yR6dg?-XUAeQBAB^l*mvd`?UA<*@ar|rZ^61z%v zdJXF>B*%=XbPd|M-xbz(VNMkmf3gI-x9wn%-9}{|g2IdhoIA7=XLfBy;L$xeeQ+bP zl7o?#9*qOLw_xQrU*n6q3a_4oodqmC3~~ zpH0EqY!lKW{84;)8?@{6HXL#;MJY6D5^A~ zLFQTQzh-EV*MfHLV?62H!z zI*s5k7q7qaDqbRhELyNoQ7ocPo_+FZ+EYs2LIIjtR4bFl4X^Y%Y5W8{^rr{#*r-SF z&R^bO{T@V$#6~LC5|Y;jJ;|%X1FfZr3ZtE*n@ZU%cW$Vp$r4OfCrm~goJI#S;?ocj zosIK;QSkGR!+Hw_IJYC9Scw%e@W#Y1lq|(;R z_M%^F+24%Zu67MUPd|~Ie$9<8M4a=%Kpz_l1GpubMu&b}v;4!rlElvXo?iiCDXThI zh>j~{DNehR{<_&?r>yLuME9b-y%jC(Ewny#(V=8S(wlyTWL6#pSVZdC*(+^LR1mCC zO;a~i4D?3(4d|`cQLF3X#SWp=a|0`Ulkt^LHnzm7uzrURR<1jwtb@O1!$Ewr`y{^J zc>*i;9K)LZC-Ch7O2I>?u;yGeUSE3}>rSSjppi_E)Yok#sQe!W7CRY81J#}++pMm2 zp_*k0$ur~g!?D;BQi>1P`Qk61?ZWHte1o??T!yzkS&En6`UEe&_6h#{#xgwr`YJs2 z=0;5YU?ax7u@29yJcrY{O~@dC_>}fx?#2K-y(<()vaQN!v_>(<8tdA_EA5e+VWaJiwBqEDCaWqkn zJeHer6E<1=$=#wP3~cTmL4ch+!A>a{8X5|}3nvgAMg|(}w6=I}AS<<);I|S7_Uyx!4d3F(!JY6sbr}0LuEg;z-{Sn2lcVG9Jqoe}hLK7>z&v_I}*|r$_O?pGITy z#Mw%!sA*IkqCj4F_BrKtn5^O|U?XYspMUyUy!^t8c$TW=#pj-fteGSVM{bjie|#+d z@Y~;E>V!!+cJMF?b4yXL(!*kM!{Kg2b0=d1W1*4d(UBc^*d}haql59oNp_|+SXoYo zGRm$nlY~8`1pYyZ3cy6g zvJoFrpWG-^cESmuE`S}Dqe<%^Jp3J~=2jeh%a{#6+IfcnfPGa=x3wUge4|j_cJ`5R zUO}C=2O92MW$Z?tV-Tl{9C-0yBK~|dm1XzCw2u#9%A0F3{hd{q^4y!Kc<@1ZId;{yA-9Jr=Q@GArGsjs6HW$KD}$e_lfc4rQv`r< z2ua@C_%^%%x ztv8TQA5A7GBzlHNhKV{7l_yIu3$U;&!bKnTN)EB+A-LF&TI@pvbD)$v#+2HS(a?dU zYzuPBno*{`f+Et-6A5L=Fm%EpN`~h+nA8aW@)m>^dvGa5jr1}Xk1xvZHi`+(7lUIF zlbnhD$4_DH<}LVk;|8o*vj+Qi?ZM&w2e5U=c5L6dLz(|`mhnso&xK?0r=MZX(#2T*#V1&? z_!BJs`596Jhb;Hf>i$S9~mqrr*NszzkzNpRP~Y_dbEZbWf@ z0g__lv30{HOdK;7zx(xX@bIWdG5XQ5m^^6)rcRkjH8Pxt^4TY!!GbySl{8Y4-FRf% zNY>+L_<6>Z8T@{x^8KR^J&Hg6?vI!|a|-M0DAjE;($mvXU0q8Br9*9F1B$B3QKi-? z>3%FEf_C=+l}Zn4>MTgh%2eh*9Y1~?0sbL4bixOF4xL6oP#8ilM5vs95UQ z87g#bNFgOVRbs>16cgURScEsvW#gIsF?eZL6y7|Xf*Cu)@dQEV<%7|9cB>y=-|LT0 z&&1;WkP`fwkvS zsJh~?@_aOwoeszHld)KRHVvzN3b5uE-{)z#>_KtyFZaWa)MW%#3m~qVmWRS*~(k>lazgxX8eSK+hRYMdj}uj}ncOaB0Ug~3WvtuUyH;*%tKde1Fom~1Ws z(eBiGgp@ZUuKo&Q>j>B+Bw^~SIGyi=%EG{A>cp;t`>|pBR`~jm;a(0`CYZ@>sf$6O z(A!%GR<~hmyT$U$e36^VnjLLy-`1`n7#MV8>pO8gSp_#`eG!AFhUb+ODj5x4WL9aZ zhWt^OpMwCO(})bdh@hY#Y}vdUX(@#SmUe{tMItIFMj67JnVG2!;gu0rA+brw*EQip zx>|X7|4m>eE>!oUoIp@Tz?EBD7FmBq$)rscNRYG3XfR_xyu3DJ$H~~zJ)XbR}S|n)RSCNy9PQtEj+u?KK2oCSshFu%iV#A8B@y)W; zSg~pymVdhp#{y1cYwlG%u`3&~sRhb22Q8ICXhZ@ooWF!Pwt?^Y3pliQKQ5lTfHMrr zuRQ+(e*4Q`aE zlMKl7scxn!`-qKud>j?bJiPP9pK<)~J{&)K3@1;Xg#V>L>^*P@yAJF_U_>a=a*I$@ zsbOroLM21rXH2q?VV6}^qNb(>r%#`TpKkz`tk^)%+(3}uhc&A=D3eIHY~G2L-)_aB zj1Q zm@Vr^Odimi6=1neup+3C#W@(*jV>{{t;oQ@zg-MYy4q&cYkSaOzl~hoP1+zb8Bvlm zZDb2obo>%r2+PNbpd1|YFUJW6opTXI@Q*J;N>(HCODrg^w4tuC32N3?t%`D)K}z4? zfKl&(n*rWNHg0iuk?rz2Nn8I>V37sR#6}+AI|wRbayv``7uHD=RZFMbwjv1B7~7Fh zphJ4C3sHr3gy(dk#7LGJr-ji-;1;D-;>P9b4r~)5KvXzd;6jS3gCGKQc!wB3uc4D5 zbe%!gE}(VgHXH;^Ve?shKUZo|vKugl;arLyXOna|L3W(Xz$>X>YE*Va$Aps|mP5_Y zHcLAUIv0`?^N^ZV4x^LpPoH+shdq36BDrW|J$1GWpp(b664WvpJ8&{fhY%-yKFbK7 z#$LqIxg#mNG8$Y+%*;neYa3b|c64~$u-om3iBCpxbv?}P7KFt_At5D68R_5C#p~(l zLt#M~vP)ISP`Pn7$E2)7zb32>Oa05>Tj)TAXLyc^$<@s|y#^=!*X!y*3;oPPlH#Fc z^O7()NPhGLAEV??V_=swHUbu+8Vw{*Ue;5mqIhnAZm$eEmD_tVp;FR#mLC-d#U+W3n?j|Z#`nQlN zt^0;@FF&}zgs|FHM4JY%Qxqi$p4WL3ZETa^vJM<6YDNs(_&|9(4kc77QylapL~fQV zf(+>k-(s94z#KDE>87|4Mj~N0-$bM43f}aq#BwsS%Q;$HO07kBu>%Lgim~ljB(@!m z!1mKQ*nP1Wy948JI;{v>sC=H$Vx$tMhg%7 zn4M%^auZtYZe->sBQYrgCr%z!NYVQre}=c-`w+{Peu=L>`v_~l`3h^k`BIsD8yFaf z6)V2MyYIbCrS5~IYCE>3dyvNZ4YWd;ESb#yBy(0yvHyLQ*^D=XTzK8zj%`$iOY&Ng zP~3{k$;D_J98iWEi~TsP{1*U=Q$U4IGYl+4SQ1%@LzUe~po4D9a3e@Rgiy;J9II)@ z@!BRZmLP_~BC);?MGW>^;%X7a4llQ6`@&3kcVieGx(l1L+o^DB zur5GN$Md3I<3yt*m;65rEGnunwWbXYeGe>}PS$rXYS{6z)YlPP)}{bUMxGnVX==nK z)F3Fn0vBV-;TzQmzi15tlWGu=p+aV!0R^R26p@jZRohTiXGc|y2~M(3r>PZYV-s8q zNRH-SUYE@OV0roXKO0!&HkhnM)7Cqr080~tn~IFNiUF?FGN??-lG(pjI=IZNZ)XrO zGtgA>z3eJ|iYAFE<>9>qdoSf}D}#{$ORIxwQm&IDXJJrwJ*<{OeAJTJ6SHJm7|%!O|>Nh45Y5*R#h$Q zOvPZL<@L&QElFglCa`MR2h3EW@~qRqey?log^2)T?IK{&@6D}OsKl>A>*TRp?!YQp zGuW;cmR(j`6*c7{X{y(?bKg5Kvt2T%qSCE5aG}hDm7%3bXWcr?SJB0?R1oZ9sMI6a z_B-hB7jkuqZ!}21WSOE=J^0JPBphI%3uD^~u&gTVhLh?>rRv687pw8-v&Goun~WXj z6R^!U9UpDEfaO~+V9l;eSbHE58%}0mi%&RqT~5RoAqG6XClhh$nRw-mH}UP3P1vz# z7cO4%MO|GLPMtV}?OVP@Ld<0pyK?) z*JA&H9Z1heL~uj^w(sAJt@}1%@3DhO%F1SZYN2XrV;t^*&S=G@kn`BHcQf|y-;GO` zE@8bIo8>)fN7{?>B>D#fnXuows0Tp&j^xu+OT|fN# zmmk5D?_Qclvyuwm!$2#eW88FDyQJEt0|=rxw(wFE z$pb`o=x8$J3u*>DI=c*em1KG1$m`?u2xU+q;Zag|JKJv%SbAV+zD?&IgvY@Sq3wd5 z9p0+8qfBE%y4H(bDLVKNpz;|3WMWi6dL2%LR$$y30?V;Pd=*@QH3Xl}0t&H@^mV>( z38tOQ#xBa|bV9SIsUNBa8)dkp!vKw}VRJ?I&2B}b9N)(*AS zfqH`rl>|LugxQ%D$V@LrMsgNX;?oeGn1P_=LIfn&BQT`_(Mj1#I*8JYYE)*cQC4b3 z1sP-|+oi_T2d$(uPK$}$0w~4de*hK>k1rR0%9lCT9+&y)(v}y7)b-AiIw#s ze&}KSySiirO-U|#opp4L07PIW@oAEFade@b{j1Y;n@aFD>v#~&^hqH^P4w3m{!Uia z^zgGyfQEo$BKeYAaSrxRC+kgyIkyl*TImbTJco-7>~8L3n{$7bL(g{C(8u!#KqqsI z*paNoHxUhZ?_wo(6|>Ib0goyFF>v;D> zCca2=VN308e2`$r`|);kk)&CPjN7uzSR7o8js8hkbuJ1YoK43YN8|AgW5KG^saSF} z7fX)iVa>%DlFI~q&G@kVautdy^*DYe5HSfk2n|ofnbQ|>>0$^D>^X?DC(dBSlI8e} z%Hr{dAH)Cnzy5Fh>X*OAAMYE52ksw@-~Q%){QlSX;otxD7x>+;evkWp{RcdJ|05Xx z_yj!o$A|F1A0EVG4?m7S{_am0J?b$$`p{@R^runE`>6XLRscqp9ACYB3D&Jyi`A>Y z#lC$9aq#GI1cis9td2x7A`YdD15UZ!$#~et{-Du%aMtI%a_e^c#?3go{~$j7d?{Z3 z^BZ{QjkmDk>t%TJwb!YbX5yP=D{<)HF|1v&3Y)%NhrRocAgj`dquCyWX>Q@m2rbSK zSYnMgusym4+lx#HATc{u(u-5&{Yaxf`buuO5~}l%0Ce>b$(>4OT=J@Vr@8 zyy2URj|ngzUC6_iL1p;lQa(0h7%}!h5+)u=!>TX?jzpRWDt0*CWUl{*fkne$Rby%< zYi)+Z+KvW|19dtFw>2TZ)`;p#1F9-Cs4S^QQC=xha!V1NTaEB+1H!WO$S9~pd2v1J zi?mP`8cTabV5u_nu>E)))$)@l@WCPXzv?> zx8sJAf!Hh$-uW)`eC&M^IIdDj3_{jHF%xM8SUTi8DnTa$l8}}bs@rzHv*^%}sh3g( zXs`9d#q02rJ@=79$r?eL?(0y=(!lNgXz3b&$=0E)rP9b_3b42t7(4l$x0#^Q>QYvu zblJ$T2`CO0%HohUXXuaaJ1`N5Vi{$WSGx5M zE;n9B4$mXNA_`8HRnWH*a6PT)>|;5c9)eaEgMJHHJ^KfN#mVzH=!de7j+^x_OBvhb zITU@-;l84*P}#)u$p%upo_(o-*HldvC3Act=!@GEH8@>&4e`7l zF$e3uw^(NL6KY!C~=t3)5 zLptj=k#%3vI)rStVYnSgV?AaVZz7MMlMO%ukDX1zl4kEl1kahxSfnwxDrx-*Q7=RifUD*u(_H#Kd6h`irpaVgwwY#$gOAs%PCgW z-U6qLA1Gsji^b-5oS%0aZA9J&c?=Tunob$hApEL?8&qvSbqy;gJAHlfls~>L1fXvr3Mtx z0p&hk2pwfbt`WN%I#9!)t09xqk+JI7`4t&%>r+^fiwIKqc8& zUWplHwJsD@SddkyMtPkTxut4?N*#(z^eAE7mX(`OS!G2HWv;5;jRv(B>PAVh*#SB=CS3Rb_NeQzYJTHGXFD8>gT7dxryq6X6_=W&|1AiR0a&da(k85Z@sCQzI{j; zO6%fxVs4Tf51MJs#=G;ohtDTyzFDmmfL8y(#M@`1lKmI%q|-Jm;F^t-_)#_%_(!T zOb8C!?m&JQCI?mE`3yVu*LR>ulppJhp#UpljM&cL@OkL~=3J`B%Rbf0 zt+E>D9W?S7YWi(fnF0Ck+bFsY>}>$HSKlHy^W1a{c{f|S6<;^e&(-vQ13znZtv_o9 z=^Om5(jQrGat!G^bt)GU6HDM9kc7Sae6VKietiA)Hhi^Y3%*#q5ubjx4s&1o0`p#5 zjQOvBi3NZ83Jc#{ibZdIjVIq;h9}>l@%@$0H{gR+d$D-aF?_k@IF@WZiDf&^VCCKm z@bQgBWK=Hl^3|wg0M}?+ls;=Tu?<+3pR=+uBXV-RzAnY z6(WsFx2RZ$`Ua0uHxh@$N5ntOBr;-_HY#cvXw!C$3Y?0VzU^%7W-PL!yZ%OaE4Bu)IbY&G7ED8a^ZH?qjgE1W%OB)c+q-Qh(t z$au-J++;|U<_=0gyXOWh>_7%GX_e~=vKw6p&8x+U_#F7=*l;4e@)fSEFuG9*owovlLgEQQ6=?b)yqHvT<>K1xV;LjhbeqqbNW^#}p^B zu)~N0jsVJcP9*@x^Eb1s|4fr>|0(+`u(1AVBfug9Ld34whZK`rXELkYLx1wpzr6H2 zc~I?Sr;uAcq9S<7it-gBMh_1`CK$*AY#BZ)?dYI_wD3IoUIq}Ft4${5%20L&6@tbH zfV5D(iOI7IF*%l)t(%}MqtZIBkZe&IIc~x0;IUl<5|89_y2F4^AY+;AUF@jcRKXo& z@a=8%?KY|hIVS@y%kF8u`FB9^pEYSm@v$}n?+A%$=V!(5=#$?ElJA>Co`3MVBm=UT zsgq^qwaFUrO#~Tfi*^?QOEI2@3bBa+$JRl>Bq?+?lYq%HDI%JfhYHoherltt6>D$4 z!#WxuKrkMpx-rJ55RYBR#~T4z@T=^Aisvq-qWC6CkIyq&@N&EhPlg)sZm15i{Edb_ zAiz>ZzYb^cJegLH-R$pgg=p|iCP9wmNCL5dg9K%HmpU-f8LW5x{-;doBiv6Re(WFe zJ_1m3JPF1Ul;h%yaLGRrCr^dqz`={yx$_J*6C}Rbbr#Eaox_UV=dp6n1*{?ft={j8 zH3$5Z3?Tv{vX5+Ev)@nIzUf#n_FRa;(cm=YxLMhXoIg@slI3s=A z&a#USjKm;m-|q-5x66Lt#jCsf*g9`3X740Ocd~zUGET9NxT$z zTyeM}GiOJDXw$$6gwpnP%aE9h9ui48CkUOB3`28>6)uO==HZbq?gE)gmFG z3i*{y(AsZ7XCFjir33Z#PFUGfZQR#naHF)=gwWJdoJlA}c(DO7g=NU9tVbD@QN7W{ z0O};$wxK~~QLL`Us90^C3AJh~D%ED>R;v+{SAxK#48+7`v2k(`mz0mZ(ndri6{4Wp zj2s5wgnSjkQ_GOUzeBnGlwUN?_(dW{(MP(`!m(`=VydEVL4JfTtqpXUm zpt@19!qQq=&0VYhJ1Z}(qp60C$Er}Qe%N?S*;dAVN{VVwTv(0L;u=&}Hlne?3?r}A z;^~6PMfOM4Vz74+WP14C2fdZxLX{>w(J$SzV*u~Z=;E&~bi z8AwdXL{dT)Qj)TflAMFolw72xxT%0aS4<-P%ML;JSUS%Fe_8Bg0xh{GE=LOnqH0M z?A&3?tWZoQIA&*LA}5`!lXY5{UW(%Ma+Ic5@cfl1&#pohm1S*7Bh>UmJ;C2<>?0W6 zK?ei*4}ryh#<~dvOg1mB+(8uy}%aD|qg;eo{pRnxk1jSM!*^gqf5EY-o zzLJcflqAIhlZq4zi_b?)EPX5{4jGYg{7o{l!_trxmCoOZr6`shm8w{1VuE5(k+Jm8 z6eW0uCzaqxUMUW;-p|C#TJ{aF6Rlf3HxZKCh$ES5>`d3`n z{|*a{!{v||gak$7)Jb0)J9-WW_MO1?ZTqod-FB>8z8*`zT8+h@FUQwkt;g3(Heea; zo247E{Oe6vv1~I|d?Q&1wqVurtyr~UoAOz{m;KhP+>UKq4)d62;d>znf&LN7Iin(y z6pM~ZR{Hf1wb%D8C#x9Q(r4~kF8f@5ZaE6`sZtmpN{efixKo&4!R=+p%PCX7FW}!r z1(l4~TEz+~H8jRM#=j!QTxb5fGb) z0KQ)gOGOZm6&agN`I(NO;5c4WE)p1o6B&S$7<`i$e3H|LEk$|HyT=$%zGuV1dL&>M zGAPp6z}cB>a5lQqh%7KwWPl(7KdoI%c;#+Yuvcc9Xfg$hc(TB|8}u zfu+$zX-@`am6_yJNjW9;NMP`dVYzFnG=H_~zc)!wQCt1vR$r(8C!66XO-%wIR?LNudY{2TU!s!Jtk{@7`WZSPBLO< zb{YdoiMB@8I@c&xr*#jT-k_K){iYo*DdmRws+$IbdvLebj6D z8xvf$Rv1Zgv<&!Kjae~MgGI4gGF&mM#R0vZ+bvzFH+LePYUi@fildQ%I2&-0gsV=u zT~_9}h7`vQWn`Ev0w{MnDrA`e_f;4vsbsM@d2Ulnm6vR~hT|pO2+~6#X;zZlR;sIx zwtif{dIz^iqz+Qg2GVG>Y+iS{?h3WM`JovcG&5;F5kN z@70xhuW8_-?EQ^lO^d)=F!Ej^aUY z^OD%|cUBkd?j~jQqQStvs+Os(w{eGna_ja8xcuUD(Gg<#>0$92~-(fkE7+-MV!Px9`YO%5r&kaA$CU$CmTZZu9S({DGYR2Foc* z?e1sg1S8kR&$kCyX8!J$O!OJCp__^g4c!{HJ96@olK!v_4Gk%F=MK+J`~FL=Y2_EL2P^nZr7Te={FNqV<&;A)N z={M4c{v$6b$G!XB+xO)2_rL$ozU24ce|^7vBj;4&EB6H&Y^4)ptwp;kP95Vg`3y;1wY;qM`EDIARB#1IwOHak}3%Z zu|Ok%L%>0*=DVZIx#bJlD0YK?5LlFB-Q7vvZmy(SGXVn6rNJDOl}w-Z#l;b^%6yNtw9=Fr?7 zt;LRHr#V}$QPK3ETxCL7TslET2K@c?HR3#CBTn;ur@OaY|4-Sy_3}eD(#}5)EUZJ? zcY#b0L|o`DdPp6NfQoD$G5K4z%WuRD#C?9q6hsgc9~B$;h=Y z8X?)m>#c1l(Ke&T(hUt&y4BPH0~L`??}5WEd9zxeC&_ATx`kr>4P>i&P*qj+-F1%m zl+?k0^z~zYI8tn>ws+)gx@$*%hIM%Q#_?v>uM>#hyNO4fH>pY);i)_d zjwj`#Yq4IXZl%oM|Nj4J8>zD&v5}8#4`tfb(3N4kBco5mdKJ5+jGY&?J7V$>v70{~ z4s$~al<@a|vyVWG_}ab3?Q-lpUBh;Z+r*UL)1)k{HkLrK;j{Cl1X%h#36hvXn8fJQ z!zRb%c2Va;4AZx1l1oVxHTw!3Q8}(yXVX=fbnR$ux&4D+@t?7@v}EMx=kUNnD5Q{o zTlXU>{KxFO*WIR)EdnxkYlAQOLbeXq-*BJiw(r_a>foAEJtJoy-nVnuZu7H9AvuKD zAdf2bEq55Wv)R;%8g&zN_I}hGdr;BP3bnomHX~KKRc;%~ij-Z@J3CQtYDS%8;4pST z+t7jf>L!$w7JbK_uV3%yXA%?=PVxQW>yr}wxXE1!rLTNorm@fAgDrJ}M?L<$E#q-q#3e{khlA0*m4l%87;@cR2Cb-AZ944Jd%o z%fHA_ZnM+zpE%z2n{+lZz#DgZ`PUVi`g>rZN|AK)^0}?|Hoxyj zUbzYvLt~V#D<%HhbC1|?*+$ASa^4>lI)eud<~C?7T?FPHXjD`m4n^e-^7Nmf25#4Wq!}nyqzu(Bde|wI<{rf*>O8I`|7*aP%{H6(b4TBHA8!qnOn0)np#WnJI zyo>0HwGw|@0Rn&O!k%E4O}PC-2J_5_j+1UT~!Z9YbUMyuE~sP z0heJ=5tH;CHt!XJOCQ?$Zo%MeMO<1gQgVyXcIEoto$o(uBiHj|_Cvq9*M8_X_u9St z%Jqxg+n(R;D{n$BD6?^cUr3WOE{IH*J1x?*A_kN=Chz=P{6OG^@fp|nQ>A{D`}zEG zKz_{6+$L`l^hOkj=!<4ri)<5sXS>T`1-`yhA_D}U+k77}8Nc7(tI#7cIo?(J)<}`$ z*aBc9>mPQB6Q8(|MqE_CRZFgSN^Er>+yKIt^8i1HCrJs2HEU;Yb>&HOuhsA6(hyCwOawsWg z<2h_@#jJKWERJE*TN+?AH^5+`85^O~({vhWwOYj_`Jb#|U0+{^`i5Gl8*6CQXwX(s za@U}-Q3Z{*f%`PVV9@bh%WaLyLqW+NDkCB4Rch4LHlVIfjfQ$HO-4IuQCri9it?JD zw1WH+loVH@sIVMqsaXgMjYe=#IO1ZHk)2flXPYRMZdwmbCM8{A(2$4q!_QT$9s*7C zRpnNgeCO@DhFYB!QOOzb4GC9{{g0TG>!<98esix$;>4e_(vm9LU-y>`xWz?(J^t|L zQWO>zDj9w&a&w`|&VxF$2#r}~$jz@oT6#4Ka&#!k)}uU=buI}v)3`mO8j<;8Rmdu? zQr2eAPKZZQauRZ)B2kr*j^fN*B*dp8tFQ`@8AS-oDnS%K$5Hu-<&+j7Ek6gz#d(O$ z%|K0BvSQhB;i$?@LuO1Eiqqmz5*vl;)I`MPWg;v!0cm+T1ovD-CY2&2t`LE-`N$~M zA+@jpQEA2ez8s0E*;Es$NKQ^hMs_Yrs_IZ}aH3Xj>vRsm#6bLgAo;%i9I*8ETt%Z= zkJy+*_+0QuU_dBACQb3Jtjv66NcG5P0icZZT)vCtaa$hBatctHQ;3F=3Y2H%AvGrx z8AW+W&d)$*SvHE&9y0q-l_oS&j6RGDK&YkX_Y=QmTuB zx(3wbrJ*7-5fvF(sN{LFiVBg+x=yJeDXJ+zT74BV8?>m_wkk?RW$HzhmOx_aCvfz` zsOg2>d>v+jPL-O9#o7+Fy9bp7mj-PU+*C8Bx+Y$`0XnUjF~SXxyH$x54fQ&bHWmA4 z!`=R>Wgixk5m;i4?9anC{P$0p?DON+P|cW7&GX!~`Vp%dwyKh9RFzhvTCp0`l+ns- zQG3@aD~7Ftpa0f|<3|~PH*A0HN5g$+xF3}iSKPHq<$LLGvhT?6hPVB=mGigXw=!BO z{XtA(Ut^<=b;xU_37`nD{M_xZpM7{Q4+eEQoniodX!cgxb1JPv_ktgRz@o?*P*gZuUL^XZu-Zqu)JZ|Du&++_+BvbPE#?!*VRgp z*P^Ogt1P5cF6ZJoO3Jh-DruzgIK}lSERvb(b*%6@Wj=`nzLJs>6c-mOfvvEhn4im( zh8Cw&*Bh1jDW%2yU7;917pYnC8op~#!p>D(`u`{IKftTH&TU~h&$;)UoK(k7+d+${s5Fii&_1=5kz4zXWdP5RIjDO4}tc64-|IxQvwT?7Rs zDyD=vPKc>g`VokqkY=S7^FE1LZT;~+L^{NRS1~l}tlaNE2T>p2g|mI);!t ztV;nAvpGjpD7Iz$4O9VQrcx-`@PQ}Ku6Kl?h?%-NCw+VMZZlW+7n9Q2! zTEs|olV3U~jn2))(JjSSb&Uq)6$(^TD%l2gBOnLV)M-&uOCFK9;55YZ?||6;yHGBE z>pM`*wl7fANG>93n@kew$OUzb_p`ORGa*x0rE~hG-LTC_ZHwQPAholR_r>SZ_Jn9} zqwVgypio%;3Z+?s=teENS*sMHOTOTJwoQsqVPOf{+Jxu-{=e@P7Lo0HJRXQuAcKLh zgm5^9a3~6|pYOHw5&a0oiP!)lvBA?2&j%2W9se6dqQ?=9_J1>?IndJkSHwpUJOg6R zCut^E!XN9F;A7@4Ajr5SK7u&kk8+!cSp7^~LL!3UK53@mC`mcqI>`6Mlqzk^Y+B&= z#^{KGQa8=k)>gz~F+_M?!C(Y_e}t}!@I=tcV`z!>A|CCNW|EDQ48%l!v9Oppu%Evn z=AAk>THA*ZYY}B}TzYJ4KPkNzWqAccJck%XMS?gVAuMz%EFW)_+LeX4bxSjDTvvl%EziX@dm8W`+e&a=Vh!$GUyMI4 z&qkuU8%UJwKk&fPBN#XT5bj=^hly))aLdXJT)#X6*R3eRW%IM}t2s&d zOR*MpEIUi+6x^&t4~5#yLNz4ij)U33&l|M9y9x4P(NI?k+Aq?@Df;=Anmeexaz!y)uUm8@ z_KStY#O$=a{G8tx69!5U0>bZ5L?ja7aSDier^H}MJI^uLauOkyndo+Gb~89Vaqg4n z{ZC=!xXz8Uedn(blM{Xyq;n)jmTK;Uhe9cqwif3vzAqLD3$QN5IzP#BjJ+iBh!_X>^_iB%~#>R=l3vh+J-Kp*t4~g?TC5fv#aV zxNkkh$;|jq^9 zwJxZQL1;{3EtnDLtr3zr-3%eVs}n9r0{0<$lyO_Jy~f1v@w?*t-vzP#cR@}eRMeKJLd@Yf zQlElf#7xv;No`T@Bkk?n5bN9vxS5QNOg>9~W&89}pnM@FyiCO7t!$@(IP!9f&?;t! zJ^d%$6FtY@e`(~slbL;p>J^H1l5jh}nbB5|u9%3@EhhIPoFov(84#~sBv&^f8i9a# z?IhtiPGclXX91iE?%RDD9tw$=tyOxD4c^7ybn=A7JqIVVDL8 zP48l7hUDgs0?Y)%Y}g?-?0{Gjm%k~*<=aI2ZG>Bf5NSOrA>2x#p!4ukJVuC@`}sy# zgvf~3f>0S=Z9K@1tw$|DzZs{&V4M-#HV4xV{VD zoaOJ-jTreh3VA9EYf1pDVC{&0qtbAB^IIbGecfb7r>jzb;vcJf|9Sx)qYgz zeK@pyrJ6pxdRU1A#uyrz zv{YF8aIoBl?L}7PSWhCI`nh=}cp%PQP>F4kf;pQ#7=|rqVVfs|K;VrX3q|qev+4 z$Hx_In4A~H?6N36*jQ2JS`SnPKb?+Gg4!66 zUXQ#lo{zj%>It0>3JG2)v|h+Hp6`a(<~z`6ilE6X5Jj^k2AP!(@EfraLNf{>IA@AZ zhXkXYu|=n5a?rgwTO^^ex<^HZ0wZvS(3~kEqW(r6PuC>{Wi){m+#}kb)YiTOZb?)| zgk^-IMf)TlF_{+pZgYkt?iVWuic)Hm&@AD+`H_Hl~Xn z$!Yb%=?I{)T865^Dl}I$@ckg7o$ct8dboj)VtV&>+HD8KoHB&8z zlgvy(LE&p@;!jat1Cn#`khK39h~xM!ob5Yj!o?u`E{O9Vg*bmP8}aDAT|AEkN|$T$Anfu&*W3t2Z8cWb#PLb857>b84b^Crt-~$AO_P61mz0ORXB!H9Axq zA}D6YJvT>%t=bOEFSB8%h8aIa@2HaQrrCu`tq*!n8{8uHThA^gXX5*WMZ}d~Toq`c zQ|I%M*W8BXZRYQIg==9wjg&XzpRwp<9E<1TJp~gQffjcQx&mDYIk}w|XmkUcSssTQ zBGQ`Z)6?YGqG`jMiN#p22%%KrMU6~{(uQ2*6{a9@<65L99KwQ1LfSKncpym7GGYO(|f`F-wVmbnG z4C0u?v58~V*`v@qD7MZxj4ld|mkyM|V)fCD`a31qSx&A<@9NB44CU_4CV!!dD*tOIGsveDTo`t|`QM+c*yW8WiW1 z!K5%rJ(NYS{6U`aXzxG)(KS+ZP8PG$R4_AcR@-0}*Rpxu0XAqq8@G=tFCZG}cR`S+ zAX7oAqYYa;iiR(QN30buflg(FL{9#Vu*8@kh&5x(PLeN0XEdu2!Xn(unZ*5%U^D>F zg|mI%^b- z)FQ1Y50&}F7>;r0U8kgp5)-rQu%SqWdAVvF4)FK#bV%p#HuM12AtnWElUA{oKFh`5 zeu4>xaHfANB;UsO35zIWQLdw+Er>=WEH-AbXO_8$MF%t4ZxfJ$WiNy!LUxIh%)FLP zI&`3!SbJ29y%iqRvkZi=Y*fVXr;TY?P;N$zK7wwRtytD<@MH^W3v!UM^B`trmEe=~ zN_<^y#_V!E>RoMUWTxKa?1s$IPa!`6hla$ZcEYI?^OCiK=8=MY0!#CCSdeE#E{U!( z3~Wqmq}wy1L2W@*Qv>!NIgCv^w`0%#By8Wc6JLG31Qm@Y$PGS;l!Xv9>parqh@gb| z{IBAnppy||AQx_i-w_boe;1mx?(c+*34@$aFkw+@C}!FyG`iS`;808~w51a4Oqd9p z=u$1fV6YQHKn!ALbBc&a1cZ=`iioJo5n&k>m;b7;oV_id4K}vB5e$w2cjc+s50aH7mR=B$l{XCRHp=JB)xt7=zM6LIR@==O2b> zq!L6U9F*?)2m}R0V+{2nP6Cfmv`WhAQB+ceSZh0mPK}JLIoIE4kqq%aZ!m&-nV9_0 zcKUumA6=YqKqp7YeH1(&vA~jWWReRR6^;K!L|cYg@uFh{&rv+5n+ou}S@Z~!#JntP z7hRT%BotuwXcd+@IslpiG%~w0dWK;o`I-E~C~9;;<6*#aKPKTUxDPAK)XeW2+`VA+ zOP5akZ1m#(M?gHMcngOZVbUNL&8qkJqtw!ih=-y`a#|i3#2aOL?2~t4eTfgd$@&Y* ztyov$z{Xqya@Z)@7NzOYopfaJ7~pnMScLL@xJI&8EqcFD_8Ap#ntI1#n zwhF3-N)%)s!IT4~n0BZNN4RmitPM$WCo~iTKa-cJNP;ssXT!Zx+lCf*s zb{y|yL7ePDBy7j}9jh=ewGfMQjX22To|o-FvCIWO1;r5UgzNY)sDG%Y(~q{cArOxI zHIC1LZwt-Y@K>Q35gT!>d}P745sWV6<_ri>V0b_ybJ3B6cr0!bj8!ao8*D?bs|S6o z>n6I2M2hRHiMe?HNClP`8R*!$@amo-d~~z{tG9g#gS7$K1r*_ z+xx4qsy2*8IacX66$ZKky3u-jCzPy{N__}TN(YR#C|`G@p2W5yPmkwTXJPU|4N_Zx z!;Bwkc?%MDZf-TUELn+!)fuhxn>dl+@xUxU2`au-S1 z6oFpD<1&P#=Q6(6U~fgWC5$Sw9~#5RHVnYXAR~E zYV`q>Hrr6mm{4P;%R=7}}lU5soT0`eSQ89=faTIBdfzK(PW{RuH z#pg_DbPg{Jw1pF}Z;0@5MvFw0L1*s(%yu7xgjtram9B+^#fBQBkc;K z&uxXUP+#c$C_ZlfCW*g;8MxUz1c!s7E6o-_ktLhAicFKvs+a`S!i>F>ucxU3c)!k$ z3X*%FA2`bQmhd;zY$s4lVcM0aKm!|%hWyO-4VPH^p4*6dNZUIHutYzM_wqg1mRf@S z>(=7P!Y{Dm%@?t6??x=%wH;q&R^r2bW!SCn!-mEf%Gr>}A(E&J@t9paHw9lG;eJ2b zTZ81J0<2!X0!x=n#>+3=g?Y0+!&lQk!OQDY@M%&R_LjPlt?EL$g;^&nUkFQ>4a@8u zf{x|#DTVmnbU9Y9-iO8W7h>U8Qza~0`X#j^d=D(6qF7FezyLYaE{gXA_cdX; zsYA7~6^9Pz;nUY9W9GXbVa1&JSUGPAKKS?xy!G}}R8=?AEtpX6h)`T&sG$(lS)vpS zKeQ?jj1&sJhC*PD^0(utqJt^XI_Wfw(#*hewgFkA6^+e=+(CEbMuW~rG4Z2@-z}z~ zG?>DWai4Ny7;;?z^-Xp(5@yDT!5D%OSgXb}vEd4aS3RrPU(N)|mb-{1=49;ci7qc@r9%wKzU- z>a=K{!inz~>*(;E{R~Dmhr)4!w~9(heAdUMuwvuhjel2a*B`QGPS{t4=XLG za&uc|qSZW>oedFbML{OUSkv5!wfYm7Q`d!QrBSS?YC|?fz|PO)6t*w*z{~kwtVl1w zlI36E(CTT}F!L4cUON+CEuMtwt-`(X~BfHgV{t+N*u%@Hh-AIF@gPP~$) z!v`fUtgmjv0Rzu}Z!_kV2C;PcJnULM2Zz?p#?FNw*w^ zwMIt^vP$dm_S+P&_ut1`lV8Vs@4t;FUU(WG&X|Vsss?FXn3(28Pe-IOw?S>8Td>Ap zvBhDukl5)sR17#BMNMsrqM7bQjDIs39Z<1imD(T_gq+Wt)qXUp=~S5IGzup}$0Nqy zR5h6STUrW=6$&9X(pWYzK1Rjgw@_q8x+W`BPKuPB?@=@?aSBTiYVJeyN;8SB#vZ~O zmBhv16pkfCVc~m@PFS1*qNf<)Ia62&I!QYlj6-JzMt7Cv-%CqA#BmLVNsnAUs4Iy7<#eAIgGc{H25gX zgfC0{n4V?BqLMJ?=J}A}0raiR<|92)54<4vag>eepe9Nu1;j|i)0=&GzubfjML!yu z!BUT~r6vF^AC3Hcld2o@>RRw|zF!iSC1p_@()LNhLe9fNx}p~{9XKRsLvAWUkF^rc znj>&)iXk^tW3|eKw+~lild%^I>jPNZV8PbXCZuFlBagzlEKPwO`d;ki@4ZMtI9%9> z21OG|wUl*LjaIh~Hbo^i*4y#L(MIgAkE4#qo~(}{N#jC;==sA8wn))V(gWVM4B*~O zEy{{CaN9KSJ1e1)rNL}1MY%c`JLNJ=IaZBbJns25AuLQO;W1QUXSE*NYYbRfV!=UU zw+NWP7KMp!&7XuGKs8oCH$Xb^SGwi6E5GX;Udy)VCuyFAb)~d?@qxp(!f?UTrawk{08Qq&!T`cVlkt0RFsJkA1Z<32Tdk zSXJP|=R3+!Nw+Gu97jEW%fZ+!WA?u$xePf5x*5h|fp-|2ON~e<*Q44LVjb8q{qtFv zJ$p8$&zOptvp&afpMMH#cWj}{&_ZYMQCQlcwY5WOYJ=PHTZ)XQitMK~1NjB80d!seGtcdQhiyqn?hZnDtiOXhFTqjwZPsG6h{t zodE@Tbx1v2KsS|%wDdw`W|bl*ubRSRf!*0IiAq(C33@Y~uULtaPDy7KA`*ewGvZqG z4&hk--zqHM@h85f)|)6SAqKg)c`UBSik?Cg6=pZC$dHuLxliASceT*=x6q=+1w^-D z9+b%VL<1p_jf{068Mku#Hf~FNyCMDE_+G~{h}s4{>Kb+52ufeSnBk0NBTe>m_PwUB>lgdIUPsDfOvkK2|&%`RjAcfM4-KsE(nTc0XbSrqyJLw7&2r#gRHE@|)dwaq&4e~?G%_!Nm$m&j$@~02nlo_t4qVu$a2w9AVQZEjGls*w%|*AlN*pwba9|DS)Q_7^3bbXz5_qsyi_)$A*pCAuOzjA&10hU_BWb z|2h)oVzT-w?I~>ZjtI-4QZY@15gjoV#ia=KwK=d`8nKNH`n_W+Ea$lH3h~u#NdZ1$b=t%N%|4AHT-MyL} z!jt=rm|D<^1w|b=)I`Uk1b(-+7|Z3oD5}arT~!`*4fUumDTYbkjHDyG@p4iL-Z;=q zcN@X0dt}JccO%bq9I5&f*j?X-l}F^LwDdzo*P^x$q0T#mef3T(IaZIAc`AIBT8m8A z02pFencjpMBr<1ofFg1VPBvP*$WnO_ zQuo_4gPpGf;S&gjh7b!4p9Y`vy$BCjx@j*)wF{i3G5uZm9$|@#o77b*R&wAQVHw4L z<>tNU6(%P56v849iuJMLTcw-#0iNss4L9$FxL6(S4B{5)9*d|C7fD3agAf*Rk40Ex zabLwpQ4zhuLW0=%+Q z;5jbMA$442-L&u>bgxnW3Dz-CNAWtsOfQQ9ky-A*hI$Lu)*6vh??(f(!&QWYN5)9$x)pF+585ZftmA7`48(xgOKP8{|DYhHhx2 z>TlZBIq=U2i!~gD-s^|KO9J!vp^^2ISm3}j2aULYLp2sv^k8jCC-Qhcl`NOv?@9DJFyVcwq;^wVgJ-p(lk8lODvdsOooHze$1h3oV=q1^E0$qm|TyHdLMGj&G>TmI!u1)Lwxnw zTugg+Dt`aa@38QT`Dm!q(6t0$vQr!_y{OZ7ppuTIg6C0YYeS9qI0`8wh5F;Dr`R_W zmAXDUl_+X;ZOApWB3%_hdXpEq%^s91=~_guuO=I6t2Erd76f+E_0w66|6e9pCf2+7Wc~^H4j{25-1Uf<4kr^boxg zy!>3iM}hG%i*ztf9OT1MhyjoS|AWF}9TApzFCE7Kg@r%*{~%!z-HmG-3{?0wX_|F0 zJ-;XpaT)B~#qw8S5dk!MDNH~N6m|JT?>GLQxJLOuEG*HMQ;5We8HmipY^{=m2#apU z43sdPgs2Z8EW)uc&ZM4U;=1g}<*;Frx43M^&m)k!9ecQqSo$@nkI`MJr@ z`V;qRxLq6TJsuuHh{PE2_MwNQ9irI8f~R2S_hdXKI|(Dy1E^VM4J<%%JyhOPFfbD} z(fVn*5AhoYaes#GvZ-?jiqqpg%oIH_|D2y9zDCoJ_fmCOpP7fFIR_CoRKZZ44xhRl zb$tCvwg#^sY(Nh8pJ)Zm3vjz*&>oE6dHI^y{k-=lwz~gy*Z#~u=tH9FLE3tRi zJnY%|H4Y~%$JUiI@zLQTe0EfUU4~OgasclfsK?X{CDs&}Fo%TrUXm75D!Vb0=X!Ux z6Pu2vq2SmNsIreio0oz7lmpn7l!#6Fb$DY-4i3^GmGfNImbtN|+KnW26g%qNNNn(- zk>wm`nT8`L{~E{Vz~8j1bKsv57FSCfi73Xp7eqAxoqqr|JpZk%=WWDSg{_!*z=G|? zZAho}`t`;<%&H5rF7~1zYd;E)9!1{a6dXxT#QZh$@zU-be0a1OM;SwVxu1j0ejI4@ zBFBCLsk$!IGb0zmqBq1~G_|16%ml#JkL^qlN*Rl}tf%EHvqf2YY%Q{((RBh@#d<7T zx(lCwI0u`SZN`Qr>+tF1k1==pSCX(8EipKKCm=I)BCXVlooP+jbgUX1Gip#^j3cSS zf+X&dx!s=?ZnD(uc`LROUtmCa7nQCP&y`R!ZxTpwB(xe$YWJ)t#i&#Tm+%pk^!UT;F zqwD`aD=cPu z7SwSBNK64T3FDY#Mv`KEI7rfGYfOI^{tLpQHwBp0xWqbPQf%}MoIpPdMkT` z7+oDrJQtq{96vGijj;5xECZtQ$i7}S(wMkG-ooGf4xCL4{*?&v97iF}cNC-L5NJ6m z!G9V)G2O=*@C3P^&>#ha0>tu*aG#@-(zUi7M=QlY67C=o(xHVqm}!eqxV`A;JSEMl zYiH03h{edn)FRrpeqw+L$O(8TcovG6KrD1pN-jo^t1UPv!5Ke642^)Xka3#E{l1@EgS|(Kv3>1YWF)La)}GbK+r18HTb5&GS~EI~q<3kD{o zG%O$&q0-!kI+9`;MOMWa__R8P7mhF^Puzp`UrxvB_us^)PdtM8Q{KmyUw?)DMYZ@M zsQ~HBjC1*&8VX*c*dK$aiqG@?e9d-3g9$Um=WIf8CWKJ@D=;cHuHczM(~A&^!tD>k zNyjMWXKPT0uq(@eH_AhJI?ad|QdD^Jhzg$^QecO+A5SD!;oV{f(z5fgYTDaa_Qvn9 z=AA!a?t9PR-KnqQ^~5y1lcB{Xx|?VBEAc`?BmTUz4m0xUQdvJ$-X7E_?Qq&7urQ0a zxH_P8_93k~gk1ZuBrb`X<5JJTa`yn5tr2Oe|2-Sl5Ua6k!wMv9U5j~3zsB_0v(VhA zgGm=eGYhob*@LCW>XD{zL9wkDhZ}u#$1xZiWN4Q*fOpJ%*@op#H3>4U5}sQBBn`V zJX6CYZZ?bioxt+@w$HC;I zh|#4AQ3?865Q%n4V$vN!N!NxfYUL9`FcKOK~Kx7Axn^N7C9k2x==( zdSENo&-xG_t>25)>CChhZOGJgA-O3EIb)Y*8%heqRuXNZnT|*^h-Z^kSiNp7(zkC! z`L0bkwsIlT_iV$;HLH?F z;A~=YCe9`j{|L?{EKXmL*=Ph-JH^G>4V!-u)E2B}`+gzUf%l6&*glADOCieWEkLT$k0jrtd>F6Xvfljv14vN4@7$}fNcQ4%0Q}FoO;dHma zMbQ!S@!4XhU>4hiPC!fHaRfRLZfElM-zO}i6e?{!Lb7KNt=;OE8o0QW;-Y|gRKq>A#8zzyp`P~6 z-2MICEx#8Md7oQY;%(wGQH$hQB5|>5`;&YZrfyl_X7T zBeDnS7)Y?+g|mpkzY_lyVUcE*9u*Zr+`Jz}fDKTNx~4K6j@OoPPz;`-HSUU=2h$Eu^gu$^&uJ-5U+b! zH$7-)LlJPqgt&-HIkfMD5EXG*PTU6)?=NQd`d+Rb^AG1@S>jPNS%c8|+K^l$$MjwM zFnQB4%uiDzrJ)lWGi@j)S<6^gnU-GIc&uwnVo21U!afq*v~)F+igeg|AO|INDma+= zsCn{Bb{@d9t5YyNU4}iHcC09|;(Zd)`kJWZFf0YyMmL0~w^9r$oXF}0-rHA;&GJtC{-6r4 zQXqc!)(4nA>uVg^yC3UTtisE0PR5^S&cL)n9X`p{V?k{cZ|!eJ8b$g2q-K1*i~*oy{`|&S}(GymB^>d*n8+G28Kq)y$SU6i6xjv zR?Ho_07mK%m%qds_R^}lqstMGET1kAjkF*$g96ET6D~pwsI*w=621L=?2r~Ra}XAH zJFJAy(LvBnxCUVK4Wdf8mX=`{BPU??h^q#t*q(qoCiFZVSY325jU zi!YJ$KY{NNmMBTj8x*s2Mx<#%y8A}D8ViVVEMn$oQAVP7$C(&eJ$l5g4D$2NUeWuh zk7U`!{fRkrj#F?4*!WN1S2+jHCInQL-wKPET$FJpgoO~DM8x~c^e6CfksE9CsHk}AXY^hOjl zn&{U0ptT3VwuUB07>mnon3JnP64mpNm2M;7ffc1b3X>B}eZV0f@M^LgZ4WJjp88)jbsvOpLqavc&#bPF?Ukj`v5mn2=w1}}QgDM`)>HfpVK^c3hQ-}eTG z86#&Glu?{bB>oYcOIWlNR%=Ti%uF1`Tv5%M7>;EbFumB1cbMV7b)-RBx?oC*9Eqlr zlCZpA6-Po&2^!@Z)Ra|V|L#P5I(;VIU%CWS3v?6)J?2)0Fqy(KEmenE85SI(J6KTS z!}5dK(xs+KnGITJD~ybd1d7e<Kv3}H&H4U=lZQb@tJ@qmEM7qXz38^&xlzE2$H0@aW8N-F*y@w z6N7&xzE@a?(J5WLry&MMjzX+b85V;lNn*mexZ|hbpxB7}XlZqB)Uv|le7`IJ>{WE( z7%j`yJEoHm z>pKYdBHciwP)Fzhqfxr1D6{{OWC$9;s>MYn|Xu%$5 z50;g?v7s@Fxz#>Q$B5{U8$NIB!ea^bSX$Ub zH`9xBOFNDk+mIO;#4+!2>?b*`FVmpf&+MO#*UYjb-!Y>cf{Ewriimqu-H3bJ5OPFW zE@u~%QJhUA{t=u@STz22Xjlg_9*>5O(X0xgGM^c{rW-Q0@k2EhBoru+&$6!358?F# zdc3+%gTwVK*G3(-!XRcDpyzD|K zxSgD&l4|V2c3Bkb6m3{fnVnbW!Z9}HYKqRbDhC_d5ELXWvG7tO13E|VhnAV!{~;8A zFTO`ugb0LLIPG0xgn9>EOC0T;J?QN}E|t$W=lZQb@tMH!!69_?kQ`gPnHh9Sm%_wo z{*hUZ330jWyYMX`_*dimghdh+LO2ouamnjUVQ~gV77!By<$Mf8XY?d&Bw_>OXBXW- zwR;FU5~L88jTKB541<_@NQnhv+K$>*99Fr}OaT!C{zOlw5VQ1vhh*kqBEjtI8)1o% z%qZ?wii)*$WOX}9Sm*#fqQ8AK0yiNpr3r`?4+X@8gkSKtmKRVE3Ytka6_|6d26I!I z@MTH^KFX=bl)`3I(p40Z#5Z~Ru%E}0#m2VB-H(H8oTUuyG{)-m8XG=KEytS)8JK*a z7;o(_!sK10_+W1}KFUyIVI3W~>p0RGs~O@ZJHMCD*j`J~*{qD?7~^#-U%!#(#`Hr4 z`0{WO<{hcTLJHXIv>MD1^JH=VYl@Vpq0oqNG&;5cAuN{GlQ4yP;0RGf{cVW3ThKw_ zJe!!DiEj(UKZO+-h%-y}+q$4;4CojS8luA10dhJj)B~7R9K*9) z>#<~i8fId~8QW25>!VAF zBfHUq5`_ni#vn=?w8$>1fLbd?M1AXzTp`_>733gzW0X42AuM9q5`*3bwaP+43B&Cc zy}ml3)5Rzr-!Cjjj4k-$U3sxSxp6`oJAM*+*@D$=CCOkD1l!X~KWU;&su#P_2 zRt`n*6m*ecCJy~{F@3NO(#^1a?5}nsTOC8NbC~V%IAh~~P*}vJA2-QL2#bP&w{N@l)V1}l>fG`ahb)$Eq8 z_nlQN{vLdfumq!meEZPWDQ;4CA`ostYeyH+PUq6kjD*gGr!FpkjsA(}LyQPve>=K+ z(bCQ=Gd{A&ndlWJ_9?m>i*YR9zFGfmoJ|b=mH1v^;V}v~BHceZ1Jb}&!Vzpiprr>E z+7%lEO&98eHg*!S$SEvOtwp+lgdj3KT^qhST93o#4lK!2VP~@syV!6)%dWvDgCBK_ z11sTXqYdye#Jcu#A93#x$%>*Tf;KuJUE&gG@%2ma(#ku+;u>+Q1Pe*dMvLC#ic2sE zQKL(03bjHRX-5-@$S7QuX9zaeAWZ&NW?zHo4@&prYJw7ivY$zIlpRW>~)cB zTo%?76Cr1O7&1*jnzlnsdRfBksN4$VsKhFVUC>8QvA$0s#A9$Ujw9S>tGIMUkum^s{F$+G4@1nTQSsQ zQC%1-WUW|`Z^ruiFg{3k;3(t$7-MR7o(C0dgBr%JNaXGPBlkrQ$Xl?rgaV{)fmuwq z|6dp&`QIii2AxZq8_O#CzKcf1hO#=P235XcWV6DLR(qv}mBft3)0vR*a;k;X!s2t?999=mhzY{QfCOE;7_*dflghdh+K~MtU5)}b4dN)7^VerIZq(e}8JE05>qB%T_g~=7jwlJe)Q0{3C zVg}tpJ_-4dsU6iM@CpX*v{xNbjXXitzWmy^^qqB!^rBh9*or7X^h*uC}2`VMc>2 zhU)qN3QEneNWE=Z;BFg41HUKSy3W-qO}c4f0~XVuh$(9f+>e@BqD8F!Nik9~TNi6` zsP%DF$(dQIT`>FFN$@>zy2V=M;u7K61!WXx6N!HW=Mt7ydmFlaUC@dN5q&{K?LJuL zIy5u8Hu5-iUO%^u!q{k|2n|tyS!O(EG3~uV>w$vIrL*>twC#`?e5kdyp~@J8S#5_| zVS%Pr&;7Yc?5r0h-Gy8aoz^Oeih!-j3a8u&z03t=GaUonMx!Q zVcDKsio>OKsL(r6sfeLL(~c@x0QqGU$|eiy8+9lutbkFcr&tW*R6o=Gep+5}+3QRZ z;oIL(=ji*VY4n>v@~D{bQaBbjlM{!dRqF9&rIqhMuCv_ub?s zE9>{aQCLPa&A@E#Q=3NFv%lulC;G-=N>YwQ5%K9 z+KC1}mTO|jR)jHkZz)!0sxd!Jg-;V}FfYf3RZNAZry4OU&5q?|alE?u2(~p?C@ja( zKmyh|#FP}BY#43ul0;o%+6l&mHOht)ZDqZRL0#>vQ;IwT)*ll0t;C9v-O|EBt`N^d zT99f40mg&M=tE__1_rYi%_KdKJBae~YCekjmz=cwT_`XPVOvcnURz&-&yU)%h{riO zsR?f%Xhu4Pu`~$CyaOmGtb^NPhqj>}QI`{qC5349I8iS*qMn&#VpD|Qjp2!n_4p_| zgt=7Exg`;-$g_c=4l`Yd!xn;>8E*@JKVY{absC-=|h?_hO|Z>@?}1h%SERFi!=~&gh)ppNv5YnFEHAG6U>rNtIEhy zfuqVIw&4RYILJ24hGsI_VY3INNo>U$_ZA5rn=(}iU@3hbdf+0huq4$;Gqb+EochXb_L=AKhH#Ik*RV=YqYz8U(MvabPIS|{Cg zzcij}Uzr_W9M)m4Y7nIqAF+gmqn)n4?F8E<`H0D#NhDf)U)=DIQi$U`t~lGD7#<>K z_6X7PAK0IQfYZU#8yVXtaIU}a6&9t=NTnw+#QG#*G4(PKsd#lffEs3M1_q{&ifAVB zS>qir(+N1cJE4t`;8^}lIzXp}CZ3>y!&ybDK283 zvcTzuwMK=-)h?!7InMg&h9%M|!73g@9k7tRy<+)WF)%VNep7TqWVy23U8jXbh>FY9 z3X?7dow*G)N|H8(rPeioBk~AlB$VLG!%g@)O^Yo}9Z1v-(SG~z*&#iq9MoZ(!iO|x zyCf`i4%WM!4aCiQqVw@H7@a{T8zII|WJFvX6c!JoHx!@??NCx)oNkTzE2~sl(U|_7N7>kFQV9rXhW4oG-hjEtO0eqUK zmxQH+B&zVAKuKv6EII=!^KwyoCSlZ*Jdzok@1}W>M&2moe%8tR zu_Vg~wrP^}DR^9TGkFzIR@dXmzCCrOAZs$fCd!kIR6_@|sWyPsrB2uw z`{EMX&Jq*ddz^&M*rT&Ko0y!5vx>=?_#R>LGSLuo_}S@3gt!P{5hJNxZpH#*KrCTy zv@sb7^h;B^=$RB)=%f@Rz$U8)X15O(vr}4m)nW>wQ5~eP@H2{vjIdFNj5@wgF{o!O zH0mR0&_z(M^OMj$XiylT5F^hiD&lfbMTHv83NOm*JlsA)7elv8hahiqK-S=djshXX zNeGL)-htXi6Of&$Wq{(&BDdz{+CFNk|B!^80V{V?b)6g&sq z9+tnDfRaLDrh66;qT=#&uwGd9Ol;)l2$YO3BipmFXAm-S>!u0|)|I)jEZ>67H6CPm zkK-WslNoJ;zT*Tc9bv35YeOMzueZV;KN! ze644LxAl=|yTqvL6U?sJaM}3m{GRBQWaMjim;xY3k^2#s;>1+zqNk0kn_c+$VeH+z z7b{n;#NNbYv@t%EjF;u*E=*2o#AZvsBnXGtSid-2g*p#o%)?~G)rH*DY~-aK!=9si zvG>?MBpuj>1IgR5V%K)mdLk$b^kG%G6>sh=m6jE*C3mbZW5dpFfQka|XlGXJ^&(;4 zZtOjnh|Rk;W6QqnSVk<_vkM2(^QB7(;{Ia_v(PsaOYrW&DwHv9X{fNhk)*|QliCa0 z(a0sL@4{Kc;af)Xw9mVGQe-BnU1l@D1~P`j9Q|jgdHQ-XRKP010JAEI3e# zIXknkGp89<6n&+$1GP#wiprI6F~jZYVla&oBT03bB7z}ec;Fj?6%d>$@Xa5$_c4<* zn!GSs!?05b#X?>>I$DE!fN{j+g1^^7L2Xb27Drb@Q?X8uem1w)Kk zsVDI_u%0xG^=8JV=(T5RKM4odsN-`hw`t`8 zQ#asdoI3a(^%x8jc=$VZ3SP+1WQFlA<{tDhz5>A!VF{iVmjB~izxDUM!qTiZFgW8R zsUFyvJz7a#X8xFgWMMts%PUvoM+UQvye1D}M;Tw|(voD+x}`TB$I(VHF=0E7Dx%2H zdXP(-Q*3NUg{2!c?g*-B5gQEwTJSg;sX+DSep@8d*{mrfyW4 zyP=}Zb+s|${gzPty*QhgoQboE$(i{7hp>d=V!9Oy3%3hM+mcjH3yY8L#}%igrLc(0 zUc#aHX>oe7v_a4{z@(z^hxb@$%*zytb`?C?bmS%9cWW%+EgBa13iw8c?ca7D-Dh zW|+0HZiTRj`x#bd!e$b-IVePi=jR`UmkrxTc>O#^60Mt$&eQW(*$JCpi~?r{-p$~r zt68{g1J-WXj?(fPG&jqob?TQcU5ag6cf)ROK{m;7e!dx>WNR@s-+(Vl)R=Ol0_&OW ziK$+kY=i-CACA%SY+AJvTlQ~7a?W8S?Ad@N%VuLWMWHd!f_+UkEX>p3qXYGrou$K0 zWg8Y}D{-K~4r9kKv%EH#ydG@bwGA7$Z9qXq0g7r%kXV?3&sVR&)_p0gvr}kf-L9{) zV0oPvA0Mg5@&Yrq*N3o??-esqFf#%3&`EwvGj9rCv5n+;Y z3~P55BB@x53{?P`B=}{ibvPu8Uo}4-Zshd9?#O4Rln@$`ev+$r&d=gM@=*)kPUH98@^aM0Zw8R<38_ zlxu27O0y4}vYN1HcMjGj72sHjiq72ynZ^y3#v#o-F+_qMAxAQ!G+sqq4jaV4@DK+1 z-kHK8x+jatDC6;V#G)N^?{V0iaadgKlCT(EY$LAY&^r3yp}ULG<$LS{On!!>DOa-S z{PtGsv9(H#HAPx%ukm4bEzhUC6*~)~NGff^(S{xzYiL1Qy`G|LM|x8?4%M|GUD=HS zI4%gU`))+(<6Txgc%nVroMcN>$v_523YEjVSLVkk-`D`RsDJBW>dxWtP zVN&`}2+PPc1T=gs9P$6iJ*rXE$+gTnVS$%#DI`^zaIDga z5(ZqIOjuk8DjM~umYHdFV<>I(qqHf2YBg=B-iJz!3)Q*+n(ZxUu+c6P8e;@{a|iS+ zV6D9$a(fgF78hT;ptCxmW(M4BJB1R%3FN8!P~)O4ZtMR>ApW~>HZeI9QYQhz-7*3( z(WbzeH`N73-yhvh>|4AarV9}Wej^$q@Dt(^Sy1#OlEB|0#P>wEVHfw|5`!M;9K|SG zw^&Is+|TC}91^iz%xvHc!^?W|v%Ufm)*po?5bPnTivd_|u-n^UptxjL+Oa;d2>U54 zC5jM=lpz#r!pN3;8N3dp*4y}K$B|kKVP>*mM{1232g@|rQ=-H2VS!H1tt!}?7dv1-+FY}&jQliz*~+qNe`YwbXdjj_s1O}OI2O&vH;>%=jc z5A{AeC}wYZJKYb-X#d6py!Gs#@!?x<;fpDs;e*Mq;n}Bti$zOUQP8>=V~jzO-7zyP zW+ScD_wl?!B!xc2;=?c*ygV--Hmuo%DIa`yBP6cR6A_j<;Sd8= z=~QE(Q&JajF>zs(0`BjkIFb|BYdW!_If`bAF3l*|e6jSP7OyAE@KqH>qrMk~%w9j( zBg2eTJu>+G!y}DYmDG$pc@MI+gZOw&F1Aw4Gq|sm<~U|-BuxZQY)i$|5;OJ~x&M87oVV}@e)QD=T(Ue9 zckOM$0TnPe)q;f?CS*8IB9moS%yuE?`Du7QdX}-$!sFagM{!YMi*5jk~t$F zFo`K$++t$M4j9C9ijC+^DPuf{F*ei%)G>aS<=C+zTZI(5+w3L_D&=kzlpB#(Vn7*1 zzFu4=w8T)YaYAWlLT+@SS=)|E3P_clNw}>Y)h0jPmk-tYDC(K8Yb@ z+d~XBGApv=E*z}TU{{e&x|}Sg>kVi`Kz#mP7BL74&)qv-zzK{vy+)F zg`}kyzCauNqI;*W1py*Xu~D-ivPeQYHb$X#ahAQG8MHk>LK8F83I!xwv~Lb^Jufcq z2@Jx~dWsf|=;(#B>o_7jA+bnRkS8ZDdpTQ&_<0YaojrVy#7H&uF?(g1qKYKa#O%`3 zEACVLpJMR$K$=VIJ8(8JITQcg!XhTo6!44doy;7>Zwg@<+0RLmkGKIWoY$xb^7~QN z6|+@8#l#bA8=2*lnXE6+374lGR$CkfV-Q-cAJxoM)+H3+t*NW=$=BO3b43z9S-1<+ zSM6s8o`jhj58Da0qsc45leWc+#7I=nt@HI~u26c(8% zEc|VHa3L%<60+HIT)O^k^if<$^cF8&8wtVb5#mAu^^h0|J7M$m!s4N*c*JF}4rX^P z(z+Gvwj|)sufBmP)28B`cPHbs&pyJRUic%{tldr#>PL}g5c|qQXo}Hgi%SKJlVi+8 zbD2qtbw&)1UJ6TC5|)R?-+?C|{WV_u(+ha{g=g@>Gf!g8`Yq5qVklw;SEg>4?*G{s zk2;D~y`~LHeO&6r<*1H}MA&!&B4cLK zQNu)IM!peK>F&1Y>yX8Sui6c4&UWL&3_EjV%>e)fmGITXJxK z4kusHiyYk`rfw|4mV6U(jeQjIAZG0-#-ZjGe7>_BGZO1CWp^#!-d2H~+{T4})TAD0*7>GB|cI`0r3NjKp)M~#@V&x9$vnz16! zfnlR z@aijX<1c@H6|el|RebQyyO=(88fMR&jxT2k%)nPOzQ(MnvoY=C>GDIfTakf$nJJ=3JASNWuGM~h{d>6J?MNvwjSySXi zB9n2kq=3xV1%8!W0C-uK(tT3GN-i+)``-3`3RN6lZYw^sFs^LTQ?RrR!rsAl#_yVg z;;ITi4+&S>hIogV@m#E@#rD<%l$oN~TW*pDTH3h1=sXpPF}}Rwe&|0eEF<&V2s1Zw zQS5I77z&*kE-Nlk#dIHRd=3Vl0IDi&rW>!0G zMAG)aL%3WnIutt$27|O-L~U&?Dk>^am{Wy0GZx{g-@Skro__<+{_$lz`ta}Zho@e^ zQ%^pR=bw8CkNxIJJooI2c;Qcf!86Z1j~AYM5l=t)G@ktJlX&#S*KqICFXF!6K8u&% z`V@(~k3yqz!fA_<$b-_rFEho=!1FM$kr;hFY)}*raqmSq759Jyhr1s(!pe-);-(0= zM}$QzMIbK49?8hXi?6(jujb9g;wAGi^NUaMrx%|>QbrLR%=iw~bz=S=6$%U#6*fR6 z8%R=B0AKH~MG3Q4(Y4(fIfdfvD!lOf=P~QUsaUsg1z!F5W4!di2iTEaiW+|(7N<30 zd7ceLY=|{%beYWLx0SiEIah;b{|OkxeUZ+SSiAQqe*Mg!@%BfP@%fjZ*^y0&1hp;M5hBY}V%-LUtFO%|!EM(~IC~^jos0`!z^|^R{PZfT!UK=Lc)CIM;yX#}p_~wPWMnT-^WAQ+W81`*GWC<1zmBdvMFGcjC4? z@5h6W{1y)pcTTzwx86DlcietACf#ut#*MobV{aaV31i3M*6|ZC{+6+rFm4>~n0OoR zzUv{}aohcTeK*FB<$lK9fxBO3^nr!mQ? zf<{q_ilPGO)Lz6X2p-nE%TLD?3Bl|T12c7~DzAa8P7VdpTw4W`S^=NkhOT%FI*N%H ztiCZ{357_0=#q`(648;$D`qW^kaNgO{xgMT=wBc#DuZ>TduZEnX^o6X`;at~tyqV| zM{*Q>t4p*U(A&CcFRLM|D1xFY3;9R4B4y8V6lWem>b{-GIJg^)WqHsw*Fe!&2a`UG z4mP+}x|=u~L)heowx$t9=^02pkbvZan~{>T9>F*y_e-NNFebr!uw#EO+}5`^f?;9*802@A_F93O_5w#Gs7R%je3 zua=>(q#C6aHK?htLrHlV%F4=6TwILY+*}+zdQ`gcy>;tWtY5z#J8Au2eD)1Y9D5HQ z`}H63n@9hEJMVZ1k39SY?!EhANmOo~a3>zP{}DX=(64dty$|5w2Oh!w_pl+}_aMeR z_!w^GHskL34IX;@IV@SY0aX=BSm=oCmZ-Gugt!EtXLdCrEZvf@n2B$M#nlhHBrL}% zDs(t*ijSCD+}%zWLC0ZbmRv?bc=;79U9lXy61HO2>?wHi55GoPvjNTgZbESg$+bP8 zxxj%cajE7w>gYPAZ7)K;V+c*&VQ3xQs4i~8+3TVbR4Ik2@OEuieck{OuX^QbbP(!YfPUr9WTD~ z2Hu}B6QwnB=*)2xI@>Wny#aM}D~GLvIIQY|lFzr+JFrjdWtq^Su?$3Kh3~@I#N@(SJ~Q$WpyrW)wePR3I!&zI(usBJM zV>aNkV=9c9zXfj>HY1CQovms^s~ug$^C-PJg(?8dq@HJ$8XtlM9K*=vtr=BmSZ z`^#;3chP=4^7bM;`T07GeSQjV{Np?L{pX7?XYXNropc1d>H}kSdfOg^!>!Aal7;_{WqBDkLz z%StS=C8mK93vr1aP|`Z|;UPF8C#8uX#pOWZKE$Q57K(R}&M*`f)5lZ9S@t6X9f#l+ z>nX6&2#5(bTRKS2o+!$y>ak|SChXjk0KHiUmAVOg61N~L`!IIwT8DWHW?;jnr6?)O zLQ_*Y_U+w@sZ*!op@$w~hIT9NyYD_`akpXY*s-|djyohwnluTw-+nvpyz@@neeXTE z_4eCv)7UZ0^2X!#yYIw}w@t*v`yaqKW_C|M`)54)#B(^7ng@;2294ImdWykH5-^E% zC0s2qP$(@F7%NH7;^{<)uG4DofknXC3!S9{Mp_VYIZVaOUTq0NZx0}+s2uNp^f9K* zn2s%5*WuGC@8aW6-bP_r1@xY7Y%Z~5ez^}*iro0)t}09|vS4Ue>+ni6%Np_!v)Cm$;%Z1SjJ}FNO&4dzM%`l-o6WA(i#liwB))gAD zFtrKE+LKsU8KXNX!RvG<3F&nxX!1xMXi};ySVm{KyT19G0i>c!@QwlcJ|!x8@+Od+=FYblq*Z;G%0W>Gp^5@rSeNa3?cKc>(EoMjMk$ z6O%3rov|)}y=hfgm0XNf6!XpbdgST5QA3i>WJJiW>P;zi5 zHhlRWvUh)tLmQ`|vb2H8WrX$KLWdtkMd<--TQvi--hB=UE5C%9F2$l%B0nPqQ$Bnd zt7pGWu3do!#&RKrWqqz3YI3_aCRULhhMh^ga4pUdwy{qURQs|BA3kgDBa^#b|f4 zgMm%~5YvH+{n$vLQI?s=EXDhFVKKRFD@7k*1BQXgPs`;4oGcSg^f5jO`UZ zY$&v2O_dSFY`Ef@x!%Ss*7se)B3w-mj%p@v9>o9yh{H_>h7VDIRrGlAi(@CJ7+laxV=~iHmdH@M@13S$v$f2{! zu5%!Z&PE8!*78Q|X`mY}ZA5M%#k$VQ@@l~@^30NYI=X5%Ca>6sA76hrestmW_~k{{ zVeFW@@%pPDOTzNlqtD~!8}7nYmyg9|m)wYp&c6&dTyqOa`6;YVsl%=^JGK^@kd$x1 zzGE6`)yREEYOriiE*2&gVCkVoBvt#7Ms?4VwL#|WhsN3|P4D8P=*q3FsC9OsmV8u2 z@o5y7Ls{>}<3JuA>&6-vo?eiEFZN{Mk!N1U9amn4n=d#ImtS}>F2Cp!Tye3$r4+tP za4B)|#TVnEi!Q?DmtT$>Z@f`TwkAxNAmPd@uf|2c{1wmTD*WQ|EAh)~Z@|y4xDG$P z>{?uO^$oa~?_YeuuW;E#7vricZ$!erENSpzqnR8^&QsXPIX-d?p(J!XR`I#s&uv&2 z>zUl_FH<44oG$IyMjYDo735iaNE%w;I4hcn>Y8w5(|jD=HVYZM=Af=h4!1wfM79(4 zN=}W0tutAep|!&p>4kwBk#B0nD@&5_hp+eGh?$kkiYwK{ z;Esh*TXhU+`{!Zn>i1DwoH}wcqu15og;}18^yCFdPhA4DEh1&+;XpUaa;lJ(v<7=O ze2KKZ%Yl9m?H0c)aH1EErfMAAvjKaPHlo(3LygWU-DC0dct*wGAB7MHLD-|Og_xW< ze&E|e@@QRCCyJ|6W7tXjg4-_6lazx7TJ+*P>ZQcPDq^* z#&qKe#-48#8+aLHf?jY`Z;1S$@ z=l!_;#tC@n;V1FC$DhZ(J?YXwIF;H54O@-L*2XNl6Gl5l!y-l*x4>j?g^`asV+>k- z6hQ&gbZ3~tyUx+Vee~z{5Rza>+ zqmD$nrOJ)S6-rItjCz;?DC3QZUmuCt=UxHCVT1ITChk z!P=!OFzx-RQm-%vGtqh`38l_K)G|L36FD~0F*R^MWlY8z7$ZIsc$E9IQ(y(oB`%|% ziAOP6sEAMDU_{4~7K(#|v1+8_&(pObjiM;Vja8UW;t0t;)6j?gmTnxR8&nR8s|+V_ zsK$ikDmxPNzyWfE5ZxTp5Pq|(9FHZGl-X zF2^;OU4d(^xDr=faRn~D^ioM&e({T6;OeWdKAmi_4NRDbD=)hWKj(LU`Lhdf{bg5T z+_g92`fJDI>TAa0y6Y$4imPtMMVDTK%dWfu|8eO!Jo^4pe4b{*ys9p2Gy@-G_%JKe zhS?b!Y@zc@P`l|IPM|h8fGWmnB1QUWvy<+v0;&6!V;_YjWMYy&L_+!IZxA&_hmf-N z9pvtshAKL7G4EfnyB}HQwfJiGUoii(KcPNz8^6aO941i@GVss~ou&c{KY0$*-}nvI zr0F-B_L>r_FCh zhI1GyHokmC02aR+1-Xex+BO|~w@iaURw4<@slEXTIN^X@osRuGXCi6O7qHl)%+9;e zLUAd|D964HU*X8E#gLUB;sG(`5TepYZ#K}4cDn)l6V_qFrbQ^Hr4z!U5_3gS=||_f z`A0D#CITZ4MRFHXSI?1#Jt{cof{jkY=hK|F+25<5+11AwV#dS+D z)`Wr+7Y;{Url9i^zXc+izR;n26=#7a>e5VlSejF}lAY!@`(Ys5mRU)RI7s5i) z62c9Tvhs`Z?#CbE#<64Y&~F|@YQ`awx&{hm4Yq7ug%3Y^15>8HBMD1g zLn*3iijb9)jaOcKRdOW4ok&^PX<@l-;+?qf-iL`tq-)Q&-SvPZEO$~+CfxlXCi1h1 z6rYMIbc=19kS-Jo->B`n`SVM=P zB3YU-eP1Q!Wa=?HO@nuL72?fJnOK&qMXJ1oG1H3rMl&`pTaLwFO~KY}3y_eo6g$42 zhjr6uVBU-clCZ2yEWzT#3TYbh9d(^pU+Bex1C2OF(b8JG;H1llT0)YrY@M?hTQ{x4 z`ZX)CVfiY2{MJWUzkI7iav9oywA67@Wf%=4JJB<(SUZUI#X4lN9HK5}trpQCW<*%d zCN2WPnFxp&6|rgcFrN6nxHKjn1B?|b;~}ZSijCOoOLu(VZTDf^!_VQ?7eB$xpU%gd$@!4!#iCgwQ?wW~A=u6B zu$>l`Y;6Z#-;|EKW^TaCi3LcYyIEZ6!$Z@yvrejT@9!t$CW?a)mJ5IKQ~dJBKfwh* z{u$2y>Cf@Y^L~Nz&p#jMop&C7_OqW!!gAep*GcW-j@$3VZMWTlYbZ*;_$jyh$uDpP z&+!KC>vEpUg%@3ei!Zqj=l}8w{QMUe#-D$s1?ktM{M6+LRJh zJKC_j#30R5F9x`a$xL9~p;tW8da4k$+@8!hR!nKXL#gXo1U6j=kIF(u&Q6-P?hnxRK4&zDaJx zwsi}TvUek_nrapVcPhHHNv@>_Z4M(guUm>GD;J?qu0)B#2BnK+OClZ>gntI2;La43 zGaL5kXXk=gyF^SgFJ|-g&~;>~Jvdx%LS~H_=~YI!S(j#3Sh~WAB6Ac$K6iSDq&c~g zOH@d#^J7DS5y{L_8eO8-+c4~bewIuBNY9K&2RzXZ3Q8x@Mf6ZmSlOfE80tl&ZHPn@ zMR8R#<}X`|7hin~UoTpMV_BIfuc=0Pbrlkm_F>hUHQ2m)Gcq$XA#0{USJz?v`b~KD znLlCtxQUoB=2ncmVJvRD`BvOB?oLd&ZXE6&I|+~8`7rJ$q1?guCf#}ux4i>5-*hX5 z=Wgkq%XK&2fIIHGSL#)B$6XI$-G&4dl{TWdOpb~wHHFOyqbUHhB><}}0FNsIkDD=L zql>l0U?E9bSdd103-rRput4>EE_#z`>1=CdCOWaD_-y(dtXQ=U3l}cN{Q2|o`s=S_ z#@sm+4K3Cltiq!0Whj;(N2ziEC8`eOHij{MV;c6AThK&DR9&ydjCbG1n}7H%=70Dm zmP~mEGe7?b@4xdZUVZmHf_TUs$6LEH@L5tdmgX2xLZ>3eD9kRF zVXfNA?D7PR&W>+{<6Pn*#TZ|UM`wUpBwh08d*XX~1{imPL#7UFtqGx)3CezTKQ>iH zp(!N*_3 zMOWO6%dfgY%J{Fp=1P+9zv063eu)45gCF1*KmQ@!z$G~ER~O*IE3d<^uH$yMjluQz z-yz+nxQWhKTylEwp*!)Hw||StpFE2NGv33W9)AoskADc4-~TMmd+9wqpO6AMU9FPI zipJNEdUGq>BqFCe4!3m(#fnzEzC8=~&E0~@N6K*^b_&ZY{J8g>b(poK6nFma16(YQ z?dKGafBzwV^n?E;9pAqR{M*0bKmOxC@bCZ0VRR=k~m2B*v-25bFL0A5^6}lwx&n>G%#;zqOPTqh{4~6Aa z2ii~eK`i)j0z6k&1@aFp!Txohp{$@fpTrk$~$qGqOx!MN;FnvqAMy6eh|am{Gl#pu@wc_ zwqXS`@DvJLD;lgJNm#@*{(n3D#Xo|-x)afGMPnXq+-ElMbHN}8LO2lL5cHNV>>~lC zG?+EopoH8;MiV&BTD^}yvPp9Iek3PkN%qm6im+?1Gz}V}@;;wO%m}NeUdneqD zJ8qhY$L{$x9;UcV8h;n=V)i)kR?)Tc4%~A$Gt7HQ2)B&EZIkZ8B)XV;@Ba-}tlowr z#|n{GP>B{fQXF?Si(tlx&3x@M?VS~N8^Vdu`Bn7eE-R4x}b9IBCorJ%WouJ#1WeE=z? zc1&5Ff_-IXNm%NejhHv}bA0f^AF=S`$yoB)yI3%HCKfN4jcIefV!~p?(IyMh^>O68 zPoT&*j0z?TVs>S@zZ)8l=&sudoxy|+>((P-=Ps10YLHTrfjXrONhwFMe%F4e7?_z% z0H&stBh7gVUmkA87G}&sSk|dL*lcu5gGS91g;8NSo45#w%U=$EujEw3-Z zREYa~dKZ%oHj@;_-fmeNRLsYOuq@4SppqnUl;kxnO^&?{HkjFFg{b7KJMmdw9Dm#@ z2lF5_+XwOJt~`8LWyfuAPRGx$zE!%1CT>*Ue8VKHT(%A7Diz$#T5R9H8^3w>_qg=B zM{vRA_u;~;?!nW4`4qQ5@GP#p@h)6-{X|^D7!sG0Zn^1tO!?pq%$q$GAH4kv-hc0P z{PCHmaM{&Y;#XH(i=SS01%7e!)i{s1@|Fp>mI=*GH{FECfAhNCbvmSFzW zsThCzZ}8J`kKhLnKZQqDZex4|r8QYpo<0gW2~bA|cUoAQ9Vf9<6UTZssEyp_D9dL- zfgQKLycjb#m*6)q&cszW-+*8I?B}@nybEytfBpnN`d|N!AO5fZjUWH`$C6t)?}GF3 zbK<;TUVv+POt*{^J;cWH_{Pv_QIseu=l|$D{DQ)AA@QRh{3pffhxpll@V%e@5*J)> z5w5uUI-c8|czou1JhQVAw=B%UuM<^x@{kEL%AI&OLxmTzHF)Nj3_G+j6!=bo1{sN^ zK8Q(R^ULdTaQz%)?OqOJT{e!ly688CBw>kko1s*uA$#uv>{$99O7p9vp1baN59+lx z96GWctCr0``rZu~h?7rG3(H`41l6VKSi5)z4)0+SGYKafRJi3h zR5cAKNsxcAkWQ0DEH<}_0RN^96`%x{!Fvp5GSs&pD` z;EM1Nb}QPjuEK*u@)l{nAF*z=R`iN;cfc28rWz3)0@~n+j=&kAa|w@3+UOC-A37n8 z`w#;PNACOd!$%h=ZoC<6ehPOCzEC^#W)Bo<8;M?xtn5l0NiD**ZOM3l+7#UN@B_I1 zmYXq_S*o~}e8*Q^vEQV z(2clh{I$6C&hdEp%~!B$!#XTmvkHffrDEI89auxBB)T^5Kd=|6N0S+#JFz!$3l1OJ zgWY?NVs{b~j>Mxllva#7g&jJ(SRF7-w-P1!wnCxzU>CPLcsL6(0GU8$zlDKL#{;+9 zkE+UAB&QXi*3yQxxfGGaTFgjMVa5>^79MTDC+m)4?U6?0)dbMg5JpqI9eZ~j#Fh

Z*T}^X2)V&j?2L;S!F|N zN-heEs$p@NQC?dLd0ivQa!ZkwQ7T>fJ7$Ssd5%IFbac|o?)p6VuI3(HPtRu_XBHqzVB`- z#OBH%RuovVvd|!rM@S@tp;M^UcVkX{FW$~{q1M=sDt#Xw-&TmJm0mpm=qH$X$s{~* z<4u@w(Z#s!p1ZJS%SN`{P1v+(3LbmzX8iENAK?|X{p^U&;~nUV0nniMh(`J&=bwZE>s&k@O7yHH-4}XZ_<6<_TCKKLC13S zPk)RHfA&lK>_6!?{?~uv-~atT@zbB2ho7JSEBx%2zrs(>zd(At_U17dGkyYYx^WC{ zxc(+wb;*_ZTPyFDAKg17z@iPk2&+*Ii{}Y#A@(Wyb z%Q!sy$=7&$TM4EeY{q`W2`tRDVRKp)cI7r6i1L%Xh%hZSio!;`4x;;Z41(J z3vqbE7f9LkC5jJkgs!m&HoF-XixI|Za^CTjxu`_e#0-2` zbVIJFgtBlSG^P8YZayjri%wGso4Jv$BOT2}DbQ8tK~-LWuzvtvFV#?xI)$n`(t?P? z2u*zn?EH?b@))eDd|2vJU~fK#o|qkxNDwA}C-kB>41ZUw*M2s!_2(=_2AuJ8HZdh10V(_VzwJt>EOkr_I!XgBfj*Uzq0zq$U=kbqpO||>Pbx{hN zJ%o5CNr}SZr{i(BqtYNPyOY7IbwQ(XqqbIuRV0lkUw97VZl8#Wcib-BYq{m78*$$q zci@q`@5Y0CeDaY;aKFf4DL#)ra1S1R=sw&&aV+kbGyxAjd{TSPK@50)R8|aEY!s5k?q0_0EjJS}QaTtkvHd7erM0X}*!O~6m;M1@0 z^`Z^PE0e?M6srS<(V%vtyxu^M>AuFOCuU0>IP2BjHU4G!$A3S&i~ z6Elyf@nyOm8%xdDQEWnyp&K&GAnI!a&?*Da$PF;-%q(X;O4Lo#fKio7g_&CsD-=R7{mopg)03MK@CEwDaNvFq07DbgiRt^lf1o?JXwibTs*CWg9z|Q;P>5 zdlBomrARmN)pU3!R|huNTd}H=42?WI1x_MskR1x*X~fikm&it##6Q0UO8< zlhd7$Ie`jIHy+)Ti&^zyy!^y;OuTdwZl{|N!gAyIu~@QtCAKd93QK3ch2Q^qJbroY z5Afin*J9EyF2M~HlpC+P1Q(J_@4WMN+&p0%F1-9wTy?`06qaA%(MKlWjhB9hKR!MQ z@4WJRyzum+B<2fn<&|_Tzxox%(YZ{z;THV+wb$YYbO$$Fa|6cn`w!i8F*eWr6gyVV z!;4S+9=Be7Kd!#`KK#ceci~U(FF}*cCS78cDPxf9+mKe;jKd`jI9#E{z5+G!OWhJ0 zwCyNTgs`mMjR{j%;<@z)an%cNW9%gt;-+7nkBcZQKmXCs@#Fva3Ej%ia6U!lf{QM} zc^6(J3Ck};8H}ZyzfJU(9FLoCx&_x>aSbl~IbF$*&%@=V^D|$i# zrFAhl_+C|$0_N%?kmv7#s_Za~vJ%MUjQNIIDdE;u96){Xew1YMGbW8bcN?taSVql+`9$<)>bRYaJwBwzpq=q0? z4iw``#Oi^8uo$@44^Nhj&B%ZotPj=R7~9HrZD;1sIaj%>4YqyUt)&YlIs&*(Z$$5rdd~u>q0{GdNeAT;<(!+jJtU}ZXJ6oZX16)?z`)L+%xH3 zOqzJ7^jhG~+wQ{sci)eP?|+2bkC#Rz-*C;f7<<#rm^IazcPbgl2b^E#$|_zph*_&q%R+b8h)%ac)2rQkV4Se{OlH>qGS zyGR}eG{`6h$_Og_z^e(BxM_Vc#%`&=ts9DP=ZZ8uygUVeT%3qyhfC3H3c+Cx!me|| zBs0L!q=ULi54Fq$t-?k)pl=duvRGI*ZCJ9a5U(vw!i!sS@Z@0wetSTJ$JZ6%v9*O5 zyG@DrwTw;e0E`p^4I8i05r;z)f#1|l$LeLK+#*d*sq%!O@kY>0@l)7*Oc3}!&&A}5 z(s4xKVm9RTwn_uo)H)X|HZc`a56l!Aizmpsi6g{)IqiPNcrR?MXP5sJlY^6Jk2CHa zQCL|X!m(LA0oX$^3Qs?(<$fG1lF=QvKuKZAu`yfMgb)dyfQCe7<#!$44(^YMPl*G& z3oJ;<(4(r6Nrvwf^66$C-BgO#(oFc%6CYsWn2F5Nufio)U5LjXd>oJ8{}>*<=XTt4 z>loa0({*$k%=U?EDF)YFeGRTB&OiT`xRGw-H@|rtk3IHVCLj;u&hfY4x(k1fiPv6+ ztAFt$y!87=@#*B(am7V+0sQXu*WZju&D~a%df-*bUK%bURW1hfLq2~gZu8i z4G&Jb4YzW;8?L$m7hQG(esI&T- z1sCJO^LZQ>U50BYAmVYtEut;lCbfb4?|uN+UU@BkO1C1ubJ=B=Ng{dW71!aCi>}5m z&$|>C{QPo0zaE!fGZEL^`$tTAV=kUvn}_ETn(=y?3+pN7s|~>KR^=g8A4hrk6qXgc z@#(&1e09u%%_NB$Zlkmhz~$*?T#zTl^ex_YXZR>}dNvWCpF^30X7lW%?$m^n4EV)E<1o4pDZTy~t zNq4YqnA?wx!uN+euqW{#Y)qiOnJ?{xupVds`=^D)8|#-cEw&3uRGe%CZr@31`jud` z4<>s=BDWC5L-=F9j&l4>3npAT$Jz_XGQ`D?~*=h>9&BX4V}M79Um8;|oIN zbg>bJq4ad1UJP*4g`iiuBw;a8Sd^B26w$tJ%4@>PW0hD(tGkf4JGC;7qt&hWdQS~z zB$OhVVw0>3V_}*WE3!=#DL=%>a-AtCU21U?0ZWYM+{1u6j5}T=xF`Ldi6qFY{IQD5X7`Q&Oit2N?af9Mx=#e#Im%Do5l7{n9c39!C}-? z+p&G~4*ca$FJb(c2^5C0xaG#NxbfPXFos#=_%RfXo5u0ITcp?GGqIfzpW7$gK{29R zxpg8N-nfwgVPkH=+%Lbv^v|YZ{hHNCOxPvOtMuwiFXEM#{)8RdHo~A&BK_DQESNVN zFaPB^y!ZM`m^I}?y!q0rnEJ^KRMn`YNhihPPEC3n8f99NuoXtBcUU({-KX$6%kt@b z52l%cIac8F+6d-Ud9b|LfIa0plr~w=SgV1uPEFTqfrYNdsIs!2oUqVwm~|w5rJEU` z17*5)q}O_IP#(teT0h>cYQsB~t(a9F!7jRuFX}d>^_u_XcELOG)F%nzmjFSwQurLlh z6eT+a$wp@uX4c4N!Fn6%7-BQU>4sV`(0>ZiNIPO(%p_YnNeXN)Bqlv$L3DMeF_NZ_ z@lh;#86%>%p_ng9%zzM~3ud)TU6PGVJS}c8mV1%Pn7n6Y4&KPH;Lm^f7!z)qfa}Iw zjcabY5_gQ7gbCM=$C#@x#Z6aTjO(tyih^(ruDSNAk#4!n>~Fk|Bzox;xcchrByqWn z&&Ak~%Pu$%S6}cG+;Gu(_{G2d08c-3H{N;q1)TrmA4y$#uey@kUo{5TP%ti{uv~cA zrMTjP3vk)_KO<59isEuL?i_nF#$IzhZoc+rTyf1<{NTDVlCb0!Yf)Ykz(Er9^n+S# ztFj==+<`3pfHbX3zRl0aFl2gxDCXD3F>zKRKH8Xtd!L?+Yi}EetFFCnE64((V zTGu6wDPj%ol%n^&pM-DW)bV*`GrE>4Y@=A6p zC=z#-o=<#iCXwOEczJ|!@$4mL&X^^j7^o>SRe=;dRP^iBUvnr5BZ4IUUd-k$(>voK;8en5}n1IiY+2u9>|Um$+)+PH2ZC2IP4r;AHDaxL-QI7zDH3rI3{LH>75~^F&KP=wI&ERrzl1RBt<+4wO0Pq8c#d+KLW)PG2lG9FU ztTB&Zk9z?-ABd}rts_B1L0W~{!@pi~<}(rQZ$&&xZc|P~1btdzEd^>_Fv(k)lIya{ zUW;>iE#gP=p$JJ`@k0?X#Z=Wi5rJGox(K%1f+`I#Ig&5b#)%3lTC=MhizKfXt5rb+ zN;)+-NW}fW&#?$4)lw!!WiQ2=y{As>)I+gfHKM9Y3M(|YRI3Sm@&#+;ed;wO^5cut za9UANr9#a-0ft)2q)IMUr6}woQG8`ZQsNEJbRftnj6CTx$Zn^ma7+tjn7S#k6CEq(#pr&@jjLm#T zblMXVb#J5)*W;7^5?=|Af$`Gjv496c86* zN^nw%L>b}93N8=j^VD+SZ;6r{tRh?O=q8Fa>gih|pS%ko>XZG(tz@!P^isR@Z z6{(*F5v9b`-=AE|C&!|mA2w*%Z$KF;ukEjarC%@QY})u7 z{0PeyFA&!<6N?+h#72j4)7+Rt`*&(^S-yHPtJbYx_Uw7=*mghzOM+aFn1oUy1uD_; zCB&#LYazve&?JHK3B9xMYkj9^>q;wV3T)#_cUX;<#rDk(cL^dSeBV z#tR5CoQvPpdH5MDAn@7}LJXG@BFEsXi_zI^B-MO5X*N6XyuMc)RX9)Tp5Src9Z$yy zreE@Br>nRKsZY^yk63uqgM$Hi=t~0ICYeIt$XP0@Kqu=7e!*(jLZuGh5gscJH2)QG zX?5h5ydz4=MYbgQcy*7nrQBpaMs69xP(m_a5S?5huX{s&g+M@wm*NlTImKh1{1BVm z*O8 zDkPy4$a|9Id#GW$VVSi=6}`eo_nL8+y;Q3e z?VB~AbC>o4mabY;SX0%f@Kpn?IjmW;mb7ZsMijibmlmyQ*`z6r{`x2Sb!;t;Y0sI)H8OOMPM!t#!s%XPt;?A6JO#b;>kB5hlKcI zq9O~~?_Es)EhelzZO`Dbv!(3zk#ang(Zff}afAj86~hJ%*J8+kA(|`y)C8>DxjL%) zp$qPA>6N-wfDJoG>L$Ls&xI)UFh>TJ- z@mk7{Ho8=ekd?=(DXgGMoJ!^Ee=k^6yS`e6q(rIZ+Ik*VRg#mGM4*ccPB(92Yhr?f zxj8=0_eqV9qqw+Kdu@SgdXmpADiViM@Qm`Z9CTR;_&l)ZzLflHv+V2`c!aQ+LYA+F~%sRFC zPX0@&gf9pXnCL|mvf4SBb*^cwz3Iyu3m=xU}sXgG+OYx4) z!#74pKzt#A$$0{xY{Jqq#Id9h6`o2&NDlsK^*D(lweU>m^1V2Y-%I6?O9s1rvf1O8 z%Nd_S&Wk$U5m~}Xwa+${M?*$~?wWcry57nluD%8lKBQ@2g zn!vhs`q(_CV4{?pQg^B^MyWN`$I`t^S9x7Gc5L0ozFoVqzI_Wvdpm7u@uiFAvvl!1 z?B)NAjSA)VO;hwv9p>^yJ+|%Ms&({FpEZxoJB|<(CQwYOCMNk2A&H_ub6yjW{{{z9 z)yz02ORO8*WQU8AuJ$>Z{w^PF9`5aZP|@z_2S|4rkG+CPdc!|zBo`j*)1Q;0D9 zmaq%o5`N|z;`P2G<@_|#FHI%m@-*^p{6g;apGY;EkJ;95Fgv#gr`tB1J#-9P3s1fg zu&j12Bv}9umhq0CZ~Jp1`5Bht49-NqWu0{b2JtUBD2Z$9{VYy|)@aL|oKJd*xx8na zZy^`5-*Z^x=jp6BYzZl4V@L^0JTf?*{hCAG>FE2VVIN&YT%H;>uC_uz${ZLx$l|nT zE?45}aDDo5PKuj=V$&@z416=W7Lbj7C0OL4&0mpx#g#-j9sZWJ_Y&CSo6o5X*ctYa zW3E|T3@XJ+KKDf28#aa3@$L0+?#MNCPpM_x6(0>Ov!<=nn!*MQ>r0p3o#-KsrCXb> zbZy&=?(HSfckM`*uAOM#zO6P_rE!CX+PYbd8a35`@~MNnbGr^S{rs;q{^MtS@!4nm zO=8{rUpRAUAMKhq)u5#MSeiF%O$%`?swu3sxS-B0ThO6dV>+~NPOqLF>Dj&wJ=%7Z z#4X>a#~?nFGB|3Jou5dZ?0IC14EIuTPkA|i9y zwwBmhTI1y8guA;tAt52!D)Y4^I?BZe zsF8)mDyOSeLexZD0ZU=E3W3hQ3oKQSex*p?T=b90Q zXZLgU+{XovB@fsEjA&nvWoc_H^bRr5zHC4cw93o zh$?tUaB3+*3B_X1%Ooik5uTY(L}nJzshK1v>PSf_Cn)nVF0qx|_RZp&Kuga#n`0h1 z>=me}xD-^*S>Ix2-;H2_Q!Lq%bh1R*p$aFiAX}I?J&eI|VF94jdG>VvEzgy8@a` ztXjT=b!(R6=Hf_nL@?J)ud;vdc8(v}$G*dR*}QW*i&m`R(1}ZgMdgZ1sUSY}DRJ3v zG_a`caZfl$awnw{H*u0{uiA0NJx)}6EDLAN<=C>BSZ`lO!2X2J6hv)d(?eeMMqB)w+Cy)<@v6|yg&jBQ@|Ocud0 z&nAWy57OBfP{cPTKKyJK&6sQMtn$;b*vvzmR|fv7c}zf*nDJcT@=n|K+fRU@=dEL( zTRKOA@+7h)`8>odzFb>^|J3~$cDSUoPv8?JE=6(^$Ae$6$Fr6Vj>%XEXqF2sc1J$p zPUbsqrM~1^D*Svsnwj=#Of(JU_$^V*p?Qot@6KwELgr21#DHF+zDEtDeYZArY1@_V z?YhysQycnrX(w)_vj&!q9oy5cT|2(|{0lm^YcHTs>ua^5Q>U(SzN5DG)|Y?yod%Ro zv2oFC&K}+`4y6%ae)%PB#EGb;u%=(NDq$YIk*pj}zJ2Rkr7y5MU zsyUX9-TG^NEF%|hz}7JwC)adwa5^?#cIC!{FoML@1xS4fi>SprED`@`ap`L0SZo3N z1Iy{X-ISH5?=p1!JaHHO7%^b5R@Ohcl22e!PDO!538#`3~L8b-h2qZlBt87^*Ss5l@s2S_bqslYO9)-skG*s{jlo#ke37$;WYAl7l$br&3c z^5lCyW$mYIdJ@qQZXgS{U2*|0bE}AP zv%~1r9**u_FG=vGHlILUjLh7G6NcJE-rx>c-Svw{cr z?FkbFWoBZ)w#{qVx_OOO$aiet!`iJoId5n|q}=!5_#!#h5}WY~$B0Uf*@iRqmKI3m-{D{$F72hTO*3Ee%CG?O1lxbXwgw|^$w{AZ%C z%_QNC3<# zofzD!3;p`{l7!hqoQrZT?fK%bf1`8zj+$Fho%RYW9ol!IZHrbk_|qRWpnNW&T#EvW zp5|DZX`T1oyZ6?Xc2SO{VY3#rXxp0ZZQIhLU2D2_X+!T`9U0!Y7yZQLm02#n7pG_ioK;pMd3X~_IDw)C5{ zK-^GYx{0$=08yRs3L?Gb`+Pbom##Syaq7ysC;+J@Fy&rUGqF0S-q*TccUtx7MysAZ zX(!ITlf0*E2dNKjJJ4BNSofYo*tGXNX70%n8JM_b;g%u`YLmu$5GM6WnIfVE*aN^J=tj?dr*UFNN z)Dm$mFDMoeB%~Jcz|sQqGyBoovXD@FV@h(8DalX6&-*?{5AER4hM%#zvX|s6)i?W6 z1B>coQDD(Yel1k%AXZ6!|962!ZG~I+@B;Q;&3r#)EXR%=BPuRe+jpe2xSjw{Z%!Rw#I8+KIlXrURcY}c3XCTbZy(}(Q=bh> zXL07_5h5dUw9fjBvN}?WYkq^uKL$&tNWcHDND!!~_ym?Dd2f;i7WqFURL5&_{tLuO zv)&|-)h1!sNab|!FT?n5Bqk1_-1ZE`%{PQVA3s9f9EftXBE{K;JRfJWd|k*2bR#Li zfp|ZAQUaYw_HmTwACTtiMu=Ei-&<$#Fw?{9h5;`3+_>)(f@4UeL>#uBG4ea%bYdm* zEq%!^6sQyljMeh!3Ln)%>OUQq)m_T0o)yc2=R}^rRdl@lw z7(Kdn(?*4<&U-Z~?Bcoec)7db?0Ap80+zL_ma}-l9PIAgA~?VsYs(uP+_yuX+ro|= zJJ`HwJ8QS?LjQ&}ahYWV#}yJN2{a(4mitlFTzHVo0z*fx#1vy!@{;+6cR1x4&9Pgq zjQ(Z{`_`=Fx(F86t@8-j{2dYd#*lPv3Xz825@ zQtFtC2#y2Jg>1G=<&B=fSb?M|^MKk6zLn%&QQvgmXSu-Xm~1 zlJt@zzER@B>WGqhl&qR`i(ZHe72%|NC5cDJ9e*7@x_6xSOyk7;c=p=_)9vStoEIRR zv<>EXT$woNc+3huu+uA#*|(wuEOi`^>*giZXGdT$y8?`Sayfj zvD7h>>jEj~gbGHAV_EA}%$y%K(7i)dn!*&61`Qgf zjS6euva{BC->G|72KVg2KyfK*xUp&q8#O?nCeEO5_kMKlK9JA4_Ga`_NvL;2vAGw^ zW#0@|Ua{xeeIGnRQ}FP~AuzNAujm9qQnK(8yOz+%G;OX+UF~x$uUl~P*a8mjoWTR@i)icVE3l|* z@v@31MQUxEoorse5?`NqN^9PdRasAhuJpfw>MB^vd*2K`8i~CO#eo`?1;sI^{1&Fw|Ja@s(x!x}1_R#WJ*k^<)y=;X1^VI8`=TPU>MOrgn25>Ee2 zCA32QPiIezvc#@HvN?c?#H?QAf{_Oc0 zI6e+77JJ`!kk*E*IxrPX6j(kgxSsNwkFfbP47pDaQGLDpNG0nnukFLewd**3_y~^n zce(Fi&w;(WnLlSHE0-p9ov}PEg zn|hIWZaC2whZA#sB4LK(h%uOi?~x(IUH(>L60zpf2+|)%=B>#jn|)3Ejh`{uK9OZJ z$1(56pV_iJS0}itlE#{Zg?T?^1DThV=pdh=j8{Ih#upeC_pNCE8ph{m*q2!BMPxee}sp; zE+Pv{Tb&R(>Ujlici)P9AioudCrZ^@}`A9ZKY=? z5g2MjSl=!T?WZQmj@IU|j2||D5hI5(K$3mGe!aEf#?2b3<>Mu>HfpMYMGZGrO=7K@ zHm6s_w!j#>558=;JHb*R4kELA*)_0@19$Cza%k~&Jc@YqsqdAt) z$V$AT5(rMt6c>|Ca6NZNF!M=OELm+~23G^JykF0}4GjJdlm zu;QAVIN1WOro3T?YYxYJbeJVP!d~|QYjH2I49FxO(|xeC8n64zHy+M)Ju! zQN?dW)$mY@ijriEPOLz0=S*(ddTX8c%CTgNKv&IRg;lEa|E)IVqNGNxNBCIW&?9c$ zwk0Vk^*2@sG~Np!{=vV087xI|RI6ZCR#swbZNj#-bJ0J(lSerzk|1lLTIBXCq3rvI zMEEa&<+_{se_#8=&;)KL0+_kjk^od32pIb$0xYNhie*~;hv7V}|Xf6m?4(!>c zfhDuxA?c+xx!GZ(vEv|KGqOP*IUy^pwOxsjT7@cHHo1 zvjD|DRx0uZXD%PmqdYx`!tiTkyBwfcK=RyW9Z&DA;^CcTJiWV`O1l-5*e@r~aVfbD zOURMOIdVS7W+OW5ja1y+pn)a)&<{i(or|B*MN)!1$cYce)6E`-I}YMTUU4$If`yhr z6zRma7Jmdwj({aQyOx6dC+Ot&gajpW<&r5ow(sY{g)7>wk+*N(#`?A;*YvMQ65lIv z0R0P>FubCV-tm*{+`3EaGf|aA0Ys@VHS$aKu}mEIjn>Da+=)7`ngBjF1ALs%qF|(L zj?}fgHZn+c-f!EqS?=XY4J^)%4s74Dk>yJkvT6NlY^-nM;p)U4D|1etJgmjOUHjRz zc8dm<6PK^z9T_LdAcy$4A^}S!DantCPk2H^#%n^P61qx)U8QHsc7e+QGhdc3ozJNa z(=l8z1(($miP}1jr2WH4zcQ8-d6ZWLr)} zXEU92>-k*WG?t~mjAi4pRh&C~oG|Y!#vi}W+Iv}Krichhs=zHXpWw1u!jsfon+gpq zDY>t;V@&!JZM0x={u>c0Z;8u&NvuS4?hE1z-;g4SBTlJON#>DqAJeK4s7P6q@|Ion zn7p#5q8P<>mp{?wC8)`6sRDvDsSYkF^4apZOsa%)Y&|}Sj|j_osjbeMvfTGh`~b{+P4>xK5oPZda`Ej49&6Z+q|A09YyW;?MvrQ-88q-rEPa@RG0!w zPl+DwThp<9b8S>uzb+ja*1JEw#i?}aHh|AW&;a-r*@sS=hWoM){PoyaB1;nLz;cwh}Hs>=6`NP^Us^orCoQr3>Z)U z?^iHkyFQDI{a9z0#19wUSZ37aq-?NiCa@1(#9Se`#A#KCkQR}L-0$vu)naVMp<9|R=NKaL2~;*FHW=l?#iRMe}< zcaNxl{1i902drJWm;>84QI;uSkstplK0K@E)^$VX%$>#A^OwlTE2E_9IW@JSxI81- zzkfZ4#k#5eoRwnd&C8GP{k4WLKU;QhTgizNCy0#9C%^PHx$<2KYkvJ7gXRB(iaLB*_**U_-Ejd`E(@ri9!-op(xU<;`iFt zzQrYSEs9=}F5f>oHkXLVbRwhDh>b}jDk71v&^Y}4!f|)?S!{ zxg;kPkdjzTMrt)l=?{sL1nrjgm}Qq7SZf)=>7YXPn_6Hj_d);cY0ht3i^=9C+}yJe z2fYdSTd_I48vC>BakzGf6Nh%OY_A@h zj+?Rj>}^c!;~03_orTT?q>BqlO)9}7C4(ScA+fPp+D2x9@!7;=m61|dN1{$tW@ZVI z8O6lPxwxDPfs4Q=U+pO`<*MY7gp@%wJX}OozBu+G-BSv6&&X4obE!RgL^R};zC>51 zhJd~yM}%fnAzX3E!7AYuMp2JB;F!TN_bl{$vk_fENXAR{-Am+p+#{TF-{6@2iaSXk zIB1(ec)@$JpTJd7$Gh&QaL6@@Gk)2e@hxZR6+dnTWZ@KB#^?(kT2t7PnL9MF^dH)X zenWcGyGtLI&R)Xi)k|1BYdWLH45wFbwZmd}ZB&?=$D%gJ`UIA7c5OA6GJ4b? zZPCg_zs%4aD_-Mzn5}2P{3kg?T?MzAJuuk^{VH`&im*B0)xv5ji@0oCY^}n zJZ)51Y+NA+gDdH=*^nhitr+>uA_ny6O{<1YG@$(LPoMLr->DUt|G*#qjK~(Wo1w~Q5n4aFxb`$4!R|I;A@gQ`t`pLEai1?$SlVoi~aYme6II%2`>nY0)$I<$Vym!AgTrMw9Eg$oS zq}+$ZW!C&tu>AM<-=XpmEVWt`iG0k&?aI=6o`p7g1>UGljN4Q)0J}yxX(T-J3^_<7~3;|Exuh(;SKU zAH#7m`BzsHvHvFxED5KUpucx7d$(_tV1>`4%@u_5{;-&!ZjZ-)|rN}(j2 zd^r}Eyr;D6oy1#-*HqWO zhmP^%)E~7@c@>}fR+Q~m>P*2yHG8RMFxB*>9)EmIPff|Gz7@5dYuApQ3N z$yr3kW@=!GkI5rVoI*@uHK7@gaZP>5N`w0>HS^)5zYarpZ#+VLu{Jm5=&FSro;eA< zCEsv%<#Uk=<2UIvT6e7*H2^boM9YW_Y>z% z9^%|>XRg=;aOsvecRaG_ebkBB_F2S5mXHve&x3?yd@^&0k?)t5UMwIf{Vhs}5}>HZ z3MdJ=Qg$R_bIQfN)RH0*FOW&dlX4~HKCSp6NxEuE1So2_yBeMNcd)3DITfl&;vG^1 zaS#Q5GpLGqsY-`kvIQ=W@DiY$_0J_R^%-7qbsTrg!e3m8+N>f$97^;v(D$#wJLNHn z@)?(+YcNTDj`u_G7l#upIp#`GEeA{%&x#H;>n@~;rbvRxd72#CI2G_VXGFoM$u zPhnwrnSEQ=YhY1BjX#bI>&V~!{1;j_YfjT9&9#0DwLg6GW-V#fP*i+_FW9ntA@^^a zp|^J{>lXYXp!ktyUw!#;cg9xjwORMQx`_Mf(M#Lzdbl{5ULD(N%em~_v4Nc%)(F_< zF>JtaI>_tPaN~iqmTO?Kz8j0NPd@u@1ZiOL2@{ncQ1W-Ms3FH{R9LLIUj>$Ko363& z@NI@om`}fMJ!sjWvF2FRI$^*2?05XtD*S{ zILh7pS%9MAj~ZD1gJ$Aznl)%n)$Mq5U+A>ko| z4cr-L62TN&yx7$2ZeJtX16jUD87vbY|57W#0@VIBB zv+ zxGq0lHM^X?h`xb2o<0%sIcm#ZQDa4FKlEB^AAcYrPLnSS@R*TfUYLX=qq>{%=#O2mY$n%+M zyIhIf8c7hfxa5Ce({&%#8@ON-TEewM0>Vw}Ik zNxim=WWxm{8_glz=qIv_1TOM8$9OK8rV?gzDY!P5*!|;)-93hsLz6Jvy@rD;f8qS@ z`B)k5;pVmT0=ODBM%MGg-6U;koc!XqqI%_qOCrft6FCb7(nZhZy1b-VZ6m7oQ4m#J zAjzvhl32c|>HLB^3JM-ltj4+LKcOJ^v9|M`$u(2v&YY(yG1ZQ&K%$^Be)I&*wS4SP z`Pjemu`|E-Z=mTRFzKrGv8Z9j9ox3k`dSX`-KUKTyJdcZn>Wl@yJ`hLO`oRCV{y7? zOF~?PK?o%XmE#W*9j!@2U%nFFW(&9uvkaI?Ru2PP2BOA!~MDV%63YtlfHu?YmBh zb2`q>?Z?=<;RxF{oM7F`qpVoGpP8%AGGO8wdVaf>VJl8D=CA|b>bWudge_~YdDG*l zBfr>Z5+9OFmPpCav^*lR3P}+aoRM5Xy6!RY=~YA}l@gm$PD*wi8FGEqdA0pPTHYgp zg<8qsIjK1U6gih$B4SF;sn;fzt4X@gNGpFujtGOIlGl_MzoxSI6;%>tHQ*Rt&Utqo z_e89&bIjz1C|YL$$2x}?5{sV@nO%i}XEGwzNvZolWbsqH<+W!#G6)vfC5THp?~{Uc zY7NORAYR0)0?QenbdKEcz&5;qZ;gW35?G~yrCa-Mbne+fn|dWBD}HSj}Nkv+r9rQ9Cm>VfxpjFuQPyQ@b}a`@3;W8$X&Z zZCh(A8~^!Ff1`biPIT+gi&pJA(xPn}ZMgB5fA|mDv}(kh**^%>_OWu_BKiQHKw-c2 z=r69OyMUz^L+7pLmcZZ2Hd>o`f5BOYO-Q!Zf8`tVgs_yigbC=??E6?X5jnO*n|a@J z-BlLuw_wP)IZ}puXw7(Pt*|ft@&$kV&p-YhENZ1=)hyQdt0o#;)W|S36#3IIWVM`& z0*mU4`H#;(kRd;VsB%Mi{pJfT-~s+xW&Z_mqp0m zBt0!lgNhoArNE*lNGh z1>^7Qi?^p2!GRH^XB0_dd`@MZnz8>xEPowY`5zZbEUS7dV0uPkLOMY~L8PT55)&0d zRAdlw@!^yUg{x|$Lh7E9u6B(R0Av^b_fcT~cd&c{%Kr^2D%29~$rAB8QG|I_8dPF) ziIXw3@ttyqHP#a$#i>?F%>4cX@ND6v_g zfhFn6V&e7ZkYF&Al&e3IesuLj6Mr`KpZ@2N#7=g(fCRhT|KJ~o4?VU^#0{oUW^ zuqc(LfTQ5@2{0d{r#v@M8x^MJGW74$mqYsxV0_h(2lt%>EZ4=c?9!UT=FR>YqpOz) z5Am0>;m5)KJNbJ2NM_Ccg^L$2a{A;2cJ4Zge{d2B8IlxYGKdpLprE26JT;H#{3`s5 z9&*+O}mb>W&2S!uHVNl zfy<7~$JxDAk2T8=vuxpBW-LF&w{s6NZOvJxAGpEfvmX3p5Xkb&u3F4?%wcPUxbdh$ zGUJN~PR%7WT}N_U0jcpNM2MXXlgH|)ZK*6SS{-9kD+G|0BxTh~*;AtvpJ+Q{D$ppf zrUK;z|3)taRj9Gy=5K*=J z{Bw{hK)Q$ti%=aQ@;cQYlT`CwTkP~kOf@+V-y(d%Ff0$_hywhid<2$0!=?BGyKFV~wDrRJ_ZYyIRhv1scRRZ`tzpjGnG7C0fG%A+YNNv1 zw-NUuZdEy!4jnpa&0%fZwAY3kw`6f(p>+fj&#UB{ZtrIO9HPjqSv!<||#jO@eEzZJzz#|)f96Y-QX6djdEOms0v0xIaSR-gHMZ!mbwEDbCQeyT}J z!9zJ0*nN@p5lM-r^ufm!x8C1Hgd754dGK$36KGez7%D zhpWj<&ZMR=7hQ53(V_lQcLKBtj{bhZg!@Ml8yZhRPNC$+D$=q`(Fs&kA6<&%F*S-S zUspn6Y#gbHNyJ7*5gHgoXlOXeNof=nmh$Aub1Fofs_7eQg5<|e`;SKjmeTrvqhl$l zeZ~uUpISV!NGgVU%_C7$6}6A4dn&5y;WK%x_FVau^6Fp7FL_0-8d6yyWUYBb(L=d_ zrG=WpE0+JGQhsQO9E;_L=!&bUu2;irpNf)uM^=tNMRit7lFTcX^0WcDM;*Qb$fHi^9J-;sagM+z-wh_m^T z+&j}rv{-`A*{S&N8%yZXZ@7MHKl%r^a`W^yJT1<0OW%Nmw5KeJ`IQM$Fn#5FTyf9l zm|r$d;$DhtR6%&9Ev-{rqn2fOCW%X2O4&ngM>(B5)`^nI6MK^*zduDF6&+JZaB#L1 z&~(kQ%>G#|aq(a4BPqwC=BlW3>ZtzyU%~P*KDw4p+RSS;mt|1D0pdb-2vE#PPKYPa z&xecW&ai&XN`CrrDtmTr5eI98y`3co_U+*38B^JKU>g_AjJTq2Dh}6#u%K+I2$e*} z780LQs_i3_oRUpqOfs2r%*rSe7gLH`Vwtvlj!#kz_JMia3Cic>%>ZU@xy(09j_}Qb z-ArD%jdlCaFl*HoCeK~Mik$~owd)v5HXr4Oc{`Y~a5p1nE@Ofus@2CYaQ^NCjJ@Ky z8I(bYcMKt3(cFu!=0W0PY6DU!m*;$o_!iTDa}%asCosk}Lo6pBmK!lzO<%EWP& zKO(N`nby2@L-z)Ye0cB>BBWl%NIjANo_MK)=}&$oxZnesQt#CE)_GMQ2z(5F@|sj} zE4A`^wcmbd?ypid)VA0kH0R=x_nx5qS9oPS)RuJF6i~^MSv%;{wU6dj+I4Ns*kR+C zHEkx7Mh|7o;JyqR+@DshTF|6vBW+Zeax0xXbkzD-+O}=4jS5qvt(rG#LW{4yU~u;i z+9H%aS~g@v&yI{6(w`QM8faVoHfz?3HUbvaf#0NMYrbsUh}Hs^PA!^>^J&MB!M)}G z9j*;GZu~`K8p>-wQ~e!s&&;iSv2{pbrC}($Y|^+aj!e%fk{!l=;sVs(NAb9ekPQ^D zgh+Yc7f?>;b^81w;-mNYnY8QMgJvzoSqa?K=q@#cSS>#JX_aGjUI9WicPW@Caitu+ zdi-gKvU2jhy0?+C-;%bio6<%;uS@%mbZql+fzD0>!FIzZGI;S0e!6m>AB_E(X`P@A zH{ak{z_{Z!c!cE;D$e&o>T_&TUb53Bo?{QPd64@Gr?^sa$K@odR+EfMvJ0LNmr^Np zqMj_tNj0@dE`1_mMeVv;D{e)cO4%C{a~^AZI%O8Uk{s|WmDO*w-5|BiyQ*GOC*?+M zw~?-UCOP-5h#b{PFZo>_E7zj>SyWS4ajgiQe-~JCMN(P zOzTW4EUytrsP$~*2NXUhGw(4)74PJSy&|i)f`YnADxb?a`Fzz>pgyNmDu%A4MlOmZ z$%0z4#6^^r3zP~))rmw?BciejO0}iN|0iHkqrd(?!6K0$@!!FsprRsKZe(P7Ew)k^ zR!E^;c*%vUVWk{Csn44UkUzkm#-H)W+okreWfy$k4Ni_XQpz<^E#?weNnM|hf zL~=|8E@t0TaAP`ox4tLG>IdSkFZ?@L0uPSo(!R|cSUn%TE%Uf@VGlOOCM0LP(7-b8 zUJ>_GMX8zxv)(2YtAe-a%EiTLt1&+o2lzxFBZZ{;xu}rG+K!Tyb!wGpwaBM97F7t- zs|XIs!owpG5BCI4A3v=v>7sz5W*vW=$MSJ>m>T`^2_P!|`%q)0*3|QA#(nqBUFG$? zXx*YELk14w=jk)JaQ2M2mwhZ2xANVj35*yvkQqNt(O@!v&QGjey_9ojj&se*6jNJE zEUoOhW9dqaDCi_{WN~V}u*4!#egjKNd>R?aSpqB_F=^#^rB&meRK@-90_;S&-w7&U zkHG_e+HjtgM{cs}pfOXWLT^5Dk*V`nGJNuMRti|w?m5Z)bqAO@V?8q#?P2+$b4*{q zhZRT8a>dCL6Ym7{A4K8p989Et0(T=Safqp<#63offVgx5Q%eX;dyHRlJ@N85GG0fN zM54Ic6oE)$h9m=lOKP3~Lnp8)sFzAE;BvM(W^&B41na2hTy@SMQN)CQP6dXp$ymxYP%AwI#1(SV zBU_SGG`hOiq?L*=3acO><28~WG_W{lyyU!#Kr-tI_v6YLd&!F(p>>*LQGG0*z@mm5 zj~hCcUL9N0yK@_Q_vucf#tIByXq$DZnfGm5sm}No+Qi6C9lLy7-bLI%r&i6GJZdoW zzn{diU#2mrv%Kzaf1=5kpKESMEkfC`byqsI>8354|AjaiwQRoXyzkRXt&}YPpSYJU zYH`a3&3|hO>q+k!i@1K<8~gjoe7na+1B+d14L0%RoVHKo7M5l7*FuXs=0^WR_X}ib6FMQYfe^lrK~I zn(C@YlnZofs-=Zk}QvP@}2$}SU$xk*YXJ}YI|2T>ohe>KqDYY%arpH z$r<%pWJ>bNNG&5hvyxa*o$k4B*kItoX5$Ckh{)mSrL!E_zmm=KCu4nVF%j15iN7Dp7ki zsJ-OVQZvZT&fwvr3No|fh)oC-`|D0zYyh#*fnuk9i3|^!4!3(X)|EP6tCIHB>CxCdqv z8&j^0{EN=YCnzz4=(IXwQy-I_D9T-%v0O$-iU23Jh_r+fGSUi(iAp0pvYKlG+xbRT zoQ;qq>l}^2Eg#O92C~o4i$3B~*4TP+(C7ijZ+OyvqdsHL-Dl0+6viB}WBD0-ZaBws z$2FAut^ouDMdITfOl)WxVZO~aduF6l22&SyUmn4gt%qe**3E-8$MG}Q1f=tycRw{|1?5((#SLn2f zY0spNiLjCi?~+`{N!J`Aq;_s~F6LtVuXw+d$9Gc+%B{yWv6xNQJ-O&tfNAtYjz7ra zsz(O5!wZQNb($b`e4TwDE3E^$EzyJQC8z%!wn7rl~EjkaO zSL+UR6ZNjv)KX1dZ92B0t$?9z`)0Hd_tC6rOPV$Az~36Rr$LLZlJtAft!qDe_Zpz7 z_O?x1(6L2p#tj?EjLFlOG39%P^dC%1N!E?ko+nLOYcZfhFZ#CaMC&jAMyszrr(v^( zG;Yy^9^!6#cWc8yN!&e~{goDtThpS$U_NUzmJzddW8oU5#i#=gd~?E`d6xpXDb~(7 z=U3)j_r};YjRz4$ct#cA5uszxgGBmoIK%gQjOa0T5rg{lWW=EU+6cBGgNHL@h=d#m z4I27!Z~Hz2C@!j?F#9QaX%8iTiAd22V2Z26t<*?4 zl3XSNCQEHiQZ9K_jwPi6ks_5(Yqh=Xb&?~~#J#G~rKM_8q&OB`nQDFdpg~0q9#KtU zYJz0GI2~Q-L#=7e;+75ZafyNm0mZwwALAeV`1sM(up$47BBrDEHKhzOB1(~Bh<}S$v-Jy)M*~s z8C4VsSV{#t#ZvjyM*o=tkd*uNqTv>WWHdl zi3fXc`(d3}!byWm96hj#?Tf$1>Zris)@ov{W|4gBJMt{Q7iS`l<-!z+86;kuLEM#Z zi8c6+7{kfLn~ID14J=tE^YA}77M}y7i8}W^ca9$B!p_ayxpI`)AO`~6Jmvd5VPnWM zezeXcwc-N_qG)3ZtH^!y8lCPDl>(P?waHIHCim=}u(rNUScJcTI0;t|TfDsNv9&Sd zs(~KYP4w~i7SKdS;Q7E!+y8#*)T#99)r;=kyKCzkjUGK(gNvHMKVrlP4K|;iS4RaP z1tJBR4(+>%O6^7acHQaTZGa?~0pd`8X6fRM?AUe;JpsyXOE=uT%s1vM+p~)5|LI+R78pfwB)1; zl9R>Rrj?MKStQ`liNY)(IbWPseh~>dC8Xwy>y~nzm{~6l=9xJ4*W!$&T$a50r(n?u z7(6qda>^|i7ZGlU10G>03DoO_fWfbvxXQQ0mcQn{?lpn(+JJh9kmr&`ti{UTQQ}b4 zxjkO-9PrKHTzEOg@`PM&+!9~0)-fH^eE9jA56AtA_ZYd1hbdDeQnb33m5(f9}&G3Q!rHqeZ)X1@n8YLk|H3w(d(2*Y@GjOOj-=$A) z2{|gD3>+{-J3nyX5Dh@%Mtm)2;!t>{{|8M$HP9gl~=VVO-Xqb~+B!8DR-mWf=65*H(mJTj{4?_kLjL7ASG zLuN)E36VwQq}GvLAb=?q;awqRO9XtP&_p${rWdL$7*x)Ntn4S`<&8?a+K)w7p}H&tFyeSiD<5-Hfh9iaBPWzw`G4V9J}v1| zqBe_>WM3*|QyUN!7v&KaM`R9{3&s@$aPS|S84Zn^K-V(P>8n|@fy4L@_;oRg>buzmR? z%#Z$z&y9IR-2R><>u)Hq`<^1JpU5y0=VCD%okXrYmt!SiEzq(35uNQk3T&5BZZMy? zJ>L*}NT73mCT2T#b8zcAObt)t8SKbC0ZVx93pRy6=X>jPZTM+P#XCym_g0I|Ef#xR zA<3n(N|b0|6vt1UVd>JPtXscA3WAaRjwq^X3UK#y;NXEB?Ax=QTjtmC_wnV{4Rfqb zZZUV-FAVK5fB~Jwv2^Ln7`22)?;#BCCKa#G$7A1);%M6Upns>{@|r%{u}_B{qTu?| zy=xyjcj`(1zQY(f{A+gaJj(5xj@)&m2D0|*oguQ&v}VwTos|&l9c>#!!IreUvVR@K?wv#<%?6v$1SV~XK?^7QH8k27ZMR$Kx}du;Ze0jM%NQ1 zPAgX2OHy(XscHG7rRS0%-#_?6;_D*tgJ;R&nJlUcb7zQ$R~+?^8YV%PGFHsB0HmsS>Ya|jRq>M5>ZkAfpi6w zr;OB7Ijq1)hLIf7MWDeMge9}KeZU8Jl|&ogNJ@CF@d4OzGn28 z?-)C7GF|#lVA6t}oOep*lBbUKMgg3-pM^vEYqlG>aLXx@;Dibc{3|)`u4AKB6pM|# zunbBeJSB^ih)D7hLkRb_#{Ypao-PJB-#d?k5Tyu2S+`rMQoW zWas6QoDxS^-~;a7F~-tdAA1p(_w3E_@o|uR7fMlSvet25RQW~&%coIcYPhkQ$D;Oh zQ3j%*ObxDjqBVsjB&g+K6ea{5D*nO0e;F)!Y8H6eE9xJM*D;s>Cp70d+hgAF!<}@}%YLO;taGva&a&cX;tthFqLxrW|bYvHI@7*LbJ02T5b9Qduz^)yeF*Uj-uEj_0&2?O?9a;LzLPqwLiq@^42904o z2hvYmNY6H18PfeDaQX^FK7ys!-@(#PVAH)@A8{$FiC_Rj2ajR=*vXtZt&g{7I03$~ zgoR}g5}rvwSeDk28ks8BGCH52eElB)3&(D}w@6P%JyKwLKN0ciw8 z6iJdQ!7E_FTPK}JpEU$#y;1;;$HNDyXlXa zecl>Nxt^CF1TbmNBD%M4N2eAo=-IB5)_LBweJeV(Z9<>!ZRp&t5pCKwXYlYb9JyeD zty?(y*Y7cX_DY6~`i>E!zh%s*Z}@t`6jA?U1S;P!cFZIO4;f3}0i)K#-4MX+YOzjRh*r8Q7tvKuF5ux3g(Cc_rU&y?{kf8rBgx zY<0*&FQguOZ6)YpmRp9g^i}{aF;#fSR^l06gty$g{URdzue-$eyUpn}b{+k?57b7# zDd+LOgo2B}Mgc~xd8QVsR9gY4WB2Y-_T{<3gNA9Z9XeD1BVg&{+MH0lZ;+p6e24uX;YDymQsJfPzV1EowA7I%plel(b2RTvR z@V17RMJ?A}LtJXL9OZFJ1>vHu zLnMiK$c$YxY(~>EeAD>I`osA?qtRTte7cwn>L3evDx|{RK zvsfUpkX$*JXZ!$?@X;UeI6R#j+xKE|Mh|Oa1J0d2g25#d zBIBw#7V(4yx8vk@J*Tj^o`U>x%1Ud*)(Tv84@FVDBrr4%eM2)AE?vUtabr1p;;H-ocxqcHXq_$8_NOHc6?H{y{{fQKY%TX9zo3Dr2K zz2tg$71yI`xS3doRa!kEYBW`9J;q7Tu*i6er6ha@0aKXnseCVS8sdD^1lugt{+(Y> zR_Sx{RFknzvsNT7)Nm_#`!NLc?rXIKCT3|jmBFgyLz?+?}x#G5}SZd_MPvTZ4pSMBZDF!>gOdbU1 z;T~4NZs#<5tvbu(?WS}awT7OZ`iKkbM33&h|JV4fFGaybt$^IFZAa~I?Yx{*;86}n zo3kUJ`S`v*bm`HbZUVn9Ufmq zU_vooQZd&Vda~BUn>%SQ*m3CwV<$}%h>qdPu4%ZNE+y*D0%C9fNV544WZjraj`>`2 z1uQyoGde4AFv`W)&ZN+87DcuTD893t^4n`kxv)Uo%Fl$HU4Z{JQ$if>;dsl8eS5cX z>FhN^qyilhRW|=-to)W|n(b8sBGdp01(qTy6l$etPv0<3p1H_^C5!oK)-PNam_$W~ z5*Xyex$~#lw|_U6E?v@AFi40`COkZftEOgrGj-Z;(C912z54&SuL*d!an?mg+MEQ%tn6wv%L zuoRR&BO&_<77tPh%Y~e$ko!!2i~L?wyF{%6HX;2PS3J`27l2$8x4l0&TN{#m(IW-B zKygiSJ#2!@IeasMlP({ZgE{Jz%|`1mEMw|$6!kpY(4CF z4E%mALw{V$knh(paOz4ehW)gOuNUp-hqY(;Y3n7X9MWgf{&V!6v5fBHXENy91q>WJ zixFSXWb~w&jQDm2{U=VP^W=Gq-ExZ2JFYS9gcX;(voH)QVEhqVuBN`>gm)p64~s$< zr#8#Pl>;VjxJ8wSxX8jysH&W4kL9Pu?HJQ_#V#lhJMSbyMa0BJWso2a*;l~gmr}}uXmMCcB672<@bd8F z*0tkYIJTC!P#ek3r4sd8ynJ4S<<0Y4IIs>Ay`2R5N0FT^Zdt<1Cz7*Aw{dvOT%661 z!=rS`!BRLri1mH{7Jm;{4sV?$B7Om0fyr7vSDp8286j<`vFdLT*r?9?e^XP~D=MVm zSE`|Gg~ePwcZ}t;rm%PIBFd8DKd$%nQfh&=?$;9@+%aXvyr0;yVKceur97#9OL=Am zZleAzO}1fnX|1>wQ-P7xo)_{})bciOUyv0Y%*lP5*}HueK5k(Y3N&)0(q{kv!LcO% zHl#Quxs+tpnJiF=)}oR~iRkod`~@z)x?kC97Qk8~Uv4Kp=a8urvsZ6p!}g|w6zZO8cJDsG=z$Gx*#aXP<)d#AVJcxF5IFK*<)l})%AY{J7}GhSDA;(28^cQ0(l z_~;6*>|KoEi7nhVxQnfoCk7Ud?9(&C*eZbV#Mc}MtYN-IjJ9WaPUUkl%WEmBd#-Kq zTrP#6>ft-06LWBK_rt>aF1Ky(ih|F=KO_h@FHant?{nY975lqRm>64d^7whyuiM7C zlNb1A+;Gn6sI$1`f^ScVT8#lYT!8PabU1LUY4tK$H%{QY|kqMvFi>oI`75CoD;lV!#WQ-pgU&1y`2)=i`(0TJGUXGShw=RG||$E2=K7 zSSpib*Su6o+F6f@Qp@m2c}&YJ7H3kWxx1{Ka+2hpCy3K2Nvoqw4bYJ1!cufZi-Sr^ zuO~NK9FZKOGHdbAszu*7nR(~$U>H%!LDwwi8T)ZOw1Ts-wJfm=WRFcKJFSA)>r#kb z@Ix*KR$vuTLsb5+r0U)im-LX-%oil&y}>!Y8k2}3tg>EkBmD^{{BqFq&E<-3zBrF} zq)3HM6_uDF6*;T&8QE3O$*NZS;lCkGs)BFPOU}4UB9c1cSOWfXF7P=Va!DXG{a1oh zK5)TLgq=8+o#FXx3(3Xx4IJ@K$2sd23G#X~aTPW(wZzJ2M96zXy@V& zCkcDvnhSil=_=o>zrw_Imzlir3g2(K%*^cu%-(*5ITEwCUFMgqm-%tiC4P{YvdMs9 zYc4Tn(=~=KJH^Dc=lEWppSJOg{C{Vdy5R^j_XvP?pXQrQ$Cz`(n0ZHUvi^!QxBLq+ z5kO8nV#!hY?c1!vS#E+X1v`)|j>p|4Pp`O&QUzHz$vrATTT$FaKCVBGU;7P9nr7h=hnZ zBGrW8xEvBwvZc)C6A_tDc!Z9WxMIAW0x{D+!i}rPs4kI&&Ldtwf61#?uT-Lz*9CIr zz#7hpbGh&6K}L3o?{`PVOa^;ndaxQw#G0xU1><@n~g z*xe7-`dJE8zl!Em-ixb#rh(cIjEIRIby9Sp4(1TsXLm_f;aL z)OueEDi1{}3Rt`yZ?kH_FKk}DjtuefC3!VGFMo-bjT=@b+l9`XiTA%PFnaiLy)?NF z3M{4Raa=sUhh1A&;O`kpl_)ez#}PHjqDMyB$W^=DmhvrN0vuKtk=Yk$IG z-wJLWT!q!KrP!QW#$CPT+&i-Z$J6U@Jhg!vN0xEz&{B+#titm00UU3-FMpR){it44 zd>PrgJSuCdsjjUjB_$I--w+(`xngZ~4-3=V%>8*jlg3ZxhwrBI-Pcq3X6(027&Vc} zUr*B>PZIE`PyqUR%p~o(@gu+1qSwGtbnZ2jrfs@2aKyK)+^`?(d;YllC*vBBhG&?L z2jWZ~M3&$hTZv124g1Z!unH~4DfOuamW!#cag-u*-nWF)SEG3l@RE(@=?p&X$T-s= zR*LF&Nqi*Ayq+9!07W7wGSn!z-@uYzQAe?;`m(&|;!qySHF`;2fm|PfM_zul);y3c zWjIyJz@x&~6pJg3%N2)OSfe@Axa4YaaH@Gh02Y;xS84^fV~aTA9D{Av8;*JDSYi>% zEpa!tlDwDS31RC^KepcvVC)_ne!1w&%4>d{w2Q|x{vmN0FNjU7Co}gA=>md__K{o( z$i}@I&W03n*dv`=Y0uDeN&BZ@iK%*vr#Q3It_cK6o!Ds~&4rL6Jmh+v@Ju5n52Pq# z5>><1%xCNo#ku>|m@@)l6{oF2I3-R=&o-K~j>#N$O4nlV?Qo7* zOIQYT$ifFbyFiZKc4xQgU5?v&a=_XPz57v|c8tToI~%v8r(BcIpKs*Nq+{01K4Z@z z5i4h-OBjF57&G@+9KI6myYdeB4GK$AO6fAe*b5F z|NB2_$3On@FZ|^%pYyp|?f8p^zk#K{*6*U4#*}+ePDVjUHFaB}x=M&zj{f-1&))-cy&araU~%#wzeufO@{s#( z0i4>s7Ng@EDfhS71?nD{AI_rsPr$ELCbD z)c;4rjsNik$!GE$B$g2n zn=c8z3V*4zJB@uL+p z33j3;%@ba;$SIR0&e;U(K2Rj(E35F8Hlaz~{9J)bW|3Ma=#ku)$CQebDU--5D3d}_ zP2JNslvF;V{>dA;e)&=WYXzt}(lbl(5I~+6g*R*2Zr1KN!`1^=n7d*x%QhWn$@(KK zSaXp1tM)T@P;S99#rEu4H4aTch! zhUDNS72Q>!ViS;qn>ZHtv?pveaN%}X3AW-`<{P=Q*vy;NqA)k>J7QrKhlfuM7u?I( z?^D9h=KjpG^ujx-nsnVG($Y#ul~BJoIk!^ORh1Scxl;IZ#lgz`SE1(ge2fZ;i{zeX z)sUQ1PpMACQ2uNA?fLRKd8A0@kBZGACNhioXdMBGg*-?sMqeD)77I@tbKi0JehRZL z+~<%e#o757vOJTutsl#M~mb8aL&W`~g{uF>L-vc+X*JQD}>lr(WKdXh}7 zdIfU}qQnN}e{bp#-xB zNnH2KkvJ)88Zwh^SOr-C?3G^TN9b=}{THn`BaZ&Exidz$oG`Vp z$I8YT(;GGz7+YdsYRlPcQvPqcaM8eltHv&zy?U36*Bv=$W{Z)HoHw^cPwI-Ep(Xm} zj$AUf)8;@~Is|doBLTyEk=RL@vJ_Wl;hv1OI68aZbj(B2G4W5}{)155y&~}qOu*YO zmOV}p^jm$H$vZF8_uJL<>(@tH@2p{iCYt;B-GBa(&p!K|7Jm@PeDOsCZ8d=g4H|2X zMRn$@z7{paxKqcjG*C;vG-)AV`cHY!XMFZMIsV6I{O)(Zqj7^TY4+9M=-8^6Hs9-* zp1xfFEL_FGI|d09BMS+P6rmyC^IlK|L1`i$qKgTZGVU8$OF(3uh}$Rf-LtrK^*pAg zdc=e}N`4jv@m|!$lPX@;=Md;&iP7ofSR0rS5RpW7S)GW^$Al!MasApQ^!Be8p>8cH zU6LhLy!o|6vU?>N`GFW-ScCqVm1Ihu%$EF_Tk=9%gi@_+{AqP#ZMd=46!x2AQB7g- zzcqy^xALzvh5a+Ilq0W|2kMC;rs>`wM2W2KqXwD5-Ly$NhlM?Qc9=*$0e?ktyevmvDbpd zr|z+6`&s61IW4NqnqPL_=BM@N`F`xkc zod%YC)nO}O$^UI>>*5-*vXWG4#UMtfB@SMGNms3~naQvbrhtFDY zQ11r&Pnogf*d^w#-NpPhyIHqKkMkz>*t$hw=^Viww>Yfa5^$0v<`hwab)b$LzS(TN zJW=TlnztBEIjCm9-4p?;IJGUlxg1cV$TA;mi#+D#)ru&o z)D{oT6E&43Dno&#RKQZIw)K@VphB(YtU{MtrolzE8>>l*Iw`Ap=~6DT3dznbCONH$ z)C_T}2?YfCCE*m9gsa?dGf}yl1uQNFNJ39!+VMM*oRYN_l@GWk;gI|gtEh6WL_fnu zb&O}d6?N@{tt7j!xGJ(UpHouwagy4d;6e^M#1k3P6Z5I6exa4|yvnEK2_(|QaU_bq@~eD{vy}4y`8z;zi;K82KRJHfKH@#8HBu+a zpORGZoXq+Ul4RZypZ=J%oHx|UdlCvh;2KxWeGx29^84>g-LX!nA~dc*8?x;jQ;LHK zJQMq1j-0pT=*b%_U3rk+qvzAA-}kiW_Z_VUenZPn18CW@7ppxIdH_3 zL&vVOb-z9v_g!G=)R(ZFTNGT>#7Na~ub%(>^RM{RpMS3bMJ+(7;PS^m z{*h))8qua{Lwa^WBy9Tv` zq;f85KNgi+{%v5%lmwTO`;e3R)}SL zOR~T$CR-{|!Rvn+ED5RgB&2-YYa=k&dFu~|fxvPM+6imj#|Y&3kpo?HIfag&iN8?L#q&fq>PFWR&8tPKlK zSu*eVP39i6V8Qxbd_8>uW2enw?9@3-n!cE+vsN)q6zuq^i@ zmK$dTU|vaO1m!(K|3Ns8a@}1Mk~nW@&d!y)ST}zIKZ+BYwqP|AX3b{m;>9dlu#z3y z4vM45CtI9aLZ(_D=^^PQ&$P%bd`Yg9hxDTNTBy~8bBdk{bX9q&AzYksXbFUgdQXyT zm{a^zDt5ly*K|CiqVWlh#??2RE7p$e7e~2ARP_PXR}^1?u~Rh1Ox;D%7vYmuk7Hy3 z;qjF?iBeu|=FTcpH&z+hu~_damcDBF_IRTGV~LmR9U;yqF}Vu+P*K;Cylo`ehY1jz zGT##*&Lys>hO+ucyn6qZm(Rtylot~j>`zKUBClS2ATOs}z*sHLU);U8w2I6U9*Z5R z$|&PQ%^NAZ*%X%6kdT~2Vp1IL?k)mIZvwo1iHk_U!#z;ISs=eJ0vBIDNm>~sXJru@ z7Q+KcNKUqnxI4Mw6BLhkU_6HU=A4m4cu``>^m)vjy^2ZS&u8r9pBOq}68(Gip-=0M z^l#FQJ`Fq5sYN?lG;c+R&V3p8-7J=DI>OFl*VupBn1iPbIVhhqdzO@ik)s*ZyDwu$ zjA6#~S$y-|PmG-~jfulY^W)dw^4+&n88c=A-8ywf?L<0mp%bV4}S;C?|=6v{_^L)eT0iR8Z`>+Qy+^us_g;P zb823wNEl?O=zqgFQhWZbSumbN`+- zcPz~a@{S-UwFF(Y<6g<m4V(g;ebz%{yzdy!Q*L{($!k;q-IWUK-Tu<*{o%rTlPH@!G(a93br!O`O;QmG6$ zappQF&YE%Jya}f+nsM&3IhPGArJ~qkYGlv#JMLKA_s7aNT9j8h9%1G9#nj@Q^BDJn z7liBH5derlcfVZ-J^}!>sGyp)ty5cumOs%}iY|Hdp1i6TWE4N7=A}56^dg+R!pRoZ ztJV#xktAkecr33;Oe?|G!51%4bHU;qZIkNQal@NMr>*$qpea+fU*?D1 zR~f(VG!xeAF>dWC#;iWU$Q4H!y5t~(7Ve|}yxsJhyNhu@&Zk4ak+khKj5a-n(zeGi zI`ke*%P#V``zRW;?#J*+^H{y>9Lsl}WvjTH-IpvSQ9H5giZ!eB%vdegXx`4<44*iS zzU}(cyG>u(bQ?^oUPEc#yEjdH_M}C#_KX_w4Ypp96g*VxUA-Zr;3*kWHdW+_NXaXF zOGe2DE!48~N{OlUj?xPSK+4TkN+OrCDh8Dh5e#~lZ?SOWCcc|9m!IY>Ve#s%Oq{)x z9^XvY_Wby9>v0^z3$O{umiv>5Z|XxllB%%_$q}(pEFj8Yt92j~_ZZOO=M^-c@B@<; zujShr^O!#ICuUBb&E)YjS+njK=d68skn@adqOL8Io?w^s0{>h{kqVnrS|;DWkjU^5 zZWv$X=>FZ@wzx?~x|-)wtHGr-w~{C+Bd(TC_}=xv-`-o4Y9KxV;iP95;ujQ1SXeOU zFP!1X!F?P%a0oX?4{WTRNJ`DaD>zI8OJ-rAxR_j=oZZpCVuaykLtGsm5Ehe#os%Cs zw;p8Yx}6-{xQCy<{+_AR7BE46$B2pF(^sI-t4lX}G;2fe2A#AR+Iyh3@ML?nVb{R% zjGD558H=~FV#`ssA2`QGaVb+K|G=>R1L@dGE%exiZe4rRwnHykw&_OCwjJrL7JZcS z?bTlKow_h#%vdIjp1_ZjXR&J80ru>;i2emzZeI70?-Wp3#H|T>cK0Wykq;lRjO?uAy7E0Ronf8` zT&3Ve4(#_T z5%-?MGSevL83b_Jub86_ftU&b5 z2#msNQc9)n7uQo&T1Q1eDcLE>B&NoYoSjHgPNE3hstNn$N35QyXn$O_f&k?-XF;*^S{QvQoz ziAjDaQLnj`#5k$kYTk+(Vl0pel)pnGQwfPkCR`GcS7;WlB6)pcDn;Gp;^Ci)qkAa! zt^wS0^u^vz3jXc;SYEdkrC`Yo!4Q=KGL1sJvcXogO8?!Tv89;=n4W3yippZl7CxN6)( z1xmg-*m2TXdj4hXcg^RpXE8_4-)7>B)pQ>=ln(v-(M>J7 zsg`E%+>=gyhtO@%C|XPM`Fi|xzWwGGex9*}RjYQeboF*-ij!I}Yb7(L&FAZJGZ{8$ z3f=n-qqC^_p~D7=GVjT_9=#dcy*Goq44`%U{wzLxg&V1rOu2fOP44MjN`K8fix3j3 zL`3*|aNWuTYa26eTNz3PzKWrRF_*3zkzXsqN5s_~QL9Eq2ACRO!NS}Kv+IW1@NpNn z5OVTs@C^zeC?bHX*DrDW{1LVv+J%9+sr*ho;EwDGg#I=LlIkjme zrw^UP%_9V_sC3rsIZ1oDe_ea^V{pF#+S2#UT6d*I`<^s!*Nuj)+G_iav=lYora^l; zH114`MlA&jZE4cF2Vb`C%a@%;YyB}ZRvuv6abwnPKgzTp#m$cSS^(6OW=&etu0u~+ zcarNO(XnG^0ZK8U}Mq1k=Iz*NnX2&18!hE{emxk_P+kB;y@dPqt3nd1{g5!a9<&>cn-w6lYRS zdS;n6FeOiNbhcXZDfcPqIyG_qJ%xEssSpvbqNv~{1(Kr+i$r+ky(cqEM5;KI{BpH~ zkeU=J&uRU(lHV&;XTF^OcY#G$D^{vbb@sfYRDe)W(sNDBmt>Yd*1(co{zwB$Zc!cCxsNE!eM3o}Kq&oJ3V(x(0+X&ll10&5 za?0M4E*B(0Cl~i$1WR;My@cE-0ZBq^0TFRU1Pf3C;tB|mzr&-`wA~CN;_~ne$>c$( zsKfYbLL#LwhvncCl7vS<4BkFb_<2X-=N^K)qYn@4J#f9}fs2zn_a&U}tMK4~K*Zh6 zA3wKX0zATS^9vI-8BIV`3Ssfty;>q>WU}uNpPuuYdW9 zuNwY^K0P~WP#N603;lX_rF*Bg^lI6dK^|d8WaDvq4*Q-?1N%!1V1U|w zx&JUa^%_9;fg|ZXd;%T&4yQ@Oj(qibYudEx$&euv8UNkSj2JhSZXNs6@bgx*Z#|HH zy(Z9a$XNOfQ;Qi6VASA&Op@!-PZHCZexqpKx)1BlUdLTr=VIFcObUJ_P-@ydi%{Y! zs&NhS#`xw{?z`L}G~7$VlUsK!xq9n{+|wetHx<}8-owJe3{Q{y1O|BGAK-<>%^Tcz z4W>+PzNf!0cK2<#?|F~#gb-Z(+_-tqmi?!XOPR*q1lKf?7(N4RlvKgNf5 zv19!itD@M7R^n!NH)v0 zyAoW^4ZA3A+Js~8BmfD_$0M;EXR-JJp7D4;h{oS1QHui(ar9eyjENgA3HVmiukT<1 zT4!wnwC}7r6*U1;jR;fCVEsiv{e9;BfFat_FMYanqGzY}^y{a} zd@pfsU8Q`BK8UnR3FBsWuVJeUQQE z^PcF7fZiAVoC(*0m@Y86AUV@WTFueYqIm6k(>39>hkvjmbYZfRK$_olCMQV92 z4JvBCd$nr%vwt60N}v2Hs_J92mfAA6sz$!BxQ?R2a;mFDS(jE*CDOQ3z*AWKhAg#W zXQ8OfiWlevDmm59$gX~hh;FK%2zVqB7K#%o7X@BaP$P-7p3pH6cH3#LTFq$ z;c->ONYYM|$EgzWN%Fl?Ybi;rrA!=Df||jd_k{eMmlW&Xh`oJ9adQujF1nlY973o~xDD)`=|^ha|Ai6qse?S8APuskvn&=aiC|RZK!=5%C#?+76H- zhYjZ2ugCGjcas<;iF#1?F7)r%PSkowhIDDqux=gYaXTgr?Z=FXBbha291DN?js-I& zF-2U-_+DKZ+N&dDNAzV-{{bH>^U&e+mP$OVV-LoOiXJm=K0Uu%M~AhSSbRrpy|@xp zIVy@okx3MmJ=KOrs&c56MNxAlQfUfG<+=JdxCm@kT19d(S-Rar8E#n9DW=x;{^y<)`4xPs^|9~lXL?CVOEaYSoT$AsFmLT;MbN-|Dn?za7W*`qtn`*){PkB$QW_Oz7*sS>_Y=D;YCl4C99lV`%T*^b#>K zN&q}=!W71g{f?Qx%wd8!l)-~WO5z^M;-7vJ@LgiZrY%gK{uAG=*u;_RHW=94#oEaU zcb5nFdU}aS3&uGhpOrVFn03*c#TPx~Q@53lHa+(OcD4NhaXb2L3y z9%RBsJ$g-8$nZhE>C?Rf!-pxbjTCn+a2qm0>!erbMvNHEC~?$k-ikV}7Nt~+P^$Q} zUYKeY8$Eb1BL)m${Fw0{7qApas>NFsXa)@$MCbnUTW7E4xNQ(;-BVa?7TMMouQ5g(UA zYD&3~^(neyp=HId6i5QhuNSIHLQ5+Xw^AYMQW9ZQd;yVBStKRoYOB_&ea6$0%E--B z+v}?LtD$jEG_YhA{p+K`A`>4Hp}?X>$NUDCpx>b4FA)*0enT>`ahb#=6o{*+ASk-{ zj~-EPsos{N`FF4)^k#e1tf){%2Va07QQE|`U4r2;tExhqE3>kM3sO% zw^rW&=q*{5PbrZ5kXj_4FHTPNw+L?pzM@*xHpW#SLm7WSc#pf0WQ|pvAbb_!)+t1OfF$^;xK1+ zY-ZK`pP2UDXl;KN)z;mpc`JVZm(Q6bF5>4g-!Ns`Dgn!SS}Z-yFJ?iAsnnWQD~bgy z5}&}L6R4;tmFrhpBH~4aNb$pWILI}ebj~GjQt|_(-Nq9MAljGZ;H+xV9$TEekt= zXbk~=o}50uk6YKTU~PUCJB!;~I&py`JCBo-oKIA66#I7VX49rkT)uo6;~QoiIjP6G zRhzkPXoX{BA`5pP=JRe{Y1~_se3!Q3C|lD>RCvDuL$x^^YTJYXy?fGMqFwv$v})a% zHVqrlRZS9X(Sb%SyEE|X*{t1jo?R!6S-$xw-Fpt!_KjByT6PyOHUFxSHY2@D*S>V< z*ozJwI%~suM~)b;tvNTWXHQnmo5$Cq$I_{1F9uDY&oOgbOdXwZ@bD0Dy5Q^Kg|A-% zPJX%E%7U$SY0Nlsm+6P^@XHlvmRNXk^#f%=-pMib4 zYLFN#@KBJ@7NnG;awHmL1UL#LYKXCNCu&KTPs_TfPJHELhWG2w5OLXK1VY2beJKYv zYSbwD_U)^|rBlCQEZw7rwd4%7*yl;NR189jaLTCXf_pqyM36etCMnIr4xb9CbZ zPH$hz{#CzlcQ5CNwOa(C{=uBhv_o zOT#xNiJ-)Ei8KLHI#IEyBqbLR5s^iBR1U%6+1d`7$pXQ!m|{^9Z^)GIke&BjRD-w# z`HqG80_1!Jlt&cj3H0PTWRyQALqMHbAr`hmz$uYmu67Z8A};L-6_w)f1ej{HMrPF; z;^fAwRczA*9(6fSd8QWR%&HZ2@`Cbu1kkT2$$v+kT-zeCyQ-NhMGZNX=L+A-^K#Fs ziatTDDTR#5kh(i(BP)%BWlOOfAXC)Z%6fje`q-e=}T zQzm{ho`wy-q;osf1&VBpwlRU%4qs_5IDB#O23YMnJ{>qB+nuA z?b@5M!-q0*@IYF3Xh*Zwt?1BB?Z4B47Ogwduz4p2j`@+DhYdJ#)`E3A&(fjWa9X$T zO}h>~XxO+JUo~z>i#7u0=1pnRx+N`|HK$F>R&?v!g%(Yl(Wp@)+O!il)UF$?yA5LW zk4rdb?u_|^aLk-SaPW`kL0~+dfl*qRr`L19JDG3w%voUW!t663@8Em>I0|CCk>u-wGY8gU!R$|AV|j!sAdlw~&X&%BP*E2=f+8ga z0hdm|=HPGebl8HNh-=WMh9JoHFfQ%efKV436sN^QTV{emN9SAel#cmdgT*9GL%qi+ zy9shb1B#4I$fd{3AXHLIZzDg~j3TjzJY{oyW*HK*wNxy6mhmX}aT zwLG^{PUXk@_Th*bbV8FcqVHHnt^?4wQ#W*Y=XETb|2-6WF|a(k5q-PAfuRH2W0*x( zyiO+_HnwIU&=JNIlJKOu`OYc; za~uLO+s+lUXa9^zlP6%|uZ!{f+=UoFe!R3R;)JooaB%BdSZ!U0-#?uM$2}V{sb@QM z_#2_Z>v@-tZ@mPI)A1vi^VMVw?DQsn`g{Vc4sXSh`QM>i=eP0E^s$&T_eXp`>wA3u z-FNtD{vxCms!`5%qa;|;ip)sNHKK`NiHT0Zci+y!=1tqMZrwT@K71InX3dhit>ncj zX?B>MtrO<+T8|t)j!m03Veh^j_~FNI;1w9hK;kCK%F1xw-V!zhhW+WCu(v*dJ^Qx7 z&FcmgwHo=1Y#lv|d*B@wD}m*QRfo{F|A**3;3Jmja187^ z0Hgbl#3$pXW9nEs;1T06Wh|ZUP^uMzrPqLd(ze86=g@9F`@aOs57>U_oV3oSfUYQtI5h~=BiV>>i)n;I#Yf$PY z8#xVQhVWcN2%Irf@zKO-5?H2C@rbUm;loB_4;65HQZ8bXiVzhqBUns`O*0@Vs}dCt2=+J$o5QQ&%6eVke^r{y zBmB9JN=0;onfP3QMXbDkmEHI+0gG_nH`#ET8}A}ADjZw3uELjJPGLl}n@UE-?`Not zyU59l!=j}>;kVys;p)|^sH(VyhPsDTA9VC7>4^1rf#tr{IJ$Q=veTk*|JEJpQmV`3 zaIrazBYW2(z|RFLjh@crAu3B5U8@+i)A^OsS*pdrKf`LBsSf30aU4BjtF=H^)_^iq z1vDaml#q^^MkpA@=H@pdG2M)GSqq}_Y7tpbhq#g!1hT+=;xq_IHXtO+jEJHp+$gMr zpRyStbiCelsy?~Zh%bKvKiv~JWt!nx%wuHrNTGVjtA2`nUQ@ol845Ag)pQeTk+Z6* z1!W9Vg^5{QVn&_FbSnnX#6X#@`YsDqbUWQ)6wwM6W92Q>(D{f&hMJm(P!T3Yv{c@I z&peGZZX#A#XA=%_rboDvQwhgJJ$&--z%km0>$3Ye9HxSGel0GS-^aQ93Y<$UK^{RN z_UpL&fcLoW55npXTuxWv3?r(GvRZg)AK;4OCJuxaBDnGe3RyLLslx2PbT1f0TnuC z5%s@KdxJK0{7}rE{uM@b?Spm8=VLuhY%+jAWH{B{68oc2Yg zlJ`}6i;CqD70Y9Sg};aOu%hW1DhQX_1~DD`Ht+3YsCa*F7=W24{jlspIDWUeh=ud! zW7hXSV#aqr;!CQm&b@o!HL8&|9pA@rs;X&YhT!|@ zF&3CSZX}NF-hq8<7vZZ3Lou>fdkpE`9v$Co{e9D?OvS99=i=)hf5rIEe#RHSZG>CA z64APcD0&3M@mfzsYNSaRK|x{o@{6xAW5x{p^z-);FeXhJCuO77Xf!aJ%}7Z}!{WtD z@$0X@V)mS$@ZAreFWoX#sC>r zkNss&>^yJ)Hns$i|B_<7Y{bQmxZ{RU6Qn8Cv^tUuLUzroU8 z@2@t#8ZvYcdiLsuj(vKd_fQK-X^4IAd-NLcCs=k6EQimyVf{`k!e=~HN*{FT))(D- z_Cc?HebHw?e{>_5hKw1BUVX&)Om7SvI9S@&Sj@m0U@-!ndk#Y9exvZw4+~-I9*XNx zx$ub0MtG_m(P>49qgoMWeJuv(!*k%u>km=X;6{=hAu)x>OHd;{vKUD*TEwK*;6z|C zCNDdQAGbTe;`84zdeF!GeXaYfh;BY9gE4>eV2h!!81$beQsYZqU;O<-y@>8H0hB&{ z`b*<;sLvu71dMG1H=ayH^A3`PxHFA~Db zzQ>uvYmu0tLJd`lm@z84!d@+qtZM!PM*5w<3@ml#r>L)aPQ}uKix*w6V%6_hyl57Z zlfrnOdwBAgUWj0M{HzhKm#qnwU$B4weyRi=Y8Z*vnQtOFDi#6m);PR%5nSvK;mLir zy4K6!b=^m1Y#>e^+=xrAr%|HTqNerwic!IG%{Ho zVONjzTt*1REr=#mB4{40ke1gHVeOWHvmU8%xRH$rSrbnBXX2<|Izk!Edl4Wvn{=FGNu%H z&j6p21~^6LL0$hsno_Re_pSbY1BUh}&hNi2Mg47Ge+?f9$oxkuSbmxIB?h(a!q4@?gpmU_uZHTm)D|cbx!>sp*lF=39WJyy^+m1dBfv%N*+vZ1qaR zZ`Q8(>D%w6T@63~>Kn<1jvb9Yg9l;c_z@UAW-vY;Hxx^Lo`J)gSK`3Nxazg3*&cg~h}# zFl)_zIECfGIlc_Zymw-^$J0?--pBihi%r6>^L~@Ii2nYE8Te@0WPJ1OSFpCWL`g}B zw2mt#CXOm*w$y+B+2_+S`NL88?28ZSsB#$~+(%MU66^^KA9qJ2Mfo8yCI}bKpM{;% zdE_d~kV!{$@|-JaE>d#JGN+f(6)uCQH49C6(48aD5< zlOWZ(I{`F!G{%mfgfZjCVes%_=*xRO>En;ktw$e>7(PbY$x%Q>%+wk^b~5@{j7FPo z7MT9yV%U2`;6{8Ad}0d_l~ID2^kT%Pl!;is zB7VQ<5)+^iJ57plIWc=|1Xb0bZhYRU4+E-R=-Ig|I(O(Ot!wGpqq_u_gU3!$kq~m3 z3Mq|CVup_8R)&Oh!=GTu6ul(H6-X~KAWKf*D0Oi6^uVSKE3kLlD&(g{(2=u2z66VK z?rEtx*uQ284iGM$*Mp$an^De4GbAPj$M$~3C)>lYKTAnhD1+WWCoQ{;I!2-8`bQ`)ze9*LN-LC2BBL$MP<{*LhTAAn zH9)Pq39Ye_B(F!IsuF2Mdc@_4ElcTusWj5^>kwO5OJ!0An;Ypkd?^OrNk#-@*5P85 z4&DW~u=s2k=Glb6A@3$G6y3ub*HoO0s=!p6IPA@Ph_lKkSmGLo6O8a9RLw}|_sc78 z6Dk6D^;8@Lp1B^{8eT_jGm2SIGSPiVD4HtnOX=?o=DVyIt=(WIKAQNbB|yY@lt#>i z6JVj^ETNc7RX=&0Pf2Nqf;5ABfgtXGkf|Q=!$bjMK-_f<{;k9gT@&zru)( z*7)q`RfH-lAUE7)-F%7)GgS%!S|N=Ev7Ry5;25Ch%$LNU@G44Y?P8g42!x*Ixw!qXeqtLTm8}#ke9=&>Z#Ru))#k=pl zi7s6_pnLld(7Da~bV~iCsjC8f7XA3UdCoz-hVVBJL;oJbFk*6e4qCe-nP7H_ zEPzX*3O-c7?xee!bkEAlk}^|Vz2=6rj084d7pjU=us>%lDG`&&#GvgW_Uxe=IcI}_ zKyL&Fd+<0XBJ?mcyUco5f&3CVPS{xC_^D&? z_w_{R4L7*jpTdG)XTi;j|7R(&c*jw688ROIhK-fh5q&mo3LWW0mgyLbpEwCqr+ti% zc#kHG8;x-jCt%7){B11je!Zzg`V2;gZUZsllb^Bgq%+Q(_mNVz^cyk}?K}6yfPuq! zjwzTx;11+x+I8(pcvzq}qx^9bKEfBD&ydQvUtbF3KV0_<+7|^aay1Y!AFV?S!bu51xmA6>mBHk0KMvSY7Jy}Hkp7zlv5(LFD z7KBni9@Cr8d+}V|J9k9;_HC)M+o4l;*8Nc@J?QuwgzH$s`E^wE;&7 zhz*Os!TAerQ0c1ZKbqj_ABLS<7vl86m5`<0;IV8R&tKr)ZILdXfn-$`Y)@_=u;#{{MKx86hQ3HrECh?_R(`b~%U=SP`kIHRAzW%}8>M;nzs&vyJ9n;z(Z~xROkUX^ zXo1&_3z+-skCI~1s7^dai$ME@07RAo)j^3h0zAhL9-2$+Jh8Yx9fs=NX58KS?_gg8Pa zPI(iyz8SD$RGX@Kf>iBuM9Lq)Gp89_uVrAPM;6w5W@Aq<9k6EsEMv?VbvO{KqRrSI zU5=m61mIk<4jFXznT9(kmedL%SlK{TQqS*iAXu6Rh?^*8G+kUr$M`S6VxX!KV9`?j zXz4JOG{r4OytQ{>8Ip`5M!zcle>tZLp4x|qB_MoRk1nZ!y^%FIo&Ojs0=3wZRtxL$ zXV{%mj=f<;5?FMsXAS(U081_(k0cafGowN${X>NFe?Ok*M6wyq%7-|eSA(@d>9|r- z3pqcll;1*?@jmwKKFo$UR@&%GfJGYo9L5GXVid-W9F1WE`eW?S!RXTFJ-qqaYv}U+ z+vqPGbDMY2<=r1log9f1guptE3a7>=?4aRJ- z!}Nof5TY;<7>{ABcmh-9Qiq*o8sABHY?x3m`P%r=q&;man_QqbHY%I2M z$INeL5iDX?Kmx7bAXtcf{6~*OpMe9=uU~Hr>D>#x=p4GWeGeVp`Ul#6@HRSkX@_?0 z-y>Y!LZ|oNMaTEvrSs{AF{39**C(!j!bmZYI{{;cO{5b0ocH1*I?yRN<#YoSvPd=D zr!q9cOVNmUUYohH5wWqcu(Gm(gTqSNg8A%B9UWA{Or{P}DgwYdUEw-6k&bH^yEwT@IWUAy;Xc@D+sapN&!%vhG| zAPgTz^}@O{fI*3Xv)J2b5CJ5tQ}_Pp+v*WQ2c1Bg}l0xV)rd;u1*0$=0{6N*NBro)@>;)B=U z!Uu1>jSgbfJ?nX!Ht$N^w_^6-a0V)SPg)@%Pl*^Rli-vR#O7BcDz_HNY{(f5aI*`m zB(P*?S`b}qMv}ULL5LAI!lSWy^LiZFwF%1fI0-Dm9}1`bl)gDXPmUwo7GTw{pCLRV z0cGXY5?B&53$bzS9D-#Pm78}fScESX?wx-EES5*sVEyuM;T4bswc!>_go)Vbt91>F z7;AaT$NPUBSj(K6PII?4{vxk}{{kxWQz&@6jPS`JRALKt@JLj`DI^P- zDTR>bsgYBpLAp$fOTLk?zv7RmWI6mJa-|H%zDXr;2+f9Dng$yj{jlD_9|y0*;CfmG zemNVBg)S*rY8!;#4!Gc2oB}!Oo5(1xgOU|ROemSU3KzXWSp(`m}b7~&IB`Sx{sWz&CYiULVs~;el zsyB*CB%4kwj8Xd0a0B*-XmL^f44Ew1Fcyh@j21a2K*M7VR391^Q9faDIlCN}S-~lA zkZlHnNSg!BNfNxmbWgCwH5?ZblqlrqR0fe!Iz~_Wj1K4{ zj2Jea&Xta645QQ$OB~py7tBU9XjGa-h2zayAHpFGMmBD63*4Fo`L}Y!G~IU^(lh zi~|HU@10cn6zxOACWxHn<7N7ISyhYnEY|K{}(|-g;_oKrYHU?tDvH|^v zVd&s7(n|lqJqOcid_aZ82(-P3T*qKAonE(2-O;aIcXWBPEnfTk2k19&9D4T|fw7~f zVa)K!7}9?f`g9op3#yheLkXL4({cHVAIxl|=H_Q8W4X&1bm*u))n(O)iA#n1RWF2w zN5aGFI<9+rBP2Wwrz|a@*62~+(1MevZ4ecch(ei2u9$)pDjVN`>#U=3j4Yes?H7gs z{|JN!#^8$cRrq=ZAT%TbVN@`tYBSPvvvJAeGA>W-CX5_}@xup7>E*|c8jX=u6T=A4sSF+_4;_V3gz-26Vfdh-(gMSt z1WTtLgYnVV^Kjb11DAcGVe4`OBgTJ>E@Mue;u`&>ie z!gl9ZAU4V}Av9Tq`1n#JCGq_P4Z_4$&VJdLv~Vxx?K*>L-~Wm!gNLEt2OXq*Un1$` zYp=a7<@pl!AAJ7CKi-l6BUavvu@=z{D1s&d88NmZp!3#St+~R)gcM=_puH((4ZiWZ zq{6%NzKohQ9c%ZVglk9|>;f}k6Iuk9%sQM+t%ZGhJtCF&CA*MPgNxbCu#Pjqf$v?- zFylt7oc{7K_O984I5$@@;0!#aEPq^$MpGUlgI%zG)sNV_cL}m&B`7Mbg+eT6C~d}x zBge3J({e<4oxweG4)Bl-;E$WYokrv(MB?<8bvV9p6*3DAQtBfy-ME5&Ma&EnQ;r2# z{!+zakf`@IGS+my^d)l2^nC`za+~JyhB{ z=;#&y6<7*%w-Lw6<`bC?SMNwzU-HG46AqZMVlPI_ScKz;ta0A{3Jx8&!}dc~Sg>v< zeqOv0oA;c-ijBvx@AMTZlkw-v_F#pj8$Mrm6l3Ra!>AwEVG$$eflDm$-Kij~JQs#9 zRvp9Q-S%*}7K4}!JtF~v;{OCo)hn>v`?tVi6yq>Pk(J;M!SV-GwU43Vqmm%-%hAEg zJr*8ODhVu!gn>sPVc=5)dxpdNy%n%eZNkZTGqwdOu_IK0!x1HLN+^ehpH~wYVmfg- z>zn)`;F_U@RkRFl`E`g=JcfT(GfsQtqJ;3t;xP^)EqOYjRQsIQ$GX8v>>8Yi&wgEo zPkvsAuV*j9toh6F)2!d|9Tma6pXXyf?dy-fhD9GLklq$jm)XGn!!dfyhZr?>D!S5{ zbdeU`jl*ZtzQ-3czr&Y5eUGod`UzisF%zGE|06#6=6g&au)g_b8NNB~k8dpl5GAW; z`96e}s!2?j)>l%w5-vIdSI2v6sA^Sv+KOikC?M?^Iqy^;wqMV}QpX@HUv~)Oru-;@ zWztYa(NfN<;WR22I@i$y$6yoz(ebU0==OeBMy_3@2?XuicEShmwL@Pjtao1f8#;Cw z#K`?K3>-9$0QrQfWhy3ν+)Cg8)d(=nEyS+Q&*a&lGDqPBukvji476{x(DWm?&S zVtE2NShEh>X8a)`J2lv6?LH+UR^p7!Z%5Q1k=Bn59RLvX4J zVW|QvWeCZy!VX7&xX=k-&n!o9R(UH}5=se|l2))VN;=_}g^3IHNMM=%<8PQcbOidh z>nN?65^3|__{ZD$+kgB+N=Er6)rZJjEb@nm498+c{;Qc{Vw^>!pb?2HrOe20{0;vQ z*^LR6H~1*P@-7vw7-Q+ndoy78c>J_@1Gb#Lh~-CJvD(HLyRTYwq;o4 z`Ge0196>lk6O;vNMEQo`!WlbUcfN${E|(GH6ND^EG>xH_5oHS<;G(&0ngYpZg zsj5XGD}P9U54^8lhA)3au!kSQ-Mx_!5)DnE8ufG-#%4NK^L><5+=RCF9?HaxsC$Z1 zeH|S(9f`3CrP^BPc%22BW~i$k;@rhRd@}u8OlAZ;e#9hn;TSk%Fe6Y44DLUe&Tbg`_Zz~BWPxr2hoUbV)PS*+(4!_|$jC_;#Rz@Kl&>-T zqwg@`!_TFRtshRCf%(6$M_{xZc_lXqix<#VJ(ngC)R+kkT`g)^P-4(tQ`x%zxt702 zLuXS~dlzMOcc7u^XogxbfPYu&`m1C_QE7g}LKae$Q7=JXR{Mg{_yZ`6VvF17(jc{1 zbE0C!Qt~yK?g7dOkK&paNGD{Id2Bv`pua^2MwOzi07~g_iwO#4-5=8W7L8Cqh6gAn zd6YV_=T*`!Vy&S@`+u*_iR|Tzv7}e0=u( z0)mY8#qap!^WQOO$fxKxXgYcgp?Vtk1=Z7M7&2li#ttPshEB%x59t&qe})+Z;f$~O zTfY1e-^}^SRAbF&m%f6fhsH#yZ0T0y^}N6ZP^J|cQ2I6OR;w83Y_43Cyx2s+ppoZf4qkO_#5HE$G2bq z8{T{KZFFhh1^uXEhmQONU(Vf#tBG1%D`>&-_)2M;@y{L8&}WM~|F4Ft{3#Z=7vVRz zLM-xBBIpj_NpZ5xDVmVfA}hTVz89|I?7>4gcjN%9_U(k_(S5M8KE`s-Wji&Y)Z7BO z@h*J<6$jh6&hSXu3c}6N8O~=T(e|aRq29zxC(J`_`?AsrG9a zpb<7ASC{~c@beY)OEnF5sk%Lpmsi*d76BEpNbGor3V3olErBOUS`l+`?hg3-H@U{Mn!#g%NRB&@#b7Ngb{f~!%2i;6%| zS3g3LmQlC8C&n{+95!&YwAb~3o)+lccMSRuoWRI*FvhZ?2&fDlIurve2B9ydx#O1+JNOtwqU{H zZTMy3c6`5JCuS_(i*J|Eu`gSLnRAz5_KfA2^UVs(XN0?W{z^h-17WiUvzM&HyyY7) zZ^<@n-Q$dzHn9>|a`PXdMDvJXX_ibanb=X1j+mzAJrl-mVdife z@$H;d`0>|On7?p6=FVJva{_Pz6L@@q3kH2Bo0xbA#IhHJ1joEV+VKJ4;vD1!J z3uP$LHleVj0mW2#at(uu3YHteXck)`RNO|nu^Cm>w@}+~8#VQ}s9bJJy#S5PPf$}Q z%KnaIHEciiO?Oe(#6YE?2|Bi`#yiiXY}d+?N*K$V7=S&H5|x@v4ODG)sNu0y4GlcD z5{AkuDj*Ze^_8e&fLCp9hE7w9XqNx-%_q^%VmyXfjKpVSM&R>tqcFx|7>2S93>+{5 z76V68#aUovzd;zy*T!3nhDG1OQuk)>zQd)iuo=HBgNtVvZbYOZC_W3x*)rHUy1@O~ zbvQY@VjltG9~_3ghfm_Pts{Iqe54&^eXn}ry!Bb^+qwfGH~ew>xD{M3c_Tcr5D~n# z&@3ZPxy51aad#YciG*8}9MMJf2q>t;$s0*H?vspz*J82B#uFP(T*BtV&e(n09d5BD zxRP3q!=VKjv1l*8*>(cszx@S6`t?C~F~HujtCZ3Bop;`sy2ajk`#q_fOQ?}oCcq-P z!$cRD7`zu#jbH6D*|zh0c&GhaXw&vhX>v!$w(ry0p=Xz#ROX{GZqhgSYThQeQ#tvU zK7wU3)k$JKe(_Xbu6HTso{hyezY;9r|C_=p@bmdBDL#KEOF+4&=R^tj7@=8#i zUw|q_5j1(3C@IQDnMTfFM1>NTXHj__a@CE4@D^ae_hEbb` z8j~6g6=vKt-N7xYlvmk}|4ivZsQd|*ms=D6C14RrC`Cd^EuEd%)lpYXhsNkoQz4Q7 zio8@}p$#1r9i3jhSN)Vq;~|v}LC|jJ^kWp8EY2lYe-~I&404Wh)?{3}EwO0@H)(H0mxq&G$k=#Cyey5g55YvCMKfVI{>u#Zq8g}*~yLx{4m ztM#>nLkktfZIlV1NJgkojfn-4Dmo4|O-m~mv&L%fqKfa=R6d|R;yrqTN;-IxnM#ii z-_ZC6RopXFHa|!8O~RdysIKt=>Kg8$ww{WE(X5e`!g!Mvg{qRi7GyN^jBFGoyoS0L zRF5pHT9zx%C04JCt|V0rueJ6T6^sBK9Uq;VzJee$(kU|PR?!sYkFei27e5_x!`uTd zm?ic@U%UgqE!%-#saO{NPAJS?fnVpY#GH8>=#;mxk!{DvzwW_D^ABP2!Xp^HbPFb~ zB4~a)h|hl6g{d=_;luA29$n_$MdyYuWV=T81#zOl*e6jmH=4`OR&uc94 zI{`R<*%th?Y6revxf35P-GQl#_u%8jhiFGI<+uG9H)kg%FW!e?zpTU9xl~*P$5dL=X0F30RAJM8T8(cPZO5!tgyy2nn7`owTzun@SyF@Ck~(C|s!^;#6sbFQkSWYU^G_VBvkIAT5O5Ha;Rn_7wdGYXy#f%hEZf~<3obw4r*yy z{^pwcho~39ofLquT{8HpqM7L!YFH=A**41S?xCXjG20)5GnS>sd>3j4HwF{STmKwI znm=&FIs~Ie%s{^`LouQE08F83A3bO^h7O*9z7`YEqu*%sB1rlTWUw`O1Ye`V?>iKO z`VB{~KEu$l+hF`cKzoHIBP1aQ5vjRI$tl8Vo3l7_`~)^{-Hxq0b|Wk@9*2(GVDrv{ z*tBscmj1RBex6=9Z)=Y=iif=ba%CXQ*}yA#@UZ-;hW z+M!F=PUzmLGu29GKK4Zap2IO_+}HS$0g6kw0vFS3u>4{wzC06&PtPS|XVyJz4NzkK z`2>7z9f3{ZdMvn>2RHi78^D%b%lE z%ivnyj6!1z3Qf0Y3^Gj58MM-e8t5wxVsD}*X);iC3+qYC6RP=VQqU{9!X&GsPp65& zd$Ep1>>w#+H~y=@VrY5{Ju9`oPAsS)2Vo;xc5_BwR1NpocUwdT&Faj(Ve0|u!z8E`v07hH%#Mr_7Y_INYTx)R3D}l~% zI~Izmv2=j)YLS6gfZ`Ua8}1W`cc5a#@IM8Mp5-C#f4PvYjBG3DM5_3?>YCehO0=f? zyzg{g{7$h|K^ehZUi*iXPN#{YI6gd&b#BNPbe(?;&IF) z5u1|gaiH)aGTEpy6t_@Bc~-2egOXN4nI<=|0UE2JWOSlrKZ5oa#Mx2gQ zW9N-5Sh}ZRze6|)59~bWiIeAVz~*u=tS&}j)6vV=V|^XR&IjPs#bDTaM8eJ^94`I|@J}d2URi?# zmcmjhDFRtdN1)fUahE-iz+$Ro!>)QjNKic(8W>Em{0IUQ@41-`yqZ9%u6rsyn%V9u zS+*55O_EiLnQyE+b*uyR35Gac#NMk4HG~5 z1Y;*p!#7|4i0^02!t_tR<7?kw^L{G?$LAm_tq2)%4KfN8aK7vgdq*c6K6)G{PMtw~ zat6*hyW_akIUGM`g?-!iA<+87^;F!@OtMLR$t%w!+VrH0F$0C5! z-J&di;4B? zKU3zv+?ts6=Pv$tX%g zvT7>pq?uv5$`-=s4(ixg8tWNl)9H!SBqB*-Wy5o6aae6_Eu*w%{@_L^D(|A0k(Ndz zq^x?#=PyvghEZA~2JIix={}WiWEq{LjNnnQF&=SrV{|e?S`pr-b6d&UcWc8aqb(zp z&eA~J2aGn_ckd#t!0t{(GO%CkrbA*+ik@A%p+ncsXxp&^-fvHNOzT9s+p*0D=*;Jx z+qa?oeUl1@QBI$p_-x@SY`va{E;Bb^(q=ncAy_h5fXZq{h*Sa2^kg33ljCKcw#sIGW|+Dg7g1!?5H*3-#|E=^6tL)rs6AaPABA7LWtCr!mN zEH&PuI=Dq;$TC#lLLMD<94mG*pC=Ttai^3bEUplNA*qsuMP?y1A`5{Lx$uiDgm<(Y zo-w7k7F~+VFF3MV7=WW)J=g6T0Pcc3~ zg6_7oRYFvv7Cv!#xE`I2ONla^49UVGdw=|V{5s}YhG4E`7?zz+!8RW`ezpq2Jdxng zAxP@_v-VAuR?_dioQfZ}I%Dg(2waKN!aY_6zf>(F=?WwlnGj3ISfH#xc7Yfl(a|Xw zA?M?(ogvj))?2D|V-?j4gCVW4j%6p(^H3$y+gCCesG`FVfDw-ZIwq=j6QcrSbv>G> zGOHPEi8@lvwk6tFr5JGKb3N<62;?Y~k-_#+WO@QE+l7KbMVy?`?=3#R3&e}**z!NH z&#eH9Hrr$SE<0H6J&7aR4&v~>GdOb8344z_OF6*y9<{*<+w(Z(;DY04&m$}-Rk@rhViT^Tn ziO`!@7x}}4N)fZcgo%ZcQf6a9MjSh0>^KY^H3}nW6DCZ+Eozj``=pCO8XM zcyH254Ggd=pwU-CRc3%nZDyUWgG_mgLC7=y-;7dK6Onsue-k>nTtPq2vT#(x=D40L>AYG)-Ya6O|Q zVLIa-Waldp6_<+WgfxUlCm|t4h7vaXnx?0Oj`*BN&t5MIO5xT}MaTNC#6@`<#G(Ax(-96EU<563Q9bR`Ah4 z1*8=-s|XYcDiy4-h8C3Q1ypXLOx1!U-uIZ&TSzLsi3C|SqB1lHk1s+1q2e2u1plC9 zI+G+^_fN&OfDE_=<>F#+0bCftoeM0+l;hVh(RD#}vRVxeTXuz_KVkwmJkOuDBkV1YEAV2}P=U6j9w4X{sQjDay=@?y8|u zH9*B{%P46^HUo}WMjUaP7HQjpaHn6gPPJ&KBz(phW7NWu`r{ou45mru#Ur|lv!txh0 zGfh;tm2Bi@Is|h=GuvV_8rU9dYQ%b;+b~w%VLPR|q2e^LotOw6vDSyYf*)ZWom&Mp zpXZw%!!05o8Rd78$-v-Jay=ZP8QI6yz&lD!2oxfUY9THl8WBNB2no%^jj$|S4@!ks zU<|y2V{knr8XiFr@bd~quzwT+gX0k#nT~|)5?U#u(~FQ(s)t-#j--rCM%x9*$f?VF8yc{L6)AArAc*26Bk)KzBc>0a(;wmH()G@ggNRrhf zS>Ax?oC@CCmSeR?G6pO@gwGGT;R?Z$$Oxi9 zSBny5Im*-((1~t8{cUNHVHGQdSRh$$W(8qHDw0r&!FvG~0}E9wkgO2%%*~7}s;LU8 z#B?13ut~a&c~*(|Vs8Lu91g@bKLxB4E3n=%0!xp0z`-{QKJmq{xfBF9 z|0IOP7cz*-K|(?S(vl02n<_RPpqYLTZk(JBa&7N~ViC@ZgH zfYwZ4+>|0peI=Eav6}yj@^68zLS(OQ;xSEBB*JQ`NUK?Y9*Cu0j7lFuZxo+pJz||v z5j48`7gYGqrFBZ4(K^J)s5+@qatV|3;YCOyU=HWCU~PCgw#V1PM)n+`nkNX!G{E~h zfe{!7Kks;4_fEpK8)>*6kO^P^1bF*K;ks`Gy#48{cuYia0>Z*m5gwC8pvWY+BnK7fMVEE8+Qr3Vmqp5htkEaS6O&E>9@X@0%aQJW>Jaq;s`3mXYgr~?6lT(hs zBsJm-s*zr-M|6e^QE6(V6^i|#s6cd&k<0fKG6UrKg$VO;gPZ*!I2_-A3#T@~`P4?7 z+_3E)s)TImp)sIk91wJ<+COjA}_IqG|bTzDYFTklC^Ko?Jd|2&V zC1s%3ViDZi`lqmlBvoKe^n`*T=5_gkFU@)I&c z&*64?BJ!gzz;e$TESWtMhjtx6a#AKG8KW^Vuq>cLClKlD1?xkbVRK{yqJ5p9D~v)- zNfLZ)_rdwVI$R=@k|SeDX*M`9=Ay4)q+g3I-ZIQS6M-~BC9>o(8%!C33-4gRPadoy z%MePZzV?(Gy7n1|ZXNrecZcri)}|x={*Sk%MNwikxLDXE5)i)m?(1mZ`2z_o!v_t( zsKFK()TT%>g2t5(MGJ$C0JhjkM{|hE_nU#Z(!g63v?bd3?qMB zh()eZ=rL~>KHhf`&hp!c)igp*@QP%Z(gXuKY7wdaPr)Jvxn3 zg@t6nlQQ2uARU){Q!!!d4SaPp5i@qh;LGiim`ioA)FlxI-16ZOR|A*u0{F$N5KT2u zKxg5Qdlwr#3z3#*=J%Ny(cP6SPuYwDWjzW@%_w4h5;LSqm6cHEn@~~Gi0m9aoq7u$ zo}O?qpeRExSu6n)o>m6m921WDW#h}8&iHJ{6>Pp*49mD??C{ZH>Sj-Tb0i4suNS~B zg$npu8fI;E#Kn+8oNx)m?o+PVu+J7t*6zpp%|~$PkR47QXOMKk14(fijOs&h-th{q z-v~i4)w^F*A|kW$8G#qG?$;oPQG0el86B$;B|0PW<)ui?DPW|ZhZ1cS3KV)|<=!Q@ObHW_SB0Q}ScHWn!q&Sbnl16c(4D zm|!g^7Bl4-l<4kDV98b1p{S%9#c~6T<@Lzt@6DshKMy^w?NV)ra+2;dpa&%Go6sR2G=h+VCUKe`1z|TaCN(kmV0-kQ$ORC z)aqo|x^h0|{`e(qtj@HqKcVbus<;OQ8(Wy;ejHu)EnKaRprx)Ek9aAjq3=C- z8bf>a!+?(6(EaVU==$dSX!DN`@b}l=q`gkC`~z?Q;~lhp_XBBDqJF*lW9Xov7&&wl z1`imF{=NH4tF7C;-yZM2`5xYS{cReR3m*lP-hJaWw0Zk)=-a&;`VO+d$QiTo#rYJp zTW*VSM|^OF4LhAtX)+_SSltU`)e_jvR9MwO1eHaSm(aykp0iHuja`k#J5Qv(d9f{YRV9N3DjB`ly^<2UTx_H!rbZKfYQqC4H23KM z#hx?IAXhy_Ass@2q854bYUIeOke+8i0;8{}1UbUviVz%`hrsY0_=RM`J1`a3{gUBv zBN5kp5+qxB&>4H3!*QBw!IqBtWI#UFIEG`>l_Yq`?_i623VxOAQR94^5sMF8#YU?DT&44}J$(gVemVo+eDe*y`~FM(JnI{r zJ$D)&9v-l6dsM3|8D2po9 zGZ?Zg1DjG43Rw$LCvSxyUDpFmExa3SK zF9rh@MwF_Q(im$%Kmc4XT|>T1i+D!-$(iLW#|A_smSdM&9NhE|VXeN0#eO+B7^=ik z&rIw+;!c&7jiAChxaBwCa6%e=^CzzBsR4c-rH9lRIQk3|+^vEiH81Wi1SmdrxR3_YOF5VRZfDZ0<#ZMubsz+fEP z@Cz1vH3F7L*F#^f#C?|EL)xwCn{c-~i)BB5iXF>;L1IQ0l=@0&sc7>`_1M34EmqC_ z29`Tk;Eq8?|4wJlznYpFI6FJzhiPN6eR*pV%2ykG39wW&K8K15Moc#rX{7#NUwQv0 zSXe0uJj(GVTye6&s^5Rare$+bq>xLez5n=;^oT$1;Hr})=6wGJ)~;HO3{^d--cY4! zLZXK++zzdV?WVa%V8g(Z7k`39Tu#W1%h{A!cF+aEe|J(o?v5;94U0(1=SC6!qO3AL?3DA9_aRV8+3W&J$&$Hd%W@5J9wR7 z5!MQqxADPyA4m`x&}RUK3>=DqeFvdWkG|;Ap)0}DRyyX5zr7(H|Bu(i<7;^5AFts( z!lir14(Qse4=g_Y0n_Ya@XmtM7(++pz-THULxsx`S+EIGz#&2n=jalg4KBc$Aj`Vh2PM;bNvEFj94B#h~uL3l^bNUV_CWf#r?_mdX~wq2VSB4OB-h_fgq=ANtxB zR-8MiyZsb3H^nx^%~XG475F1IQMqq5y4WxNS@c3mQ#+fyhhweseo5{4QxVHSZEn6fo0y=ILx(+#gC`LFxw_t0?X{f z-dJfBjO9nYaP&$FTmuSl!QNW}%jchePN;l`nLp3K`i;w_y;K~|U0~EL$L38tF?a4< ztXaDPr!9}*_=y8>b#}m&i>^@X7p>sr_)Ux5fVb2ayn;iAtjwv%5=2c3;}vRj#g*GA&rXtm!Iv{sW&=L{0c)?9mZJKIP_#) zn&4iH32ri2%YnVgcQM&ZjraBjVB(2jto6)6s1_1fQu8zj^AE(Hr8BVQw@(ora*59H zp#&9SjMiZ;DZz%{zo&i2;4KQp8p7CAizo&on^r8~>pvnh^cs(C!qW$g9A5s3P2n~z z`UQ(;egV4+K9XV)d)~j=k3~nwRNs6dO*j6_Qo86X@6#DRAVKTlW_JpUf1HY=n-`$g zlutlVLV(&^*z*R2U9}}ee;`eF5Ii-~7=y`t2VRWKP90kfyHgvXDT?FQ-v;jRM%=l_ zb2Otc(g)T%R^!lyB~XZLu9b|!DV0j}_uv($LWY?4ExUuwZfSG^Avl+J6U)v=6FL=0 zP&H%saVHEOG!Ff`4?y=1x}fX(9ntyyPE!7=_r(g^H{X>M%R6tpE2Zn`)~TDMQic#l z7X5`{8Gs&LdZOb8ozUi;ws=n@siSfc*5;jm5IAq3?K^LxTL)Is?!7T^`uF(IDgtlM zKZ)^&yy2pHh^Sl*0+Wm3A+jcC*CCRTR7g%GHh5&hDX$rFAvx<=umnp5O@KwR{{}23 z0Tx;%D}-c>Fe(TZlc)$ZLjxm_#s^T<+(B{GZItlbB8^K4VVlqM7Sz3fLIee3W)Lfs zg6A!)e1JRxrHsWT0tRUzq=BC`H1S?nL9I7KUr`UesS#y#1ZuG}rYPcUyQKWLWD%;BQT;>wfF?3!8;&T0?c*)WIBK_sf*>ReW-! zahy)VhR)*HrC3~zRU^K*8P~#P@C+?Lrq~QAzlM-#RU!Yb<;u(w{KWRt>A42!I+L@@ zq`vxylv4O7Dq-)PjN@*xICwc0n{550#|se(9K9TcT{hQo!8ApDv9y|A+#-f#LrIhs|lkhp`^Ehp5jgwY3 zyq|Xv8kLP*`v?KsQ&MtC|3EtRD_3yrs3p>}N_h?gj+{CNTc?Y-?BNN&zyJgW2I7pR z72+Zj(ZIkUI3N%goa_-E;00xF8e(pEu|3+sn&&7t)iKqyf2XI~8nV z;fDJNENek^bxlu^mR*X|c8)mb>Wc9A7%Gf71{a|?a?%#@i82@~ z?;^LJZQ4m7=|*6PB$EO%BGa*$jx1D-w3cPW7-<@E2LegFCw3lvWny0% ziyqxExMvRx=-vZ8Y2C+7$D|c|@#Cd93_swB(Z>QX!!-jgiYGXcRD++d6kzg+aLjf{ z!FJCAgsJ{Ow)P%!^2-q7>4EJFzQV@2pCBR7nU1`%)i*Lo$FpYKt5jnDy2aSEbRiXQ zI7+l)+{(=MmViyGmtg1G`6x{E;qi5}n|St^kGO@}>JpqevI=`Q&%v2iWSDDC6V`cT;ga$p_68JUJDq}4P$qs~y$78;_C@#h zj4VFrif(OKDc6O6t7je43w0MIKD?0o=38t z=-s^&Ki>{LI(I-{R>|6<%M4sur2*S|n+nBGW|YZvF$A zhDX?bBOk6sx25q7p#lwtW=4c!N-|YQ!;60jmI^|p)d-ckhtfHWR4oRYp3a0X6CQt1 z-9148%Q2VtT}fz^k=ey8mLhtWY;7|N_$X)jmNo!|6_1cs+5{!li@HiEpht{i8tHKK z$jVdF*~yV#WPsjqM*@pn%?Or(LS_LQdcIMzy99Tu5TEOm)Va1mW%p_%Xv&XClL zfXr3zBtGWiT0j=A^3gw01K%XQ1QX8$ExeP3s;EbttO=oX5Xl5`R&fKPQ7sCUO%g2r zU6a(xt8Or=m6U9qG$s_CEJswj8j;!M@JlJfjkI#Aq6)ail)@>D!9a=uuHi+v7?KOO z;7nW#O#2fo?pGsl^!RxkJ9P#QE*GfAd~nI*Dj{MGOFL)Yhhl8qeH_2cUxaOY_TbQo zV|?6&mFw2x(6N)!z_k1INUU1B27C8!r)|c*16#0r_ipUkd4K^}1v2SK4<5I}h8=qe zBs;iMO}NroAK1GOfj2^+QybuO-3uGnufo0^8(@F(Ff8}%gzdqDICt8Ps;3eax1U2+ z^ALrsJ4&`Y#tTxexcmn|7N3i*StZM!%@JAo3JENiob4dXOM$!~RoZL*qVq+hrDmbp zTrcGyJ9u;-TrWBB9yr6%;XF2P+zm_1i%=-5sdVokr%;Q1M^9nh)~&ET?|{>U?vYbg zShs06LL)L!qOL<}MH3W8wr5kF1QvHU53F6b5-0ZTh4tYhIJ|u~7XCa3wx?`RRH#B; z0ilwwMHcT%mfXyM=Z>@!V^~oWlC+PIN@bgxX+}Y^2C_6g5@{ism9UA^OJMnlVEOR7 zMHoGBAbmkw2`H~}h5h~SZ?vX!dFTC?EAiiv7D z^UXIUd-u(^(DCiJ7`VQNZtdEkOQ+80Fl-`*{kjof*oR<>RR}(HOvHrKq4@4(pk!Y; zq+*s^A+`kRvD!HW_Tf4tFmTG{?~L;G!GV=CvF*1n5Fc>K~(?4p74ibtBLl$F24uJkTAtEBHBS-vRz8%I&L{MUu!< zaJe4D=!VgK#WN__D2l4tFl3dGDQi%uy9HU*6WquwM^gDiBUh#%kaTGcF-`sH$*z_ z)$y&ziYbVLBnd1sv-a;b06qH-!Kkn2;o~#W=(xldQ>a+n)en%PFd?s`5*ejp7R&<_ zXm25>v=IkFOK@3!53=gJ(%`)qW2xjlH4)b3=Ewg%SZZ2fBBlfj6Xnrryk}G{qK{Nh zILRv?BDu5~9*Jc*=9z+{H?rX=y9Hm(Gn|Pl$8nz`9HX5G%ZGb$Et2VET=Gmf7MP0? z*55p_ps%6mW1yzX4)FC;m z92vPr6cyK?Ajg0dp0k+WBVh4=Goeuae9q(lR4dt3D_L|PX z?uy{Ghf;Cf2+ziKg7B(u9Q?!6cAjh*PIeP}=ruJ6^bf}m-~S|StR?E&(0&8((fEn*^NBzc1BlR&NPP0q zG)x;m2H$@?9p6p)5TA`1i!kp17BH62H(rV(0`n6}Ke$cVL~ z;y%okcOcJK!t1gNF4!D}_az(nx!c3V&I+fG9!G3!B4jExoV~AO)z0m>bp8w#jVs(- zU9e;O9-OtgM4w@Vj^9gx{7f#*!7wv1;WyBqe4^gY=5>S`?@& zs90*CF;v6nMlgPvH4p1ot;edRtFUtMO8orYEL=G6hJwN}tququCvBhyU$_hoFy1Dd>DFm>4dff zi%8}2&)JP%|2siJz=-U|qI*nqg^6*NQ6oimrKW~R>oq|4?P`eJOt=sB?pO`GGY45l^$cPO6si<4D@>$w z5gUH#8HD_$Y4b&7Qf0b>rrH+VZD@unKMT$_$8dbl2Dmw%MndRyLdG7)c2kiY+>6}Q zbTrkqppxg*mp4PNuSad&P2?Bn;?gxocwDlj?DIfopbxTx1KBV<;CAs6u6o^oPk16L zjS88n+sLncA#GG8_F5^^w;-jkN{X~IDjp+I{{ZP!1YwG1#3~xF$I49tOV{p0(WloC z^zG4~>Y^70_ZcXSq5Lx_#Gt)^i+CCHX>DVi^}CbiVY&C&pqt$D}YljBX46f zbXB*dZZI*%qOW>{Qo{1z28&3oPcumNP^ut0g2hNlD-um6Y3|`tf(BR8E0NARCbq^s z9IQY{$y4OAuKKE4V4Xl`N;tdZRbYpE0`eH>l+?aJu96YFj~i^QcEjP!cG#ZWgkyWx z;Piprl1eEmsfUbGM>uhzR)iB5kD@zF4CKe9luB?B$|W?qKpM~&fRP~Mn}jer?ugKA z1cziHC@cqo5mYxZGKBJaqEgfdODsWrng&T}Wk}1=ppbyc&(R}0qfCOu|ILI#`Sbb9 zt~yDrWa;R1G!j&VC8ZS*g82xJCh!*~IeS=H+CeTWlfYtVxQ7xtL$Uj-zM>8hkqP*PzjN1?omjhKElwOhfeouRB0Mx6 z3f_l&I^4n%GlR4mq!+U8$tqARXW*c0L8hEeGt-Eqd@7leI;69H#HDB?u-K+nNnrVW zr=0|raid0{PmgZWek=kk0wyAT{y+Zlmh^v{_uEOEdy;z3p;B&Zu%tiCU!57(PTQ2GQ~v+ya8rTmY7+2B0`WEh$sp``K_E6HQjw!Dxc zp(I9qu~9jQj>zKk0wg3WAfxoHVMJVc>kpKeTcB@x0JGsHZa47<+6 z@=`HfItPw9jmUcm7O5+YaM4j|sQKIe6yCJg%`8Q1nv&;Y{U|i>UK){+ zT_%0cziX0O$$P0*GPOvg;}QF($E3>;lU9sqeotf)uQ6Uu<#wHc_xV5K=b2w%`^F8(Ny|V|bP{%K+=0pC z$6?`bv+?_HKVcEU@yVxC;NW1361jnJa>J*eevA$4mSgVhZ?SUue0(?K8*E;`4Vf85 zC?(ikoG)X}oH^LCWh0g>T7b1HSL2IMK82TmEEHumuy?$SZ@-y|eY%wN6E;NViYHK&HNcZ4CD_^&qm5|9zeD8(2`kM6ytL3=U1c*6Ke z5?n;4W3d6482JB>*WZ=wjn{ad*WSYGfBU=CJ@#Jvj(D$EZ*&^{2}aG@ik+8>u<1%E zzCV_L^*2nI>6nhiUU|sSm=Pz_;aHR!-yOb+HO`TU;yuYOt40=;Uyi&MxkWWdNKnAn zI||oau1a6Fq^L}! zCCgE&YDNo#PALJUSOX0m_;d=$aq!M>RmFsbthtj}}Vy zZ2eu>N0-pi0L*?=ld5`-}ZRhN53jDi(r8C=vk*F~wMnp$O|IrY66H%73bt!T&|MyaJ7= zWCAP$`&#gG1Xte?82{}8OgkBdPK&HDako1z6*eI!PsM^aqEK}U1*Ny3BxDt;I_wUR z;bJl2$Q!7q`qQv+>Gh3LH<+oGisN5^Ma%mrOj=zpfkoJVf~A~_LoARJ8-m4`Jw#~f z1LUx*qWS+`Um2`IYTy)q8wbM`IG&_I8cW|ze-Fzp#2`)&6pPFTaxHv49N>6j8QiUf zEycx?%i(+OkTgIqK%x*+MvJQ@=l!bNNjPuO-6R}%TxzRoiHMg;a0!bklmL?{7E~sP z|8x0XA;J@j5JH%QB=NXZ1tQZ+5G!&)(Nc1C$SNXG_$WSCP-K!6)4y&1)D0%oiUhvg zQp9D-5s^%g@p}bWqLNAwnNY&(Q6eT;{Sqt%2v3k9h>bKfp4XaOKvk6nFGlEx4xYq! z-_O8jgvB>sPs10VPQsRTYmt?bhU}DV9HRsN>eElKVeN9PT=5&$ZCHlyfBX`D{@zq0 zMg;mtU;dk*4@FTTL8T|2OB>0+Ebb{sRl z_!7=n{87{N1Xn%$@zK;zv2pEs2`UG6?ZJ0nd;`l<_Ehx^j6R>DM6@+J3mu_SX1*tF z&{xa)CBRZ!^8)p(6K3;M$k}#6f+JvUbpn>WmJv3z? zSsuixBfD^h>c!619{vH*DB^EY=xQanoWJUWALlQ`6(4V$b8*2Lp2N!eEYvC;6-y0N zx_b}_O)Ki36MheokS!-j7UM7hwCTVh>^^xKGZ!p@7Zpp6q7r$^Ix6EjWaf!6zk5_J ztaAiQTy7n*bdL#^CLD2(!=VcSIOmgui$OB@C)P<|8N1#YA8tR7?!TVv&u}4e$b{!?Ci1($zduc}4Xbc@XLfRW&WHy#mOWV$9)2=Hzeb5aZ z+jc>_wjV%j^3|?uH?-~Bk6`%}1HWE{%jpl`RRYXBnS$*h^;jQl#F`)_q6=8BOHFVs zyop5);aKAm3IF0cBo*n9uQD?Tt>!(t3poK(n5RRfrUF&kO32G9pe4BVdIFg~PENo8 zyg)<0O8YuhK7vfyfZ~z{7%Cp3f_~9VpL~mIwV|Q~H4NnI2#&@k5JvY=s=q0LMQlwh z@`Z^_zQnAsR|_Qn*T7Ot`B`BWtGoXbER~FO47K-AK|qw!RE^J2*7O2eUaUweX{vw0 z&pbi7*nr7+pP*q>Y$64lAswS@5osl;Sg2k^Qbav}P)@@GBvQ`h8fs8pcNf*7JI8nj z=R*o`DZ2stLbdQQw07a-GU7g;^AtOMbx5lP66rA0%by@aeMedpmctvJFEb!5qZoPl zrLeYfLLZTpmCj#GF%)yq2MrobFbqK7o+4#SD=5TFFaeKYl)eHc0x)8{<^O4nrL{Y3 zFb4AV0sV%+LZlY&J5&P8xEa6WbL(ilKld0uI^YQ(6)Og%zpPNr$eGth`Jhr)qqNj4 zf#pKMO{ptPq<$|GU@2$BCr$4qY^Yw!D{i8^O6={@0u6zpt$jkUJR*1=LfasW_gM_s z6ZRE^OBLZ_Ce+QWFf}6O2k*bC;t>)G%&f!&_nW=h_gpFz}fQTpX*q}lwP44CACu6st$yD z5d-7`F0Yh}0E`%W5s-;Wq(VqkwptR6swOg(CK3x0D3KYZh{{wUI+KbgOTdMY5;M7S z2!~v;4y9Fr{98t#h;=KX8%)dw6L1k0MI{uKK{b`eNAdjdJ&H;UP^c?$ z;Mhq_`}}kC8Z-by$Bsf5*4L4frV@CuY?lqvx|#33o`GS5`eVf4ff&r=KK|@e*f=^v zMn|NnxdXNN7F0BC?Ol*XeC-x0DsM^ari_)(P{(#z#rBy+<>_?U1Fn}ZAt>NF;=%*r z=5!w0*K9&oQZCFUs)Fl**uL{H+}$rBDmn~aH+*o?$_|&V`7-*YT48-HF0X?l|Nr=h zU$A`ZPORU(A9I(i#Nss@5ucg^ePt8t_+uzF3^uDCNjc7ZL!z;K{d#=-^{436s|#lQ z^c{YhHwPEoJfLJ{%x2w^s~AKU-=lK9jUv{CV%FWXGzODJcMw+4grgVZ5LeWI@N~W| zdw}Hpr?8D{!j#pnn7RKthRs=z4=pBOe7_Os*N<&qB%x%0*|TS#KLOL5CdN{F5F!FL zVqJ?^ASt@Vy77N8-B`>FYu~XCjR0!jiwdWQG+^JIQ0dmICp!1neSNP+}>CR4no)!nz4^ z0!MU82)#4K5Y!t@j>n!4f{G$ONn#bW~GE;I~c4Z3DD(1%ws zc+eQ15*UOF{e%z-V(?yMHP#X=BCU(G=l#nClBSy5(gI2MYd*-&FKT6lSRDDk2^P&w zsuwyc-A$?+I>S;DQ)Du(rJ3vgpp&CxBWOwm9r<37kgmuNcjsAS>PX@rjC;L}T6p^~BcFJOtwqRQa8lEfIvOSlMN{409}6bULX zuSblr2#ezPM7{)z1h$uIpzpuplEt_!l z+GRvU1tBUTQ0g{{i%5XFSchF(_F?gYh1k4#0~S-2Y}vIDdk*ix!4pRr0O{aC@ zF2kJ7ioIHjrF6VK{)fp}qU8xc-Ls4EWB`YmwJt=P#`xJ?VvriY42H5$l%0zBurOF1K8cj*bm*y|+^_j#|H0F6bh3xHk0)F% zUBrQ-r(ol75i)|X)YODRZ8gq&_+j1dgE(sEfHN0(%qeSZ*tw7OAeYXqj`jKliU|t2 zaFDF~9=;*`?T4`E$Ubb{y939qPh#oXRXBd;EXz_%y*5Loe@M0RkZ`#RL)lG~6q)Jp zT97TjhoGD~?01Slcy=XH6*rNTe@6n#*@T<;aP>uezxNsj&su{igT`Y*|B=#yNU;!7 zn0PKs2-14yA(#5jw9P(Qvdju9D=Mc2A8Y3#Q5VDzU-8PtD3>lPft zEHHTTmzePFavXNaz)q(Otg%bR>4+-q^ee{x@O;E&qlsBRvze-AXBXZ2;YUoF_4Jct*39u-&w*Plp?x!%BsY^AAd-dxwQNtbk#Rm*_-&j0cNcR zjXDz=G)9<=W=5|Cu)PtDXyZeK83C)LCam$%U{6c~HU^YorcETaTrWg;IS`QFgpf=V zN(i}__#DWJN?>nmM|DDgFp3bfHM(@^BJHK{!3Q1DxqTOO?buCv6zf#Plw+}OMRa)y z$cWitLam7BVp?*icAaURq{l8D_!()gJ6~(x867_8jCP&-V8|ykG5vHX+AlbT5t|%w zsen;Oz7hpRDr6N^BTrEWMQIge3L|y}6iHyoAy`zjva){yOZgpwh02a#(O0&DrHqw8 z!^pzO3LxO3<$V{XuVaN^T=SgeP=jJwiBz%DGP03IXRp@Zl4ga8!FvH0 zG38i-%ge4Xp1gq(@>WYJMqCmtQ6_cG#m3X(3jeeiDimSS z39S~DP$1bAw;Px@cRsdnTaT-k&mlU*6EQ&^u-dl=asDAFFH&OXs`c2jaUJXkjEl}^ z;NWlqCr<5yi>o~&Nj1WQL$PPyX1HEC2QU9CaCEhXlZzAV9nL|aP%zTe!`kW??Cnm$ z!RZXHdtXLCus<13On2$aO~6jhj>i zbP!Dp+A6B)IO<@mt4B3uN`2!aI*#Wsm>GyPKW9B`fDIMO`AZiN85ImK&nrBq7aUHV zg*-!s$AnXqZy3%VKMe6ggQeDEhGFg%_F2MZX-$i06u99C{(u)kyC+?tQthh?!!Kvie1u6R?;xaSEo0oih0-(zJ;5E#iN%+Fm4`Y@HD{R#GhjC}QRPIFUn) zuZ34HiVxNsa_Be#XF+z^O!bUho zX23g}b(>26a!3w#T}#Jd-vU^M$`D?53(@&n6qlM%T%>`SZBM7vQJv*MQzD0^w3uKm zpkL4s8dU^E6aB?qX?(dr(@3S*B9)=Bsu5LH;(aZBb2%!jjBK-N82DJ<(tzrQYSsnO z1%F@46((keiNSlZi=^0m@Gn&?C3N;8uYV<-T7APkG&SBtVPQV}eXqmQ;|iP{?BH_2 z0bbso$jQ!wzPy%|=r&Z8XjIhDR6OMmdco)Skfmfr^l*cVogJ>&I>70;6ET(ip)Yr z8}fewi+>T$=Qks#Tx?xS)k3i7^bL&WMBnor=mc0y%>+v`8{ti<>rki`0TyAJ`c~7| ziP>Oce1+vAz+%25S*4h@N05t+pQPgn+_I`i&{4&dQ&raJ?w~?l54EOB%6M8*-2z4B zeNaphV4xylgrlc3Dl?+AL<6lxY@y32T2aNwu|=9VAyYL-fRW%LR=K}aE&?zac}B^E zau5#wm3k3fW0KJcNS0ns)AKbd67hOwt0iU-Duj`E?VrJtnn|$G1Tg*``x7cJfg+us z=loBw(2`r>A{Ot(C&&;-i%%5)x4ssa)M~M`m}Fr^xZxX)Wy@Az|Gw=wbNT=-I-bH+ zXKU{_(}w#N?RJi!p?cLi6kI>7O~C4Bv^p{B|#EpFVqe+w>Lw52n* zgPqeUc>8(7%G#O@IUnU(9ro_tOy_+BZtmv^q_ePhJd6E|?89QBP*GbAAJ40BcX5Q* z6=ygy%0K5|gR@Q!I7=s8tSzULU>y>Urd~`8sg=M|*(mb$HNsqb7j>eKoess^^c2O6 zh)=Q2TxR>dc*zOp&RR*^*`7UNi~OWK+&15WKY{9MbB##$3Lg8e zmQ-KI55dLW20J&cgVo7X$j?&{Rwfj%ZD-_Dr6?Prr)m{&DVE>DjTjaD8Ekl^=%tOp z0vM=x#%K_le;ZC&w=iw9D;0|iM*g%2Q%8@)w6UWJjSVk3mGb$yh z#A+VGD@TnGMFrwyW+d}>1gf9FM{y5vRX|2P5SCejGD98maumqVEI`PO5L~|C0#CO~ z3}Bpb`I-wNVndKk-&k5gpGv5cIZMl>xq_muET33mJ0)93mgo@S=5fPyX3JXGF zY9drR6~QF7wHA|o=nn`Mp;kmUm>6RzW0{!h>1X~bu+%oUZWz^4(}Y9#uKE-gT1eW@jV%~*x z*k|9xwSqeck=Dl&C$?t49~KdGBr7`*@2W5%bTbTw(w5hGcL2?M(>~ z0xUwM2ovKi0x&|!h+JY)elT(TYvTAf@VCGH4R62wHrn!>9ou(6*WLp$_>&(n>6kA% zF0sVKeOKUK+Jan}ijKBaniic&#Uf+mRj8sQ_AkWwJYFZkQc6>+8J*}FP$s~lzYQHF zv5sKTRft(*jL=y4LbVt~h2V2BVL~#3qny%J>=r0(W$@C(em50_eg!|HCsYhokNNx$ zm_+|-<#ROGiNU>kR2UiInD|`=f{fp-Gd_Z{jFOp(rc~r}DybnnYEVj*qST3O!YnhI z=;IYL!USOcgv(3iBF0?)c}CVN!2I)AM@qKorL_*Kr;2XO>@u24vXm^|Gs)C64NZK; z@aO0LPk{V)_TPaeIi*Chq!c9*X$dI`TC0K)mO$vVnu6~OQ%c9SS_vGlg<|XBvj~h$ zKvr>~q#jC3OJQg22*ra{Rv_w3vbIWm>iaQ96_TnZgh`8`BMq(Uy!Bas19W{Doz3_23C3*ZwJ z!a5*lAXAMZc`?EXzA7rCs-_m0Z{3%Ux4h_uL!Yls0r>@H7+Dt!b1M;2dJ9KG3UGk7(lrvh zE=FL#dn`_b$lzMg0^9sMn7r!>emHOu6MtSxRWb%sKNN~%5g1hdskxr)`ht4Y=iWO2)5Z;w#_QGO`!rCP?(dB)TkT$ z>``2{+eaXsg}>h=xVl>5?Aap-@i~j4%s{CtOiVczDP06m{sc<}1JdSae;rtAnm{@I z0!>x*P-Z5<@%T2Zp7#|F?Olb~2oD%ES*A)r zz4mv)MOZ6fTEWuqPx#8 zoQ#uB*AbeSf|T4WmPsXyMx(T!NU&cFRPst(yBq*jDOE$Ina;5Qxhe(X^0VL;6eMN4 zjtEagbW%KFVnEGZI^f&QsBF3m|L}O^6;g#~6Lj(M(ChV#){CT+`344ZN%n;tY^S->k&*X51}wtBd)czdVA+2WlV&X?07g-jjF2EPZQ3XFFQ5LI!T7@|t?EUn6af_R zx`2xSjhJpMU?fZe(KxCV+IWIx+{EdG$|M4ZP#HsLjUIz;{YK%VIqP8=slwJ9`S|RR z2Y$aGa^VHxr^A=N5uU+aHmqm7lt)j2#|>4mKe`XUe)B1|Enk3`Bu0&e&B)jP0r!L|ETjBA zL)x#2t-){JB{-6GA6xy(vC=6S9)wFG70#)1uISyrpR_{0?fdUa_ST#4{i#@l@_6&_ zZ%WW;-=@8!SXu}02T5v04B`v02G z`6{)G)GhXM%tgTEzob-o***3rY-lO+Dx?$(qXLnYOA%^v5!DIrRdP{@^w|2GPOXS4 zqfp24FGoV5Niv~;{+0dT2Je&8jdYeq!oz^XOatPx$`PMkjyS?dSnNxS<7)|7JcgE( z+4`AeIx)xWd)Ul?W}8>$K!oZpJaVcKR{j7!@+MqNt;K~nLPsoMWtkN+7>Fskjccjp$YC(& zU3eFs1-Ee}s{t`o?AaA8OEaB+ej~Cp52fRS3TmVzjA9CIfr;(*X6u&WrL0?JqV0)E zA9arj9Y9<4NZM9hN5`UVdW^!FW@J`3;7X<(Hy9vzGTL@Yu7n$Zhl0mR6L45x?6Ypd zx$r*DrPsnWrxxc^^oXx`g3?F4riK?tG(AEToxD?`76<(DVV70|>+~k6_%_*9u+FN2Wx5Hc(~LNm%(BrxMY8fP>(5P;7T+ecZxg&N z$mKmeL!U6?OfXja7Q?#m9^!dVE~eCBnR6;mB{t$r+Cxm<;)Quzu44L^D==yB2#jGH z7qh}F#9%#549biB?8Tt`fc}G|Nj_qFu}I}2l#1vQ6Y2Gb3?44cA``nz4(~e(L;H-R ze;I+EeTT9ATcCTNLFnFVFuL~~iME5kK$mYf@xA?g+f@^ z<=`XFa{L-xfsd_YU{eYli#KD@DNkGqjK|K^3$c>HwzsQ29yGD=go~zCs)}%8^HQvz zH5Erz|BT4+U@7o0RaGK0I~%U2_u$-~74Wj$hFc{`z%!8n8@Y`48V7X%{$~7WE_d~pR z${!@)@~j@ASI%J357V)0-Eu}ZCPrn9gc+IGyI#XjUkt*^`BNdw6+n6>f#v>V@$><% zJK19Xx1V9@tnUz&P>ek76BM%{o$}1Xc2?#s8IAbZK7j=j3wt$iRRiqsEW`=#Oe834 z{tH+>X!9OEXe-7>+7Jr=kboj!Arer&`{ujSIEny?n0_pjim=|@drOHa1$4w%i~x|x zZY;7Q|LyOu;obM%#CvbQDUIKB?$rmqCVhrsd)&}z`56q^d=BRetC3cql)#cCt46A_ zo>8lqe_w$ezO7)%5?~PyoUdzMf~7?F&tPd}G}1&+(Af)^NMNBtVPz0dk-);JQ-TUj zL#PN-oA1IXqLJFCD614RKL`~%8MU6}NXMXQd<+G{QDwygmIaTi`h(DU0!{gS+HI=J zTPPD_KYC#Vkd7)y$M4ZTgj#iv(djJ-E<(A8Zm~aA%gfnfqD$;mx0q!A1R7zf3f>O| zALUda#RdX~4qsMAYXwRgm0oHw6@~N~p(E2HsfZ4~$RwFGmH6MWe*(-uPd84p<7b4$=kPoEzBoo4+xoc*EOt!63YSdSrWoOpRf&rP&S9@q zI7Vm@CV!5|62RK83|2u(_!PHbw|5Hm2W4YlXg-d|QT6D7GzLaD@@sLBQ1YWwbt7Q* zxM#p7M2#Iz@gPf(O=#HM$b?fwF;e(^=jBv5r&QxixEk&`4ajG(z@G?*>*;cBuDj^Ra!%By35L8V&rf=ZbILU{wq>+efDnbxq0Y6uoKMHuK*jJN+laa{{M z)3R~BK!Z>Q4iUOP5LogMHUV-(%O8Tx3Q@Vd&L9=sN}eHr&OOxh0v8At?}BPV1t_A* zQ9b~YtDeJ=VA|wUlAFO#WdqCUAjxN!o*mM zP%Fa3v}BPAMto*)&*2!|$+OYz`>hyrA_8qT zd7<;cXiUDM#>hiaSQ1)?Z$la}&^im_&Lm*yE>E16|AEsf4On7%9S6@|!Jf5CaCG}x z=!&xFqaWdcaEiiBKfQ}MFK6sr@TFwl*RMjYR>M$XLQGs7><(;%%i;BqN4gOxtT4~- zNxl?+Jcha`7fuJ(!*16KxO>O2{Wkvz7Lhi;s`*9h;JuiJ{=Ws5R|_OXYIak#*iZZE z%iJ*3e?sqdCGdpq$HG2su1OU7PCH|gk2l9B1a+i zuos(7J;y~C4}AIcFf3mBCGwRq{Pq?+d(2w-2g9BxH3;{#$KnO^@!ibd5E!dNHY=5Z zjx3pwSsGo98E%DaKvl2{D!_5yRD>AsVF!Wp$@vH@_Q}EQ6Tav+>|=Cef%oq80s6FS zgT5cML&v|rEhU?4)25xYDC&JN2;a7Yl-X3I%@%Xo#q2Rr*~FZ6k^VvC4-zJhZTCS3 zbb9jxwEssN{@(#@y7a=koqJ)(Co|BAlJ~V$*05NA31{Q)(8-h_QKm*(k)CqDMw(oZ zqq>6)0VOz-e-~LsI&i{5rEP+op`c9j03~$rW%@=s_C|t+P^oB!oDM)?eoXZuqCAn# z{th3-Scio<#1~c}uA~`Z z1q51QEmHXT?0i~YHImYGC@5(_T%iF8#YV&wXpzd_lt*QiozL&*IkV}(6Vp`EdX{gG zy5lUpzKYkKkwX=ws>9XHQaC56;Zf9t0L>$;bxVhJ!9!e70o&wzgvtRAyizfMyTRv^?C*-hKH!DdyWS4Jv7(e zfw8`cP@#!QI0Q}cEf7crR6)9CigDv70+R@)(M|(cEIQJx8mb*lhA{0T`Y1Gi6})@V*we_-bD(1 zv8rAqniQFj#Z+W5P%rjw5$jk)N*4hZk-So*&F|g2Hxr8T{kzd`wCRMN?{`A~ zjy=(bs%7yeORTmGz=f^lHw0xbRJQ~3KuLQ7|?Gu1QT zDZIt#Sc)HB=bD1B`@v8%`#lJ*@^ z@yMGh<0AwGMq~c(ALECa;}95mQ34C_2+!{FfM<0$yk!AqeEAvn9<)NS?m45aKX`K* z>CBq2GQJ+OZm1Yt)gYmqH=C8xAx({Mt|VY_xDqP^W%zcVJKpX-ig4(Po*mkt+q-X} zPg??}O-Ct3wpa`$GM0)+M95zubA=ohuL;>JOvq&+l|^(TDxWYB(G2a$$fqmSP*1+s ze<(Wi9)uBJe2>nDJn`DfGnjlJ09W#WM4b_7rF3kva%77ry^xYs*@D$Kig7%n2??b& zD5P^1X((&{E3>JA+Bf)Z0G69w% z7MiT8MM}jlz@lcvtE4(9q2twQ>RB$e(k`D`f=8*VlN!B}peZahp-5{cP#EzOGKExO zGSf|{7Zu-h060wD`XN z{Bq3oa$SpOp8f2y_TFpVpZmMYy?9L;XsgN#O^aIzAzxl6eN`6J)fg4nl+e3Z5`oZ6 zHK=ZOD=;xqHPuy{QCn$Jz|z#>K?T83L7-<-k>v0iSe= z_S^<53YaeeOJ1XdYNtccC_ym2tP?Ugf#+*>;r*~Itf4pFs*^s2KIE!BR4hlaF})sn z^y(A!C$O=^i`hpkn045OZ=MiR7VOvc zBE@+E-^S)5m%uM06n4;%Z_cwSA>h{@)uWizV^K~ERupTL5qzbpZp=<@z~bsIe3BEu zQq@J|GY|WY8flbW$|yh|zXu2@9}T~Y=k+^#5pau>*8y*DzcP2h7PyESo^KD&ovZSJ zMGqbxtEX~W&Ai1n^}tUvkwGx*pc-msb(KlbGIwno-`ThM1_dlKm7tY&aC=1yK8~x$ zj3gCO=`3X`@G&F8ejYu9mh`vUX`y;XmdkXxTsU{` z9C~|uar96;W_|n~7B85Gs>%k~`HXZtpOaEp$4b6yTL}L2_V2NL`B$vGrReE%v!I#~ z9ls5)zxOM=^W|JD3`@k$bTiUh&Y-sGG*sGitT-33Jf#AQqHE|W_FzX%H(uRv1ix4q zh7bbgFg?sgYj@+}VUsX?Z48g$)Z%m)LcY` zp5AV=1@-itTUvr>q^I3tIK#X*A-uL7^?ElwFnZ_o^d(BE+TM!>0!GWiqO(&KING6e zc0lVo37wl>h2sS5&c7clN~QKl8UTwNZ}#?IhD#sc?+Ivqeb7n>p02ZKZ99#YwlipA z8K~p&t)719>E+h&?-qJJv^A)5pNE0(x0uGU(s~jNp7YAY%tkXkXhRPg2vu2+UXnnx zQ4>&tST@o)SL^#wLA938RA@Pa65DAM8v9V94id~Agxe_^krOzo>p`LQjIsnlf%YU) zYl6sY=|@g|2l8uu(3p>*oC>0$HNbMx&S%++TtXz53gvL69l6Z}n6a1X82@fVUOgd0 z!(629M~w$aZtbLz>P5P~7e`n=3tDKrsInXRcYO=NLXg%m9Z;P_XjK>LYDKyAq0!KZ z#LQacxill0K-7QG0??EZO`~9^>Bpaykc#M&$nkr@$4bOsfD;8xr zkwqgN!8}Ej8c<+4hBC)lq}F$0WkMs3yIxrk>Ie<}nnEpNZG<$RuhxDVTS_gMoz{Y- z%#*CBn#bppT1NFp=fu}_9s$QO^tGMGF}}-ozF%+f3@kJrx{hwx`cJ^nc8c|x5MkZV zp?a>c1Yqkv4=<0A5rqj2W|aD#>QQYC^8HiIJE&~ws7SQ%s%FC8(1lEO559^j#jeIKglmptX_g9aZ%@Xj@nu+D z<-^L_ZcO?n0xvE-fD!-xE(SgNFzy(1w=z{gf=>SEN7vv=bYlr9DIxO(9->-Av0NE$ zEPXN3JSO0gbk)sQ;i~H|r(1r6Yi|89uDj(L+k&G5)vj;icsV@XF3S zyb;rcS-Ecf`<`OF8dZUK%UOJxP>t6jtMFP>6<*y}jMZgsl+a--pq<>YW+~>+d>i{h zzJc3N2AuWb(n&Xr)mhlR`fGgq+4~6F5rQU-iH;{7Jee}Ul$M%|EvpwHe%}^2G}X9x zPS&10kIt?(q@*NZ)9P<BM^2^jx~95)t2M^7YJ#$xg>e~$;3 zC*bPoTkzDp1RN+kjiMGK%IkHgt}&xYyO9cT`d4qjv67~#Xj5;8`< z6N@nbgU$;rRa%RIi3X~L9>2zO0XdCr2uW?g-dsKQu?LvdvtAHg& zdmd4(r_tKl$M@PsH5x#1ogJ!Hdekl5Fgq@wu-c6^sr3jeapGWk5UI__vAw7X=?*GU z!pmYhj(WE!5>p|F7N|(bdf_k(FwHAg~zQPeCi4#GWqrI!>Us{{kg;7aAJP zsHjvcsi?S-mCgiTupe!`JeD;;I*glL-B3AwP+8otTifBZb)iK%W+?%)N@|foV&_xV z?PVq0#)|#rVJ#NsdvTQVIkM>#4ypQ4={Sip+cBik!0a!wV^_WfY1-qca-2p=ZWGir zc-uFJ5e{Q9S$V%)i_M(ZNd6Tgp4LXamlxhR- zquF^1tu&xbEdk!+83ic6-;srdMGnkNYsU0Lb%?HUBdpkn`Qf=(d#Di$iu{QmU9rp4+MHInofF*CZB-furP6!E_5yHLt}lOt4B$Dq=8Lrde_sPW;g7%OJy z_2aMwI7*`yOZBvlfJ><6b*W79xP4Y=Io{(A9~brFsnBM8P<$GHIPAvjhYiZeswU@o zgjROp-Gf@ptG|Sw?PiLp6|w2M?LuM?m8^0Jc-Y< zjQBjQ9`(%IVJhDl3AI?;d;;$#8}Uw}9-%dz*nGGN+1dce2{>Kn5Tt=`>$$}GO2fgj z;t|!-MMtIY6wI=cAc0g$)w23Kc=`Wy?X?X~4b^)CZA<) zUxgJFd@h*)rrH1i|MW>jK~&5-3i%9U>-rGeRpOy;(TGbx?>GBH~EX9wNzBi#0*t8l|rSK;QX zufpxu{TO%Na4iPkels4r?;Z?(_)+}ytxu6inC@xn!K*uRF*i+*&!{}VWI0Z+(W1%I zi+z@n}ampL+`{i__pnbB!8D^D1#LEgySQau9x`2!{*nsAx23Xx72% z@Izyxy`Y!h!j~sYQCocdFxuPD)Tl*GwF-qrRmjRILw0^ODtJv36>JaRhfI!?u=z5w zR3=#}^H^kR0_(j*H~!(8!swCE?$GNIgV&~vkq_{132tYnAq-Ml%ilqIKC(`L+T=m2 zH2`DBX?nUR;q0R^Ywv}Z`*>x6D_b`#R(f*uhBUqoBo^0VYi0$uRynXB(}*=yz1Z4( z7V~492@)6bb)6_O_8>=p62+|id5%jsSna2=wxOAxPfNWOd$u3I__34lumq2MY!b#! znt~~hKZWt5C~XN1X*(52NS}(NE88S4ki-rWh=_ubzeT|)VBvRBIFFB{f+18!5LClQ zJ&qwm$6@NfzJiCB#^aigH{3ZlBV+#_8hHa!Kb%QFS_+4P_J^s>O77tdaShsehCf9#w<6&^JxI+b%)T1 zf1A{R>7jYpT}pMs-}SDuRAC-ow+oH7R4Y*#K;XSuM2p8k4iMl#Yfww^}4N!GkMg?d9T zq6_TUnbwL*8mcM+phDMy27x?~j=#}H!8r|{0sJbJw~n3vp)WvMMl zpx0bwIE^}WFO_C5Of2-RrVji*T#J|YX|Ouo3i1@id@dXFt=O4iLm3TdCC~r${yMB| zy@XYS%&+1c*v9)>O4a@QWHr=28fnKlY%1{K(?fPd@)>@d--|EHyO7QLH#e>nN4ZZi zk6D?n204Z(-ou-OP#mwdS$kRm3xx{~Qxbe}s0lf&#!Ko?V@9?YWdeW-w*nSJ8@*9J zU!R}OUyu-S^(t$!1Uk;c+RgXfeS%=Q01wYqPNTj&r3yQ88WB}y0Bs%YR2WMOsQfg& z(9o{zqmrB+Q;PL0!$&m7LA!}rU;q}KG&6*btvb3iIOSiy|CzGbs8N& zDlV7z66~%sR5IPDqm#O;q!}xcDp0`luHDlHd}{^29c=lMdZ2&R6u7t>~kVEFI;g!`t9 z$2|`Z`L0PzlBf`g$RSX<>&`(+C%%A1`e4QRln#8EBq@V?1V+*qGwhyQ@!;(@;=bE& z!H~Od#{+lWhWqch1rOeH2Zld*KPEo)9De@x3_34OSe&85AGYOSRapQFvn`mNREO*) zGa|Ff@%io)%!|xMGL?3T>%0OMRf7$UmCdm0oHXve(9&VAFnCa^bt%&oT4^)Pb}#Fn zA58|@2?re>)_;j1CjGIV;4!#lEgmJbi-gPS;`{C=BxsXqzm0^E(b31cE~CF>mc7`5 zfk2efdGBoh2hP0zKCoB_5&toIKYc79vU(wnk=uI=0TQ#5H{kR1!0qf*wmD=tERS<^ zoPoXL6zSTADyt2xbfMg=>~{MFm@H?|YCKM((5B2rk15b0si_x7DWzwnyYNv#0PoRo zy^*ZN%v=}V-cyOK+?H?dLP3Mf)>ffeXG2Au2RTIsRMfh$IV6z~7>6Mb4#J30_ha8)AwS3ZZ~S1jA(3?32p&?_9Cl^##ns{RO!euo}x0N z;gU64EI~@zHp+WHTFfjggm9~sa-Yva!^)?#_bHv1R$DJ*4TirLES5HUt4!7a!9svI zs9GFS&^#w$_t1;+o`K1Cj-K@;H2N-JeL^V?wGxapK9Zyf#OpkR3>uy!8iL*QOtO38?*H^c53Xe?M6EDy}rna4aF`* zYffTgrWO(TX4KGlwVF<%nP5>{d(fZ{V$oqUmSxzn7psudej0nJ*7xVOqKvA! zg3o44awV2mII)5X`>kZN5-DOU>*vA*6Yu>bTD+&Rzxg=kQr_+9Cs;~PU_rx4BvT12 zORqsX6`gd{ugz@4Zh|z-2E3JGK^UL;CIad!T3|8iX)P!4Wx5tAd@rk;FX6KsKMHBk zBPboS=!9qqBD^f`mzc^|tK<-}?mwc`Y@8bdV3~2tm4=3NpT` z16t;7ZA~|}s0K!xh1YgsJ2$Sb@nLaFJu+C9B~M>f22ta=1Re9A+jbGF2`5?qXMJuE zTMBJp(cts8BZ+jfSuY_-N5RRwHPXiHC}_o&avRe4uGdzzBbACKitl4Xv55}A38>mH z(pfkSo$feVTl!ho&!VKB29@O^ndgqqs6kd)3t9~hWagFOPyyANx(mB2Ix+R5E%@#H zy_oXmEDWDC9=F{kaRcvH(!GNp7)bX%pnyXL^~i8yNzzIoPUe-qR%s$v6wO@{a(@U0 z-Te>--8&TbJurgjcnJ60eh(hF{ca57xh9OBjGw>w4rVL}!|WAFShzWl`E0}f*hYjN zsNy~GU2aLkPZmUAdSo?L9kn2m-cwae542P{#s)jgR4!V=q(x&#ld^`59d5G)cD+Fv z#Gs?<7Zu&gdSmolq^&qj6?cqqIg1uL-V#pVFUt(uyOjvXHVFjGdh6tK7n>nr^X-ab zDWUSIT4>)T2&GwU_7A35NJUeCMvWP8u%Jr#5LsT=Men-J&wcD21WOlhjtYj*k6*Ji!7ofMEL6fx;tvsii1vT4z5fN(OXKS+Xo9Je|k!r>V zM;&-0wh2q=8Na_J7khH*QBB!cUfT=_ol@QCM`^Va_04Sv*_MLQqsHUGhX!N#i2E>f z_#g}&@hBb|I(%Rhm^6106yHTRB|sFYumH(-fsS<6OQ*dQFljE60DC}$zoE!d=pKE5 z;2AuG@^~0Mn=!cefsuIfg_kj8aV)O>a1$nevX|a_59(AVLdA;edKb!Q7~_gOI9TjK zww^|%z>Lu3awO%}p}NIJqeYnfpMZrf;s0k~k>!m48Y~K2PVt;F)1Qih?}6+?NNP25 ztS8ZQdO)3cs0cicQ^=!tx}&xqiw@avSWk&f<3Xnj8T2?0)0l0dG}vC*3Dy&ORZPAB zl~5aGjr|%LJ(r(el6YM16DYKt!0c2F-lJl8Evy*x356oxCFBtnN2x9(5b0b>gHN;l z$_St=8k)lb43_ovg?@Y!(}Wg&uh#cawH`+^RndVWFE;a><-B$Yz2TB37gUxWWb&RO z)ZO@EUjgFP$5BP&nPR$xWL~3$M!EVFA&_gL+G*zbPEe^_f`;eR@cFl}lFp7+A(w_Y zopAgjDxIJy#PZBCM3)-TLSw0>!B42N<9&Me?^6A|xVr{#6ACkvtOQ`k09aVBVhrc; zev%1)F6_h8yXx_3q6X7bR9KbOfFlk*ZyNHQWhTswuf=<@D*Sv`HRe_v$HzwrwF;IG zK5v2MXUR>NnQp|}@jCqbo*FF8wqhwgDXvBG@^zxtmpkm%ru~sim9aa7@DZ) ziyKU6Xf;8lwbEJhBbO)M#)9(P%$<0Bc{C=!{uzc%q@(%B!-@kb^;`N@#STb)mr0WX z6G_To9@cwtHl_1^(&LjATOspY1{~4R7%_Z2oz=-0KjA6v{}`3ZaEzv1nMgY_aqLul z_Qh)KimgPg@jz9-G+%EL^eehb$=x{mFMmNdt?S#b^gvG&|^z-M{$!D#f=&ks&>Sd+VIA0nelV!%js8Yn0S$GeWvldE$7xD~10U=aC@Evvb<1h_bPAe6Yp$kqYpTDIYc54U9 z4FMe1_>fIcUWOqT)^*Y`xB#m;01cftX==*y0xL>;5XonB&~O1^WwI`ZA10~fto&-K z$T$hIC{3u`cP~ADX&TF-A&~x)X4hHd5pXe-CWmPJQ)#&4SqF+)o>T%2*40k;8P>Do zEEjy%o;J8$XV5{=c=--|Oil+O!((ZaQ0=6#@3;usaykQNQPki^g^wBYC??o=vPXj?vYwN_(IwL`H7AB9Za7u@ifOENJ z;%x_?TN{$AtyGLggcBfp=pe3RT|QjrP=*>?`OLLCpE6-rWA8y80kbu!9z}EtN*a36 zq-sY?l?}#P6EqcCR5!R$NY%Bcx);yR+=bVd#bDYSv*{>~Q9`ds=$0oYO;M8kJrE;o zlF~^pGwmgui;Nl-hf-|7m3Uzigi_**Ju&7POdRnv#*TUhk5Bk1o}T(5xBm*$p7}YR znEE`%Jo8JuK5qkdmfDfPaUsi&1>hXv@Q(zGlNTRYGo%L{U8fbW)K%3XDJlZHHg818n$_6K6tZCpj-=(lYHw2@ zWMGAp!eMdI1E&!%sM=7GuS0ZHGUDUov3=iK>^&HQgrq1O2#-a6gA=iJ?f8Zs*tfN( zu%H=ua!V!NIH<#{WDS<2mLt5Rj$T0_sx?+L8~RXQ??q*kADed{QWVONhh!quRRqGn z;AVp5_QCf+mLk33dI|9|&}J&IkWPE?Rz#I3OOuYBpcE{bEOpc6aqrh&bGd^*JIM0NF+90Kouoy9ScaACW!qxT6`E@qRc>E zmTkk5!v-8|If-v0N)S)5s6D4?#M+>>48%qH-vNshECGvnuL6|;u-KRvtDo5G;|We<`~NXy;~}~3Nf_xUC7p)z@a(`vE$_L zeTXylVfoP}B+$K<+3$JA6R7fDLbkD28IhII8bFSWF5`Y?H;p0HnZ+ex#btz2FJj71 zBA3R!fpD#&YRjU9&yrw?=3Zr$K3SpB&a!Uf^DE-}S$3!vX;y+;I=q=D2bH^zU#gv# z5LVNRrA1v>m>a~dhCZlS|E%0kMPN19dQidVlCGgKB~&(7^_B7LL<+D=z zF5(DZ((YOU-^Dz!I#&=lrBp?=tgp_Vi|B8=gl-?b(hho|UB}?1=Ngcpr2O5(`s{I^ zrvpfk@VL|(4_X3eVdQq4kmWe8I1|zrlUikgfq85{$zuqx!&C>^)>G&t zEZTUGqyIEY)J8NK=|qYr%;Oqey;O`|8mR1dB#XhoZp)bG-%n8UxE=8;UeC zo4*ZD{CP88UU&dgUi+N&`B4Qf5(`X;Ud$waODDa6L|P~WE>BH;S^$ga z7P#=$;a1E`sio>`#jL%_cu!WmthFQ2*p1}}b8slT1_r$o=2kwtih9H!N=L|nC~S&| z#G0_Z2-&*}F^TcYgkZCw6CTpvOa*SXi^DDpd>vCJ6lbOvAaZ{s;tm|Z!M%Htc<>-n zlT*;5F;EC}C_{}MVh5z@oAq8sgk5P0ld$QCN4UThRf3M!CXre?)Fg)qY@yc=GKIk6>JSD?pdhgFzP$^RjZ z^SX2cjX@{!E3J@qp||e}!|>4~G34O~aNF%S;ij9f#Z}i`9v&#;)+O$j#0$HYkhp8m zcdN@#+K0|SB55Dch!$@JHd4O^;A1|Jc37uPQs+8U&4@;1k1;p zFm-+`;+xK*oRv#bIz6xT87=t5j$ACP>B97=282jNW;5{dfjUH0`%z0TvXutgAl{j* z3`b8{Z9Yb@oPeHQqJfG}>+V!K^Zs72Sotm`+1t*+K?un5(QYPLN?MYOfU(j$r?>z) zrmO%;hf0YTRp-6{Z|?=l?`~9eUI3Ln>bbv~hNsKdhb~HJqumDwy(5GF95gf(Ucyvn zX-kkzuSDGS^uQMAfho`iYbVP??+K`Bcv?(UPC@D1<-YWSjj|||OwzQt38PLl(6g2y zsdk^JIwz_nWVoH4IiH;vSr3hrfnb*5v@YhKf(P|1H_{fbl2}&Opc0_7miaE>Gm~M_ z&CItLM^QT}8=tY4UUcvzOr)xlWn7vNtlURd_cZevHqyGjy}AgqBlTFBYsS(n9Tr7Z zVMBC1(knXYk@H&m)6iJXE6X_?;rG|#>oK?7hn?!vXrN(s1kSy@!l_n1 zjMd@Kd&>}6->DdF74MV615pJAgcduM^L&|Z!CJy)W2qP0va~S!`2M(0p{WxQvetWJ z56E}r8p$ml9HAlB^WC(&_|904EWv)*J6R^gvEZ}P2fAVHVp-vP;^Rd%-|wa)^;mbP z2-#G2yd+xq{+DK}uvgshWU4#Wl%&`cSC$KjIbwUWEl6AurBhu{Qcr% z&*10ds9wfCgJ&Om4$nRD0-m1o0*`$bqb5zm(C7Xg!(W|=SNG)LzAyLU;nk^lI-&+6 zHy^>^rO|kDj{&1MHsaO=Irv3t7yg*tgBO;kAe2s9E5TWpn~xpKzs6S|yo}HlGm)P_ z2YufX?3nWk7QXp3Lf0%uX>^d)h^WK@{UW3emE<3A8sl(pZHGQ1RCj;{}!uuF9YVXYVNRSJP< zy`X?arSU3o`A37r#)2ft&Ufl0SX^zF!E!kTx-PMB(QBo0(Rygi{g*%o3Ct2$cL|)+ z{H+&FVpv#S3^Zhx-~|Mn9XQr`njU@tZo7AQtzTent31H^o)6aUPDi) zw7Aa^MqTvU`rzh08|lfl5Q0rkZfALs{vxBjgKDf7g;Xuol>N>0%(Vmu8A(G+IMUlz z*?B#JMLIF*S$S0;*Xp&{5?2PD`oA&Cm)u=X@^ThE}8M$X0OWOmcr z=kdl7BCfRIczbWVbga1?Jp*LDoy6@Kh1^P-;bD524bqgt;r zjJTU%_uFVV+ITO4KBWoNLeJFDMwQpi^5Q#7V>1Aj^@nP3pj?Apx%J31^@6WLfyyR2 zY%0l5K?~9}C(%rYB1_wkCLWhUFs{zF^BJ;i@OwVJkv%1iXytP)F!G%dA{6l0k*7s^ zBb64f?Phs(Q;qb=v*3Ny6G(aI2Eg)ubRK4>*WxIZql@sg>Dyr-CDWyiM8#BE3hFcTaTO)6B5(wu{%?R=*DhrYd($1Uxq7SdE)h17)KTI%rnm`>#hhW z1RBy5CQV#2q*zpnY!`S;rD_q_D0A0jRO#3W$|x~WInR%pjORv7##1AyUE)XxAFSEeEfWWIi8Pc!hK5<@X(q>jN6fo!3*>8%mD}PSd@=3 zJJp!Fy&g|3h(=VI12v6SY+JShZ~y8U%>L7FQJXEZ=ry ztI<@~q=3a@b3kvhV1L+7%=+YA%>VoydpfEx7`hp~L&N0{-^Z?SpZ9A!S1 z^sQc5Y2${y5L)A==w_Ap50+ZddhyRpZ^-Z{p6P@NDjq?Zq`N?EG2cg5w>(b7JTp) z)_*exr4$0CrsFE@7KPFgiQ^0Z`9=v-b70VNNV#@FE@QOrS^GOJvoE46w+T*Bh)S;$Hk1Aac z4zn`8M0N6VL_I#*oQZh{DltD5Fj<$aI?^32ZbnCPYJmf*DJXK{-6EKONmsHkp&s>KLfM<12g3Dh+hP*SQwQF|h8q zR+JPCVOFID`wDe8(U2b~XI-H2Os0HTQRc(qLZ>o+W?!}uCg#sWpfhWrz(axI9HQxD#n$<;t3Znk zZ5u3vOecZdPN2!)3M1dEIUve~_tn))@bHs$(oHxwP$}&zx1o;v#j1SRk#E9b{aI{k z>P1M)F|_bH8HC)bf&fArPhnPUEp|5aV7r#}ueb{>1ij2_Im+|wP&vUWiSuoEm})zA8~X9q{%pJvmWem^9;GsBMkC*;fnH5Z zs~;NahhVCqW02JBLWHW5ioXR$i)_WLR0pQ6F2noT zr!a1F6P^gw;+dUIcyVJc_7s{4#xi{R_B;6FOTR=$!hYIlK2V%i3}ZJPu}v%1;FX^~ zfzRIh4Kgw^U~@VMfB;G=tFYv&nfT&Qzd^*Nc{mqT69V)q(1%NB+HoW$9ACWuZ&>lw zACYjlRIwYf=DpN^>AV-PNFR%piu{LDEHpNBbl@~uvG&_9@ygGi#Im`6#;JamU;)Z; zx?2L53q6S2y&k{)=`_sv^T((sDFrMRixKe$w_(j!f54`1--K6FIPd@kD#!Q`&-5W{ z|4uBP{w@}N_91fe%b{|1D>J|o>a6%^djg_O#}T6H!ka8aTdTXVyR3_qsvR3+%Mp@P zgl{(O!H5ad@aV8{7+;!t^_|c8m6D%^@R+_=CQJTU;iO5V_DOl1RCb7e0DPE*Ni6>5&l~aVyjUdHokUfG z7PTq^^6R|Vo^8Ufc9&xzffLivkA&uv*xPg(GYOiAN*BuMVVmp{a^CO{2aA)2Z6NXe z@?8p8-0f5?0v9H$r(Xd}kmXWIG!!0svv&VQ<5GZdKC$sA$YzxEyu$I{19Y2PXLu$Uf#tMmN*88p=yO2=d5 z`o(7mD18vy3p=suupM9Js<5=egl+Y0psnRQ8E9U#Fhc>BjXGmDlAC-8x1Gk4ViUHg z+Hk;e7MX?~RP!F(e5W=-R7C)_aNlA>8yW?ER7~&f&O;;}%MGmipT|}xL*U=om4gL2 zb}Xyt!-OxR@Y3oOJo(ye+&6eA>-u12c=0`V%dp{rD8~W}8O$TwWU!9RV-bZSv+e~h z(tIW@8Zu*F(wz?uV!8)+47rc#Ufg}ZL`df6U4xbL-}%6Jyg6qJVjGWRPcyKx{50lf z1hKl}1m2HQGZSm3I~|CIs+iT02(PoubNY$L`29{Q1>a@dce~o4T5YydTH= zS#ZQS(oAP0q~P7(`~-je^>c`gjip_%!tU`RBPSPgrvDL(KYtrl8R4|2d=UZ`LPg+W z)Kucz&tApc4}XK*2htRKLH|%uEE0rL=COFXSdK)g|4?Aj%B04gi)eE@uxH~k{P8!> z;+s$3LVrIs`FFB|=~NJ*Yv$q2e}4gs=gn1SiRx((S{+>oPtL*G<$uPy6(7Q7sbPlC z;5?5y&HqlG2_l7xX8QEkFl*Mkkd*|D_Dg8eoI)!L@LLC}v7)LQ2PpUFZi_>DxdnCR zew0)4FFkC)uU97Fxq0EZYxqwv?vY6tbL(J?xn(eJ8T0^dmQ^8dy;F&9Difn5%CU_2 z5~xVwks*aLv`~g4N|Ts$-plB*D`6m{(A|FXEx7OQL4?YKc$kW1)FYEI^~skoY-u8{ z`*1VB2=P1K(t4-&S&~geNg=AqjD_)t&2erun zl}>|ZTM*5%1hDlO)HF;s^S~%0E1#dNF8TL@MZ8m&r1pzUe8(MBEmSG44l0%o9z$dA z<)_2bO9Rji56|bJp>)!F573b5+%}}mgsB_>UmyG|ppt^j zgO3K@@0SkZOYpjBfIZy^wjZZaVcGJDV!EV+3DWnTh2hvqxXzqHW_b}dY+Q%%Jv(u5 z-!2?ZIEaL#NUYnu9JLKD_~_{dsk+QGP8NE#76MrMWt?8BG0!=8Xt=F1P=wFb!yDG? z%s3DpMIaU+V&7gIN=!g{d@6EMa#2;-gf^CQqw^$MY&;K*tmMZjpWgFyq-enT+|=G~ z7}}1}(-uQ_o(BCCjq_QhBitjM{DhF62GDNvLQ|`Ou2KzioeAFlOQ_MgQJzu=Jrz>F zqa7V|BDx3yJ@Z;+>{pue$XY5csv`~W&)x~ExdUy?hb(>21^UTBjvb#wu zSle&`&wQ1HKdsKd&t9L8q4$l(;M?z0>hpjNxN86?OcJ$RzDs|rG>^+@FzK*=?6FBo z2fj?0yfQ)Z-a7_Hh2DGTVBE)azeGpp`3B#7I|ki!8-|T~62JcF8-!4Se37ojulJSU zPZ@grCZ-gRuaCpeLd)=RRwsTIZ^pQ7mH5|#%~;&fi48}qu;su3%>3ZD`1HLOQC%EO zi|E6tvjLjx)3m4;>0CwPmv)5liY)X+L4&1E!5;lKekuTQq&I>;*SZp0E*z{^Uy)G1{ z#bW;SH}K&f{uMf13(lQC$y1(TKF*=T(ujE;vr#C1!SCs*E<;tLl^&-oiF+P}<$c($yNLH<8nHCB z49g-iQPL7bR<#2M>7o2_OEx}>smC8SW#IlXzrdJ>CSo)d%Y-}b$6Z5);*R?Vnz;lb zB7MbU5w#*Pk?k@nOvbri36(7qsYJy{vzT}@(q#6~{X;O~k)arV|457+LbWpbSv>#T zn;5$`4Y$tNi5KQZBfs?$RCRhZ)@ae9J&ySDcKqAcGJKiaj_kU2q?WprS?M2d%|?oZ z&|qb6P`5y5HUHzmLMKL&81(-DmQDf7DFk}Yp}kMu{V^(lW9VTS?WJL9^PfW}jkzW0 zMS5{Ql9H0JcI{fM-?S0ic2QxjT8qO+^WmYY^3%KTY&(rE7T_QaosVD%veE|#R+qaQ zZ3LHq#p9Jeo=Y%LAv6X0py}yHYtWCB{4C7+;xl~m=XdetXVbCln=dhY&UAb{^G_(N zG%3wqE-DH;J>Pa3H8Iix6_btLm;EFa3(KpWP-I?uD6fqME7q)DkFc=)2;H_7AsaVf z!?HElxO5W^h9$w{{+i)#^f{Ie-SHK3e3O^b+(~18B2&dGE|WkCXl%o*sI~ zF&f^JIN5z39ejR1zT032pAGXMkuGF}UW4m6OuW90$MjJmb=dsq>X21JduS|}CqI=a z6@!Kfu$dLkMum8i&%EDpL5Y;%?>kSWdID{HzebmjMx-6b2#Yp?$|(2DYiN8lE(8nh ziqffXImK=K+fG&8Db1qXUrUF;(k1;@XLv1Mmr(5Vb>jq|b&K0c__Ra(Os|9a5U3od zJt0)wqWU~-u(VToyZvZ2$=dwAih6G5zFHalKxhkK4ARHN-&6(*nvGWe=7-8E%kcK0 zqTYujO+Wq=RgK>zG~*|GN-=d?CSE*HhTn!);oGtvY-qZKX>$_r+M*;p{kty+mQi?k z@FPmF$shmtIwhpbO*aliHI|kO`7X|*v{FbML1_Y$@J}+3N9w;oMI6oRueusHUVRO2 zzUD^Udfm;qCt)P%E*?K<$Y?zB^h;O}SAln!pCPko6GC(GlU*73wxtXIy1N38 zugJwit8y@DcRl_sPJ@p!w3r)y2o)L)=70Vc{`}SpNQz!dyJ)0E>{GzvZ4YAY=8gE| z_rJpY_uru6u7|-Igw@?kr`v^%ix*Ps48VP?u!l zm{S97Sr)b~Ux69#eWJweYG~B+M%w5V`e@ubq0$(U78ik#Ro~#i_O(!zXQRuhMK_Nv zPTYk}^FBn_rj=0DH=vB3e=Dh6qo&uQvP09{j+Xj%RF$*RHg+p3>Fv)o;>+#nSQlS| z`bHo2hsNQFF{3eQGz-S)5tuMx0-hN89HxwULFuF$2s$}R>5voeL;(%G5&?(I%zv1F z%cm?&DkDX%3_q0Nh~plcj7d*EjfoTZee76_oA5Lqf9`EeSaJ||e6R+OFO0x$H9gD* z4_ceN^sqe0Gqx)+oL-G+!n8OmUO42zXBjSp*Y%;sd=8DWNEX$Nm1<67Zd01WbW~vm zGd*Mry;uUqWbcK^!Q|{y(iOl6SpEW&Dz(?Ehh+*H0)6B!Y(!kaNj- z+q#b-bk`1q?cIrzqD+*RW*{v!l7@RRii?YB3|V$qW@tZHKxuHPE_}Rpd$6C01z1A< zv`JpBBmzbtBMOH51=`P2m6)({%{Kh*<+t$4t8ZiCq$lyw^y&C&{ya1rJiLDbmK93E z(8%yf$)BBu+Shq$Aiy4&2tB3J@Fr&)1=Sh#9E)^6Q}Bl}n$vocYToPy0O)*vA| z8BSLx%Q>AU-lLWI8AvkFfy#|4#nsl!{7J}+F4l>2aMEBq+6e|xEld{vt@I}`4@Pqk zWu?`~$x6eaq!{cB-GW1@iO4T3MPsvBS*25J?&djJmw23)?=0Xs4Ugp*x&s#xpabV4 zu)H+HGKtj5_v++xS4MF4(8H9uB7}yEM%v@+hhHW-^11rj`gy*7IJ=I+A^Uc*JanB_ z*1nhb7zpy*Ojr8S{{K(^U3vLSy5hh{`IGV@W%7!n^ViOglv{aEQjVoO8(FpuEaS3P zh)zaF%FuhNHnpi8twxCq9#m4Z+K;AYKguj;k*hh5*fKZb$~{OgH6kXx4q5eX*guC@TvNOxE z>YK&bzH%;#kL*L6s|Kh0^w2fsVc+(Z*tudpvSPyc?BzX3Ibzx6I}*hrNt%IwpiyB1 zU~y2NTRlM*=sq0l=I>@Viqp~%vu!oPH!M+7{LXcV+r1kZiAR*?pmrJ?0g}KaK*JR1 z?1NR)h!rmc*} zUi}$@#f^qq2TE&fII8twTV)WhN3~!|vsT@6R@;NK+=F1KWUEp3sfZi z1uSRbCs+(L&LP{v@&1ROVRu*r)~wrz&09m1q@|Z;_tALD4B>#lM21hE<1;wLyk1a1 zBiqFY+9gg>_bGb60j%D#1Issrpd={)s@!bkCM06pn)OIcNQ2YasTgq^E0&elA4sfl ze+?Fvdr7W`FY&{pOefPv-AB5Sj&%boWUgtCJf@SUdwXMv>@?(7AQReO}(&E#(OEz&92jY zVA7r{`_R*LUP3pGL6FkkYGfhOx6xp+@Mr_5D{p|dNe{QZ9X4AR%4!G`Z96nAF0?e+ zQ9uctt?EK&1Z`1k1>=m`Eu*^wHrMN%b=F(I+rw z)D%T|NYj_VL;(xoA)iX$3ZXKV->-m103;zEB!s?vO6;JKqaVXWdNYqdHW3rX5jK~> z^7!&t-22I9OjxiF+f}`2taYNP&V||*ABycg*xS^H>1hs3Ayi(7GUB6X4YuVtQK^v; zVT6aJLmBO)Hn&4<;isjKp2#siw`0&b_~~M$a}7Y{9}gBWMgo_C^w(f%Xwf4)A_6N` zF2R<~tFUd$N~~M`EtV}^fWpE;IK5pg7cv@4j2M(oWtvaw;_%Sud+5~Y9e(VJh@ooPfXL135xad0cCTBDwTqV_Jv9>!7oWYmN2ypg z-tR!73SwR*jFGEN1`G5l$sIV)>kwY71CCDa&txSCBt(wfw}ACXS_Z+g8>+@~ItDE$ zDn5!GyFzj3a2C2d&Y_dXn|Xd6VJ6q~5)|G}!lnBHnz>DqfzLvkE4-{DL7xos=RVR8 z!uM$+_@xO$-jkQdd!(6(%Ecw%?j*1X6-O7#z;|Fd$7jpu!t~$6;{PW7*Rt~0=^qW2 z7H%t7`>;D-k2N&LYm#fRGQJAy_orj|&Lo5+79)x_V`G&Y&n?)6w>HIL>YJZaeLRMd z!$#xo+wW199G7LuMYRZ2Zn)+~g5!2V=T7DGv9S}WSf*kE>-%^*l#dJAE48l(~F(8z^A)Z zm=mT#Xr2vwi``h1pu>_R12(4H5na-O%rZOb>j{c{_g#cFB4lG<@{H99~vX&p8&3UbGT6R!VoHO*~TG z0HvJ6)Crrp2L>Yxk$57yAlw!&ELuL`W(!(dov5SiRTgh*v_jqD#1R4|uE>fbr4G~@ zPtkKZj*NyjU%)cz(a8!}q&Z6on?GXAcVH2i$hHB9 zj8niOO<@Xr2&n(?+oq$rqPYsI+GH*;-4KXT9X||GBdDh^)jqj zz5r`hF2HKa?2s*M(cIijr-2TEN5Xc8*E(VI^QXXe=*-#Yrzt)D{H> z|7IDc(YFU^up9v-rsrVE+D+KD0-Jo)-eLS+mAF-(ES;Jfa{pgRXEDny#N?z-)6CEaqvEsA21CNOCZ8^^jnYWQe8 zc;AD{ad+N&7p@snxJ*27_R!e;dl z6n?arc<+{W1uSYkpN)|=lXgJ{SO`?qHrfh1kC#3Zr7ZLfL^yW0Q$cr8@peMbztuMX z095`N!D5tI*)$j~CRrC-l6a=l3?UISjZVUY$>zJn8YP0Y)(OAp)oegFho8)wM$uVyiVPQRu@ojK1(`xqo%nXk;Zdaa72S|V#*L* z;XtAJ7z$cDP*CTmac+mU%7ch)v3PvMcuXKz9vLwdkB%9E;UmXWZA=_!&Y~Bh^s_uV zN>M5DU4ae%mNDr9l>x9wsQiKEGJ%kMA3B_>X8aQvH-_6sjl$@$Q}Ni-Z{o3~(YWX1 z4H)}%7`8R`K&|pA&0(TgGBsW-O4HyKO5oqeS@3CLKSHXGAz5`2^@cMnD80~X{V*Dt ze+4X^XptoV?EPpZR9abJTHSqU_56PU7Ww?X^w)-eU=pP?FF9xot*!tvaN|Tq|6U(Q}=Kd?N*rX4FP_R%z zNgvD6qH?7E3(p$9;ny#IU=DV)#A7FzlX3@bKM3 zaQC45aQ%He-{hw-_O%bOB)tLOWE=3})(pIr+K8XW7UFkD%8=4v#m>x1yfQBo8xOUh zz<3GSwZ~9gL;FPsQ>%9=sgBNdMT-@+IzLpFZfJ}$Z>w8bf|`pAAJ}@Sg;-%I%;547`Mx0CmHc|WmK4eMxY|!W%87yEAv~FrZI^ncK<`TpI(o^ zW!S@yVAvx=39BiX`0QKX^|6ec6N>d!l&BJ3rbLgjT01h-9xTl;;KM^!JhQb*Nq^Xw zi$xLD$d=|i9V-$Gke=SyKRZ}Vb}u4hqOoWZ4d=>5*syMylGd$Xg_^oXs?_d*d<12V z%*D%Kp$cJPmA(M4V*Jkkha?M7NpMp?4Pq~iW_fiJHim3hy!`FEwqwiojaa^BA?7cd zgNgB#y%a2#&+ql79ow?+$% zqeB5pQcD~5mz$ABLn$L3WgVVl0uri~S{Scme|0|4t>`6L^ z6EJDQ6HJpZVa#KS8W}NkBtb%Fkt#(%GVGz@%HPrqHkMAM{66%-p?LU#hn3G!+;`;g zu^9j0IE;I6EXF-F2IGg0!HCgg@!(_QaU0J)?00{}t~w8PsgL8OumXITqsMO#SL3CO z3S?8U9%*r5_IBE@Oat-_7m?R^3Z?ZyRM$Jv&}5|Z;if|Ip~2{7Y9n0Q(AXM)nw~|g z^#qj*-@mB?I&&vvjUW}Dhsu5$TH0Zq`z)U&%YnNGK^kj`OXs1QHL|?4P!9j|Di*i2 z<+1RxBKP-PL|?~o_$>}NT4+?78(?j!gQ2zpR<(}s@WE;8gxy2Wk!q#Y(hogdGzSf3 zz~)i*QB_x=y0i!tr3I)c$wNg!1{x|0_z*2DKy5hG*nv$cEl8;CM7|mLG*yq^g%)93 zZ2)04PHfL=#F2V8(n~Bs>^~t@+o82 zWulZoMqnc&!vrSsU4|Y@xEI-1CRIt~W0}Wt8$FtP20w^FcioK#?!6BqMm>qiFT9J% zD-$qi`bIpy@Bp?o^`fQGgPKa_so9GhR)%FccFf84V67JTw&o<3WjV30)QfV0Q*G*l znnuQ;Z-<^0Ny`e=O0c%FqP05soAVentbqUDG=)j$`S&EgXQj!iLyR_$r9qKq8i`8V zYP4g^&QNUGwiQQ@9z|hc9+Hw1s9;v$NMk4(z8+!pAv!98x|{Ik&#jUZh^^wp_2~$0jONy zxd<{EZppKkhSlB9=i}=_VtO{#Z{Lml%v6@KEF{H7Vb$^#NK8zD%h#dgTLuIu!><*f z$UGmOS5n(W{w^ckBvFOQh_^28*G;f=3s_ho+iBSOjM}=6AvZT08`girXEFyX*L;Z$ zn-^l|t_{kNaxE2KxxE_;4%K2+juy#uJd&~-P~YsPa;HHo^dh9djmR2VQ^t%Udf^fP zGK=aYmU8Amog10DZqySr^gZAvY?Kjr9vXG`N!DAbvwYWti|aC229orR%KQJ%p!mN{ z{}CkrIsK!-($wsMsyTr0qkMMdUR0Vdpt$7(w9WMB8|i@7$VB5lM3ngO^4vZ6d}9h; zcxw)x7|VJ(elmXg+|TgrQ_o@AlTR~EQ$~MHp7gY%VW>tnF&wh*~cWb%Tt&-c^ZaG)A-Nc!tM+mwq)AyCpwTJ zB^`X<8qA5SMy^_oJhcW3_9tUoMm=&VKMPE!P@xW@Sx1o6tDsY<&{9_eRb?5})fLc` z7sFCsgiehL&DusjCkLNj7c8_3CIZFkJU1}u)Z~Z9W`(u28jjXdxHRRkG?v5Nsz$f7 z8~v;||FmF{_(Trrl;!X3tVl+UMVS%0Y4HMl{n7ha_}O%P@!mUFKJQyr-a}}tH`0q` zVWUh_+oUj^f?14aO(QZ`srPQ*hOHacV&mGCShs2kHm_NXZ5x&&Gq;cw?nZh`FTM`V z!@hhf5-+g2{uthkZbTI2@1}eW=I>8O0X_b5Dw?t?H`J!+6}SjkrvChWJhe6%_kFqr6Tck*i&{l#OR!Wnx^TG3fzM+b@XkRMejQeW zpKLC`@7APY(ZOnDQUcdYd?;Cm!PNCn4;EQ#d*!8!6}!B5Xfqj$a(htiJ1 z-+6MtnmmxuvWcrwesyc^0IF|`E7 z!BQ8FQu*3=fBQ9OF*m6N)x7W4V^lB42WHb-nID(`655!j9{%?KI#^UKUZwyJWb1IK z(vM>8X=K-SL8GGAUKd1Fr3dvb{fMpVz^n7aF=KraroA!)kBxd9Qzkr#DU+ruibY`Z z%+zP`^pvOZ*x1MDh>lVERGypmlgs-EU>;WhBcK_8&lF{u!m*t%by1ogUnbO|!e+x!f@5xI47Q}z z(pf%*Ji`g9RvYu}Kue1jbrt2vJd})-gAquJi9-CY9f(@D5(yz2P*z>c=V9V=YlqIl z=VanDbew_F+>7QWGYYbf;%IUN@>2FGDK#P#Iq?ZlSE}JN{(yZfP0bc~#VE0`Ujd6` z#K}S>aIt&)(ZNdP_jjPpQ~1DF&Bn4X|A?5d;O!kH0QW!$zt~XLjjh#wd=i#{cuGVWUYMZ@qFCL7CdX-P4Nt`* zW1hfWgYU)tg9l;oZMWmD8wi)H1|k$I5srU!jRJ~+u=&F=lt7VHGj=FRBZY==(b@W- zxA((LrKiNNx(t+o^j{}Pem_{GGx~o{!Co5GARUV?DgkNpr<8UEkE4y-y);l3Pdhej z3&r})TM@c*55mJEm5GNdSFA;B;t?A0KG=C4hZr)d3NMp%w2K;%VYD6^Hzg@hkn%N< zq`AyTpmp_MKweQ5l2X%QbGd17Ss7dwLdT7)ymU%`AMd-D06B+XkM!Z3ALv^Np5wMl z%6&^Hnl2h%85JhOjh(?>gdL1W$nJ3L*|SGU5)vaMWIJN$6xm#Dyyt%9{@h}Gc}};| zIeuBOv`c^CCFWPwjh6ul0v5SH8q%JDB%qNzxxAf9oU`!#A*ib@fL33F%9>oP+pq#D zN3xVAvntma%u7-s#R1q@7cI)j{g=|Jlw7f`6dYEZ-2LpM&mn@-~S6l{<|~)kpC%t zA6Tw{q`c1j-Tnd&*=DfI>WF_EELzql6`i)w)JCM$wxiN=5jo<>@j=xQD%F)CQ|)8IfWpiVwox}7mrTDkcXbYYctp3i->Z3n`*`8 z@>AH?0_@7~M`U)FGU2Hz<1iJMPhfR?JoBysj6ww=8X4W(s>-MR{CyT3(4#x9iShNCh! z23d*W*u7y14uz~iRYC-ee9q#0Nq@N2D{I}$D!-@T>%IgftdRni;|O*hNBDsl)Ydc% zAVQ$>j|Pi}kg!@@$Uc&W8Gm{mZ~Sr^a$~jwCq2Mj^mksx8?U^K{rjSz zHTWpmy5VqBzS3h1T{|Ch{`@=aTss?fZ6Pzwnswd>O%=Ugf@S(gf5MjCkvLN4MP@@c zjyConD$h%$0%ZZ6m3byCJyM56O%S_sTd*;%6q_Rp5tq}9)!U;ne#-N>|DlI5=*~NE z@9nqaUaF33ulmtRG&vRl?xqO9LU$>vkWU(OAxE>KzN}ZHJ%G#aZsWK zbcj+3TtHA18{hHY0*mxLS(%hkbIh~A)UGs<3~c-FVe;4MFA(|f()WQye#^+K$LdYt zD6Y~gg<-p+g0ca5e4yVF$2Xy`(L<|LxBObS%$s|c1VQ8dR9Qx?SU2$qjl zL}S_?W?5gYUESaH;g^~J{!Lz@*=bOOnx zr%_sCKz6YTQTZAa=(?43xYmXGW;4oi@)5CO5f;4hTg0#V7H5o&z-bnWb9^S1NAbzq zzr^yd-$wY(Z;)SE#d6)HfTgsCPU^n>*tP5{EdKCC7)xSsrbmMl?K-qnn#0XZA;U;rVHpKYu=nQ@ESWZJ-7eK!19HJ^a@$SY1d=poOr76|;XlpW- z#Z_T%fep)|3-RZb+c9j)b9i{<>uSJ1ImD6VfvTraP9TC;?|pQ!2|c*k4Hy7fiX}10VBQ+!;Nn*#Y3NL z!m3h_(hR0ox3OaMAX^_$0u9bg(cO$H}AJC32DQHPA2QW`YoLDv0{ky1ST>TfZr7D1hnL6xO^`Ms3K}&FC)(5bI9ysk3QdC~V7OK(UJPDWd zuXItJ5kNkwmH(4bVWLC@%oa}{%LWZS9SAG`R$$G2|9hDHbs7N3|CGKDECT(~8Y99Y zkD$8Au57!~v@7X*`&hIxz@-;kGgLUF?m<#(H@=A~R-#E4H~CONMOUHiM_7d)FV5MC z_twSXi8p6r2n>V4-CVw`-WoZ;79PtpkcUU_>&m^`Yil9t{9JONX3xNS@>m^9WU;!#_wa* zcq_$=XSUQ~=+a!wAvfmNpT}!^^ATFmjDu-MvE++SvGAimLYtqV1mwkWzF?fiiA$%j zZQl;edFvP0F!x<#6tHNt-B7b~8JfFLt_QXswc@44d$H_L4YuTIaiG@A zLUs&C)W->y0=zVPDeic59EOh_hoSdAfLpJ=4tHI98*cm2O-i_YY2LbyNmi1)0v4I0 zB5FnEwTOC=W-$SaC>DW>L_?NiufFys+<5byxZ~E_Fy#LGF?_@%jDGSJjGVs@xBh7* zM$F!U4b^REtaB=pBnv8xh$+`%Ub+?UMb+WA+mGUxn^W-Ct_&NNqiV+}2*?QNlF3 z&%(eeu%_6FrP)U8AYkHE-6%5==2SKZTTfwimIa5JX*@M;O2@s8&aBaON@)t~;IR@8 z=lj6Y-bdxdXD{;|WU#^jfG;!Inf^Yo zsB{5t@5Sb{Mg=U%Ofz>JL3WiD73y|^#fLJ&dQX{G0m}z;KqtTTIqrRQBnI6h!;0@y zh8N$j3_ZRVci%oRhed`N%XS%lEKOjdVgxFpQieY~T-jHWtZhGP$Ri3^h7d*%-Al;a z^B^9)OVYy_KJ`}^@#btiz3VXUTo{2Hzm3MjAvqYcBt=Ot>}bGGwl(6WPoweg2~PYW z!Gx!mMPYYQ3u39Bm(2bYTfhAhzJ~Gvu$-e!BpyyP#iu1={(Jw9B_IDDDVf<&+uhK6 zgE(4Vg_U3b8B1rpiq^bn;5)CQy-iDpx|fNTg%wz`rtjOgiu-2~=cc z*xh&Di3cATLdC+u_spA^yfPk-%-)FysaRH1vD8)B22zV3WrV?w)^k`@-iaNQ?^~-} z*j4AlK`NGN??n{1w4;e$tHsp&9az-X4z$`kp?35@BOaZNp0~`<|GUA$g7Y_$i>fl% zdzQwS$55rnHXmUjGuR!0egykurucDmAG-h-l}&(#w2QE?IXZBhuio3kYj*QH4Z5|H zd7@%)5-?)${EA``RUk>uNy9J3P@1vYq#5TTp~4irh)xzKulF=c%haf-(9n@Nsf5dK z@8|E*#73~l&}eBdW>Ms)C>0qgc1G!AQJTVd4M(sKT_*(!z35;Dtsa@Pa$LEtl`g-X z^1rQzzteNKdHa~pQ%br5KrzyyxLk^Xmg^CKOm5zzi@+KH3&BGp?~^%NmTr_3)x)4M zK+~+H6Xr!D0ajUQKxSqG?2c0)BjG#&n3!)XkJI~Dq4_C`qgiPQ8u@oi`z7dum(b3A z$w8Q?Tx|SZmMu2WNb}Y3e$TZGUyTC=}rO1RwnN2UV>aV~>w#jUJ z>3@;Vdr>Q*Xk?DdtvB9=5x3utN9j~Pc*|WF!fiutyd4kTbO*oF9^5(z_Y59|=U<(T zSz(2k9@C81!<+E@nrythy#&A8T7+8{rsG%HeYkB|A?{jLis2hdF=fpW?4&&i%_zmE zbHBjXU(Q5bSvC#1K!q=#si)h8*yvqY_W8${_u;#UPsyTF(GF{%2Wk1`SoGy*Si4{* zsxo6}+gX69R{HyUXxT47Z_;Aj;!m++{+|(-TCCV}nHpm8@V&6UNZ5Qk-ViOGYX`oGufon!AHr*Tv9rL3H&;aBwIy3HY}yNWWb{~!re`twp`jQv z>@k91#CLO7q;p=@T#?RtQ7l*Hs)%wKE)yY@kS?Q?urBhq^tmXV{Ev>o@R5Yp!<5cL zhbg1NCQN$+lUF5R*xX%snxDHhC!nf#qo%@)x>i53bbib|V#dd@D$Gf0z}HkNOVXRL zKC=mB&ajeA;bJFT1S}ruELJ*<|2A0MzH`dxCS^?(31`AQdkF%!yASR3 zuBG2cI+_PYuZdzISXj2MC>FVI88Idu(xSdht_}r;E?Q`B*T6g)f9H90_S2)20Mm5N?>t$6Du*fQpX5P1` z5597xGhatr!s0NnF5K@FOMN3aAj#}QEP2XJ~8-ITLI?t`@kaoD~eiVl9fpt zG%hshJW9XX71;dk^dCX;pVRk&MYahrsv2!dS(YSl5s=8=-v<`8j(=;~u`5S|L@kY~ z<1A(!$W_2nYVPKzX85QyKMs&eEK%x zcCJE?y-5L!7(>?fPTP8jWO~AOH{t6EaAA#|N!xOT!=!9t)I^uDq zA4U35q)$cWt_Vy79s&^=4JN-S+X)kajLg)R&nq+VAAe$+5`0|S{W5K;psQ< z1Qm;bW$N-6Y*+OueJoXFMrG!GLX8oh#J6B+Q2>W+7jZ~`9HAvv%-NlelxjDsSV2sN zW2moodbndDPOWr-&(Ua{=M0;?niE>u4XSO%ct z6N5|jDXQ2*CFkegrzm23_}%L{iw+uC=?74nt5^wS_P&5cl1#*u4t(+A1Ks?aQzeIHIq_PTn2JTCikFXQQd=)UY_48cZm;3k1v2qR?csJjB zdyvn}*#ke7ejo48!}npOhe}2=pM0NG7i|P>7u82l`o99bgsDK~ZwH|iFbhO<)^_Mv z##)Si)TdtWwE zDhw#n1d&aLu7un7mHY8)*2n1^67k$?pX1SoM&Z7@?^hJcP1oH_uw45cSgyJ18U-3x zLb`}zkxu-9VaQ{Z{uK#cdHs)Xz>j`>75?RN5Xv9%^SbM=#!Yt+IQQR)+aI|Xg9xS9 zXRpA%9254Gv}0e>Ied|3#Jrjy)|pSDu&fphtwyC!s7lj|YRz#RF0i1s!2y>uh`jVP zEc@nDtX?t`#W@FHQ|G|dl8Nfn%?SDW4_Ny3OyuPj(*dJBprc|mokWoJrlzzRAuCs5 z^TL@ZP1}u=fm$5%R-ra03Zbj!V#C)nka=JS^fuOOmN!`y^{>~wm$3OZKi|_21s0oB z5LONuSIbWsoKz7 z=|F)LBI_yatqS1Xbw{xz&VUcr=OZNBghesg82^(dml7Wd! zW0dH|5-UuJZd_wWH9e@X+&auiP$Q9EXOi&@%IRTe+RkGB{v5=WT2W08%k4a`sGJ`f zEM6K?88R$jakU>)yrP_vT9nnP(JMxc#_MoyDQcUH=!sa(6CbzVB} zo3w5k@}Tl;|91M1AoZn`@mi<%=zy5MJrms)Lv#))I5s!?5G%abH!_PsQf30Qu7ErB8tj{ju?&PP1$YyHt=ocCKL`@E!bRJ(eE; zEHdoUMI&HfWzo?SGtf9#S-Ao%$dY7&o5YLK(d#v_qRKu^EKCLmff6{67P@R|e;-=C zZD?}%Xh6H6rQy)f^JpZ&o2mabEL3%^UQ{)E(QNLgYUx9z)`l8`6E)g)6iMiV7AK7x zw>8<3U#3C$p-LPsF(@x=!|oJ}9{&u1FcD8YCZ5L=7(0F%Mvr|8;|Up2Cjt$LbSz=< zMWqNh1TF#`0f;2|eH6Eel95m_qF!We7fB;zaKJDEY1BkadHQE~ad|wR{Bl2jx-1FX zRA*4p=s;P$4Ml`YcBugoNrl)Rm5y{baL5MiO{~VQ{pqN!H^E}-Lao-TOo~*Sdsv~E z_zbk%u3-Vv(sQ*EqLRK3ERwENWU18u5i-&-EklQCJf%rTI=ZEB(Sz~wJ^2V0r@sxI z{q!I$8h&?Cau*{y{s0ZXo2BF&aGpkvg+Dz#9aSxAdf;ba;QKVX`>154Y33X{=@mOW zj=>h}MWCP8>7$aMHxyJxanT6!dyrncs95RHm#Dm*G^jplg5%$Qes=a>;BU;c7-4?z zI(8B5avmC3@$t4PLPOjqusKCTd{*iAk?Toik$vR6axFQJ9H-<# zI^ucVUaBMI+ya+&fe5eBdrmn{Mzyt30m-mr$&YLg^89iQ`CC4_dHo)qL-~#OC)bgE z)qV(k4vj4!dk@|F6`CG0n=aypx+z#n$>N-#5C4(urFTpAE zbOJpRVW15i{j95j4#MXIy87jv%33YF29NdfS_Zoh)had1j33gmE2g0D_%WDmCR9|H z^V14X&`)D8eIR|T^D=y#28?CJrj(NlXeX5YRG@z5rMK%6x?~u(liOSa>e6CA1wZe{ z+kK37qXX^TRAy9L0e3IV!Ba5tIFn4arPpnwJutfal{pjw8$H3Iw{$^o?u6ddp#)~s z=?NTN5IQa4Vw8a`$5GqZjutiRS=R zAu6*G4W?r#tPP^1ww-EmVBxX`4V6}nfp*Wy`{O;DPoS~28#N7WsBVx!3vI01r=T_R z*;r(`?KXn>q_V*;xXg z+V~EvS5koGhh@Yr5y<)8gLK5gBcf1STT7s@q+DX%m-IjU`@6wn=QalcVWg3eU4A#wyEAuFa?zX9(rqs4mMPS5o<)sm$(Nn^{^HU6|eCn+M7+EQ-?k;82 zmKb$2kC)@*82MYa+dSRM-}1YIWy`_er$e z^|K=TVRE#iQEfw$#-SK{*%Y9+} z3Rr?no(^eR^6=VyG&1z?Z9W?IGXy?CMPr{`L7|mSGPF2PP(58#n!-JN=U$dW8O$S43D9YB(tCD!rO8d2 zRyt|yya+H)(lqF@@*e+Aur%{~1(khXkp*h)InX5FK!F$YOO1#KUO+;L6GggHh^g+w zZ|Cg87t53I>sMxD%m^6?c9RlpQab4e!sp+mBpDfYCCH>Gll$(uA0t`kW#XiSagjcj zfzJC|F?jG`+;-b-xaF2xaMxXT;ekQ-;K94^#3T3Ig-7ojtbk?muiimeu?-u`yYP9M z3onIM;ooxnh6wn2YRc7$2tzZOjTgA1uj5M;7GHs&Ca^z2p~vX+)X>&LFY~SBb9+G zR3s9_RiaD?T$K2DOm;ddKL}W4R;~gT77QyhWT8~I(rb}001nD{uS2|+OK_Mehb^Qh zZ(2=Bt9Gz}uvD77R4s&xg$2sQ!lZZk_#jABod+!%!bC$#>pG#tFPWal z)RE)y^kYw9;+RPTibTTX6CRSTEK4jZM%G)ARU-u^(xHDP!m)JhDqh-Z#QE|4SMW<&Oqd~VjV6fVhRNc@Bo!P=lrQ!RmLU~OsfyPu@r|d7E zRrL*2t16UMRim=59yN_k%HJxUTW0I44Mu2;CNwm+AiuZ-nYnq$$}d1sc?BY3Vvw4V ziL&Zy8}M##=k)bm)q#j2b;KIITrZ`g>0L#fCvDCGX7Jg!{H zqvTi4V|F-|?}a>9dUlSIPuVvnF$sq=k0LTQ4r_Q0IiKt&pEW$TRc}!8E&I#4uH3Vn zv$&#C`MX)GgNn!0shUw(T*qgrLM)$ibnGFNR@R}iwt@MtMPrMG_pIhQYWNJS$SJHq zZc&xuFgOWfFW+%ZWjSIGM&M{h8q6jgOlBRdHUrw)eeigk3Rp68vw5vn_z9;jDo&+| z(|?SL3ea_4f`O{U+D(H;s2Qc%l*Y@_18C`NHWPdX?q}#Z1wDT^OSz&^^GIwn=Xsdv zz?f-2%wh*<;7l}je+w)+;{aH+1dF6{*Kvg9YY@EyoW_SgDAC-j#wFZ>x zdr)aUhA`>8pR*m)*CpbGSHH&nBZuLhd+t#>=LH^;1TK>9x#KTMzCSQ{h!UVu6pPHf zm%x+)BmvMPLmp8S%)Nsj#E=JuD)9v$l;z7G_(|7fKtMvM%{s;Dhun2hR(8swvYBu=R~WvolYkm?3Q*k zx6(Gs#A!=AZG{Im+ElHrm$u;~S{-!AnamQy(cBBGkq(`m;4tx7YUw1J2yoLW7>tAm z?X!SIM*mrv9JJ+bIw_v6ffZ4$baH+$uy`oL1uRBiKWs9}hZ2k81Dz~5-E9MMSUeY( zbdVA{X5NUw+owQ9@1$C>varxln!WVKeC;%j^f+Z0vWrxuoYT`2Guc>}%p&w7cTKIG70W}z;XqZ58@qNS5hOps*dZe@iiKn} zrS14(#Zne9xIxdZ+@>OSmwpoBeW`rI)X*k zRL}@e)NV8qn*Up1k!BRxu6%Ekcg#d5!PC|QgWXD~lw;3LREYA z?nQZeCXU9$A}T5x6%8%Q;z4d28JSRNv;>i#SFSA0TiIAg#i>PAGYzk*ffd3`=r<__ zTMVm!Kn$hUWLALDs@E&9$SW#Vw#z;O4Kc1_Y^xg@6ay=N*Kxn{ni>TLVw`0^IaYqx zTc~XLw`?onv9ga`ON_i6yEAMrj$~!?cN%EICBLK;d4!K#M~wN-urLJz0=@xwRVg6a zv~9Zrh@*M=IFz38UH%0ma*bMoqKL4O{Kq9FD-e_Ort?~oUpaR!f0O;?Sh*j`V^KMe z;eLfYR`PcRfU>`A7wE||6TnDbQ`7QLR8ohy#B>}aSSo57sWb?&{6glpndh$My%zIX z7?FH9i+L_k6pKJbq8hXZd?+o-M_f!4swzt0XNA@2ThP+lh?6J#=|r><#zjavoUSbD z*4}ek8OkimO8TNCbibC$#Yz=w=X*B>Sg(C7Hy!6;psLaL@%NsKXr#j-V3FtqHmX&p z_YxESZm<-RU@PN_k*exMj`b40iLA$xG(Bb&sqtYZpP{ZBg*4V%a!q)C<|h1kRVBndz%zm1SpWk;~i^Bf~bh+{gi zvaGapj2O*h$Bx1SPd;~+0cog?<_h3m*8@qh09I#NV_b9Vyw0cO8uAlO9B>Y3Ug6;N^HL$94yW*P_0N4 zN+&wI0_X_ZNl8}fx*F8e8!9i%M`?a8YAf@V?QQKIo}&v|!lQ|D&ccG?^K`@K^Fh<9 zMnO&?QWK9LF(wrW(T9-9N?XkeZ!o%GqH%52$f}b)gbbC6G%4xN;HdsIGV1-vZy@ot zJ*Xgf%2bq!y5mY{{hd1#FzxYYF`k~rusiR-!?)gwVS@(Y_8V?e=CDY_Vwt}pal!`O zbFTsqfr$c^@e`H5mFUKI4N~@({bW9iGWX^7+Z73X=k536{`-dF(Ge5ysWFI%+Kr6NWaS*uG5eJ7;SmI3*j6N^98^;1?#;?ML$BRP zTR{~`Tn#xaf0f`=|n{Z)lP09TAKCf?mCG+ z8KhwA0PPo53k_B968Z>{UK#4mx^3}M*~k!Su@BrXV;5wdCI^kGgFumBnMxv9tbQsS z8a1K^OBXmMXuxM#7G}7;?mt~2A$TIa}*1;ldtZ-vT%Q4J|Z^d@?d8}#* z;G?u+);X7wLJHJ);q$e4du1dZe`z)z9{;2=qVp$D|3nGr^3>#MO4t@zhIk-NRsv1R zgh*-rl0Ft`4if-L2fnD6$rHKHIEfDoBC5c{gkAiVH(pzBc|cmmuKPq zRVjF5O$O$~YOuMq7oUVxU|qHyhb-r@JhcTMZOg?c+w!n3xfyBo0hDP2v~Nbj#6q<} zhq+pXqO2kmX5`^$;vp2KrNBlf%|u0NHG5%jpG1?j2laGDH6GS+K5Q4ALc6gQsv0^w zl@%zjqXR>yPGdEpz0HB1ZZ9N^kJxe>p>CCQxfRMLEl@vXQ%UrW^I@ZiIwHW9o#b@dOLS$b0U_12^4>Aq2vWKe|Qs^ zIvlI~EubkY&r=Mp0v{S&G5qP7NyyGQtQdCLmYJ2J07Q(moJ#;9*E^D)s2FO2fj~qc zA;(Ax+q(^E=?ThpOUiN-V=dQ~bIb3tznoVA0S$UC^DFy{p_lUtoCIuFu3cGOh{B?y z%0BWb`=uU^Q|?c|A>XrdQWeJfkurJRmd6erN%|7%UfE1AOyaGtc zPd1?}_b1m$AXrip_{`!H5q%&M@zF6zicdgXT$}=xq@*P5k2rwzqd5qVilcgxJ`*}| zMjt-|@H(srxb3hRwaCj#M|?~qD$9$g2AWY+oJ*KwDS#5^uB@~QRh11e=p6|9`_N6# zmQ@f1tYf)FS|uWPUpMF-pGA#2fP5PCtOf_lja>>@T8%waf;5t?boewtQ9aA>-wBq= z;6##A?ip7zY%F^m}63yJ|LuE|^Vj|dSfSQne0@NW~&D!bn2tScOx`p9YVHm!>;{%v1ZFge6xHB;#vN@9@9W;1r?*% za#1W6!bOr*n#gDeen7BXQUc$}P-AT)3-WfduxN6IxuB*Vx#b4l!SAT)` z-uojCMkS(=Qn6XnLDkZR22C6GPz`)`umMX`RM=5yK~$X|+w%?hCb|R(R5oeaF3eiD z2ltPegi&K9#?QUD|)T z420Uh_C_U~%Rrp5t8neL*D7GScksg)&Feh#!Y}c!OJgzi(`|TeQJex6Q7n}zrvjE* z=Dm`TsWSwzIJFhKYY0|?rJ1guM(3l^_M*WM_+L>hUcNgwE2oUmlc>P5risbfjz*1v z9!?GPHX5AL9Bkaa9`Px0I2aep0u~3g#zDhHBf|<{@|{5o!PF8wgECV)@(IT}od*Ra zb%+S3VT_KzhK(#2TUTJ)j+I!y{#!)s-h}--H(=w2C5VpNgHRM{dkL(*46NdD(SS0c~M>7f0^f)DdF$Z_^x$qi1 zzvM$wROC)2Z}KVMWgp3J$d;9eIItZ%x35)_Y~RQ8%Q@r2c4P16jX1b#2g0{+LFmS{ zh}g3o2lwwrOw@kv6Z2j4=BSuN9HL@rY_TZ)mPS@wy}O6+%FVLnr{TBbC>2jeMg}2L zfYPEoY~QjT>sK$shBa#uwre+4W(u;8mY}88iq7s!SVaZCuECAXN9z$uRnX`;r=-Xl zH@1`*v8B?ArCE(gxA)_asT(^hO$ciVVgUj3MZO+(mPZ@QrqxGVLa>-wj-^ZsR3u#) zZmg5?Z|MWz!R^`!T7OHQI$wUV+lG*KwMTU0vJ�uxax5+_XNuSnC^mH1)u`@sH_ zG3l|1nEK=tJTYY&#!i@wkz*gn*vF<|Jk`*cNz*W7;`5mFhZ)#b=EQ#eX}q#C3yTZw z%xeYa9;(KsigvuSy#)ISS_!5*bAL6~r8J>P*MagTBVuCW@W(e^SAzHM-LVDrbj+=q zS{#nqjyHZi4PSlqHd4bQp*97erZd-Sr$guIL=hdc-5b8*@4rOi-oWF6j*)eGLn(l1{{ z(a{4u54EnOQx4P?Mqv5Zuj8xF-c-D)26`_#_Zj&3K(dn$2F8uj+D2p+P@d2J7>ideL=L^N-K=bP_c-8YtH> zRMB0kvUd}TL1bo^DotSrBlly~>Tj`Y&juWb+J?1j7hqS&N`!}Q#J3ARM_g!uA$v1;Xf#emNH>QfrpP=xMS$88G~V=ntHSu|(Bu+w;NShpBSgipxk71*j6 z;T_6x0w^)uUwt`U0ae(ZO<1>PpBTK2N!} ze3yL%TypIV>lZ8Fkl!W#od9Ju^QIX79cz`m3m623SI!~($#=Q7oJ;-|Xe?j$m2$2< zyEhVsE0z1%vUxeyt|5F0vyJPQDCZU!$v$$7_*t2Op_J;6SLLfYp zaNV;5TQ{xaxp!mTx^>vHWeaxiJ%E__!^kVDMO~ALhS>uhE3aO{t-Cu|R@$jztSBxn zCIkO3NR^YAW`!V^|xfnZo3Khu&CAg%7YmuffiD*2~ zBsS%{j(P!${4H=1B_psA5DAdvx2cn##IsL7gDKOVRlqVr)?u0OB*sm83Zox?3WLT_ z5xxF7)@JLmy|D|g@5#feN=^_>+Td^tMgZc6G_#&zd`&)bQSwa;SW@+#>J%fMydJV1{HXaX+dknYUal0}a z=SgusSD}WKO`~@bgwBG|3S5U&9h*BAtwJzh^MX{9EH6blK6Z;PC zLsWbea*J~5U<@AKH&&hxQ>^8;|v?m&5bI8N@|~GUA?(n1~QaKf-SQ zMnp&eJTIQbCOTqi0@}WLJ*>TbQDHc+X9q5vJ^`aXf#+HYKVG9QK1N+>DYpzt%rq&-rqq9cMJ7fHSfuJi~^beEI zGW^)xaW85{fFey~G7?O6;FtS^!RN;)`^D$@^z+Z~*=L{O^Upt50|R7kT$xIBQM2O@ zn6&jGdM!PIA)7B_cYG115G>R8Uc!awG%VTciAfvJW67~_Oxt)4S2S6OrHVX$_yl@( zYKMN^I^&ARNjlQoctCroQc#xQ(v>3^^i^XF>D-jc`y|ZvbY#%)dIyGM%FsTT(7Pi- zPHm&_*_@cEbADBsm01~Kfv7_0z!WO zL9v>RKdetz%$YM2u>ux4y;PkQJJzhkfFA8IerR{(r6&9XED!Q|U^e#cUW9I4+hD|q z5%BYiM=Tw5Ttb?PW)4yIiUo4_4MFJ`!@{&H;TmRKOhBK_7cp?lS@c=F1s~OKi7#u` z!3Q6fR$zIn)LSU^qV$uzq)eK)UVH6L)rl`nVNxhmb6B}bO07u0i)22Qz8GmT6O&`4 z8BE5ozxn$6_~fH6QL%C@G-}=sZRQ?C)lnPJbj}fM)jv|B!hQu7UcV@oDTg8m76&4d zZz7J0Me`I`{+)R&e-td%bWtg?pUk2bxJYMyF@MvJ2u&>2OCqC0Eu!M1;1l47fS_@J(79tP%osNY;|32z=k~4fJ_~xtj>U|#`BgajfG>+$OgMod&$E0zi(6LPm zOd30qjsFD8s(G}xvk#*G@r zYwL|p?OLhx$~oJ%01QF%zHEx=lg7J_<9X)JoQ8I-nqkC{0qQ#BZ<1>qGhzrjv~I!g zr=nl4?&#J1TlF`|F@1V=!<^}p(T&$5zc+c@X!Pj%wffzu6UM5)Zx-)`{C#qra@-H! zcjtL}sO@sxsG$S#^P~y*j@LP3^l*$H+>ZfTXUv!|5+ero=Dy!y#?%Su)w?J9_wP^T zHUkqT&A{YoKVjX*T{v>$3dXI!fN6}PH=c_^e8ycEWnx@L9-K}mYy?}V-&GhAVvrCW z1$|L^Z1$$~Yl1lFv_m~ki!0R#kVEVPWc^;RI4K#9%-j>p}>-iT|sXeMk*7<@!$ zW51^sr-NZI>`*e*os5i^o1~ z3D)=-u=a`u0mf_CayA@4?eoVbPd#>CO@dc^4g#YL43dtc-*;Wmw`(U{^*qfxd>hyA z6)Lbi#7%^RU&7!{O)$7~6CBuom}=7w8&#*r)d0*G*&nlpeuvQ0+v$I^T$zyx77_uO zX%;M=Gyqcue2qOvJXAl6Gyk3fi!_C$I0=%1dq_#Y_UC~`#!E{|jP#6L)uuaXbbtIf zbtJCIIAdwfdSVZ*XJh$-=@`_%7gnv_$U;)Wh~qYLoJBaWYY!`0Cw$+nJ)%RsxIasw zq|6t4oQst!rs1njEvR&6Q;L}g6$hof74gZLSa;TfHD}D&=aY)X`$I5&^Cg_qmtaR& zI=)|c0An|v#mp@yQMG9&RH$4B70On?7ax9x_g{G*pT1L8Wh#E_&3DxZF9C&R>Ss|Ik@@OcEB_r;kUn_741rW06)U-h8w*%uxN+mzhp<`u zP&I{xY8(iTaVofkYts?V3NrO@gqq6|Nw7#$n1ID-%6&52xZuAI78@fJ84+Slr}X7_ zuGIB1kEIxPK2v*UI^So)V5U5eiAJK%gxtK_C@g#kyY&{57@6+zOU9rjd$IULFyuO7N~?20b!x}as#X85klx9HHO zEuC{~eADS`G^yVZU$twmta;-m=+wRgopndG@7EnWp>v0hYM-v1yQpK@v}mcew{6*q z?^~(wTQzHrHqBeAV`U%N*0f<`wY|$%ozSdNW3+D80$;Ul&*NItk+ zL;!uG&L!W=bu@3>RQ>MP9llc6Ab*!!lU%#}4PUk6aSa-&zhC|~IY)=quKOb<*VBxD zi|qSt+YV?{qXs&+=5Z~Xqh+Id_?93Nn6_!r80`qC_U+oBNs}gM+JyI{bw@OA)CymB z>W;bdR$#5C1*6t`V(gkT@G%s^RPYGN&O#V%4&>zI5GGm_7Zl^{}iE2GSpA zNWF)(VP+g*T@K87h>I+zA%slGHDI2<8N-eQ;ShsmPx`Yc+Q!SFIB+!*+MGLTq?n#+ z+2*)GyAG>ZD$6gSVy2m%lxs7~bF%#!bkc#JdJPGtJVeRh774t}d5E{L9_cOcH09%% z{u)Ma3&XTyI()y;3o|Zh5vVCdFaymc(W$6Ca}7Ey*@-Xd=szi67Vm!`lObJmRowP# zsJyM-%SbSpaW8!<(p)A(k|hbH%-VmY)ZbC+wde8r>#wVclJ7D&eeadm@jiprcb|U+ zW#9V}<0mY|<&Z4+Gr&AaC3VC<50@jZ!$0vBF2|+AFS!8c4L5KkHU}5^H~8oakf3)U z;DRT{bnk@j&1&HI&gBF|Hhm&19P)AJmK8_#El0N&H8H+#4_v%>8CJU!&dgkdM8sh6 z?5UVM=sS2F*~kE$$B0jr?8uLAB1IR8x#NGpkK_8_vR@2jnFN`EFP-;x`gO^gk(wv{ zEi$*|PXddi4X|ZCL|#56R#Yf9to#|{hxdWs#WT2>$FSx8Oq zy#x7&JXT=IB^4t>!mw=7EcEW)0XsJ@hr>+OLa02vod@5mhcR(NZ}cD71N-*vgTWx< zxw8ot8$zN@I1p5X<;RjRe|Hd89Erd-PXn%)@8WdwZTxgR66+WtE!=+@7mLtks0otOj<|*!{~9bg1WOj;P5*tc z$jog=j-&yR&#v?iY0}=BcO6*;C2AgvHaQ78V=_|HoyaY?fvjx8$i|AERHz)pZr@~# zS$7-ww-dc-x4qahPHIJ?OL^Y;_TZhrz#+jZQ^vrLAxO&j$5pwY@^A!{vmE1sQCoG5@?Q3p?Jb)&M+?G9-J8bE(6%uF z(zFRWG;fCX&6}V-6;;PJay`w^qG>}ygfMH~9E}<_QDA9MuNfiJ24ly~#MM+_#d(8@ znEhm)1eJekKFd~GCJG7)P+VAqlA>!=DrOjyZE!fRA%}saq`t8-5Z)4-h8bro?(4xZQJ&{Zdn(_dYTxdR`~ zJ)8<~;+TID&PCaAGO-B9H2Lth-ocT8WF+VuNQ#KXmU+|BuYDuT8q*t5fv1t5mxSB5 zQV}0}3A3mCfPr0_W9PC3&}peAZE3LaxmoP#IDKFjex5K0YkwSt?4)4V%98|3L6!v< zPVL8>v3;;%;UvWB(^TefnR&0k!l2TacFnb%cn&}Rp9YINrHh(qW4o_Xj9W9Z5EL1J z^_!&gb0Ll%UW!d>qkI`Vk;$@gJ zc?K3OT!!u2cVpAWZJ6`pbo@AX1`ZrJ%xKw;WMc^u>Coa5WwN9b(W&?0n^*vkz$ExZ z*$}DCf)Ar8KTS3Q6Z2W9a)2{f3x``-Xd z6xOnU$plFSmV{I_`(BL-OZoj#VSf}XsW~Moxum3&7qH0p4u0=s1e2L3>!(xIII~&t zGYFLu6cq9Mv_jZ<9a$_7@j6z9Pzxq3*or|@m*d+()6l46Uo>mk6|I|mg%)+`_!>1+ zPQ8Bp`l!c9yH33(yytXu4cek%gQkq2oAX)JSFiH9L4ziYuv<{sG*X}IGfJ$>3f-i! z4CnmE`uaboUm&6~AW=WW%pojQ-4Pky68{U*P>)|1X!n(QyHa$fmP zy*6%+I<*_n3AdzEZl=DMp{43N8#Yzj+{el9%B$=z-?^_d83Hu)@niySN4#oYI!TGd+WeXZ(s(WD`-Q_3TiRHFtB_`VkJbsf}iP#1OT z)>3Mv0k?~4Y}JbDi~BchKzMig9;4=L!1U#NvHMIAVp+!GEqSU5#4H&U7+j=gQkVfr zX}MH7c_@-Zm??CAnoN|WKR{|Kl`?^1dtz1ri=AMxvs}{*0v4*3IMxTF^Ewg)EQSnd zS^oTDOz_s|aXLH-t514j?dc#a+T*g}n@(e;R~$mA0>U+USP_|y2Gcj7^P;_|&~+?6 z`Mj)ZZ4f}b^!Jy3$rI)_$#yKjku1ipKA6wdgh-j&B4CkpE|UHDMd@Ru{hh}=Pbj_g zm%ron7hlF(rC!HdZ@q;V-YbL3T?U}%>SL%peFy5T_CTMDDd>4lizZvIVvb)n+OP0L z-6dX_5Kw}RW?;aUVC=dgaLGZOZy478JQt(;_rSbqqp)ZDN*vk09_toP!Po)cVEg(_ z2nvjZ-N9#@e{t;NYx$1!Kx80^}*0_RWfh4+=?*t2I1mMxn_AH5L4VIF+W z#mFomSftfLDV94(;WnAalFH}(r-4P*lE|jgl7*2RIeCnLN!sLagoU1k$Hm?1)yMlV zeEd(7jGn=E$;70PK@lfuD*ODM%9=y1i;2d7V+$JsL%aq8qb-kc+9JbjYh zs2o~MY$l_6I$#1MGTw=+nj8cgiV>tqLtu;pF-f_&6rhJ^L>fYqiV$fi!s@N3P_K4N zv~JoK4G4(()miasH=%=SqJUAWCgJh~9`4S1>01%VsLaRQUzCf?X%UqoImKLHp;M|? zkIsS6BBW~7q}8EAYuyQ7FFl3EGxz^)Q<%)WUndKJ{RS-2hRlC!9?KsEi>#$$WkIxM z(uq*5sFW^r9O*1z0v4My7Y=E2&!VGY;Y!aegp-aZ)xl$ICD7>d5Sf^R;j`ADM(bYq zvffvy+omU4wdsLcl^dc}z2<0HzY&@@ayd5vOFcTs+O_H2>b3sGi3%jdQHt|akPs(J zC+>FiVzS-+Ssb(M)4aJ09xa-;`Ni3{Y|&Q1M}Q))vaf;#e@A{p9rpw}@*Co~>(~DW zu;d(aK5^jU@a1=9n;a+KE9cJr<(#rj{s#B=@?N&fwa9+%@8q|hz82Xg`^ay&uT%Dw zzekP}lYQOSDcj}zZYWi+R$HB?Uabab-lUZp$yC2?Jwm1t>N3!&SC8eKU}@4speL|v zsFY&!X7ac2xVnu|yJjQ2Q=vIp^%#Rqhpr$xB^M!y4BlAJB%8G@JzqWlj2t>21|Nlz z%#&)?#Byj)y8*2}8*#>5oW2r;GZ+1^_s|*a+J6dXF9qPZM+DCL#bfWeKK z;-Xg&;$jVm3)3P!xe(W!_kR~GQm#z`6jLs*tAr|EI_v2JsOk@241!NW5+WI;d+Jl+ zn<8t*-+`~;9*!{J@yU6FkeDol$K_&WR5}{Y+=wnq_M_5w<5A{|&++cNt~4&Pu$MqY zl!_=80gbHFB28h^|XGiNf$FTl%EcD6w$TK-% zj*W)**&{fye=|-W-GRgV*5TOBmGC~Z2T7U)m`!Q)rPSRF8d#iZ_faA< zYblRY7{S={?jy7K5%MHMYu0s@COngl$RTTHPy!pdkCqN8g+MWzZ%}seHeNvcw|1>Ys-g;5nzjB4UoUZi<@Y-8XB-o-q$4Wj zHo=ldu&`pMWUHu5D(!z8EcP7U_iQ?ltYTHjBnhP~w52i}tM@lm3ikY>TWWpyY&w`6 zSzef`GbxFMHz6GnS2g(IhjF|Q9Z|PlJ2a+J>DcTmbZF2DZRsrA$_!`TqehJwO*d|e zI*nSOcEfh4Ma3esmYYx+)UI8h4pX9h?n~z<+Z!q8EY7_76NlK8PF|cX9ckT$>eYQr zV^KvBi_pe z^OqtbG6A7cS{NO9u=5$)SZC8@O%|GJouC8CWWbS^eFwQzw9%1CNTxH}zI!h=ZC;0S z#}DGv-t9QNaV?H**n*?$w_)GXm_r5H1= zGDwppHFOb9Yz@vp`zf38!~Daj-(@-~m92u0-~LD`4_S}p#lOAu1T4?1X0ex_e_3sp z%*QffOy;jhC%z0dmOdBhUlDutxl(xLx!3SAUti|y8-FQj`j>{{qe0!o?3;+`NWBf}&KrJ26_PXkM;opLzyv6{^JHZ`hShQlNw!BwvOnTYprhpX(FsoIk|~>Q zB`_FxLla3|!Xlco*KE0t*tl!FrecJ$@WdMk8s1b7jgHZl1rc#Nf<%vyP!0D1k$x66Z-pvF6pNUQ3R8-OCh1)S zIszL3kEk1|{L&Owx2`moH9##%Y+0KTc*_pxwD<%XP2c;w!;NPgi^2M!bYA~Iz+y0F zt9dLka_+wkmh55~zg|MMDT>7f7N?}>kACa% zID3{+>iQ$tv~(w(Ru?KeI{5}2(6Dg_v>`a!)oXz^tcY!DQwi`MHEP@db(=IrEs2=9 zPfaQo<(!{5QUO5?J`Zuo;xxsP%4d0%ZSr0mu)MEG$cvL#&1Q7E0*RJ%nBp|+3UnCZ z%YJfxarW{m`-swz?Xr*jra(d*zWlbRQ29=twR|tf$gA4_$@MkkZ&s6Gr{dV307dP` z@8wnYk!^19xuGO5lk>>mBEKh}WgqwPZlK6HWgoX9mRI>(>hS#X8}4hCZSr01Iua~3 zX1QyO8dNW$Xc|!+N|}_VM==%nP{l}Dtyhz^~bT}=czhQ z;n=yW@bHgj@MA@AycG$STo_UdRmSTq!lk(I5rf6+xO6c9et}Wguw@%|@7az(Zx5W_ zzZ1JxEWyzYo3V58DjeIs2Oek7V?Dt$ZNY2|m^20>X3j#iDFY_@klzD~ti2+NMZ-Fw zW%(DSqLYm1tOqN$AH~_I1VlOW5U6(`LYIyBgd)Vp7b3ur1z&wS;zR7vMx`Nnlh$gp4)ZVPAkYlN>#r-YL?osmOzS`lpM}QmY8s46bWowB z6TaM*oK8PVSkn*0n~Ugc@A9)`J-(*YWg73Lq|b8NZ}2|LXi$oQ91u*RPFeRED9ETV z84+eBR0J%h|K_N$h^QoF(8;9B%xuz5(tgOKCRvfsmc(l$eYLlxpkzs-WeKTgK4^E~l3Nta&?WBwfym%y8r2AwpOSrKBOBFWCiX~%7B3U^|2uoK5)uOTu#pE5g-ipD}1rQvLFH2ifYgtKDo z*>?_ADmFxwO7&2VYNJZc>S$iCIvUofsMJVRsu6*OC>8;S8!T?PxSGGJ|Ds&P@d%LW zP_fjg-w-uenJZLbBtxrKo6%*f&S8ZAraH4`BHrpmj4hW|grt-kFd2CtjVu@@Dn3>$oiiV? zR2&*fjh@2-k$D3S2Q5`5oZW*l_c2cKw?drvKmo)E5%7=a^Wbw`9cIN(0m+!-mxh&^ z5=8TvNGkL!KIdFUs`i{hs?Q=gi&;QfaT7FVSmJHCc<>aqEnkVnKTpHx(fu%f!bprB zGXhPUHR3(2Oou6sO(OYbsK+R}Vf_|QjEbSYYD46tO%wM_@o7b+#`c+G?Z`WpcUpb8}8y8{Cs##dJ zWFnR>o`4PO<`6)8v1a9u*sx|1W=tN3`E%x?C?^kj>G>+~5tD#O0wW2KBv6vILXyQl z$h;L(o|?-d3wy;A7%B8A;c+%>-*+D8f)f!*AW8kX5>F>=00JXR5W+g(5ubtZXsVg8 zJZz50MYBnpG2o{IXy0ujYJOZDmEQeaHHFF0VM(3;!8;!D4Z3^%S; zsk)lqBHLuG7S)_ad++Uc@WET};KR4xr4o7%AHDMt_xTKEKC6N6htI;A69L#pQmhSi zU`b>SW`<>BazGm9dRTBQ<_^vT=y1V17FYe^;OQO1zrlfk2nSM<_;<&q(=wn>plZ=E z$h1&#q&;BJd5wNE6^SMX63jB$H4nzj>#VOONFaoz#Uq75sM%J)0H2_yU&&^$Xtov; zCXZltK2W|~1)TKplG;gDk2Fy@SY44vL0En|5x$HF z;$rd;5NJRI9r*dsSX_zGA&Sm>-+>FLTB#8#mal_PKQE86Uw(m_<;$XCnGe)NNSU`H z*^6aDq?#Pb_p(ho@ZH&tr6XUqsZnDeeX918QDmQ%tAJ0xtc=nhSH#DkR#7Wc)^FAU zZRa0D?Frk^>ZfDau78A3N^`XkS*%@IOrnhuhYh0+M5?q70mge&YB!-z%phD+p-HkK zjFA03u*78NLz7GCo6Sg1A`e!wR7NUhMl8uWkFn!w90KhuD7^P!`dip_Iv&Bv_p!)V zj{|AJN3ke`W=&h8NuySDu73w*f};UW1cVpE!#e}J zug2p{lwE-(ghA()$UHQk>;g;2?vqjf^LnULmH{J`uM8y?V2H`cFG)7}1?#-4U!|N< zEYiOs-^+X!X%Z9AsI0~nDk!T|z5=S2uZZf>FH5Uht}4H;g$k7$qI~_1=sj&EMs7HT z35SC*`BDM&xWHB>FKK+^->6e&p3toDGgxdkIb>ez@_Twvimd1O1bZdrm2ETjka?!c8xmk}2i zhh*No&?E=8c*Nr8Qz_UGQG#8`z@*bj`1z;?mo(QAZhZia?GC)D417X$h|^ecaQ|sk zt5^#azo>){Kl~6MeDE$l{ODc0`PQqhIV?}jW0BeQrAvRT03uKkhs@y5IF;I%hD#JeAShR-Y1K!fJ((P8lk)SJ4Swg+osZ^1h(2?0?i z1V!6ffKm~fKqWyNu`>WG{hjbnx<$oO0v!RGq)TIzmX0`!OR>aSU0_K`VS(VQfF+rc zNKzUrTpFFdbik_)_3H#V%}N=Yb{~2|V~d{-mo2xEK(Jia-o_5^RQM4fW3KA3$?*s~ z9l+0?W?Z7=&M4+{Oub34%%n&xqJmj4{pPpxf3yA z;wX$6Gm?s>u~IBD@<<$)MAmg`@%`_Ch0*iBvR|O`E3iC)3(XzT|F2E1>0jBij(OUi zb<9)tOi26(<_3ts#0?gKjQe}JhXNB((W0gWB+^VPuku;?14WI?_W~TbZ=zlVD)L(H zld`Dv*%uhprxzB?or$03Ov1|L^Kjz$endrwL9f>%A<>9Ltqqwn44qMII-QNhQG}iQ zPq9wx)F7Mf+gaat@5YK1OR;9{Qmoss6sy-R#?s|KW5dRkShjpIcI?=J&6{@M(1Fu% z^7tJ3k>3N0d={vPauKLVi-&wKz!BAQDdjfC9FD=ad&2Pj;aIegQCCM}&~fKU^gZnZ zZz^;z%{6R|&PTJ!o6z&;-DuQ*EIw*d6XhG$Rx|1)Ws8jVk^vBs|EqdsSNax#i7NqR zd9?Se>#CzQsRcp4yr&U^@cBf(3?rX+| zpiFdM=Y?iVJkV&RFBWQnmTP=4<%$g+#$rV3^N^4rYf)t(D#nIbjU9=Ji7+N>;O~DH z#}04B$)h`Qbnj+d+Or7>SI;9^!|x4guoE0fW?8a1gZHigw$y9}=?+8%2O{9=W%zk{ zz{m3fBEy4d!7!%ikd?*b2oeXCihxA{MF7Lke>zy4c|eNezEUezM;?DT7&B*0#;D=F z@iQIIjHx3qb@EX3{h=ov(0Cj_eFZ60F)5A*Fs9yT!MTe#Z5FOv4#k?~YcO-lNUU8k z7n?RN#1_J3{=C^deu~P{sx{bfB~p*|XCtsb_8!hSfwMWl+NkSTbW(?H=M6X)o`FEp z+&6~GAi;*nC?odnKF(;OCMtYhQB7uin=p9i-PiH*D}PtB=Ot6Iq-v1_lmZq>n=cD{ zNi&$didqrSsG0XKzorsa{_SrsxL#j+5ih@93Z>rofU2b&Dpjk8=Iy%R>lJ6wXy$%2 zn|l;ns91s-g@iM@3Xe}mm?j+&+BAe}9T2Iaz9yxkYGtIL8_Hzxk;%^1w^o{^NhtAeGwSs;EL`J4u|EzI}PY_JOqoig;<$b zjHxFR;F)|21$^Ea8TS~O-bViI2S_a_rW(Bi10S*`HU-8w0_eyY>|MVROBT$)fI;1# zQY`gQv0_C978yC!q_LzBcSGf$gT<{p{+YS<{f8;AJY~;x_Wy~=HT^4l)-g}pvyOSn zeo-0!OLI4QDY(em9^B>vitG0UvZ73+tjb76_u_O4EHaAmNz<-0=gM|BtOe8p=0=1~ zBdVJb0|#Kvw22r#xHpCl>5bX5CSl9g4Tz48W*tgUL;Yo_ak`8g%#`)^A0RrxLZ@bj z_f>x!J9bj#0NlN22M!fri4PmsM5V^A5nk?;EiSl7rekUHs;1x~LyX;uMfzCkOA})aszJV2R-=YmMYeuz z!liCKG$3H=)og$o)f%8;)ut$0wI!;y?T>XHTI^-uJL*s@+N`>YYV*#c#}NY>5;7xB z>u@2d5P`Au385yHB|0?RglK{@ARvJ1aWke*AC9S$hG5N#dDu!|ubnv_3&#$|_O%<~ z?;DA9X#z84BTk>D`braZW}H2H0h`vW!oD3_as1$3Ws<#m@9yn5d+sD57Q_2}U1i*` zXWgTMk-n9CNabhCp9dDcW--dmD@ImcA&N?h5fJFhh-V7EZr>Qoex88DC@zN z#*R(P@a@-aF>2H>T=u#GdwMp^sp-hf$VGTi2=;AVf{DYv!`g)tVT$v?-C}yhJH@zq z@g&C6c}<@@2}ci~W#n(ffvZU>d+N#n2c}-h#FCi1=zll?&6l0Uyh~P`Pr8q*u|@C+ zv>+nVtnyV!5;@5a^wIn8;_WvGlDA6XxflMf5=lySV@c6c>Qza7Us^SNNneXpPPJ$c zE37n`iDG&AM2u}5e^Gpiw<9-)ACcOGi?_d&N+Y|@KTJiI>+)1BJ-U32@uP-d*q~mRGI=DnZ(GYK*&9}?6-fpwEDUgpN`UM#v9VTl!e9oW3x_J|^eEL8Ho!t&| zVj!%BP=p4Y#*WPkux9=+oZh#H3MYr~keT-k^3!A<3q?XMeL#lHVWFD&v%uoaxrW># z!X-BcYuBzs*KgWkP~UG58|uN+6!HQXD$~qKQ5ZJ34_dZridAdZP)cXOnwH4|X2*%c zM=^Km5DehDdyyMuI^awuD7Wl?m;T`RurNKXe1&N>;x5FE2ye;raD5PSc<7Tvy zq;o2;gzK%p3l;-aVv1A1QmjUQIIJ`oE#`a(9o5{{fMo0>G!BPnWBb)q><`Vy1v4UainR%X-vNuOS?iyhf{QYKc7uh{wlt4P6{!agSON>B>dn#k>mlenVAe0D5lpY>65qCIjI}>cMxIqepD2Fu zF7BnK;qc1U=-0jt#{KX;E}p*%yCVk{dnQ67G}y6r1?Ep0jIE2tqtF~iA5342LR`yF z!G+U1FmG~CY+5oJ!BJ+_9F`_9p<)rJh+;AEc}S+?KMyR~S&VWWELx2E*dJ`FK<;kYFhMuozp`EkTF2P1Q_#v&{sPEd@@e9Y^-<#_TEGF=K2O*b*gI z7;nP8I|Phmks>3{ZSvRKI)D6hXb)Iz)aBOA|^2h34~3ukvd#4J2*I?}Fub%-tlW z;KI*xtQ#uQvF~=a|6BVl2!3nNI_7D6)-g}pvmo)G*e?)!`gfoDUcf6I_W}|%2TS@? zltPiA^)iC7hU#;1j~)}C2w2p}Fo89{t5c;K2K4?O(pv^Z!QRUMwP~oFb)#6=}$yny9xM$dx`S4SG z^!~?c4TXW5e+%9P~24D<%V)L_1;=tcZxSFu+Vlc#H*m4|rf= zzX2HEvl~KB9&ja+yn9`aZtKBP0job;L#cQpxniMyi&}z8c>58%WQ81WWpDI0zPd_B|N+EF4s)e;Qcq z>1jxFTGf)nixsMTpF}jpKX(KONU# zQ~W(li7G&s!!a0g&W!Ijg<`~VZ;Y6G2&aNfShME@%GIocO4X|3iw{3S={Md~OA0^# z{EMp3=3D_xO__5=pvZl6 z4~mfcDD!`+d{G|d%Y26JT{>gR_>q`AVVD{fcIecjC@({TIN)hAcxyzNNalTWBL!kXt|@nl5D>F zZ-GVD7ZRWdNaR%%j6g<4hK0r1p=EvWh|XnQPeVk~Jp^g4BZ8{RBQX_mkr{{%&A@Jg zrNhKE82ZyrbnHF~)d+?1gvxtwy{Cp63q&Mav4F;HDtqyJGHkds;q$42igfG?Xk`A2 zOrU({^>=9R;=MQDb`3Xv=RJJ#erc2`{SnIWn5tE3q3?iE@CuBFSEvz}LM;e4-Bu9v zPAp;Yn}wjHB7{X6s5Fug5}AzH#59@{yY^kcgdYZAQtuuJJ9UsW;f=g=8xQEui5F<7 z3a9k@3PZaz!T$aGVNP|x>P&}UXc#sunuht~dLYqzAN{XGf#uO%MverFGgXUKv-)G@ ztbS@_oh(0)Q9#JcNM3?PMu#QyIi%&gmM#9@gGG!xKYs8Kj~@$V9`W@tZr*;VB9%D%uR3{JA1W8%OHof3JB;9gG7GLcwQ2g;TC(fWl>!ujgyEBZMt2_@q+dV24zUDY| zm@s-6+P7(sjqCToWG+M|L6w#D5Qh$3#h?M*FnaiRxazSNw~Ng@hCrg-xt@fTi$-8T z_g2`uegkxrh>7}Q_|anq=!y|#xs53EZ45dbfCdW=qx05Ke7!9UgSJOu{%I3NZS%m8 zrQ7i#E9sZ4U|&*Ilz#nfykF{VRQ$A@TEkvoBK;@QasR;wAK}9fKT#l&<}aBzDT+mg z7nlCPH8MDQ6O=+GwZq_XBUqYoPkN^;H}LWdPNOB@29qc{PYDgObIs7$m3 zjF_2a&cVntozF8}wXNP_A-jp(l83NTu_ULk&{`Y_^7F^$4QnuW-c&-xHIHTZh#_jY zag{1n)No_v!07bq*A?e4lOSE|fV<{?(BUe$xWM98B+B7EX`+$HS{$X=FHm{X9HyZ3 zR8!cqocVuZu4{5RZ?^;ghZFyOQ>uaXbn}!_7j8xI)V_bj+zQ1FlsdH~FPZD!{hqn* z?bB*S21Up$ecnq3Ty?2z2KMfSnN!AL?8pI_IDRM=Eu5p~vDj=j1(rCC3AqLL)TppD zX%fp7HB!Q;md-~k_nvAxNu`>R47qld#85heSq@pAY*}|$j_%QU-G_xikA=!b?DxRp zUg%4j!bGVEXrzzDJ@hyx$qb!69VcX!O5bE8C*DAOR6c?XPI$*#5EPS&KsxU=u^Fg0 zZ4JI(v%|LK;3a$hja5+>0O9w%i zr|e2x5w2>k!6z_LCDx7ArKxEM(OMhMT=K!BLA@}tM>8B)JpuPKqv#W}r~~qmcb|W= z_aThz{WV7S{T4oHLxnT4Om=b4&W%;#Q=V<*lbG$h;w7J&DHEq6Bq$D9 zR6fR(LRhTV5gum2hII=uepFAaSvCdXfhS=%$G~BY!=b$kFl%xT%$qtGp2tr@&qzNm zp#TAdOK|cH_$TDUBRmbmjs>IL+6!p2))(LHiNR9;BAhb;V|HA|h!wl=2`ha0T6Ix{ z&cDJZW${JnPf`8L%C5HQ@|9GRmq0{brGG`uu&+eL!td0Gns@M+!40g z=LuZg%0(HU>mRZITfpL0Dgta5T>d?}{Wrn@v2y>@%k!=DR znLsJcUef0x{VM_%87U@;MWFJx=l-r14E&qQ7xo-pcSq87)^&Esl zr@V3MN;J*|B;ztw)TNj_oCtK_Y-lFVhh-rw+JZPL6~9m&t_Erl8E-~tj24>~&%vaA z?Xhf152S=1#oe1`+_>*VxFG;j7LFxUzQMNTa}lFALu<=a$vzY9S=hIIJ?4z-hslGx zAoS9H+$dp?k9)`|$i%L_+c0~4A8cJY1JP7Q(gKww6WufKDzHdDizDxW%6RanfhDt$ zQaDS-w%=kza~rX|8LOAC!PsFVNzF-EGH*V?Fcp)=O~&$NYvJo3rP^pEqo%ZvCR6RC z(xHV#Mzb)l!pvDyv3SXRtXj1SOP0uR<2l%{dO5t#oFC17EhO+4oWrtJPwqmRwAX9BWlatr}HPvsxY0tX_}% z)k4E2t5bV7Z1AD*?kwCuuLNR>H(8%NNM9t~b@JdnaEd+d&2k ziJ3~$oFnThP}*h{tMoeAEGX9eVps|Ysk}$ZWHOZ_=RTjYq;$Faq>cQRN{^nNdmT1M z7IL!l2p0n`dYr|+1KY4<>0CA3c+jB!bXK+1JQe|qG|x0{)I#;KxS%3xMTQ@X^QJ?m zLz8>wRw4g@%db_7vZo^L{{a|rj&$UI#QvWSmIn2o`uyaaZq*{@2Jb&JH=w1XUiw+& zRqm(UN4bA8IZ~R#zVG@CrcM~ez;8H~E%_0rPaR^tidCb+49PYmXsswLevE9wC6o0x zr;q_i-fcMY#cm-r&t-N7Bg%4as?_U}8bshCDVtQRR26SJr7cKiu#i!+};*HneQEElh zha{mCK)ACTOYSgNBFcC0;d`!G_RBburtGEXdE6^+QmK^2 zo9};t(qGg;xrX0h?9zjny(a)aok+mui0fDpSd3nqLonvF0YB^uz*et#1jT0~IFdnJ zj1zI%9K^;u5$NZSHA{cQgyB6ff942mT=6q@u3w2AOBQ1K;6d2EVFzNOlA*WVMuP1o z5*@dZoW+1qZ^NN|`!RO-KujLXXS#9)cJAMc#j96h^6VLEneOOlKi+#;BIBV_EHdO+ zX5G7n9N%LwKp*gDfyE{r#_2a;wB{l;EgyvilutH3?4VG1dw44Izj76tXbsYxc~m$o zK(fxZHJ{PTZJ3>OVuWdCPA*bR$%u#yf!EbbxOnj*JUl#b`O-PWMuZ}rkyDl>6=s8g zg@iZeBT&x=5n_NQJ`LyMGBM{=B!=t_$BM85Y}VYuu${q}aUvKKHy_1Eb(-T7LPhfY zG^y1PjjPs0!^*XlladK$GGtSfiS(_A$p{-!Gt#^zN=B53m~5AR7ir5Dz|^c>1=Xuo zLbb{=5~mKg*F>YHZO~=ONz|XR>;HPNq-I@*(MILO$S^Tcub#=uRZB5_<~a2Ip&Q1I z8&1{Y>SJ*?g(+~*5jJcfPTMu?Sj}ls&Rd)%zZaMYAQWI+ka-#|?xq`Yitb3;4H((S z4VY)a;y`bBaAVuUome?$tjx7gU~_mCyHbKjk~Qhmz8zUbUJS{6ininLZH{ z#tg=kNh284&Bfk*I}slrk7x#q;gNdQQ9>j``c+F*AeowZ{Z9u=tRWkb1c-oTucr~` zeA00AVhXnV#9`y*2%Nl}2+tq~Rz+r_#@LnkX6_EO_+bh@t597vQ;8~(W-v)M`TSpA z_ysJo7K=O4q;%v<2fvIElRg%ijqd_WDZKDES-<74O0l?9%ir?B%sQ8fj!Q1#NB=B*x78DCFGL`KJ}e|E4KeXqh>W98 zpucdYI-rXULV)KHTt2lErw`E%?n2<{A06sVWL>l3m*QT z2a7CWYtJE2a&uuXDM8lFd%PGHCPF4R54cWgm7fI^7XVplj|d%Uo0Zkc3J{Ybqm%5g z78OC8nhi~I8VsgPq)D4?IvuAa2g!7vHs?baO>CV5bEHw%t|zu_cWg|OiESs-$;7s; ziEZ1)#I|iG6Wg9RIsLxpRGs>&zQ52_yPv)9b*<}uGHBup7y?3eIS*6eqZvr~*U%FA z0#0|PjgmxWDY5(688ECAhYj~qWO2JcF^6q`1Y+bvTl1Xxw@0s|5~?SI$2ZYiYE<~s z9afaV0|r>c_s8>lJ7lXIe7td-=;YSw=mdC{?Oe1X`+}IsGEy zuv#b9NzE2tu!sT;7l)gl-(bU~gt-rG#nkAg{AuW_rJ|AI;r=W#&8@2i1joy$KwpRY zQH27eX^KUphsdL_fDvl{%o3xOYTE#!6>#y$np25bnP`!sS55a^S<}B*>KrqHV~pM! zt|9>bd+0?vzZWJaumj|17K8lPP&n-?nju5QnNSI{19mnFCNknzB-P!d9D@)Kveu%R52qsvNMjwgXbyWAk&A7Q&57@aep*A;^I zNguq2V^clJkcMw-nk#YHvR@fwV`3iK$R991HJpK;eGb{5`|TiGL*SS;_79(K=dCXb zeQ7y2k;DvmuU(geE%!+gNlD4$luR)0mr!`^`OBcdOK9e};5ewcELBJy(-7We0CEft zlTuwN7Fl{NYHiVKji^}>o^4-V4^%Y(0uCR+Iq8tqlpfrMC+vVVA5MYJpQBr)&pg7O zsr{Q*0MRPG`EdCGxVsA7wZMKfwERXn8a{Yj$X=4=q9{MB21~j1`~}ta7^)Fi2uI}D z^Y2ru_&I~CBUU^E3Xe2nBphimT3RB@e~s>`x{L z@PMI#dp_6e?TGXS6Ji9ciCKS{Iw{pv=7`{L${3Wt(|xX8*Y~W87q*~KPQ%>##A87J z!+!*DS^|@fDRVc494_C!K1*1hT;TM5d0OhJ_0e`dV?HWNYPA@y)p7YA-^HU&S6nz01-Xh^^smgiGPpLG6+De1$#wsu}U3(SSZ){|#4#3Pj)JR;?0!vQnUlv=#MUMg9b&x=+J zUXtQQC5$;CG^WNb_po9OPuP7XMxSg!wQEE2Sr>gxuwI=%QLW~w)oh5foDh)!*Ep(n()Rowv*|VV9)Du53no5V{;Sl2kkz8L+uBHZ?_H zfZt>-(GZZg7s~M(Y{|os6(r3{_iuT@sfYR_-S|S5UcY%7LFXr+7!7j{;?lxkM55(7 zBfv56tsiJp7GsewCitr|NR^`hG5TE#cU-uDhU11L9HrGMI**#82B|0zlxTp@>&zH) z#UF80rSu3FTESUS==$MV24FWnEmISqlCS~COgFg>7!~X-;5}&5!Hl#{Tmlq3!mAxL zFtk#B&?VC?iXKKhDt%69ng7jW?ACFHmZ!dyIL8aERdqs%H;@<<%Rs|0C|=78uOnw# zj#_nRFTh|7n_EXKR4iFjgzQ^nOf#+{88+iP$e#lXHkiLZJkorkgIQ^-n zoDU-96b<6dXzRivO{zAkbn3$ap352tK|(_E{1QsWLW8WZtk)qoD91N?(sVcgW$9^TEY_mx%VZF81LNT7)1qvN@7ap$-{6|nxyjgbm zj3ghC^EU`3J)-l};h3@$j*BQo$v2V}quDzh^93`?3U#K~iezni5qJ(`fe6raz+4Jk zMw#~R^>gF8QdxiApBXS^P#ZP@>+uNFJaMH*Bit6s+Q;lB}gz<{$dVy|*+m5h|+8 z$C+>%C*r*eaoF#?ad9ay4S@oE86#fqM7Lu+v$*$gK`<<<#hLyQf!Fc?=pt#JT6PwB zx0@Uc0f}=_I{ew6vPvF$oPn}VX=7t%WV5LN*@z%PBnG(j6$6IOP)zJbOkOeqW-&(m z{Z?p%DPv}1;iO`_7Z?*&A0-K^g~)s=?SwlZ>V1B%VO{O)8VUKB)Tv}E<$66@wj3vA z#L!(_FKvmFQD6P>u8cREM(&EiRv(MpmN&fYKV5Mk5E&iAu3wNGLV)$O71yZm1(#nv zfLIbX#gyELUj1kMcq-QT{($0m0U||{qJS$By@qDA;0Ix@&oDUEdA;}PnJft1%Z+?! zlDbb*;RuTE{1TH$t;{i*iqWQ(Yuy&`aAPD9w@bWZ6AliL_Ou!3V-U~M#@U!E{%9>ySq#N z*d<8~=e7Y9U=V_6GE5$FDoKB;MIrr+a%1CgB!myhmdKtkMT2j)w89AwEvRx_0fP!( zJ95d8O=>Kr0_=1di-@l}8x%`D2|1G63hWqk!;J(L_gm>-Hz-`eZQOh7FW)gJ?f!b- zDE5(qBrE~sT{mFNJH*V~2rZ8A_7qFVMy)8*S9&q`p&Gk?{js>a+-Mapfe1E!By4yu zN2W}*dP)qAr3Ma!LB%$|F#b4oN`KBiLN^9wK$HxRqc z6s@@Z0j%!3c^NTL%C0Cj*%vtJ+@U#B{2S7Iuc+_Tuk#FJM#i`7U)zcaDRF{24o)&e zL(eiC9_NltOoR|ZmOK9)MoWSbS_i;Dt7a>`CdFzz&?}NC)_Vert?AEB_6Ut`F=kN} z6k}M#Cw*dup*hh{#-5$nmYaOX#l#ak14oCG#+V5OKna=w)r$9m4@Km<5NNKn%4Yyh zFpUKp8fUilo?cXH;XQN`2BbnKj%RircDq*FY-s_ra8qf#pa)!xL}baI;6*JCn~>qh z(+9Y?VQ0UDe+3?e*ygm6Hk{^RCDHhWI_DZEtA9APTFfK3sx$I^HZ)Ea^NHG>&&n>& zWAyS>-;kdxbYNTr>X2>L^K~j+&1KRWZMUF_HhhPk_KbDlhxx}ZQei*fS}A3I#`73Z zALS^~*e5*QWna*ba9II9L>QAPu+?7?RzHhB@FBm-`4L?I!#=(=@t`^|Hb}4$Ui)oUnDB5Y;o-)s%aLO82ZeN#ruzL-pQ{id3~44;rFCa6y++yb_}(L0vpF7_{_2!H8UN|CtgO3r}K)mckpd zR4&J)ra0%&qJyAeg)ScB3LlL;;j=Imk;n*+u7Zi0bQya=bcfHErc+Xi=f$Kd97I<^ zE2$6Nun(SoC0Czh>f!L_bmb5EY$ee9Er`ZBu_V5)6}`j(-b8L4y?*A~TF=9w0^w9d zqOP(lwa^Ngfv!LPjpS)mc}=(Yj=D_sUN+g`U<0{&w!oK&qe2-5$+8XlE(rvz6LtI> zDDg3~zmX$F&P5Uz5~KU`Ou65GD0cA=b^uKeiBH61YTfDv*@J|^n8`h7-LD~3Lw~zujl1>5Oq;)n;5J`(bV^RrQ6op|ogw8+EYlNXD9FcDg{|@P z7}egBemV;XCwQ$>)$;>w&kcY21eVXfr2bQobkL-D+VJ4cqX>;e zQUk93-fnLZ4<#sALcjnD!A~yXo%-vO1(;ASW6jf|EXACZZYVyx#=hF_&gEK@?H@Pc z6^H7L4u<2ZKUC$Awt5XixYkUtoP@|3FxWdfnDPoMF~u2_%Nv!A05F`3BB^!Sch=_X zLL)ZgGT08-U1e$d9=j2d2c+i;#?-&KvcFi_>=hRorg$NCtyB7PXCjQOk=U0Df+DMr z(@2AhC)3ha*5?U#Y&xf@O-f8}Opv;J#JNdT`K?MJY>e0u1+Prs-}Uk*Lg8Sv9x@Pc!yfwG9GLA(dG!=Q=+w#TJeXhlNlm0pp*L@fZem6dw@5`2n4KOi_VLmx&kPg?UD|V_g6c?JrOSI~yWlJ0ug72$n zBac}OcWUApwtG#8G<(638N*fL*r=-%?bn~$zoigARcs9-Cy#6OzG?!8Br^jM)L1*- zvrl+ke)QGDY(Jz2gs7p*TYh(_?$@l$@%&WL)$R*n5Lfycjj66rCIuryjmSjFWma>& zAdK@BA*Yvuv(8j)gL#i!i5@agOigHpDPXGPc|HSDRhw%K>lpJ~@0#w)KYMxTA10*Z zey>NF&JhfI?^ny|hWu`KyfYp=aB^!yKbgTstc%mR2ny6q>e8pje>}5k%n$`TeDE4> zv{OOG61&;zNIEDBkTYHNT^MW|z7FmJyWU7OJP24las`oxaSUHTwaGAM`pG4zo338@ zA0Z2?_!)3LNpG;xG(tk=_aIe@S8FVw1&>go`vzepYI6VuMUrI|8D21iXxbV zQzYcDz8C;SWvyx+B!}I_2?x=(DQW z;k3RZT4!7htw`j`|99~L%yiBj51*3~!R|ySY88<_FP|`@OpX=;r@3EsY zBKXwJQ&OvL4gbjXqmuODQaS>pN9MJp2#tVKrkGEvjt`!+3cpN@23m^u=3%QE1t-CZ zB}}Ai0<}+Tugk74pcuqnP~t>yicB0joZs&|I0UTHjgp)$@j#5brckrXQ2#Onm zvB)9kSjoJ*C0Ps-qR8>1`XFBOb!{|y;j!Q_Bz&BK;7I_ajC{?)BTLHYUI|R8?Q1V1 zQiv#DpKi(P>z;vHG6+`Z*>8w=tBToXN?##DT*rP)Q6bQCn&r@Gp4aW>$HD}V7<%s5enF5sL8%gg3eyw#O<-N3U=<$wEpnr$>> zee~GP1dJ{Gt1|MnnQ1Tiy-iu8E^Yz;){Y^8NaB}2@U}zETSyVwLe6&qk0?DS6%}jJ zTPS(d^rN->&{B4!roBmnM^(m{%XyBSb{hv@1DNw*iY(F;Y*awx|451&}S=Tji% ztz;jvXL~^3{(=XoxoGw`w=I35!QH&EQNyO+k|z;%WD!#W!zdL?x(-HQqWlUFCITo3 zpRWkeH)ne!^~av@L@%5${E!yK%tyzvlSm3FQ4CdVL@EWB!+l(EMa*qS-}e0uDPKm1 zFGEBvM0wsIB=%T&r=CY9zf+*Hm`D6F>B$JXf5b_Gj2GHn=yV#@ei==$=^0HYMim8~ zLm6eFoN67mvWvEh!~=lOCy&SdeD)4R}qq#)lXl4%<4g-<7>t;U}B zzc$XJ#i0D+sKsP)9CO?fxAkOdw$lzwPYm5XUfb7qI&mis=}^2_ZsK4_`vHa_fz&sj zn@UPX24PXJW#9>|peGP>I?!Qomsf*!;*zo=ayg06p(|IDnj3W)31E@=fc_X(818Q6 zn-nAnUHTb~+cJRg(c)p0@slmz5qkULrq@>ybFD?VVev?k9sP@_z} ziL1ir4r;vnmiY7al^&h}9P0^Hloc$}`9PY^#=t(X#7p)@ z)v;S~#~hMMd(q1s>ibc#A*Bldmu`LNGuM+ARdL<`XbB?Te(~OXwb1*Jv#7)uMrk#6 zHgd@j^o$ovBLg<2EnPsZ3i78|R)=`sCC6u{`%>_KzWr&j!R} zuKcUAdVP}5u%>Lso>jyZ1P=`T*Z&+ISZ968aIw)r%xeS5QKuXxJ4@ab2PV_Uk6QzF zOVwMC;SW29T@FyS;AK^gR?-)mx#pMa^+us+rv59&QrSS=$9~_4Ec-EEJGkvH92(%j zk|;a{D$$7NrS>koY{fhs%yOY-)&FbQcsYxJRJkn17$91Lob>VFlzgl>&)Ic9{l?_= z#-BW;eKGZYYZ#O>7dyg@pA*#dR3|LS$do<_c;j6A-f#)LwsMU7d_q;A3)K_LW@=>5 z9&U7}vAR($UvYye(j`u)(c^p|s!^TZASj6Ir(yKnNE|7LI+g~sg(5OUd(MVB$6!zzNzR%4u(zby@* ziVUWpey$=ffCZ5qunH(rHaC2*>$a`E-p0sw=o$|GY`Hx(e61e602qkiiMVI{qmttwY z+DgCv*@>V|T_yR^22;y-#rrR7#bE79Hm&Iv)zpS3iYI6%YRarmf5wFH-$GxmKAiNp zItH~-qGKK>Dns}wq%5+^Afg8gJ_4{UB5qQ~RR2)6WbL9QKEoA-HprPAK|6Eb;mTGvO2w(O6)Dm9XlW%lD|<;MfgXMErQvD9DqbMU!&g z$uW-|KQ8A|j1p@i-D#xO<6KKFhYea3`a_6wE^{u!*<7WL13gb_A+-~otw8&Ey^b+g z?}_;N-#OFYQZW3bnm|_@tvr{B67#hxIM4&ONcR_~UB#U;6EI6PqUfMLXTZjg@)>cv=qjHJ07n<5eh&#{Ezl61~SoK_)78Eq$J~$1Xb9S z%-VxZ|9AzdSC!=~{ zD9ET#ZpTg${{Wfr^u=p)g3jwt%kW;Ttiw`@dyN2e>D8H5IHMHSnLVkwf?Pd@Li5b(}$1akq8Hp(c zp()RmtI?kZ$v_vJ?ju|C1jYNn?2I@R8pI$`VcG8Z64PJsYb?K^pt-)ln<9Q1c?YkcfCU@hQKz!QyuUx8ZxW{mOyxF73~Ily8#XJOrz73LE9Cr{(U zwM;Xgi>~K`R>12;r&Hw&={*@rwD)ctp@#3&h_)Ei*37^rs`vWS_>kK_5|KX%*$W3K z!*7A^1y}R=VW&pVjKNS-a6x^o!t_(*16pU+_S1GTs~#`a{=Bk^>GvLtyNt!fi_gJz2{8 zRUYz$-JWc+H*7Tgpz+tJX}V0KwkprWpW6ACw0eE=o+f8h;gZaoxx>Ctr3KT!!vBag zo(nog=~B=H+4AWSZao=mXo-dUd_j0be|m$YdS)j_FcRJ>3DWtJGDy(`m1-D&#G;JF zn9vA)7Irh4v{D{+E_T1D)?LLKD%0H|VR9O_Oql{ zd+gZ3A(+XA(uB?m&9u*UzbgTh;BC7U=Gt!73-OQ%ZcyJ3CwL4rC!!T8Okg{2J--aJ8OM4wZ4@|a3 zw2hT{;en=6mw{stJtA2v-Fm$NzbN@WJlmHd)CH0HCg-;GH@5EK84~8jwfNPX+Bibd z82)Ab_)QGFm>vm&jZ1Vv5=dpzzbfhjau*Bk`NVv4!%dKK-OqHT49*^TKOJB-JrQcU zNnt(2MwF1zvx1u@77T@h@G_i4$+kaycjfCm-r+pBWvh>~fE|ul8({SqM7`K@`KHW^ z7ekNcjDKj%K;%fKK)u=b{hT@Pa(&{Y`8%@BcW8s>TVqhOLD+5RJFC-(rdrhsb`#x_ zWc1TS;XFam#IM}Fj};lv1Pau9;s_?~d7&utyMXr$iedhpD)Iv)Z32rbaz$;GN=!RI zNm!Y`P7+>=?Jn{OU>0PI9M@YG+UM1|eeCox=k-8X|8)QM1KpO4k^vze(x7!XV22w6 zL6w&*A+~xeoEtqkf<6QsQsoQ=gES$IEdyZBs?t$q?>NUbcWEBC(sw&-r{<5LVM01s1%u9&NrQFKK~=myokoWnNg619>3So7uy`GbRp~U~g1V0B^wM(l$4G%}5hSEk$4tOU)Lah~ znA6T!N^W~HRtPvm6+<=>{UE!?mhAFICUd9WeZQSDXYJN3zq}hY%G!&F1ckA@ z^%R5KQ@6N_PNYDN4PINJTrF@NOV(%>X~uwMg|t;z3@fHRMxNQU1~jwjfDm8O=@X%{ z_=s(#Fw)mRAqm;t3`DU(p3_=Yki#8(57!*3RR1t15|_gT@2u(CKX!aY&5CBMq7FPo zFQe7`PS@|QAA$L+-nosTnv71Od92dg_i^g!=Jf~3UUrK>e`&7T&WClx^ks+9-C%C* z?=O$6HdM%5RHAnZl^r5OA^o6qnW2z8QVeo(m0fYFeMLP~Qd(_vCp7We!MpayaAZh# zC`0(%v09Sup>hbTn`ZzV67R-{=BQ%ya6C~YtL5klu+tmed%zHjbkgDp6+bcL(Q4W7 z?4+B!;feb1MC6gfp6V$i@qq}2BiOkwVRW`^DH+Xt(NP^}qTS^m)SzI~y6wsf?~0O-1Q@Q@{sHoNLBD$k=C|mGLK2w) z8*`L7#uSgeRooD=SF(myetpb7rGaHP2ODWV5D^}CU36Sw4p;L8!Mkka`65Xa>6phL9odS{lr;eT}oE3Q6p%oT$XH# zNM70#P@h;`d{$qq;#!I&dt9jb>N<1dvIE5TD=eTF?zs?Q^F6m)r;>Wb8dGtYmOEhl` z1k`K<%G-21Sb#P-dL8R6^l(m;=nVvE0K6$gA?WL&u6#>Tbf6=-b@|4i22~4W7#))e z6ky6=+suXXK`DvC4-x2U-+#N(Dc7L87f6;&3~^p8fX_KII=x$Ju@qaG^$#rL?iRlX zM9(!k_%vE=2EZ4msxS<|rp-}=(4Mc9GJ~Xn^}emn>#>9q?nrnMV4%BKhh4Yolr@{7 zV#d&4{dnJ`5=fEIf1pR$x!o=2Wo3+Bq0UB(`I<;lw3lEiU3>{U9$Jy#gV>T37ZhF& zgObJe6+Kj$8PC4n{}vflXc(^@IlWzFGU4(#qhc8|%VqN6XL42bwmC_nm4^E*oCb|u z3Ax@98K>|CX_z|eK_o=_0l@(=V9s(|MnNpCJQJj+h{&x*cmjFal(~p;P?uW@M zNo{KIf<4;s%-uH;;9)eFOCusfb5o-Hho(V0-dle~_0$ z$`4zc8$EJ6U9b!zT?TtBz)-Nh6WShGDrcdE()1VsdF(ijrg6pGFN3x+kQuSEbYF`I z-RvLlu&SOt(2o?J@#}m$loN==hYbC7NTLRQq!{dXI)pv)MojjPjGCcZ9DJk*U`wBZ z{J{zI7d;ig&leFrwvR7p!j~i^NCmBFiUU-(<|IN$o!gQ4YO6YnTW!L>jWS)fx=mm| znV?zk7=y&&QNLijvY{rBfs71A;ior`cLP^MKh$0KUl5M;=Mp?XR5+f=ma>?n#o}E_ z1|@bGrL@bAP(Vx!FCX45+#0v+3%B(Im3Pk?Oov=Al!WNUo~{1LI!0ReF3tFgrN1X< zMxM(iwz*DCa0Zrck8Oiq3IUcoED)6cH5zxM{m^OtksXN0pMvZooy$1I$5|OET3}Sc zXl1%0T21#jS8ssg-Sa@BrMMlUAV|``oJI}_T}l=K#m_wqsTVMmIJb~53kP&l50&qR zwk}Cn-LD++z-~7Or|=7A^e2svd8b@T2UTmmuw=kuC$A4d;e;mJD|UstgGg5i$ASMO77Rd&TVP*c=~g7x)@cE@taZ}h>1BP8Wxh)5O9hu&Ti=y?mIK|hjLG_mdS&*b)|O8VAO`@{UeR}3bIWXIFhX8!!eZ<{@r z75_;7{`OO0?DBe$V7F){2O5{vy@y1dps~OT@w&Z26Y)BW+?!Toa#KRZazu}r`ODrP zRp)#=A{iHNmS$pf!^oJ_v)Cx%Z+AKO$DaCCIcNCiT?;AcEdFEg0GPV>0vfV3@gra> zZZId(eTDO%XDMdlC*5TF!-31XEo|Ef-~Fo8RhQt`kf^cUWc6HCLcCfbSOCNfEk|3~ zukAAw6!h=x9)_0%i9sh)jdr@?;H?n%kDGICWrg+v8Tmd2>`x1ry}Ly1Uz1??m|yzo zNg?~@9JoDp(UA!SgC}r0Q3pTvIHjfH;ZgxV=HX#82?NAJ2+X#HWR_h9e>uU%X{WKB z5M-^yN%`Rt1+%Q4aLCsO6iq%klE=7gn~#Y*cVb&;dUKkRvhk#9__0U_8jcDZYtvyx zCfB%vK=R$zSnT_jERpM51my-Bw@!)R+qux(osTCO`ebr=F@5rqoxT~S(Rb1E*6u_s zbG@H=9;d~rH_E3d%CDDh%KttTl^O^G7iTK-%u;o^o%Ya00t|OCPy_w!89M_xU_qAe z@g>}?NHMV>+})a~5VItRpM~=~BosbOh(d6t(OeL7b+l^CyxOhyV82?bM_!{RK&gd{ z^?E(H)e7@)1t)^T&frWfqa_t6ybb#B!lvJ7b!FnJ z)&&2G{HdIl5-3XTQ};G&l03*&8YE1uuGntOTap%M0qP7$CrwZHA{tT5p++6hh5$1T zIQWghpy8XsgKj#enCyzPrZ7L15~JOK%mZMokAjm@j0g;@pbW&xNS6jNh($`Sc-bwz zI`J~CMI{FmnpQzv0{(en`Qqi~v;w?{(zmQqaxA0*bMVo^rg^5M5)=)~jA4;26daQ> zV>ZLjKEAm1g6Q<*@O9iQ2oz5thFfDw4E!hI6-ev(3Y-#6kiv;)NXiWo5GHJ|vdf*= zd96Rg67z=(Bn}!Tdy}PoEg{jfBN2tMM`3}+L?66O#x`!e;q8wnQs=5&976P96A2XN zJTCOSpU%Bd*qWP6yvh2~1|}T4mT6FL%!3A3@j~zJt0ecJ<@$jaDMAD}08j=MJy$sF z=$#43MwnEk#u$ENi0ec`!Sscuz#@W>A27G2&mq0~hIcI@T8used+&UwV;wO%>^k7` zd?Rfq4HW`rLfZw>$e zGQsnN{r;&r@1hW4lsj=|C*ZRH&j)@2r5ULpfeOOO z$z2?I?n?!=F`^oSw70yRf}~*r#w#X5a!|*4UOU*WqmHR2EfMF%iappP%;?m&kvE6O4^2mrR;f80leuOFF7|+y3a~ zbiBBHS_1d4-^pcg_?&|&R#$bOf?t{~QI_SXS-{l!;XE)OTv_Mv!364(NLLCE40VHi z7i~lgi4HsF42Gua3mqSqObqW8)6Ans*@bI+uv0Su5zT|?aU$QWnzY2kF&4>w?vm{E zkuD|9!WHR-1#hJxHn78tsbRr2pR2h(3IChd!$9u*IsEKSDfULn^a}nEt}C?+)n61V z-aHikBZ-chIf$n9WD=?(R@{sh^n*>5=K8V;-+i$FDaFI2N(t<-w?#c!vr)6r0^vm< zYR&F`(E7daA0!K@|F%zVb z%hLu{Yld+ZlVvEYgfS6-We^VH*Cd`unD5Dl?IQ8WmGYU@kd)YV1ke)jv$#d#OuuE= zKe&@-EZQjQFN!x=s?l&-?MA*fCAVevK~jPv{-g`dfTx>h02KBW-RlY<*i%lNE|kQV4FoCy`FReglkevMYO})lJ}R1ZKl_iHi4A`wV`ox*ZFE z*}W2lYM}Q^o^_RUIlDhD2l_Sk6C|y3QD&AmgLlC>>Sgt~6E2iS=WC(qKL~GX{ZTf6 zhj(86v-YpLob44IJ}_re5KoGr=o?$@Z<3`Eav#RWv&F%mmm6i>8P^?ds_YNN_r4cp zbGW=p&@hN9qRGFMJw^%fl<5rR@mqP<#G{=l`7nXqrzIJEycjeE`rU7TsM}GwY~Uh6 zxs7yg)CO2bw*3NNN*x1OTGLJg93%af&T_mpQtf=OZngGH-GZI%9&EaiRo#qRFFoka;l`(yRwg-BQad4fGxaKRY9hX zLLxJ&j1r~*DeBH*HypWNjCU{*?;{fx(zqx&qrn8FP&eCSH|C8Qp%* zr86a3RjQU(c-3R3VW=-yP_qphs!@<#D_DLf;97`?DHMMfXJ1IE3d4WS0yf%6Dxcly z+qbU=X)$57S-IXpi+j{e((?x33lD@A^j5uh2!IL&|J5II`FHj{K*gD90dOoTN`f}> zfnL3$-zc-UEje1C*!1hqfCxu2bGQYLgw_X6t@E#T7^IRvk_~Mgb;`fMYfh}SqoqSb zhrv*Y3QP0Ulbwl(X}{MA&PFXsLO7(?bBoE+D(b%z1KErd%FBVAl4s?F zM)S6NazS`re};`pOQ8uA#e07$LK*vnnS>6ox_)?6-OL&}sR8~`V($~?4p|165S7>S zvk?9AnY`iL7Gr~e0+U^T43)~mfDI2956}&zphh+rstA5QJ+{DQ_uT0L!v-%pMhTMA zd!McR?t8Kc^YQv1(bK)XA1c6)rG&p+8ED7rrj|(YqtT}NsQ=+=4x=zMR*B1c7S;Ph zo!X@b3uvh-yjWGL7CD)L-5SPwx|-hr9`H@Px8PNax8qf7z4`K{i1vbH8mJb*jp>0U zPClcO6wOg8O%j7^XFUANp_cDF?Q0P9b)}q9kETyg|D5IyAHf)(LU85d!SJYuxoWDwaT<1ym)`Ibj~`M{~KDr0j~zE^P`u{olglOBt)< zK#lVX!M5Z6jLFwiFF|lio-+PtdW+PD{rYimgK9jl+UALqvnQ%2vhb)9dT1GO5wJG+ zL=8ys4zytkjbx;BP$Pea4dw$Fai11=7j2iYlC3y}9y45)1|`SfXil|^;T&1VuxK`n zMT)d;V*ARzNzQkV21%#m()PwbFf~>Fl&F?DRBrI*S*+BClDAwGSG5=`(~dkYi*UrU zGJJlHFe)Gv+blk|fs5)A~Uswi*+D8yP z7}mjVWf;3;<=h@SbogpE{_9w0t@XGoRZ$Vq75UmeKdCz(GNnR0omV@^$n(%R3wMOm zVAcL^Xp=gYr&h4Bx8UnlstZMDBx{S>68w(7l6B4BO=>b1aKmXfkKDybL?WR}L2xMN zCb;g!w!;`!QP+`bgXxj;6CiqfX9W7rl61p)gqexOo9B0$1f`6M6qy*z*Ckj~LnUv?k))l-A`lvG8kxm7iRmPeYAzKuW23m%0aX5iYG-WC>5PYVzR#7Fh-}cDs}kA%+=J7QOt=c4(FCv!_o^LFJqHv8e- z!jAy>FHx*`5gQ<$K%-HkjrHO6*q6k*&uY1YDo64i%__BKFrGrP3^uB^sFWf{zs~Hq zFWo7+I}aDxOQ6|?$IpbITntF8ki{2;P#R-!Ur`)1Zdj!$-dgo5Ch*M_B;ZxQ&}u-- zOsN_w%1>nR+T)X0c&WW3RM6ZAPB}}WX@?!d{<)Ks04NW}HD+5^Xq?zne?l|sh^4vL z5t}uTU{#7RP{JGwd$+tpf);giAghA~OZjzU=z&ZgHTVu!IPu=O@B@#(#HP1(s6(ki z6GzR|r$#C*iSZ3efbqUfM&!+zZG9$}vJlJUF0xHfu&GNWc*f(;j8gSqoW=+`eg*!N zsr4rO0_{WI=SCTR#0*{(Vl^e=I&6kDH{$)2i{3v7yRcGpy@w|Z+Tq1^vj?Q0Whyeb zHrUu13CN|ihp}PHc~r$RN|oT#2V@a0B7iJFZW&Qzr944qeX{E5A>5P>H?TUWyFkf* zIKvYnB}tnb@9|g(&$JY$e@tH>+0+HIum2MJ^&m-Y%S(iIO}BveiV7*Iid5R*{@8yg zMO@QzMwpy=njDW6?=-`mb^Z#kc#bYIW`&H4ia>(cY}&;5va?SxCzvz+ZYd#Hj8=`W zh3XO6Im22EIs;Ys7>A%Dv__GJB9_veF)E|#G>lb+ZhlST#7;@$NcBhyt)h;Cj|b%^ z=jjclS|<&~Oz=8h`3+bwkG*wGDY$I5%p-1kl4Lrw;E<%c;84e*Y-PM&{gy~N%0yY? z8rz*L>Ao$o>dlUq1$N>^Np2ETq1;jXXt#+Vb0`}_R<6${E1lZATrsD`)``^vu$>^f z=Y!1?yE1%2exnHd}>v&s>1Ch zAb={#60GMLDkbanDZ?_z)C}8x6K=x{uJ4kV42@09ar@GuQ}Y?^pd|&#l8td+Rr{M2 z1>e2$qN`B;T;TuI1&dNpPJOa)Gni-#k0MV`{#Dg$C~LHxI}zB1T0&p3nf4WR--l%5Fzn(XeNet4C&SAf<3sZ_p=`jf;`aSC|l(Y_|VX ziV)|$8H$(r9g%S_Ld~F$)ylP(-K?7vY4a@m0?knqQ(rQr(LK}_U?n+yg$ z1XzvIwugH|C-79g;Y`2m1eGN$`R}@qj;OZ9iJt5^{ z&{Fsnedv^GbbTZ`s&o#%StL3c3R1{=Wf)(WwsDzO%AwZ__%b9*w=$*rLd^0KlLFo3 z{eyk64QSnV6YY_Hx(sm-wY%_ku>tAry<%QAX;brWns;89(su*YClU&Y$mE&yGwKab*oe* zuoDZBy0@#?8f1a6Si27@nl3P0(AWR?&SKAj%T_)+k18q@970W+A;8Kr1eTcp4S7t1 z^fVihPa#!YP`QZINVY57dBg=+{wWut28>cDVoOU+_O($9F-%wkh7f?{r)saR(qL3@ zRwhS2p83{qiM-cK{knMH<22Qxs?cQ?4q&yp8<0j?-h)(sVDCIHdvJFeaJkxM$5K$c zk+T3Gj~*B#1X@nZ{!k2QjXGh_XtBp!tOc8}OBf6_`UBamNK@ob1Do!tjS#4sX0Vux za6Jk=oH!kjDF=^9$wR*D=>^Od83vt1?w}nGQsJ58&kTesVel1R!bV69eQpw$=@s)> zD%T}_+!%S^OrJlOJyg0MSNBxP4J8bVr;sN9OwR=cDm)C}xS)$Xpm4yr!>c=z0hKb( z!Lx=$1@DhXV#?8Wj9%mn0p$2gu$@PPlrU z9@G}ve|tYi!ytei-c)K>`(?>SQU5E91AAetL&A$nDzkzo7G7dq0|B=Si#!KS(i=Z| z!#V1PV{DCuWnK2@c;YAdjteLHNQ_SZU2$fu?Ud`qrVnOE^VPs^*T{~;JOs>(??S!H zYLhR-G$CJ5YpoQd#~UlSjJWbHlCcS98QHEc-nT6Os(OqEMdi?0>Fz;7v`yNC-X|IcNfcR6IRloE8~JgDigrd>G@O( zQGC#XV=5Evxo=Vo{2hohNvoqt*URXB?)oM!fZ&cPbrN={u77Z4=8@9y`~O8$|Nn_A zjwu^$xy0JK{cSRX18YAdrnj*U)QYofc(K(*P#1oCgMc9FE<#?oMp$%=NfxUBh@A!q z@ZzNg?mIkp3N~Bw2UKUG=-Rn+04_-^w1Vtr;n={D7I|4|v$i7!iHhP42yP)%lphisS5 z{W70^gmP3Y<-Z_&J}s-%&LM|A{io(UXB6uehA|O7KL0&fE63x)-c#qGXVm)1koonV|-}*V& zyLK`TZkUAAyXL^d|0M695we7d!Fr1U;2qcrVzV>vAB~^{%K&5MZMDU3J_;Zz@9^!@YC#} z*tKFZqOR;ii9G_bR}Wy_s_B^V<2Y>Dza7y!1FTdjI^Mh#TM^_+oI{<8O;EjDO?>#ataJS$-hJzNy!PsIDxHg@W)YKA zEh-hhg2v}ck%-CUNO=|L$jp1mFD6MS<(QXVE{zvo`aq3ym*dKpsjR@#cgX>?nX&<0 ze%gyI;hFHJ6b}hCBY*=;bg)MoK3tAfAf6=Ga?I5xrxhRHY8fF z|1Mbc4g!dPPNbsADtH8IS_yXTIfG4G4&kStR$~3yUD&|NzI4f2%$Yt9D;BN7+Qn41i+rZ9IB%72UsBS`4@6;$}Xeys**K*ufpFJcYr5d>5#O&igf*RP{;g^7Zx zR=J{rPW{?-_`Zr#H)1uaR#OT7n$y7xRK(=m@+x2u5V$*GUCpb+7_%l!!IpI!aPHhWq-ACxT%%#|Vnf!o>&RiyQB-gn zMLAR)_I#vdUPrRC82Y4i#K)Q7eK`;z0TJ*E41uSQA3U!5unva7kYq-(!3L8h1NJP! zBqI;WbXIl-m|B)=SrWsTc?WT}Vx$lxR}-@_Z2k_cJsX9PEZ}%z5oR6=!Je3W1QIN3 z{8Q0k?tb*yBolps4Kcuk<0)9;ory8KgRwg%54)ms@x!`{SQnCmotisnGI2YmZ1qC9 z#^0gL$CdD5>9VeTU~m4~WVDxz`jXLKVlo_Ap!4xZpDF-J5Gnb?WLEy$3{v0!;2pgE z=3989)N5+g*t_q1jMv{OgEtA5m&#N@`=OJuFIbCXF?P&9;)AK%FW_L99iAz-a4hx~ ze%u$0HD~qkPP&b&ntb@gFnFeK)FfJP_UuJ0o;wGVNA}0=wLc-&?-&vS4#DHl0__Xv@)R489k zwS0-PAAh1ge_rNOf<;ogy!^}lV$c1B$G`L{3m6s8Td(7bDm785We@aPdd^$XJCAh3D#){)!I1;LZ4-1liQWpFZ(-D!J3k_>moUF}~ zES>lH(5K`hiGa~ll_XK+CD~nOaO5M|k;_OU7bZtGGV_YDj)0JnYCr!t7kjsDM(|Y+ zY+Cv=rVi^%MK~4M#*Z0<$&)8z^ytxQfv@V-tD|{yI{ZeB=zv|LuEgmz zY21R}x1#eSB&yd#^=ftL)S6NaxcWUrWk?g2I7S78mTlBzMREAjVJgZ&M(GFyq?t-a zYPnP3%Tmbld-D5YvP^WdW`sqZI_kAS1A#;>^(x=XeGyYDUCR3>4%V$g#2G8VJW)6T z8gbMDB-aXza;yNMp;9yQ_sMk$Xk@$0+L!%h@}+zy&1Z5BxnAk`m2=A9EGkRRA%hRx zeK-n^1caz68R^!dc`J1;$-pc3My^lxm*eD|vfaI4+CQ_WA@VHyvOI&P^5v-PzQUL> zBQR?85d1i63eKE3goM~IWTx4Wn~?>p$&PDIhIjOD$7K4Dzr&-c!mNP7$6y~*I;JgW6Kbr+@$Zg1)CErTaS@vzXdB{5_R)2 zyi0(eJ<~D$Vg`ntuwlDZvOoYkPp4qs*?4&51EUY=G4`kdgLcQ@B){{gUs!V?0|O2u zVc-D+LLy5LlW-5SPDNtM;c#s9y^Bs0&tTlzvuM_N0BU|z6(9cnEtRT8=Bmit6q%>; z{PQnC@`cF+Ntvrs`h$<2s1Vlw(w`_5Bg2nhEA7r&aI_gY1huTkB6C@s z1&`HwENZPR>AaU^rU{mG2AW5Xo<@LwFdp5fV}5Y|zY7+lL)3}@z>M81mtb)E<sILk~qn9&?AU z_j0gr!vgf^(h2>47zOW;Oa+!0T?VOa#=4VwEW4D2l`;46?Lj@-p0%O;`apcX+yl*b z`eWj`Xw2N_fojda#^)8QD6qWs_8WNVjhFG<-~Iszv6r8J0q?*4j)I7QMXchNGTgWv zRmd2# z-TpT0zmkZ37b9@sQWW<4S#T)Oj&ZAZW8;NDT%v08BUt652m)0&m=I(q`!RxQF$6NX_q3+Td$L$Q7F48;4K z!N!g2ux`^vtl6+0lV{9EVzNbz{K?3_g-k+4Ov^|!L1%=+;efB7H`cCRip2|NVd|t2 z7(93|e)!=B<24LBu zpRjM&W~3w~!j@u&EMZ?43!t5G)zAG{V6lkYHqM%Oo768AUqYS-&mzo3Jx@ zbeS}L--Ok9o#m7uO24Me?0Ae6%L5dq-9?tU1YyMwaKv&AlaA^!ouK%3b0j8t=7PLJ zND{Eb(|~1xR*WN5mWNzNuT8-?k>LW%vQu{S->1jWBPIk#6eEIaVAjb<%)h9|o(Q1J zl=B$B_8c0t>y1k9l*9XfrQ)DEd0i4o5+*9iv4 zAiIzS#-JrIrel1+&e*g1N1l&i$Aco=DdAJcb%G)v``7=B{$1N((cD=uSTm7q%R*9$ z4GR}8M4N^cFnZuO$g(B!*c-H4E_;*%kHhQGr&~L8@7^63yrU7LcOoH)&W;Z6Opp^l z?~B2teNmWr#)KImC1|n62OT&1VUBMq2CqGdvCDR$M#FY$sIja)@xfax0B=Z>mH_21 z_$yzG0f0aeT{)*=anHOGu1@BX_ zlz#6WRIODX)!Xz$uLXzDaKu`4{_!ZbM_$KHF9Wum2*m2$=dpa-DJDWa{%kfF-qv&*LWVXC9-!Viv3dY};`d zLk5k(l*zNOe)UEi-g^)$7cNmv9P_77$HM8;uw~g&c%MFn?c2BGoW~{j1%+Vq_C3&> zQjwl}135+akWI@gmUKRhW-O^N7z~Jui-smP9KKi2VeagS7&U5?f{R4|(q1nrK~#h| zdvUtrMBB9P!1t}ux)q%$;nJFLY1NYNTTA*C0flSci6|EtF8p1$p2|7P+?4L$eXro7 zns;b!2i}R!T)r1IQoD9-rAXYr-LYdw1-3SA1O`pjd)Y1!5|{{B1Tb=(G>Zw)1Sri3 zLYYh{szYER0|H!4U(H;j%Lp?0P8_=c#|+jjKw|W%-bnpJXI*0r%VgdpJ5)PXQ8EH-!88{Z?-$V`_O=i|TWM)5tGwUH8 z&^<_cCt0do*73>8e~6s?N65{iLdsjEl(_aWDd5mdA*rE1ByNh40rM#?%vW*v$a5*V!agi!%!clL`4@|*EJk>xVyW% zySr;cLqpT<<%w5O_PSXu#~O)mVUDvUnh!lfJV z_V!a#*#D3B3bSTD5(iX_G%0{*_HD$Bk^Qk}&1@9sO9=5&uI@Q0`w+#c@z}O(Dn<_M zfjwI`AW0%@oi$T|W#7Ji7}UEB#tiL+q$uD23oJ*rEzeSi<%kqAZX6M;sBGUY_ERQ(k!_3EonR*97>T?VB-`WPRHLiy*r@2h28J-am`NtQ+J%QC>vW#hP z1RA~~VS|!#5oIbwlqk8-*t95uz%A=Y+AY)8x}3Zh7B8V`T7lnL`31L(;aAxHu;TJ;>3x{c{{4Y=*0Oqowhv+XSQL9xZ8A8 z*8U5QC+Q-Nxs$!ul{ivX4>3w-S6>clq=Theq0{GgI(k+gF-oUXXXO87&)(`>R7j30 zF2aMVg^FarfB_0PG%jcL7`GvK`t_rNU=>)22%YQ`<65a+aMI2fFX`?-Kqj=;p#g!@qs;ir3n?fyE9J$ehf z0<&-;;VIhhzKp>Vu#GzJg~>NVFxx)^{Z9H~^3L;^bNB`pJNaX0R0ej(0nO%~6NPXG zt-l^2?|5B#|0}6B6siwG;V*BA`cPnbS1A_Gx5DZ#HrBIe7{S8Ed$zMM#~AJXzy1mq z0_olNKg2s9u!^i4KC4^{A60LT`h7-Y)b<;gc+3NnPWg)Bvf`{ZAB)a;VDD``JmX&B zL39c{qmtnoYJ^`*GU5!GICJJaej40Gd}?1rdpRkvJkJ-UK(Gj3ZeP8DWzz>@+>kGD z{Ph(-tUl_7^HSI@L_ERxZFjNom>tLM7Rj+tc{Hk}NAaB+20fDZ_XmY2T}w#;H!GaiYPc#O21Cy3RUf2j)d^Y_N#gS)VC z-4aZmFbreHjKT2X!oo83_9zi zcu;vcs?NBcVBkFvKwM6+usw%LiOba>PEjfxfX7kbO-riVR99+&E6>A$dQ?ap{Q2Ke z6~^C<#@c{s(~3rqr({KEu%qjOvA8VQw+*`^kIn;h+EbhXT_F0+kOx{80A$2xUL{6qUgzX`s9R>X=j@p}+~P+tw=1S;-+u?UIgpiU$F0}_#>Nrj)g zFJ?|2hoJ+y;?$m15@YKGC_-DYhqh=O-o6Om_w9~Fvu45DJpd+wk;PJgNb!qXHf+O> z1BYP4;(5q1i$7)6mDsD|LfpP`7NdXciz#D=sO-iZ%c8Oyv*BKTTSpQ~ed?oMz{1A+ z%U7J>=Nl+cq4N1328&ge>vV<4NY6)_#f(d*_G8}k@3D3LBwV|&MF4XOF1Pl{-!rjb z##mf9eG)n;6}Hr$p*0lBO-W%gn{oEoNet@O3qOtg4!gFm!OiQZaO3K6ET1_RBL;NG zs)e%=;Oi$Ow;(J|kC-?UqGK!wj?aRxMEIv8mq#;nZS=D?duDC8r7BUYg9$kX06enT_60o?5F}uuNnJrA|MOb11-20sE4~a ze9sU)yrMJV8JmSW;buIDO@Vhp2D}9@-crc?#DYZ{Mdk4$$`=_dFi94; zq~|`9z~P}BH(QRGEQQvB*tjSJ1$e^g`WeidJ>i$CFgj`WFrwpjs0X%DFk}7C7MQ$(i8UAE3#_7KYyyhZ3@Vx@$P|EN2{cj#G%1{oRLmmZ zP4a0Fhow&~R*p+2P%%kl>;Q|_#zDJJp*KE8lKv?oMA_@CuaIhb30+(fA_OeqrpMwp zfDnOAxc)Js%uf-LR3y>94W2R2;1W^CD;xCV4+SqR~d(1bud1MO`J)EHPy#tr?d$4@=aLk!73fIn^gT;^v zeNsA-k}?GBMR0TRz=q|kFlEG09NW1Cfv)$E6cGlu+c&Uq=44Ep@I9`a+pl_sFX7dwVxZr_JTMlCJvej6+ zas}otn2)V1H{r~Ivj_`_5yzG%4wnNT4G0WQM?jE7`ayBxh>h@xOonG@3fuzI#c^lL zHd%1>vB1qY2^+Q?6(`VLoSa0NO3OJWwH1sI&v zC|01t0g?nuVhLC@VoBzFB=J+sATOy-A{LWGAhxXMss~PjY#%TCCCR!NZ5E;uGt_aS zG!g|SKNRJd2`$@I(m6maL*;5p$rP|ifl8I%IJ@wrs2Pb6jaC#D6(K0d4_h{`!pdc{ zuxS2d%#vt{aAB1ctHS849S)pMmsLh>m_EO~IQNbMkhY!WxiNX90H|dL1r7G5qLZVe zrb8w)*r-m}*xM8Os`Yf*1OWlVfs8adct-P70nFP*XUZxq{#I<{=lYf{3A(m+r{A`n z?AJ@+Ggwu7@qAPkJg%yq5{J#>v2mPjBveKO0XrA4VO~|uiIeBKc}^-Fo{!rR2&y+* zNjr$@U?AJ_dI=~;M*xS)A*i^V=jHuTEwN3BU{&o-^0&Rp?<=*8&y&?@>X`^!xzC#r z`B%nme$NOM{%+rW_Z=24nu{6JCSd0D395s}g>%PYvFeeMk^+s+fb4uK*rx&%DwNkS z3s?-<;)rrMmF;s?4VEs-B~vUb`>C=tQN1Zy_8wpyYhjXd#qkkF349Equ;Vf%P|D61 zMNf{Bu z;~ozePmKU13GO}y@n@s#)7FHU?{a56%~A|h-EiL&6>xvN;d zcqvvdoP$Ff7UA%Q#aO#$CYG+4hFdp15EE?^m^?v3qWA}`sLJ$LNRpu4$3Fr4_npA{ z)f=#B)hg`RxE5=cFT}E?b8+G7Iq~OaH9%5zIhNmoP-6W(7shm1()_6x}rtr z{+P7pD26XOfPpi2;&M>BN{#IuW`tj;PMLqCRj%14$|V)<5y@~5m-PY}&VU!1n2iXD z-lD|*2rPO5hQ=t*k3DVV*{bgX3_>NzQYeK+USJy~?K4^SQ1t-eG^BcoP;6N*kd`4Y zwJi$;4_`Xdm2z`bg%K>O{X(L9RtdFk#c>wx#X3v8 zcdKoq)C1we$Xz*0`Muc9md={XJ9T2uv;L|bg6o?%Zz+)Ls2u#@!2%3fPUS;TwQ9wP zzp2`vZ5RXskHd3P9k8btoxG}=6Clxf6F97v;_(R*e&>F?FG7K3hXCNUP^qY3Lp}*0 zf{1E{%akG$N6!1;Ik+v?bGiCko&nECVDVY-8hVIQp*kU0xsJ+)=i@awstX+e`FHkP zko?y8yRkwMsdp=?cXU6tH?tlyNf4 zv;;clELf6rVY7-EvtX7eJWiaaCG{ynjX6jVMHDK5S+uBprq%b1&>}!*gP%4Tq0xo# z56woPAsKEl8bnBt78(5zI}%=?%Z3{YEUnx2N6qRDQL{$fl2P|G`+Ls>lgtxFv(JZL zLw%~od-=}%U|dJ#!hH!6Ci3J!T?U(oa5YIQJs#xev)XCNpl;}@`m z3s?fYq7WPyhoERJyhUBP%C&k#N>Irpl;P=!iAj_Du|i``LrkP>>v13PqE=!&Z^7U1 z780~UFo;UgiEm)`bBzS*oN+VBD1pBCSE~e=ndwD{jf_J=L9YJ{Jl6Ga`+$eQq&gQ&SL~VuQc# z5n?h#!Po$;>1Q?JOsrm_kp!JMRwFFBOz7i9;w5GxDn0|=9KWK;N3`~({7{dC@LKrA zY7h{qS931}irfqcFpFd}!OzbG-yl6U?Kpuhy#}L6Yl#fobwyioY~8y`l-ub`t` zE0g<<5R24g$~|WyHYp2nx@^^upCF*onkBNc(6U5<@;AnexmU^m#K9Gi0sSrvHgM&qN<<+CoHHAxR0alhx^!}*3S+m0f_zFR801Jpm80$ zMiY?szwLR-cu%a-B9sU;?$358su`Y(_sjEhzc=rh=VTeB@jI7s-J6j3SH?1|Ou(v^ zsp`0rL6u_c$w$>fu#6x7lWJdCvS?Im`kT zL(VHCq!mMa5sc!9^y0|UvR)#Yfv6~%WHC$rOGGE%9C`nx912vT#4kjM zf{E3N1J;UqNfM_VBq~3u2>$T~@e4Wx2j~$Vn1gNMkI`}YMQq&VEbr_9G^)`Q4XV}u zRcX|$t9pDnQn&DL0*C7vTsoF3lfTt+*}hH<4o&!6j!{#o8A7NwCkd?65Y_88#pkVh z;ESQs85jXOh4? zXPI!<CfeR5wywAkSamH zQ36bzR#c6s!EAxNN&G~-JX5C0r&=+kia)SP(9h~HS;mHYTh2>4=C6(S|Lp@L{|GDz z8R@V*k|?I=IkZy9;)RxGfkdi2Ac7@LzGtKYI)R2EMZjXnLZU=Iu_CV%rND;UUO;@R zILc=Ti^)TjI8cp69H%(47@ZjjQ6|KM8j%>6hIn0`0*iZis)9;L%#%L^ORz}c^HD-xl2N2b8lCmz0m zi3kptLLZ_-pj_L32`utV_*|m3Sqd!i|BGPB5U?ajG#Dk%m|*enaK*koo3UcqOp*A* z{}3#6ruMGJ0*J0`obG{kZ8;#2)nBqs94s9#9WH+ZI(UMCkvyF{Ke>!*fsU6T>LE^* zNh0Z3JBY*X*Y_KI`DGt*xIHAYxBsS82CP16Cm>)jUmHA{#RJd!-x*1cHs%MTNms{e%#Y!@mg!UMD9DV>`?d>V{>M`}+3p@xB zerMGeO@T$0D&Je7EN=8Z147YRk`~@8xLp zIv4L@Dnu?7-oYeE*GYx zVua~l$o+Bt6q_guWWTYdLWEPj2w0dMS(B8lppqtjfuBZewo2Wi21PQ* zBim-#)wrbbp4DMgEC%uC|NCIcm8eAuOj7PMQ7kWD$t#A=#xAev$jUE5P9f91WI!*J zG1=0TW#$#i#b-gAnu{oLfST-QqFe+<9Ec+&)ndzr-jWKvHCb-f21Bw1DP}87S{?K{ zt3>Ll@Qq7>pK`u=;*>MwZ}tY!!7s`He{t9W!SWesgl~WmJ^=>!hMM3SkcjiQym9>M zJ*?k#6r(21#gHE-p#L|+@uftyUBv0NmB_bg^ERm8uo-Gf#8J6Q4U{Wi1*OYWM47Uc zP_Dw~s3gm(Q$E*gjE0=>tC@WiHtWGVcaq4p&mesB?N9h_^el{ok2>e1LE$|PLf*)!?h(I!=Bu#dx$mOs&W^!f~UkO+=oHBsfhuPjjuw*N+ z*i-0>1h!;|%Hu410+-}$`3(dv@_hB2=OV4ZZs`ITk+XUMh=C>nfk7e{Lsl`;(;q8K zli$={MBPKpcRf&X#1t2CW0C%0wW8R#xe+U-Bf$Gn$`lt-WnKKoM zfTeAlUz0mBN>|lkvX3KOit6jo|1^H*GOpt}`1?7km3VxDj$NAxHLhnbEjnjH$I%;%uwk_rl?J~P z7Q7zr!)xY#Tt-OJc+ETq?~~9{_bT_u;}U4x-T_tKn?o6~+K$KNHB#Ns_?^qti2UDx zRrj486hwr|}^r@3DdE!r4wQ>>8oj)$`z8ADf@e)|b?;aZmGbj4Wdjf0W zYv?4RO_abxCxM4iKx4{&2@x9t9Y`4iQXT_I0v}FU94i0{ma-Jau_{jlNV43=Hxcoo zIymjQIk^a49uWxejf2%x0ITsK`~(_K{sOf)acuEVq+Gv5oL+o|K>{P&YeeavBT|CV zxWq?NHj5;H%tByzCgSx#Nc2ni$$QTlfr!L>1SLGh?x>gOvBnA8F9)G>uOCslVl7mv zSWT%CCY_|QDvS_O*^aB&vm6sPT&AER(4jei!$7lU&1#}jWV<@@cb$5wDvfYa`&6xs zO7$gJk|6WP-M7(n*;%yS<%;%)ebD)|FKTVPg!V_H(D_t68gF+;_Y-0G@oWNGOg)OV zSG4dKWy3j~qBLpHCbGTBgk)_hY`QdPbQWmzRwNlx5Sw5@Sfcnxrg#!agzIx9z!$ZV zBJZv!Jq4BYTqLJ3g_c!ROdj$cK3AElHS)X(7WN7=i_#%jI6#u~vHXvwbonE&n2JQ| zrpU!*6^eW+ln7Vkt{)kbZRxQ&{$L<_bXh+}d@lS2mofDxl6V$}Fq7(Z(jmTWzVou}@@ z$w#lcN4oeWiQG?=!f!&L0L4dO7c7wZL$C-?BG~9IP+^v1M>Uv63Xih?VX)+hvq&<@ zbw$RjUSVF|Za8=55O!=^f!Q-g|1ntDSS`+#G7+|9DxNv(zFS?4^xG7P#razH{&&Mf4jX27Kiaz_Fh@` z26ffGBIhJD9L}FrWcK@Lt9rR{vM@S-UNe^yLn7%gfg0g;Isq!tt-?cqxS%PWK$a^V$|49{p2+#~b|iceE>*M}zN zz%#@u>oRe{GaeDSfR1A>Vr{q?X_7$n6|BrdmHZg_0+<*H6f;EK6y&}{1_Mk{CI*SN z<1=4~Zvj$uqK-7r6;#{<%(&yOfoC8)>d1Sdc`WZz26V=sp)ovztCs;mk4r@Ciah zbfSRO1idK}F+%fblPEY*AaTi$1QgGaWGsT&kRySh9?>xZ@B-z zH5hw^QL%6w3+G~CzA&AQ>0LxH{HMUe=p6M7#9cP+#2{Y!D=E*}2?}XhOS76SR@t8M#3YIOLj}?m+ zV$S&Qv3cnX+_`=Q3GoJrK=Kd}nT9Ya)KLj(@Q<;=FIr4gfM2*AC&UczU=zH8Oi}=i zxZ{-oH~GBllOPt4Q&&B)Z2dt@ox2{xf0~Vf0)(&n4n(IeUkWVRqkg02s8LJ6B89GO z`Okl`auurzT%=%$VyRQFiNK{5nzfK!^>X_Prn3&MOY9Xnu>_9G=xW_BRq=_q7|qxH&CJ_PnpKb`BVy!BvM$PA`oFOn^b{_n30zDP<8cWhYK?;gECjZ zB9ThE{H`2LohndC;b>}F#tQ|PLPnm(3;|#a^m@HG8z=1By9vvePQ#ed1OE^#bYiON zsjc0y6D;f%<^T(wGaa6NJG)Y$!&8p8Byx8+YdTy77IBo^j?1Y^+PAakA>%Q-bm}Ql ze-AkpRSF@)^V;oK!2D_sr%s1YXHHl-{$``Qa`Yu?f@*=PiQj3w4y9Ja2qZ^43XKYd zfAe_u=U{j0yf1Z*lJoEw>OM-K#O2)AktmbP_*`ge{crwu0Oa4)QI6UUFl;w5viW9LRu#&L)iutX*4L}?Vm_V8zz1T5YX;N1D#-3oJhN8tctc}UQ$g9D4AkNi08Mv5Gh|Tw6u==t;R$lVMa%T-TG0Ei3VC+bK zjw_;+CSD1^(903%zVAL}@4t$f`>tU5?I7%wcWZAP&}QK!%sO-z&3g|;)$+AawL&$O zSd!|*-W#mC8fni#ksPa{dW5}M6{f%i6^qVC zVD27{#-{?ygDzSFU#H8sbz~cykMDr<**&;*dKa88tbps)weWVj3#|mzNoIER$v~Vb z7siYy(2K(Hy!`-s*KfdvMf0$9(M+sZH3v&q%*4vov*2{)ATpDqRR^9_CZ815!s;=m z&9}%hT}rXNjqE=K7S0SQ_khQbfY|U5?AfvyqlWenn5;lV%zdP1$4XRj3rF{@5@`H@ zz1y}RP?UqHIdPcJVX{3$cvv*Hu3n76Uv675?>H@1?2SZ{4wk(^8;RCv2(oZ9B z%jrI14UZ5k6b}qHN+gx>hhXstHcND4!7YziI7z`iea#E&wx7hjW!o`&{CxELdI-Ap z?1R=4>DFu59Mx;qN2SkeqFjZlC|$NPDpabD@*0+QrE1Ph_U8RMb| z76A&o4l_Nz){rMM*bbHdNw8!{Bxy;>N2EkNOzGm|>ke@!0&kbxG=ZJ6L{&4VQ79qY8__B3P8;mGkkuG*(-wF2p5@MX4(>e&;f7Z?D?2 zD=(@W{_VIvwU2zhxt}^VKV|uw)8ML}T)ba-CfuLfus53m9PhQ{8Sy)paoul0@>{c? z$9_(=jQ95jSQ<5GhtYVQ>?(^ zpOmTKBE<*B+@Fyo>eejIJ(kr}De`V-1Ls6d?DaFjM?i5h+=e5f*tLb6ujyxGOZm!3 zd5VNoQ6ushn_7TSV>+V6k+~ZRG2u=q2A+5T7cJmp19o~OVXJE#uEgfzw7fH0yi>5~ zfey_#p2RdCEzU`hI`)DOM%|3ZH>U$|M&A8f2{{$XTZXfris)|&U}R@8QHjTWFHoc`WEv>3`SHi2hzyFOUxMPj+K)} zV&T{kxO)7gI7rR|P=pkHKJK2qj-UE;#Gv+#asA+4AX`eP$Y(r#joic_EF1SNdbVnT z4a+toIGA1Qenu?28%9_~`lcgL6b$Ez_6@Vo8|@iv6?I^NyO>9i$np>yoZS;}`#~%& zTo1suy_d0c^+AlEybNFU8-z|>d!b45wx}*jrGluEvV@968lMp?@;8A}MpO%}9O3f0 zL@xrDT6G(vdCN{{)T{$Ke>oTfhEBqWNlP$&$xf`;b_U0;`UzNKaKnRO5zvLmbxDDD z_e+9ruwGyy5;r6jQK4xfb<+_cV2OAGEMZzgB}ZA5040`S5vXvMJwk<+V1A@5(ZY!1 zF*x&{-u6Uw|2C%B%_I>bN99{sZz{(08FqW3ppq`XZCaW{E@>|XEbP@+k_Sp&{;d4h zh)uML>`p*-b~fBS?qSR36YJWPw`R5RROj@9~Cc&Ir|S_oKL{tK|kGOnXi;Q4qChck9u z3y<$uPsh)yEJ8pn7wA!?sBtplaqv@BTgmo32G?^x-UC&MYI`XGoBjUm zs)gqw0vNx~!-`O95rD>zaXx69+M*cVqvt~?DV3{>@61MHwfGbze zO5kS@rK~};s8xNIl)G#RP#(TUfH4PwVllRSBxOB@QC`{9Vu6Ny21=lLKC}>H_qgD2 z>_ddft9)4;>3%;QqQzfmQlAM}enxKAOJuNVEj z=ZWc;gRnOk7_!C#vyQoo0ikt-s>!xBh{5W&eM^_dY)PP#YB*0nxtXI4l&Y?;0(Mpgh5&Ioa zU#y+`9ahd9g!`9v;&rac;hvFc(&NO=4Olbn2W($B4(^`L5^!o@PP2(m49AA~b1-Fa zKdhNF0?EN1c>OpBub$;0FWZd0yVhYy=cbtQ?U#7q6Q`=fm^MGr%qh;FE4U=t7<~Q* z!D5n#!(e-gG_4MMS1!i%EsqaBDT{x8Tm~PNDu++YR8oMcDC(tVou;T+w^asL8z!- zmUF$TGGcX+fP^{6I5vjem^-u+lTW6MVHFvHqZHC_z`|u*M|H&GD>cAtp~L;<8rs@H zBA;~1>b!D23PdH2n&9C*ayena>*RWNH|F))!BWx zk`0K{CqW~>eR82F-U4wpk3>aCbWF>X08rck64IU_0J=a$zsmd!v1tOA$3T=o=2%!h z7Tk=+9f8RO!xQZHO+uWgmjo%B$)-Zpo?;W{uS*iYqU!Y@B2LQip?h&?x6cLRJkl{~ zM>yQ9z&`JEoQf!fr+nXXJr)b^reOa4RO}T+GyF^h=AVtjxIMmD6AAou-HiJ|dGL*S zik0&IO}XHYZQjomSY{r%kNRB)qH5{ts9v_JO6BtYdmk#e{OxaVt9)Su457iaEo{J7 zU{Srj>L{>qJ{IN@V@@$bg>ZRW_IpS6`{?}-@Y!ddp<<=-s9LQuK4(Di%}6Y|;Du%P zbQrwP4Rf4zn0PS^qmFpsfOjS~osY&Ljy0{2Fw=XNO%pTSom#>~eqFw`QMk?-kx?|$^Lol{qPh8)-S+=DQeuSqF zGq@xCyzXG!fUX$Yy%kPhdZ1Jb$F?O|AFB2hHsEuPr#}Z4xz0D&zkKyGv7&fWQ2ZSJ zp$P($XL7+W%hT6p`TD){?HpX0r<^-#T8ca&``*7|Fd>+&P&4_}7Sdv0Oc zF?V#Ez7sodgu^*ler!L3YQT37HNiuG;u)W=Qe_84nh_jj5ztx@8k3ChxD-Stq#-IX zT^UEqJI1cC8jK_9IY3fl%2#Gd%Y-?VjrWBxq`gLz;Wae!a>vLEXq4YZHb<282{aOg zB<8$CMEcK&lR^|Pz=)8~82NeJEKogn;^l808&s2@B1u4$k^2IfIgizV*T}F)=roCl z3=M*h=RI7#bP5aRPQ_1SMyXt3>|Io^UPE!_CGZeM!0yDq8l5q#c*McAW+Yx>Z&XvU z`pQv-rBsDlXaDZ_o2HaVi5j6p|2?yVf=;%?!7515sf&Y^b#&~%XLQKFIA@20E^*EZ z1ahBLOwF1KM4ItDcGbjBE_d7)!N)W<_Ub=7*r>MNbodGcJfB)-KaT?t|IU;``yI1C zKfC>__4VsDMWu>W(W_T4j2is|ei+&hix*A9rHjYl@8^oRxM*m#de!?VLxRaHDJQ1P zCy0=!`obMw+>0u}#lQ?)5M%24yAo9I5$}H>FcZ5(TAYb_h&xgiPY0)C%heEg>7^{@ z5JW(t1Txx;CrHYCiWmuU;>7++55VI|%(dHNuYl7sa>R z2dr{F7ON;1&c|YsXu+5+Q29@RMVBH}6V>ua9GuIUW1>2~!`kU%kQ5uMZsyffc?|OT zELn@~3#MW0fUj_H^Hy<|dCGK_G#ov40R4J4#NfWo@xb|#+`WWByzb(cB3O*rxM(tZ ze9;=q7OsZBMELPZ#fXfN=qJ(ihhTB>VSX+PuHTOpi^1hP;n;KZ4wkJyj?t4>;p-o# zp>2=BXwv3OG!(ehsMbV5q)M4;DECnXl>MkY%6(h`lg!z+HFy(d2iJJ>L=70Fc~$5%tP-bhw;-cCk$M696PRu;ikV8&fZD5=dXijm?)_* zGu&eZHW7awERpdV#OsVIWs6D5Po#k5hKCi$u0~_;nIK%eACG7Oe~d&T$8P&$=VcEZ zz8it#?mC3Y3r=US|A8L6oFZ}LZVc{*rNS(5NfF2xtOZERd+O*MFw{{Ws z?A`>OPNTrW_l=~hvec^ z{4?zI&%(;PdTbQHtd~e=vzHC06QAQ;_#=3v0&C^?<8MY_z3ltbQ5VcV?T#5o?_%D) zDC~^M#Q|+G`fk0fz|y+gx2RF2Dn9+_V|(&R0SjUBmZ*-uigB_pf`wU+e>--C>P01? z{Nyv0wDKPUly?OvfB)bu{Nn>rEg!s%k3arU6j2$}sZYBffmuSVhI-8eXDUSqMd z8GR3Xqt(va=yNU@OI$3Nf7Bo6ulpc0Dg|LtS%`|wMNl}$-`&NMNdvKb>bD5?5$RM6duPDmoS668(pT zi*pV&BOrt$?TzpXFu>j4fCv71fr}0<-WptX4#qW?P@KE&jcxlbVCkBD_-WE&wCX$n zb((iUgXW#lymfapY4io^)og;=RqCSBXP+y@LaQjCsa&xx%2ud@QswKQbd^S^T(=EA zsoV&qYqUbGPJ_^5@Km%Mu^7E(ZbSe1d(nRMO6i;>hMyeY@CXr>C%EDf4;M`yoXth35EKrG&>Sk} zUxDSD%(XS7m5-tK)UR&mzSSOE18!rLw3wgEkdenlbZS%dSd~i z6SHATeTfY55nTUs#QS%ak+9$XZl!{>eV_fsn z;@CIwmE5P)J8z-fhyOt7(xvg~r=NoJvAi$GWOW&<%_>)G zfSyC9;FPx+7vf%G>iKx|+u@F{_xWJHTL$(e0aLF>V%>Fr+=@xZ1G%pUvFY&Dq#`gj z2CL=|$J9~XaA?~!Bx~-8QW2^5IveR>&N#4S490!a3+omyhM#{V5|TJxut);$3~XDs zQQ*-BvqlbqHpl}ni{%F*l3qQ+r3;7Azgq)rUO7p8j};lRisM++SQb$)+GKV$ekH#C z*?$f!CUHP)jLXQ#MVdtiU)O8czHT8_uUUx0M|a}-&2!kbX9JeZ8HWwaXTi(WS>+95 zJ!`lwPu2aWBny-tIAPtA*_b|II5tbPbo}5p9N4uUbH{&;jf=BAG!nS5I;`TSl~MkailSJmqLM(Re5HCQTcsf?)oO`aO}hw`x}j424ye^}5ZVu$ zi|*4lq3_(?0+;P*J7Ou0+=+p+zXi^o8c|U?_{jCT2kPJ& zy3^hWGRf~<2sPPHM!x*+)@*or`XM4L9L`SH1u8qRbL(0xoIB+|4;DuEzhi$EEdR%G zXeCO8PMuX&zg*WF4%}|`YqVE^y!^LzGNko?vh&x+T? zYjr$l`{2Oe)BsBl|Vw1s8fo?A^_lIUQ{d0 zXdD=4MFewP`6uF*XEaXT^2LEG4{$p~oVs5euK34c|8)zFDVav=yc&tPUcb#$Z+7(>AbrV;eZs5k9 z+lY!!L~5R>oQxubo5d-L<6}l&OU5hYWIjbyL;@~czJ$Za4&w0f{Wu_CI(K3}f_z<7 z0>ngv4c@VI$Z1kQ^AQ$XfT(a2BEyUb4>2N0lz?B5UcjOguq44v%-JJG6oL+}zOlIH z8IDsIZezvT?U*%h8Agp2h0(D$8nh6#(xw~Q%lB3-36_>XBY9yL`H3nUWEyR!+n{oP1 zBpw7?<@^GZlHOpR{u%^Otq4s1ELaltX)uaf;lQ(?wC8Y5d4ZLe18_fCo~=ZOiSmqn z%`cEt3`Ax@E#KyC!H>tiaXM8%a@UAEqE;d$men=gkUg1OsdKW+L;)$K4n=cz=j zdT2BnT)TV`Th_0{s-<%)_uMA@The&;gBI)~YhVF!xCesTD}XMYAP zR6PO{LgW`!q4wu`R>e`p*s}_-OSQu~wC{?J9i&Xjcdm2Xm*Y7&uAhzZs>-h9c#a-p zR7bqNe+82_jbns<&m7Op@eFwlZ$4{BiW|yvQ8PCXE zoDa>wgsqpc{YC(q^csSORcoSYjk>?|`XV&gmcqe}YD7Ip+{-dYsu#6Qb>vF^}WEZch#n@+ppeoQ8= zxhG)faTn}4^#G@@2H}DDhfw;pa2x!CjR=$LkBikIIZ1;cFIQX_D4aRI566!m!if_{ zarVL)3EFQUI4Ba@1e*lt#fZ}vAkJ6>OV(@XOrrdv<=u9=kK;$=_u0D-dv@-^fdhMS z>((`xELx^&462aG|3p2JY5>yHX7W0xPsz6(BZ4YarW5G-B+S}`ds zB0&QMDt{I%25XKy;{s^1e@1|)z}v>h*vhsN^Gk$?N(m5c~8PEh>1@}v?fykWJ7R#G9nY1 zoG}%l@p-?1WxRl8+jW05>@g7aDpx}zQ4~zUVo&QLfT%C;c!MVDlcVuD5?^I77Lc%w zg+|aY+d0cR*SDzOOyJ^xil|NrHmMFF_WZnC%r4{H$&hCF2QB5jvfSBQ|PI5Hsz5%JlG6~IL6(-EPQ!eUH;&X9wc*i_|sgEaC( zNCESd!sZsACDJ$J7qEnc8WA9H@e$g41RCHfaG^a2Ou`-SXiQ(Q7Ogw=LMw?N+qCNd zPF>3hpStxLfY$B12z#e zIR{5~twVtOZJa!`3ybE@#H2~%F>l^HBxp6FgbN@-MRkccr#*wt`beDIBN&pOAVHj? z!TJ~)P6jCDTcZ>3#AS+O6^l(rLTm=ivMyMc4nHZM-Vr8&N;*8_t#FMtAW)mCIv0e* z0m0()!qN~OlZ!aHhlp^wmtYH`Vlxpf@bFK141Wm} zV@z2B-5i7^Wgya+k1#`#_(@TF)}IlV{6hTkV`xo9&>Ph-0H>8$@?8;em2S%OHWXcDqeluL548nJC*{x6}R*<66Mw5LcC z;25OvgzIvk&3J}5+e0K~JVBsI9-Ktm#uSN?jRGob0piWsh%(p^XGxR7lmcy1j&i1< zx=gqyrHIK7p~;0$e9j+&#Z|!K>>Y*CQx>9b6M3mSbVGNQftF4}Akwurnu_CV(Yh1b zf6+}j#CEMa3sidJtM2{Ku}x>RX(mynC>T0O_EKsl+i;(j?Yg4l7hTYa)gGOCqfN&? zsMn%9YBUwd^c#yYb2ek@qFuOjCtSc{S1g{siSUMkj045x#d@>+q8D7@cIOlK0_3%vG3`s+H ziUbMrJ8~4YMuLIltmpD_r^DMXL@5?Oe;*v&w*#w|&B3_Q-~E3cENuUvW9GarOpnjG zU--!k#)J#g^s6~!#5ma(6GSp=GL6+-%BhPfg(J%dBTm)aL$>YpWglgZxm}nthLd`6 zy5=6;d#Pjn79_v5--6_~#%thj!t)b;e2#Wi#W6N*RO3CBA7=rbGj}?sP8o?A(|^Ls z6?1Xw75s>5h(UvW$Z#;P%;ZUiU< z5Wh1YSgo1@nL2IIP{7ilUMtkEEq~Xnje0d}p2!ujBN4YDMg4BxUJfB0M0(K&`ZEiurRHQ zB}0OL0Swc*aF8Ucz&Rhw|2kM4-Hk1*mlM--q-N?Pq-Pc*FXs`mQ`42DS(4R+U#TfM z$lzo@qHuIpk-CNgBngD#Q}Yp%EZ|7YKvou~E0zakup%lU5ju+%R<t4|qE?}u6aHv(U zu~IADJGV#sHZ9Ppi@dxNHPYeOom(fgYStFb8?~}q!+ ziRZJF=NOfgFE8f{DLC13d}fq>s*Zi>mM0FLxr$5958xggiF@85xOvwHu5Kcyqb*X9 ztzc?>okRuc1?&m(1ZjCMRU<7^=4a$Qg~24hfgu^`=~Ad;A`u$oi;L%uV)^3P5`j)o zPN`+fma2+?k+FgZRbEMVSJkyuRddm~5f;p1>@acg;^a9A7iW4@=}Y80mw)jEN5;#u zE&)M@4s3t0PvdJJ0dIHuc4ujaj2hiuGFqPd(fM-yo5pqg4Y}QK9rbU`Q60rm_S}am zgz5V^2Moc|MaobA{sR;YIAdk^?meZPG*bg42M_vIeR4!SA;s%suQJZv(nG++nJft! zrotywcwJ1TPe2hiLk55M%l)bAE@|%}6nLM!jy`=j=S)X6@m$xg-O;NT=f)?n<(lQ( z1HT!p()Rc5+h5Mr#r{lW9j}Maw012<>WyT5UyPqH3ggBN#gfI-asAq9iIRPx(I!BX zn1pzZ8M#I5CHNfa>-tsAj+*&^(c z&yz=wV8@Of*njvK4jey&kHd*Sl|gHcDEeuc8-6g-qV5lFBdh2~H%T<1_NY+qq|eJYhkobXTJqS{|- zRZ~`{b^}#a-mFP`G;i7g4I7KEY0wHE)oG6UgC=6+VHY%BcoJnhJzNVrBGLav(3E74S_MtQO~lPT{RlEiuX`z7G)#ap;^U8M8*3pjrE z94?%?2CoN!h>F%DQe%OS#sFV=z<%*5@QD%$Ea5q`0egif!!_89+x|ve_tC*k2!B5^ z4Yz{~xaAv%@pD(9MTefKUB8JqrRHefxB(j1m#CsaW7Lu8!=B-^i4>}aQs^3>N&V(% zFOHFLY16zN8r5s6dU>z_v2fLq=)8WzCTJ;zjMk9*)skg(TcA z_F(1aJ=lNhB5t|+;l@3096xgtM~+>?z5^EoIyc}WzsqH3Z`}8ZltNV~fx=TcHrs9< zBCqHbv;uUk#;CyJ`rsb+?cRn(^QL0*_z{>gWfI1Y9V^bNwLF(bcE!T_e0g>p&!LQ9 zZf&nBqGC~_^4r>HnIu3Q>VV(5p5F9~lq~1pO1*Hs97m}m9*gUK#|Sa*OSM5qOsCyL)C3{YSyV=k9-L>U2RNH39rssX z^;Hg?prDf{{OtEE_bK;b2dn*l2vWk0*|EFI_EbkIXyG~K+??~}&1)ohcr64A@4-Ha zS}%1?Y$ISbUGLs~)O8SaoQzDt=1Wd({FPenxDM5AT8>etc0&PS3pF({8}BDf_))2r zty@;&u_NA zc3eGo3YShF$Kk!ZaQXZ>1)a;+op9xr3$D6&2w2!NG+%&Hte`?OiX$XkbW)bJ=Eq1d zJwbxy83JST5N-Myp-Io+?6boVD5+I$@d}zN|Ya_`B}Dmj3Coo!NVI!#fvZFjU9IS1cty@c-DoY7;y zKYASsMz6j8XtMMMdY*_t`+feXF5kaA8HOi~`g#J{*d2*!P9cRXEa zB`h6o=9jo0laHfbCM-Ygg>Bb@vGtrA`j4K225owxN)3rjs#izN$`w(&N@Y~7#)2V# z*OWr?`R6F}Svi#cq%3MxuZMQ*5-LiiO^bH&cU_eIv>Yl_sDLU}s-R-Uil|hn5^7eJ zLM3vyQkgQST&A3SuO*R7YxM3r3^NvO!{lXqanvaUR|R%7XOX|Gs&ly?jzn$tpI0m~ zCW%Ngp%+!5G23wI&K+#nvje*i@5SOJb8-COcAVI~0Xvt^#esE;v1jcc0ladyG>?YrRN?u&ZkMOrvi|=rhjh= z0wqx5arjA9p{5EJ*nIirm#RvYQ~Ywie@6aYx^z*?diLxoz-gwgo!852=Y73-k8HPL z)fyF%Ly0)f%L%{uH}B7JZe9z!A@g2Xea7?gxD1wfEj%aB|Mk~jtM5EFuZvZ`ojS2i z$Ns#TdWXiT2H3{J86+o98H>@Q2CFufefu`y#`SYZ(rN4tEIhuXjfGuN?QJZv<~&%% zIYsIvK#DcOD>x1}UA*D)AOL=WG4S*WgOjrtd;((O;U6slU@{_-(pB3>QuZ@d70!w2 z3@LeH`Qq3Lkd#s&z+oGK1WncgL}!T#&jp+l^RVGY2O8M7J_ByU!caeak~pQ2)=&rqRqB~+*+$EZ+4rR1+# zrLI7yAv4AfJe=7(2dFE9m&5t;0VGAat7@>6oR_MN zg-V6hV5|W|n6CtNtW z88apf!|J6=;O!ZN43W1QU4a5ifOjwsZrFzDBZpz*(m9Cmbw;`|6nQC;xP4*^R!$p= zrPF`H_48+-Gg%QOg*ZG^gSe7ZE^Kdh+2n&xsz|6h3vGSxF z=4?BQHhqSpX48(SShcQ#LdDNY2?#zz*|Mcku3R~kFJB(z%9O!RH6p_`*@{(ugK0!|2W7v{2V6|Ei7#N7403Y1Eb`A^YO;d`6T~+DiSv{Z{q*d=D zyJBH#eEWo6bmsO%i*#rN2_2jRDl|G;R;ejPDMqKrza5_r*f>DLx!UQB>4+WCyvkC{ zYBF)ec6ivA(>YUdIC6ri!=DkD>uo{Zzpfm5^zrS+aefsnf;Ph6| zV0G(&0Rz-0;pn($1w*+Pe&;@%FQ1^|xp)qK=kZw`#;KPTSVY0_K6!rL1MiXN=CdY1 z9OvNq2^9jQU%!6pS@B%_+W{6nL&C)Y7WN3E3gTFpt^hwd|tIaKB?Lm!J%=;34E=a`7!Z^hFpT)`D zv#@9NGTc6U37V(`SoJBenX_O_O2GrCdpNRvC$=n_2Op=4$k0UMaheX1KF&D0b0sz{ zpMskbyt5}A;llP6M+3gS5&y+6Gf4hNz@i4xh@8!`rsCR(y_hw+FBVN2g2<3Naxi(4 z$WfLY>xrdPzsJ~b`{3B#1JGNGl-aC#IDh;U=8hSRsXz9`{VPX+hsko`5~hefPYJ@# zB_lARUk7Ylwgge(X1fJz5fiGzW$i<(zn6&dhwfqc?%UYrn}*|YPw@Q~C+zS{!HM8( ztQ6(ae#msxZ`U8y>b8=Iq6W(R^J9GUkAL7FZ@q=TiM{>Tw^U}*QXhScN)m}QY|spx zjgVszI1Zt%NZ+!bl}7o}Wl>I`^w0PHfp`D$7XJSCxA5+Jf5#^uyeF!qoXSDev|(#> z{c;FKPFsO)!$bzp*o3Xu0&y)O9T&Zm5FpW4P-L3CgnvGzi%FjigDwpw0ZUflBV2ZN z!nhfeuz1x%Y~H#OE>7ohS0bLBE9Ya&l3Cay%H{CRb?|X>5;&Z~!Gi~}a>ZJSRL8^9 zi@+~NtR@Aflp+|C3*=K?a#4t3kqI!HlHu&^j9uF|W2FQD6UY9Di4*NfDCy`~g+PbR z#^9FBDqPZVPss2Yc9!UzZ3_-3=KzZXE_8Hskc_Y$=2*s0ZbzrcZ5`XGwi4Ai&T27x zRh6Ski7G(N$SCUx2Rd(FpB*fsK&W)yfXKfx2e`N`tF0Vrg}ua>Wtd>0b7v1j2UrLX zI(T;BrNgFjP(2X4iF%WJpo*b`=W}4AKd+O$$OsF2+e>fR-d^3tb8u56QSdWcM8AyN$zD9QF#Q;`I#k6=uGhB(t>_{8U9|IG-v z8DAm%A#g(v+_eE)yt6RoLKKEwjmFG~Tzuyohn1Q~=zrJ+M+7P^1;DtozL+o3|K^|! ze6#HamY;A(-8Owu_0x(d{mw@y^+`$2ufN+7QN$J9=rT=4KNy~c$tB@|uXu+Yat1$lCF4(Ye z401E#|CmqNGrYA6<83&Z5&URZuxgJUs|@!jSd zI2l!}2LEln9)_+z&OxJ&-zczDs#qPR-u(b?mq5i~e}C(*_~?UwqC#0I6tx>F2kEfd zHR_0B`4pu;k!a?h@5{FKecs}J0+lZKH*nie58q&m0EH>8{~TB}@*K>@Oqi{iQUJ1W(djy7Et!X|zhI&i|pu^o@WF0!1Lp4CYlQ=-&` zK!8wT!#bTadtKSvY3v;|xQ(g`BLM#kU~yDC@jDd)p~9Y9bn=ZGH&afV&YiH}{qUOU zx8Zg0+ysl`xwBVO{d$d6RoI-l(=dJ7Xe?YX1;>u=!tGm^5E&Vc z=%_dqSg>5AJW3$Kp?lkZUPMjsqzy=Q9io(T^EVx<(DEG|R z>Y9vYw++}D^#oJhEEslQBK{Mem>rUeZ%=#RwBadk$$nF>gkbKiSZoYPQ(#$g%vFJ< zX4xwEOhCYq_MC^so-6FvB$Qmnb!@a}uP_A`H6fTCGM{}`R?Xc)A3}TUt+(;Fzq}`K z`AF1GIaDog2TPsWjnKLGcbLEPJjQIhjIl@Euq8Yb>q1h{d(Tx&xT(jqyH@NIn7G6h z;X&*}_{J8&KROHN&pKiC%+Xjn`8&k;T@yc=f#Mh0c=9SwzGp%g{QwJp8jN|vzr&St z7v#BFVN1@!9cMQzlz?x+=x==QwurUST?dPNjS1;EhZ2C2HO|TMZVCEi6mbX%Yoz*g}FGo zel;e2HxTO<&q1Uv8RqPVh}7t@cH;(&7}^CBMt_C4$N;%$+5TtwV8*qVg(CUZVdS?% zB$}EFS8o&iLd5CD84(ngfSvLq4L{kw+=Y%t)mXQcJ_76R>d7uRjYGL;6c3SRShm0VatGJzWB^Z^ser+j#)<<}JdqRckPB z=`t)^zX3ZA9>&(~d$DTeMr>WR728&C$F@C(ao;-x=dZiM)i+w4!!y2Fg<)ZC@TS8US7C&=LRmFJ&d_C#$m$5ac?M=djFSVvG)k0a-KZg9Z&! z4w#OW4vx-_=BPgU{`>Fo?YG~m?{t`i48PMkGs@;Cm;LzTkE(YT9X)4jq_bC0>C{b* z{gtX_`ewjjS3|xalS5JQSv%T#xQ^FRzg`nG7S+P-rc51&i4%UrqJ>k{)Cj&l_h2>~ zker-~1g!AF{_wnv~pQ6;Kl~Az)Ayf0az^-?S54p;$!4Ie2vHS zr_V$wMn+)9sJ@u| zcr7=tpd$7(*(}m*62=bfha)>T!IJ$5@#b{7nM@o!au`#__s6&2w1xY<>vpj40>obA zS+Rc6RD9dF50)%ii^%vQ1V&^lu*7Ms*d(%Y%B4^o);`BE12AO22NvG9VC?Boj5_Fx zHFpe{wDT4k^_hsuO?%;!^7T=U2_;Ka#3ygRhj;&GuLgTZK0kQpZ8e`lIgz;y8#G1N zE?-I{$@=UsP`6fHlo7>3uzd9X+j#HqZ{dAWDg?{h@Bagze*8~VD$hp$8fa9%1$y)y zib;#M;@i1faKtkSx3rINAtDRw&U)hL?N9{BOXC;*=To|9tWV(LqrtVCe$XbQBPli+ zp7;C^=o^e%PIqzs$~EjeChFwIP2BhK!!2i5oIZ647mr=Uy{q@(;^v3oXdS}iEozoY zZE}%Br1IOQOC&1NI7nEyM}eEmtw`@nV2?VI3`WDcQ>ZPs#mXp za(=1@SP4|vcu#YHWze7@st1w-E_85IJ8Um;I9o=~j&=(=PA=p2bj)v7`_Q2d8T`F! za8%$M^37B|| zbjrLQI(LGGN`V03eR3Vu6^+~Q9vd`hpzfL5vS*jNE`bT#RS3#HefrD&e7Fn)~;QMeS0^n#(SgDg77Gfs1Af~$jFegB>QGbq>`0Ufb_I%q{+LlwZ2eL(WSnE#`Xe{#z*ju%f#&vGtP^$ zUv=IC`+W>Jo$wHg?j&Hwt$56OV8N&x8f?JRg%!`C-YK z04zHfgc(;uaZG%}Dcx)IS$zSk1T3uuEOpA&6sxYrvj{s6*zTqbyTm}1YP@##?iZRxFy%H=w=c|N&vjT z!-}sZ;2nC+AAQeU#p%!x+zO6>e?kg;LiF;UXXExYSFHN!Yb+ev6L(JS!jt?oHUA;) zRnAk~IDQNhhxWkK;k|M3=5@pvtm2c4;1Lpw#o~i!jQkGAH?II5iCQ5H z{E0&qSRC1n+1;4cm~6Obby%7JT$l3jPk@CET-1TuSnS0Mb=hJ9mZGN!3Q0h!oHQl< z1*}p)II7;niN9FKn*InWBA2qWUm!!Sgk9h^Et`v3qrS$~155ENB}DEd8IP?&IJ9X2 z2KMZTMYHB2EHn<80xOL~*eP-&%$>Dm^>U0A@~&U;6QTmI;89i-3ak=I?^uf2KlI1k zF=OC-^$w!7sfb8OMrdrTsGUT(gv7xqKm+%fbht!j;rM->vJ(&V*mN!cOAlPb5hpK< zoG~8_TDC&%IyF(PQfV})SqTlQmP2(ZB$dilMujpJ<&!zV%B$XAH9oJ2R-9<6RXem5 zu+*thN3E+;;d4}zLRP+X1$_2#Y19;uFah1CpI1bwDiu&ej>iF&{eKvPF-taJ===>5 zt>|#e&xTw6Hmo}5j)QK|@QBHRPk73o28%8IH9{lO1hyu`nKF@R%S60Hgo&nfXmkRa z#4Owwka^sVl;1~#ySD>GbwtQ_0N*SHiNCE)oJM;73*;33 zED@_&qSs_ZhJ_$3$Oo=>E@Q#0@t8Dz0!EJ*iIz>9p@Art&K)|UQ#*0+Z6qpg-3Fc7 zcR-sKEz!H@ml!_uM-2K}oNu@8=-0as1`qfKy}I{6hcCpz%Ql_ccf{9y`(enyLF$v+ zwQu_czLahHeP!Rid*`lbC&&J}Pd~A~>hqg^0+GJ`(YLp#6fu71GRL~FzU+mrojR-Y ze8Dj?En1;<^Onk}Jm|FPtW`S=+cD%jK}4VslpF!?Xa`Z)Wmcg z&?noOA4+*HM3iiM$t?^Auer;6o`7&E`w`+d!s9a#laz~S{%y=fi1r}@ciBWd%az#TPXAW(>A? z>Topa8K&Nd!kF_x*d3dTi;&EdALQEUl2YXk}R^7+#Qs@SHI}@`e_rvmeL$PDsWb9ox z4Qr+j#rFA=aQECf=$VAhkRcHOA3@;0v>rjx(NehLCAu-fE!qZOO&&ZF3UNI+6HZ|{ zxE+~~vtAZl3o_zvXcB&!y$JP1`Zs7$7gZ~MhWekEMdKP3(WqWy)T>n=HLKP_RdyE? zxKu7*8MUgh5x$u?A3CD8s9UohDweIJKvcVW9RW`b1)pkFK3Cn3OINF`thyYdd4pE? za?mggpS$W;un1Ic`=?;_IS&C#ObJ;2d>c!gMl3O3K$0hg;vtgKWE*P+w3bXHiL54A zOtOtxQvi#m5IRj3BBP9mh}XlMmWjg59OR~DAX6g9-0X+QE+9;vt0Bdn{w(7V07=&RY9j$ zkDdaVZ_u~bS8AWOty-f?$4(e1;Q8^p?=j??f#~yPZv_g%fncE#K7`d^S^rIc`*H_R z`U_}ij=#B%=Oo0sb?TykM6eKeygoupIcC-9&z@KI-d2t(GA^U@#$ z_~ddL_qF#vv(Iozg+WO0ZyuksL$b|>$E5Qoz!X4aJ>fw>H~_%oaXZe7@2HAX*I4qs zMRWF!V|8r{wH-l6=x`bL=RMfFcXQl|9ee~0ub2C?haRhW*-?dxW#+6Y3M_MGkH?Y2 zJ8<{TRn;quRaQ)!&+f*_S-*nCBFg2rAo;BkCT8&$Y2qW&^Ij_>Y^YrLxLm%!^VJAjJp^t7J^lx!q&JYsz3Butc`>OGgBP$xdx@DgGE z(YSQt7}hQrg)=)B;?|K>a6Yyc*Y>W)u7#6vc>N+I_&EQ+3zm3&mXd8Ixwx!+k;2S` zn`nc(SGelKepBqueSdh#jV4G0ohDJRS+mi`b;uhCpzr3Lc+uAxH=t_7)rg?0_+U!Ay)FH&lUT*UojKT8=}b zNr2J7B#(Lp7QXjvW3fo!Vb1y2FnQDT%o!*UNn!U@DNj@@{PYUcssX&WMTJC|CFsdx z)yoqFj3jF@IKWS1eFU8xBSyCOiBEw`a1uP_U5PQ-w~3R29jeJdu)rxOu@Hd?1>%@< z5gMC;ka&~$2u=iORbbf`nSp-WFJZ$GPju=&3e{>bsbo#nlkv?A#x%~m!ev}Xpb#*e z+>7(D5G))->Bt|(s&5(xNUA}S5~MPHVfvP{m~;FdmS6J4zMBE?j!8jOLOP-oGY~89y;kls-jJil2VK8;TV*&nb?i9K zoIHgKmz{9^mM22Q?`ib~qVkFnBfyOjpP>jgl*#FApChN>C9?9KBQ5JO^rkGNXFn0>{0z?L zkZ8yhg_5JX9j52MMwB?sXmOebJsa~fVM>vRMJ&Nmpb}E1X5_$@o+VDy2LI?JJcuyC zPaJN9hUr`kYJP{nxMcW8*x)TN@eWQGOM_dW754*-@Q5(ren>2Sm^2Md+Senvb?>RFw&?8p^y;lZLI}|5bD#dAGJg2>d!<~cGN@Vz7apUh zY}ZPZ5tYZcqC~hal@L`-NBK=zBtZw7J3MitO6o9&aso+9z&{^|S z<@*vxPqm>2FUs%FMth|cegTU;ZHir?*vFU9SyL_0ffEiq9vwfOd=HM+?(q4OCZ3 z#gtqtp~Z15G`7i1oi+iJCJs~WD^54hAt62#@$oSwxxxf2Y)_H0@(Wn9?bTVoXAY>) z2pL+clrxs)tGE4dKU9xM<`tB(rWcqnDAHP_OxvCyQOb6-tV@)jCob(Vg5(_t)@CBs zT%^BQw!&$0ckOuypS66KdA3t2&!B zYS>g|(qK9wj<)B3NCJg$;BqRHN&*%RoTOqQbU3!f0iuTW>MLU>2pZdF8#iKgWi!=| zR<&+344b|jCp|Pc;-SYW@c~YWk8v+P7Z?4FI2vfdg_vyI6Bzm@2q5X-nC>Z5R78IkWt1*Qskww?0eA{iXBCO>e1znb zJXoyhuqJ27-{Mnq3cx9hZMg!I|5w4Hl?yUt3HiiyOg1TzvM~(;4%V&8XF6aJ=f?Ti znRY}gH=Ha^%#!yKamhkt+Y3aSB;uCnBS{`ktl=?25{smeJVa>HV?-vVNenGhUoL69hxz@TLK`kCPFn*?|NL_7$Jg-2L4#>|+FCXD3T ziF0bw4jmc^JeqV-upm4-FppJBi4esc-B7Ze2Y=DR$|zk^|vC`wE`(&kM}CLMM?i#_v+j`;YzuD6%NHcua=!a0`R#)q zipg&kYWi8C#MknB1GxgCoQzijnkUf859${d35~@l&fq%MY*>k<%jRO-*dH-*+<1%` zHCln8u}FV{q(fUi&o2~k2@pbn*8eL}6yoR!1b*+?tviMc64mjQIQ5Q%kbtF6FZ}S` zVA-aR`nz4*mI8?0qF@GK&^P@=)wC60wN`%*8ThpV5J5(0u*!|b?_9=ptOjHI4zG)9 zhk*dwX;jsis25fp(MdBci=%ymj+Z^Ps3hpD2?#oFI%NWf>m6VrXlM>)!Rjfh1pcjh zs!7>m+YFDv1eR>uAS4t#WSvq>a&E$dAW)E!Pv!jOcpU7>V{tq7661F+Q`aD%;NK3l zrJ&Qrejm&~rrL1i+So&m_sH$Jo#P&OPJ4d5j;aF&tHL-R3%eX|-n1N-FP-?)V6mqR zd8WRzU4`FS6_zJu&n*5TMgpP)wy%gvW|CS0gc<~+4oM*(4 zkLaWvgePR$tHSiz0+@#g(a82vw!`8w5gO0=Tf{GfTM!()bkDX(^@G*m!g5=zHpUcV@ol2Q3=xaV@Fcp-qOTG-Z7uUV2vH;ff43S0w zwfVU`M|qyi$4E=fgFaUR{v04S`Tt?XV##{}bM8wRrI6`mJDo(!`c#QNk|DC!4wyLI zbHo`rL6FE{k!eX1eP~i2Ayz`?gp`+vGD&oz%Y)8T1g-UFiAa7HM=4RZO(JenE~2$* z3M>)w@WO1*;E|XOw-w$Gy=6~yZQflekdN)6QpQ@?ft)gD8@ zu&RvfxNVOPodhl&(4kuwDX?A9v6)1I4cg$#e&1v4ytNoM+YT1j08vpv8Q5~s7bo52 zdZR?Kg#P&%B&j+QB(jS!KS8`a>#M$ItUKw2{dW^_$lZYb50c2QZPR01kiTyS*`%Nr!;&mOvA%%KQj9$I{>fl;sDU{n6}}<?EsN`;I*h+W}<|sy4b^vV|oY{9*e-_xw)=t)mq|M z8>uedR4kn2i&bIUwywhUYiIv-RT$L?tG?LILa1oX1*-gVnW`oe<(wqIVJ2;zC~hO+ zB7st(KqXEB%@{K$`YIA9_)s8JB+gP4i9}G*S^qvD--061CDm0N}_{%#6mWii_1@)ma^8pU_J++?P~;)fLbM`=Y!PfAtG^70DRHi_0OBxMxCknCf(c1cRzyXmAt1@e`KQA(C==T+`r)*Ig=nR9173GMo$aw$oB`L zM3!BNz|DkbaMizphZ*pbqYD_|M@lQ{G*&{P~X!Q!X}Q;qTcMQMC3 zj;*Ui&#l@hhfX7i2%fLL?1p|{^+fM4yP`+8P6B~11sLB55WW(1A`ZG$Gj!_EMr}82 z=nxF(*ISPJ1qR6afnWE**L}WLza4?k-;2iYT*h?+#KHCx=iOBtI)6*5(_Z4_zZ7Tw zg*b9nNf91|3nP3+`cwx50J|}Bok}Pv%N*?z4zTb$K|m+%aP))$*Yi6aK0#nt8^5-v z3?BTQ0u7x#yFwEz+>Xar)m3r~_9(L-!`?fMVEbACp{mcieW{G=2nQaUYK57Md0g)2 zP+C+?1HT!f+Gkpb(s6VU;5G8N>~7pd$~6a@GNlX0v8-4z2Ny0JQB`4ow(&kK_qFN~ zW)a0f$gnY=K;dX_X4N%jz7YFa{Kr#K%gk5BWQfni89r8E(IgkEz$s2Z6D{gIN+*G) zSd2aovHJX98t>UFjMZU|HWoWrjH)UuLSBrW0+znpFJaAr2dYSD zQB_}cM75~-S*TV-l@K5*(WDr`LRG`&I1|1SCDTub^Aj}2!u&(weBl<(A3Uq< z%>Gkwx^h$XfsWDWW!pm8?-@c_NK7vvAcjFFQZUd@F8(C;@7;!dySC%R{sTC$ek=TL zyCIQjTm&pZ+FS&S4D?OZ!aqSPKS%}wIA}6V9Je^t<9A|k;C2Kq1{iTU$cQUGvDkL} zGP-~L0~)vJh(--siwdcaCiU8&W|f9$C?TQJ7}7#o?uij z94PsDMUlr9K3COb&FeNmeMU63YoUI_hGTwib&wqGJx z5(Fs!Jz%kD^O3A8l!)$ULQA~G!>ZiMxWk2)Uq#obU`n%KH{_q5yIaA7Jlb4uInuh zwHH+gtB_RnWe0pCuoygmode`N95W(+Gs-6{s32$rfJ&<(>Vl2%go6Vn3M?hnP*gk) z;5gtyBPi&&`N=UgR6k4s!)h^(ui@W>1;N5bcgOi@3M_JL9*@d}Ku}d^qIewFN3gIx zhv(vP2o9#{=O>r3?S-)6eK2i4zc+2#LY;@l;aN0(o zRljyqEL^e;zR|h3AC!SR5@32n6d))pL&3!>HVdxdHW-pJ5fYdH&W0HnXohcO4nh(I zmhtHbm-jCyECMbrF1UL25}a;{gMV-v0bchI6(5Uey$RuFxo3fGxTqIS@})IBMv^uY zp?-k~_Im&~*Gq7@a~A&I_Yf_|vc#vMAVnbZKL!>usn3eav`b3NY8r(vn?4ZX$IW6c>M*w z7VNx;wq3qMvliV@yJizqs#pzGYu81!I(60f6vBeNy$Fs9>~>hHtm*;A>Mp{C@F7gf zlq#dfu5g?SyB=3AUj>yvErXiuvRJ7iJ}X-WwaQdM^Xg6T4eX;^o{6(?O|;S-#Okf;oJ2PGjOTp}w0OIWP!7mJ8b{V##VDqzX7K0$=x5n|;f zJ{FaU#ZD2}F9mbP#Q+=%5MXBkqQDU-D#SkLy$Q=)wb-YBh9MVxvCa4lmr{V$SHs{E zSs=eLkS%b@Onre|I*0TkDWoPC3`|{8#O_Ly7d$| z*!7t09E1$pH-680cI$#KyR$L9oBVAze&;f-`$Ow0$M_xV)~UPdh`~-7Et-gfZre#f zBT;|n9s;2+R0L1w;;62o@jI7s9aRe*Khw_BDLdLX2naf6yR!KAM&(1tuevRZGv~3` zQ;g7Hq)dfGr%x3@An@3ZYB1H?tVCH5G^*RNK#Wi#K-itxQQgMv2pe7}LC6Mv$FT`c zo|E^*wj;vM(Lte6!{%tvps5K3-p-R7#94579}vh)l|Xzq~8q`fRbs3NFD>SqP41wq=7-En!i~2o;6C zH$Go=H{O2AA8kASh)PxDeJ)cD<;zvHcP*}9Z=mNVyAhWuQy!&1W5U@=O0g()QnRi+ ztH!FDjO#!9w5&=>%Pi-WtJXrL&ugN*_=(EmJJ>^v({NO+*BU*4n1RKIA7I7V5UjZp zi^IN|@HD>04e?nA1G2Hx(+007D||zZ2#=Qg5etrCvRW%b0s_S!9>tzb^Kj{*0!yB5Ib_Hp<* zpM%?#b2zngGwvQc0BevhQgiuRiCVPe!NQ~S`Uf;bHG_DzL38O z3r7BQ=8mqsN+qxzL)Ni37@aiRFO)M@RY?-@i__=#e+82_jhz9gb_fmvfYo7i@~oy( zYD2!O?#==!2T=H_z6&e}Fha<#XzU7w0AYhad!lharJm$mjw&)jh}TE8!uBC59Nq`_ zAQ1^!O05LN=>HHbDvR;QpQ^!-AAeK|AN|G%8n&mf?S+bk zZ7c-MrxH-AtjHgIq_UiUBEI2c2{=EdFOcsXd0$#A3XfsBS9e_D=M~Qq+kmHEADzTJ|ILw|m3PZl@g^e3G!l=tZ znmh=LRfD4^wqWAOuP|=dmqO^fc=19!B%b2Mt6~&o8?koTbPW4$AXcqhi-1r)wBlG} zSzv;62p0$H7n}oM(`zg`AB4U;Z(;Z;UwnJe6`RCKIwd{BvAZ$oKV&LewCW+zMkACi zT^8?s_6gp4{~i4Ot$*OJOgtx_@4x*4K6?KnfyZYGBpjzgHRBjO$o9foew=enfQzq9*_MkwIOnT_Z-hiG zfhMI)?3SkB;s6WP3Ssg`V9^@oQz8{@vPj>I7q}N@fwRczFnPIe%W;o+MZ#YS%(Z9> zw%+u?`ipMZdd(j$iK0TD0h{keVCRE49JwEl(|2PLp_SiC)Jndnmi!!`P@G4SDO~_4 z4#sAIo395>o;`|;~MpK|=);jum0!J-hSv<3PpVF*SO=Z$CAr zg$?aAHNHibIoAEI^dyP<81c4*(aBf56zjxJ*D_4err@JY`>wpus5`KQtc#;uEsRN#{mPLo63Uw z+Tqex0gdNlTMrc#uY;iAv3PBS6oE)}MTk*}5H>sxI|;B2hwFJisxyErb10<7ja!Hk zYN@Ki=FXd;vK!BzH%ZNT&v7hPt67w)S*3JI$+YK=Vs>LH7WNAJvtY5L$TIdM<%s(? zz``mpf<-G((MsUN>4_6{1&HU|_emvS5g!t5%EKN1cwBUe!5u%7ygxaJOw3VTjsGi( zg^48Jd-tDs`ycPA9ASSKd*|)i;Z&XpKUI~RssK2|Kc9Ez`wM`7qS z6YiLb5iIYuUtF^I0(pO9jkxFHj&(CeV9xNbaC+N9JkN*~zi7{q_2Sthc;CB?*(3U3 z*`#lA$H^5|OBRw-a^d3_j?F8lWBQ2RIJIp)eol|J?UMJb#vlM-S8Gc*Sz)JZ#*$0N)M$N+O~;DzBBzQUt3l2^+U8z=$E8 zF?Y(hD9AO)_TtSHSRTp4$j8o2OYp;x0hl#&F77-CL!34f@i8d~4>2GjJPU#0`M48Z zh>82|;@iV+nCYB=f%{xA^F|CVMCIe~?FjVxdOYekY>#T6*HbC4-}&T2y!H3L2vGj6 zz(PoTAO+*ok3K_1W;d=;S2gx>ggw>E=OUBKmo6{h`515il?mtmri@_uKnml#%pq3# zQw0|G3hVRDFicv!31b#*!}$jZ@L*=vfHds86^4uc2Ka<$z|Bwpi(+Bh3XM?VC&5CX z{9zl5yrgjwxg}bQp%q0Lpv^@XU(%<5Px2$&h_%2|q^+0jAzTGQPO<55Hx?sWl!&W9 zguTL?%}?PJnT6;SAm_0}q4JZZCyT?dJVrhTRN8VR3e-x$6Nw%b3J)JwDP+g7WbrK3 zzB26lAJDvUQ#DwWZ7J-1#jd@M!H~aaZ1ktXVS9_CVV~c*%)XA_f6u6p{=IeW$POBv z(Ym?7qKN=RKHInHq?QpfR0xC!9WEn$8ow*pP(6rqrn6^s&nhW`hYp_3n~wjtAo;Cv zJA#7{;4!%mtE$+3Lr8EPl@9@;8t&y>boc}fKY0z@#;#I&s(o0s#{GFcR8mT5sp>lW zT>19n*^fh2Lx>P?_P^zs$$m6`Csf#ziFw6F|MVk9j2Nh@!q|8p8R3WcgjneHCTMh4 zHRnC6!o=4gUA{93<$oG1oI&-{y&xRF7W4~P!sD|LmS9Gx*dKv~`M%zh!0>PKPCN31 z{p0WN+7nEEQd;E+V-*;o!oiWXYSvLIhG}02q<8-Mckuy#mHqyKxBm7n-hS^ReEeBC zl$AiVq6DSo>r1dOWHJs1q~J~lu;zgkQ%;9q$(1nlTYem)oKrFAyavaEOt=?rgj<*n zVKGcjn}jQuZ({C3XQ;2 zZ%D(v`@UE&6W{>TMW9M$el=et|*Vk(N zAlp{V;@AJHiYHBKW@7;*869!@Bs_A(7vy?oh;4HD{FEg=X%?u2ag1dhG zdf7+hm$pDCEBo!(gmFXrVaAy6k#0@I>sL~81xByHW8~t%j-?nmbRZTjT#5&tF(UP{ zkQkK(U7X0?SdqPndAKQsYTKm%oDE8ci|#qL+=#%!!!EccPW-I1D4D@yP`6=gRQbF% zJ`+H^`_GS5A#wnM_72l!zxSc4?qUOeBThkDlD>s$Uf9O+p%k2VqyYWx7a%ct<-7R% zhwtOvPd`S@iq+7%Q5*CfG7?i(Y{Sqw>u|--h=7D*ctqslT!0BTqtn#@N$=2Pcm^cG zPgEG&SRBg5(Rd%N$@oLCB*_aHt<8qfRw$~l2>wA4aCzX4d!C*+eC`ak9yy9VXV2sK z%{w^b?1l@@UbyJwg+s?~V9ka@aJm-&5C2$r`o$q$lL>=~6MQ{Eo|Ij)?GaL?fJG*l z;2#z(zq<{0-R@z>zO7igYA&Wu{|OVuj>E_whpRRfcJpO-Vh2zhxw(GNI6Eh+sJ>{$ zo?;!8@jI7s9l!sswUq6D$67TNNHk`zJ`QYctEQQ5+k(fJ^{qHRiL7s7Pm@9j(B53e zswf%3R#+YOhhPy^@~(j8 zuYVCR$oov=d@KqqrNj@EfQ60s?0U?`e74DOz7~STG35rq^4GWC!F%E#nE9B;X9t0D zH5;MrfYI1{KMt4T9%A8zAWS~wimkW9G3T%|Mqf@skL@1VbHfYw0~6)it%y!cL1>f- z*Kc}Y(ddDgH>@w*&g~V|k%d<;UgG&v@u@GLqtI%=f-yg0#*c$>@xmT-T)lb~MR|Z;Qvj3Eh8x!|V9AWJ z7&)kynwYA%MCH5?z+_k=v2f-HjQD;4_U<`=c&#{B4j2lyK^vU|zhH^@1uXZ%(r`6U zq5|zxJTSk)wdi~txSxPKVd4z^wHP*b4jMOWufX!DfaSdpKgM4~!cwKYCo=fGf4r}t zK}EvqE;h_FjSCy@*;9;-^`%APe)^HUedQC0bXaZn$p;_G@=|!GloT`pOO1+E(WY@* z^!s)crmozMvCDVDDa3}GUS@1N>V{RPA7Je{H|#j+iUTL_!PPqk-a%TWTpU1&6g5Zt zuQc9k%>O^;-UGaAm;fA(YSpAt3}3 z(tGda)g($yF`ZVJAcwipwpFT>ag3*a9VkM-LQVT+GH z)@?qBbVf|FXq$tTyNZg&Q+63F0({=ptgseJ=2C(%9{Z2%#p(@<@$GjbFml*%uVU%= zteVF%sJ}NSm!xOC{koc`w`KGf@>kZ~cDOdUWaIg$Y5@N3tz* zoBZFM)(94HzKsA7llQVsK9m1d(~@%3UIik~S(>K=3_k_QPfgCz*f%2QYJ`UZ7{5c* zg@8hRpFn``Rqikag5D~(m;g;cAx&ulIr(4C(|C-4L_U*Ob$(udBR~`gdELs?xxJ&+ zL_x{OWXGqKxe6C4g3D$1*2v6nK4v%~jD7y=lKXsLod z3_gBqu*f`?Q;CI$NOK|ADnU>kQgU40;l}??Q`lYq@G6!+{HRz2EO#=%l;$p(1Sx$h zD#Nk7Cs-uKOJnj%Q7dA9_&wDMeaM~kA@|+)5Slc79L<`yMAK(Fq3f%kVZ!DUn0_D$ zqql}(hF=DbYin^dzXEg9F5s&GGyGHa43JAuU@YT(b}F#MCgft>v@sa}-Vm&wG7_al zi9h)1tMxSqIk*>N-hB;ozxfJL5h?W1we$nENX{(8+QqZ+?dNY{&#IZYTCS%r7AJp& zYNrl~Niq0t#2c9X-EY_w_Dh}j#pOUb!BSF82bh;cbuk^2M!bdnYvv<2A`qsO2;@fv z!DsCZO#J#?Y~HX0nnFF#Nw8QXr8c0=JA;FpeMs2%v2yk>WJdd-+7^WheJJ)X9gB(Y z4aCw3-y-a2D9omF&}eFqk#0jywhPf2M#SY<)NI@IoKi%`nh>8rNlehBXF3p{s^yI? z!pLzG(XMk3GW4m|kiI=EYM$K7)VRP3ZAkBdt$FlJKvcp(^DhvBl zEeK37AvVMDgJO~9uv>>2OP-$sL-{X)#cjWUVkax7s~Yaoa_rc*6~n&%1Zy`ez}BtH zuzll7eERmA82kBfjQ{d$%$P6(Gbhi+7oU%SpI-n14*FsJ@>Q6?`;(bbfckSXxwQr+ zDj*qx=qNplBBPsuK|TxyGg6Zi5gU05hxcv4)QR2+k}?5OX5Gu`nbM3U*^FgmSmT7m zpR?|S{d1k^M7z*ockQQ4-pe-mta01FHaYHJTOU~-xtlg<=}6^ ztWm89Y#J4Y>?7YL|I25M*Cod^9xDrgd0)MgHRasW{3RXq^1r%PIS-F*{9Jtp_m|HSBI{t_d;`Vg~cO~8Tu+mMCe~Y}{$K%wocioM9|8Woh ze^{9`pUFzI&6+ett0$krGi{#5o1c!s+^vCF#9(su(PZq6HXy}Vg+yIB0&^R%E7}2V zmJUVqwR!2RV<}ethBBn(SK{!NEm+I|Zqc_xk#b@W>WhsyQ)-6c^iHfC^BU%i9ftk8 z_8?ntCkW0H#`KStdPJX$!RC4MFmLqxi1k~Iy7FXPY{-VWC=>^GEx?NLU&3$I+~2PA z{+EUuS2JpH*l$2vWWJP5Rx|!p#an3~SlE`QIY^<3-7AO5T!*0$)H7`=5 zZGhEw0|xzN6x#tKom!aRPVP4n+m?^PwiTnWbJV5mQY44k{>9qs0Im1c4TChA|=&3OmyxOe`F z*F>q5E13LZAB%<22H|41l%l+*76<(I;j6Jjv2Eu{?A^N_%NEQ)hZav^?xd;Mv3d)> z8}%I~jG2gU$4^FNL@W-lQ105i6;mfqM@n)wDrzW$%g(64L7F-nsJipDb|k0eGI%IM zY;+`6FI#{q6Gq~j5uf1u?;jSi0{ z?`4~O*0}9o8bR^1MyQB7d9Jf4qrU2W=k`<|{C{BIAK`pk$ z?a~1+pLKe+i*o9+?MHyz-ekWJXh-jBEy-lHFLE z!g35QmEHK4z#`3BvY?k_HeWE4CPhW~)29d!Gd;@r$2jVR_nQB6CiV?wu z7vP^&3!6-W%qT*>>Nj>XP_9J|eVsWo6VXR}uw}uw*uHoY_HAB<{aaV!_?n5>Jm~`* z-M$8zoIKbo>XAoZk(OUf7+gnW zMN8g)akw#Ia*g{n{s~xQp|7j_prZCHlF~JlR~KkhDy4KbEI8J(i*VJ*SoZU9R#17k zX{8k`aFw(&7~Kx&EHx@Sr@TtGPJ_z^TX_i#9v4h>P!gZvSG8j2(J

6|E#++kWtfuLi-vLJ~MAw9PQS;=~&Cl(<)!^G%X zj|e`rm~;z5qVo|GUx@KzzgNR5Wu~n}p&jV_yD?&wykCuJS|n|YG=0f7Q7STFQa%%q z$eafmqADZBq=`(n%f203wWhT~=XTuIsiRtWsXZ(43-5e_;Zq2f@7Lm3P92t?GT`mS zftVPe#YWv#ETu}Dm0X6MNmitq&LCA+&ELV_mTO05j#WhxIR+2GSxKvbR+<7#-ev(a zBNC&%mKCoK78m$zpwi)3oHf|&dl2t@`6=eFT!w()Agoxr3~#*hCcd3I9ZNTF#?<8t zF>3lGO#EgHjvm;9Bl~w^`=*tcHh&r-660|0@)bDTWpGdd)z)1>`FSdsvRas2r6?^a zM}ArsjvqdtoX&)aqw(2ipQarwpa!_k2qp}{+yg&Qmp)p-P~WS@tB@H#CV-I&--gk z*7BEgiOIR;JG|c~&iu#k{#SN87~N_DgP$|+em^P}0g}K&frHk#Un98wX znHKo$lMgWAyRjHL^dt4UbNhOPob*RQUOGHZ3rb2#=y({xGLY2Q0ltZ4*cR);+HfOOuPq zLvu@(-da_*jRc06*?9&=#~JAO#f9`IdDdFBCQBAAQ@u7IJi~<((G1Xv&LP!)4l#ye zHK{k73Lq=rhD3s9e_k~{U2zyI_r;@A&-Vxms*e^e(4oCI38l=kmr0L}lOtskq)JFh zA0W+NPdqM)<;j~P!@M)_Win;AR^8CKc~?B$vI|;1(~ZGv7d+FklUknRnbrc9$1!u> z5`-rgAtuWNe+Igzk_wQLTY#9NOVsj83nS$`tG$a>lSntbWwpF9hU5k8A1M)oQl<5d%v+WG@GJ!N*kI1+z zL@~fl%rUB*V;0AGlvR22wJ9U?#lOo6l6D3Lb_N8Fas~or=iw-+M@hvQ9PvMa#KaT= zgKFd&1;{V0Ao**+A}ftKSwQTSHQZJOPi+<4H5H`X6}5<$#l;`U!r`bWB~`s(v6XWl z0>$9Gj(ppBm1NFXT0`l@g5;plky=f)R5#wveKB2;1-X>AI+CcsNJUaugyaGZa&&1EElUoauGo=#<3t}QHANKPV~ld zLW5D6x%3yoQe?VF6?2&d>ZwFaMVd8=VZcDR)ONO8dO$agr~R;hGGIwYe8~$0TrSK zF(KjDw|xuNuUmq#|U_sS7Yc(KdkaiKfqEfps&=ixjE}frZ5c(ux(vom# z^Bh`t?2fjbx}ZbHc07+Hr)-TWGv^~br3eZ6b_6HnAv{gTfH;rpLW7L_O2j1Fk(K0v zv4CofU`dO&A}yyF1+4SAhFV$;jM^%gbmau52U?Ad_rV68rx*r{_>3}SS;~=RuSTZ5 z4jH_E1s2{*Lf0kv*r-74tjo@FSt0T~Z1m@@;;Sewzwy5pEV6{HjR0{}-nyA>+l zYrJ{x+g!`-?5804sVN}*lKrs10E4E$;)TmEfu$QAV2{on@%g78VeB`f2$qjAhJnY@ z#dC1v@E+vnrXeyS1Ywa8a8;fKiv>>SmSX)04fGcP7cGMka4DnYa{7sUZg9|#BsBmF zg0m1q2PdYz$okLir*w7LN0sihO5fl)1s2oKfW<_h80-zu@>TOwu$bvH3S7`>Jjlr| zMj->tG&ZF1<1!Wt7+dNUr&wiakk|In%})enPL31GX^H*}=}>e0Fv=8Rj8 zjHC)=QNBe*mLe{;60uKkxY$zuFe9#kh**JU_aiku$GV+&zoy-wwF31;^>=;;jg zE*2JPN2Qw4xp@;7~r>BvGO>0P8#Umzp-fK;-|)>Jhex}h&sOkW-= zYvi{lXokH0i2}=eqZi>=Y8iG!IWc*6GInItVQWr3W}G(Qy$!)wD&z07C8YzUZ(a!s zG{wj(bV0)kl53Jaq@M>%shb7CdzJ8V`~O0yGI7R;LZYjhCjQS53!b;V_r)m`RutKc&&MNLf| zYyy|ilkh#T6VqpWhtZ=)D#aq}r?+X{j*3u}NrVKRW&&KBxM*-FN<9*-fB$?dJ8}Vz*w)?d+!@`KbvEe$IY?2F-iSO}Gd+2$x?1 zOP3C9(6j5aRJHG8%&6fQ{?+H0IB6U!A{8N8Fc37mm^W{LA=g_f&vXeQ>4HWe-kX9 zuRe^82b0me&&O!}L`$@3)=B|H@_$K_m$&JQYDA3ikU1*?4^b*I)L3TR{{WV!S}D+o z@_Fh2=|C30si)9f20_p_v~EYZ5LTUezD_M#qhqs9m^^$g(i6)O9pT|UEkSP1Wn?8+ zBR8WAv6(t$r(<%|S}d7)E~GM0F63`Z%pi0M>Dve$fl46(USz6ZFkX!m!X&!D;RTDd z;<&1yE$4lzJdb?o#J69C-EjkE13_=2k8oXt$wB{XKhM`2u-O2s^?xx~?2?_d#0w2O zqn47&bEvF2gYxPUDi$Y7D?M-)+hKJU!^I2q@OWGCMMlBi#e7VRMy!-?PRg6&;xhhV zNR4e6(&vzo349OqVrS z_>;H98WC9 z65muz*%pJ7rW=@bG#g)SJ&onjCQREEihvX=5(_JkLty4HYRSxD#h_v-wDJFc2^N~8 zhE}fDw>L9VDP$#0_E0+4TtNXVdY(jt7H;Qx4ScU-;mKq{$)aM+=KasJp5yi#C>Aw& z7BG~vu$A0UBlgNXS5YGaHCX8j4Gw6j4olpW;gs;9f&SRGYa_-_9D@-fhU2r(K7%Z3 z)Vg(BH5y6!9Rw!bx(G~uC0OXN8|_x-eLE+8JNs{gc`QG9 zDA4NRsks0Tl}LP1C49oP$gcz(1ctrx8r;Q~p)*uN!?IIE;2hAN!@S@EB=Y}!{(sVN z7F(nB*q3ZaO7RT^A-nC&FM>r+g`y)|6j*4o9*clQppt5=KsKFaw*4Y<%vX@2IfICz z3PefYWS$ZE1tv!O4%V$w9L%f2m#dCo)8SO~?*EAzvDLC!b8laXvi7QvMVh|^GRg>? z#>tV=9H!Fe6DR@}fsVXy*RmNpJl&iyX^YnFJK*UK9ngZx{VCcL3_kz#B!kn>CS%;O zEDYQjh9L(tFgmjupC(%I;_(c8n{Wef?zLgS#yl+713RfCCLARi> z({6CWVRXT!cfw9{5ilNW4XmuRMyi+s`hYw;&B^!fDwwHgT)bZnODTP5F^WqZaF@H_ zs_@W?;r3L)!F~VtDi&UdnShXsE3Li`Px)CELK9-*BXJ_+I3i+BBRu*vBBB$Jk!ysj z>=H_3XoM9VYr6x_orY+KsLe| z-F>$?2>wZCg0co0nOUqWMOKa#d5pYrjZ`oH23Yj=G8kDojnxE4#W|#voQ0j^A#Tvg$!I0Pc)9d-E{huKDi4g)nXEMsHFDH+|`aIVaqepy+sozt9j`|Ycd_5dZYDolEjVdj?RWI z*8zQ@8y5Nqt&@SNwHP^si>|aDHqTj=Hp^J#Kw(}Hva-{Vnw^4VT9zgkE_Wp^T=-wC zSY%{D6|J`Js+xTt7ZZx@TNYx|y2&`WZ!r$+U4%Wm=3>RN$yh;W6cQ3b=P09&E-{)u zOI1=0o7Rf>@RQiSZV}cjnu`6~mLmAj76ctwhg}<|W9!DLIC*BHzVXQ}RUJaHV$i~!-Q5e5B24DMxV900RqAeYMujU=l=@IFO zdqT}Wc~Uy%WZBV2n<S ziBQ=A;_^!=c`F(9l@l%{FgghnXZ61Xi_zuvh-#{1!&1eCD#! zpV3*yYcj!UlOd6rhzLH81BZ5F&fKXOInoOjX$q5tlcbNOUtdXiGLVi-*8TW(U}<#L z;-nkZhisGcb?w6Q-NsqpY66c&r|&(N_k2H?Z2J}F{aru8r5QY;8$ z;HR}+fs20Qm%yTxrFJd<43;bb3+qXez7$hp9QedH1G7%Lup{j83Eev>_5N z`=p`Ek`w5=?i6~hK7l_>4nUt{9z41#0WCHYdb_jHckvM{56MNc)&os`0b)XYaeV(` zgdACk@PPFQ^j(I-n-<{Eh82i99*DxMLRh6q%v!;Kvl2F0$V;a|LSztpw=cqhol6<4 zuZRDUP1w0}F*a;)PE4@sFXGwfv~m^6opf{_W5 zl7v$Bl~>tMtT_u>%ciaH_ybSiu?PA8W0G3CEjm2g6EDB{8Ag1!1VhKKP+$qlJ&Res z>G+1PLSIsebV~*D zYk@=Ba?B6Pz~O>ggj=p+U$9mwk+A$~>`t=4-+2L>SlQRa+YnU-?2aizK+Xk3*g*Mh zz<~%8TvRiavSxmXtebHW1x5$&dl4)~6S5PN5O{Du3+GCV8uKNF4gUh4eDVo8cI>Fy zrhE1BDub?FdZSAxX{PxPf~Bz|pWCDv>)!!O<0vw*AJ6q8sDAo=|F`Bx!*qzmM$IJqunzt@%g78V)A!mG3@gXF>UgA z?A^T;5#hnCtBGnvSdq~JYjF)ha2BQKfgHyrB=@SH1j|D$n&F|x zo2of0GKWRd=gX^PExz}j`_-$=W0AD^Dy{ybk1MdKJ{N*Vw#%_i@BIfJyYC(bqYtY8 z@1y^?@1dr6=Iv2=EJ>j8g1nSNLUDU?FH6)t6vl_)<#Xl+szb9ZvZ9?!dUOSU^X8igQkuoO73e z3s->4*WoJ4#6*H)(zp>gu+JAB=Xu!aAZuJD2;T35X=8@s!xwrX^<)5WmR|P~FTDON zu9kVQeEKAO_U3!ouxt~Ga*CnXRiUuZgZMN(qKv?dW4Rb}I38pC60n9&JWzKXzA5M6 zmwgrM)2c9hS17u^F&s~~?@6`N0#Ds}KMTSAxclzAao1n&`XR&dU;g-4m9E7*LGo$u zf<0ZHQ_WtDXWZ2FVEHZYz1Ua%&W`R?IB}3~(u8Ea{ zl}p1)sUv_St%cDn9hx#pvWEBZEc8W`zqX4gA}9`KlwogjInoFdzJ=ZmHA}j%638TY z;x7^)jNq0>IuU;ch+xIcWcfJF*Y6G|V}E)nint#|CG83-7^SA`%m|N3fWcruLRc8q zE?I~P-;KuDabKy<`%gdpl#Z<%I&^qejYJZM+ON-GIxboB-8+}1TUS}IN@lKiQ_W^Q zdPq7GIy*Y!pEEg^IBQWJ;>5*N6Bf70XI>}%qXKC>?pEh5|KIBH8~2mX1Ww*_{_{SK z``r#Ex7tsSZ#=hblh1B<%s<&p0Q|S?RtVkBBn?le4s9^vi%%KAeT~mPehcHqe1R29 z=VHh94amq$MN(QSq7qW!t~!h2nkz7R&cac79eezvQD|q`h>yX#m8-F9>o%-hx)|Fw zugA(&i?C(uTC85Z96mli*tlaGR&3dTEeH4F;K@@|LKP@0KSy73M)eQMEN`=i=B|g? zNplb~(%egsh~v{(Yn5Utbkrl0^&yAQ5wNUx0q-8l!&e8im~ha9@dxtYlPW-|Mpi~S zUu%#?A8;V88pD?bV$+dqg5_h}+w4)?{lI-{hP}#C{MWm0&b+@%Wj2;=@|h@?#?fGn z9sIKG0YXIbh28!8JMfP`{snjc`5xT;mwWN|JMUv)`Usjn+FZ3>{Nv%LF?P-tgcO}e zP~JuOCRAf{hyw@19N2%_f(5}j*qCC+qObz2iZftml8M1xHWE_ukrR`MWfMkV;wLY` z-)9jn*6HY>Svhe52E7H#maf8-k?&&ucb_96JcBB&3@&>Em52kY7fr>y?>@!mh2Nmo znoM7MPECZbvbzy_BmfhJzl>!whao5|U9IwI@lYg4Iw$&fz4Hv5l~>iGUy?`6Rdxnt zRp)T{$Z^ESClM&T1cA!+Tfp&?zh4a&X$GsO(~@X*#o}4`>XSFHaq&zA6P%$}lB}A1 zf3?O#dQQdg&)&nrdGn#ulqtBl>9jU1oQ+W*zKWUOe2zK`Z{B5kKLLx_JcPc|l@{M(=Z#zOIcN;oN#BBi5V`c$MZMVi1wrAYIa zz(;b730(gCyZ^y`f4vJ2-+MnEd$g%qO|E^{o_O)?PceGND!l*gavV-A!{NNMSQ}T0 zPc}wk(4wPwZ9^#D-WI9mv4mteRp)(yz6N=PZe-xaPt za_rAoqaym}Cbyg4&ChOk%s<&}VDO)`+ri{kd!}V8mi6Ws`q8`iZtO^W^~HynKYKF# z{q`a$F$y+-788tYNPQ|kH7&aWvK-YmEDzNH(p>hGH&>W^cE=rmW&Qsh{`$M$^Yu>r z9?cRz?n9(n@Jo@j+8Pj$kZ!)9QCZ!#?tYXXfpkW`D1^g3)fn1$tG8q5pM z!p2lPe6=+=rmaGfu?ndfML6vjfO(@o!@MycAV1+KYibFuUS&lmST0_;iv7NaF>dH9 z7*7j291g3#LivN}h%8JQ_XQ@8coQM}SJJ^V$QOSs6Xp3@l$wRg~QvI z;gdIB!sM^VAtOPj)?&#>m2?euY!3HeX>`hiE$=3yxq|4?9QR4bCL_^!X)t(wB5Sxh?WrSo1o>Sdi?79;z zG-FSK6pg|#*c59-BKJw)El%X^PCN^&iPux{xRB57 zGAp`@1+kj@N9AbX9~`1qkjzg>#g26=@%_Zn827CVPyG@fee{u1A(BH&(v=8U`t%+| z2m9k(78!>96jk8;_dTfYy);EiDjemQf5v_al16KE;J+3u0+q&n8k@*&-RHJ2xYZg5 z1l;<4H_xZ~b8g-Dc6J*W{3q>pFuB#9efC*&dA2=94I7H-lg47?7aw5e_haF+eLao` z`5`kW8=3h9$SBalT`6nT*TG$JUZr=Lzi0zK`SJto*tHP{c5R0?H5EZV8?kKCFl<{i z9y=CKz>%%XP>>vs5R!Ws#3BT+!IFerrKURc1)}x$!H}Z-qkdiBXEYmdkcOVUKf>dW zJc>u|e?TRY{0jrh|6%?AAqgdeO-YL{O=8lIBI#TjRf_@(w@DI8Nw0q=kGu1Cgb~5= z=il9hzuj>U{_*z*@!%s(@nG|(aA(Ulc=m(g7_;{j#_S2h7h8fc=Tt5ZXS*@~a5P44 zIE}Yw@5iPH8^Sdg5s^^^z4<(HlJp4LeFWn_`T+CB4o8V0lg_*r4OLD$YzFJBmmz_t z@Xg0BV$6p_aCmnxYy^^k1J%wS|A2e`ewP{)@Jz?f82H8q7(R75UK>3h zyW$-1%{haG;ZD4_J`#Nw9>q|BF`5cx8X#axC=%8g$Fi^FpT zMTRrbST8|K7|0xf6#?nk8EM4MFg<*O3Xs64&F6FxW>dMXh|yp{Xf~DvWg(IvT5>WU z>!@<}7FJ_vL_RBLF-%m=HbTh3a_FqThGeZ7;c-cPW;STj({apqH&!j5i|I4J#qi-? zu!v&$C$RLA1+!%4{PSu~i>y@G^wDOj2|?82Bab}7NboV`*ni0cAmZrdykcIb?}fsz z1&jA{@A-fFx!Nwr{){#5FXw5zUU}bmzS|x1Pj(v^{3q>pFuBzv6;G%3Z53E%Odf~P z!#+}A*|lvgjs+fsg=(eHXhNaMj>TN!W>Dze_a zfFr7KmQaHK79uXrw-9kOQ79Ar+x*O8!ln{hHV)7 zT2D+F@eWQNje*1DZ5oe>$ibW`Ut#pe{cvjkBKlK3aEX4HP!TIiOT~n*24L)$eHkz& z!R(S252{e*P(Ut9L`$AC#7M=-0v~?h37DP)>stf$M6PJ z;7qk1{)bm!)bPO=_0@Z-^WJHb1eSER1>TWi0V$kjk?I>CjlkGhYcXm0ew@gu z#hQ}_jM*BCMPYWV&#uQ_1|DJuB@46aV<|^chJ#S?PK1(qEa^p#e+d>@MN@09fr0lv z+japtc2-U*ltgDG{4)!1EIpUMJqjnIGHF@xkIBS3{}4>x;)6wpk0C0v2wG1Kzt@9f zv4uF4P>5JlCG0G>W#<8dUD{VK!(D%a|6gaMS^4+DwNawvcdI3szNmWnfBJ)`UERR0=gvtslisioh?!$u*KKO$({yF<^fKO>VV zST^q)tXw!An^sN5qFJLbX5^cg&24e1(J;76ps`<2P?8(rDXm0E#0gBB`3=4v^C1?^ z8;6~n7GU+#?=bn>w=r|-#|ZS_h1}d+7_?=`$dZ}%C5TP6B3gR^;RR<9T~LXL>=H!M zV)DunmQ#gDDwqUaJx(MWFm}>hbne)d1&Wah0U{$i+O}!0Mtn&#mo$F~G-SB3q{f%+ zjcUa^Dy*5>F8c^jWL}Gm9BbLMxq?+oo=?(cOCfxg4(WBu-_g@n;-$}L;Am+ z^i@}p|+s!D>IVizCZftql^HbQe*#r+Vu5PyVddEYO+l}`}JV?=g)qGgcn@5 zg~2VRj`_)VtMlDF=k1R9C%X*{{*(4oko?p-b?T&&r;hpRb1Ic_3M_M`j>q0z8*w7o zAKCeNI2{|0h=g=HnHoA7I;Y|q)X>pnWfsE1x*QrEhl2-CVbhx3*t>ZbA_I>j^vEG3 zgaqTzp2IkJz#n^kkKlAfJkqjr5f&2tTTnJ*%aL7Lc_(0t4~c$$98#QJ1LTAmAux#jR{1k2%U^y%{{nm^JEk3Y~94@wr} z2Oq&h;ujboHfB1O5n+C>IGFC6&H>F6s8~yZaxw=dQbP&)?+zgA6nu z#S;%cfo44a6HT7PV^4QQ@3%$~EJg(DuVLx1C*YW0Bu?}AoGdNeo-<0R zWad>NF_Y&vR3eQIF*UywN$E~xBx;eKpg~5e4(Sr@6rC5 zHfY_FQ3oZebgVtq{24X!OGbUkuwt1c*}7#Ll`>y47fZe{0gH6x%e)o=kSG^v7Hj_a zQ)=jO`xeilOPlU!*Rlg66qz*D25sB-zzeT@j8We$!Phgk;3!M{-Y6%Q9?iq*P!oo2 z2*H@$F_;;Yi?7!lL13B<$wgJj%=e~r$SNR$!&PuG@s|+qYxUqWM@m>3jICT7yu(5TvCPV%zQ` zh)*p-MdfwWFt}-80rNO6u(F?J1k->*y%l=B5h)Q72oLn5Vp)qhv&Lc4r0+0d#0WLQ zOTZ$-S;gTCSOh4YJINX&vNnj!ZIS=Gs&;+JEjD1lfFC;P|CNc8{?Tc3+fP8#2!ns# z@81WD+J4Jt@?Jg@sQi1Qx_-P48NS>&*QRm%ZI8LtZUck=q}>iCx7st$JcEwy+v4ky zUt<1@N%(g3P=aMFwr^gEgNOF8-06{)TSy13gQrRoot{UrrwaAeXIMT;2nRZTNyntA zK~|~@SxI`N$LAvj6>rn*s>Zbw?Ojt;*Xi5WTs1jS(rH!8jh2 zfSgPt+>TlX>($7!l_1Yv0b@Cz5rH8Cq~aqpar|f~_U!h>cAq`id*}#GhQ+Coq|*KE zs*q_U7pYh-sAe!3YHTG~tlVZT`3**eHG)M~dqu%T!wb;58yM-HrE|K7Qnz#@m7~m4 zjjHknlvnVWvI{7**P@X7XsRwk%VYE0HPDwa@^;!`sgSI`r6{6PwVUZQ^%c-*ZLnI3 zq0^TjIn@k}{w%Ush*JtYNG@0b&+J0qEZAf(rGW-8lfYv(kv$ZE^>@_#8_wa z?ks6t=tv|D|Fb=LUc#tjFARD4BaEH03S*{k#=%G{q8P25(p|%@lnQ*f%pWrXbK!5l zroa-M=|Vcek*z5wJPFNQ8?uU=$T1fGB3KH|7m!(4Lj_Zd^4iNdeBvZt|LA?Z|H=DU zG=C044*6r{%z0QeXCdaznulS-hGEw18Hn7o55ZfuVcUwW*th2xMvtG4=)`=SmHrhg z9Z2z2)K-BJ%yr7+izw7tq0wlO93GCS6O2H2uEykv!!dQ*_ZU5TGRdsyuzL2OGw&|T=*lXHvNB?4<-~u^e%kc))21;m5Pl_CZf?Kzvws&X zjpvrKBq{z?nty2myLq159rI6i8yNg2?RGG^)ubux*$(Y6X2chmKXVc$jU9#+3#P%} zZ#SZ2PQzJJ46CP%4!;srXRo5>%oUW1VyTb>sFkq0%Tdm{Y%voO1_qURZluKIpfJmT zw1ixwWfUW)uo@=UCDvP6;GU*Ow`;5JWtX-c(6yap z;^>49&vd~9%{pP=&}kU&lYmjXGw_|i3F|X2!zcSPMs111oZ|(U=o^QVspTjrJP!>) zW6q)9%XZWGmmsUqjzR|NMr$Q~L$Ml4Y$)RMu+Sgq%i*FAuvr*zYwalFGb(g3Sl78> z>DWTXOL zO)LmT63{?-Wv#djr=-)jRw2h;3{zD-3k+`@p_6MUBc&UVEqx6--s~cRh?bdKOlMk$ zOpP5mdN&et%t+Tbk(sSUMwW)M(Wul)W;*{*D?(&!KEmR)YAx)r6eq?_nvYJ;K8K#Y zy5YGVozeO^I+j5%E2v10FiC?iAZb)EvL=gsCdx&c!sLGekHAF0BS|aee{nv_fed&a zJtZAKq0*;AAH4eJXBahQ8D1Yf7lD~&IF?q0xqDLZ=E|dZeT5%}Z3)Gy2qV7U7LNUy zRfsWMMymb-atdmZmsbXpu2N-fEtIq_RCU=_RuWqU@?|8LwVrU{{iNlZdEXq>D56>^ zsk?w9!Kd)ryKiIYuurgJ<$U-b^}(7IvoLJ}fiiIfrjPvst7cC`$blUQ-nR|Q*38Ay zRrB!0SHt<;S~Q#mEBz%Dm)<~0IZ(~0CM(~LQ<2FyaO?!uY}t;5t5##d%2k-Tcrm`6 zFd4&#jfV86$U<6!`o4exJ)dUJ*~@g+}5{0 zI(2&v-Fp!PG0~J$R3M(}~k$TNlEqThHEVU)irS|L?)idi5KiKJU)YdiNiw zj_W4I|K+`yd@lPpn(Wu3Pe1gPXGc@#r^z-sPR=XeA^*$w|I>T5k6g>Yw(h-nJwIdW z+W39)dh2yIzL(d=-znC3ALO^nwGZg_#!Y(_1G>MA{?ENY8-#v62BII!bx+<)SZZph0t0Z ztn)Q+GhlR;UxlOO2Ha&pDFYAh;$8pRWHB!j>$6$Xx8GdwOWqqD^>k=5y!A57CDQal zb?iQ;KKlVIjKqsfl`4Ia(RB`aCI(+df%NNE>|!JmYKgkDbmW!zWR*Xb?2ba8As?Vc%cf}A>M@mcQeYyWkaYR-D!@_7 zg{q`6cbH0(PZ-JTGfxvHt-WivNMhR#?YpCOn=Z=Qw`Ty_z9Zq%ig0P6<_IlXu?+DA z2AoXELUe%+5mbOtDT#zZ0kVq-;v5^27!)UG+mMiDMH++VY+VIki&@tjkfkl>er3qx zwmfYais)0dv>XQ3xkelG1i#+H0MuGSA5ji%$rhbTf?r-$eVt&rMg?;b1{N0S z{HZ9tjOvPOD&JHoWtJ?PDW982K`mh<#PyWWIaby|S5}QoBX5|qjuCj3T7N-fsDxD} z|CwYJx$~5^bgYbcQgV!x#bwCSdH7)X0P^(6D=;EI--i5LDwb3YQj-e^B0JIxN)Vpv zL}-!?qsGl-WY!J6`#h(t4WrzSeFrJ!Av5eH<^A*hp1--~3LOwZA^>S8(Mk*NoR)sQ z`v0I*B-M+6NTTN6(t%5-)RS=O)3GOdx9?4`48_Rrm*MM0J8&q`fenF$SS;h#lU>-5 zQ;8`@Gcam%C>8}5BCzN@qI4ILP*~6Fu0mE;F^t+u81-ep2o@b7ZZ4Nh(bc@~H8>m; zj1NB_iZ4cdhFNna0>eHyAfD1<69ivu?|PKuZPe6jW`nMi`nz% zAuCsd(((%|fM-<79h>ta$|`Rcbp`zZ0RQw!L_t(|7hfx~AvH&Xxb!R}W@RHfH5Ers zo`QeC39MSVp3!kXJln3TTK@O>-h-*)dZKSGhxM)D7)gwZ+s) zlhxpu;NatG)^XEX-q-<|||4U%e7#Y1&jq4bk=9z0zU^}b8B2CBJ{FAXEr3`*1;FJ{zHUldnTv!xR zh%{{tk_svjOXU(*RIkAD+1fy?I*@?DuYZpA9b2L!m4>YDDJz1?^3k$dr~Kcz_?P4g z>&QS;V9}UMOx7Ig(7qF%HXWL@- z!ubf#$j6DK3`FH?5t*k!WO6(bvojExkdN3@JyP==^jB`x(vpy6LvpUHfa&5s4h5Ma za~(}m+|TT#O23}I+?!cN;Nqybs)T^6Qo!>YfyE<3jh#1Or<}5vP~w(XsnzDn z+%7mQW|TM`D0bN4a5xy{RH3rrs`rN(FQ{WpP6Edz^0$f-jRnYLL!nlWoV;8rl_F&4 z=E7vPsO|Y$2a+?a$kkRMv#I%+H;81oIwKBN_Igta&jqsS$HICX(L#22$tM`0*e6m9P-WeFt{#I z=~W_EUxFhiqVfIAg_t^P9%j#-k2P!7V9u;rm_KU{Hmq8Ml?xVQ(Tq9RxNIfXEnW`) z+(NArWfBaOT~~=HMX^Y}Fc*UX8D8ovWdSU$LuvJSMm-ID4i3anDeeo7 zL)RDI$79d-N4q|+py%`NV9?;V>9qP_Fd_0nuYMRvM>c@YyKkRCQ~`t0qu*=jF8lWA zuaZ_u^H$&9&nuJnvQ0Hl5mdmlQ?UUIL!qp;*NIhU;cB27xNUG|fK1JcjoU2Kd> zgs;*x)%dCcfnGdD_TzimCf_H=_Up^*;<*~HN%rfbnzrN^IsZ@JOW)DYTVJY-pEEg^ z_qRzin)f#}o?BkMzq9f8d$)UkzxTcj=>FnO8={m-e=3#!Jf>eySy!kxp6l9;_q2~{ zsuZa7?ZeOd^1FJ=T%&<_veRHZ^mI?mU$>Xf(tx-eor->o9BvfXQCYZT<;ZG6pn(pi zfzSN{7zd)1gi_6q&cfK6^p1AQ6i#XB=Kb9oE1?kjcM|wk42its8%|( z?}jc6JfG{-1wA`HiyrMepvB`YFlG8;#OHc&I@OAkiDm>Rm=KdxgbczYDc6bkOdH}e zEGkobMuAI>X3L|J$uFXB%eTU8ucFeZQ1w%zcR{0bp+M(^(OM20>%VG(v|T}w$ zeX!=!p|Jdhh@OkNDyE(IW^52*9cEXax`(e~iU; z6&BurBFbAc6-<%21X1y+@Y#0|JA8Iy$F5!2ymc#f?cR-(r$dpRT|f!wK~7-_GV)82 zl3T3Sw=UGwA&-S-b8rTHA`1|eSB&F{2JAYSiFvz1F??$vM(;d{!Jm&syDq&jm=VbH zl>c425e7Zzd>GXUEM%!+frkJ^`cx#lv8WS)i*(@2{{j@re5|q>b07I%)(h{<33 zsG_q-rDQMA@m>^F!_51l)0X@qSc(|I*(<0jsO}7`h?#{}gvF#FA|?^XgHPeWfdkmS zbsG-u^+g!}5AyTJfgL{Z-?JY9zK0Z83iVoq$0V`Px>@KhDz)Np@%hp!YY3Q%%Y42U z2$YK`mJGKg67^IwD4@DBmLM!$k0Bq8LaUxHqGh*1c&5`p1(yCj24O(g-WW_!_wCZ1 z&QAJX2B1s#{&=qMtLWV0Mb*zC4z4Q|PGje{yq9hAnatRiW5mG<0K}pG^LB4vhPMM= z`dOskLg3(iFKSZyeB^v`yc{cVknd=Oi=0bdWgl-JPTwE)m+f-AoKL<_j#ua9d-?o! z{TjDgW3H}$WnDV+I{1Ckq}ru3m6lv1uR)qvojZrUL9 z?KY6c-@#)fQ0gs8hiY+Pe;!My$e@WHR64TGzT_8^b3EF%AA^B6v3Sz~Bo~ z#b~cnP2>5-Dr6LuLrbva+0L^*oWqf*BCPa}MG)(Jto{-LQ_HbDARQY{XR{ti>xKhq zH^H(euLeWc1Yi;CTetr2;*loz;h~4`@n$k6BotT_T)Yc>Nwb$^F_tDTwe4oVivUMH z7Z|Bgr7c?HnHD?;>wTNnk}3UJbZXlkU0b(7muI*iKc6~%2~sqyuZ%$% z{a3D?*H^4mNm90rfieSUz9wgx8SF8DE_Bf6l^`q6LLZoj1BXxI(9uw3M*_kT7L|tF zOb1NbdIt7Df$1Ux%=0i&NeWnugmGL<79zrua5^N8uZakcNI^_&Ci3VfJfdI(C^Q*v zY~yo~W-#ev5wLiwul;slQR}VSucEH@60AlYB2ON|#^tkdVEZ}*AKs0qU_S)=?Z)oS z%dld>_Xs<60tTH!9j7re^0l3V&FDs0=rKmt6EWlaacb6YNYD}ZAKHUO3%|jQCmJ$F8(0yt6G7AMcLB!JKM@6`Vt0d?^l`w&AVihcR^X zNxU|C2D(wDbbqu3THSd+{`T0D_y;2pZ*!L<;%l#zi3}xf`tW0_`AeW9KoOJAWJH(@ zJC@O4GBWJxr*19=^i*>^_H+w0Yx6YP^PJsVKa1Di`ViktTZECbR^eE@0f)m4*swnt z)AmJS_Mv#p*&d4Nn@-@XCHt{2k@8o67U_gauBMu>tc1~2qb5p9$6Y?5n`32Rv{kAV zHw7#P3uP|BqO%eNyq9JtE2xtZi2EYJ&BDS;n#nR^ZK+kcyI1zyz<>rH0$>+I`(`M{d&KNAw6HgYXe`UGwY|?^#=@k0X-Rgzx@20 zc)s^b%4rUI{w3u&2M%~anY@>6jShA2pqDW~7H4CG{``O!8F9-9v;N%YWwrnF17GwW z+rRNWBlw%|#Tw5cQNI9V(7>0JgBDft!jRY0x#jz0A33*dm*YgO4CZ%;GLZj=41PtO zL-v1R@T=T+Fy9lNKV$u+dG%*Zu1$RxzeAuZzeCO|*C*f8pYLCK;dS*}WxKq}Hc>9} zeh9C12vzow{sWZ_78}5OGl2J-HgI4+JpVkec>wRh;1~ECUiN~s*Yo)J!{PXRnIAr1 zdKhC?A4Nz}6|x!SYQ*8QejAHxP+G^bJqSVl=hbnO%)fRtI9CPb|6(_z({@eTZOr;K!lFHxo=YE<-HaCDEh+ zrcteUKlctfmiIEMtXY$$XwH3~pfZt>rcX9&g{NpOX|0|lgxWlZ_l8f$mJ@kcdt8G} zp_1MCJWga*VCmjC%sZ;b;^P+hrq&@`cL^a`We7{PFle?xTVzH;R1EfSS&Q`xrs43W z#fUkw9kG6!5wK+ee3ndv|Bm%YkBfn;qy`$Z6NMHh;lN-!D;cK)c45=f2{`V%5~0C+ zaWZ%hp|lyBw=Klsy$g_;ct{Q9F0NvoCQRfRh+>hnF4A=&19yHiu!saR(yA)XDrhX3 z^Bty+{}S=115jT=ZF;E=HEt8)LXYD6v0q^E{5d!s8b?VD=&d{lWo%MxI+iS&fuWzg zg&mt$!(rCo`lSZcR~1v~Y{qxre~Pca`4T&QeCc#q!15}PlI1{Zo*SnNuV8CpDL&sH zk5Bi-VrMcTMX;Pms-RWk-IYi1;krNtmfm!5Js*D>?f%gO4^aX?(xw9*dEgN>(_V%T zw`eAbCLdLkBxPu^3^x`vBPI}$$&?S?`ylNhWhyD<{SV?F_uY$sGWt9-HaL<(l_4@0LnN1$2TfxLe&;lw z`-*a&UMDSpdHJRT9i+C&XX0>Qdhrc9-%iK!MAY$#ZbDpdRbPjTpV^2*M3@$SuE)R7(}~ zW#{0iItOQYJ)>qP>zq!F40IOPqMXXLgm7`nh#`XF=d8TWt7=4{h+2_87XgZ_{2FvR z?H9q4TjWv8^lI%5C}i2rW4RAzpca!`id4N!nk;6Wa4N9m5Aplf_x#5SEDt_(znTmwX5Jm@4-X=xDWT=*F@O^_cy^K4>rZ)k369!NH%@41Nyx_97}x@ zu;frCrtOHwierV?O3+MPbqouRnJ{ikGL{|F;zVveq6+EXOm!-Ad3IJIHm_Na@5ciObx^JaszIZ>!6MG$A(#>F?GbJ@Y%cp`9&6JEp8YXvFjYg@H^mx1ye_1#q5#D zPYytJxgI4Yg$&B0v32KSESmK>_V1j7jC_|$Lg_5Os&a+NkYgDgW|JV`w`vNrm-9<2 z|E^1sl(VKnHVLV;k3oFxKQ31oX$CiptM>nIbO&I7l9W(o`4RW`{9{~8D0GS0o+Ap z^1Hv^uTr}F^-q7rJ$K!!Kp|;c1RA19M6rlT--^s{k#sNKS^D>=B$R)@^Y8fUU;m0b z{`wdE`M$ew-{TMC8G_}xwjJ@-yB}iwtVQ_r+gX(Cd5B7LBO=*_Bk2yD*3}@Ma12j# zVNXOMA{cqa%X-}!MvMjJR2gzbno1ikvSuN?mMtA&)cJ?`g}ki zSp~E=pIdkI@6Gekx^?QTj_b*D_2|+K&-d+*E*+osemCFCaebcashaB4dl{0hzN3q} zp03Y!Mqhp=*VMgJ7xdzH4wBJiJeM5vv&QrMob~A1jlW|c%UBQfeS`XWf1h0QKpAy* z^V;S5p5t$B{H@YKEc^E9(T&y>eR_6L*1KnCWj%X|b-~~v162QtfJH#osdG=XZqpU7 zzV<$*Ok0c*8-g)>{Rxa(yaFw9a|#%gWFk9H!(gP0 zV5uc2DwPuXITMK7`YN!I5n*wudK?Of`9-iacHV1P=8G5z<(TWR|6~S&;*Cf%$f}YK zWE)LLD{!e!?j(B+VyV6}39htkD-s!~#p%vrcm6qiwjmTt_9dhHz)$etBZR|!_u*cZ z3F1Bl5}AE3v*~3vzCc4#=S%Zf<7hB>73I>DkdXdJmZz_h-U_tOvKg^o&HO3A5i0We>gLFo5H_p&MQ)RgISiW>7#=P|+7JU7sn(t?@ zl(7ESASt~Nt7lKc_n*Io!)s>Ynuosl`bF9$Tshx>Q^${D=BW3ubkY|HIF-WZNdG{k zVq`!n{VZxe3!jyxg#P`v0*i%Fi>>?u>{cC?OdpH!pS*%yE2iUGRpm{vT)O#M0iP8! zFzo#oF>T7X$k9t1t`{s@2%7ibcovh#zJdBuJumtK_rK=-0Vv11HIo@3_QB}U-ykMN z&%#}b0^ax>gNc#IS-idW1in0wgwGijNJZJ7P=c`B^EeV$iZBPT@K_#(d^8@5n=)rd6lLzQ7e)wOn~CeFGjoL z4*cPcKjDsh?!P3KJr`k|}DZZjc?^t9_ z{9-x@mPx(s0t|NPM3q4k(*7;Y5qyTOdbnBP1ukM9zSkH$ICA_nk}|STcm5KJ%d2tx zWGDhpM8Lr7DHqkk^Q9XvA&b!3l5D{|{_u;_VOL!3(dwh_BxN1RuWg2Ht-C4Se{{dwBEJ*YN&Z?R?jw86?=du5QaS6&qxjOPjR*I$1f@4x>(UVrT^y#3C{ zSg>#v0s_Mj6da4y5k{a36?92ZY5b6K~s5&bd!$b zizp*RU3Me3teAzNuk^&ewR6Z3{+NsWAq~6<0+!3=*t~EO-W=2ov!+i%9-WikRR>$4 zS)~Yh_qC3gKJh&`^=V$PP_5t+kGo!s)hj2mQVhV{ISUXKr9~EHaJEKIu$ZyzXd<>p zXc3lQhmf3VtY)G6-sdDH9t^{zgHf2YGn|t1I0n2q98W#{ES_rdB$_?=ARhknL%8#I zR2#ql=d}5^W;gb(#nO>cBMS%rmvs7)M@;sU{bl`@-~I0Q_@DpzAKddOBcR8c;OWPj zp)I4Dw?Fs@Qx>hjr{B#&KwJSLskCCLT2>#4!M^AMO7v1BWV#SnP=fe^QY6#TY1xIP z$SWdDw1g)WOM#IWRYUKrV$>oNrOqI;(1?JL)7Z&^eIh&vyY}zE@l(f8 z(@;sM7;)&JKe943xIhQwbY0`|SCPiDk>a_8M8`Q+?s7yCE~f+Hka9W+1xe|czj!v% zauN`g9Eyc2XY)DdA#lGBHg8x72ZNGro7dpz;k_{G^00i#T%0;_6xkVxSiNE)QWB#O z8Fm62)-FSSP6|R#9^-K?;-W(l780P& zQIMO4pn!ww`-%!O)V4jlHmiMi@7#!}@Dn)A-ze7+6&|c?-RdRC%TB?OLwn%6XB*Oz zV|dIa96xpdsY%i5dP0Kzkr)?_Rm&IfH3Bh_Ay~O=J~C3{xZfdlK9jzH-?0e?_U_>M zQq^%MgN~~6tynrw{XRL5T$}t3`3<|aZ$M6Fk~)5`&la^$cvK`#g+^kB&q16FjYmp49WtZ*7*j2h zSyr^wH;}_uI!}&93akj1=moHyNettf7`|e}F5yY}uphk<`+U)hO z>__z?c5`7V`jCGIEYim!iX}&10fXlv(zKQE2}pupSU$4t7ZB&HLoD};HV}lSi-=@! z6{xGi(bL)3>BqWuA`AYBZmdr#$Gc08VZn|#^b)W<`Y7(XN7iEbKa)`YQ4|P+$9t$` z9(lOw4*D%R)TfrV|Da9gB6R za}Z>`NWT=1@q43jsHhAZBl7UgvLo1YQiqrVDy?iceS#T6_{lD`BNlczx`kMa@+A_Df}n~z?^l&{`_CMm%S6tPPekQ3#v)XdkP zy@^BnchR{~t?(RGj&g+hAHuLt`r_@E+re-5THriGCus^J8EwXRO#1Evy!2vktX{Pa z*;$hPw~|hZ(!8JuhtljgnCete3C*p6Z=wlXVkiaU3b80O8!JxcW7Xkwygzap+IQ+n zur$Nt_ur4l?|uwT?_}Yk?3Ly)Q7)3T_&!D{ve1_|S6DYSthjsU=TskyKt)!Ul*PdW zNTOW+{Qy$km?C0Lq1f;P=spiAp^_;BbKn7(ukKASWLfe9K!r#cXuek)i?kdX0T z1dB@+?)f*sQhkBXPo7}|JXMs$mFJMBx8Y=DG9fDb`mHOmZrcjX zSTG4b8&_fzo%^?Azfz8S_KZn{!7NoaWNF+j8&@fZ|NX>o6gxq{1rxl`e@eWSYOMe}EOb zpyN0ed=denp|F-z+!iE1wO<1kt+|rr_zZFh7LBa|S;iU!#p%35cJs>+!FmytZ%3G> z9^pj|IFRkZ!CW`8^wp}P|1^C=WWgD1%dEqD%K|Z zEPqsB5fvj%Vv-_XfFf{_WsIexUtlBIjU{QNtjF{>DxBZ*I5}4OY$QRYfTdNdR%qS5 zFWwk61@rx4u_Po9Be$KxbpJH0iOI*8OLt=heUpEz3-Lwugl07|H6Cbm4iwP0WhW<6 zt&G5kkKe@cgWLb9Da`FC!i;HSG3@05m^b=!#Kok->ZpL5QGRxT8LMVb#e|Pvh41od zxKW~|OQ&MF!C;+W2@deXgil^l&0#0PGWcxxjLPXB+~*0C>uOY(nMzSsko?WSV)J-A z;Va4-;IJ66f9D$2Nxy0NJfz2jz@^VcPErImET4@rU%rbyJGY`R->fEAS>1r$(g1y- z1^f1H#>n9x;k$8P;Ut|v5hKaWlvu1>F%hH3zJr;wCn7vD4tm2`=LMa z!t!m%NOq`PMRD0SM6jR*6gjXz!-P|bPK1S9=%5y>;gwCFd<6GAa2KAsm&&5aGiqf> z8RaF(B_+wE^s~tS9olq&%xCcqNA9Mw9m{Aj85Jg@!{mP%QP!eaD?IYRqqv`H<(@|# zLTk$AuI)PF!!N$Vlx1u1`P2nCo}xo^I-|o(g5_v5$k7LzQen4n6i7# zy2S`O;SaOfjM&%&!X+H$LI=w2^>9{Rgn@;ykP)P$_OTc%q0KR2?`9wDShpUVwyegA z4U4dL$8v1+S&elY7GtmP7R;G9h0*m|Y}&k%=U;*?+ty(1`lZ;jZwuCMScchiC-ePQ z`0UxNG6~4%>-hOr9l}TSi;X?_7)d3ubV?)oS0RJlCq# z3$bC-3f`kt>US>WdF9-49kb_5R@Wf+L|p^-+syq|@)-Gi^XBzxeWQ(=)?m%r<(NmP zZQrqp*R%y2H?GCzZ3N`nHQ2m;Czh|;h#k8RBRk)MLahf`c{T8 z#Z%Lgp)blqvC9IzHW#|0T-fa$5Sw6(N4@fScruICTxyy<7iq1PUlo0KCc*A8Yc`4@QxlhgxM3uVEK#*$T;nX zI&&t@STm6tviO{9u^O7ZY&B8GMlP~xnF#gxy;Za?PDnuO`! zkHg}5)3IpoG|ZU(CARKdKuI4BquGx9f@)TbN=EZl$fBH#(YX;Nd9~76Q3#gk3^PvW zT5w$JLJ%YVsEjhi##IPBQ zaU#utm<+c9%c>*)S+E%GSw4RBM(ysu}fETv9WB z&4vnC`3wRXA)h?zuh#b1cVs7a9o~XHN4DdT-%cDjv;!wj9)a(H9f*oKi4(zo@ZG;1 zp<#hI9ex~p2?KHX0+8KwxCamWC_wD>-NtNP&wISH{S~^_8;7-_S?;U zf=?Z#quroDB92=?A;<3L_saIee!Jm!WRHT7oaewHnM1W&9lMR-IvL`RAYPm7yN~De zJGvJ;eKz8#|2|&hb~^HnIC&}n2M@{ot4%m^bU(j)2M$pU$>#?S`cOF>=J)L7Z`h+g z6E$&&|I2mm;CT=7JLNj$_Z{Nv@e_yn{hP6G|2FmAyZC*wU9MBE{S>dspY_Fe|8D+{ zJ+$4to`XDxFZc0P0l=Zd`>}P$Rve^S@jDiXwHv9*j)gF?ttLdy!OpT`R862~ShuSY z8Jmbxr%s`=vK-g1oL9|uPP+jXa}jE4%Aqyr5fT-_fKCrvMHLM0^4o&sr}pa?Q7m$XTAqJ`eJI3uw#b@h7up&l}O!}3$yb@YDlC54Jnq6Q?i3aVo5!6c6c`3u?xoyfPWEiTyqT(`pbyZ$>h%xq~%$mDKx^U(ISW{cnt%Ljq|>P@9J6bT{RtB z=Z(ecDZ_C3;4bLtQ*AEs6L#boY`mA1FzfRX8*%_^=6{XN%fG|6O$!)=EWqMrlQ3`L zcrR2k0~J){xyZejc`P#PUiw%hSJ-a~7MVR?S`JFE%Pc6;30wuY+YKuVp2)tIeUV3kRdt_#T5my)&>u=9rG6zY(io`Li%QaL>hvGH-pDaeP} z?nWV_tCUPDvI@$Pr>jL=24yaz;6{l(2ry)u{4Yr-rSo3$hqaLzxGY$WK#|YY zM9HVSpnc0uXxq6PnzwF;wokP|yB6*6`bVE*!jd)kV)inXl0G8Kqih)!%Pz{`xB{wz zOeZpOtjNrz<=OeWWMLvVai>J*@$T(pp%lR;(;MrjiEO`C3wY1)i$2Fgc46 z5)n>kbO^~*k5$#BIDPsgCVe*%JGc4pxtfp=7KOx!XyoQ-P|EXA@X(p?T((MB?UmTQ z>i~A_*oCmDFa(|o#CAH>1IG_x+kQsS8&@MFkt2tx z0yeWCM_}(>svbJXkdRyO7l#iY#Ij{e)OYy#5tiGxa@zr(F92)T zuI7E%t*(3Znw1C+4kB#na8|E_|Iq+QhJ~$Lx2oo@F6T-z6`s44`92G zFBU9WjYCII!Nlic7x>$2P*Gfqijqo%28Y7`$Wau#9jK`EFp!HuVsa$wwGBFp2H^>j z@aO$6ve~IrE>oRWqNL%!uUHy$g^6OxH`gKGCaLq!Q5j!iy|2O!H?ZCa%sO3yFSev% zX28NjazspKdR)D z(u&dSDK)o6J{PDod88?~d)H)9&0+js`dixa*r&PgQ}heXpP(^7efr6#(4Oa#I5XSszo z#KdQ-Ns^}{Q)w~*I)lE$09|1jiXB%NU|vPO;XL8XdqdyqEM?GcZ-C8Qj`Y+*#73tf zn#V;(r6MQKgtCfrs6R_}BEFb`sLW%L<}e99@1wsMu?UDCkFjD1)6brc%Qp)q>s6iZ>HGjkP}@;ggm zw#n>J$~Th{MFy*yd7mi-Ca0J;zg%^I#}?R-pmidPPCA{^HD9d#`l^%|{V=faK=r>U zm&VVfiA=Uj^2+WVd!fg(ebD>)A?Pf*mpbsgZ93!aPlsXR@^$!Z<`NuZL?4#nQnvI+ zlmbgU3q*3Z>(_&Y_tRh_SnO3lf`v*&VB+u)_P+oYXWa!jYgy5&Sji>JEX~P+mQ}<|Jdwz8%=ScLx#@;;?h)HU!ggM@L602Ol3FgNTSQ zoH%hDSy>qhB;tVM6Jixy%O;05LI9bowV0kRl_)k&%(gXg(N;iSf!2@7S>o zxw%;i5(0wcltemwUn(7c1|bOwM6t2aNJ>sXT3WI?pE&Vl%NDDB#kmVeQd5)ZyjQ7n zgoTA*!NPfnV)TCUE~b&OVqxJc8upWCfSgr%&^^R4iIVxP^o$n>ll)`Yb*^ zp4Wc}IXPMC8sv9n=VbCXgdr|22I=Xkyq*+wU2>gXn4VIA6S&GYfy>dO$52>Uq#!0x z$;!%7-xHURpcF;{gF3CzjL^tfZ1XvQ$hZs!0DLx7mu{+7r=5C4+=Iz#T^)QYfqCf-_~x({vrl?(zzl>|0GUN)NX_>kOP1QuRKYjB48xZn!O9&` z=-2-vw0z=8w0^3kO6ek5jlFrmI;vb?jaiN*or{1(HHQ%*(hMdOq6I{1a^w@u(OGhb zJ>6Q(xbN7G0VaJ+d;Z^VDAB09~C z6b4JF3bM7vVpxr}Dy56gd0ayKxR95MwC|6}MTe z)zFsEVHUISc+Q}Rg(;t(Yq_tPpBt@pDALsLNVCk(OBCrt^)1_lqe%4dH4(K)n{Un{npjXhn&-3WleE@oO?t`~K z8;P-t*WlwBOW>Dkz{zwcPSF+;EZbxA5mQuwMCm7@;>yl3Bb(AUyTC!PxR9eQMvekY zIV+Tar3!@#EHyuXMN6m%Saeq2XPR0NN$#nWg~>%J>%Io3`#KylZ-wS^U!pa3Q6XXk!@tl7Mi@GL+~LJ}h46QFmw5S*Au&}JYl zGnWxqEFuZ0octmrre-3Ksx>Vu4+$w5$Su%P?ZhEGIv!bh8YJ=a0F{7>S*p+KHH z1;>LU5F8SXsMu7jS-%~pPRHVCKnSKxpN|u#qWBw4s$E>ZFOX{C(2)RjFA8`K7OHcN z&IFB~<%0JlDJ_fV3Rl-Gzt#WvNp&4Z0#0BLzdJD@16z2HcT<%_M#kVEK_7f7l&U|6 zYG1?OoDct?5NzkZ5wYnEJS27c1(dK3n>7v`-s^{Ln|3JBiP8!QKZ)A&)u_HujriH*GMqsWJGSNRba`pUqEuBY|glX-9_hdSX;>;&CdH*j6yo;{K8@!PWRyJRfn-*cN7K=_ynz*HAmZ) zPpfn-x5A|@eT2Nq|B{5#t6*BF1?mJaqG}X)c$_GkXP<7PR7=OUom6V4wrx791??np zW%E|g;QpuD;nS&0u_P!1%Odnx9A(1RoGKhPp2O}8D`Hc1NR`RUg>IFEQY=ebMlhBu z#g#&TCdqWua@|PHb|RNPRd1;!TzGE`6)3Pck!`d=%lfD*rhh2rz4Fu}$4Wm+pW2w+ z*dcwe)-sr^6)O0YB$P$=^9m|5DoobAS3sdjt}p|i!*AMoUs86F&Pr0@Us2hMb-W-e z3sGZcV;h}eC66%?JT~rAV5?F4T5a`od=1c+R-wSn$Xtdx%33X!YUIqB9%_O0^+0+k**{ z=b>A>j(FwS_IR^fCxWFnUhFpr1NwNg8jE5P$cPC<`uFZn;CR<)kzvR3`G7tH)#svM z2K67TjvdtVW%TJh5YP1;gig=(MgQ&t(Wh%ay!q)@_-f7)d^l|p4khalOy~vkS{L|5 zDzL;7EJ-XhzZNW779fF(0*fq9d@EQyzYG>r#aZa7U`&i&S^nUvxtForA?u ziZVKr+S*zbk?-5L4<3gLXKU#Mv=#;sMMz1EQQ%2Q%YlJ~*G8x~s8~F;ypFPZRG(q_ zDPx3NQjX%PYJNvGJm=5DQC|-?6>d3|tT@y9vlmfWdj_><==92~`Q08=@H1Iqw6s!Y zd~-i;tK;WZzRKL1l8PEeUsVi3ocxX|wV%VyfToJjEG}2?<(M-0-&3acH`!dMsA*8| z<@@Emyvn|EP6zk1Q8~*oa$Y%SRoz*ZMJwvhvD~{#P)JzGwz5hB)K!71TGok@8Xi}U z%9``Mek#IZI$?fhww0)DZvL+&OzO{GB{*#AGg0VeJij#c%JqxY@jl3Q`HgaI_M5*! z?#Zp!E!Sx=yK(sTqO34-GAFadS4bgaQM>56-m@)Z?38VKWU`>n$xf=R`Y!foF zEXblF@FQ3ztPjA}{qYJcjj31!6pa%gMWOst-Y}Zv3zL0Bp-2;$fJW9Gk~LYRnXGj) zs+guvpxrYa(COK3Ua$~M?dfZpQ4uxo)C&WKj>9{%w_@bBP<*kKwj~6U4=3X5E&c?H z7Ks@~rBtM!HI!cAR`NhcARVwwBZ=ho1Z!geQ@Hw*1(>E5-AL?8Tx>-g|r8UU0 z(4W`{kIIWwboDUa>_>I5K1#}btBv)K&s^rL>D`xkEWtsLNOPEn^ z(hvJz150vhAu9|kjmmO+m0#lR?D14disf@~Qi_(=vtTo-(3(mqv+7Yp2VgTt|wIDg!jNnW=!uWtD zeZK&mI(0$6-p^t10K%f%^XS%Dk`Yp|^p*sJ{Z#5~iBhD{Ncw9@p)IeHw69;kfhxDt zfB}-HN|FKg!H^*@5lX$NYI+hhz14Yp_vHC{^~GBseva`omSW_z74VDG<7l!SC$dVg z$mcYUC0cMgyBIMnJZVy(@*K#>cOp|}4{JQCDJ+j*5i4L+Qpn$?VdPe1u7Z}})ltz& z##b?!fF>r9hk?&P+Dqm6NTroZDycMNVw%^ym02pbRB$m@*^QfaokmB&AV3y&bBW_2 zSjrn@!c;A+go4&?M|5fmf+9{6?mApzNvXPY4n=%slCMecC}W{*fP;lmTLEa#1F4sR z$ZAS-?rY}(7H0)2%Fd#p_8Mxdu7R-$73?`i!I#0!aPn2MIh5A%GwxGdeU&D!*VVGA z%4$Jqc}*sTx=ODz&=Dx|J1Q7?vErC{4ht)oyN(Ksvfo5_CdA5j*3il; zxIZ0uiTfxNt!n0e_Fjjbo>RvHRdb295+7_mgrVljxiR3R*3L z6fsHH@^kh}VDTnFl+lYa*yOA#v)=Md$4F}|=ThdS>`NVxx*&Bz>PDuv9I1@x^Rn$~ zVXQ>mb;N3}AT`s23_9qvTq{x;wCzr-!j~(9uxNKUy7YMiEgooswoSb%M4Gq+64K12 zX4f}wskS}-STk?)7$G5_%VbGOS}6)g5>d+brfna`W9^>6lWkj~RqJO|^H$NBpc^-T=qF9V98!{@)B?&_*6zr^VPWBQS6)R03%SAMM$qw7*tC8FHgDL7Jv(>7XZud<+j{^JQAwn& zhcIE3%pY!K6s=Ja2_2`|fa5I8()qb_=T2;1zmf8MGq!A8i(Nk3l-zglM;93`^I_B= zP1ArJ(Vr+k67codX{s#J?6SC5*(K6}2pAwRB!oOg2fAk%9EWJU(|fCAbY5hePFTvX?U&rbm|K zgqqT8NMI$Jeyj+ygA6!ny#gH_uCs*EKb>f$G{s1hX~iYg3~H6sK;lScrY}D$rt_CV zT~b4+NFqa)FBxO+rUQ4=u~XU8!OEbK8!FQ-#ejm2s4j=B0m5_H=x`~VP~318j>>a{ zl{iHiBG15w5nW6|zFLt_7NqkK925)QbI5rKG!yr!cbCk{eJmX9s2<}bF9Ty$P$S^ySvl&PeCMg0HY3d?W^0FN$%yU6c^9u?6Km_&7WSg-O*krbYZ zsNfjYe4$&qDbD95NLCQ;OjFDQzyTHwX3EhJtLKpzXCaVEL25=OI{r!?ZCX4 zGIXAE5W@qD5Mcp=wZQ)DbC|F%75!)UVDj+-jQM^o+C1GIk3aMvnm1`enc5mHDPN_) zc%zWEs<6mt5Ghy!jxL?Mv0$}PN=6FYqfH)Da7CzTTqZ9B#h1==a1T4kXjFzQYr;<_knTu2~=V0=bs3E5*x%o)dXep@~1y!A8 zWXuSu<`N_0D=;$Hh|<>K)oDKXXz@|(O|YS;{01smPU_CcE1ex9>1sN~YDVl0bZ|BG zjM!@!xi?%w**Sux`YaUzBXpkAM)lzkXH`j%@HkH?;o>25$_WFSN8lo0;CVfSfh5qA zxizI!C>1=fn;upab7e&XDhRjQ3QB#0lNG8;nXUXP>;!_fjsT(KHrJeiv;G2%JgK>~ z7A17f_HsIAf~tU#T^%auilcGb2vFx4RMTlxQ;ik#V%&UIF5Y|T z+|AF^BRnnvkx9wOwOZggBh4W7G^$`eBU{x)m#+geTGV396hYo1=a6r_kZ47HHa{ zEk?~>kFh&XVPa4|z7Eph^MmR5Y+oWi+8T2-6m7<3Co2=EaP=(kS-DGE`z<>V+ z>{>q!Cy%T{bm)G>Mf>5@$z9m7eJ=LVuV$s~=QCm;!sjA+!UQTV21%+}Ql1Hepx+EE zvUF{!R5*UQzrR0*eeo_v4toWO(YtW%f;50QX?Da#9mEIkzJw1y{E!!TQh~))%!)-;5i9(WBlYiC1ucdJRbG0ymtNaLk?gK8Ah%su~)aokgjrsZkc2T8iTuV1#cr zMjY4S;{#dP7FCLH!e!#FWDMUJfwxu$Vp?z!#!OyAmC_5%A8mps9)1W9H))24Xp*H= z#;-r}@S|!h`$G>kQSgu`MZh9Z>G51|1s|CdCF9o{ha1ZKhab2X58nHCJbeE>X!`I2 zX!=MK1*uox`B;JF)A92VNaYk&L}x?Qvi?XS0uoG!$}2%~QQ5Bsi+m=PRw`y=MU)CE zS!89~e*!EHg2h%^O}Nz3>C*u=P-&F#`V1zjMhh&AE<81o|4I5o8Wdct6*rJ-zk(&f zIxIb@N0{k6%yftXmI^v1cL}3&M$jHvc!&{miAVZM#EH@Q5hxxybypqBUHv6GR05KU zM!+KAkme{^gv?cZLji_dqY}E#@4v=qT1=XZE)o`WRvtouvcci0Mj6jt%imK&sGKKk z8o0gYJe@TwjVK)fi$KLlhpsQDLOaWV>EaDSjZr(xxhQiZ@6-O!Gz2DP<5+qgwq}^H zCCvyQK1bg?Cw6C;u{X_x1L5D6M-LN4Y#E~Ud3 zsEAr|Qmshym#svaBv{AzJgltnR#Hin5&Z@nG#l@MnfFhiQYBFN0W5?zzoUYXt)#g< zSJnF}S~>4|1?z4D%SJuVT`K(;yyte_lMCm$ud^JnDQVCK~2Qf)wV5y5RatNJP9GW19-uwgI3@+B3^ zLMoOn1KvWj2Oh=~w1;ojdzG>Hz6a?K9#rXCF`fGD*>h{z}~Y4wo)7B%NZa)#ai zH{5;Sohm)d{r|WZkKJ=Go_ydzLQB#+J&wm)wa5Dt=3(rPlbCd(0N;ifuwHi={(OGZ zLW{6ZQXdg25qWL}mefKgeSw+3$KV}NIA=O0jQkWn>ldQTlnPv=KdslIAn^cJ&-olv zMi0aGwcC-NqKAd|$wBp>tFdGMzFn9*brhD*9f6$0qo^q@!o{<8s_rE0_g#h=Q{Tdd zwPW~QF5Y|Ie?A9UMN*onViiUbNRz()47$vCpn+cF0&CCZ z2Hwb0>|Qq)!#{i*^QO)~R+0f4K7^tIkIHqlq2LO7EC|FHFr(v%b+8Iml0 zDSi6%SCUu~)=Ba?0g9x1xZ_WM#hrit3+)cvd-q*v^56q_?9ryGDed)lKgFauD>0N{ z@sHE1ewA%O8CbG21Ofa%I>(Kubjz;>i)@n$Diu;HvQ$vnUkZy<)L#UP0OWQ?hvx;$ zMLJ#{%g|Yzw2Mxrj1g{WEuBQ!89K=ZIOud-bUM-@T*mz>xLp*V>4?oVH@&2}@;c~8)ptr~u}7kRepbot(mW*nE0VNR zRF7nWwtE<*(@Lc2$9+)^t1qSs5QUzc;f96Y-Nj00ItyrcjFG>Mz6?ctZxF}N-zEJp z8P*2u2~NS`@GLrx5@?J0o4Bu)-)~?&Di&2$El?3h?5)TS8Au_`WHr1WWqeNjEiT?0 zN0p@ExeODJvru6PXuO%G&k?YEX5zHzz-|0JR@PHdHF^Ta&fm@A!F$YmD~gCp_(H2KL6f5s_xa$@qLkq!%HnzzU!28hpwibGAEmC=fh`kpt~3d_!~%Kk5-!zNA}QiDW=(t@ zvnRcd!+~+U-}D`lBvi^3pN)40{`KFckEIbTE_<~Ci^pD!xl^Vqu&kat%?p&PtYPPQ zBLpmj#QG(R@bZ8`m^A)-6ct)wGRQ2`hTqN= z81eDDnEve~WG5R{`=fv*ztDqer=56vXBxf;G~xAK>6o~u5L=TjVAL@KKJzO?kHyFF z(w11f^6^Y`Y&!sLSUBXt|M{-JGQ!w;g_X1-ahC~AL*MdbVXJkSlcKV(~Lb_4?Uu3TS0Vcl|EFLiCQWOl(*HuJ zh+>g`4iCSFz6tbGu<$bmb8xV3nh2J1Zj=58xAYb88k|%=78f0I@ildB>1cPAoF}v{ z<1F9HTrD@@;^B3R)rzC$$qYPCmgfrccpXK&h8#NSA|7wz_vRO0f>nMiEk$2}BN5q1 zDk@dYVS3gfvH%X5Q*`s5OB0xruO&5CsgMYbYTgg&u$R6Z-cOzDEb{pLvyGKhijv-> z4i0A>RmmBG#haDd#oumc9kmgdqH0(~z~Vxv5K64G76t$|QAX1Ib><&o8o`7gXrfZR0XvgmCT70zJA2X;N+V^{1f#m_J3(4&z5cx4z*dG*Jyt%^u zp}-=LSr{57SJoa8fsp&lrpk>p?(7HtnJl3WY27NIB zOHb!wr{)~KKAfY#vNi84zF2z#%L%%8nQ5=9LPCxMiB!NjR9Kn<6a4&+DzHrXb~LQI z4Ep67oUJzSRa$h436o72`B6WN`(g+J{X!I2N(h$l)5(}T{sWBtasV=;wsT*LH?y(8 z>M&GOcaYKbQu-)8-RrolSDGr7bwANQ0lJ4 ziUrH@&Wo>O`Zp6$?_e#w%v0U8t2JjZd*U<__C`A;`kH`IvaQQv{e&^rNgi*@l3M`%R_6J{J>by1h zcJ6wdOtv6Arxd}d4uquIkwVXtp{qoi>RkMFV37(N7Mq7v8xP`CWR|L&lFmh%!lZ)! zB3LS9a#W)UG`!$YU{MZ_j$M|cr8ALpinCD1)7&fzGBi=rKuD)<89%R;@<6X$Mu%C< z$X9?t&Z$vKQg9_hLj{k?(4WV#Y&wBxJGSdD;h^aXjug}*(ZNWY$H;k0N_b8lQ_1hI zW~5!FoNt|4*-%$T$HVed?5?JRYd}R6)m6ESg5!OmG%^rCMmotD+hqh9F2Y}T38xwB z1X+O-Hhw?rSQ?=aW<3uL%h@U0H5@Le!!hj{M6>8J@I{pU0-~K)kjd-WnN)(^spZ%n zYe#~cs)Y5_NT**tblSomAr>_HN4*zH%dsU`nvO|sct}iei8C$PRbuQ zdF z52hk8S&#Ta2cmO~NYlHqC$AnK5-ihp2BY2cZ{ndQkKlm^9`M59&ws=3fB$24<3BOL zl7=5b-+C> zJD}I66R;}IiepY-N`M((?aaWQTwdqiT&&!A3W>QTNY_-V3De1$R^-wbXtizx9t*|T z(c>}ZtC2`ckYT=;aPcgo7M#VkE7dsQyB@m}a8UAFL0mk`jFI(u;Weg_p5AW-lDZ4zxD8VKoI&-(o?bwjIYb?Z|cxBHel% zxpg5Fw{#-K(1-m@m3Q<0wuUf1pRxvH$2@}Ds48y1`9@rO!>x3pKV~Un;$Q*}DT^(t z<7Yqnr2>|R9(q)9C|P|gV=zOCMKYTquw3!I?-N+kCwm*lk9$A?%dEv4@!r(sIGnFW zZc_lIx=xhycuQ3Q6xBOW(dhijV3EINt5kdE8QU{|H-#hzjh zK1yuBX3YQ&m`-7LwGY|49zuby4V*`7YXEI@_D*K&-3){wX3kb`2eeL}A8!QuU>EGx z0DK-cC?1GQg0L-!7TLeXcLK~e5La%;>P#(`rt7e&)Q43$R;({_;h6ahlJzICz1V;% zDyLZb$fjZ&wwBs)uqA>j2F;l4W@MZDP|e>EQ((st-3e?hvZ2sEh*o~Km%-O&^rF71 zl|E^N#o&fkV}r#+|77A+RoTGf9^h>~Ohy|#Za->ev#eGv)wU7EWfclkd@_|-#*o;E z6_E4X840V}Mk87@b`+I0;0S|EQgS9TGK-jzmLn^p5XnjDN~xBE$*IUHEJs;`7WD=f zRI*B&U^ftanN4==XTlL*+KN(Mh*rYB!qI`G8XflL*CC0&Sw~RvEpYI6n)ti28rzXt z?L?Sux1;SGdIT&~s$!9jOJHduSZIF@CVy&wZ?I_io?0rF1|!>!HH2*IIn3BwhGW$x z)LYw7p>?2{=Q3V*9IvcN!K}SmnDC3|amz3!m^a;|bazQY`KNI}y2PZbTN25kwJS2t zB7lj4Wk|7Hr9kCdi~&;JSnT`XW*oToCIu{G$KQvW#yvu?Ovb8WD-tOjW*&3kot(3iiQb zc3}6O9eC@tXYuiS&tcEDWoW3%P;TFQ>qWfs>Py(XX*;wA4Y z_q{jp(fe;=_tv#2$VftN+5ya&{w6+r?^js4d=BdC>y`R9YC{`pTYbvb#5P_GbF-Hh z#zQGd+SeMPs%CaqYd~qO2?aHFxbj|Yj0Q7$q#>c z9dB<|pdsB|QWr?37C-plBg#r#Q7__HGPWYS&B=QNKFT(wd`#@d>#oO5*Apy+&ja^A ziWgsg4`0q*gLfw{MOv9jDd&<~??F)`k5wI{<^BUun%TPl2$eQAn#d*lpMym< z=@F1fBa{Xy4O1GZG}IycpMgczsCXm2kP6VGvG3D{@m4VW*mK^Bl|gQ3pX~^>i|k>x07;!t7ZKP*zlq zV%8&h_jYVtI0t*yEJxh-t=PYJ5BBZcjjYUEY~H#D+xI5I-*pzP zOe~V~o1qV!WAN=o24PWc>PLyX9eIsG`1l*r2$C5&c2x5e=kQu?Rt?~@BTZOVY=WM@ z*TCx#?7xWi0k(ez7fYxI4*Ex^aiRcY!Mh_v9z}vwqQRBi%YST zJ~DOEn>ZA^2_Babef@1HEz40VhR>YwKDKUM!t*ZYp2q7CEmC`0F&D3wjPHGIU=ao5 z4NAW`8x$M9-EP65{oAp0{v<3WQNNhV8GFo1Z>&38Zm1YW9`y8m_OqqtY0-1$%i+fxv`8Cw?V55p;>AG5iVk?N;5Qs zM^!5wiC}52(xI_jgQ{vB%IhsCs&guE5wMK8i*UH@8eDhl4{_TqBXP&DF-is^GFP$^ znNldTL!_Fi% z)90_ldtWR=dbt?|jeg|Sd!t~{gis|l%?Or1RV;rFmoPL^E9{>fEFK1GSLA|Hr!2(a z!>?lyy?{zWWmT3HvkL7v9AZG{=j^HWqQp7?JKrOND&?iRe5vh&_o(*tTt(GJ8f=ji;xlBQvi6yAG$I$<+ZBgI~7&1U}kbgiQ@ysARU5 z$# zYTJ-yJ&9&28f757s|{;+Y{H7oYmruv1(ivI^12GlT{H*z1)1m{=t2=6UpQ|%_H2(q zOIaH6d`{17MLZFN>B~5@phl%wHZK1&uLigeoX#+8dfY_i5;7^C}7D+PE^3M zb@^g!UAh2!)~+B}wjet#4RO2oV%yf8nEb^otl79*S(w?xOupXK0Y@hl2|+1JkU|a= zfiO~?G&xUWL5UYjE8Eb(IIy}bg3phrG5Kf6ZdT}J*P9`8<$_sQK4&u4FP?_= zi$14)ip|TvKwfGJ^jfR3MrsHw{_eAIxIL&S&1Wo~kM%3(V9lz9Shiv=X3qW`bLM@4 z!-qFB=2k_a@{b4>2^>;tK^Esofy0Ol>N4WkEmoKeMrd2ruozA7`y$G7e#&Yy9Y#;3 zVhx;z-rmQPat@(RDP0kPQSX4J)eN)F4yVdJCBoHqCZZP3s`8r2arn|jz_A}DY5 zLR%Apu8s3lK8i;s zJgF>-99nHJ>O=q|u#suT(gh|^x$nLQmFH#3u?*gcf|2*h?U>QyF=}LVQB~B&;*p1* z!b`8bj~N8Z#HlNgRbfGKlOF|CETxTv2_31f$&Mz1rB3Dg16+obi^>rE16=<8VCg4V z#0F@Wy1?3becS&MDl!A;&!Hj~Bs9dlgoRj0ve`c|dx*h>km%?+kIo*xpP9LhpO@zc z4zvzncZn4Vl~yEHnXxac8ZFK?_R9upW{Rd*PYW)VNtX>#9&R|EL3hVN;SW{@idVbfM0v%Rm zH=r_n5_Qb#w^jQQQ|7`E#|2a|=pNECqYp&KP^!EHNxlQI4c*9PATFlhIMmV&Co}zS zf^eYkEc9k8)@|B^xP$S?FDgVHZR<{|_IKYwd1VEh*a%}{~%|2AL zFtJqXoQ2TPV^7o<19%i!8 z0dquVXkLWZLr6&J7qtU54Na(QXhd~OE1LCIxZHi{W|H?03l>=cErCO3;y8Si$?k{( zmiBNPIwS4qYVSbMAArXlq*CdCizmS99Z+B-Mdi$%lh9KJ8tfi8y0aLIgRQj}rp69bsY0l12}0ZGgr>ovfTglhPqU%4 z)P!lD&%wj@J%D>2ABzb;x*tzJ@>4wd(2te!EJOC_qfbO3a%qLVz(wxgCvchYVAS~h z0}ni`tjd??@4xR6WlSYn8I_P4BkNzDz;iFXgK2Zu;N$75kyB+wNpm0ymWDrqrMcBZ zsCfQDvHTG#|7R4--xn;dHksiBbTTNlGmtxje2f9Ql!2^H28bE(RQwzjKckF5^)t8+ z&<}lW?O4Bl4K~ND!M>f$*!S+j`W4HublyV5?%a*`KnHR%^002>S}a^L4{IcQ-@jX_ zO1yB{ax@s7XmE9*+J6QHeqIh?am0EGxdEyre!rDouHyG68c!g@eG#c1AdA8FKx+?b z=+Abln^Zz1fdMJLr5^{47m)4)c2x$zSb!b|=WwtG4J|5crTrs)7aLHoC zA3B82?k*fVb`+B*e~JSK_QB(IqP-&oRcixw?%E0m8?TqaSsL*WSbF-;E7MJ((MS=`i+fSdHDQmf+B)HQ2UfE;5cKASX8y8#iu5!jYrc6Q77Zhg0EW z@UNo}<*_XUPXlajXz`v?7HSGuTKyNnQ;rzzAQn@x!o>2<(GxIg%>7JK@4@)dqcCCA9g1Cd{WX}q zY!%8)0cE{Pev=RR)lMcw2C5Mc$~0kA=-U||{3zq!O;j!_eH)tiS}hZ2b&G>ZHe;iO zG1MM}n@ZMg_rhg&6B=$N@QerM4z$|&K2hoJE}ERLez=?`;H6acdAi^WO1Y&D1iE_Y zXEK|RiM=ug`wt2hwY?p7Dfu9ax0s!}-6sizK?EqXy|$C+V1o|2&cI>m=LzVB%`K~n z&%hQs0UaZZEXXm~x}i3DU~@*`aqtHl=u{di7}Fq(>JZEZIuS2`)*zL9&!ENJuSncx z2PM3^3$@LiyfE!3YzR}GP~}v+DTO`Ag?p(k?s;@99{lmcc=C~F z@X&-ul{#V1ND2I>f1<$U@yDK0W`W5X7Af;0rCemJMIMvqWa_a@K_0sQz<}P ziANuKN&(HIkNgNPzWhFBFWiVpGu9xlnsB3HDXep&teydnKx}BVLPfRmr(-NbN+k-E z$R8Td-xVxWkTO88*rgd@zIJ9je+HEyund`Wdqpiwe-QH!Dq=pFf=pA^o^;CMMrK8P zToMXVw6btf%Ap(}QI5KzU}+&(c*&8&?7Bhrap`3SAC6#a>>k|r*aNu#;rlUe+&J8S z|NVIGx!>bhN;dks&!N6XhiNlr;i1PKWgr+s=-ZV z35{66H%-aWA(ok?hv4z}yWwZhDmapZ9$zPp6VN@uE(~-GpsJ*bsw5vLj-NtmYAW`` z#qv6<>H7>2?O`_BAP%M;QD)vqnU)}bkF+U)dZg#9QYCulp2IklkcLegcVg#`Sj5F1 z#O94#aWpXnhYt`kJNIJKwjJ0Ww;#(lY(h?XEs7d7NR%)$;avZ5PVSix@ z4wY$9=NUk$sU3$()HufEYhRIFIY&0a(#Go`YkgW=eW*4CmBD+NXd$!s!b~6ogp5bp zc<3~`17|SM_VtgksF<;9>;$}?iPfBAy4 zG2h5Bqm^EYq2y6|C6vm=go^ZH$aB$^`IqX5jU1!Y5>u27m5z+PjJ$g+?Ou$!dpv=3 zA0`km_m3Ti2kyNW4~)APck#17UbGf_Ys^U0bl`|_0P(6$6uZw+!8lM*s6%s8fEGke zl@qGQ01SMct~CNJGcL2S7dm|>lTgOGR;hT=$;5g9Ew*0N5~ax@GyZ2(Z2&sl>TAC66%LiwbqQCqecNU?AiVw*)BPd<=yClXN6;Dnceel3oIfUB@6~J`D#? zq@SwB>F7r*C1azy6HNwYC?-G6hdPz)f8UKNO%KXdU8t+`qqdgPUL8b%wjE{qKIGK~ zG5O`A5gq`*V&Kk>xV(IS*T z{<#97p~93u{mH-a{?GW>&-nZ=2%Kl|)Du6$t8aXa#VfYs)0u0Tp$J%fD5!Ozq}Go5 z7BA`>ENE$QDqxY-uV35X{offZc0MPI^}I43$Iq8)s}?Gkb>%)Bwwwh;0cyM#U}3hL zT4zOms}0u9euPe(L~eNrUVHBiOr1FuAAkHYCQh7)H(q~7nQGfD*|WV3(`U`WYj3`R zMT-_;@#4jJ>&@&DgkyQ$>!39l? z3N=MlFsse5=q+e%)u5-RPpQ$AmX(R(stV-uH%YBEt&BycrNHc!u`QnKPPQ#VS7zcV z^}^V&8k&tTTYMF^OW)itBCv=X%yHQ0CHAky*+keXM>0BU8{E~PE1Sk^-08uSU zt*}w|M9Vx8E<4dIE)`Po=_Rjq*ZJJMi5T_ z_SPr(bXyXp?=QlN3^f)Wp;|4rV0By}($X8y(BOlrC8U6*sm=?%n(e)n?Vex}=(G|l z8p1_u?t#wU554PnbSF*M06e@{vi*qG-J#TcQ!{~+8Id-|T)&^npK$Tf$6d^_q+Gt8 zG1|_!Y_kAHy;SG;2L+211vJavDei8B+fSgggFn>a;z?Zn9y z(7uToRY|iI^_CFI)E*QwXqVUd&`5<+-x$U|O39dV3$~Yg5X&Gobd7DDX#zr&hpbl-u!u4lx|PbM(&Z)4d4y_33Qj6jkZA&-M<01yfz2~d|B|2a z6Mo)L2o~Od^cm&vmtXymVA&A`i*$uGcnKH>imR=tYjUBX)StFp<3C?~4U=cg$7}C?j8CS_!tY*r zA1#)Evai0%(Sh0Xm*b@u-oUJx3lw|z?N1SZC?9NR*p_C%mO`FCdh}j?N30E~9OJRX@V(ROPa~cRXtnATQp{%% zp#qX~sdN$E26Yc1AL_Zt27i(PG>pn-J2HxzP*P{2I#DCDqy;T?Mpzj@ zZG7J2?17W*%H}5Ul=3!ILOk~#fdhYAJK@3HO(|j-?z^bW9FuNrS-;Xj--s|MMc58I zJNl@qq)g8MfgwH;t)jrVq;#ng_E*> z{Gs}8e6TtlOXCV~-_M@KEhC2G?$M(Zg(AvC+Pidp2~?C)`UHq{iA5*r{Bh;IbcYR1 z+>ytm(B#-V`PvcVF!nCl^y?vlJMfcT zEf~8n6F-lsKt_ofRn0+E6D;L*i~}k^T7WK`IsA+6KO-mhr zZ!>*Q2aCxA2Qvbln-H>x(d=Y0>X$0#y#!7K9=8lHco}0|uzTH1>Rl88egs0@=;|R% z{!zi=k}SwebwNolU};quv44L&)~{NLE$i1K`OqP3UcU}&*R03UBN=E>Gb1I0q-=nT zpXc(^X+49eZB%1l>>;dJz7`u+$6)6s%KuH-B(bt?g(^m}7%8bQkdep54UX>k1RkE3s6ZJJlv^3dJO}L2FG&}wbFhkvA|LkCqaw@XA zUiO3tN{uiAhN2X+Qfjfe^#tY?M=&wTh<(Nj*iyxe(?mJX=c)9ORo;Z>-*^v8*KESa zQ)XiJ!j<^9=U!K4zF3)2hZyLWuG~l!^FCIs*ns8B*5dV7KS0dp1Z7=DdP5Hu95y0W z3%na=#pfwO>~{cf?q=hpg4y2Ghu2dK_%P3d-^4fLB00uKMI2k&J5O4R^J&4qDIw3pKL|Aw@X>JRa{+xywYM`Cp)@N44|f| z7EPLF7;Q$JXJhjOT}aJJf!3tvIbq-xB`4j4go~6*ar3u1r9JgrVA9sBl)={#qBg30 zt-S-S7Q&1EP}$;u+u8=R)&q+%2rqphEY~hffO}6Wi%j**YC8xNfrqTz_jg~Unk4WE z5n0_Y(D8I!M7#eax)?;-BR%M%Vhr|BHTIlfLU3Mb^EM_3QtK=_M#Jw24x+6iT6y{( z87$40EDDx1EZLWj2|xWEZn|R_?vgPU>GGm#QN~AkUnbxv-Cu-@+!v6@fPHk|``Z6h!$-dn$>-o~?>CHfWhtgkT9$&F~`Y0z7XWr+5x~pw>8WV1E)095{pnhYlj{@ImZ8xF7M! zM^RSMz(hV6h06a4uw1+-o3~uR`Sa%yVdnC;z+(3@^9ci8-EHtWny_orEG(M+mNMAt zv6*qQrxP6kFH#fMWA);Xuy@BYn9N!@e3acZ4>fj+who)t%%!S$oluzzqoxKyj|m>T z7HJ2z;H_tWhUt?&RLVUY>0ruCDxP?)A&5BZ1?<$F!b@vY@ao2N>^BZ#r}`u&#<$>w zm?EsJh+tQR55NCnCB{7T6FSN$+)f9%cN8V+{WYlkIY|B#CPNTmR?J2(j}86(KZ50N+tBpl zHoiZ=z~W+{k{Ve?f@bYK`!>v*J{{GqRye3cVygUDQWnH=s*qKU16Yu*L$;YJfdSUtbpfdXDkfF8vS&=b zA4t{qEA`E!)|ZLDql7`MoaeNW5X<)tq9(#%&*x>|6PLdo{!knC#O_C0W)6;@JdL`> z7A7`z*s^^WO3Es!(3wTHYEV>K4m&f)>bge0rdfG?N?Imdgo=kS@rioqBvc}zUI>}U z391$WjkL8vo?9_F$5Q<9EbW|P%5~uTqb3so7^_%f*$xivO4^6v(X8!ZMuwrP9td`v19$L8U&A3uj-H{BB5_x_e) zO3~TqbmHjpf#@Fhw<|D_=Y}={6U8FW4efy+U7Bz`ZXd?DaK~`ma{F-Hbkl9P^~Pbi zbJ$3X9eE$FzVTkXJ!=b=rfBfn)miuzW76|GD)IXMI{a!=8nzd-ppGiDNEbj}y_s+f zKy9#6t+X&a^hLS^9|xGcqti&ZEsI*1jEzrfmQvrwLx2dgy)#i^=Il(y@5H?`3@Y!AmGDILhN;%f$&?INbx6rV{ffzk~N)c?s*+#Xw~Y zDLW^&YJ5;@{YdZti;6w?lv&Ehv1Qm?-+_JlGkAM%J^o{P2434#fRAD_@#G7WF!F&P zDPXx)ip1S|J8q+6$s#8KiBvL`dFjf0_8V?d97+0FMY+gKFmXDmZY*`gWPy}2|NVNt z|ArfB*C|lB`TDDsg;95nz7Icp>0`V)dk3B)SU!oX!@n*#j8)Yg*lIX~4^s4aC&P}X z*5%>Dm_i(2z)L4wK0Bnvhx=8SneN0P%X#dmbYN?CEh-F7SOP%>EJm8y6M)X!1_Lvc ze{`^zne|9PyABCrQoVsdky%Mu&VKBqdehNGtOS6af!xN-*%>&4lf3V@cVYE{wV3|N z=lJ5oPcZr8kMa5&uj1_wCL%WRD9lX9_Z`Wmiun?AW=+D@H4CtH?E*~y^nJvvUX503 z0IK$jC?^1Ro6e(%KAuj%#mYu;46GCfFz}pht`B2vC4JC#4*Tjmv9rX1Ci=5LrC1lj zu_gyv`577ZKCH@Wz}^ZYwEUfn`~1BOfOaQVuiJq5!-+7Mtk}Ib4zuSiz~rgZQC?NU zM&5;eRPft&?nYrrIX?g5OMLR#WGq>}5*uQ+z~JtpdgzbtLqm9Y+U52ngSgaU8v@1u zcd+<6WR_oa{LC8>uuIUFaWWYz`M&@xY8P6lShi}q@%+YPShOz>j|y0Byal)2aFepo zQP!R)>sQ#OWnGFaj2xLq+CWD{O)>ei&=!3Z-0R8^Vg%iLIta% zO&O0;i_xyC1&)Up+l*slRBQZ|2p@?B~|5de-BtXlLLK702!*uQlV&J7F@D*UW71PgC39`|6& zs%d!pH#c!8KQ0gX^#UAuhjE!a<7ANtI(M)1WvR;i2@Sj<{P)&EK)m2 zUi1C$U8$6FkH(qx&9qLL2EO!f7Ui=WR&fJ8be;T8d5cy$QWHh-cbD2py zy4k3@VR6Y~sMFBXzHYGi8Mp$pXqVVIw9|jZ0+HyBismqnqnm+;8M6|Y7_gk-^Jp-2 z;uyiXOFMugglY{hbs5z|YEuVQPBf!lyJ{zPZP9OmR;oC-`YxiBZSeDB2E3Bu!pk|Gcquc2kBWOStD*-v zJij}rY(L0yV{XF}G$aof2 ze7}vyEQ)07j$KN57MC}GLy5_F>)rS9-o%ekQeKJfz5(U=_dom?tJbc^N0UCoORv0+ zi62eEE<(so)hQqeO4MhN z?km5*qM7gEoRIY_Q_Bm{(ib?_hh3}Y!&>xk?erKdmi9hx*31FUR%QTnX8iMHWbn9se-? z?bS(mW6n1GY|=(7IHtyXTl28ra8g;>{Xu*+K4s8)flyi9*o(K~8u4;mGoIVih_{l> zm{!_}gAB51^oMDC^Axb?0|U?!EIKPQT=#Jp-Djv^{_(-$lHCsbq8o21jw)F;gR)dM zZt1qJ--H-uV9AGL(bLm` ztn73wnEf#h?plMr8y6#X(^3U2>(;GP7K+8>>oB*FYJ`gDje=f$RDBlv7);+k=1{=0 zw8)F?JjVs}_-SR`$dQ%#blW9G0W`5q%t&ei(;URwE?{A0JDB%jo9+zaw5QNax3<%C zMl-hW+=EuF0i8X4%odG`8ksqJ9uks|DqUqecJ0NdlfS^x)O4k*EG0Dq3zsa%n)MqA z*#QP?LZqA7|0Sr1!ua0_mSEQ@WqeC^q6~J*Vq~fmf?Kiw=3uF7r2^G?u(`Dp&#q6w zf;~BS_(#7})XFW_-JpQw`-F-Vp8Uo)*p`)eaJd2&Q82gNI-Fn`t$;<6P5E1TH3T{m zFTV3H-?&sOOlk&xi!p^sCKbzwTkpb{5%=QeJ08Si&whd_yGk(ms0QyOsMz)`_&80C zXLn>{d5Ri~Vk@vYRfA$}KdQC8Xw*ia(fV*SAsv$^evB_ad=KWPY6T3ZI@q{m^Bnr8 zrA32j@4Se~um6rgKMiJ^4<3If3QB4)ck)Cm{NxoFijx>m*|<*k;am@;IKk59G-37B zH!%N$-(kz{6rS?|MA+t}D@+uNjI{_@zWPRA|DV7T?FtLhx!jcU0k;<$md(W{Z~h8% zCclo5M`Rm47u4Il?eeMd#Rt#hy;q;b+7+u{lUZa8Hcn4BwrtvmcV2uRZ#?&}Fl#FL z_0;L|zKcvb&pNR1i|6p-e?E#eD;J_sV}`*NgjVaKQQ~H`U`MVRCB{w^>LS?1zgHzx zVcO0je7Y$c)3)YfMocPx`TRsoxc@1P9x)m>{g4v(#@lh_<-q+GjX%;og;H1hxsHu$lp*nq6ofKqbA;_JiiJxTCbJZP$F zz_Em*D9R~BQF#rD>s7GzoyNAKSx89FMr~uWQqHBkyqtmEgtWXe==ghfSK6_>%#SPr z(<6cJou6Sq3KIk;n~8=8YPLC$k)4ZRTZb~na_Y=EG&HLe1yfO7tNfjonT^bx zJoKL!#EC)KDRThLty*l~wFg$Jb_aujE7;9z)XQ7h3ZakJ-~< zqzjEfAkZN*x}-c$AKNP1Cm#zcCGStM4WEKXx;cXU4qope8```}s!|Vqu0Ttm^4}FK zQWs3>dkrO*L-9aVjDSVPQ)C^BbcIQxDSu0XIaDX?y9CO2Xy4}hzD=-P`K=$|=BsbQ zUANweF?Wu|tt0Nouiu}Go#h_vry}_x%ZTT;}qe<^Uc5X2~{_uUg^V;u_m$sjAnhoa+GolLvjEg6blN67SUjKK@`TTWc=T*V% zjL?7jP}OL{vV~JH_5EKX_s}X}(8<@cQ4LbHTsVum(jrWI|KG51^7A;HQmR}RDVuNg z$=IHBd7kI>K1cQPHIA_acpHigqQAQb1?h=cGV=qx|MD-9d~kyTm-DB5X!EIXEPf;2 zdj2O^K6ffIQc`&mI_TWTVRLn$w73rI7A?RF|Nb<#tzQV2xrWEkfu43X@{-r!o#!9K zXCQ`Ru`Hyb~N(jH8fa}+8jcGsSgF3FiK5b$kVnXvBrl(4IS9afW3E9WY(9IbCFw_IVSzAN*^p8N}N$L z9Fff5{N7dg2Hz(eef{vtA1F0~#!Yxg0n2;yw&2<6Tanlt!D7PhqnM-kaN`loK3s~m zMMivnpbW9b6F9=G`O8c*K43O8F;R`*@2tSIGy}faUx9;lKGZk|p!1!A+S&u1rH>7a za@KKyLFpeKEYh#PK8f0tXNd)MLpYD1;Mtk)QP!8HY_glVPTOA8>+*|VLnsK=W;#gup&o`UCkYs zn{8D#XNuwTC4Am+oEDbEh}WmS2`;Z62D4T9eyzc*m|ACmg9%rClS&!DxA8f7jmc_P zZmVk>*nS2OqN)gYOSybmM|7Omfj}TwWaF=|3YJj!34XQ=;xkk2k&4u3`8}ds7sAFr^!efQTxVOJMotw-q%aZCwWO1t`)TCNsjM8%!qg$VOjM!18;9ioiv{ z@*OFgPq5s0#r3%3Mk<}*qjB4v58yxEnS~u?E@cY)9QxR+d&}_L)(otubEAaHJ+9J= zC5NkVpu~zYeGh8%VYC>1XlT-4-I|s7@ST^idhwSqtI7!o!i8Y5s_HT0jq4UpRvko$W}9+lv_!{{y?%d`<}2 zmFwo>HIcQ5K0-wS3$Lq#iO1Il7JHD+(s2g|+*<2t!QX2Q zKnl&t%s7pM4bFG+YX?hb=(J*Oe6Iv0nacVHlOROrjPScV`CKPIHza{Y7T>k=*r{Ty zgp!>>kuQV2^EmXrFpO>=v_=ywW*byBO=zxeM01@QYO2)I78^Du7h-EkD|VD?QNoN= zW99kHDnwyPCCaF1S~Uh#w-})D^q}0LJ zm93Ln*oYdbpvgUW804Mp$KfIndB`wP!N|^#Y=dAML&V>K_8?Wtsng2dDqX!)1>tsO zoFx#BDAwN9quibtJd57`6KLz`QWT4TFxb|Plc?FR|lPDHx<(b;>7YL0+umn{d_ zps6hWG|2y{MZ3NP(nBy9q@6^t;{=k*l64_@&P>i-b}4w=q2y@^xw5|b^Rn}nF_VtXrZ{fhMwJ0kpgjU^( z)YKHLSh)-<7f(iZ>OP+D0j1qrJpGL4yw;r;lyMd*(e>4Lko+oOVW#S!+3jp(bk^Rs z4rm%{aA5x?95}EEyLPQceEeplCC0;~(je$=M~FeM)f$1>D_iPD!Q$iJPLl;G$%)v% zZyWaPUXOkI)*yNRD%6%7LddIEDj=)rR4O`CvpRyN);84W+EA|YQSy2e6R=b=kmOVP zW;ceBN_kmA2z@-6ie>C0xPQz9jNnDT^On0XdPH>pYFQX1ie${_OLF(tVM?E>tiqLr zk+L9i^r(9jpeXxZkCbAQW0dZ);iD$t#$lr{{I=V1Gc%x(BS-Q*PvX@Nr{T+0v3O(l z79><15evaJ0^Wd}ik*O<0JYYBRG9lwNcB}8xQH6hAQ}k{jh|}8 z%f@5&qt)VvnUFC!`M0$TM(^=|c(C}x43_*30ZRuh$iHRlT?aE~DckPtlkIa)!owif z>xGg{=wMIGSC8 zExY$4Bc~8$6*X{q0*Fma!`@>>Y^+oaq=%Vsu+h(3V2s?r$8te&< zzXFy26|m^6PNl1^4_?M7jfMFC5rhAP*^ z>(*GvSh^OQHq6GZZHuvK{VZ(RFb|o>_M^J22wqPZCeI0_u&>714~|srPpt2A+3W$0B2E|J%Uw zmkT7TYBcaMNXeorsRibdDQSM0!YFg@PoOmrVm8+uT|Mk(rsZKq)&_*zF2dPBgoAys(}Aqk9$0My&}uv2qZ4_gZkAO4 z)%elC475VuhBCDct+o&vnSr*b1JIE2tu1zf(27ba4N~hyUX2sERdy6qTQTX=*%*8G zI6OcYJb2GIj2k(Dpm|V{xH3R5V<~c9z#`C)sm8KMDmrj46^zFyx6(Bx01~*!f~q^m zJcPUMc?kE98;?7O-+@tg-K}(;z5L!}Ok1@Z@6X$c)LJJBnhCgOCn}mnRWb8!bf8uj zfU&^_W1|ha78kUwKB)OvtE{>=(ab?;ZGPx%KIlncgTqg#1ewvd!Qg49b$;z&3G+Q+ z#R;V@7=5E>FlyaQJi5-HjRDyw{kMUWaPV_^Xt4KQfR3ucc?xjwZ`smU){STb-B`10 zFS3gZ(5h}gOLZyq)n#Zd&O_qP?KrS?E0PnFus)oxuTgg_yZ_^dsEf$4rgMQYX(v z$4UMc!myJ{i;XEv$cX9^mEs8UeDR!y0zEjoXD{-Tl5sF02|4+N$j&W5L2;=ve&VNJ zCml`2p~NGQ-6Ca>US@!~eLrqkLfVvhH zTJ=U)T^_dGHd=)DeSA!+SZJX$yZQP7s+ZG>b@rblkl2<({fH32G9h5762KpU!X)#O z{WYKXQ~P^^MQ!ec%E-T^N(JGP!U zJVxAd8%ErEyVAyGqK>lQk*Z{9EsG4&3rM80vBU)Fu@KcFf6GiUc}?{G?a?(X!|%q8 zw@TIH=)U;(+{MpgvU%rS^mW&+azhm*0@-*+iSh%#aOWm|U9Wbod>`0>AW z9n1eJSiC3scOQcp8>-)bTA2|P_MeB_!-g6-3!9xkj@ftE$42d=Gm1*__d^$Ewh?TD z+S5zY_QB7r-0h4&&!B3PQu?0LR4850w>aUT!_`8Oho1O3o_X?VJTU$~+&|$y z<-ISx^BJbC{Qtqi7=^-W1~wi`FU7Ew-)VAp!B02KY&Ijc&V?eW?rI3Y*?R`DsTr8N zbTQVhTY;=2hfs7h0cEMlIJ$Q?j>N_y?N}-jX$La1Xqn99;*iPL6r?93Kjjcg(i2gU zbp&aL4q)^8O@9+CUOpjk5pYEMFTg{!;ABt@gnAXYbWpK)LsD+#0&KoPrCyfo{k}hD z6V}gPKoymZR;`|a&7zE>$k@v6ef#mnv>7;-o~ewzEMB?-Z@u$A7A;*);2c9!i&{}Q z^7@j}BJ9|)4J9Qd=xFaoFeFCRBB0>)Y-1J~mVR$uH`yB6Evx;5$I*8N;Auu%=Q%jp zhNNZ56V;>C~u0ORux8zHpFY`S60w#b#|Bt z7mLZOlyGqq9u8}#0v4-(04=UAwD7z&d-~BViygy+1kb67YE2TMNGBC+dk+(jK7;@l zLFm5e*C7E$fU%j^LgIw1yq9$>0vFkySQN|u)>&cyufalxlU2g4q@INtl&6hOMv#Pj zXW_8)!C)p4W&Fi=3J%u*?B-rRPKo7az~g7>+fJd?*9Rj{fI$kR5h_+I11aUJkZ~VFPpj5PP}Sp|IAD zqFNh@YfSk3(;1jBW;~vFkYIWAaY91seLbZ>MQVi&)c_N?h)GprS&{$rrJ|HiKKUc% zbx%JXEwwN2`{_@9fybZz58VIoPw=D137iKX!lQ(ey!VB-KE=${d-1`%El8_zpt#A6 za)Aj!(m=pe*U{nCezZ1upl?QjyiNcS(Gu0T~PmCH#&pMJ+hS->nOs!|v2- zR0b|0-*ysP(kf8K%xrH$GFGixhJ^jwPmqW5|Ot>FGJ|1Ki=;OI_2E^|Nl|UW}b|7xkS}gqHQ-UQ+fr(5v zmhP{FXb0V|I6u1n5MSv0=;1&C8 zKJlmab%Ui&#h9S?{h=#N##kQz=?fT1K#U%7m(mL{WYPm6y%Ewat|$~yDtAW9w}{EQ zHmSTJrCnrpnA{&pfQ({7Icoev7&-1i+(Ssox;NST>E4k9)38zaV%AEOX(A|S2_v^D ztf-UxN-K(LENC!?QOy`v-r{A_Nf5TSQ(<*OMQhb{G5KI@lUbpL4w#Kyu$lT{(GS3= zKCYO?6o#HjrbfmlBUCt4ye&*PO}^7Shl8-$2I%i>lfiD7Enesh9yob!r9h?K&TGgv zFLA=om@d+n{(!Bm7wGZjI7lTF$8q=;ZCsJ5V>%7959e~EF-Djt8}A%cYfAy}l; zy(o~!__vhEf9SzS6e!4Gy$sq*7nuM>)QkW{Zsqk-PfQexJofn0|Bmqw@HK?hlaD-# zC-_laN!!nW1O*uNFIiThBLdKiV7N06Iw6xlh)keio|lw-+=-@gyByEh|# z?`9m@vzbs?gYD~AV(Z!se-kXnsj_+qkZ^<<8UwU|B|^Uq&==eJoR2;#1s5qKs2KPe z(%75if!?I%TY7 z&b)dUuCRzyg=X71egbG`dy>ipZPM_0oB|$?uZIDH z>Z|(#AL~a$lL>0A4ZX)t|5b>bWxE#p)5oN>ck}fwe;b_s2-S*=%^c^onWXiG33X_%h z(oH7iU6k&#F=KJp*m1af+yhatP_0OJ`S{WIVC>zaFnZ*8d^u+|idurms-*Hs_e+eu;Unji&ZmQuy1uQ1hAloV-!s`;< z^F9g|xvt6rNyg%@4J@+J7lFyF>J-|8edzD(hRdo$acMeI)8lb0?Evx$QlM(6gxhL| z*U?6Db~0E}hV#UjJR~L^%j@t%->N}*MJckfk1=2z#*vi$D9K4gLq#U^Y891?7fn3r z^?J%ZO+Ol2`>0I(%J#z*)h1Ncn%U5)Sd1XicC!WHOsAe8|=rKG`#WHK{eu8BiQfr)a9uF!ST&SyepplTNt#zPP6+#2En0l4$ zE7PVdjB2DRYch7Ci4CUNLMOBJD5j?A?6M&mfx_(7>R(Y|N9rK}>Mac_sKRoi_tpSI1stNuK)XufZN@tu`bj?m}|XZe=Y>R&G9y981H2LkawQFBU9XiZ|YV7h8AihRx~5 zvX!fq#|1i3_|!sgvMQ_er%ZYaOBZ~Jf}B*iY*qvqAO`xW`k73uT@#Dhvp2$I?FNMf zuaz7#+h3?3F48aDFTDgO(Ajk!TAhc!rBf=_N|P2l!?w(p%>SML3mf`hwCRf-Kf}*r z#%uS6=m*^hQ@P0WXSt?-9W2p}-Ts z>KQk3B*u>#1=$2}#yoNGwcvzPI} ztt_k1Qhln_YSh)$pt7tKGfa%5CaE-UbJOqn8o8cq_s(E+VWf<)NOzc%*XHXPW4Qzti;$0z zBTU886*+;X>N@P)vJOj^&&0;f%aE3F2!|4OV&AUKNQjF^RcRyaY`Ipxuhn`QW-mXN zWUQ}j#O4h#SiXD-_Qmc{x;he)_G0^nh1eOh7@4Ull!Q*G?I%&o?4!P=2QAtG2I3z6 z9i|F!DN3NJmA5Sp1uXfLnnkr1l-8LrW%6{~JLVqT$LvC6>gX}!aIdlt!vl&k5tIAU zKPuCVWjsY0Lm_xXrHGmlM-nHK*ZyIL$@`whs4H;WZgRj)spte}Cd)GQ_ z+qwcvSFBcQg{_a-qTEV%mq118fyuzWtZR|SXUv|9>^!Oxub)9My2eFT;(z|hn^?Lq z3KoyUu7IVtdk|)00Q2W<#QX2hQ53mswB_)fKwIxc1iP6{Mh4*NkiK#TX9nH6dLvx! zcBMIsojN1hMBs8pv9mbCW`35&|6b%@7ij0t;WXR)5M0{2`{`e9`cFF|y@UTPz*6@Y zibWPk$~qPqxWDW6;ff-WHa#>8RPHNKAvi>l3_(V~GE|^a##Us!MF4X5U9$1l7~DB> z9N}_5MvacnFcq-KW?y#wKOSqI(n^DDtx2(m8YO2h7gVYK0p{A9w zLFGm>@9P*`o7F}fOHaezy}Ph)_bwcai^VbeegYG!jmy^}FQ)_=ql@Rc4;qVC0ZX83 zkV+?(ssmkN0}4|2VfBK~uq$R2w5nG4_#V9_ zLT9m}s=5f<*3HH2DR1F$?0SUUY93P;tsA9jd$E50B!1>JVh9G3+)ByY*&Vf77kFb=U|+ z(u%{#pqxnEp@BJZFoDW5Ka!m#pH`rwR5#^wL;Ere=XDi=&)bgFS~rTAqL(-D80%eVZ1keG#)HJbJ$wuMVj>-sw2RfbPX2dnvog=nh78^k9osZ`pL3o*t&L!GFFn2 zdJyr4nP_AtAtfsXN7IiYFE0-TnN%)m87M9;L{?ThjvhNig&RlZuosDmJFq`)6ZY&{ zkBqbL50I{Nwhj>Fr11{TT?Q_ne=dl?}4y(X%tTB_${RXeg6n2LEkNv%PY`p+P_ zC4j938XVQNV|%F)yGmP7=?P#pVYe=JE0(WZgSX$Chy{z6VQ<_4{P?H8z{8I{q0|Z! zaEM}Axn?~kemqI({tC5q@G%eai%JyO%>3d#Y}>dPWrZ13`evFF9pOHl5%@B3Fq^w^ z@-!1Sg2m=N&OlF<)pHghsv2MSDMWa^)G{HW$%<2ak2L2KgXb`K_Kb2rs!&9^40VKw z$=_nh|+{LdwF*U>AeRUj<7PD*p^%sr{2NmghD`!Sc}4zf~4U z%32ng`K7?(*5Q9Jc}&)?$U3#?zQ29;1(m|vP z%pVCOF*y#CKX?I)W=@2zxrnc4Yeye&z6UrNz^>IZ@y?6C!N#@gP*G=O&<#MN@v=d= zk(94TLaqkKvKx?Hq(W(p5mk*gN=z!2S{sd7L6Zqzd^t;5V{!+#6GMQBhl|tg=_tHK2u7Qc}bOLxomNJ<2Mw(bQ55 zk4J;*svN9ayYO#<#U{r{cQer9s=Zi~qd`oO345w6FrNon=!P|IfR7$|n2=eSLXc@q zn7?B!R`1!2OAvq;gseZg+(-y*Iow8ukXt62l zTVyKouYUU+-h1PBSi52tA(^OvrOh9vatSF4t1EJW;JAoD=o}mj7*gX)cAB&W89=CN zoRNOC^BOcaJD}5haY5QIk8|L}>1eZN!$1E&KxGIlXO-uqwGV+s_LA{MI_XDY0;LbK zg8!c$EHW#M=SF6Q$>6Si>^z#Sy}if>sW>sKuVEGi3QUAB~y@xW`#+- zkjJF}r7Wnt>6%+`{gpT3nydM~>xSXR>u$x3j2|Ozz8T{gZ)AMtvoGf(twN6@#Tukl znvhjvLqT~9^2=HjuoO22QP$js8iJ)>OH&6?*=R+1O(W(kn1#=$yiIk!l4@4UT`^gQ z8-2kV0%ATUzWELo&s~e+Tos(wUaIqxsIN6*`SRs>=gnuabJJ}2&4j@PW^%MMokk}4 zo3Uu_3s}DB6}Brs&uN#k^4`~e{tsYrN?hPI|7u_n&-x3nT)cP@o!!U(CkrG+HVsfd z9f!@|iLl*(jZ0?W^S7TPNtfWnIg#Gttm4M}cOs0KCDZW6?|zQO(>|kY^TQG7fz4>f znkBRF-kU$dw8_8Wu|#n0BwM+>N$m7-q{MH-JHP)WrhW1X^76}|^_)avZ9AsLmSI+6 zA*Ll2;LD^Ee34LsdFk~y;^axthOxJ_6>$aCC~neX($wixA@?$)xDz-2kPdYfo#Q)K z<2&E^J}$fLa;5N`6r+4&yZuNN)*dRsx|A9$KiY`p znL5N&1+cv#0=oq;ss{+xHt1S>sO9;oHhIwEAY^P27%YT}wHq2&H?-~^=sj#`ZrSkb zt8Vo5)xaV_N4mnIU1Dd@&ICk?Q98TCs0i9+b@v5y5-bD#Kof(Ze&8&^-4~Q@9Sidg zEAt1&3;v#795|GTO))!>lahu`Z;%Oz89uWe>ShhB47hb#H!`YBh%YwaK#>l$YC9oP z2W@#Rd>S2k18#J+d69VJ5H@bwiqu2deCz_+2{Uhing0O4i$2`OC2BAw-3kMtQX4si7ODbu-&v#u&R}vv5te3EqL3;iX6rm`-MJ9US1dyEkpwii zG%B^qX3w6D-w_z^zB>{5c|~y8-B>VxF{VtJf|{BdI2;Zp7Ij#=b`}2fSHHyPGv2_g zg%gpRlMI_#51rQyYj-~^J*QxzVvw#bv0&RtWvz<6>lDuw&o!@6kmtIKpscM^!{uqi zIcdw%j`>d(I7k1|q&THg z1CHM>CexAsXi|1YY^W5>Sp>Q-!pU1__jy=4&!IJR9J;QvFrNT)Jp?)Zr1+l9Lw6*i!hZKs^K)h-~1%4EUb zG!z@Hs507>!TWk9ZQHaRcwy5~tlE%+CmwnU!(~C^wFC%b!8KQ2gDa%&*SEf_R4D%b z<+76gYGr$k+itpz#zgX#;fx(4l*IA&n}^|sYi?9tbJe%L^@p-9Ke+5NTy^>7xaNwh z_?lakZnR+|M&r|I^N?Cpi!Jo+6?>0id2A+@#b#k~Tt41CScfT@2Gra8P$_F}w9<9w zpki?%DLoI%r+x&~#S=scfwXYO zJDB;=izrXs#~|FH>|P>?$MM1QXf^0Cf7Y}3;?rMX*MStJLcOfra)kO|56RZY?U1D; zR(}s;z0|GiM_VV8zvNU@R8(K`A9~9leC&Vx_tn8d^YV)$P7^jPo{lN+zJR#R%g{e~ zQsF}1sT0aAQHib0%szPeS6DIUOJ)&H7#v}xc;&`b^YO;Zk7DN3XL05@bHj@~b$ruV zIv>stB7Wyu1uQG(O+tA^0~*X-h%NPE=Ke}#dIpfe;F;<>g&1Z6Qw|p+rrM6Rc`cZ^ z`v`Vslpv#`9`AfKiE?%{M#@HCbd;N~y;T9rW#7E~&*}pSI7H$~->WE=#~*u28Q2#o zESb!8R4wv4@fH!k}IuKVG4sf4b^m@y-9{{xTX_wRgxnXBUP?##_NQf8%@ zurIR_JJRa0Ghd6CTmxcCoS2=W!qQwb)T&d^vh|o+8R+!P#C*)eydD4aU$dRksKS3gZmF7 zJ*xzp_8!I5<`^eS?43ShN3uwum; zY}>Yt>Y^RNAhXe`G6HD{{_Wp?hL_*^C8o}P8x`f*XbXB_3i@Gc?}oLPS^Y_w3HCn+ zOB(^u*rX>|!b($?HY`w)_8a{tk6yA%ZCtUThk5@`!6LQTr1H4bE0b!-UllB7Uq4KN z z1S{8Pj;!#3P^@isoXj2F5FG^ zGW^y%6tGxX~X1n9j0XHQDy2xMYEMb--A}88;v@<0+z*Je12UmLZS=V#TA(G*~^&q@k`KGq%)RwLBhI#MPjkZZpDJx z&tdM2-zs3S`MM|&7&izJ4*?^JIM5?&S&n}lV2PG=F?##pikwEs7eHLhN__eD@38o@ zH(+fp<;O5;NO#t`Zg^Tsl;_@m@mJWgaTBT74JVzglff}*S1jIp>0j~w@BbCm1&LHC zAs!3U$8)_n-D$z9ITP{XFCW6@CDYN;pn;kJHmSB7>yPS@QR7EZYZpolC$TF_kLjDz zak#>b?AA6Um+6pHP=|tA72cgR8F$=sFYXv~53alIc6^UA_#2o1vGAOj6qS_vKO&E% zUsYy-$soOqugLU6fzJO>HlGe9cHI>O%XL>_>_}O8|2STKcPi$s-j7Lhw;{LIjfy5p z-a03W>)mV+VH7mABTs(w9Lv{d!bc#K(7y@(HTaaEx>H84O%IGL&ib_jR*U|)?T?$l6sf**Vidx}!YncVB+6W7Nmx15wBG>|qsSdhm z1s`9MVZ^Eex3b^L{&KU@eV4^+k<{Qoj`tkmnnT!HtU-FS0o%5(Lu}kOtX{JWFTV5~ zo_XdeJonsl_{A@Nq0Acm^{<~rN=iDM4lm}-U5KSimMe=OWv`g^>(^pq%z7+bGzU|s zeSrB3r=YYj7Xg=#>ZyYnKC{QpXqF%0`HTclBf{$@=4lrjL@0Ddv0!LGnPO~n1eB&M zc1i|i{;PkN+W8;t0<+mmujk)^P^YqJ(%aUr6s(kXE|8FG9WB=%Em)~sZ(6jQ?5~4G z-XmQqPTo4GR`k5UI)cU0cM+BL2sWpeVr!KR8%j)w%eA1ObpX=})%ZA#imt$lW$9Y1 z&NU*%atiBIKD-f^iE>RJT0Q4+xW$9{hYPUrXbV;zr20SHf|TX~6kAVY(Vk2kt!sgi zzoAj>MI$fzc1=58*qDr^>of82gU{oZ8*fwKAZq0Y-?;+c`o_1JC`z&@Rf;dCg1Iuf zA>eIyC~8Gaz#@sMD3=?qVS-6z^PPXWOevc$_Pxu#jUPzuupeB3n{SjDG6uKaeix?9 zT!^X`6AJ4LC}^}YUU^ZZ_Mt!*#=>G3zDU#ZcZE>ZWP{!ugvLOysI5rPEy28rAK)`4 z0zle>Ds|l$Eu=%^-BtT?gu)pgJ+%f^D@BG&b7AKucvXY?J zkGlLc>|8btlL&}yD`!JrSAbr>QMui{Pu5{)7j6H>3%-&Isv??zO zRh`Ib>BjbS4Hn0i(5ZsRXbvL1)`sjF9jer3O!{&rMozdN!^e!l)i>Xa?_GZbzIkP| zO0jJ2^WE=!U+FiMqI3cl8DkNs$oR_8!2Qtp%TRS=Q7+&A{`YbDcfN@mul@luper!) zj^P+T?jijCttpsG#q!at&B&^%V|u{RMWYvs5hQLi@KM} zr46mjW~$9zlat%`Rnm}O;3)@vrOBasR`jJMO$zWBUS2yn;F%~-Q;K33Dpit^wmSR6b_ zQo+D3V<`;Me+w)jHhv?IM{jiDJlnDYmQ&JM@?ZSB)Xx8Ce8;7}@-t`76Y6cSd)kz; zE&(c|uL_nBA?~NiIF^}@30O2d{(P+)Ym#zMOaCb1wW+mVfUy%;!vMR{(1{wx&pbac z>rjodW%M>?^snqmMXl*1OiTg}5cV@-Gf~a!mZLd^t=V?OS4NO;IDu6M3vr;N8dc2v zn>4;ZfaUoONm#Nj0}nm$9B#ScRs}4gOau^@fAew$Dwol|bJ=$ku>A0fYZS1EV!8e1 z+j)Nk70XEFF;P0-{nq#J-OIj35Peet%oT*nRp0vo-*=S)mb>m8jbQ}Q)LDyAtumvi z!Ki>Gx5 z9@4g<0b5or!IJ5pV$-s@*s@|iR?hhX(>{I=v!{N6!h$lTrjbwj*4b!$43Z%SgKS0x zRxezM58iqe%NBo$)vIS<{`^ny*~Hf|^Yc$|bblOdyf|j2pDNb?@?AiDeJA!2EJxKn zNMw4szsipzjS)p8h${TUlwYOvRO?N7* zXJtT6ZimV>$e_G*ecgZmL(2Gym~@Q|y-o)2m2%p5j#MP?^;i86w_kS+Zn^qOWeVfC zdmqHh?|y+r>knYc{B1lA8>$Go8XiwQ?>E)CP*Wqd&jv6fy%mcJ%&0V+qHOPhx-|l= zE(Ddc4b67m5-idcW+GV3RB9H2#rh8g7U}+yKqIAHhQPwChk?<}ELEoUnkfx}Y!AN3 z1;murB3^AlYxorEc-)oV^VnN#Mxnk9DsL}h;*yY*nGF{KA>$DylL?ubnb;q97<#P> zfxt;b7>L^28L$FSHYlvM1X-=O!=GE z&J5E^a<(!U_4dnvJexEBBhC7c<1ByiZwM;Ni=@#<|L*DThm*$}2=}0)hyD;AAS8wg zQbvnY$`%>2O+p(RzL-y@n*RYVe*{YuE@$B(d~7n7#ruw~^Dyyo1FgZ`jkE?c7L|Lj zo=IV%_AH91EI%o+V`9D;o7E>VIYoy_i7FHjKKtoEZ>H3P>_;81=l0f4%uH`a0~3KN zKDM>UgY6|u#vD|c&0)gdk1AUm+ZffqsslS)+wtPMB+TECf%_kR4maKstx*2MD}Jbq zl}NYNl}r@H1U6UyfJr97B1%QZS#G7m85(C1&sB6OxRK!+Vi_Xg6|_;!u=+1TD2S2nE~WqvX=L z2iRCiN=qk#_6~TAL0DQ%D9+75>d}2Tcqj&k4{t_AVLDXRMDqr(^l11k7H+Oj>4xH8@dU=RiXZvyoal6;rJi-3c}hH5L_G zm|YE0{t_(ecIXY!fyq{9fG;cJyV(HKckVz%auTdoqcV1K{P=P7_VyBd0l1uA=X8NR^fN^$Rh=Qf#476>7sB(1RARS-_eLtosfJ3T5d|YJ3jQTK=35=y> zA-uMu6i0YJj_2atjArCmsVgA7i3vRmZX54t~O^Tusm_!xJus?K($zZ;`M&NS& zb+-^CH{ts0Z|3I>Q<6@ph%B)}8DqI~48E8)4;8g)MU5BL>QPX~I7j7DsS9Fpo&}TQ ztI%XVB31E->?cRnYiy>y%GuAx1yo49#*pt zZpuO_I_aQd@z5_kPWpt(z=S;=sRwruE^83KV+D3@Sc;Sb`(UV7V<5yB!lcaC&Uit9 z*a;GWiYOMjuClY~*9I0TeeVdLR{&!RpJi5eg0!Q2?vxS%41hdvCmW(YBvVi?z)hN( ze1kB07#!#v1i$j$ih%XOgd%6K@<7<#frz@=Wpp@#MrrwH%Is-nOI0g5NreeA0K8&E8 zm25&(h?HNDg^%NSDW0ZeDOp4%i>GAPSacJxhj0%cA3u5& zM&2=u&yT^l2Oq}^6Tf73v>%@>*n+eQ1BxoNs4CN;rc{UO5-rM#^ib8eV@Zk{>vL_W zGoK|i`=OUH7O8z^44{DxqlI8mIU-QoJC!QXdYZx213fc7gXil9i!!aa^UNP?sB26L zP>T6@-z_C2=pzpIDeSIPBaKOfnZeUSpJ`-Z*p+8SzB&vmGuj;qY1p`XH})qU#_Emh zv1Qi|tXQ`OaR-yp-hG-`IS{5V_VB#}RJ~p8=h4oF5EFj@YnaXL*}n~m@l0kC6R>^d zIvmR_g@>?6t}-)|^?|1VHu{~uhna1w8woW&wD7ZZJa=Bos!l1V?+c-$n*a-+fSKP# zK@Bgz%Mm!v;N1tmuN`U087Roghc6gFM^`7h36+s){MqxC$H6M@KS@EU|V9_@bf-zgQ1HI`ezlW z1_>3#c-_RpGPoW(4i5v1g$g&wAaIWDSepD9Hf3qnfA;TEJO5L=aON!4N*@CL2!CIv zQc_0tYw-TkkC-wq3iM}@r$322Qv?NcvU*J?>RP+7yQLj3uT93BEm?Tr zsTXnET~eKRI1@w00Vb5A*q)`E>n^r?nK>%mUNT58_hoEFOzz7dzQ9GElh@pO$7tL< zY$R^y?VWc=K{9;!-Bc>07;7eA{I~}(Z_W}lwHQ&~WJGO~Sy?hsQEx&$;jxnHZ1Vnc zrRHHxvlorJ2%*w}5`7;P*C15d2z2H!RC*VhwGPzLF)EGpSuJ7WJI=Ux8YaVeXpIrZ z(sr2WFdC;HHnwvIW3@YU4n|8a41|xx7J}W=1xIiIR{E8}ci~ce?oq%ZGkj$>n3$3< z(7raXgxEl>GNVU|O}3p^s@Te29J24WO={E7`2;LxUmqLI8AaV#gJ&5O>0mS)1EEx( zb<N+c`D%5!Q?MWDa??d>}(?7$LPe@_OXOsnyGV4o9w@6Je znOZFU;{q7z29u(bvLDNjfBZ8%^P`_e>xMn`j51qH3e7$G$m2@Auty$v1dl)T04Cfs z2II$%$Gs0chTpvXDZX5`9g`PtBk07LOlYdNLse&|awABp>@cePG3Q`CRuYKS%(T>6 zsyJ;IjLhCOrXU)0?tgl)NU8S-19LlrC1V$=nC;edoTVx_3k%`GTmi*aX0d!;rlYRf z5r@U=)+4hZkBv>kDw)g#eLYyaZ!cEv-ipk; z6j%)^*i_9pykjpm?m7Sqk3&thQ9<94{&}80mQ!*K z0t~*rsIF;d(qMqg^FOtd{l^IvLP=KKQ(^|&`r&UIKwJ0OuM8IP zKV`dHg2hb#)5}B-p6eF+Y(hy37N%&hGTVY(xlE#XO*b~So`fIV3jG%^9Lpo-a?Z^EK|`B)rVfEkDDahO19qKYjvo<=s+K&i8bDxed! zsxItd_VCKuBbd822M_(|B@7!$P>dLX2PZs;`^Vjnabw2g9;r^OKqhK(Utsg6_XQ?m zvJhHcf9I$PxMSov+%;-E#*DomV@8ix##W@%%eZ^*SGvNcelZ(0wXIBYnOHWOP+n_5 zIpHGZTh^60Fy%l68Z{xMGDnlX9ZjZQ6zig<(zHQu2@@(#su?G=L8)HciB^38cAi7C z=^{LCCL*pr#^rv-;tr@CJ|)4|yP2rc=WWj8w1|>;_(F`gOhimn{AMaW2chC1Ts*v% z{w~G==)J?B+aQPmhuo8*)lisH`!gw$YBt zIwxwFnJr6JV;g0BwdD*m7&=m85LW)iR%X*$!ll{Kh8BWF#k5&XX>1@^WK*7h6tGBl zSJa|_k-A%AZf3kleHy5czW%M&DU^XmKwNmXN%-6RCmtffn*~CU89#Em+=$^bi3yw+9L!O17w)rA+KRfLJgl! zcbr3}^CS|qL1xim6wsH8`JM(gl~8*Go`7GuZR_ktXRqwX(t)mCCRl9bVp6}Woxtks z8Nl&D*_f+M8ABR8&vV8`>xi6&y^Bho-=|_@7i(egnz(E+n*$Pylw%W6E}~`?&+XH?BY2;ffIulaO%v(Ka9CV147hfUBhXrx3+M%Vqs>8 zLAF;ZzUhyMQjuPVv#@+LQLNn2tU8m9Lkp6rr4RscE-jk?y^`k<|gvvQU5S^m`_oANJ zKs|k3XQJO*`=E35qtV)ha%~vt&3>ftd~Iv&#G=>+e7UI@%TjAFFQEiSi)?(|Y3!%M zd2MY9=I<`R=qG-IVRw$e*s)_3IE)=7cJE(U^f>{DC=^jN@|Y-^A*d+IhCms1_q`Z? z*I3*=Y8+#X?Cm6FqVC5%0;@3-Fn{h+sG3cvtI;ya(4nf<$b^@FH@g(Y@P2}NmyC4T<1e^nlPjIeo(uYK&X#}v3c z^!Q^K#n1Tl#HpCHY#XMm*@sLzP;rwLCDleWw75}4;MFzDu9sa%YU#(}#$MD~nQ=PL zL(?3lvT;DC^HIt5{nLXb+;I*Os*xbGQM>01Vv3q^pxFbm05)13ula!zKZ-O=F!;UI zDiaPLJBB803l)nBDx)5`<>e@>ZKS;KQFhSuNk2b7w=HrGef;cR2ILBz1qp@uusDox z5Jr6tp66rPC@HRmjRCkw6F^3t0|u%bo$n0T){s_bL7pxO5V{ls9-!rPeD`FLys zoDGFGEIQVLy$xO*Xz^fMxeD`=aX=MePT2;u-&qGRjCTbd*kyls-jozlf z#bWnSu?_HVD>8EnP*GC{v%?0pUWdZ65>zzm6g8xwYClw{#(o~q;bIH+W~#A=-`mWf zE6?Y{?sA7&&C7we6z-gQ~c@C!s zqcAze&pY0C0ewB^&`y~Y4s{VOQi6X#2|xh?!YAV@Y{ycZQ!LbTo}eMjyU$R`oJORZ z&r7|suLu_D4pk8-M)x^r?Su&9jGos@NZE4EkI_${tAf@pH4w23q@>{WbR{^qX0@&RU!5izPx^WT42w3hKfpOyq zg3;rsR>oocJ>xN9tZe=_LAfuF$#bGoWPBw$)i^pMOdgZxr5o+8G56ul(GzeNmCERQ zqEMMIUMi#CuXKfpf|0H;*`TYoT7#-;Evjk^3S4TNoLH4_Q4~uv!BTyxE38J-jv_i= zCDn9QtxM?^H`>F{TKuRo`B6_fYhf(#22R3hXFIaeWDk}=kD^$NzBU*=j0N;(G6p7F zA3XkUs^bp&M<0_Ef`mRVV3FP=SC~K%sPH*aDl%~Ip&*dOlK;oRB7=((n4~LAB$e7h zH9@t~M(674>_foGpjcml>bz9sAB|T^oy*{T{;@>VSCqqUb2D4(ih?M327YEEZEpTh zy$@9~u$vH%{rfgz|AF;LNZ5iS2X~<`{TNKm&G4JOFqnKO*94JL6U5S7Ctk^O;H4ZJ zUOCc)4-%`fqEL@xx;B&;!YHaWp`=QW24)AJeKZpf-t#D)dhkbh>i#G2lZT(gGY>?o z7)y7TY|bSn>P0DsPw2>?y%ePsWutV1DfWy~obpGP_GNiQln-C~=%a)Z!Sd*nPvhRl zp22S?&cFwYw&L|UF*s81M0%|SMXf%RsQrk~Z9+!97n$lV98~u+csa2lON|0Ll-kUU zgz&MlA=xeM(XKFN7}6D{V^-p@&_S#{aN7Pc2JdC@W2lWL!Hw_j4Ghv4SURH??q)!u z&jc74jiHNJR@#CD7nK6NEX#TZM*7~qk`NNh>`=3DR5j_5lyU^E>SiVsdZ9)w;0Kg$goYNqveuxeyo$;qh^~P? zxB@;L%*cnHS>n+q6ZRFWP#?UAh9FSuJPQ?}o5sLmXJ8NVyQP%5M^PxJm7O@9-Bd4; z3kXU{eJZeU*LmJ&+f-CV50w-XIuDaOPaCtFNTFUTrf`2Wf%q$6@zbyT^fTGZM%g+; z;KExcZ|yXjnEcIiZlTIjfXHKZv@wH@bke7NFgsl^Ih+ilE+$hhzRs(3*ZCPZ9d<8_ zRyVVJ8^{-|sdnMn)yJ^6lq!bmCE0rx@yuMNZb(C7r5}5nJMnf*2IlN7z=(%_iCb=v z@=L=NctoLcAMPUz#N@s_CePh9{O&&t+{?I%OgolElG1f1a2d(hiH(-m3zWu7VOtuZ zaxbAWhH7T+%*AMGFrcPVgUU)hDyvMWtd^b&50)1>FzG-Q8uV>UG`(onMhEX}v_56) zjEFM?V?!P43bPnX6OfR20EtQQC{IsCZB7>K1{=>sh$@v(p{g@8o;rO@Ks-zsylt?y zwxFpz8`Xu$D9${<7@Lavl0x`RE}V??5%`2hM5?DSo(N>58;t(wk|7M<{@uV*Q>TUh z5?KB)#=-z48I6MuDgD4^1``2`jTbsEEe)GiEJEV$O{gtMhqk5|#c2sRussIb)~`oV zVL4@6SQ(Ge5K3MKNUx<0HZS+BDX_TkCoRW2(y^b9863x<(FI{PhM;M^G{*8z3>H`LIJ`_qoT2kD1}|Vky&1c8VH`10aV9sS zEWqGh;6r9(NE!POupCTGKwW(`^ac%DO?oQNa%5N4!^}+F$Oho;ie}D1`kW|@0Kt;R z>%2d^h>4D!D#59Mr8=*Qjo3)VauJ&|Rfv@}Paa@fu^qL1Pl4?;w&vT>%9R*F;SZqKUv%w>5;8kq+^(`ux>@H*%lw$Gn zbqpF>1loG3tOgildyq@NU%GM~W-nNbgGtHInvKc|=-8AjG`ZRlSJs613Z1e)jfYK8 zwi{qFj`#u%)J(t_C*bQMM0n0c33#YDY%=b__7`lw2-$N!Oywx!A|al4Z%6`6yK)Rc zF+w@W%rwL-v@J;3kyLFV*?yVV-QP#0a#~S6L4F5MG217vFVBgc*Odvb0v1tDcK$~) z+CY!=I1t2N5iC}INrT2t1#d;L8#hu_H*5WdcWuDV^=okKK$0>uOcqDVc({cLhs+9-iuJPcUKwAZ{T;!g zBUtDt3RoC)=x|bMSscg~-~qIsp_80MS6e$8i!!lq%^a+s{V^JgQ*pjmR($s0WSb3* zd5Ks)^<8XQG8;v75J%gfvaqt9SyN4J5!Nl7f+_DkkHWNA3`$kxiv!9cNo{Qg)-Cu1 zvp;zS2R1K*Teed54I-^NgpW6u;n^Kc_$bwj4YdPE(w{+=ZU6<%Ar#BzT2%&=R~t~> zV8ojreu*3J8jBl7j=>K{jKB?J?!@&pSqLf9jAf?R(AJ|;7fhfb>P6Y2m|&5*KSLEx z|6w@HyUXzB{+IB2ET8FLK%}`l-(A?sIPVI%+5LCb-U16<`PJ;N) z!D9Od085Y=bEu8R3|FQc_Yo>$GPWk>4D_RyL0QJ)jBUVnHkc))Ml8?PVQGc|>&k*y zk?%s5iNAw^EFrT18#cwDq$m%1tqLlY3Wt)9;b3Ym{iTyZ?F53|5(JMkke*OxiTMev z_~dNt*dLD;lNu(M1xB47sYlY0lvK?3T|h!}1dG^+7chH$`w$yzp&#ptgUHnqM8~C` z6*J}b4ul7Ip4xk0>^iH!CA-Cs%qB0@^$E0EB1+e7UbzN2H7@9U=dg9p9%L03qO`ge zEjl9(G4M^9J`d$JDrFCOKNV2-z&T{(mf+nFKg08{ynzkdcA%=U5t#)ASif^Gw82gk zI(&#NYo=m313eX#wG&7zG$F4g06hbRLsVbK1$0HIPJFzER2S|}DiprX&&RxBQ7>l| z)gf?^1&-cOpVDO&={ki7VH08Sj}S)f9cR!%h;&k!g!q{bCId1<(-t@bYly0ZAdv;7 z6p-)?5Gwpz%`BK74=dki6BzYMJumv!C9t^p`LcNPFTvsuik*(ag{HuT<`4^<=J6j# zSxqC)VJT_}=knTW98F8X;pBtN&i5m~AQP!+NmQO0$j(W}?mauPWy=<2P0-2}s~MzQ zQQz8zjm>_%v$qnnVl`NtXvL?Qt#~cI5Nk5D$S|M6o~91Gv?38R_U2*SGrz+8=R2bEk+3AQbri|HS}fCD?1L1(nX$qVQ9pM;$kE;r>EwlABF z#Le^IY{S9(~+{&C90Xjo&}Qse?WXCEBe%hiGG+sHDmNRrL7C$B?xdNx zl?p|`a>cOQan*=ham5`sD`i@wlBtxzmIYHoe@pf;Gz&~rjjVH#^(!(J`MT?FR94~3 z>u=!gFgn<9-oN#l>v8w6yD?_$WB5J6^6~tgcx(1{q&J0-RAD1vA~@E-ENWL4R%U6i zHrI^FyGxO2xqywiI;=|(N!$(%m5qSKVhaD$gT)hO@F!RT%!1qLhgI}3S@2fQzpLmT z$#$v&UN=z(vhmlR#8fO@PKA0b8P%1gC@n3;76#v4hf-i+b`@l%EMSp$b*X)ut_|XsU+VqC;a{Jrd%Rv17+kP~pSG&)#o4ivyGdyInvQbDmV*stGDtzhVuy z!PC`^_LEXIxC?p)PZQnG#phI1TLpDS%viJu`Q=n1%<7pJq2Anwc&ZPZ*NgVPex*2I z*T5hWsX{7hTNSW$_MK6{QdZr>$1{;vQUSBmjqVf75?wCrh);ka(xa@aDdKf*q55d0 znqquFjrlmVVM2r7he0o)(G#tECW^&JMdqO@^zr(I6xBkbstfV_2ip3h z7M6YdX;dpgDwPnE!4Ul*$j^03mo%HH%F=}v`j&u&$!~OHGeWCO8z$sbgdH>C2*JS5 z_w`+bnF{Z#g2h8MmzGQB_ z0+vy?4#RM^^XPh&8*rU0ZoKkZ#pJ#`CeKN&Fd0*k?k^d*m;2HkCUwNbuDtR}Ty>Q! zj=UPzUj0M9?^@h?!;Q**FC&K&EW<}*=9dIZja~sud4&<>RW?*G@vWgspIczZ#|aIn z(nnCQaidXXM?;GlD!mhFImMXr>dTn*{>v~(&96Z^#-)-jrveV_U9$wAzx8V@oc<1S zsg$Lpi<=2R85PmGB} z&z@GCMD}}-TY*d5rlt7!_1|Ib!dc3|zVxlyjb?0IwE*wG`6Dcx^D25GB*a;^DtVJ~ zD1+Fxb^%`b?T;|!gBMBsdej=)QSCg3z0Li2{g?;8iPPaX8;kMbt}^T@;ziSUqO8t= z)Q6C#>p@CO1T*4F@OgYKCK4+93j8S0pTmwU9jzH!BY|t`fRU=j z-0D*X@0*;=W?Y?Ua(BaICrp?^{-X@u%c3_iDc>SRD7*OiT?|^X@t0U9Gg}`6m%}Tw z2-(0Hq>^l>kZn1S*IW)5^XR5*|(gkp^s0C`C zqa2M7X*}LClCZd{8V0)^8nYD!n~UeZ4cUd2sBJc&gHVxeew|cWrPa*@NdN<<&-46t z@Z5D!fpnm@RZX?T>pFNAg;uI@=2NZybFj$FFw05Q+Xui{L6`zz0=zqT9v!|j2osk4 z>HHjmMaGN>ct6P69$i>&_<>!6b93efA z;iu1G-0gQ@)Qz_&^}wVE<@YcDJ}&>}cNCNR@|Zj)5Rv*|GS(t$MF#L?6}~(#tM)Iy z>>K#bxBdm+`}Sq{!MDGKtH1kQ+<5i13Rv#Ba}2>U1~aBDQcBrZP_2|#TBufBOgy}( zZtlR0JS#p*Zb5}iN>Vwf+AL_Iik9ledk!7N^!MM!+PPEF=^-4>_u|BblNf~Tu>+ou zqnP#He_;0e|A~a8BZ~jod|_k|GK*%uiv^Qkhp{S?akLBP8B5PF&P%9o)$6cg@vE3S z{kMpdcE!ZQBMFu$mG+a$xR>ntBg*CP2A0}C0gJMtQ~F4KGQU~CB2(4+=uG_x+YDGS z`!hv(>|VD3-N*YCE=V2DljqLhY&Vt1@|j9?dDw|F{U{oON|OEuKgqDKwsp4-}m2{H!k}ZrTqO+LCNoZ z_X?#Jn5Yr~i|l+%*}VZ)QK*t-Mqdv{Z@xRhd^AH6>j@4WFYN{VXXat>mB zvlmlRq}vNvmmS6{2{qVG@V~kK7;p{y{7uxA9OmaR6}n^%6&d*W{nzm3Yp>u)avI$9WS6@GPOBH0 zNlBPF@i|O<@kdD9vlthS+xVUyoIeqOwmJi|C;c9;y!Z=j+8Tp0l>sgEc-b^7K3RqN z`3_7x+$2}q)?TA1lM#1N_TDv0>Hd;|d)e&giYu6m2Or^%rl-j%7w$AumE$>wT&nB%|- z2G*mNGbp#8MkAwHqu!5ZlM5|oH(DHiv^axk<$2aRI$^Z;C|eVo7_5!1ewe%iFnfl~~;I)|SUHo$Ach~Ns!c-R@G0Xx{hWy?_q8@+>#-yS&$2c5{r;G(RKCs4!$EYepm zQ&`3R6e6|O_YcYJ%b>usXJwuPZ%n#l_vesdT334CO6WpBm2BlLHnep z)foo#2##jwp~Ymz@pI?Vq}QXE!Kz71Wl>=Qd5+Cxb|hQRpjLoZ=0%d`6jr1eVGJ5yE~0QHIUSXAQ2 z%Bl{feE&Y(1!ztHC7z4eR$zgKD#p(9XN*wogk>EMLBZcI=e$F<1aFr$I2V+_9pmj}AG^U9QL zH`P+Ts}Bj~W@val&HQ{l3Dd@8qNj^s2zR2hqYqY5lMEet9xG!wn)zN6&vg@(SF7(l znEcZB&QgVi5$eAHLx9OqfH8nn%q^-!O``_ACm1w&e$Oxtg*yjOP+Eh6l4|9)L8Yhq zif+LX>gZRx8z)bjiyS76IztbV>;0IK)PNWZ)e05BhLQ*lGZz1TO93`(`moJ-9M5k{ z!RoD@}Baeo6g6rIz6BBb054rDTf~s+A=4 zvTuCzl6^yg%;lF~u5^pteABJCjj=;1LaEdWBUBgz%IQxPb#_$L)2EvQn3w0pCx_Lj z)KIZB+tI9Xpqeqarimb8QonJ|VtoG63n)IgheDWsAb;bdpXdaU3$m43cHZmN5=^J)v3eGjKvI6iRPPYmz3n*zwgL@U+#PEF`hKmIHxw8z4y1* zx8|H5tPfjOy@tyC1Bkkt(N=pJo7cRHm!5e7TQ+Wh&FWSbC~}jQb#yF98$Nq2KKtb_;1i$yEIvmE z5)~qVB2M=CYrd$gB6s)QGnL7clDb7Y?q&+b)m1%eC8S@0o}Eq{|c`E!p9Yx zdB=@-lq%=R*VZe*^3uxV$ZQHg)iFI$Q)LLFOy7gW>L~?Sp3Sx44@c`U|5yXk8vQVP zCtwc_LTeB38C_H?1QwqFOBeU`!A4-Q6Ikq5fhF{}z`|fGz!DWUI1MfzHLx&#Fkmx4 zF<2S7?R2Y8SuL{IHH5u&c4RpwkY=RfF!w5HRvN8gMEWPtJ2a^T7pFH$wC5~|%s`Ws}`?oV-JET90Dljes7-UVBE}1h#g~Ruoi1WP= z47zwdX*QEUF7w7*eD8KDS$A}lb$0^&Ll-eZ>t?`+27Ay)up-G-h8CA}#86@Eg_k$% z<+)vq4GG4OMn^Xe6n3B^Oh4g1nFAq%1bSHadwYhIX$BG2XBWXHv)zX(&x8Uj*}7hZ zL}k|4QAZ*e?4i2lJ;#PFAT)FyUY3IZi_zv)7_npvh){Of+(BAM8KPa&*p5zvT_G8< zZW-y;4Xx3EirN-r7nHMJIZ05@BVX5z7xtCm?Q%Ds&(-_|& zgv+^q$BOybxbOuS>vC{uFiOOxBC+eSX~p|^<%xgC-gO_q=uD7^lB~%*G^$yd5bI0u zy)ZsV=lw?jEYm4nM27nah+(qhByYxOv>-k0ICgAZj@{c=V(Z2wSi5QgR-5%b=C4-Y=@ z0B$Es`TW0r2A{q0dVKz?Hz{mH`cK59GhQ4`n20PXDx<<=HvZ#}e-rl*XvCQ$aox>4 zN5Dr$hTU|dFqm8Ml`sAazWjwxVdg!z;ju@*foI-Wk2lt&;DuEukkJ}OeTN&>Ep{~N zBdF4KVRdUSe!Zs}&!@HH>0?z`e7XslDnB%yL4rsRRaq3~02#X{PD{e->QPeXdr2dG zu0eQsoQELeA-ITnS>yd7Is@5ckO3eRnWE8I-iJOni81GM-RlQikmX*?zs`)k^CIaX$elUV|gY6jq?5t`P@PPvP|G(@NIn*47TVJP`uzd2Fst z;Jthw7Up@ezR->x1qPJrdX#nfW4xaP!C|=PECvKz1+)p&GR#})AZMBLQV8%F98@tj zmOuFy`0C*zz=l}%zHYM6xCDtYBxQ~bNu8{vAL4U*cwSaZ2nWk7$WbSd-R7mrB3b1A z>^3(xW;CG6NkSuF#cfV9TYqE(gYk11=Jf_x#unbsrhGH9-F(ly?(!nPlJdUTb^)jB zBd}9Bx@lJb1W63`ef~3_ z!xygkyaFmW+;D>uBLrA(zw2HsTD(db=`{^3j{gBzR+Po?R+=pBF+gAmD$6Lh8$4*U z`q653!L2i+I5P#?)-1$UlJk8>H!8M$<9w`L{xWh?^Pp*QAP^XX#ohx8V}$gDTTEV5 zl~!TrhIQDzX)V%E9717s8g}p4fTfG)8fy9Zb!Q87swy}PEeJ>4@PwmiFbC0S?1#>I0iD*1C<$K1 zo2d<0Tx7tG_81l%t0QYlqTM}-VggGgUuF|!_WXtKjTW|gXZn^1N z%${`@rS{kH=Qq~j?e(Yd+WOPTYK!q6e5h=)qPW3^LwOx|E!&KzkE`%rg$LWnw({K* zsCAKf8)IlT`qAkK5@6y4m>7X2L139)lf~oghnGRwCdd zBBY88y@P>KfW^-Hu*EMbph7XI++&=+Owy-}bdwxsIwqt zwGafWbs?$`uVPh(5Gr*(MESfFd3;AydxK}u-#dy)-gBJicp2>J0#F4mAWzeUauT-^ zeH6{U5oH#93)OM4iDZZ6B!5fCzK;Oc&2sIg-whC4i2VdJU~iQVr=?!jEUq{KxR+o>5u_X2yng9JY-USo-nH?WeJEUy%YV zw^NBoCSzF@R$1fzE0Upj+LUdK0g~l>TCq&47Wov#BF$W~Uk3Te`t~<`>3U_tr7WQ# z!;WvgRmkccxb^nCapyhv;k_lR{{k!xe+w+S`2Pef0q6;wYLk!kKZFju4_<=>ev1a3 zjYX&`IElQ{lQ^Ay0L8icVA7Pp!()9mnJ_v6C&{MFV{wte1^wNKhvIOX3}~tB~h)3;^3JkynnhD+p4WdQOA(2??ojmZnL>dS%X3EPNLHlL92z*m~749>Vk{4 zR&t1W$RfS2Uf6xzaInmLG6Y#>+p=thwFJoCf+3b$h(RtaibeV&Xatuqfkm}1ensosfk`0+F z!C>U4PbevWdN0Gzz$6)lMZwq^6eW+BOtgy;K$5+EN(%acfdM5AeK$cyh7~6U$;|uc zgZxcd@-{5L-^+l?O3)?EV*QgyjPMzISrMpqMp+RCyZSN20P3aRM25~Q0Xi@+rI<9M z$%v%k!HXE^JICt~*t##Fi=f<1Fz%(F4|1D<{<^=k6G!U(Xd>WHSfC*c?5VP#l0k3% zz71%tEyGAKh^a&mGLEKT{`~o9H0kNzNs_JzCdVhxURi^!%T}C&aFE5oSf`&!-FjTg&;c)22s_ZuTvSz$$mZxj@wtb+twqV(X<6we)3K$>w`2?#tL zAp)S4%B8T~gL?M>ns`z}U=$^+J4dTJp=Q8#5QueDN8V^snM4{T(UTM|CPxA!stEHs zGM9*t4=>9lL@*+5C?=T*$a~Pty60fMPY#{M*u)gV0S}@fAAL3eBUMZe75UNTFb=mQ zv5zXHgCJbk*^O##9QG&~ae~Tp>?|AvRev9Wg!dev5Bj*z9U6t*KLn$*2WI-XY?Dvf z=8`5~k|?vg4+cj!Ox$iIu?mDoVRdw&#?p@h$2ihRbYDno!G;0{nh9#pZY#t=UjLxE zA5ZMb#->B1c>L?X!kxF?1xY4(bv~N(p-TN0ySg;S)ut~27wKEMs$3NH!tVk$x8HOd z?%?O0x89Ds@3<3p-E|kq>fN*%xKrZEz4zmT57(kyE6FDbEGhvQj{+=h1eR505zI?7 zLS>MqFe)%>g1{0*I|*c)qYpX~QkyvhyEVjk7=t-B3>{US)srM)8BqrF*j$6K5m@|; zx1RVV7(FZ#KS?IZzKij}AE4@&j`&~?`~>8fLM+e0Xz${u4C;|4FB$18N^(*G7JnDd zr%?FFfJK@(1Y81LWU?}Rk-^JFO5^v9fqsJsD{44&mced}0gk~)&LBaCcL1A!ES?8pStY7+2 z;sgWfTnved>LU@6w)!i;5@%%yi=r8(lIkDfGxcDodw}eISOJzO%P~4E?fMsBVFim3 z$YkY3nJ_p=Q0iuR2(a`ss17m^_OpTx(3d48KiwLw;Yno4AcLk5>dCsL|KMP~6HVO{ z*m-;>I-6_J=W=5t5J6#j7B*}k*x1eJp5lEa;}{(pMpbqmK78wK6lZ6mClP_csKz@B z-o%eZ>_;T%g~s7k08q~| zEagQ@DDSi^XAOU=!F5(yCP8NKJ6Qga!7-RaAw))osV-&Bk8=vZcp~E@OG65HhzXF` z7&v9y)$c}viq6LR!JsIhqceqJb9SS}J%$qZIb>21Ehsi)O^y|XF5pj_@^Fw6^RRUg zPwvmdmLp~O#y5Zcml^jmKTU|_tb0ikNjilv-b?Z*BvblVr<=kEKGLj3z!Bh)?bDO0 zNkZ?OiF^5d);%*YYX(1O&AMW?PD zK8B}Or9f7<%x7RaQer}#mWs>Lg{*cv$}C~DnFr9=LUlqQv{<|0baz8<3ZR{8#pq2y z=Zr&7V6m|x*;%P4sAFBT_nP?>W0_XM>WWDlV-8dI3492+>r}#M=!!1yG#~C zOI)O#SCRlq)&oD;x}Skjl!WAk>Wb0g7pO9+4Cruv$zDy9iBbX-k}h3r8bnAE`u}S3 z_q0iSt=L}yCO|6OrHn|rqySB_|MGMPGXuBGB=?V9hIfS589B>~Py9rQapOdPD+_L#TD>{S>PV!bq82x(SFobHKVkk3f+U_;N`)?$l806 zT2u#9^a6IZ1hKrM2Wi~C$To$&ylyV*Z_iGIGf z!AnY-bUmN#WR($hz6qtdPtD(`BdOa})Q);rH!4_{bIR-C^!U-<-j3?h64>-Qf?XCY zb`OH_e$=XTIGtOH?Ynkj)7CA>$~Y{rPX&TtGV8E4Si-iDyhjF7{CxWx@`hZ`Lx z`Xk@b0V;#}ROqj$`|#(+DBf)E#s?%;DV|B_`QS2yJ4pWu&}X9|S!bPK5*&n`jKdkC zG6~CqQ;Y{Bo@SCvx3Y`|RSN5Xm~69ndz9~;7Fl+fjGlGE;GaaLa~!GOvsh7O$BL6G zEI-+bMTcsTZ5YIH64a-5ox#Rq<@omZevdi#K8X8g&HW3Y$a+hXrs-;HgtSat1sBEc zBA5_Jrh#advR_iS+%LJt_#5}nx({<`vuDp%l3U(?|6I&@;9=Z5`#~&OzTtlfENdzv zn19-cRw2ad5Y%u!1zEma z%Eah5=Fjy20RQw!L_t)cnvrI4)&*-&2J?`F(20GlFi|S(WK3E$WZ=&vJd6(kk}3fg zzocFg;zpYu875h+Kf*p1XU`aAvoJ|MOrVGCWeB~=OGpq@JZ?Ueix1!?gJw+#2Pj=b zeRLM85IV6nPANx*Y#~!|dBcji89AJ8N?y|>w3;EkAGJImRFV^#xLI8gDk@U&aiU5zcUZVawL627fOsllv^Wc)OJCm?}w2Nq&LK% zrwTKZDeBx&Xr19Jz#>h7NdimP{{Spv9x4|voy+4VU<dv?HfUSWP;nsuDW~CGc<~x!AUY>IzLs4fQbN$ zp8z7GwWJeRCR|2i=jo@?#3iH8E-Is&C{i#&_BBj3)6WXi6CG9NrpQcnZ}%nemPmf6 zj#%kN8K`5?KKeDmh`$j|TtJY&DWDQ%*;t}y!TPNPX${d}cT*hmPPAZ6i51nnpS-dX zB|AWCeJgARC-n9J8cZ%UQ5D!&e1jL-`7UIZTz z6-JUP0#D`nXAmmxHR_5oaJxFkbYcQ|CoB>%9!DSXt%3!h9`Oq_*MhU8UHZ zYe1>%9FCcK@%yc5*l@HA-~Z8*c#`_I$e~iAd1RX4;uJ)wZ?(cHZ7ic)*r=zV#h^<9px1 z%sKZfz#`3EqFzLah+2_86{TtH;l~u!a&^0?7*Q@)*JhEFFW-3Z8+iPI#|b>&#>3zE z8Xoz^H*x>hzJvdGb^+d8mxAXuW#UA89A`R`_;6n_(n}1e)r3*!?4l*nZe+#i>_S_U z2OTOm9Vh~uh2W`|g@BweIwR;XxVbH)toiP6g&>(<)qV$6Uzp6rM@bx{V~n7KK;;zR zU?9|lrl4o}stNFB{w*D^9SO1+23P4Ym*si&WWug75&&)+<}m>u1AgL?(md(mb}Jn# z*e^qf$&%@CvLtPYK`q2!c@<2eipk%9YtzkQGJ@+W!2ESt+vy2KG000627 z22QaEBWXYaCWEJuKE~pMkG|STCN8GtHU|T#Ht zadZ;!47^u8t&R6%=D9Lhp;qIPZZdbCKFE7$ySAhW=Q=5@m@D zIY$6#wj{6QdH3Eu12gZw2Qy~OP*#zZKG|8b=i-jLXDOq?+GSo!yN%{lK&4sjSNd31 zS0wO8iUEz9Zr1ZC>vI>{bw0G3{m?jLh`GZstJ{!q;s6fs+ltM5H)7|J9XPOWJ#w;+ zpsm$P!cNjoa&95{>?AR@d3s5Xs7e?sI@&u?Syqg)f=tDV@=l|+t^{tzkHOJCf{LVF zBH^RO1}-RbSbS75)CdeGE;O4Mun8^|EpF6y zcu~)wT&*?Zg*WG623f{^bO5nAR2TP9w$7#uR#?kyvX1*7Qk+F$Dm+%eMHq@?JQj8$ z$tmS;k=Yn?sFRk;vmFz)AjOwwA6QKd~@z~!R`mR5H^@;f6~bE*OBGuv>W%7wJH zI8M_TFO-1*t=4`VZwX3TnG4BR>f{0v6;EFwcDO*-mx+CxaIwSy!a9rRP#wkltT4P?aoJL1@{3Sdi#8b&f~ zNoU{2`^->z@pei%-apfb%@rnW$m>K_wHt=eMYK4FkxxRguAl{P9>~L%ybkOrBa7mHeY@P11-w$z1?PsM8vT~LPU_plE3l3n&luC%x`ZHy}G z(#Xtw2Z=*=v;WGdH4*~?Tuty24pf-YK^EIea&q9vDU=r$!=YBetM5cQK|+8<*5i-y zG3^-3kHA1+q2Pez8jMJ1akx(b2>}ZMj&`F1 zCABRmu4zU?hk@kEimK)g#hNuHR5Z5XL}ngN=arzcse{%IgT)5}375q?f=Yc4&Uh!V zr!7c-mo@b-B2N`ZoqYl)3`sn*BNN+B*WuegeiFCbJcA%|-*jKe6=fm=c%)v--wKc@ zlccBj3+Tvqi2(vO0zeWYW=lq71y~3wcS)!H-P7PADu>GF?*dDC9B-a9q0Kk|wJ8QY z$zeMcScg4~c3T)#1?AYd;zNA!&a2qJa|1GpP9weWG!E|HfcF=@jNLm^P*<%bu#n`_ ze34Pc=}B}NyeKHH#%?OiysQi~*On@lpK}Ta4sFNr)FY^As8li~$N&⪙G6Ecue0C zaET9IUW<(Q+*ElyB)Z6K8gMwCv5G-SpUI` z*sydS%JK?%{sq_>6#_)X@{$T{UG)y$dF9tQb8;gFx{NqGLYi}_9}!C(cCLIKuRr%o zqVyKZzL2uYq(&1Vuq4q!;Akdeuk^-IMtNLhrWs=>)`U=I2s1#KQKYxv*>@M=*867R zx|?pqwO{@cuAg})uD@4Cam-MdiLemqpp$XxlF~)mQ$@K5&Y!5dfv;e zcPP$x?=3TM_YIQe_;%cO`%Sp>p1W}efYsfOQt6R}zk7H+6BThDXQRtXJI;nao8RXhhJKoP!BR_Bvr|lzH zRjkEHg78U049hZWp*4*l!655n#m{W8VQWb`(@PqQ#Yw%xy%&|a6&?n5$@8_H z0s6RU5L!NOIq!3QjSIQq3()Ypo#2tn`(9jO#|i%hl#-$67!$}f(NCxhJS?Pg2EE0# z0j%oiM*)v7WRN?gA6AAr+j}qJV5Jr1Jhz3%opDVlYqq2`c#z*3Rwj39xP4ng1go0D zDBP@0;7nP|s+Q z=A1r$Q*{#iRHJC;b5;`!4!h1_UYQGrqrfrV_X_|-3YL>IfjtlNU-E@Rq&b(Jl?=(eeXyWYV3XVyC9aW*nmBoHX--WE|i}-f^8c& zV<&;6lL6Z7P2yBe6*lfZfr7$Hl$OCoc@%1161alsmgReb4 z7vFm90sQPo-@@UOY0BV;Cdy@*x3#Cpjw4lmq?9_5Rpmqn$zwOwpUmrtF;)col5i&? zj3)^OQVj#H3TmUCY}=)z9Ff1%bFxrTSA(L;a;UVOu(+Khp?c+bSqEp=fqhWx%`j5o zTU`CnI!2J=9K_=ETI8#vP&vj?ujz%_K918=G%s$?z}C~X`1((t#8+>eN%e8JGU7{7 zAy+!)?<8Qebfe29XR#aAe0CteF2awk~@Ok)RHj zFVM5Wnth2iW;B3f+m~SBt50Lg+V$|u=p-^>hdY7eM~>tDH=ic3{D#5vG|yoqIWOn3 zFeXAcb7&2o|KpGG{=(PM+^MA#C1IeW=t+UvDH$7WejKb(VMh^}Vs<^Y=Qd&InR;3c z4wp3|qoo7SELeoQADoM?-gc`3EZ5%tRebj5>y`8jGLu#@W#ZFy$~g8JGiE8PNIvrL zV@ea4C>A+ZF*=+aqoi%P_9oo$+3Rr2jbFhHH+~tn-EjwQoAm&G^oKX_!pbA~#ru1a zLdj65rHUYnts)aXRiMVwleO58+ks40fD(NYZBFTX8bf|bBVM2P9#(JO0-e=PN9@Fw z?YnVo9~nkT6;2;Z;rD~6sxGDUHDKkM)p+rZxA1Sjc>+hWOQ8u4VoQ1rvNdG%40yE+ zPA0zBosD5E%QK*rL9&EFY6Dqp6^po)L2_rc0WSY#NTytAK5B9f;825JVZ0wTumtJD zrJhNwF3{tMu2)$gOn_x&xkUjMSsz83uyz}I@j_}NvKXvQJSI~Y!O=#$($^sAQPQZ$ zUOJ<}TFnqzowQX2MkT|stmR^50M8^#ezSy1(K!VJ_v`r^8&mZl_9$stD)}4BYdv_c#DQl1 zrh~^U&2{65b_%ipSp&;{D+A%vr&K5;5VdjJ_LeS`xX;7RXO!9WA-;=Pasq?BLl~76 zBKyuMIlls|n`%nT%%&jf2`Yzp-ciaH3+wjgd@Y*D=+z`%8#nL9#^uYfW9dTdlnKZy zSL5i(bQl=OG`0|dqX;k0Uyk|jEXKk`AL6aI7h==qT`&+-WOdKY^ut$Km-ZgqgJsL# z$HKQ?!4tp!84eLxJUtU=k4}KX0quNNX>zsjeYD%DLZumxW#A0TJfnmHD*m1XiBn8j z(`NnF%_y&{<}t$+ab?%s*l-+3F2Dm7J0 z09rHSfomMujsd)Rs1P|+t&Qd(H0b)!W*Nar647V3oWlAO<#^-=zr*!kxr=r9W@YyL zU+qhZU3=9&|0N}*%T@3ZAd$IlGC5k}gdFoF$%y>9FW}nGUW3nn_H#<6V`Y*g>X-4RDban!qwP*^P@s zRG*ud;OSre5N|*CXH-?z!sha^9!uY{9&1-F#fpWmp*H^naF+4(GS3xo;rT{w1J*2l z6^rLTgOVCG{8YUHDxT6hLJ?vsXG7oOVJ1_nYYd)M03t70?A5tXvo^5OK`qMwcqE~(eYexz1 zV+a>U2uK%LyDp5PH0>x}d+rI$d*@{ok*TOmHp)gj^ep^l2bBpOYe`xGK1?si`ZG<~ zQ_zWh*=^XJ-hdQJ^sKrLJoo0inEk**N?Yj7H{6IX-h3TC`T0*PS&C)0t)y@eN0QVo zl5A3>uK)m=KxMy+GQ{|yM->J0vw?!)o65Sk1@I=LSWR3_PFR=k~V#2mi#aA(tl9vc97iiPXW3sT9q{|nJ(`5E{n0_Jq1N~yt z0|3N=l7fV$3}L3^RzOAp7g^3&Y*H}+9N8ZdVBx)Jc-@l>6034Lu`*ACblWge2qL>1 zJ!mAr_z8X`20z}-Q{&}R4cKcQM2c?;8?)+A#4;!GN3E+1>uM}`Ewc?vYW>({8N(h1 z;6sdleS?$mhq{ni*@+TX^bQ91P6og>KI`Ek4eY^7P!YLy7u&Hc$BcK&z1XB>prSF7Nx83W?CDz^Fmux z1K3ziMo%>%eIglJAC~5K;17FCu%D=NfGD@Q(t#pNkCHBhTnr(`2Wg&^W=N&UFgb!A z?(_9rRNmDAs)N-97A!ntz;eF-t@ROXt9GHvGlF_c2nSD`!uE}8uz$__*u7$bGUw*t z@iXYOGN_rtNX@Rrv#&0}AAbJ=UU=>;Jn_3{v2yulID&mtE#264Bppw^{3aGHTY{&a zdJ4Nf+=SPD^D1(S+MtPFz@{22_WLGroFI6F&%K2zYFVung~17>>CzlM2VZC$e)llR zCl%N5Fv`lxl>5lc%!I{aQ3gYll$2oc;>B3CY86ULOOcV0foFLe)`j& z;<@LZLv2$Fj8;Fi`Y?5usId0j+NlS@Ba=r zUOyApefegk-b+fCPk!QG@bQm*La|SN;?qjnrfUcoLL`-J8!}1q%Dk5AzH-BKYA2re zFCYIG+NbcTk58v``PYB_SA5|MUr>PMrkij7yTG!xE`(Q8ThU^U5x6~6EgqPhA*hTV z>^qr*-~RBIc zmPh%BfF;yBiulM72D*GWzH>F^{rOi|{m%1r9CAxu`0{y1C%J(OeK<^neeSnE#>Um} z!R!mcNRTa4E9}vFJn&_SWi?kmUXnkdc)5vL=hjVi^G@?WofCA{}_bQUrMZHfi1G|B0aVv46!) zU-&d`Ca~Ol&+WK(?nC&|pBCcTHAnI5C3|s#z*5ucK`pJ>5T#@v#{vCWynMU^Z=Y_( zvwL&!#+Fp%)|*h%pj8ygnXC*%V?j)w9YJ3H864if3%O}0abU|vr0m;?pu>oZlLHtV z?8fNmD01=(aWta<4hDNo?4q(lqI43k$af*b3#?@jTv{GhnuOAVz~VA5PBGZku!ujX z(2-U0ebVnFgKark_@-JtI_WKOV~*SlYsy&{N0wWbI7$skmZ|DQji?yF`G1_ z1kpa!2PPC?39?%F1}+jL;+IVcm))*tXFoFWQC?n-O`A4BtJPv;WCV7*9R`B|M~)o9jvYHt zTU(3V++3umrz>gmb8>R<`s=Ubt+(DnbGsT=sx7@K3LT|Vp1lVjo~}X}$yK!~gib?0 zG{ymB>SK6idpcGVSRVSp?{Vu_=isIrZdX)? zxTqM35fUpt^*`kb``qU~hwHApj_T%i+(|O}cNI%*0IyP^HW|Zc)>5t5{4h}+w&>kB ze7X>S`o$A?`_C^RWVR^4B5_&y$1t6;eH(uLtvm4NpFN-ei!T;o{pvxjN`+PLzM!nR zVyHOv7hu6f0R#F$rv~pn^Ber(hmT?3v23`*^z%WI6Y2M2eG&^xi_}Ni6y}lbblje3 z0`ka@ zeE7zTc=kVjh&>xVK*-rXE&DEy!=HxZx>(@B_sKRgvm%|V^J*E{?q3OEdPQVKld@*^2JYL z)?Hu4tOp;&51(6%=hvUWe|)eDr#d5OXfs2lbJ2PHC}|4gt%5jyy0sZk9cjSI5+jb+ zxuACRqpn7SZJV~ExF8!nT>*3tgy8V%k(Pc4r_&Chsw@Xb4s1hC)-gjn&*!zG zOf#aS>f6@sj8D4mWG%6BKdR^~}$*+$XEPM;Tb z<_!%aMu3$0DkRzp80R`hpiW#?a+f8-e74X<*g}^;@{J0XLs95FoCIVue=FKQO7NM4 zJ328v9Gdr$;Tc0l_?*&QMt4-^*hF}&q&|}5lrmZ?EpQRFyq+d9pv!?GoVcsJFFOlXx=A7zA?))Wbybj5sOQ_cd zVfLRxocAL6%+9h5dq@mMct1UnF=fpgU$~13Yk*+bhj57Xv%M24RR@NL_(J(_YU%<3 zCy2_5YSdKMp{=b08jTLI7z>~OE?&Hh#)f9>*|QHFIwOH40H>oH7AlkyS0C2rG@!~5 zL%XD*(e*;FA3(Mtj@Jn+OAqB^_P2kHn{T`iH(YnyUs@mpOg=_{5Q6zHB$z@VWx+q` zZ&7CFUzs2&eX-IUCNV-{#lQR$)rx@2{{$?O(nXdl{(Hc(yuyn&(>tkH;%L@6ptZZ9 zvwNVj+ELWlf>-|ZB>wZ?zs>iw9Q|<%@nldjr@H}*-uNwk|IOK0`O=?J(_|v>55O56 zLAxc46I<6{>%wPIw0{}S2Ro!x6`MRejP#5Yy!rdb@$S>#MMb?1AyyWd5PcO`r1M^K zg?*&J;*6e!tY6<3??PY5fm}N4hj0A}?=OB6g~b^#m{fGebgW$P92ULudmP%j8eXdd zuJ{ym?g4~+Bk&o6$T_kP3!eKu-hB4gIJS2!8mkIWQJ8^Mi(bSFPyCp2{4G>BmXncp zLuHRZWs0H25J9sgh6YDm0hWyR0IEzwsA%s-ZF2(Z&VDqt@CCLw@y@I7n9Y&faisI@vw9vU~R8AbqXvcG> z-FT0*@}T293dv#%$hK6LZZy{GacJLRWw>=t78T0T?MTfyqyS4^ZYuJ!P9XQpaa5FL zAwTyd%5&3^dT>ALs;ZTIM9%nGG*Yo0D0gFbO#&y4mr=!lc#45)dF=p}*AHS<(=c|K zfI9leL9+DuH6~OWCt+s5l{{VBlC$88HUoAK6}MilaIC;zq+Py|?fk;{s5Infrullw~<^rLVNo>xH7>Wi}y4=ED} zD@X|5Io63&`twR6NdcAtmPt?7C_&|-lIA|i>xEeNBa_8dFidFW!)_^`LJf^Zu(d`5^gnu=4PBZc^sS8Z6VutVqowB^7Cu4b@L(A z6jq@szZ``bc}PE!ilG65GnsUDUI|X7rK6_25EaF_%3^FOB#Hto{saRNpD!U`8mCbv z1$`ILMPMEhAMp(;z~TcJTu71WkgEZm)e zJ0JZweC3OG5matal!-KH2~iYK`8eZ%EQ=wDDMgh?|B5t!O(&n7PVFLtcm$B7xlGi` zCrC;qZT=@d_Hlgr)1M~!{36e}1-CJF{5@b%+v zcd=#u6Hw>xhtF+AG#-Ff*M?QAmtxT~KS0K=g>Z*Ntz1-^!30=j9*ZkNCD}Fp4>pCd zqWq&mqhp5+taEBn?24Qb{Jy5YarW6|T5U%#qBq!*KaS zigZ1C>;N`zS&MDkH)6-m&B}zVvg%rBEG}3B-AZ;;N#AaE$*3nP8oLeoMTOY1WeYz1 zU9~{QL>9}jlD=W)%$d0D#xLP3*ZwP6&CQrYKzi!!rFd=K5&U_@ zQRHa5P}mVgWoI1q>ImxFLUgP+RN7uN=q6C7A%GjY2;y#5EH`Xc51e)%E06_7trZ@# z2jfH5=iy8PRUk!RU4%Vl`6@HX`8*!eeJJq^y;o?+8x9!NBWgKywigWL7$T zh3{zsHa{yg9VMLXhmAo`k}oP9tNsBb`CbQkoHV=G7{E*n5=NS3^c>tHbiBbK1~-`m zdjWmj0w&Wb_5bghq}CTplAQD;&(p4U;1iS>AnV;jIM(V@I_*zedZFUI2$SDZtU?VX zhcp}e+?S!Ek8dP+{+bN%b>kS;w)dlz$6EQ@UVh3Pms*0yylVPNOAp?ti{m(hwr}u~ zlKoiE{VfE6w+W&@Zua9Rbxyo#>!Y$JDDWCm7FE2TKiQ}7z3KpdQt87I*Ck~_rlgUV zwEJ3~n@W)SQ&SI~Xo}%K>%FMqJ;_`W8Au@`w2l%0=2^$_?}c&vBsYTH)^0_?$izWe zRzO2ynaOwdvvdpoBS#iOn?5fggCCMTNcME|Goj=@3rgZnf>(_1w}e)-I;fl0Iy5F7kwp<-FL^W1Fnu(GT{dEhci zJlsb%!K#82yHH!qHoMNfzBWcJvh9d-G+y`sY88AU}`A^Iyl3 zw_n41Z@hxs>>QXGE1c0$SR_jU0m4o7;Rr@iQeKQhM|NQS#%0*NeFJtM+Ksi_)?ppL z=N6~IU~7Y4Vz(Gcfez zR(lvG)^H62Ooxrm>gwlblrPASg-6SAu+fcb?=Wmog+{i=}3kkOhyN)DjQH) zQIF=v4y2`IqA05v>Y6&51*)Je29)}pbq9ea)*LUCFuYVvYmP<6npwIN8_?Dos# zvMCsS<1n+f3%D5kqp*fX=q!?(X-EMTf0RLrAR-k~Rv?UYokQ;snSM9Hhn3vK%G?sW zhzO8^xOJI;ct0dl`(I8)7)9 z8^+r$N&JB9?>7wkZx=a`?`81fer<$`t)m}1DOvt-N{#uAN&LCciAC*$2=n>X-X3JO zxv-mR<^G&@%sAbM?^jyzGou73~{f0PBLC&zs%UjeUh`oZve> zQe{OhReQc=7#s5S*jwwxx;#COwuF(+x{|MtW80Zpq*ZsK*%nf=e`{PJv{|QcrqYjH zDJoQV4j{vL7H{ouKxv~97FRbkB$o=X7>Dre_I$j1Cf+GZ*DFh_dNN5~(1~?N7!$3*w3=b&lF*pM;_(DmgLoeW=njzzIlP*Vn zd|>w=Jnj*=Jd-fmCg}WqXfj2irsL>Xpso4?*AgY|9_(n1VOv80^*rVh{cw=} zqxBEsj3$Jg)fSYJ1#3eS1j-8-?7M*BflDy?sd8EIj`7)AC{Y?HV;HZI7`y3B(NATK`2v+yfZxxy(v>jwGfJ`-`o}Qgsuw30jm<{r!XJVpI?IUOu71t%adAbA3%G}sn z??#@X7jzLcyU${Og&ED!O9+o$f?MvLJ2s!OB2||_Y2-XknfjFZLx;6JSd^(&mJn#9 z;@Md4!m+jl3hg8K@Mswh6m`H9KL-PqOB?I{%Fb>qpszo9s2YbHXK|YE@K324WVYBz zK&b|`aTxV1a}tl2w-#VAf#v@1d>?no92Ke&Y3i1_DSt^YN#Kxru5{FsNXmX?ALE9k zbdmi^3jHf!BV<*vd-$CulO)CNkyvr(%)bjP%ge%eJDuvvnnXL*m5Fgps|}#l&e-c1 zhl)PeZi~}*yf8Wgum%#0pS`g7yP$W*;PLd4wD(iJC1H(E(CDY0emDXI3I7BVkx7JD zHzM&NB>N{3ry!7}FoGfa4T0;wEwC5~2F|WQ1Q;Y_EWJN`7NHPETWWn?fxP*Emq9OQKvIMhiiuzR^K&@iUkQ@ye_3W7f>Mc#x{( zK03=ov%iVQAN!$_15A=jib;wVnX@8FWjX=nw-m*4HBsfGk9+8t!VtjGc^Ep+gP;Ca;Zyj}GS zRNQCc`;819nzv;(}4fpenB z&LSX7_ewt#?@Q9_H1mFCRGXK9*6HuZP#^1Cath|y1!WFR1@Ez#$JR-cB=56pV3>7~ z*XfF|?#1CB;q`dqmVrr_X^aWVdMhTrBOR~ZL~G&iOFEd|OL9JeQtg7(=0ks154s2- z0xn7a08Dx>0#vVIK8q(F;j<)Jk7WU^Fq~2+16_y@OppY2!^Qd@>mGoEEZV5nD8SMe z;c>nM$mg)4!iy7*^8}0}PPK+mWg0+sa|lQ4TuM_{XyhV11Qrv0b3fVon!FAYpHbR4 zS_r^71mm|-nsCB2hE(e$=JWf}wz$%ixsiT-v|Ot!kKAgDA+KJKAMY%{pEBF=vrXC9 z*p|eJr~r$W;O|6>CJcj4fF+5{E5Neka3&u7{*Q1k$>U4{hxDb&8cXtdH5ZtCm+1up zFajh3F7he+WV_Otf7_i3v7F8sMw>MY_uY3NX5Y)tnfH=l-iKND%>IXgMdKNP#@z#* zl`+HYg4P*?E!YERgzq5KPf!v6n}jVwqSSQ`cGexUk};a)OoHyTb(7rpBN*w2E6@#_ zuM58DD3bJHvHym^a*n`4@EE#CrZmY19fC7Rnac-=C3+E0gb|MTS@Gfo8ZVtQO8G@K zA|1kkK3G^NJ~BmLe3B0=;1Yn_A3`V?L%<(}*Aal->_$8ig4gGUflNuoilH|4D$Dok zy<~(|vQV-TS;r(tLm92_N1f{|stp5lsxGv&6L{#{Dpe4#y}TIr-TNpWxsM9vo;i5z zf$!oQU;BvyECL_`D3X9uI_yQENV=A}4?LtKp_F}+N?+!+$g#3b((OxrvAOq81JrjO z`z9W{|6$C%?;*^X`4E2l+`E{!`WRkbdKe`g2~@QP&_d;;R=LsH?1Vw(g}Eb$6*)Sr zDKN7F#-Oo>(9+n17oUFyOFmf0O3}fWnTqFMcnaHhu0m}?0XA)2hOOIIp|Yt8xur#T zZ~2FKb^d%j@`ImXZ+(pq6=o_&{w>W0|Nk%M5M=IR?X4UUyM?8=l@@i4-sJVO0=|id@*M8%H*yxRE}4NEg9^ zLL)w`4C0+UCq5_*V7IDA=@XI3l4(>O8#}!?L!im#?`DxLi|RQ}RU!RH(vP&UGmdRU zoo&rM*jy6C;Sx9YPT{0+3qDujI88U6$0gL#cN%z|5?eoxsF`CW~XY>FlM9}#_{KErC4w*7x(`7-*E>) zL0TUKD6Xb#k-pTcfTHxH5>R9&zNi=3E|a9?SZOX7)uPPGziV2xT+I#&8#mkscWM;$>NKHwk)#%B7otkt7R>cK6VCdJ#$vFeaa+q9Ks{cLf$#Qr1@J zCyEXzIcK{2&mtV9EVCKWscBO_4Test4HsF_0Aju8$%Crk*5*lk9-tZWrd~i=N z0=>?H_BJg#TBc3a(!}$1aJUFGZWbIRvDQ9J={JCOJ7uE1ALVU+oNkTcgp%Vaftzbt)NwRQWv6NpV3|GZQ9L^55j=3u{djoJxAEA+KbX#1EE$an6rw=xpEFlsC*oM* zY@%MIxlGn!5tSl|DId7fJSI(L56%6y0xaMC+PCm^DwT)te-txkJ&fNyzXyRVP=G};2o$<{u)o$t1;OCUz!#I>pv2ly*aqFe zWdvB(Mn12w`fBr8yjkwWiv?B`kz`2%Om%o1TTfS_)H{v>2KtwBj9A(f$JXXJ*>)G} z+F51kVQIDt_e{Xbdo>d%)RbM-ngo(8i?Ht;`uOY#VXMgtu!k=y=NKH9p|@US-MI{d z=REYjNp$cgjgfJfSpXEu(1tIgJ#-%G*hQ%Mep}pUq2jSB&t){)r_kiN!2N)R_txP% zj~44F^v<&|SlkFOpt<7{sP#?YkPFD;GphM6$ZZsVvWPk)K-pw2PArPP;UPqMye#I| z$kaZB)?n3*E?N`N_L{h3aE}=O}9Ef2*@i*iHaqRYzOsGMcfk51!W{U9Gs5A?A!y6%RP`xKv_I^(f%r*z?UY`OifkYnyWH^b$ zrT>1w61viPA4*(6gw{PUik|)iOqOO8=AXcsQ~OYom!f>8pWKa8CwCz`?-*1aO$3-E zB3+l@4NWMkN`|R+%w{uk^U`r(&sH4WzZGdm_aN=q4jetO3Yn+3qq(shUJnu4JH&#G zLe)t|Vxz;__mu@BL6op)c8sr729nL%`($sufWrlEqj+N1DMzt%%7?eCg0vI`64Qqd{gJq zrcooOyasy8-4+HpP1j{5&B%^Q2U7Gy*i_@k4pmY~HB!lnytu@S{l)=h8Qd+kel+os!qb@JP#LH@*yg|9c{g6V_nPQ-&MR}Gq1Ca_fSA3(Miy* z@?S(2ne%D=dA!uohi{x{CD>UM&@5&^T%4~#9m`$K>#u6<#ZJoWO#FmsUMrF?C9XLNY-ZoN(-;s&gYiQQaOC4KOE8G_Xj)ia=Hu8oovIa znJPS;S%)XnYw-Fh72Zl$KHT&*2k${fdv!|r z504`;Bn#0EqpHe^trawu^I9s-gH(|RS`%1sq8WP|V>qcD!scQJ(mHxkXd1=Z)Mo6- z)uPHk!r&e!IF6&8YOaYgDFOtflZ6=L&^i0Dvp|cDc}C<|&mz+}hLfz^o6hKQgv_SVIEcz- z9~xWSc=e^f0?U1O^2Oi%0AKtAe`!-yvK7nB{3|R*WUqjUG_xti%%B(a=( z|Ln&w_kIEokCA1M=TgbsJ@Y~Q=D7uUXJg9W1(pvAEchVbf-2U&Mm<%G-i9Lw523iA z5UtG(&|38hu$Vo1R5g_%wSkyxR#Y@JLQgd)&5fQ=fWL2m)|)_Py#afRI*>!A zwz0^B3BI7TGnyH! zWzypw?oX`^kXc_ugXsdQG!xjJu0e&qUjY_7gDyobOud(3N?ulgMdp^+$$Vufu_H1` z1!Tc4{%(fv63c50g#_ILWj2%$ykrj0e(SK3yK9d+hI#4D*i1Ddz~UmKA7nYEdC%e9 zY$NunCo%t&87ot5NNJJ*6GpU4U&lCqr#+7Cr5?;b+=lO*>cFc+o5j_3}i*^&-`AnJ4F)Ynhqmm3hi|3Y-Y#pn! zQn9)fusXwXeDatM8`bAg#^=uAc@=!mMI;Rcj0@#_{u-81A%njt4e8g(=BKR0Sk8MY zWZC8LH*&c@pZAc@&k7!2%I~MCV%F?Dj(w*JU`m`r1N|b6`=3g;VS8H-TKL`RS>FjNQlFLO$*&B^5#Ugi48cT6I7^dOjK3YUqtyL54=UTG zk46ENIdd>~&i!~m)@9*w_s#srfu*vv63Z9P!%M&aDGqO40k5$Yesden9NdhB&;Jg~ z7A!|~Wh>PPL5RTOAh0;2eQ0dbV$Je(Sn%4L*t2Clsw#4z(KR9`?MW(isxLv*_*i<$`2JbqR6|cPV4(`3@KHUD*+i?9Czl=L?xe0gNe3Rld;y_p1Ol8dam%enJ0x*)* zSem0Q$oli}B``llbHE zL&#?3%GbtGq=}${N~=l}LY+Q_T5fyqi~-vl6DTwGvXVq8gB>s$T(DbxusZ_KIegGN z{V=%PFuFakxP7pCLa=zc_}K*)>9U7P&g+lB?Wc2jlh8A2s*GVYXoE0?#$gIiP#zDV z$r>lC^P=7ofI)_bk6c6znRc^l9J8IB!hAV z0XM7Fgks+N=|&@J9bHNqcwxiFkuliMPNB#^aJG3+VRj)~MfU3O!Z&phj*(%whWiPO zUGVlL5gzG-zrPpO?ry}+O;LUI(g#PN<^vX}T__~5=V%NlZPPIT1`(%P@dqv-9>0uU zmP3U1sBuQe9mBD7B5^bcdw-4KS`582PLl{bo;@r?hjP_2UH-3)B>dWKDc<)23G_`M0_9? zpPpAE191qRk~#XhEIZb>^`n^NV^e_xM_an_%qa_=O|xPpRp-)Nqmr?jaTQ)ZU$XBa z%k@0Gk#YEQ%KGeX{{Z|{IR2EC|;?qCJ=H>G+NheW2MU2d6lFDWOwqSQ&X|4vfMcpMtyRveL=x>b=MyH4Za_h)ZU?kI|tR*rch#$^GuZ3-At2!8bUi zO!yP~M}cJ;K>pYJ{vNPYY1}BKl@MI=IvfO!2til^a14IBShdfO%uWr;Elw0@jNHcx z984g!z6JJ?2^e~NkkL?sCYv6XSOCoyR$^@@DzrK@JDeC{pw_F6sMZA-#L0l8J*bxq zu?|0)H8y4Bn_l0Gq9P57OVp^S>qJ3qJF*xcGpbzhczY4zd9C&YN_k%y?LMffDDrh- zWH&n*ECPr!aOw?V966Sclv7oxYYm`M*M;l`4+@(caCS|>-g6GQEhZE(Am+EzI{kcR zJ}b}HQoe=A7!!S?=wblx=^y_Ku=rV3C_-Uj9W#>cQ(W@7C6VY93{wpB1cyKEZ%3|y z?~w0tgbK{bAlz8rj)J@jq#epdRbDgHjas-(J`8qEVwArps&pDqs2;s%QC`%9v}0K) z%q&55Q5{s(CbU!<&`@2gEMJ^o(Et^}K9}$0&lwi1S5ZMQmdWH#S@3LK$61`>Z`QI- zuP>+au$)(b#TOn$gzUj1{_5(5odn26P%$w`I_SR!5=pbGkA#WplTK_Uh#1Xbn9U(L z95EOO#zq&32DeGmSH5c!@11Nw#T8)bFvQTN?ZT1vA^c%oKHk}N2KPSpW88V|9k}h9 zo0QZoS2JpeUCX~^R=van$rUE)TV!bQ-!_fOta_>ca?IyG_jz1%&9%zp$ZM{-2G@S> z8hq*6FW?65zvU(YrMs~3-DPNPx1he+#CLB)oh+HI382l|Ltr6zobE&o)s+lFYNNI2 zBIqO_W)!yKx4-@!UVY{duyxikkh4H9vp~hB`jLBlH~#qVKg4stc>-1C8n{_j0RnLw zLF<)gU%;P!{S!16onri@6P#ngGti$M9)M2Og127yHGcQ+k0YL4HeUYIcd>i@>o^;ghq*+6pm)pXr3g+PUXC|k z{uS1)d>0l?5(zrL!{o=_9lP+vuYZcwi|3;!VCPM+;I7)mKBOI3hZp|vANXM20%%%n zaN6SVdwb|)F+6vw1AA=eaMUo0mk!qA`Mq_RpQ^$96ctW%#8IXTqPkUw7hiZ?>3|a_ zk?f<_efhJv=Cji|!X%xGdh*-Giipk(3S}|JcXy zxqtZ-uDj-6aD&Xezx5{E^T1sECqeL;Rr~SlrTcND#gFa98mvB5jSmmx;)6YBuykJz zmh8>Ln)D7FuJNPJkbset(jm$IEFqYzR4>*TbS{|)+Dl+bP^~0kqe`*Mv$OJv*+_XE zfdRN#L47e%1bjzH8MSp$F;9rhBR)yTAp7s-XZI+g$pKm~VqJa8kXgw&6_EGYOG(@} zg3#bNS@8u7(2o;cml0#2^hpNY{tH)9vz#MSmxPg%|0Q7jt%VpgrU8Tmgufvs-=|fK zq;-)jy`zXxDa90EnWRnd{>Eq{$SJO5W$YkWM$w|tL2a}kx3~heO&tnzS9h3^n_UXG zH;6<}KZ3C&Om;W+A52BSm!x0Dabn+b82K9)hN!S(U2y14C@ZLhx1t zYGKtG(A!Hz6!4&|u^QDiW$5mSqOrXWdyecvO>;G(-BAqK{0O!gP>`B|h|dRa$b>(096U`t)Ab+qaN+W*@AE8U#EJGGrUHRoO`0v4Um1h5qYCBdhzH z>8;q&GDuThek<|#^Lk~ zz~bnpuhX}K!;0C+aE$gO3^a?Is>Rn2l{W@;pbL%m2wI%I$hA-4-Q)GBZgWtngwZKM zTARQTO+TL4n2p!z7q@-yJNVL9zk)A*<=W}&#;nJZo=Gy6OO|6vGAlFd1$0EYNZtP{ zuuM;&o(7d`mDnK(EI;|lPb&7WpZXUCTm)ETg5=F#y#tE~EGhy^U9*wzpPvMlW|HG} z0?W3dPAofFg(g#wU=l-zNf!DF($8EtcsL!u|M!2x@^@cFPteR5I)sboXj6Qtm&Var zk%K?~$0K<9R}b^OR)(0#OEPVAp z@w=ZsghMGjFUt2lc#-}j8I8{}zLV_nZ%=IKqXU)*y*25dLfCJ@@q;Td|COI%-3Na{ z%xIkklq)ut)M4F+&)|hW{Rl@7Zb8h)fJ1r}@pU8R@KHSVyIYxdSVV~kuzcb3pTej9c{&N@$Ny;>SR_}NfQqDbkT%q-D@aPmo&eGpx&4}J zzMwdu9Iu>9VEOdN{|VOwkCpt zPEjXORFk39+6R%*(SriBj9DLGg&}yD0@G%XQ=Rle@9u+v70N74UsNa#f{N28OSz7a z-BEdjhOQVZCM%^(K=pRUAM1-oF-JF#xfc5L3d6CNrJab>I1M|F@6oz{-t#1M||IfBO0N(_?hTpl|Mr@@Tf zTlb@}x&_IhaTHZI;#k@l=xq)RU7Cc>ZNah3G#og71mpc@(cajJRm+wmJ0}DEBMH`y z2_-k)_6?g++fv2n2_j|ZE>vaZ!olB;$K!BCgUBu`K<1fKh$n(5sw%+79qXVqcd~w; z$L06{`mMarZM%^Shv5l&aPZhcG_=$!spQ9o`5rt0>^*!0t({tQ4-TVua1;ri*GqNR zOJE6hU4({eG{w|~MO7Y}8+!;W8`WVfX|N-Yg|>%P>6h75bo{hZiPq(35X^Q`k;pIw zl0Q&l(4qkyRY?lkno7`}3?a#2BAK6)y+ep3;y7|-3$|{04-Ru3E>96DE;6VvxQqr( z$m70ayEnl?_1wmI@^)rBwi7&LK!K#HkyJ06R0DWB+lmeKKJ06B6AL_ta&ZO*6=2a&y{bF}7WzSx0xUhqwvA!Iv07BA zZ0IDg=uHV2j6FD}8^rH7WZ|^~CvnFQzK0ubzX{jf_!Wgn3ZWFDD7nJKKK03eRe(iW zBb4=6u8aVaPJM|V(y}4SMgZw!ANx4ZVI27Q$MMhq{Lc!oe36Rf76Ot?ki7Y;cjANh zS3x5QXxnT`A4{X!hej&W1|8#9UK^H^a5fnIP+RysRH!<0jD8YE#+fp_@W(p&y32=^uksqiW21?RR+cmye>g^zbyWjE>?m z6}(gsn_5RO`Z|99(*V~%D8GksDy#Aeu&{0^nT;n1E+n7?7I$>;qXU*ea0>CzC1s*m zb7L_!u6q@4y!2CKrL0GPR5BGMFw$i}N#1Te_vi29_1B(4aZxGa(aW$|1`&;%Ls@YX zmM>q9*Is!NJGU-H(A~oG=yg+m6lAZ%>#uwdZ@vCoR_xPCyK0*xaASaOH*}+rKEAZr zjHSnGu=;c}79DBAI|u8rp}>M{%Lpp9Zqzkt@XB+qW7b`B$T;rhi>Cy>_OtlsPfP>L zRiF^|GQHr>G_c6%FJ;8Y%&WjMokM6k6Y5o9`2;@wPoKsO*L)7QedWuz>$cl5>%qtH z#Ooj6kBhhCKNju8X?2vK5=If(Q>6f%K7<-W6jjNkK=_vC} z$}qwa#jNf@*kwkow~xRg9hTfi+3OT`$I9uTGO-6nsb0od@y6f^juT`Upt~<2l$e4) zChgZF2qZ@N4(Tim=(416fR#F&II9d}jmgYhs+Cwj_fgq|8QkLp0_jYT$Rt5AstuVO z8}1`1p#3d~{8x4rK%{RaK%f%4+Rq~UqJ5HMjz(aK3Q*Cxqx3HUmKfRjz5_>;Jaf@# z2yTxPYPA}>ckf1JMJ@Um^fcNIyz^VQd|Vf89h6cnJ0D&hFPlQ^*BFarJ< zRIO@dEs&CuBL1eA3_DCUWXGoUE79Syp!dQA4)5NJihS<3IT3Vv6y>pM^EzZvg^UtN zG8#+qhXpU=NJ%EblT-qU2-;d2uzB5P^iye>qkg=zW*LrVoT3`(!&vVCRJ9FMUPsW> zX+Ugd$dp9EU z*mede2B}MfxG>5fB|+j`0@bH?;{?msY}PCJ*5;qC$DT$TH2jT5l0ccbS;ybX@n1ro zXAlkkKJ-NT(H-uCobmM@tZq zKFJPy5PDA>Z8kD}M;}St1Qr~rLuIQAZKgOn3AAd{5O!;Z@S~OK_~XuF_{#UchtJ$| zGrsuM8x-&m5D_rB3M>LLS6eTxF7zczteF2A{{34I zV8hZkkn{=}V7Xr&hrYQSfBeO_@#}wk5F1y$p)5HNBw3VHO$M7An>Q`NZ-4PPR=xKu z2BL;(5V&*!Q{$63cJMHM{-Z~*;EgBIs&OMog(7N2I`5TEd%g>qPV$i|mY!ZZdH52N zWRi)P1MRJu*tKOI)-8PwM|QoBg7mG}zjXmtP{nLm`zp#yGnDk#Lv*xo=mO8X1Q)?V zQj=`mvWyk{57@D30dh|Byd4WL|BWBv{e{24$rBru%$zP4Ww4#j$immz2C=-K;>w1u`8OGAo4m`g(4~LpU3a~UZ>+t%EZ(;U~xsZg zg}%hGu7Zjref)mW7X0Y-bvV}S!zMvIu6EXzq* z9A@R|BYPhHE3ml#3M`f@z+x9rp*h3ja8apvM5V;2D&l0ci3!vym}C$&YILyZ4H!sXrmxi^C-V$hyPtuQmF4VNc+7q(of8-) zYu9N_%BaQq27+0C4<^r!p|2;3y}P%dM$-moGD2Y42X#{mE{>5+@-`FQ3FMR(ASEje z!NDZXG?ih^v0Z5P7%(CST$WTbJxEJQL&zV3G3-SuK}b@nOi6|0AyXq%;yHQfFxn9A zXZiHAyy7y~2g+)nGTb}loy6oQNTM!dUtPD7Z6Vt{i47$-)Dl=u5M=)IL^~?|7oai* zkh*ReTCV`hxk>)eWg>w9%M=MteG#hi(h>It2v$>w(XR$%eVsr8X-9UVBKL#>Dq>T^ z(oD^txxj1Y975XujU;_$H1qM_K2@s#i@N&)@~Sn+C~Z|n^GS*p10PL>au1QX#Qj|e z^qq$(KwzagNPJAb9%vb41yr07`gmYK0hdmjtQH$Zqt=hw4g$9!LM1s5PLC&!)G>>AN0O zW}m{+x1OcK_zu>*{|fT6Q*i3UUMzm|S^Vy&U&s1oucEH}Bm#i|<3b3oK$La98+En$ z*tB{cp8oYWaCpaJ7*vfgYt%S?=m_3=J?89U)Wbw`+ zv`QOgxe+@mO{mewi2D8DyTYl4Fy7u#h!c%`d7XB&HXAVS<#+MW%*SxY9S;*!W+-i^ zGO9xyM}`)P(+DGxbru9PgrUd~#M#Q&^*M@TNy53S!w=;=IsT>_?#5R>_f_2T#p`e@ z&%NdPTQFLGuALW%z(D~g| zC3ZA+bim{G!D|h{Y4pL}7eT4I9xY^t&h7!Em6oH^?jm?GYO+p^u>5>>KbmS<&=u){ zzTF6m#)`?o34&QalCd~?h!B<*2cp&_8G3?5!i&DaQS>B|7?+WeV^e5rYlG3p=jt1P zcYtJ|cbp)@Iyi7ad3Pb7A47fpDDsbETa^hr%k(%{XD7Juw^{d7DKMTo(SoMnB`Vnw zWbfFCtnE86c>dyaqlzq;BH(g%0PVHKsG}-N1d@nE&no~X(*eAJ9vs=f7035)#&~al z$B*Frr1YEe2QK!b($9Q` zAoMvQn%5|x@|7=s317Y8tGMG9nOI3+S-MUcZd_HbMQy7M&DsFU8?8tyY{yph2zDFJ z;!t}p*5_HUrPzsF?I?;3gJ|LXyXX@&wH4SvLa^YSSFvRIVl4dNT`Ye0bsXHi3GEGf z1YIMH0aGx$$6)e|!5zJ*^jUSPEI57a6xJ+Vg~f}O@IF>z$&%&Rv-<#JVhj8pFYBDN z984-|#Yd2l_3q^}!20)*cHTQfLp%=X?vsZZAiL>8SF{T~(EuifdJqq|(arDO@osb_ z8L%jWZDb&J0#U5@A{p!i9e$V=LNF3TC>UiRal*!c;dA-m^Vr~WTVbQ~7#Sowblqq- z_E6?_E6qp(DvM9mpt3WJ23Drr)+F|mtt~oGiS+g^)TnJxwHUGB)%WnoeUB4F9>sOn zPbZobhmn34Wk~U?=`6=GtoUkEn51r*GiRG0Ax&w0`{uW;SU=vdE$_?}=N!DSG>u=J%2 z^KXJZP0H6#fblbkd-)#SbRq#37uATD4A|XEfS>}2^RtWcS28DbQHe-$(ZK%!U=h38 zai1Kxtk~5Kd}aUN0Tz?RsQ|9oGOa!&DW?Q@mm@&cJ3-(Kli``sq;DnLwL)vv!eTMN zqH`b_9w7LPqq)-xO(=jyn}vR&CNc5A-0nfh-mMTFlQD!EM>Sdk%}{&W&~9mm!6Yd& z=#xYJFcQ?-4f1{*(5g((wi;m~kX7qj2++NVj!#j!=%F%MSzq+9T3j$`%K zJ3IxK+0FBGa8Zp~v}USw2W(~wY$_*)sSJWti4C24n5+(X9WF%q8(xh`N#o&&hT-gy zq2I#@^-UlmYuylB1X#w0$^63+sD`1eL|N&dP)1?N+WmTB#%aE@KOSpBHDyAgA81TV z$KDSXqm9>|P-^@|T$~(&UE8E|z_-;_5oGwT`JSV(3y3F44&uW&xMvgAE}h5Y8i4bZ zLINtZp`Z~5*1w0{8_c;F2Rh9T1z0px^EsY#n4ePr7hq{N51`F@5eGGw@oyg%;`xnPnECbp#LVj-#jT&e zOBoURKMymOp~nIqGV)6ZrNjvV6=@cej(Z`P*I##|GNM!l^nB$jk|lZCriU8egxh)E z-FHYr%X_i>!}ZYW-AW(J)#1jc@*1&rH-YY86JAc!;SH*+7q%2)^%*^i&F4_Xf-{9D z>6=z~Ja%~9W;pG7Xp9=gta=rE4jsa-B%)rDdB+Gz6@4On0Y(zhFnuZ(=tFO$3qC7- zi2meu`4OhfjYg8_>+V56eM(l33{a_rNjPOxn47B6Crx7AqFnwFU=ar)xX8chWiJI* zF5x_FWRmjve+4WIMm|}Cg(j(5tkJVb(1~pP^dv9BFGD0Ftk{x*A~FbTh(SPxzII)N zEp`@mPXcB~7`8+&tq)E z>_;ENjJXd|jm*B1o`v5D7&50tX5Y$oWkMuP5>g82$i%2=0GgvTk;!C9>EOSQAT)R8 zU3mDu8JIi!Ufj#;{Nc5C@aFn`cxmkc6zD@JQae!1VArB2(CKVY8_BXPR4Zi89Y)G{ zGu4YNfKF!^8fOezf~KBeB4%(hxDjZ~-WV*tIIJ>X#YY9>8zLZ!+8d%%5lq4(@J7g# zWf_7P8OIg7+P4vi%cwE2>87!(c2!A)rCCf-692#8@V~MI!9XzvqG=;|bP+`8kYWj% z3@45$&1q0fNtNHn>xz+FgnKT~rl72|O@IkVGhGiIymtf^o{&!EVDB0M<07;K(4tn0 z(saNgP$u6Mb_7tWjVSY4d}Cl)2b7_{G91}60+h4-)9Z|IkwKG)qt(}sQ#D#>SvFp7 z^YfVf+4azdSiyLXOh!zv)}w~+h9Xhb$LD0RG{9MupmrVsD!@>t7 zCf(%b)j^LLDTDOPqtjZpERL<5;qG74j-d5jB*dI(-XL_N_%tSsr}B0J;WbIP+O_ z51z;P*aZZfZsZ(4iZyS)f;}I;19ibkggYwXuFJvcmGf|7>FYRoY$t=bODX>kjv28u zJBCVL|4;;Yxk!h%PPSrKv4bFR9`@h`c!s)ROnOK_2uK8>q0V$*xOks*zV#OrJ}_PUV`JlZj=km!Y<)7CN&L22F_IGmIKC_T|T@YzWvI zdk@rx1l0NjQnd*@w>1Nc50_%@_n*eyw>^kEZ=I>kMN=k7v%X8~gqVDnZL&{E^K$1s z(?pc25YmkFH4~6w29CB3U`vS=74C7=c?QwwOrXOp+1vdvIr-d- zjh*@kj8-9%XBj_-82rbecgJBTp)}I3%>)!#d&v}}Z?kSh=)YmAP9I~1myR4HSh@X^ zj3ZR-^bMtdg$^mJe@01G1X!dVCWkM7w7}xyol8fri-6(ny$r2qfDDW1#{du_WAq1l z6>yQ22%~ zq1kx!JKx3JuYW^PC69mYn@XZdC0CfF(4X_5k{e9+$&h0um)IkZE1mh0=0*Bm1W+EA zG%k_`=D|nt_}tle?EYC-fMquR`1%68z3~9v*nEtNC5{pTT(#DLMl#t(wFxa6ivlp6 zrWiqn;9~I;Sc1yrI{_9+SEH6S8U8;GEM}h2Wc9((O?52EPI*j+ryB+;Wl7y4`NZmN zeQ5EJghZ!c=JlK1gDmfmvQNOI)|x;C!COo9X5=#(ljl&X^Fzlnu~U5spfuXLpeL$W z>F4rytCPR!>{a#$8Kk9etTQkI6G@RVItc@<+7MBEUVy~Pzne^P0^uagBvEu_sQK=U zfeEnA!x-d#V;6K@$*;%zj!Rt`M~#_EQ^0JJ*KiG>h5#jVj*l*nzS`8_|)r2b~%Fq3^7Nzn{vB&#~l$87uO;QNrh*SLMNKT^FiY|E;_q zSz5!)hjsMF;T=h!KN&{G$-`Ls{sL50mMViSf{`%mx*aJQ8Cbe{4a(~3a5^^^Yq#=V zTbiiSy$YZ#U$Y!_&Gj(ZtT1ZBFlqZx%2=`FPzefK?W{jt==`67<&Xf&pD^Q&hj91p zv;LAU|0;-xDHES1XBhWgO`9*x-vTICO@Kz(b{9eCo|(9vMDxyB4-ixyRP4SP_hZ(K zIk=Vk7JaxJttu_mHi>1s7xkJLwpFO{-sxt%vR8vesZK09X~Nr7FDo)S&=kFlme4qg zI-KZmG1l2)3b2?RNyfn>9Q1Vo2czT?V>~o^lW<0dN#1GF0+gg`@sGja8&#$xxaqet z@-CU2q5_@H^A})U_489^-OHe!Nbfm<(A4y@#H`OTS^f1N>SOu83oKWf!Xm85l9Jm; z_T-Mpkk@Wy%zZo&Ah1w^IgJc7AqEyo`Dib^u`y-hlf^Yi2N@?Y$xPdRvXBJ)Q95yV zKf|9!n=!78UTG(=bXbGXI-}4NIJE>5HJOP5EG_|-IGu=ri@+i) zKu!Y-+3rUSEdGJBipeU9LLOx4;!v+-yCoB%g&AxV69AFzS1i~+p;)MoKGjQ5=_RQ2 zj?<(cVVKshSc8`G-|1qRklCu*p|-oxpfRDgL(g*vJZ?X#np9}f8c*Bh&1l!yP+i{vmD&O|m8IEE zLQ>a`aC{KnAcJH@6PnwMD6eiseY2Lq%&&|#)H&>Ac_agN8=5p41~aN;m5T4xh`Npr zzC$Ykvya=_QB+gUZJj8nszq5tGb)-|QPa{%|BsPW1yQ9^qd~2u@9NOnqJdT;O>1Vj zSZ`c?1XdC>zGnCcDB<8a^!EZOZ4qqMbt8-Qc%^j!$6KOEQzwxl8L7D~hXD1v!}Tbm za&TN=P$!5v855+b%rXUK839QaX(k|8xnIv%(Ls=sRXQC!UnXA4y8W`Wvw`ndmKKn6 zBt?y#=NknmxKFZ7%gXAK_T~9B12&b@uM^YijxiEm9xKZQbVPwF0|_VndoVGK{urOT zC#2nb&TS}6E!I9@F`1Cw3(AoF=W>~I)~+NLFQ@`+3mOAj@#~}g1Kh~?&9(H&v*b2%$$n{?qv*N9Juqo zIRwXb^eG#3h5(wWu8W#{SbU%m-&u7OGf%eQtNSW&&xUOLa(^XO7h6zm8BwwYNM;hf z$_1}AhLEQV9#fkKB|sTf)+zG z!WbKjArkK)8I&vramIpi#tkZ;E6rh7Q@Y5S_a7;+_##vAgeH~QvVI1wSRVsQJPD&o zjkfj%Xml#HtDDf&riR561<4mHJSDlcmxV#uMz0I;_dKCqXw8D?T2}A|lvh@wy0!)t z)m7-!X$dTpg9H{Co8DoFE5Oo5XX(^27<1ds)JB{rG@x3OM4P2o0haPQ6YASsD6Q4w z&riRC*>}yt5vaRil^TC5DPY*#9QmrP{~?Zr{O*85@c2p=-UHy z7_lH!h8Q|z#Y=)phc%!8i^)%QMn};TeE+`=EJgK=ERUel(ad;11x&oG8}2BH6YsUnXu*+FXL!GH1z3(} z<)OYqL$cP7p@9hu4oo7ixSHzK4+mA8n{_TQcu4`4NO($FJ+st3i4SYt3aG5M52K!e zJKr{{tgGL|_mRgq{PSI<*jVP{_6g*fqsU^N$)ZX=tznQO1J0ulX6TYQ&B&i_8bbzA zCQUbn6YT@Y)G(l^5;)x)Mpj201w@wuQ$Mowy~xmXA-g@I*l|-gHh07@ugHsE?5xJN z>TVF@P^BkG_@Qth{@pr1ifyknp;po;1`qJ zR5B{iWYQxZ4dB9Al2?lswdHv@acCz>8fvKMBQRM6SjJK29K-UHbtogSw3@r1G9}S^ z1z7$pz;cv|<;Q=*-3qYGR=`48=!@VXfbmx#nN}-z-Fc7FG=9~tDj88MqFf}a@m(`` z%)PTPgRx`oy$|A{`yR$avuSfkOy@p?L<+s6r%_KI_YLUrhimZ-`_)ifE!2kwgz-tb2-T5v9^4^H>B> z7&nxWVFETE5wIjEccmS#f9O1Vy8EE-Xh90)^4@LBapK@c>#?hl|aXfVs8A~<{COf>o zv#>aZ(P^Y|5%ppw+qWgLF|`RNDxIjc4x`T4LslC`V`oswyHnNd#7ob=gNN>Y7~h`# z5WYqG&ewiKsGpL1XiPDgKcl3Amm$!-bZ&x5u$KX*w~tPp#NkuN zkdkqda^6i<>%htMG%Q)M3>mq(=pGzIr=|tR=`%uP0zoJ24l0+@9IRcpj0~|&QO+AT zt%8;W=j^#*xZGx>oj!`U=f8rz`?g`Ak05jGFixF3j;=&h`P*(a;my}y!KMvs8N3Pl zZ7o=};zJm8ofsYNhtK0g#_3edd+T*Yk@xk-aq!SCtlO|08f`1WQ4dsY^+-8+2q#V+ z#K2$@bq(dn%g>++ws+%1< z_oBX410R7UG;p3w@;qedcUSB(l2Mj<7f?}e#Tk_cmG&NG?G<1sTGN`)60;9f~>#w#g} zc=1>@UO&}{SJRq#ZWEs5{wK5a_{|wJeww1jPq&uiKlj(;sS|B@@?<-Ho2tU^c+4To z02--KPL{UdR7D$(wcC-;pp`!ctWY_St_#6Rf+6d)*J#~nu|?5ji6E<1%X3ty==4Ar z97c(XO3*~6Z}gE&SgAHGC@7~gZBU`SrV(WZJ34q=t91g6#tG!w$Fb-{J&M}B)1$(u zSY%MoQDYKM?>d7eN6V;Kp2F=j?juNC0SkhM0EPlGH2E&uWS^wTmw`H0*J+ssqQBbg zSz`AvZrrDk%7^cL0FTUi5RWj%JaqrVxOL_%EMBz^P3tnR{9Amo-@)1CpV0<5^{iC_U{y|`INPBYZJo*Nw&_TAfbMtz<|ISOu%RGpPSBsH8 zA0JXffH{IC3+G|&+6`!I(ZfaO*E#yhPzVw#Blhpxj8)4QA}8|%Ts9pmjt>Jp5wtXC zW7D>USjK$?Mdg%&V=!3yd0#184_7I`Qfcf*VY4)wc+fy#scYx=COckw zVFBjOd zcS_fo%pSXi%H?*9<+0zq_96cC;R^if{WVxu6T;RSKMuFVQAkoLF}0(@+KX!1_Co0n zqvdV$q|t1XL3|%t?P2H~?IfDS|L2KiErE9VnlIH%m^Mor)@)plcc;CN!#TMaIB^0x zeFIjn`5YysxzHP$(9l$gt=rdO&b;Yxxy=YiJfpei{2IV9t!3 zz~0?E*yuh(kN}^Eh2gYY)Mjf-Km9}zO;bayB9Y4S5_nv8MKl}MtycTySZ#WA@Ozhh zIuBFcdkeXFht+kIlpe)4UdP`3+tA&UKv8iv)~@>kRnd$??{}1lkHvx(2MzAHLX|`v7mr%>K%y$Ful)l;=pvCMjjoQAnoaLJG!G zzE{jw$$osa3pmK%$>Qhph!UH4e5TM5F5 zSF~bDjRAA&?Rf2Q1rAdX2KgC=EDQn0vP^gFl5LAmp~cq)2V={|dv(*%T1Y$8~G{|xcx$YDAXm#oO#a~Gn%*+Q2gEAAsCmNcf5tbaCl8-D#|E~b_FaM(M7 zGXF_b@LID98_}p~qbsJ6Ig4LdM~&*&pDeDSt=Cu9bB9U5u9# zB$pFs*RjZYwqx)mNlsq}v7FnQ*q!VnSoEvLv3t`BOnmN-SUml0Bs>;igi&?2gw0J@ zH0>=s_xP`|dGkgFONu3pm@AB2D$*%${SF^aejJVEnK&a^@J=vFM^59^Z~!~De}XsP zcoxf+enD&OLTekXbyJ;gGD&e&g{3OdqXJTZ*+F{ zpt)Ix(vosS!ZD1Dj5avQDOOO?NR=6f(;r4vEnU^IW9aGWQRVdM(>RoM6dI~>SjlIdeAUsycKdWsDq-Zg?Qf^@uR1VLXrB5IoT5YplZh~6%ekR>z%8(of*&P|;LQ=BWa*#yPLlWtTpF$^J(<#6oJqJw3Y#+PyKJ0CaVMlEeIp)#q z=I@eNj?~&wNyk#s7D1^gj%}tCURrwu^R^V>-k&~+tFB^Ozw}bo)+JN%IUJB8f6Fm> z?;qWXh)!w$GBfPlIagnP0j|F60$h3d#klf{%hZyC@x+pwh%=JX<;okzW7?cWjFmQ& zQs9WRcJFLTm)_1Ow$gD=e(JYaJLf$Wd$NtRkGN{%>$=6WG2w}yBI!nTK{_^0U9dymy{Nt=6Hs!lD#>o@l=sUy<2i|Mdlu|3zZ)qzGhGnI4Z5pVC#l z`qy7#=c-R|TGFTvFq)(YxeTSTW5pu;@fQzc#*FD`pz4sMhe9lSHm$)c&pn2@)1QUU z(!ldsc_(@CQclN^lf4d;-gyZ#XUsz0(N@?TJuo>ubR;^e{s?l7QM|vk1na6i$h34J zLl;F6k7d-^akSZo0<9OXPnnH7?s^C}Uv~qpyyP-man;SZ3VK{_-AoI?l?}Y!E|k<%VqazkD(NDc+S*`rI!VrEs=gu;w380c zN75*T-4{eds{!?`RDyvB>(Z~tCE3%C4LdfYwz(cvO|=C2Vt!u7&)Jb%l1~*EAW@mI zY1dZx;z9ME)$4#e?Bj3b!fJ7=lqcC)1^nBk{+3-(jYb>V^k&rYH`1w2IP7kiO|sB4 z42Q!7pU;PQJdX1ERuW4BM!N@xGqcsY6`f9}*6YZ9w^q?aq^R<}Bp8`?n(9A;G?iut-|MFGPZ8943Mfk9h!bDftb!y4n`C3)s}M_wKpl!o zI)A=TVo1f#AWAYyM~HwnI`c#cXT!|w_4J6y!45;~Pl6=BraJ3(9`Fp;dhAc4Z?jjS9j1r8tx&$*{eG(tN^aKS=DV*Lg0u(tF6gyL2eHL&3?dQ-J z>?Drz;qx=c2Uz+1oYkns2QU2=uRs1MW4NC2*P)2T%{Us(6LwmyV{wMN{_hiukcuLg zv;Rg;3#E)Mkn9;e@lS~*)O{Ro{;1Pw!)J4+;e|i^467GT$8b74N+`pOFhwjWY+5=8 z&;0q9m^Et#GAIeFG>m$C@$QJmsxply)_X9 z1#K|fx~SsJXeDq|)3Ia`lt0O8!GtwAn6fSh(>JoL+>4J^?7^yoK}fal%kYfRyr2~kfRqGQ-nYwdt67MwMNk@*<1ttY6ZTPB;sPrHjzlB7(8?|rjR0( z|1(lKMp-i+ z&$@8K;Ffw}-C6u891TnoK3|(7L z%>oL9df^XsBN*=CYbT7B0PiOPCk2AV9#k`VT(W&^cz}W_29wo;Hj@(un}-h84GY_d zInoUuU5O+CHS@dNtnkFZX~<*;S*IiW<#*6!1j4ja&CT5?AVFsF_dh8yVb$(Jtld|Fj4CrqZAom^CGhH+Of216iu>;U zqso+V$@hNvRXUe%d_&r?wCR6LLV2;;Z$-#O2t}=BA<2lql=tME?|t*%@LiVkzQxz` zzJ*JOA@beV^D{S$yAflqzY*`voC~edLm^{FX=4bLwjs>T)M84u1%KV=#_zY8F(D_2 zxA*F?tk|W-#)?_LU#{7K7ytemKAiLpoI0(-#bG)XoMdHV2xfgfX20m}Y{P_C{u6Jrl;!TG+o3!<#VZ&b!l_|D)~%U| zr=I*R7A;(i`g$*nl30$!(qeU>IoOHn-~jfuwPSsa54$vBl|}dv)zINu8+I`GGHF3y zo%FHl3L8gaxt!$iql?Dk-~Ro7CZ7{xkwB4D4YJBs#$05km;{sbw@Ux2q;Qac5(4^n zl`i`{l_N;fWnX&!cQKa4GVYqIaQ#iU9Il<{rtb|#~$?({+5K0=ZgJtm~xMEY4TLb~#Qen(8ezZXH)TPWJaYdOPf8iAkBDH!SDcl4rN zEl}jMBuEIcL zpBHJdrrw6dC9T*^z$QP#O+j(kl){{SmDon-K@Nw`Gl&)23GB8swrhh}mt%&BE+^&z zL~}~rZ!B!U^lTkIt@7iG`UuJyBS$F6U*B4er9Ad&sf%QA6o>5nsAK(pa;Of4yy2$U zNtD^!F>~D^Jhx^)rtQ~Xt&v2yO)tcfh0nK@V4@Il(%n|p(~-RXEMENW11R17IU9_NpW#E4Ox7d)D9+EITX`67KJge1W>=~K zd?6NhgpP%;PKqG4rtH7EHSzx)VmUW>?@OMh(i~BIa;CmQz@dX%r-3@r+wJCUGF0Xyg24uFx zkgExxv?YX^WGY$x!gIti3it2ARM^q;^{-$@*@^`Y8-QgwmI zS_Ug)yqPMuFmjU0^)v~DE{DJop|iH|waPJo7ApB53C2h95>59Zmh2`Fx2tLCvJsJV z<9PX9p+q~v$qsb%4I@e7Nl7lQe%UI!4Z7BlM?1<<^NLT?=Zh7L~xfZ(IM8aq@;!q*bGzqvB1!TS7s_f>L}7@IU|*F3m1G${N*GxGjdWUG z;>1?{AfB%a;5WH?%p`C&@Hx_8Lqn@0`}gmsGyJ61suoOIh!+kzFJ3mvf>Es1x8qB? z`PX+;VnLY)pV!Cm*3Me2)TZ&?J}v(8$pP%-&DJt5KFw~!K05x4)&wd&LnyFxVXw0b zRlLS!r3B@j_1JIjL0Nbh8l4}_Z2{EL)z<}juw9?T>m-)d+pF;7ho8WWW3Iv2i!c9* zSVUO)4>6f)QTA4s@HC@V%qo|^Db|j)aw*nu| zcpHEE{R5aW`5D;jbAfKMbCRw)a~r0SP@eqx&+zG-MQCbvLT&s<6=x(ytp4IlJpcHw z@zLAQp|v85LY)CXVzJtrF>}@wJn_5xFzfvnh(Ug}gXFo5zN9Nm+Ls728NC16h()Fv zi{eVL0VU#T)Rq^KT;9jjiO*y1j0sq=bSD3P4$uAVH~8?~i6|~Ag~!hdU{G3o1BzI@ zjtFY23$b$fB789AP0XJ?4WBQWhuI&!hj*tug(>epgB`mz5OnQ|Seh9mdP@>bZDG{5 z_)%vFqr}{YB4dx56;|9FMRC0gMKyLl99s5958irX8pdC9Gj6zur167`Fy^9b@xAX{ z^3^6k=TT|=fC}XNA6}ryMF!@COw=r}TklYTCH<;D{J{mPh+2_kmEZZ+w{hY3zlWEMXAOj z!*p46AS4PQlvw)ASLG{mq1qQ>@e!!x*gw7}MgESkT?ny+6GAeQ=j=GYk3`Z=A|p{a z80#%2H!2%+$SNpDgU-ZfZ$OQFaA`PMh+SXd;p@p*K5^hu zMJ!{lycT0`z6H}}FJNq%P}{_I-V();ngHJ2SA{R@qNvfFLP=FWOl0V+ayPbR)v~<@ z&|o#8p{*VTMF;WmN3Y_wXMTbCQ=Z4hh3{eWg7>hPm^$H)Kf$t(K15}{U}`5Zpc`Ha z&LADDrnVmImd?jZfB6s0p7IhluUm%QJJ({`^a=Ru-+qmcNh%cuJ4OfY>F8zG*&v04 zI29Rdk(Kvft78czXw#z%K0ZuI%MnQQ&{0@$H2(+=9NdYF%zentIf&fCV(6?s#JYqX zPpSnyUOE<6Kvv>+5)?a07A|BSEyT{f`>=D*Zmip|9@}>8P>Uo@HnO-kq0+oGGMHM- zl2fb~E&8BZd0%PlR;65*L`8ELb#w;xB%O)|C#o8qc<1eDYJud9m-3|!! z)eUMk*f~Wa!6S+0B#>g@d9c-o9IAuDHa7}%PL!B@s33XFD+pnBUI3M}@B$1b zQ$TIGD(hKVs6ZM?C`}$o>mpkPBw=&JVX?)~O!8@Q#=dr9NzhTG83*ZL7rIFkDS@Jf@g=HteM=e}WQ>VwcBgv~6ADdun*fPGcE6>-I*2&m*AQ^lln1c7B7hQt zimd8xS%aM7a@4aW7S!ofI*spd=+SN}DJMa*!$xzqNO~42B#?6@LPsLUq>C@fBFCbsk*|)W zI#2UEPVuvJLurx;8>Z~kDTzFjokM79HKDRz1B=UxHmgmgDk&&0!O`MEn4C6fnms5g z(xND{6h5m5A-4~9-fwnkDfX3AQf+tOaFY-9{?pL0P8%a6W`cS}Xc%j%O!(FQI!vUB zZ{@KZM+e?NQi@#OZ!7EBAooY$NJRVLmIbL408xT_kPaf`3L(gA(z#6}Xg&0f7G94I zcCQKEkduHDgeRGTG1d+<3DQFh*;;Esp1T8WbV^1(pJqBw8c8_)beVKaE1Ej6s>G?% z=yVB*d52-=b?wkZFzZMoibx{jrkt!FbEE?$S~HepYp|)#hgD^EWK&%2)pua>h9WG^ zGT_bSIash?ixT%~6xoj9qt*FXaZrncl|B?|lQ>-A!PM26Sg@-Svo@DwO|AuH_FmLF z+TqZ9;bIxo zEs(5hplfLfp`am%S=$RS>2M=nYi`H$H4)4)_Tl|p16G#Wp(jx`8{+U&RL0oWYxAnH zb@@ho_VHrOo3Rjc=PbczOV?uE`dw(K(<9(Z!Wrm>!JS5%hxZ<(J5KZxhwV6Y=n$4J zU5a`0=3xGUxtPCbAy%(ji`vEpI{5_Kx@@!24|_lc>WKj|?U?O2+U*Z;HyUox$3r28MjG6C{)&^*QN^Fi{d&-7yjk zfz$1W#m?aLxZ!lW;P!b{Vmyn(qgLKq3AD|I1ZqhhI$I~tr6SY?P+{moB}-9L1V!~e zR5!U*DWh7dXs~0_#Ob)_mb-ArHP>J~3E=jd@4+3nkM0mDu0&F~NSb^J9w8SY4p|T> zgZAQF&h@X#%rTiIcITb?n$C^C3ZsCS{%L^8BR{wcAv2K%5755OSZVb(YtF1kHB8FP?sh05>iCYD&d z7byl{nrf+wAeN+R4^Z7U@Yyb;(kvq2NUD!7>%#b~!i~M|Va%Y~e0F~=-Ys`vRjyeL zR&J|J;KS{;SYG1B0dqg9qXbf3&x$=qsN4)VcIqU$dVA{v^wZGq#H}RwdhX#bTQ&& zf-;jyb#uvHG~#GRorxR^M8xfkzAvN`<2B0uG2!?SKiAJfxy+A`Ml&md>yldcGR0EwFpcRJ{?zS(o0PVOR(RJyfc-+o&U6N&?hi;DG zSKuG!_nlNlH$*|gb2iijk?T5%4D$dAT&K{)_^6^Y+EvbW?K}=c46sm*G_uVcZi!)k zQy6<{qbPHpKn>keVQThCvEy;$ zxSKHMx*PD(+y#nQYU(VgY4W4i)QNS)27Hun#0$Lcu}co&@x6_BYkwo=XJ}AEa@0_a z+K6io-bcXTh2KCtY_Y=3qHDFnVD!L4q3!d;A=?p~oJkl-Dh9@r!P~*M&KQiO)ULbwc|2BS~&K^ds&aE~sGLw`VbRGhAhsthTtdFCJZl%1%jS`Iw z#acTG8_jra(p21e&)vA^&YM(r<2xRF7`H$0pqlX|Q;KELqY#Ubh0FvKLJ`Lz1Ndq+ zK8w633#BB@zT^uNLb~Dh2XW2#yVZD%tj@jmhMQ@B@5Y~A`v9-bUWb?GY({o#5(OIR z1`DD|>xH(_4Sln0u^hqd!YF3ug;C);0j;EPAo(~5CM}YX(vxJ6C8728oOLWI_*uzP zEa5KJ^U&8$EP-CS)_wwZdmrMm2MNi}NidOq|CyOq%q6FZGVs36!ZDv#i^>LiZPt;{WUVt%d`+Rl@hwD>cu*|`agnsPKWmEmaKA+^fg z5hO5nrPan*AI_hH^}Dt~=di#|XOme}jO80PGgb-i={|%~1bm7h$>bVHkN_xv{< zYLMhLfR!^ZkF5m2R2kfVfcA=?ndl$v(DoaX~gJKO~MPm44tP7FXpfRODG zdgCedr_!jm>99Tf05%=igFP7sv47X+*t%f>)~{cy%Jz+`ad7K8l=o~)`NOhMu?6jVxVI&xKQOzVq+T}%eH*1 zr(?PAu_tiF_1EIs@#j*ujIOjl*K09KBBKi-&$Vm81SK$~2jeWs2#0&|152)RMv`V;b{a$MM+uA}pd> z*xZ`Nnmhxv&OR8OooKa&&}^a8b%&tygrH}!`_pg{Yy++?#Daq)k|13Qi#JS6Xon@* z4I_!d7^H)d9E^0l9%4m%CrN{t9AiwlDONp+(|iu%R%BOMVz#`pZHQx$v@Wtx^6MF6 zIZG^(*;vTM!Us;lrm`2ispKSWet@bvA~zH7SHvRo;EllnIN~SO233;XSm%qV49Ctm z?YpEkF@@=1(o{{IFwqJc%&Z(%wA0&1R!+0BgS71tw7C*!CIA;!v?AkZ4GvT~QJ_m8 zpH8Mw>r=#1)M!No2}siBzdT_w?z-<@Jo?bxc<{bEaPMP3!EN_Hh{qoLsaioVq#`8p z-~$ii{`((N`M~bI_W?yBLMTE$Dwh}uNU|aS^d~=8@89$2f8x%E{sWInGRub_!)o_c2%K3s7Cugu+|h^0^yLJe)OrrC$)CJ*#20hp*t{u!|}vL1|V*!BR`CS8lo zks!d@aImlz`)HBBZesCuNygnlMJhrrZc#uK7?lLSnOQa*4gs_C1DL&AhXxsV9)=ot zHZi_d)%PJULcpS{nVs*&I^6)QJiey210No!LIuUfXS?CUj!7E*Dr%W4e}YP{vIN{vRJILlN5>`5M9AGw4sYD`F{a zsl)mMJCI*ni9}Zi`n#O)I%?r|J7F}n!J=zI#A(7n*n_0Qh`PLN>{z)DiBJb3kwN%k zr$EktL3WEJo;3T31^kV8M*tmtaRSc>$>)q(tm&gevULvA<&fYgBqX7whD1S)2xt7X z>Z)V*|H9~9h(8Z*&$q-k>vTko3+x`={`lcIj^If;A zi8&$=rRPFznLz>(A`xLJ>0G3}t2FxKZ^4Z`F6T)8K>5GCKbE92mgF;*pC3mek(Bv& z+e|yk`#Hn~yjk`!Nw8O>wv^#0!6v#1StYne|P`r=3dbx!u~M2J5H;GR(9E+B1{|1&pAjsI@)rBw;O(* z6X*F-oK7#A8O1K%q@MOhM_1C+Y#~#}(M+Y*=%wN{uuyM2SZ>GO>{Q()^^mf)L5dZvBps2>A+D#82cOC zn6~yXHXW|S!;k(JkB~U-y7F4(LKIQ(|MGgBIF_?rUuqncu4Fuko}`Xr#c@wM1bzr(kFe(y5U!Nd7LDLoKScyF4&Rc6d4t2c4qH z6@|g=C7zOOQX~+Pi_t@I;qGIspP?Y@MmUt9v+id5>_<3G$0*~N-c!U0);H@|Ie8gx zA-Txly)3v5QCRuuBxQkQva=5d4juX57D!5(iU0F||7BtkRVN9{?7jiCQ!%B}R47`y zgxmt`+`1D-vyNi_?)}Kks)k16N0c{8aSJ=a$I4<3^s03WQ4&yylMjip?3IL>S%MTtV8%DFNG=FEZAc_fg_e-?5vMs*2a7kwgl0{fNIpc zk(FJnh^4W%8E?Jz4(_<+9z`to-2NcR;ive?BfnJSaNk|`Q(fGx2t)`)h((Cw9=a7d zCg%vD+i>^E_?SB9#}EG)KY8ePc=&-|;l7_ehI@bZC~ke|A>4S+!+7@1g^E~S zn!X+xwL#>oElGW-)q0?#qB_(NMTxZ^^?djZjufvsjwVAuH6}f6ys6C(zlTnc>P*K# zvocVuBp0>1IWmkojSDip_3I`UF9AINo>a zWQdJybc`jv}t8i&>G zgHzuMkFgD{^(`=(gNj&a>`=$oX0~Nn5E-NzO%YssNi5`9HQwMDI0aMp5L)?nhy*J| z_NTEBY!baxuMRH`XCB4EFBapFZ1v6WPQ(UbYSE!dGA~!uVd1isc>ek4@x&khj1OL& zfU4{Q#$Xyzx;WXrvbd!M)w&wEA`Y0{Mzq=5=oF74w_1ZzqYb4dt0ERX2`JW)rW81V zR=*zGa(AM#t%i=0Bt=)2?l=x7W7r%T_@~5Tqrenmak2i}g5A*Z95V^Lp4VO#=%%n` z9opllGbd3*e9_V_3$c{91)!l=D=-96O_7kt_ouGhkBx`Q@xX(>#GO}Mql!2XaUY|3 z!EPHRm$O}C((NtF4&oqYh`h$`dBUax+Oq$Ynf_OG=mPuDuB} zKU#pAx;9kTn^9h8QG42#NLG+4)|uxtGIU)ys7>NPQwSwGIu8m-J>87i5QD>#fYTmA zMMW8MbF*>e$Pw(?yC2!bZK&5pRNHrlJK>5ZUgkp4sJ^cSERgAVy)Hk|_t@S7` zt3gR|4N5Cp6sZgmy*_u^Q@tw@nE7Rhe>wGm5{;1UYcLWS6fsRr}158%XI6Og=(*{o4Z^j1g5HftgX8jPhvdqi0 zU~#qus|)SOGj=lA6R2tn(Y;vk`h;nC@PVI@O#VaJ)cfvy01w~y2p)UrF_O)LiZFys z%9--={M)&?Ri`A_n8}Uus(z;T>uTbFlsd<7dC*;_iM1TCC%#}!IBauX6`P>%3KX9 z?I~0n0|cCiO5l=#o0)?^jZd zHt<|C>sV$7byJP{^#NpW&%umE3$Z^Z8y05@AwOLgiATsKpP(~u@#pyCpMH;DJn|^s zed$$bODYkdONg`nLR~{BYG^`beJOf+Q+x(q`EL{Y|6IUwm=^= zbguf)Ff@_l*ivD|g2S~~QqYEFl`d?zc41{x5JzGJXWsMD`Y_h8P0h$`#ao+lF>z}? z<`uN!fVUs}C_?_e;t)R1s>7ZC@fVCAcN6ZWSd?zBb6s9Cjw&uh2t$sm@fDKDx$#vw zPrAmX+gu1nUKIh6ScFt03GHn+kCt2bzBrbfZoD0HXD>lrqY0IDCKOj2DIgggVmm(fC|ECaKTzvi=qP?v3kkd*tLEpit{(1FmE#s>|TMT zpUgx~#zE+t4UDl~3Mq;c=~iTXw&-=p&C9^tnG^BlvRT-=aT#`QTY)dXoQwH<9_u%K zLKjt_rY1+&PCOJ(k}FK68_R-XSzIi+!oD_Q@vu>*X=&3`XJw^Tm^x(wp8eZ@;>i9_ zkqp-ZC%x!QXi=QE2d}*N3?{wvE{^8akX#5bR2sGq#0S$qzzcu-HMXvpjkv1` zCx_xJ2^8noGnMq7P5gNdZ|#H+LM%17() z%m=HnyV8SdJp+lhwodCuO`{L`zjfDjszUEr;Q{S zE0vqp5~joJg~{6iog)e-6^hMIOH4%mS0EN@19-!y6tVOr`q2~ZfrezUm(L)pq6ztR zI_xenpvKvSPk^rSqYuq1$%M?*7ylE{!!7;ijs<2V`q~%rUy? zRytv4BQ`k$d`@crYH3q$yrDtEXWxQKO&eOAL6y;0 zA3Om=cm!n)I+RtFp`suQ_2v0!YHUV}n*c<|bl4on9*U8Dbzan2WF`J6@fv$hV;AGT zp7l;46(7Da0h!x&lYBZE2XuCHLwPlI$jChaug``iZ7pWcnSr@; z7NWGG27RYbqx1N2)N8cr8F`&nbf&}jWaWIkH1T<4l^ns~>0y#J6}USJkJMAw$Uh|( z4{^spQrTH%!k4*PY_4--O|1u?GEP1`(ugOP?ZqZjI}SyF53}1aEu#f*Z7st*p1ZWn zjEOsou%f|>ErukXUw!~fkJR9v|NI+nz411R%lnj5QCpMWd5x{D`Bg7$#BIW-= zDndFkdsO}}gd=1lXm^bHBXqs(&_Er>C z(z$58D6My(w8@WESr)9wG}EahP}$poHiBvcOQV;%X(FKkW!m1%5sf&-x2wfY7ysyD_5L+uu2Cd&)#X>?$}41E`!zgvF+X!D?e91S=e>C1 z^;vjf##%f(YZDtkNktcBT@om0cdPmT>08RMuC)gXs#BPhVZ{O0DXb{6U}aW=>KZc= z)XeTA4E6|QJ7$+`J?ig(GulfqmkoW|N7et=Oe~@J8OT7TLRwJjV0(**U(Bw-Zr^$>g3af1g_aXP_VQA`#(NtT6jG_V*=`1K=``V`spjewk zVN)D6Cc0D-c}e>jtS9LIcvCSxGRe3lP*CBOG^nR`=~b zN}?}@-seP5pc4a(rMM@6rn-7$9xcL#t-G*x)e7v}vIQj>nK0F9=sctwZ~zI~p&Hgh zO=SuCy3*+HY)5T*B|iJ&bL5nk!WowoO(B$3*Q2Gm4Fg@YOvIHoJ4tTS8eUr|x(0?2 zjdjCMLFrD7!04y@3)3Nn_>5TmLB?#LpQJJXdtea8;4v6tXVAoWnX|VR>lkUbfTg;h=m14%*xcN zuEZ*X9W@3A8ciOG6%TR>YB6W>>-g;BH&L3k4yOk_j3_n|mQ#boi25Qdn>hii7rcj> zs#bW3sWQH(ZE<1gybmZ29!G7?2C6+5F_lCxLR3F?4BFZnV(H)T_VYi-(NYaDf;cW+ zVrRR-WZ!$q8TR#bg`FjqSfn4_eBWtt;-hyb<2OIOAB(2HjniF0;5en|3AO?um(#u2 zymATt`upEt*7T3b$U(Jm%R^PReA(wDmWMEV;!EiA7)FWZ)UmUL7I^I{{D#Cb;n^qA zSWyiR8=KBEj9pbRtgMOQjUCOHmgB{&(llP!X27zR5zH@3;rTD}@nxO~2deFOYx-i` zb?>8UL8CnU>#iP4Qn?hDFo1+a#D$0}8FT5CJU#~F85H;5{Q!?srQC9-A|E;T@{6xf zWOR`P}yi;m^li3{+`+|77>$zB}RrBF|DYiy08 zrXhfe8XsnCtHk260G``ikLiU09QK~U{6me{MrGDYwzUy&?$D4t zZ2XOVSh8##4rLahprj5t`IRWGY(#N+J(hgF8YPwWShapDW>C==Q=RYHe+VnqZXn_4 zux;NVEZwjT+HgDaoe|8>D#s_eRj3!0&$d_5(2PCXcOvZ%FqTKqnQBK>Lko5lR>MKC zw$KUXx7x9B_YPFo@;*=XVz@8)6|oe0+L39Z5@j9nF~iN~WFrx;q~d*MR}TJ0mHt+3 z2w}c2<1NH$m|0by)%Y>1pi#No6hT7Q;zn+EC7j6!x+&UDcb>$__G9Rb#1ZDT`KS)O z!8qcP5C+=Y(HRKA-D-s2(*b|D7qO0E7@dB&>=caBE(tCpL&s5GRY?b=MXk|DSKdal zH6j>@;aJ}gP7WPI&#^v~)mNgvMT=;<0}&ESMBy~sYgf*$Z;^Fuvc^TS zZwM*L=VhVfcfb2xeCIpg!4JRx1Ag}<7<<)NMJ(c2q${jRYejVfpC^f>wl$#0rOpt? zqCyisIz)$UbEDDjgT@hn*6K%{-hoZqGq8C2B&=NcE?TP(F#c&xNh)X5UaI{_`;1us z2?^x&CvafjQTQl4V+o47f;znS=5tsy?Iqai4ikT)IMdgQGeZoF(<6xby!d?1>v;E- z-(cr~Lb^qg2it}SFd-I4s9SY~$;$h$tt%`+V3M@yu}}=3FP@J-|N1AGHsNI)mnmQ; z`QuV(ktL1(lDQw^>A(H~i{>wa-4a*ZYI@CX>|DJDPyXyNyz%%S=vaywxI`n_vqCO{ z*Y?T$Pw~h9_$8)KoPwtE2AEqsXruaXw)G*`n8c!dBfhAOW3_Pvf8Aol+eZ_4VYdx0 zY}MhprCDlq?$7@A2FBfVC$1);Tyo(>B#_JT{cnE<|Nd{^z<0m(JzT&*xsZW%{`Y=F zXTrdsL%DVQZ7jE{aTVzTyX1mPaoI&wD12W&bKW=3!+GBx&4hZ@h2O(97kwW$UNr{y z+dk1X(Ari_kOnjBSFTQSKiP1g9)5C}+&oKCaP(nU4 zqSWFH+K?@lXk!3#4GT~*a%fAr_Hs;i+@t0O&)$X$L_fo;x3VH?D`**hWWEj}2RPVOw^YN_irgfphCyF#FR*nET0WWFOgw4Qs!|(|>;j z`|_($>ZAkFg;ctG@+<4H=7N zJo<*=CPoJMjD!5{K$xV$;$`f*NiL4y03G=NjGrT3m6#6)NA?xs)!FBTRAtN?I35=OVcQ&#h&Vu@w1RW{pW=N+BU}Hq!pT`OR4onRNd}du39yy7@lMIB@$I%~jV$NGnWAf9#X55s($KVK3 ztRF3EBxyW_g_B=^rJRIxk^wW!V3Tb~PSLsB99THz1$^|{U$A|D0m)-PC7~RhZakXO zMRJA70?Dt9Sds!r1j0C#&-RTZh(G=(p83On!l}`W?i_TMT#{ZZUVZj)JoWhRv1Q{H zgaf?@}il;YdusGj|xjReo&>#MetFFIQ1&DNo z39+2_jc+Pqk@Agy`{r4Kxe!-gb`{;r4a%)Z7uoGM->zKEMdx3v$`8LQ$>&BtCrRrh z&)5||{5Hm%e;%&A>=N8T0(~~;kT>_K#HRJXDPUI8MWc^A7AFu2}xX64O)sA+xli>E& zAm$vd!BJWYKiz(mz+<;Wuz2xee7WK?BvO6`cMu(w9wfd%q>H4V+l0YCLHhOmnm|g%{!~%PO{BK{Ui&c8AeSDD)I{Hmf5x?ZH?^v zLI>F2-la;w;YC+MCMYD}VZA&024L$ZNpzinqzLi)yO1Ok+Uewi9dsq_d@t5dVi|(R zGeBW<98Nlse?~0E=m^+sa6lW!!i*MdsE^~znz$mCg=JwZs!k%4_dc&IjbAOurCFpRRDpH1F&wrX$1|Vo$C5qOc;FY$;));9eOz)izWbf;tM>bkNhl@T zx#SQOCv$FAm`p#Gv`&(JLsr~No&(sg^^gwYRxKft`JMPHh@{>PE0t|sHSpPo6M*-*imn$)Aw~@TUHe|E}M%v zQ(ng5ZOd_@I{-ed(bC_ABb!IF8-M)z-_WeF((QG^<)g!+J6$wwB4)q!6mm8$BB{t0 zCIYCyiGd+hmsMcWGrz*eZ$3d$R0i2SQpA8{H>QBGIThII!hqrtIb3-B8>hdtT4P14> zcQN+Ti*e(%H{s8(&%nzIwkTrR+d|dWmO^b~kV=@uQXj=OQ!gg(ZpKgE-+>uNoLH7) z#i9BzT6j--0+Y)ggOSAIutr(pu-elwJG)^bu^7EO^Q zQu)xaBQSa)-;c5rfpAMTgZ-B!looS3+ z#_vG?5HbpC)Zo9H?BgRSdZ^ly{U@QdIQjW394M{BfwFq+*tHLOg9Rp%h{fhai>?i3 zs~rX*4y^{c`FT8UgTw8j0{6n|u#$kZu-MIL(Ko|vvcvC9(!tcDsKST_T?{)9k|0al z6c{(RT2y09r_*X9z2Tt~aC)Ltu6megJ!&*|)HOTN=5iy^*QY>UKp^OEC&5@@;PYFt zuMqnybl6+gg8WJX2#LkYxF!xDyLAwUn|fd&ksZPOH$vY zPNBc+7&;OJn_wrRvIRi09qw2h-tKj?L$i7GZa9xG$oOu?l0_Mq0B!qEmF_R-PqEpw<{S4)iD zC~i%o)<$vACVAzOI8q+M=7V~CzOfj~HU^E7yYbC}J z1DZ_{Y+5`Mi{E<*pMCHW%J#2DI_5!7JMr(xI?SK=1g1Ru3=VAE2c0#nG8Z_a6cNrK z_HW;Y$uB*D58wC;8Vh&hx9u>iJ9}?z=Rinf_0z214%-u3SG;&J?|x@i|ioj zPf-y3zrE4dS6yLLsKM|V22lqCO#(L`t5?p#)Jad_oi`rGq__Tp52ieWk3M_}E7#0J zeM1%1Ns8=x3J#ChF5Xb8TP@7mylNRfeDi5cdFgRXeeG|U{PJHgWAZClGG`i!vk%f4 z`QdSgR6{J)#ZhPLMw2sy273Sn_6}^Ls(C-tL2}VzPH`Cf{J_@6I6m87i97$}aa=L> zMwJstwj{lXcJ({o{FWM!A002bP>q>fO8YB=^P|Lary9H$Qn~gjTIaK4E2G_J7pX2W z39uiXf8l6X*u_7t0M$-ChDF@ecYnzXErc*9lEq zBWhY|&}_D%Qfr0QKZHY7b^@{s<>jSxcg+N27tCe@oDMgtc}|$$;o>#QRN!Ra2(NVj znZ=b@ylOo%Dx1*ki(~%6#mLPo!okBN8!9p>N3wF*i1uU0?p@ftZ7a6z+@b!K*DqIp zi8bq2<4AS}GO`YEHa?4zwg74z3Dnc6n^`$D0VGP+6YEx- zN`;HBB(Vm9!WZUFtn&`xpfQa)M<+U2-(9Q#X}{j+Fnpmf1)Y7%%$V z{xI=y0*Ocxv1p1UK+@oEF|6QcJ9mc$k>oi-EV5oH)jmWeD`e7*$k0g=3kikKK0*Rg zYk?A{6tTEST3!NFAUVkR7(yh$YvzWJTetj2UILMk%Wa>>P)oy{LMR=E`!Uy-pE8GDg#Fv)JLw$J$Y|4A(0|IT-n zW4S_2^0`(Ki>zajSz%T6W>hrTP;rh}^#7b#T8c7oWaFp!V#aG&JoN>9w&-K5Te$>V zKYb4?KYk6_n>WKmH{^@4?Z^Ao9$6j|fl=FptexvHbHd-SbmklQ{EO-M?2BpmaQ16> zclz_#y>SNI#@v5hVsX=|I>IN^Jm_e;A1MZ!^mQBcw0;$pR9&@b(KfTfjBxux2qy`E zJlDb?aYarM7`oKdS_x{e;gMw8e_@8q_zn!RCs>Lj`KECD7CsgT~a3 zCS$wGXxq}JN24u(Dn}CAYh0MOw+0IiG-6Yg53@Gr;*(8B@Yrvk#x>X7hD$HGQdwD< zwK4uWaU!EdW`vDp0Lg5xtFO3Pb%n_o%jo)*@v3`lbd2RPzJHB+UlvT>aQ&?eII5a4 z7xSD8s8q(_mYeUw^OF`~($c+nb@6T-q-v^Yl)V?+D&@bnHHCw^PAsVi;nz!YF!7KX zAMDp+b*UZYt{!MTom8ZqXt4y<=3Yi8iz^AEJ4I4S!Q>;rNUk-OubWu>1UK2p%O4vd zc%DH=gbJ7dVjw}}SO-z851=hNgfbUniR9v@TM^=DWqf5ufVR*Hv@`yy>0t6BBRJ|i zfjq|$>?9>epcht;9}b^~_u=FHxp{91)&-pnNytjjb4L>@^?ShMKrHA}pd2AMn%qgM zHFVb*jjHq|!9+jXLf7bqU~~fUxJ=vbA=q}1c+!aQ`6ehHQUOT@ctWk&adr*D({~&l ztXJuBjF4Dp6x13Z{sdAzbpPQlwDE5v>$p>n2hSizaQAnNpoI0+aDrgZ?}`vG;<7nk zG|lhmWMP|So0f5uM6wUbl%!H;>~tSPy)3dLL0kEZ^??(te|hf|T#OYd$2xk@O(IHl z4nh)eO4b4&m4YvPj4^Qnmi9pwIwmrWk0nZ58>R^LQ;~X8U3|`TE>akqc8W|JvB5^= zZ4Y(89_-+A``~5(IqAk6Y%3-zb(=E|gC#{L7AMZ6(AJhjn;}Xu z)=qMXp~jlR;pPB7-jt0m_7~ySM}J9zxKd>|mhP-kLiwQ*h%$&TgZDx>^0#C%7BMQM zB3aEPL9Oi9B!m0%{`b``ls_a9{Q&2me?Bh0;6hw}$)&iGuIB17V@WKxeMKy?K(bPZ zrOB;`rG~^ZvnY(W_8C!ajG{s7htUutu>>igQp7mMu-ywoQ!~o4bFpvJ7OY#f1=~06 zK|w|q8p zQC=rt_O-+62*KwKArXoo&JqoT)b}JAh(0z<3*T=x_*g<{qdU>rd(glDYBd_r)Y^<1 zlZPs%9XaL>tS+)*&YoJ#+);_8bSpdZn(*}NQ*ryA8#$%ftMEUz@gS86?BkwDeEOtYPzwcpqaR{0qvlfk&MzpitB-k)zkz}&}7~2iOG~R`@B(`K5lC=FXl1hSY zE7HwIEL~E(&NSUXH;KA0NfPGs;iDrVA7i}@qMgJNAlTa+r;udZ3-BC!kgiPD%tX3X zdVASMxShn)&G(aOnSIrVwT!=9ekbvnATiA2lEbfq?s5R_lKr{;6yki|LMlQop;RAS zB$w@Ug(U=VAr_gLmLys7Bk-h2SY2l@knBL*?I)r1AkiWBI|8@A9}a@Q%u@68kHFb8 z1h?dr>mumVY$l3I3!S@_?cZ!A>6p`sRIH9T+RO=x zwisGuQcp7r!C9wriN#TCOXDy>d*;S0EZbXvTOa!+#*UTo5^*166nO|?oO31ew;Vh7 zp4vfDR^F>|7UIVhR}n+5RIlP-uDa?P^laMVlg}6w>c4W(p|bd@H)e)$TabEFoJ+RrqVx|WTvPqj%JD+ z1KXdE4?5tE;aJZwIw-zEF+ZPakZw1OL{C!TvftzV7j`UEUy__J(k|&Q*w7j1Nh;BJ zfC|>jfahzBfEn>IsD1owfP_K|?2gm51lr;8^^#CnWF@}LezHVivP9@is5)HTs3%cq z?fqzR45HOOK!?%|osPh(jiRk30Hf8zhu}cH-a!Sx2i7JVYWa{|YsLQJRunfnQQm07 z3$MM0+wXc5ci#RW?!V_@wetS9@wcm4UqTYHlK%d??^g>VM;A)o{1t%+`N&jcAsCq< zCex7RTp^Z+@B2Bw^AU`{Z9J~M={k(Nc|2~q>j6CT)&fkJvjtCouo`=-c}*I(S|F*> zMNr%1$MS>Cn7*qPpO!eWqBex(g$8UcHR33*z1AFtfr?wmrOla8`?a^ZQZRVZFp*d+ zz9ekExLPFnbrXx1ff%8v2ofBk@smg;`qU;-vMyy=nIFw`C*)16Y97Km-3c{tzs)#= z*GjwaTy6|SdR`-e>dTfctkUsr@X_>{Sh;dF_V3@Xy0XMQA3b^$wY9ZawQ3b6OqhU; z8#j_z@=;yYgv>+Ps4lI6wyqf&`;MTzv=;tg8ll7hoCHf>J7b^j!_U_c9fX_8-yf4f z>pqnp#+M+$vH>TlHq&$tsn{tbWQRt!H8;sRMv(V}+f^b>Cy!@plWJE*E!+2U#=6JR zg#p&BB&N(Yoy4vJCy2FhkbDaO)j%r0yghj4hz5(D1JKfa$b!~h#zO}kK!o2Nl(jx| zHlgHcK6BZmjKAA60vb+C-d2n)Eistrc4X&D8{4>noUW5$Lo zEZtj(TYvIvTzBIQDh_vAH=TAL^ft*I*bgU(#N{2$&|#rM zGlzyLB!=ns2jTJ&o88?A`v*uyU2r;BpA_`scKvj-zQE~!U1E{_&TXMiSUlZSD#s8B zlT<=fMI;j;7MXm~Nz0z*&4fay;q=NX+hKV4Ss@mOleU-@5FrQzWHmlzk;~gopzLFi z9fN`2X%3CRNK$HZ4Z~>b8zq)z8GGQX(Lr_Uf!6Fr1?^^0lN}XpLDW#GRPiB|YTc;N zIPmei#Kt z5+oIgY)PD7YCw6d6RVEsF+Zaf)Al!F#^GixI8={~#ce1gU}{Ms;^Ib0X5K2ibpBB+Y5@1>gEGwD@uu40Got6`LcTY2Zxy67d4*Rjazz4Q@ z%qsTawHV9bBW>7FYDY6g$Ik40_@iO;_O(+-HKVWW+_J_U1d30g>X58FtnOsXDo(2 z5%n4j#1WyDPjsGuhYi-tHWcU_L8$9A8!UmF$6_5a7I9i7whT&of0h(QS|{thoeogQ zB}gK&@!He9C-{7*_+kQA8!KR;$dd)3 zM+wBg*;0fhu0a^+7-f~d5KB8_M{=A6NG|>u+cwEXHhxkmKDtjTVt92;CbqW5VQ1ae zQ7|5Ejvd#j~uQN*GR(6MA=*}g*D_S4_u1`0qS0$E`%tLbIM{ka5_vK_gkbrIr_ zBKg2Z31sxRBAK)0-1+}VEO*>`8;fN5xQp+RSY|F#3vp%TeN~eKRWiQPOaVy}{Aa|X zb#_B@c9&5h%r*nviKzz$2c5e6xFQv|FU7j*q0<|Hm6$2T8Kg@jp-499NN`Y*iwO8& zm~A$Aif)}^pP2lwM=a+SNcJ$``Qu)hM(CB5_&mno=t!i{Nv|Gsd*L)&m0e3w(Z=GV zTf6$GT8!Qp0pcXA3@Uq|llD0ZkIO~%WhcYh;B(mt0B$mGRHe$-nj(DdAdz%HN2_Rc z_b_mLXfQLlOhMG?r0>$Ia)VVjSy8K@{p4#?s~c}loPqmD0C(N-2yVOOKHPiT{rK4< z|Di}iG8{{8FnN{C#o|UJcbE{15Q)5sQ;|fJ;#MRnrOIr~_a1xTH+cAgU*q1N(hWWK z5N>_wL6)E5?-Q5c-T6B(f#pbDSP|aQGCg)5Du;&Tkx#NIvh=C6Gxc`bUfTRtYfL2v zG?_vq%@~7%R+xcd<~c@34@}Np29soaWyA8a;gN{HcE^&Yitb}z$^floVjwt%sjl}k zXeS>rZ6plEA{P|UF^r&oCu8MgjIH6zGeU$f+U&7G`_6# zq1xYvk3L_8+@hmss4BwR<%==pjn}Yj{-=zUm`Y4&3=d-6!BRA~m|-(HuxZtLJoEUI zSn|nAr05L%@e^=`*g)d4*_RAnr`g~V2=RKOox{pmG&Sh3cFksdy5tMI`NlhV?bQib z{>3UD+kp4peIJV!EmDLcq_$ z@ca7_@1~ohxFVL)*^Q1z$>Kntr0?%P&Ev9$pqFi{ivZt&P`HbQ4oA|}$eJLMqo1n1 zp9J2+#x9$bxkwfp2nO#}*zszX5j#lUVLF3mFYwy}JDzKd2DA6Zre8 za_n=`b%^tz5U}-h!PC_R*_U4i+e0KF=~fHy+4~p==FXGQ_MFD6TT8IT+6yf|x4X3i zYx0_Lpvi~LOI#iVY*%fX?1U zG0CZHimf{3$S8ODeivs_qgSHlEC=e zNF3Lb9BxtRS|sVD?9C!%A%Dx5intUZ5JfKhTh5gt$4B#oNgDmLnT>C{N#zN<<2H&= zI-t9W8$v9zNG#1~iKSYIMLS9?vOscfkrR{lHloNZYmFkXwfSLccEN1)qt)aku@Dzz zB9A-HIt#$b7?)!5kn9;$GInUE$h3R=}ZUV%!#_%L~N#TqSvL9MK4cRiYnJ zl6FwK%Hr+t#8Usd#Nw1Gib;YA)lPsG%uUeOG}v%x?>;R1WC?a}+m4l=e}S!=Gf-b` zgN^UI$)G|kwop6F;b9o4d2CWI1hcmGH%jNju)5Tc3VmVfL}SR5h6K+>4WN*F8VQ!w>#~ z4&$eI@UDmPvxk4CT#95W7LpJ$5eFkABI7Qyens9BqLE{xdBY?_@`H+qKG3EyU!x+wj4%!#LWUL|Ll`nMGQx-gE>tR4nI+rNPsOTHaSZ zNmEo;8wt{43BzWNz{+F)>ckT0>>S-`kU;H`q>JtSNKjp8bpq21Jg6j?tZ4{fL7^Xo z1Xv3Ju$9NEPC=!3sUXH8ID9Z4LDqw;sR=T6C2yDzi-W4! zD4QqQLyV&!N{XwX*IBS<_aQ9(>`OfH*JtqL-=4+%d7ohNr1vo4t%;aBcP?hno~^pR zmMmGK{x1zoy5A0G=ApErUJ*;3risr;X8u&6)nbG@oPsmd4KLk*pP=n0sCtrT;H2Af zvH?3}5I@$bh$Y@Vs8aAp<9&2Gl7?mkF#>ileFBM|5v0RC=!mj@c~8VogQO)p zWd?bDs-)SDC7nG?;FX=V zm|Gb~1)uF|!wI~X<-~Gb7nbXjIBf5Mp7$>k4`Nizk-%}J<0P4XLM(PVDjV@~V(q-lR55bW#zx{6nyLNh-c$aIj8gLX_E0_hu#*XXIf2UViRKG22BU zYU>PY@gl6Nx34%$Obq zg=DtvqWXykjo7w+7Uq8R0@kej7)|w=FtwGa*Og1BVAix}v19WxHOs~qVeoo*GgKnU zPy`u!m*dlU6R>~l613JGf#2Bzi@qAWw=TrY_n*P)&!)j+XhJGV;?g@&WU!#Yn_%E1 zQLBri#1KQJm3Fc%L6V7)OaiE=_o77OMls3dg*T?+&U+ul?Kj;?a$tGr9^CuLXi9u> zDMA+KUWGhlj71hj%5>v%?qzf({%vZIUx?*1PY;-3-D<8IV6F;oN=a zBlzPh@8QK6U*hjGSL28#NM}VmUSz^@D!?)-zdXkY_P zHQP+6tf>Yu5~m4vkXR@1mR6ID0y0ai2Z`_qq69QI$*wltiNb&jQJob%t`Gr@j*&5b zAfpiFRn1tubPWz>*_avB7t!`V+?_UB5CBA=Yu4tkd?+GoTqj zE1&y@EFD-q7$P~PLTAusNx)0dks@h?84pPrNN?{{q$1lchoeJ$@1*)3nNcLOzgRVB z_VlVr60-PnTd4&{v>}8E5l*@$gKR6#?_ZkHf;SE};DznA`16-V*h_*daq}9p?ATHp zM-F3s*6s!zH1K<+Ym)cn^GJ5(PDF!42$4`^=U69ybF?draZP99@lq_YI7ud^09}a8 zdXn@;Z1*-N9lbq_kllxX#e*h$63rA|&DtakZQZES5tMB)7+NDR)3qGd$MNy@B5c@K zg-3t<2i!S+tST~|B1t8sD@=BbJ-3f9wRSF=O7@~UZyO3XEy2nUUcv75pHZwEVNWE{ z=9ALNw$J*sd$51QDlDD;A}Wq7LrwKsRFtnmNzrPoTm3%vET4sFTRCEMreVgRlO%p_ z&wDprpsc(XJP4&JJd!<(kxuN|vtNxh;tZ98A{I8v|BHYBWnu}?;>ubUnWKL+a~oz% zeF{tFy^iLlTpS+?V&nvo18KM|CHV5wNtplfJF3sx9pnv!=z3i3D9bOx>vTDK?i{HT;&;J@5my`J$bkLc7D7QKZTrou~tyDwRjt&&+A~;&- zL0MCX4=#-A#sDfQ<4T*Iidb&F^C2};el{ir6 z<#oidJEsNnS7acw%8zWzu-ebNkP@=VJp#RBSWQKiDUw1gVs%Zy)W1Bjh=Y|e13%C4 zkzBl8BXBWTtsTc;O7ZszO16&UFi{cNC0?)C6(oj z*C^WQ!aDf9LM%KT710FpeGbG84h;HY*iS+!BcU8TQUnbfe|5c%px%MwY&*xB0AfS5;|v=v z?^U{*q)u5+vS&?Hl47#1+oe%^I*_0mmj#NlFMop0F&;YwUgqd}m98^zNM_}p0XUN# zu%)_D;RxgNCL=Op$B{w1w~1<8rs4*}RQvs>Vd*-J%(@WTf%Hg6UV}BI7^)c8UZ#EIY|V2xLFw_)w!CHa1O}B__n; zp#!SrGtA|4Ud@=ELNdvrGd1#@O8&m-7+n&{enpWB2MG9fVg-2tQ7Y; zj~jyt6A~>YIK2F0%zp1xtXlmAj1=c>w8Tc%lk6P1dHohFp8hTlt)GjqDF*}n8Vn6K zBb}^APS%%LIcoxTeK8Y8XPmJ)Oq>vxd`u;ul<~g^V^ea4DPobWA4n{__nsq`bB^V| zkyw0GV=`Ah==EXAoDcB&Grz&=Pp6|N!KgYZGLn%esw2JuGL29T6`#L_Rz6d@$9RUapNubV(gf47<=Vaxca)Q zRS`lFvbgS=>(t76S+64NSR_}Nth$%=D$*q;4o23w$W&xmnJ;ce#$0Z@=U$Av>1Nz` z)mV(X>`GiG2`z8B4^K^;iHVCgBhdsGEl((j_v($s71vbpA4dG*g zz|txYmK|+H5${7A?t_MMQR8oiR(8= z4CEAlFD>0X{LTnpy`2N9qzV2V1XOeHF=$g!ILszEWje7&kLFf0TxQyMyA>`Hq(wG3 zB62rb+$84&ou3zVJWqBnY;o!l>W(52??Nn0@Qe&lA@`u%??i#agjS~qPNKJ2*M^YC zhmyPkcpWbIU2c^$a_QnFXsoM;B#zv-dk_Bhm%n1}?AfqbEYN5)ShsE+wr$&n+`M8` z*EXW8w2}nqg56|?vBd-rK`%vOS1C)_Zej#t*?T5N#}X&e2KgU)^6n%b#++jFPPFVFeDtsFn>)RM} z2}DRTG80T@d>tha?kKn7Xj>fl(nCNIS0F@R#iAr6$7;HV<=)9EH)-k z=IF%gyk=yygkUCVdZpV{x&R~XidZ5nk~aT;Cl)u0i=^UYtP8Oi{X#75FnCiWmV}yS z+(4IjlvuK;%8fN`X>6{JV0EzvYby;{QQCsi#t^ESW7tk|d2d@WR?xBB{qV1G&D9s< zip$Se(}`szy-XdJ?8UNXMP6mfu^baJk+BpZpL1Pevig2>O7a-u$u+86Gv+E>b;THd z<_fh&=9+7+#aMp!1`5p&KVGPkoho9fw-T4m5{oX5dBr}wy<3Aub2}YO2wHsrtwxz{ z9HM|~!mM}R!@>_H!K14NS%ugvwtPtCUOcp6B^FP5gM~uA!2p*tL_CO+oE%s->wT=A zGXD^Cu#&REr=Tw8WU~c`sWN2iP_v#COSVJlYjT zVo7yj&%Oi7ssF!1EI}UgQ*n5mZp@uF5ffkh6V@;L7{_{u5Xbw}rbY6K(_J{Q<#W9A z%F~$s{s%DI)9{CfU}lhiGJ77L|I1Glu_P=_qr@`I3qL+eECsu_?$>($@%>Q;B8Wijaz|yqATLlHpj0M#x0SM~Fv`$pT5qC-$T7U!cza z(WRH+Vg}U>49062XxEXDZoB0HMJ%t)S%bG0Z9{fzRPA$J)fz*ohOVkMh>up~Vak?r zJiDs~zxW~p?;ohg#MMWzsjwBTB!)^y1hrIU|LVlj&i6W4(o{MznYJ43Mvy3~_Q~#| zqahfM_R$W|nUHvR4Pl~HjMtT99Hl!(5K2%j(-rd3kyG z;DZm;xJ%B_BDN77T3gykENxJhNoFh?wCPH^Z^%!H_L_#UFr~A>{Jpzw70e+_dzA14MCs^kr zvNL8pNoPa%LJSgO>1Fe4Pn=dWCJz?Wpjzir`^|g0dstuHC@!i-epU(W1fwLs-y!5; zbRaLc90xMXVGR$$oETAEU)7!g@dyyU)8XvOTVrURj;dO;NNqC8F5^BePnOK@AFn2cl@#5w}%r3TIMS&CZ4>V(G zUIRYKszwFdTUAROTQy-!*<66-dn$0}L%+gRS6+zAE|o=%7pjDkYEdMM{4EO~M^ouv zs?xcrZHmv5i?|gb9!aS$SvP+8ogd&w-#ed}@Izei!}IZ@AN@#W_82>M9BvqYE5_Y; zE2hnukA`MC6%tFO5KH4ZVu@ivX#f*;HBlVVv5;7rTIsON5opap>^V|`k0-u|&t|@l z4xdpGOK&d&L&)XyAgVJDVA}IfV8%;NkACI^T-G+MSuhC;r@nw~`|{x@R2mhM<0i@YyI8v6qzZSjIEW+;Dsv}6 z+eP4zwGUn)l4viVPcIws*%D((@EA*g0plf5dFd)-V7P@Y*;Dv zAl+`Ds|UWW6#R4-p{}T!zA8I8+B>E{+J)lcVgf}qW3n1GH5KYR?Pen! zbOL@)knXErU5}sl9PK=&49fSb>vws()P{E^MJ)UcFN?baMrRj7 zt~0324`arc<;bk>L7N?D(9!Kud}%1c49#h@Y17!*NXN3i084jQ;^s$xgA1;|6c=1| zfy!GF+#`*(cn-@d65 z+J5)j=keJ0NIDlQ$8zIMw_)t{H{tz{=Am9|86}nm8;QlOh^2u-b5SWB%dQ4!=vXxR zAT+IBw3)+bHjNU?M{iA5#L^j%{jGX&{G_;+QA{n^y94h&`AdBG!XJ>aD+{qe2NG=K zIay_x_wLJ>|MoNRHwdvL_>mDDPg5O`4_rDc7QOodK6?Ex|D0GT-h^1<6m0tr99HYN zz9N>9|3+ewSw*qL3G{SyBKN=!eE9bBc;WG%Blpm5j0{pPu>wx?reUZr#N=0=z-!O_ z1v|HHCxD!Uok~2+hLwFV8&h6;22cL{L9F@sU8GGKwj@S!Zy%bnv+>?@&*FvOK8{T* zwn1-6<8YM^({|V5kbMZ1)?U;&`mw*>iy7;)v9HLCYAO_i%w%cwA+N@a{5k`kdwmLS zz4HNFJ7yd%yFl{%d{1R0{l^59-#_mM%8f{Bd|7EPE=634thSf`3+YHsF**0#=l%zS z={%~HF+aKpS1=H-=J~hW`XHX3JQr^**ofyoTBRIIX@j3mDuzZ=I|^&PSiGeOhm1X# zqDkY|yX&#pJA%a}cC0Ekp*4PrYA^~zc;H{2So|`Tm#R7%J4OH=W}y>__bF0oC$LIM z#(M}pEHPQteH=*{w-KcqI}Tq*7kr&bD(o1dbQw{;FPUyF=}v-C-)K%MIw5kCBA2e@ zAbR-wY(tP0|IuI?gCrDB&vCfAhUo&R{P|nr!f0$&F;V1oQB8NpsfHZ}7);HI1RM?v zjM`RsEOwPfsG+JxWqwFTVz3yDFzVV+n3vD<9O&-u#)%VDeWy;TH8VmqvMRr#t_nJ{ z9!;7$czrH49weXjxdZCHlWe3;KBovtF2H*WOE+LQ+Y;4!Pyb0oyH0_Rg5<%rB@RzE zCu5t4#$+)ekd}pqtm9yq-xVK1Jj7?kwiu9mqyBQR4uU+VpDt-IoJ3@hE_HyLe*fpc;J$|*!QBttg-3t>2>$rnKjX!xU&PG!KER44OELM43F`IG z-h;@>ETH3L{qy@hbgxy007|q@T7Sr)DP!;MJ!cc z5sQb!62*dI4<_zzM3Xs9#}Y)d-Vfc`uCUw^=?a^Q4_^N}$}@N2Ob;!rkP3^()Pfmr zy^4=t`3vT~@g!Pn+YoTYDI`dwIwwAv_9i}^`Vx+;p2r|!rAV(8xd4MB$l84flb-z* z=DqXmKkW(&o+Xw%0OLR-G4u^1X5HVVY!&oNVoUGX3}H#)|Ht0&Wo7w(M0Uq zy8$iD70AumgC+Amz@#^y#hMkL!(g=Yvm?+uI|y(m*$^YxwsAAwpYResc=K;q_t{6t zJFp&^yVsC#p2W*f{vMys`xwOqd>JJ40p$ebQa4>qeGpUEW@B%O4JG`$ zwXIzdOG%RhB^ooHfAd}3ddK}3Cp$h~Ao+k~4~Fv?7~fKviof+gzK!pG>$|FpOS;3P z+e=7Al21xknGlOO8p&?_{qw$0a``rXAWG+Z-^Y31|1K{5{`nZgU>nQxZoc&)JUwMT zCNAEl##m&~v$R2`LDQBu`A}Z(#)35&n7S$x6Sg(r$z^%?cxx>dZ!Sk+wGTGm02_$x zAj!tWI+EhBcfslGhKnR43&gB+dNx`6Lxgn%JK+qm5R_!cKuLG)W$}|pgjghp(>Y?1 zuBdY}kRp`AO@l+K*t@Cb+0dOmY|!08Ed4A)NG4BG1e{Sbs-#Fam25$LuE>7vyi~YY zJS?)RJJNB6fqIHWB$EIbGc2JrfmPOT@O%%8?1CtpR>}Ep#+8f2}^%N#3 zOBY>)YQ2^^qnO`cLe*bESED&bWje&q(vc8%QODn?i&cP+zA* zYqK2Y-_AMtzG7Wi4K`vd(tZSdrP}L5V&Jjgw$Z z;b~yK74g1Sm`>mb@0ofaXb+B!BboQxi#|;e) zXixAVojivA_5|{?a!^)Q0aKWw$?l|Rsz(j$=2#~$Xyhc?3@zAkU>6MjFvY+i!D^84 z*^4$`m?RNFC_I`<-%C<)vpD%M?ZE-YHDggklaF!DVke=P`D!51w0e7>^$tMe8GtT$ z3=M1-dyFaM`iD_r??sg(jRJ!Wc{($!rYOw%6!vIin6{}9U+$~H?T`H#7mT|CKfL@x zwNs>!i#Qb_7Rhcb&PAMzB$^a=BCbUUMaV_gwkTpbn}qT_ip+1vcP1kM0RQw!L_t&& zL(UP4W%_VhjoCs&iz^)H^<3j%lwxjRjL)MB(1G2zvD}w^bu!(+W&}?s2?7`8ljuJsY-Qib7Mm z#81)*j$qx|&6xfEJDC2~pGivV=+-S5?g*f{q7?Jqe-~3=i4?!rPDNFau^XSxoPc*;{3E7Md=`^meFAeocmvy3FNHx<3p3@2 zk?2=rS_+X8_?hyLRE7dH4Q;FW;aST4iq<;@a*f8ano)0 z;@Zov#Z{MFrusoIy67TB64JFLF64XP{=Om(Ar$Efle}R8d^yICy%D$G{wSWDM8~pdGv4}SI}X(Q&}2%h;K?sH!{X^fnJ$Vg zWp-@R58{9a*j^n)W^IIx4rrw-GdiWT|H~5#aUR3~P(;%G@NeQtn8YFj@}Z>Uuj*H? za!iQD86SZ)Is!YfiH23J0{2o}cvyIOYU3;UzDNgSO@jPvH%x~243<}gupqMvpBEF* zLp>;wX_EY1Jtg~2KIh%dZlqX$LC;AX&Ua#akrzvfJov1{k2*`Ink*3Y1>m(hV6(8{ z)*FzKSwtYz!DwbfZ)`((WfRG!84a2?5{L$sHBBh5sz*_2C35qNkY8Me^6FYeE){&$ z>YJd|HDT+4{RGP(>K%S8-MSBlD>dLPA&aE4_edUE^dyo{3UMlSw=+gCZb7rogRGJY z?9Iu--lGRm(Og3p7ot-UH6B4uwFxD>!CloRC==4=aW7q@5X+oJ3vllpbSn4WgWvz+QT*c3d-23GuVT-^ zqsTa%3o}V>|E@iF<%PfF<>&v7eS7xOl||5=ri<+wKyhgmmM&e2ijp$)rxS1(bZpbR zP{+EE4jOALft?vy*t~TI{1y|s!a=NCzY>$DO+lrOE{^UvNVn+~=NL;P$nX5G5=)J> z11!0d_7;nPLa@ZO{sF>At$_;U7C?B2GNb<_l3qKAUCkA-54 z?b7QG;lQ@_SUmkjlFQ?mJM9&GHv2ui`|3-W^2&?I+O!_+cFRAVZhVedk|dUchclJ1 z_HtM5>7WO(`rC();6a-~U+g`QhY_)w5H7zMLG(`vyE)+LfQK~iL#kb$X z&9~o+t1h|{m(${2eVOcaKlUtf+^p8C$Sg1+6&YiZnP1Ws_CK>8(-L1k+ASvQSY)xJ zB(5BP%gwm<`s;AbMVI07A6$TOS6+vkZhaU}Oq!2(Ki`81i+3WcHAb=vp}N6MHS9uD zi=Q?@skm7@;chlkS%)Bn#KLDJibQsalMR@}_6DdcC{PJ^l_{;#IdW)glsA>H<86Bh3Z+& zqo?W#chRNLV#`8C@&Fvk6Y!Bdf+VB1*a>VeZo^bIq7V69izyb~sfl1dUHdHaDL4o~ z?Y$%;0!kNy{qsW(5_F$R7w>cOI%#XV`DInSwrSOAJb9o6A8JD?y?cOU#p;410UYu7 zV@Zh~Wrh%(ou}dGJOfRjAKMKlkk9W*b{?m*HIpEmu)AY$`;#zPeen1sXPpaGm31%~ zEowGcOG}ID7HezM!DcqXpr_j@Ek$WXIlp@t)uBFQ`i8LA+KC$0!vRx(?plM77S6?D zmbT_bm676TMlm*R%0-IT8X_R%m6hT3Nw1=~>?qEh8bn7bjMW=gs)-)`1 zXle@rlChI@xhBtmX}hcNN=XkURMVZ&og8G{J$s}L&u1Djk)*nh_a~cVMMy+V1liBm zZ^EyB`FlL}*kkzl&mO}ce)mg!IC~)~=%ymEq)O)LaoDh9^G1@(^C&AUQtAE^i8LZ~ zBo!4^ig*m#CJd6nBMvhT9mznMwgvvdVFU(`VaMStEMK{nLa+hpkRRK(Z^nellaNzd zgHB$DJ21dFrZAFjTbb-ZI~pXp_(&?A5OILT!2l6raqvMp{p~!?xDItgwiz(;^R0nn zsAat5+xl_TOB@J~U^kB~sB&Q1+ANe><0!J)hy`x6YTXpG2^`S1WAd7#SiZX!_xG}IWg^kmLwBIbDMO9(Y2V_ z?ky3t+T(Dw+2GLYpl_n1E;)+5*+;M^D??3nuc@hHyN|#ej-%ckhlv<1O^mv?ThU+kdQ)LposGmE2Jwd!1gz~j^!T) z@Bg1%Aoqbu!YT*~h0f|UxxLGn<u85A*bjAvB-scwwD)2&K1OBwX z8qekG@nXImPiH&v;EEE~O@xlC5B)u7R9SYwhTT=2R8(|Lyq-=^H%`#;zL(?2Q@eBu zOy41})EIi4ZW zuh$_buN<}YEp#xgDk-H9i}WqaY%tmWp{%R~<)uZinhn^!dpC|`XCcZqW~1BMZ|}yU z{8lV2(&6catMJLT-FW=@r}6X?f5x^=>tJftqd2z`hYr=CgTJ5bK8E7zYCQYOQ`obA z8@fB=FzPj!G<7C6AECe^TW6S(u$>r9>PUgE7A)>>3}X@N?CI>7B9|K0`<9ktc)iGl zH;Uc(&00DcZ9i;0F3+US>cMI{iAnEF#p91Zj%S|wE2h3X5xWm%qnT~XAB?Ci0y=3! z%L?^e7`k^yOB2Wu7bb?ZH%d1gc*Mu{} zyx7yki!jM$?`~9S4Qi^jhom7m;-xzF5X44_g+eDh^nXGujA0Ur-J61u?cPA3HBgm{ zAlqN<#V7mgF@0A#ChaK28+*#}=H3d-*mx8*Y$K%(ry>@83q_hPi36?en6xSfU+k*E z{XcsKmt0Blcoo|;+pUy;oMJ55&!r1YigbU8Q;`9DAr&c-m{QJ>z3;DJo4=ZW%Phic zuO|6ieYGlMdA>|HzV81pD@?{%{^zW)MTHK0Kw_yAVo_r(qr}o|jiQyx$irt7a@Y}c zlJxBcI!_84mFmh#Or;xhxnWPR?a}({BgfH3A;_ks)(Sa@6X{ep`~fGQuNmnMKe~I; z=<1TORAM^o@?Vx%+6Z7KQNU{Oc0_eWgnd-HUcM3lD0oN~Y(P@@cRWEAOH#3tT#PXW zK7GB1-{%SS!|ags_z?zQhsxHeF~(r9(iXdE&pd-vkZH77lh9DD=b5{(oDJyjYfJFj z<|@3tp%lvstSB}}YJ?OT=~!y(+*DI`lxPfi?#)TK?XLTA+qJjgj_Ys1y|>(sdv6_e z9g@aH7C{Qh$Q~`?Qe+yk5RJUb|HY}unig?4vN%%Cm7)^Q-F`dn=DD{q2yeUbcHDIP zqxkcLxp?QZop^P@7945jwUAhvn!RYIf@*E`qPp3II!hd@Gc{O8pl&dw(8~WC?GYFq zezdWXwgiH_SGu$yj|b^gc;9wf0*9ZCjYRH>QT35XTr6%`EgkA*10{)w0%U{rL|M0V zB~BLE(?bS)Ej;E;kANQ~F)?^}+)nbB-2mf>emJ}P;p!PcdvFl#0Xk8t-ul2vyqQ&j zZFD^O_72qB+RIPlJ0b{l2nShQp{kNnVH$LWm~pvS(e4j`1JIc znMur&1(w#g_E9mXIk z=H_0!Rq4aaZ2vNptisVoKTHhZ9TJeK&UiT#nA-95_9`r^j1x3mC@HE| zIm61ys*fE#i4E(w;$&71s;X+RY11aVkgp3oS9MXim9MbpV zrHy%5McaDxubv@T+>G0A|JMbOGf5?9)~d+VVzqun)}g4+XBJ4x8Wxq=m_>4osT42# zY!=U%bJyLNbN5VYmzlg_vq?Jd`PY^AjH8wHCREhPAihhDvB)}>rG<8Uc(e)itpSxo zP>Rl$M5Ch{E$%)7LJ$0*4j61cG*dx0#d^`q`f8*kZ}avuKGJ9XlQ0MRVJ1ME=-;L& zftmGe@s7h6nub*-{Lo;c1PkdVcag9OK_kcij|(i$u5mCv(SUfP(Q$;lqX_#Z5u$?& zsK_gc5TXnkk|RhGRhnE~FiI-%{%Oj%0U~e*Y@RL})&PSe4ai4;A+t7n7(iJ$7OD}8 zwVTe7phRSlWhKHaW~tNYNn9@^VFeSZ0GMU$tcH`Bc(WSq5>JGE09%ONtRm2zfWV+o^&)B9Pr0@ zEvnQ+*N9pe>7^A5*p%06v3C1DYx!ms`dJf#&EW<`wwx$HQ#|2P4W#Yf)9%fJUm6y4q&so-Ra7vz8>F4LLbE z(CKt)rTwvt3^nCAJL@=3ojeY!*`T^4Bn3>q#*IBycFfDsV`D=Edb*K=_f_i((w5yg zJ4z&VG8W^gWdQqHlJv=G+Q9@2bm2Pw)Jm!**%x2N$OKqgT5GU(|2FjZBzRY6 zcpF0)ndm~2Y%dWDBN}w0zayrA#XPoeXLW0`_PR+$2F>Z(ybi(I=Buj8q>z1gI&-h-nfS)(wM(tho|kQQ*SAC103i z<8blSA+y5>Ebd?@zoTtax!4&e^zH#P`NoiE8^G?yZY(P4!{#<%y>=S!X8W;tTLUVz zJt}`#1C_tAEe@-p59w_^cy8?}EZbX+$N%P81uBw}Sh5?d!Wb}{WK*ThpEXyddXa3$ z0y>i3WhRyWYy~g^KJs3UmrNV?@!b38vfOho?!A|UlQH3*x%a7*F0)8jKmT&MT6tel zN3~nanDiB}NJ^I_1vY$`@!tU!%K8>hA5}B!&>n)t&1dmN(AF`GM*4bjG>InHpc2!U$4prA7nj8*xc>_<28YzizHGePsprMHYMC_i~q2|;_oCnCi)O$ zaO+Hrpr1F@$pGhdvq8;%wZ&>nlNqKK2jUEhy_CQaBBq7LX{C{x{W17RwPadpj0R~p z8PU>EuLg;9Z6>rfd1)MEJ7nsTT3=%eBcJSOSEU;tWoYq})u-`Efd`v3UC45cqt-o1 zL+*m6C60zhvMC0wk|qMr3$GDa9>HUC9>R|wd;)*<$Pe+u2WB!COD?dP1e7zWTh66* z5oIDN^UoClmVZt8BHz=nXh@Gg{y6^T`%mCU4?T>>dF^{1{44zYt;KkI?Ge1X{2;Pv z+%>I1-j4&#jTQz?C)JA+8fP49ifve5=0ufy5Y4V0=v^IXb4AHUBG7unX!FJRN?;)a zGf^5_>0A!hqm6ZES6yHO1Qh}a8D47=nUG@vo)$Ye-p^qlmLS=2_IhEpNRvWAes7M#nKb)q=^hp(=@O% zXU?duqW$~QVW9#@5e#BfqX9<0?jG6=9igXp3|guc>00XU?#AdS4ZVYwj{$V2+^8(c z#eqFXaENUCrR-YdGdPo=s_vgA-otK9I~JTWVAJtREZd)pJ^4m7`o{UZ-RS5XMLPBW zb~>y)TUlEYM~gISY)6>AD>8{55}cHe4nx`2PB03wPVA8}*qtHNH|SARQir-GBb~4v zR!vUYbn$q)U)L>XbApLluC z#BjE|4Q&RSnwl(KO%A&oTAdm78Us8e1v<|lS{=PGO8~Y&Nx%C3KmgT+xo{h`a8cC> zDRR*zONgMwG9G8{CP+`9pMc^gVer%6npwBj-YJas5h+W&)(V1tNeX0V}bz7eRJmGJ_3v63Y!6! z`!JhCbG8DO6=qt#&n zuGWTar4BXYXRG-Pj**QX_D)k8%fiB56jz7P)JUdJl~CR0Mlo6Oub+Pfv+sKd4^y%H z@czf}qX!31zkRTvS_Vs* zHe76s;#9K-O@Rr7c%Qul!6=nmDeY5AfVOU-Js1e6(%s^UF_;m*hREFd`FSEC83tr( z^GtVA-+*KdphE^ytivuO_}rZdocEnpp7b2Huz!_ z@|lO!E{`2?Du>z<81=2Fs3}8XV>z-b^O1G>1cBugvQ8XEe(niWl;%O(Qm5AWRM$6B z9d!~&&QRq_4m#Rb&$I#-$w3#P9|zlq5T-9nTRGYZ4ALduF{OfDPv1BqJq%9WRGwmQ zk#Pk4j3rUNXV43DjT2Z1R_B0)ipxh5;3l{Tus8_jKFOZW_~P}GP|=2+(J2^N2d4}J z_$b$nzbc5}uDu%Ew7wL7mEMX?RdM9n`jJDhFC%HFHiZc+z1U>v!auA!ijQ`b;K9Fo z7PG#}ZY%&H`>BX35de{{F-e1eu6s-pPs*!&FUOucM!uKVId>3r_&WQ}yHr=0!~-b; zRCf`i?w)f$KAXQ>0ZWzad9PO9dr+tGQ=KHStb_zPvy}vepz;;4$jbXBYXU8f6hfXT zYRfCJZ_i$}H_+<6`>`|gB+`%P;6QqoBHmtCH;LXPJZuDacmN5ukpPS2t;@+S!|9w7 z|Fmb>TC8Q z5-P{^q?63F5sl@Cv48V29NxVH+NL%JzFwZ!!wQf+NUYeibqD6X^9D}rT?DTo8=b*2 z3?%DNaC8TjeEbeRe)A<{W@eC4dr@o+VA&}L-ptV9qv8ObJJgDwt~`kk(;Jc9+=05* zPNi5H8)g(sF@NvZ&%KPhB`x;t1OkG~V=NEeagXZOl8wD&LodnwHPanN!@1>7H7iWI z!K7PEy2514MgA6mk>h1ku)FTMgA8R39+^D{_tV(!z59OLb?=Yx&u=WkA6Fg1E6WZb zTN_6$6-!f-6RlJ%hE@k!Gj*;qz z!OG6>mOF>>62YyqS{9^Holqjz#(@L%odmoPme(b5&t!KI~YTj`v=92S@X% zPJ#w#n;VgJ^d#obTa1nCcQGKPXfKj6R~YJ9c!Ouiju;FXWSg4pc<-Grs9LgN(HqqY z_ai4V@&2bDEb@lomI@VbH>BGoi7mRyl(~Z>K8mRat_=r2KKJxfFrNpBh7) zgh)U}X0GW1gE&-TK!cA;oM2KDo>q(N^1NrUJkNox^(h>41FI|JIP92)zkdkv-a&-h zyXhkg;E5h|C#c?e!CpG8%N#*bK|Kx~$;0-&M{)4@DU{YXpvk0%I}wIHI*1w)hQkG? zaP0IE6c-*tRmCY3R8~@bN07%reZbs~Lj?IF`VO>sMnS%SAb~?>Rqpbf!C|%+#SAnA z&i&p|Y&8yGhwcpW*lvCXaoKAnK@uTb3ELBsN>x=*{ioGikwaDDOR~)fYMyWqF24`n z5Y>}xC*IymWj6wfPf$D{Aeot|j-uVNMrl-K5a=d>2vNp_+NT+arWxSa*1VSlpFPPy z<)wOc$!t;CIv`5BAaKYQ)&WT+#EO^QE5lSRVade6?*v#p1Q-X&kUb`oPI?e;Cqbe5 zHJhVorO`H0eV(w5V`)_iPaibk?c5+%HT2<_mG*9*g3Z*SW9NZxpl1V~8nYUB{OO5Ok#TX!JWv1&Zg=J*{e00KqdVLI9Ly#oR3!}*k zz0nOLgMVelAsk)zB~EPo94*;9;A|~Gz+3^{=``$L^bU6IT}At@R9P(oev(T9x1AGz#`j*${=kQ8CXSL4iZ<~V$2{8BYy$s5qOExJpz-DrX$zc6$YG&9> z=Hr>q{_V75nH47MTW-DWW`fJ@n0w1@xQpN4&1>H_`}_Fms|%=B4&cSb`;gTdLmkzV zro|0iiw#CC6$@XRtw92d4=am9R1{OtILBde48de+XQ4tdMHuXR;E?VwD?!DUf}23& zl^J1lIA@%|tbm0^A;3bV5{`_01uSHK1eO*e%dSEVP8lPxk-;`Gu(ZmwRR)S8a|d3f z^7~~*J(@L>Dz8-&>-1P#FLqVLaFR_|P6nRGp!@Wm5^OewuxH&-{PEe>aWH!?+FZ?K zOpVyRZ4cgg`vdIQc7VU#Pv*&ciJfIYATyP%P#H)heT$}*?CgUtapZ6&4B9r76cnPa zr3r=QrP#P?joPGZFMscE(yEZ@nwdWPhduRpYF`QVYeG0tZ-%C^3DIB(eWDDaW5}s0 zU~nwNVXD~OwOW+an9x*jLL%tJXkQmBR->BD)ljd6tOS<~!Hz^1Iy% z532PtHrn|9{8rjgx60yMOOqnOIaKnq=v=fSQvGVLMOc_;0-s}G&s zvXN2>ow05V(lG}+#!y+*jDoyc)KRI{X{;!3(4eTM7CB|bsAy@x*5jqvo>h)x#d#zj zRcLFigvZqeEfrl>gAT_$-PplrKTPB}&=NytImwBSa#C!HosYyx}6J-od19^@lo?o^DD|hZ?P&2?03PEqPAd-xu zy+`&;3M1Y%zDvw2z!wCK--GMCz0fD27^5a z(M}UXQwaBtgB*y#2?|)^RFUBxnH46}->Fy_+|B`uKXR79A_My)a8U6&c=Ntc2RyPI zK`EALWuxm#{P@Z8)A+*yJvNwS{SJ^L`^~fslYAtg*I5|53}|AVx0+H|N4fXc%hK@1 zmR#KRmw&(wH{OYx=)?aOBm^{M7T7ruks?Y(K9`we=k~Z)izUB0=61fnjd4OPUAUDo z;j4XFWPIj!5>c5I_VMRS6tKwNP<1UX)KjfAXoCt^R#XJ>@kt{Z^l`K)VDZ3U^gyR~ z(f^%T_1@dqyZ8gRtB(UCMARv=gtJLZ1avUu9>515zleSNcEfB5A{?SJ3{Apj?ZLqV z8JPFkyC^T%i4K1?&vo$JAf>wxrm7RzyZ&?RT>bI?Mqm*fp`j^YVVRhegQqY(J&j&6 zyZ`qEl4L40tUz*rY^@)C;RLob@PG2gACR?w6UK1{gX3q^r6rpHMmmsva3hv~{tC9Q z{Z#dxN*)^NCfT()9j`q7Lwx%7Ka=H|aCW2zgA5!Kyq|G&Ve6K~c<<$>@Y+*PlF=E_ zCX9s+zuPi~=l9m*%aS0D8G2AA>GR1>sts|JGnf}QgmAjji3&{+FTVaU8+s0|xZ+Y= zf5TO{dU{UR^5wYk!i>RD)PN#HJ0zLyZSn{FjC%2lFFL| zY-GCOHQ&R{-@6JoTz5Tgyz?IX)5{;?sf9c6izNq;!3dQ`*}I*xbz6fSd$oR~nPb?a z3*pn__Kfs6|{AYC_j~j&)<3j@4fXg zwj4Z#EZW0s`?8UvPpCj&L)BT=WQV7#7sVPaRxDo+GaW8D%4dspV)fRIC?aF?(g6Yt zb_I3yNIRa6_AWQhp6x`y=TNh`Bn5e@cZ^`vi5>!MnCvb|U~+~D!t_;Zl(X!P$x_@+bXJnJ#{fO&=+=U^kkP>ENvRbFHZRIVmV0_r9+&GQTYdfJU{{#pXr(X65pI3r0Cf_4;_)?&@}oye=IMBmvFbWIFm+3x+w zGemK?Z4?K!yid88PGAES2*QO!z{=)9Jax>3%>&l&_1N=ja*GlK4|1M+UUR}L%Pz+aJpYcHZo$2G&&9ki7LhPmsh-VfYIUMX=U1iK6vKkbcD!_$ zz~Xg7>!eDthhZgvwo#>~AFIZf?>>!v8|I-iXktDvY`M*L* zMYWni7h(*ksJCFv!Z)#R&HJ!a9|lG#UC#w#wyVu#$I)FM;lSp%QCzKqZ1g4ZT)Nd| zfus~~Vi1WwiitlLutX?{BOL?i4aKo<{aSqS_H#(vv=rS#9qO_JqZ8^?5~v;By$YYb z{d;U&_MY0S+Rfl7tHC#|*@G8;`xq8~`dgeG616g_&XMHCQ{eX-$^M`IB|dod1vJ(N zP-C0Gyg~N~Je(@zKNKrWd|1tn!kOAtp3j0{v2ICQ!dxm7ki`||s^bJjih z-ZfX^+Uu^wmDgW}?_T;XrAlO7il~w6uD)IY#<^T!=cXBpYLVjvPy}>jb^gV&FzV8) z)UgU=uD+7say4$g@h03d`+ofVwNLTPlHK@+&$eSnQv@qZO!(wjCEh!bhYt@I;gb`U z_~2+6)>ayDu+5JO*$po+3M&S(DW6s$l4VF71^Zf>wrZU zJ%cSL>rfXM2K^uUJ{AUt1_skCQwMfOffut~SX&=KDTB~&%cA(ZObZV3^X-mNyqjad zE`r@J50zmn1Mz{3!^l2z1aXH0gEH-pHY07-Gc-b_*h-0SV?aHNaC}-#@r}kO;16}7 zqnFQM*J0a^b*QY!hu`IaLvO;N?OU+s%P+8P({AiOR)~DE<1cb*P)FbkG2kTxoQN>N z{vl+RmgCb;zC<|#ag)Q3+&T@uShg7Xm1T(Z(Js5GVvC9yq}Q_^8_?V9SK|eXzg&o- z@_MRl)>E<%2^shB_M?LUK(UPkf5$_H<{LPxc4FLJ?8GUmVjG{Uij{WE(1+%s31s;r z$l)WG&_$jv>%x<#BUC8E1gKG}db0J@lmeAM0ZZ37S*R0>7cIx>)2G!|#-){2c>Ue? za40*6zdNG#d}(Yp;*F0!!JD6bf}Dy%6gE`gcW=LsEjbOKFv6<*FmlPp_c6k6Y3#%a zg5R4pQT*+38y?9B;xS71oNnMSgY`?f9=u#0#?SL@_!)tvkk7ZSHH6PgoOmbKiQloU zU$2z)Jy9&BO|GuC5Mcb+P-?~2ayM3=HeqA218b;^Ruo&YyvT~RR6?6eeArqRz|QIj zHkEp@gx{^KbYf+N9V<#K>fAMXW-KUkV{xSqWp1`Rfuq^qi85mVYjrOCZdW#zRD`gh zCV|x@9<&iC>$Glc+<6owBv&#C#q8@+Nh}3e48e9a&Lw;DyL`P0STxQvs3q~vF!bYt z0v~~;3x9vokH0%$#*@3X*h(f)V;w|wof&!(I0YmFbv87D!6=;_nHGyykiZJOV7|HvE!>l2`G2$%K5#g%{!C^Dn@q7hI%r z5MC>J!mhXiw_JAv=G<}D*8*$%z66UR?AWB1z6kg;7#!yyb1T6O7xHrCC`0`OmTVgMUC?Q7JsZPDrMU;wn9s&wCA97QK#`v5>Ks zhCxu798m!kAzuiGw!VwK>t08Bor%CQq;iFM8B5Lqi)3r~GXcv?N|$KwG@?CI=%RP# zq@`o!hp%A$7k@<9R>#ZGa?X;*uuQhQuw~)9_~Nank+yFmTnvU`2B02F`pg{}c=wsV z!-p^YBU~-yQ)g&7(~N*p&UmqI(Mx#wSAU6xZ@mIjlLKw0er!Kwz5oWd>00QmI|erOg+$A{mY)S>-p*`=&|-^WF0=#sxh0+RHA*P2ank z()bq4p7Ri%di`^}v3L(&S#k))H1vFJ5~mvc$g6Xsl#X6&?m)Gv9j8rU6g!h>^7KG2 z>cm0tAk}m5)#IUJ@%6w;U@=p%SO_HcNDm}+i;qC#i_qDq1_E@v02zjCE$XAB^+}h7 zEK+1}Gsj1B#)@u94G|uJKQM?M zGFeFvBMa?hpLm(VDyz7q*Hs7Ape2r@44Tg#szk1592ObaPE4uiiw_Q> zLfeE>$FtDa*^QCuDJ1&_uyHrpE|rgmHtCFyprBTRLnlun)j@)SVT_H8qVRMnm5&*z zp0jB0pQcjg{rS(Jo4@6!qLL!XA!YUxi7t*-MUmMSL_=}{8Fg%<=3drgKZ><>)H=?9 z90qI4JF%#Xh@f9V5XsYF3qfdAu?OqQgIH7I$J){WR-QCs6@6|yL1tsI4U6)4 zUKIg{;I$>+jEx0We3{jTm-0>chh0TjNMIu#gCv-COZ(?@{&vYWlv0%!dxo*4xEA`Z zVYE|~n%ybZ|4eN0vJGW7QZsGb9PNgU!O|?7dii_d4U9qK7(pw+{s0yAXN7irYD(hG zMi1Vr^We42ChTtZp^fcP*=j+nmBhjvh1S@E1yleJEZdLgS0BgR@Baoj-gq+s)-&W~dBnOzJbCCs*vS?EFUlCvtwIZ+5Eha1VRgST5e3LQcFI0A80hg;T zxeV7{aTRXo^(8OcJ$K(jU|FnyrJ>1!#yRDFK2ujj2IQ4Y*KtbR#}_?jNz_%_mV=P=$D~0|}DOx+)FU z&U+iHKYR+l#-ohy^o2<_#2FgHR6ndOW!SUod7Rkwp4!4)7EjC2#!Pl&`bOs%;|Rf~ zmofj(1uPQ81R#cb#$c?jL;Cs!nE(3kaD3ltM93Pa`jY7IT2Pv?9iPAQ8*E$gDQc^8 z)u5>?j0{lrHRjb~+mbi&>aTx@T`S&3&_I-(>cMz_1gDR#!n-dKbYA>t>|4DQZes`z z?<6X1BPjGv;WXA+t+Ku8`4@&CYczH$D4QW=T`BqRmCfQ#e;6Xhb{B3)gwx?Z}=1Xu)g1bn{pjhXDmlDtxK z3w`4+zJn_-ynyoe3LbY0=FEKr{o6ffrCuVMqsfJNUU@=1uW4SQ1Sl{0E?AQmQ`!Rp)vz@ z=V`FN#DEG$q1HIrIqj^5$|aKkS7r>u!Zz7y9l)mr7Hr6~Vcx+y95oK(7?t#IkF{Yh z1HFO4Rwe|{92Bth(Z&Mt4%plQw6q#wqcf*?A0Y&KNXk|b=tZhdof8!V1Pve-W50bhhD&sU{t@Db)>~21phJyDgW=ImOiGGzBA9_erks-B9qdu5hrDEU5dup*G@%q# zoJymI{u&~%xcGa8lynE`?Ksrr#*vyN3fqQZV7=$m>v60yfE@iK_Oy|v85zOQ5EXt33{U! zBf}FoLuEHP&=0+d&!e#+%Qb*BD)DMwdlv!V7=cBy2k2zI2On>9a~M0caRo93ZE>t- zVBhZ^$2*!Hyw%i+V|=ckZLh(?>UK1jeTpKOc^xN@ zX_nvMF(!VeB};B4aOwEGR{4y7H?e3LH(Y#`ZZFwOU(0J{@%z^ZJTi?|pq&C#CBm#D zBYtOh7RtjDs83RT)oEew8&klNAmFEXeV>dM(sl!#6VNkAN{W5icU_I+(vAgK+B{>Z z^#dz%99U59#cQ=r{9yY@yhY&sw8V}@ry5Y?8knk zQng%u`IWfv!b|X-Z(s1I1eE8JP+m;XkhCq*4JNDT)qX5gD>4Ri-L*F;g(K(w#d+s3 ze$12$zWHrj`rQk0^`)2Nw(D>D9|D#IWih;Y%nXe$0>&9^ww|i`HTOAz02N(k*c?YDz81>2Vg=D+_o7JdFP$}5WD^m{3H$Ki~Q zp@Y}zigZ9*TZQGHy@`)r{w3DUe*@{87h?UFZ{oe@e~yn{`YjG^+Xzin9TH^jvSq1C znH?ENU0|Gsb_N<(r&_tL(S;~CW!6Ph?ROvF_VEb2qD6$^08Z1N>(U2ausMP`Hvz)03(*^lMB-?~6$MZWMmR6RWZJOaz57kn4j zTyZ(ixe;^cJc#Gs_yQl$kYDCZP7-CVxV%d zxZ7d#bh32teF_fA2_`G<`P@!An5?w-MEX>k7D?ISPY_^K>7y~o!Y2YuY8ZY2{q~uu z!#)|b4fdnn9EUMD1Xj5kzmR-dUS&iB2zg@Yk#iXcv}_lPYZ!LVq{>8Gz=-pk0~)Nh zOcKl)BnU=~Q)uBeS|~Xh8FU?LQ=l;ZjdenJW<5> znUiWprZSiM&Z;ccRa7j8-IK`RwSTj_7)NwnAl|7(U9ND7&k{p}u?>2?>@6RJ#p_}{ z#L+%53@3w7lR1SdZ5S=qFf?W-fz1cI)dYvxg|;ReY8#vcmH`#OqO6ZTK36w?E6zGf zlC33s$6=3lsT~<@ENwilnZew}`mo8dBu-(n!GM1pF*0UHh}R)7x6?N|3CJlvbG&nk zz(U2s=ROB4ItI6fdJTes2pSt&V758YW^tgprHySKBm+;OT;qY;+lB7rAe@bD@U@y? z)7!|p9jG7ysO5bS+o54_ZYFR?I!1WU{Cx&!ZEO_Hp+TewGB*DZ3K~4fAcNmbNt(mY zj`7@o+FXNlO+u|Rk*#HAv8U_=D4A-@swz=jR*K4!Jd_olLVZ<*n$;GeB5LQk(WoqH zJd6I0QS_#|;di)sZ$_2rxLIR@TiR2`&=|M;j3Y&iA#YN>ynEb;Qr=%VNg%~13i#Xe zE4=vll$i?4i}y0haKagdQwUOgP<7!rsY;~Yyfjdqze8oUHu+Mp`#VXZhT!tCkbpD> zrm*z18QHYYO4h^jLIVoJK!&axD-M*Sl0I)`eQGUHXp9|bHVt7umES$f((u%Z4BYYf zKjGS&ufdg9UZT3QB>lapm2<%IO%g{@Es`2vy1itO{@(-3jZ`dG5qvKDYU_>jRQWD} z<>K#r7nfgjiP}tX_8oU&?yP$WEKBI`HmX+(8d_ZnR2mhqB-E_150C3%aL?SYUdDzj z5t#V=8hZp~r%z(bs!y@xv*(eye+4S4k0ZD60JbcD8y~#-GwfNr3e~w~hLl-WxcXwjP$oBG_8Wk#%qzR(<(Cc5hmQhVm>}JSoQWVdcB$(&kGE zkP(DCNB?}lLc4&6-^urV-Baj}C!wn=L*eng$j#WPfF*O!PFBipG*y>F@_qs1NPIBtmu~dPx?t_O8PI^H9dcZ5c{4_ra}gLfjKT*el8MQfQ$n zX?FA~U@3PFqShSaXGDFO3*Ht~pwg^QqDD5@s`n^hx%0MJxbCX&QF&Z7liB#f3kfC{ zE2SdYiZ8#IYUc9qsX=@hUy-TBGwW97sxC3vk403=%)TsF5P+`5`4?S|?_78pCGf?R zz?bv58!&hFgLvW1`S@hzLA*A94~n!Yl#yB1wesFt188M2^8V#HGbt1uByJ>+68U*FojN_HvS0JJ^1bLrW4xT4S=t zg~5={D?3WY0`2G|+p%^{!AfUM@|c(eRtDdE5AgdVdOUmFf_HXQVE&O-yuYszZ||zZ z2fH(|=~NjS>|q8~0t<@I1z0*kj@m`FNOk(oP6p6&l&Wd)DgY738@c#B9 ze3agZ57L|Q+>TN_f21D2-CKry--JqGB0%7YcA#ra($h#n#3b6=+u;re$g)T>7+odZ zh%APra8rAS_!C_WigDVOkARjyPy47!_}I;3VqFBiP(Ko3K6`kQOn6vKXRPDjVE>e}n&=YD=>CdejZ!wOuIREM#Svj`DXf+^`jnCS{j z(lJ9+CS9FWq6C#hM>n5okWS1X&@;+5npBH5BfL%`)P){z1YK@PtwI&T^Ud_%I^Kf} zn#-CaKkp&Thm^4=0Tv&D&muX{68vofagxfx&EtyMu8s8MV?6iQyPA<@?nMoW*GC_H zgty;*Tdj#WcI+7Pi;HmZ$YE?+yA1EW`7%~5S&V=)gh)ho4W%ljEFIu)_tB;-Z6*|C z=OCK_=ETWdWE{=mYXK@MH7eV-jdgaC_5Vhm8E+lcA)T`5pWfbpO}S=lG526?YX?3e zu)K3vgU8=lir=r?hFC9&2uqxVMCwo0<_NHuNTQ-c(Ht%{T)rbEOAi*dAPhyDL;Ojf* ztFExiFS;04Tzo06zxo>7b?fb43oI)u!}#Q+N$oGwW{tt*NGNa-U@f$JY$?NjL zZFV5y4kE$|5BrD7QmJrAr*+O0w9Xhy1V&$yj7IjfNJ67^L#Ow_pbtPx#ZueCKrY(> zHw92$=fZQ(yor16x)--zf1?^$yXmHzRBG#)ykK{#Szw}2q#JA|yYb9kEV8aefJM5+ zM9D~(n4BXDMy4iTck`XNnxJ#THP_;LvJ|=QoO>U_OYbkhXB&^;)x~>|uTP**<3qXD zi<(wDs#vG>IyYJ1Qw^C*t+vjb$cbv)iq(=pHn>O#{f z_MtWW&N@c7mG=eNsoUGc9^+g)&sxv{yXKXS1 z(bB9}X;dPeRHGIhYPBt>Xlh1wNfok7tI?>pP`!jyaP|@?CDl#6)=U6zLQ7*ks>|!3 zX)wX+AONur{0vmyST6x?0=>M~NZ$}rBjW_y0l51{P|QHQsK|vy`9>B4Hq}vW@)0fN+f^0`O^Xf|yBAuM6J~b= zk?u3B?-BUvOF9Cx!R%&02qNI}z|X+qC3u`Lj$wau53(Fn$RWVX7)nv_EH<=sV~=$V z%gX&~;i#KlTj-$r(}Yk(!j)m^RWr2Gc>K?Iw4hS9U2ytwblKY|-?bPnT`eYMo7*Wq z+)xx@eLl7=dWGdJ3xh!9U4GyWEkekQWPB61XD#OhC@1>?c%w^UC`B+;@FX0 zD&R<3r&@yAMoy#T9pfj^*uNhpj{H+^Qa)V^V)mL z!f2rKZSxMG-jt%s?L`yoa31Sp&XNOoa_JG=`p8dlH5JPh-@9B5-pe4pjHgHneHqA~ zDc@7&+}6YbENV>)m5c1jB7^$sxT~&Gy&pnUCA;x;EZ1IjHEtrooF%EDX5B|%S<3ii zM_sdxz~VuJE~HAMDTxi$etenT1~VCrj*QOi=|iid6V1UP7OHU{0fRPcbULATI8bRd zuozJ<8`Lqry6MXy#$?&x&&lBHOh^(|`hO3JBqepMXNU^O0liN4#P_N+JOSFQ?8YiN z*(CG1+OUzYqFMx0)O2GRb0mTJ^L2%Vq+gUwkbxykM^(Gsb)6yekels+%vO?M<|Vke z`QE_;{j$BKQA3I`2X7PfW7M#-27K(dpZ z>`5M*LjEd8NodRgOlD3%-ahQZ78e-t zvjQD1MsiBc0b7X`7SI*Fs^ zF)YooV_T&MnN%NNupN#_Pz@98z0;^+TW!pBBBRQIMiQ{aIc?ae?LjtG#IN`0P+_N? zc*CgNvlRY{3=F2o45o+#V?@%aE=+Y8ad6%H*f{T1^mr@;lR=gt3{fcz&^GeZ_F(&> z_YpOgGhWc)Cn-(NvW)j(+veriv113p|19dqfj=J9;`38f=Zq~YYr2rhIz7s$^7kig z$mZ(-g5Ar9T9g_Kc8{{o1_>$zX4<7YILNp_B1%wp5O5q+(dU3A7$wknhgJ68cduyn!dA0%mJObZMuU@<#V@Gu^j-5#p+2%3B@*gI2<193zpb8-9( z75xa+a|h$@7$W_Xs?K~=wjRcUNY?UuA(qP75OANr%H3|bYM=RvW*>g{RzFmoSx40G;(6c62ZKb6gF z+s3lb((cGW9P2)Iu8@hwzbdkZ zLrRp+FI_91ZYmlUVL`H*+D#>}A*T`h&0)0BCW@Vds5JGF=@VE8BrjD(@z0qCEUYKX z;`fUxQg~s1D@yqOIMwV6hpJIP!!K-e&@fLjaMoaakO7JRs_L3?;&d4do(N3w4xFlQ z!oCyPhXT6P8JEv5Zc`B z*m3wIzFe^iiDU?8M*7fB1)Op4IEu;}R3gk)tBv4PLBMK4UTz6amzR^AI92NRH2!^x z_WOF44oAF`DB=634>cp5^>QLVALR`VJl2Jx+B($K)TsSgvQFf|MH}qypQdk|QL~y< zH(2*sv`b3@~pNv?wVJ8k}71REEp>>B))YyvMM=}xbm{w2=awa~-v;PeAL%j;5D-Q0~QkJ|A88Tz}W0jxE$enlzd1yDvmbn)2TrU5K! z9>Nwr!%vPSkV_D%()n>>{Q^XqrFAATJUN1KzDfc5uy(_Ie7@)d2C9(S(F5S$&x3K~qgWKKS4RSa@&^o90sj$ox}5P?%tGkq>E9R=aqu zU!82j9zMen=QP&mx4}ZPAYX%36sxdfutNKfFg@1)$A}Tmvf0J?Y#+ZBX;YSP5D7_RUBlTJzs!3>S84om6ksE9L_##Wg zXB&gw)(w-ppM+TwZJwcOpN7lJXP1r7{EP=I=6Db64EB<+H^lg9r-GB+Tb=Ebu*64U zVyw1z5nNceCdLQ5D0Bi$ynC31*NV%w<@9l?VHsnUfqR)1CW=KCNO}o6UY;j|_kUJk z3G#uWR4XKb1R35a*>7@S8l6L9EM&!>5UZFIdjR)r3gC`z(1dl%Q1fKZ*kN=b(>>P+liWf;pDS5!; zZ^>YME`OL5`TVhm9#^@=q}=o1@=x7s01_=2~ za$KcTmHgz07XNsp6(1A@P)&PFa|3T>+OWj~EYl6*_2W%y_LKn2C!c?b_uhCDhxes1 zDC?11Scd%4dNQpc1Zgj)8(XmXz#+64jA}!zg6tD`=jCT`ENv%720Bn&dI~EytwOU= zN5bKO(O|`f9b0ka^hwZs)I^2!>|#9o`X5nIS%i4hhrCm#vEYj($SbaexPhco`DnpH zWF5~{dj~~&x)Go>t7vV*_RJh)GoZeG+KfZ)F{Hc3@Z0^hSZ5i*dNT4&yLY3Ipwi}a zsrzefZN;t~2dJnl42pxw)}sWJXxCZQ_2?(lmW}S#uiJ(KDyLJ~1=zH8FW!3p3#1<} zL_6;}HZ+041`S?)?_(T4l}i;xklC>lzxe%2I4FvRjDKDM6`gqstC|L|(>9L7LE!z` zKI|Z{Z)2eTv^;`zviMI5!>FeZO1Id$`WV)jrf`7n{KMTY(yU$zo&eeg$Kc|?`Yp`jUI!634Z?#3sd zd_s17b|x!9ffsA52%5BqeWp=-c-(+D>caS^j7Hjt2dk@M$f1Igi6UPIEY2hWg~8Du zr2=Oh2_~oL|C4BR4q{`+|7!S7??qBYPNebCVVn+-wwJ{60BikTp? zq1uPfjyKcqM_{n`!a^X?i`w#zqAfB7uWY`@dXe2={jokcJ0+t$6&+FE8|3@=6bu0> zmdFTPRE*Bn}1mjUbPgMeI@9d$j8eW3gm9pN7siu0TZ<#)t^*R}{+( zs4%wwe>ukTKMgEo4Bq6VO8FwQW4dBVL|rDh4K*+}6v3lwfwj2-9)lK%pbs6L2}Du} zHIvLq18{g{ACL)jc2S-M0x+4|(AZRi`i5#WHrAr4xn6Cq6!Q5ICvy2|>2_x)jHJ>= zR~Otqz9*YDSt8IIgU~tJQP~znxuqY~j$tZ=Bnlc__{Ebi(imppp1Wq@5oG}1$K#Lv zNP)u>kN$wK-&Y_b2vbb| zF0B;{ntSniZ3h;Rk;w|~>{bg_ZP|jHlbJ|F0_f>Tp}eRBMFmv|C3_f1I+0gbi|p)d zB>W+ac6K10Bg#cR_>X5zfu~KDqpRv{|ZcIz=o=YN=1O=-{ucHr(EQ_StOgXK2CsX zF0b{#{UoIiJc9d4PGxrJ>{$=s)6bWoN$W(N#)Ud6mRemHjf?|2?;zIJMhU#US0B}i ztAoDZ4~wf4dUr4FYy>H96kUNJk{$;FW<6{+n@Zr??s8)+)lU2FRhy*+S#RDL0Xa@! zkjW#dUbJ_2p`$BClJ2Fdwz0SnjD&f71c{C~hR!fvFg8e6n2^+H7nL@B$e)yH-XkOm zXa0=9LPIh7`Vb*d$eezsk&cwHA9+W2p{C#{noA2%M&?e3V%@mxjAPyWjfX!RhVc-6pIGLS^%;Oo@yKk4;rLVraMlAqJ#whP(w?aE*p|_V( zu>)3n92R>FW?NM4iQhtrS!o|aiIK17Zj`k6@Q3H$V!(e4k3IMh0pJk@EDuw8NSD?* zKoP)@G%f-fqE@6kOw@`TGxOa8O0fv&Jn<;Ogo@{($9{;12uweE>`^@apnQK0SiZ!^ zD-Pg~3-_b2HHk`16!onU0$>7qeMEtZfQ!zPf+^4iYoMFJ(y4$&07b@9{v!a3k-;^+ z!J&YqX?Pkn{&8qL;|w}bxy1@-Co3#xu*o>8g34yoIOdlpkW2M&l8pS7V~xmVFi@Fh zWqnD%bobEUXq+~q8Tok?WNJRtnXSlgs8<8^69Wuf6TBD=-=%ASO;e5jgbyv%g~-m! zphNJ7C&-s4CQ)2nioBXCRO`Gb*Eo??LU1Z7#qbExPdGJgx~9AiS-HjVMpMwc>^M=7 zt2XQ^C@4@0!A*d&+dQbPpGkr8?7mtYmw|AqfuHZG!FtC8{XmOmjTS|Sf->52 zWoaR-78f122XV>rOJIq}SQbGgz`8v*#?stqz_|Dz@1<{G67}?{!iqL%sIr@^UX-@9 zp|G?{Z6|;+2KuuTFxp)xH2JYko4{5}H+DGsFu&4)3=?gM3St|PWjo8J#sC(TSx`hJ zxw0;TtwkmrZVF*-i3{meDZ2(iMd?$(BH6T$u6Pfd-v0w~GFBn%u0(G<2#cm31ymg$ zzxEV1EcqM}uSZQ#h$R?cXoC^@oZDi<`bA%2_nM{f>6>wOU=Tgg7>;jWfsOOuhOV&+ z@!>JGRrDLjDzK))gGQ3hHey$$V-T6XQJjjL#r~E!KHp!3LPrFSzB6A7EP)=r$_8}7 z9;Md944RUYOg6bHHmA_YDl3kTh&jL$;jqjpN9g^-7f=cnb|e7(H9NtD^()hV&}FhJ_jf>pWUZk1#AR-q?=5-)TA%<(fjVj z1GDc|<1F{x|2STFXAwSJa|F+SxgS|ANtBs;P-E+bF*u4EV-hW{eg^146xtK0rt|73 zWsL+`hlhZ{V?v=(`1!XdOs8V~I^qK?{i<8Q%OcV^$P$u$E&iJ_@~0A}!_E|W|8EOH zMF2;-Ay`y)T9!y>mnyP4U4VvFi=37a!Nq`+1~-n^hf&&;qH?4G$Id{UUjAbVpu#@$^GN%n&O7y5D`>1m>a2xb|o}gNR9*?oztRbpXyP8X1WAmcg=7PP= z4Zkf2LyHk6of#SibLnzQFo-qRH{t*tti?vf5=x-UO@(T)@^3qutw~g9d?;&jP#HQP zd$n85vYl%PHB=&1^*SnuF*-{Z3LuHX46qOztHH3S!v z(FL8>O6B82gT~GvK1c<;A`wCbjiKT#xn*ib>xOk{+oD6P0+PYutonR-4aD81< zBtAeOI0mox49TSI@pKjj23L(WhUyj*?J9~^LmWoy2o@SUF=zfRJhL(rvw!p(TsMb` zW7gdYOk__M>BM7^Bbe?_{;B*ng@)mJKp>g8dQ$_F2oF0YxcFNp^a z^X~`le-!u3c?h@OHW!}=uo$V_8Rr`GGX5J!ogqdt)rs|*0n957!4OFj7-H~;d*Ea{ z$ry?!&S<7I*bn|{)mi|l=?uxHI@Xem2MQa=I@RgcTtjd*Gd zt#xHMwtEE%j;w{JH5YNO6Y+qXHf%;|;YnnrFGNk@Rz+MpsVr5uIzc8vkdeK1{_KiH z#zi8O%(A$vgg<;}<06zE-2r+&FTXPW7Gm}Mw{ZN}9t1ih(b*{aJEm~@ zP(J3p`!tq*_6lM?Nk}osJD9{cZ~QDeaP;6hy!rc|V8^mg5jJ|!6&-_tD#;oihJ}FQ z3ic^rX{Cxe-QdNMDmT`hHevh*M$meAF}Jbl<-b$J5qt&C+e{^qY8%`Y$$P&Nk>Ovq4af99-jji-+usLk!~+j z2hfxnL?sntm2(8PFwoULMPM0&nL$qiSW|LJ?fLGe%~ggck!9({F(VZjjn>kC7A=(X z&2}4{L7(b^3i#s$mN0@O7cw)&n(Bc~W)a#Wa1y{;8?@Aq>oyPOyf-TPQd02!=QKaI1_4XG|Hb0GFijhrDjUn$u?~vvP)|aZmM=e zb0aKmtz_Cd2Ag)&5*V~p_YS(GnfDRtA4iJ!C{x1Knk2fHlSRh9T=a83A_K%YLQ?Pi z{1_SiKW!~Vx_uZvp69a~VK-Ky$(W10^8Ki*szz&V0~~Een47h5nVsk$a774;(Vhu{ z%79YKz4Z6q!~i;J10J?dQ$-7$W*-3|fsWAu@aJJ9a98p5wVYafnWF^-A3Xehb94gD zv=KdjU-p%8^Lc_4lWmgo?rVU>N@eb#?FAWM1Xx75NHz*H{ldmL;17^w($4Z~eXvHR zV3IxYO(E!L12$hAT4Mqh#~7BFyD@v-PW*n^5#06tU*f7eZpL*t-=t=Ji2@Pe5T&A2 z3ICR^FxlKo6p9Sq3#iB@VDc(pBcLMZ&LYv2GG{i4=qyn^_xzi3KV!_@_~i3tyboEs zBKg4xc8)G+9o^8l2C%B38;dI9u*5rI_C^)3$TrNf3#{G}!HJ#Av31d#(3Ksg+;uZX zvl6F9G12KnUG9FY{Pa~E+PZ?a9#nBUOrJNHqd1zjL**H3$lr^>h!#_WeLQUd6C~@+ z^<~(+;$^Iy|CCyJuXdJXOi(NDsZ<46!kt1a7$^SE1ItVj%4FXp1JNK-o&ff5T!-x| zzd%iX2F5Uoq46^q<2B{-81KQcJ*%}*_we70V9D;78Y3o18PuTw({IlWWti8 zjhJ^#iygHw>?gzCbg~9N{ONCS8x2SHy1w;Rf(wD;HX75+G~%1oRAO1HGLy>XCISRy zE{~CYS7e;!9JmMoNe(et&mza&deiN=f#*tQ;~THK0ykbyaJlDUJoWx!ytO$KKb^M= z2Tff#V(Z3&oJOoDYEk77K`@;xdwH=2$1E{u;%8xrorTLchM<2O(Ex$lI}9(u(-|Ft zEkQ?;*>s71I(r{MWu}B<<6jlZR!KcBB~GJIg&@PWk|HxcR9b8)N@>oNVCRr3eu9UT zM0+QaQg}bf7-07>NRb~%=3iI0EVKlJCNRY743On?#fQRlZi$K z5bGebBnXB&`Vs5zL!`F{u2_PBs*Cm{ivnf;jtO)#=r|da+zgt@&>;F4RNDD@KY=R5 zYfFlc2pMXK*Rzrpd-!=jL9m0$)fevI{qr{%fLR@CW}-ZAD%pcx2CNhvG#-?xs)Oj| zGn6;BVBzYuYWv|RS)wQ4L!+hzo44-5w(W1TV%;Jqx6Y-hVkuE(b1cK!>0r)KakUkjiB5Uu4eqb2p zp|gmx%|Zlq8RwK4nf*ka6u~;oz{@5;A?xbryJ>eO;1r#zn8!5GuVh}>Df(s!-Mx&* zR5C_LR^md|(J8(j;oryTxETZh$%ZWTBFQgH8H8$ijx4~eV0_8p_gVZdhizEQ>m1>4 zJe}*qm&Gxa1=-E(Rl0gn%lFm1A5CHk#3@9BT}Uv92D+%wS^gDRWMBMqz(QbVJ-Rw( zlHJA`?4ks0nVK9T==h|oEpirx)8D z2k^TUM{)NP|Ag<|BB`A&QVS$iqDh%zOh1-|kMh~fRN|Y}tTE~KQsBaPA?iiOSR^Hk zq|v`j(mY*#1Fn|L=vQ6Ob7c+8b-4bzTL?b0Fni9!Sh#c}jCPVD0!xD|;I?<6jdjxM z8N%l!2`s4WgtfDspcsTVBHdy16Skpbd|oyGX>48j8u}6~Y=xMbFflMb$_U+yhWaDe zF#ng>yy!QmuBt_XwiYEolvV4oW6j4nviVbZ8;|n@JA)~S`k;Uk?a64ywx!SF^Vk1I zr4vf@NV3T@3RpyO`=pzkpZQ26{%pV^GdhCFK6D47IJjja)_(aOP9E4y2kBLp9pyd9 z6>+8u$M>zpl22a5?hRj1f_1As9VEX^#?F2CuB7XMlxv%6Ee(FFt|~ z{_s;QeEoN@*65I;)6~-&^~oUxEYh#oCP^I0__v+b;*;GaSeRu%i7e6!Pa~twj=%fO zbGVg8arM<#t3^%M-FPdml{xFz&?qjy`cIjPWmUbTZIOkN0ww|~0w@AHa;yN4yvlKx zTyW`3{xF_<&7~LP+RH8>$Xtip?|BHne}57FxbY}{v-}XU2^NQ~U3htW7T!tA#j4^~ zRM5d?K=bpgN~G(8bhxv0qG`BgrUro}BEaJL^8*WGFMKREGJY?EdW?ZZfTi8niS97l zoxsvbXCD}xKu6CoS*1)d9|mIulA>lA4E$6h(Y{`Udb;2wutfNKGCm{wZ^V*gXz!Nv z{(MHV{zRZ3!wj~v)1ypc@RLCWy2Qu{B77c8?>Njo44zbUon)*j2IJ)57|2h^{0U^N zM`2){?R|(5?D{$;S zcm6cnqlbV^<~}(M)6gX7^8_>oYTlzvh!J3!Vla&;2LF=L%-2@@Ls~7KOw-_< zQ(nAuK#$*VtH<+ct$6;B1~294@Y}<+c=|v+-pzI4rw6roaAiJL*7T_K`$wuBI9zQ< zBkNW2lF8%`2kW)GxB;Cq8|iC+#mhM3?joCJMTkld$gIfl0Gy$Im_kD^(KgFmXYls! zQp`WD!NTlTe0Zn~%kvtr@Msw_>Z2$kN%+JvfZG-y#2?n2z?>ib9M{}>C9b^sLbbwP zvKe14DOxVROyv#x_P4&PQo6|J0xmLpOw9zNQV}&HN=4SV2nc=a{7Z1b#aG}G#)C^Q zxe6CucsVY+^lAkxcic{eGwVToHh&eW8?DGZU55iFs&MdRJq~2oV_$YN>(qz&6&}M>ZQT_i9EIdZxhycrfXQQwBMiU#HY@wZui6z=j21y5xb}@i4FbR8*Rm?$q z9EBNKSoPUk*s$;&7@Kl=9Y(4tdNYgPP>nTTyorxqe+nm#?1h^eImY0ZBe_}Pb8w{P0?c}7-9N@*s)a=B!%edY0N=w67hR5PzIzG5fkyQ0 zZ>l76lA-ismEz@6+;-!gn0?1Rc#!JjK>~$zaeeQKt8nFI7va0#nMpeL&A*WRK$3j! zJY0Iww`rUNnj5djt@l4p#j*%*uRDxqRvf`m$2c-v(|GG(6Q12zfUPxQG|=J8!c&-+ z=f-~P1hixfvW~||8s=j_4Fwo@2r?l_A0HisQ)b5y#LaX@V|)OSP&ezYU!`sd3ZrN6 z3?^v|v>|(tK{hhuz%mFL?4v~PWg8^B2{r>ru^qco(`57GNJV>8aS$w=EN(WLKxD29Vmi1R+ZLRxyyszqJlKCvq?<{<(?zfv1~RD`KsqCCdpOYuC~ z53ecAUxKnbbrxRf&Xasytj9z!j!uGD4+C^xieMM-p)xuPojCvxf7@)ZqoKA1nr1zL zJVqesM}ba@L%i=N8B8+>ET>tAf1RPnViFXi#)z;dtTH$kRX3re&8DV)wrJZ3EMC?r z)f-h+l8jtRJMSl%8bSZyDC{mLpTSQ6a}rpB=pw=e*?#TxB`b@I!8YtmpqomhC(%hI zCRs4m7@mXqFbWIM*xo+q+DjLZhhjZLYN@0&(7nR*@XQL-L5$k<7U;g#)a$vzE~ za`m<_3N&_PHJEXt*?|*UAC77LIMU)}pa>)9lo2O%DP%M!aip;u>Gd7hYwSasWe^A0 z$OjuDC~QgLWOV>LYCSmAmco(d6b`eb+k0`4KbWTtqfj41xpfk!n)}dTOsQQfm+*%7 zJEzqes6yV?($-$JE@(kT2=#oP4ys8>x;scak{u9T1Q-tko0qoa?;fVQW1F)+B}bT= z`b>~@%k#O}wq0k?!ZvE6%{xtDSlfI!?jOVvs)5sOov5baX^f+2)D2@{O9$@zY%hMl zazF0=+g}hU9-+Fp9+zKoJ}$ZNn>hd5=iyuQ=Wl=GJY01Cw@DT+R;iz4;q%?MGZx4! zvD;-E;yHYsgPX6r4Od)zHO`kDVJsJa;~Ti_I~U-J3opi1mtKi$zIOvv(CxVWuKV%H zyp?D%NY)J(s#`s%(t1(R>O+k_gl4^T*|ozJZHF}wgFVniay9^mGX_mv8`dxW49h-v z1@=nn#xXwlC=KEaE4C+!{VP7e`_KId3qSq^DvC?h zlodTelpmvUPxr&nT!R!Us4qr)FNt01nQDy4U8``fIl-^6!5cSo~BEeKd?=1~)@ZBUXR@4qpHLKVZ{}_hD?#MOWAkQ&Tw( zZC#2*@4tZUtLLG$p`2hqmP~fqNd~QHY{iykALEbD`~+)Q8P?VUjP-;tnDXHG_NDmb z#b4m#SAUPZtYh%_Sf8*V_?(%DK-G!Io@^74v^S}8QERx|^4C(?J1(gfGzvu4z)&BK& z-8xGdl&q%x-W4>MtH^LJ{_i!YS4`!q(DD=)o(lKN`gaLdgKSf2i1G2Y*N3{NjV zjDyBO9I{W~vy*1Lm)@v=rIL;!$sFhBd$7+ku7JfWvxyi)C2v%eO3P1RaS6N!@L zN5|2@`7UVG)=bDO#tNe$(jmV99VtYfURXN z>;LJ#Dr{>WR>1O)**2_YJ+{=fz)mo# zu4zJ9eJe`!d~fx_9|}`>#So5ANw8jHtkYnCz!)Au4?(c8S&PP&W|-|p6qOaAp}7f_ zRgK8cuYuj3LJn=T#6ZBRY(YVG0n(`6^RiCkbgdqzOi^raieO{4AA1@T*x#7K7S?Gs z)!7zC)76y@>}^OQy`dfDzOz)lz=2XTGRlqMt$=O{3O$4drwLx;u=lX88I$b%PO=f3 zsceRZsD$`@GWJp7pHkm>851fAP?Ck9oHkKIn<589jHQlkDN}}GW|B7Uk#{?4h$7)tHK zDA)9$kqpP^n8s?$5FYqqKb~B+2RHrTA8`Hk_u`7nuftWBU#Ljo`QQ4AEdHnSaN+si zB7wXF*Ij)L3FU1BmAht^9LOH|x6Q&GH{Xrxuf7SFeE0G{0n3Ff7k~3Rxb*xBarI?a zQL)^N+ioEc-Sa5sFJ1?oHH>Cs5Y1-3TH|P8+v`ZKP0p0cuHlTPU?Ull6iz-?g6x=S z)j5#9V;#PD?J1-)ZjN{jGoaEDL-WaWy!+d~#k@EE9vOQ-h0EqpdGut`icFt(l624SseM-Ek)}_OHdN&tJx=18bl$1xQNA6tKufU(yXGTTctH$l(2- z4Ol#}X);&>C=D)7peQ<(izV~l#ivBX^&39JfwWCny5v)Q`u^+Kyk;3{tI823I?G~8 zS7ZvZ4XHmgiq`r@>|rG?UHT!`t(}jxYZhYO7w_W3H-3+K1f=x+n^o6CpktI0jmGEY z`BVWOQnYAr3}(*&%nX)!h8VIDK#k<2ASA78=ye z7hQp?zj=YmO8Tw;G?St9qVHaS%cx{7zxXQLb=z#*JNrShl{uJm=UkPlL2>|Hd-WB# z{L=4!1uTDo?|fxg-@D{um3U72YVVly2wwhRDHiWMg*R3n!Es$Ta%`j6Qxn0?axb&0;m%>QiC#EJ17&W1n2bI| zHkypd4u*qh4@{8#o#p4#@TC|a*ke8JSW6+6R|#) zelmVCLOQJ^MGR5}NVkp@7v*t)hUO=GiK$stR7mXuXo*kYaE%+y1bEpiUb>&+-O~v0 ze2u3MMXqr)@p>Ch8&PcSqpgf0$Usqy=Ur{{f# z;0pNEy!+;+R;6+hG;FQjg6xyIYVFDNzz9b9+3~Dg0nLp<5+Iow)@HYmMK;40@WSAM^Ic=gWSAo_70DWaw)eg4k)|^SjO>hl)U^_ENmyK$R1lPSn87AnjzGdpc-0osuHu z4E(+02nI-r)x9DsrHlwz$eZhzAzz!*AE@!3{tD zFSvvtah0THx$+WRb_xCY+kb&?N-Usix#+v!!PS>vp}MtYqR;HRWVYvA)ir*{EqCG8 z8*W$R^MY?({3l?!;6MEZF8s!~aS6$(+W7Cr+i};O_hHst0haYJNTONETrhpB3dfG_MB4r>1f{LWOxu8( zqNDsyOQ)5El>@LdSh{KC0T#8dMtD*Iizy;0^as)0K81XDH;x;kG|U(ZG+sRU(ucU? z?niLV6*uDgi>|^A7hHy`zwup_mGr91E+=cDgrzab_{zoSUy7Tqy_E(eDO~PV<1Dhz ziU7-X-@6i5U2zdEz4%+W`pOG%?WGsu%J1?T7hOoTbD2tLckA5`;nk0pW99w=yuCIP z*~Wg5sG-O^rSfSNJBD$xIfN690o3prT4)rqdz+-kxB0r@W`J_BUL29LtRLzBl$l2S zKHLEl!Neu076>fCU?)P9&f#Dmk_3#5Z&=h*r0PvU^ z*NCUa8LY`vz6Myl3>Ly7{RFch{|f2h z-o2=>3|*c5NOkt1sueJCVb{_56_roU}}# z(8Kp9EZEG~wAJg;n41H;r3FE%aGP6)w8J~FVDTd8jZXCR(J=`W!N9P}7ST>$NsQ!m}tGpvPT4RSt+Jl5ZR<3&q zF8=N@))8%jwqzyXSlF(X4*D_yD8#Z~7sj$eJsJo$8MYC8P-I0u0iuYiW@)7h2Q}?z z;&DY(EhqW9nKu2&X{!Pjdt?ZbXjZm-mUT}}!AUf^?-FLFpeOXyo)?yW?wp%+UD!VfImk7qZhRb3 zaLG5niOatIZCrl-`MCUoi*Ut7m#A@90hT*&zX!M6ey{2ZYoo%}+M+PH+hL-e2(Z{A zjGwFvw|4@P?b}V2>ki5LQME-tM2Je1B+I11=_7lvdHFo7TQm*k}h;4qAu zdXqi*@!4sS->PAmUS$V+?RK+(fs`<0mVQOMm$&y1FLO z+sA8kFnER|Fr~W4nkL{SD!Pf1p?HkP#d&RlN3fk0GzK05pQi(z1h6hi1(WE3o`KMm z7=oRjxp-f)Z+VOc==4%P^1UU@_XHM`ypNB=OrSAQKfm_cXP9-{1Gw?>8*%#;*JIYz zH{foT+h{oV&Y{uVaW~5>+6?e~i6mPt@7;Cm?;e)07QLIg%!8ObvJOmrrp*6}N z8zLhi>-RD6hgjm&`9aAlK%=uoMqx~yg&{Rbua!c;|}DVE!*tBsgL9HAHg8_ZCyONV9vFL-3)a=9)$tk>;R*gOOQJi9({yM{i zg~kaiTeT4-mE~yjI-v7eU}&qSir$V*+qT0cd)bhk+Z;0)6=Je^Sdzfa`qP`8SiWWz zH2OA}?KZS%^;oie9ddGO(A_(Q#PAdhen(ZqT_>>foigRkV{%Ct{lU5N_~4B9m$c!vor)^nK$AQ(7{ zjzIz)!7tLq07Ac&y*8p`s-kQ>i~&a|V>Y*jVW#&Vb&uo2QY#wxUdBc~%hO{!K}=Ts zGpt|-WyZ>SKhn%pl5BUiMMCFUl8*`OtPNppp$(hau6rsC__B&hs3MHK$Ryerhh99a z$2QwEG8qUz&9-BCSqMudYlCa1+ig*a2N`7WYLz~ZZ=`+6zAmrrZ^ipr1Ra9KHuDH} z)P!K7ovkA1ukup$@HuK2R6nTjVWp`b6+E|$pUpc|iEL{x)@tJT@w{DlYeO3D`2Jtw z;+t>71y^2%Yrl6D{rXCh#LIE@6<1QhT*c3>!3_kJn{T*L#fMq4V3NRcmrO;zsDx+_Rjulk|ru>yK379*vhtX;AMdSUYS z!V>I9AUF&cNwD454i6no@+X=pCndFupLOO7C()7WLp(~t=?ueaO+s&?`mqFI^CuBW z4Zuf+?(|XluudgutTRdlm+U4u^sBK-8Lx5JBJl9{{NPDlE!J)I0ZAWZ70jKGWgkf-Drpp z?;C`d4HO`Ia?q)b{7lclZDX)(b9OOEMexkC@8FJ`?!oQX-hsJf9QWUJ2Oc7L%)WaT z9(m|tf(w<&?0XfE+;ZcLQn};SS^Vri+&lMv+;Q9Oxao!)_<9SO$j!Lxj+=4+eY5cR z+G8Zt`RN5)7; z_Qb}iQV5t-V6kAY0vCUbfSH_tiFK{#t0P8GA-Du0oivhOc)O=zXP}pL3p$oYs=wy0 z0kRt^6PA(K7zSyCDSi+P`q4+{BF>wv`_V{q!8Qotfc z7iQguyT_rW%Gh3LLN%}5%HSfqQ8Lzn7>066`n44v?4%TveKKqWjW7eK+37|_MTHt* zlz%Bw-0ad;Xb7l{-Y|*{MpTj656~zl_+KI!MOi@+QdF}&Jv}PvV|ht2&6Ck|g4CJC zMHQrJF)Gltdcr8ItV4}Pi#}Q5KRJd00_?s`8*wr{195+p3@`$Otqavs1pVCZOA)$3K1Wp zCf#ppoQ&TQLY_H{6OKM?srDj+s%2S@p1|UPf%REL(v{1)*VARw4MRAf?Szp4ecIfK z1LY>hTEx5ezT_t zD|JaMYhvK9aG{dqM@vGo(U`!(8Yd0~#$e~OxMGtESVFWBM|21qsZg^WBhZm-unJMh z2VUFOhyD5lns`r7r)f|?u*l;%ucb9X%lqG4-+|pNeW>PVYbbM%5LjeNv`lSo<~b*6 zx9jVBvDut*C@4B7w zLKaLiHVE;&^R~M&>rP2hdyncazw@SBaQ7{@tBmQg|B7sBelyE0j0LycIv01`{Sf9a z-az1xtuT62GF}H`p(qw>h%vz12d7J>mv<;&5%n&>V)Zfxk|YEoDfqlmD&Yi@@m@p; z8o`Ln#HFHPob*QtAOsH&Nu`XhdI>CU#()4-zBk@Qa1x?3fOh(HH~qJd1U=aySvv?^ z((O(_affNUUrjX*(9Z=}gh2X}6bAq2fkpb?s2qB`U}NzyP(>2cNHLHk84$e@$~{+{ zK*HnVlZdkei&H?D7WQPd`T?S;2U(#yx8ZjbubcBu43mc0o$ckY@*zE~C|Logr{QEKc zwtFy#fN|H2w_r9|%dA=Vs#UY+7B}5_#~j>o`)sxFQ5H){dWMG|epIE|zx!@V;<_wwglgp>%$oZI-u`e2b{@>do}*>ZlaY8?CvM3qO5kwN zr~+{YDKZ78hmGnRK#~lmgN7C&b$8J)%&c>h45TGGXh;dgJXkfL{~^r>e4!u0i`oJF zmzs9`O=S;$Q$2wtdIojYn}ZH1GmQ-Vt;3A;FOz!Sb#e$dq_^X?Lv}oI%#T-^fI|$J z1_l;aifo6V5~8w{nPw@{&?F5v&cFSMF}C$I4SA-`!)%*C*I5|Zu7|4K*jdBiXBk3{ zF@*|09h{%9&S}IOJM)m%mcR*HH(EM)Jc)tcjGtTCOR&PS9#ze{9P9yI}VQnjl>RM?BRB!Gefv=YeZV*+52#T9MC~lO@ z!&WpIf{0Sq4>CyhGcYx@nE1O!9^X%PIFqx>EsHA&N<|(IPEtYD7;Vt|!Z^iqe!iy! zzduxqPikWL*)B6Sx*5pHcx8e^740!kpMp`_g=p{$9G)m#l%2j%4-)O;=wbWFrecZI zI69~ZT68wp_^d+&ixicYOurX`P~U8Uoec7Hc?`1L02Z~!syd;4mL4~9& zOy()OPDZKnBLo^*3nIH)CdpWJ3`k83NLf_2N30}oeEyUAKFmAbgu|vzWa#2(Vt|Vg zD9W4s*j3nw8U{gs-!%Pp6dth$e&?2b>S-e@sW@_YO(*MJwk@vWeJ?3aAgw8(!0DwE zZY-h#{ESlfwepYxkL7tLY%6hs_=DZGE}SCTHSv92*Az-zYkT$t!9hK!2X&-57w9ZQON+?K-Ih@s}?nsW!26zSVh8c=s+QU^n?FG zQuv6&EsmUpIg+X4-Uo5teGjR0Pb!J6 z!~w>TJMSQvFdp1-*ZsI__9M9Op})kkH9O&=eK=%sC&{CoMO2GTfW_AZuYgKeW`+s) z48j%|QhTKYVpM@79zK7HKG4ZH$T;U6r9vj*3sX^~#&~RuJ}FrVrU)!&6oTg(Eq$mevI&+xEcoO_AUR28lXbDi-b@Dt`wwIDpfJG9xxxqTZm0F5;vHEARmlXWS51T6+_$#$S@j;f_yc2$+`j1Fjx zR=9(#YpbMgF%wur1kMoaVFZc(DLzjOMx6<9vMGnf0TbUhn*7kxZY->8neFA}^GhI= zA}i=6eNHVu&*vWvY@ar^ho1M?7#T&Ky9*ZjY^aaE*E@+s?*x)8DF%xaRZ5b~RDdPk zF^W zY$(=aT~RBxR2Z;0s|ttfeP|%??I?G{!0YR&))t>?qAIgOOCtL;RnHq)7PNRI#~qJj zr7X>{Vl$6ldZGcl^IE9%KlGqvLT8-ddr9?j=bZvNk`M4v63)l*_`}~<+0Gxj{}IfcBUw1^RV(i2Fc#eR z;1BWe_x~0v*6)Ec*bOuN-9&Y6^iW-TyBHTpDg!+Th9wW0WHV2}${6MdN%uAVjEdCh zjU!HQh(~)>0^U%NbGA0)^O49-BdhwI%ueG5WY^HLtmC2h+YDJ zH`_ZJ?xl_P{s~xQTNBx#GbNiavOQ%haarq@pzZu`1(rrKD*=`$oh8BsipgTLB!NR@ z6K_}?+Ch|z(a2+=N%Xc;>RAn_ZOFsv{B-0Ood*ZnQ=4!Yd!();sRUeGfc=M;`qVe)xmGR!Zg3hkuOkKlWF6 z;_<)2WBmNV2Oc9sA$ZVmB=z;3cixQ$AAAr$`q7V6dH7)h2n|obtW1!NH5zi#5iVkZbn2~l;0 zX;l8;h?*tmm+9DIOm-jIX>fi5P%G={-SR%%vc-<`c35!Ut_UvN(vAzaw&T3L5uBG6 z#=|F!*v2}wvRw~o+Hv=aW?a6lgWrwgygeiM#_o1}XMY#Y+sCpgj1~1%d<+gIwyoXY zu2RV-h$bn@;c%RwC*5OG)POz%DUH*o(sPrs@_uNev;~3>+foYsW2VoY0g;cR)*kp+ zqGa%De|T9?smdtXIh`a*gH|&OXJojaWJQW}$w|6!xt>XO59RevP$}$h3gVct9R-qW zjlZ*>1Y~tvCyo$s_cSGOur3Za?Y)vwD!n;^-OWB6&;?N6cNRJZCYera=JjREY!jo1AjM@iY1T7$X374*1K`@iv9RuS{}AANS{lIBMK?X z;405KQ{=s<1hPTeY_x-RuSy?38<_c=-v`^Jn{kQ?XAtd4>9XioMXo_Ep{9*Xkw6e7 zKu76+QX>3L62Qv36)8?p4ZYLw^e`awoJD~57NU=aS!D6sOrZ~x7(_ax@EW|HjPbb{ zz+?@K6q$|aVZgR^Na6Ra<0#+vFwpgoFh)E1tX%`>O7+YXvgKr=n*f?Za%2i7)){dF zRsx@l>q+;SEHn)XI5W8C@xD*;es>Wp))2_HQ)wM&^r6~D!pZYoR8-B52x?{4pgqLE zC@aFL^hpq1tP?x!&(5}+Spa+nxl~!jo>8@~B}_kau-)4{UR6 z`#)65MJ1=aSI&Kyap4gvnuiELKfn*Z|JQip2Y-vl`1ZEi{wd^jK)6S1l;a3&{+~xEyEz!fsLxf8S56}qq(67 zMoT??+lztGZZ#w9T-y9DwvT{{EzpfP{YBFHNOzmqZ@j%1hchzOK12#w1XTWa0*ioy zfJ+a9h^!Vb&9A_!Ws9(V*9zq19Yl3a5l-i3VcVw7SiO8DPMpYAERJ;y51rK(n1ahc zh03y8tXZ`h%aGvT`ea^ShVuy z^ARk9n4R8))pRsHgXrFd817iwfD6_~ao)}Wf{~Q?Oxd2mc^d+F>3|Mewu6IC9ZC(M zuXmIVN){BQY9WAp9kB4x)JlBD6;&t*cnldfujgf8`5yt6SX_W*g1|!g-yz*M!+!!6 zArMsXsBsTtaYi)`Y9b0)HstGYT%W+gx-dQ}ao`{kBhxyJjOGs1Gl(2%Ng}Nwgu|u; z_GsK#SJsSLI*EbO=X8rj?G02*RkN+YiUZXFcuB)^PqrenBn2n$o4AEC&lEmB9LCbZ zK`bq|V|lFye>BALx5sPnE3)cLddmOpz#_9VrG3o2h7>>FOL4OOqn9C(ztW4>@(oy!ugA*lMigoz zD!*BjYRE#nx5ViWgHvA%EJC)V#0egqT=@JljHsb_xXvOzy0k~c=`{| z;+0ok$Lp`ZiKm`=8h`)yKfzPKf1cNQ6)!yhI$n73O+5F)AMuB0U&r$=y@Pi?T!4?~ ztwhGjQWzYv_>pnTO;ti*k$B}|yz+Q>kN!zmUEKs0DixAt0T!9v8KL@=ym|$vvao*H zLTp{T0+|O6AtUV|wrpI9RVx>$4BcLL9G$d*1OSXy3OfX3=_ z#^#eK$UTgV%w0H`v4={&{!g>Q{Bf%I-YLjbW9bePV3Ay5|Hpwv@*xSZ$TU-Vm?6HJ znhe;yd;wN|`7TUtrNAUDX_^skatK~i6Sl8efQ6sFgUX6xmFC$OmVqR)8p(dTayjOI z_(zl%(p@Kcv1uX?i>tK^8yCHY&)<6ynMczQ@1Z=S{&u-!-M|>^iDB4SoH3DwLn>*b z0E;Iiz|yA{{LqKd=7_2dwrVtzvb-4;wK^1+HKDY$3B|~ zG;#~_v2*us?AgB$2M(pPVviy7#7TaikHX?|lvUKCq_P3|W%W2++JNlRMjS1uLuO$E zDl`sQ$(C$^4wVzl!6@NmafCVvBmyYCutxe}#aP@tf@VJR&W1C%X`>bY zX=|9kLe;XT8y8W%e0Ot_z|u!B>czubb;u)YHPNAiU8Csk9fmIugNvXX>!hI(RHR71 zyp#ZqQ1&ACepSw`+la?VHezR}KB#o)&;d&IU^@ZhtH3E4X;l|dV*INz$ub3!DpjJq zPFMv~1`Po*+FFE;B6+k}B`9)FVR4=Vb+l!fskDjFWVdA)%M54mY^E6t%OlvU9Y!W8 zvylp{f_7CwfRLRRx0`zKVOE{maIBG_xbAqh+JR6T9K(k-alBdLM{#PJU}eCHOdV`A zKMB+sRTk_m>j1F}CEfvSEitH>OIhwwC+4F2oF z??^6Hk+d2DP%(nLlxUIw!V+g4N=fni4zl?Uey0lSQgsna2HJmDzM5e1RXGPJ;jhNW zW(s{+G8C|+x`tQ=;UAbO9em%xU=r%19rm(4x@OMlV0%dM6PW!yBMe9bNOcSlYzTz3 zbDjz-$-uJ801mk)(L(k+KdTmd9cQt$I*vmP9s>RZKFYG-1cQ7&>-XjK2Arhrt*dt8 zSdB|fzfF=s%a+;!mLy|Dg!Uvwk}JxTW-mcPN|Xvd8lA}(<`%$>M#=C)WbS0|lt&)M zELnSHCZd@95jZ?U>N}S`j@A|@%IXcOR8}>krd9(@t67!m8Y+UCX0;Huu&7*>^2%CN zR@X5$RMF?FP}kT1jkXo7ZCX^-vedPqnDIkORhi13d0$L)*OJ1$nB=T+sMLA z1Qyvw*y7`R4`TxDNOppBg}dO1_Ao~DQ*jU^8RG&xZ~v~%Sp4x@IIwXU!saIF+5vhy z;b%NOd2kc9u6_^Ih5J-jnM`mB$Rg!%5;av>IJSR18j3Q}7j|I0uN_@+KTq|*WGKPW z151&0WR<$FWbaujSJ|$3M6J3PaFH<<8NC0q0gKwtgMp=kjel(4QGD>~b9~*%ORxe! z&z>B_^jJTJJAyd8Ydv0h=GR!WdKnzP0ffbI=+MUwm*d@+U&O{0Uy{kn#;S|}0xT1J zJ==qmte`)>@GE@r*?Z7hoisiMtRR^P%hv&mO!4zbiUbWRuO&7sd!!Wj)MisEMl2w12W5;o}VJ2<)l|xi2tmlnXg2!v!YG0=iV~W(9 z>^&q|cE1i-WamT+8&W_e91fHHkHYOAQR5dDN;+4f6V9jvaK;GNAl%L*9M&i_^wl~N z&8B7}G#WFE^kV^*;*uJameumT5eAc;Br8HS*~QWco5RJp(15ba3RKtDsw@fyvlk|7 z0F5N9bxkH1`QB&?L1zgt#@+a z_IScW{A?I)tqy$h{vR>_{nwzc%4aO4VNTF!rHppL+ERk_oeOY~rLEPDSb|D7*^5@a z6>0lcvX8F8qR*c}eX9$yAB%L;$y&O2-%L6eS;z8c z0+tB^%MjeGFqvN5oorXDLf?DwSI9fE0~jB{pp53rZ%d&H$v?UcZ@u(0ELr?IEL0FN zo+s>h*Y2%&@8w_O$nF)y5^CA0Axz7Zo=KiJGKk!LvI)^k`0RssP}`*CeNc&b;zaZ= z0?HXxJTxwEXaxS?5c~m|MaBkYQL`{;WM&@gW&pQ(yIJvUcm|DzdM9)`KlBD44a`bV zX(T&ofW_uUFP&_rCjQ$p#^;H|W#>va3W};xRii_T&O^Woqd^~}GV&1sh4uH)aL86< zjyj`<$KRnoa}YqR;Ze2b#uB9i#QNaitK{mD*&YHeasLp(We|zzh#Dtq9VhdqL*BT} zfeSafa1A5k`O>AevlHiSh~koMUR=Jo9^YT4!4@CY4TIi)J~W7Lrgh=G9aJ;hg80Us z1g<5pT)82J?`-PBh1-U4Pg)pz$N^*Eu`46C{CEV5Rjo64g{7$u*F0ngt_21ZZ{NH<0Y1D2$X;k5-^q=fjH zI=55S$}n)H&Jc(s{~47ngHLr}3ZG>(U|y~PpPX#P$5|~XWRREs`~uHRAZz7ui;ih< z+&ZFwLS`quwYL!&rZY3?{dsJ)dl1L!yl7xxvoRPJ@paw_4;uJ=abOIGt0QWmo@^74 zuC-#faR|+5;j>F&9i8hg{8vypS4LPEFr|x6m45{q zAA`0OKLfg-Y9YW9>||lxNc~8+SFD4;-8qB=k58T}1bZn7{#KlIFD0f5eN&18lz&?U zWO!dJQT0lnWDk6<6;hTzzaqf>D(B zB$=rtFp~eMF`6~nQLNRT!AZLDn%WRn>Bq3vJc%t8R@FVbtTu&@^E`Mdtr>3})8n%W zKi)5-@42axc&(7s9YN4X#_lCa3CXpkd<85Xf{G_aJBcw4v3SE{@DpHy9g^HMMZe@V zR7Q^>I2fp{{J;@QGO&-TMbvs%0$N85b+#xf41QQ`^jQKzRgIRQ(T1iL6Jt^mBUHWr zJ>NewNmA6FLX)NinJ2SQS*M4_;6V$?X}!j-6pE3t%|KEqvtsS^d8@abubl*xezjgi z07lIaWATP%QchCsO6rUT83SYnWDk7&yrifGAHDYqmVN#ne0r*t$szJ}vaDg=9Pgvu zZ$nej5**p~94c#T*zVm(^$nx8)qp+gKSRNR^@y}q5KG9!B+fIQPBJbB0#sGU*J9`L z*Kn$+f&NbWq|L~bV@X2k=ik1>5N(jQ`sV@`ahep1tenr-y&WIC{3Q0SUqC?R!w4`i zASz%v(}@F{7vYWPeu5Rt-h$nopo5%2k~e%T^AO&D^;cLq{|&f|ym11HI#0XPD^{OvBdoRp$Q*(x|pIoyVm zr^+aMYvFJOab|q_Plj}s6*Dn)R+V#~Nts~14UJ4u4%<-QU_y1HMQz^HWDKLxKs7{Q zaS+V@SAoUv>E`o}pq_zmzIFl^Ep5hmOLX|=8Y+wF7AXzoTTl}%JPn|R#z5WcxDh3mI>;;KzlIBN+wEBW_&6TUP~p!o6h3eGHmk2P_O$QY0n5%$*N0;7N%wK*v&3 zbUGl&fK%z4#EJq7P6W?lzoie0OKhm4e@UwJ{f(U{bdMw3GKiI@j3^{QBUa$;G!2#) z_)$ZCBjYYIWmj@bZ9mA*R7{b9;3)a>p(7^gE z?wQ2$!X~uwI+AT7N|Msf=lH)JSYn+$EM4&Sx2w|L-i3A&ix3ebKsEDqz><)*qzme@}V%spxsMJOR zENU!|apvoQB}7sp+wuldB$~+>0wLOLm~~20g_Sq zSRy2cew36pk|5SXXK&N-2^R+h{Q(ucQH0^;A6smsX>X z@yQLXDF6%On={a*0L8&qQ7jG?E8~ImqDYsRY(?&iNHD( z@Yd_kVDTq!!>4OxJY;1GtL422u*mMJWhXwt(H$=;VDS<}#eeIyM(o}A1rBeVKLadd zG<2RaF)|a3?e<0--}N~TZ~hS3h4pGJi`a*(yq7#-vV)`mi!7r3^Nq34X(gRNJeWX9 zb_N!I{0u&P?O#w;c$^PE#!BGzh8S4PrC9jkQ<(qZ(>R#68g36CBqTF}hSZjsi$8u9 z@4WO2oH(?e^+3ukS&=FIJeo2re)oBN@XAxzvThA@W)G$DIQ*_r)rH~>Pbk(RJIMtD zl<$p5=RcKjSd3?L7j&o&n zVw|@>V^HUc7}*)N&$+)x`p?2lKq)S0LRGZ|25UPk&Tg3P?XcQqr^T6l`u*Nc1Xw(N zO8meutf2`OI%&9*h9z>no26GRka9-pP_o%q@C*&_3|!q)IN&{tpB=a2!iCkiVWRE4lU9#JCvUZypFRiYA@XiL();_qQ# z?dc~l_4677yxuTDm0-g_Zb(exw1v!*b#9N5R3BM*xNRU5)#4BPS;}X5e@WI zNmiQQNm~SO9JOLY>nPS}!dTtl2Y*&|(S@ia`|0QBx(Wq+)pTrC2(GM$|E6@v`T;)E z|HIyYz}J;s*TFb6U862pu_Gt$`5Zfr`)50j6UTPs#F6c&Shi*L;!z!qW;DH!9QFdD zcYp-|39x_w(R=T}1Mqt9y`%TCzP0ZIIGhoN)QI+f{P$0k_PmGtZaru3we~vq6cURp z$17%IIavv2mIRX}#b#-9u(C{SBm`-Sa)}YhUo%m4ya$?eYZmj9gv4YG95JtA@?utq zghZ{72$PlQJdNcWomET{0cqYc%`L$+zlad;NzBb_$cuk>bcgr3gGeA{jyU6`4a@@+rC6y4IvC&mB>g%UNtxv-WNl=bmh(R?^sONV&p7L{k&u&R+rZc? zeT`;tP%)E;t;7~H0Zx{HP%J>QrCF#XE%YUapJe0RfrqNp<=A0z8GwPnYPN2|!dS5p z3+%215{VZxHV=V5HRw>q7#ub*SL2vXaDn*FoR&1~C-1@%3?aS*M zSlimXwM}eDWx>t1VYK#8xhShdnlU(O!8FNBV+r#!!0Seo_bX~kNa=Dc1S89h3yE5p zWEvT4dP;Lgm4tiAmcIC${;c=9`+$Bj$5*qCR5O47Zvh}ozOEsZ6(c=}7I zE&477#!SSLC0KkLOlyLbsat`3bWaay2?C!{~LdcC%^e=T(8W4X0!{cfmWoy_-#D- z#gF4sQ94HZd+B5eMS7ccbbdPI-H2t{6k!D}!RVIn%pMeCNkTgjgnG4iMzmseirK z&{1VQeN&77=kN`DBwdA1j{=YDfYU6)lMx_;CTo97KYt10Z(p6p2ah-5*Dg%s%S^>z zW|rMR;OwCv^zojXxZiQ^_f`J(Gnv!)xokCFZkxdroybQiZD-bFj&2j&WQ@t3i6u-x z4TVT5;*<(;(CCzY0%(9>c6VZt-b))PVoAP6EHXMcNMZ@l-^|{1Ffm0R!K5Rwh9N%7 zAi+tVS0*u>=Cky>=h4k;bj@y|pZnHwdpGN`llxuMtijHGO(b1qy8mTn)|NSBOnPyR zIZO`$ZJ5Voj+$|$Kd5vymI)GN%8>K?y^uh8k#!+cjOcl-fB<@k@o?KasQ-T@7H@*r zpi;Fgtk9N}7x!Y`1nVXt?`7^xETMU3wR3CAM3;K*S4qD-(-lJ1upd{)LMR@e$B`x* zCJ0<(jP>Vg#_(dj3h6^m9BkL(>r|nCTi%BTGyRL?WAn?{3F3-m%yDAPU5Lfy*oNCF zGYmwjuw!r$dz~a3JL}8pkOko8Ayd-pY|AjY)|J^hRQ4D~O)-p_g0 zD$)`$JHM%j0*Udx&;4v|YXkH2k+$9`)U^&lCCy({D$)Z?Uf8S6(gYV*CVG@+Fi|gh zUR%BkvFL1!ea5yBizpQj>sHI(byPThs(-cChU?ca;2(*9-~P%c(9?VgOEC}PJ`1WV za`CB8`~gai{sTHMzXUB6kSs&tXKYNHXVF)C5jP9Ypzww7!Pr)Zbx|vPzVV5E96S9T zRAhb*19dM$&wG%mUF7}B-phMgMN%1s9}*?=qY{ho2m??d7TQ}~n%L}@*>vgP^XrH% z&N1Uq<9ba64jg(0kA36wc(WG~iEL|*Sl+mu%II|bZQ9}?aogdx3lc=NQTv*dg3lyH^=(SHgWiS8c>&^=^E-$%o_ZVGIe;^4^M@ zZFuFn3XfNh;N(~WH(3VqE@_aTjn-Lo``0i|LeMjlmUZPt2}#!x86iH+02S3DV_(`y zQqqg*GOstvePs6DS(19hy9#-?B;7T|q&aY}`=*%u7Mb5sdff=I$lv5-#Q7|;OuQD#=bI&#;w)uG{lmGhtURQ!6aih8MZt5yu>Q6BLwq|7ERTcaN^k~@#43>isR3H7YCmF2EPCG zFXH*{eG`|?rRLuAC{0-FR68VG`oG!aMt5T)DsqmZ?Ce2YDm{a1<=H4mKTJD<-W!+U zQVr8DB?(H|?GsR@OjL|?GD#&OMJ4AjG&F=AX^GkvqLQYy{r}xFu}EKfvyW0#X&dx0 zd$Yme(nDvMAQ=o|bi5m56Ft!Ahj^R;p@j(ib1Xof$Ha`!#q)|Ihnc0yV4$g~35*PO zW4Ny!!~MF&YeL1a8@=9bOtZRk)eHEA3jsWEY6kBsb}06+P z&5P))uf}A58)6m>HbU-yfy5Hyr@W9{*iZ&7N^^z`xRP-x5jtd;*`3$1g@AhpQ3jz* z_2TrdP;DfsHYoj=DVfCl1T1fyP7;APlwcuI+EdPY?SR|L^Uwo>UKuPzXOi~~?iJ`6 z&<4t0Yhv!6iREf_BMf?8jL*I;-X!H9A3O5pb{9&O$s7MklcD^R?53%`3qz9{I+gx@&h;jaW#->zI@dIVxNLY1zj(um2lCWN%bY^m$w{Q0*3*o5cS#HnA28x;c@8wQ z45ex2f0n55U^e&7awF}84{15GNXrN#?VNN$R^xZCSy9iR6$SLCOt(LBC4jWE9;Cg@ zV_q5IcNKpAvIie;@I%Y;9p^d!`q~2SJHqSc+VEhp2lwY0@y-$l($Y=5jt#$1X2nq> zRStd09oi<$1JOhbBsvac1_+t$2SV zM5-#8&`)~%C=>eeyKIx+F4uITx~_+ra)>^dL~ZjBnz|+lj?z_MRE&_&9ZX{EPPX4M zZ^6RBWs-$7)ky~ez`}AilMrO0Q!#nZCf$=|9yDq4jId6`LLuoLMTHh&Tn3h4ULBNSaH7BjI(v4s8ffP`NO2=*eJ_e&Mm~ku*M8=Ma?ABF62TSv5}Ys z)Z8JGw9Iv-*gRyZW(TijCz;8MeX+X{i-Tk&vA>4}qErm_gtEX^=YS4cwGBHG!nehL zD)!~y?XjPV^Edm~GtiH&fng>R7R;F43bD-C!gnE-B&_zhVlo|-(YXXY@y$Rp$`tzU zMHp>SVlPQunv+=$vK+Z|0J6}3L@7Gyhq88yV4u96kg;fb53fnJWMu-7WSPstflgMg z*PVdRpM+mJhs1a<477i-#G<8Au|(!?5sQFAkS4_9ckL)9-vfaiO6^r;AdZbUYKcZ+ z42R*HWmXzwM&S*?;Ul?t2___?05i@oLByz~9CmP<^!{KW8d&&Rv0xZ_N}YQpmhubN z;Fmc``0N`}PW%+IND;;x?Fawu5sUbw5KG_Kl;T*UT4pZhyA#VWWyOn?(|9CjkmN8< z5T7Qw=#W-Ka4!qv;k*Fe^{N#wTwPFJj2`aWz%RXU9cgDKaDNfWBs+n$vNfcYEF$d+ zE0o0Yhc`V6sicoC;DaYSd0rAmhBq~qMMmi7sPV3h3H*oSZK&%{DwFp;HUKkP2;k8Qo`ww*DGuJHy<{dgA6A0I$LN5D}#apqv5er=lT1L_&^H|x?z(V~suCdowR zkgM0ll-alqtdnM41eLu8bQq#Akl004_woCHAq)%8;ie+Cg-8-45?SW@-id|D>~8#v ziCPgHn9>K((mf4_wBzq$-=0ZK|FDVW-oKHFF|_scV?tws+Ty{q#fK?N@Scgq!eedD zD9qLXj3%G5qN>%yeOcIg;+)-0Om(d&&z-_ne$r(9B$l?!LYc|aFHRqbBbFdz$H>a^e#N^12c6x_>#JB$_ev}k z<=2%dDdgGL*HX{DwUv5rk}8-zVJ!B8&ZUqLKjqhkRuaqT3>}MEu+B+h5ywh7)oYGL zAg85>C5a}2^Pd!xRMM$Dis$hD<7T|~C{;qSA8C0mq#Yl@`!iZmG-!v07x_l-BHn#y zl)q7>*0;|9D(luOPW9y-5;M~;u;6LnstY3J|_JKmcyhWBJx@xHS@yeHF-ck`SN zmr}iyZ!7k~l}Tlk^w+2kAI;0 zgqn(^Nxh&<;VxZ}e%^NPA*eTaqTc9c#$eiA~QIQk&NO$a?8ib!FvyhmB%dkiDMe!O#Ao?%WKv&}s)g+8rtG5=Sj4IHrN)xLZ=7gA+9?+vy0C)xpRnM4$IQ5|RHj`av1HERrwV#eIABv=I)Anyi1)lY ziU-S9kXE>WcW1fq!2&9gyal8cEaB0U{yF#=0EWaiE{)jG=G($G+d7VSSW#hI!32HoO!YWkq}n*t zq{j1C25{XF$2k2gzjX|mohlUaxQrerx)@;X4j|*E8C@;{JL|3AG>cJ67kO!Kpban< z@}^=aSI;V>BY(3Crw1|F zC&<9}$orT(*=;1SukCltTQC`qoMf2k-tjvyXg zKv;UpMftmQDgT#9EXqqt2AJCiOPLEu zWezLrF1+Sg$z8`vC{86dXxYIhPK@9|63e@!IqPhMAWotvicu}hDNR#9eR34Xh-wro z_}b70-j_a3MdLtPwoJ{!eZ)@M@vg(Y`1SNk98iT(O%VOug-NAJEv( z38I4u#2bm?t=it8!W6Mca~OduxUowtBpv@OlNAyVv)4(Mo0IOTC7`!@w{gR=2=0bq z5=@mQj!WtoYDp9`R3Wy-9ki?MxHdF{CXF3^(zL*MkZI^|Ooot6!Z}vgi%X3oXdAUc ziGgQn3);{wJO4?;C%oNg_RH#!0z+@UrA^N;s<}+g%FpKn)L;`#s zG5Idrdim+$Gv3LRi7fA6`yKOEY@V?@=VhIe2<&|R z2FAzp7aQ>Em3HMll}scmlV1v{$P_Zt{3YXCWH7CHmh~1}BOXw(#5bwTs4)4gZXZ8o zx)^5GQ8}Jjvy)DhgT|(OT&OsVsw+j9n3-l4D1EM(0Xb#F zJtg2h63f_#2Ca08m1Q~(pMNiF+1z}iQ;F^GSj(%FrA7y;Ynm}OW5Jl(K}ShIWug?m zi(^ePWBgKq0gs&Z;XVR++9@iP6I2u#B!r4(JY4F>PrTa4jNFM~*5flwt3RAQLt?Oy zP)I;jDT-R5qWHjxA$+v50|l&;N&?^C6bzCScur9#<+PI9h=uAz-sKdHP~8wf|GaIU zw_r9!aQQC$Y=H(xHLPpyYxYR9XR3XDKeBi$b~j>)#aHNm%-G`0 zf|J`Y%u90?RTJHGl7OIL`AL(DbQhL&(q-BZ9sS;zSf|S2F(eu7?1nNfWt`wSNt5;Z zTRro*$&`A6$jK^!iQBdQZ7`l$SM*ILO3V+GC71{JydB<6T-U`g%6&|JAVz|XIk`V$ z!=spx#IDJAZj;}f1UBi-wD-G^i)lp6U1V}-bZ*iY z*OfI>rj~(0){VTUx*M^0hy&8KTHb}(rRka~%)vMeGEQYJB$=UFdUCmm8!{e8h{ciI zf|K=SA}MuEd(koJ!lZo`3{jGctkX}jkXam9Z}&=e|O`Srd}*9@}U{W8|wms zul?H+@cbd--^--(dTldCCiT!+{Fv0ap|*yVc)wR-nVFbD-Q~-;alRB|Bp1uXD2$^+ z7-()p^|^DXtggb8Ugl3^IZ!Uj9EqZa&6G0T-QB3WR*A8mT9_xBV47$oAywdNX$ER5 z&qF^k^v_5vd*vl%y3YW~yAex}0T&Oj*qOHXw%P;=#) zvIf4Jpx|c4WAi2yr@5U>-bf^=ZK?0#P?E8TbBPpI$YsK;sFtZoBUV@V{QUpM`W9AJ zc;C1Ed#$Gk|H)U{UM~_eok{w`clN5F(t4E9wkn=qoJvjEt(Ntz`6*M%$XW-=6c0o$ zqr8;!t)qP+jwh}T-e3lF_H(#B~ORD+K*@2)Hu~|f{8Bd;Bl^C67e~zo?wjG^9mvnUdO|~c`fg< zOfk>QI<^dpJqVe$K0<$vk>q54wgidB<64DGpeaoXhQy{~_9(%Xv9L%W77H){Wwrq^ zr*{q^g05_nseGaY&pV|_ z1SHKL^U8N0?=29aDhMw^t#|R6cpuzXj`0TPmER*IQJX8Oe9GT)TsY4ASI#x3Z1)7_ zlx=cuIZnQ- zf95skNU&5G(h?Eov(F{A;3Z&2m_hqI3I5GQfzK(=;116tIKM&SSb%?V3w8pUGfHxj zfq7CkOkAAt4On?CV{ie+5P?=P#&jr2OVHx97!^(IuEetUDY$Su21s(LHW7R~$CcP$ zoM#~H#`T)?JHFGu+u~o;PFMFB>Kl8YVnR7%@L|f}CxOf|-e=!5{$&Xb6U)vdc*c8o z&@Y|zJEP2LXpbVqx-w~WxKxyf_UdzRj&)$cK8ZEYG_b&oCvJmfv7#gt{8N*^&g}8eh`muWSRGz@K%Sj3EaFWOrAQFo&a8nqc)d+Lq<*4JNOaMC=sy1GgNTEDfQ&FaIz zz%*LhhcGl|fW{OcVFfUu=cka^U5G_y0G8&ZB5e|nbw=^$O)?z|@P`ds__fM7elFXF ze{*0A|A{2?)F{x%%eJwKN@X4Ju}yq;1bB|VmSqCYQ>E1L_W}mzr>+_CYp42g-#HE5 zec6v+EKlM$&&}eGE+z5z&Fe@fe>d_xH)&sKoyAX|9>&jQPH-O+{<0~7?`eUjcI_Ay zP$R2T1`Nu4c5!L?q=iT@`;o<4vAYqA*BwVd-n$VD9RylKXcZQ!kLy!GWOf>qaX5#X zW^hX7$3-gHSKDVW65oM2yo8Zy168gLlhZmFOg?C-P=`mYFtI*d3!50T`IVVzZO#ZR zwh)E~HPFz%O!^Q)B>ZqFH9Pa2h(*XmOCXt?b|?g5WTx6btW&mm3A9$$_Y9K_`Fmp8 zj{YGXbo3D+7rS)cXd6UF&$u!xZe!~J43@wxLK#z;(9$uiOvT>WJE3%J5ki<<+@Y`O zlw*4br!g{N!1xq_h0h_RBD3u3%|3;sggizGoCYR8^4(|+V0c_l5VR?uV-s$LTmme! zah(stTB--LA3gl7gMNKCVv%{>1ep9X!kphxPR(vCL_#dz8+q^G zcX@yQHW3S@ZD>j9dKhG-x$G0DJa-J4$G?N?=Z|4Mz=xOl5M)B7bw)ot=xr@RQSP%S zDLeq}l#$>RhtF+ATk~a{IQnfA=e!87X_yGkG*qUDUXJosq8M(wgxr&_prW_{W{nLl zX8>L*BD>prS7O=wZeZo6oGNz9sf1XZJZ5srj<)tOw6qOjYQ};XD@cmvP9~fw(~Gw@ z52C$w6#WBQOldqMmN2FWOp}H%iG_}36V)<%n`6yw4yrUS=C^XAl+# zvu&yYqhlT8Gcla+x8d70D*VU1A^c|9B%ahbP)pv`uvle@*inMB%-lP{I&Nb2^a@Gp zPbCDkmps+cTvB~3-r ziDQ;of5=Y4dytcH4G6n>`- z3yCCbW;>c1J1{Xm1C7UpqAOMCYU$=aY652%CYK$(lcQ+v>!*^8Fv#Sds4i&kC{?mp zL;_8ksCaKdl22?2D*DXTnr7%tZnSp}_qH}0(XhmUG4r(q{!{-f?cx3DY6$zi!6J3Cd#NvsPaL6dKIGocj zs!7IK%ql=@F}X0u-{#{BRJK8MwsxYutqWF*6Ya9xL}xE1v_|M`Zj#>$2~LX0?fQm3o~*H@5d@L00$C36tV0jmv6)XF-bN$yQh@+pC$>$ zXV-op)@1_9W!mlA0wg+_wDM|oGrBt_FherY5l>VaS%bx=#Q&5z_NMV~U=kq2;v_~{ zc|Uqn6tXa(nJPz`Ozo~1s;jQ!YUO2IE-ip*vX59ePowj1&GHTwu{`HT+r>;2zxqAg zXl{l*5`s1AM}2=ME)r+!&mVzzl7zHEP$8zv6KwK-W|sjCl?QOG^jXxl3_;esmx)SU z(j>-DnS|0QGeyLxCf`nCiLqj%K|Px53Xy&CyC}=<}7kEzK1JS zXJI#c6k-VnTy(r@9DM1kI82-Dt7X9vEreLaR{dzXnvc^5pH_&)#f&FJr}F!PWOv71 ziN(l@l27RgB2Fc3t0`hhk&9}|MdzX;OxdV9hH;~=9libIO3=yeOYw*}ksy`7m)CZb zARQP|;mY+UbajkjWKd5+azf4XOzQ#)v8XNLNON~3mQh*whv4b;gqfX(NtOh0CMC+t zRH_0a>#m-F`PtD`{GyDs&nUrHul1m?J&H>M%eXRb#f@nfO2++or7wd2anXf;f1nHh zP~b+n4(O#1H1a$>+C{WaC6G0=h^N{Y@%c*u{7!}r?>{?@4`!-yfcsJqDQl}U@n+T{ zj<&&ImR>sBF#ESCmq|2!Iva`55s@YgA%fRP;zzN&5lc9*j5%piV)h^O5x^KzE(+Ni zA>HW&PIOxFa;q6PNwOK*ITTNZl_^@rsXWe{$wc;4`-CYV)SzOE39GZ{yE zX)zxA(${hP&6*#M^EGE$qan)tKa1LU*c~yBrDz*N#{&v zJ}y<)Qnfhoxi9`Bvhzxiv1bHFb^1 zEk1|dF%>K%ohgk4xrG;yUs_3jPq2JR5V8(Pk_wRobFaj5J0{$Y0V&lYih+u0+@efE z+uk{f36+u0k@$h>UG_|Hz{4c4cVHZstLv5cpHVrW(Ro?d9;gjL;z|@MLxhTjYUM7( z;^1~676VDhB4b(jw}-0S=}FL6uc0_EAK51kV@%d#*t)ZOq2d5;wvE8XxDsNK z@kma_o-B?ioiZHs^SAFEO9;yHva{rr*XdE5CYagMY3VjgQeknQ`Am@~n!4^R4S4y!W&Wq}1WQ zvLw<<6Us>Whe~Zo%hThbf*Cw`ya~U2vIDvOz%aq~n-joqSI^-mGXr>cwyeuyrJ0bH zZ&A83|NPl0JkdhsM1d(&i`!kiCbM2u$Or2(%Qm?RE2Xkb?e2(fDU%{fRx`&sNb)}S zBa63Ud&IIwC}OFXiPAK-34dS>e$SFJkS|O^b45w)4Ekn2P-~aD&Zx4eq+|;H67>pt zNy=fmv3kmh0|yS^JKy~(8k?>%i1p|l>c#1dv$)yZNV0U}K>7)Mjlg{RR3=(FnsFv4 z9sm0iAH#Ep4_{z&vBb8`qZX#K5zn*T)F3v-1G~mGD zLsT(kOg5Z2a{L(8M-j;*!C3T@Xfp8vkCo>+dFC|whX*mYw8;8%l8katSX#nFM~fF; zehGO+1@MPMnCI_h7cbz?|Kfk+3t#>c2`B>>DzEXkIb|J|hPs>h)<1q3M-IG*kN@Rg zpscKzAQ~djF^i@;_sR=(CKNJbfGqkZQ}stk02U@megcq?)0Jy=7#ti?dL)IZ0tZRz zCr%zk<)w1S)FTB21^DiFzsscT1{H!9<0GRu`s!gk|NQgN8*M!29FvzMud}RV&K4Qx zwrf`Zva+6uWY`XZq1fGs<#sH%9Rv1oU`9^@ppB}S;Pz{&rpD3QJ&s-`3lk(gi#x>o ziSc|9{!M)79z|_aANLzm)?bm>Hyc8jp7CH}%1t~WnV903-#~qRG1Qs~ z*jd;ff|HjO<}jPk(pZVpN1wongWtlHbH~tAUxMC-BIKR=23644ajhZ?qkY}*yLRW- zA*k71cYnw7dQy3fSoUmM8z!MRF)(Js6lJm29K`6f745y_sBi1TrR$Bj-q4|ZmnDen zntMq;R4FPm^wuyY$E=v1bkecBPz$LrQ_%=f(I$=2yE>MQ;AnROdispky9vEVDwNqn zlo?4R36su^kY`7EPT7lDHrsw_{eO+;W` zn1yqJgfhDgM|>N0gUmM3YVe zscUSYnt4_spl~dTKqQRgr%vKe|NNs=EMLJFzw%}7Q;$d@&SXojUxH&NPY}GX;pKw| zP=5K6a-7v+M}BdkvQ2su$?wHfOR|DwB0k61ZAAKsqv&dF#Nh)kp`3}_-H65IpQnNf z5g+EL-je9*86*zal=qQ)UG_UVT2WhjUBQT^rY2NXRng}?h{k8JG{1oEj!uPe>`ou+ zXc0~-A1kG)jX-y=#Il!MzD6vsCzokm7)BcbohoB^(vIF?9ol*((a=7Krp`e$boBFk zKV!cabuGR893VDKGRb7Jsq--Q9ndoNr${g}jDH~(l{SPiO_092de`{Zv+V5N`4q7b z+vFXL5R5y#$n%*|T3mvYhh9NJI_st38nom6iru(UftQ|r0;MO3v*l&P9g=cVmOG#_ zayih`dKnk8UPbPq?_;K`4v|1eDgTKn70z8OLs7=FXuO)O3_6#0ELJH?Q7WQb7=QjG zmFU|^EV4EQlWRJaOxv;yquz$z&Td?s8iD+`NpkuvaNekK~ORzNqYgNy1SN+ClYg2@8tjJPYY zh!gGEo-?J$B}Fg>`x2%NBmrGSnO0wIiBQJ+F`;+!QwBP^m6wgf(-w@($jXo|?(3!F zxG^;4z|^>d&gCLm24G;OqNpE3jK|VxdB18p?GHK@GZm#NEJS5uC8?M(?pnjRdkrC@ zUoo{ij2TLZXm|lm2UQx&zjI_BKUo?=+A$~ISGa+{B^u1Z!RLg_Ej@hZF&(4B$5*Igwg@($Kl~tBycKhWNG!CyrH@n7%dg%7?l7-0N0JOt zp-OKpYhX)RtShTOg6yFf8mO|Ks2ahcUJoifz>#_lx~y{yd^2)Ni?Fzz#Qa8#U}(qu z0)u{F7~Ku+h&qF4xz<4Po`cQ9AlDl(8;oEn7{gEtiDkx#`J^mBwhCFO%$!(I%o$yT zH^egGwZue0bar>+sb`+X_1YWCdgukkMN}u#3Ybq$O(}}v#?3mMU>tmjL?HXbXX%?H zlib2wT&cN&zM($k7Uc4`KCEuaG#xfP{^a8X{$dhVGY-6Z0GF>^rn>O6j@(o%XYu6I zPx8DskXM+8#+F9bTM%x)TiLI+p%#>3O_0?S5OsoQoYQhtG5ef z1s4(VB@pxnaP?{xi6;xgssWtIPshPCCtwYR;gF^;`hzDbO_tIFOuB{3vdP;d!F67D z2@(24IJUrRYTzKb%`VPjemRMaO{%t`ZrrTD4wu^om1-P1oeuN!1bw3s%S>RRJ}25p zj1GrGX?k<}~Me+8xtjRE7}G3Bo;BXJ*14+nWA!0yGSYk>_8L0{yAkD@rg5<=Wc8O?GOi$|AW&^r-eAd}nhi`68EBQ`vg6+_z5Anrdii~CQ{lPr=* zySRggb0_eb0je%4=2vTt3b8zNUYgBTNif{6EP=ElAr~3{vVq^M?!!4cke$vbD%Hlm#V(76E|s-0HGs!SVvXrsc7E(KV(!^}Q!BAH~iZ*yX- zYY0os!gZrF7#y2nrmDrr;1Fg;#-SgXgl1qAD~U~IN};#z zrRUEn%}|jTlM9U+#bu>Tf(&Ty>O^{G2By?A@CBKOFhe?-ev;eU3Ct1H)Yaf-(@ljq z>@GVF9X-V3rzILu-&~KT)+Qtul2k<&Wlq?`L?%q37o^62dCRL(i2o$*F zk(r1?RB|MR(aCA3_0scA$LG^xjNmmfIiw7Z4g@_IBymnoP9ny#QK?jLaX+jsVtRZ` zS-0Nf4)VM*lpslrk*VPCjaY6cl>LZBrDvQmxm1w|MyWis+$Ku~Pw3pY;(t_QW4trD zB-sqAEKD*TOdJEy*<`(?1T4lV$uh(`4?$y;gmsqZnTMJQ&fSPbE6w3_>QSRlAr~8C zQRj-n%*4m*@go`Z!*7^^d8iGB-UjHXJ|>&0G2M0@j`CE0q7l_1FY)%?xyTFsy&hw4 z#rBTdJCB?*rHEcHz2&=XlTHP4uNE5vz_tjrHvtWw%WGMnEn}FOgP6-l`OoK)EM#B$x@5&%ioT5rOMFo=`Mp`xhF7V+ePxj;Z3_*4dc)8wBg))e=3r_q*UJUO# ztGnCxnjPVWrt7q&3KOx?jUlCcqPDrecp8(T^l6CU|n zCaz>iLr1{(FVROC3zr%PlLJIGs*bd zn#YumG?6&VTBeBcQy~-FWbmMsgy9VFI;;m5F+>^jLG|n>d4wEu@Y_hXjs%}$o^`sc zOc5mu>gfscve=iEl_}krWkN^|fnAmdwiv}2udHM-HDgt5hOsLq3j|Ixo>el|?GC2p zes?yKj%tXoN(hFK=pR1bU>QAZ}?t(JbTXVUKA zvk8&AnedoJy)(IU%`Ol(0?_zKRMO#uNuQROI!&B36JJdMNeWgFV4Vet*#Qay6VI)( zQ_T@`l_jiM&cP%T2I7s;J*%h|iclW6N~~X?+9xhC@Cu7dF+4m>o}fnxR|vVh$-jFh z78?OO!VFP*>(~iOX5SWXjxx%&2ETg~PJ*Nmi;WNAh%h^q`H{$sUS`EQgBN<~UdUi2 zS;Ngh7GN_oLzd}YTqGGA2};Z&ON|oPWSxDDjlfTn#clp6h$TfX|Fp!iciwv?7N=xk ze3l5yhDk4er`duB(kJoGvnzNscLVP&A)(~OktV97z>EJ-FoUy3poc_pc7Up+e3HM} z6=M0x!UP^HqgoMC$@k&Gq5uxISTIgN)g=k6Oa$CAFpxy!CaC)Zt8Y88$YN76$6QpJ zT!PZ{x(0)H8?ELgcOzuKwqQ!vIWtmi(!gBrwVKB;a^SI8zv+g0hnYEKWbV`o}Or zqM6oNF*c>cD9`C*klUEmcMpt1ZLninZGzt5!0^a4JTk!`O}@)E`OWK(V}i$d{V~=j zGjSEkg4ysqiB3poa8gg;jw=K*L1jLnvnxbm^Cd_$Mt&#Ig!YJKk5E!3^HP~Yo6!5$ z7{i+i!DtwZ!+IZdG76jk=U>=F|Fn_79$+~p&^bDR!5KBCnN9mIA z(6?B|W@gL|CXVi)45*Y|h^w%RYN5%LPNGfKrc6Y?YT&zD)%z9e~ z5yB$r+zbvc88{G%FjJ?+qRile+=tug$WA}W%PBn>?%ovk!xGDWI|Llycvl3!pFW5W9~{9Wr;K=K z0Ts&$3+_KUg`ZC!#$#3E=(aHE36dk)F#h;_Cw}#GH-7QpB!2m%2Jg*M;lY!=_{p;) z`0r&pG%`yzQ1TiiJCv7qbTF4RLD1n03~Xrzl10@7M8&+)^)^ChO)M$4A6dLLqhASl z$XrLX0KrI>F7`7K@dst#B>gSIOpBR|jN%reqdPEwpsYyPLf`9J0S5WmZe79@i7&BA zpK>tcZ)!zHXB%c`quAbAMR$KY6+$(^eF`C-q_ejNWmWY!f29%m7p~!Yb3ZQEcA~Ls zoY`+uS%_Z%zd3zzm>of?kR(+K35%JN z!%L8l5J>o&>}U7H2sVD`ncchmNyO&~`blQ5vRpN{YfZ9ps`&mK$x4=eCV2AsEb@-d zA~T2c+EidM`ihu*mu>Q!e0O=`j8g&x{m9Ml@+sS8wgGubECe9{B4i>YV`B`9S-7t= zDB!}Zm;0m$g|V-YN{U#*RC==Xt~8BHx8)%f)ySAudGTG_)PefeE>z#BL-*hy?>$07 z>_ctCP31k$$iyfPoj#7|4jm@J_98aB%w#f7wGo9ZC$5z^miM-P5*X{=?B@NDup}w< z@^`0mp7G}9etu@`G0gD#Djus60Jkm^Gd2k1Jf40r&3$FAxp9`um@@#C&4)>n`4r1> z&s6pxCS~PUg0R>G%YN_so7oJHyR#7+cukF)c))tr@gBvr%%Zj2X5e>=o6klWZnepp zJu>zsf+<%5)5O!@+$MZ7g8`YqV~M~=atwu*Sl)9~aWN7s@q%S!CgIwdP+6J0Ye~E| zVzyO$#veu~8du)wNv9Bt%LAj`35P#GlA-@G?xiz?43JDMN4%_<#N69TEFLe}&%RCe zl{FKV5S!aTP+q=ituRa*U}Ai0R9=}!M!M`aC;KSvMcz1CWA1MpqFPh@W)h=UFni5IcW-7kJo*n#s zYYe}gX~oYUR^ibzqxd&PGx+naWgOwTCKlJBORPah!mx@$V%8!(zbsKI1FFNfn^-(i zAr~PQ1{o8NIQ=9@Mb&3qz_|f0>Zq_}QL~%QEmRCS(LCv!>Ny5{8M&*GNUS3n0llAYqx-CA_3GpLGvSK}D6NF*z_Wra~)8 zqou2hWf4I|)n$C=d*8)V&wd{-yz&B`KYS1$`b;}!eA7I)LN2_vkcp6t#zlE6BL_P}Q-_UE=4Aed+ZnB;%E7k={1N z!pu=#!Y3%PHkNr~CN-{KEJ4<>Bgi{>9Hm)jk$>tqa!ww=rLt_O#s-m0EGkonTimON zGZWuj1j2qdni%j|r%xc~%t_>Dp26AUNAU8CU&G0hPolHCF{OH3BqlnHFT71zOo00* zA{MbXl1qwU?rgX3`$kd`yBo2{l-UM4)EGfxJUFL3gYqnNBzcddW$>y9N;Y#G0k6FG z0JPRkoYN$cJ`utRvdGb~0E&nF=p@)$na#^|C?Q7-2|9~|*?SM`=hE03vU_4UHe^PY z){G%4fH3{Tkw_{|>Y>7v8BsmbpPhteV11h?wWar$jA4<%fI&L2(oDts6r%S=NcOKI ziMMXSz?NdlOM9A6nwS({+oGdyF=JgK;SsRIvcAs(VlpwFbr!XK4xGN+i>nhJlnx?50jsRYkG|2QsJm%?tD#*tT_#g+04 za9d0W`#cyQ8bMKB0dh%5GDxQ)NLSzggOS-_0o=w{X!-%vU!SecOqr5S?1%Wu+kSNWUYE&R>G%v73#08PHjHu+5~%$Sw7c|Yq`zI$0d^1J*k%EU?qBcPp9 zCnSsAPazOR(U34?QLw#r^7pnYpyQ1q&IBVY-LTz3RFqfa=#dlX>g<79t%g>sRVG8c zezgidw;iQLx%k3oKaFob_9Z;~)OYY=<}3K`pZXJ=$~^%`z)28`@YxoXS*G<=pF$E& zD(GOG*9*j8W7aQCLME!!X(kvdD)Rv*Qk_03S0-KqJZ^-fG|D&_;NQKpPVOhGugYR> z(u=U3CgY%PwX?WXH4#^mgd#&gumIpzFvAHme8m~6X1{4D1)G&+`` zlGx_otcDYupZ?V!>&>xsVL;4 zG?__a@iq~Qiv?tL14#yj%WA`gf=nEI<_TObDS~!%7z-gkVlF%ST5E9RrSIX;%gC;J#Op#LEpT`WHRYek4F9B1m+J4q<4^6kQ1AB56$`a8YKY?&gAr=8I z>1CrOX&;%R}gSFqm43)k;$w1Qc*`*mk7Dk$zC%H1S z&&tYG2IF12e34na3!~$`IDX<~g;-3634HJIui#>FA%ZRk7Ly4~438i$D+lT68Oq{x zvq>tYyAVqxxy4Le7WZO?sO&@IciASt*+?`(Ch{U$%2u|^r`0W^*+rf3d1<$khmewN zm-9H89K=XW%6|M?&MD^$CpHnH31JA4M5r`FRGeb+UAD<@Lb5_2LM9<@+xss2q=rejV4Z-9T@z zyx;ODV05{%93H0)mn+WW&X>`FFUWPWy6^=te*Zk}6Xyo->55StsO~|FJ^>Zuc*egC=Q2r# zYNVr~2Ibl5xKYexXJi0#!3bspVNCbeqb&0vs*BHIqDO@g{omqd%=(yA(*KA1MsXoO z2S=a#E^5n*Fg-Dh>6vj{W0}AF%Ck6i`1@$9uVDRC9MGry^d%X`Vy92YIF?j%814Vp z#Nyi}7G4*=#1;}!Kf3BJ!1A?Dl78f zpOaCdYgnZNcim{jv)}m}9DnJnaA`&X>CProSa0lLd&Pr?l90{~y9}!G&(bLp2r$$3``mE5{BW}ztOQ(x6L6X55%y5ZQX)G<*|E$l z(t*P7h0o_h)bB$w9D+^Aj9~4f%5nRcWd}A`&pXgk9oY%kHfDZy0(OAMMhNIJo-0NG zj09#8B&h617H`D@BrLJLfrx(kmY)Fb4W@{Nms8BojMeU!Y;{)2$n^9r4Q+&^IZD%$ zU_J6~g_)alN!96nIA2!9tXZ#gZ51b%aV)KE4e0J{q3SW<|RkR^k4de)YaZT@?91QV_e@lm+ULV?~h6hi0Y7OW!7P*k9e5fi^=!B?ecd( z?#a8%&rLoH&&_R-*p8Accp^*|X1A24EFl;9JD4P4C1hBEs1|8bp~)nZV*Kt76L5ku zkddI{qr&h<5sA(rL~@Yui8-@a zhBjcv!1N$Ab}cOQO`S8udfZm#s53k0_f9HrDsa1uA&G8dgoj?V0N?6c!B3a^@!l*m z(hiR!?ZB||dH*Rj9!NLgzH}?nPKnu(cG7{g6Z|}8LD~@`(q7df?T`j(r}_Jyo#Jn& zc&?LsX4>6$2RrjanB2!%UOR*Lkm*eI%#`mL+;(D`zYpRsiUx2)y-JlrLSeS#VDdQJ zKY|OVA4k)L!|)l}>BC`Vbcon?+yP^MlQN#AI_rq?s=>{A@P?C2xcw+Nc>ssL{STOI zJcl*+BoAPKu&g&$lIZPfMDC$);mq@2!RWMu^}43?3X?9!%5*Noct?nY{&u`$*&`O2 zcEQ2SC=_tv#>E1B_p=|z)q>L`6h^sRcbzAfNw$(s)SWwvFMs;aapdqb7}wjBw$ZpF zg6g7k`1HG~ummEjw_%>MZ`@?>>g_Klvn7V;%&9@=nM8Ped%Q z|66R2DBh~wP9766Zzr7V=@p50MIR+mUOW4Z*cMF-wOuuu`Sp5pA2)TGY((j$% z%PdYTKsoKFymm{*=UIT+&y0ki>j?#vEHdo%U^WthD@LHA6M3mdY`lh#N+HC6)_MsD z{{o0b$7|_Hel}%F@Hl)iX5qZAe)>SIaSp`;PTVjqqSrwsOa8D?p;?7Y9dS&IYn8>D zlF1~Z(GW9sAJm#jD&`(|9A?yByNs#fL3k`ixGiRuwG+B&HE!Ohh1VOTYLV&m?@TPp zYLQ}*O$N1)$GY-ew#jco073>r46}2SPMq5{ie!E5Cb%)RGV<4!T@nEhW_sMeGxza5^ zh<9Z9aQ|61_p{@n(?U46k;n+U)?>2pb{Na+sYx=i8Anhvgzl8^R$$ak;BwB($b0qMxY;&Jm7idJ zZ@}zf{Zp|7X18}=FhkR=Vq7Z=1jzuU2m#5bOkZQt z&co<}VopCZPJ)+_z$p$PBhqCbf1DZS>;}dhz%*4$A^?O)G)97>DK-l=t6(@x!ZF7Y zC4uM&D!e_VH%(xf!5d$L#X|>T_Tr-~Hb$3WpWA|SVFwz5jm;-7oe6jZLx+qj;C?P% z^NmFDRxLGM$~>IBM==3%d4Vr4?!7c8GbsZzXJ?%EL%<Sa&hooe(x|PWtz0yN#_XYN}PR6&`p)olb&|YSH zK@wAxWuKsb&G8=h2t}H}c)yBC*W=WbGpX-ypLv7#X7X(JV$wBPx+E*zl6TF`@|MmC z9x6UBzng77CM`^8m_#{9K0ba%BP5mZ9MzHx&Wl3t^iolWNhpjFFYArTkf^JmYXwo? z1}v6ExJj&a#K@0bFyMnH#!^dnUm}QI*hzJ{&ky0j;s60#N0J!F!?}7qkfq0i*+x7> z0(vNmmSG|B7^!NsxbL_c@8-6LPaF7Mg9lD(Nlqp_%6%R>ttYX}kbn$$SEdDzo;BnC z6B^|h+4hK>gMYu{v<~;t?mxq8r5o^Ih6xX6n(;`M1&{EW_j8+USM0124~lW0hjuOP zKr8-pUN;KId`v1gnb;)YGA7_QN6_0?PvSU+p6cURj7$)h;|P;jM0)_M=x@7@o5e?Q zE%yK#xv!IW=nnc(!|$0Sm6PB93>IxY#8b*3WzI%X?!*FB7qSn038$X@dz4*jfZ5Hu z5|u(yk=U1}FnRfZZ;Is}iN#1TlBSe+)QgsD=keUv{thpH^K&qdvLJ+5R(ZY+-pITQ zd56D;rylz>a&wMA?+z$7?~bAQay1_R%KzqXe}&Pu8tzYG+2BoyA&AOzNARW3{WVS; zIf{u92Rv?RdnQ1HgSUufe{#7y!R!J4o7sM3a=Yz!%@hr2-sA5^uL3(qznbkQg(lu08*IR;` zfu{=r5%&)4hA^V@8?Yu9&_e|>M!#Alm_!|OFfi+7k-^9Sw}g2Pl80oV(i6%~GcrrH z$--I$btAJ>f1KGgGiqf8L_fh++GXc?zqGCzek!X6p*6{FqqoWYTL)#;j> zw_4nc+Yo(#^)bitPB4LqBq8hC+o_=4GH!}WJK!YV_+`mr;8af-zjLx1?>jm~1tKb7 z7HQ{6EEi>F396E_7AlDu5(|mv_$XBazo%>XNum%HbBdqGwMaWUg|x#m9?V2SArX;8 zgft!^$vjNb5RyqdGKB|E>F`LpQ6ZDGqdeEqX=Q)eF2|&uP*d&j{6bW>6ATGNAr5Ze zBcHwB72747pU9cSpIy_U%0vKXeEJ#ZQ8$&LC5C~PW^_~@Mos?H(2iXt7RD7)5er4! zxLlTrt2wWruILE5yF00>gY?@FnmgN(ckKIk^*f)0WB3ZNWFo#(B_fH>)*$n+NsllaOlkrlt&^`}9Zg>Vc=x)6+wz+=QMW8?eo@0LO9Y`S0N$KJkBW{N-n0 zQnTq0_sGim@R2xQ${4 zb~8bbB;xc%;ACZ+UDCV)Sc6{JLOv1!FvWcp@TVE6D6iT>_+pb8hYah8%lj8y4B7yR zNSZGabRd76j=G51`7MNF1W`JZIl2fv>(>yL&m|I$yindkFuDVmcNGSzA(Kx)cYnh8 zVNF&Nw8xXQxMBf1aez)OgD}PHvPODf8IH&@pKn1Ki9AHbdS=v#Z{L_i`phQ2U2DO4 z{WgjRLbx>GQ%1~dtkTU_?v=@pRVEsY@VS_7yBE0Wp0LwM&I3x49L3cqxy7ysjA7ru3F94G1Tg5ttjtUwKL58kdEhx*$j?Cbi9`6-*ZvQQ1*=>iKWOTMKG_C%$@8Y&a|=s0RQw!L_t(`lG)Gph~dp_zhiE8~5gm zllTyc+C=$pB7vCsY38SeX5FtJkE*Q5 z%&kCE%NTUVure^$N?z&u=jM@C z5TUZr;NPD$;4{rj$S?vorNlUArP+Cy*OTpgcKh#p*2jAoU`z>^ z>nX|fh5)Qgf@A=z+3JA0>l)h1vru_P$mJBe8n57Hbr}jWzK63%9zz3hQPtJSeWe*J z&e#=P@uIt>7G;?S@a@n2PZXbe3jLi|(ARSnIoU7ci6=gTywl&oLME0L3#h0HVQIQY`@$j&&8mc}|*EEWX( zF}R&FWj-ahOtvN?Ohviu+U*2$JIUP1_9L6y?RNFCpY3R1 z(1QPXY8+4Z5G3hvT?EkQ29x-`!#8lOJAnz3L4R-uYL>gt8&j4qohG36(OGpa8@$OV zrdWLgRK48g0iU%O_*Gy}-S^YD`BqSN$H5y_IndIq5ktej*Zs;IRG zM22Hxc6b-yXBoS82;?+46+7e7-3Z$o!P|yd#DCSnO=2}6w3N7 zXjj`5ViA>iRUJXqR1kp$O6YhP=fbGUH^&s`bDiDosf>*Juv0eu%HI~4}Y*hfMz zGf?*fo3~#E=}QTcg-mwor81UzudGU$t}}sHMl=vd*c*k+bgg6k zp3wrooH>Peo-yKGm8(cAp<2lf9J@y#dt~t% zX{0`dOn!h+cz&BFsMwTq0UBAb(3Qd~8*$7+O52~HaEh&o^N6Xy3S5m2Krzh z?So~!9S;3~GImfpqPPRHrb~=UgE2I_g-~n(4!aA<7}dIF3S+~4n3@=dRyPHw%fiIV z!{c0V@LDpKMP|1UViCn6-Hk0Iwzst@%wm&SQwi(@2pPyU$>_FoKfi|#CMyg&=Tqyg z5G*Xgd01tdfuuNBjFnA5oRgW4$22g9XvzDNFaaSPSOc*VVgDAK)+FrqD6d6u z3C%JKp+mSyLjKf9@!QE|Prdvw_C}(4qus7H_Otzt+0Sl&2Xs5JSR8JGUl@PX?Z>ZF z+wrGOi};1J)A*w+YUB{;zo!Cz_23Ae>;+yL2mW(@D?ZgTjVaw06%+8kZ#waR8r+KX zFB-JrKOgPH|G8+!S6g)WKJB_@3B|o$JXm7Df9PDnQ77=Xbz%Ic3l{uI^DI8w9>aev z7{}LomQYHteo77eUa8_~QuDPxWpBv~vjtW*;Uq3Cu{`GOrL%Sid$V zsD9#)7%@uB6G7$I=ug&0s<- zR*4gdfwzlT0t`?wnaMODz(Wv~=7s=?#Y^1WyEp`v0vc?6o z3R_?{MGgdd7fHd-iVmi5S#=MSxPk&TO<+1ZxPFWDRve*K0Q-=nkq*QyZ7r3K%ZTEnx< z)c!cnhSMhC#Zlm=4wd7t+Q#Up(jyD_WJd&lTy0R4$xBr|`1$ARa6k{#u@+ld_tT3& z`Dher`5OGhRX@JcxrE<1Ie=d-HQ)g2tCIWuUiKjVtW1l;R8D_g6TmN@>c`hLz%~AM znwkH9&1k?Uv+K}K=XUP^MwY!b5rcP5y5sHxHgCc1Ml3Q0M2IEIphz7kTbchX)zq~CuQC8|QyB>8U_eTj+0>j^ z^mF>CjNu5x*OV#7e@rZQFDNqGv$lfWY^`*?DTSu(c~>>^ZxVJa7E zA_UiB9Gp%&n8dP;0;>97FCIY}m3&$e2_-Lt`%98|Feicooqmin z4s=wnGv--^SVGL+t@eOIELLXW7C%8#dPzFy4|d*zlfLC9!FksS&is9sRAef8Ar6^$ zOGsqT)J#;=G8-}DSpF8G5puCgm;HSR#7x}VGn0dHf7{=;6O5RF*e7#`$@^w$y>Z$| z6vPED@7qpH)kiilBTZ$D2fKfpi9C}e`>NvmT0VGS0;IJ}oc|O4o8%aut#U_N#c#v@{dJn0FTYA;8$}y@Ovd*{PCq2 z{`7(lzj>+$zmqjn`mu!vJ7i(XpdJ zDC?yt>o&+lix@-q9iGx3p*3DWD$<_{q-%lqcJWKzXN#*C1^m(L|rWVnR% z#OSMTSrbH>!lVg`psu`}R*2_cuiY9L`6iYi8TcjEs7R#QOOi`>f&fU;wFWmBmjrQU z#}1c}3SgkRkj@_znk;jE&TTVMVN6m9yXbE+*{GjML^!g-@?Jq7>*KF)#PPr>8Aupl zf)qqrrY|+%G1HH8(|Qn|5aK;}38EI(aR>eBD`VTz!FV`jUiw$e|r3T=axbH79qx#(o^Z4!aVf^NKAO7gtEZ$kZ zg7;kBz|Y?R{&VF#4t7Ui;8R`3gXNn|%`VTx=JgJec&8L}bdu?{0aUr*c-^=6@8O9v${lO>seH6(+Q ziFsZh$$~f-pz@Fb&2AE>_#n85I)3L_I*jEu{g6lSQ6e#m;(KFU8Iolc0v%m-tls`SvA z(amFI)PvDcv%-urdEM~P7z{=i9LyH@d?cbxsOUgyf0CdhBSnQ+Rup1!D8xb~Lvj&9 zQOLz3M%hXdP^2f7l+{CW^T>ceAs2%G9W13b-rS_AlG1LwP!!Qzenr>%qHDjp9#8HaeDt5X*1W#_?MWjN>fJ-^uI2 zpH^y7PE{d*K4m7k5L7RXCGb=E9r$b2Jf5SI{c=_-{_sK&FY)`U4&Wq7;ut?gvHV_@ z3BOjRLLuv;jrB6T27LNdCq90v0oANyC$D3(?=X;4i?|7~c!gL9=q?hAD<;lJX-&{p zM)L>PVF>en2{(-7}!OWMx3BACr0$Dz4X}wQmGNDkBCb&6v{r!ABubZvU8A_92tk89`5) zSz^q1g;*>B#*Ad!QI=Vp#6eP#cVZUX8Wxu5m#hm}W5-HRbJNFctS8$XL6C$mOCf}V z^9qRi$x!~-CMpSle|+AFcN{n30U4(v%S7Y^@Q$K5(hB1!o={VbQsp|6R3mYisj92( zjGv1JJbHKn?>g(mLnkeG^r#B&KcmKn@=W+(z6lSVaU$)Aj3t@GgJ)H^FUy4cvz>S# zBY+1_d-35{wfNAXaeVmj7(Q}p8p?Dqr+CZ>D?W76gzwioFzMJ)6p%?5hfCB6gYB^^ z4*bL+6-h71bB6G~+~wb4+e#6=E@pkyuR9 z#70t;nWN=hRD|VeHhD2k|5VQqM>SSVYkkleV+w}aoT8fI2+lI$j>Sky9%8d3+Voe( ztkt*;o2-)xALk1kQo^A^!L?}scncQrEM|+n>b!#3yxi45!E8ZA}^yHLM{ri z>>1SqEu}(Is>OQCNH%vc3km5?W}|GrlSvodJDJhO?3qFK=}Hg&XRZdLS_T(0u#*g^ zKcf=)z$=~jH;4N`&OtftgBQ&Bo&F8v6VwmQEa4}!$ML(hK`_qn$toj$D|-yj7)S^t zg&qcL2bDm^^cFsRvK@cg9K<1#&40=2#qVEq;uwD)W_1sdJi3`NcG8LezQc}RIbDNq zQX!RY0WTXD@q5QE;O{D0(am$o`Z+%5Iu;2SGLS3vVq9K&)2T@=PML)^Mt_lJ76P#- z96k3PC5V)E8*pvXhc3r5I;O)ICb3i)R`JZ$NmNmR$t<%stgBE{t=!Zl@LYZkIt(Em z&p@M-%S&Eaf8%Cj8#;UXVYAs_ozkMBpaeD5^{BczfNT9$+%PQT$r>F#b#WYjSuusb zzBGd`T-V?WMNK&0qr=FI9ar+p&{1^*dZQV2^^NpPHQKv}P<^8nV>33TsZ2T!I791- zxr9_`(){D){m8_T%H)x60OEgb_5(!n29pjJG8LPf*|W-;#H5p%HhoEE>21@7G3r`F zn>vQ79xIqvK+Ao{nLJ&ah@f6O$GRn!ki>0X>0#6xAXc;vzYN=%Gzo-;sV@sU`h$Jvl$7Jqkc5RX1{4evc`!Gl>;IN4z; zo){i3jp5PrF}#rtANF&*#oz)^u<{Kliq{+S+UcCE+36CDv;*k?FXi}5fo=rQZ z#_!~7P%-LLrVo-1NJdK>I{JBmiAh_I9%%>0Q&YKQ*zxXMlGm9je)lMZn0CsD-@oAF zvwL8ts*qO%vLt{xkR-7rNX)auRe3)(hiE7amthLFiB3$mRAA%=F}1B4y7nuWY`lQ+ z#`CahI^grFkfaK?+o>{G2QiktbaomWYDQ)0aa=xs1UITrq47p0TAK>dR9}eBmKu_x zj&-=E__Iu#uk;F&CS%rnYU+Gq{@X!dC1c9CkDnQ=Vr#d|E=_EAFq@A=bO+my zEN-_q63rXUN5B;uf^f3wVr|Cp;qnRW{`{QH;cqj+DL z0spI@6MvLmj}K>z;=i@d;yi=%6%Fv;&KdA)=|lL({4spHbQ)*+7jSrB7Qb9FiH~*9 zB8SBAkKJ+n9*O0@RJ!p*r3SB3Hk3~9po?|+qHPDiU(|^|DDJ>t)lT7WYA5lz>%+)# zEMSsKNR~(ldbY62dXu&AWgQ)n&wIq;BC)thEYfStD}!LYvR*us2>RfKJ`1{CtC%71 z7ZkNSi=mur3sIqQqgBZi^dNP>(xjfbW`b0YOT0XQB6Op zgI=%4)pO4M$9t!B|CzAe#_h zqFRyhCjYBw0v|k11#sGhcQSi=Fh8sS^aG_yg;e_HI*IY$~k|@*a;IiRaq<_{gzQW%`!~@_i)1 z03OZOrieudu`r7FaQkNlSU&L$Sg6*l#4&q_SQeaBx)<*ei%f^(ak?-$&;jFc3!G!k zi0gS^P>*fD7BO8fTocXcZ!3pJ-9gp3PQ{*tndT2{U|?VXm&u|dzgN3@;ad4w?n`gl zqNi@qJH&RpFpgcv)$=FOe7zD@tqTceIRSqXPFGmDCox&D#wo<2kjw7-7Mf(8V(t*{ z|8>UW6v?-7N3#dl?r5?O|D8#2WF)&eiJ)7i+UC7WZy@Q8OS97-#AJ$lF?WTlE{D>D}*Wff@c8e-if7+g$FsJtBVPLF=SH!xDh@%TwH${3k_!1!O2 z?MEiJo71f+VyehS=WQ%9UQ+ggh7ULyLSs2ty+vxiK~c36U3V`eG*07 z-^P7qMuddC+?VW`5;sDk8Djk(qq_cyoEhAgZpVE&F+5TXYL4 zX0N>0e4B_xro{+QeI&d-G+fF25X-s^!wq?;DtI2(&mV(O?j5G^+@Lo;R|^Cp!SS&^tb zbc!Hc3b~Ld_Q++IU|b}TTgGRQefG#m%)xB*PPU(lx!oLhG0AlAWEN8p5#GOsK&zsh zU34U{;uc5S#I&dyZkLQd5?rS=-oPO1s+U!y<~EsdQ3eWXSj-*=Nz~5$={sg=THx;< zemY4ME*7J#)go)N$bJD5jgeI{&V5D+{3azc2OS-l=6+K=-w>-!Y?$Ypq5n*i)O6Bg zhw3y*A8^sxd~sfrW$I+vO1DW{j0%lrr@5H2Gf7x?n0zlI)W$#c$aEJ#~EMX%DnPj}KV@TE*d`s`y4SjOFZO8Jn3H^y%X0vCJ##bc|(v zx_%t(Ogek`yAaC|{j86EG{CwRQW2Ad=DI%IEPwrZr_Gqz8(4JkOVw=f{6oNw#73H~ZBNl_zgYmH`j1SjfYVayzjzM6R0ZLNA77KC9gSpTU+>=$9Zp(vq z)QEZdc04?fcKY(AqVJ%$<}j8Wt;AFt@s|a?LO@ta!mjQ`=hcI_dG2Y{wGJ}@Uw~EK zN0V4&5=xmXPzXj6tGAC>7+_vz(FwC1wI!J-&wL)OmoqTGNRQ)*x0N}b`ES;Yp6V<# zl^sL#`4ccq`4M)lVwqWR-Q^lwEPVl0=U>56NX^R=Em;nVZH8bOZ$f)bDcULBbYnIp zV|F_uO79Vw&Rlw&d3K3Hn#BarmBDaCHH&YFz_O_H%a*QncA0YCCu{R36tnX8JDHgh z`%Y%Li`l4}?qq6b45sJ;fj^FMpC2}+e$qYD5#)BabasfrADlzTz5tIg!TXo76>IR= z*Wj=a$fY+9>u13_k2$Idt54>++JxS>3@wStLbYLYOBdd4Bv~c%JV%l$#+_t6&J+BX zwxA8oK}JLey)sKR2~Ya>8IVEz&Md zC$vNcXWq4LYYo=(a7Oq)UfMZIS+o)_-U=6UmBUI%i7^U4=%3X+siSFs@8nGQwo#O#KAL2=o(7G^U74=e1#!se`c2vkV!NbHN47 z6UZcvrK$9&1^7s*j9Z~nI7gr^S;76;vv~N75AP(oq!mzcX&}RlpUGC?={_odK2OqZN8D*eAhw1kUi-h@SfyH_`r*0nFI~iYNrvwe z^2?s%xfXE$87F=&XBvk`LsU~caM?UTkch;e``dJKIeF;16F5)Oz zU$B(qi?wZ-r~1&x-+HTGL{)7UlSKNrV!RJ&qVp}ln;;HIGWT{7i;tPK42InBN6=SO zj;g$uaX$SS7)%pbUzY;lsdrc&?lCl!9!1xsvlzIR3kM~0GO&dN0kFQh7S}ExLHg0J zLN`)Jb|oWAK`^+n>cwE=1zgB^6}6S6aA*TqW7$SR(l?t~^B%F#Qp7@~KoepSGs;Sg zZpv17l0Yp3F_|UEI@7L*VyWNX+zig-J(-RUbSIl}L^0tAV94phsK*PdJ*=#Mt+BaC zJQ0{E?R7?eXAnAdGEILJ1_zyzq+-_3!R|>yrFO!v@*-j2`6zF+&Uwr@=b*ABpmWSa zV~jydGO<%7CbUt7STxQs#%+G6+ynw|Oz9ddvn1Osvj})7jZGvQ${)9Vi4M$ib}u1F zqP18BQA$TwjlsL0%9LM$^3a8Xw`G;w7vrXEcc zMiP&mKH9?b%e$9u&jwnkWYny78GmzW)QNfx$(9+eg=A*%`Y}8?j@-O6$jvx}j;3nV zUAcj}tF^d!^Cpg*K8ms{7vNn8!%oF(pJVw&!Y~Cx2raL`;P%2BlQ9Dx96E6TpZbSS z;17TOxAAv>`Eh*n%U{C_&pnUlpL-dtUH$Mx=HN@N{FqqwA(PupNX5tGfjJ&V%=4&Z zl5lm*i8@^v1sxi6dDc*GOyV0E)o5fz_H#c`!KZr+IM_G=9eu@5Qi*$$h%h#T(M_lr z{!a`g@Zj;T6tSFN#Qi191oyZ?Ebqw)QCSf5sWjfj-`{9D=iee57 z_n(KMy$tr=3aAFPn5ANgL=vdIc?k^_PhzC@5azVCz!I5{@uU#T`VPi>>QPttEi|9| z97=7%n@K_Ax$5FSxmEFExc(N z)oGqkQLW_RddVTQHRV9BuEqAM6Lx(U+AA}0DdPn+R^~#j8iI)dYD;V*7}$iBBvV(P zjgu$7f#Uq`S5R~9B>MYq!eR_71Bra0ZO9@(f#9-YK4DvV zm%{Tp!<%pr*u;$9MQB~DB%++!LO?XTp|dz)w!2_=`Cyc}gYLl$cQHMQ;!ZZ>h^378 zq8OElVpL=)i(;CpW{LnWHth;3HszR8Y}&zRlYy4jImHGTRAR#n)NzvOq%DR?E6o;x z${K-|ibbs76-U3DS-jn=*o=qQ_5`4zyw|!y&^vg4a{s&s9Zln6`ME=w_VD^NBgxPt z#&R_Z*?4%a@EnO{0Y(|s9@zo~BFIxvkw_-^*~_3b(I;(mFa9^O`((Zp=5Hw){_ z6xk*iY*P_!DdvzYlnI8~#f&Z}Q)8HLHuF{F;bOctd6Gm5kE`EPy+AOF}V@#W8b6?wVEC@MUUSC5_|u?!%x zATL%);Nf}NB9kZ?P$)0!g;=(z)VE14+ph!Re~q>uncQv;`y$JAor&ERV{L`x5=EER zhaN)^Lz37q7Q1GAsO>kPR}-Z2+*X#6?zO~GGirq?Agu?pN|)N8Bq=1F^GwWt>xv8a zohRU5TBo`ospQY%zRU#PnHk2ra)NlUh~QsB5-6jZAi3O^X~uspbK(UR)e`;7LCljm z2^SJfl;}GVD)dR7_b{35|IMQkIx>QHl_l{2&--A(93GPQFQ=(k(tUU+k7ObQksZOq zGTG%B3x4|eAfD_Bqno}gfII6CBSv)~O}KwiZp8z#Xqe2nT#(?gJa2Xg59h^5Rtwy| zj9~9tXZ=Tx6H9fzm$>mzPK!6Ckft)vb4C(9D!5oMaPXS^w(rytTvO% zJx|>nuzIcnv)6U zO;le!hU$VBaHH%HWXgOod3i6r!epVZlrf8U%c7B zdnOh&oy$14jaXy_5t|*R;U)~!7ozss30$i>g6i^-mS!T7DLq{+kH6&9EnS zU}Og9b}l3A-GI)}j4M}8A}{MHRFob>Lsb##s|s#Zg5zDB~k4bX~T3ObVO2y<1!tC(D=JGNt2oNB-{a%c~e<#yZ(%#9`&Unh)Bt6;; zkyK30drg^;PK*Sytk?{}U2K}FL~O=63yq8fw#g)R^B5!;ij6Q>$0?1c?1^0?LDBS7 z2V#TFhz31zSXmZgYN`SCF0trHA_kJlp6RLVv{W`~PZ-l)UfUaFIR;pcDPqwXeVCxC z8rIvAxFnZhjmF`Q zg-8k-nk?P{}fL*RblWEMI?E-uulXMAa;liM~2AkDo1= z!o!sW_$%8amo-IQJeV_wcV$QM?%WU_C?cs8OEVe4{CortQ8E0x^l5zTya^e@vzXvL z%`WdC5sn~8r5cP;;q&@esi413Z2Vv)Nh`yHcjP8;Kgs2x>@eOzQn@c9fJX}AxUZCI zhU9Wz0mOt5YCd%Ylg^`^MXj5PvW=hB~*;dTIODwK13zyllEt)dP*6q?; zg5dL7GvhWkH#e2#mj#pV#aP7mWLwIArObCt>f((TQR*jUo7_kKx1t!2y;Xmyk2OA} zm~x=J;M&|ZWgBhxe0x{iyAj5}V$yiIS5CLxmGZZ27ey_0>j$|EKSUHWc|%}n0|p|D z$`Yf^VaU9MZqp*#tV<~B(4$corq9TtO&f60r(`gkm@hyd3lhMocBH*m=JOKMxnm?9 zW_YnAJP{I{*@&uZl^C1ou4L;P(xY0`D%CyYm8C?=DGH?%*zz#ar z@$#SpH6{|OA%cPCVT9-#vJC4ik7q&)x+JEI9t^6CkWv0d5|yk?H- zmLXC5H3mEDFah!p5&&o5S$FYlTqRk5>AX{^rDrC(anL+zX1o)FGl7@8Iy}W|7stu%-Q?U@_-;o=`{kc&*kSFgy zq^A~D!Z|PAQBFWVM?lZvcLMxxoS(;2lRzEGYnmh$NUUMj7s5(x7ISo7dGGT=zZXA$ zrWX%n`SDOr1dn7z@Zi}H9?Xp3o%wTAD$9z!Coh11b7T--s?uPRq(`WO^ptQ-2tX#|}yW$?Js zy9B+DaU}0fnLy8sPNS}}1~)HXMOF0$T)13-3srfz(Od!5hzf42>lU%>&2DU$*i(!| zb33sRcngY3U*8n=&q*wXBp*h)m-@F6Vj(303z&_>5KB4`O*k++A4Vb>#T>KfC^O-p zD+s?Y0!wTWwip?k!5O3iiOhwNT!>{HVmTLtE$Z@~0e2oQ8L93-a>b zL6DFx#d-#mw40aqm~c}~mB=8l@^=}udN*Q`)dbD-9g9B%yI*F9bz*3&p8;vc;sP(g z3~(#XAk{k1*gu2olMY;UF5=tGQ~2}CefaH?R{YVWetfi|2Y*x6f~+nbnn!II>zKrx zkJq2uQSRGK#Vx8tW{ntCTM?O;xx}b|e@rZQw19V6F^`Y+=3jz^AeFL3WfZ>j(vgMl$+;<^~2hJz)P6GMAOLyTyy4$EuO%Vr@n9j#-gUs#O6!9ijOF-sv9iTeHj-7~TH`4D137L+f*f@g+kr^K@`XsvWKnM%Xzk#2-L z@X=&mAw~8wh@(knILgwrE6OTnLNIPOLCH)?edFwntfefA10pw#5->@}1jn?Y?{7U0QpM@piZ0 zvfb@_*S~dw4gN<=zS4xiLkpYAKr5Lj(nRc6)=J^So$sb%p`vi}fn~ub50emOCgEEq zjw~kRk}{co-9h59y5mZpe-DFCZ}uU;OxNy;VAAM@mJFsdhcK-RVaAZ)alnXm8>94} z0baYF!P~(5Xry)0PrK=(b)$Y%beK@qI)xT(7?-*vjxuLLcvqnv5A)m)WCie!44x~41eQt57LthI10;?WimcSW)_igVpi!O!$eG)kFES|#=iv(lk716_9@4Z7-pAX zpO3;A^|Sn0uEfCzuNx*VhxjQ2C*3S-Sw7m!G6~2vcwEX>7&nYH)_KaL!wRukA(jN( zfhcnGi#)5CRGWy$5}`r zQ5Z5M3vb-RY(-uYNw-z$Z4+c61W7E?7@i)}OR(+juXP16H)^{0Q(KWO-Tvmb(#)ti$gSKauUeS;&mJ zMyd)Q3C3vgLFWuJ0Hp3$Fs5?j^0fifH0f}zUXKes0Zj5{bB1Seq}_{G8tr)H+B7at z#L#P6!o@ZNGOzdJ`ltif2hHf!2B7mY8KU2Yk~_?_dEOrr%N;Ee+)&0?DWJ{Rmf53S z(p5Df-`7ac^UC{A0Z*AK-{YY=C9q4GN@5|zB4%O`oU;SJTWG*LPFe9l@n;^SCc7g7;^-@pGpK z@l>k^D*rl?(k$klMM&nKW3W{-$@mb@@y`4Z?$4y^$s{RcQEdphWRR@5?LDVv@VsgZ zYWjmUM&S2Fsesne#$@GxU(}IAoV>OR?<$SqL3zh=8?iiC9>+%tX7J?bA|@FaLM-y` zBubpJGl`a2DWXiU!o*ZB%UW3;m?UAPVzGsHsMvW-bOSzFGMm^dyWBiX_NvBpzKx%p0Lx z^CIC{pcJF?xDu3ii|{ArDc2IpGO$)=F*3)PgT!L@q42rWb zVsQpK_m`PBEo4|(likS7VSi%Th9$bASo5fvvUB;CVp$>jZYmJSzjj#Ldr1DH+N}co z5p5TscX@;VAqCPDF1gLH&8VQ=`kSf?%p5kTGsKkB36X5`nP~Fo>yB5Rm8R??A8U&3 z-UZLGP2-*$++lN*<+ZVE>xwDYC&ksYmz{dn(geSlZ(;rB65RvZoE(W{IknEuC z2gd)JY(Fx&-P~^O<6VQ3*@CRYWMV>Lk{+T2Oe7DH88azmOFWu&)nc9Tiz zI>By^zA%dcCLrJGPU2nZCIWhxB(XujUch?`{djkQ50B6ukS@j-7m-%Jgon;~@IWb5 zOU^b)fcq*$KynfFBE7oKt>PV({OyPqzj)D%T!O2Wei!l)$YpXy;>0NL^&{0@JW?#j z`FOnq-ccky&}0!YAsG+;(**}giA#ZG5;ngdo&+=gxfLAN?BGLZ4ZKg15Ea#j@)LMp zR+t2}fQNFHaNk)!K2T!EUsX=xraLvmwj|3@T9|(5cQZ*L!TFV?2IT!ps{8~K#q83O zLtvNT6j7F!3<#ImyQREjJu0Vfh2=<`3xr5mb5tygurYQdhDS znJmlb?l$1YwNBL3)S#)U2^TJuqo;cqR$H9esx+^N)Ry(w@6;6b8nHAC8K7sO?-7eU z;kJUVtK@}${lv1#bBbY`=N02&qJTE|{9=1|@*@+=p0wgWx!w}hjZF8VI4tYIL7y|%S+1yiDlug#A0Re1({TMm>D}fE6TFNHYY)!(%$Lag3gnGHAyfd zP+gy}A*W>$6D$H5E0Hs@h;tg?nHn!%ZjRwt-x6N#2%wTcQA6K*?CKy2y3NRH)uL+D zgE22NZ90lFL8@m-c_IB{V%eWi_AJ1JG9;OBY==qW7VB`G!1fxk$Qn2@MnampT~sNu z224=aWnq0ub4xU~q*xp4@)H$0JaBYId6$xwnPld_ig)I^@o=_NnRz%Z&zour6U#G` zRE#75Dx1tr9wW_IR4zg+(ld+1l6GO8B;mt{b0%{#QI_@vwvH84yt{;EZw}YE>e}5tYqfAFXw?M#-;#+M2JpAf7uS11H zV)-j#)rElw@+f zMuoCYa!8p&1}BPA4+^#|!D6C+j%qM4s6rnxc~s?stOwAw znKjx$;?_FC7*=V~(sdp6ZB^(VZp5^8Oj**vN9D6eEYjmqAr~eBDSM4roV-UTi6tvH zAHBW3Bo+qqU5Q1|OmIQaMqbDeOca=52D-Ssc2{Dt5zL)YW~nlIHsr_9jbaScp1@@H zX#^ct5DT{v_&Z=8yol-6bI^5N!3LFxcXkVAW)8AWMv@uiP}3#UlpaRM)pSgEpI7F= zF{-X$yyGC6E`1AKH3#8VcVeA^?+cRYMbagt0Hn!f4gQe4z+Y0@AH|e`J+%BGAKIDa z3e*bl31KS#_@VH^kN@4{Kk=JQrEJA>mdHyXDi$w;#TTZ7(`hXv76XC&Qm+loGZ9#l z(zZ+DU^1YmKN(nmZc(Ws^{Gf@z9^Ya+!~@9A=%g&Bwm8K%u8mcFWQ)l*kU|)l0i=J z(nt?8`bFo|9A2oWDq`K{(67Eb=)+|lkku7Net!gYb|70jk0)-1E; zF-7BZIMwMvgn^$V@XYbvl0w)HcK)D=VDwT8jpA3w!r++OqpHwpV9Wa z=I!QWnZ9O>m_?EbP}Xb0g#jy0jvA1oaiNs0xln% zbo8^@ZTwWe4G*O|kapaO_ms@y!7>t&sGe*G?#tHTr_zV<-?Dnq#p@VCR4E=338i|R z&l#gbrDo3N^D|DuESCV|!5iLf=BMv^f?Jr2%_3$PLT7b48Y*7JXh#u7dP*_UTLyLO zadeb_5C0!~{{bagcAf`<+;irvC~CEu(afIN+0kl_+-Nk?&PXe1WGImoDUl)x5ghiuS%V$+)rT5-PW<-Yf-h1yO()-MBzyDQb6QD>?R14EQXOVqw zXJy1Q*ZlW0?_Hx?xJqJoqe6_!r%8ZJ72dCsNkcdL5QFz#z)aVhaI5dbuWg5E`ZoIS zyour4r?8WDD3c>4$; z2et|Wu&Lh0;?POxCm$gZ&LK&)D=(m=&_5-X5BukX5lft(M;Xw{u8i`YEi1z@NiGcP zOk)qB(mFy^ZL&ySgg`E%#$`m6*|H-T}7ExnNO?{0P0E-Vu^}F;r)}P zRfOsVv_&sUZHnic@9t|_~}%A?RYQ8bZWqjT9othNtteGg`~t(qjXxW0#_ts`g{R2m9n zEk&}CZEYoHIM|+UwwokbB1XgSX8C)Xgl43pwNi;Y+1_scJ;@}40$hyC@EV0nriQhZ zJ&@ZlU|z*vxfrI?Nz(Pu4P7tdFFxGl?-KsfX)k_nAO{U&H%rG=Naaw<6yW4}uc%7+ z@2&>%b63*%t9MrMU&+kO_+1`eOiUmh?2a5iAEce}ps_QyJDc)b!Xd|vG&XRpmo)*ZOVKS)d zLm(C^$viWaYoaOhOIVtPkxpoaZlmO9L5^6XNAfy)7YFiqW-SW8stcz6n@~ME2d^iL z231a_RL1mZ54x^=2lkm3pvm68&*Q~q30iHZ;nH_PH*+0xL+23oTBs)1QO$_0l!Xp| zN-Q7l&j%wGFWbt)6wB@-ExSEt_LTL>uydz*4;gqMd;H5LW%7JJPVfpadH8po-^uQL(jPuhV(k7T)A7sM zKPmmkMDjy~@_srdl^;$|h(#7^O|y+eASy3}^GC`EBw4wc>gcz6`Am zRabcp##^~U0YK3zJJ&M4WYkoK=j3w-NT+0q!XfM=qFcE`{PI8=fAK;UKXYrFq_Bmb zxwns>=_V*%kK%7!(&LPa;)d-XD(o_jc|XS9Jv!QdGrEVLY2|T`neOiL_%-~@&6OwX zid|3PFP$>t*SZsErF)QFQ6s!pDYHR0%tY)gGAU%rlw%AeNHjUtxr~&Qk#s3}gjmSJ zVw!aCYU&pc~q`dQz-6JK*`!IQNFH5?7u(iTIAhF1rT{Ygc zl!{?ypbh4!M@ZRaMNQV|9wSEH0VwYc@(8JW;hS!Qy5kZ8{x~bR&Q!qoU5+JaI z*kQ9gCeKbU#3JjHSv?iZ8q!#BtzgN^&Jx~-DYyq;=16H@CxI$Zm3_VQjL90~a~)Pk z4t@3~D;O&19m5f3 zV)N_fEdIv1CH&>fB!dS>_?b3>VW%Yi`%W4^-tQri7PAeIdhOHics<+a8-hVgfl;S7UR7q5pY}3qyox?Xl~fiCRX!@@`QdM-1snBwN5Rd!j zaJ8))?W5CZ?U_dBpdMC|hV0G%&{)K)y%xMV7QhXA6IUEHoKS^eq!Y^UdwGQS=Q%0w zIDSl0UeJDkloEHx6wU0zA6*FgZAh6i7T9P3%_N`E_yNuk zaqqDYx7msqb{5f31rQ;rled*YK)LcRN{j_rKkPUu@81M_Bo!pBA)lpV%{3T9tB6-^Su72{ zhlu(f;gjcWq;a$*FWY%4g}yJe2=CHa7{*@5=&Vt}^bAQ&2Foaq!uVU3bdll4A1blr zV+`O(3|`ATy!uWUXYL^GQ{iZrh(S_0I9kP8(SU`Xv(WThf@`t^xsjjwSSQ*=l2Il8ze;4J96=S`p(ckt163g3&giQubCf4w!eiQoGmnam`qN}4zp9eVyQyL#mpS_NHHN)8R zpcGHTt#{zejr-6=a!>^`c(=6|nIun^%(1N_@e(d|_9?^?OxJL$Z2${eFCtWozHAw> z>MDk&4d@)u!%op+Wxjnp_ogn7R`(`!yv8WO>E%fm7NhJ7EXN-Q=6{}&ESvLV(;q_? zf0h)Np}4FkN!ij70&MJll5@Wb)v&j zL613&mPs3&#RDZ);xZWH=}0`8dT^YIMVW|ARZWGRlRnQ>riiG>BcLitj&YY*X(B;u zlCFyj*rWqKQivs*IE2o-fs@m2{KBmn{DqbU{M=0!{`+eI{6DXz@N;)6_=~a!%atJh z)nEqq2|-@E+G1se*hjKrz8<^w@k`g8__;T2ki{ndt9z>?mIVIm>lXa&)*wDPU&rY% zFvhsBk%;{AMCCt$SYlba6=GVRPEcmw=W0!oW(;=I7!tNN*yb)H;~!!Ni?XZLvAtPD zA?AX5paW&s12`s$i%~k5Vg-qO5w1`Oivy<+(>@@t46qRN@Cx|R1Qe54()L0>`WnxF z32IaD=^zgg8FVi717)qS<9RF}3bDw``w#<5W{3vURfNJm*tI=ap1uq9_)UatLv$oQ zB%?Z*7uzu1e;LO4ZsdYK#0dU=HlCbs3$DYVpT>CKIrO)`3e(apguJuxxhAnV(t?rp zGf<7(g>89?fmKJIYJh?h6s2q!+Hh9FPl@Hj`jNQ#vlB~^f z@+Lg1>ln(_@Qy2iPYjxIN7N#(eaX?Mp6XxbTD&(DRRuk9;Cj%A4Z2T5rH=1(%Ea_qN1 zE|piGrnMhRPx{W2B;X=R9*aCpY}4Z;%f=UKd&tPLEbNr^({neYe=qcEALGt1*$SM zeU1NqlEVBkOOkR+DGn5Rf(TbTwCsI&YO0twf_D7cY(L@vW&0 zUeT@MwFNugUiRUY*%)4)iQ=892s(5{M6x8a#s;d@Dhh=HJgk?Aa0RF50(fQ6jkhM^ zcxxt!v(^eOxQZCh9w4+$cSIc{OH9?%6^flaD#;=$=@MO4ovw+vNdl2ad~umwPxmI9 z;l;(75zJ*0X_gq9BZ20Kt;tv%Y5N>3(+^;tx`T+Z4{`e>Vzvnc=O19P?Ok}(9Wbc} zLELA1?<2wfl*rexFmVIA(ep44y@$B&9_lGN6W;=K)2*25y8`pTC8V?+2qbDGvOVTy zQ+dad;lE{T;3$P^B$r_p{&DNO7+}&(-ABs1$cCaa ztu~cL7rRUW`cq>0(0@J{v1F2~RHIv{6-Ck2ktwghR;%NoKaOYTjQG^J6VDj3c->mV z4@M)H3T=W|hS_m7u3k8gTsnwsDu9i08JR!?cOP`X;fuo)&Z2v024x0XCLp`*H4qKP z@apN)7+X{$OHgXL{}{$4J#-|Tt~*yS+Hn`>-gyrly%UN;RYlfuf6jvweHy%@j^b^7 z7B8uy_})waLB@`sed3Q2#h*2$^Q?!TV3GwOe{A}I#PVeCe^IxxIn)|OVh|_JoPt)j zfND8|W+exgMTeU$cc5~FVPU_$=PcnPH>dF8Vp7?HT9w?vl~E%s#a)G1B8_c@SmMo1 zMC$8G3fDK@PZ6eQZCy#SE2zBmmw^Lm5>$ffJH~5-ntKSZ(ESn%q9mVS^$_01A&hcA z2I?^5bd+s4%YTa-p5A$q%nW3C1e)PB3yhIsv4~tQ2Or&+lS0ElVpKE!R3wmj5gxqG z1kW>)RNSj{IRtiDvT9A@IZ^meA{KG!LM)QrJnMTS!jj9MU>!S)*@rI^k6W<7G}C{L zBE1F9u^U+PQ>fFSy&sLPDZt6`E!=-E2S<^vInfa_CY`Qs)?E^5q3WmlDj!WYO#z`sf6Il z3L@*f$^w?5l|8DPD(zw(aR#Q(;eg$4XY$ZShmnu4aZ;@Klsx-m&^2h8*P8^ZD&hWg&$WALeeJ0q^ zytKP@hFmqjf^@8a5J@1P<>wRwMjj`fxH|^4d4XOgnZYkh>kmv%V_v7h7Vj*ZI&G}& zVRQWma~dZM_9$Gz0>)+xN*~xEn3xPs_~}~IjHz+83I22qEp3A^L=s>>N2Qv=<~G&o zY85@x3ou6Nj8UrT#D+3-b$~H-)n3O<`wFI*x6Fo=f&GDZkt)?tS`osi zQ^Dp~t~&qTK`2?K`fW1F3bz6<8_Fcd1g{lm8_9ZV>3jvbGTkOIAicVZCAR}pre$Rf zyxQg(s*O4vZWkuz)v(8_7`0HLUX*@|Y|`V3Zwh6X^|< zSk4BCFQ2E-$P`davkg_Y@lC8SPU?jn6ljy0(yk?nCz7tr$%?Sr+ zDddS`#M2Nz&t#h<6NwY%iz&erCs|fX6!ozLymm9p8WjwS3$SX`h>^HcCN)VUfvk{h z?f|kzUV_0KB`IZ_MMN_JxZDQlm&UO?(~qUeUM!CH!fjYWF;PNYc{fGz@ihJ662lJ4Axu5?ZUnRUr}mlvqCGpC3;wq9BRU zieqV4g)wF=ARtbaZbi0=4ihx;t9z&xR@nX9+`W7aw8FbsK7^0hfWiW!b#*(;9 z>)ET%!=7A+(c^{MY=F*Y!MtV(%Ni3Lwjjpm%}^TyFxq2K8~jMq>Kk-UJZ$ZPR&RsB z8^WU13ty^=$HQ~zSx}>UehKXzx0RjuX0<9zXibPwwVKj97_(<#U_9OQH1Pbe6K6Cz zTwKaQ7pSoen+m84a68;7#F7n!D31l~g){<@l0q^rUxs~1mZ4c!z85md5KQFXLLl-x z!h8m!1U-H(#3I)X$EwQTLI|~{tO>QNTt~iBNQ%b^*@R*hPsxt=6BPOhmC6-h?O zL^+RnlqA=T%1(g<3|S3B$VG@HO5pUzbBI%6SJ$bm-zOFlmgG(HBgDkA2(idk7I6Y@ zC|5v~;?NR{U`)3NM>L2flOB^Z(@<-dF{RQfv%zKP_GoMyi;R;gf^lyg7>dvdFeV~o zBYEMSlC7=NRYX%2B#9f*G?hEa%pEEykKU3wA>1;`jF(Dz533X{LM+Yb4w{UO6#;e% zTzSD?s>*1xJ%V`UeR8Q*n<$akYHU}3RpPNo%pigDzA{-`w)iPzwir7+jyM;gP>vSs zNH?hJ>7Md*OsO>U#ym_qE10mCl_Bck1c@ZIjarW9vh6EupA-d*tXv$gP(Z94KACJu z!IaPKBbgvM)(#-6uNRnCAr{%dkOqgK&P1mbkLBs)^H{5uu)z#Bi+R+u8SH1Hyik(u zlO-W;(FM`53GR`!lDt=8wam7Ppj1g9pYWoZ@?j+(Mk5;{o~E!`Tvf>B&n2bE+5ILStASzg2Kg*cpS zUmxRcU{Q+&ixXiA5PLX_8LbO5Iv-N9$rQ;+V~fzi*x`v};fZG845y&7cwnL{BHr_N z4ikFsCx0y>kei-J_V8QbT8SktC}8uBu#Tcx(X%vj@|2IxO*gIZu*C zYlmvd45ufm>~MSI$WX1SwKf9&B7v+-P^v(s=dnv#Xj!K!orMJL zq*|8+2 zVpZlZomim|*g;m_Ra9l~DT)BbWJLBNVmSrdvMi_Psp!fP&(f?rWz#$MgAnsAyRRnc zPLnL340MUoB}Q0(VWxCU5|69aks^ksc#kBBHc?$gjN}<(NAy*hh-kKzcpXRHPbd8TKDmA zIj8LJ;w&}MIx-1+ER6>586)D%8@wbIzcS|_$WAysYr^QPjs!;MyLAXR$z@o*_b%()v1VdU9& zg7O}yZ(Jda5D8&=R;v(!kVhb#!8`9=RtQB1;BnW8l9cmE5?8N3!2Q-9EUGQabsu*Q zD`X+$@vyBQ9o-`oWb4ZBp8g4i0E?A%boPv4YIYeePYgF&9^vARn+mDq2v9x4qiF5y z!ThojkNZY&_fZexMC$~JMIJ}}QDRY&Ji;NV$a;T49_P*0F)Ac!aw*$Y%UV+^gBzm@ zHaL=7=vs>7)^rSZwox}l_jea^xWYdF=3GP}7DtJINg)}J(AmlS4#q@@>R#r@^@LY5>}$nVl+ z?_o_yEG|!F4wR+wi^Qf#rilpaKo*9KlGJ24wI#AjN4Eo4d>6}!4cK|SjB3k}7-SV= zAr_hIBjh4$=gIJ2!MH4m;+W)Qhg8AJC`Ea4RYp^icv$!dV>n7;iLC7+P?vSXSO?6% zxUjm^kB|s)Qb;Ap&;A?|3oD!zmSC`CGKb6nfu9*IFeCD^E1mQr9(B>iM#!=W+U^w6 zsRC*Y)K#ht+0Im4j64oWv+}kXP&?&Atgr*f`N3?Ef$2vu>OndaV`J6OB$>(h_9O!> zB^AqS{At6De@ZMr>7O4@EVAKKkR3&oS=&NLdB-9%ujR$B3^^76pomf?CWJWcJeyuPOse zbWT6?9xuk#OPDump>tTUY_=grcT!tBgvk+x(d>iW8G%Xfhfd>GNXJM}m&tky_H~>X zOye$v&bxHdUt2DrFL{7dy((x3PEJ{QqFg5#XzHqo2UHp7|c#gjV^^AB^JlH{ZdnI}gy^JBSOHuhYSdu=CeQG)X-7 z;t%lY&wdf7&tAmED>vwThOxa%Hx^Ih?RU@M{H1G{TTtWdg)3<9=s~SP01L;JYrgf) zX_8Z%B-4rOEq4)5{Q5hHi$kIfNGbz(NFXGZ%=-fawh&9Lv7IUKC?aFBk~zW8=1#!wjlmO26Id%S z`=Zc#6AD=N>XNuK8$*~dBYWk%G8@H1*6ryTxAIOcwnleCXAqNjB+UcZ=rlTb&P3t} zHpbTw7>blEmvHSj&n7cT^GFR2R`= zsG`ME#{kP8pvz8@td3V1P7>$hLRyT4Dv7^dE}&A#BAqK!KvYmEuVAGq@8-%VQn8n+ zbYz7md(`LH|8fmtcD0GdDusNJZj&*SipNkSBUM+*%C4F@;_07TVo6ge$X+R8H>3F@ z1R^=OTrN0lYS^tywAIVdSxmI-7FaDVL}<@T$(mx#az!#J89Z0pMIl&2z!-sUUXQ7% zDGbc?qn~L(Jq@EtgOD$TB7JREA(jKMo*2wOC6*8W=f@LEkbvZ;OLeouDa2wgDx<=V zmmCQe_7N%`C?f=AgCp5z!b5k^>aF3Lr-4h}4V-l}F~~NYNCFzV8DHT5({v{T(~B4- zm`@U@XLME!&+BlvV+2Nb94^LT=kOGU7Z%YmI)aXo0o-bPfOpSd!pPJDtnL`jUAc!l z_qs7NXTbQV8uN5GQ*;`g(@XFW(Cob5ndvHC*RJ4Ma|3VCL20OB?`!-p(upNDD1_Fw z*hlpE-A{cMCkghwB!)Lno`TutM5Vq8lhuLGe&H+l?N9t3zW%N6;Q5zcrDM^cRB6EK zaO1^SUdQt!5FwH8KKBv^hsWuH=;TN&ufA~--{WVmop@Uzmx19i<(mFbjBe%}o_paH zT)KJ#-~IlJXdyY}2|_|9@AA9T=PoJ#o?Tc{h%1@S(?RVjdHcebzfPBP2k)FZi%U1J z6JSbAW!$`fAFsakHq-_)h9+ikzpaO4Q6ag=vgtCP<0-Ka2ad@lo?b_Zpqk>pqa+!p zH;bWhHO$Ts>o^Rp)eECHjKM`Sbdfq{ylm4UHy)~+xS_7%9eojP?8jG^Nj~z3i^P(s z?ne`Mt zDrof<#*_#Wu^;I=?x9o`7X5dlJz_~Pwh~35jPf!KOKIpW5 zRJ}ia6!u~N{CHv!fC&6Cjzv0;EX%HpFiO+T$C}8ccMxOm=c(|s4K3_^4l2}f%De>yzt5opf?$@vc85wy@`(gA)I{gJghE1+`$muK6{!@Mh#EWN1}1! z&cmDd`q#gV!M=W^Vrjhk^6R*E@ojh=S|maVR4Yv^`@Fc)-VSfNL7@Z;#zEIaz;Peo zF3FErgJ`mfRI-Rtv5G8JmELH?Cx8F<=px=FX)F-*Pfc{ zyiGEDnFKbByAST;y$k11s8vvI*6CKx;`3kqDm=jm%nmQE-)^NNDYJcQPl!c^hZkh7 z1p$mHlixv@=v%1olhn4bLPD^Rm>=GKh;-tKI(7#f&^UCsGu#I~$<5C;d}K`E9&M>4 zNBGIp2al(S6zjaPx<#C+AY5+3vAPEx;pmh1XYmIke%xk&eaXC!f7$NG3v>{_Jdnh* zbGvxm0(^Wpk7uoW7^NtAWypno=L-Bh-bV1gqH;kK$|A$>BE%{`0rL#4#b>)U=yJxD zg)QfK+z4ar_3Im*Ero!395pOBvT(`fag{xU=;oXxyEjK&cw1M+)gbWIp(rl!nkErj zbUCsrbXn%mWJoHpG7?%9;_6-`H4jj>wV@vALnYjSi1`xCGjAYZm_pPMQC8)yFkWTC zdO5#`nA?Pqu@{Enw~?{8ppklvda@1qz#{|=t%xs;qwduH`6U(^GAg_L`BE9^y#^SK z0|+^Wv70v#bJ#17SW+26N1*+jQ8rZ2L$kZE1F^FZaho2J5hyC;8iA5Q1Tzxv+SS7=a3(9a~nUE!; zi)7;`QNc0_M_zyigFGjFfEW>6wlr1+H}J--2@I(s2&MNBjjy6y+ri|l8ejU_*YUWs z6X94C4u1gWuieD+ue<@R$qrW_h%2{l;>v>?INNd_ufF>OeD&L3#3w)b+ZgO0Kq+6r z_nvtUU-`l(aqHS?+`fJXiz+P!7FD>|`cTbqw@<=N!jiuQn=a%}B9>j{cZzrrCmsYsMXaqHLc3_hskcr+x2(q0^cd!rrg6RP7T&sf1=>^& z7WUazeH`=blO}?%46DuX--*OJBC!&c_d5G{?g_E1?I|we(`}3R?Jg@`4g9XhgfC|zBLs>r?~#NubW$=*zf)g$x~ z;JX-Or$-hsovdS#0sM$W@%C&|nY1a&Ki?oe6`BP6ZA??(yrEyk%a#Lta(bCC_*K~z;i$Rtw9>5u>L3VpotNP(E-ABmX z$>7jq>u3{ADglZVUcZ5AVgcpwFs$=eVf7YCNPD#QI~eP2N5yypW&L&dmLKzAsvrKp zF2KLDg`<@O3jR6R7TU0Ert_(+AhRwnPaB9;WgvhAyo?;%M^#3VFv;#{J_6NkO#<^| zbGDfRd>;J^20dKmA6Cn|+nP**VyFNspWhW zOQNet0%X428M^MqK89xJai{AhvgHU?(^(AO@5bVUi3%Q=)@pITw-YOS+e+2VPb_10 zRE<0{z2I@-?6tG7yUmQPDHs>dn+~{%$8U6Ej$0*?s94Znn1~7u`caMjy$Rx$ILbEb}UbrtHBaDV(Rn zWZUIwDOU;Hngt^|9(G|nn86kWWA>l|Z!LnJo*rerwm{_o{q~abxapy5McJ~~z(Bh> z9f2&PQy{kFNn+Vt18XFO1!~e0iy8btSH~}$8z-RG@yb#GH`2i8NGuB^CRud!O&<5G zZv%Fj^E8^ph#`e2yOoov+Z}?24knlb9u)V`TH1#}Uf46=CkFkPVHFQV4smIkjyk-h zh@c<=I>mg6NKNqA`Ct=w=l#(0*hK>P%^nv_5#ZY+G5kPX#pTeEveTrBm~(A8i_f;u z5&DYIv3w53L7YTW=5=++Ej(J{JwpwI84#x^wys-?aHR?0>=W|7kvz?MZDM?G5Vo<4 zsC$QSShVACC99ysHqWbNBglHEQFh;gdGuviY$;^2B>dbe91bg%$KOQ8`w$yt5$R3r zvM!arf3SvJXaQ;4O*rP>hT7~!zP^ppD%&^PglzLI6C;DNaTo=h5R2@6mCVv%UB3;J z$@&D84hRB55`V(a2PT$u>4?AgkDTH9cl zJP)(GK-EgimaJfIqz~Dpi|`D+j``kmy!oaAmUYRFu;Y3fIqxi-i;rP)I;ket2t@nv z=48K&A5Sb-XM-4`>Sfz1je;%K@Ka)uy5`lN{QQ(ylyv;TpM_Xt=l)gx#r~iqAr{#> zxGBF07D6ntf^GLg6f=&JLM#bhJWOIqkYTcPnxPWGi%BM;rR(d^$J6NW2JoD$=oNi1%}x=p_C~z9;(Pk zGuY;Jy>=(`dObUO95?T^pv=te?i`|7$zpfC&bZ8=d)^EOKc5OkaCxYL9vbJjHA&ne z=-deG4!u~ru%l>N*gN73p_RGiqHC$GwFdhdcf`_;@69e@r>Xki| z3Iwub8M1$imifLFq`)9(e|Ij6I|TJ}?p<8rd7te|;N6i7&eKl(t}2FC<-IGf(KT5_ zpC$@FMTl{A2ZO-`%z+(c38^cQI$qNUacLod_a+>8VB1j0V2A?fp{a~z5=n?e66Uco zAjvQ9jrqMgx~}XpY9O&J@w&hx0J)s@EG37*Wb_-fw z%g*zUiAA5<#@$(`vNqcNr2uZ&N_ZUIMu>G8qq7gNjmQlMlURo)dXP4@BewhiM_ z!xgMuHNWXMAk>uU#4b`;(u zmIvpNwzt4F|1K5{ZVHSI6jylv!Ya}v6B%$2CdquL#FC)Oq=8VDK3JISfMxnJ3}ff{ z`zA{nU=?6Fdv|;ahqL)8s8!JUJxtJGAv>Xy&yD&fI{x?>)@7zKNrvJO*P_ zNZP0W%`GEk?1o>}4!_GoWw@p+IS^E~;M`D>yu{BGgSI-n9V1| za>)NP9Rs7%Nb)29V0y|gJmyD}kdUO~zmLy9K2Q1lDH;4nKgaB#JbRP$gjf!kgi<6) z%`2zN|Cr<`xvbnn0R5OS#@sHeJ zY5k|=IVOqYYy8pczF$vrVID81iCYmeGBma@6e(bs60AS5f{tJro&FNePFm1sO~c1_ zk#{Dt1V=f!i)wnG3V9FS)Gm^2OW7IJpD4rPO`%uU#0`SSI74EHeZ(5(F8p|QzXjLzsV zId4*cPi+3!j2UB#Hn?*on9@14^n}qe6vqusK-pAkGI@Y|x-^`zI?6KqGqVA&JC22g zX}CRhxI8}0Q?*A)pmmnZ=ni6zM5Z^Jpwa7~Gk9RNg^^|5WD<4woH67G^g*K7lEsH5 zYXDw;9*L~6d9p8%U(8koht)e0gzkQ7NxVzl=aG19vfp8M_5hzYpQi7b1PQ6@oF;h}J~Wp?3XVCh0t zW$3dcd4#%bj=-!-!o#|@o3lvA+3y*D%d(kRc^kFHA-QcA9+IAe!5L;hsPTZ9r2!3< zj*j)5PRQ2gy9o2|K&XUrc^5SyHx^|c=iAm zH(jl_01M9-m)fiyz#L8@*(4~hZX#D*L6vR1MZnIiY{Hhz!4OGeG03=KflVxLiG3y` zPhgTIH0vyXCPQc2fvRH&k;Mm8X9V>9JUc0SBT`s91E@00V`J0dJ+xi6w3O?h|aWN$>dSqC*>P^ia^iuw-8DsPm-x_ ze|W?ap~aS!P0M8lykQdd*=txDco!3oPLM>pu~Ceo6mcSH?uBmXGCZnQc$V7W4pkT& zEJS_-PP0oPme6bq)E%b~UhcFY2r^m}LAr^`+4EW+W zPryDsW5jhs5bsQzaa|k0l?6A(yk*2$5CM=_<`B8a230x1ghV5c$HFpkwk8YWZ6aIS zg_Y!Er3#Gj=CYiNDAEGkRytlXnM5{IVtdySie-?>*Vx&ssIANF<#j|ebyV0<5(L{6 zK`N82Bc3P_w5ljpWvP@Bit?_GASNq4ND3zjn2gEz$_5Fr31%PjbS#tUZSWVCdH=~c z)q0hnrL4ZYgCaYjEWnz{#*xb85e#J%Qd!9|A2m_;WyDfRL=th72rd zOSv^vN}EWrl2Qb(H37A330_YS$#e}lDpHx4Df484!Jr}rIm?=hbi7+1}Vni_`b4sepk|!Hf&e1>?YF;zA zv&H(aqgLBPN(TBg_mNyVAVBZpk!>A!^i{Mh=3pXu1d2z*7>W%Zmn)JGa{G#7kRI$^a2R+sR0xhiJ$!UdB>p`v~#1J;YX72F9<qm$sL#t9?JD1qb@#-pF8{2)IqIzWuj>Zw(yhed_o6gmh ziLrH=R*}oWxHJy`%xxr>+tBpSuz)^xIv%`B_ZxG;yVQZ8`68AkUV+mcWjr?NTG=kP zC=7!a>15iGaSjkTM5wa@nGP~eMCRHNq3{okUxk?hOv;xdnJG_xSnon8QCVq$vHBqp z3j;)6z_I~k9iwcihDbaFhjs?m=}s(mU1hog_2_LZj@*K3s0H%_*WowJAntImqsh8O zGMa>q6>Y#{(jj7;<2kZr=2h6IAJM9{!o7GKE+(&b1W~sYnF#a3bF=KsxyqBrU^3h| zO;QnJ$6BEfp%#$eY+3L8UN#TkukGuW`deR42B$F+~SK(s2If^^b(iM!Q zc@8`69g40qmJM9jr!h{T^))GM8tceYEmzsQW!a!&nVnOH#FqCEqLYvr*b#!1E7?FW zzfNVn#@LmCD2!QxZzd~ycmSRxW2ji8swer7Sjq&KNKxMPlu+UKp$vI<3{OvfUVMN`|L_-1^QgxT@EBv3C&F-DM25G=EW17(#88SXEy zVw_~(K>ASGH$5oVCNbp-d&uQw^;#D}zmO!$OTyzaJ zs_<<2=*g3a#5PJvURSQkBvjF#~3<%f7M zwhTkGiaf>LN{M-6Sra69QRgKJLYeRwWIk=YZ-&A_7P&3b{j5~hNLE!ku!iCQWSO5; zf^dd~tC4VISsE!*C_}=}u&&rX?BJ11>YKvL{P5wuJ^6VT~kGlgWgQ z3dIB4ydtW62k8~ISM!MRA%hV}Cd6T7g%6fFklsazd6RiCKDL)En^Is5mbGZ=83CC#&4ZC zTVWj~eSRzrK89P<569vo*cTrn;T}iGG6KWo0~jXSpkEqR9(~19>&O!SDy+*=n679- z1?SudmZu*e;v7dItU}&D3+L1W%(tJ#^2l|Vr|%%dLdrmeEX7WO1fy)~#{0)eEXObJ zKNMog%YNW&eHY9eUcQjR$Z`BTO=aq4 zYy_z6x~vJbnUk;xX%GOf%!P5!RK~gaC@wB%(9ceF(UivNr6?W;H_%~-z+GpDtQ}(9 z7RPNv30JJ^`0i*FSG`B*@UP(!k5NZ+h*TQLq-EG|U6}-yFUq=Fs|csp6k>^%c9G<@ zLL`b5U4V>qNil}ARP{nEY06BQKjTZwBi$PMiQmT8x07%#&aPP52U2-Ej0!!Fq6)1N`1pOEC@c#uh9vL&JI1<6Qr!yy)N@C4 z2JAyjLMmkfv}_$LNoH}U2-aztq?{uFk&shW3cYw0TO^|N$}aQ2jt~j_>VpCFt6d0^ z7-|H(A_+W7#FoV+b48v*Rw)y(X(-u7M<9$4U*rXJ9i>c##GF+&_-fQBK(lLDp(CiW z9@eO;WqJA929Ia`kq;GOi8VIi2}cRgWzd8vORUsLgjMFbnc730_g^74G;=Hn^p_haaA)z*z7a=)uUUBvXAs5*_GfQHLDf99+P-K~^r5(B`k~`f;GnYr) zqCv1wFgdL@Ts@Pn*6nRdbkqvJc>@sgb>~ESKJ{HNdQx=d( z1dxb$;Ej6_$Vb^YREtyzvhRZIb)7HO8C+CC1rk(V0*%B{IAmgQGZ2yzs3mqHT2omh z@JVGbZ4qJx2#=9b{(ZoI9Pmp?$_E0&$IySA=`k@rjTBlqRc z@s*UH<3HpUayzEuk0i;hj(-lG{`Y>hv7oz*i)^A!M|y;DbqGC+F%ktZNB8miSR7}a zhj`AtkJqDgGd$&j{{SZq4Rj@emZhAsNs^b>>UI=yN}a?--!{H8pGOZXZ;96*3m*{Z zp9~7fWy^|dDYG+V8JF=S)htzPq9`Mo_NW}G%K2T8og}~*4Uu>uEag z#wr|?`b8>aNiGsWaGmEBD%f9PKI&xxN)y>2RXb58O7|3#+0sO^T$*J`7EzSng*t`T zItuLY#X9dPN;ym*BpMZy>&$})ES}58&@=xsI70eRicDF`&~+&<)2T$M(krZs9FZ?C z?}eDpGF57Wpk7Fp;9}kR%OtN{hAO>^2wCaL@+=Jm*zc32JOQSlxGrCV&V`^FA)v}i ztR(21LIkZm>zn|rBN4jT?^7|x z3du{{SuoAIq)?3zG1!4cb9aAXb5bODuEnk3Rhgk&Enl#!s2sO1RgvKXW+ zQ$>eZXWMSD{?jYsepl%xwy{Q{tQRN_7)M3oUzGJ7B0ff|1Zmd0qy(=K%dN0Y#FegL zjqO*Z8@#J2*W?~~9+#2gDMq3m~6=C!EptqQzGa8`PYT@yC5UFQK zhIz%U2)W2s^OEGny$E$7mE*06KNMn-M_OfCRE1cY2dp&OPg=luG*2a0Kq%`Y8^#%+ zNu-J;Dm~g~v6~FWY}RVA^1L1q4~XqaFTF{{2&8dH+hv&+#8}3%MQB@kf&6R>wc@ z6N?b`CJ$Ucz($%tNpP;QvyZ6!XrBpy9D#YN_}53{IBnm7)V{H&hvD2^Lm%lG{rmyfG8R5G(CF^ErHVEQS|{gXnUsD2mYKuc205rP8Y@?-nxb zSxJJvYD9|~{d!Ph6v+|;v?!L@8F0nj0 z%Hj%vqrrZbPBt;(X`pR62`kG|Vtr>)6kIG&nRQVna23UM$fFp_=X!3Fq(Z`?1YePL z{%AjftiJ$>#hp&j>C`C*Y4N%9YJ98Hf^nALvw4JGn;##)(}$1W9>VY3 z9>YtsKA32?60*GkK|Mvsv`hS0%a(X;x=`XxicYbx#(FJK6eMMhvnGlw+pM>$LM%cm z9%e*{rNNYq)kw@M2!=}VMJotW9Hdv-<|KC^mUw=J;)V{9#1vzl3$d)Q{qpra&~Pei ziOKu96zfu4iwrfE$F{P#rVvX`VwmkF^9D1#cea>7sS+n9rmBGUMEn<;|!`G_A$j~nsbM6F#tmhGA}>RGdN{UoW|xMczdwUK>R?HI4D5N zSi%mAzQ!bTZfa|LSl>Ou>LC*=utBmB0yqX{nOj3n1%)Km_;218#2Mv9Hw6)j1Xcld zIW|M}#OhLxr-@UJrHDe97i1QdB__y&V78HAexf8+RwZh3UtU{?fqg)^mb_dm@O$}; zMFTlm`JLTjKKYwsNg0rkkr$i%JG9Nt&);&-80&zz1PUOq>Xe})D?G~1Di~E)Y zTD37{bEvr#+m?kH2_E6C9vgt%r_>|}5(X7nmKj3cyDbGo;(jzi-mF*v< ztP=$uXM-f@n8U1a*=R|Wa4=6HR3(_PjvFZgFoVfUXX2BWvvfaYnFA6h*f*XmG$=2L zX+~gVoZHzrIyQWsL{iET2uL((o|h(JB~tRfFKNl7)ez&51%?M~eA5%{=_;hjt7k2;R(F zlfffO*puE>R?T(sy2Nm0Lo6XsXPj-rz>r6i%OqPFcoRxUY_b0k{A49+nRDbz94U{1 zqN}XCRT2b`cQFt0C{T84+>&j@39ePzi8KM4#z#4Ko-XvwArD?0G(*F7^zyo1UdPXS zS`&w$Q9(y^7r%Dfjy}d+KuCqxmZ<@L2C|#+XXABz40J0UL6l@5??GfRhAcrMD<%i& zlFX4fmcvmz#|!@7-yFb+_6*!?iyH*a-)wEg%VTcb^B>`oV-Fv_yNoYtjgT2~GH4{u zB*MkTrK$TInI8x%L&aIS7E^H&1I)41%TQfB?JqeWLpQZ}9^>#eJec;vz7LV+k_=Wyo=1RTlhhl3-blN zEV9aINg9%!Kf=O=St$X!4&}uiE21bJgV&A5bEp&5N<{s{+P1R9haZcj9ahh^2Q(j{ps00W`nfeylc?-lyWizBu znw@0h5Y<(xg$j>ltK?RxNZH`2dIR1>n(DHI{Kh^CR7El@FDU`f4&Z0Kq}dQog3r{l z4H_z@WqSa#S{nhW0G%(1k!2?)%^?gd`_QiqVa8p=l|D7bY;nxe(ss;SFlh}TPGZO~ zA7Z^T4N+}dB;gXK)mFHpC1pb)A>aTlxH(eA^{yf4f=T7^g)%&MMhgSoV!OtSLFU5{ z%wurTjs-^oZBqt3HhQth$T!9suuwV1sA#;2yfQjucv=gKKaD8cH_6_f%gb|qx>8#G z6qR)#ltGH_K;9SR%T=Zd>##y_ucBUWqS07IwN58W73`-1G_&KF$iDYYQCyhz;@or$ zm$h|FldPU!Ud1cME%XzJuIp-eTlHk~rxzz2xX0c;L~(JQg!GWaG85ZFmvs}v1d1N# z7Ou@DFi&+GVcn;zR8<54A(miL6e7ujz!0Llm3InpI+-j1DZ%4p#96es!MI@u%21gx zZe=G^dBz`ReacJcVz`1ef`E)%6LC^V&_UB-#~4E?s);m}f6!Zll>lU8tj+K~6Le=g zY?n-O6V^bUak2`hr-BC0cQcQ3@j4n*AL|u%{&b1=DN=yR-~cK_iED2i_819=@hkg! z=&TfB`LdEi(G2^=9@Ob0EG7>yM^JX~zNzLu&ne->AnW4IxcL%BMQ*_=>@Te&QOt0W|JIjIo`k z6HQpi019rf{L56X)yx5!RDYh@2Go&^f@66Sy>;tQnanw1Ny3!af{Xti3Doi0gKmFWiTJlk~rxmnKwUOX}nrPl2{XIvP|ql zLM#cY$zMq*9D5dQ5U{>lm}ajFU#g((;!?^a}Fm=KFR;{6E{iw<#7B`i#u zH&Wh%P-9{MJnV##Al{$q@5FR5I~_biZwQ1r&5v^X2$p` zrr4PVBTYOEuAx1$i6I8eB-zDG*_EZzGn3`#DA`7m>*!+u&9ZmRFtFyM2Qag;T|7os zLY-$&XxO2a32c*rBCI4j3T@cbV7~jqYnVtJU^;#P4GD5N#X6ya^)ndeZ3(C> z5iDB5Sh9wxNT^Z>Jmba?#*9%0W*TaCP#aa`qiH{`4(rgm;K2PkD<(W?mJMS1ZvH?J+v$;Bneh%Q;S z+#iw=Bx08Z$g2dSI@_IXB9BCA;S&t-n5Z5GtCw!gSz}xATq9#+$dtr1t)z{0m}FhI zFBWinCV?9Z9^BIf*-1+{lV%5VP5p z8P~-u2`90EC4!AiZWFOXURB(J9Pejb4bAxQ?pzuV`1!wA)$l8`C3Latyl2|Rn}Y$g z+BWd)Xb^2|t9O{EkBwz;p5Q*jYrZiaz-2=j-!bIyva^n5UgPv+2A`iRppAX*P0tR# zKW>93T1Auu$8LsUZ5;ppkpaIy8p6MSY{9>{F^|iAS|z{#c%X=%duI{P_INStqXL#X zkTNl5Zw2=8>sOZWrM@s;YIoz?w>9XX6_D+9zsq>~<%hHQ=&f0N;@&d8Won>>_kV-! z{txe)@Uh!E{O%(yJ~FApFLY1i6N65Cw9Ss+?(pK%T|vBS-B27!GMhoUPNHSm`eMMh z?%DAD(Kv3hT%Q35PqdEk6-G_;};+2@#_N({PIl)KK;mtmnU*q;59A0r-kLVrdKfQOyF;}JjAa| z8F9`}VMPd&>>y={yP{SU+!JTZ1@mblGX`R8ZR!z@q=y;zIuHb-x&;{lll4m!3tW~ zM&D(H|NRy#e&b#czuTS0ue3ODm-ioIJA7-lfX_Uz;EU}Re7@I;Pj@b3gl#12rpZ>o zf~#4^Xs%3Ll}EazZROocfv&ki($3{mbiZB-jWC*xEXu_M3b8O{cj@tFwX5E_{XHYoC_Gj|&ZXrLn3Ih`hj;M_@uM zISLmUZu}D?mO0fivGC&W6AP6*BVP6nI3|cJ11m{_kQYNv-6EF9dSRFz!qjL7X2!cP zHS!qqlfAI&mXYI0a$bauPBBN4*n&Ue!`$RJW{0T2XJ@fAF^z@MNi0ndVz{>zMy(zh zS``_wAy!uQ!Ord;!A)SZlR1P~F3-F1>X;pu3>n<9+&wt*pc0;i|U zcw=A*j~#J5(D`tQ9cG%SF-u^*GV8|uaR>S|Vf0#}xIJq@%ZwSzw2;Q!9yIYSTqF>F zuXP$N>I5Dc^0=q+p-UH1HYgHn>Cf*FXbG@XDcR-`(rn-alaoZ{q(Zfmh-CS2c_b!F zSQv7<@Dsp%;+zPOb~fguBTV-az_d94y*Eu|vq6G7f;YF%4n-o1ZefZiO!(I@o7%=$ zgbFE8gEPO!`q)(-b1k#IjG{((FE<^X42P7JW$%V+c%0hBKwuAjj&+QNDzK0cSwtAw zqn6YASW0YT#zpdF>UZTaLt-R{KvuMUGTyyO5@Ae`ZDcf&qy#%dg1==&+9;0+uCQEm zhh7G|%t3L8lVH%xb$;-4bx5l?vEcrWldwAMl6u| zzrbt$BZBdD$1d#5JB7VME;`orm)nhaW+JOBC*SL*njZ?{p_Agvvx<-OF5&kl9hhW4 zf78&w&-40UrX>G{5BS?xRCs>Ah*kk*65Ky&9mMaBc<^2bxJ=;v@^FgRjbWK$CRZw= zRIe%%5MLh(;MoTb^zghlLVNhTCp*x}ygX!Ezc8P~D+_UqF%Hj|O8BQ8e!RuHe2ew= z^LK;zTM9Wx&Jj-cm#WFbdlC(Mk?*BNIY z)B5n6tXEzVS;miDCUvqeNuPY_t_N=nrqR#qK4213`LcQy*Orw1Q6Bqc>j#i|RB0JZ zQIWOtHW;h&h;mO!wdxA&b~A=YJ2BAz5EJ7)n4TEG!uT+jXC~>+{mAds5MA9wfY=c) z?kO+**DJdSyNP4Hz3A+IfT59g%un}WajYMUqeHOkt*Ga#DAEnfdlVrM5sk<1S7b$I z`TY|l7A<6j(-alItoJVkm)-x;0wM&^FfDJ0aygr?!E4tcsOv=9IgDC(2?r%c{mv$i z)|yyP7~z#6#1jwTQTM?emJuRUnsgfuZxqIntFTYrLc%V^OpW`j*86rmZmrpxB;le8Gx!3+8*K5}mkC#Lc^&(8Gngct8DC14={5MyywTfy^P zHoQ3&M2oeKSLtqEQaKQe9V(A);su#JMbK-mk+c|ayq_}OpX4OV=*S!i8Bbp(b5>~O z%d)5*m13L(C<8TO{I@)Uq6Sf(%jYD|B&-VSI2~R=gE5f^>_T?OtMU6V?L?I7RGf&s z$CF1g(w^1mI%2jQJ8TZ0xH*q6Jk;YobrB~gBY3@C2bF&X{`3~AtWOyloRDQpsLUK} zgHE#4_r|>VQil!$rYbr$d7K*epv~EUkAbpaEa4ed9lz5VK+6Kb*pR|&lQz7&=vQ_a zobfd9kw+FhLs0zN{cHHSt0DZVjQ~H9#s%FLmKayRL3i=1i)H-Fv0ePPH$(WlBQ^XY zCH1H7*f1s_%=Z76T~>V43jE!3di>9H0U!4QzcAv*Io7qZOD2KW%yt{Jt>f1^-1xO_ zFFv}uWgDL!2*ApEP~Mr4$Ugsg8dqjAaPv4~CQgq8@a@(` zEb*GbjU$AZkCyNrKHsKAuWJ_!BixGY;R_Q^e0Hpa&rVhGDoOU52n&AK!~FkJhY#;D zZ;$xdAKaV3xp|xN9XT0S)nR>A1Y|KbA^-eP{9 zb8h1|I?R~nzs-!XYs8aJ(%nx65AnuB9iCh8Vv%`a(<|>ycsQ=QoA{-HBtFBk{g3yJ z_-hZ$_;r%lzq;eVKf7tB!_44wbfdrCLgz#L(6BCLqsb84 zVhhTo#GN#Xo;g^jA3{BJ8z!nndC8wF>|ttNi|elIh9M?-Cb?iMj+K}e zE>#yMIxfRx^(rGEJd|>w>H)m0NO`t96_23HiQXNm~LTHdA8dZ zTE};WJa~CJf*A&nJnndJGDc$A$8FaNUY~HmPJk6f?P9X=`wOEc%)~boQlZGi^J7+g zqf3WAcIah(_JHnakZfcZqL7ZjGRer7h|J)oqLP`vGJG#i^(m8~6o;3S=cf!PUQb?Z z3bBZqmt)G7)0!_tQod}%tRMrDbqdibf{TJ7pdIe)MOA~ zy&4J9XQuqPV=REUj0)TJ3YGcq^@NnQqXN9gE#CaZj1wN#fiZoA-)ghr?>+M4AI$)N zy|aeD)*i>->kp%yU}4}rzCgtOoA(U(n|D+A-$vH)-`)@5f1srPc7Fow8Mwf@|3BId z`1uE6{F7TA{Bx?{ztQHw|4OHGn{_IyMu_5;b*p5bcmcoXS-?+BrtnMccAOdULeFws zA_4sRonJhO=C!T zltqJwo4Po@)w+N=-e1f1m`oqwJ9j5BLZ|LvSw?IH##jw28#1rt5N6ipuXWn+MG6ZU zj1wj?e||22U$`@ecUV8-@}%z!nydIbon}1Gdq!9mFXQkxx;^-gbsNu^SMi%&7G?Q* z!U4{)Pkp4Dd58ih9_jJr0WJD@Z+RTfE{|oF<9=)p|Lk!9zw0`}|HOFscZOBG!)w05 zb58TP>ujHIFR$R^53QJCzO=08N#6UkK8-5_9;L4eUPKZUVX0lzWe`U~_UC8Zk}=J8 z8}w86;nR1co>pUb)rm&Kg;L3a)yz05(SF#}_b@Zo4p+FL3_C9HdVXgXi~VhIFAkv+ zHv{|3Fnjm@Rsd_cIaK_Eh-q4(di*9lk(@#<@+9JTf}{|NEa{?5lKjaL%Q6|2E+N+> z39K^7QW<|pETM1{X##I56r#;yVKgo9YHuUtp2gnoDz?eg%Ki82*vo2>GCY8B=oHMR zI5Jd}C92h-j$!zRPa>A)3Zffn9JeJ zLi50r3w+yGUGpQZOOqL=d*@#WTOyf*H}HEkAWM;++U zr(j_|e9TXbN?jfsDdX8?sc{*;Nrf+VH=0@@Nv|uD%Vaipi9skpC1d)R$iebFc#Z+K zEG~vkVdQtJ%n>N4G0*Eyv7?Ug+OIFKW>st~V+`FKyWim!Bf@vdr$tt2>q5Rwe+7GYQd+`RHcc z#a(zx`^pk7qAWLA#u~3H+gUpp3w@C-jPvtho;N`dlXqVh27(Mh)-cWRIC*>|FW3D% z=4A))G1kR1nssy&)MSyuw{+=@#qZ3~huw-UdpEE9y-^+h&b5%Tr^oks z&wq4^&Wp}O#p^rSUVYXI7I?k8M7xu^6)ds6rkK9P55GBL!!XNxoq7ND`ySk;!&C9Q z$5Ou3A#SqHJ~|M^i?(eHvmLcO_Vm0H*UWibw(rmZ)$x7Sotxc$gsS3S^BSL=sNlQi z1AKu5lVGgK7U8{Yn=jvAM8A=4hlo|5et8)ecn<;J|Iii19aj@}=2;#I58LxNL9)@a zjwF9e{QP4#rt!LYQz6n%^`&s#%JTBwvdLGAy@`K)D~`8#|2~%WYf};Ye1{X?q5T=; zy~hc0s^$@TqZR!7`*XO=GKK4Pc-aYmYp8-R8%f$>;NSLV(a-vpP33;ib%6i1!;VM% z`-El_|Kx!N->0~et+F4{wtc>jZc`n{=ZG^WSWo|~$BB}oi@Q?+*eIMN-rTu$_JI|qChL6@c?z{~x`vVYacGCnA!h2p zQQgHWmvMki>>aJ+aK(n2zYk?`E|c%UV058c+fd$dYnDb~p1MeJKMJg}qaX6dWP`)Q zJ!~}ts3m7ma<#)beHJQ%i#XmyuCa?KF-rQj2w{1N{}X+A|A)lVQ1-nRVu=W`$ctKb z*jRiWMXJqQEQTyJvKJh^Qd^n5K-U8a?hJsCcuS5bwomC zw6(OMsJ;eU*DFxMq1jE5@l7LU>49P58m1QJl%+Xj2wj+}HOU}xxYuB! zg_OV?B=Fp@@1fnX2NeTN9@EL}SlKjcgtm5q9b=T>aEmhMrnU}p5T*&*%j_h5RM|3W z#+lkffC0N0uELPs0J%wdWTp16VVeJ*eZ+A1SRYv#?UPzn zR%wkV$|%aHG_t?Llc5Sp)2^=~Lpz`6eMOnxosHq8mMOg5sllZQ8#*mi9GL_3(g~d# zw&IQ|h1WW4I6argZ9fT+o$6H^)sSk1|E}ZYf*)5@VdbT}453ZX9XSd$MAo*StQMOS zTYZReOBK)CGx&x&jgv%#=f?{8`gjDFSWga?x04<02NO9wGZe-1Q)#@aE#o=n;q`C@ zMFN5h^Nz`Up$6+mhDNT)$T4<=f()OPC06#B_LU^Fx^u+?w$Ba<>^$<0M+Oz-7z_T& zAvBIWw8k{5B+jzff7ZJ(zJe1&7QD96#6ai3chD);$`<1 zUTHPq@?;Y4EESb@O;8AREtc>F%FA!Cj$fbj;GKmqURes`Mr;dKmchw5dzNkYKU~(* z(a|xoZ2zB|T6~I#S!66k*_Rg>yC1zfg+F+h!7QWr7YRUrpK3WFb;xsFjLB2_F#ekp zdYoZQogyLp<1>qRiv*%(J5B|+@Rd^?=wkbxn@!-iZ!F>S13r9a$cNv!ufaD+EWONc zFZ69nhfKOQ9V9&v5g>H#th5&@!=i( z;{7~M_8aj^`yzg8FpG1nn-c`hPqaBfornV4WSaN*+CvR`_1j9GiQ%|B8^@P=^a_!Q z1NprRgLs1iWt4p&!G2ceF@4$~zIgdQzSQgC_Ydv(>_k=>v1#NnpYIIeBM-g! z)OZp9%iB}9X{&;!6Enp4a=`yDDXcV?mYQ>4@U9Ek=CvkqKYD zufmt_F5pWGBvsbM3%U~i$-BMyhqrb3J#`ho)9uAq`W(1pji4`9#joC-!6n{5xv`Ew zrGkIkky6_EJj?ly?|AUJmN-6f-iiPB&1L+p`+9Wn{*ReHIupY$^_lUdyC!`4x{Aa? zB4vO7XV(_d!kGRto&G;~pyT~Q`1N}>{EPE*%KMfc3ZrLd68OaR8GMuHfAm^Eo}08N z@55w>v%7q#5KEn)Udc2Nr${fdzXXUI?Sq|&8rxC!jgVN}#OM++UDm87SRI5=@%A98 zyMfTcMa--8$mZ)LrUb^v9>cwK6Xn1Fut65zX%d5Z4$s_Mk0502KumWFDbqa+PcJLW zx(KnzQu!g0o2*9gWTK?(x%Hn*EW#!7Jv+kD{sE3;@}Kenu(eIqt}-LW&Y8%_}DT5!F0XG63UbJ8a{3;TpXKbJs+C7M4r(}R#`w;UJx1pNp zg3X{sE}lZxAE9j<#oWLdSm!Qb^!_ubdL9G2L_0}k1Cl(?J@WwOi5_^=22>MuT0?P4 z>m)Wd5F4V8GP0K)`Vj;3vt404H`l<6v$DD_6%s$Q*Y+^%h+#arh5>f&XXiKYorO)j zY)<1Y8(9=xn|lKj47x7=4!$+!z-wAs*3b?fF@WssG!&h5IkdYI4VvgufiDx{T(?;@An2ZasJOvP}Yz++;^=^{vd zb<_zhLBY-Ph$`1JurCl;J4iUPAS0c$GHaQ5gQ5H`Mx^ms2Zhxm1hWPBGik)?C4|a3 zG-Ms1)TXk|lf3jEV3Ll~!FZE-C9&8Fax$nu7CPj;M9~Y;jiU(IoTs39VwxZ ztf9s-rej5AR=YeOmJva@a#48bqP0&O*CcHV= z>qpAQPQ9#?PLk)?$^ksQMm$o%N|8<~S|;(Wva{7uqY6w$C`Nc~D}j8D^)=7@53zh| zeilpe_=0RT%uXFzfrIxMq(rdsm}N&C zE{Zq{``esTmh<w^2S%+)xHH?zqvB{`6OKp@?qq@SCG+JrDZ~nJ@EDn)FHa~!jNegL75C-> zxIJmdg0HMRQqK^iC!KUkDj)8clDIM;SET6 zE0DG1797maq!ztPE{vOE%I=RLilzwL*vYz_U>mf~Ix+6ZA(TI4{qMkLPC!;jj|>Z+R~q%T^)V7Nq&_ zBx5j{so?yjD~wMg*+E&(R@pT1Px|>&iDhoVgeU_$o@TH!DZ~ao(x$#@jtB2roSb1I=~7`0wt zrPtIkygZl2%VTMf%TQ*%E0rUVFECGE{%*ekXD0)AXFQ1el;<*fi#SR!m1RWg6cH;Z zWvQ%KA2FU+U6Gw43ktC$Ycjuw*JL>wB=UTA6-AP3S%%G4b`X)5{v_}KW9_0=ySFP}F*r<*FAp&|v4Mm}6O4UXqBANhB?uQRYkSDxalf zav#YfPGCMJk{E$ZKF=BN~TOsRILtehKQ{RPY0$~siUF6G^l zY&<3JwetKet4zpf%!I6m#_I)n?FjEJ6D6qymANePxsXA)Nb=%!Wv+~*IL`^nIb|Nt z<7hm=qA7zhWSDk}=cL)DnbIEXlqAR`>+i)X2Xum4N(!;Phn!_h`kRX239=47GJ28c zMXT%&yaqLoGJ!hIc9wk0rvlA+0d##Wed%1}|>8CmlC zN?SHrmOMpfGQ+ybZlNUY$#X)@Ly-T#+p&y$%A6k|Z+CSc5gsF=P@XbKe~zZMmG#Kv ziGYXK3X&M)9#Wq&P(>cWlONgc6g(6T@(5TaamyT%s5slq0qdEuK_?Ys{IP+h0t(M!8UvYzU7B7FWrUH2@G;WTPs zS)9h=NG~S4A7N&s3lpQAWZ%1Z+}rnaWsgz*uJuPk%jktdoF_SPKI!nmGp00mhg#A2d?>cl(`ntc^T^@ zsRI<)xn)_M42ec#{fyn4L);bA9fy0VfS* zm{}G-^J!+@yHrt}HLu`|a}&RQeHO1%oD2u((0PuGc=HnkD0~&L7ord%$qN}&4-~>U zCXeIKC;cAN2X zKmwq{Xphs ziEFps2u!cz%Yr_nO%pA^(!M2!_1qH)+#Db zBiL3Rxh{#r$@ucH&V{JMBoJ}oGWs#fc8nAb_&Ld6`T$c%>YZ&IU6Anz;NzI($FXeYs|Z-z;b#!Xm=_@xcTh(8iue&? zsS)q#1gTsSR49p53Fj|fR*2=v0##&*5ArB%X3l^JqbDXWZIe_kBoZIxZ-ihX%WQ|p z_Fp6J2!Y#$cMx^}-6{&)ml87>^mvXkb>*g3d- zOR!m{VAYSor0R#7#H5=T!fby#O!H$1xm*YblL(OVWr(s6izi9KBfu>fstU1m`_^zj zu!Ywq{J3dr;=C%2dzvH+46Z?M4lh3#!aZ{g-Qjh7zt4#)mIfXKcW|B3=Zhpn z%F0B%RAmiu2C66`0bynp%aJX#sY5U@fMnRQBs)9Sm3cevF8Q%sJVI|{kJtBL+LA-h zycf4rRv1?gL1U%>{EIUlyvLp+vxq-E7{c?K48A|^#DKZ1j4%mHV3M(NwHtLU?g(9+ zcTE{&AgV@2t)%0-3aQ9qpw;>TN(2K@YO+XRL>vw~@EUYA%a`1$&OD_BX(dcwvKmay_n(mmrOZ) ze=3X<+5%ceY|8r;8_RXMONU{Wr=9u#omL&*vaI0VataRGtp>qG`hiTq^ARk>g(P_& zA&Hc@f~O88L8cTkkwTY zdHJ1>U=*f8PV&1n<0wHzAFFN>?4LZciLh>E0&#@kCVxlE?4JawAQeZD@fhO$B1H2j zK~Vr*NF`7ph!Q-*6fZ&^LV8)rBgr66;L9laW?p$rh{wb#ye^aMa}ur+FnO&o0X4=t zh!KEg73mCFTvq7_B&sZ1lVy=b4P_sjC*(*?sE|v538t9Lt`~62 z(-G6{%Ju>oiit2u!a{M=YDl5mQ9_qJi7s0hHeM{sJj&AcCib^sPXnFom&8WmP71@S z07gtH9-GAwowb_eG?a|Fw`X?YmKWXm4OUtMzIct5 zTZGn=z_Kp^T{I0#y2zlY!bFBPhBlz{ufWNUXiM|>LY=CCq(K+sr{9x0Yq z_IOxHll#DX`YawVMd2oiMN15X>IyP4VTuSJq-vMvyfPeGwrT!$#}bLxNl-5OPpTt$=*q%G2bOHgqY)~ayo_ukf$*BLcG94~ zfD;Qoys_X#cc2L!Kc5RW@kr&zd;I*eK8{|0MHx{EGty1OJ^ZqGhfqe=QA?_TxMBc>^0&x{~lpKIX7Y?p;1{< z?Vj&l#+z)5bJhyZFfVO9=Ak+OBgM%o%aF^hAywN~6uvypia&iPBERKtN%DA1K0E$g z{yzThm|%pA5^SqPbrrHsn>d3E!6{du%4a-fNyxH9O@gEnCqX4h0x1HvEd8Hh{AY@5 zNY|McNiw;PK%OGFrg_~Q^H-o#OEG?8C0VVx!ryct4T9pzzVfIoNf(l9(peBt3;dm{ z@&0mcaU8`>6y;ezNg=PeDV8Tg044~_@*gPzuxy_z3oIr@Ve>oL^|8qFi=}mCB&4$O z6dgyNK%Aw>Nij(oV&Zy8A~8BTdCZn22FU8oMUqyI*UHEUR0^{U+fC+7MTsd9f;C06 zLPm2GN9V>Ycu2MLD6)-LCtR40Fh7K@Q7Z2n%LQDZXu7E@gZcw13Qm1uA2We9oM-G` zUkDPn2<#GzLU4@X5w`I->w74|;rnN~m0OI6n%mbAs#K2rM1sBae?raA^A zd+6uq@>ouWFegd4GGx~sFVc09u-R9{!HAQjF;dpClP50XRN@41r494)RHF%hpblqp z3oeQY6GeoHG3z7dI*5e^ZwkxqI2J=GsKaSuXBt{x7FIePnILXt?8s^%I>wKQLd{6x zTJlt2_LpJwWuUTqc}^6@aFTc&hc#S-nM4$&IEm1)$aViw9SHe+_dj%k$xy;SA> zb5Znbs9ZHEjM42FsmeoiAFB)yEgSzPoy&E{76w>J{h>olvC-`WbR(5!jCOf3y+!aU zVUj^JNEg!K-^G%fDo=oy#4*j_n+R`WI=ZDi3-%_VOe}Pepu|G!7(7GaZM56jD7>G_ zcZkUd0geGL#3FmR2a`f9qJSC-xg^;^vux-r@8Ko+E>X#736uujRL6*xiJjwVpex8g z4ey{YeW(nfdvLLH*~@FRpedx-8Dv!2TlxrI*Hv(r>UxUc-^+kq2yH5=NS;f_ zDl72kN>r(3!jGbX?9kbluGl14gyV! zrG)FoJjNLA<4nW;8kSPK@bZ4L^1wUV4Bj&qFhp>XVZO7G6?W2svKdpHqA5ZJ9wRWz zb_^Pw zm^6CPud-pf)OicI2p39Oxk-bTB}_K9a^)1`{|rPh~?X zeTu>M%&Z5O!z;@E4H^R1ZMuN#(_RMBit^~>x;=|ii+;SbKy^G5!qssp7pV{%WcpQkyugl1E18sMmki1n)n|xmBur(IkQe9C8n#4b)=Av#^a2nv z`&IVpmgTeEnG#C7Y!3$GK1pebjzmRkEsNmEGiD7zdV(s-nr26@?JT}GqH%hV16?^RO*2I)M^n=CpgN>IlAxAK}7XZ_GpRc0epv~dzJ zzoUCctxoroEu*%!t*q#*BLE2a%Z`Y|P36UJs!E$)rCsOudR}jepC?Kr+GvsWWy&(S^!Q!N zAHIW;&!Qx~1cie#KTIBpB-fB7k>m-a83JuXhHlFU!z_VH_8+2P$uhojjDs?rtSot+ zAu$x`T1v9?d%1*MvB1RNr7G{mP*Z72`bNPXUTqf) zwJeqyL)Yk7RQ&fa+v*+qO}Ivv-ZCA;ooN@Y zkC|{`R7)49#o2KK&WxIIe#nI@Lmu22^Wy=_);eX!!)XT|664xQzCFuL3{c6<=)>rn zw$czJU}yQg@m2WZvM)~=5fY0m&>M+Xm2FVYoxAXd#3Gz>_yLIJPabY8nxY;o+1P=jNL$C&wgKX$6U{D{xs3i(jpoB$#1sZl@gMS@rM-2utq=AKTr1zi` zB|(rj*o!bbGcec^Shf(X+!d0}rZTE(F0hBo<38NdxiC+~l%SQHTyW#rHY4s46h6PO zgO3iB@R*H$R+VEVdf_JMjJoo8qiY6jp>3RZZsB(yx$&66CGT2pxz}-l&gb7;>cS@< zPN9Y5!nlNmz;mLV&WnW{{n>5FIx*FuN~TZf*L!ChtkTC z&BI3!PFB|yVu{44=;&w?D*!%@Isv1Po8M zhy!^u&U0F+R^IGZ;nqSC4~W7y3`KnT)*$YV7?j6MSt6=0lR>y%gTF-OLA4hs94Qm> zPO>a-cdFs!aWd;)7At(?@hm$MNsT1cL4|X*->5v=ly$tEyyg9QAI6+ps!r~k|+GAH0ovf6P+!)1q3WpQ@ zI`p|~aIh>LCIU*A4zE**eyw#LH!N9L=(eJCB_)!n?75N55Y+Qe9&H^z))HblehhX@ z9>>3rNkyE^lM!O_9!7{+l(`TKftlZ>Nh(i>g)V_4mZkcQvD}e(hVGz3vXH?NW%kLU zvW8!w!DE>URT2yxYBHUs+ei`I>8{E(g;-J~A9)#^5LZJ)P3B~`%RI@U$a@xey(dWs zUdSU~AaThGxhWDdl|x$gCt*yd2sBBOQX)-4O6U0RJo8p3=}11;`TdIW2rbQe7Zom# z!1A*06kSY2ToM5}EF->@_dHKhluVJ&tTM?LI-zSe+mk8E9?57bC z3G#BE%0}LAh?8=M^LT5_h3@b++=RX*x+gRH=CrSfPhFkG8FdM#=3{tmU>Q@+2)qf zjpeE&!rc4B5{u?=?(79vZ6fXdQ;0=4M7TsYyHXC64`i0+A$EBFv13V)RK&5w*r9?# zH0%fwS~*!%v3-U%&5}_bH3SJ#i~1lQc1_^Y%{E-U-;GQ6I&tAn7jAb>z#go?MbdG& zXyI8{qo+tVrz&A3nrT1V+o$mGK`*+yyK(Q{Jv?sj#^9(LDnkbL*sd}xwPnJA$L27B zrix|C(|)}lFVBW?pK9Y9=6!r#v!+ZQdx@-lebS6YO4>=PkmtH)sW7&2A+U|Fjz!SL zTQi~a+=s7m22T>;-2bl@gYRVIJEI%rjt%;V4&-eB-Oq|1_}CT94Zo?v`N z9mXvefroNm=6m?4Is@#K{%VtTQ$(1ZG%i6zFi8tJ6O3f9?gRr@l7WGu<8@T5>tT|Y zOyHFDgnC&{Ss-wb|CR}MGMO@$0j{asxF$|eTf?w<4ehM69(NHcPl@2Pr#zO3vvcN1 zC?Tq@VCD!e0;&N1n?p{#G-}65M$~BGKv8p-39j$zGtjWJU11%zGFk(?=VN_C*%w30 z;Jw(Tg^O)3yWPoz*g}y`hyhQrOINUp4d%Jaox}}VZdndT9xqULz)Cmy#<&^7bXX?- z9b#E)2?8@Me~NV&pljQr3p-%@REtN-JFj0{2L8L-Mf|_oviNHq1^n#Y82p8Ii<;y@*USzd-{&#nA~yHvc2?jZ>#}+< z#yCDn5|%wwWF*`V7IV1E<4?`R(dpa665HUV#}+(}0z>S8pT9YaljB}=lN{L%Sf_^s zq$iF_$oYv=`IFP}dzC*a<>-1M@|cVLN?zQ{`-Vns7qX9k(C5d()G(Ij#$Yop!EVvO z=kcOOXR^|y^HJVytSK9+#bPly?K;@aQ!pFG;B#x>_1PG6B@z+=oQ)Et8!A)i$VN|* zpn=CtLZ_aC+hK)faUQX71dVD9@koL$kA#w<^C8*D9`Zq7NXd`gY=z5iK`s?TIuWKL z*+)i3K$T@goUD^aGUe|K-IzE|Wrt0QEmC=CLuq2FpC#DH0TL!!o#?+)Y&&!udecrG7nD8 z^JMv_3-b;t|0Ve76a}2sOlM7He7(zvK{}RTnf3hCzgOelZAtX>`YQH)6E29 zY=XpP&C~u+CI8-{hFR`!8@RdhYZ;yHLh}PsGl}{TRZiJonBGueEl9SAC zzM+cY=1c^Wp#xlG{S7*IFzj5%ZRRbgfX5*csZC|CZy^;)@@S|=MfuPY!X2GQS)@^h zXlk5U3W`y@r}CnY!a+si@Z=8_Vkt(}5F?<9(~(DfdvvU_VC4+K`tSDd;xAl?;Qw(y zfxmJqjQ?9}3O{qng`YjMfdA&Q4u9#i1OH1~8Jg4q^t`{URxl7)!`GKe_=ji4@iAE{ zWOg0PbS@4mIN5eLOxG8v&~dPgLnOxYb51PK>8MD)&x{6e#=eHPry{s(ZeorC=M>vR z*8IBX*~43t5j^&9;?YtRYLYPfnlh==6C)w;{(l^q{BZi?$mEBU0CI}$By&cDSW@yb zn;knANs~yds1=gfUaR0>yUBV^!DhC=U@$AAnaUNq8kQ?eRViD}2K+W`ucxrJp2SK$ zflM|Ei_L>zw2TD%ZB|C8WhyY6%`oaGkc?Szw6}r1EjomFgygaWKZ$FN4zEmSB;+EG z5!Fk2l1?0ld;3bNmnoS1E}j!Yg6=AwWn4c^ve{ZxmRq7D3lW?@D6xpU`C(!yQrra7 zdr$q&Jp)Gu*jCLG!1ia}CoOF3kWiS&(9vwrBi$ct{H7 z)GqE#J8^5;fq5RgWJ}}ntzLZZrFU@Z;&rt358_sPJ5IlM4sX5r4u+?eVGEQ=PFt`B zn+ma*`Fmu^g$MmJxYgE!M_q#$8lA=Ct|8pK(~cYWJJB&VOVY~1#qw&s1$0fg;G%FB zVv$`|eI%Z6s;Cf4BGEvCu2~+1{V1_~K*thGFaQVuaY+oE5Y>;oD3tdsE@q;0+Q7mU zVX~)i<>CX}x^^Gq!$TMw96*0>7p~v9g1){XJZ|g9$rBfG{pus6Deq1hZxab7O5-p6i84qe5F-2d>?0$HkUzXgq1O&sotzC9I}9@}}iwwY-?C zV$5AYzcqmY0{yfh0=+X2lamdd*@vCMIA+VDTOY+Os)0U@2P4aV%v&pT8FU(f9q4p9 zDl`V4vkWa8bV}oe#vX^(nN(Dvm-m=i^k8tticz|x$0|D(!c`bqCo+;ph8BB6ydJG% zK-SYri}hy*p%s?VaXBl(L*W$yhfI1SU{ZBOWmFD3V!644NUF?0Eg`Ec z*{@)?vO++ICIlk^e1QS`NaexZX&c@faN@D0rtBp?>0QBhXg|8r)W=@kpOX zpOtmUdq!EtRPIO_PAo6)Wf-w6^-x{irUh?cI$c#(fp!usbm1KCk1gQ3&WSq~KL$K; z<=M1s6P+(_!d}^jnZPQ0j>qWiGK~!cslq?m-^9nds(7$iLWiz_QP&1b6%qOAeb7dbV(o$75TU^OoqJ4AG*mCyT<#VqLM8uWkdIj zZD;Hqfl_5dO+_)hR#qk{%_ifD3!?)LiA3~T2do6iZm~v$H?O9=0L@iNz$I4vYgC3e zD9LZo)n_E3q97L+2U%u11H5)83@QzZa`MpY=67DZOq^h$@>q{a4x6Thf|DRArlhhh z+ey@({u`20afp44y2bS4D+~%LK`y>g2{&vc3(-9%!X(I}Tf8?GVmn;1shXij1Vt>{ zk&B=2cG0bvhtci5hHkO$MND*Hdoc7~hT2DW$D3j9r4yjA5}R9@C}Kn!A|J)4&N?=U z#z7L+i!L>ip~=hRePZ_JWeFQ1W!*Shq{jZVY6N80(3v!$nLiLg^>VV@gd>F_olpZY z#)Tqn7Y`#Iu6z?Bip>#P|!f9VrAP<*?JiR(xA9lt79N=3!!eN zi!lpAv3dD#9)=h%rU-UiL2R`aXUjT~t?*)BU;=`|l97>BikkWslvY(DAvGCE5s^qE z!GxU-L0MTDtfqcC$n#LEyHQ=IM`~U%;xbcFUR#dZ+DbH3Hll(gRG3qN*ywZwo;!`y z!d%GdmTS~rM6uns8AhQH=SS0^<#}mIE@HZ|&D;;G*$aO^e{{6g^Zt_<1ZVumiG_~k zdtwpu_9bHZ-m$0%m`SD0Xr%S3s8u5@Bmo&Ixu_^9Ms8+0GSZT9ju%l8gXC8D`H3;7u-*tK&ncI^qkj)S2n zZqXyNQ709C2iruet{*ajY(l*r8SM__bb3%o1}|wcBdeqX^=&RHff1xu>X2BiLzc{m zLKPW);HCr?Rf<8hYA>Otj-M;kqO!t>)RcNuG@4M!f3GE}2x2i)cE5 z>OxT`f3L%iI{OIK&ox#Q5}jV8?HH24-pGbwU>Qld%}6eK&nVQa_<~%-nim0fpQ?aA zhj(LI${;?kxQq|;yYWG;5A&+7;fwN1_=Fz(Il7mk&Kpv~It77QNrG}yd5JBab-WLj zJ}SAvYw-48l8D8@2CHMG6|3pREE*ZrjMxpanP96ThKLmEV(;)q0-5N?6=_^VikMcC zMUCwm>S&3p`M$`jRqo*X{9PUjJ+D!8MOa0DGBHUCXBYZL*f@zdE$45bqhBPyWc|2s z6KaA(&BzVplJrC#DA5%mSJ|amM+UwY<8!WVR$6yAY<(lp3|zvese_o6(vL*ivUZ+( zV#6S!tGiLf1{Yk|fqgn)cA5)vR}VU@UN}fbW|m0|Eqw+_vw`QWiR*JZZW1*s2-HI&aJUrC5hRPt?Wlis~z?B3us_H zZB)3SX5)AAckDb+#7~jQkK?Dv1ZD+w2S^kc+w zgC}^^3!}0H`iV!1Meti)&(Wv64Pn`&CEh0ozac_G_zMwav*?Fxex;d^3H zG?tQJc`vQ~ROtjD)@OI$4Y>L#vglfkyuSY%#NzI`f^NDwn}Onq;OX^VrRx|$E3crIlZtRyPn#g!* zBArvdX&Ci9?_%Paj6_k)I-W+=Rl(vfV?7ZY*NJY}0_|04W4au^kt=3|Q5;jxR z9g47XXONqmg2HsV7ZS_4bLZ%8%~I+njkcG^H6T7C4<&Wg$jHk;c1}7Hqmz*umjHG^ ziNA%~iWU^)Rl$#9e~-T(>PV7RB+KaRHnf{Ap;I^(F`LlY&GYq2YgnwNK56j&*x_Ro zJpY%7<%j9U7M`?8goDbG1tYd6Ht>dZ5GYgX6sS?ykzdwMSCWOo%zPxAJB2{MornlI zim+3M5FB(8QIUxxkTN7C^X|~;%dZJG~#Tjo{r@Pj3kYsygD4*cZ7{18yzf6eRC7q3M;U6(ONX+ zwnABFz@c412ss`l<rE$cC#%zsCc+!va}nEBsF$ zg}%W-Mp3o+FMbH1)*GmmStt6N*1AF zqf=5sD_LGDDt3{+LB!hTF3ibRAgxG+@>V@MsVL>N14_{s%!+1?I`GQ!sR1r zP(|1c4xAUW$W%sjvGMn~yyzPw$(w9!SPpnEUx#VnJR3|8EQ2GETkPKdZr9F=BT$w>&-p&JBdzAw5aY(DsU#X1K%06GpQ z8(6P%6n%7TDm#xOpo=}f*-p?W0LFCz2alaaU}%E0!r4rKJG#do$&smaZ&zVuWA*SF zyV$UWAQp=*m!u6~PLvZ_8HKnsLP>h_Dh7LbO)e_NUEg7Kz8zmgwxYOR$@}S#%(Ew< zsVzZ^whcw~RR}wF0+qR?7;yJear=1QqARi+y{_}{P#g$18J%2=l*~$ukleZk`e5_8 zP}R_kz>u@h5DaRXhiJQ)Kev zFxmxC5p)SkVolWK-dr?^1OsvU4bxA%>2OmXdYBXxgD|xxEqDgqq@0WG@ga>s2H*HL*cM0uh_Inb`Ks zbSWl>=yGyOYlPHdqKe~^w7*kWnHs@jG4z>yq?ag=Unxi6*(7W~d;S4ovvn$vDDv+I;h1B>EK7QOBDj`YM%{;eRC-HVma87ZQt-s?0^? zb~DzISZ1ZP;6PwH!V>d95d`8jZ}Mfju5Rogsq8G0qljwR(|r}?#Z_pjYsH}04N+y1 z^0Z~Aq@l674MrE0kGDsf!KLZyhuYT*yOYRH`tE0N*PMiO3_@>imF;I zY8wnx%2ZOcyJb~PsBKrFiE6mT+yxC)WQEN5{bH$Zo`YDMK$p~eLmHs(C5iSiG$aU- zL{QAt7ZWk8q8xNxSg~dgw(U8AE)q*elM2h`FGu)^vpmnMR7QYSNn$h8Vdz*+rmI+z z+E3ze;AGGl=y@M?o$Y9Ese-z*8tc}~$I2WFmS-7J(W1k_9oymRY{rO9OQN%(NhQb8 zo%@iVl!X!BAi70r9TK&0Rf7aLvDb@8#o-qijRQx*(MB<()bskA8jzTliM@yXC1NS7 zY34B@Bx)Wc^tKIEkQFL^AeDnQYA#18jB!s){p_9T$oQiZM-H zF632N$chU?WoZsn>JAu-5x7C8q1I$7ffFtR;ww(NUGJlKt8=KdEi(T8+V(<2y2s#=} zV)3GzSmk7$^-?T3Sf&mN9lMkD&ML-#2G~B`Bq|T@C0#Vz$LZ(~@LcEGj z$AO@596EIx(NQTVE~-RnO$ovxL(wKv!A#P%JBLwN(T0P;r!jZM3as9-h1V6q! z^~>KA3*+DT`&nWsD54rS(C+f0^&$wEDkBSyH%hFMZ|=Q{$QlJIS;(n{Z8&i%mJXsA zO;z~>`UF4%n&c#j4W+l0|k-ku(!5G2tYcH2}x_ zwjm_&820TxiDLoL2#wCb-c#q0-KIcPZ37wIiYh8x4GW>9x)KMEAHk@ zwErfP31MMj*tc&V%FD}9Rac8|SFJ%na2WRb9mg(`(#f;Y*uG~U3QEhVf(X2}UUb^~ zprZQJyRJfPWM;BnA?wq9(8{Yk1bmOM_vbNWU>MJ11Bvln+R*K5Phk7TZ6qiKv}zgB z!c!2iH55A&%5W^N1^FbdMgsl5J$@)Fse!eh&f+|km(GS=I}WhoHAwrT8-!hFSZK|A z&hxcHjDcLCVsjxYrvO>`#b{OPP)l-cHak%$>p&b`n9`+3Nqs3|Qe!9_2%i1DxWanT zR4YSzY$m!5HjIchHC7MZ2d|SZK+bE`u)&M1sjG}YEroSfYcG=PZAfH8D6ErX{?heW z^vx=il$7A)$&+~T)z`6p-+pA&8xhw?r>LWKw~ipko|1pCXeV$4`;TkHaG}_;v}`BG!NKJPCeX zbg~Yu1IpTZG*Xc^=SD+T6ot<6cqnSqVNzDZVb?&dZ6Sa)v+=jkY2>0lKMk#7%i6Rg zG-RiuCN~B0)-uTDtiQDxC@Ci?H5Q_s#MGEWlFCX&e#~(cC!IuNVFFb3MbNfZ!_?UZ zt5(I|QJ}G+j6_t2&PIx>vK$Js5(>9ksOvJ(m=^_YHJx2sDLl%07~5(|KBZ`?sfJpm zh1)a0@)Xl*>3}6d5sNIxLZoOBVHM7m;ShuK4Dnp-o1z5)$IDXYUc53QLf3t*I>|Ft8Db&{0r0eAnTy(amc~ zYIF=Hy;z)hLF(o$##J+7ivF4ja*tdBjGzKFSbTv&B!Zj*7 zIpK!req1CIo5n*|(gQWsy^Ia8je<&}B}N)VHzm)Np&&rZts?pf-UHB^2Bi>0)uA_0 zjP^;hI9n+wlj`(1SK5KICGChxEkk8_3$iG>!vc;YA|wEbX97@oHVEx`DQKu}M#Sk@ z802R7NGv_BK{V8LATmA`n|AJm|4DyD$A%&1v_BFff>26VTUVQpjIsuWCd|X|>eVP*fO)=*VN(v1K{Vh6W)lIEk*Q4au~3`+_4-rZFL^t^q*> zdT9f!Hnjr<<)zrRcPrLx`VPl~{BZ2}0ett}I-CiQK~{1uT5Dt^6)Kq{hjBV25dOyx z(F7O_%wbn>QjP@%|;Bw_m%iC9F85z9r1SVW5MA;XA7F5k#} zm{Hh?z(aA^v}PmXW6$8I-yUrLb}J68J0Y!E*`HR6Y*yxSr4=hztVc<4HByVq5RsmR zveH^?+p-5G1o3uLFJg0=(5&s3X4{E@O3@wBH82Vf-AhVZ7LEp-L<1d(ZRipd?j9UC zdk%*p!(knC(}@-1(20Y{qslF>CBRr+2sm;IJJ;=^I@RC;kM~jKjSN$L4vs=g<*25L zY*6*%R3>eEOe5C%XJFNlcr4#}0{iGpX3txW72j==`ugMJe|Y@x`$ytUXJRFR8+mFaBa^+kM(Q6!!1Q%xDG|zkAK|hq1*GjqCv~)@8embEG*QM3+HaiufyAN4K6=-Nt zpm*RRh6cO@D-#`?o4{KJg+`BD-p}N$3|zQ&1p}jlXjZhcp0%T@xt1=*1hc!FWH3T8 zA$AD;X+rrSeu_-~m!SKxP<=ZIz7Ce9$=r`_=S7V6jAF>{M3Sbx>(*QCFG)2amnxvZ0sGt(z`ofKIL`H;!(w9)lwm44t>4+pB?H z(*mcg3Eip=TIteQ^pn*8qr@V{&y2ipc2hTc#COp-J8WKp zpAAvz>F{W5xX~}heQro=@G2@Bk(g2ho15Rk`mgoTQIIs`f&loQ#dI0k&Ox~BBhuJ` zkwRH5a%|D9hn$OoUqB!NgHPgAU=RXWmyYe-g_C{47vLhBUhXz4(9QX+Cv=wj2OQJruOovibOwA zJr$XTszx0wVyuQtZX#=|)m^BedW}x5LUy?Z;fZu0r&6(M$4U5wB_rTmCPI^nk=vw4 zC2vw>xeBL>m8cM_-4%T(DQv`|Mc?3&NAJaqkKe=#Q=i03FTI3qRHcP^4gB|JobW$~ z7oUF-ButSLSR@TZDb2lb1JCnZSV|ULw=PEHN0s> z)va_hJMqOAU*LKuW-8{2@fw zp9mK#qzLygHpqdQnQj~iOTpgVYjAw;Tx?r49ijgF5E&7VJtWly;Vd)#09sl8%eHUC zo@0ASz9BewhLu0y820Snhhh?QyWE6^CZp8%E8L~n@53R@KpWt>nGm0r#)_69EsVQ< z^9C+nya>0!O|{#M9(xZ7xD|yNh3F;t4iT6~`bN=E(}vinbhNh_rTrp$#SA9fWq6%b zent|diR9Zfh(~va;r7*jxM%(zJUV+PUYWZKbC&JHTQk4H%C#G%nMKDBAHi#%eTJ{r z@4)<32QlrF@9@SKtMS6THTeCqF#PkuM*K0RAAe35M)>h{Y(PQKw2=fVvY}`$MQVH~ z0vfxpDMNt*o=<#QE;ek~fMdswA@F1fNqz@bZQ6;_h7Ky)0Vvr(6ub|%fg8}e!~}{9 zXxDluMB31*uo3h|sTMWTm{~80G9!&@p5GfCnSuP=YLd-}G-J)$-3_hNit^@qbZ8Bd zh!7j7xg0~#_g;WeWDcg|5bIIg-s|We0D9#6|&Mkq<=|g2bN!aIs ziS?tUvK|9g13{X{!%6_rVf3mIO&ug$ot1<@_uEZC);Z8zkpY*cfxpl5xWJ3OK7{Kd z9@w;OFXcrfauN|8ix@X@&^^$M!cDPbW4VdJd29b5tOG-Il>}emF1ydeCLCqY6{`3P zY#SHRCAu!@CVbu3>E0B3mf1ys$eJS8|7^n_W3aA?WUkr5*JLc z6Tt0aX@p(u+&aXz$ooa$)zZaloPAJ>{efIp(9lUzFu4&O9gSUEzC%|085E_(ATc}; z8G#VKhV-uOuuodhDp+qD z5;|JFsI8J?%a(0;?e!P1WZ9RP{rP*CHES03?>mC3@($EhD-l8`HT|7gnDOB(EL^w{ z@4fdP7A#nR)PiOy^?z|qCz3KNP+G&^X;7l3MT1f*g@WpK5|0D5Z5kXpdIIz3&&S5q z%dvIELabl%C6=w(g*K%fS}KtajZ2z^B5bW76_J4Q=ZIx>8}L@F9=lJ)z`mn6!0X;s)Qk#EAIf9~1jR?fKlC_G(3Kta+YLXesr`ozqKz)3e~@5D z6(}+ZJG@lPtfb;Myi|@_n-i4{4bYm5=nXu8+)8j&S16ra#8?7Vx=$?h8%58+HT3si`%4NFK^}IIipMLar4LEF_nABdEU_nt zZ&dnTk-ptZ@HH8&$Vp9-x|}3pkzxSXx*TYwgOj(kku195BLVo_U1+SVL32qyFhbz} zexoN`9)W_6q9Ch~qRx&wIuf151Vx(yHEioP0<=U}f>;=yo>tVg6+>mP!`V$mEY_H) z%&5wbM`vxGw8sao4U<@gac#&2WotD`3+Sro?A*>?sXp4>SLw`n55!D8mao=D!PP~F zFUV!^0t_T8t%vPHbbGN(jqXvloAXk)yNy8S5*ZG}GmX_pCcBt?*@T=falncqM{-k+`R!O5AQ;_|9%7=*p7|M zS0OauEb6N@XqSmCK1QHaiY~4ZbSisDB;Fr|AeA48g+w93*hA3oL7ToCEjk9>jPyt{ zX(g#>DE{QeJ~ZljBx0#27M&?*L3nNhf* z%X#DyvrnW|po!%zh(+fVE^(A~`O<$KvB+H)kV#_6tTmukJA_KId9JJ*sjXdzsI}u< zqYJTo9Vhc4S>AH6QB!>d?737(&AyIV^F{&#Fs_RBTwHGI9yf|8- z$LTs7;@VuuB)FzhT^!GE#R-y2vEvdNsbK3HoY;HlB;NUOCYF4+0`nGsjgLN^k8i)* zO$F~F=yu~&NG9HTcOE|aWFfx!b|XIibOGjk^)0eVD0ON#iW^jj%`8Ppg8~N65Slc0 zL}!;Hv7`}o8Yjxy3H|}Wm^R~Mtlzu|JGZUJ+Eq)j^ML3|>tdy)E6}>7t|y~YkO(Uu z$>wK?rS&2{PSYcm7G9$)MYl1V4fZsgYQ9!z5Zq+K-uz}%s|WZyLx@ew#4E2%#p{!v z!rb?#^Ey7k=U;t|oWg20y0KYkHZ~Rmm6(mVqhlj<^j{`O^`l9lhC**dhgyfSs#?g{ z2yH!=(Mm#;n|!RqI#jeM32Gj+Xv`>UY^TcaLxaLVuw&!owb{DZ$h)pWY)mCm;5&#} zMfFZh*|-n4e*6_4m_83ry*(F`Uik=9UYd@nZ@hySUwjF#PI&<@Jv{|aJo7XrO??$F zy!)@*>>6CK`VV)#8mR5=&VGtd=S?H|HWfD-sraCu&=3v9ZXD zZ<4fVa|35%bMfVupJV&>Em*m7CElMg6YIC`rmL_KoWv}g0XX|_@_vr8(TQ1%RA9UY zrQU;vRyCA5C*SuGXxwzDCaU*N^bsS?_F)v3%TV2{g@Xj8<%QOE>X2XGDuJR|nl65Y z%9$k4bB%(EV9RpuA%RI7obg`!c%MhbU_A0oTLt=%N}I zo2_}hbTrmMDK(0VPRhV@my$`6kVJ@-EIOkNIhh%#Dat{Yt{FG`tQht1998wGC`hLO zXp-EhlrPNfMoVK2O0(kOVqL;TO4%ztQa4y?{5hnhCBbC3vaWQKFa}^WIM7zx4o!0l z23!W*xMaq)s}vh;xhSm4W4&>)evQB@rUSG5YD)6ZT9pl-i9mDS&hPfZV`@QLO%Ccx zvnT}g=yo}1ruwB^V}eAzJ_-|FzbFTh7fsY9u^)}CkB>aYN^)^}>E=kRT@(ZkI*#t{ zt0ZWafptV$H{=rA0$9(J2rf(O%3?|Q4c#6nMuySC1B$gKl&CFeCsDVu43%^`Y7&)( zIHjdJ*Ye(oNk@8npOlGQWgS2p@yzV>5KC%tc;9-g`sQEgDCY15~>y;Pi zfUco|pOuT8dL)Go(;(_u-X*N>X~gI=&1OWDYH+q#h46|_q;^=*B&X19G@y!(Dy!Xs zlj#+x=QVYT?n8!J^dyl0O{OtoF;ZCkpTu%$j4XcQ?>|f|jbz<;f_!Ld4Z<^;5R%r2 zfRsiYNom6N=t^vjtHw8h>DU%mi9;EUI2d1v!_lRP%4$JKLKTjsG+=vd6*fjxVpCir z7KfJOtH46cIi8F8L4{Zlkb!SQva$Ab4z@%UVrP5_Hbvy&P$nIbmQ3H&jq*w()@;~= zX9-xJ&HEBdNiOpjufobT`%qA*l!zt#Y#wIKUXHm7zQfA3JMqO=%kcTUrO2*Upp|T& zUn@sMN&y{H-59{OX%UxOiKNmdbg&{e>YeZljli29%)o&ohjH?RANK6pgw4DBrEW7p zBubW#a4dpE1fl#8e~nmHwOqukOd|>j=q7zNOtM&%rtO7_>b$+V9r4;8tcc7-nVd>= z07%Nt!|QLnisL)CAv-z}o3?Mm?t@35&{)wg2J6L?aFU9eN?FfJCc1xg1Vd;41<16l zNX@N0M=yE@N8s-6le+nomR@P6Ka+15b#gsJhc=y+jn0F5g^n&$OOm?4#?Qu1)o3L^ zh=E3t08~X$kWs3`^P3Og@2Abg?Js|f$6x&vPdqmr6Q@kW#x5lk;GsNgEJ@Kz`IFAZ=HZi1KE}a=`=psWU(Wv;`;VNUQ|uxbk9@EAFG@3VL^^Y4?^P+4 zyusFslFAm;HM7jU-7tE(sLIuJG3~HRT`m_;UaRD_b;H_25E~dpo6(M<)3CV!OWfb4d=%y19&Q2}2K+&p)j`hOIhUsH@iK*fOP{j&(kq^wlM?owjEO)U< zlR<0`A=E7!y@g7dJCq zHfqq_*9(W+#qXxdG^kNskcz6DSSYHppsuH4O^HNYLOX2i+q`YqyH?NaoLc@CB zTvm>@>O#7oOf=RfqoOVqW%Wf+n|-hm{M`g>2g^lPUkQ0bA)Qhh^s*8dI?B*qmqX`} zkM{Z!c&%Dkby^rydKd__W-56xF`3S%fbOd*?8JZaPjc=+$rPGS$o^FDv7X|#i615dd5>^M>;?EI_ z+$06FXh84XwPtQt-LRSl%dip+@dTHNUsX zI*L;5fJ7{Z5^51!YeP(h8KF4}1g19PaBLX@(yB;0B*63{gtHExOO+v`%z~796Ea&Z z$S&_hd5Z<trps2x&JUWZ4ItMbEyO7x2gRmM8{HtBqnyo@WV>iM& zh7sO22tScNgRUg1)`z$%10u`R2%$3x){tufuQ(O zgr`&@lC~|iuo<;73!3YV$VjQcC$m1oz4zUPS6_P`3m477ym|BS&7$v+7*~Lz{6=h8 zw;NARn1YvIevM%C89tgJy2WO~@6;KzsLhDa$VEU%I08dYOEW_boe09Q&@%{4NJFE> zgtAsSR&L*gr(b!6s(3SY?%srD%NJtdvP~$iYL|#ZI21t|Vthq}P{%(7SGT)HighKU2C@2gA<8m--?gGT{+>Y%zfTb%|V#D@5 zXlU0F^skT%sEP?lG%x7peYZ=BonX*6ie{w_1(mhXTAk<~9)-Ja2obq;C~mhx!_U@J ziKbLEBd<{o1+550Hp<#MQ7Kcw(oMpoqO`NYx`iqyh&rU?fEP$sB=%z`@Yu9BF?q_f zm^yVTo`05Q{lbfQ;)y3P?ajCG^3yNk?U&xfyKlXXXXv(GoHT)C^CVt*<~ck+?iD=z z@(e5t$-~sMGJIVxu$dJqORvFzS5Gud3QHYFB#_rv_5fc-G z@e!Hg! zTCJ9VTt&bwmDZ5RsteFa09VL5;2_zF)bk>1wT+I%;w4dgE3WvHsn zfx;lB+3F=RA+{_Qq-!x#MDdywvPNktct>j$WQ`T*Y_5hy*@E`!A{b<>XU&yRHI&29 zUJq4k6SN8?yv|;pC+i-?kJw$*=H657AWPwwxH4#ou zkh6_WM-U4iWepl+#bqKbDiw)mlaZTTh`iKN)ReYK|L!9p*=*-Y)WRW&wkVcJ&~dPQ z#99rtqaOyAkwN6^GMiCM7j|&(I;>g#CAO^n8mpFmj%ADI=+LRA z(@ujo0~0Y5z#{D(5y#O zive}5M$~uMQQP4}W~B;|In9X5m*Z@X97p2naWthBTO+Hm^kg2sJyVV)krh}TTaWGO zdhE_JVOw@P4$+MSWz|Wu$#!K|V?$0IR_3(f>%=B33a`Pcm{#n}RbqE;8$uJS5S`tO z*s>NRlYr7Gq+~YMedl>%$S{Qj$yZEnAo2b{EPjWMeorh{$q)pGoBxT#BBP=ftKZx7 zLul5YN0aFaYArXAtGS4?4c*w7EaOG1up>{4ZMka1YOdfwju!p}Mu<$bWx8P`)mv~Z zs{_Xi4Vbkr4GT^bW6qIWe0C@sM|o^$p%zgkYPtsn(#W#uC2dG6YC%>>E6R#wh&Yo; zVwsI+r%c8NAHIdJ7k!BjKl}(EzCRl=k=atZnE7*;6?I4`D8+ko=HZ2D)3AEudTiOc2H!0C z3STT-h0KCFR@wn+TtyIw*fmc}7ht8r|2bmW+;I&bBq(t)??aRFJa#NPw~Z^Pw9+a$DDbKP+UPk zVtJ2k|2vk8OOTAsa~>MjhT z_D-FRPVpkkN`auWaTGH;iKx}QcCCxwM-^-$QK$`8DPLE6Q#pDaT3j1+VYJ68&7!HP zsDi4~D5bNpiqt*?H&KRaGo4dbCREK$7;rf;=y9Q+Zlk`c28jvDusOS=t$C&WeF&~5 zS1ed;B)q%kEAaa6WaLQF4jFkEa&@%;WC(ERjMgkR4`Ip zc-?&%5b1tc|HKAg&fZZB4Bo`>z)f`7>5TdPJw83`E+y}?k?zk$=QQS2ZLW)OiUE1E z6;7+30Ir71%CM-=?a=dFv~)c=B$X=o3<_NCb>Qlt2X?(0?TyVaYOV0Pcz(_+@OIyX zg)Uj^@SwJ#9vW2#hP!OIG~mItkzVODO>Bo2tB<5|iRH)p>87x8(3R_Zke60QvMfVg zk(lNzLkk67YD^B|BeNi<=yY0HPk)A3)Q&znnO-QgIwT}UW51X{b7%`r9ovb6JBbk_ zmaSX2qMCK4Lt&9fMQ7|H=ypL%A=aTLkuYRRE86()EgdE_(=9Z%8PP#WFbbR(tCjl9nDI8|)K ziqK-LjHtruq(-bFVT8Ag;!vRzJM$DsbzVe0qeRyOztUEm*81>uQZ<%m%CS7U87re& z5LoX)j{62$jptF**^Nq_7j>+M4Rj_QtkdmgV!5`P0*s_WjQ=kq7P+35&>|Y_Fcg|T z$hCb0FCS7$I&dH&7pXD_QdE5iZgfa{%7@C&W6sHP%sN_vqcuY)6Y>SP$^FPMWl zb3ej2%f7(MRrB%LXS49tR|^mld|jV z4Au*$BAkmx48D>)evVl7whUt-omo^$J}L?m(QPV*U6l=EM;&r93UIheiA}ubls4LB z?J&MO@%%%}wIv}PTi&Ps_r>-8< zHnt+aqzu`GMK~81kF$*Q+-l?$HS*twP*K-`Gtnu?$fYxkh{ygz$B~vS2jk#yv3+@67lVISLcLPEcV+=sdbIec_eVm6V(&BtEA zNl+A^+o^N#+LP(>cH*0r-yuHi6rDvG>dT4{7I>V%r)Is%Kv+m9lyZfX@mH*JPfbe2 z&K-NCgp49>y(mxL;6>O-*n+fmMirVH^I_HGv+?NJf=p7J@9IQVNg8VFD(Pyvp|^Jt z*a%F%el(~IsK^Y!puL)nROAGsCB5l_LtBfObH^c9G)wD=?A^jC@;97){7tc#asVQ| zz0cE+L6X&w*eI*(8eE=hB+nbLdv8Ldov}GCO6xWH2+HUCucMz%K`41Ui9u}h>+s#= z_lmJNu}Jd>z-!B8nVmj6t7<4m2N11s$lnTk00GyTycuE_51HsIJI?&)Npu zaDE?docDF2slJ4D&qTM`%kv$AgV*kHvOLrdWG7_sey>Ajb^<|Oj`ofwoIV$Z@N;L; zsnPP9`eEk15-C=UEIT3o#NfToPVr|KE8qtyjNRxkh*UjRX|3Jyqx+GW5{sPl1f(WJ zVA--|QnJS?x>nJ>rPg~B) z-hdrpx!4_Dj^J`5_NKRBL2y3S7h5p1sTS~s!z{e)ydJBoN&DbqXi&l|bOeBBd5)Edto3C3U7LoX} zm2Md~#606Gysspef8*~zOe_i#i^$yBDROoxyPzh)sLUhCAsZi#E#Y?d^+`W%&3=5!R;~klA7*u{2}L={)$8SQZ>k#py~X&ayC0(CIAQ6@mT1**KS2 ziKw_@5<-ULP+}r;5gn0@Wj4cNYUH+B`aU{6sSsvK9*YQKiXyY^$&qOY)R<9G1e z&vV$Z151~zKt@gpynR>T=oR~dUy|}A*?I^ty`n3qmx|5D%3F@;L@{Vf70G+tHAJ_V zQHG?w}&5zMtyR>l!7IjiQ~( zEhE1GGiQB>xgSl#3Oa~+pS*|9Kb=7bF(03NHXpNREyS0feS<~w7UPSLW?yzrnt5S z$AgX_H9ZP>1<7b`sYPmPDz!F)) zT%uDGvjIt@Bo>j0S`bSYot2yQ(n-+hA;F3yj)GWR-GG4rV(q%b`%O}D(G}3`^mGmJ zm~J?{Zny{d8(mbcBo;e4LQL3jlE4J{c=$pPi>LQ8&u0V{lMi}2v$C9gI5nNpOtBjy z;+lHsu$oa)kVIgrA0rkw>kb`+!9ifxDNsdX>2vWjKM>0mJG{nvC}cHs2Sy54C-hda zFHM(J2VFWhO0$Y^GWZB&?RDs*%js0g5E&aGWl69&oY0!YiuS)wEMk1I)9mB14upn= zV&l3M2=YIO!~3>j-_A`~wQ3atPn;qKsL>&|S#MBd>yBesvUDTwk3u4rCb3^orwg_1 zc2u>RQQl}oX`LP=HG1TilR!$9$SqPJJ712>+;*Oy3>n#Dku0{~7G3*UHT?HR{(Bu# zGAfb8_Y%^o5S3Jhn5;$w#FpW^!?8G!P>UpaKO&kuI9}_-{^ouxPL<=8LvdK1+luHG zAL0bDM3x|^*^4ESweYX+LLKWwj`k|{r`F+QSu0vKcGPtkQLAxE(MZB<*0Bt&#C6*s zg>fHoo}%JElUS4*E7UrX`^GI1i(1bL#2;4a$Z+Z|$ThT1+8%UtdLUQ%pfL|2GQAR+ z^*YqiI%ku7QuHH;*Iz`u=?0dZt%F}hHx`E0Vr!umhw9x}99xg&$*uS@tW+A0Ib34E zsd7C&-x`FiL5T>A&6U=(91TfAKzJGgBj|9#GZ97dTE21{o`2~zJT_q*9)99+JUV_H zUVeQ#zWizhcJB?Ms*T3H1>a))#3`8a;wyM<+PnCA$!a>F5~`F;)Ks?7v7E)%a~9yl zK@y9F%25;r%OEW+3#~1kNM|M9xyKJl$(cw@NI}%ub4W`{hK$Oox>-ZjC9b;%O4{Tf zy1+zt*cg%gm`vCJMR*7<4FC2%EKhI4smLUpK64b6>QR)Ji2b|vU|nn~t!^c1 zsI0_3FMeTxICy+JQX-BbA^ad>PM^Zj1AfTODMaremE+J&$)y+xCL*z&*fQ2f;PX%| zpEz+s+T+IQWJPLgh2Ct!i6h656dO-9+l{))Dg^L#QC@+Ro?WFs07AZ+Fbb!rBOHan3qyB7A^~fr0MltPwUO54z zsvRMLr?GnJB097jG}Y8$!Td#7y?zTCO)e~nZpY`Rsu5nKLyNix=Pv@jp7Ur>8W5aU zj6=0{>@3ltzO4hHRHqSf;RrbsguvhvNJ&pad{PFoa>@vjEMuY0ofqLEu~?kKRd=)e z2N4#Xj7*Yj|E24=ahdi0s&HQ(X#rsaz=#?cQlcOw424-q()Ze2V&g3;^}fr}T8?%S zX?eyev=m2S*w(~4=fSle4I1cNOR^K8Rrw6T8O){Z?F|uA;`57;- z-J$D28Qu2ay#&u-pA^lV9f+gj6nVYGSfbg}!+YMx5Gs6t?NNw4whuvSBxEtO zuhZC%8j8c@lzbG@tp^@Ig&kXWVaN8}Si623{QSeD8G{;Q4_Z3xC@PV$y){7AW+V1_ zP}^caz3B4lu%V{efSM))kJphXT2NRfM_!R2lO_tZI>b>R$0k%DHlC4CiSU$KoTiHi zPbf!tY%$J6<>L%R^A8b|Qh{I!>a8adF?UN4PM4?=Sggj$ax+dhdJx)R$HL%DY#?!c z9bbbL#Ma1;tN1oij$Ng0EIL~+Z3j_F$I@WDiZ~Ko2;Ekv%7qSv9nB;drA@5U>W6}^ zrJaN=rcJB(T+E)-lgLGHg~*S0^vH2ZgySZGQFMoiq@@4G-_H_Deo>|5STwYY8iQC! zB#1>MR~sXiP8}Jap(Md5NGc+`ub5E~Lk2#RU56^$2-4NP@GI`by2N?})O)e`Of8O9 z^AX75f+|;Z95NP!Q$lvuuWLM zWjppBIF78`a-^meqN1!B$+2lTy!#-|P@R-z=R;Q82qPl`^I2n<^^E`r@swnjL z%21S>fR#&V!*hypxTp%%8W(}cjbmp{;Y8R$q(%87IpPQ+LxYf&nu(5fCF}$)1Aoup z9Hvvb28wAaS22h?NHXzCDRZi;tEKzv>+8YL=y_BWm!h?Exef_KEcj`T64H}y|&_r<| zx*OYA4_s9AJ%a>b)&-Nek0cf`#kZra3KjXM(NKH_^#x(5%07wO!gw@R6+y4p^E{}Q zS$-mwx|U?oX(LdTM58hz7*!b|kd?+kR+h-mCZN5pg!jQDfvSb#KY+0;u;(4 z7~A7V47_(sq-7CPp?RznE)pJvh>axZptEr~x}~u5we|aBO+3yFH?BVab#q{bcJeSM-{3TwCC|B02A(BcTosUzHH_6F)0d1{nX+dmZ zb{fS>mbCi6AU7UO&E>GzZE&;Pto$7V1&YnX^Q4fo8PrhJ6{D>v9`dqev=k+vwIY+` z+Q#4Ukq87S4D)(Ko;{L_c@XkOH8d=v`u0|oHPj-%vJ?eXx>6?Ixo2b|ML%tT_U|)CL^PXvNyIW%ywG8Ej3i!#AgMu&=?2)j4u} zb)pa(6FP~jwFqjzB<+AHh=t7$O_m#oDwZQOy9x@CF+k^&Fr~xfLA${NnIIJ--5VXD z)SXXq`A;L3;?f%Ej4s+yK`Me!dZDIF(Odd?GrATk3(2U z6oP}|5qc^GaZ!cHNU26bT(-0iK~7egv=A;or-o|CfUHUr%3FP?X>+nN=%m564!I4A zPCFa*2xOg3w6h|~NTN-&yGB-Qu~)W*6;wr15vds3)lR9KOKdMIoQfbBK`J8c&Ce0b z=GI;;udpJq-GP*L1rlX-sCAmDFw96P>p-x~g56a7MJ+BgX?@75ZbY3zj_UFXDfy&Y zCWp`FlorP6tv(p2h{a++v3A2q^=ad8igg5bvx|+T914X3gCoNP3>THE8!nd%GMP+T z&?W|-#pY^Vy*;>i?Fuf@@?NHG0Ifh$zf)8FwQEfTmVREpSowS&_U@|$yGznkPC1=X zNks?kdkNAT+K^b?fT-*;>^^#yj<+496QhgsBF?BHM5*|_fRqyd( zVDzfwB*c_eL8xXMfzdupfaLq)eBBq&O9xb|utLGcBPYmL>-(f2wxE(~lww^PkZ&{a z{*gSJOasVowV*=Ng<3i^gBZW+y9smGC1?mvX5USiymUOhm(bh8dr!sOR9=jh@**^s z6~RPtV$nP3h%QLu7*b|kEANq;Kun;vi=1E$?WoHyLuFP0T1u;6XqCgIx5I1ilh(nA zt~{IAwUc3|TM!Fh#bCCZZc)r)6CtkGAqC0iMh3;3~4VByjdApurkfM>U zro6O~LbU}Ir7hApOiF4o5|fJ%laP;ym>isq%0hT#7M)2p&O~P;I4XmpG9AGbzagOs z#H=`koQ##?6rb<+KZ~Q`sdOx{cz^jWYzWK1vD`N7Piw-bJHxSZ$0@Ad9f~8x?Q}0r ztck3{rw6j|^8Qr#D=y(Hz814_Tb)2*#}Gm@Wr!;3gi=lcs=EZ0(Fujlh7JuePcJez zds&_&PZ|mFT1QOLi!F-H{~NK0?l7rK?5F>JmRL$F>iDH&eVbB$8&#jiKoI+$Sk$yl z7TzqanO2H7sYTO|M#BZ<%X@IDP=%c-O*mO&#nDn7wj?(oxXOYJbSUA)bO5HSIMLFN zPfz6G?LF~W9@B_7x17biBdPfMa2#f?I*66K0&(DYxU}=xnbUDN9U3$C7@mNTkOZ6z z;A2oS$s}4LmNPu=+}U_Ugs0=&=}d%&X7Di!5oePT6P1SK#9U;i7b7pb8bx_+$f_`+ zq{%I9?b#@Epi}9BNw_h!3u?LqDLW}ujmk2FPJ)bxj_!u)kD>8a2tA3a``I z1>fieD!EQc?T_{iV$dhHkM;1ks7?pORM=~@w&$T|h`mq5hEO8ierJaqN~My{Qi&!- zyVPwU`qG7(b~>F>*O!>eDwMy)VdwceNS1U;Y8@N49j-ot907D}UyaNB{tE=(D^RiV zwvYf#)_%yTbW2ov)Dtk%ikeYStUyhj83m0-)F{1Zpt7s3>x71t*6r%Spv#BRZVHk% zk_Evjq-6-(vvk;zsm1!(R_utY#IE=%?9ZV}qq^IgrA4@WRB~ftO^vOmo9E&sNcl(} z15(-%q0~JDFE_zg>?1GMrigv!RlKhzf?`Fh0mdFdimbN-AZc_%+j9e1Rh?)dc^i3c z28Pae1!>hvsY|!0!-+Db2Sza=qWhXe+#)Nl$t%XRu0rIA6Wa-Q*)4GDR2XnrFkm-J zDMmzUc0nv|i4;V4(oKT-4T)R^c@9H#5q-QrK0RHb!HNN!8~t<{f>=B}Z;`Ck;voo2 zLC3(?V&L1sdgLa!i*S(~oD>!Rd$^_Uuzx*HJpb{rR*zViC&eX%QWQ-9D ze~UyaLXgTBv54;(BNegPoX8$vAt8x9Ry^GdU!Npe9FFhP`*(H0)5Guc2{*-dA+CwU z;ubrTl4!jYVSSEX43If|Ix}1vBYa{rGyaxX_oFeh&UwIV2kZ1Tc=+64I1icn66@z> zv?|XN{Min<1k^QIc51BHA{kmEUhi zi&)^uV>(rIEDDNBg%@UmuvTrSvo)f%NsYRib}4COabZ0&vnr63QiO!0Lc}H%ASyl| zk+HdqJVeIvIbVmyWFsUx6Jh7l5OzA5_?AE{ivuJf?)UFgt@L~A2-EyGl=Mx4rN!144doXW06L@_NU9YA7U9STd^ zP}87AUb7jYSxwj%QHaBFRhYdl5Ff2PijS8c#=?z(*mhVXhKobcsdxkh@i8CWl1*G8;xn6( zoTH#MG$5|rf~w9wRLR_^m)W4BD^qHmw7jfHj80=08ar)hR#9D&Km@C|s|ciQ2vX`6 zmdOv~A`u3apJ+Vd{huS2gdSjJj#2_p|NJKG&8fn+)FK>;tHy~m8FuD%U`LJ&a`Sa) zsL~Yfi_%^xVlR{4A;3dWvRMVNj=(x_14@!n2i2OUmkp2VT1U0#>7m*s(Fw)sAn+?K zE-0K-C2k+ji7tfK;U;N_!Dyqan~k18Yh#14dkEU1%cNhLmEe}ioW_0B7(<8@WIE`n`A+VITnCBRrNvP}A6?qON>k>q%u zV%yuUAp%w}NwAwPq3<%>{nw;()RAO5s7&JuTG8&j3?)e+%X$;XN{uKoUdHJ>1=1-r zh#k`APYndK_<9Qp^uvg6u_LIc9rdY8p(&i)F)Qrk99rubf3p?|0N9Z z_kGSjxJfuJ38<;mSueajm*MTcEOph1a60Kc=v=zI7tzc5(97=-(Z}x-v#y-30fN5R z|44`yx-$>&g{PNpnnWr>I2tKP6b#q*@x$wXjh{Zw(>?fo42=;2iR8!O-{puk=+hB8eNF@F6vhKL~SuY95E4EwU_la~kF4jQ@#gLUZ(JEHp z+gLsnsvZ(RH{Gz;F(ge%_L3Bwyyqf0r2u~`9iN`$sv{wpCZ2gSobFb+rg=yx)4EQcVm zZC6AV79I@8N1Ofe&gz4hxiyH-Parg@4u`^Wu$BLwBqk0hyO3O=f?r-eQq*2-jwP1l zG$JNfj>xPwWYikaViWn^hM`OUI{G#CE70mnjVKEh)25gyN*d@h6bGY65$wTMn>Mm$L+y2OY&%@AtkUKCfW(9&*3o7@Do&MoEt z(z2qp(!q!vKpHWY!V0QonYamPq8m(HyO;$gR^AIGBnU)2ilmf3M=WB*Bc9ehOFN7l zLmzTk@e2t+C7Kar5Jl7M*O6>tqa}%G33wuZkiv6`gh7BJz=|~qf?T|V*We@wcM^cr ze4jWk5sQV5(MH8?AnJSRTzZGuKzjyZ>ZcW^+cCS@z}VnzRFckKHvR#sQz~yG$wg=P z@-@LoOsOSEo4w~rCL|yd70nUBl#Sd$FyguC2>y+#e#|}|g{kWfBCNO*tR8S0ufpfJ zMnYs6QTcYV{wPg7aIsz(DL(Wn4NO`c&tZVXGK>zo0eK%#YonrPy`>11cDJNSL79W) zVjM;l8%0YSfyr?dYF8ggWfb1?V#h)PAkWpw`_j~*m!h3&Qk1z%Y@o$5(ej+nW!AHP zUXr$3&anf>N(^Y=JxFbEBB#~{Vjar{khxfv=lPkdK$^mbfV>tdH=eqS=f>|5YFOXJ z@))@e?+{%J8{z;-rkAR{rJf{I-6D0B7+5b%bRQ;BcNltJzu3*uML@HN)b4r$8G+D7 z_wS}?aZx!s*ud>VFo+!qZ9>5O5PZ%1VzE1=Fqrt>eCk2(P zP_F+PE-92$yc&ap=g9X=Hi9nQpxI8spfJ%}q3ATBQ)z)*X_i8zvk^P^TQ&k39eQh< z1v*_fEW{KG%SF{;L0h91R*Jj9{+qmh(RDZ06=?0g2`$}=k#$@UOKz(NQ#13G%Rnq(aE5S z7Y@b1^5^|iQzSPwiNvpFR8*^_f%@EH8RF8a5gMJ3;Fv<3j441MBj9^tIVO>dAeKV- zF@BO*D4>5JmVJD0Glle)uvBc1%EP9J9IQB*j5T4|*dAL7|A-Qtim$-o)C!y~Yp283 zp}eyTsTwcxSaxM3Wf7HZR23aPs5cCuQKajqIul{!JrtqV+aXt5pfs>fIeMUHD0#jA zX~a@gTK$(X7Clv`!7@fHCNU+AkF7cv8r4=b%MAz(kHK;OlQ??#7=i;&qO_<04Gpy@ zDJ?`*RfRMlD)!|_ib=%5?fbBN{&K9`v;&*`L$F}m5q!Go80H>`!u;czcz<^SK0A_) z&lz9%Wn#|Z41CF$%jff?$j00wIr#E;0X{#Pi!c1sFfT9*Uj^~KfGo^8R)8=43o$RC z81qgPVKE77+1U~-3eD&9LM%O9hi^h_u$%843`<8;W-X4Kiove^$B~|vEuE)G8rL8KrJK`tU0rI^+zUMmR{KSwMrW&%y` zb!meq4{g7WAZZw&q9xFYefG_lNfraw(MLjdu;IA}F3~-lry3Wly)V&?T%iKIBz4bp zvf)(|Y%@E$k=xl1nGfi2Tt~CI4-M_K^lG|FI?HO64W(2k6?z9PFVzbhq{<`)w?%*Z zHJF_jU}VD-Q_AfGPpe4eXB(!nzD&@(i7xjIs>*BdFq{O(E;e9dA?i$5F)yJKABWTK zH;`oMF8WM2(Qmy7Bkh&BU$`3n9u>Qr|7ParbuI!;w;Rs$yslvqM0Y=l$cG+FFNUdJ zJ#5HV1}~wzcL2Hhc}Pi!L1{q_DvB!5!*W%+FEGx-OgE*bJ1~(XTM2fN$yrFvFTy_gK$4S?gH!5IXS^g4a6ZZJST!3J38bLC4>{!qIK*Hy%TCLvcV9&woz*#l zSWJ^1itZ~g^ZW<) zZ8vcF`ej_XDiZizm(uu&5W}Ejtxp_z1=nw0#HGt4Jo-96GxqNy#Pb`{|HZfRdv5Y* z#?_nGag~kz+V>%zi@0+0Ca$n8|K+$FZ0$cf_VT5xjBB`f`5HzqUuWE4+{EZ5NO6@v zC1%F`5aPAir{{+dr+e-EP29Z1FXz8qy?9N+8-6v02e04~-Srh-;6*+T4US@DWDr-b z4e_eFd0t-WJjB;XSH$x)T74)ZA2Z^Yj5maaZnD1?+=A9MqQ&|f%@jMi2Z z^Tuf@KFT^r2$+}9>Ai_4iq(n^EA+neFwmuoj1eXZD2tQdL&C7y86+1g$wf`_v{49% z9vQXPfzq-@l$AFkx1a(!#l)=Y8nhctXfqg4tLQ|dTuA^nqFts&dTIgu&sHL#$cW@p z3xbnd;TKtrJ>g~85>klGVI|lQR)lq@i?KSq1mB%0!3sWp8(xg1j3tc4p~R%%Vtf-= zfF=HUSVl}+N^Dy~+*^D!3rkNG;;R$c_|!iYbAqxl?^F&xBi7A4oPaNn@o`TS7WgG% z-I-);4U5E%4O?;Sz#*ItIfcTaJY*CUAtk36XHF*~GrbfUrIiSZia^}yP$Wm3#ksSw z#J76r3}Q)%6H2`e8jA-iiU%28%wH!Kap!*e?`MgnptzE3?jV_X_`|+2ViBt`2{u}~ z5RtpTgNjBZ@msrL2i}|h5vD%>626%I8B!7x(ADLE&CV0lX{5nnG0Ui?tQxDo`3_G$ z_$1zVeT6>FaU(d&_ap%(Zx6_C~(99`}5-4G(;>i_f>?t{Izg_s6So z-zV$v;Ab20@E2R~(CodqZ{`k6nY9-0f3+UVxBBD#+27#nrE4JXP~rUf^R(!+^^6gM zgD6V}t^2lZ+oW{+b3Xe7pU#>=l@TMk7Q1hBY|x&7CEb?XYeLL^BP*{5+f`1 z_;N=m7VbHR+>Tz9b#$Sy)`-$t9g3$*aM5Wu^XR|E zws!s^vCo5y^n5J%>RU{C>su_}9*NCFJ73p3(tME z8_zD-gUO7Ej3*cD#`yWWFz%~ecw*ijJoY7@f3^eTW^KchGqzv?@oM~xO?cv?O}O)& z6?pK|O}LBLb=N1vzRx$~0mg0beT&=PT7tWXdw+ao9-f}N9B(XKhG)i4!t;}!!Q!vy zQyAx;mL?4fY8$b1<9dAl!F0Uy(hGQL>Ki1CK*&4w5Zghh>CDu^z4E!< zF}Cmh|9`|H9mG2;rjC(Z#;Q1pMr`zT^#)1_Kw@k~?9nV#teEmARJq>S2PM%&Lz}NR zb)%+1fz8|Y;f-n2v3SuE#Kpy-L)MHd7lv?UgvwW^gsi3lb!5@Bh%-3re-ty{cpVd7 zeFLw5@){?VEXKD`TkP8HFG)M`)n=V z{bV&>dw(fj`*mNC@t62; z#uu11^Gkd-dmg_0VgbJWZXIULo{N>M*I>z#CD^)cJu)+5k&+ya?96DiHkT4aOeC5v z+HyT|a&mCgKLFcz?ZwKqTM=|F6&lYlTCH8^pt{m{X{}xTaIx|_ZK98TP)e_Ep?cCV zjI8Y1Ub+i0sOY-^yORKH2LX~+fA9w6tmyXci|7`ssEt>oag=5rv%koJo%LPV)ZB%o z#Rlwd>%!JzJz`Xspdk)v=sM*5o}+1Xn6~BsX6+Bg(b87L<|%P5qXR(+P1qk(jZN|8 z*pXU;ufsE#2VVIx1$Hi+Xb{fJgv!08%0GTXg~s?;EZjwwxMM?#wyiEaG| zFYiWL`!!@KE=e;4bLCzrdRR97Bpecwk-sOmUSV8DlX^fJ--?V&Lqb9Vg8fe*c%L7d z=~{A16et#}o9hkI76>KPZHSCb#G19=(OHJ$$nj%H$SFXT#)W3bC@M&x@jRd8qBfMv zY&ekGg!nce+F5=Pc^wkz=y;v=B+5MFDAt`V#jYf(SmRaH@_tx(ZhGD;WA8<%c)wi~ z2i~p=B;a8-?_Cu-Fph?zB;JnV}^+SmNzHgI1ivQ>T##ncZm?XyHy*Id^(sa|2 zlibC=Kd$Q(Vq(3Gm<2|GB_;__=!hxTI{PqmY%kOaXyHBUWPMc-tF$@?TqF|{MVx`h z>fBf8j_EcX!xS`hDEyq!&hMgw?NoKqt#qTVUXA4|He>3GZ{q#;KEl3Tdr(zUMn^V+ zD?kcxBpa*syI2maSTe1;ns#R<6gFU$4YhOV;C~Im_@d z1@o-=tMJLf)tI$#6+T|L0y7se7O%vtZc+>hOLX+OiSHckjgF*`MOM=^x7U?T#)luw#;lLO zz~`TRg?HZn7_YrK9Sgo*jMb}GW6RccI1z9F{zrFU-=1}7s4IX*)c}pU70D^F5@D8A zRN-7yEY@w_jpL`2q(Ntyy&DR5KeSZW60uMjxkQ(ku?t=o35CZf_*%_IAQC=me3wBi zrv<$xk&8%IZ4xtU`YuThK+KfsCD@rr7IhY2cb)~|1o&*;o#-Du}) zl}i8~6?lgid(x_KxTqQNYBv&#v^Wt}gKu|5+!EHvU?w%K{ybS6v192RR)c3l_}9Vb-;^8`k4&QY!LW^(ZG;)mbi}&U^t?awiJvb;!|OKrPQl!*efa^&qA| zjz;4J$XTXU{Oto7GWg{vklQ(o+}17%2OcZdk_=ph=fchJiRC;zK0z$K@b&bgQ>#W( zn;;h9PyU-&{_5Y)5R2KxpnJ4Xo~YiRCW`P-hTjjnb|O@ zm9X)iT2%@J`yIrAO&j31bqhlM4r9TRg;>636+ZlACcav{6dShh!`I)g$GmUW;q!%S zFmv8YeDviCd_a=164m_PaBr#}7XG6z_jX ztm40aNFou(eDUQ%%$>g&^X7j;yjq6EOG#!6*J19wRao)uW_&g88%&)t6|0vmqxkZ} zpqFEji+Q} zCS&WCHL#eJ=E_J;Y7tHZMZrLKqO$iw?_n8AFBwQ4Sdh# zxd|~fw$tXN0v3B|o8b0(;4^v9XB)wQj}48aaU``3@v1?z^6u2KA$G6R(}Y z!728D@4o;u53qONgu*m}R&_6O%9?Q^G?Gp-9U(!XIIv|8QX&!&7MYFUh)je;W#i(g=++>cF$GF={WQRDPz|~C_HqI;vBoLO4FAu zo>A6siUX2-JKd&!;3lvCI=tsu=2W%4JXbM2SIatY<#jlCyqMPP;`iC9ki9)a=+x-H zCzhL1?~jQ8{`)un1fhsQAd!llaf3LdH(BZW+;k>vJJNcWs}KoLtz9D|7co1If=zTW z+b<%lLW$Ed4^Fi7VsQlPeW4QNjtkKDij?`itZO4s^K)uCN{#re+Y5`!1B;Wm#W1t& ziU}1uqeof*{SCod>aqolUar<2l;SYD-k3Zi10B*bc zKK%Z!yYag}--SQ?@h;qP=Y6>2&-dZhKl~ZLz4Z>f)RQ$07V6bSifd1W`Ft>f=-;ojY3hfXST8w28%fvJ zO$>LDSgbgD*l&zj1Yht^bdCO7fB$}Bp*0el^O&VnA;Mw~LStj&a`!=FbVxh!ZQiyM zJNN8{TBAf^Q4aR)-3p_w1Ea$}TFPu3*s&f5wynp}-CI$ep9#IJ2`iU$9(wEOrsID+G9CZ( znUC>LFMfvKl3afC(iiwAzW#>^@8Xx^-@$L6d8<`@ic#L+MDmqFC8SV?<7GNTYX%XkA4Zb8 z54&PZP(g*(Y8)aVmLM^%5K$QgI6^lyZ_8FZKJ6_$`q0yOYW&Nr2lmr$zc!qKc2?8=rQ zLN|hdW-qqoifpQM8YIVH)eX!~Q(|4EhvYJX?Q~JA6B*hJr?d@4)e313lxBq;(RtO#Z_%MdZbg;GjRvI~Nm(_LYj<{0 zEt5ceBUeZ!7f34qN-Sd9u0pLxV_OR`^S_DZXa9bNSggKlW6^zqF#?Mib0M)vYf9hAt$<%U=ksxkP` zskWiMu>;?(TqC71%FWG2er^W#?%IT`v{=}U3JiDKk(U~S@PI=IJ-QEPP8_DoDTG|n zf~e@T`0A^#Fmd8U+;h(Zcv7T~dj54xeEKDd;|civ9rxjPB#PgYL~gzF9{l=_KjBw@ zydA&z$6w=Dzqt*+{rw&I_3v(H{1LzV{h#ogTW`ld{pwcfxgeIi?|WDxo7?|m(A65H}~`0(v_=~8x}p^P{Xd=$s_Y(U7-oj9~(H5`U^40YL1 zS5bt+2X>>C1Q8n*jm2NDKv-xL^xr!cl||q>NktHgzK@ERsPPsRQ$UCV^$_hmw)(^;Re z0_}iK*-j#9Ky>&CBt!(__<=1jtD10)q@wMpM}9^k)MD$_o7bUKbkOa5iWA4rz-H+s z;Pgp3!Yo1wlT@s9Dh@A|a33rAC{Sp*hJD3a?5(yTneQi%EOwN-_?vdLG_;_)p$-n8 z9lkC*RGqCTO3gxHauM{MJ#YwsCWuGNdJ!S-XG0oAl4b-6&1`&wH(;k-&5FxHQCglf zlPxYS0ek%q;FI~EVZwb6;ps=lVe(@WF^)>=q4DGK=tNe`N1nhqHh?eZEI{z-2rB(V zq_Z)lWMv?fYAqwb1dje|P|>Z_)2$q?F=1Dc4mAXVVmgt-**YZ3>9kl|5{=ifE?b2d zx)tgfl<+ghGuj}hlPWH4LHOx&bU<Q7vH{O|rmtKAw?@oIUn>TF5?9b+7%B%0=oq21K(`Z1eeFS^M60!e8Fp6rM(b?I_ z-)^BQ4acr+dtuSrQCd!Y<3Genp<%?C=9Y@1srT_26s2i-T~g{OVV^$ zhxZb!u3@;lF3`Q3(byuFCcymU-w$l_R~qL3Gk*eeZm@yiB8y{`JaY+Jvk@W-wT*2_ zq|1?_XAl;KxoZ$6kJv!(A_eX!#KKpxJ%X2IEhb~QSU250H{dXP;52)sS&KF)9nB54 z%NuklbU}{GFgmVDVGs)d>C!DuADY`qEZ?ofs&y+#7)2DwtvGyi2MY2N(bHu>k5`ZQ z=#vN}Sf4p{2=Ngoi5K-SYvqVN7lIk@zKMtKxrrWIS*$9m?-+ z#qWRrd)$8e?YQl>+i>fxzrpVq|NQIUOXTtU+wT0!Q9R z$LNNhfAKZE^4i;Yed?>2@bF`J;(-V8%CnPkbniB4Pn^uSQ26a!#rTd6YdLxyDqJ3- zh$_v&Aqsn=T7mkiQmk9M4Uy*({z5DgsW@mJ93w1WmbbkJRu;7zuZKy_TT{)7YLvf0gXZ?z=;J0TzQeuK}I`9y3)8pZFm|0Y;oCKV8Yd7Fj zP^7els@Rp#Lb4UaBGxxpJ(s2Q|R^w48?e%wSnH{lsfc;YEM`qWbx&kFe56Hj9Ny$@mQmR&d# z8HckmQ7EaZfKsoeP|!i4H?uKcLYwCj(v-c}n%{vvrACQZa!Hm4GStY>-jLRT>@PNA z?wJbguCODUB$QydCJ{@cZh*q16@G`0p|rFR$4*KA zmX@A`%&at|q$FX{!WAeeZe|_3fZWn{OrNy?_m6uTk3abgo}BP39)IvDOcaiG{IhtF zg5&`{f8gj?|&S3vmU)QXBCQMcC_=}>^{%FR?o+$)(fKgLbtCjTCPA zZQW?p44^~PMSKsQ?JtFdR-VZ_I#kyw1hACXj*#=$uX zy;JO8L(CV%!Zu+ue@`r8R@lFz-u^p@MJ&?#o>)YmG#ijrbon@YrFrJ=?qMi(Rvh*Z z#IF4Z&_*>scz&1!@M@7mzGn})FCB4bUK~5c#%p>ua{E&$42GD=mF&Xynl%Y2kQo~wWgY#Y!roT zk6Hr1!!?BJ(q`0FG$M}9W553qe79u-KKT3-JaE_j1mH<{o|b&dvoGPP3g zGtc3PhaSPZAAf>ntJmY(wX1NPD25T~9*p#oviKZR| zmb(y|u7#ZEmaD&ln9c#5kq^PI!itl1Zul2yky>rVzy+Wzr-t@?FJjJw;Vi#DAiy6% z!67(CVi6e~+FF$e3_K}iMLrvT60y-|5gBnBD_5*XPC-4-qZ_IDO?YS4LOe40CEWAq zlX&=X-ouHn;F-yH=C$aE8SlJj|1VMSH6^%`u|L6L#AIL;%bKl4R^MBX) z-$fS1Wn3qzT;YFOvxUSW_Sh$}2(iZUwsg@QGQ>6oW-pzJ>pC3=5LIWziE0b>m)NlA zbR`8(E7Dr%Fb#HCyN9H8Q%1T-L)WO3M^9uf5Fr)@ON)cObU#*))bmnN+klf{ArwAo zXlZYf&dFp}AtEXmfkB7icXT&}*lHX)umch2f{_?^4hhi_D4@%aJ{yjObHBv+M<1a` zCb2v-1#c499)I`|-2VI9@Ea1#AAkP`+M3Bh64?K$d9()`R zJ~CeF>JnXF!o3I*5#uc4`46r}5R7;f#54Z!Copk5adYxBc<0U6DBc&LvNRXfWjP4o z`5rsG1N(NZM>y+ocxV91i}TR!abmEq7ZoMN(u}a=q-=>;)Fc*>rpd@UZJ-kr#A0#u z!e;SE#NtnE982l){jK{efB!CG(f^28Yy?d~EH)}LgR2ildpF-F`zf?IP8GO(^;(3o zkPT)Nzgo;kW5v0C`7iVK#cy31y@d0FLkK+;j9vTos+lpIf9L3#VC*YB_r5LxV3Quh+#S{|Dlx-E5uqF$4 z&O3|Wes~zadS?fI|Mo`w;+Ze;i}CN{mb)h7mOng*J05)s&%gFMUV8ZjJoebbc=^?7 zShDOpX%naE)2Cz0rp<8Mt?2J^quXsquh)g)zAl!{*tvIgb)mAN2Kx^l!IGt`5OFq1 z+Wbmm@j)lXS=b1~j)G!6h=rA3Y_?Tx7)74pGBW8hPANvPuhIj*`azuRxB{=aA1&3* zQl74>SFcLMBL2>gTtRwrCDhjIX!8O)QZz`X8%U?s|MYAlwpMuI-^vEpcN2XB*Pv+C zL9NiEq(Y?M7UK%L3C1%p;n8t;ZsKz!mZ_M;$BEBP#fz`MiPv5rxsIEF`}psRSFXYF zkW(nFsX|pD5Lt%kcj2PsdLa6oakuR;0XUcIx-9yX$d6i zAimy@eS41}x1a$^(*WW!Yw-NEnYeGl6x{Xjc#NO)0$zCTEle2qJjRV1N0BfY6Q6w< z<0d{YIhdy>kw7QDNHsSeci#0F9(dvfygF+M5=+`qt8rsrXe17he9y*4BPsSQ$>ku9 z?DxaTfDp9HR46O0K|0U(;GV6B3JZY${%wqX@Y{WW=c|L0qRKLG8MdM8{|m8L{z5Dk zH2gQQ{5${tI=TP5$B4z^yC}^RGqF9jvVPW6VCA#k9V&AmQQimD5a1oY zOi|W1Ml9W8qJ|(A(JsFy7SCAL2@5eyj1h}8IaT#d*mYnZR&Q8Gk$eclqpZX{CzC}5 zt-c*iEtM!P&Z26sh1taS=v2O4ybwnZ?w8`zk7kfq9%bE|j5l9-4X?iV67IbHPx$A5 z_$B`SZ~uwJ<8RH*&0?$7)2_Jv(4hnNpabeIy_pL;0V;M>c zQlXI5!Rs<%bhr;Ly9IGkk=VUsI|3>2(o*xJt(JvjF}TLIXZT-;g~V$&+yCzpODWZx zh009K8y9xp?z_YrG6F}Bu&Kl7>c2_5G(v{Aps1`FS@~6btd};%(ej2VH6|%KRYoY3 zCdd^=)YNt$E-nWL51zu3^&9cxyKmx&Nd%0^Pf}ezf?Myt8^5^waolp>i@0UNXSn74 z1NfJ3Gx6I^^|*CM2mZ8QgL@7e7<$~dU4e&ocH)seNPVA<|liz0k!Lz_qPfl+-IwP}L^oO6%0SpkZaT^t0mjQ@M%_u}Huo zd7xNfE^=s98Anh_>)k|fZXp=AlRw1RMW=RvYN;PGjSbbU9Vn=%Mw?2*?=_&R!H71~ zWpwcKp;g^DTzhDNG>fKK0Ct1mPFx4kuy!Bec`^PQZJwe2ATNUtz}sQJk5J*wbfGm|qFK z=OUWBZsM%08;g?~u(m*nP}Q(R9=sID$+szdz9P?nWd$a@b*dO^ODxFbdj{5`M)P@; zR>`n#(?%@%W-gX4TY%5ze~P($9+i}UCIu_L(u@Vm)??ax?_%Dfg_!=)hnPKg4o*j= zpsL9Lxp@d_Bm^;i{PE{r!-Eqh@a;eu=sKtr;`k$5#u#LuFkj z1(FSo?I!Fyco?63{weOe>vlHQccq2D2M?V>eVY~Lo@;b#tpB`^-fp%F#~{1}F0TMW zQMqv}(V2%smOSVV0p+UASI%6?YaYvyIDVht=Q^N`(GPrt3L?bYFpJyASAZFNo zLsE>*Fcaf1qMeRHZ|OySiv~G`Rmd(VM}2cU+q{*6+77+R3|~(l+`cZPRx} zsIF0WKQD1p#aSI_;Wn)@HlA<;D_|vjz+_j|=x9@DjtvluTBT3|reQMmX zSBVF9bmG2k?YMVq8y?us*xHP{Ru|(}^J4Ie502s=-`R;@zqtmtzOn$nnKT{0dSnXz z@X$EiONM`x%3|V+Z%f3o>+mUrN2ehe}x^~D77U&%=v~;RTFpX$ebxCPav~(#c%Ii2I8%1dQDB?_GQ;uVm{H#%= ziT7gv{y^;AcNAF#g(SWvY&)g!JawHorLBoGD z5?Bv4_QJ38B8pgRzRA^N*4Zk$F(0aZW3Hu{AiZJpCahkw42KTy#=325@YT|<5S@|; zcmDuM)QXKe4`a!9E2POE^A|6|TklWD-oq!+Y3xJ0X%KNa4S3>(w{b5W%M(w(fJswc z#>=lvC+I(hS6+M`uf6mlo}NsR@X|Cq_v|Z}Jn2QeHgy`Fc=$=&dFNxe@3AR(ZRTR+ z)M-$!aU!*(5??Qxhwa-pVaLvGSVYx1^V5YCMYV8tU1DQ&6EKdz&+i~suULxxd$!{P zHul4Q!4wg_u+k-pDadk)2Zx(&z&S=NK8AyZX4HGo+M*tFB!3~2|2_VjSj3;mBp?Xo z@=dYo=X+uycIZta(I$z+IV^2SVE6S&*{dyd83sFvg>Km40V0}x2$c=sFm3XFy7+wI zroAHRs2~q9CiB;c#V+n4@k@-4>C9c|P?;ekR&{EPd@W|D=_r!h(W%x*QAXicR8qmm z8f0b_;9O)PPM?j#vEw25;G@}+1G)df#~F{|&b#l&uYdD{fd+t zGs8lmZ$u{rtd{s@G>e`mu~b5=4IeBXVU%7Vdvw~E!S0(6aD zDa5`dvQ8Tn0abXt7G+f`Y4e-N*dlD$whQmioQ6 zu~CM#n?6)DTWEK;!ajD@9#mB05QOoNwTq+>DmkYHJn zy>t=XR9n8D>*yyji1Z-k+8)GIYf-8nhLW#S>g;H8T}BmeYD8fr$`oq2E(}BOa-yWV zmX+Md#&j8O9;O1UN#toT!V%N5@LN73A_=0NA^is1Rj6r zK|J=rLsE=?^l?lc|0E_cCOq;G9=-P-Y+1hti7}aoiHL!+LjeUV&gJu?&}jgQ#mV*|Y)WrOGF?kbr2)24Ah^zr&#jXnK;`0p~y=Lgi0ii`i#YaOtVSh~bmrP+)Aevzln z38&Lepz}$ok6bQM|8Jt*aTAs1Ye=Qw64??wWF|E$-Vobiue)E`YS~5XvU+YvVdnuN zOgvVE!+irb*A-&e*e;q*pP0=_weB2{M6#0vq%ycDmOaptcx0Vcv?;6V&gACEII zHMAO0-JnBdt(LB!6PdYG)_V?M_S}V-^x~_ycid$BX~GNm^Xp&WiLVb~((WAGwWk*U zd_X-$DElpAae&Vc>iL{OGPz}knZ#nm-|n{JpAWilE06unE)9OSp&q~dIvsyEBM|>E zZ72Tm`DOUS^9%6c)Gu-0Q|~k0#EaACVA0yW2#m-;T456kt2$BDsAt8oL8f$*80k)U zT{`O!8T>p!|ALf$UE{t$(7PaQGwbNT4D--s7zfDq-xG_E#M0Ay4F(bt@dqqA7zwob zbRjWSdStiykX&m+cAFiF{%a_wf+$m{(4;5$SxjhGYgv|VDm1aN*fnX|vRM5tG6_>~ z!P9dC9`8kXM3;=n;YN2Tc0Wu_OF~*&BHasB_J{9CgNaW({3ymTCXSncDU&ASxk*ps z>G4ls!ov??<_B}IZR0-d*s>D|F|o+a$dob;%i1)sc3(%e=^_qfcEYdDi){r4oKXxT zO?v@Hqe{{4x`8CkC2TL$V_mKW8w(96Cc&h#(I3xMpi0Yn!}@aI*a@syw+5>=uE)0< z*J8!yZAi(hKsU=nOSOOSWF%H>+Jq%*R%6l161Fv<{=VL63PWHsQgE zQ}D=>lknuEXEE-HNf`Ig1Uz)-pYhbA599ggr{d34Z-2VuZrpSCgSh{$`|$96596`N zdEDfe@!671C>81YeIv*yF2}MZ3$SU!Dy$))Em^({>$dwNv$zFj-Y5m{dDyu~96ojw z`}XaFzrR0be!c|T4~9Zv9+d8bbMPwk9=cbSmCa;<%jQBiW%T($I(Ul*)oj@RO)NkE zcahj55a$QCBGQBiVzH7~ysZ0PI+QLpATjORWH!L+aKpp4MY9XN@dh$#tkO2tVWke_ zX>UjgDa95J18gL{o`Ihw7Lkw7;-Dxb8JQ>;Y@$tj#Z0mx0&PFs#5pa=O@z+UE$zXi z5WBf59drRIl+~$`QP6~wXHqeJ<^ufj?#FTG1LGy2|I@vX;16Qq;~($F?G!kVJ~0_n zo_~WbIiXU&fkkds)A$QCu%WSu@*Un;K0jx)Tzk%Ea^6dnuH~9xHt; z%MmG&s*A*8C1zVlEMkuwTlY1Jt1EmiwpjQtA{M8QC&GUdTfbUeqAzrWU?_G`?B<1t zi}6T_-Z~9lGs=CjnCn_yPv|;kLF@)d=3gLwWw~gqp{V4)^-*it!zWe`!IJB zj^l8VPAz5s@d#B4O%{^$Mi0T&eR$kN!B9bjqlXde7y|=YFz=xD4Z%R=VmJb1={vAK zw+)LDDxv20o1K0n7ZqcF-a+h1*^SKHG&D8WpuN2v9kD)Ta6l|f^+Q$I5j>1;!lcL7 ziP4@T%9>sgrg^JMt1Os#fMAhPRZA9rg0w`TWG>=P+mK93*5UKy7SAlcou3lMT#vWrgH?JFua72;166(ZJ%-Oh^`( zdZA*)bdLb_?&HX^A3=`$7~1F|YUy|zd`Agcps=JFPfvasuTY|I-M*6!J09MF%1us7PBJREGUfg&0J(%?Pqgc9d0p6z?dGmwM zuwr`>)Dq+{-8O8C!*fqQhR;8E7c;(?hQ}U%1TVhw0rn;3!0G8ia%w(4c<(JNUN{%C zXMd^u-sG3x#|NLyhg#!AcjpjVD)Uj85s%!IIFuYrL0QfLG**LTH);T*Ry_4pUEg}??5n_F;tDTCuV|1)h>71qm zRg7>USgbDkE?FbX*Q1O`lWjrtRMmQx9od&jHv4MQc+sfwp{m(|>J~Th%XQe9kdG&y ze+NH5_ew(LN}PHAWdzFw_}8DGMa6Q40+5?;y&HGm`7o|!pmV`_SK*wqF2^s7!fA$IqRH@6yZJqVvy_MeHs#d5Fs?G);eshEaM>3*_{HpM{LPny!U6|@L3k`CFjhqIla;jPd@jvl(lquJ zp);SLSsWRM%N)Kw(}};F<5Ix#vpIVF%LgSm_k(QwY|>i%pSx!$VENZ;UcyDUzJzP; zcw7O?j>LSF)EH2wa#F2$6{u+RbVSxJm~A~&U%ik$vh4xNWTt^DM)}-1%6pX+fo0it zLWau4-Nm%%7*@a%jg2Z`p_oB?U>Gg3j|5Y0p6v zz^=Vpu|Fjqd3kw=gu4lqLkd_rB4g-bG||Nj@A7uw2!B)dppWwR6BA^|DY*9POL5Mbzr@*RoQdZaQ`+?m|gj6Bxw6b_ghT1N$rlVu;4;PP2`oNg_VpmyY+B+t!6DLZq@2*i`Mo zs$vUDOq9`sKu&%g-hKa5%v-P!@rlU_SU&hRhb7AwGRSxZ z4?lb#UU>O+0=AOnY=kiHM~zB{wFFaMaiOxM!NxTkkQ$eWEz4IRb=PiKb&Og!ZNugb zo3V4-c5L0a9tKSt(laxVcpw{98ar&!Au5gt7O&iZw_bS(>y|IUmtRiDTW`OC=U;vg zGv};S%KE;2yK54;u~ z+UlyIYi@$6O^dqnDjbt`o|7t{JpBPE{hvZDtL$9u7Jg5X=hNS zM^88ZHZ?0vzOt=#Q$q;b81yVq9l;7CFs-^D2~H?|nAQoHdZ38KaLDZ?o+^Gk>#5Bx5?dwHggCnLy*3V{>%_&eGMu>a#Cg$o`3CAoN>W5iemZs zITzz!sXl&2<$TWhm*AS~ZpJOQ-Gghcx*2CmbJ@?%$Ju9&H+Kn8q?zmD%dS>{BH)lm zd0n6*-#_czi}CYco~x)AQ8&_5CLQ~iPzC++mlyJLm$NS4jjtB1A@B^SP|T!kP}rbx zqp@9@@MQBs`ZNY~W>W`@hA4a{G~OhYOO?t&s%o)pEi3tlpWvd0-^4#XIvfA@!-M#r zbB*}PTmoVN7099(A0zmS1%CYP(h&Y;F<~;t$@dAHg+ct~S5Ewt5cw(p{>wRT{KafS zWtIbfGuwv$Im?LuJG&jfm{x@w7dPVSPY>YYDeG{_q_6P5Z+Hb~-8>n$-1`LH`*bei zl5$a2twDX0RoQ&Vpbf%miot24L?l=o&K@}3y>QA9Jh^8XsS+X4{gji0s=xCH0$n3a zmm~1S4kJRS#5!bYct%2Wx&?$(LaPt)`Y3j)g4m<(Kzw@_3v-|1D08yX;baBcv}QgY zx$j10GO4UrKbDt0feap$P$8!N`d*{<8SmxUyG{`3s!8x^7UJhn4XUGgISm{ zV+Njj>M5LY?gca{sFy3F!fw3bcHDZ)ow(_y+i=}=*WtoL2=gd##`pJoUvOMKYp1(vsT;3T8Ym-ng+Mk zg{q=beD&Eo*tKC9a?%r!zCRH=cO+uj()B1fSb(a72VltG33TdMRhU3Wdx8ECY;E;u zEGvMvu^y`0dcMwjHBkv^($phPRBD(E7!&(*KZcLW(*NUIcN{%NA{;*kugwOBPET+* z!=|ajNIz)-7BKiRJmi3?r5trN>4NMg`q! z4x+^vM3X+CSPQ{YN7a&%TaQ=XoQAW`zY4!N>mvN(?DMHc&c>N%pM&eJy#cr1eiyE} z`Z}EXi*xbs|8geI`Nf5}=$tDQRU#&REE7;U^Xv<8CLaYR0uh<}F86eLIS)TTw#AQr~JrgW8FfHu_<0049AHHiE@t?S{`z zn9#9EQ&>QJdU#lY%0wTFZ0Y z$y_&ny3of*7vD2el~BpdCv5oIPvtej8&W|x$2r5v1!vLELgAr7gC{|e~A=IMn#uii>t1@ z0aspe9WK6zGW(o!uwcfQNZz#_$?;oYbF`tQwF+8`3dL2m$`bMUra^3L=tm*d$)_bD z%xdaJE=$M^%Kv@tL)hBbfnr`)C5zB|=>((U5K8DV-`tRjJVr|gtLm|6`66uFu?lg! z*CCDolSTamEWN=HOgaq~&ix8&SAK=PJ69uN&w8v|IR|rQ&4k15gUu!Vb8hIZ4uT~S zT5TJ28Z{Dj?SZ*fgVOYDWXvGR?pvSY+;>ZLQPac+K*uQkH_%XI9QGy zAHh*VM!@2;+hJ|jptZUN0b3hC#Yk#Q;Nqi2VPpAJs~XTn7}T?lQ6ZQ9`Nq#aEx> zu}Kf%vgf|UrJrZvf6vrXoe&%=sYn*t2p6iCg+}~zo`cH7ONBzne04&#%;9Ta`S4e? zzn<+KH$ML<-H{+Bzc|8<-K4wi>Dnqc%*(7lDqDG3mm}>cJlG0Gys)rK2lIWg`1{d;MMTvmnai zgr3MDFe#MPaCN?6WeNDa7C-hD8=&oE+{Mh0arR~^kA%7)rL-AUEm~#Aw%7m_2;XDf zKqtR1^JS#HS0<%8sfQK?~efagLzEI*P4T5!CQ{=a+`Du(AXByr)?OZe+4T?`RsvSLrsa3IXrd`mo)23_EN4 zv8}ciwVohyt8K`q!pTnCi{hLV6qn|ry}bo$!l9wL9u1{sC^?Xcge|MFYWC;Yyl^&Z z4yMCU)qv9ETl~-W*`lZNEi9?X@l@`~c+wDN* z!3b zYGs!zseHd>tYczIKu7ztKP2tMSn#FfA7j*P)x)T1L```%e9l%J8=)!$3%g?UIZgwb zTWa772GDLFK#lVVvIC>Yj~s`QpwJT%fu1oK+?}v>99K;Gg8i(UPT7u|7G`uF4vi|K z!DPu784>0V9#Ymrw0V2Rrw}MBxJMP0>*+WIor8Xiibdz_VxTO_C4?506Lk$HFcaLE-{;ezuo`%XLe z9D?f13lx*NFJfn%K}GcQb8yBPKgUfsU5^Vdy%-l=c@@5xw^&)kwWLvlysB0d*Xwz$ zUbI<)3>ZT&OFyF}0E@{BpQi&>ittO+ey( zK4nN`Nu>&N7Ous^PrQH!AA1h>KKwNA^)cLb_rrXA6!$;+G#;JwJf=*28@V|}a9cgF z>1?p;obZ~%@KB9Vj4EJRoN2=R0v|q1G2o+gGiKy@@M(q_r36fA4A@dXh=tBEyi#Jt z%7z}qw;VyH)e2qjAXJt<^w1w1J=BSj{wRhIGg68M(4=Zan^uk5qGHq)6rn076$kfj zL)Na%sL4u0ZB_wNHtt1PdI^d$im9klv2E*aY$OEN?@Yq>q#|S#w<0~e7<>1mqP(;f zm8E)A)O)GgJjlw*f<~iZIjcm4PLDck0Cg5WdfgUis)`W~1eKw}?X|^l>6*~feOMWd z6ti0ppi-295dH}BfuIR>bzrPF3ZGfSvY|q1asqtnOrX1+wdFTpv3nX&UY&dbEEOkO z0i;5mY(IkKw~y}z%kfiyMFzL{0s#~^xR6j`!@>eJ*45dRog{71F+>=c#dzB90!x%- zJjgOEbxM?s?3^ky{+%)aiEuHxWhr?&WN#N$N(ikoT-V-#dX10fRhrEOELjJu@#4!L z;DQUUrwX|NXP_9BqDxK*l9Np)H_JRU zfy=p6Fz20niDKtSa~a`s#+g6Ib=O}*uv~&`ZoCQem#;=?gBq2sMpUXSsA+Scfq{IZ z)`ez`OIb->XK=%8^uS3K=5hq#afRU|gk?mptQ95`Bwb949~3N=H3F9KI9Njc@W~{w z*f?0E4bB~9CJ;E%JSLH~CpZL`baG2)x4j1%9l>Ggq)TJYC%jf(x{JQ<2?CzPD{i^XmNryX}D_;KC*gZStB-y~S>z!_KGjOX9@3}4P) zkA11dsBSPr)y~4A_Mo-Z!^qkXi=`80a|dixD{lXgGDyM6dvwS^1*!!f6W+^0816ib zD5E3~!D5#o!qE}fSeW(x!^&=mc};GlGkPy(C~O9#&*yWg1z7HRjD<=QnSLe3haI_Xx%q3Z~1twEaTx(SwUMIAN}jCD;m6qmPQ z?ZyPG*{~1GSMS2YWm_j-N7M^S9-L2KwZ7~CimKxGxw_MSmBM|iD{VFbNnu)D)B zMmtdA15&Lt=W*=R4`QDk*sec@wFMFEDeA(W>?$M`lp>|L2zv>G9s5&|n3aR%gJswr zpNn<7GO>2=L99;5!1|1QY$>S13ck1OKpobXX|YUY#Jn0cHc?@2YYrjVbQBd4KxOnP z8`5bBNiUs<(Q}**ViZFIREtJB2S&EC2AjEOL@_OWmW7VU9H0_qFra4swZx90DRx{j zEAzCCN>1nM!G1=kE^Q5c93`7n8L22>d9bUgf-)JDRH3!0mNaF}n*hiJSSDWh`tLvQ zLpCHH-<0^oar78mW*bcHt*9-{N5G*aZ&=8{Oc6UK>1>3mv6kg5r1Uqohgr5%Zmg}) zLBn9nLS--gBeLw2qvNPzfyfbMxt$5HgczWO2o{+N5MuuNWg*cM1CU%nncXk_#Zfxg z9vEbF8m*myNjsx`jdgs4tIFUG@BFLri(e7~7hHuWC%vec zbiB)CMwvKy!Nt<2B28Q8pAse~+r<}Mi3=~dT!G8UCZIX{tPAn;pPzwWU2`2Szw%n# zddK~kzjPgPOB+#2rBb7EphfzEw0@{`yl!a@V|}m_jIwa9&(os}Hx33EyawpUc<<5- z<_OB{d!_~b+YbnqW(6#=YO9+GE;N_UX~nq`E&>&Y3^ArdbTN{*P$ufBP-Lr5hpP{I zW0Zf(#G)YTN%z`TI=*%fRf_{f^#**ocr~7tUobfKcZVMa_wf^mHCoX096pN6^I# zknL_Y!DF!WjxU8G8-JPk+)P-T>B&q1f>_#uJD9et00vhli&L$(PBl^uEQ zJ&2>i%Ba^My|xVr)h^`gdzJm{oeZ3+99<}6Kv7M|mb(U^VtO|dNG9I^Qu6EJXsaYk zLgSn`0Tvg*Qdyn>-2_;azDvF(CY4aBh$mk7`tLvQ)=s%7~qsL2-wj~C(nvz^vd8G<|ED7aVtZ38yO(i)asDVa{TIRALEisZ^XIhU8R8K-1Dx$Gm~G% zUH3eK|NFBuapu_<;GFZv!E(XHm*K2)E;uDjPBwvxJPJ%E)QUhwn!^Mv|Ms(AC}6qf zx|?wO-49{bf|W?mtwcek8l`mxRMMYSH``gCee@TEqt*wV-VZC4mxU&3MMi}M>3c#Q zqx4;)%ItgDXzvH@W2vfbQKHX4ROYAjDN9)kSX>I-#-nx@BWeMQ%-pmw!Zy(f8VmvG zX&NTJo;T7?!Z%T=)V0WsT2NHoj*P;3Orz6#>8Cj9pY29~IlX}=pMC>RPkswi zUi*aaeTBznY{!kSF2r50&cU*{V&w9CIc06Al{CE3d_E zjlju*>F|uf;2TA?%?D#Q)vSy(p}Blvxcd9C+XOtiv1H(~FlZAja_1G&ljP?42}nuE-Xv}}~_&qRH8AemqV-PGI&o=|i96GCN^bYf)cP zgox8f#lmRj7^SAz82yjM0Cimr!pc4>R45G6+D3rl;34Q_v0T>8j-EpZcSut`13g*2 zf_^H<`swKEQ!GFrDHf3lll)A8z>rv3f#q_+-L&5Nf>> zEgIHEsS_#-8X9y+ODn+CsUPEtD{sd6R4QUuTzMlNee79Wf5Ywg`7h2OhD=U?#MO<@x-nE;BwMEY8!8SJbx&&L_RJP+4geKW58)or-v-Y2kl*=CegwSB$H zNrTG8pq{~~d3;}g1L0!Q2Vtj=_BeT;Ha{FRS<=PfrEfd22&FWId6{lM7+9+71T2wp zurSd*B%3!n4i*85n^Az5ppm`>J1@*ZdF7VH%tW~mEN0$-)yk;f9D-WwL36tk4Q)Oe(ZF2`4_UBTNcf7%?~5 zQKlwD2$oi=qh?Ci%4RD{YxO8BZ$)NKHTEUtVs~5yHf-95IrCOy=k7f0rP|n+P=Z~1 z^7vjJR;`K0`yVdAyYJ7%JMYiIq-Wp8UH3kN+wOQmu{-aXgvXwI6|cPh39f%-KK|{_ zskq?o*D!5mGPdupz{<`0v3Yko)@(_@`aNk#%q~MkiwVW`TI4g0RBAiy#sFNFFr%Pe z)KIx(HnyXn-HZ@n8I?f`1dA~e!44{x7dF*npZN$j*Ex~n9Hv4l#kjXjQloOyk>%>wi+R)A2GhAau1=AZ#7cTc)E`((*Xhz z27S@K?*vPPWkUATk!Eh`uaxHO&iYxXLg;Oz{! zG#V$Gn@vbb$;Z?;2$m~u!r5n2VVr*@pWlGHsaCGK`X*(B*OkhGlG3S9XwWXaXk3k) z&P17yZ)YPjKu=pb~Dv8h#nHZ(x z2vMa-+dt)|zv~dJyugyGChSkoLB_!XloVH@w6qF2+4(3gDn~_m4T?)Dk(E<~y-8_U zzGgF~&76;qKKu-?zxEcceQO2I{45>+ut0~uUf{-0=E|&kAO3cZ6Ms8bn#0Wa={yt7 zh@Z|i;vZ&d@eeb#`0LsJar;X8QDjbw1AjrtD6{p&<~i^`s964GW;4$JAOn{@w*ogl z@GdU-<>jBr;%w4zy+qUjRR#rBOi%Zegrh!`Bj=F{>6qQyW zucQK{)eV%Gt*B^J(~L@gQ@H0S(}RVcX(OsdX5-7m$pE1vkBXw9$>dR)_ah_7Y#zdw z1$%cvJ67x~L1KvxrR^cqn>$gf3!$*igxrcYWEVFfet$j|F4=(TUoOO|m7B3{%~nkN z{40F&=_0IMACH~8GO%LhZme0iSFu@Nt;E8`8}Z3!^YG%!@8RJ`pT~m_PsRfeKZE-o z6tKL2m!`af2VR|ldtUw=&%E^|=C9g`&%Rtth4T&;E?9z6F6*C`1+NZane)VK%cD#u8?UP~L^AgN^UWQ>iA9qZFY1<2Yd=Bkf z9z*Mn$DvDl8Lf$LpgwLYY7=LoXkP+me!db}<$7eOJ1}Jj%NQY|>K}onrF_hXv3~f>TC~+vAmZ>)Irx#==s*gUeS+Er0|Q%s zqz{pB7dl8CuPi)C3(;4FB>3&>SIkQV>kl7?Ybto1np+3~s*>{=v|e%z z?!N0GI{ljzFvu`}Y0|p*BI%I-ZnYvNP?7J*^YeKQQ7q$XWqgF#g%=1|uEQ-i--)N5 zd>$WvI0N$+ti-nM@yKU=6)P=kprXn{T1qZzt5ql~twUmbx^nILdF9Y)tO$r-r&tiR zqJV{p#lWELPXZQc2DA9O5b8aQHj^7G)@{S2$x|31zl2XenSsTNmSfNEc;x03qPa

*#)S0yi|SCtSFDt&$2784ciYkquxG%cK--!40LwQjP5J7NX@H5 z8kNe1ZAp0R-RXGq?avU;XuYbUQQ4s9O#)%=ybYM~#R@z%=}o-y+Nb#V)A@L2@>_WP z$yf0D8=vB-r(a_<^Bn(v36DPh0`9)|ao*=6xc{N2@z~pQaPO39c<}iT@X^fWm_BsR|Tx)^H%Il>%Xb8~h`i>}INp&7p zz|z=v1oe#iR<|9-6C270^(<#IgETyFIE*aqF(Dkj6sBeB^Zc(Cs^$60fYz^ajNAt?O3*YE8ckb z6TJGydwB2T&*-bxVQ*qG_NN^{S!E4$1`8Ftj*2-M&p-Dneb-d_i!bo`r?Zsjx7~V= zvWoaMSJ9|c?!WI*Tz}oI1k1(BToVDxWtU#9jPMfsCP=<%0+ov{xcuu*e5E<;1XRXV z%!Rm`O6dN3AHma;Uc`O(K8owEza7s#|2npAi$_s$ElNu3v3vJ^Y}>Mrfqp5rZ{3Gi zUVa;oJ@O1*dhreH-LoHNYe*S*WmJ}}qG+IEvHKYS|G{99oK#G*cN{DehkUPzWH#Ak zBb+|?qC-kQf;do7E3(vvzgre&48a+SVB4Nuxc8w4@cPtOkdz#Us>(w2^@I@cS>dp0 z(aH*EFt%au-d*^7+NZeuic9h0^ONx5`)}gjm%qT(Q#az0FUs+c)7$WquWb060Dtn=MPa#Q2>){A6hlzZb;c zFRL8wT!W_`yC3UT zEWr8|b5T{4iJ>k(d^Qcd4n1NaH_D3h7!|ySi!MH2nYq4r&2AWF55GqtDPdtUEo_QJ%KlUgU%%gbzr5Ewq+aKZKr=Dj)d=+oM^*-j$ znv1v{JCT{1g0jK_%$qk4uf6#OKAkZO$p;FMm|Bd3c`8)bdePDnfkD#=zk3vw&OR(J zZNu8OUTo40;$ZMNY7WzJn}M4*)FY=kK&Vhft(bvLOI}CS>`5q}c{^(6+z$8drwNf4 z;M(^Tf@#m8E9W(YbOgJr zTajez!*g+sNT<4}3y(42ISQ{kikLLx`sh&n0|@sLIKC+2T|jmh(8gd`jBG(21&B;& zb@&ERYwL!F=cyv3%BfhY?8DG_k3j7jKxMra?)r2bcGa=UL};Bj+T%uRRW6-jCR%F> z(biDP3M9j52_9u;lGL&BL+aJnO+bI<$3*A-QAV;7&`NM?HyEI*tw2TI0r)H`494vI zAT#NB4~`Faz@V;Ewh)i{0+59yT}<8@GG{|Im4(i)jL__e^&l4OR(zINNa|vE;A^mW zm~B3OSC*vm$Vfm2%jJybpM2(JTygdFc<_(2Y|#?*H(_4T*$90Sf@U2_Aj{nbrW5O*lb!zD-QZ`9^mhU>1y^v^y~ zHmj>BD~8oo8TW5!&LRa=sn8PfMMa-!d9 zT(O9@edSMgd36^~+`B<`Y3to8XO)8N0 zv1IW|+6p?=rC7Ck3knLWa3CWe+jqoc$F2ly-m)93*KWf6h0E~y^qH78V)9}e>pW)-rKE=$hX5*6?b1-ZEG9;&D;^4tN?A)>gD;6!m;(2qiY3&-!nl%e= zz4tC=&RvMq%p&YRP=>ssc2w24p;AQ^uy`Fu(AIezNtO;Qt_$JW&4u_du>$dyJ}hwp zw{LAhVOtdIHg3i8b#t(B@oOmm@(IG_P83hS9=2^yAdvhVY`Y(WeeYxNCO-pj{3HVB z33&HB0&m=de4m#7D16z^AyoPSj0axF{^d_$>5@_-EU{7enMZ-{Lr_^gSkuyhRZUS;d5^&`#5~}2?kx{6Y8$39A3~nWjqRm6 zlv35m=4{L&)SJ7JU1LUWNjBovr8!82HElwZ4p2fsoq=7wb<;;3%>^1K8GRhn5j{ ztY-v%Qo}(-^POM`9fr(r33nbrLyHkFOnD1;-~TXX&6$VP^mI5J4vdYBVRY;W`uclN zTUCwS47}#f`U>y8^)^+@%XsJQ50sXdmtK5T*|OoXORvJ^mtCW%l#4FB9QWSy5FUQ$ zNu^2b+;c9$B^SvS4_D)yvo0D3jjRhsNQff&<|wd<*W_vnf|aY5H^F9KeiE-^B7oGqGyfTqN$@M(S@Qgxtg};g(O1gQ`QkPuwv*K4I6xiVelS8 zo3#_gwFc}>DMUtY74{}&Vg06EnEllvrBCYRmtMuAR2S_psCbX)XsWuw;dJ9U*Dv_0)kA`{`s>*7p*4E*T zmtV)@4?K+Lo_re9KmCLX?R{nW`2ET0*q@q%qLL=m)>)My*e<;f9z#GG#2{;n)q8*~ zIVL0*nPFzMzl6c&9a|bvtcxNsF%esLEXKxpFQES2+oAg8cBp6FjjnxDF_Qf;y3^i7 zH03pP9e5Mn2j0d&=DP^(c^VNyCXze}fz+oF%6l7~HS=N3`4TDX-oteHDo{ z%}BF%;<0tPIKbf6Ojy|c-IVbWW!ZIsx>!%F10k;;)z%>tX}Sb z=6p$;i51J1WA@Bhcx}oncxKYmxZ*NG;G7F^l8ZO>Cl8&OiSg zDwgx{*dzDj-8Wxl9bSl~^S{8fkKVv1?@r#wG?tJ}WX0 z z)}tUl70VXSfLULQ;eJ0_>I)UHEL->`)~;NLyo0HzE-%L1xwG)hlqopt(qH3$Ui29L z?fyBq;KN*8zSe<%UK7M$uOw6!MaLD$R|JMYV*$akScVZ>@&C+q(j53pW!ZdwPDY9G z@gFzz;<9}`xM8aq=YJT7zq#o}{N$Hc;omO04%glAYg{LLdz^C~F1_G8hZVu*YU!n=kV0Sk7Du@PvQNy-%`LbXAYId#%Sf1x4B@a&mI8FL52V zEPNS_@7)3Ym-nINi#rk7H3dT%@1ZO84Rofzp@5|$bt<~~chCNpF_19@y_qi}lJOiO zh3_I#@f9?wA7SrO-t(GS*g;@bI{esgiQ=_{2ILF^YFSiJRznC8B*6}4BCC%|u{+v< z!Ja-i_!&bdu%p<9R4SK)?V}1xbxTMu1(E!x!8&>Pk8cw7hugH-)pXlFUgwT+;din4?pxAV~<6O=t+1uowS zmhfS!*R7j_-9;ksWh`s#$C7H zkBiQ`9Os>V3C=m=BB~aF%J`@+Q7%ez7{MVO^)Yt}H7Q`7Ls>@-Z;qQRx}8}YAm_4xbQR4}v61dNSvk%^BcLd1x_ z`O41s9Qdm*jri&3YW(BOHe9q!i`zG9@zmye-1hNC0Ng+$znpu|3;18>U5zs?z8p9G z`ZnBi|9!aOmYWs%c;ST?;`Ntb!Mar|(B53f2s9hJHZDbBW*k<`{{*!q>FAGI5%K61 z3Eos&0gGOTxE(w2z=zG#PVfppwpQcrH2`%cOn+;L`O#l4jnp#{{DVMqfvBqb)l!HM|mC& zhm`>e@4oX9?z`s^!s%_yp0S9|dKZ%7(olG?2(1lGjKZ}r@t(EqZK$cKVbD;btS^?6 zUj>76nD+{n3sz9~wbIqYqOy72{wK&;>FZUP_=Y+!rC*anB2FRw9T6cJqEnk zTOY!7E=JVwGE8I#aT)-*b&yHV@iFRuwy6w{dfp)>3<|CBw_f}qGJGLwWA}< zpd}DMC`9Mx_py$+sY0U&bRU7IV;F6u$od=)K8kO_=LHrls0*RS%evPE1UjVIzK?Zo zSg~=i^nX3v*mI)u-pg_uj7Xr@s|3-Lo_Ssg*qWOg;P={*xNke^s|#_sKa8%R194kc zWB=}rD9T90-c73z3Hs66)Qmklcj2S=-p6&<{0di5wOn=i6}bMI>v6-cZp1JC^$eW( z@8{s|U*D&|<+dB|VnBN}ZG5e;3nxrz4*N}$*hI6Km@Mrgo&Hx}b%O#G>BG70*1M@% zZpK+>or81FIvaP~avL_TS`LG%0rA_`W6!3QShr+0_HJ2;{+JssiyFBHld+3|e?wy> z_VV5~ZrF)~nT7N*VP#1dX$q4e`Leq458B6~Y7?+X+jEaH^Ij$&DeGaKaHL8vLwjpI_U+oBG!f`pDo{~y01LkS1aqg0eU9?HTv#=FY}m97uf6pl zuDIq_Tyx`txat0vanXJ6;L0hhas8LMxOKe+mu?K>%=KOPf7itD_sfI$>0&Qc3_-Kd zjK8H~`Ckis_~)eo{BlhgSMKV?9ebm=X|)Phej1OTJ@g^|@rt|g&lg{ZYkz$g?tk=Q zJn-;CxZ|F?ar4bL35c?05 zC}5Ep{Sj7>{=rf7_6?&W)(w|a#?EU{R8*wwZ20j<)A8a9uPPmc>(_0jVlktuvloYl zM=>~X2m=EH7#$tO;lqb9I5?<07aJZP#*rgOplR3P?YBO_gZDp<*Is!KAH6#R^Jgx_ z-W^G3sBDB)Z$xJ>g2BFC4D^iyN!_X)U%0ZQ9&P4c1uj+(ua)=hm3aZI*j@f%9OmO9 z{c+s4r3Mw6E<#i$eAY4=Tng3n$58w6ji{S;JuIsqfM?evc;hD{lJz>mnXkc-Fd3FT zPr;M;Btq%W!hhgtxU-*yx8ftX>K4G#xDsYnI{K)@d@d>_f+bZQ!3%5iagb3g>j&Y{ zi7+85U@;R0s_7)j6L^jkCH05m( z94I%V%s8YB5jQzQ%$pcOVIP7a54yVuF-E;n)(w-vi@Lf-o>}VDk6=0dal-#hjGiNB zj2Z(RW-B_wQ6;~`B(1#!jf*P9*TwS2w60WnktTbwln1e>A&SL~G1U7B3o6QBC-b9A zMueRnES|t1ysT#e7q!NWx8M6nQRg173qyn5Fld{hZmy(Sv7$TVU_cy)w7pxA7Pkfa zHm`=wY(!&SJ>ui`;=Q-u!PN>-eubN^zX5mNb|>z=^FG{s-L1HgO5>`_uEmp&JcG$k zy@b1NdjQv8ee2gvU1y(lfzr$+COe=`jQo-&GNqIL@@sM94Zp^ncifNr?tMhDd+&J| zx88CGuDtRZDx|A%|DAVZ-SVYS*H&WNnxzUdO0>Os zTaq%4x~QlG9ibp}sz&TszY4oHtj4bOtFd7EG;CbD5(oAsqRSgWrzeUHt2SZY%msM- zp?h)HEjQqyyKcu_H{XEUZ+j58-17#WoSuk#7gpiAjV4^O!-q4s`SEWXoj7x~6=%?X zvAi2+uNlC#n|koj_An-IG2`il1-SdQWw`#Hm+-3_9#A^DuDjwYCE*{v|9(93!2Nje zzWZ_8ZMTvBzs4I=-^c#_X{anKhq|R6<;B^^PN$UIz8YIMEMfG%5y|n};jqyAoJg4Z zx)!WlwFOJp?t;nH$$~1&APg!%5wOSvNq^T-R)V8+wnvpEUR)hV;f#&JF3ToF#75xr z4InI#X0+hqd5lIMQqu~Mo?d`XflBXT7Vr`D_6|~gbi-z|p|!OYm6es)xpOBruHS{X z-~0rVo_tApZZ&(++jAJhhmN7Adx+m9RECcdG6V~4bmSP{JA#4!Ll_%9rbL9FfAT4w ze)2hd{?RPVnXwE@=dDNb?hL4EHB@P8cHZctGEL7`aU$7 z2B5OI;O^{!g$}^g-;0o!%7B%B8P&}F`@Kjv0wr|dsgYw?+18AW`&cFxeTuw!pF*{b z1vX^^+A}smlfM&fc{|XOwH4~z9ca(l08`0!7%O)|*AR!MrVQkjA4FzF6^aZ2t+itoUcieg#fpQlnJ^m!_BUtXe<33zRrE%pYzvABy;klrayWV z*Z%5eTy^F3Cx#-Aci2l)n2Z<`g(A&fqEc?U@ph$E;*p1+!lRE&!h;Vyj(hKZ2)EvR z53XfUe)nzn;n~NZ!G>ik;WZjjUzCsiJ2qq0+%K^Bi%+nA={zLv+Kh_gT!j2C3=H&fnVmij*Z|*ZwI_4Elh+=MNT%_svF=l*^~lgRv9q!vsrXx%kk3Wr*O-4 zR}(7Nlm)t(1jb98gb=^SvdQ#g*f~6H*w`{&)}|mpC##U!>!lf$n)Ng`|h{{kKBJB9=P{D zrG4_+U)`dBB{?Y-N%0AAGO=-Vh;+B0rM?*2)+*SI%`804I3{xzcmx7rWE{xB(q-$h zc1t2v8yyS_uS}Gb(Q-kF+^JBQT;B4R|ps$bMa?5@(ZAx=kX=y16^Q-adly@nKZ^!DDn^_TiF~T5OY;b^y%uJN5ICA(H zp~4Ex=ZA)lpucZODIC%dGv%e1aqCTY;FAx&z{b_P5x+AXnaTO6EUbgE&4hs4%ZeE! z*rMp_?Li~KwtUSx6xTGNR@=kM&d5K;D6p#+EiMO~{7iSW4}G1(SWHKI)w&i;i*sXI zd>h_OD#gq3yD@XwG_0L56}mm^&{4D>{mnV(Y{@~mH3z|#Y((1fF=(qsuqg$dnk+>1 zS#asnP*IV9RhyS%+Tx{{vm*^3Zq34+JTu-(Y{sj*RhY899a)5#nGVLMEZK1cvF_v0 z5*S8ipQYzG(rfitkZQq}@=olmbzxhT9q(?cKwLAO7xS#e)`vwqvyf3|fi7|sWDj(f zUgQ>QQExk{^s&f7tjcme1dHsC&LRPeZ5aL_!Q&i7i`wxcSbmp-337aN3}c6w7877; zvk@$AL|B%k4!C_WrguMlokyrBN0mGhYjp!v%sUbsDW);(q_4#BK#KvmHJ)D&l+EIS$PwMDS0YcSH~ zM?*~|15(+j?*JCfn~S?|zk_hO1-IUK6CQo=Au5x*aLe_#;YI@F#$VlvTW`3NKzRgD zKKv}6dHe-D#enWn!a~%??YG@S1#%Z||Mfk%`>qFZ|9y|(f%_j*AoB1-Pbf{^0u@m! zG9mJst8c`O*WW=ka|7Y^0A8H*JXS4Sf}v;>Ly;hA3l1VTIS%P@+mNz*3j@V627HXD zC=2@sWb;A`3_80qC(hxFu^bO7eJs*>ueEn7f%5kN%c+m?!p{n2w8LWelj@8bWQllb zk7Nc(l;#Z$zz__;O-EueJ5g3zgPfW=)aZ_Sh9ExrhWDmUVrUnu@(XX{kw+)vfd?ny##`^jJr6yNM<-9k zeUHC{8}E1w*W7qNZoU0s+;P{#l$7@}^B%zDcR#`6t-G=JU;*}KtQk)zTO zBNJYaW8lzX^bb+Jh-#r}4ODoOU%=&8{R+>&GzH67t-*@b>#%UiGL)8Ap-rn-?z^Xd zh*0TAcOTVBn+Dr=?Lk3tDO3#S+x)|54Ie?VHHtPmU0wfpQ<6cPZD0)LEe`C>E62vH ze9TYD#j?USe3@&<>;e~ZEMYV`sd@}CG#fimYac?DxgQPA0W>&x?sgAa)h^U%VrX<8 zMOs@gHWXN}X_4O_M#;FgfR}+x=b3Z2VDt>D8=s0M#EOQ>_ zO_V`bZ`U!Zf?leZ9`sPX2P2HA1Dy;Q7~F=&(9XP2Q^8c(hG5}y0gk~lfB?T2=s1FK z7h&Y#*TE+p?(Se404t4?poD?!50wJoEhPnEc{YJo3b3Jo5On zc<7O*G3n_kc=4sTFlEYncx&n>c#*#F-n$=D?2(6`A&efueGff`XP$czAAdd_?|{NzJOAso3tv%g+gmeHMtjB?lZnWx6C@611O%ug~$pODF#K2UV ziX(8+-`l+%R59be(Cc(z<+3G^?Y^Ze;6%^Zw;tacEJlLG)7Q(3ia@WkqRDE5+UbGK z>LckQuv`5KT+}WP^bF?=dMi|P*v&R84pvt&@|UFsa*&vC0Q=(76pK&HLUL+8QZh@h zKdTH08Kp=os6)cRDx?-RV%LE(#OKyxUrsHO3mOrhRgH}NIvmWaMrKwqQc`oVYi}C% z?mviK$vN1tD-|25rZ(?P!c~vE5%>D|GJoPm0f9!F*IOSD5@bIH}?8!-3w{bJU6~N)qqY4NF0v%Kl0v4&b z0u+IRKxcU5D4{cq=GHd6{oV(-`@RR2b4-5WB^K((aUUzfocW93pjz<;LOdUxGXn#$ zh9(uZ?c9UnvI^8|BPeP2v0`^(S6M4^^$}&lp@#P*d(pU9>1|XECPtj?oqee57)Ax( z->4qKcKs-}l(rzPLWeqS7zH&J>?zPFw(Vd8(yFv*YO%rT>Veueh}`BVwpVzNV>%2i z!DI3rMtuxQl&Yr5C@(92&!wzXJA!cJFgj=vS#pPfi7G21jKIO?R%w2eEuWRusD}}x zqOtZIQPv5oq$=N0uSZeG7`CeY*uiT{a|}}5IFYIHDYNsvJij|cNA)9EzSr?xUv1n*`#_afRgia-=-le}l1H@HVoqz*EG<@+pO0v2y%d>)zf4GUOgm)r4G zFh;31NBKVAVjx13p-7Q3NcV@EM}8wK}0^*=S|J zscLCM8Ovxxiyb-!KozAb?4yd_xhWodcO=ul#9`0A{n)XOJ|`&!ds5P|J2@3`$@Fu{ z>DUvW!n&S|?R!#@n39eC>A6TsJ&2Ta`orW*2A743FH2&enUb7~_`Mm*?D;*r_9HR= z0Cw((M|@H$QVwJxyFix8O6GZ!P*GchMpcV4)j*|Ep{1n-7Wyoc(ZWE|1dG#+RzB9L z+MqEp5Mv@cX4-pQZmc3$^e4a~EtfwiSZtv#c)JGa zSV?^^DHrL6nK|wtP@L8PBl!ql?|_Y&WcEj4)HhJ z)zu?4D;voNGLf2|iOlRg6qi=;UM-3u8KuV(fcQhK5aB2e9T}y1IfhtQ55lods!NE)9Ax~=V6o>dr<8d#=1%urtYc1vs=rt$uI&2SkT)?pmH99 zo+{Bv2O|Rq+_In`m0^$&@8}?07@hj5N<2R1BUOt;s>%QgLc`Z{ocG7id;1aUIIQ#^ z%7#wOEC=~26WR%#dO|US;LOqlkVQ4rKsDscUPZ=VCeXupU|bBiN<(VrQ!d+v+X&WLqlMW>-Pa z`emS^aSOE*{rT=Pk!ld;<-{yi&?}eJL zH_`7k>zz=W`M23aKV(N!y9F%_9&5A~G-z##uhSan_vqtVHBM;h$Fw#->zETN)40jX z$|m|kt2vDJRtIWT1~h4`%Igg*v(0T*wDVe8+HGj3pEEiM4c?cBkg&Kz3M2&1PWtqK zpME(g10fDk$#k-gbkNt)#|1lCk7QbjOp@et88G4YVAb-a(6`HyE@L>tO#4B>B5mu= zXb(cHkRe|;9DHu2qZOb8s8pi7DS5O~C>X~6GE1|(?vWZr$a-fl~HxpV7gjH)R)e|MF zMjt?n#)~GMkDvANT!b1wW767T)YwpOqB1cs(^)_?4k{{UgqhdqB21z(Yo3Yg5A?#t zYxXb{QfAL9D?N8ZHUska55v*Hg2*V@=VJx%4WlzkC(d+|T?xfv9fOEOS(rnNh<%K- zS)f&+FiOo9)ab&qu?sHQy$fy_@(Iq3h`iBN7W&04L zbx@HAEC#4V1Que$BV&s74h-@7dlV3e+7K`ZR6@~C^i!$GX9Pmx+@hT_nT+S7x)GCe z%J&9`>6rO>d4F*Di1H|qsc&k*#x2{ComYUo3fTr#hcA_GrtEXEGoaYj;f?)-kcXG8&uB}|9~nZ8~+3)!lGVCkYF=^`9Ds7S(M zd>-tinxVPH2$yK*Q8)>7X(sc>Siz!03>Ks*E&_G*5FAXP+8~t?1B2$sQ5a-L!p>tb z$tFoMNaIJae6QoX!E%^^)fmgYYM@Q|`*pKQqIph=MD?io`iN%~o*WzJKKUQp%SnI%O2F5}G8Sea=vS5pYM}pUXf@M!F=*D%j}a_7HG^7$MXM9A5I%JDjr2KM zdjL8|0B!U;YJ(Fk46vImF0>eE^nV)qwRTwrzSRa5L8Brtni>4I@Hbk`Jh#b1pX{YV zBG{VfBh@AaQYxOiP49x$#o(Pmu|{@?l;!{Z4EzPeOgpP50w=Fm`mDTs9^<_k7zE1x zH7*%G&$JB^Ist;jL6v8tKbJ|y9+?m1@ty!ns{)q83`|F*Ab-p8y}=@t$`KfZ-!q7i z{}9YlF=bK`E4IvPb@M$NGepk|)iL__d-#2KKXg7&@|1zx~l{`-!0iw}_s8~Xbx0JYa2qT=p z2B7vtO{j|jb-F<`8i!G%A4FWf0dMWE$LvxUmQ;uE>ZUU6%eGAY zVN@%7o%0&3K3UzC!2luC6&prR7XidFE*-iuN6YB#R+`T2R48_dbO{hMD{P?WN5%4e zkKd%j2*!?$Pb3`&OGxP#bGT%+V&)?Q6MLkW>S731& zSt|4dOuMpQyN3xx$mo4&Ay8@vmu7;bnlKQkloJLjepld9Cc9A*D)n?!D)%62%u!VF zd(F(a=4Lll3lp80sy23`+SGw6TBE%SEtUw0@1;ueDNxa}WE!bRjIItC9nxV%Qp+lz zEWK7I<+q20nc#4S##p!xE0MUg$ukgV=5(_l@}3wqOWQ6XPq>WG(Z~c+W?qM^tHw0r z=b5jt#&{m-{ADzyu>_EwUx#+yzuM$Sb&~;gEe0GoScLs)2VrEP3;09mB0OY*V{dOS zojz3sEkq|TV3B^5Xh*m5ICOYa0feXvQ6%!WKthy?07k$epA%Sg5Fi2zQ8WER!wQ51 zF!H*non8etqL7A_@5pPuU|3Ny4b3X-*cFG8@=B(alNDGZ%Lwx}z-Y~k?A$6wmAp@a z#S@}p;SI-_SY0d=VMhH;mO(5zU_h}8tQ7p)G|c=QLWN-vn~ek59|F>X!25BHI9L^9 z1sua(^&nO^cjKjf_1I*g>M+u2xB;_)`DN^Y-Nwj@0ZV{oEks8YAP8hPKqnoAmtgTx zy*OhG40ug;UYqRAVy994D;A?;k?;9Md9yMJSi&)>Z2ii1(GDstJIyJ}^+<}AW4g*bwp|=xKb}CUP)oy?%>4*;SyV496Eks5|fSaV3{$+2n|AoKC8_!fNCuRXa>GD7PkVGa=iuBI{HD`v#E{e zcN{`J)leG)R24zhW{ff@mR)>@VfK!p-F+C^$Z@CxqtHY~VW+>cQR&I9uU!nV!VH{^ z1hOo>-yYb+r!kPSPz<V!OxU>k;P2hQESJ>QVo(C zT}U|ChJ)n}f~Xt&OC8wR;K4qsmpu(mWE&Xq+DUU=l)vfc^AOCG88#Lw*>>2<$X9k5 zv=JoM@Nu*_hM2kiDCh5%+lJ80j8L;MRt1hD%FLpVK`rmoNG0FKx{<>ix z&PoEcidIeq)FzQKqwJ<;3-%w#gW2h)O4IRqHV)<$BQ9Y-;*(O~@dYtNNQkNsSoDd* zKVbrd&fb0n9HK@?hEMmA?;k^k${Q3KJ3?F{Trv0zMJ zsenc7N3eXKLt5*H2^MAw2n}r;l}cc|*($P<+f#T?9uu7HK%(7Li4WU@yjnsNC z(ptl)q60n1ATZO(`bCe|$oiL~_9=r$>g#SRFN(E~%IgN~Pep@TkwWkPn2H8FZL5H3b47%i{U=#N70iow8O)XM0; z**u7xx)9Q8LP&4vL3~{V*;M7(rbF0PYQ^p{EArYpkk#Tx6~C9!Wqb&baD!x9LmH9%l zJ1jvXL%!YPo%cq~xMDeW?DVDg`zsb!DtGiKqh}^46J}?%5%G;~WU4!`uiAw?LmzT= zy;ym$2}vz3I6QPNbi7VF0U0Z8w358C!z4{(k^Q78>-3a~1WRRm0Lyk}E9)~AQ5vSz zIO&-c^IGRd&owD8=+WIoMjbVdi9BN;_N&5JoLa9mrReR$*j{8JR0o-n9hje1jS?0B9i1EV8ii^n_Ap&`R~wMr zU_~Pxqt`o(<`yfG59FfFU_(}3DYos7M|pJvatlhSSTf*r`;^Y}FfB@j(%C)k@D*SX z1_B0oE})T-V4_e2Bm$NZRxW846QBre6y-s1$ouknd6aX@uw#LW^t&87GNzdPEuWeA zo;(-GNJqa|ld27ywr)peb}ov`3z3)9!T|`+hTbakQhM3Pw z)#sL#1-e0>fK=;oY-{R9TpbH+Y8@y*p{Fe=F=J_o3u`JP*xSbFlu&U|*;JWFP|LJl zQ|~|tK_0d9oJOh(*B~N{P@^HL2`ZL0V;C(a=Ba;BiO@<|mMW-HOBwK_x402sZ9!_2 z7lp8K4eN)1P;*jVtd<;@tUgj@@1~*lU zgLTHz*#~2|2gYCz9dADzVU{iCwVma`BmBcN<&Z)<) z!g}m2ZXjIrDAEP7x6Fh&Jm>UHg*Z^%gchrhU}L?q_tAe+QF#bT!ev*H9ZRw_*wGNg zYSycr&3=>;BpLM{q~~doQ)W>H&6MbSS^uO7pGrPVwL`Gz{X+^|^n|!Q(8W6FIsuk( z#iFc4eVXGt!J^gMU?u`xGGZXqr;Lj7hba|V(Ug%ijOMJ2D)hc1(72CdWsL(>j09yt zxOqiB%rEvU3&hPUvSC%7QyIOZVHj@=4zUtR1<}5 zVN73l00&y4D6kw>GUvn1#aLbFz_fjh*isW^6aYrOW7xxJ;B{u$;!*>O>41tEA(UB0 zk>1pU89SJ>D%q$C;mh=Tl#}8{7BDRpi^(3QO6mMsv6#FAj6x1U&nUQs09ck( zhBDVMns^^&Ja_#tu(ZO2SGHthTT2+_l-R2^{aB&yK?WnF8L29iYWtKv6$>K=op%(i zOb_}=q#Ecj)efi_S*u-P|w0Fh>@ z@n)?~MP(eKnwV(D60k^f*D%2_{@VDX3^kSxco``sOWN=J$YT4*aSv$u6C^fd-f%uv89#2(SwASutE4$5Ew^ppZ(}dIVtBBd*DfG*dU0 z7ikEpDB9@5Dp&?HDOd75$M8mu1F2M*YL@ja4FLuKR%K?rOsb2pe9OXx6D9*Wq~Arh zybTIiXfh#In!=W? z*(x_o%wOM$=1j)4SX-dQ2Z_a)U#3AF&$OUQkL>UmDp>D#);Z9^(`#6!8d&zWG+FU( zd^VQUyRf*IkZ-&T9;vC~K#$u?``}Jd9OUL42Olh9-vtYNs1| zcLXiQAX+Uw^u@=O_3XBkIFarIYIx79nj&~NxdEkoy@0>b%Jd>nu;pMYl@J3lpR~}( zI)8_#)OauS>216(3l)r$!IIU=0Bpm$@jjNZ!`~k)dXocIMqr{?WG|5*6J4M(zLdov zBMC-nbf7j??#i|q-cdZqzV>SVf7qp(UVnvbEY60WgD1q7dA? zc*4a%xM&$!w%dD1V1CEgi4tuG7Va)ap0*c-mLu3$Y{!@TNbrUZ%-Y|IB{^0sN;6=2 zmKD1UgZ%9RJhdVLb26K;k5aKnKTO9qjOp7eu&mmHJ?2ALL3z2V!h&k|G1TcvW@|th z1!kwTl^OIlUq6XG$VlWcqm(h|36d4b709vpQ+R_@tq7ozKIV}PaQ6>TyQ9<$<>0=SF$fz@clz>QnqqSX&oqP78svBTnK)nrWrhNk~zSW0p*CFhq;$2&A!6qusG|M1rSi$O9ZeL8*V^&i?)@ue> z>6;Nx2jrxau?GhrLr{MN%YVl4?O>7Bhh=FISEuyTcEQp$3|;gv%1s^cFnEy8`!Ms- z&R}m#xfz>Vy;#*~$7+=m%NndGWVtJ*Z`wwsTF*SMV;RX~(72gkSzO+Vk20I^X*L5v z?-7{zSy{U;Ec>~1F@WwHVma;|2TKRR5ETfuFtG1(zL3Wj%3XO^*$3mrD9mdQ|J*rJ6G+XV^F-TRJ!wOi` zjw7Hr!OAQhK8~-){1Q7p%WB8;93AQz+{*q!I;KTNOSb}+VjWcp;p`y9_3myM>9nko z5jdz|q$x~B#!0`|%B7157AkQn7A4olB;QVbd?#2O?jW3=2t3SGKXXtvtP-$DQ<%%& z3sblk&R$0Uq+KP$%b7VXIKZ3A3IX$}ShlE#QO!(W-%NSP%1y;anI)sg`jvuWvd5IB zFf9|M%@l#kB*XWjs3OUW+as8^CKZ{g2&z2C5l`>4CeMT%+cE4W)l+ng42nGXbVoH| z;lu}f%kbvbgV}Az0X8UL8DmCuq0Q)mj#AR- z2*Ko%5g##TQYUntUT8%Q(m8F&tUKm1&Edh%!7*SwkG~1MZ69J2SW19X zASH1xvXc{FQZ+%{(1e`aGH9v%bgZcR8=WX~^n<<}l?)m-t9eVnNvoK_=ZXmx=y)tkN@fB8B z7$ov-u!_Uz<9S&|HZ<6=v5`?f%Z`jRQ#S1*#H_M`VWgWt8KB89^ds;Ra{d7G*(XhO zeQ^_8}WW(E#BNy!N59*wT%%>S(A+oB`*4h zeq=WHpoA*An5tx3ITb-;03W3{Xk0E>sjiHk4j5VQ+Fb)^CMefsw_;PJ4f`lfmRH)bq||~s`mR#?=6uTt zHZxGKq7u@Djv>%}oaJ~}>AaUwVRn{x3H;q1G6<zW0K{^*kZsThtv10WchO_4grPL6rwOv?JVZweoi~W>fi%NrtGag3{ zW!HjY8&=fVl(uw%kcqOk%^hXt^uq3zA-&8PN-wRWhl-{bjg0PVnPH!=PQlJ16H=NZ z*j!}8(u{V*5h|+-?buuyKtfAD!BT?-d3sDwt;d2K6%LsCP;MI`kvovm)PavS6=G4L z3A3`)cz0JJ6@w4;l#3ewQ353htE><}O>LLa5G=G7N^L9Uw|qq9$C=wZdEHDs&2nYtFe0BMrD@%v(LY%%)}L#2#BP^ zUopZ+REvN_&LtiGaxPIU0ws;!h~0bRkzZJXtgLjbTDA!BR4h&9rKl(>K~i!S8W||4 zBV&~EegY!~4Ixuxh+uc60rgZe=}ZgRn?8}{WPX8Dfl4M7@AQ;L#5s>5o|SwH%StZ4 zx2{Z!99>Y^f|fxc49ph?BP%~6TE;aBSY+)rX=*EM3s9{ZQ0X}gH3Q&HjAHXWOndo# zp0AOwC9|B)OK(J>_b6tn1`tnYQ_KX|!HbMn`Ow}m1~V&`vO@KbVEI9h?*dCWa)f?{ z!E6_m0)tT(6-%3^3kR!B$ZzrDpac?44pcDD*4LYmOfXb4f!9#6e3Vv>!r&NE7+kDo zP?S2@--MHR5Tzq0~K>OK^hkD`c? zY6YXuoCYseGpN~bVZhbk$Ln$Bn3Jc&)HNCWOfTxClU*HCz|vrsX5(S3t@h$eo?B(N zLF;zI>|-G7j8Jj(poKxOfMr*i8A;L)#rxXMpnpl36%`C}_mQIFOViXn%1~n&73S#} zRYrvgRAfU(>BQGKI}v5Nw42?^#%j8DHI5x&9vvH{j~G2|`Tb6?NLzgW&{4|%ekNoG z9HgR~RFjU%KAltFf!XfTVIe_7$5^M_Jb7IfgAoYHTfTMjIo2 zlcNKsP!}Q70ohzeMukZ~i{3guGOSfPU}?=%FloiD*k43iX4hjEEwQ)_*-cJt$*9Gu zq*83mXvMPlY9y1)8`5g9JT4FG5{j`iy#^^o8k93(cO0bDWyY5nx_M0+l(h%Ypbev) zzo&6{U~u_i@`PZfGBXo)X5OQX5>WP=aWG0Ls57Fx)r}&R8(9QO0lzOJPRh)kh*6E{ zJOmCEN~LcUWxf$CNU6f^QWYKRVOXeGa#|fouC*hNDlDbaf>J`q!-%P^-im_E-B8u$ zpfEcgDM{Ormbw@53A>STFblz06fr7?4h1ZS2$*rz(nAxl$ov)oh%{d*iiHpm^&yZM zUkmK;*Fcb&^&frmIrb(bAuA_encVow>u)HKknjB#Sdy4!giU5H%=Rc;(POAkhmcyPM|Qm#2Wt7)!ivy! z9J%@^(py5vu8Lt#h6ybU7u%_1<5*788a#wdFIowMHo_vm)kSC0tt{&4CZK(!OVm4p zAx50C9+WFG1lfXsae=Z?S~e9+UcC$XO#$p?g{`w4LbYW8aRpiw@Ommt-AJu6K^+*u z!aNPO^E%R)H~T8}RLO4mdS#O^Sz}7dxpc}Op^biR0XmqFwEN3Y`yavby$&gNV&67F z((7V9bTWtt^(Zs%BfW=Nt_IMg3!&LSAJJe&d#jVd)^V5_lILKgY!L|%6Pb$Wm%xY}RZA5yr6SFs_U~ODJb|sf1KD8QI1#PHp5202c zLt3pByYf|N(aZc92Ok}%Yqc<4+^Cj5Tw4dSYmL~HRzd&cMFM{#soH|(;8Dbt8n8CC z7J2RTSp;x9rM_&H?hACm;SBO#0t~Qw2$}(9f@Mv!2H^lnJjVQyT|NnxiG2IE<2%73 zUzU#F?mk(Pqz^7Xl?!vuN8I~mc5C;L0vD;^G8s1i&2Hq^J5k4iRZoYK&4{4V%EIUyLn$+*#nF#CW{@lc zBVf@xeK5L%FuFp@5(p+&3|3zc!7`{gGqX&T439wV8AOw-U)hgC+9-{Ts+&yA4Bo5! z-NMMZh7nPra|q3JI@-=L*hu^~I;T2D5cR$zsJ6=FBc>K<1aU5(NBRs*om? z8ZGK}1qcEOnd~TiE|Q-vuV0zyXfRuqb-+Z`h}se5A|R1-h+>iF0w)2B{EjrW1ql|5 z-G#*DR2<04hFRSLbzM2EnnpPFDm2wpprD`xHaGJ(K<7*_G&=?ej$W$2K4_vNO0!sv z{|HLx@HK8I7NQzq-9?l45YuV|`Nm;o2S)~LXkkURvV6H?qg2dC(aAK95#n7T0zd|k z$ijkj3_<3H?4_c1FrS#tb>;z({Yu+8vk483VU$Uk;QMVMsvcfPAqBX!fs z+W1@c7y&{bXJZ-g2ARh!&$7CP$ICj*&shi|my2*=xfb}jJp<6286Z;yHSkeIHB;>! zLSmy6h4wxau^wc!$}s63^@(=>@w+jcTy!JQRk=5=;BY!Wa#f^guk}8`$ zbnaf%sr+bRL9S*&v{k>fX^bS*2lJa&I1j<9nbT=zkm=_yn1~>_e z7^R~-HmF!s+U=}V3w9r6n{0>2Qstu_X{;VTllWvh0DZmqRBJk;$AL$}H8OL@F#KKL25aB1hq&W0d_q9Q=;I zlfYylwfG0%AcQ(tSo^!^^q9GBse*Pf;MV z=FG=i@4k;ur_DflRjmS<&0BXUs}!dm$i&Ju>#;8}Sy>}Yn$Dz8M!+F35fBMb1V+*% zCg+yE7Ws_4CVecTSmNRnm2>3m+l}n_ZOBif%1YdVgk2kumY4{q(aXH=M2G;0@xEo@ zKW~gtBGXAg!1Bv$CQO3InYPEEkNIF9U^(jTMbE%7bbH1y6b5<-q6j0@5MkBurS5LyRngVTrbwM|AX&7@ZB%x|0s1oB7a1=i+b@O5Rc48yyedvq)4c=j}WO zKP#J)-;wL<>K#Lj=kvNF@OfkCk+~}bM}R?vk4|aA{NZB=(s>1$ud*kR+}Dp_`NIzB z{s90F|L_$PA9JcjD0@1OqJ!X$$$EQXs@6!4GH4?xkS9#M{k^cp!q7QA3|c#==tq== zM}zJGbTh943_?3uUuE*PpY=0L1tLo`x#>KWK^W4^85%-_YDI>X%N{VYE}64)fKWQj zAn=efTFT3yP|QsqAWdNUKnyz8eX}nLn=htpE#hLOHpx1K&M2&AKWv1f!5*e^a-)&{ ztkD!gy*`L~s;x#UWHptuEKOBGAe7eY7*x|oSs6U5EU0NTpsG#>HGQGpAuTx}Wr5l@ zgCA{LkFunTgZ@&cX_)9^^wtQp7Wz|?Q_b_(>7R}C$dQI3IOx{Hp|LnmwTgAf}(|bYdZN(AjrL6BxZ>cfT}u4O6KQE&>)hd}+oKMJb*33zsa1-ekq5W|o zM~*8^i!$oYONAkkVMG+4l|Z06@p?v}^4qB(q;oa~7b``G=_POpdZ>njJ#a9M+pR9X zC!1;=g@gGK={N?bJ4)DfGZ2uxp~@g|JXFUXIj@hOb26eOU@VN#to8wdRDvTY@OQGJ z$sReLuH*2>=r|aqc|B2O4-lDs9U&-w1j`S5O!$>=1B;(|8f2b_f?Wz&WS@H8#$?Wt7hwr{qP;NEp+{u(1(`+9C|#Cx2~%l!U7{*vNuptvmtMjl%6w$Ga(Bb! z>4As-%qx4i_&SyM^b9byZmM%$gG{*fP|=FHJcDrX^Ey9+U|*PZnV<3SvnCg8_8?3K z`V0caV)8M_a}x}Nfh~-B0-{#uLz6j*%2p4mRX#)c62O}zh-a{Grm3VGz}ds^g$X|f)HXLP76~yLc6=*XzU`11m$J(4#1^+Mvkq3Bn((Mcb4@ww%8O82R;WDIR}`a+4)S!C zmyvQ>%iJG-T8rN$QSw&B5_fMy(w^-|j@zNw{=GYqxM$mGZU6rL%8qgI@$uNbd$;l^ z`^nqwb_@;CX`i^yAIfBLNm;H%md2My*`L0;x*Ca$`eh4US%6aZVv!Y&zh2gb&t-2G z*dJr_Rw@I&Q$%a$!u_Fpg>jd=h4_m$ly-+S*pBqStY+O%m(KFar|PoJ(d zJIIp!^1E_9a;}NLC(bXwD<=EG`2Bt~H8m;clD!_}cP94F7nA4R-QCJH%lE&peKWnj zY5idrEb2NcrhVACZYee_or5ha7hv~><=DGHer#n`=Z3F0;{#l9`e zk+6Lgl6J1a{#|R4vU?pe_HD%eovV=^w-MRNJCV9~Gg7JGw5l3bLPlXqwG_8GzBRGH zR7Fnu63em*s$#U=VJMvu4 zE1(dNO#nn-ClHf!he9FcdQUDBV)9&G`(xP2X>}^Yu_280Mc^^EqPZd;M_D+*P^$>$CP2&{1GgtKPKw&M4eCpFf?Qbgom{@A8>%H*u=pOw0)fDfUAj;=m^k ziNGaI1uT2^>`^uy5}-(?i=q(~Aek>fk>}#<I01T@9I{{HbpEHDyv5AnIQKTCc}xu%^26*(rrG69z#zI6RJ zI40_%bPA6#?ZlUyR6oak%W3T7&;BXwPkl@js6Wsq%JQj>@8kcz6D+5!OeY_wO6=du zq;Q{Q_TE|Xi}J<0vay?$FF|4@hg?!+;Xk!rOXDJdyRvy(JGi8B|# zOhgvq@C7InN<*H@>Z1n^96(l9meTZ9QBk4H;unC3Vwp5)65f6HU8U*o^UpuWk|j%& zW;0PC;*bRz0ugbba$W(6{FW#mxrPao&x>4^?@oMvqKusCm?$%UsQtc&T+0MtewXi0 zlq!7Vq;Y5V+70uSTKTPqS}81%ju7k>#~drlR7y8nNiv|>+2~^z9)h0@8~oB zi1y9$`c0Fvcsi5v`h8646g`a{AK^8g&UlSd&c7KvO!Zo6__oeHWrEM14&3#fVdv^c6KBhp32; zKKckxKmD}QB=*4vA7JX#sd(w7m#}HmCcOIUt4bT{qD70aZrwTsL;@J6)2V=I0xSX* z0hs)TfJ9ywz=+9nxt_AJGNrjqVE0|esq*aiv2Ui=H%$gEOgQTahb?ojPJZolCZ9i@ zee37>8}d67?;NF5J90$&sRS(l@sN+6Y!m1Eb3Y^x|2rQO`S_=@|4^`gUpwiLyqKtS z-}m^v!Sc-?J=JS}%;RJyb1M73$LX&BRKNGfwh4tG&*c!MAWdNc0co-l2QLm>9w!uw zIQR+B$a87>lIH>>Y2FeLN%L1}X(<*jUX1ecas?vNCn9P{l#HDFg%@5>`f(=CEstWN zQsjJcUTI>J_a+oeAP`W#FMTZXJKsG1*yZ7y>Ge%J+4;+JS;j_2vMEbW@NaScr?ZLg zew%#_60uW!|C`@9c5FNf{N^FAoNN={_;Wv`{7XK5+c8m|zRkXQ$ZKDhjT64>hqT}1 z{Hg7m<>fz^eCB)DasJ5Z>^~H|ZO;tc6qtyfm0uwP&7y<&5$@I0d zndoNLmou|Nz0Y~qwZ9=|!HyhuLEA&(ROWTO84mp@KfrcSbx`-4tp zCzsnlz>Xi6e%aF)OXTV7R6cUT|B3yf$M^5N|1WsRbxkeLq|Ecd|A_K+gPjtRZ zBq4{4_7b2-pNpsjap(dSQ4ykK1OO8wx&#~(qsHVMqG|*-a?XiSWD}neC``ad9tBKd z0v7q6oL5GS$?$6#jwqwlq_0M!(J0p?zb}9hh{^eWm$d#tj#E|UlkHTM`L~ScIGu@1 z5j!Tvzon?0WIO|gj~>I&C_&2S{KXTn`E50I@>hR6esg?RxjEU_oXRHZ`N^;Sryi$p z_P=GPDwBUqQ%c8!cAS^17Mk;!v8r2$iUp(WQQ0Gc@DZ|MUP zz{vY2AOE?Kk@Wc5F0BkE-0HTj+>8R^eC`S&N9DddoA6tyDl zvnRt*o=-H5o&5R_cbuxS{2n&p?f*bK87LEW@-O@dmjAyWC+GHmNBd!pAHnip_z(yE zUD3Zd@CgWg)BYHe_M6AV?|s{GG89kuxj)u1;k5r$_HD0z^Ein`ihcVhe?0y>9Vh4d zpThpD9zTNRPkemS`F|S_CSI4v{~RSS4vCW=zwMZS$$!>$oqU|Cvi)b;x4rt!LsI5s z`}R-%c>H%dPR{i|h5c7O{s>?>Rb#+^C;QVLKZ51I`*G-m$zTiVYZ8 + + 3 + + rt-thread + + ARM + + 1 + + C-SPY + 2 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + + 0 + + C-SPY + 2 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 0 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 0 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 0 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 0 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 0 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 0 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 0 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/project.ewp b/bsp/stm32/stm32f413-st-nucleo/project.ewp new file mode 100644 index 0000000000..1f62f5577d --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.ewp @@ -0,0 +1,2256 @@ + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Kernel + + $PROJ_DIR$\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\src\device.c + + + $PROJ_DIR$\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\..\src\signal.c + + + $PROJ_DIR$\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\src\timer.c + + + + Applications + + $PROJ_DIR$\applications\main.c + + + + Drivers + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\board\CubeMX_Config\Src\stm32f4xx_hal_msp.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\iar\startup_stm32f413xx.s + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c + + + + cpu + + $PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\context_iar.S + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c + + + $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\completion.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c + + + + finsh + + $PROJ_DIR$\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\..\components\finsh\msh.c + + + + libc + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\time.c + + + + STM32_HAL + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + + + $PROJ_DIR$\..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/project.eww b/bsp/stm32/stm32f413-st-nucleo/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/project.uvgui.19827 b/bsp/stm32/stm32f413-st-nucleo/project.uvgui.19827 new file mode 100644 index 0000000000..14130db322 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.uvgui.19827 @@ -0,0 +1,1319 @@ + + + + -3.1 + +

### uVision Project, (C) Keil Software
+ + + + + + 38003 + Registers + 115 92 + + + 346 + Code Coverage + 725 160 + + + 204 + Performance Analyzer + 885 + + + + + + 1506 + Symbols + + 133 133 133 + + + 1936 + Watch 1 + + 133 133 133 + + + 1937 + Watch 2 + + 133 133 133 + + + 1935 + Call Stack + Locals + + 133 133 133 + + + 2506 + Trace Data + + 75 135 130 95 70 230 200 + + + + + + 1 + 1 + 0 + + + + + + + 44 + 2 + 3 + + -1 + -1 + + + -1 + -1 + + + 154 + 368 + 1520 + 747 + + + + 0 + + 268 + 01000000040000000100000001000000010000000100000000000000020000000000000001000000010000000000000028000000280000000100000001000000000000000100000048483A5C52542D5468726561645C72742D7468726561645C6273705C73746D33325C73746D3332663431332D73742D6E75636C656F5C6170706C69636174696F6E735C6D61696E2E6300000000066D61696E2E6300000000FFDC7800FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000DD000000660000000006000025030000 + + + + 0 + Build + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + DD0000004F000000F0050000EC000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1005 + 1005 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000D6000000F5020000 + + + 16 + 080000001F000000E100000093020000 + + + + 109 + 109 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000D6000000F5020000 + + + 16 + 080000001F000000E100000093020000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000061020000F0050000FE020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000061020000F0050000EA020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 6304000066000000ED050000FA000000 + + + 16 + 080000001F00000098010000AF010000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + DD000000630000005C040000EC000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 0300000064020000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 1936 + 1936 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 1938 + 1938 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000064020000ED050000D1020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 195 + 195 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000D6000000F5020000 + + + 16 + 080000001F000000E100000093020000 + + + + 196 + 196 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000D6000000F5020000 + + + 16 + 080000001F000000E100000093020000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 0000000075020000F0050000FE020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 000000004D020000F0050000FE020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000078020000ED050000E5020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + DD00000063000000F0050000EC000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + E00000006600000059040000D3000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 600400004F000000F00500005D020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 600400004F000000F00500005D020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + E00000006600000059040000D3000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + E00000006600000059040000D3000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + E00000006600000059040000D3000000 + + + 16 + 080000001F00000000030000BC000000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6304000066000000ED050000E5020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 6004000063000000F0050000FE020000 + + + 16 + 080000001F00000098010000AF010000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000D6000000E5020000 + + + 16 + 080000001F000000E100000093020000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000075020000F0050000FE020000 + + + 16 + 080000001F00000000030000BC000000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 0000000000000000B70300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000000E0300000006000021030000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 1 + + 16 + 000000001C0000009201000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 2 + + 16 + 00000000380000006F02000054000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2649 + 000000000D000000000000000020000000000000FFFFFFFFFFFFFFFFDD000000EC000000F0050000F0000000000000000100001004000000010000000000000000000000FFFFFFFF06000000CB00000057010000CC000000F08B00005A01000079070000FFFF02000B004354616262656450616E650020000000000000080000001F00000000030000BC000000DD0000004F000000F0050000EC0000000000000040280046060000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF5C0400004F00000060040000FE02000000000000020000100400000001000000000000000000000000000000000000000000000001000000FFFFFFFF16000000E20500002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000001800040000000000000080000001F00000098010000AF010000600400004F000000F0050000FE0200000000000040410046160000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000001000000000000000000000001000000FFFFFFFF00000000C400000090010000C80000000000000001000000040000000000000000000000000000000000000001000000CA090000CB09000002000000000000000000000002000000FFFFFFFF6004000057010000F00500005B01000000000000010000000400000000000000000000000000000000000000000000000000000003000000FFFFFFFFE2050000CA090000CB09000001000000CB09000001000000CA09000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFFD90000004F000000DD0000000E030000010000000200001004000000010000000000000000000000FFFFFFFF05000000ED0300006D000000C3000000C40000007394000001800010000001000000080000001F000000E100000093020000000000004F000000D90000000E0300000000000040140056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273000000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF0000000049020000F00500004D02000000000000010000100400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0C0000008F07000093070000940700009507000096070000900700009107000092070000B9050000BA050000BB050000BC05000001800040000000000000080000001F00000098010000AF010000000000004D020000F0050000FE02000000000000404100460C0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF1452756E2054696D6520456E7669726F6E6D656E74000000009207000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000003000000000000000000000003000000FFFFFFFFF80200004D020000FC020000FE02000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF000000005D020000F005000061020000000000000100001004000000010000000000000000000000FFFFFFFF03000000C5000000C70000007794000001800080000000000000080000001F00000000030000BC0000000000000061020000F0050000FE0200000000000040820046030000000C4275696C64204F757470757401000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000000000000000000 + + + 59392 + File + + 2251 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000004000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE8030000000000000000000000000000000000000000000000010000000100000096000000020020500000000013424154485F54454D505F50524F42455F45525296000000000000000D000E5052455F5357495443485F4552521648454154494E475F54454D505F50524F42455F4552521148454154494E475F54454D505F4F5645521948454154494E475F54454D505F465245455A494E475F50524F0C424154485F54494D454F55540754534B5F4552520746554E5F45525209454D4245525F45525207454C455F4552520E424154485F54454D505F4F56455208464952455F455252043078453013424154485F54454D505F50524F42455F45525200000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000020000001500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E4C010000020001001A0000000F50726F6A6563742057696E646F7773000000000000000000000000010000000100000000000000000000000100000008002880DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002880DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002880E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002880E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000288018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000028800000000000000400FFFFFFFF00000000000000000000000000010000000100000000000000000000000100000000002880D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002880E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65FF7F0000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 575 + 00200000010000000D00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E00000000000000000000000000000000010000000100000001809E8A0000000004001F0000000000000000000000000000000001000000010000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000972742D746872656164960000000000000001000972742D746872656164000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A0000000004002400000000000000000000000000000000010000000100000000000000054275696C64FF7F0000 + + + 478 + 0D00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 478 + 0D00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A00000000000009000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2220 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000002001380D88B000000000000310000000757617463682031000000000000000000000000010000000100000000000000000000000100000000001380D98B0000000000003100000007576174636820320000000000000000000000000100000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000084D656D6F72792031000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000084D656D6F72792032000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000084D656D6F72792033000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000084D656D6F727920340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000755415254202331000000000000000000000000010000000100000000000000000000000100000000001380940700000000000033000000075541525420233200000000000000000000000001000000010000000000000000000000010000000000138095070000000000003300000007554152542023330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000000E49544D2F525441205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380658A000000000000340000000E4C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E00000014506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000D436F646520436F76657261676500000000000000000000000001000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000000000000100000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000138001890000000000003600000007546F6F6C626F7800000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000000000000100000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000000000000100000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F720100000000000000000000000100000001000000000000000000000001000000000000000000054465627567FF7F0000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 1536 + 864 + + + + + + + + 1 + 0 + + 100 + 0 + + applications\main.c + 0 + 1 + 1 + 1 + + + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/project.uvopt b/bsp/stm32/stm32f413-st-nucleo/project.uvopt new file mode 100644 index 0000000000..68d5d3a75c --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.uvopt @@ -0,0 +1,1129 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + -MPU -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 7 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + JL2CM3 + -U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 + + + 0 + UL2CM3 + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + + + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + 0 + + + + + + + + Kernel + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\signal.c + signal.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Applications + 1 + 0 + 0 + 0 + + 2 + 15 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 3 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + board\board.c + board.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + board\CubeMX_Config\Src\stm32f4xx_hal_msp.c + stm32f4xx_hal_msp.c + 0 + 0 + + + 3 + 18 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f413xx.s + startup_stm32f413xx.s + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart.c + drv_usart.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + cpu + 0 + 0 + 0 + 0 + + 4 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 4 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + cpuport.c + 0 + 0 + + + 4 + 26 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 5 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 5 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 5 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 5 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + + + finsh + 0 + 0 + 0 + 0 + + 6 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + 6 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + STM32_HAL + 0 + 0 + 0 + 0 + + 8 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + system_stm32f4xx.c + 0 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + stm32f4xx_hal.c + 0 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c + stm32f4xx_hal_cec.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + stm32f4xx_hal_cortex.c + 0 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + stm32f4xx_hal_crc.c + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c + stm32f4xx_hal_cryp.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c + stm32f4xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + stm32f4xx_hal_dma.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + stm32f4xx_hal_dma_ex.c + 0 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + stm32f4xx_hal_pwr.c + 0 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + stm32f4xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + stm32f4xx_hal_rcc.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + stm32f4xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 53 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c + stm32f4xx_hal_rng.c + 0 + 0 + + + 8 + 54 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + stm32f4xx_hal_gpio.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + stm32f4xx_hal_uart.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c + stm32f4xx_hal_usart.c + 0 + 0 + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/project.uvoptx b/bsp/stm32/stm32f413-st-nucleo/project.uvoptx new file mode 100644 index 0000000000..0253b47b87 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.uvoptx @@ -0,0 +1,944 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U-O206 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1536.FLM -FS08000000 -FL0180000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F4xx_1536 -FL0180000 -FS08000000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM) + + + 0 + JL2CM3 + -U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407ZGTx$CMSIS\Flash\STM32F4xx_1024.FLM) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 2 + 10000000 + + + + + + Kernel + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 1 + 10 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 1 + 11 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 1 + 12 + 1 + 0 + 0 + 0 + ..\..\..\src\signal.c + signal.c + 0 + 0 + + + 1 + 13 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 1 + 14 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Applications + 0 + 0 + 0 + 0 + + 2 + 15 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 3 + 16 + 1 + 0 + 0 + 0 + board\board.c + board.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + board\CubeMX_Config\Src\stm32f4xx_hal_msp.c + stm32f4xx_hal_msp.c + 0 + 0 + + + 3 + 18 + 2 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f413xx.s + startup_stm32f413xx.s + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart.c + drv_usart.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + cpu + 0 + 0 + 0 + 0 + + 4 + 22 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 4 + 23 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + cpuport.c + 0 + 0 + + + 4 + 26 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 5 + 27 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 5 + 28 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 5 + 29 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 5 + 30 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + + + finsh + 0 + 0 + 0 + 0 + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 37 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + 6 + 38 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 39 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + STM32_HAL + 0 + 0 + 0 + 0 + + 8 + 40 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + system_stm32f4xx.c + 0 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + stm32f4xx_hal.c + 0 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c + stm32f4xx_hal_cec.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + stm32f4xx_hal_cortex.c + 0 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + stm32f4xx_hal_crc.c + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c + stm32f4xx_hal_cryp.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c + stm32f4xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + stm32f4xx_hal_dma.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + stm32f4xx_hal_dma_ex.c + 0 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + stm32f4xx_hal_pwr.c + 0 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + stm32f4xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + stm32f4xx_hal_rcc.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + stm32f4xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 53 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c + stm32f4xx_hal_rng.c + 0 + 0 + + + 8 + 54 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + stm32f4xx_hal_gpio.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + stm32f4xx_hal_uart.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c + stm32f4xx_hal_usart.c + 0 + 0 + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/project.uvproj b/bsp/stm32/stm32f413-st-nucleo/project.uvproj new file mode 100644 index 0000000000..5b4ca2796b --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.uvproj @@ -0,0 +1,715 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + + + STM32F407ZG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + 6105 + stm32f4xx.h + + + + + + + -DSTM32F40_41xxx + + + SFD\ST\STM32F4xx\STM32F40x.sfr + 0 + + + + ST\STM32F4xx\ + ST\STM32F4xx\ + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 7 + + + + + + + + + + + + + + Segger\JL2CM3.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + BIN\UL2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + USE_HAL_DRIVER, STM32F413xx + + .;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + .\board\linker_scripts\link.sct + + + + + + + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + components.c + 1 + ..\..\..\src\components.c + + + device.c + 1 + ..\..\..\src\device.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + object.c + 1 + ..\..\..\src\object.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + signal.c + 1 + ..\..\..\src\signal.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + board\board.c + + + stm32f4xx_hal_msp.c + 1 + board\CubeMX_Config\Src\stm32f4xx_hal_msp.c + + + startup_stm32f413xx.s + 2 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f413xx.s + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + cpu + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + + + finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + STM32_HAL + + + system_stm32f4xx.c + 1 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + + + stm32f4xx_hal.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + + + stm32f4xx_hal_cec.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c + + + stm32f4xx_hal_cortex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + + + stm32f4xx_hal_crc.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + + + stm32f4xx_hal_cryp.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c + + + stm32f4xx_hal_cryp_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c + + + stm32f4xx_hal_dma.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + + + stm32f4xx_hal_dma_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + + + stm32f4xx_hal_pwr.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + + + stm32f4xx_hal_pwr_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + + + stm32f4xx_hal_rcc.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + + + stm32f4xx_hal_rcc_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + + + stm32f4xx_hal_rng.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c + + + stm32f4xx_hal_gpio.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + + + stm32f4xx_hal_uart.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + + + stm32f4xx_hal_usart.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c + + + + + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/project.uvprojx b/bsp/stm32/stm32f413-st-nucleo/project.uvprojx new file mode 100644 index 0000000000..162413e210 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/project.uvprojx @@ -0,0 +1,711 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F413ZHTx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x00050000) IROM(0x08000000,0x00180000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1536 -FS08000000 -FL0180000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM)) + 0 + $$Device:STM32F413ZHTx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F413ZHTx$CMSIS\SVD\STM32F413.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x50000 + + + 1 + 0x8000000 + 0x180000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x180000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x50000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER, STM32F413xx + + .;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + components.c + 1 + ..\..\..\src\components.c + + + device.c + 1 + ..\..\..\src\device.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + object.c + 1 + ..\..\..\src\object.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + signal.c + 1 + ..\..\..\src\signal.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Drivers + + + board.c + 1 + board\board.c + + + stm32f4xx_hal_msp.c + 1 + board\CubeMX_Config\Src\stm32f4xx_hal_msp.c + + + startup_stm32f413xx.s + 2 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f413xx.s + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + cpu + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + + + finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + STM32_HAL + + + system_stm32f4xx.c + 1 + ..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c + + + stm32f4xx_hal.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c + + + stm32f4xx_hal_cec.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c + + + stm32f4xx_hal_cortex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c + + + stm32f4xx_hal_crc.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c + + + stm32f4xx_hal_cryp.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c + + + stm32f4xx_hal_cryp_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c + + + stm32f4xx_hal_dma.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c + + + stm32f4xx_hal_dma_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c + + + stm32f4xx_hal_pwr.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c + + + stm32f4xx_hal_pwr_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c + + + stm32f4xx_hal_rcc.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c + + + stm32f4xx_hal_rcc_ex.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c + + + stm32f4xx_hal_rng.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c + + + stm32f4xx_hal_gpio.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c + + + stm32f4xx_hal_uart.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c + + + stm32f4xx_hal_usart.c + 1 + ..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c + + + + + + + + + + + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/rtconfig.h b/bsp/stm32/stm32f413-st-nucleo/rtconfig.h new file mode 100644 index 0000000000..8ddb790c4e --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/rtconfig.h @@ -0,0 +1,172 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart3" +#define RT_VER_NUM 0x40003 +#define ARCH_ARM +#define RT_USING_CPU_FFS +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32F4 + +/* Hardware Drivers Config */ + +#define SOC_STM32F413ZH + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_STLINK_TO_USART + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART3 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32f413-st-nucleo/rtconfig.py b/bsp/stm32/stm32f413-st-nucleo/rtconfig.py new file mode 100644 index 0000000000..638f59502a --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/rtconfig.py @@ -0,0 +1,143 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32f413-st-nucleo/template.ewp b/bsp/stm32/stm32f413-st-nucleo/template.ewp new file mode 100644 index 0000000000..21c66ca0d0 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.ewp @@ -0,0 +1,2031 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/template.eww b/bsp/stm32/stm32f413-st-nucleo/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/stm32/stm32f413-st-nucleo/template.uvopt b/bsp/stm32/stm32f413-st-nucleo/template.uvopt new file mode 100644 index 0000000000..b53d69d5df --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.uvopt @@ -0,0 +1,162 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 6 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + JL2CM3 + -U30000299 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 + + + 0 + UL2CM3 + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/template.uvoptx b/bsp/stm32/stm32f413-st-nucleo/template.uvoptx new file mode 100644 index 0000000000..f170007195 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.uvoptx @@ -0,0 +1,196 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U-O206 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1536.FLM -FS08000000 -FL0180000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F4xx_1536 -FL0180000 -FS08000000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM) + + + 0 + JL2CM3 + -U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407ZGTx$CMSIS\Flash\STM32F4xx_1024.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/template.uvproj b/bsp/stm32/stm32f413-st-nucleo/template.uvproj new file mode 100644 index 0000000000..6ca2a92953 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.uvproj @@ -0,0 +1,407 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + + + STM32F407ZG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + 6105 + stm32f4xx.h + + + + + + + -DSTM32F40_41xxx + + + SFD\ST\STM32F4xx\STM32F40x.sfr + 0 + 0 + + + + ST\STM32F4xx\ + ST\STM32F4xx\ + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 0 + + 0 + 6 + + + + + + + + + + + + + + Segger\JL2CM3.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + +
diff --git a/bsp/stm32/stm32f413-st-nucleo/template.uvprojx b/bsp/stm32/stm32f413-st-nucleo/template.uvprojx new file mode 100644 index 0000000000..6b03ebbbb9 --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/template.uvprojx @@ -0,0 +1,394 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F413ZHTx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x00050000) IROM(0x08000000,0x00180000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1536 -FS08000000 -FL0180000 -FP0($$Device:STM32F413ZHTx$CMSIS\Flash\STM32F4xx_1536.FLM)) + 0 + $$Device:STM32F413ZHTx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F413ZHTx$CMSIS\SVD\STM32F413.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x50000 + + + 1 + 0x8000000 + 0x180000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x180000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x50000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + + + + + + + +
-- Gitee From 786eb5ae9c77970f25f662d57a83276d09c9a72d Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Thu, 30 Apr 2020 21:08:04 +0800 Subject: [PATCH 28/54] [C++] rename the Thread/Mutex to cxx_Thread/Mutex to avoid same name issue --- bsp/lpc54608-LPCXpresso/project.ewp | 8 +- bsp/lpc54608-LPCXpresso/project.ewt | 8 +- bsp/lpc54608-LPCXpresso/project.uvprojx | 741 +++++++++--------- components/cplusplus/crt_init.c | 0 .../cplusplus/{Mutex.cpp => cxx_Mutex.cpp} | 0 .../{Semaphore.cpp => cxx_Semaphore.cpp} | 0 .../cplusplus/{Thread.cpp => cxx_Thread.cpp} | 0 components/cplusplus/{crt.cpp => cxx_crt.cpp} | 0 8 files changed, 375 insertions(+), 382 deletions(-) mode change 100755 => 100644 components/cplusplus/crt_init.c rename components/cplusplus/{Mutex.cpp => cxx_Mutex.cpp} (100%) rename components/cplusplus/{Semaphore.cpp => cxx_Semaphore.cpp} (100%) rename components/cplusplus/{Thread.cpp => cxx_Thread.cpp} (100%) rename components/cplusplus/{crt.cpp => cxx_crt.cpp} (100%) diff --git a/bsp/lpc54608-LPCXpresso/project.ewp b/bsp/lpc54608-LPCXpresso/project.ewp index 22154af07d..d16ead5d2c 100644 --- a/bsp/lpc54608-LPCXpresso/project.ewp +++ b/bsp/lpc54608-LPCXpresso/project.ewp @@ -2148,16 +2148,16 @@ CPlusPlus - $PROJ_DIR$\../../components/cplusplus/Mutex.cpp + $PROJ_DIR$\../../components/cplusplus/cxx_Mutex.cpp - $PROJ_DIR$\../../components/cplusplus/Semaphore.cpp + $PROJ_DIR$\../../components/cplusplus/cxx_Semaphore.cpp - $PROJ_DIR$\../../components/cplusplus/Thread.cpp + $PROJ_DIR$\../../components/cplusplus/cxx_Thread.cpp - $PROJ_DIR$\../../components/cplusplus/crt.cpp + $PROJ_DIR$\../../components/cplusplus/cxx_crt.cpp $PROJ_DIR$\../../components/cplusplus/crt_init.c diff --git a/bsp/lpc54608-LPCXpresso/project.ewt b/bsp/lpc54608-LPCXpresso/project.ewt index de78292e60..a1d63d5e4b 100644 --- a/bsp/lpc54608-LPCXpresso/project.ewt +++ b/bsp/lpc54608-LPCXpresso/project.ewt @@ -2355,19 +2355,19 @@ CPlusPlus - $PROJ_DIR$\..\..\components\cplusplus\crt.cpp + $PROJ_DIR$\..\..\components\cplusplus\cxx_crt.cpp $PROJ_DIR$\..\..\components\cplusplus\crt_init.c - $PROJ_DIR$\..\..\components\cplusplus\Mutex.cpp + $PROJ_DIR$\..\..\components\cplusplus\cxx_Mutex.cpp - $PROJ_DIR$\..\..\components\cplusplus\Semaphore.cpp + $PROJ_DIR$\..\..\components\cplusplus\cxx_Semaphore.cpp - $PROJ_DIR$\..\..\components\cplusplus\Thread.cpp + $PROJ_DIR$\..\..\components\cplusplus\cxx_Thread.cpp diff --git a/bsp/lpc54608-LPCXpresso/project.uvprojx b/bsp/lpc54608-LPCXpresso/project.uvprojx index ad2e225b2e..e7978224d2 100644 --- a/bsp/lpc54608-LPCXpresso/project.uvprojx +++ b/bsp/lpc54608-LPCXpresso/project.uvprojx @@ -330,9 +330,9 @@ 0 --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 - CPU_LPC54608J512ET180=1, CPU_LPC54608, CORE_M4, SDK_DEBUGCONSOLE=0, RT_USING_ARM_LIBC + SDK_DEBUGCONSOLE=0, CPU_LPC54608, CORE_M4, CPU_LPC54608J512ET180=1, RT_USING_ARM_LIBC - .;..\..\include;applications;.;drivers;SDK_2.2_LPCXpresso54608\CMSIS\Include;SDK_2.2_LPCXpresso54608\devices\LPC54608;SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers;SDK_2.2_LPCXpresso54608\devices\LPC54608\utilities;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\inc;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\cplusplus;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common;..\..\components\libc\pthreads;..\..\components\libc\time;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\netdev\include;..\..\components\net\sal_socket\include;..\..\components\net\sal_socket\include\socket;..\..\components\net\sal_socket\impl;..\..\components\net\sal_socket\include\dfs_net;..\..\components\net\sal_socket\include\dfs_net\sys_select;..\..\components\net\sal_socket\include\socket\sys_socket + .;../../include;applications;.;drivers;SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/inc;SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/src;SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers;SDK_2.2_LPCXpresso54608/devices/LPC54608/utilities;SDK_2.2_LPCXpresso54608/CMSIS/Include;SDK_2.2_LPCXpresso54608/devices/LPC54608;../../libcpu/arm/common;../../libcpu/arm/cortex-m4;../../components/finsh;../../components/dfs/include;../../components/dfs/filesystems/elmfat;../../components/dfs/filesystems/devfs;../../components/net/lwip-2.0.2/src;../../components/net/lwip-2.0.2/src/include;../../components/net/lwip-2.0.2/src/include/ipv4;../../components/net/lwip-2.0.2/src/arch/include;../../components/net/lwip-2.0.2/src/include/netif;../../components/net/netdev/include;../../components/net/sal_socket/include;../../components/net/sal_socket/include/socket;../../components/net/sal_socket/impl;../../components/net/sal_socket/include/dfs_net;../../components/net/sal_socket/include/dfs_net/sys_select;../../components/net/sal_socket/include/socket/sys_socket;../../components/drivers/include;../../components/drivers/include;../../components/drivers/spi;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/cplusplus;../../components/libc/compilers/armlibc;../../components/libc/compilers/common;../../components/libc/pthreads;../../components/libc/time @@ -379,112 +379,105 @@ clock.c 1 - ..\..\src\clock.c + ../../src/clock.c components.c 1 - ..\..\src\components.c - - - - - cpu.c - 1 - ..\..\src\cpu.c + ../../src/components.c device.c 1 - ..\..\src\device.c + ../../src/device.c idle.c 1 - ..\..\src\idle.c + ../../src/idle.c ipc.c 1 - ..\..\src\ipc.c + ../../src/ipc.c irq.c 1 - ..\..\src\irq.c + ../../src/irq.c kservice.c 1 - ..\..\src\kservice.c + ../../src/kservice.c mem.c 1 - ..\..\src\mem.c + ../../src/mem.c memheap.c 1 - ..\..\src\memheap.c + ../../src/memheap.c mempool.c 1 - ..\..\src\mempool.c + ../../src/mempool.c object.c 1 - ..\..\src\object.c + ../../src/object.c scheduler.c 1 - ..\..\src\scheduler.c + ../../src/scheduler.c signal.c 1 - ..\..\src\signal.c + ../../src/signal.c thread.c 1 - ..\..\src\thread.c + ../../src/thread.c timer.c 1 - ..\..\src\timer.c + ../../src/timer.c @@ -494,21 +487,21 @@ application.c 1 - applications\application.c + applications/application.c mnt.c 1 - applications\mnt.c + applications/mnt.c startup.c 1 - applications\startup.c + applications/startup.c @@ -518,419 +511,419 @@ board.c 1 - drivers\board.c + drivers/board.c clock_config.c 1 - drivers\clock_config.c + drivers/clock_config.c drt_mpu.c 1 - drivers\drt_mpu.c + drivers/drt_mpu.c drv_emac.c 1 - drivers\drv_emac.c + drivers/drv_emac.c drv_ft5406.c 1 - drivers\drv_ft5406.c + drivers/drv_ft5406.c drv_i2c.c 1 - drivers\drv_i2c.c + drivers/drv_i2c.c drv_lcd.c 1 - drivers\drv_lcd.c + drivers/drv_lcd.c drv_sd.c 1 - drivers\drv_sd.c + drivers/drv_sd.c drv_sdram.c 1 - drivers\drv_sdram.c + drivers/drv_sdram.c drv_sram.c 1 - drivers\drv_sram.c + drivers/drv_sram.c drv_uart.c 1 - drivers\drv_uart.c + drivers/drv_uart.c fsl_phy.c 1 - drivers\fsl_phy.c + drivers/fsl_phy.c - CMSIS + Libraries - startup_LPC54608.s - 2 - SDK_2.2_LPCXpresso54608\devices\LPC54608\arm\startup_LPC54608.s + fsl_sd.c + 1 + SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/src/fsl_sd.c - system_LPC54608.c + fsl_sdmmc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\system_LPC54608.c + SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/src/fsl_sdmmc.c - keil_lib_power.lib - 4 - SDK_2.2_LPCXpresso54608\devices\LPC54608\arm\keil_lib_power.lib + fsl_host.c + 1 + SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/src/fsl_host.c + + + + + fsl_sd_event.c + 1 + SDK_2.2_LPCXpresso54608/sdmmc_2.1.2/src/fsl_sd_event.c - - - Libraries fsl_adc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_adc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_adc.c fsl_clock.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_clock.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_clock.c fsl_common.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_common.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_common.c fsl_crc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_crc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_crc.c fsl_ctimer.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_ctimer.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_ctimer.c fsl_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_dma.c fsl_dmic.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_dmic.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_dmic.c fsl_dmic_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_dmic_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_dmic_dma.c fsl_eeprom.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_eeprom.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_eeprom.c fsl_emc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_emc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_emc.c fsl_enet.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_enet.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_enet.c fsl_flashiap.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_flashiap.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_flashiap.c fsl_flexcomm.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_flexcomm.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_flexcomm.c fsl_fmc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_fmc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_fmc.c fsl_fmeas.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_fmeas.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_fmeas.c fsl_gint.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_gint.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_gint.c fsl_gpio.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_gpio.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_gpio.c fsl_i2c.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_i2c.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_i2c.c fsl_i2c_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_i2c_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_i2c_dma.c fsl_i2s.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_i2s.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_i2s.c fsl_i2s_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_i2s_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_i2s_dma.c fsl_inputmux.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_inputmux.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_inputmux.c fsl_lcdc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_lcdc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_lcdc.c fsl_mcan.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_mcan.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_mcan.c fsl_mrt.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_mrt.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_mrt.c fsl_pint.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_pint.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_pint.c fsl_power.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_power.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_power.c fsl_reset.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_reset.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_reset.c fsl_rit.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_rit.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_rit.c fsl_rtc.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_rtc.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_rtc.c fsl_sctimer.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_sctimer.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_sctimer.c fsl_sdif.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_sdif.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_sdif.c fsl_spi.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_spi.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_spi.c fsl_spi_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_spi_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_spi_dma.c fsl_spifi.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_spifi.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_spifi.c fsl_spifi_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_spifi_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_spifi_dma.c fsl_usart.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_usart.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_usart.c fsl_usart_dma.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_usart_dma.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_usart_dma.c fsl_utick.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_utick.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_utick.c fsl_wwdt.c 1 - SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers\fsl_wwdt.c - - - - - fsl_sd.c - 1 - SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src\fsl_sd.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/drivers/fsl_wwdt.c + + + CMSIS - fsl_sdmmc.c - 1 - SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src\fsl_sdmmc.c + startup_LPC54608.s + 2 + SDK_2.2_LPCXpresso54608/devices/LPC54608/arm/startup_LPC54608.s - fsl_host.c + system_LPC54608.c 1 - SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src\fsl_host.c + SDK_2.2_LPCXpresso54608/devices/LPC54608/system_LPC54608.c - fsl_sd_event.c - 1 - SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src\fsl_sd_event.c + keil_lib_power.lib + 4 + SDK_2.2_LPCXpresso54608/devices/LPC54608/arm/keil_lib_power.lib @@ -940,851 +933,851 @@ backtrace.c 1 - ..\..\libcpu\arm\common\backtrace.c + ../../libcpu/arm/common/backtrace.c div0.c 1 - ..\..\libcpu\arm\common\div0.c + ../../libcpu/arm/common/div0.c showmem.c 1 - ..\..\libcpu\arm\common\showmem.c + ../../libcpu/arm/common/showmem.c cpuport.c 1 - ..\..\libcpu\arm\cortex-m4\cpuport.c + ../../libcpu/arm/cortex-m4/cpuport.c context_rvds.S 2 - ..\..\libcpu\arm\cortex-m4\context_rvds.S + ../../libcpu/arm/cortex-m4/context_rvds.S - CPlusPlus + finsh - Mutex.cpp - 8 - ..\..\components\cplusplus\Mutex.cpp + shell.c + 1 + ../../components/finsh/shell.c - Semaphore.cpp - 8 - ..\..\components\cplusplus\Semaphore.cpp + cmd.c + 1 + ../../components/finsh/cmd.c - Thread.cpp - 8 - ..\..\components\cplusplus\Thread.cpp + msh.c + 1 + ../../components/finsh/msh.c - crt.cpp - 8 - ..\..\components\cplusplus\crt.cpp + msh_file.c + 1 + ../../components/finsh/msh_file.c - crt_init.c + finsh_compiler.c 1 - ..\..\components\cplusplus\crt_init.c + ../../components/finsh/finsh_compiler.c - - - Filesystem - dfs.c + finsh_error.c 1 - ..\..\components\dfs\src\dfs.c + ../../components/finsh/finsh_error.c - dfs_file.c + finsh_heap.c 1 - ..\..\components\dfs\src\dfs_file.c + ../../components/finsh/finsh_heap.c - dfs_fs.c + finsh_init.c 1 - ..\..\components\dfs\src\dfs_fs.c + ../../components/finsh/finsh_init.c - dfs_posix.c + finsh_node.c 1 - ..\..\components\dfs\src\dfs_posix.c + ../../components/finsh/finsh_node.c - poll.c + finsh_ops.c 1 - ..\..\components\dfs\src\poll.c + ../../components/finsh/finsh_ops.c - select.c + finsh_parser.c 1 - ..\..\components\dfs\src\select.c + ../../components/finsh/finsh_parser.c - devfs.c + finsh_var.c 1 - ..\..\components\dfs\filesystems\devfs\devfs.c + ../../components/finsh/finsh_var.c - dfs_elm.c + finsh_vm.c 1 - ..\..\components\dfs\filesystems\elmfat\dfs_elm.c + ../../components/finsh/finsh_vm.c - ff.c + finsh_token.c 1 - ..\..\components\dfs\filesystems\elmfat\ff.c + ../../components/finsh/finsh_token.c - DeviceDrivers + Filesystem - i2c_core.c + dfs.c 1 - ..\..\components\drivers\i2c\i2c_core.c + ../../components/dfs/src/dfs.c - i2c_dev.c + dfs_file.c 1 - ..\..\components\drivers\i2c\i2c_dev.c + ../../components/dfs/src/dfs_file.c - i2c-bit-ops.c + dfs_fs.c 1 - ..\..\components\drivers\i2c\i2c-bit-ops.c + ../../components/dfs/src/dfs_fs.c - pin.c + dfs_posix.c 1 - ..\..\components\drivers\misc\pin.c + ../../components/dfs/src/dfs_posix.c - mtd_nand.c + poll.c 1 - ..\..\components\drivers\mtd\mtd_nand.c + ../../components/dfs/src/poll.c - rtc.c + select.c 1 - ..\..\components\drivers\rtc\rtc.c + ../../components/dfs/src/select.c - block_dev.c + dfs_elm.c 1 - ..\..\components\drivers\sdio\block_dev.c + ../../components/dfs/filesystems/elmfat/dfs_elm.c - mmcsd_core.c + ff.c 1 - ..\..\components\drivers\sdio\mmcsd_core.c + ../../components/dfs/filesystems/elmfat/ff.c - sd.c + devfs.c 1 - ..\..\components\drivers\sdio\sd.c + ../../components/dfs/filesystems/devfs/devfs.c + + + lwIP - sdio.c + sys_arch.c 1 - ..\..\components\drivers\sdio\sdio.c + ../../components/net/lwip-2.0.2/src/arch/sys_arch.c - mmc.c + api_lib.c 1 - ..\..\components\drivers\sdio\mmc.c + ../../components/net/lwip-2.0.2/src/api/api_lib.c - serial.c + api_msg.c 1 - ..\..\components\drivers\serial\serial.c + ../../components/net/lwip-2.0.2/src/api/api_msg.c - spi_core.c + err.c 1 - ..\..\components\drivers\spi\spi_core.c + ../../components/net/lwip-2.0.2/src/api/err.c - spi_dev.c + netbuf.c 1 - ..\..\components\drivers\spi\spi_dev.c + ../../components/net/lwip-2.0.2/src/api/netbuf.c - completion.c + netdb.c 1 - ..\..\components\drivers\src\completion.c + ../../components/net/lwip-2.0.2/src/api/netdb.c - dataqueue.c + netifapi.c 1 - ..\..\components\drivers\src\dataqueue.c + ../../components/net/lwip-2.0.2/src/api/netifapi.c - pipe.c + sockets.c 1 - ..\..\components\drivers\src\pipe.c + ../../components/net/lwip-2.0.2/src/api/sockets.c - ringblk_buf.c + tcpip.c 1 - ..\..\components\drivers\src\ringblk_buf.c + ../../components/net/lwip-2.0.2/src/api/tcpip.c - ringbuffer.c + def.c 1 - ..\..\components\drivers\src\ringbuffer.c + ../../components/net/lwip-2.0.2/src/core/def.c - waitqueue.c + dns.c 1 - ..\..\components\drivers\src\waitqueue.c + ../../components/net/lwip-2.0.2/src/core/dns.c - workqueue.c + inet_chksum.c 1 - ..\..\components\drivers\src\workqueue.c + ../../components/net/lwip-2.0.2/src/core/inet_chksum.c - - - - - - - - - - - - - - - finsh - shell.c + init.c 1 - ..\..\components\finsh\shell.c + ../../components/net/lwip-2.0.2/src/core/init.c - cmd.c + ip.c 1 - ..\..\components\finsh\cmd.c + ../../components/net/lwip-2.0.2/src/core/ip.c - msh.c + memp.c 1 - ..\..\components\finsh\msh.c + ../../components/net/lwip-2.0.2/src/core/memp.c - msh_file.c + netif.c 1 - ..\..\components\finsh\msh_file.c + ../../components/net/lwip-2.0.2/src/core/netif.c - finsh_compiler.c + pbuf.c 1 - ..\..\components\finsh\finsh_compiler.c + ../../components/net/lwip-2.0.2/src/core/pbuf.c - finsh_error.c + raw.c 1 - ..\..\components\finsh\finsh_error.c + ../../components/net/lwip-2.0.2/src/core/raw.c - finsh_heap.c + stats.c 1 - ..\..\components\finsh\finsh_heap.c + ../../components/net/lwip-2.0.2/src/core/stats.c - finsh_init.c + sys.c 1 - ..\..\components\finsh\finsh_init.c + ../../components/net/lwip-2.0.2/src/core/sys.c - finsh_node.c + tcp.c 1 - ..\..\components\finsh\finsh_node.c + ../../components/net/lwip-2.0.2/src/core/tcp.c - finsh_ops.c + tcp_in.c 1 - ..\..\components\finsh\finsh_ops.c + ../../components/net/lwip-2.0.2/src/core/tcp_in.c - finsh_parser.c + tcp_out.c 1 - ..\..\components\finsh\finsh_parser.c + ../../components/net/lwip-2.0.2/src/core/tcp_out.c - finsh_var.c + timeouts.c 1 - ..\..\components\finsh\finsh_var.c + ../../components/net/lwip-2.0.2/src/core/timeouts.c - finsh_vm.c + udp.c 1 - ..\..\components\finsh\finsh_vm.c + ../../components/net/lwip-2.0.2/src/core/udp.c - finsh_token.c + ethernet.c 1 - ..\..\components\finsh\finsh_token.c + ../../components/net/lwip-2.0.2/src/netif/ethernet.c - - - libc - libc.c + ethernetif.c 1 - ..\..\components\libc\compilers\armlibc\libc.c + ../../components/net/lwip-2.0.2/src/netif/ethernetif.c - mem_std.c + lowpan6.c 1 - ..\..\components\libc\compilers\armlibc\mem_std.c + ../../components/net/lwip-2.0.2/src/netif/lowpan6.c - stdio.c + autoip.c 1 - ..\..\components\libc\compilers\armlibc\stdio.c + ../../components/net/lwip-2.0.2/src/core/ipv4/autoip.c - stubs.c + dhcp.c 1 - ..\..\components\libc\compilers\armlibc\stubs.c + ../../components/net/lwip-2.0.2/src/core/ipv4/dhcp.c - time.c + etharp.c 1 - ..\..\components\libc\compilers\common\time.c + ../../components/net/lwip-2.0.2/src/core/ipv4/etharp.c - - - pthreads - mqueue.c + icmp.c 1 - ..\..\components\libc\pthreads\mqueue.c + ../../components/net/lwip-2.0.2/src/core/ipv4/icmp.c - pthread.c + igmp.c 1 - ..\..\components\libc\pthreads\pthread.c + ../../components/net/lwip-2.0.2/src/core/ipv4/igmp.c - pthread_attr.c + ip4.c 1 - ..\..\components\libc\pthreads\pthread_attr.c + ../../components/net/lwip-2.0.2/src/core/ipv4/ip4.c - pthread_barrier.c + ip4_addr.c 1 - ..\..\components\libc\pthreads\pthread_barrier.c + ../../components/net/lwip-2.0.2/src/core/ipv4/ip4_addr.c - pthread_cond.c + ip4_frag.c 1 - ..\..\components\libc\pthreads\pthread_cond.c + ../../components/net/lwip-2.0.2/src/core/ipv4/ip4_frag.c - pthread_mutex.c + ping.c 1 - ..\..\components\libc\pthreads\pthread_mutex.c + ../../components/net/lwip-2.0.2/src/apps/ping/ping.c + + + netdev - pthread_rwlock.c + netdev.c 1 - ..\..\components\libc\pthreads\pthread_rwlock.c + ../../components/net/netdev/src/netdev.c - pthread_spin.c + netdev_ipaddr.c 1 - ..\..\components\libc\pthreads\pthread_spin.c + ../../components/net/netdev/src/netdev_ipaddr.c + + + SAL - pthread_tls.c + sal_socket.c 1 - ..\..\components\libc\pthreads\pthread_tls.c + ../../components/net/sal_socket/src/sal_socket.c - sched.c + net_netdb.c 1 - ..\..\components\libc\pthreads\sched.c + ../../components/net/sal_socket/socket/net_netdb.c - semaphore.c + af_inet_lwip.c 1 - ..\..\components\libc\pthreads\semaphore.c + ../../components/net/sal_socket/impl/af_inet_lwip.c - clock_time.c + net_sockets.c 1 - ..\..\components\libc\time\clock_time.c + ../../components/net/sal_socket/socket/net_sockets.c - posix_sleep.c + dfs_net.c 1 - ..\..\components\libc\time\posix_sleep.c + ../../components/net/sal_socket/dfs_net/dfs_net.c - lwIP + DeviceDrivers - sys_arch.c + block_dev.c 1 - ..\..\components\net\lwip-2.0.2\src\arch\sys_arch.c + ../../components/drivers/sdio/block_dev.c - api_lib.c + mmcsd_core.c 1 - ..\..\components\net\lwip-2.0.2\src\api\api_lib.c + ../../components/drivers/sdio/mmcsd_core.c - api_msg.c + sd.c 1 - ..\..\components\net\lwip-2.0.2\src\api\api_msg.c + ../../components/drivers/sdio/sd.c - err.c + sdio.c 1 - ..\..\components\net\lwip-2.0.2\src\api\err.c + ../../components/drivers/sdio/sdio.c - netbuf.c + mmc.c 1 - ..\..\components\net\lwip-2.0.2\src\api\netbuf.c + ../../components/drivers/sdio/mmc.c - netdb.c + rtc.c 1 - ..\..\components\net\lwip-2.0.2\src\api\netdb.c + ../../components/drivers/rtc/rtc.c - netifapi.c + spi_core.c 1 - ..\..\components\net\lwip-2.0.2\src\api\netifapi.c + ../../components/drivers/spi/spi_core.c - sockets.c + spi_dev.c 1 - ..\..\components\net\lwip-2.0.2\src\api\sockets.c + ../../components/drivers/spi/spi_dev.c - tcpip.c + i2c_core.c 1 - ..\..\components\net\lwip-2.0.2\src\api\tcpip.c + ../../components/drivers/i2c/i2c_core.c - def.c + i2c_dev.c 1 - ..\..\components\net\lwip-2.0.2\src\core\def.c + ../../components/drivers/i2c/i2c_dev.c - dns.c + i2c-bit-ops.c 1 - ..\..\components\net\lwip-2.0.2\src\core\dns.c + ../../components/drivers/i2c/i2c-bit-ops.c - inet_chksum.c + serial.c 1 - ..\..\components\net\lwip-2.0.2\src\core\inet_chksum.c + ../../components/drivers/serial/serial.c - init.c + completion.c 1 - ..\..\components\net\lwip-2.0.2\src\core\init.c + ../../components/drivers/src/completion.c - ip.c + dataqueue.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ip.c + ../../components/drivers/src/dataqueue.c - memp.c + pipe.c 1 - ..\..\components\net\lwip-2.0.2\src\core\memp.c + ../../components/drivers/src/pipe.c - netif.c + ringblk_buf.c 1 - ..\..\components\net\lwip-2.0.2\src\core\netif.c + ../../components/drivers/src/ringblk_buf.c - pbuf.c + ringbuffer.c 1 - ..\..\components\net\lwip-2.0.2\src\core\pbuf.c + ../../components/drivers/src/ringbuffer.c - raw.c + waitqueue.c 1 - ..\..\components\net\lwip-2.0.2\src\core\raw.c + ../../components/drivers/src/waitqueue.c - stats.c + workqueue.c 1 - ..\..\components\net\lwip-2.0.2\src\core\stats.c + ../../components/drivers/src/workqueue.c - sys.c + mtd_nand.c 1 - ..\..\components\net\lwip-2.0.2\src\core\sys.c + ../../components/drivers/mtd/mtd_nand.c - tcp.c + pin.c 1 - ..\..\components\net\lwip-2.0.2\src\core\tcp.c + ../../components/drivers/misc/pin.c + + + + + + + + + + + + + + + CPlusPlus - tcp_in.c - 1 - ..\..\components\net\lwip-2.0.2\src\core\tcp_in.c + cxx_Mutex.cpp + 8 + ../../components/cplusplus/cxx_Mutex.cpp - tcp_out.c - 1 - ..\..\components\net\lwip-2.0.2\src\core\tcp_out.c + cxx_Semaphore.cpp + 8 + ../../components/cplusplus/cxx_Semaphore.cpp - timeouts.c - 1 - ..\..\components\net\lwip-2.0.2\src\core\timeouts.c + cxx_Thread.cpp + 8 + ../../components/cplusplus/cxx_Thread.cpp - udp.c - 1 - ..\..\components\net\lwip-2.0.2\src\core\udp.c + cxx_crt.cpp + 8 + ../../components/cplusplus/cxx_crt.cpp - ethernet.c + crt_init.c 1 - ..\..\components\net\lwip-2.0.2\src\netif\ethernet.c + ../../components/cplusplus/crt_init.c + + + libc - ethernetif.c + libc.c 1 - ..\..\components\net\lwip-2.0.2\src\netif\ethernetif.c + ../../components/libc/compilers/armlibc/libc.c - lowpan6.c + mem_std.c 1 - ..\..\components\net\lwip-2.0.2\src\netif\lowpan6.c + ../../components/libc/compilers/armlibc/mem_std.c - autoip.c + stdio.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\autoip.c + ../../components/libc/compilers/armlibc/stdio.c - dhcp.c + stubs.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\dhcp.c + ../../components/libc/compilers/armlibc/stubs.c - etharp.c + time.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\etharp.c + ../../components/libc/compilers/common/time.c + + + pthreads - icmp.c + mqueue.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\icmp.c + ../../components/libc/pthreads/mqueue.c - igmp.c + pthread.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\igmp.c + ../../components/libc/pthreads/pthread.c - ip4.c + pthread_attr.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4.c + ../../components/libc/pthreads/pthread_attr.c - ip4_addr.c + pthread_barrier.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_addr.c + ../../components/libc/pthreads/pthread_barrier.c - ip4_frag.c + pthread_cond.c 1 - ..\..\components\net\lwip-2.0.2\src\core\ipv4\ip4_frag.c + ../../components/libc/pthreads/pthread_cond.c - ping.c + pthread_mutex.c 1 - ..\..\components\net\lwip-2.0.2\src\apps\ping\ping.c + ../../components/libc/pthreads/pthread_mutex.c - - - netdev - netdev.c + pthread_rwlock.c 1 - ..\..\components\net\netdev\src\netdev.c + ../../components/libc/pthreads/pthread_rwlock.c - netdev_ipaddr.c + pthread_spin.c 1 - ..\..\components\net\netdev\src\netdev_ipaddr.c + ../../components/libc/pthreads/pthread_spin.c - - - SAL - sal_socket.c + pthread_tls.c 1 - ..\..\components\net\sal_socket\src\sal_socket.c + ../../components/libc/pthreads/pthread_tls.c - net_netdb.c + sched.c 1 - ..\..\components\net\sal_socket\socket\net_netdb.c + ../../components/libc/pthreads/sched.c - af_inet_lwip.c + semaphore.c 1 - ..\..\components\net\sal_socket\impl\af_inet_lwip.c + ../../components/libc/pthreads/semaphore.c - net_sockets.c + clock_time.c 1 - ..\..\components\net\sal_socket\socket\net_sockets.c + ../../components/libc/time/clock_time.c - dfs_net.c + posix_sleep.c 1 - ..\..\components\net\sal_socket\dfs_net\dfs_net.c + ../../components/libc/time/posix_sleep.c diff --git a/components/cplusplus/crt_init.c b/components/cplusplus/crt_init.c old mode 100755 new mode 100644 diff --git a/components/cplusplus/Mutex.cpp b/components/cplusplus/cxx_Mutex.cpp similarity index 100% rename from components/cplusplus/Mutex.cpp rename to components/cplusplus/cxx_Mutex.cpp diff --git a/components/cplusplus/Semaphore.cpp b/components/cplusplus/cxx_Semaphore.cpp similarity index 100% rename from components/cplusplus/Semaphore.cpp rename to components/cplusplus/cxx_Semaphore.cpp diff --git a/components/cplusplus/Thread.cpp b/components/cplusplus/cxx_Thread.cpp similarity index 100% rename from components/cplusplus/Thread.cpp rename to components/cplusplus/cxx_Thread.cpp diff --git a/components/cplusplus/crt.cpp b/components/cplusplus/cxx_crt.cpp similarity index 100% rename from components/cplusplus/crt.cpp rename to components/cplusplus/cxx_crt.cpp -- Gitee From 040816dee8c1933c75060a696638e368230a7dc2 Mon Sep 17 00:00:00 2001 From: Prry <445395670@qq.com> Date: Sat, 2 May 2020 00:39:48 +0800 Subject: [PATCH 29/54] add vendor information of sensor --- components/drivers/sensors/sensor.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/components/drivers/sensors/sensor.h b/components/drivers/sensors/sensor.h index a0eaaae9ea..3821ec36ca 100755 --- a/components/drivers/sensors/sensor.h +++ b/components/drivers/sensors/sensor.h @@ -61,6 +61,8 @@ extern "C" { #define RT_SENSOR_VENDOR_ASAIR (8) /* Aosong */ #define RT_SENSOR_VENDOR_SHARP (9) /* Sharp */ #define RT_SENSOR_VENDOR_SENSIRION (10) /* Sensirion */ +#define RT_SENSOR_VENDOR_TI (11) /* Texas Instruments*/ + /* Sensor unit types */ -- Gitee From 1ea7a3f519a4171d2435f4bbf4c0bcdd4201f28c Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Sun, 26 Apr 2020 22:44:09 +0800 Subject: [PATCH 30/54] [nrfx] Add the on-chip flash --- bsp/nrf5x/libraries/drivers/SConscript | 5 +- bsp/nrf5x/libraries/drivers/drv_flash.c | 184 ++++++++++++++++++ bsp/nrf5x/libraries/drivers/drv_flash.h | 29 +++ bsp/nrf5x/nrf52840/.config | 20 +- bsp/nrf5x/nrf52840/board/Kconfig | 41 +++- bsp/nrf5x/nrf52840/board/board.h | 5 + .../nrf52840/board/linker_scripts/link.sct | 6 +- bsp/nrf5x/nrf52840/board/sdk_config.h | 6 +- bsp/nrf5x/nrf52840/project.uvoptx | 14 +- bsp/nrf5x/nrf52840/project.uvprojx | 8 +- bsp/nrf5x/nrf52840/template.uvoptx | 8 +- bsp/nrf5x/nrf52840/template.uvprojx | 8 +- 12 files changed, 300 insertions(+), 34 deletions(-) create mode 100644 bsp/nrf5x/libraries/drivers/drv_flash.c create mode 100644 bsp/nrf5x/libraries/drivers/drv_flash.h diff --git a/bsp/nrf5x/libraries/drivers/SConscript b/bsp/nrf5x/libraries/drivers/SConscript index 1bd5bdb0a9..1fcca26f99 100644 --- a/bsp/nrf5x/libraries/drivers/SConscript +++ b/bsp/nrf5x/libraries/drivers/SConscript @@ -10,8 +10,9 @@ src = Split(""" if GetDepend(['BSP_USING_UART']): src += ['drv_uart.c'] - -# src += ['drv_common.c'] + +if GetDepend(['BSP_USING_ON_CHIP_FLASH']): + src += ['drv_flash.c'] path = [cwd] diff --git a/bsp/nrf5x/libraries/drivers/drv_flash.c b/bsp/nrf5x/libraries/drivers/drv_flash.c new file mode 100644 index 0000000000..412dc1f82a --- /dev/null +++ b/bsp/nrf5x/libraries/drivers/drv_flash.c @@ -0,0 +1,184 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-29 supperthomas first version + */ + +#include "board.h" +#include +#include "nrfx_nvmc.h" + +#ifdef BSP_USING_ON_CHIP_FLASH +//#include "drv_config.h" +#include "drv_flash.h" + +#if defined(PKG_USING_FAL) +#include "fal.h" +#endif + +#include +#define LOG_TAG "drv.flash" + + + +/** + * @brief Gets the page of a given address + * @param Addr: Address of the FLASH Memory + * @retval The page of a given address + */ +static uint32_t GetPage(uint32_t Addr) +{ + uint32_t page = 0; + if (Addr < (MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE)) + { + page = (Addr - MCU_FLASH_START_ADDRESS) / MCU_FLASH_PAGE_SIZE; + } + else + { + return 0xffffffff; + } + return page; +} + + +/** + * Read data from flash. + * @note This operation's units is word. + * + * @param addr flash address + * @param buf buffer to store read data + * @param size read bytes size + * + * @return result + */ +int mcu_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) +{ + + size_t i; + + if ((addr + size) > MCU_FLASH_END_ADDRESS) + { + LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size)); + return -RT_EINVAL; + } + + for (i = 0; i < size; i++, buf++, addr++) + { + *buf = *(rt_uint8_t *) addr; + } + + return size; +} + +/** + * Write data to flash. + * @note This operation's units is word. + * @note This operation must after erase. @see flash_erase. + * + * @param addr flash address + * @param buf the write data buffer + * @param size write bytes size + * + * @return result + */ +int mcu_flash_write(rt_uint32_t addr, const uint8_t *buf, size_t size) +{ + if ((addr + size) > MCU_FLASH_END_ADDRESS) + { + LOG_E("ERROR: write outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -RT_EINVAL; + } + + + if (addr % 4 != 0) + { + LOG_E("write addr should be 4-byte alignment"); + //4byte write + //else byts + return -RT_EINVAL; + } + + if (size < 1) + { + return -RT_ERROR; + } + if (size % 4 != 0) + { + nrfx_nvmc_bytes_write(addr, buf, size); + return size; + } + else + { + nrfx_nvmc_words_write(addr, buf, size / 4); + return size; + } + +} + +/** + * Erase data on flash. + * @note This operation is irreversible. + * @note This operation's units is different which on many chips. + * + * @param addr flash address + * @param size erase bytes size + * + * @return result + */ +int mcu_flash_erase(rt_uint32_t addr, size_t size) +{ + nrfx_err_t result = RT_EOK; + + uint32_t FirstPage = 0, NbOfPages = 0; + + if ((addr + size) > MCU_FLASH_END_ADDRESS) + { + LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -RT_EINVAL; + } + + FirstPage = GetPage(addr); + NbOfPages = GetPage(addr + size - 1) - FirstPage + 1; + + for (int i = 0; i < NbOfPages ; i++) + { + result = nrfx_nvmc_page_erase((FirstPage + i) * MCU_FLASH_PAGE_SIZE); + if (NRFX_SUCCESS != result) + { + LOG_E("ERROR: erase flash page %d ! error code is (%x)\n", FirstPage + i, result); + return -RT_EINVAL; + } + } + LOG_D("erase done: addr (0x%p), size %d", (void *)addr, NbOfPages * MCU_FLASH_PAGE_SIZE); + return size; +} + +#if defined(PKG_USING_FAL) + +static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size); +static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size); +static int fal_flash_erase(long offset, size_t size); + +const struct fal_flash_dev mcu_onchip_flash = {"mcu_onchip", MCU_FLASH_START_ADDRESS, MCU_FLASH_SIZE, MCU_FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} }; + +static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size) +{ + return mcu_flash_read(mcu_onchip_flash.addr + offset, buf, size); +} + +static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size) +{ + return mcu_flash_write(mcu_onchip_flash.addr + offset, buf, size); +} + +static int fal_flash_erase(long offset, size_t size) +{ + return mcu_flash_erase(mcu_onchip_flash.addr + offset, size); +} + +#endif +#endif /* BSP_USING_ON_CHIP_FLASH */ diff --git a/bsp/nrf5x/libraries/drivers/drv_flash.h b/bsp/nrf5x/libraries/drivers/drv_flash.h new file mode 100644 index 0000000000..97a524beff --- /dev/null +++ b/bsp/nrf5x/libraries/drivers/drv_flash.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-29 supperthomas first version + */ + +#ifndef __DRV_FLASH_H__ +#define __DRV_FLASH_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +int nrfx_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size); +int nrfx_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size); +int nrfx_flash_erase(rt_uint32_t addr, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/nrf5x/nrf52840/.config b/bsp/nrf5x/nrf52840/.config index 36e39de794..7565108653 100644 --- a/bsp/nrf5x/nrf52840/.config +++ b/bsp/nrf5x/nrf52840/.config @@ -200,6 +200,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_MYMQTT is not set # CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set @@ -226,6 +227,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set # CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set # CONFIG_PKG_USING_ATSRV_SOCKET is not set @@ -302,6 +304,7 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set # CONFIG_PKG_USING_LUNAR_CALENDAR is not set # CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_URLENCODE is not set # # system packages @@ -312,6 +315,12 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_LWEXT4 is not set # CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FAL_V00500 is not set +# CONFIG_PKG_USING_FAL_V00400 is not set +# CONFIG_PKG_USING_FAL_V00300 is not set +# CONFIG_PKG_USING_FAL_V00200 is not set +# CONFIG_PKG_USING_FAL_V00100 is not set +# CONFIG_PKG_USING_FAL_LATEST_VERSION is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set # CONFIG_PKG_USING_LITTLEVGL2RTT is not set @@ -343,6 +352,11 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_LITTLED is not set # CONFIG_PKG_USING_LKDGUI is not set # CONFIG_PKG_USING_NRF5X_SDK is not set +CONFIG_PKG_USING_NRFX=y +CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx" +CONFIG_PKG_USING_NRFX_V210=y +# CONFIG_PKG_USING_NRFX_LATEST_VERSION is not set +CONFIG_PKG_NRFX_VER="v2.1.0" # CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_INFRARED is not set @@ -367,11 +381,6 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_BEEP is not set # CONFIG_PKG_USING_EASYBLINK is not set # CONFIG_PKG_USING_PMS_SERIES is not set -CONFIG_PKG_USING_NRFX=y -CONFIG_PKG_NRFX_PATH="/packages/peripherals/nrfx" -CONFIG_PKG_USING_NRFX_V210=y -# CONFIG_PKG_USING_NRFX_LATEST_VERSION is not set -CONFIG_PKG_NRFX_VER="v2.1.0" # # miscellaneous packages @@ -423,6 +432,7 @@ CONFIG_SOC_NRF52840=y # On-chip Peripheral Drivers # # CONFIG_BSP_USING_GPIO is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART0=y # CONFIG_BSP_USING_UART1 is not set diff --git a/bsp/nrf5x/nrf52840/board/Kconfig b/bsp/nrf5x/nrf52840/board/Kconfig index b7edace9e8..9e48009cf6 100644 --- a/bsp/nrf5x/nrf52840/board/Kconfig +++ b/bsp/nrf5x/nrf52840/board/Kconfig @@ -2,14 +2,14 @@ menu "Hardware Drivers Config" config SOC_NRF52840 bool - config SOC_NRF52840 + config SOC_NRF52840 select RT_USING_COMPONENTS_INIT select RT_USING_USER_MAIN default y menu "Onboard Peripheral Drivers" config BSP_USING_JLINK_TO_USART - bool "Enable JLINK TO USART (uart0)" + bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)" select BSP_USING_UART select BSP_USING_UART0 default y @@ -30,11 +30,44 @@ menu "On-chip Peripheral Drivers" config BSP_USING_UART0 bool "Enable UART0" default y - + if BSP_USING_UART0 + config BSP_UART0_RX_PIN + int "uart0 rx pin number" + range 0 31 + default 8 + config BSP_UART0_TX_PIN + int "uart0 tx pin number" + range 0 31 + default 6 + endif config BSP_USING_UART1 bool "Enable UART1" default n - endif + endif + menu "On-chip flash config" + config MCU_FLASH_START_ADDRESS + hex "MCU FLASH START ADDRESS" + default 0x00000000 + + config MCU_FLASH_SIZE_KB + int "MCU FLASH SIZE, MAX size 1024 KB" + range 1 1024 + default 1024 + + config MCU_SRAM_START_ADDRESS + hex "MCU RAM START ADDRESS" + default 0x20000000 + + config MCU_SRAM_SIZE_KB + int "MCU RAM SIZE, MAX size 256 KB" + range 1 256 + default 256 + + config MCU_FLASH_PAGE_SIZE + hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000" + range 0x1000 0x1000 + default 0x1000 + endmenu endmenu endmenu diff --git a/bsp/nrf5x/nrf52840/board/board.h b/bsp/nrf5x/nrf52840/board/board.h index 021abe9f95..669f903e55 100644 --- a/bsp/nrf5x/nrf52840/board/board.h +++ b/bsp/nrf5x/nrf52840/board/board.h @@ -5,6 +5,11 @@ #include "nrf.h" +#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024 +#define MCU_FLASH_END_ADDRESS ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE)) +#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 +#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) + #if defined(__CC_ARM) || defined(__CLANG_ARM) extern int Image$$RW_IRAM1$$ZI$$Limit; #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) diff --git a/bsp/nrf5x/nrf52840/board/linker_scripts/link.sct b/bsp/nrf5x/nrf52840/board/linker_scripts/link.sct index 0200e96087..a2f8ebd922 100644 --- a/bsp/nrf5x/nrf52840/board/linker_scripts/link.sct +++ b/bsp/nrf5x/nrf52840/board/linker_scripts/link.sct @@ -2,13 +2,13 @@ ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* -LR_IROM1 0x0001F000 0x00061000 { ; load region size_region - ER_IROM1 0x0001F000 0x00061000 { ; load address = execution address +LR_IROM1 0x00000000 0x100000 { ; load region size_region + ER_IROM1 0x00000000 0x100000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200025F8 0x0000DA08 { ; RW data + RW_IRAM1 0x20000000 0x40000 { ; RW data .ANY (+RW +ZI) } } diff --git a/bsp/nrf5x/nrf52840/board/sdk_config.h b/bsp/nrf5x/nrf52840/board/sdk_config.h index aeffd2905c..68fb22ca70 100644 --- a/bsp/nrf5x/nrf52840/board/sdk_config.h +++ b/bsp/nrf5x/nrf52840/board/sdk_config.h @@ -11687,7 +11687,11 @@ // //========================================================== - +// NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver +//========================================================== +#ifndef NRFX_NVMC_ENABLED +#define NRFX_NVMC_ENABLED 1 +#endif // // diff --git a/bsp/nrf5x/nrf52840/project.uvoptx b/bsp/nrf5x/nrf52840/project.uvoptx index 7d8a5a4f97..ff162faafb 100644 --- a/bsp/nrf5x/nrf52840/project.uvoptx +++ b/bsp/nrf5x/nrf52840/project.uvoptx @@ -119,13 +119,13 @@ 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) + JL2CM3 + -U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) 0 - JL2CM3 - -U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) @@ -359,7 +359,7 @@ Applications - 1 + 0 0 0 0 @@ -379,7 +379,7 @@ Drivers - 1 + 0 0 0 0 @@ -411,7 +411,7 @@ nrfx - 1 + 0 0 0 0 diff --git a/bsp/nrf5x/nrf52840/project.uvprojx b/bsp/nrf5x/nrf52840/project.uvprojx index babb19e132..b1bf5b73cf 100644 --- a/bsp/nrf5x/nrf52840/project.uvprojx +++ b/bsp/nrf5x/nrf52840/project.uvprojx @@ -18,7 +18,7 @@ Nordic Semiconductor NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1 http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/ - IRAM(0x20000000,0x00040000) IROM(0x00000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE + IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)) @@ -275,7 +275,7 @@ 1 0x0 - 0xde000 + 0x100000 1 @@ -299,8 +299,8 @@ 0 - 0x200026c0 - 0x3d940 + 0x20000000 + 0x40000 0 diff --git a/bsp/nrf5x/nrf52840/template.uvoptx b/bsp/nrf5x/nrf52840/template.uvoptx index 2e5f9fc2ac..f567bf47e8 100644 --- a/bsp/nrf5x/nrf52840/template.uvoptx +++ b/bsp/nrf5x/nrf52840/template.uvoptx @@ -119,13 +119,13 @@ 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) + JL2CM3 + -U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) 0 - JL2CM3 - -U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm) diff --git a/bsp/nrf5x/nrf52840/template.uvprojx b/bsp/nrf5x/nrf52840/template.uvprojx index 9a8aa49622..62c5997a13 100644 --- a/bsp/nrf5x/nrf52840/template.uvprojx +++ b/bsp/nrf5x/nrf52840/template.uvprojx @@ -18,7 +18,7 @@ Nordic Semiconductor NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1 http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/ - IRAM(0x20000000,0x00040000) IROM(0x00000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 DSP CLOCK(12000000) ELITTLE + IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)) @@ -275,7 +275,7 @@ 1 0x0 - 0xde000 + 0x100000 1 @@ -299,8 +299,8 @@ 0 - 0x200026c0 - 0x3d940 + 0x20000000 + 0x40000 0 -- Gitee From 92ddb8b0f3897184e1a96679856d997f46161d5b Mon Sep 17 00:00:00 2001 From: whj4674672 Date: Sat, 2 May 2020 15:09:06 +0800 Subject: [PATCH 31/54] [bsp/stm32/stm32h743-atk-apollo]support stm32h7 uart dma --- .../HAL_Drivers/config/h7/dma_config.h | 91 +++---------------- .../HAL_Drivers/config/h7/uart_config.h | 64 +++++++------ bsp/stm32/libraries/HAL_Drivers/drv_dma.h | 3 +- bsp/stm32/libraries/HAL_Drivers/drv_usart.c | 8 +- bsp/stm32/stm32h743-atk-apollo/README.md | 2 +- bsp/stm32/stm32h743-atk-apollo/board/Kconfig | 10 ++ .../stm32h743-atk-apollo/board/drv_mpu.c | 4 + 7 files changed, 73 insertions(+), 109 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h index f716e23765..23b3a231c3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h @@ -7,6 +7,7 @@ * Date Author Notes * 2019-01-02 zylx first version * 2019-01-08 SummerGift clean up the code + * 2020-05-02 whj4674672 support stm32h7 dma1 and dma2 */ #ifndef __DMA_CONFIG_H__ @@ -19,27 +20,21 @@ extern "C" { #endif /* DMA1 stream0 */ -#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE) -#define SPI3_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler -#define SPI3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN -#define SPI3_RX_DMA_INSTANCE DMA1_Stream0 -#define SPI3_RX_DMA_CHANNEL DMA_CHANNEL_0 -#define SPI3_RX_DMA_IRQ DMA1_Stream0_IRQn -#elif defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE) -#define UART5_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler -#define UART5_RX_DMA_RCC RCC_AHB1ENR_DMA1EN -#define UART5_RX_DMA_INSTANCE DMA1_Stream0 -#define UART5_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART5_RX_DMA_IRQ DMA1_Stream0_IRQn +#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Stream0 +#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX +#define UART2_RX_DMA_IRQ DMA1_Stream0_IRQn #endif /* DMA1 stream1 */ -#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) -#define UART3_DMA_RX_IRQHandler DMA1_Stream1_IRQHandler -#define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN -#define UART3_RX_DMA_INSTANCE DMA1_Stream1 -#define UART3_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART3_RX_DMA_IRQ DMA1_Stream1_IRQn +#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE) +#define UART2_DMA_TX_IRQHandler DMA1_Stream1_IRQHandler +#define UART2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART2_TX_DMA_INSTANCE DMA1_Stream1 +#define UART2_TX_DMA_REQUEST DMA_REQUEST_USART2_TX +#define UART2_TX_DMA_IRQ DMA1_Stream1_IRQn #endif /* DMA1 stream2 */ @@ -49,12 +44,6 @@ extern "C" { #define SPI3_RX_DMA_INSTANCE DMA1_Stream2 #define SPI3_RX_DMA_CHANNEL DMA_CHANNEL_0 #define SPI3_RX_DMA_IRQ DMA1_Stream2_IRQn -#elif defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) -#define UART4_DMA_RX_IRQHandler DMA1_Stream2_IRQHandler -#define UART4_RX_DMA_RCC RCC_AHB1ENR_DMA1EN -#define UART4_RX_DMA_INSTANCE DMA1_Stream2 -#define UART4_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART4_RX_DMA_IRQ DMA1_Stream2_IRQn #endif /* DMA1 stream3 */ @@ -83,12 +72,6 @@ extern "C" { #define SPI3_TX_DMA_INSTANCE DMA1_Stream5 #define SPI3_TX_DMA_CHANNEL DMA_CHANNEL_0 #define SPI3_TX_DMA_IRQ DMA1_Stream5_IRQn -#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) -#define UART2_DMA_RX_IRQHandler DMA1_Stream5_IRQHandler -#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN -#define UART2_RX_DMA_INSTANCE DMA1_Stream5 -#define UART2_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART2_RX_DMA_IRQ DMA1_Stream5_IRQn #endif /* DMA1 stream6 */ @@ -109,12 +92,6 @@ extern "C" { #define SPI1_RX_DMA_INSTANCE DMA2_Stream0 #define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn -#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) -#define SPI4_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler -#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI4_RX_DMA_INSTANCE DMA2_Stream0 -#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define SPI4_RX_DMA_IRQ DMA2_Stream0_IRQn #endif /* DMA2 stream1 */ @@ -133,18 +110,6 @@ extern "C" { #define SPI1_RX_DMA_INSTANCE DMA2_Stream2 #define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn -#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) -#define UART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler -#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define UART1_RX_DMA_INSTANCE DMA2_Stream2 -#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART1_RX_DMA_IRQ DMA2_Stream2_IRQn -#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) -#define QSPI_DMA_IRQHandler DMA2_Stream2_IRQHandler -#define QSPI_DMA_RCC RCC_AHB1ENR_DMA2EN -#define QSPI_DMA_INSTANCE DMA2_Stream2 -#define QSPI_DMA_CHANNEL DMA_CHANNEL_11 -#define QSPI_DMA_IRQ DMA2_Stream2_IRQn #endif /* DMA2 stream3 */ @@ -154,18 +119,6 @@ extern "C" { #define SPI5_RX_DMA_INSTANCE DMA2_Stream3 #define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_2 #define SPI5_RX_DMA_IRQ DMA2_Stream3_IRQn -#elif defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) -#define SPI1_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler -#define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI1_TX_DMA_INSTANCE DMA2_Stream3 -#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3 -#define SPI1_TX_DMA_IRQ DMA2_Stream3_IRQn -#elif defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_INSTANCE) -#define SPI4_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler -#define SPI4_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI4_RX_DMA_INSTANCE DMA2_Stream3 -#define SPI4_RX_DMA_CHANNEL DMA_CHANNEL_5 -#define SPI4_RX_DMA_IRQ DMA2_Stream3_IRQn #endif /* DMA2 stream4 */ @@ -175,12 +128,6 @@ extern "C" { #define SPI5_TX_DMA_INSTANCE DMA2_Stream4 #define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_2 #define SPI5_TX_DMA_IRQ DMA2_Stream4_IRQn -#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE) -#define SPI4_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler -#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI4_TX_DMA_INSTANCE DMA2_Stream4 -#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_5 -#define SPI4_TX_DMA_IRQ DMA2_Stream4_IRQn #endif /* DMA2 stream5 */ @@ -190,18 +137,6 @@ extern "C" { #define SPI1_TX_DMA_INSTANCE DMA2_Stream5 #define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3 #define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn -#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) -#define UART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler -#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define UART1_RX_DMA_INSTANCE DMA2_Stream5 -#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4 -#define UART1_RX_DMA_IRQ DMA2_Stream5_IRQn -#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE) -#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler -#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN -#define SPI5_RX_DMA_INSTANCE DMA2_Stream5 -#define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_7 -#define SPI5_RX_DMA_IRQ DMA2_Stream5_IRQn #endif /* DMA2 stream6 */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h index 2fefa1344c..6ae67d4a2f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h @@ -7,6 +7,7 @@ * Date Author Notes * 2018-10-30 SummerGift first version * 2019-01-05 zylx modify dma support + * 2020-05-02 whj4674672 support stm32h7 uart dma */ #ifndef __UART_CONFIG_H__ @@ -31,12 +32,12 @@ extern "C" { #if defined(BSP_UART1_RX_USING_DMA) #ifndef UART1_DMA_RX_CONFIG -#define UART1_DMA_RX_CONFIG \ +#define UART1_DMA_RX_CONFIG \ { \ - .Instance = UART1_RX_DMA_INSTANCE, \ - .channel = UART1_RX_DMA_CHANNEL, \ - .dma_rcc = UART1_RX_DMA_RCC, \ - .dma_irq = UART1_RX_DMA_IRQ, \ + .Instance = UART1_RX_DMA_INSTANCE, \ + .request = UART1_RX_DMA_REQUEST, \ + .dma_rcc = UART1_RX_DMA_RCC, \ + .dma_irq = UART1_RX_DMA_IRQ, \ } #endif /* UART1_DMA_RX_CONFIG */ #endif /* BSP_UART1_RX_USING_DMA */ @@ -54,16 +55,27 @@ extern "C" { #if defined(BSP_UART2_RX_USING_DMA) #ifndef UART2_DMA_RX_CONFIG -#define UART2_DMA_RX_CONFIG \ +#define UART2_DMA_RX_CONFIG \ { \ - .Instance = UART2_RX_DMA_INSTANCE, \ - .channel = UART2_RX_DMA_CHANNEL, \ - .dma_rcc = UART2_RX_DMA_RCC, \ - .dma_irq = UART2_RX_DMA_IRQ, \ + .Instance = UART2_RX_DMA_INSTANCE, \ + .request = UART2_RX_DMA_REQUEST, \ + .dma_rcc = UART2_RX_DMA_RCC, \ + .dma_irq = UART2_RX_DMA_IRQ, \ } #endif /* UART2_DMA_RX_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ - +#if defined(BSP_UART2_TX_USING_DMA) +#ifndef UART2_DMA_TX_CONFIG +#define UART2_DMA_TX_CONFIG \ + { \ + .Instance = UART2_TX_DMA_INSTANCE, \ + .request = UART2_TX_DMA_REQUEST, \ + .dma_rcc = UART2_TX_DMA_RCC, \ + .dma_irq = UART2_TX_DMA_IRQ, \ + } +#endif /* UART2_DMA_TX_CONFIG */ +#endif /* BSP_UART2_TX_USING_DMA */ + #if defined(BSP_USING_UART3) #ifndef UART3_CONFIG #define UART3_CONFIG \ @@ -77,12 +89,12 @@ extern "C" { #if defined(BSP_UART3_RX_USING_DMA) #ifndef UART3_DMA_RX_CONFIG -#define UART3_DMA_RX_CONFIG \ +#define UART3_DMA_RX_CONFIG \ { \ - .Instance = UART3_RX_DMA_INSTANCE, \ - .channel = UART3_RX_DMA_CHANNEL, \ - .dma_rcc = UART3_RX_DMA_RCC, \ - .dma_irq = UART3_RX_DMA_IRQ, \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .request = UART3_RX_DMA_REQUEST, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ } #endif /* UART3_DMA_RX_CONFIG */ #endif /* BSP_UART3_RX_USING_DMA */ @@ -100,12 +112,12 @@ extern "C" { #if defined(BSP_UART4_RX_USING_DMA) #ifndef UART4_DMA_RX_CONFIG -#define UART4_DMA_RX_CONFIG \ +#define UART4_DMA_RX_CONFIG \ { \ - .Instance = UART4_RX_DMA_INSTANCE, \ - .channel = UART4_RX_DMA_CHANNEL, \ - .dma_rcc = UART4_RX_DMA_RCC, \ - .dma_irq = UART4_RX_DMA_IRQ, \ + .Instance = UART4_RX_DMA_INSTANCE, \ + .request = UART4_RX_DMA_REQUEST, \ + .dma_rcc = UART4_RX_DMA_RCC, \ + .dma_irq = UART4_RX_DMA_IRQ, \ } #endif /* UART4_DMA_RX_CONFIG */ #endif /* BSP_UART4_RX_USING_DMA */ @@ -123,12 +135,12 @@ extern "C" { #if defined(BSP_UART5_RX_USING_DMA) #ifndef UART5_DMA_RX_CONFIG -#define UART5_DMA_RX_CONFIG \ +#define UART5_DMA_RX_CONFIG \ { \ - .Instance = UART5_RX_DMA_INSTANCE, \ - .channel = UART5_RX_DMA_CHANNEL, \ - .dma_rcc = UART5_RX_DMA_RCC, \ - .dma_irq = UART5_RX_DMA_IRQ, \ + .Instance = UART5_RX_DMA_INSTANCE, \ + .request = UART5_RX_DMA_REQUEST, \ + .dma_rcc = UART5_RX_DMA_RCC, \ + .dma_irq = UART5_RX_DMA_IRQ, \ } #endif /* UART5_DMA_RX_CONFIG */ #endif /* BSP_UART5_RX_USING_DMA */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 934579349a..256068d5e1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -35,7 +35,8 @@ struct dma_config { rt_uint32_t channel; #endif -#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) +#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\ + || defined(SOC_SERIES_STM32H7) rt_uint32_t request; #endif }; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index faf010c138..428efbe539 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -8,6 +8,7 @@ * 2018-10-30 SummerGift first version * 2020-03-16 SummerGift add device close feature * 2020-03-20 SummerGift fix bug caused by ORE + * 2020-05-02 whj4674672 support stm32h7 uart dma */ #include "board.h" @@ -864,7 +865,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) SET_BIT(RCC->AHBENR, dma_config->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc); #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) \ - || defined(SOC_SERIES_STM32G4) + || defined(SOC_SERIES_STM32G4)|| defined(SOC_SERIES_STM32H7) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc); tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc); @@ -892,7 +893,8 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) DMA_Handle->Instance = dma_config->Instance; DMA_Handle->Init.Channel = dma_config->channel; -#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\ + || defined(SOC_SERIES_STM32H7) DMA_Handle->Instance = dma_config->Instance; DMA_Handle->Init.Request = dma_config->request; #endif @@ -913,7 +915,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) } DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM; -#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) +#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7) DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE; #endif if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK) diff --git a/bsp/stm32/stm32h743-atk-apollo/README.md b/bsp/stm32/stm32h743-atk-apollo/README.md index 55d34341ec..b2606a7774 100644 --- a/bsp/stm32/stm32h743-atk-apollo/README.md +++ b/bsp/stm32/stm32h743-atk-apollo/README.md @@ -117,7 +117,7 @@ msh > ## 注意事项 -暂无 +1. 使用UART2 DMA模式时,HEAP的CACHE策略设置了WT模式,所以在使用rt_device_read读取数据之前必须调用用SCB_InvalidateDCache_by_Addr或者SCB_InvalidateDCache,已确保读取到数据的正确性。 ## 联系人信息 diff --git a/bsp/stm32/stm32h743-atk-apollo/board/Kconfig b/bsp/stm32/stm32h743-atk-apollo/board/Kconfig index 1e0e391ee6..8fc1fb5789 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/Kconfig +++ b/bsp/stm32/stm32h743-atk-apollo/board/Kconfig @@ -56,6 +56,16 @@ menu "On-chip Peripheral Drivers" config BSP_USING_UART2 bool "Enable UART2" default n + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_UART2_TX_USING_DMA + bool "Enable UART2 TX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n endif config BSP_USING_FMC diff --git a/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c b/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c index 088d7a0bb7..5f4d8b1b80 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c @@ -52,6 +52,10 @@ int mpu_init(void) /* Enable the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); + /* Enable CACHE */ + SCB_EnableICache(); + SCB_EnableDCache(); + return 0; } -- Gitee From c0ed7f6e897b2ef3651605e0e33ceea6d43beaed Mon Sep 17 00:00:00 2001 From: luhuadong Date: Mon, 4 May 2020 23:00:41 +0800 Subject: [PATCH 32/54] [BSP] correct stm32l412-st-nucleo capacity info --- bsp/stm32/stm32l412-st-nucleo/board/Kconfig | 4 ++-- .../board/linker_scripts/link.lds | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/board/Kconfig b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig index 339e77bea4..10d3a3ad30 100644 --- a/bsp/stm32/stm32l412-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l412-st-nucleo/board/Kconfig @@ -8,7 +8,7 @@ config SOC_STM32L412RB default y menu "Onboard Peripheral Drivers" - config BSP_USING_STLINK_TO_USART + config BSP_USING_STLINK_TO_USART bool "Enable STLINK TO USART (uart2)" select BSP_USING_UART select BSP_USING_UART2 @@ -22,7 +22,7 @@ menu "On-chip Peripheral Drivers" select RT_USING_PIN default y - menuconfig BSP_USING_UART + menuconfig BSP_USING_UART bool "Enable UART" default y select RT_USING_SERIAL diff --git a/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds index a20112b7ef..77624514bf 100644 --- a/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds +++ b/bsp/stm32/stm32l412-st-nucleo/board/linker_scripts/link.lds @@ -5,9 +5,9 @@ /* Program Entry, set to mark it as "used" and avoid gc */ MEMORY { - ROM (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256KB flash */ - RAM1 (rw) : ORIGIN = 0x20000000, LENGTH = 48k /* 48K sram */ - RAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 16k /* 16K sram */ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128k /* 128KB flash */ + RAM1 (rw) : ORIGIN = 0x20000000, LENGTH = 32k /* 32K sram */ + RAM2 (rw) : ORIGIN = 0x10000000, LENGTH = 8k /* 8K sram */ } ENTRY(Reset_Handler) _system_stack_size = 0x200; @@ -90,7 +90,7 @@ SECTIONS . = ALIGN(4); /* This is used by the startup in order to initialize the .data secion */ _edata = . ; - } >RAM2 + } >RAM1 .stack : { @@ -99,7 +99,7 @@ SECTIONS . = . + _system_stack_size; . = ALIGN(4); _estack = .; - } >RAM2 + } >RAM1 __bss_start = .; .bss : @@ -117,7 +117,7 @@ SECTIONS _ebss = . ; *(.bss.init) - } > RAM2 + } > RAM1 __bss_end = .; _end = .; -- Gitee From 979cec4af67010a1ebd31ce71b5f9f92840e7c0c Mon Sep 17 00:00:00 2001 From: supperthomas <78900636@qq.com> Date: Tue, 5 May 2020 13:18:01 +0800 Subject: [PATCH 33/54] [nrfx] add the qspi_flash of nordic pdk --- bsp/nrf5x/libraries/drivers/SConscript | 3 + bsp/nrf5x/libraries/drivers/drv_flash.c | 14 +- bsp/nrf5x/libraries/drivers/drv_flash.h | 29 ---- bsp/nrf5x/libraries/drivers/drv_qspi_flash.c | 153 +++++++++++++++++++ bsp/nrf5x/nrf52840/board/Kconfig | 89 ++++++++--- bsp/nrf5x/nrf52840/board/fal_cfg.h | 82 ++++++++++ bsp/nrf5x/nrf52840/board/sdk_config.h | 8 +- 7 files changed, 317 insertions(+), 61 deletions(-) delete mode 100644 bsp/nrf5x/libraries/drivers/drv_flash.h create mode 100644 bsp/nrf5x/libraries/drivers/drv_qspi_flash.c create mode 100644 bsp/nrf5x/nrf52840/board/fal_cfg.h diff --git a/bsp/nrf5x/libraries/drivers/SConscript b/bsp/nrf5x/libraries/drivers/SConscript index 1fcca26f99..8e04139a8c 100644 --- a/bsp/nrf5x/libraries/drivers/SConscript +++ b/bsp/nrf5x/libraries/drivers/SConscript @@ -14,6 +14,9 @@ if GetDepend(['BSP_USING_UART']): if GetDepend(['BSP_USING_ON_CHIP_FLASH']): src += ['drv_flash.c'] +if GetDepend(['BSP_USING_QSPI_FLASH']): + src += ['drv_qspi_flash.c'] + path = [cwd] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) diff --git a/bsp/nrf5x/libraries/drivers/drv_flash.c b/bsp/nrf5x/libraries/drivers/drv_flash.c index 412dc1f82a..727bbeda78 100644 --- a/bsp/nrf5x/libraries/drivers/drv_flash.c +++ b/bsp/nrf5x/libraries/drivers/drv_flash.c @@ -13,8 +13,6 @@ #include "nrfx_nvmc.h" #ifdef BSP_USING_ON_CHIP_FLASH -//#include "drv_config.h" -#include "drv_flash.h" #if defined(PKG_USING_FAL) #include "fal.h" @@ -163,8 +161,6 @@ static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size); static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size); static int fal_flash_erase(long offset, size_t size); -const struct fal_flash_dev mcu_onchip_flash = {"mcu_onchip", MCU_FLASH_START_ADDRESS, MCU_FLASH_SIZE, MCU_FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase} }; - static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size) { return mcu_flash_read(mcu_onchip_flash.addr + offset, buf, size); @@ -179,6 +175,14 @@ static int fal_flash_erase(long offset, size_t size) { return mcu_flash_erase(mcu_onchip_flash.addr + offset, size); } - +const struct fal_flash_dev mcu_onchip_flash = +{ + .name = ON_CHIP_FLASH_DEV_NAME, + .addr = MCU_FLASH_START_ADDRESS, + .len = MCU_FLASH_SIZE, + .blk_size = MCU_FLASH_PAGE_SIZE, + .ops = {NULL, fal_flash_read, fal_flash_write, fal_flash_erase}, + .write_gran = 8 +}; #endif #endif /* BSP_USING_ON_CHIP_FLASH */ diff --git a/bsp/nrf5x/libraries/drivers/drv_flash.h b/bsp/nrf5x/libraries/drivers/drv_flash.h deleted file mode 100644 index 97a524beff..0000000000 --- a/bsp/nrf5x/libraries/drivers/drv_flash.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2020-04-29 supperthomas first version - */ - -#ifndef __DRV_FLASH_H__ -#define __DRV_FLASH_H__ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -int nrfx_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size); -int nrfx_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size); -int nrfx_flash_erase(rt_uint32_t addr, size_t size); - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/nrf5x/libraries/drivers/drv_qspi_flash.c b/bsp/nrf5x/libraries/drivers/drv_qspi_flash.c new file mode 100644 index 0000000000..18e6671a96 --- /dev/null +++ b/bsp/nrf5x/libraries/drivers/drv_qspi_flash.c @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-04-29 supperthomas first version + * + */ +#include +#include "board.h" +#include "nrfx_qspi.h" +#if defined(PKG_USING_FAL) +#include + +//log +#include +#define LOG_TAG "drv.qspiflash" + +#define WAIT_FOR_PERIPH() do { \ + while (!m_finished) {} \ + m_finished = false; \ + } while (0) + +static volatile bool m_finished = false; +static void qspi_handler(nrfx_qspi_evt_t event, void *p_context) +{ + m_finished = true; +} + +static void configure_memory() +{ +#define QSPI_STD_CMD_WRSR 0x01 +#define QSPI_STD_CMD_RSTEN 0x66 +#define QSPI_STD_CMD_RST 0x99 + + uint8_t temporary = 0x40; + uint32_t err_code; + nrf_qspi_cinstr_conf_t cinstr_cfg = + { + .opcode = QSPI_STD_CMD_RSTEN, + .length = NRF_QSPI_CINSTR_LEN_1B, + .io2_level = true, + .io3_level = true, + .wipwait = true, + .wren = true + }; + + // Send reset enable + err_code = nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL); + if (NRFX_SUCCESS != err_code) + { + LOG_E("\r\n ERROR: QSPI_STD_CMD_RSTEN:0x%x\n", err_code); + return ; + } + // Send reset command + cinstr_cfg.opcode = QSPI_STD_CMD_RST; + err_code = nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL); + if (NRFX_SUCCESS != err_code) + { + LOG_E("\r\n ERROR: QSPI_STD_CMD_RST:0x%x\n", err_code); + return ; + } + + // Switch to qspi mode + cinstr_cfg.opcode = QSPI_STD_CMD_WRSR; + cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_2B; + err_code = nrfx_qspi_cinstr_xfer(&cinstr_cfg, &temporary, NULL); + if (NRFX_SUCCESS != err_code) + { + LOG_E("\r\n ERROR: QSPI_STD_CMD_WRSR:0x%x\n", err_code); + return; + } +} +static int init(void) +{ + uint32_t err_code; + nrfx_qspi_config_t config = NRFX_QSPI_DEFAULT_CONFIG(BSP_QSPI_SCK_PIN, BSP_QSPI_CSN_PIN, + BSP_QSPI_IO0_PIN, BSP_QSPI_IO1_PIN, BSP_QSPI_IO2_PIN, BSP_QSPI_IO3_PIN); + + err_code = nrfx_qspi_init(&config, qspi_handler, NULL); + if (NRFX_SUCCESS != err_code) + { + LOG_E("\r\n ERROR: QSPI_init:0x%x\n", err_code); + return -1; + } + configure_memory(); + return 0; +} + +static int read(long offset, uint8_t *buf, size_t size) +{ + uint32_t err_code; + m_finished = false; + err_code = nrfx_qspi_read(buf, size, offset); + WAIT_FOR_PERIPH(); + if (NRFX_SUCCESS == err_code) + { + return size; + } + else + { + LOG_E("\r\n ERROR: read:0x%x\n", err_code); + return -1; + } +} + +static int write(long offset, const uint8_t *buf, size_t size) +{ + uint32_t err_code; + m_finished = false; + err_code = nrfx_qspi_write(buf, size, offset); + WAIT_FOR_PERIPH(); + if (NRFX_SUCCESS == err_code) + { + return size; + } + else + { + LOG_E("\r\n ERROR: write:0x%x\n", err_code); + return -1; + } +} + +static int erase(long offset, size_t size) +{ + uint32_t err_code; + m_finished = false; + err_code = nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_64KB, offset); + WAIT_FOR_PERIPH(); + if (NRFX_SUCCESS == err_code) + { + return size; + } + else + { + LOG_E("\r\n ERROR: erase:0x%x\n", err_code); + return -1; + } +} + +struct fal_flash_dev nor_flash0 = +{ + .name = NOR_FLASH_DEV_NAME, + .addr = 0, + .len = QSPI_FLASH_SIZE_KB * 1024, + .blk_size = 4096, + .ops = {init, read, write, erase}, + .write_gran = 1 +}; + +#endif diff --git a/bsp/nrf5x/nrf52840/board/Kconfig b/bsp/nrf5x/nrf52840/board/Kconfig index 9e48009cf6..8e6f6043f8 100644 --- a/bsp/nrf5x/nrf52840/board/Kconfig +++ b/bsp/nrf5x/nrf52840/board/Kconfig @@ -13,6 +13,41 @@ menu "Onboard Peripheral Drivers" select BSP_USING_UART select BSP_USING_UART0 default y + + menuconfig BSP_USING_QSPI_FLASH + select PKG_USING_FAL + bool "Enable QSPI FLASH(MX25R64 8MB)" + default n + + if BSP_USING_QSPI_FLASH + config BSP_QSPI_SCK_PIN + int "QSPI SCK pin number" + range 0 31 + default 19 + config BSP_QSPI_CSN_PIN + int "QSPI CSN pin number" + range 0 31 + default 17 + config BSP_QSPI_IO0_PIN + int "QSPI IO0 pin number" + range 0 31 + default 20 + config BSP_QSPI_IO1_PIN + int "QSPI IO1 pin number" + range 0 31 + default 21 + config BSP_QSPI_IO2_PIN + int "QSPI IO2 pin number" + range 0 31 + default 22 + config BSP_QSPI_IO3_PIN + int "QSPI IO3 pin number" + range 0 31 + default 23 + config QSPI_FLASH_SIZE_KB + int "QSPI FLASH SIZE, DEFAULT size 8192 KB" + default 8192 + endif endmenu menu "On-chip Peripheral Drivers" @@ -44,29 +79,37 @@ menu "On-chip Peripheral Drivers" bool "Enable UART1" default n endif - menu "On-chip flash config" - config MCU_FLASH_START_ADDRESS - hex "MCU FLASH START ADDRESS" - default 0x00000000 - - config MCU_FLASH_SIZE_KB - int "MCU FLASH SIZE, MAX size 1024 KB" - range 1 1024 - default 1024 - - config MCU_SRAM_START_ADDRESS - hex "MCU RAM START ADDRESS" - default 0x20000000 - - config MCU_SRAM_SIZE_KB - int "MCU RAM SIZE, MAX size 256 KB" - range 1 256 - default 256 - - config MCU_FLASH_PAGE_SIZE - hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000" - range 0x1000 0x1000 - default 0x1000 + + config BSP_USING_ON_CHIP_FLASH + select PKG_USING_FAL + bool "Enable on-chip FLASH" + default n + + menu "On-chip flash config" + + + config MCU_FLASH_START_ADDRESS + hex "MCU FLASH START ADDRESS" + default 0x00000000 + + config MCU_FLASH_SIZE_KB + int "MCU FLASH SIZE, MAX size 1024 KB" + range 1 1024 + default 1024 + + config MCU_SRAM_START_ADDRESS + hex "MCU RAM START ADDRESS" + default 0x20000000 + + config MCU_SRAM_SIZE_KB + int "MCU RAM SIZE, MAX size 256 KB" + range 1 256 + default 256 + + config MCU_FLASH_PAGE_SIZE + hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000" + range 0x1000 0x1000 + default 0x1000 endmenu endmenu diff --git a/bsp/nrf5x/nrf52840/board/fal_cfg.h b/bsp/nrf5x/nrf52840/board/fal_cfg.h new file mode 100644 index 0000000000..42611e0c13 --- /dev/null +++ b/bsp/nrf5x/nrf52840/board/fal_cfg.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2006-2020, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-05-05 supperthomas this is sample you can change by yourself + * + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +#if (defined(BSP_USING_QSPI_FLASH)&&defined(BSP_USING_ON_CHIP_FLASH)) + +#define ON_CHIP_FLASH_DEV_NAME "mcu_onchip" +#define NOR_FLASH_DEV_NAME "norflash0" + +extern const struct fal_flash_dev mcu_onchip_flash; +extern struct fal_flash_dev nor_flash0; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ + { \ + &mcu_onchip_flash, \ + &nor_flash0, \ + } +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG +/* partition table */ +#define FAL_PART_TABLE \ + { \ + {FAL_PART_MAGIC_WORD, "bl", ON_CHIP_FLASH_DEV_NAME, 0, 64*1024, 0}, \ + {FAL_PART_MAGIC_WORD, "app_flash", ON_CHIP_FLASH_DEV_NAME, 64*1024, 960*1024, 0}, \ + {FAL_PART_MAGIC_WORD, "nor_flash_part_0", NOR_FLASH_DEV_NAME, 0, 1024*1024, 0}, \ + {FAL_PART_MAGIC_WORD, "nor_flash_part_1", NOR_FLASH_DEV_NAME, 1024*1024, 7*1024*1024, 0}, \ + } +#endif /* FAL_PART_HAS_TABLE_CFG */ + +#elif defined(BSP_USING_QSPI_FLASH) + +#define NOR_FLASH_DEV_NAME "norflash0" +extern struct fal_flash_dev nor_flash0; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ + { \ + &nor_flash0, \ + } +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG +/* partition table */ +#define FAL_PART_TABLE \ + { \ + {FAL_PART_MAGIC_WORD, "nor_flash_part_0", NOR_FLASH_DEV_NAME, 0, 1024*1024, 0}, \ + {FAL_PART_MAGIC_WORD, "nor_flash_part_1", NOR_FLASH_DEV_NAME, 1024*1024, 7*1024*1024, 0}, \ + } +#endif +#elif defined(BSP_USING_ON_CHIP_FLASH) +extern const struct fal_flash_dev mcu_onchip_flash; +#define ON_CHIP_FLASH_DEV_NAME "mcu_onchip" +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ + { \ + &mcu_onchip_flash, \ + } +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG +/* partition table */ +#define FAL_PART_TABLE \ + { \ + {FAL_PART_MAGIC_WORD, "bl", ON_CHIP_FLASH_DEV_NAME, 0, 64*1024, 0}, \ + {FAL_PART_MAGIC_WORD, "app_flash", ON_CHIP_FLASH_DEV_NAME, 64*1024, 960*1024, 0}, \ + } +#endif +#endif + +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/nrf5x/nrf52840/board/sdk_config.h b/bsp/nrf5x/nrf52840/board/sdk_config.h index 68fb22ca70..75efba927a 100644 --- a/bsp/nrf5x/nrf52840/board/sdk_config.h +++ b/bsp/nrf5x/nrf52840/board/sdk_config.h @@ -2902,7 +2902,7 @@ // NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver //========================================================== #ifndef NRFX_QSPI_ENABLED -#define NRFX_QSPI_ENABLED 0 +#define NRFX_QSPI_ENABLED 1 #endif // NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> @@ -3010,7 +3010,7 @@ #define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED #endif -// NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 @@ -3021,8 +3021,8 @@ // <6=> 6 // <7=> 7 -#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY -#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 6 +#ifndef NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // -- Gitee From dff597e68c0c57f553c080d020ac40e6f53eea51 Mon Sep 17 00:00:00 2001 From: ousugo Date: Tue, 5 May 2020 15:13:11 +0800 Subject: [PATCH 34/54] fix led0 --> led1 --- bsp/stm32/stm32f103-atk-warshipv3/applications/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c index ab323bcb8c..140fb13c73 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c +++ b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c @@ -14,7 +14,7 @@ /* defined the LED0 pin: PB5 */ #define LED0_PIN GET_PIN(B, 5) -/* defined the LED0 pin: PE5 */ +/* defined the LED1 pin: PE5 */ #define LED1_PIN GET_PIN(E, 5) int main(void) -- Gitee From cc16f69d8ece3395f2bbac917d94e2778b68c28a Mon Sep 17 00:00:00 2001 From: luhuadong Date: Wed, 6 May 2020 11:23:15 +0800 Subject: [PATCH 35/54] add bsp stm32/stm32l412-st-nucleo --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index 8b4f03006a..cd1f6f8886 100644 --- a/.travis.yml +++ b/.travis.yml @@ -109,6 +109,7 @@ env: - RTT_BSP='stm32/stm32l4r9-st-eval' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l010-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l053-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' + - RTT_BSP='stm32/stm32l412-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l432-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l475-atk-pandora' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32l475-st-discovery' RTT_TOOL_CHAIN='sourcery-arm' -- Gitee From 783cf540873297ba6b78161dee4a6dc545abcd54 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 14:53:15 +0800 Subject: [PATCH 36/54] [del] stm32 dist handle in mkdist.py --- tools/mkdist.py | 9 --------- 1 file changed, 9 deletions(-) diff --git a/tools/mkdist.py b/tools/mkdist.py index d83020f755..e190123e6c 100644 --- a/tools/mkdist.py +++ b/tools/mkdist.py @@ -336,15 +336,6 @@ def MkDist(program, BSP_ROOT, RTT_ROOT, Env, rttide = None): print('=> %s' % os.path.basename(BSP_ROOT)) bsp_copy_files(BSP_ROOT, dist_dir) - # copy stm32 bsp libiary files - if os.path.basename(os.path.dirname(BSP_ROOT)) == 'stm32': - print("=> copy stm32 bsp library") - library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') - library_dir = os.path.join(dist_dir, 'libraries') - bsp_copy_files(os.path.join(library_path, 'HAL_Drivers'), os.path.join(library_dir, 'HAL_Drivers')) - bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) - shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) - # copy nuclei bsp libiary files if os.path.basename(os.path.dirname(BSP_ROOT)) == 'nuclei': print("=> copy nuclei bsp library") -- Gitee From daf43f7443a7d51994ccfd83ac378f53d0bde923 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 14:54:57 +0800 Subject: [PATCH 37/54] [add] stm32 sdk_dist.py --- bsp/stm32/tools/sdk_dist.py | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 bsp/stm32/tools/sdk_dist.py diff --git a/bsp/stm32/tools/sdk_dist.py b/bsp/stm32/tools/sdk_dist.py new file mode 100644 index 0000000000..cd04eb6900 --- /dev/null +++ b/bsp/stm32/tools/sdk_dist.py @@ -0,0 +1,20 @@ +import os +import sys +import shutil +cwd_path = os.getcwd() +sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) + +# BSP dist function +def dist_do_building(BSP_ROOT): + from mkdist import bsp_copy_files + import rtconfig + + dist_dir = os.path.join(BSP_ROOT, 'dist', os.path.basename(BSP_ROOT)) + library_dir = os.path.join(dist_dir, 'libraries') + + print("=> copy stm32 bsp library") + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') + bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE), os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE)) + print("=> copy bsp drivers") + bsp_copy_files(os.path.join(library_path, 'HAL_Drivers'), os.path.join(library_dir, 'HAL_Drivers')) + shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) \ No newline at end of file -- Gitee From b74ec1ec8c752b08a0e856cb9b123ab3fcbef294 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 15:04:11 +0800 Subject: [PATCH 38/54] [add] stm32 bsp dist handle in rtconfig.py --- bsp/stm32/libraries/templates/stm32f0xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32f10x/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32f2xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32f4xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32h7xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32l1xx/rtconfig.py | 7 +++++++ bsp/stm32/libraries/templates/stm32l4xx/rtconfig.py | 7 +++++++ bsp/stm32/stm32f072-st-nucleo/rtconfig.py | 8 ++++++++ bsp/stm32/stm32f091-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-atk-nano/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-dofly-M3S/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-dofly-lyc8/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-fire-arbitrary/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-hw100k-ibox/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-mini-system/rtconfig.py | 7 +++++++ bsp/stm32/stm32f103-yf-ufun/rtconfig.py | 7 +++++++ bsp/stm32/stm32f107-uc-eval/rtconfig.py | 7 +++++++ bsp/stm32/stm32f401-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.py | 7 +++++++ bsp/stm32/stm32f407-atk-explorer/rtconfig.py | 7 +++++++ bsp/stm32/stm32f407-st-discovery/rtconfig.py | 7 +++++++ bsp/stm32/stm32f410-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f411-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f411-weact-MiniF4/rtconfig.py | 7 +++++++ bsp/stm32/stm32f412-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f427-robomaster-a/rtconfig.py | 7 +++++++ bsp/stm32/stm32f429-armfly-v6/rtconfig.py | 7 +++++++ bsp/stm32/stm32f429-atk-apollo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f429-fire-challenger/rtconfig.py | 7 +++++++ bsp/stm32/stm32f429-st-disco/rtconfig.py | 7 +++++++ bsp/stm32/stm32f446-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32f469-st-disco/rtconfig.py | 7 +++++++ bsp/stm32/stm32f767-atk-apollo/rtconfig.py | 9 ++++++++- bsp/stm32/stm32f767-fire-challenger/rtconfig.py | 9 ++++++++- bsp/stm32/stm32f769-st-disco/rtconfig.py | 7 +++++++ bsp/stm32/stm32g071-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32g431-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32h743-atk-apollo/rtconfig.py | 7 +++++++ bsp/stm32/stm32h743-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32h747-st-discovery/rtconfig.py | 7 +++++++ bsp/stm32/stm32h750-armfly-h7-tool/rtconfig.py | 7 +++++++ bsp/stm32/stm32l010-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l053-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l432-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l452-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l475-atk-pandora/rtconfig.py | 7 +++++++ bsp/stm32/stm32l475-st-discovery/rtconfig.py | 7 +++++++ bsp/stm32/stm32l476-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l496-ali-developer/rtconfig.py | 7 +++++++ bsp/stm32/stm32l496-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l4r5-st-nucleo/rtconfig.py | 7 +++++++ bsp/stm32/stm32l4r9-st-eval/rtconfig.py | 7 +++++++ 55 files changed, 388 insertions(+), 2 deletions(-) diff --git a/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.py index bbc6a35774..395d83ca99 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32f10x/rtconfig.py b/bsp/stm32/libraries/templates/stm32f10x/rtconfig.py index fa46b74340..46b00c62cd 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32f10x/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32f2xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32f2xx/rtconfig.py index 72f931202c..5b3a3f31f0 100644 --- a/bsp/stm32/libraries/templates/stm32f2xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32f2xx/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py index 21d8e13bb3..cf4cf47fe0 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py @@ -140,3 +140,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32h7xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32h7xx/rtconfig.py index ef6708f653..780275b28c 100644 --- a/bsp/stm32/libraries/templates/stm32h7xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32h7xx/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32l1xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32l1xx/rtconfig.py index 8b60665034..0450b21fcd 100644 --- a/bsp/stm32/libraries/templates/stm32l1xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32l1xx/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.py b/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.py index 2e022a964b..deb2083359 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.py +++ b/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f072-st-nucleo/rtconfig.py b/bsp/stm32/stm32f072-st-nucleo/rtconfig.py index bbc6a35774..8d8cd61658 100644 --- a/bsp/stm32/stm32f072-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f072-st-nucleo/rtconfig.py @@ -141,3 +141,11 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) + diff --git a/bsp/stm32/stm32f091-st-nucleo/rtconfig.py b/bsp/stm32/stm32f091-st-nucleo/rtconfig.py index bbc6a35774..395d83ca99 100644 --- a/bsp/stm32/stm32f091-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f091-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-atk-nano/rtconfig.py b/bsp/stm32/stm32f103-atk-nano/rtconfig.py index 9ace3b0a3c..b8509ee7a0 100644 --- a/bsp/stm32/stm32f103-atk-nano/rtconfig.py +++ b/bsp/stm32/stm32f103-atk-nano/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py index fa46b74340..46b00c62cd 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py +++ b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-dofly-M3S/rtconfig.py b/bsp/stm32/stm32f103-dofly-M3S/rtconfig.py index 233b0e6440..8c30e41437 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/rtconfig.py +++ b/bsp/stm32/stm32f103-dofly-M3S/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.py b/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.py index 9ace3b0a3c..b8509ee7a0 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.py +++ b/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.py b/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.py index 9ace3b0a3c..b8509ee7a0 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.py +++ b/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.py b/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.py index fa46b74340..46b00c62cd 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.py +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.py b/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.py index fa46b74340..46b00c62cd 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.py +++ b/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-mini-system/rtconfig.py b/bsp/stm32/stm32f103-mini-system/rtconfig.py index c16c2fdda7..7912203103 100644 --- a/bsp/stm32/stm32f103-mini-system/rtconfig.py +++ b/bsp/stm32/stm32f103-mini-system/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f103-yf-ufun/rtconfig.py b/bsp/stm32/stm32f103-yf-ufun/rtconfig.py index fa46b74340..46b00c62cd 100644 --- a/bsp/stm32/stm32f103-yf-ufun/rtconfig.py +++ b/bsp/stm32/stm32f103-yf-ufun/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f107-uc-eval/rtconfig.py b/bsp/stm32/stm32f107-uc-eval/rtconfig.py index 9ace3b0a3c..b8509ee7a0 100644 --- a/bsp/stm32/stm32f107-uc-eval/rtconfig.py +++ b/bsp/stm32/stm32f107-uc-eval/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f401-st-nucleo/rtconfig.py b/bsp/stm32/stm32f401-st-nucleo/rtconfig.py index 3b4b3a5208..90240ee5f8 100644 --- a/bsp/stm32/stm32f401-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f401-st-nucleo/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.py b/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.py index 81e39f9513..e54b11c079 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.py +++ b/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f407-atk-explorer/rtconfig.py b/bsp/stm32/stm32f407-atk-explorer/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32f407-atk-explorer/rtconfig.py +++ b/bsp/stm32/stm32f407-atk-explorer/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f407-st-discovery/rtconfig.py b/bsp/stm32/stm32f407-st-discovery/rtconfig.py index 32024fa83a..50393c3125 100644 --- a/bsp/stm32/stm32f407-st-discovery/rtconfig.py +++ b/bsp/stm32/stm32f407-st-discovery/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f410-st-nucleo/rtconfig.py b/bsp/stm32/stm32f410-st-nucleo/rtconfig.py index 8c0a3e1281..2ac9f2b706 100644 --- a/bsp/stm32/stm32f410-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f410-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f411-st-nucleo/rtconfig.py b/bsp/stm32/stm32f411-st-nucleo/rtconfig.py index 8c0a3e1281..2ac9f2b706 100644 --- a/bsp/stm32/stm32f411-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f411-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f411-weact-MiniF4/rtconfig.py b/bsp/stm32/stm32f411-weact-MiniF4/rtconfig.py index 8c0a3e1281..2ac9f2b706 100644 --- a/bsp/stm32/stm32f411-weact-MiniF4/rtconfig.py +++ b/bsp/stm32/stm32f411-weact-MiniF4/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f412-st-nucleo/rtconfig.py b/bsp/stm32/stm32f412-st-nucleo/rtconfig.py index 40b84ad846..dddfc31180 100644 --- a/bsp/stm32/stm32f412-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f412-st-nucleo/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f427-robomaster-a/rtconfig.py b/bsp/stm32/stm32f427-robomaster-a/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32f427-robomaster-a/rtconfig.py +++ b/bsp/stm32/stm32f427-robomaster-a/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f429-armfly-v6/rtconfig.py b/bsp/stm32/stm32f429-armfly-v6/rtconfig.py index 79419c6c06..ed19e36763 100644 --- a/bsp/stm32/stm32f429-armfly-v6/rtconfig.py +++ b/bsp/stm32/stm32f429-armfly-v6/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f429-atk-apollo/rtconfig.py b/bsp/stm32/stm32f429-atk-apollo/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32f429-atk-apollo/rtconfig.py +++ b/bsp/stm32/stm32f429-atk-apollo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f429-fire-challenger/rtconfig.py b/bsp/stm32/stm32f429-fire-challenger/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32f429-fire-challenger/rtconfig.py +++ b/bsp/stm32/stm32f429-fire-challenger/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f429-st-disco/rtconfig.py b/bsp/stm32/stm32f429-st-disco/rtconfig.py index 32024fa83a..50393c3125 100644 --- a/bsp/stm32/stm32f429-st-disco/rtconfig.py +++ b/bsp/stm32/stm32f429-st-disco/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f446-st-nucleo/rtconfig.py b/bsp/stm32/stm32f446-st-nucleo/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32f446-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32f446-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f469-st-disco/rtconfig.py b/bsp/stm32/stm32f469-st-disco/rtconfig.py index 32024fa83a..50393c3125 100644 --- a/bsp/stm32/stm32f469-st-disco/rtconfig.py +++ b/bsp/stm32/stm32f469-st-disco/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f767-atk-apollo/rtconfig.py b/bsp/stm32/stm32f767-atk-apollo/rtconfig.py index dedc1b9580..b8a5eb5c19 100644 --- a/bsp/stm32/stm32f767-atk-apollo/rtconfig.py +++ b/bsp/stm32/stm32f767-atk-apollo/rtconfig.py @@ -140,4 +140,11 @@ elif PLATFORM == 'iar': CXXFLAGS = CFLAGS EXEC_PATH = EXEC_PATH + '/arm/bin/' - POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' \ No newline at end of file + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) \ No newline at end of file diff --git a/bsp/stm32/stm32f767-fire-challenger/rtconfig.py b/bsp/stm32/stm32f767-fire-challenger/rtconfig.py index 7a46cc624d..ecd0d1a055 100644 --- a/bsp/stm32/stm32f767-fire-challenger/rtconfig.py +++ b/bsp/stm32/stm32f767-fire-challenger/rtconfig.py @@ -140,4 +140,11 @@ elif PLATFORM == 'iar': CXXFLAGS = CFLAGS EXEC_PATH = EXEC_PATH + '/arm/bin/' - POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' \ No newline at end of file + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) \ No newline at end of file diff --git a/bsp/stm32/stm32f769-st-disco/rtconfig.py b/bsp/stm32/stm32f769-st-disco/rtconfig.py index 21d8e13bb3..cf4cf47fe0 100644 --- a/bsp/stm32/stm32f769-st-disco/rtconfig.py +++ b/bsp/stm32/stm32f769-st-disco/rtconfig.py @@ -140,3 +140,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32g071-st-nucleo/rtconfig.py b/bsp/stm32/stm32g071-st-nucleo/rtconfig.py index d86774675d..7452398326 100644 --- a/bsp/stm32/stm32g071-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32g071-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32g431-st-nucleo/rtconfig.py b/bsp/stm32/stm32g431-st-nucleo/rtconfig.py index 638f59502a..0faea85775 100644 --- a/bsp/stm32/stm32g431-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32g431-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32h743-atk-apollo/rtconfig.py b/bsp/stm32/stm32h743-atk-apollo/rtconfig.py index ef6708f653..780275b28c 100644 --- a/bsp/stm32/stm32h743-atk-apollo/rtconfig.py +++ b/bsp/stm32/stm32h743-atk-apollo/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32h743-st-nucleo/rtconfig.py b/bsp/stm32/stm32h743-st-nucleo/rtconfig.py index ef6708f653..780275b28c 100644 --- a/bsp/stm32/stm32h743-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32h743-st-nucleo/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32h747-st-discovery/rtconfig.py b/bsp/stm32/stm32h747-st-discovery/rtconfig.py index ef6708f653..780275b28c 100644 --- a/bsp/stm32/stm32h747-st-discovery/rtconfig.py +++ b/bsp/stm32/stm32h747-st-discovery/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/rtconfig.py b/bsp/stm32/stm32h750-armfly-h7-tool/rtconfig.py index ef6708f653..780275b28c 100644 --- a/bsp/stm32/stm32h750-armfly-h7-tool/rtconfig.py +++ b/bsp/stm32/stm32h750-armfly-h7-tool/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l010-st-nucleo/rtconfig.py b/bsp/stm32/stm32l010-st-nucleo/rtconfig.py index 39d6af6879..dd13683b26 100644 --- a/bsp/stm32/stm32l010-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l010-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l053-st-nucleo/rtconfig.py b/bsp/stm32/stm32l053-st-nucleo/rtconfig.py index 39d6af6879..dd13683b26 100644 --- a/bsp/stm32/stm32l053-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l053-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l432-st-nucleo/rtconfig.py b/bsp/stm32/stm32l432-st-nucleo/rtconfig.py index 2e022a964b..deb2083359 100644 --- a/bsp/stm32/stm32l432-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l432-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l452-st-nucleo/rtconfig.py b/bsp/stm32/stm32l452-st-nucleo/rtconfig.py index 2e022a964b..deb2083359 100644 --- a/bsp/stm32/stm32l452-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l452-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l475-atk-pandora/rtconfig.py b/bsp/stm32/stm32l475-atk-pandora/rtconfig.py index 40b84ad846..dddfc31180 100644 --- a/bsp/stm32/stm32l475-atk-pandora/rtconfig.py +++ b/bsp/stm32/stm32l475-atk-pandora/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l475-st-discovery/rtconfig.py b/bsp/stm32/stm32l475-st-discovery/rtconfig.py index 3e4718a482..c02cbb090a 100644 --- a/bsp/stm32/stm32l475-st-discovery/rtconfig.py +++ b/bsp/stm32/stm32l475-st-discovery/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l476-st-nucleo/rtconfig.py b/bsp/stm32/stm32l476-st-nucleo/rtconfig.py index 7fc0f14860..826d5425f5 100644 --- a/bsp/stm32/stm32l476-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l476-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l496-ali-developer/rtconfig.py b/bsp/stm32/stm32l496-ali-developer/rtconfig.py index 2e022a964b..deb2083359 100644 --- a/bsp/stm32/stm32l496-ali-developer/rtconfig.py +++ b/bsp/stm32/stm32l496-ali-developer/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l496-st-nucleo/rtconfig.py b/bsp/stm32/stm32l496-st-nucleo/rtconfig.py index 40b84ad846..dddfc31180 100644 --- a/bsp/stm32/stm32l496-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l496-st-nucleo/rtconfig.py @@ -142,3 +142,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l4r5-st-nucleo/rtconfig.py b/bsp/stm32/stm32l4r5-st-nucleo/rtconfig.py index 33e1a6bc4a..e9a00ad628 100644 --- a/bsp/stm32/stm32l4r5-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l4r5-st-nucleo/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32l4r9-st-eval/rtconfig.py b/bsp/stm32/stm32l4r9-st-eval/rtconfig.py index 75b5d9925e..f1d97ac603 100644 --- a/bsp/stm32/stm32l4r9-st-eval/rtconfig.py +++ b/bsp/stm32/stm32l4r9-st-eval/rtconfig.py @@ -141,3 +141,10 @@ elif PLATFORM == 'iar': EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) -- Gitee From dbfd464a77ff213490d78b67af1146a326d43425 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 15:17:45 +0800 Subject: [PATCH 39/54] [update] lpc55sxx/tools/sdk_dist.py --- bsp/lpc55sxx/tools/sdk_dist.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/lpc55sxx/tools/sdk_dist.py b/bsp/lpc55sxx/tools/sdk_dist.py index 9254b1b589..a69c8f2db1 100644 --- a/bsp/lpc55sxx/tools/sdk_dist.py +++ b/bsp/lpc55sxx/tools/sdk_dist.py @@ -8,7 +8,7 @@ sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) def dist_do_building(BSP_ROOT): from mkdist import bsp_copy_files import rtconfig - + dist_dir = os.path.join(BSP_ROOT, 'dist', os.path.basename(BSP_ROOT)) library_path = os.path.join(os.path.dirname(BSP_ROOT), 'Libraries') library_dir = os.path.join(dist_dir, 'Libraries') -- Gitee From 36755af0be6b92f095702afa2fae6e0376a27681 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 15:32:53 +0800 Subject: [PATCH 40/54] [update] nuclei dist handle --- bsp/nuclei/gd32vf103_rvstar/rtconfig.py | 12 ++++++++++++ bsp/nuclei/tools/sdk_dist.py | 18 ++++++++++++++++++ tools/mkdist.py | 7 ------- 3 files changed, 30 insertions(+), 7 deletions(-) create mode 100644 bsp/nuclei/tools/sdk_dist.py diff --git a/bsp/nuclei/gd32vf103_rvstar/rtconfig.py b/bsp/nuclei/gd32vf103_rvstar/rtconfig.py index 8136b392f8..bf74338e8a 100644 --- a/bsp/nuclei/gd32vf103_rvstar/rtconfig.py +++ b/bsp/nuclei/gd32vf103_rvstar/rtconfig.py @@ -5,6 +5,9 @@ ARCH='risc-v' CPU='nuclei' CROSS_TOOL='gcc' +# bsp lib config +BSP_LIBRARY_TYPE = None + if os.getenv('RTT_CC'): CROSS_TOOL = os.getenv('RTT_CC') @@ -18,7 +21,9 @@ else: # EXEC_PATH = os.getenv('RTT_EXEC_PATH') BUILD = 'debug' + # Fixed configurations below +NUCLEI_SDK_OPENOCD_CFG = "type in your config" NUCLEI_SDK_SOC = "gd32vf103" NUCLEI_SDK_BOARD = "gd32vf103v_rvstar" NUCLEI_SDK_DOWNLOAD = "flashxip" @@ -56,3 +61,10 @@ if PLATFORM == 'gcc': DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n' POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) diff --git a/bsp/nuclei/tools/sdk_dist.py b/bsp/nuclei/tools/sdk_dist.py new file mode 100644 index 0000000000..f802e92730 --- /dev/null +++ b/bsp/nuclei/tools/sdk_dist.py @@ -0,0 +1,18 @@ +import os +import sys +import shutil +cwd_path = os.getcwd() +sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) + +# BSP dist function +def dist_do_building(BSP_ROOT): + from mkdist import bsp_copy_files + import rtconfig + + dist_dir = os.path.join(BSP_ROOT, 'dist', os.path.basename(BSP_ROOT)) + library_dir = os.path.join(dist_dir, 'libraries') + + print("=> copy nuclei bsp library") + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') + library_dir = os.path.join(dist_dir, 'libraries') + bsp_copy_files(os.path.join(library_path, rtconfig.BSP_LIBRARY_TYPE), os.path.join(library_dir, rtconfig.BSP_LIBRARY_TYPE)) diff --git a/tools/mkdist.py b/tools/mkdist.py index e190123e6c..a6c744b470 100644 --- a/tools/mkdist.py +++ b/tools/mkdist.py @@ -336,13 +336,6 @@ def MkDist(program, BSP_ROOT, RTT_ROOT, Env, rttide = None): print('=> %s' % os.path.basename(BSP_ROOT)) bsp_copy_files(BSP_ROOT, dist_dir) - # copy nuclei bsp libiary files - if os.path.basename(os.path.dirname(BSP_ROOT)) == 'nuclei': - print("=> copy nuclei bsp library") - library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') - library_dir = os.path.join(dist_dir, 'libraries') - bsp_copy_files(os.path.join(library_path, Env['bsp_lib_type']), os.path.join(library_dir, Env['bsp_lib_type'])) - # do bsp special dist handle if 'dist_handle' in Env: print("=> start dist handle") -- Gitee From 9f6696964a16b4094d8da0fcd8c102d97bf9f8c5 Mon Sep 17 00:00:00 2001 From: SummerGift Date: Wed, 6 May 2020 15:43:04 +0800 Subject: [PATCH 41/54] [update] add new line --- bsp/stm32/stm32f767-atk-apollo/rtconfig.py | 2 +- bsp/stm32/stm32f767-fire-challenger/rtconfig.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/bsp/stm32/stm32f767-atk-apollo/rtconfig.py b/bsp/stm32/stm32f767-atk-apollo/rtconfig.py index b8a5eb5c19..bc4112597c 100644 --- a/bsp/stm32/stm32f767-atk-apollo/rtconfig.py +++ b/bsp/stm32/stm32f767-atk-apollo/rtconfig.py @@ -147,4 +147,4 @@ def dist_handle(BSP_ROOT): cwd_path = os.getcwd() sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) from sdk_dist import dist_do_building - dist_do_building(BSP_ROOT) \ No newline at end of file + dist_do_building(BSP_ROOT) diff --git a/bsp/stm32/stm32f767-fire-challenger/rtconfig.py b/bsp/stm32/stm32f767-fire-challenger/rtconfig.py index ecd0d1a055..c83a51a09d 100644 --- a/bsp/stm32/stm32f767-fire-challenger/rtconfig.py +++ b/bsp/stm32/stm32f767-fire-challenger/rtconfig.py @@ -147,4 +147,4 @@ def dist_handle(BSP_ROOT): cwd_path = os.getcwd() sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) from sdk_dist import dist_do_building - dist_do_building(BSP_ROOT) \ No newline at end of file + dist_do_building(BSP_ROOT) -- Gitee From e444ec908c48a4d22598b1dd0ac092c0592c6a27 Mon Sep 17 00:00:00 2001 From: NU-LL <1125934312@qq.com> Date: Thu, 7 May 2020 10:42:55 +0800 Subject: [PATCH 42/54] Add STM32CubeMX initial configuration --- bsp/stm32/stm32l476-st-nucleo/README.md | 2 - .../board/CubeMX_Config/.mxproject | 11 +- .../board/CubeMX_Config/CubeMX_Config.ioc | 306 ++++++++++-------- .../CubeMX_Config/Inc/stm32l4xx_hal_conf.h | 26 +- .../board/CubeMX_Config/Src/main.c | 263 ++++++++++++++- .../CubeMX_Config/Src/stm32l4xx_hal_msp.c | 259 ++++++++++++++- .../board/CubeMX_Config/Src/stm32l4xx_it.c | 1 + 7 files changed, 716 insertions(+), 152 deletions(-) diff --git a/bsp/stm32/stm32l476-st-nucleo/README.md b/bsp/stm32/stm32l476-st-nucleo/README.md index bb174c6b0d..8b0db28b84 100644 --- a/bsp/stm32/stm32l476-st-nucleo/README.md +++ b/bsp/stm32/stm32l476-st-nucleo/README.md @@ -48,8 +48,6 @@ | TIME | 支持 | TIME15/16/17 | | **扩展模块** | **支持情况** | **备注** | -注意:部分片上外设默认没有使能,如需使用请在CubeMX中使能相应外设 - ## 使用说明 使用说明分为如下两个章节: diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject index ef81df8fbd..75c88f2ed1 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject @@ -1,13 +1,14 @@ [PreviousGenFiles] -HeaderPath=D:/VariousProject/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc +HeaderPath=G:/1 Code/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; -SourcePath=D:/VariousProject/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src +SourcePath=G:/1 Code/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../\Src/system_stm32l4xx.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../\Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;D:/VariousProject/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config//MDK-ARM/startup_stm32l476xx.s; -HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; +SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; +HeaderPath=F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Device\ST\STM32L4xx\Include;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Include;..\Inc; +CDefines=USE_HAL_DRIVER;STM32L476xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc index 243a1fafd1..064e0d37f1 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -1,146 +1,196 @@ #MicroXplorer Configuration settings - do not modify -File.Version=6 -KeepUserPlacement=false Mcu.Family=STM32L4 +PC3.Mode=Full_Duplex_Master +ProjectManager.MainLocation=Src +PA6.Mode=Full_Duplex_Master +RCC.USART1Freq_Value=80000000 +RCC.SAI1Freq_Value=18285714.285714287 +USART2.IPParameters=VirtualMode-Asynchronous +RCC.CortexFreq_Value=80000000 +SPI3.Direction=SPI_DIRECTION_2LINES +VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer +SPI3.VirtualType=VM_MASTER +ProjectManager.KeepUserCode=true +Mcu.UserName=STM32L476RGTx +SPI1.VirtualType=VM_MASTER +SPI2.VirtualType=VM_MASTER +PB10.Mode=Full_Duplex_Master +PC10.Signal=SPI3_SCK +PC12.Signal=SPI3_MOSI +RCC.PLLSAI1RoutputFreq_Value=64000000 +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_SPI3_Init-SPI3-false-HAL-true,8-MX_TIM15_Init-TIM15-false-HAL-true,9-MX_TIM16_Init-TIM16-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true +VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled +RCC.RTCFreq_Value=32768 +RCC.USART2Freq_Value=80000000 +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +PinOutPanel.RotationAngle=0 +RCC.MCO1PinFreq_Value=80000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +ProjectManager.StackSize=0x400 +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK +RCC.I2C3Freq_Value=80000000 +RCC.LPTIM1Freq_Value=80000000 +Mcu.IP4=SPI2 +RCC.FCLKCortexFreq_Value=80000000 +Mcu.IP5=SPI3 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +Mcu.IP2=RTC +Mcu.IP3=SPI1 Mcu.IP0=NVIC Mcu.IP1=RCC -Mcu.IP2=RTC -Mcu.IP3=SYS -Mcu.IP4=USART2 -Mcu.IPNb=5 -Mcu.Name=STM32L476R(C-E-G)Tx -Mcu.Package=LQFP64 +Mcu.UserConstants= +RCC.VCOSAI1OutputFreq_Value=128000000 +RCC.SDMMCFreq_Value=64000000 +Mcu.ThirdPartyNb=0 +SPI1.Direction=SPI_DIRECTION_2LINES +RCC.HCLKFreq_Value=80000000 +Mcu.IPNb=11 +ProjectManager.PreviousToolchain= +RCC.APB2TimFreq_Value=80000000 +SPI1.CalculateBaudRate=40.0 MBits/s +PC3.Signal=SPI2_MOSI +Mcu.Pin6=PA5 +RCC.SAI2Freq_Value=18285714.285714287 +Mcu.Pin7=PA6 +Mcu.Pin8=PA7 +Mcu.Pin9=PB10 +RCC.AHBFreq_Value=80000000 Mcu.Pin0=PC14-OSC32_IN (PC14) Mcu.Pin1=PC15-OSC32_OUT (PC15) -Mcu.Pin2=PA2 -Mcu.Pin3=PA3 -Mcu.Pin4=PA13 (JTMS-SWDIO) -Mcu.Pin5=PA14 (JTCK-SWCLK) -Mcu.Pin6=VP_RTC_VS_RTC_Activate -Mcu.Pin7=VP_SYS_VS_Systick -Mcu.PinsNb=8 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32L476RGTx -MxCube.Version=5.0.1 -MxDb.Version=DB.5.0.1 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false -PA13\ (JTMS-SWDIO).Mode=Serial_Wire -PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO -PA14\ (JTCK-SWCLK).Mode=Serial_Wire -PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK -PA2.Mode=Asynchronous -PA2.Signal=USART2_TX -PA3.Mode=Asynchronous -PA3.Signal=USART2_RX -PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator -PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN -PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator -PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT -PCC.Checker=true -PCC.Line=STM32L4x6 -PCC.MCU=STM32L476R(C-E-G)Tx -PCC.PartNumber=STM32L476RGTx -PCC.Seq0=0 -PCC.Series=STM32L4 -PCC.Temperature=25 -PCC.Vdd=null -PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=true +Mcu.Pin2=PC2 +Mcu.Pin3=PC3 +RCC.USART3Freq_Value=80000000 +Mcu.Pin4=PA2 +Mcu.Pin5=PA3 +ProjectManager.ProjectBuild=false +RCC.HSE_VALUE=8000000 +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +Mcu.IP10=USART2 +USART2.VirtualMode-Asynchronous=VM_ASYNC +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 +MxDb.Version=DB.5.0.60 ProjectManager.BackupPrevious=false -ProjectManager.CompilerOptimize=6 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=false -ProjectManager.CustomerFirmwarePackage= -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32L476RGTx -ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.13.0 -ProjectManager.FreePins=false +RCC.VCOInputFreq_Value=16000000 +File.Version=6 +SPI2.CalculateBaudRate=40.0 MBits/s +RCC.PLLRCLKFreq_Value=80000000 +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=0 -ProjectManager.MainLocation=Src -ProjectManager.NoMain=false -ProjectManager.PreviousToolchain= -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=CubeMX_Config.ioc ProjectManager.ProjectName=CubeMX_Config -ProjectManager.StackSize=0x400 -ProjectManager.TargetToolchain=MDK-ARM V5 +Mcu.Package=LQFP64 +PA6.Signal=SPI1_MISO +SPI2.Mode=SPI_MODE_MASTER +SPI3.Mode=SPI_MODE_MASTER ProjectManager.ToolChainLocation= -ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true -RCC.ADCFreq_Value=64000000 -RCC.AHBFreq_Value=80000000 -RCC.APB1Freq_Value=80000000 -RCC.APB1TimFreq_Value=80000000 -RCC.APB2Freq_Value=80000000 -RCC.APB2TimFreq_Value=80000000 -RCC.CortexFreq_Value=80000000 +RCC.LSI_VALUE=32000 +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +RCC.LSCOPinFreq_Value=32000 RCC.DFSDMFreq_Value=80000000 -RCC.FCLKCortexFreq_Value=80000000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=80000000 -RCC.HSE_VALUE=8000000 -RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=80000000 -RCC.I2C2Freq_Value=80000000 -RCC.I2C3Freq_Value=80000000 -RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value -RCC.LCDFreq_Value=32768 -RCC.LPTIM1Freq_Value=80000000 -RCC.LPTIM2Freq_Value=80000000 +PC11.Mode=Full_Duplex_Master +RCC.PLLPoutputFreq_Value=22857142.85714286 +RCC.APB1TimFreq_Value=80000000 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false RCC.LPUART1Freq_Value=80000000 -RCC.LSCOPinFreq_Value=32000 -RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=80000000 +SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI2.Direction=SPI_DIRECTION_2LINES +PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO +ProjectManager.CustomerFirmwarePackage= +PA3.Signal=USART2_RX +PA5.Mode=Full_Duplex_Master +VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate RCC.MSI_VALUE=4000000 -RCC.PLLN=10 -RCC.PLLPoutputFreq_Value=22857142.85714286 -RCC.PLLQoutputFreq_Value=80000000 -RCC.PLLRCLKFreq_Value=80000000 -RCC.PLLSAI1PoutputFreq_Value=18285714.285714287 -RCC.PLLSAI1QoutputFreq_Value=64000000 -RCC.PLLSAI1RoutputFreq_Value=64000000 -RCC.PLLSAI2PoutputFreq_Value=18285714.285714287 -RCC.PLLSAI2RoutputFreq_Value=64000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSI -RCC.PWRFreq_Value=80000000 -RCC.RNGFreq_Value=64000000 -RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE -RCC.RTCFreq_Value=32768 -RCC.SAI1Freq_Value=18285714.285714287 -RCC.SAI2Freq_Value=18285714.285714287 -RCC.SDMMCFreq_Value=64000000 +PA14\ (JTCK-SWCLK).Mode=Serial_Wire +RCC.PLLQoutputFreq_Value=80000000 +ProjectManager.ProjectFileName=CubeMX_Config.ioc +PA7.Mode=Full_Duplex_Master +Mcu.PinsNb=20 +ProjectManager.NoMain=false +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +PC11.Signal=SPI3_MISO RCC.SWPMI1Freq_Value=80000000 -RCC.SYSCLKFreq_VALUE=80000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=80000000 -RCC.UART5Freq_Value=80000000 -RCC.USART1Freq_Value=80000000 -RCC.USART2Freq_Value=80000000 -RCC.USART3Freq_Value=80000000 +PC2.Signal=SPI2_MISO +PC10.Mode=Full_Duplex_Master +ProjectManager.DefaultFWLocation=true +PC2.Mode=Full_Duplex_Master +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer +ProjectManager.DeletePrevious=true +RCC.VCOSAI2OutputFreq_Value=128000000 +VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT +RCC.FamilyName=M +PA3.Mode=Asynchronous +ProjectManager.TargetToolchain=MDK-ARM V5 +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate RCC.USBFreq_Value=64000000 -RCC.VCOInputFreq_Value=16000000 +RCC.PLLSAI1PoutputFreq_Value=18285714.285714287 +PB10.Signal=SPI2_SCK +RCC.PLLSAI2RoutputFreq_Value=64000000 +PA5.Signal=SPI1_SCK +PC12.Mode=Full_Duplex_Master +board=custom RCC.VCOOutputFreq_Value=160000000 -RCC.VCOSAI1OutputFreq_Value=128000000 -RCC.VCOSAI2OutputFreq_Value=128000000 -USART2.IPParameters=VirtualMode-Asynchronous -USART2.VirtualMode-Asynchronous=VM_ASYNC -VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled -VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate +ProjectManager.LastFirmware=true +RCC.APB2Freq_Value=80000000 +RCC.UART4Freq_Value=80000000 +SPI3.CalculateBaudRate=40.0 MBits/s +MxCube.Version=5.6.1 +RCC.I2C1Freq_Value=80000000 +SPI1.Mode=SPI_MODE_MASTER +RCC.LCDFreq_Value=32768 +RCC.RNGFreq_Value=64000000 +RCC.PLLSAI1QoutputFreq_Value=64000000 +RCC.ADCFreq_Value=64000000 VP_SYS_VS_Systick.Mode=SysTick -VP_SYS_VS_Systick.Signal=SYS_VS_Systick -board=custom +VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +RCC.UART5Freq_Value=80000000 +ProjectManager.FreePins=false +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value +ProjectManager.AskForMigrate=true +Mcu.Name=STM32L476R(C-E-G)Tx +RCC.LPTIM2Freq_Value=80000000 +PA2.Signal=USART2_TX +ProjectManager.UnderRoot=false +Mcu.IP8=TIM16 +Mcu.IP9=TIM17 +Mcu.IP6=SYS +Mcu.IP7=TIM15 +ProjectManager.CoupleFile=false +PA13\ (JTMS-SWDIO).Mode=Serial_Wire +RCC.SYSCLKFreq_VALUE=80000000 +RCC.PLLSAI2PoutputFreq_Value=18285714.285714287 +NVIC.ForceEnableDMAVector=true +KeepUserPlacement=false +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +ProjectManager.CompilerOptimize=6 +VP_TIM15_VS_ClockSourceINT.Mode=Internal +ProjectManager.HeapSize=0x200 +Mcu.Pin15=VP_RTC_VS_RTC_Activate +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +Mcu.Pin16=VP_SYS_VS_Systick +Mcu.Pin13=PC11 +Mcu.Pin14=PC12 +Mcu.Pin19=VP_TIM17_VS_ClockSourceINT +ProjectManager.ComputerToolchain=false +Mcu.Pin17=VP_TIM15_VS_ClockSourceINT +RCC.HSI_VALUE=16000000 +Mcu.Pin18=VP_TIM16_VS_ClockSourceINT +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +Mcu.Pin11=PA14 (JTCK-SWCLK) +Mcu.Pin12=PC10 +RCC.PLLN=10 +Mcu.Pin10=PA13 (JTMS-SWDIO) +PA2.Mode=Asynchronous +RCC.PWRFreq_Value=80000000 +RCC.I2C2Freq_Value=80000000 +RCC.APB1Freq_Value=80000000 +ProjectManager.DeviceId=STM32L476RGTx +ProjectManager.LibraryCopy=2 +PA7.Signal=SPI1_MOSI diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h index 9cf0bbaca2..7bc76c2ef0 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -5,7 +5,7 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

+ *

© COPYRIGHT(c) 2020 STMicroelectronics

* * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -69,13 +69,15 @@ /*#define HAL_IWDG_MODULE_ENABLED */ /*#define HAL_LTDC_MODULE_ENABLED */ /*#define HAL_LCD_MODULE_ENABLED */ -#define HAL_LPTIM_MODULE_ENABLED +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ /*#define HAL_NAND_MODULE_ENABLED */ /*#define HAL_NOR_MODULE_ENABLED */ /*#define HAL_OPAMP_MODULE_ENABLED */ /*#define HAL_OSPI_MODULE_ENABLED */ /*#define HAL_OSPI_MODULE_ENABLED */ /*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_PKA_MODULE_ENABLED */ /*#define HAL_QSPI_MODULE_ENABLED */ /*#define HAL_QSPI_MODULE_ENABLED */ /*#define HAL_RNG_MODULE_ENABLED */ @@ -84,16 +86,18 @@ /*#define HAL_SD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ -/*#define HAL_SPI_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED /*#define HAL_SRAM_MODULE_ENABLED */ /*#define HAL_SWPMI_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED /*#define HAL_TSC_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ /*#define HAL_EXTI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED #define HAL_I2C_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED #define HAL_RCC_MODULE_ENABLED @@ -296,6 +300,10 @@ #include "stm32l4xx_hal_sram.h" #endif /* HAL_SRAM_MODULE_ENABLED */ +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + #ifdef HAL_NOR_MODULE_ENABLED #include "stm32l4xx_hal_nor.h" #endif /* HAL_NOR_MODULE_ENABLED */ @@ -332,6 +340,10 @@ #include "stm32l4xx_hal_ospi.h" #endif /* HAL_OSPI_MODULE_ENABLED */ +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32l4xx_hal_pka.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + #ifdef HAL_PWR_MODULE_ENABLED #include "stm32l4xx_hal_pwr.h" #endif /* HAL_PWR_MODULE_ENABLED */ @@ -408,6 +420,10 @@ #include "stm32l4xx_hal_gfxmmu.h" #endif /* HAL_GFXMMU_MODULE_ENABLED */ +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + /* Exported macro ------------------------------------------------------------*/ #ifdef USE_FULL_ASSERT /** @@ -418,7 +434,7 @@ * If expr is true, it returns no value. * @retval None */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ void assert_failed(char *file, uint32_t line); #else diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c index e6b32d1921..4db5dd9f5a 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c @@ -64,6 +64,14 @@ /* Private variables ---------------------------------------------------------*/ RTC_HandleTypeDef hrtc; +SPI_HandleTypeDef hspi1; +SPI_HandleTypeDef hspi2; +SPI_HandleTypeDef hspi3; + +TIM_HandleTypeDef htim15; +TIM_HandleTypeDef htim16; +TIM_HandleTypeDef htim17; + UART_HandleTypeDef huart2; /* USER CODE BEGIN PV */ @@ -76,6 +84,12 @@ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART2_UART_Init(void); static void MX_RTC_Init(void); +static void MX_SPI1_Init(void); +static void MX_SPI2_Init(void); +static void MX_SPI3_Init(void); +static void MX_TIM15_Init(void); +static void MX_TIM16_Init(void); +static void MX_TIM17_Init(void); /* USER CODE BEGIN PFP */ /* Private function prototypes -----------------------------------------------*/ @@ -116,6 +130,12 @@ int main(void) MX_GPIO_Init(); MX_USART2_UART_Init(); MX_RTC_Init(); + MX_SPI1_Init(); + MX_SPI2_Init(); + MX_SPI3_Init(); + MX_TIM15_Init(); + MX_TIM16_Init(); + MX_TIM17_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -143,11 +163,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Configure LSE Drive Capability + /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /**Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.LSEState = RCC_LSE_ON; @@ -164,7 +184,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -184,7 +204,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { @@ -207,7 +227,7 @@ static void MX_RTC_Init(void) /* USER CODE BEGIN RTC_Init 1 */ /* USER CODE END RTC_Init 1 */ - /**Initialize RTC Only + /** Initialize RTC Only */ hrtc.Instance = RTC; hrtc.Init.HourFormat = RTC_HOURFORMAT_24; @@ -227,6 +247,236 @@ static void MX_RTC_Init(void) } +/** + * @brief SPI1 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI1_Init(void) +{ + + /* USER CODE BEGIN SPI1_Init 0 */ + + /* USER CODE END SPI1_Init 0 */ + + /* USER CODE BEGIN SPI1_Init 1 */ + + /* USER CODE END SPI1_Init 1 */ + /* SPI1 parameter configuration*/ + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 7; + hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI1_Init 2 */ + + /* USER CODE END SPI1_Init 2 */ + +} + +/** + * @brief SPI2 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI2_Init(void) +{ + + /* USER CODE BEGIN SPI2_Init 0 */ + + /* USER CODE END SPI2_Init 0 */ + + /* USER CODE BEGIN SPI2_Init 1 */ + + /* USER CODE END SPI2_Init 1 */ + /* SPI2 parameter configuration*/ + hspi2.Instance = SPI2; + hspi2.Init.Mode = SPI_MODE_MASTER; + hspi2.Init.Direction = SPI_DIRECTION_2LINES; + hspi2.Init.DataSize = SPI_DATASIZE_4BIT; + hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi2.Init.NSS = SPI_NSS_SOFT; + hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi2.Init.CRCPolynomial = 7; + hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI2_Init 2 */ + + /* USER CODE END SPI2_Init 2 */ + +} + +/** + * @brief SPI3 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI3_Init(void) +{ + + /* USER CODE BEGIN SPI3_Init 0 */ + + /* USER CODE END SPI3_Init 0 */ + + /* USER CODE BEGIN SPI3_Init 1 */ + + /* USER CODE END SPI3_Init 1 */ + /* SPI3 parameter configuration*/ + hspi3.Instance = SPI3; + hspi3.Init.Mode = SPI_MODE_MASTER; + hspi3.Init.Direction = SPI_DIRECTION_2LINES; + hspi3.Init.DataSize = SPI_DATASIZE_4BIT; + hspi3.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi3.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi3.Init.NSS = SPI_NSS_SOFT; + hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi3.Init.TIMode = SPI_TIMODE_DISABLE; + hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi3.Init.CRCPolynomial = 7; + hspi3.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi3.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI3_Init 2 */ + + /* USER CODE END SPI3_Init 2 */ + +} + +/** + * @brief TIM15 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM15_Init(void) +{ + + /* USER CODE BEGIN TIM15_Init 0 */ + + /* USER CODE END TIM15_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + /* USER CODE BEGIN TIM15_Init 1 */ + + /* USER CODE END TIM15_Init 1 */ + htim15.Instance = TIM15; + htim15.Init.Prescaler = 0; + htim15.Init.CounterMode = TIM_COUNTERMODE_UP; + htim15.Init.Period = 0; + htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim15.Init.RepetitionCounter = 0; + htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim15) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim15, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM15_Init 2 */ + + /* USER CODE END TIM15_Init 2 */ + +} + +/** + * @brief TIM16 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM16_Init(void) +{ + + /* USER CODE BEGIN TIM16_Init 0 */ + + /* USER CODE END TIM16_Init 0 */ + + /* USER CODE BEGIN TIM16_Init 1 */ + + /* USER CODE END TIM16_Init 1 */ + htim16.Instance = TIM16; + htim16.Init.Prescaler = 0; + htim16.Init.CounterMode = TIM_COUNTERMODE_UP; + htim16.Init.Period = 0; + htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim16.Init.RepetitionCounter = 0; + htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim16) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM16_Init 2 */ + + /* USER CODE END TIM16_Init 2 */ + +} + +/** + * @brief TIM17 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM17_Init(void) +{ + + /* USER CODE BEGIN TIM17_Init 0 */ + + /* USER CODE END TIM17_Init 0 */ + + /* USER CODE BEGIN TIM17_Init 1 */ + + /* USER CODE END TIM17_Init 1 */ + htim17.Instance = TIM17; + htim17.Init.Prescaler = 0; + htim17.Init.CounterMode = TIM_COUNTERMODE_UP; + htim17.Init.Period = 0; + htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim17.Init.RepetitionCounter = 0; + htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim17) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM17_Init 2 */ + + /* USER CODE END TIM17_Init 2 */ + +} + /** * @brief USART2 Initialization Function * @param None @@ -273,6 +523,7 @@ static void MX_GPIO_Init(void) /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); } @@ -302,7 +553,7 @@ void Error_Handler(void) * @param line: assert_param error line source number * @retval None */ -void assert_failed(char *file, uint32_t line) +void assert_failed(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index b693d8d190..4a2fc078b1 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -105,7 +105,6 @@ void HAL_MspInit(void) */ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) { - if(hrtc->Instance==RTC) { /* USER CODE BEGIN RTC_MspInit 0 */ @@ -126,10 +125,8 @@ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) * @param hrtc: RTC handle pointer * @retval None */ - void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) { - if(hrtc->Instance==RTC) { /* USER CODE BEGIN RTC_MspDeInit 0 */ @@ -144,6 +141,259 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) } +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } + else if(hspi->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspInit 0 */ + + /* USER CODE END SPI2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI2_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**SPI2 GPIO Configuration + PC2 ------> SPI2_MISO + PC3 ------> SPI2_MOSI + PB10 ------> SPI2_SCK + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI2_MspInit 1 */ + + /* USER CODE END SPI2_MspInit 1 */ + } + else if(hspi->Instance==SPI3) + { + /* USER CODE BEGIN SPI3_MspInit 0 */ + + /* USER CODE END SPI3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI3_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**SPI3 GPIO Configuration + PC10 ------> SPI3_SCK + PC11 ------> SPI3_MISO + PC12 ------> SPI3_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI3_MspInit 1 */ + + /* USER CODE END SPI3_MspInit 1 */ + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + else if(hspi->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspDeInit 0 */ + + /* USER CODE END SPI2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI2_CLK_DISABLE(); + + /**SPI2 GPIO Configuration + PC2 ------> SPI2_MISO + PC3 ------> SPI2_MOSI + PB10 ------> SPI2_SCK + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_3); + + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10); + + /* USER CODE BEGIN SPI2_MspDeInit 1 */ + + /* USER CODE END SPI2_MspDeInit 1 */ + } + else if(hspi->Instance==SPI3) + { + /* USER CODE BEGIN SPI3_MspDeInit 0 */ + + /* USER CODE END SPI3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI3_CLK_DISABLE(); + + /**SPI3 GPIO Configuration + PC10 ------> SPI3_SCK + PC11 ------> SPI3_MISO + PC12 ------> SPI3_MOSI + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12); + + /* USER CODE BEGIN SPI3_MspDeInit 1 */ + + /* USER CODE END SPI3_MspDeInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM15) + { + /* USER CODE BEGIN TIM15_MspInit 0 */ + + /* USER CODE END TIM15_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM15_CLK_ENABLE(); + /* USER CODE BEGIN TIM15_MspInit 1 */ + + /* USER CODE END TIM15_MspInit 1 */ + } + else if(htim_base->Instance==TIM16) + { + /* USER CODE BEGIN TIM16_MspInit 0 */ + + /* USER CODE END TIM16_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM16_CLK_ENABLE(); + /* USER CODE BEGIN TIM16_MspInit 1 */ + + /* USER CODE END TIM16_MspInit 1 */ + } + else if(htim_base->Instance==TIM17) + { + /* USER CODE BEGIN TIM17_MspInit 0 */ + + /* USER CODE END TIM17_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM17_CLK_ENABLE(); + /* USER CODE BEGIN TIM17_MspInit 1 */ + + /* USER CODE END TIM17_MspInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM15) + { + /* USER CODE BEGIN TIM15_MspDeInit 0 */ + + /* USER CODE END TIM15_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM15_CLK_DISABLE(); + /* USER CODE BEGIN TIM15_MspDeInit 1 */ + + /* USER CODE END TIM15_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM16) + { + /* USER CODE BEGIN TIM16_MspDeInit 0 */ + + /* USER CODE END TIM16_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM16_CLK_DISABLE(); + /* USER CODE BEGIN TIM16_MspDeInit 1 */ + + /* USER CODE END TIM16_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM17) + { + /* USER CODE BEGIN TIM17_MspDeInit 0 */ + + /* USER CODE END TIM17_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM17_CLK_DISABLE(); + /* USER CODE BEGIN TIM17_MspDeInit 1 */ + + /* USER CODE END TIM17_MspDeInit 1 */ + } + +} + /** * @brief UART MSP Initialization * This function configures the hardware resources used in this example @@ -152,7 +402,6 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - GPIO_InitTypeDef GPIO_InitStruct = {0}; if(huart->Instance==USART2) { @@ -187,10 +436,8 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) * @param huart: UART handle pointer * @retval None */ - void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) { - if(huart->Instance==USART2) { /* USER CODE BEGIN USART2_MspDeInit 0 */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c index ab5c0b7d8e..e13a77a0e6 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_it.c @@ -71,6 +71,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ + /* USER CODE BEGIN EV */ /* USER CODE END EV */ -- Gitee From 6e861d493842d04804efae5ec4fb33e305540cfe Mon Sep 17 00:00:00 2001 From: NU-LL <1125934312@qq.com> Date: Thu, 7 May 2020 11:14:17 +0800 Subject: [PATCH 43/54] Fix adc initialization --- bsp/stm32/stm32l476-st-nucleo/README.md | 2 +- .../board/CubeMX_Config/.mxproject | 4 +- .../board/CubeMX_Config/CubeMX_Config.ioc | 104 ++++++--- .../CubeMX_Config/Inc/stm32l4xx_hal_conf.h | 2 +- .../board/CubeMX_Config/Src/main.c | 200 +++++++++++++++++- .../CubeMX_Config/Src/stm32l4xx_hal_msp.c | 173 ++++++++++++++- bsp/stm32/stm32l476-st-nucleo/board/Kconfig | 8 + 7 files changed, 445 insertions(+), 48 deletions(-) diff --git a/bsp/stm32/stm32l476-st-nucleo/README.md b/bsp/stm32/stm32l476-st-nucleo/README.md index 8b0db28b84..e1784c3855 100644 --- a/bsp/stm32/stm32l476-st-nucleo/README.md +++ b/bsp/stm32/stm32l476-st-nucleo/README.md @@ -44,7 +44,7 @@ | IIC | 支持 | 软件模拟 | | RTC | 支持 | 支持外部晶振和内部低速时钟 | | SPI | 支持 | SPI1/2/3 | -| ADC | 支持 | | +| ADC | 支持 | ADC1_IN1/ADC2_IN2/ADC3_IN3 | | TIME | 支持 | TIME15/16/17 | | **扩展模块** | **支持情况** | **备注** | diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject index 75c88f2ed1..0160a9c929 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject @@ -5,10 +5,10 @@ SourcePath=G:/1 Code/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; +SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; HeaderPath=F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Device\ST\STM32L4xx\Include;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Include;..\Inc; CDefines=USE_HAL_DRIVER;STM32L476xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc index 064e0d37f1..50c89435ba 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -15,14 +15,17 @@ Mcu.UserName=STM32L476RGTx SPI1.VirtualType=VM_MASTER SPI2.VirtualType=VM_MASTER PB10.Mode=Full_Duplex_Master +ADC2.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_2 +SH.ADCx_IN2.0=ADC2_IN2,IN2-Single-Ended PC10.Signal=SPI3_SCK PC12.Signal=SPI3_MOSI RCC.PLLSAI1RoutputFreq_Value=64000000 -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_SPI3_Init-SPI3-false-HAL-true,8-MX_TIM15_Init-TIM15-false-HAL-true,9-MX_TIM16_Init-TIM16-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_SPI3_Init-SPI3-false-HAL-true,8-MX_TIM15_Init-TIM15-false-HAL-true,9-MX_TIM16_Init-TIM16-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_ADC2_Init-ADC2-false-HAL-true,13-MX_ADC3_Init-ADC3-false-HAL-true VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled RCC.RTCFreq_Value=32768 RCC.USART2Freq_Value=80000000 PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_3 PinOutPanel.RotationAngle=0 RCC.MCO1PinFreq_Value=80000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK @@ -31,56 +34,66 @@ PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK RCC.I2C3Freq_Value=80000000 RCC.LPTIM1Freq_Value=80000000 -Mcu.IP4=SPI2 +Mcu.IP4=RCC RCC.FCLKCortexFreq_Value=80000000 -Mcu.IP5=SPI3 +Mcu.IP5=RTC +Mcu.IP2=ADC3 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false -Mcu.IP2=RTC -Mcu.IP3=SPI1 -Mcu.IP0=NVIC -Mcu.IP1=RCC +Mcu.IP3=NVIC +Mcu.IP0=ADC1 +Mcu.IP1=ADC2 Mcu.UserConstants= RCC.VCOSAI1OutputFreq_Value=128000000 RCC.SDMMCFreq_Value=64000000 Mcu.ThirdPartyNb=0 SPI1.Direction=SPI_DIRECTION_2LINES RCC.HCLKFreq_Value=80000000 -Mcu.IPNb=11 +SH.ADCx_IN3.0=ADC3_IN3,IN3-Single-Ended +Mcu.IPNb=14 ProjectManager.PreviousToolchain= RCC.APB2TimFreq_Value=80000000 SPI1.CalculateBaudRate=40.0 MBits/s +SH.ADCx_IN3.ConfNb=1 PC3.Signal=SPI2_MOSI -Mcu.Pin6=PA5 +Mcu.Pin6=PA2 RCC.SAI2Freq_Value=18285714.285714287 -Mcu.Pin7=PA6 -Mcu.Pin8=PA7 -Mcu.Pin9=PB10 +Mcu.Pin7=PA3 +Mcu.Pin8=PA5 +Mcu.Pin9=PA6 RCC.AHBFreq_Value=80000000 Mcu.Pin0=PC14-OSC32_IN (PC14) Mcu.Pin1=PC15-OSC32_OUT (PC15) -Mcu.Pin2=PC2 -Mcu.Pin3=PC3 +Mcu.Pin2=PC0 +Mcu.Pin3=PC1 RCC.USART3Freq_Value=80000000 -Mcu.Pin4=PA2 -Mcu.Pin5=PA3 +Mcu.Pin4=PC2 +Mcu.Pin5=PC3 +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 ProjectManager.ProjectBuild=false RCC.HSE_VALUE=8000000 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false -Mcu.IP10=USART2 +Mcu.IP10=TIM15 USART2.VirtualMode-Asynchronous=VM_ASYNC -RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +Mcu.IP12=TIM17 +Mcu.IP11=TIM16 ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 MxDb.Version=DB.5.0.60 +Mcu.IP13=USART2 ProjectManager.BackupPrevious=false RCC.VCOInputFreq_Value=16000000 +SH.ADCx_IN1.ConfNb=1 +PB14.Mode=Full_Duplex_Master File.Version=6 SPI2.CalculateBaudRate=40.0 MBits/s +ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag RCC.PLLRCLKFreq_Value=80000000 NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT ProjectManager.HalAssertFull=false +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 ProjectManager.ProjectName=CubeMX_Config Mcu.Package=LQFP64 PA6.Signal=SPI1_MISO @@ -89,15 +102,20 @@ SPI3.Mode=SPI_MODE_MASTER ProjectManager.ToolChainLocation= RCC.LSI_VALUE=32000 VP_SYS_VS_Systick.Signal=SYS_VS_Systick +ADC3.Rank-0\#ChannelRegularConversion=1 RCC.LSCOPinFreq_Value=32000 +ADC2.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 RCC.DFSDMFreq_Value=80000000 PC11.Mode=Full_Duplex_Master +ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE +SH.ADCx_IN1.0=ADC1_IN1,IN1-Single-Ended RCC.PLLPoutputFreq_Value=22857142.85714286 RCC.APB1TimFreq_Value=80000000 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false RCC.LPUART1Freq_Value=80000000 SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate SPI2.Direction=SPI_DIRECTION_2LINES +ADC2.Rank-0\#ChannelRegularConversion=1 PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO ProjectManager.CustomerFirmwarePackage= PA3.Signal=USART2_RX @@ -108,30 +126,37 @@ RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSI PA14\ (JTCK-SWCLK).Mode=Serial_Wire RCC.PLLQoutputFreq_Value=80000000 ProjectManager.ProjectFileName=CubeMX_Config.ioc +ADC1.Rank-0\#ChannelRegularConversion=1 PA7.Mode=Full_Duplex_Master -Mcu.PinsNb=20 +Mcu.PinsNb=23 ProjectManager.NoMain=false SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master +ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE PC11.Signal=SPI3_MISO RCC.SWPMI1Freq_Value=80000000 -PC2.Signal=SPI2_MISO +PC2.Signal=ADCx_IN3 PC10.Mode=Full_Duplex_Master ProjectManager.DefaultFWLocation=true -PC2.Mode=Full_Duplex_Master PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer ProjectManager.DeletePrevious=true +PC0.Signal=ADCx_IN1 RCC.VCOSAI2OutputFreq_Value=128000000 VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT RCC.FamilyName=M PA3.Mode=Asynchronous +ADC3.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 ProjectManager.TargetToolchain=MDK-ARM V5 +ADC2.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate RCC.USBFreq_Value=64000000 RCC.PLLSAI1PoutputFreq_Value=18285714.285714287 PB10.Signal=SPI2_SCK +PB14.Signal=SPI2_MISO RCC.PLLSAI2RoutputFreq_Value=64000000 PA5.Signal=SPI1_SCK +ADC2.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE PC12.Mode=Full_Duplex_Master board=custom RCC.VCOOutputFreq_Value=160000000 @@ -144,6 +169,7 @@ RCC.I2C1Freq_Value=80000000 SPI1.Mode=SPI_MODE_MASTER RCC.LCDFreq_Value=32768 RCC.RNGFreq_Value=64000000 +SH.ADCx_IN2.ConfNb=1 RCC.PLLSAI1QoutputFreq_Value=64000000 RCC.ADCFreq_Value=64000000 VP_SYS_VS_Systick.Mode=SysTick @@ -157,13 +183,18 @@ Mcu.Name=STM32L476R(C-E-G)Tx RCC.LPTIM2Freq_Value=80000000 PA2.Signal=USART2_TX ProjectManager.UnderRoot=false -Mcu.IP8=TIM16 -Mcu.IP9=TIM17 -Mcu.IP6=SYS -Mcu.IP7=TIM15 +Mcu.IP8=SPI3 +Mcu.IP9=SYS +Mcu.IP6=SPI1 +Mcu.IP7=SPI2 ProjectManager.CoupleFile=false PA13\ (JTMS-SWDIO).Mode=Serial_Wire RCC.SYSCLKFreq_VALUE=80000000 +Mcu.Pin22=VP_TIM17_VS_ClockSourceINT +Mcu.Pin20=VP_TIM15_VS_ClockSourceINT +ADC1.master=1 +Mcu.Pin21=VP_TIM16_VS_ClockSourceINT +ADC2.NbrOfConversionFlag=1 RCC.PLLSAI2PoutputFreq_Value=18285714.285714287 NVIC.ForceEnableDMAVector=true KeepUserPlacement=false @@ -172,25 +203,28 @@ NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false ProjectManager.CompilerOptimize=6 VP_TIM15_VS_ClockSourceINT.Mode=Internal ProjectManager.HeapSize=0x200 -Mcu.Pin15=VP_RTC_VS_RTC_Activate +Mcu.Pin15=PC10 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -Mcu.Pin16=VP_SYS_VS_Systick -Mcu.Pin13=PC11 -Mcu.Pin14=PC12 -Mcu.Pin19=VP_TIM17_VS_ClockSourceINT +Mcu.Pin16=PC11 +Mcu.Pin13=PA13 (JTMS-SWDIO) +Mcu.Pin14=PA14 (JTCK-SWCLK) +Mcu.Pin19=VP_SYS_VS_Systick ProjectManager.ComputerToolchain=false -Mcu.Pin17=VP_TIM15_VS_ClockSourceINT +Mcu.Pin17=PC12 RCC.HSI_VALUE=16000000 -Mcu.Pin18=VP_TIM16_VS_ClockSourceINT +Mcu.Pin18=VP_RTC_VS_RTC_Activate NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -Mcu.Pin11=PA14 (JTCK-SWCLK) -Mcu.Pin12=PC10 +ADC1.NbrOfConversionFlag=1 +Mcu.Pin11=PB10 +Mcu.Pin12=PB14 RCC.PLLN=10 -Mcu.Pin10=PA13 (JTMS-SWDIO) +Mcu.Pin10=PA7 PA2.Mode=Asynchronous RCC.PWRFreq_Value=80000000 RCC.I2C2Freq_Value=80000000 RCC.APB1Freq_Value=80000000 +ADC3.NbrOfConversionFlag=1 ProjectManager.DeviceId=STM32L476RGTx +PC1.Signal=ADCx_IN2 ProjectManager.LibraryCopy=2 PA7.Signal=SPI1_MOSI diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h index 7bc76c2ef0..3ac612f021 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -49,7 +49,7 @@ */ #define HAL_MODULE_ENABLED -/*#define HAL_ADC_MODULE_ENABLED */ +#define HAL_ADC_MODULE_ENABLED /*#define HAL_CRYP_MODULE_ENABLED */ /*#define HAL_CAN_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c index 4db5dd9f5a..c1ad2fd6ec 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c @@ -62,6 +62,10 @@ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc1; +ADC_HandleTypeDef hadc2; +ADC_HandleTypeDef hadc3; + RTC_HandleTypeDef hrtc; SPI_HandleTypeDef hspi1; @@ -90,6 +94,9 @@ static void MX_SPI3_Init(void); static void MX_TIM15_Init(void); static void MX_TIM16_Init(void); static void MX_TIM17_Init(void); +static void MX_ADC1_Init(void); +static void MX_ADC2_Init(void); +static void MX_ADC3_Init(void); /* USER CODE BEGIN PFP */ /* Private function prototypes -----------------------------------------------*/ @@ -136,6 +143,9 @@ int main(void) MX_TIM15_Init(); MX_TIM16_Init(); MX_TIM17_Init(); + MX_ADC1_Init(); + MX_ADC2_Init(); + MX_ADC3_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -197,9 +207,18 @@ void SystemClock_Config(void) { Error_Handler(); } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2; + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_ADC; PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 8; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); @@ -212,6 +231,185 @@ void SystemClock_Config(void) } } +/** + * @brief ADC1 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC1_Init(void) +{ + + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + ADC_MultiModeTypeDef multimode = {0}; + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + /** Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc1.Init.Resolution = ADC_RESOLUTION_12B; + hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc1.Init.LowPowerAutoWait = DISABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.NbrOfConversion = 1; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.NbrOfDiscConversion = 1; + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc1.Init.DMAContinuousRequests = DISABLE; + hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc1.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc1) != HAL_OK) + { + Error_Handler(); + } + /** Configure the ADC multi-mode + */ + multimode.Mode = ADC_MODE_INDEPENDENT; + if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) + { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ + +} + +/** + * @brief ADC2 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC2_Init(void) +{ + + /* USER CODE BEGIN ADC2_Init 0 */ + + /* USER CODE END ADC2_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC2_Init 1 */ + + /* USER CODE END ADC2_Init 1 */ + /** Common config + */ + hadc2.Instance = ADC2; + hadc2.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc2.Init.Resolution = ADC_RESOLUTION_12B; + hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc2.Init.LowPowerAutoWait = DISABLE; + hadc2.Init.ContinuousConvMode = DISABLE; + hadc2.Init.NbrOfConversion = 1; + hadc2.Init.DiscontinuousConvMode = DISABLE; + hadc2.Init.NbrOfDiscConversion = 1; + hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc2.Init.DMAContinuousRequests = DISABLE; + hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc2.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc2) != HAL_OK) + { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_2; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC2_Init 2 */ + + /* USER CODE END ADC2_Init 2 */ + +} + +/** + * @brief ADC3 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC3_Init(void) +{ + + /* USER CODE BEGIN ADC3_Init 0 */ + + /* USER CODE END ADC3_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC3_Init 1 */ + + /* USER CODE END ADC3_Init 1 */ + /** Common config + */ + hadc3.Instance = ADC3; + hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc3.Init.Resolution = ADC_RESOLUTION_12B; + hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc3.Init.LowPowerAutoWait = DISABLE; + hadc3.Init.ContinuousConvMode = DISABLE; + hadc3.Init.NbrOfConversion = 1; + hadc3.Init.DiscontinuousConvMode = DISABLE; + hadc3.Init.NbrOfDiscConversion = 1; + hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc3.Init.DMAContinuousRequests = DISABLE; + hadc3.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc3.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc3) != HAL_OK) + { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC3_Init 2 */ + + /* USER CODE END ADC3_Init 2 */ + +} + /** * @brief RTC Initialization Function * @param None diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index 4a2fc078b1..5f50279125 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -97,6 +97,163 @@ void HAL_MspInit(void) /* USER CODE END MspInit 1 */ } +static uint32_t HAL_RCC_ADC_CLK_ENABLED=0; + +/** +* @brief ADC MSP Initialization +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + HAL_RCC_ADC_CLK_ENABLED++; + if(HAL_RCC_ADC_CLK_ENABLED==1){ + __HAL_RCC_ADC_CLK_ENABLE(); + } + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + } + else if(hadc->Instance==ADC2) + { + /* USER CODE BEGIN ADC2_MspInit 0 */ + + /* USER CODE END ADC2_MspInit 0 */ + /* Peripheral clock enable */ + HAL_RCC_ADC_CLK_ENABLED++; + if(HAL_RCC_ADC_CLK_ENABLED==1){ + __HAL_RCC_ADC_CLK_ENABLE(); + } + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**ADC2 GPIO Configuration + PC1 ------> ADC2_IN2 + */ + GPIO_InitStruct.Pin = GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC2_MspInit 1 */ + + /* USER CODE END ADC2_MspInit 1 */ + } + else if(hadc->Instance==ADC3) + { + /* USER CODE BEGIN ADC3_MspInit 0 */ + + /* USER CODE END ADC3_MspInit 0 */ + /* Peripheral clock enable */ + HAL_RCC_ADC_CLK_ENABLED++; + if(HAL_RCC_ADC_CLK_ENABLED==1){ + __HAL_RCC_ADC_CLK_ENABLE(); + } + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**ADC3 GPIO Configuration + PC2 ------> ADC3_IN3 + */ + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC3_MspInit 1 */ + + /* USER CODE END ADC3_MspInit 1 */ + } + +} + +/** +* @brief ADC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspDeInit 0 */ + + /* USER CODE END ADC1_MspDeInit 0 */ + /* Peripheral clock disable */ + HAL_RCC_ADC_CLK_ENABLED--; + if(HAL_RCC_ADC_CLK_ENABLED==0){ + __HAL_RCC_ADC_CLK_DISABLE(); + } + + /**ADC1 GPIO Configuration + PC0 ------> ADC1_IN1 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0); + + /* USER CODE BEGIN ADC1_MspDeInit 1 */ + + /* USER CODE END ADC1_MspDeInit 1 */ + } + else if(hadc->Instance==ADC2) + { + /* USER CODE BEGIN ADC2_MspDeInit 0 */ + + /* USER CODE END ADC2_MspDeInit 0 */ + /* Peripheral clock disable */ + HAL_RCC_ADC_CLK_ENABLED--; + if(HAL_RCC_ADC_CLK_ENABLED==0){ + __HAL_RCC_ADC_CLK_DISABLE(); + } + + /**ADC2 GPIO Configuration + PC1 ------> ADC2_IN2 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1); + + /* USER CODE BEGIN ADC2_MspDeInit 1 */ + + /* USER CODE END ADC2_MspDeInit 1 */ + } + else if(hadc->Instance==ADC3) + { + /* USER CODE BEGIN ADC3_MspDeInit 0 */ + + /* USER CODE END ADC3_MspDeInit 0 */ + /* Peripheral clock disable */ + HAL_RCC_ADC_CLK_ENABLED--; + if(HAL_RCC_ADC_CLK_ENABLED==0){ + __HAL_RCC_ADC_CLK_DISABLE(); + } + + /**ADC3 GPIO Configuration + PC2 ------> ADC3_IN3 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2); + + /* USER CODE BEGIN ADC3_MspDeInit 1 */ + + /* USER CODE END ADC3_MspDeInit 1 */ + } + +} + /** * @brief RTC MSP Initialization * This function configures the hardware resources used in this example @@ -186,18 +343,18 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /**SPI2 GPIO Configuration - PC2 ------> SPI2_MISO PC3 ------> SPI2_MOSI - PB10 ------> SPI2_SCK + PB10 ------> SPI2_SCK + PB14 ------> SPI2_MISO */ - GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Pin = GPIO_PIN_3; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_14; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; @@ -272,13 +429,13 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) __HAL_RCC_SPI2_CLK_DISABLE(); /**SPI2 GPIO Configuration - PC2 ------> SPI2_MISO PC3 ------> SPI2_MOSI - PB10 ------> SPI2_SCK + PB10 ------> SPI2_SCK + PB14 ------> SPI2_MISO */ - HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_3); + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3); - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10); + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_14); /* USER CODE BEGIN SPI2_MspDeInit 1 */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig index 4ecb1a6e42..687ad3a85e 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig @@ -166,6 +166,14 @@ menu "On-chip Peripheral Drivers" config BSP_USING_ADC1 bool "Enable ADC1" default n + + config BSP_USING_ADC2 + bool "Enable ADC2" + default n + + config BSP_USING_ADC3 + bool "Enable ADC3" + default n endif menuconfig BSP_USING_ONCHIP_RTC -- Gitee From c8e7093ee66bbd5008a94c8da9916a27fb20f297 Mon Sep 17 00:00:00 2001 From: NU-LL <1125934312@qq.com> Date: Thu, 7 May 2020 12:39:24 +0800 Subject: [PATCH 44/54] Fix LPTIM error --- .../board/CubeMX_Config/.mxproject | 4 +- .../board/CubeMX_Config/CubeMX_Config.ioc | 42 ++++++++++-------- .../CubeMX_Config/Inc/stm32l4xx_hal_conf.h | 2 +- .../board/CubeMX_Config/Src/main.c | 41 ++++++++++++++++- .../CubeMX_Config/Src/stm32l4xx_hal_msp.c | 44 +++++++++++++++++++ 5 files changed, 110 insertions(+), 23 deletions(-) diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject index 0160a9c929..838bcf2aa4 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/.mxproject @@ -5,10 +5,10 @@ SourcePath=G:/1 Code/rt-thread/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_lptim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; +SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;..\\Src/system_stm32l4xx.c;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;; HeaderPath=F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Device\ST\STM32L4xx\Include;F:\STM32Cube\Repository\STM32Cube_FW_L4_V1.15.1\Drivers\CMSIS\Include;..\Inc; CDefines=USE_HAL_DRIVER;STM32L476xx;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc index 50c89435ba..7d78ad4047 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -20,7 +20,7 @@ SH.ADCx_IN2.0=ADC2_IN2,IN2-Single-Ended PC10.Signal=SPI3_SCK PC12.Signal=SPI3_MOSI RCC.PLLSAI1RoutputFreq_Value=64000000 -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_SPI3_Init-SPI3-false-HAL-true,8-MX_TIM15_Init-TIM15-false-HAL-true,9-MX_TIM16_Init-TIM16-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_ADC2_Init-ADC2-false-HAL-true,13-MX_ADC3_Init-ADC3-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_SPI3_Init-SPI3-false-HAL-true,8-MX_TIM15_Init-TIM15-false-HAL-true,9-MX_TIM16_Init-TIM16-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true,11-MX_ADC1_Init-ADC1-false-HAL-true,12-MX_ADC2_Init-ADC2-false-HAL-true,13-MX_ADC3_Init-ADC3-false-HAL-true,14-MX_LPTIM1_Init-LPTIM1-false-HAL-true VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled RCC.RTCFreq_Value=32768 RCC.USART2Freq_Value=80000000 @@ -34,12 +34,12 @@ PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK RCC.I2C3Freq_Value=80000000 RCC.LPTIM1Freq_Value=80000000 -Mcu.IP4=RCC +Mcu.IP4=NVIC +Mcu.IP5=RCC RCC.FCLKCortexFreq_Value=80000000 -Mcu.IP5=RTC Mcu.IP2=ADC3 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false -Mcu.IP3=NVIC +Mcu.IP3=LPTIM1 Mcu.IP0=ADC1 Mcu.IP1=ADC2 Mcu.UserConstants= @@ -49,7 +49,7 @@ Mcu.ThirdPartyNb=0 SPI1.Direction=SPI_DIRECTION_2LINES RCC.HCLKFreq_Value=80000000 SH.ADCx_IN3.0=ADC3_IN3,IN3-Single-Ended -Mcu.IPNb=14 +Mcu.IPNb=15 ProjectManager.PreviousToolchain= RCC.APB2TimFreq_Value=80000000 SPI1.CalculateBaudRate=40.0 MBits/s @@ -73,15 +73,16 @@ ProjectManager.ProjectBuild=false RCC.HSE_VALUE=8000000 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false -Mcu.IP10=TIM15 +Mcu.IP10=SYS USART2.VirtualMode-Asynchronous=VM_ASYNC NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE -Mcu.IP12=TIM17 -Mcu.IP11=TIM16 +Mcu.IP12=TIM16 +Mcu.IP11=TIM15 ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.15.1 MxDb.Version=DB.5.0.60 -Mcu.IP13=USART2 +Mcu.IP14=USART2 +Mcu.IP13=TIM17 ProjectManager.BackupPrevious=false RCC.VCOInputFreq_Value=16000000 SH.ADCx_IN1.ConfNb=1 @@ -102,6 +103,7 @@ SPI3.Mode=SPI_MODE_MASTER ProjectManager.ToolChainLocation= RCC.LSI_VALUE=32000 VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00 ADC3.Rank-0\#ChannelRegularConversion=1 RCC.LSCOPinFreq_Value=32000 ADC2.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 @@ -128,7 +130,7 @@ RCC.PLLQoutputFreq_Value=80000000 ProjectManager.ProjectFileName=CubeMX_Config.ioc ADC1.Rank-0\#ChannelRegularConversion=1 PA7.Mode=Full_Duplex_Master -Mcu.PinsNb=23 +Mcu.PinsNb=24 ProjectManager.NoMain=false SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master @@ -183,17 +185,18 @@ Mcu.Name=STM32L476R(C-E-G)Tx RCC.LPTIM2Freq_Value=80000000 PA2.Signal=USART2_TX ProjectManager.UnderRoot=false -Mcu.IP8=SPI3 -Mcu.IP9=SYS -Mcu.IP6=SPI1 -Mcu.IP7=SPI2 +Mcu.IP8=SPI2 +Mcu.IP9=SPI3 +Mcu.IP6=RTC +Mcu.IP7=SPI1 ProjectManager.CoupleFile=false PA13\ (JTMS-SWDIO).Mode=Serial_Wire RCC.SYSCLKFreq_VALUE=80000000 -Mcu.Pin22=VP_TIM17_VS_ClockSourceINT -Mcu.Pin20=VP_TIM15_VS_ClockSourceINT +Mcu.Pin22=VP_TIM16_VS_ClockSourceINT +Mcu.Pin23=VP_TIM17_VS_ClockSourceINT +Mcu.Pin20=VP_SYS_VS_Systick ADC1.master=1 -Mcu.Pin21=VP_TIM16_VS_ClockSourceINT +Mcu.Pin21=VP_TIM15_VS_ClockSourceINT ADC2.NbrOfConversionFlag=1 RCC.PLLSAI2PoutputFreq_Value=18285714.285714287 NVIC.ForceEnableDMAVector=true @@ -208,11 +211,11 @@ NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false Mcu.Pin16=PC11 Mcu.Pin13=PA13 (JTMS-SWDIO) Mcu.Pin14=PA14 (JTCK-SWCLK) -Mcu.Pin19=VP_SYS_VS_Systick +Mcu.Pin19=VP_RTC_VS_RTC_Activate ProjectManager.ComputerToolchain=false Mcu.Pin17=PC12 RCC.HSI_VALUE=16000000 -Mcu.Pin18=VP_RTC_VS_RTC_Activate +Mcu.Pin18=VP_LPTIM1_VS_LPTIM_counterModeInternalClock NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 ADC1.NbrOfConversionFlag=1 Mcu.Pin11=PB10 @@ -220,6 +223,7 @@ Mcu.Pin12=PB14 RCC.PLLN=10 Mcu.Pin10=PA7 PA2.Mode=Asynchronous +VP_LPTIM1_VS_LPTIM_counterModeInternalClock.Signal=LPTIM1_VS_LPTIM_counterModeInternalClock RCC.PWRFreq_Value=80000000 RCC.I2C2Freq_Value=80000000 RCC.APB1Freq_Value=80000000 diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h index 3ac612f021..04047367e9 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -69,7 +69,7 @@ /*#define HAL_IWDG_MODULE_ENABLED */ /*#define HAL_LTDC_MODULE_ENABLED */ /*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ +#define HAL_LPTIM_MODULE_ENABLED /*#define HAL_MMC_MODULE_ENABLED */ /*#define HAL_NAND_MODULE_ENABLED */ /*#define HAL_NOR_MODULE_ENABLED */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c index c1ad2fd6ec..73f4b3f008 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/main.c @@ -66,6 +66,8 @@ ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; ADC_HandleTypeDef hadc3; +LPTIM_HandleTypeDef hlptim1; + RTC_HandleTypeDef hrtc; SPI_HandleTypeDef hspi1; @@ -97,6 +99,7 @@ static void MX_TIM17_Init(void); static void MX_ADC1_Init(void); static void MX_ADC2_Init(void); static void MX_ADC3_Init(void); +static void MX_LPTIM1_Init(void); /* USER CODE BEGIN PFP */ /* Private function prototypes -----------------------------------------------*/ @@ -146,6 +149,7 @@ int main(void) MX_ADC1_Init(); MX_ADC2_Init(); MX_ADC3_Init(); + MX_LPTIM1_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -208,8 +212,9 @@ void SystemClock_Config(void) Error_Handler(); } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 - |RCC_PERIPHCLK_ADC; + |RCC_PERIPHCLK_LPTIM1|RCC_PERIPHCLK_ADC; PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK; PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -410,6 +415,40 @@ static void MX_ADC3_Init(void) } +/** + * @brief LPTIM1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPTIM1_Init(void) +{ + + /* USER CODE BEGIN LPTIM1_Init 0 */ + + /* USER CODE END LPTIM1_Init 0 */ + + /* USER CODE BEGIN LPTIM1_Init 1 */ + + /* USER CODE END LPTIM1_Init 1 */ + hlptim1.Instance = LPTIM1; + hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC; + hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1; + hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE; + hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH; + hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE; + hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL; + hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO; + hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO; + if (HAL_LPTIM_Init(&hlptim1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPTIM1_Init 2 */ + + /* USER CODE END LPTIM1_Init 2 */ + +} + /** * @brief RTC Initialization Function * @param None diff --git a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index 5f50279125..dda464c29e 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -254,6 +254,50 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) } +/** +* @brief LPTIM MSP Initialization +* This function configures the hardware resources used in this example +* @param hlptim: LPTIM handle pointer +* @retval None +*/ +void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim) +{ + if(hlptim->Instance==LPTIM1) + { + /* USER CODE BEGIN LPTIM1_MspInit 0 */ + + /* USER CODE END LPTIM1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_LPTIM1_CLK_ENABLE(); + /* USER CODE BEGIN LPTIM1_MspInit 1 */ + + /* USER CODE END LPTIM1_MspInit 1 */ + } + +} + +/** +* @brief LPTIM MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hlptim: LPTIM handle pointer +* @retval None +*/ +void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim) +{ + if(hlptim->Instance==LPTIM1) + { + /* USER CODE BEGIN LPTIM1_MspDeInit 0 */ + + /* USER CODE END LPTIM1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPTIM1_CLK_DISABLE(); + /* USER CODE BEGIN LPTIM1_MspDeInit 1 */ + + /* USER CODE END LPTIM1_MspDeInit 1 */ + } + +} + /** * @brief RTC MSP Initialization * This function configures the hardware resources used in this example -- Gitee From 12887d54ceb2781194bc5104e596917ceaf6c946 Mon Sep 17 00:00:00 2001 From: luhuadong Date: Thu, 7 May 2020 20:45:54 +0800 Subject: [PATCH 45/54] [BSP] optimize dist handle according to #3582 --- bsp/stm32/stm32l412-st-nucleo/rtconfig.py | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/rtconfig.py b/bsp/stm32/stm32l412-st-nucleo/rtconfig.py index ab166e687d..ad5c811ba7 100644 --- a/bsp/stm32/stm32l412-st-nucleo/rtconfig.py +++ b/bsp/stm32/stm32l412-st-nucleo/rtconfig.py @@ -17,8 +17,7 @@ if os.getenv('RTT_ROOT'): # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' - #EXEC_PATH = r'C:\Users\XXYYZZ' - EXEC_PATH = r'/home/rudy/opt/gcc-arm-none-eabi-7-2017-q4-major/bin/' + EXEC_PATH = r'C:\Users\XXYYZZ' elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = r'C:/Keil_v5' @@ -58,7 +57,7 @@ if PLATFORM == 'gcc': else: CFLAGS += ' -O2' - CXXFLAGS = CFLAGS + CXXFLAGS = CFLAGS POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' @@ -89,7 +88,7 @@ elif PLATFORM == 'armcc': else: CFLAGS += ' -O2' - CXXFLAGS = CFLAGS + CXXFLAGS = CFLAGS CFLAGS += ' -std=c99' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' @@ -139,6 +138,13 @@ elif PLATFORM == 'iar': LFLAGS += ' --entry __iar_program_start' CXXFLAGS = CFLAGS - + EXEC_PATH = EXEC_PATH + '/arm/bin/' POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT) -- Gitee From 542edd90665cf63f673c59558c542232ee551773 Mon Sep 17 00:00:00 2001 From: luhuadong Date: Thu, 7 May 2020 20:48:50 +0800 Subject: [PATCH 46/54] [BSP] update a picture of stm32l412-nucleo --- .../stm32l412-st-nucleo/figures/board.jpg | Bin 91973 -> 383711 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg b/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg index e21bbd934302a4c79c173094eb931c2855e442ce..d4f9c76a31dc157266163f5b2194f30c9404e0b0 100644 GIT binary patch literal 383711 zcmeFXXHZk&_bwU*L8SK%Dj*%Cw*aEjrT4BkLX=UI1u?$!ZhYD%g~fCmo&fCu+K zz}*ty4dB85kc=(SAo)F&O&_D)w_y7mzAui6NN4U86cL&^G2jG%FqIf2xfJdqG0spxhm2hxE z-eb1cHQm&@Q)qUPkM5rdp3u`4Soy{xu>pF)2AEHSJq^#*h4h!lL4m(z4pR`i91)=9bo; z-oE~U!J*-i>6zKN`Gr4=a0GJW@8;I_znxvo(ecUY**W&&@;|s90C4_C$o@O9{~Ipy zdt483adB|*|AXtnL!W!YA;*36ObCxcK?nbX8|8E1;Kx+26Y^@h3D`t*(bON^r=HNT ziy}BM|AF>j$o}5}`~3e2+5Z6cf8v4zh;Sa@y=fIQ&#mg`3(;D6iyj=}%j9*8IN z(|$OmNCnXOe=^l(zqrA;ZH1>qN&NtRDxFu4sI(tT4O+(y1U=z?fL{m*nGT|fb z|6&9>tSM~ciX zw=b-Fer$e=r=oaO{S-qwfFf1W{v;|$4hbH&R+P~|&S_%I2 z#P#v^q)hN6-F02ReHTi$kXER7U5idN4*7DiPgY4nQ}wzAo}YaOm~6cRV4pXoodeIV zS}mH*P;`g--#((qc(H^&5`(~42BiYO*?O& zEG()1hL2)(H3`4wnWQ6nNR@u_iu0MP7NwQ~C7T zS(4Tq=Jx%U)5Gg09n-g3@(W<|Gnb1}LDTvL=cD86$&y-;SnMQ1Nx2f*aR(q~E+IO= zY9W8gHW0JP#~nh>_OSX+S1OJ+aoGA!Zfz3b%c{s?&gQYKYG|}I)q)5-#eU~?Ri?{< z?;XIDU|{~dbg$_UbOFM6-p43Rt}wq4+Qo{ZF8Mi(H9|^WQm<7wY<|nKKB(#5X_J-R z#lI==vhlXU>UTc3HH6cFTj^GgLYf~g4j}byY&LuV!5Z9M7amr309=Ek+wI)b!nw5L znMHZz%pN$PT4Xn{-e{EgO4ac@w2Pqq?RbMp@*bQaW#!LiYcz`=6O;c!=2^;o{P%DK zO&6~m(gVr=<*I*l zs=2_e`rZP%@WpD~-{4`a!qWic6CS4<)l`BgAtZC=WcN6T3h+vfAC39=nDaYs$iClM z@vzY?bm2m$?8-YXcm29b&UmpkIb|hfPuKL`J8WS&0IUf837GQ2Lf4sv1J7;A8A>pZFX`ggbUQR9rQMUl#3=TnH`wDDZ+n|dG0w@WJY_&BbA?KA8$ zuRzLG8lnuWL6u$+mDl-ve)fH=Pu4`;)U#_x8f(Ws>i#MbjOimQSfAe`h)$6(c#m;T zH1eWhs4J#IIfIVeD^1M~uBSr!5c!6pESyB;>MGNaNV#cK3pmsD#Hc?%Y3n~(66v$* zxU{o0%$EXDtH*W@L%QFwldp}~{~j^OJ*JbpI4Lzdi^B8@Y+}_zf(%#(GK3pFVpZZ? z=(d^t8F~||a+@oC3R8IEFq9!Z1bg zD%Ui8@4frwm8dIu;r;Genbgw1^u zFuDT>a>Le#C&Zx$Hhx#;hBhK<#ltbN846d+Hm}5U zq_2)=s9?RXA=ry=SSvemqAI9$apT4x=+D0_EiAKKhE9dAJ9AHVElr&Q^B`WO8ekWs z(oLh5fp>$^^5tIT(+3JCdsa-NSIXF3fGI4DrsQGbYe?yB7#i`)L{PFShQiNJI3I*ca7Tbj1 zEc^?&1Kd}(a~zB;FM|E1{2C;*MB7^_;rk#csV|}QkEGAyCXKD(Q!;!E*MzZ=LhOT|{Xt6|F&^Ob_v#J;fX zT0SP4%Jm0@(8*I#btlHSYAD{$fF;qERnSZ<^ z%f-vz9?aC_GJHS7AzqDu@1c~igEWd56u>k58)+bS^u1Xk3)h1ZNN^Y0d@J^yM#_mOsT81? z$$*iX1}B|Nr@?qpQ*`Z3CGSlKH(5q7>YT{-TB_BbUYjK#RW$CFf*r=KOywb&H@$&UerL2JhxPz$LldL_vo>ii-Hyqzio1{L!XPUL&m3>?rHD#nm( z0kBdXKyUM(6P4UL28Fu9(HHuMs)bz5oZ|!*VjzzB!NU8rC*)Rn>Q_@K9XMP}3>r2t zicZdLVV}$1c#&qIwfYYR?h5sJLIxSNFd@(O&c(AD7zDr1${t#z+c;!#6_&g&x*&9& zZ%n&OSz=7X9RL~Eh3{?rU?E2V2Y@-P9{O_AdLmB_Vxh!p2=?;h7+^FDK~8zQ(zg*G zK71%$-t(i$IP`+isU)OS9q@CuwuG(_x4TUg2mU7ge(}5C#}Ne*>s?FVh~#3!y%0}5 zHWv+*bn0e%&xjl3dlBQS{!%Y0%NA13>FjU?H(m1fD?aL&h?ptWI8t@aG?Nu9H}q+k zYiPLSkDHmfGKKQm$v~aT$(CN1L1c73GFB~zPH1WBTQ77xyD67rjCcz}XY7u4xR*i6 zOKK#C*j3n{0G@91NYPJS1{M>%S%d)Ru;^fPHr2^6~qzFp%)J@z7c{0l4QzF$oeI@Al--B~Gdv_}OU^na^8osWNusy^BuL(%4*F zG6;Y!X#LU@iN%;%>1Rv{+_y%A%QrNv^>={YMRpdWIIl+!4AQN-r9-O5655{Yv$?S) zx(a1^SgZx#iv42|?YzPZt{g@Z7DVczHS$*eX)yi>BeH2td<#u1v!=5(A{{9=+Q@0R zdd<1Nhh!!-or5yvu%lz!3LL#NLMMug;pzoNjcJBSp!uH`TDdRICg4jtIa}iJIx~x< z+EgJ)R)fG^t9mN=`h_T{)kZccA~kQli{zh=5u8aHeT9F`mh*g;PmFL+y?#nD-#3as zwB8%uVID^uLCnUi%qrFZ8h?EX&Mjc)I( zzM9t7P#PPP3BQU3ha?P}hbb&X#|3g%(C~MyYX}^yX5TMzSK)U6i>ZAR zmiiDWDWLZqK(d;}>T7Gf_p#^|IqL&)b&vLVsgqpB0Xh^fGa}(z>aXw2Wq?x;`LN65{eD!>rWQxxI@Nh7)$U zR~~g$b;hLgaOc_d*rjRY1%Kz$Yde#!jqP79Bp$~md%Vx9T?-X(6IN=1C#8OUw)(n8 zKeycPvHpgBOJ01^1Q%AThSTDA+&xrsStW5Bw0AQ9yGbKZ*6<2kG!IWPmub4v;Mesz zzg*G^4}euVovx`#FAR}lI5&hFH(Sxqbd7jEow{1D+u&q1lDgv;$-dBv$fZf3wrNG% zB-y0(=M+WM*ZeZ4P@=`*pS{#GHn;Y^%(lG)1eu`fw&xdMKHsvT!VMVFhMhwTr>?f` z8!N3U$sJUdzwW{?0mcaVHZhZG7Dyq+9&JAASYuUR?rilwxrcH5v2mGi=xdi}3c$G( zY#he8PknOz4)D_YOT*lggdC6NkRkd>>x7+D^tZp$5b50=F)!lm2Fu%W%gkFnCQTZ% zk01%}imdF$HFa3h)RI|%h3Zj`D~Ug{)95}zRB9CGa+HP>sA2n(pM*Elj4tDoIy23O zI`Vzh5tu<+~TaxkCSA76gHu?vu^gGIPLane`!-Z=WQ>fYAjk#Q1 zXq%NuK}O>>e02#_ed-T(DKB9s>6nmbz-Ag^PdA*%cpWnagZUCHRg71GshP$4#|96Y zb6(ay&f#=8?gHcCfFHVU-V{PVP#2hfxoirqtlwd#7Ncjkt@$R!^FyXZfM&T)o-pF^ z$0yZd?d}!xI?)@c$Ys0P_j97Nn;c$ra$waCUDXbwmCP~WO>V_4y0_~sMcD=r4!h;K zYO16*=N0jm^GbSpoP}b96*a_TV>0@*)bMCV7j0Kp%pNAyRcEOhB#A#NAzr7&pz{5* zf>gKeEBxGiATtJ!m15$Pz^A`8U60vcsV1&&zG55`b{#Qd<9>?Yd}w0OZSCL@U`=2d z5>mfm$Riw^HZS2MD4w=#0W_p(4atkhw-hmoE>+JEK1oT0y_i(}5pU0Q-vi4fH;g$` z=_msJm)e&gsh#Q6_ABIU;u~}m5;#R;@)6A$^*1IVo!Lf$Kph-c&tcQ;dH z`e-6WO7%!)lRpV>hN_cy%8f-_4p3(UJV^ryu{f%#+(I9umroXAUCpw8FZUNIKguaD z)m-ET*6!6f#+zucU>UUYa6!WX@I9FRF8ld$mfHwyXO{o6T z&d1jC6ulZzqwoBbS@=(ID1JHROzMQDrrU-69pI7wO?iXWBJWus+P-g+bSI{C4-K_J zL;Zkwm%Gzrs}2K)eM)NvpO<;9K&_v5NQ*2@WqOEw6z5-If&$a{@)h5Z)QAOy(sM}9 z%`z)$rF%%JahIx%FFL}_Eb@m3HS1Cg!t+skN|-|BY~8aMQ(&1hCgyzZV97;~5-EYA z-4MBY3+^PJm6HX*9$kw$A-fnLmdtv3b?Dg)urb!7*OGp|epDN%PWdNB2|TWgmK{)> zMW=+ilUdJpGGLE4s{5VT45xt{7|P!B44SBomXj7apcy2vM;=v8u(b1XwPPYU&;0(Z z-6J0mz*5S#lV+NwdXvG{l<4oe-&cIJxZZ{3(Hb};!?yM3vRHM)2n2y|oGKx?ebtDz zN=A#heU1Q_%8cmfkmc6I0=||OUwYSnR?)rd4C53USO-Z{)re+5GDebLCRJO^)rN~X#%8rt^Ei&@ zep3!@ZXzIBV2$iY)@T}6^mMZFcW;1|$<2sOr+RhH8ie%GCjl|biG>;(W@;IKZmYZO zidxGZz}Of0p7H(y(@kjZq6ZVjfbaf6}sx4NaIQ#_&gVuZ|1*zc<&Z z>>qZH2=eQ{5nh;$$NTk68K+dPnQp-24luu6MGP&y;=~R?dJ(6yWZ+z)hA7r2j@l6C zi6sOq9H@uLrhVJkI9=iVe)^ySXjI}TA-u{ip)=7WE_@Sa2Fi07i#AodM6N#kPFxX9 zr6R%0<*-aqQBXqEg6m9AkLzbNxLp?Q0W~XBN@38fl+euPa(|OBQ#>l!-IFWWVATOq zR62%sqS8;VfxDyJ-8^&U24$tH`q_?=g_d5rYT8+|yWG;wCx>H8+UAoPe-pBt_<~{q z^peAL%(1d{K6o$uhaN}rQ7jdcN3^bl zb}@kT+h3dk<&p`v9Lc|@)l!OJ&#GLdE6%mCQ_C)|rmoYQ=ky!~54>Nf{&g4j+rUNp zogQ9JB?L?T!k2ue^osplYLbb_BQ}Liol)kc(+B}Rk4}idgI`bmq067O@XBjmwSARQ zPd)~4y!}Q*)$~e5SGk0xr)vIBCRe2ZYHJl`v4ruqAR4zE_u>~m*Dz}vWo`V0W*nEZ zYwTzcz(1_C2h_V4KQeav6U{)iA4W$A9N@B!DM*NVcWYWkZwsXHS!($cU6<%+!npNE z4l@iOEeb5Y11$X7Dw8RZ`zR>Tyo}H8_1A6h_lexe!G6k#Mw@Sa73#=zpJpN5;lzR^ zqJt%_tt-=ik(NdwjF91PJRzCyAdtn+KKe2vRu%9R@k(3u*MuL5f9&;xnGl1qJpCYx z2m`kkW=a=%9u+<7csz498BWF^qVMzeAf^-|?^1gM#@g=`eE=B}RaQ&vW5bxNobvLv z`|YwKzH}W?+!li)6fM;YEt7M~|2f2zaKCaj8!i^nZND<^00V+yt(+(vFN{(DEj6|n zS&rCI{TO zpi3n*0c(}Mq>#Kc8alrN)cSV&an)wpm5KJEJ*Rxnh9{q%yBUJX+Eo_Ef3lj)u79wo{_ zQOpRR%SusvHU&ih6$Y_SrcSzFD~XT?mlLrIVf}zpsSJ?x4;?Xf$esJrk(pGK#-Cba zI|enYwerw*YfD7e!U^iC z*w1$Wm5#W9W5~zVL!G(QkrC~TiiOtDS?Scaa!0p@oa`dw=InVXMxU9$XE)im%#eJ< zWM6d{3tMgbJd_`!-XF+^N$sHii@B*B zZMYpV+n;GSz!*V+z~8r`*QV%+%I{dtH)y)qbB=(F$-Ae*Pt8}seFWy98T zKR#`=%sKNH#;OlDCq#2Ish;U$GsD4##*reaMqi6f^-6gllKxD#JP@EP16g9Y=s$nc zb~NqP)_ux2Kc731hI*u>BPUl`k;Ee!dl^Anb5wmR^-L+ycB}vFJaV0hdL41b=Q^yDD*2SN@A|@lvt9LH5g{Qe=S4 z+uOC-O3}I^Qwz%qACAAqx{DS#Z*$asvR#bal*y4olDfOS1&Gy^< z3AHq_U}84a$qT8}Bd7feDb|_M-_T8rX8tl6Ca3@j>;0V;cw-%0-m z>(UQzO!kT+H-;SR)OW@5llE3TYDf8&?l9=nN=S#s1pUr$xzev@&TgwO9wL1*(W$up z^;r{|v+n}s1qP=!&xk&rzGvGMuS?ohizjB(Y{UL2(Ww0RLLBa!T#GQu?ZvvtR$DP! zWeAst_ad2?8NNld8jtW~IVxxCWZ6H~yfhiG0?GWj$&?)~>BT28EH$cBRFnMnyAb6% zXDgsSo&YHMBah4Y|herD7 zfnek~ui=bW8zI=ttc~!7*Qzd2LS+$;kUf!&E!VOIn}=T0Y!8sp#oPgc>u;0@G6-X2 zv@v$U-~bol8W#Qe8Ak#hxkH3QHye`;vI`$(4g1>3Hr2JBnOi>@E6S|9JKA@N-&;*; z0W!@HAuN~a;9VCC+IO;#nB+ObEb$C1eJkpF6h#8dxDZ2G9{3&#HfR_gob4LrfLl%p z)9q4Cn1)3Y+heCyd0W_9;+Y3I#cr|@=RsI23SN6inN;nNtFQaWhB~P_DbU)>ttEiZ zz)Z8!VOTGElY<4MsUf?ca2-6DBeemQ?fv`5G2Q-bRfL&uYOc?)oani}t8b_|KdXBR z2d%F5=dHx(j~RaAi?=bV0XFeVD+Tcl9fOHK&3iQZL?SLir;S7M2mV$qQhghG{|2B? z`7MRsinsYkUHo^-FS=u|o^Csa0a>y|tm4+tifasz%z?GqCvZrsW#yBT5@i- zl(@~Y#VR?exokT((}lB0MUol;tFP{ZQ9^}(2Qsfgoc&c^U^x3-h_PC_;8Ej)L=8%# zX`r&NdwfJN+4xzE`0t9HhAEt&S01?&lVPm&O)*e~AJ;ew*Ya0-5VMWkSUL9Gu+a^d z;8bba-Zd0ILA#N4(dY&}bnW3zYUeX_EtW#P{3>d69EPGvP$(LHgp}=z)Y3HTZb`LI z9TY7zBUSsd`SlB%&PVgCpBVSjiJjls(mYepx^hW{JAn8$%Y7#CHp&3zRPt#+H6%Zj z>3inTE2mL%Fa%DBxl!#JCc>z=dfY#^=>!Ds+!O`^L2Gq~-IHI}=)^P_jxB$p4P#zZ zyA^apQj;tTG}$1?mPC5%MqLiW<=?771?zvUFZeO?*EF!Rx|{DX2Y=X;zzJ#C=j%s^ z70_nQZ%;wGKcLp%1L?LtrH&Z`4b>~Ac8}$TK_0Ga_D%YckLPqLw(-x5&N?v*eTS5R zLsm^n!I+G_-j|jTX^^Nt7m&TKF}(m1cn46QIi=fAz1&)5R@ZI$Eajt7Vgb(|b)Ejk zZ-^Va3?o@1g!)!qb7I@_u;;z7#p7kHnNiNclvr}=p>k&}&R@m zXUDmT{2fO0nQ_0>v;LpuiR*HCVV*gTWpfpndPmJd>15m2NqL$AYC>*$F6l=e77b(5 za&4jIy;6OnFH6cQ8udX_u_PUmN)_PO^(l@?YKQ6Fii%Rrg-(=Cxl>yGR#+Y%)Y6rB zHsD$tUEHlj{|8drvvv5UbE-L!>=}%9`hW`B# zXTkwSEJu8=EXRhUqk3wWAP0aT<>BlEi#9EMfDqs>G|Ew^+vPI zdH?jH;EIfcIlBz`?fkRIn?j(*l`f>~H6|^#0{9G3UM|a`AucQbOWJkX6S63{)ha;& zI`^sLZ$GCPo0OgX_(xcHUzaLr!^OUU(TS)(fUUOM)so&ic9$j*ywo3)|KU-)>%~-G z;o^a_q<#vss`19fyYR0fpXAJRbHHziBL)@<5EIKSFXsei9d+x%MUzbpOKE9N)!_0) z6T;9(P%nmWPq0~X452EciNL06jR66D$760&{y`&rni+7$nS3P-7uIccD`s&m8G^hy z+<&uCsfDOWHA-7UXF_16{*?@}yqbv!FUG<2leYBtjdfSVqZaB?u^h3Bn}VBMZYK-- zp!*sh_4^J0iu)?<65<*6MF{f28ES@bAzFP=x&a2AHbnKC2G2a5JIUtoR7oSH8Fd)V;PPWOwowV0iiA>J@*+2?R%aOytw)x<>^bO%Y3@KqEu4xvj=X zl-8n=Ua^3SLxyg{g=byV9E&{j`sZW~4|rjiZ(1;BQ3@pMD>=TCfB>T-QLL-y~D1(|;t0?~l#gf80v zbz}kjaB!03+5~eVPbL;e1XXEln6BPGxo;Db3U{PqW2mnglu`-`=l0A@7cVjiM}6IZ zM|c?~5>kT`x%Kt~@-Z;dTk$<A-=CskwIm z0`^?$)0Fxyj7u1zVZNHC=Kv{zK8q^`or|aCF1fWY4gM2_Sa$M?^=<0ce3Q^44i9@~ z0H%~&h%prfE7AGsqfdpz%DCoYHW(yyqPM1_P0$9|&R9yWo~=1o$eQifel0>Coy*p2 zf|+U{u$ONT{~FewZgTp#qZK-^g3`!faRKxa~Fj1j7f ze=eSON-4%INA3}=bM=f@{i58Iwyg=0=(H` z7M<1;M#$QIPh+|U&El5uCVvUvP6zU~qY1D&g;1BI*Y)VQUdYMbWc{^b`|lU%PZD#i8MN0^r-!qGn7e_^koh&38p>y zrh`r?x@3O4PzU)E?N+v-Sr&5U#YXRb%xfWMZW*91Gvv{l@)A4NnL|qTlf>hU+FrMv z_d^TMv@!JUhP3%9NXoK+>HFXO-`B0!oigYP>;}dI$=dJG$z|%$MGTd3LhEUux9|B} zVn;bHtX?VPSS52%BF&UF(#iDq&Sg<3acr?eYs^?xV=8Tv_}2yPl}9)m{*#OlWn=7O zk+1vhL>G}~rF?gw%yeAb=^?IT#zOZ!10R0YpOtTn)=VhXps(w4`18guRaeW|_I2u( z`2w7^-UsyolZH@6%^`9_awyOf=~Ym&5QJtLhIO!uC?CBVbXf+{=|)DyQSV9z^j8-4 z_s>@rniwniwFWfIo;3;Y?AN4Qd#@pKp5C;dt_Tk1u-E;ZuGeCPNc6cNM_IoZm9O9M zw-X@1-Wbb}B9NRg#=D^yq~%tKHBzphom>*&kP&c(O$o3^zCRkg$}tHVcd$+OGWE4( zG9>9#4XsS=-ZD0s?Rj7Gq)_q=C4p^~@PNF%Vf)U4Ztn;wT)SwOYdDbl+lKHbL#JUpna) zEwuuiyxiofrV$*qX$B1%mj8NvzyGo1(_3;lr#X%qr`5{fq?s>*(FTug@Yp~W2oWT1&}iYZaxJ{wv6DX4-$}+Srop2c`+22e z!^vIsIRp{5Z#p*p+=QDV#bt4+4KnudfZO^QHI`_G-xLY?CY>w(GS>C&ub;wwOP^~b z;l7cCl{)*naR1C2=jZw~)2eKMHoTsDJ+{&J$#*g(z^|b?u`m3#fL8w~Uddl?Q>nY6 zMO43?n+@ALc_P03#365Il`i<#{W*6c+4m_D<-#wqc4Tz18&Ig$IsYS9khdWheyXlm ztl7#E;9F&SpmCa;UOO9OYml<3U?h2F~ExC89Q`REC9Vk<*82m+p_VMX2hH{JwC0{V!TS)TN+=W)*7uf58;fZw-?*_8Y0l8h*$e^nJ)`%O!kt?m% zx|-(Nnygy*t}6A>(zpk3X5d(<=v|t&HP>MJ_)7LslnFEa$e@T>T_0(xaiUtwqb4W8 zcop^_s?_Q#m>p`I^7v{WsGW=E?QydZ~as7H$qp4S( zj+FuqnKWy`5M73UWt%E$o^Dq~EOOegFm=_=QWs|sih@=7&0p0BrhYL*y97abF@#7L zlpFfE-;kDeYWK1#l%$19gIyf-15(6FW)A9FJTEe6k*?5P)bjG;b6x7S7dEc^o~qc= zoK}%}<}$@sQ51zdA6#R^!hb{T&CyyR_%Vmq&%T>s0~ai3%+$MDn;0zPekdcY$YA!u zOI6iK>bXO2UKPf%L{-*HwvgR7e51nG;^Kilt$ow|NOWR%g-sn1wbcjRP%)bg2PKiD zVqNWMs*VERLI>6;H>W4*sn)T5AGj+tncwfd|A`&i=qzNaX2h2?DCZV0$jZv6mUc@n zx*0ZQ!5oK&-2oh|B7IEd_xI3)gPl(UI5#+o`_{tGayVuyyFbq$m4mM})>)}`{p2Ix z2TxwwhHj3DPwg3&^eyee{rjKkD#)E*iH>5Nye8pny@A}=*jveYs37K`=MPx=_FKYI zHzMH8uN=~aYM}i0okj|??n1L)mjzRxf{U8&v_zZqKN*KW@Rc-F6l2(irtKGjJDTQ3 z-ac3bNwAR5o`A<+Fl%nVvtV!`74=(hO@#A~Q|D!(rupbHWC{d}i!66-PdK9=l)#jl2ifm5fbaCpmy#0W>dk92BM)riOI9Wn zE}H*o0khn&M65mKn(CiPamn6zN#Q@m%&y0-=@{C`{KU`0|3fBpiZY;o)1)oVEu)UY zCmdpXDgyiS4lfb%;ri{;ltk(t?fukIN42Xyz6L{_Z3@@r*g zx7GBdBsX>Y8KavO=|w;I!bNgHGj7dOA|j^k2gx~re+qO@gC|SrCd?ONE9w4N`G4UH z^`L`Kb}Gcb_0`UDmdSo)ZWHa{<98OXQ4U`;-lek^Ys?K0FLZh!6GXOZZoHH9j{c>3 z#}}s52a>qQ(m8Fig@vg8n4h!N&l;LjXSBctb+k=FeW*uyZJvoT)~;6{DTf&g6u(4Q zlsUGrpGEmQCV?#H7i?jz2uQhyetoNALuDn*%xZFc-zT2Yvjsdu_2Ninyw1W`rHRp`?if1tL?h5m-O2AE@O6(10tBXhF1u=f3O0iWgvz5c;SNPJsF_ft=)ZgwVn z088^$r@~DW3{2l;YxM>06IH>-*0BIoN6J_c?Fg?Z+11V1q!LsMxKuq8e#2BrTra?% zXkv)hEOdd`SYdSClDwq1BPEaPpV00_aH|!Xuy1qqF!AxZIel{#J=VJYkI;4C!l$E-o zle0ydKee#(Unj$KwX?QZV_p^bC?NOU&o961QrL60#Sz=FbnVN4zrsluW>-Y_Q_l*g zxp4VGcwDbMjhXLd$UmdYt(1~sl5~=M{4>4RE|rJ!HJ>~yg^?r1Rcv5xJ@xt)Rb7>0 z|9ISD6e&FM-T_T6;P!>%8ks0L5=IR1?`>jX%YCb1P|w@ec7vzVAj<^G*thDM^3tEH ztXR^RuxFYEE;+-z_%PI*=)s8L!HmbRwkM+ zLDy>M>Jh?Yqv3_Iy$hjS8$X+U4I{I%)kFeE;R;f^(FMr)m>vPJnPMB~MJ@)W+dOv% z0CyOvbYk5~t{rCN5iZvzD(!f!`wUKb#`5-Yi$%r_R8C5swY&w(s(yx#a0@O&N1qz` zdK~0F?xX>M3!r+xp}vS}0tlx9<~-^XR2jXr4*LovU-z?f7S7(<$aC3Q z=OSM1RR9W82Xp0_w9lt*8Cw0-yL}>aWruCE!mx${`OzM?6r^7|@qY`nzbUEk4iuh0 zU8949^jY%MPjw-<7Jx<@;6**-g{o6>koCtn&yR$~JB_Kxr!{}CAE4LHzP3!!_K8~x zVh+E05nCS2D>YE=Nw19m%Q%vJYMl2(z(@0asw%*nFigh8Mklv*vR$!fD(?-?=u0Qv z(SJI>Mi~u%6zjJ2eB6$RF;LVm4=Y;H)Zb+BZ644$i=}YDR)qIfyet3c@oto+%xJ8} z05giClq)MuK7g1bm`X8v0?DZP!Xcw%{!=&Eet$O6{*p29SF7m#@%tn$(h5(kT$cFS z_I_I5bnlh}BN1lb1|x+OxqQ{O+%x@jW|)?=teW4L0=Dt2$>->cUou%*)S!Flkvl6- zxEoWnrr=9A`by~(7X^fl<}|ZCW$``jhdpLRE4aXUk!ca~PA(6xc^9AxB^Fpqc|6F; zIKVeCz!V`GA+W!NVIJ$RY6vOfZx;e3thN!$sy}9n$Swx;CG*Oh;U!(#B+4hsR6l`FfP+KNz*}`$tH3vA)EWM)A2FUYUJn=X0;Sb zjd<=f_vpF1XXTIco5>BJ?+0Ijdf#_iPb1Ztiwd1NBRDPU1jmNDXK4UoN=%dqA*-!C zM|Xe_ZAPoGRqCMT_^KS&y{X_FZ`OAY@ezBLc~;p9O>~VF@YyS+L?`|#)K;r}#uKg| zB?^jE+7JF$nWaDGlQY%?!=cbEhl7FO#}c5=emuAzH=d;aXRy6SlX6ex^u_mX%00vc zqNQu^M-604K6kW8ZDdSTqqlEq^yMV)0Fm+;@^VntGJXv`jiLJdXPs#TcM<{1k zSyVcl9syhCLz%3zs_nnVi1~6AY>QDHI?ecdoh)65qK$gv9$>rH$Fozq;=+S&c^yrQ z|4dKIvpPz9-2oy*OP%v$Ds9kSvmQI=T!eP32lKoiEo^De+4=0`D9?P+EBma>*Zc+J z(v~rleG5~o7VlJj_0%$ue^%(}R6_rzkS7nam3}H~TES1m>R~=kDq$}QA+IM9=e=vR zaHs;tB@|_ck%&FvS2o6^h3A1M1>T}N3o&+i=*Hgd6P5 zm4}uKg2Q7}l`O|KU8lu;bX1Q@R976Q{nk*&1n+k@B~7LZpLp#Es7*(kZr7WcPoiY% z51q>{%X8P_t|@+?ssgE?+P*e%qv1%6;!KgzFA=oAuf?_N%1CFl}OV@ zTnkofc(~+2qLk;iYTc-pP3=nUOVl0quMD|28guNvI4?K5ey5fk;Jp~VNjn|I!ai!n zQoefEs@R1hMkB2l{=j+^@k4X_Eb$wEV*TZ#fC3qFb1PrG%aO$5+@38d)lPDAPHwW9 zY6)6TpACxkdG9D+ZOsDtWfSn814| zUS`t5IW%F@jftBqwKYjDc|*-a^TOD%Ot;uXH}lKv^Gykwl#FOScYhNJ{}+KNd`o=A zmJn5IbWOEZq8QgmJ+;b+6PIFt$EH6=o43lzMb=MAHufVe&HOHQw;bh49pASQy+o>` z7JNSccqvr8a<$y50x~z|_Tl|77*h82mEmmFQ*>tsX_(jv`ZlEmES;KJImxix?|9}- zV>EM2LsU!X9b*l3i5Zb}>FJ7I#l;KO!gxn`lUc8p4EZRm^SZMqlB`83l>Myd_o>AU9?!akRo{E2{U?9;6l`$>6y&)- z*#r;bB+chj3g-tm@i%P^KcbVAVhVD{nc>1di$QHzxNj#L4 zUmKDo5y>J`28I})?at5d5n5VW)uuC|d{Cbjgu@e-dBqAVQ(BBe9_I@!4ZL*-9vyB~ zvT5P`;jFr({%NJ6zB9Yki*IZY#GXa+3V8fkI=9dBAB@p zJr@|lggz~0Z{bii4;ZtjJ8Wj!<~{A<8$Q3a`^ccj_>(=6@R3It;V*;r_uhXuUu1$j z_hyPukC;2Miv?vAcUw&wV5427!1FKMOxsD#o;cC>q9716!@QT>h^j?9aS~yi3>D z1ogtD-Nthm^T*J|c`f0-VdNE=^M_RK{G$SG{p=}oJe_DIl?0ek*Ltz^{otv5+**xu z@dmbC$O#!WdPSJICrGfSTIK+^alz2O1v^Q3Ndaij4c(|Ck9OJBLC(~0TyiH)jL+FA zM)o%J$_DD*@-u7(MI%ph>SVcUk_Td^oo}i!e>Eubcnl<}`Yh)6z+Xfy0reH>SM-@B z+20n=We!slbJr|PnkchkY-L%ZX}`&CPM6407pap`KX98_Q&@jhW=}vwRcjH*jGLsf zqPogmc`4Cyv2$g?-E>oUE6V=l_iLz6HI?FWx``mWTZ_lBjkr3+(vjvCKIcAbXcviC zF5^x{QL$wK5HAIyt z=|fXBDsn8r7i?kRnR1i$n`{*=ffOLWZ*!Gto&Lw=QdKZ}a*J=lkC_#4^{Je{rdv@B ziL2WHw^1?S@JN=0qAmMDQtP4=FaP0>+g~tyRuXU^?tR1J8VF~h!aNL}7q!BP;w@ZW zYv)G$^lT9*XT*<3RK63TO64kiwaF1Fr85P~{8Px^K%&Y?&rHBPj9Tj??SLt))o%A| zC~r(&Q)ZqGVw0+tdhyyyA+HTP)IG_~s%i?LEWbU8m3AMe{WU)2LTO9|xx|vzfBW%i zfDR_xI5zzA)5Xw)%G0D-w?96tp|FZBr3m$1s22UA#@vwa2G}VHvEbu5Gj;1Ha@~6Q z=5=Ntdbw1sM_UyMo)M3?VJ~G9-w+g>j5Ok ziE|^jH!h5oqzjZwe>-JKj7=}ZHeajFGz6&k!c!~JXM?I!uzF7yhI>%~trUUSspo27 zc5d+NsqNw*2HQ9o8;IdOCS~H;?Ci*&P=QT+y4U66BVm0oep|276rf zbINLzn}#5f-=~v{ddSAE4WWFnJXO2A2U_bLwhIZ1&0(71K%X^8^pyb3kaR$0AD8u| zNwQ^dtpj*n7Qb(md)8}-&8dLc(%;OVl|*8(;-i0hU=UUrow0^c?uiS7k#66Pcg|fu zLhp6wJed{ikk?X|JoT?8!un`TIX65u2yTvLT-;~avCdFRCZHYX=oUNCT0DQMME?Mw z%;|BR4@mS&WlBBp+m0NWwdRQlPWp`hlqpD975Gs4WOCto7u%p43FsT5>il)kZXiHneXrd&oy%&C`ptDeaiz<<)-D{46Te3?C+HN}brW{;Jl zyH>##5@}yEwxG{@2?av~g{6U3b#cA^W)?mg*iht^6V3Unj@d16W*aZFz=*v#ys&fU zV2G5zok+iURc}3-#w(~t88`-dL(2nZeO<*!Y8bdctSf0Q`to*d@pW>sX2H(NfJZ^L zvah9Z)8K#O?L5QT{KL1eL$&s(J<=AnrM0&oilQiLuc{e)3xd|HUAr}_#2z(+hLjLR ztr)48iP}{Ot)_(j^MCm~ub<<2k>g0--A9i5d*9b}UZ3;4{!z6kHP!NFMk-wGKw2~q zQ0=82#eVx}yw%SFCL+ZDLdc5ce`R?@bAr*NjWWIQS0)QOZ@55^!bZxk6BGg)G~ zO8oBMz_cLR4-W-!RlMc=CN~9i=uJ)xZ-45mnKxdhi*Y}mgtvrs4BTZN@9JU5@8Ngj7BVcyI+l`@f zEBjGCph@`^Y}(sc3yBT-Y>g4u2ey{JvsObCI$WcTPa;1*NG|Z`+wo#r-gYy0uu`1Ht|8pfXD%=8J5=;!k6qfnx=XW!n?i&< zLvK&6Bae7~a2W`wGg%f~5BB%4?2BKM2Y>Snl96He=e~5fyr49-d>ZuNqM^cE$Wx-@ zKv@;PJ%wQSJWWH2(}DLTGqJOQ@ZaPe^+28PuCCeJ2x+f06;a#0h!F4evN0yKqFl}4 zU2!+Trh_MBn}y4}djebp&cR95Q%^!>#Y>2_ubL(<#@;;Z2p?YJUOQd2HsV*ee^&5a zZ$I+K-R^h`I;4soq7KjzkPxtr|C#NwxlXdAl=%ZnJ}N&EeoV;_-E&!R$df#iw1uO4 zv-0Z+2=+~25T4TI4XGM^(d?AQ`xJl%lZWroo0wU(gftkMSy-V-dkF1TBhz~Jfz zi)>h4dSIm)sxb@Ry%4A6L`8~m-$1aC^@&p5(1^$|BEY!~bL1!O`pRWaq-{=cPPe~m z*l6r_4ob-N0VCh0Q0Q?*+IqWl@_@9@+THoCfV4P1h$`+M70;4AXh5A5iPHo?Q(mcg z)@o7S7K;&QPS6kgXUQpyl{Kio@TN6}1^7b+sF(Ah418MXkYa#p^KT=^7DhgHn%-2j+HyU%J6M>g0@53YzlN}chZKm8=&GL$k}oM zu@_$E#RV!FDD+c@+>VTvmKXtRBgyGwZ;fTKa$dUM8M+^B>do^vt;+9J`#c-q>9+}< zZ)(u6wmcCz(wh_jHbN9<)E;iC9;Iq9qy6OrQdNM1IfN5rELZR1R5otn;u@v(>AK*3 zQehSYH1|{4Ke3Bzn`rDAI2V4$%CF*>fhObdM|2SXi>fKD|{b0+F14%{axnqxi?6jLc8Bf~+T?&N7@6F7SG#j@TE#I%~%=tAFsG7OD#O$rO> zaG+R=VY#xZEhTN4VMDNYfuOQs>0KJbE-|A5 zp_0t$M+EC1iiG8%IPOEr2u#X#RFgAS6k^^v6QCx+*iV!lKI3TRB5ZA!)$PrB9oBf2 z-zFR;7M7bdMu`7?BUc}YgU_*m-70Z$-=a4(kv>P9Yb0x=V!G?5y6Q-uNf)kP`)>e5 z2^*0a=F;rb9o`p$tB~=z_Ut?@iQ>-+e4hyNER=4SZmG;>SQ;4g8Vi+pkpnO4 z2Y78LuSkAE-sdQJ6fCBa6tJl{)URmRgZZr-mT9gkx6o>i75jb5Ot@TCE=TH+{CS#> zWt7`fq7Qy_>e@L~wHXaIcYCa6RIkrhEpy|>Pn&rul*Y+V%OQi@L9OeUHRtZ^gx`nG zxakyWh%(OD6U71=jznNNUU^`!lT+F64?gTzMDxmwV`OxE?Mx*fdOQu3kvKLw zeMg{FgQf!eebS#cOliqhB>s(a0E<@;X;I2Qj)lY{u`4vcd2Z5GyLYC$``BO7*Q4-~ z!4Bg-(p?GFmwPiNp}$Su;n`?YuBCJDP3a1Yt;$Btk93JnwHMxSm6)<>u_!qcqL7>9k9^J!=6C zLdv1m`G2v~)^QAQpd7}|bco_SC4h7Hk$i_rq+HZR=X$xbD$3mP} zw5g?~h2t<_b3RP<%jJlln;?AQ&hQ(1uOs=@?><{@zYw?NTay4C;VBIyn11@;rUga~ zyv9sQs`S3(ZtLkI#Aa8LZRZCBMAH22O$k3jR%&Y5zuKMWF-*K|L9+$BWE#gBnKHbt z*AA{VgxZ-K-kM@bufhMVM*pexcQ) z!EW(!m|{kAx9RSmx8k~rK_nD6h{Q8Nv|sR zgTdG}zkAV>%uai!#R5GL;g%Jxs>qKHlX6>Ys$cG;`u}S5IC=SSygE>+ZoIVYmRFw9 zTCTUW%z_-Y9}N=f`YjtK)>+yh!ZkHH;M@iNW8L3(*o@VbjB`EI*{mJ@N5u)bOSI0= z^af(rE>}b2=*hYmGO!t9hf&knU}EX6bU)3*+1GU`ADJ|M&{qq#^X@JR6x!?dIuuFX z7>s86wRQe*Z3UL5!C`jwSA8@0U5;6!^Zf2+6>J1;aM`DCI?x0L*gG* zQWWCHZ`^g5Da)>gFad}HzP{um9KDw7*PEJ(l#=t~G&*kj^{rVX_b2*zY77TH5|ojP zb(l33iP(s-)=$8HU%Nwc!5w7*Zo>hD6BCZ8g>=&N2)4WxFQt8APn0XR>@#f!XMJ{- z$|ehiD=v1Q{h0l<+sF7psKW-$bSSWL-!^^Jy4KGGDw=M#YIaC-OAEok5uOK> zq^1hOyH(?JTe88t20y74r&ocmpdsC#MsnDZ&-}XEC{DwhuoN}ti^e*8>AV<7x7naZ z+x4dtk_Qrot@md$Dn7Sj1vfs3z8A_}g!?+C&d<1`0ol25U&Q&2Iqyi17Pb1l+Z4Pcski~5$HJakrZ$K;; zyM%~q*-ZyB2R!#4g|3$$Q1%f?R-hjBgnXh@9Y(z}4AcYCE z)fjI~I0JkTEKP^$Oiaj&>SAtEN}V$}YYoNwbFZ!%$8oJ?BgwovwDN7!YQ;@ zg3K5wK->lPP(O*=zyr0J(35*bt(?>fl*NAqa&8L0wU}u8#rCC$<;8#|+*~tx#RBl?;eq^a?54^e{Mt#_mmh&t(B59Z9;qRQ#y7HA zOf<{$zcy=(A^)h(|0CnczojVruo22yl6603JOVTZ42#R%ep`Ir&Ox)!5p4Mo2735=D zaGH5Qw205%@(xk+Q2$)ZYn?V$4m@E(bROPSW2*M9XkY9SNoxA7$vlu*y9z#54;h&V z(8yt18My{78OwW;%-#Iod`1vf{Nb&efYL&zhYP>sl8bW5*GQ|x;B#b@>7aAMnkES< zolc|~E`N|bz4@4OU{jhr2pJk8M8E0O-d ztx{0falt?W;#T5V;yeOwfvbj{sewDByvALg+fl=I1F#^!7CP0&MhRzTQtoHoCGIen z5Av72)gbL*`86niO@(m#->=rgnjTC^>-=z8ioZgWP!0hsv|KW;l6eWj&WugR{3mmo<=`yamO?^|rDnYG*3k(gxF4Ny)f$_2V!!DrbPZ9N=9iWDvGnL+iS zc5nM+kk&yNdkqB-+J}@wMxJe_hk1_4L1Whyvk6BsqaM?oYTKI6>Ybq8fyq3bK}z9U zdj6#kAC3ssPtJV@nWxp$jH4GXewH-L;_t5j?zEs^1>dCSHe~(wJ-#K8C9fyQAsgkK zu+Bs&egRjV$Ql$SZMtq3W}zE#{nR2|%GwYC^IOCg7KP6`=rgQH+Q_WfJKC;LFr6*v zSH@YzX+)RED3G6g?czNgShN3+il)m?aj1f0;2uPo1bROyUCEC~`B6hufDsw)FNUfv zM`ya4%>Sk{1{e~4pSD7=2DQAVhtWnpudeCxFg276s|cCQ8nu7|;ZMvqODx(AszPbG zg{%r}ZSB=$;#CBKeZ~qM?UlysT=$>z`+icfftlo{4eLQw*jIUorFW_~x#s`8*x@>{ zRr(R#16j2T~5s%!d2gsJay)p9Y6b|-a%WP9?%vk z20uz?oxSLQ>j-If07n(GaJIa-+H~f>!S&+`MZq^EGn2Tu$CP;WA_oOb&x67H6FPk) zU;w@s9vwz-by`$26B(w9OXkFuwKTUHyH+n7;QGb?JSAMLmVcC!Nbi-d?oT%!=vLHq z&5E?U^X$@ztVPP);62yOzT_d%)R2t`J4kgMitq7roo>@m{zXDLmKq*#dln+ynI>*t2&3wCavbJshGO&Z!k5UfGuh8>&IPuy08f-L58yW`Ei4$zE-1D7f* zcG0J&{_GD38Tsx&KbkOw5A*h##Q^N+llFlHx%?h@*W7m66!y@`LXfw+hjrP&KgV8Q zD1#`KA;YcK{Us0dCNr&H|MN5t<^H(>XQH(FS#bM)o`b6Ih`X_$>K;Mg13Ep~|v)JV}Uv?N;;?u9d z&!!g{&_&HiaOi4YZAY?lEZvFt??+R+hG3Yd?z@8`A~0Dkq%n3Zu6+xW^aA7eejcv7 z*-Go3pxry~5@Uyax&SjQn(&jc8*>+58v{wf#~;PpG7NRHQiLz{pjh@7KIVf{A8HM4 z(=#8#M8))Is{->9-=jeia=#*?0r0?uFvIj=lmOP*9Pa!H{7I``*HDJ!G``pYv-o3u zdDD7>-<9GmJqaP6BO`e9N~)JYvG<7@y;Zy=ueaJi65ZJB3|y}VcqbqGsFr+b&aXxf zYjMgN_o!6-L_Yb?mWxr#AqZ2hc{dw^A!h%hx^W5$2D@%XWW&|N{JXK`c^iIKL+9h7 zvx?u~2JW=^g@WxiiG{}>N-2gY3BNnmry=kA40GZ?7v2mi75MLZ#;M3$bIc_Z?Z;j{ z7G0&e#>4`{*guM&BF*iN{!vN)X!+Z>`twqdI}Kbq&2k^3F8R!BdNt@zsf)FBXT?An zdTSwc=5#%NSs!Uicm2h9x8xP|xXtZY)lfC-ddyo0uXHRQ$>%GtgWcn%2UR&CN>iM# za;EnqTTNT@?SYS?ak{rHs6M2L{(t+lFyY_15GL^VM^-2@W&#-Iy}|!gj^V#o2^b+) zz8(2BYdWG%MKXd}FVHj|^6bh^e5mRr#b#o=uvm%#w~dDFBV*$sE^t{1uTw#`!QWfbOwQWsL6P`oV&S~4vmAR#P9dWRBcn214Ha}Xwd z)b2@X7z3X47Hb9ZvbyD5&fc;aye@4+%(&d8SmP7lkW|m@mTeY3WRDKe5u^^ZPaYIK zn)fBsK}o^(Wg?L-ZXMr1#g<6>dw&h;bt1r8#m6t=a-2z$z{DdpMZzcK8h^r53|Xt1 z6n$Dn8u3$T!}IIKxY|Ug!dVFTze4bN>Ga3j_~;9hr;XjBSjU`uNmMa4&dC|aeBmyp zta~pWga*z&Q|1i=;p0NgA*bzIAx4FNa*MoH{=!Y}n@th8Zs9JVd|?ic%KXCs?)D5! zem8?5=G$g@0}}=Je@?%OWsOB$(ky83jh;J^vhn=5MY1~HnPHV=`q_@X?1R%gR|NA2 zV-0Njc7&b1W1`W-;eFc*(^Sk=n*Tcrp zj<@flQ-vfOw*V@-6CcHICY*u@ztV{ngFLSgZMiGnz7y^CW6)K(0G_{Sg8q)VN2heA;?X9zg zPN*|LY(ZglAVn2aGcN8LD9XLb&ZL5`$PQH-77-F~Bd11}r%cBjEVX7+sF$OWaZv=Z z-!x6p>?};*KxABACumd>qfu5GoTh9L-^G&Q=7#D4X~Jba-jC_C0B4r*Js=}V|EZr0 z(n4X4y}gi4b$MNC;rG^OA%Z5sG$1}4z zE|*B@Adm9qdMJtEZ$D6a*T<5*;QhRRWty2-VPEU0jIP^THET6c$$?3_H)k@jk`O}_ zH8RdSfQvFBa;kED4-$|d$#29+;EqzmYM4O}jc^Dy@Z!lRmYyf^vpv>Zajc1?V^;X> zORl%VnRojw90uCdXJsANpfV;pIzBA7H~0fo`qSrWusD0j6Qo zL~Lx?i(s5S_lH4qLS8s3cuXos{Q(3 zTd2Fn!8uQJR_X_cAt556>---T7ettlomtsVioj1=PxxHeNg3(P{SIJ5o#onL!+vmWODH?}u8V$~xUZo(-j z$JY)k>*tr*Y4$pyT*;5HP^xL>uH6wRR{-9=n1dOZET*56_>-DC(&P&}B z6NdiCfeuY?bvpUFZzBC$VQT8<-VmWK^!sk2RR_MLaCRv)fEhwzN)u)LG(Q)W3#IF- zY>kw4U6c(IkZOzKXsw&wk8S5BY!x5SppovZU$>OpY|qv*LMVQ!1sT^-rTJu}wyE=WyR;{Jxz~&~pOZnzoXpHoX zSz!Yo3&txce<8QWjWux?tbP&J5~98)_^SM|n%ib6ALGK7GmWN~X39GM2Tb;>b;q<# zcN}kS#-L*|-^qEF&JnZ$j-@^0&xiIu%x9iZ$Dn043vYw2?%sLJPT|AvR4P44{ zE_M-h4JKPkdayQc(*6>jHu098&Nb5aXrfHzZ+nJk1UL7vlp%A*s5Z_v#lc@tDwvb8 z^B^#A<7YE*Za5Y&8!PFh(u&e#+qc5P*SIj9lM2g2noNrlyrOJRiPotBWc{nludbV| z=!4w7!X#da+PrXv$GxA_yU^+ISGsfEX|#TG0GB~f`mCNAD-}Bnpox2a#7uT34j_n% zxSf%hkkR78$^em6;4jTvkVgY(k$y)Fv{Lc-fg#%2xQx0fe0SPMGUsply+UbQb-+ZhBN(tW6TrE)5>HiRvg_$u)!rvBrnGhOfAYjvFtHNm1e)h_b+PP~KA{O4(B! zrDsv-X~AO15^pf^&4_`!XR&ZL{{z0IIK4xI`l2SMuS8x)2mB`DWGp0Gn^uR`)L zHlNFoszwwGulj`yo-D2GMx@!uw=Kx?s`7r;qaDxvZyYLoLtZctX@;la*p95R&cu2D z615uK>P_?pPOA*Y}!dI5fzMB2CMJhPBg%-2l4V}cjo=x z?z9DeyPx`f7J|xstG99@m+y7dBNYPSbWrY4rq^upi|^!S!4hU>uDqQ^)ePE`(0tU@ zk8a0r>Lou@JKX&{h9#-TK1X0$vtN-d@Vu)0H!jbg_0OnD#o;NVyC$pSv7oyB)aoUZ zZiN?%67|)+{a$y(=-VTSO~HMn(PNPcU41etB~G?ipQziF~S1_|$^_<8nT*9S#3kyU03 zS6gl}@6mr!Zf}?+=ylSRaj&Sxd|bNz;h~4{H-#x)ThtQ3CXeEX!9pq}(<5cLPZYldkb| z-CYdiTm>rRU8)wY%i=hs9+_t5_pQ+Me^i->o1y(ylw#%+J&3^qZ%Wd;ZklAYwQcHrcWZ>Ek7!K{h35NGdxqpGvDCRld2LvY-@lr z5Zd%;ZOODh;XHM_csrnSIicB}GQ_Vr>_kswN`wEm-boG1)}RPY1g~_GFVl$89&(lM`@$Bi`lvc81zGW0gED?j>OU6)`wSzl$x|X%70-4k zz*)NHa?uRQ$bdkT1h>WQQOY;%yg@suom06l#RHAh6{n74-Edn@O2Tj1SM$U7l0WeO@ves-caTn0|JEgmo&zh)IQIt{)?veMvOv zNMupKfEB$qwq&J^W7?@WOsyf?6EGvdZ`jdIrr}mjQv2GU)0ZUm1~8)!;3il{oA8%7 zvYr*{C}K+(_!M0U?QZl_ho!W(1T?qYIA_p$(!FKj_HJ{cLoI;YHK^z7X%-v9ThFkb zgxgzOn;^WU9T)9Msh5i&z{N@_VvM8FK%RZ_KJ+@KqHGJS!8(K!b>qr#^u1x6^5x_7 zpB|OBVD#{d1(h&yyfDzucyXt+v|eu#>QnXSevBP&beYVWaPq0d#FC#pT?Nd3`5%?r zGBoKsakbMNZ?si>hFvy2_CrMS6@A!31kv}5EQXcIU=5_!p4r|DW0fdXz&QNWhO^#4 zN4QdD^|BLbkQJHle$8*3NEe3ez@%cPDPZ z4Gtw2v=7YTFC9^H6W5Th4~W8ujSo&TXt*D-2zkczvNN0WoA-cZH!Q)n1XXzYbngoJ z;Rk!94 z#akIGexi-5Rc9}hB-IV`clCJ0Y|hX|?f*nOTIkIEEFQnn18aLDINna- zUEmp}`DE{lO!yU|D8w-O!pLS8N=n56Zh>{4_H-(oNEf+oWSXd3>wW6XBD$p+6oQ|c z6lp(p%V6HvdWE^j?OF!1l28+t?daeAw9AecB^o^7Tt`{!`RakP07{D0{{Hc<2Y!o1 zTBPTV{Uu?1F`n&?UVxNF76}ntSk6o|(o=XW$M1Pv0g$P&Qy^IO`C{$>jWD{zPVF`o zGLMe4)W7`vLR7nqhb2=9zrZstn{lTgQt#Q`T9^Y={${P3`j{*(3bEB#cX(4SXYQ+W=WlxN(SHY_3sZ$Gzk|5=s7Ib0`4~04x zQLkawdWv?8AQdBZ`4z`hH13NNwJ`>iLAFhVdqX=4MiD zW+9LR6h0uUA@27I3`lc353g@v5`t!YWO0dKdUD^KWlVx5=b(*w{&Z|PB z5%d(eLiJ0arPs!ZT1}{D`s9PoRX*bY&v(xWMDtq1z)D8DuDezSxW+8dx9umvtXE02D;p5t6teR(6tP=G5~gxCC-H*H)i1C z2wF+`<@sU^o}p;iPr@<5z9V~hfSqWS4c)a1<;ltkVPUwUfW6IuG2{ADxc2iWcU*+n zwOv!%%dfGtlrRw{T5!s61((J>@Tf7tsXuH}Glh~hr-!I@-V@*^Qe!Iats^5(iRGYl+}HkvYTuLZW=%zoQtH!`BkKq(_A#G+4~Suke7^$YMia3 zIH8h}Sb2)F`y-Y^v7C0+5EP}6f@6sbJ~sAsP4)Zn!)l3=ocOL~Gig!pZvh_2VqN(T zWBE|N4&5rLaPQOix+*o@N@?$t>Q&kTSCiROe}?@kpYh9%4R~@HgyEJBgJEaA-he=S zetqvKlc)(1N}FnxBx2bsRxf2a*RI*blpM=Q&_~h*aC@t8y#Gw=4PU8XIZpqM_>26BwV?6-!5~qV6`{PmOT{pNwzR*+qOm(P&|4o za|kb(*7_<-yrc;cZB-yCCt`q-#$>n0o0WtIrGa*RBo*kc6skGVu_YHW7RuwGKdO7h z78}z7o2M4gx%Fa(W>NJTDGQne3*hqRXXg%+gb2b3%8oM?=t6q8G0nUe2u{~E3PXq5 z%9lv#=)vO8>u}iFt@%BbIEsC?8`#ytqyW zzePwHG6x5k#7}FX)g(3!LyU;j3#&h@JGvIOJMa>dyhd5u8!rY{vFx2nW7`%9KFAeu!Y5Ne@oA)mVOXIKX z9c?JprUr6RCr>EFhKk}rbB*TBzQPb)?>U&zfp(MBO}!@9+k1m@y}qkQ{(RPqfu}D2 zE10V%d6T?5peFf2p$~p}%{jCuiOuB&m+p<5=ax1dNoD^kxOlDU#eeOzjxvy}$PnN~ zABFk>hXLMMstj6a19N+^>lSJjdfLcf*LK90kZw$!LSoD!yjeG=1!?vfmAN&l z07?JrHW=jdA5btlzXuVTrO=a7SB*J8AN!O8=8r^(&p+lp8@ODL?l&L5L^CKvPzJmm z{d%x+x*93Ld;Vsh0C0hOZS!4Xq1|&`6J@Lt{8kd@q{C*(7F34|t6}@@ABG6t{%TGJ zpsLtqbw+pw=@WC(mBw#Kk+jf~ z3w1ffYn9ck_YnD@pjuLqY2l(Dd-KotUA<{BDsDYj*CLU+CkzW`6j77xand3yi`D^RQJtFlk;&#%l6%n$M9@f+ooq>kGE;3wAmEK}E@ZmefX7s8+zdiWhv zj||-(*@hThl%;PQ?N>Nf>f}gtjhQ@K*%Z^QKT%e#ca$;YOb71KEUo z(?bJy2)fg0_vT}{!Ggm)QkV5LDQ!lNi|hx`O@7dGsmaySB9$jC0-}J)?he^DTTgv{Q!<+f>P)_{02lWv2)obI-Hc4AKLx`Em$@I- zwIV~HdshFbJTk^!riRFgN^JsVg@T&Wcnsc|8N5lrAv!CNlt~%uKCzq)p7MkvSr4xut_Rp>uK_f%$I%j}=h62I)m z6*4Wn{zivqbLHVnF4kK@%vyrn680?ZjlZc)w05!*J!f7TkP#YRrBzuHwnHuH zCTmuGrFoetOW`oDp=KkhJ`-+dr8aPCdRIfZcV~B|q{+QRr*+mUs|tm&=w*-(prji> zFacc4W>!pEO)w=RkH*U` zlEfj0jq;Px-U~_blwp{(NuoDYRpd|tFVWa&H`{FPtqvTggdqHodA{QEpGZs0t(|NK zPr7nr^W4V^+>ifu%ocHf_owOEtbHEa6>H6a(z*^Ac%LvGtbCBOoQCS9MqU?kRT5mz ziY|@I3@V#VE7Grl9nZyl`epC4GKlEC7O9o(Q1N6VD*TLxqY6$4+KUgYUCCRa&)JWy)ug^$ z>4tGqz@cBus)3h2WK&YG;%Jdq4n*G{{p5CdvOMT5vFmBxONOW=K37Q$HTNeyOQGty z4g+*KEGjlOrC=CXB#b(i7_-PMDy}zxRejpOhyuic5AXxcgsMRVO~fesNWpfxyI)H~ zuk9l%6{&=&#knol%tBlK;arBM+oIRPeF{mh&L6{)!ZfKIwew7I2rh7h$s#;eI44YO z**3+pd}Xr0wtAm&ycSX*48OsJ`&}j+hy0ZfgH9X z0=mh0{(GLR4tA*mTmFf8M@7%OVG-8^gCkQ=0sJIQqXb+A6JZnChc?=1q&o;NHu~l( zMM>&d8%G*_Wd53Q`h9tI+CR6m`FllvK4>CN*7ZO!8)a4tdRFUXGPi9Ox~k9nv*1Tr zbCX|qh4WJ2vwI(vp6Ghnu~T4Ihk$8XP~-g)D?g_LN0rj`!)$k4wg7nNRHT!rQNhu6 zyMjl}ta(r2&kM(idQvpS$&smMQ01J*+j4&ni0}NA>6pfSFGHp8h6VZWOo^yJxL!ailQ=n@9b&JSC{#D2oXLh9}}ZRQGH}mncMyoP= z^Tw3Q>iv-}A*}bG@XM#fJYfA>59LDE#C9_0VjEa&@$19423F4&0ax?_p|tr$T~Mb_ z{$==eAlO?^ysB>S02nE`{<87VzvcI z=UkZ-zdmet4dOIGMpX*F;1%dE%26Rn} z$B%0sf8W7VZUIWB>-4ZOkW#f#;@A`Lx+%z3+SR4YX^KCnlR;z%K<^hu(^j}SV&{%| z4bjIlG5hc|cCA&##6){uFC;YRQ`hHiCGV8Ijq#_`n5f?(!3$pOuCtV28qJ>(!wMo^ zN2V9>0O_XLof*U(T8nRQ8k?Ahu?1$5)0PBW)Q~i#YQjEG$3On6Z+L5GfoxLwEV|fm zP-igH%2RrGuTeYP(?jyUm`Al$&cd*3!WWFv`D0uW^H{{c+*vdkjRxC+wQ-_)JVS) zO`#u^e5JxGE&klzRIwDuOMmJo_cOP<#Mx2a0MMXGFa~DWwZ>B>M-68*$z*x_xzT#c zr6RGs4Of`0GcVN=>S*)?V`X$;A8oLaO1)Lq{JrE(K`O(RgmjSeI%j-Wrig79D74ws zWWfq`79(@KY225*O&5Kxs1@QVq5ZRM)jmMC{Kmb9=Dz}QAZxREGtV^8f@+Pi;EP9 zL?xIGiQs{7;~Ev)W+3Y4I%J)WIX}1Z=%OrqrYDvhSo$h~f6o85_Ogvvr$>VSJ^n+~N)U57X1P^Ze|c^YHYjP*OIqR-Z}B zRu~&N-!A0DC^aJpLv6P*HXR5OnsN zLQF}K9&kZa2qbsWHDi=z@=6?ZdM4!6N(j2&a6rnBf`a{{$}SvTIBLy3Mq??PsGt0w zE35zS71sZcfA<8WepW%1a7o$|5TL z-&2zu@Rb)}DglEppQq*7HEu<*Go@+bor^UUV*&r2K;#Lx!v0RjL&S%lXW47FNrqn- z93-sK7i~wQptTfgq0R5hK#OCILtlSSIjSdb9V?GV%=ZS`aOF zsOo_538}SN(hBhdxd<_)jn8^`x}H@KhUDXtHJPg4Kn^!dZ^od*Uxunmjf(I|Zws~@ z_GeLR4s!%eU!Toqr6d|X=b{QJRPEVYK5p$Cd-!y)fwfitz$TJHZM(QDa#_cxd6$+3 zcodtbcXZ}P$w!>nws3$EARhU0Ugpv@02|kdDU(IhhY~xvziutPAF!G!{MM&Y^PE=m zhhNLD5@}M<)?K!DFUk>KK&FXin_Cs*<(G5D1i&||<7ddJmaJ6KyNdUkqgn@BDNt1> z(ed44sJ$jNXfXt9>e&dYxO%DS)BZloe7Ttt0cK=b==JSJ(iZqdW_Pzk%iM*fBiLiv z1l}JW*Qp<&`Hs&*|7O%$ z!C)ZGpN}{BwhTmOFmBciLk>qG!`*A>Q3K%!KPi2E#Q3OM5wp^96NZ6X8ewMYBV|$F zpJ%s1WcsFuH2C3xDOXAr7xC&>nYFnwz?rh; zJG3s$h_{FS4Jgp=@5e81AXPE3iQQEl*H5}$eI7(!Lxs$wI{#BVTjsYm z(=^RxJFAteX;A;&PVh^0}!*Mq5R7W$fb)`~M-UXywB{lT>%eabUA@m=Sq*-8LQ zOwX=CGnYGuh>fEv=TWVG(3U*bR%T_4@mKP*U_LIgqZ&r8@O~)=Yx!N=?ofV1U;Zwt zK;@aB*nE(2qfT+~mK8=v@)M1<_=Ib6nZXOF&hkRpV~Y$CJ4^8?c)nN-I-(>)Fj`fj zb6G>;0zM$(2-dVD7*gV#NeLSlUSR7{p8vH!hKyD)K{#;|&a_L;BqNjg(KHPHg(=Q{ zsb)Ux;+{H>>D@3oWxG&V@k7Z}k?%?CsMe*^&t&!Jby}~euaq2qb)v+R6!ZQIsK!;N z_5F_!6Z=mUY~Cu3$VNkqqEDTZaf97xtuA|4DUL;I_>QhKU)-QutPps8WSu6?T_QWx zNhHCESXPu3=flJRPPavOF3kLzv>^%NFEB~J3ShIoSoe=}i_^$6h}D}(`K=L(Rx=hI z85iE+WOUp*oOdp-b1t!J2M#bLF=-BiAa^%Fq0_g)9!I0OWGh7fyh{gVFHT?XMC`!T zfnv}X9|)w#sR zQ-uCeg*O;lS*F>fit(_Wy2$$$U%qS*Q% z8t@UoAiqvaYB(9x;Jm2l$~4t41SID`q)LVcu3l6lJP+2H!LXsH&a3+!BSC(`$q>{>P7UGXl?EN_d5 z4wK04G!2pNh(b?F&s4zkbAN^>6so=w!qmUUXIOIvt^s*7ptK+v?d20txNyF4H4EThR`CK#LtWM=E{YR*{!ygW?hOYjfrNbX2z)8yk=!% zEnS19F~|F{iKF0j#H2gz><oE5wYwXWibGDa z3rz!@WPLO_u9CEWv~h&W1Q>V0XMQz1tsBlc>$T6xIU4S()9%<5bIa2p6rv_bI%2dfu{A-SU(cBp>{5O{ zq9R@5S$z=k=PDE9UX-uOVWOXBd$f)PE9hB%*rMUA z$x&S5k;aw%;^yfQAQymbH;&n5mh6g?ij^p#-J=tg|(0207jJl7!#I zn_jmk`SUs&A*1G1)E6q!JH;#}|A)7;{A=?4-#?0qv`Du~w{!|B(gM=WL_`>Kbc|NI zk#10G)Ihoh2&0j3lr$S9y-7_Nd;j)%{QigUjqS!ByLIilcAn?)I*#Yj)SEUm^p{>1 zsT}dtiC{yZ4E+sgzUabgp-v*tisJ~PO>nGM!dVDU2s9pUM)xY+C|)`7MKvVLM#uC~ zc0!ynYv~yHrDj-jcMx%^5G;++vzaGw+gd{|he8?c)YRLRl3?4dpTTIdSs6Q_`~l?R z#Kkqsu|dh@_u-Fqm-kp5ysc?^8BjeO_ZCeqhv%RBm$>YquomXw6mplfXN_|z z&%WmE2e`;YhnyCnFoJ}cpqP{m|ZD86$%FSPSL?-fNoU(Lw$ zNS~&aj<6!>0=ib*SB3c7#pmd@czP#E0HbTGg}ji7n|yv-C_!01c_HQIviaB@l&!fA z6^B=CR+f07D4)E=BDyL_)!wxrEg`$VTGO-nn^Vh7P>;IFtdrHZR>_sdk;ZgS4$puG zIhdEaRs((8qUMhpI@8+Uw9kA748U7PBY2EWbGsy?H!R+dJxtbkAQ%j$3lUtIsD3jL5)AU?G77hI2c zAZH1k<$5x!29n2#ppxX#u(mi~eX`d?%PB3(lI3q)N`Dbs>n~X%e`5CUPrKKQfzHsr#j<^j z)#(Ma1eLbYU9TMWCeL?2TjdAL#vLe+vUh zI!~dr#C0MGtY2q*DJN9t!RDs}OiCKCqu&kh)84n)6qY?0H1X6}O(dv6DyGnD5wOr% z04d%MOKXCCRm6@9fT>qMTdS$E`{TXO#f=3-^0jrhCEp|ryo=x8ewT^1V$el=8L;@1 zjc4GtYQi!PNc-d&lcm5##`6Ala|UA0mDbR5N*aW!$j1gddH(;5kca>RQD+l4RkY*GI1z z1tIPhVpkOpy|QUPWJ1j?bv*{g>8Y$EKkO=8yEKdFC}wdS}B{v)}qVz}8$x?jZCiQ$gHKi*W%Ioo@Sr5=vO zhpI4F0JCVpp|w@2-_QW^z00F87g_cfplYq^JtT+L7WvNS5B=DMC{)5wD0SZDo2Fk= zv3PpSxUHUffQ0*#)?Q3q#>1WWZBg&krL9Jrn^RAyIYwaYS%#URVr#BS(cM((K+GO; z6wIUN4!zyb8MmdpmHgoLhJ%Nf=F@=sX|)G?*mc)1(&NLoGrL)*8^ws?mXJzt{zP~` zy071%U~;-OjgJ1fL{Eg}^J>b5Aj&ZcZLN@_%kg_x7!o@qm!HfD7?mcp=-(4b?sCVPq+1WdGbK?zg?kEUo z8W)k2;B8bCKio>Q%1JZOssE#Q!P1mBMIgVt1|eiSci&)=j$t6aO8!*`I4&R-oxA#p z{@drs&&=<#pIbVU{yS|Dtm!VOeD%T0;wwkdJwuZB8}I!NhOZXSoXT~ZAr(zfGGqKR zGLtNo$-L1&7lHg5ZFp}_$ry4#G*aOf!9g3OmALCSxDfx1xWmJqb*5g_34_%id%lk5 z-WhQ>4jZc^wZqE?t1IdvwKk>c<+xuc+LX{+*tWy<%FuZo^a&eiDdva{^I>@7ByIss zC?u*h)DU&c23-Eejh=POtcq9#F;@ubT?*WdIdXd&GeDC!(I3n8EAh6sSU?+|o(EC% z2y20-Uq=57Wx^GI!;5C?;YLAdYW1NWKCF9+3T^3L9#?S*&pu^99bOe{7;%2^K0}8+ zwqkBUKVvw5+-j`fWZ(UFKFVT9BEFYHl)x9P^*;-~9gcfrAulY3n3(S21p&C>`gI_s zFHDzyokUGPj4YU#nnUO7GqLyvQLCQA{X_wrKWtbzY=xcHrtapN6|5!?s%i6x#;|Dk#m}M ztw49&lUXOi$6&E*YFrFaoO>AhWS@;}07i+DOL5v1xjWm#p|b%Z_LQ&6E&S+V>1m#E z_XXQngNQ2>r#R}Bz5bT*l0F~OF!cS$wmJN(0rq zxQy!UD~@dIXJmAVNLjDlpo(loFuoEu0w$8}=jgPE-5zq3kLM&A_$; zgYJh);T�S4j58j^6Ru`(^d#GSBNzE7H~DKN3+r1l8`-%EoxOQTSEQ<9Cwh4Brx> zAF>pPv6*qoPP_=RE*k4rFsWjw8uN#;c8G6w+!0YG(V5|kaiw1a(OGukb@k7Tx>z8?5kbG!7;)5jSR2+{&B+B+9@Y;*sFH-J`c zS#L3xta_%^|82<{4NA#A4fFVzC5dL;H1Jj>XkvwATG6Ko1kf&zlO>}W5>u=7b}0Y{Yj zZVPF9t#aVXe}=r8hd*oneiAuYPhM}*3Rjg5MJ^Gtp{_m3-y{0N$VGj_7;)~XlTSSq z%hqxoyc5ikKCRf|6ufe!-ReH!@h`C3qn2sD<_@GNx}~LKmgxGio&W>Yegm4!<1h$Q z9PLIs{xNiIe~tB;O3tW0Ian4IB0n&_Z%>C6yXoH}@FL;LB`yT6w)tQl^fG8Wd}P#9k+ygD>G(sZxVbg*w?v^DR| zYVr7F;k6QEd6PB@u7S35NAs#aY{Zq`bOi-%l%N4kl*2_(<6w;iZxT(epqs5LvMsJy7aK?w|mgc2avLrlEOl0b}4 z*n>q#@|gQAh?+%DM<)DvUU%k_22YYOsupFrwz6E=xy%nZSasVsWNaW7m!l7gm!4J;K%Xqm&-_ptP6{@|Mhr1wiI4?6pF@?By`?qrasR=^IrlMGzhc?d zuc{Oh&nojT*i6*W^Psmix?M%~T5mB}O^GjxD7wHcP{iUY|JGhA6%CC1k5H-UW^UR) zowNQAY>6|M^;fepH3`?tV9p~qf%(u;e^dxRQ7>=QbLW2{p)Wz^U1b`eLA6g8{l7*N z{wM`=(`qeRgXAalQOM}W*P`#8$(UM9pl&_^zQGowRmdW+4R4L&w%Oxshl4T80JF#j zMgh%o#p_8^hU$$K-rX?2H#N1QQ<18V2*YbET|_(ZU6dH`FpweB{X@5igU9a{YM1uO^Uo44bhNADdK=Xw`a-uc6$o=13c%!exA23Ye%J)E6Y zmU4Lkc_O1m32C$m(bcm$OWvJ^7_&vw(+!7ULa! zhIGsnI%YqNqc}7ymCOPHICWmq8$($&WQr0Rv*|Y46DSiPGeD!F!eh~DAwH-0Zil9J1hAiQpTme zM2B=yQmT!_%}+n1wzl4Lf#Q?Fxv0INOezGcW(KpU(9FPmY~bV-kP7wvz|$7 zeQ%qoEiKxJkf{NKIgCWpr6PEaRt|5y^PmnqyKqgvsnzp@zu5Zs1a0#1PBLp@?PV<6 z$1U;B8p1idh zqENuL$dGA&!JO??XVEuD4kgCAD3EKLCm{4dx7zNzmzL9R>hQvh3XS)9?IO>;mn-2N zZ*Dz$o4I23Vo6(AuHkORd!bwTYL1!M9>=WhFJnB0#pDK=+Q>waS;QElu<5|;MN_6i zi&ej6b#kE+d^$3%z&LXe%L={iWK{=LLHqIO4I?z0y=T;1oc+A(*(AJvz?)@9bbq3epd{T>#9vZUT(#pUaEV!S! z)8OJk8XfUyFs!^b#nDypVNkh1E$4Rnp)4Q%ZYS?SJ%^rh83sUlc|i7k4~pNOBi*ikKjw>vGQR0y>S7++!WV z?adYHoX%$KKl3dp7wATIftT&F3RO~?P4|#xdnVyfE(@2L@OYb#nR%UUnrGct+`Af^ zYRmZ-#Y8Y-Jh2xLT^|ce>K%BdKEQM&UN+6*yHz{}HWGiIr*Kr~6fYAWfFFr$5VX>< zwOA&G!)r=8&NMM?jpmDabz1QN2F?lU1}`2 zisiv#%1|Ci_#{GSuH=_HSj7-^U?*=f9sRW)T)(pai&a8a=W*7x5%MfsuUiSd^i1h5 z>%)I4_MAWWoL1~&hBd_tD$$+>g#ZWELDLM^A$s88;LzWoL1>7DdTCtaRc`iu$EPxm zQ^u|LqSQX@?6o;-EEmcOHY5Fe(+|RC697rv55iCh-*A%)S=5`6GtE|c7+_Yh6R=JN zT;U=waZ|)2mlL8CFlYMewl-RWV*mb$Di>~f^X~4EI@SU;oRShHh9^=zWH9o{s@y<( zcAL0!mgXDBAyrk(HqmDmdkz}63HUHC>w=ed_f;))iO@rq`~`#U|2lQeN+?9#WT}d2 zmB{y*;Yv3U*Yfi5NAQY|;S|N`=ErG2IEVR(mQ6yKMso9&;^>CR=1Q zTCon6dAH?^E$G}{QHpiU(s>sy_={p(qdFweb;akTg3uY!z*{%{)GwUozQA6@GAjpL zWIs6z8L;o2)*ZT8u7R_w>-d4LIV!KkT5H(K5QWd2G@hiZo?3Lz7@ovR?dXW zeD=eB-el!=%kU6*xaYS#2iMs?)8QAw@OFqSv$6e9FwDR_ek=5}C(ku__rZ+s-&%XF zBDt)4^~VJb^!78qhnJ1P?OJP>u(58#S~yu4Mg-l~uNJvZC#yz>v$6k$7eIBZ88<9E z!ZIdyiow4FzbvgAdW-s(tOY?dI&&YMJduyH+O(p-cTtRXUj(3wQ<|;L)Yx%618Xvv zspy{da_ha$)#d~+YT_lR#s-A=&?J_4G2zkH@LPNIalDbo+uvrt!}xlew2lxP^^4;h zVexP>v>FRu7+ar+mq6!t^~P|M69jSTD10DIigA(Wd#?Xa8`53j2?qql!tb5#H@ZAcW%@1$l26B9&%;h2-RKz(8cP!ga zhe$0CGKD_Ez_JRfpZ^^(84zE}um(@8X0{AY>|5H}5ZFZ<-c{}_#`lkzerK$_d1thf z06p(aE@1EO=qT%Or>vOI=dOhNJZ)(_q#qQVA2O-_^P=pg1c8jwX>mGU;yUdLROX&f z86ID!UWHsV~xOQVb9WJN|`Wy$;6kHR8*R9b*L5XxZ=hhv!IYL{#7R|{dJ zCX8s-a7WcA0?1(mMcl)K3!5I?w!~mD8>GoD2F;(oDRI~GPmj@W}JL1TRt&O;nu&z`da`jx@^AQ? z@`F2iO%Mmf=>1T=hlR~`pTsqDa(veIH)Gl(R5bUiJF=d%I*HEf<_)MA5B{y>(=jzM(Mt_UD1(Lg?l114{w^^P z1+&zQH7*uFwYRQC<;GsS{Lh7f^QIHWe?GYXE#Ci;+?1+lp~-q?LOF?Jr@$$Smib&D zw%2afCr*}}D$KRJE&O2PROf9ry=Wt)ve0IW)|ZBt*Q@Ol0tE8GYoix@Wm3Q}D$Sz0 zzjkG6OfAh_UI(9APm3dI8Jt5E+vB%HL9zWkd$eZ_=vDD0jIE&;isI!1%~WtwqEl)n zow3%sAn%vI_a~n|{ppYG^h+BTeKV|ug)E^$z+ACc;yh}tG_Sq1DW246_Gi| zKl&@9`rbHDLLOo2*8KNladB=3fYNNW+rDURK1}S;OG|h_Q#eDq04*7=EA$Sy$B@<; z+IN_3b9^$3QzMX%Uen?oan#o@a1rR?B(kWFcy3s*nme@(u+?6n2iw|{_pLh`mFsp4 zzq^6^Hp82&kki-W&GBc@EV3izk{i)UlZsk&pNuQ}4IH+a7nhx|U3`^=zBcc%OglC1 z_&XhNnO+X36s-1?s7wuU|?%lJ+Md75Q{rnb{V4c?&e z7%k&BSJ5eV=I8ygkN`VZ;}>jY*_ZvZ_O{BIYiT|;s!Qdb(>&E*cKk^ zT7DFp{!61s2A**S7z2@x({V=Dhj@$&`ueZdYQUrp{bGdK1pJ5WqhI}-dO@7Twq2Q#BLzDjdb9rT%XN-F99Cb_2X zoBB9wisK7`U1c%@H7?S^;{GjT$|LZCIF}84TCghSGw%%=inzE#IyyQ`J?@>JrU>J- zBplnp3*_cFoD+{81^$JfPl8A{&JNW2PNEXKw9`>j;ahe|nQzy)W=59QV@LLtH_le) z7#k6Ow^)xpe_n}LE}rj6xu5<`cM9M{_IJy?weCNX`K*R5i$<78%~IX6{i@vJ`3k|X zM;Y&XQyQ#+?Ly1J)KcL78~;>THz)jckTQ1614x864uc2g<1 z8*`LeZTHW??9JrM%I75W{~I4*)Q43?VulDJM15850i=SdE!DScoL}1DqD;0qyFo+L zJTJZ9EVyk}>^T1JbMiM|1Cx@oIrF<--ErNc(xFJoy1?|Y#0$bo%*d%+;~A<+zTO&A z3T~tE*a2sJ=-5$yI$6DA`EjzdCK6$oJ50&tGnY}AQOZ10%8;3Pxx5dFcs6$Wx>u-w zqcP7aB={~PmF5$UYRg<}$>0gsV`4CC!N&H_*9_kK)gJ96%nn&UKHeqqGFX2unMOV& zLTla0^lRige9I|Lfi&DJh(=3cYDN+EvO2!@CCc;rCk2Hcq#W4xD-Z2G`yh0}%`e@k z4hlWeX_QT}QjxM}1hNMypO~g+=AN17Z=YxRPnjRq85m$yJjRS?Ng zQM2~4nBsvjGDA30i z6UKTEx^eH~%Vw4lunW}afXmN<3gJAT2WsV{qPb~5sxmXiWismjM>1aI zt7zcw4%9XL*RtpW;YM)NK=OyU*bg_{Qr_N%}ry ze2SP5oFjZv!{~8J>9b$R;&e(~LqGbrrh?|vv{Z@Lfxm6u{Z51G^GCy}?Q*m#_+du; z>?pJc|)jffG(^I&-aE}Dr= zMu^ISaK>tJmzq;Te0)gAYKYaT)z%|in?SL&nYl%treu)r!|%ZkMa^ zbv0IZSNWhtjkgb7>iu5PL#)CMeGDO*uZvha8oIEuJL#wwPFTvm!1qD|6?9Cz?XV+1ND>83&M240{|~7{h`O#2};ZOnG!oH}6l17Zwyi`6j9_P0dbV7ZP-l zlMR!ZDoszX$~=yZE6ar{M|DK_Sel#D{L>FwYG?4*IPdHGxJgf=2StId98sMbXd|`_Y)iNWf03e`HI~ zaM-+IOmVaGkvs@XiU3f++3zKkQ>HvDzVBksG9P>kMD)2wU9kCOqC}qASjS5+?8#U8 zGIf*#R*8fe2g^U}-HFYf;iTkkOR`bwMvujkIMlhoC_8{oyykw=@~ zF?jQ|X!z2MiWY2n~D-8O3d9hH-yhu4o_xcda%fEkxW&xMv z{q=~}i*sy?;<93$=e-1Zzr->p`YI>M zk%P}h+*Q=E+?rk2oRQMSGB3dH9QUW5d?Q}#FZDk~w$_(Orf83hu05w5Io_dExp7x$ z&i!x+DKSvr!x&%pFDdDMEDv@`qE{oXC5elV>rF0k?_q&;{_!6PdoVLbymZql_+e*k zSA=e|NPYtK3t5o9iD6cd)%&lEsaK!~-|aEvN{Ip?IJm(rw5V{qx$nqtG9tJX-HL|}rbqroQ$s#303;+Y_KCnvWw0M73j z*jG9cNON~ad43qP#Yl&6oF7_8{AsCnvOyG;oSNI&H&0Kts@ zi3oA0Yf%GAPWH_&p*7fv=j=Xz$)(@d?d(Yw^TfQzbF3lJNk#*T_|V9?|R=zZp476CA~i>E(6-nG8@+zYmPpFI(alPUjds-YKT zh_h&;X1H%kVkR#qJ*mJ-VsU!ulKQEv?zx&&I4L9V*6kO|sYQONQ;*K-_elxlI+$o$ zCc@}?b9R3asPd2xtD1!BCC~5q08&1(__1(dv#W3)`5dh#KfdzKpDK&-pCc@+k2lOM ziQTdrc|>3whAms!PJqBQd)7mR{KX-+M_$Q$Xd_Eww_j`bYtS;G)4VErXWUD(*)a3! zdT}0$1n*B{pam#m?vFaVIZGH=msMZbD}&E$NUEtdt_tK+*!&-fQgA4W=E-E(+|@sR zlf;RqXPz7{G@CI#+jht*6S*qEmt_t=7o?1h{2I4iFW1j|3HK40Qq-jo=TV~fOlarS-?s~D)!!WwtBxj|1tmfFm9Xe9nl-=J; z2MiU(`D3PDW3pq<%)QH9JKaj_^~DOj`Y+m^YPeVJFU;GUt!6Y?=~B1*L_0ri_PXPX zM-atvuzCq$fcrkNxFCH~v-U!bN!C49KCq}`112?eU_N_Rp?7Wv#{I%0{Im zmc1k)Tk|SwUZlgZk;>Ue{pufPdANs~SgO0LK_o!coj7B%6VK*~4YIIq&7e^*)HzOX zaK~oNYK581g_fgwtd#UiSYfdJgtw>#8}g*9{kDE0S9ml14r z#|k`;N4at8eswEm}? zF5eJ&)~#&WJ>%vJvJ;S}$eBqW>~zDrd-U1sn43}V%`4xl)G z;@W9n!b_|fY=A$I)ae=aclUYng^KYDg6E(6H29;u5r93|aat>(7f1}<$#e0~!WGM0 zdz(^H-p$va<)1qFmoJSIjbOAVy*lv0i+?wpryn!6URA`u;5!<<+4LiniQ<#pdZn8Vvg0QrR80B)n}U3aRj639)#GRms6`` z?Q_99woIKq4eT&B$T}D~%uB8H2~(JT$N(y(<%J^4{&i<6Xqs#%WTeG|15Hnt8ir9` zcvY@U-G_sweWxLgd0kQWm(0H19~vu^WjUP$Yvl#ktXbdKV974RaA8>Xf!)FEOM)CG zC2o7>>-4!;7_rI(uD)S&)0+606W7%$(h^>`4sgpU9 z9?%21i@_qBVvo$N5+i0pWkUzOh&H{?A)5(d338qM`85Yzcd;7(kwl!kM+cH6HCMrP zFc)IFoJ{+ubMU*V$tE6?+?|=S7D(YQj){WL|3hpy&se$^DdepW7CoM=4VK4Fq1q4* zAciHD@B{UEi@r;)M`OE)ln4k8dg$Ot3U<6^po6b84m?y?1R*8jpIJFZDCx+~57(y!E9Xrp8t?*+TWIiMPf9 z^A}-K;4$6Xa1mdVn69rpXN#Zj%qR|$poZ9F>d^vd{{Ba@f|h(bI3HPKFbRKKRmBf; zUmee^S1ZHNm zQFBK}m+}Tav>6AxItA&}y=`lXw)j%(5Pu_$;YPJ~VcdV1bKRc9gPb>&^=Zdjrrn5P z<-31+NSlyn5V6hZW!(sk=?{4bI+i8#4uH50mwLBUhZ@ZiVRj+=l8vz}^vV3HZ+(1` z3}&Nf?L;qJ8!nH6sqWi={$w7mgW*yGX?C`q-;1fLw!^8_H^Pa*p71iBK!h@?HSJB0f>7;F-%qXeO1+g=bo*A*Z^Q9g@fi&`HmheJ zK~)iEnYs*S_lL7;cYhYVPfIf}Y03A~7vUVr$ItpEl^g>v|y*Ustn!B^{H* zciU_kH>F#)Y4O1m^`E}wWA8NJ$jqa(w|^Imb+hHfM3sF{pk{Ml)JzsK_o|ta<#v{3 z6p~eFajO5bOu`^}%a9k9+cC_-OLaQwL2d3CGj+@FSYd=O|BKf>T8=C1Lb?5yO1}GV zJ**7wu_p$l7?7dj>$|9UmU@MSIK6I-91JT*(9n`{Dp?F($@Ug!5`y;je&5{Hl>>{& z&S>0(_3bUFx+}Kb_v%~% zSn;lR65lC5k<9#pbE7y(jflk`6102PAHG$wm|t8>A_d(9;zcvUtr+zJTn{Iy_gw&?9yE+et6&^lY>B z8tHAO=w;zYPXym6Tv_x3+6+>#awstZ72co)YgdtuE{@+2UhG1Hs6bkOddl+8;bu$E%MCgEK@lCD| zn}USw?0*(8xf@EN76x*Bt*vYlw}ESn1wsoxoPS2wj*Sc?!E!L4RyF(SCe5;T{fQ@E zhe?K>D>o!Mdx#Vqv+iyyc!g6wuyDIS8MN`1=BJdQBL2Q2`BUx1PYS%dz=LKE&%NZL zGjVp7$zRFcB>OLhdl{qaL9S~>fi}NDH z`5Dp5as8T2`kWn^u+1!|TU(Y?r#YE9wI8hHZgn@_?3)Vy;8EaNx$;ptCCdKw10uak z5f?Q*xKnifJ&5|in;&i5^s16L5Mmm4(m&4>M#Y2aMNA0mrQc+tDJh2+d?lDHm2C|9 zvo8$KTBN=&Q%DQ=6BXl>b#`CcMd-%xU@0PV zzW*Mf3>bx9{7Ucwo57t~V1Qjy6`e6px?v^A>p;TP?vAemg=fuSwV-JdnIcs2r5YUg zawV?4!>U+4*!JdIs3e3LZ8-4H=YBACWv~KH8I0*XAIVz8`riaArlV%LAE+|m z@`n4Zp+sDUSfamD7@l{3?MW9_uBFUQYXjFZL258-ISAGF4y$B!_$-DRze;Yomc?`9 zYS4x3o8sLSpthySrZR}})y`bYku?Hwg?71^wuktIgdyZEC4ozcS0EXa7mSBqWhPIU zHC<*?Mh%zf^@;qqB<@W>WL+q0@N?qMI3~FX9Tuf@nW&<^nQv1}v&VJ6Wv*6Mow!n{ z1nzWudzQK=WkJDioyo-@sOHZLNyMWdmv@U(@ly)Qx5A^DxuX+B#>w==YmBpOCahU1 z;WEPS1n14{4u)XDr@l~TwhT|26j3{ckp=2>&uHnVkQFAm^4AgzPC3S2Rg%nfo|Pj*Va@h{oR>zYxXW@#>o^j9a=i_jM$zE2|C$D+(Bu} z5*z}v6X7(aeJ)A^}h`Q=*vWf=Oul`4Zdt{Le zqra%eu9a>|FfA?{qUxjC(r^Y#H%DSybLT;;Hrh?_ncA^o3O#SRRI!`2#rJV%d09&Ur2rF zCEb9gm$9eGn}TYED&EzO%tF{|{l4_YB_?H1jco-_F->3tegR#@6N#q}e8toefzUX- zC+ZoQU5XBd>syE;D5M%f`DVt~sr%Ym)5j9pkvwru{~)JwD^wD1(}~US4(7!4rnIE6 zX}C6{Szl_GXU+F^ zFt!SeHwMK|JfloFq%2( z?f^y74Uo3Rd06<$-nu8#W1$YNU1P@SF>=voF+n5{8?nlUG<^c_wgpBEpc zB`C{6Fd1B-K3@qHkckGxmZrdzOi|%kk87XV>*n|$Rv~>KvzoRDCn?JZ$b)4GlD=v& zO!iE;2<#dWilT)s1q0D1vETPX`HTCAH;BxHANU2+HOs_<2V$3Yy4|Ek8-1&dRJ_fkfy==(H`swL9@9>ioqe`?qpSCL%E`?<|c4%i7*< zIAT?}tdgK#uphYT4NPl3NRM#=UY30*;#UavuCiGiyGR7ixEiN{w4D4)ZfsZ+5$01k z`yRG3&>P}rvc)0CEJ}NPf3oi0gVM<~ur5qvB(vCJC-hn9R1po<886IDxdL%U6{o1s zZ>}>Dt(nhH1R60}#K(yPFOD^DDXsruXS_CUTWm60=iBYve-)GTD(|?hYEA26RqIXr z?9TVO7JXw85h2tKE6#b7dr3qW87zXPERO4Wisjs?!gy~Ee8(&Gs4bmrggu0qnEEu% z$aaUG=+2x27>Px#F4i;G>ZZ-Hw(O9#MRAAxBk8M{m}U_dmB*;{6pQR4x)~Kp4D%*g z3f>4E(#w%d4fcipjhqWTzWUjj zcmgu8{8pcau&TZTUQ?bdD*VD(w~1ZUeAcGWyDuC<8xAr1`t9!=l-$god?mX0s}RHl zf?&EORv_^V#*B84Cy3%$Ak3(XUSAll%`zl(_Z2PrVM^IW1!}D{S`33@2 zN)H=&1?4Oj1535Y6NNu9$n$U%B-3aqUhZ}r83TdkOTh2r#0ck-sDHWpPE&JJ>v!KG zUn_q3FUv#mZn-%LF<_+3r|r?v`jjx>$&!R6?%8%HByImhM9Qp?)!^48=MGo1ti#_&QH9ldJh#4K0ih`pOK96koZ+LkIVS2rAB`k@?7y5Rxc_gg-EuxSxaA5Qe-(?MBV+lv-ENY2etvwIQ+;U5 zo%3|6k~hV0B=D`X?5Wej5h=#zC2>YnyWdL>=W{NHwC50O2}UbREf47V`mOXhYq6zY zbH%rkSJ9cJnfwmykAgp+nWe|wF{oqZT^d7t8QGA^{1agOOmh8RhbKhk16zUXyYKA< zD#Ah9FU=}v%UQ>=yUd?@Cz^PGg$C^gyFX4;zQb7NUaN>p(8d<3IU9SHS~Kz)$Xdt> z>AYxTnGoq~0g5a(=bmx*c@3ioX>5FvwQXZ&Pj3xwt*er~{Eq|@F=?o>P`!{GOp#iQ zTFd)6_^D^kDA0+~m%RTQPed~n{aL*u>q+9Z#cmZe2t2{}A4&SNsph41R0<(2JYKNk zmIlL{|Ff6vLSlAUWbm8ZzA##lF6~>J*PX1Y2wCKU{N@Ap{!o6hZ_~10AOdxTUP`pE z*O};f0zmTr*S)cCG!BC?-Y69hVXcRFS&UB7121L*-Kw(RTKCu{8A(yMNOQ-F$M1eL z@Q^(!q6I9lUf%JkXU32v`M8sWPN-60Pm)?#Wa?>fHXA#i(O}n0AVlVfQX5lPcr+uB z(ewT=D{H%7FwN?NBZEzJA0Txp8_!fsj7y@E1W?7qfmuY}2-Ywe{sO!~EFgds4+U<+ zl|s6AVE&v*MNr?bd*;%%`n)fF+OHpigsZQg1Z$>0XHwKHjKO?rlX=TJ1E9A#0YotnU zY1Go;Lj|E&fm;cs(c=Lc$mhZC8cDJP28G}s$g^8iO zPF*AWt^1$|hKQ+N6>>ZFo|i6p_7y<%PK{)q^Oh@Ja8>D2$=YT*8*dGeS1=Kr-d6Hk zz*)+yJ`6k~y1Q(jMgadj48sLw6`CT=(iE#!O}L+38jM z-%0;uI2-KK`lmnOd;1*eg9Wk{--^+y34Lyexz<%xfOS=eVx$=EN>IWc5T4CM2m_K& zSDcIqc1d7bE1-JSe)>b)03o;?9JF36xVH4i7f@iYy7`z+@Q;KCkd|?2bG^sJ$bq!^ zw4+`sG=#!G*vAp*DAUVGV%^h>$*07Mv=@Z7^tV&0h3jAW?+q^QHhi4r_HmEp zM@}n8di3%T!LAf$c{EA|H*v)vx?0!O{_`;RpxW0ba>h2~363>s9dt54$#Gv~23y)i z`LF3@aI;aA4Tq^3^qZ5hk{DaN7e`dUWZ$hMUu~}J$NC`yrvZObVtBE(!?ttXSTzz@ zRrE_n!j=Au{YIrtd`9_=TZ#v?9+9_|zbO{oCKd4#YdU-%MB$7))t}|? zvm|__*i_?@dA4_(YDMqdlN>;X*s&!SWEyEktO4vZUKiJ_UjnK))Pw600g08DUVqDM zbY;qStF?i#Sn<5KPD-BXDSY&lQ+>d%trG-f{gYkY*Tr{ei7mW*$HUJwSkrluu&+z! z4VX#WMdsIDC+E?;L73dZO%w|hXwDpGpL`-ugGF38axI({&12X8^4r+7wr3pP;#M#^ zcYd-W<9<0uiBsO$39ytKUZCB3M`cBYOY6>qE}_gb?|xKf zvj4ovz-zre_D2C4P9d$dQ~!f4VBr z#bnKzJA)fa@qI2Ugb`I9)3Ci=m)AFNGBoQmI|-T;P)@7gX>R&hWBFpxzSOd|Y9`7r zoV}&hXxYNLihTAfBtm*J@vHEHpwDN7nnE`0OWX0ej7ML`mskW9>2He3#_y7Knj;6E zrC;~2g(ZnR^SY)yrWfoG$+gn4`$quyd9mzx5R0RVgsJVsT}6^-edXr*9(_cRXG=~i z&v|Xsh%H~WvxqSa0{i#=Rde1h-%q2I4AHM?A;%to9GKG5Gzs)s%S@YKpHOf_AxVyJ z&e6c3FBfqoQTYzh>{r`a)j65WuGG2V*%$aTxzB|0qIObp*HBkdGK*z9t3CbaJ! z%&lqr%6zSH8BuqET6l$wSznM5tgjpsn>&&4bhnYUympl;vwZVS8OWT4ckAVoJi2SI zBS-=zG93Z$${l?@(ae%{0IwfT2;rb$ihHk16n`Fbc{=Ym;F2ilZd;tL&WCbR2# z!z8EoKF;7nmPV^x&8a%XMQhx#%k3u0IA*2C#O_q4qB3-4Vs4of5_@Q7ykOD8?Wc5n z#L5`O(Jm?SLPXoAEaC~z<-QV&XyE6MIxmj3IPWx3var?u!ubbvQn|<4Xj-Y>Zexgb zF6lBwX0W2d+PY=N_erwIroWvL2mO%eZsSJ&5q!2A)rU6koNvpf!0waR^U3>=DP;@Z z?Fi1s)+sS4|kNKJ_6$?cqm zek}$STYpn?c9Z9+eyUcx9e{l40JW(i##)wZWYjG}?W3(NkKh>oKQNKBIap*Y{le4- za(zr%Y~U!w^@5ADE7hFm!;?JD!^57L`o*!hZ>VbVHz!-X0iQVD52-gKZn}Fu>AHF_ zol>^45p4A!mB;;7-0^FH4NwY*?T}@@SpO_-H&8B?OGuHzIaCY`yDo`!lSI2aS`#YFWEpO~wv&qWJ6T@oS~RgI1AHJ%imVxTHAw#KRn&Yft`hh3m-=*?pF-z9%Ff1Eec`*!aIx{;%SzYmv~#Ij0m)th*KMKodB65~=0U-;^9wfT zhb%0olV2$AI_=}+5<%DLd{_@ToE!)#{yB19%D?j^z*ExTjs+HYF`2sUFmGkp>4RW+ z%3xm+{9Et+q6-oaq(doDr%v>5>2--Z-mY&xs$U+`qZsz=5?j-&Ni1U)`yl2}~_}gxLN&wp>eQi$$Ou|@%Kt|buU=FFe!@52e_q|YKdd5L* zoIT09Qk1v$uLVr$ZAa7l9KMgqze#szh#IznlIaDaTm@eI0|@&t&3mA4fKted#&-Pq zq^XXyAC*)K&GIBVcd!=>?? z1dfZSviwaE?jwN=7IVMfY7^1e z(}yT7Kz_V15i6uX@u#{Da@|GxBXpeb`+tF?+EJZEvjy*y7nH!ZWpXOSCs%%MOzUNE zd9{O+(?H`9XBTqgQBShAxXRFU75SYp^8HX&?M#X^r)1{iZg+{V2AM7XSvJKk?h}J< z{sosLtp=ag5UZyPyeEU2v)vfXhRl_w%PnPL573P*P^r?*$T`;)g9P#geF`TgH$l0N zW0^X?ZPeG-JM$bp%Cm#NKeb@i)PlxLt+Zoec|N3%%Iir_eeD=!&x;&vT!5_%_gnBf zAsL4faxnIBj%mt z`pBasvRpLE#BW6nqtXQ+U5HY0{M$Fc!y6CWh=m4_(=eI)-&$DE;UAr4DFAcT*Mt9Y z=Xot{uT_iPX>A^wDX7xP~WN!15)UKg_TN@vBQ(ZvHTDS{~r(N%B~~E zSyMlC8IpQBJ|n$)TrqG9e`K7^Gjul^ z;xZH+{>8t1?@k$=`xoUhC|-eqSm@y&LodMY$6{lLfdsN9h#iU-S3?`oK`jR^B^(y zac$XgTf#0ILW15Le8)YxUw^pq8IcfqxtEQqMB}1F4zgVO0du{sj3&2L`jNuDjL2gR z<@GKOo4qn^8XPYhDzE2$g}IULDX5FZKb2~kRQM&KGlqzY^s;y(RYNs6b~?joGjA7x z$gw5R5(w257a@mcfDuJzXqqITNtl0;Y4gZ#>ga#xObMdglV3%y?2;dXzB#9y2(F~P zT4JPTk`{yI=0-`8JNQ-C*m-;0C;B~PCh^S}VwK7Gp5j0+54kAC3-0Ikfm(ydrG4C7 zx&GI6CaUSa&e|n6sJ_C}_BBD4w`V3n!*srEUy>0huzqVty-v zYx=qCsnz_t;UnA)(wc8+k(gusItEEtU)tg}s$Wa-NWoSqH&@E5~g{n|jz@C#Y#W%a12?s`l#FnbJ`!&YNqO*EkBixWj7q8kUa2 zEn*^=ka9;Z)Zvx1WH16tpyYIw`Ebv=GSd7=DIs9WHENP&b5lE}TZK=hquNy2LFuwd z)%@HC6YqvB-Zvw$>X6m_v|tcJq?_CYYB5PC#*-SQoxZZnH0ll~jxO`T_R@2w5k1r$w;Sm%!s-S(C0=Yun4Zy)t-04f2dgd8a!RED)K8cWD-By1G)!Q3h#@Fu&>Xn)YQ(pHxhhtV~db zM%;AX1nb10<0uxp=U4htdj+0NRb(N9hTN$u3uXTK_x~3721J*D*65-{Mp^} zRIea-{nF+pu)sRK)CcV*#o@XgY76phN@5@vW_cJTglhn&9C0kP!K`IU2YXW zr-^gz8F!Xo)lV7xTU;Kt@Jx#sfACekIx2#Fngg#1;pc03@8K@}t@OC5TTZk)B;x5J zWJ2rhyQg`VAN$^V$o7dpE{m88T>=02k5sbd(G$4j5?rhQ{6B`2uG2Sqew6m zjh7kFYO&~C3+{el#Md;Kb`_X5fDb2FhF9K|;+5{AK!7tL-bL_@H~Ms@5U@cHH!{M{ z3w*PI^1;VTD<%ZeI?u+7be-gi4ynVxyt(CdN2ccQ>U7J=zugVrVORKws?qiJ4DJ^$ z87QbGwY{0~NE%P~d^hw=BswVN^~jt5YGSRulZ`4+(t>=?hyqZ%sUu>&H4`R-oIP8-s7F z->o#c&i(zZk+o@+^?R(!__1XiCh%8Bsrv6V9vAK|yDn|m>E#L#Q$kI1wv;ZX2vF2g)K=@qsX;5zTL6%vAuS3$Z+ls;k%M? zb9=J%q(0QO%DZ+3wq3aB-B9I{&CEBC|) zBJR$(%OjJ9>9=P@D7TlO;L9Z+&Q}8!Vy>w^`6NpfkE1y8+d1HMP!V7FgqlNF`{L*_ zQJ(=0ct;=zh=h%#`yqRPlq|Ck1OtsUa8d&X=3b6&2#m4- z(<1vus7CY0T6IHLIDfz%a$X<7OlSL0cn_FCv%U7OW=62)N^a+Ui5_A^u{p z$mVyugCCL~$v%tppE&*e(HeorPxRHK^?SoSO(?dBd$~7ZYwDl%qfD)ujoSF+7kH>D96b` zCWpY#LuQaPQM)Xj1P?5<0yWRgjSAMU#YAb=IH`j^^lF`zMO>jN&lY2~b*QC89cE;# z6a=!cD0}*NIjF+nXEj7>46*a|MWN30YJ1{t zuhceS{;0He>nMV+8$GKfPGQ8&i{(}=P{U>SyJhMi!^B0GS<~*KiBogZs@cqKN0EaD zy+K6-n=}mZt~tpI29NpOS;Bh(6d$d^JImcfj?aI^z^|;{yId^&z-HrEr#q zkau4Usng-x>BR%O;P8r&d-R}HZG5G)S8LWSAQ(F+JWI-4(%LfS(Fnr`v!%I0t4`s> z{K?io;J@~QHMudBX0$5DO4FwbN0x84FA07}7xOOayAxTsmbOAv=k4+(fyzdk5Be6u z0*5Og>?B?c*kvNx>0@tw2z-4wxSk{VN*YQmuQFA~>)qe&G{M1&vzEP83u@yB?T>8; zk18KICbXXqm$&^`if1~5_pGPX->{iJVGn(Qo{8<~c4(WFF1VfHzYtM?~qw@70! z+veF1c+4W`LC@6lk28n+TtBw$n})+Zs?GRazRj}pva*l2zcvfh20~eeHHw&(em7^(#uJp(`lKbMdbV!gei(Ns@M`$1;K88@}IW^xeO1nKek*QMj zTuyx0Gc=Zko#euVcU5UCBUg!OLxL7KRSFWJA|yiw4a%`oGafNlS3w+?8{XF< z#hqUNYMEYF86piprNuHH?YAwQxF$z>09{nk$i&Lx@gV;gd%w^%sx3K_xSWdqss$pR zSs`xxplaNEC|ka=%<02rREvZ?o{mW-U_VtXrGyH2z@&yiAUQfS zHSGvVK3v;v#E!AJPQE7e-qtGzGwG6GS>JOXcg}8@87pO*W;zZF$b(H|SHFrT+(1Q8 z!&mxP9+ZIHSETcpa#IfL^(+WM|2sDiahwWDWA!{8tUfCasA$9%D!`;5CW3bK1?ytd zrWp8OX+=r3dP3f(iKqzHX%A|b8$i@crcbzV%J#@Ie#26OEC;Mej*ftkNQ#PGQTe^j18s>TFpl0{D^xFF+E_RzzwNK)A#ttx? z9zw9n@;&q^pJT|Sp)AR#Y8q&Yb&2{@Q48_LJH~any;E7-8tYwsGG!R^g^0cFKJExf zno0-7_Bc9dg2h|sTEtak$ckAr)iJcxu*Mk{Ty)P&XaS6Ap*;L!)F7xkaA#^y#W0Wp{MkitT09?XuOh_Rj)863jZbauJ?dQ! zm$sk9quPSszBMF}ki{`C9IgdY{wY5X_L7#p7Ndn_(qmo%@ftTUBa`(ze1-)j|CG9X z9JF1_w_P)9fGDmvp_Fmd0#xmjKQ&0x2DNT8sK<{y%&zMtJDzyrZ}ACp2et1p#+JyJ zs7dq0!u=B3J8I(!_h&QJpN&AF^+SaR)Q{t={t?%`=$BYY%IeqYk8-!L%G28a0@eEEWA&CGRW} zC~6|e(fj0y-AL6$)PwLkmtkUGOoYO;mh#8Vc>q;kh`<4E;TQcC!_0ZwKiC|=Ua2HQ z{mWMgR$In8IBn69T*9vdhyIyzD~_#!ST^=Jv{`_$6jN<0I!gdd7(em?bVGi7JV9rb z5@F)z0WrqZ4&BnI=(>EIcFk-?L2$QAB`}mYHCdnrn4P_+i-``k^f9BGKh{+@cx#BX zvsC&>Rn1v=NrUZ@-;VjoEbiO@cb4jHg!X$BDU1GJFz|oc0+9oq)W%cw$|U8BXi7yp z5dkm)dMUa{<8WbnYC;_{V{hbNw>rsL9|Jow>0{YUyR?EwaBW=HKb4ufIxjhYR`$Ph zaF*C2A+mYO2Wq=Mf`_I|&0H}9yK>GgZx-DqyR^Dh%a(kEmKsfwW|ayRwvam&ee6j? ztzugTcXKo{uBJ}pqC{5_070z#dxRWxNtB|48|`vdHOJF#EOTfDtXi-_kmAM^x%h77 zQs*C=!F)f1q0mUbvSriQb@c{c{vEDOVNBC)i<+<0sPnl`?slk1Vw|*vwaX#gugaRH zy>_c-OCgL##@%^^JT+Nc#)0cK)>G`sHq(w|-gUF2Z;Dz5h`37g`s;~-P4DJ2afD>= znG(BLvAW)d55)K$zUF9gUR{^JAJ?7*XygL+P&1RkNX}9Urni~Qhb0xI6B*_BeS}yE z<&@#5`rQagCu$~yvJvCEO1U0f?G@VSa|HkoC4fIaB0TQ*SK5S^h|sD1Y9*dii(hLQRXZZ*m%+2o>3qnjK~^dd)v$5^OkoStu;LVj z?Y7SB!uZ2_F>D#QjiCY|OJ8Ao}xIVP~uL?tEC|wXvysTnV@?lzPgIGy;yY@yQUQ zQ*jB!OfllpO=9=+-^7*?o^HEvs|K-bX#=<;K&2bA>hTFE;%g~4(hZ!#R`npD3lYo1 zz-|pNdyy@UUY+G4P~xiq(^UH|HHosRC07BBU?cdV)3_Xf1n(45Bq!1u*VZfChR(bn zW!654GN}Y_E4un{;i1QTLGwl|qoDWcl~&5-JKuZIru8M8|Xua1D|nj3z*4NFQpAQF9_y|LUq-a>wK09e zrS8nkN$|1uNa6ME3l=Pfa^=xE+5kqFk=M$q^eeBGb!Oq64s|I_M}s5tc?X&>#Vc8h zp#cSmae-ueng5uWw}&2Y--W(FMh&$1BvgzwER5I&u2ZhRSeG)oKK0qta&1tuINzsz zf1)46_Ip_X2+~toAR5Mfq{fAkbx3j8G(KwOXYRb&=sgiiT3q0nu+5Y~@$)vmih7Tu zd?=iKkid0<3nsK|P4-t-2VBf#!S&d$aQ8d24^e&}EnlGXNgFy$!Ucz;(A8_n&WjHD zpIChZkJ}WpiXd9~PdN(vwFa47J0kznVlAOh6kidZ)@DQ^fVg|$Dwb5FNmX1Cv>rY& zj6$hC>*dFz9P5^TjMgj<J{=jJv(;Mbl3D^@K~atos9I zitKlb)UAz1vZ@Vws*H_4rm42~sN}EP-D4pYV=dzUcaD|LyGiG6I?Gul*COKvxq+<9 zz+MiDU1r6^3W8$+mKQ#rQiEKdBK_$9wN&1IGz2IMt{zQD`^}p?$1AlIPw!v*s<`VZ?HfB~9 zRhO`dk@GGwH{O%_-S}^Kxb!UcR8@ddjFxQrr5Y zk6f zf_ghSlRv>e^8$Rh>I;UK>P~j-GE6zmKfHbg`o6rg&$vLlOjW&@5xUoR9mO`J`(N%K zt$R^vP^$l_P=NFqrlLY4`q#tMneN~r9KedSK74x&W zu=XywOKiw0)xN;`W2-5%IE!(QfNo&6#HW$RK~VL{tPg9(kKt@<@PBcd1UBz zT?Jg?x)kU29%4$sz=`Q`Cr3IgqkNjOJn=l`a=srdRA$6kX7#?EGPg9ULlxA}=L`BF ze)NVA`3x8#+7Cps{N)GQ^X1DlkXXv9>t&>;Wk5J{eYND`Sl#B4|=LhuzU_mI)KbN16G9%15CUgVjD;orLlzo?LovHU=q&V?MAVs-`tMi z#`GbWe&<=lK(HFNsf|^e$9bkFIVGV14S<^v9ZcYEzdbUg=`3%x2jp%W;TSK3rP0{z zk1VLwrA{4DzMLRhTO)qFeoPE^*Ps2iR_l-;X^bY}>Tic{ZQw6Ds|i=bWzY z=?-{i+|3w*{S6yR+-IzINBf?8B0*OONTrItboY7P-`KBZP7zig{WC5?j1V9hzI*nL z_OSf@y0MzZ%%A6G;K0@Rf@ThHU5-tCaFzs-^Ny~3hOb#$#3r#gZqD2-uX zVcx4eg-ZsnR-><|1u^}6!HoQ=%{WC@p?_2DJE!Cde6>C7R+N+tETr(-wnJp}5*t29 zkbl_9r)4RBGvYRXm6lO$l-ETS7v~XusMn>R`@Y8tjk)5R#WXG~k>0vW)n;G#?K!!x zrCEv6rD(O~Dqek7G=M{TF73jNtc0GKl)t;|ap`Gf{)@+vdE8Ui`rbZW<}efarSHdj zaY$iPj3SV(E}B&EHfsOB7qEXODGC$yPZj>n20;fnnm#2mvl-b0&PtlqhlaM>LmYq7 zbBWy{&7~>|aMG#k5XDN6nqYzpgpz(N3WmW`qh~ z?gNydZz8YLtSLG}^LClUD)-c%KEX^<-J`+o=^iPh*B5=Bg^GDxtGo75YA<`>dhxy@ zouL(4_1m>oF6wWOQM#N`+6^ROh_)M6WXMRrWte8oaUcGSx zvmrepnL$6^^MfALYD&>HL`x1FfANv(KGp_T3N$L2If{?%-ZiH~A27*YF5v^Qk+#2RR6jPYW!155hkh*lv4|9sQU&~$m+uxS(-a34vz{di;Cm%LxQbk`*1{e6a;=gfdiUvzGK@t_Wyv=)CQ)g13cKwAi)^vUR> z3xh91Vj!k`n5AaoLXVwV17bJlWNUo{X0)`p2R8+$79zr{^zSv~UaDV;TnJ5L?l3Mg zu>fgo$vz&`N(JQ^R|q*6skg)MRonP_ zj#7^x{(C_?;q3q{;UX0fjd95XfEn%EKvs8~oqBtk8C{vGVSqn8T*!fM9|>3o#j$+-_F<7wD=`i zMEp_CtbN}F%>T{_qSSi;C3Xc8F#rxfj;Bevl^MZ6NoW=xmrX0=@S`Z>z8fiq*c0FK zvZNGQBjE&+_Z(>RQ-DJG-~orIpxY7oM3Cm+4b!&jRZx4MEG!3BAh5;m4+ zi$85Vz>Iko>j6$&!m(WZtm(EmKPJ?}H49eVngKPps-c1!$u_KIrIn<0G_-BeAgiO) z+^R*#qT7;EOS}?Y2ba^bri(x}9T$8(vd(uvW5jk;I)9@*}iNxzf zx~59{&YEN{1G_@hJaoRk4O9MOTSKKBS_kDz$?jRot%0@-hPqcdnD>U4&!nt%XDs}j zpAh&63yXi2E|!8V?Yyh}55xU=pA{T2woLx`w>a))P$m#QSDd6JFEh4SR2&M70L1~% zHV3lOs&5vhUojT!E8d>>XMj9fvDpGKIm(_63e$XJyCM=1kGz8Avv}PtQ%cpl|EF|P zNy?^qs=mQ9hgi4s@k?9t>t7(z>;ee9Zuh`$X|@mm0jDiNHgt&@#ZjsFB+bn%BNXxdQl1SxmHhgwhd!44s7r zs)+Q_uL6UYRa!s#*e?kYlzIN1!VMpXvrWy2btRI_g!XJo0!z{rWnZTY9g?KM? zMn5qUjZy~YuNTLs;WQo9m<3YYfMUf@hzt1VqTEggF=*DyJ`0&{2I4Q^ZZ++bFx z;V=Qh7p^Fhcv(F{W4&1szk!7 z7W*kVEIPYcKGlh6>G*v6shho-Qh{}_nKQg2fV7{WEqGQ88eC>kPC*z_`jXJa(eh&X zE2EKDHan9q4Dw~an<*iOFUNPQBZys0de)Fw{d^p|^B_#v!1hBcQ<+`rGO<*J>8dG7XzQCA{(resCuOhd75+5Cn$@&kpp0qQLo9`HuNENspQ#1cEGF zzi_;EqfXmP)abu4B7~_DWnOm{d zR@^>pPBp%Y)=re}=Mir7!DUYEJ2X>5P?ApKlJLyoZU7F*`4OdP8aJoe0n9Kt#!VHC zy?THZnDjCtdPN(f>u8p> z&feh5mDOgj4=_vQi|x+d!VtF#6V3UtDhm(Eh0xdw?JcPuCTbJS0VDpVrcn30SyjX5 zbHw?w%8kBf)?SnMPbO_yC5L*60by}mWf|%)kC_9fC`J?2@fS1VQG?TUl#WcR7>DT; zQVfStMVbnJDmwXp-{%!o^#{N&s*o?q+F+2b}vz2NB*PC)wJyP`wltpS$k9_9p9gkr!|g`?7^U3mYWZXYmtBnu$#wlUv5O5aU#3qL zNlYubu|acBEMgm_qwhR@*p~O1ABlT@c`%hl#?~*!xwLtB<)>v-v|8HTp$^HQZFfIO zB(J$uW3;WP*d}4!Xe97wsJK{1L&LOhMC-szxpd|ExTGMc_2;Rz!68W{KdqX)qpXjO zJOj`Uef_EfbjBmfnZfb^*~mlmL+U;}-^l;%vf`s1*Kt`3B}e3vR-z>m;g+OTNrPFOccREG;^ zXTNzuchWoRkA#bm^sRk}j9)LBa)Q~65B!8-WlW#Eq!$&{gNGk#P?i}Bc;414fw*fxx=vmBm0CKgln6DyD?g0Fw} zsOX`BWDnXmLHJ|*`%aP68g_LLt8P$^EG^{J#RZU@UQ7j)}+wLD=F0$18 zRlf#m;7gZ%OF0mY(KmuXgW!VmjQTtN9>^fnGl4@y3Gbw*`VX zl|iXXygg+hK!gd#njn~@?)6ZzQWp0%!c(glSIh~fj}gFWyRH;>7pe!@>JLdQi4qG7 z*X-|OQ_-)+yi_^;;s9NdrR#&t`k9jO*OE79IzuQ(ZaMIh%?tk8I2J zO;{7EEe+YF6#}btmBk85qX#=vRZ&@)Wot6R56lu zfzIrdOP-A@M?;`FtE5ZOc@uGaS`Uct#Vy}Jt6Hag@{mRe>M9cO5rslfY=XA4VvSx(+C zgu8a?v|VJVr+Tdv$IGDjDFvblN!D*HVmfJgO7shkf4hv>5FE$|8SO(YLpRUHBZffK zm-J4>@WhqtjUcD^N5d%f-{s4_1))>F%#*5 zPsG%BqiXc*ttr6n&F_)F6aU}85tb~HsH_oBN0mijUTkXJ@o}*mBsjgHQAP~Yd3ha~ zy8;?v6t*J8x|#Ba48 zaLyarirml(xbC;)?A%qOWszcJ8p6QQi~9He>HYWeEo+4XwQQfhY7yEwn&W%%_oiRV zzKwl5PWfnd(L5NP%zE6#aAT;ugz>GEkAhVosi9|$B9`BpdTih4{4#Lsp!#A*KC}xq zvcF)^c7Q>*h6$gX1KMj1ntnIA_)YJvxd*5BQ4k=*Ml_}H*HPbfKv`oVmwM>{1$o-J zNbMlY;Vznlg?d0drq-LLgxQrblo?yQbpm2jZv~FmeouZnVL|EJ<)sMvB6``iD-q%3 zm-x@UT$3cAp1nW37imAOeMMh{OU0hhT)$LUO09hqmM>^P^4^2P31+5|%8_J)vj7~Q zS9HYf|DAJ38J?BWc)exN`T0M3FHzZMhZs7SwucPvSy6ody55MJ&hf6_{m^pCTmWtkagt zflRp7n`kf$NlZ03#s>I-WqW-p`jHEW=hA5OlWy@i;;Tj z9k^Sp3e*G2`?&0Zo{_MLuw>0I&c{BVb8#}2%cE7$PE&AM2>8ur4gp-gHdeS;;L+Ez z*4_DOs&2itqtm(AHaS4 zGtX%P^Yk1o%aDptPsA=`_|>HpE7+|YQ0*DPTD`SeweXrp^ykmJS<08F_O4Ui2=eJ_ z@t`wU?u~|78usd5#D80zB09_{k1O%L3pG@qU9Ed7;d~o7MfFrBJw1vxCcJhSezj=I zXtnb)EG?X%WftBT@x$f9EKPg`l#=I){YO_rsZ!HPK$A+1I|?P3l3kFIL|v-F-hwFw z*MePj20iTPgSaxgAnmpX{5PBb&BxXSZNqQ&)Y3Z=$g8qZwbI(|30b#Z50UQGgV`z{ zOk=dbj`LT zPqKkzwh#VI&mDtg=v4It-yz(*rC{~SDduncP+{-_))mb%%))?DrZn!JFNO80wvZ8t z5pqaa|NqXl)S!H(g0~`=o5-6C8cyOmBHur*;#(4t{tC z;}G||vVV;IA=zudHI~jzUMxb`0ijS?qpF+ZQ?*wAq#bCD>tH_7YCsf+)@n*ilj`Z13k8s|ey94d5^FP1E zM{CH9`3cE#9wajhWxr%UDN~@%R+=|(RopJue;qBVF%rXPoAn~Ims8rk;I~Q@zToW7 zZ>ndSSjhXQUM6h49a_(;#_I*lq?IN82mcJ^2nE%cXD!Kc;r_V6`4Sas)dn%#|4e{a zmP1`6HnLDviFR=>@%<`Ms}9|cLBXAMU;&udMUdyiww_0g%9o1AzU1x%H<_ou{l4^& zrg~u&M3n^XbO6dJ-S6;TPMQ-Lgu7=8K=T@wATXDk6hnZ_X%?|z{{6WuN;49eO<}bq zW>$Nn`@^Jj?dF-wVZrc+$sZx|yt1dEg z?m87>NDU+H2Ix^@W>W)Q&m(>JhdXJ#ck;IWSdy2cf>P{vdqI6u%EHXqME(klw^y`< zKjC2EC;dBp+!cs}f8&Z-{(rok=RceO|Mt7>s=bP~_O9A9trkU5drMV~2x1FDTD50u zwr16cog%SE?GK9D6*EEA2uZEf`d;VnpSW)1eja(8Ip44M@j8y@(Vxn7u1>Kcd}@b= z01%Qyb1;)NCE`FkWz*1@nUec5A#8J6YPZ&~&Bg=wCWyVtdw{Mbkjv#c!*8m8r~P;& ztM$BSdJk@HAHba=s1^V3C*WW3y ztaPP&pXW;?VX^;i5f)6dbU&H*@dJ)VbJ~ix^&iez*~T+~;Z9P&Z`_Mw^1`HDGgWo9MX0V?c&A(5a_FTUT8O%4WR`vwh}I7+2tI{3M(jyTAkUZ4ez@P zq`8GNPPj3lH3dc0WwBC6Q5;Q<{BwdWb|K5z-{A-qlHGCS+__!_K&Hzo{;BXs0eDfr zpy-AXQkjN){Rt}7b7maesK`zZ2KJuqVFL(kDR6_u-XQp1Q>V~|$RBhvlI2LHodHeB zyyQZtw3BaTlG%?}3}@T5fkKH$K-!hyt6CeWLNhMRq~ zq0y;P8j@0fsC3ntE(MAwO=w<)=d8Rm)S_!Zoy(GzGIG4tl{6br+dkG?r`XAc{xI*^ zSfZgI2fjPmE9sd*|E@A$jL5tts?gw0Wl5<~EmOCW=x7aO$VRVCMM*Fp4aF6M6M*}C zh4~O0haq~|wEsXE9q47ER@x+vJpvhCiUNhv?73HF&V|Tp_9R6h`+fY1gzihd3P zjbWm%e-U3~uUGaNqg!A!_Zvv-1rH7mljR13gPG<#YsxzMQ(B@ru-r4l2HwKC$F%CO zk1n4rdFbw@vLyPWw35VM_TnR&xXg-mlI}|AWK?#y{T%HLG}TK# zgf>36l#EOm-HbVU`+-trd*^8|%CVtc#H7Q7p6FRuE*AGAMl<*tYxLbqz;o2i41=}b zKQo5@ZF-M@AS<`Q^w@Bjo~e-8J2E_)9=5c ziEiBf8v#?vopnlXDCtzkROi!cz}Wq@ESWK`owGo+sVPjQlZi6q>D+F%p6`V)z|T&; zaPe()X}9lAekRO*w7^U3G(t_bMe|1Ugj;GqA0HWrL>sJu=x>Bb zVRkOef4MBnC`fyK{U=aB!`k>KbZ#mDp3}eASc;kEd*jRiZ{Y?~f}VR?)S3p+kon^P7Es{n}_z;@n{KaMG;H zS#uMo!}S)ttcdBJO2R7%?dE2Plw=+n3I&Y!?_WdQC8rcizpKUdmh2SLNwzx+jB=8t zKi~of(r*kNuAUVL$+~AJwkkd)IoZ<*Rjh-PS zUJnd+J{*tfatb$oK`KSRJ6wrtjVLM}@GgFDdHI7Zb(|Uu3l0kw!HJN7>k6SxNme^> zWANCH;$^vg-|uIA>OJ_%0PwWOBOAH~!X;L-3Rm~9pFab5gJ4>C17R~U;vS{<#m{z) z@YR2v0ueufG`t?ckY8sOn-A)Bb%I@XBcU{IyTk{NEM3$RR-R-HHen8_vGH zzUXAYWXHrkKj0kM=QLeJEXh|r5>cQ)&eCxNN;am53g-i2ejLsSjo08C?6nFVt0Slct}xo@ zm5RInwbRU){SXqWn2LJhG3<@@vggU|R{E87y3C_oYvKCO#T&7I2X6g23!mMmY7@ol z75M4A3sa{5?6rBy1FiSRU;lPpiMdVa(n79&1*Bh*8K6E{hLa+qgP9G4v3O`ow2{5@ zSIZ@_24F_Vt=K0`O_*k5#x3@s*~+;S+hH5^YGSa97feEzMGSIz2LM0;a^iUWxvX&M zY8S^SVA{l4jL!UUu7
ctIK~^1_Gf z!H%pC;f6;Y{mZHND%YkME`hxGn*E{_g?Is^>`3|n@MYZk`9P%o(D# z18Fz47?M+Z6kR&a0$(vpIKEu%4P>jy9fH6#GW(Buz9(OaP^94wvbDTnUTj36yv^$~XMDweq6aY)ajiEJBd}9HbEP1_C~NFrw|&hEcM84_=gK@cLIo zkVuVdJVkIvcf|$L+0n(zH#SYD_htKZtNSl5=v236WdBs?Z=m@kHPhE7qDNobr{a1c z_P+1r<>lD5zl`w_QZbWjgCJ^*Op>GUPlRq|Cw6r_#*dPJIL^ME<1&szV~uGY?APqy zTh0=NIf8P;nx=`h0uHJ;BKQWm)}Y_|T*oTYC)}GCaM8Q#G8)TSd)8)T!WCq^jJI2K zcv!>?rLDunNf`@z!nyHtze~1P;;%)rpR(jw_@hMaeod!{DD>f{ zovX4jz0*mitqpqUiDV@_M=v8IMRf(gm$)iJ11Y!}iNq{W^hdO&zL3t%a*M(?%Rb+| zHaB)=ZI>>V^q;HthdLkXLp{$2ncP$h5AZZM=-=Q!X5UK^yPD0_eI?Ji@H-eMFu$RO>8xg!VF&F&Et9Qqv~`yU-;HIUV;C%wIo zWWQ(=&X)YOTl9|Tcv`&23h$(z*x@^fzpGY3*S2#Kz`Ergj?AQ)qr=b==`?8D z69JPHP?{Q0lB3Jv`-L`}?{(4@*;6X!H`aM=GT+yBep|>Ef-4fzi)yIDSYE)$WiR9@Xa$mH$9pefuBhcL8x^)W^{4iCqWXh&?wE zbiM)2`6K8x1i~@@4SF}OzL|G4w0=tBq*%+`a2swHI&($v z0$I9ICBjOKcc6prlP*eP@%h7oZqFp!v5!C^uP>{ByY9V3U9gRm*LuO}aYsT--CC*elG^u_@XW#}CI`2LOY=P_sRo3lwtDra{Vf^;_;|A^A-ANCeS7ytk zf*DKuT&UrpU~JluWtZcsWL3<8=M8+GE91>L>%4kS{S*wuB#VEWQu*nZ(!$oqg=@hS%Q@KrZK`=HtYx|mTtBy;Udt5rRy?}(o=G6rycEX07#CH} zt&3wEhL8@9qY99>5f7Uvfdnr}iq+aCfX4y#4PhPB;T~WHN>Sj*IK%Q*byI5j;t0gQ z(rz%!_4p&5fai}$lg4^MipCm)!KzL)>G#~K5f+b*zvLws_H;b$zm#rO)fjC`j*ZoP z065}1s^=+j;GqhS|BkaxR2#~Q=$W_I%ZBO zMtd}N^3_eES${oOeZvTe+)fR|8WZJEH@Qa>!?qHCq8HwQ_z+R?ppHL(P?gbMvA z3BNE-Eor|}?s$KrubKLOxyKLlm505d%Lxdy)ZLWSWDMdF9b>qbt)s?(7 z78qi`A{3`qMdnkqDfKk6|Mm%JY7xb6C{HK&X5LEAxW9)D+7H9lV5f}dm7P|_Oa@dj z;WheL=-(kV<=J+?2T(YlGK32AOdfv^$iN5)2_WRfAfDo@CY;KDL0dx|Z0-9}-QabO z{dZ^QX1gE1GJh2FJxeY!iMsm|4|0OBJtcsDUH?jt}Wc^-z*WxH7u5=aLZItM*ScHbSif-iCU=6I?rvgqG@8^ioiSm5D ze5IEjw1@gKiu5fc8RgCc*r{K(gC>`wm(y)^v4jr7p97tf>t;C%W^=BFj|>7WLpm3? zrT7#qAva33(!TR|t#*aQHb_Ghg!10hCFhyx4YDuT&l!X*Rf%+E_xnDDYL2YAuKvy2 zXsb{NJd%*m8O3B?%oa2*59XbVklkX5h^J>Di0$u>tBkR3Js=iM4tuzo*`)f_3b^qa zRe!ih-`pcgaBt_mmg#*jVhy@ofJ%FK90ZseM4hp)u7ii4pu-w>G(|a6K7yA<0;UMt-`7|1arG8-j!%`{u zrU277`@+c6ADt@Xt{zxSghB_lj)d$fc)ur)zX8oqg;xnuyz~CYmuxT>pUqJ&}8uN?P(*_@O(vJ9f_R__r_*%+Wggfcd zg_!ruWO|sl_|o)PZ6>KWar=S$$};t!A}|~{ItWaU2wxjP-+(iLTsqwPLcQbN(96HN zcIS_2CI?R8P8g<(E(`7E9AiwcNal65YE!|nDjo@|U8Q(+i|TW+i)?hem7DVyUb}9` zYaLw;Q`iPu=zXk?o$f!aN`F)-z zfX-<1QQqJ}lgFGi*Ei+F(7&jvSmO90RsQ8$`x@Ws zT7bJ6^w;XgjEaAqYQh6#(4E&04=G<+A6knC7MZ4@sV7j5)#fT&Iwf}Y2eC?m4(aJ8 zMtg%Z1fS1*x<)lGVi%lcGu>M)N_G6IOq0cAf~uk}`-Icetsu~P_w_FqC{2}ZfQnyC z7UquwUkfng!T;_cw81s+?lfjwE{o1dwo6cdg8ba}-6s077uVKzbmow@OskCLX_+#z z_@5*6E~?P&_iNATNZC;cc_3(~c@I9mx(i~yxm%9~azZx{`sA2c{Bw~RE>7n@?y;h3 z9>Z(h3GE-Ow^cLhK1n&-bczCaJ=lEZz}!I222hX1c;{TVZ6-p9GGaE>ZUQ5{H=BLK zUR93mETo@Hx7$lKo$PPcyHBN9 zm8yy!sTeTnojvVP4am1yO^X&g;~uMdu2mHnUTVSB8n1nZ>U{+zOG}8QkI30tCk=Z` zcd$8@>JR6uyKGwW;Sx|r{w0~x&mD8#`%$V>Juhl6CR;q!I-&}g~} zgdu(u))&-t=a(Y|Y1nio-}>U`MT$=QoL5G8dDdrPw`48bF{{-jx8rOIvBX1eYYqgk zs5FOMRy7wq_HB`Yc^_(}<3uOONdS zZ7L9MOZL3hEbaYtx0ppMRl_#Zw;2J#z~Ra*dipibTMP#+3?1!CFu@m9GQ$)ki^0z4 zV~~8$Ol^@qD@md1Od&1}b8k(bF-uyn!W<$L)|k3QwTdP(uJJQ0z|;2EWa4(!pFo}X z5}olxmhP_G3LQ#)+?OqAhY)VBtYp^H=(X(w2Yi;A`vb!^N1MA3(!n}^y09F*48eWN zR3xY_VU)kWKn=#y3s{Jj*=7Q&F2vV*t^zmSn!tU{o3X|P!YSHKNyEQ4o#4U3G?XyB z;mmly%(Wr1fH^s}$2b~j*I?U^REGfDk)@p`rDfKHwdV!y0T(=dKeyRiEj`gh={IJ< z467X>f;usRqW(ux8K*{VGTp{;d}=`14FgnDU=rc7)?xgjb>c`ve599qV>4cUV^UIG z36E0EU0f_nR(s0Um(5~`^m#KcJiqkhLM`?i<;96mud7WNJM3X~9jh<@%cOGCV#j=1 zGy~_)Qms-Ipj=XWCMVBfosg9c0*%(S#2Dtj_Ti+r7kF2C6pD#x#oLzZo7HH)c2U>1 z*H#%QaTXuW1i1;Wakd>syd$BGQ%JD>eHM>p<_UQur#p8+;g?^Oo?#FN#qUH5c;%&b zpOzk7W}@Kf&o~4ES_4i~as%(kNt#t8)5KN3P0awLJ}dlSVwXFRTd{_(nbnb`vfh)z zzS|N&;2TeQB$ zGmUiVx<%>j;pd2uDU1hmM9?8#QlbfR$D?oH`eEhmzF)Rl!*_JQz+D}KdVE zAwTYu=%|OQh^DI_WdB&Avq_Celhv8vn2PL)BnhYOVgG2`52dE1w$fj}R%%;B72OWx z;P9y1sGu&+Nv21#zIkZ9^%7ng5^d8OSYECbP%&05W>&?i-z36L zveF5H-?UUjjcpCcdgn2lBst`6)a%*U*bb6<`MdX%#YznbTM@iFcm8Ctl%)%;H-3A< z$|3mz!lElk@E3MgD;&9xjL*0OJq*62ks+lIT7t04$z;ZUZU%Jhxd1*Dn39sUzIUj_Fj({3!CQ{in)@L@iwU$(}nBP}GTayS`tqA(`eO5jIcV? zP&!Vbyf3H796S7<@t@8E{T2RRn{t0G+`l)cv~qA0a$1(Xny+j6tpl6llBIE+_C0+- zNRLTh^wlOUQsi9WOb_7J=C35S2dvvuvIup`M1A^ z;lNB`^}e(id}6-U+R@P7qUD7OvZ2fT*n8`+x$WWTU&lKmJ8y<7(PnW1Q8lV8nc`@A zlKDTp_y>KXw1)Ju6&X9n&DdTWZ?hb-w`xqF<-^`7{7GUd?ayR=u&wocn2Jtb$BfC! zM?>j1X@(~kAfR?OF0d=%R4S{5V14dH$T#RgvJzjBHsjP4&~_A<6)7UO0wF`vY*734 zXJX#1&(siE;b_mRN|5?*&h-7?%7LytP~*-0_-wO_s+;IOMjTQCcXpIWxh}_*@ zn|{qSD9}$xEXPde>P^;mKLT^^d1i^?UJPv07B(pW2nPGe%VR^4$E}gD0)K`OzQ>Rdok;bH7 z!qKcq-!zAPty9{Kc~110oVQdg=cA&JO2M1Ny~+| zzD#IL{~h#VjlWy1U(<_8YZpa*DF31KT!&_ndeD}5#G~xByUd_@d?_m9ReWYqvYW<% zO@T-1wFNzRXdEc0?9lbFS%Z3<2EP+8xh#8!VC5Rn+?(YqzEA)yL^02N^E$5*?|x+CTUBRT(zH71+N_)=#SL;vhT! z_zk&42ZF(n?WWKg4gQfM7R&mnfU@UBF$99H4((t4`e&8tfTt99T@+q35i@jM^rLDb`)Gb)2<~K8bcvp>$g@+2G`m{oZXis9QO@Mm-k6qLGDn?iZ9lBiiLqb zzc1Yd;ckj2v@V&hEIP@osT&yCrZL7Fk2Zyy4Ry^r+8%aG+>d0Bgaa&Lfn)*m^ei0d z>l*CZBh+;P0e_p0NQMVq%B3a2G8&lS#(yT9SO2aOB^Ul)N1XrlfqrPbUm`usnL+!V z`T5W*EjNkCngOcqT89{CjsXsNF170~frvbP)(D z+NTKUd?xS!;TnWi%S6C9PR_gu^Q|FdgThn!Ypc$BhPE^_i@C?4V{!c{K#;1F>x#PuLkBw?QFg(~>nWWWvz> zbOuuO{Eb{CF$VX2uJ7`Xg3g)3dQ=A!FpP1HI8ZNRJW#Jj&u+QpFY>liyqC00$0^iC z_GFrm+sFt9aD-7Q#fI%~#Gsx{pI`M|zYsy(0X$jDd=w2}z4(?e$v$UGdBXr)m4(I$ zyvBypGJ)^ZWfKjc!UkQ;u8@enNzBV?5_N%LeN_tG&}In2xjJO6DkxO>&@jNRc^KzW z5EJNiBx%rUx}M)f;yYex>=>W6+li~0)N}jj6vGA)%F@eHE>3 zD(DP=N>Z|Xn-rWZAI@*kd{OQ~p;{Z53^bom2L%!m^Cfx<6ei1LwZmc6kVZG6siYD4 zs|WioAHxPGXa2jBuE^zUfZYK$@BElz=S04?IdI7^gHUq8C)@SQ!V3(w2s>6WlLJzw za|W}4)Hv+~iG?5oI@jp-PqZcOk2x>aczT;jRX;5xTcMll^A>)ed6q7LL#n`ainM#iAuG z`Htop>H4@9O=g5Pj0sG+c4E~*@%1OuGDi1|59T0yt43%J|5MLu9Q*wi7O`a+s<@qzWxE;=U->M1E1CBKt7Mhz(f*O^$+v{X>Wdbj_Ci_ zdRHkDzHI|K9kI0D<@LZq@tvrIQ|NjA?V(uUCc z{+}qLAbjamBWW)WE*BwPjJc zcg}0{e9<=H1`q&ZJ1g|vg8@8U2|~J^tT9toNRVL|4lPi1rBMJD z9g6xqC|?s_qho#dX~-qFwOe)%M+KdU;q+!`+c0~A+xtjVAB?8Q|A))F5MyZ@$=Vd= zO!!*4-GkaXx`+7&T2@sq#%Z&yrn7^aRK!etIB2aYRRJCE2uRAnhSPoJcBfeC{O12f z5V38AEbc3J0)?hm46_dUn4qof9ZrIlRMwsK&6hv86}CrEcHTgRjbKBB!dTV$B0KTzz93eC{3(y zmHkCkpK5Gu8MZ@@xWD(tqOJK`np-CRV)s?$bCzBIA86kG^Q(?3w+wO!4{a>&s{N3Y zsWP{I(P0v>p?Y_E$2?l!!*Q~`(oe_8!W_jZ+7IHF7<7U=C%f0)8>_EW{xOMl$zFAK zl;KLTxF~V5^~qQD&VSxJ|1x3I$0K*ct1--~4?G`xtWRn43lLLR!>2M)a5kGQGl%<( z9@#mbs*JJf8Yp;BZ|`jOajRg?UBcdm!d3X(YpD|seyBl{KSL|(Tf`4!9qK!PLA}>P z?s^-+|I1xdyloN|Ag1uK5*};ToN6%bifL}grf4`@cSS0+eQCr)GBqQAQ;@1reyURF5L@{QH#zs&UT&e4CAw7Y0;=Pi@76WG@DH=E4zy^9-L zm<+lT!Ge%)rI@WrIbU*YCJ&^O<_17i-hseB4f0i6BE4L@Nr2v$l)eER0 z<*La)w?hB1T)sQ&xcYT3_r-KTqP16Tz+?~3v~YQ3!(m*i$GndqTr8^Tv6mMD*)l45P|^A^CoLaR;V<)_Y##4GJu0DqCxJZH zVPo*C-`Q9G4}PnqLWtYLu%+tnXv<%HTE)mvP!Q#bi@!4o{oU5P6vi8 z*hqOQsO-s8yd4SM!tGrjzc`EbVmF3h?US;eDX=xSx94(Xk?)S8B#xv*d?f|ipQEvy zSiMyv`R$_0xHG<}Io|Evq;(!zLedD$BVPYOJ5;FuckU|i?uc&00#@82bD zBhp>sq`olx)P;H1>CoJN%q4h4vF$znN%18c>l+Z+{Y$n#LTvdeg7Ix))X<>3d%p?t1!zoGx~a#gTa8aMdFE0hWkvFic!?7VsAYm zc0w`KugWu`BDR$KW3LM~w~yfABxRb1He1ligG|+kwSaTv@+Pwt_6lPASdiUPAXniT z`oHk&X03oezQHhR&)viN&!K(oLwdcJy^NcXUUaz4e&a^0qr$$s&<6IfVl_Fd_?C13-y6 zD+%o?s6V*m(v_%lxm7TWgX1zMLt~NKT89;ZFS{%}NjIwxNkYSFOM*e_R>ujIHFvQG zRK%q~0`K+yE}9kXSp|m&YW$4w6KiYvg~U&nbH1n{{IBC7=#{{B+1_9YVj5R_Gveg_ z17_9ZHRbe&BjsT)ddlS3qN=o#^*`BKXKGm|X)0!j=o?i=KPxuPcQSYwE z2N{bF3oT&%86jZ5IJ5?ewB1i?S3k|%j9p&PX;2L+^11=kCpsUqL9)GX4^wpIE9d3kC-;i7L(si zCfM!ZW>TXGA(EIjYk}sJ2~Xik)WN#-Ip$F_zf=Suuy?Bh0zhHx3acis`&?*n0@#7P z6brCEWcpjZF42L3)e9?jQ3rdlUDU_+7NJa=q_wJsXGR+mjXo8lop&$Cy8yZ*dTXv#==i-$FtBW_)Dz5Z zBn?(9U3{<~QcwG_`;#+IPcmiG$Mtnz&MEiiK3Z;2(yyt}!p;VY@W3E*-gX*Ll!yM2cc1v}$6hV+m_q zbn14SR1JOQa|m(%^RiTj_0LqY>vSG#fTgAWkVNeQUl-ZMHz@{FdgKT) z>>iGSWTB`65ZQF=UEruz*hPSQt4qh`y!=0zz26@vg-jsq$6%SO7VuHJOPW#AQ^TMH z*|iR(7nu>`foxrUXx6Rc`e!Tmn?6bf(z*X|p?=CGAn`ZJGIbYO^OUfkz>n#~5&*lO zbQ01XNe3*zZb~hfPfI(^?CyEVKbs-8t4h)1yyjwNiaYG$pM=SU2u6a=0kH^P6!_?35kbn;3XBmLo zqoXR#O0B4(2h?A9j47~`m!DaWrRf*zTbdoG7-xa#-yDTq{ycv;>DkVN2h&oXNON0z zdEUw{Yxf1sclMVq4Dy!vwP$lkb4kupJBJ8o8B{Q>i}*i8%U=`$^@qrq70k0!jm=~f zS*UbBcDFWwsJYe~e9Z0DjcvAC-^6Zz{Ub4abgAG^#s z&A-N%8d3>Ad)Z8}A?)9QbTMyEUh*J#rx4CA74F$$kTS@L+!DO1?@Suwr8?I~Jqjxt zbD8F5O=j=EKXm6)Euhzv}wuHJsvm)mLrq^8Vnwc3bD_4J%Y1mpmn?k-Our zbDu@u2$Kv%RepE+O)=55o$xO=<4q~VUwc?=Dnm$`k8cd$_pKja`O1K%t;#=m|VlEVi=-(l2oW2S8GZXMKP>x_#$UbH*P@*j3oDCdZ`;)SMM_S^5|5O1!QKyH@e)6Z=5s1Sdcw(<&-8HB>Mu;oDL>^g2to& zks%MrUXPjQ?G)KydnV_zpS;pNZrp4No5?#4Mk5-(zQTns%-dsT4<6U33Ysc?nEXnE zzh(hel_JYgnLA@ufzynTQsy>zTWErH?i< zT?A^y_HI4j8c<$+mpY>PNu$nWDA@T;<7jvY#8rBa0K|aJ25DM5^5mXCs6Gw5wqyu= zBCah-zPnrbp(cfEI&WqJuo${#l&xbsW@~Xr;f`m#8CyMa_8*dfN`w2XyNyOeO5VAA zO{5p1qyW5~51#;;@zu3LqL|-%{-rI)4o5kX{3Ey`k&DY3cyhX%_)uq-p5HVMrk%^T z97n+nVZ+5(v}q`EVKl=1jEyvSe&>HzCSRIpv(k%xO}O&^>m#9L^YYZFB#N24hxnZL zIW&az-M`sPv+0m;9amO!ZN6*xyzr#j(FfCa@UJVh9_g;H03!lhGewCMv3E0h&zYi2 z+NMi$zUDK6-w`v;S%*o8f5X+ht>MXBZ`2rmlVU1(A8Z0n zRaf3eb~0~~H2BP<7+CBwYg-8QM$XCe#x{7ud*N=XoNxD6&VH5|OFs;nYY8uauR3Ah z1iI36tq-RKiQ;54IbZrbx}~?Mr+I0)dE}{{7h=9;78ELqWm`Z6H?*p^`x|vQcu%jV z&m7I3UOL)-^6!hvUT>y?45@!Gk5nU{$8!DtR{MyN*W7!JS7%j@IA}KTxHiV+Ujv3I zjrHom?Y>RrqoK{omYp^6;zB99fUBHubt{~g9`B_1{tQH$nocaOczI7+Zs8W7J7t5c z56~mwwkugn`K>{-3+@G*Y*oa2O81M;-pcY0gtF}n@+xoUag&hjg4A+@WWQd6l1lD=6A<9~-7Yr}b~&OZ zOebFVa((q1W0PQzNK(qhEB^OkasPq9`e1ohvRX^v^8jg68?8Iki}fM#kmi4*LcT4Trj$0$&I8b!4)HXWHH za09(pmgcp+&^c5n7cs6WK>|g03R0ZfU2cA#6q(s|$~mQT7ltZtsfRD1hudedb2hcPgERQCsBZE9XWXK#e;+0)|yg` ztgYUuaqMT)u}AiQll6CK3>fXC(W-lSl{)Ol zq9?CWmRXuf?y4WlHb##iYDSK`w#UIIIjtvN!RW4tc_hiKi~U^V;_IapLV~mse|aBl z4>um8+M4n!~k*cC1FQ;=t_b_k1fZPIZO9!zs?JBhH7PG03__6RQEZ=X1Hu$&D` z1Sⅇ?|y%=^rlPaKo*RWiC_La`pdY);_#=-JG6!fx1)~B99Y9;?#q^b7syt$fcR3 z*-7dy74XfzP=}J>V2;x9cyvvGS;T~)zo4;Cqh$jpBD)!rV;170siwGgDcrq@^{akV zY#?QlN#)4tDfb?3GmtOt7gav&mod$zE2b2pINKJk>Chc=OG&Ks(`yUJ+WJ~tvI;>~ zeT(p_(mcuyDy7o7bF2>)18qiKNouj0= zU}@6L}JTd;_w$To(Pkbha@< zy3F}B(zSO5vYwD>~x|01935KRU#wEe~V0^$6{ZUjYW#whtCe zV$qur$l8Xn|5*l245WKBT{>dO9)%1FYz-;XOkTbZ!$d_AW;ZS;{Am|$yYC)1cw9y1 z0lRQo_&aqCf||h&a1~$XofZUh{#v1+jVZ?D>^{whQ!wVuLA@{5kjYf~Wdqa`H$XND zV+b~$YIpwX9-5V3<)AT^%h}KzR_k~##==rH-0dlWl4ePlmO5>=#Qdv%fuw+Cg#6*{45>v zVCiRpniYkS4DMEJ0^L^VnjarT-ceX#fgkiSlI7OsqCGo#9TkgK8HxWL+0hxtYToT4 zTgB8MWGX0WYGHOj!`ANM=EP6?5qD`fcxeJS_VPBMJk*`UV0dq~KS5Cr?CL18U!kGi zXyh80&M?q7Ec^{Fvn#$f;Lk3?=4*GT!|1N%PhI%8=Tp49&>u&I+&GHdQ*aEDLsJC) z9*-JOi4cLFio8YeMM$6PVo6lry|{ZV8=Ge|@9#L?oAbVfB{=h98&Hw*3pHVOQ-M=~ z^d>;IIr#WJ`j9_rrcNfxXS#y$tMX=x)zzbqXyunRX_>pt%Qm&uxue~i!#rvRWJAp{Wf@;<*G`nachOU- zEH5fI$=*$8DhM5l>}uDoEk})?mwe-b{EQou?FLH8dzczn|D_Tovu4XtcKYZnA7(dw zm>34S?QWS9zL#IDeH@SKD6reiVVtaZy=Zscy?Y@tm~GJa-HN*ZJL32A9~6}}FfQ_c zSB?+J(uHK19@RyDdWEhi7G2VXr@HT|*VA6^;3#>ikXKWh_Z+uuVe!&fy9>7grQsdK z%KWC;w_J;+hC8*%DC}^=XOD()XB42?+8TuWLS6iQ8S-AR+f}Sa>L%b6o!=g)#{Eox z`$KL(8?nzbQ6V{Z{iYe6#q5ZW5y-sXfI~m8QcTIn!gaCO!aSn`W4CdfJgm8+J5SOM z1_UWd_{GM@>Q}YqDy4t*wzQ zhfn$~fA93G5~FgG%L>aNIZ8dfqEqT7?AQ{f@UYVDITH_ChnlgJY@{}2giuK2awazo z0*7}v>8u-kN0X1j(HlWMEu*gHU%diEJa1J56WpZk4H+0WDeI4h2pzzXja*f|*aMqf55jqFo>a}=kwh3rV5{P6wpGx#Q6GW7&zhKYz+s~3&zZEOD$~TMi&82D6Wx`U=J_a* zk-!m-cJy#ooAqfz;J3dh+F_HIH6y!uD}p84HUr|18vFnp+v4aF^c6WfQe6!oMB+AM z5Zap_ns>>t==P_02RmcTG%9Aq?B}`3Yk8uHUPC6cO>zOHMuzqCE@CGgDj0z%?bLjK zEJHDIE{Atc8BAd%G?WG&Ee@3r@}c0cYH0-xtpk(xmY*^|lKsD8vghg-^`tUB)<67z zyq)JioA2MoeLJXCt-ZCickLo*t9DU)OVx}NMG=IwYR}q5QM-1H*u5Wua=OmL9eSeJBLvl`wYvQVdHCA;*)%qr-)t`rytIK%94YZDt9o!iW)=G)t1GhDIzsE;*XW+!@Vw7YPkSoHnUXt~J zGw!1ZE)6%@1P9^12Dl&zy1K&N3o^y7BnuFS%PQ?j@qA4%+kt_=j+7{*9#Y)6VOQ2> z+wz$~5NP^wAn5mkp+FKiW2JR6YL&o}vd^=Y!a?F6nJgl;;?y&X7M8S#Vkcw2S1eoZ z+bw(*hqNkdf^DhhFlS>V`e^*uQ?@LXsAe`x zt7i>#P6f*@9%YG*i6xb$4<9^O+W@D4ugmkrE_0(nYLy->R#=Cn$XxT>*K<<_P=$2O z^{~X=F|)mX3E>P1hbrcq6zVtSg!j#(4dM?p9I86lnuau|cg{DF*N*DxcXtF8a}^d>+};n?gqzV` zDWwJ-N=8=kIoaIO6}WEmB)-=!yMI|KQ*->&N}*)0&yv`;B#~zgqu)-Yg&q%63qKDl z%J_(Q+H?ORrsoP=BK;(ikpGXOf1%cH5C9P|P?Kf`-uG1tPGf&%FN+Z6NO?oqGSJ*e zZ077-3~#D?+4doK!~D;$m3DSdpZbk(zAjL@$U(Wn7S`IPdl+}JJA!fuV2f$@7z@He zj{5DLhTRz`ALqR%5F3ykBG}mrTJEsDY#HOxBl)GZ9U0}`94#I5%@+nj@x=Cbd_Cv* z-S2Ox{|sIy3vnpNFUMn`jxlH_K|7Y15=Zk>`_-}s!mrCJWKH+Oq~~^~D` zk6|sgZyB)Ezh}Lz-1fey2Fj&QTUAG;X2&kf;(U3#o_lP)E-qZa#yRn&oxG3>;{FpE zSzR7*sQg2o(v3HpsLB-f@Nq;FOI;;Vd&Y#MR0Ek>fWIb%RvMf**!2a5WaSZ@O$~;= zklt0;F4+w!6EX3YJC9xwAIj?rqW7rgBj*tA@xJGBm*XveJBUPvJ_oBO$i|DR<_w|) zYwk$IYC5pRb{Vvh#m=4-JOvu*h&l=G9qH#z3U^P06H8z9`EUzhu1UWb95-lKOYd(;OIo+r`-z^C^DU4zv)c z{?B)#TI=g8{fwPHV@g#G3R2kz@2Sn9k(`FKU1O6E)`zbb{PrbYeV8v3NsMRCACoKG z`SbMRgND1L&_4=8)EwYh)M)@J!&Vr7lA@x!SHo1)M5UZ^`KU?akJ-+i5+4CaRdLWQ zSiC3}YKQ3#X!J;sh?{~bts3tUnP9Yrofp|;Wmn0SA-=d}=Jw8PD}qJk4B1#f{T`>r zK&_PSkzNDN?q^ro+-tWqv&!+x&&UqOJQ!<9{%ZFu=aiAr{rIMpCCh0=fNfn(JzY6I zF}9o?)Pm6~t2;rRdQ1`jl5g7$sPnWJ;@KkMj|eRbcvfUJNt?$&zhHOd3>7KCq}hT| z@M5w@ws`0ZTLfO+{{_cml_nC(0crDeTo?C@OX}5oH;QiTw1Fa4?tfo|muXKA^0cp}Q7t2?PwlH#8#3HuD{b?| z%rf=#9?RB>R2mNFTACm0gD{!tf%AO#{@4#2FzJ`6+^-NrI1KWQAD}eH0g|*_#qu&GW&6NoFs}AFo*OSp!C`JKw(5zukGH_;H_P{d4 zDM;UZ#G9%1z09+Cj4Mq45~~`#^&h0LJ0VVh3UjPxF8i~b~E zW<5$C|BWrUV_qxxX6S{dStf(C5ntD^Rapem-r?|pQ;BiGM|(5)P zGugNsPC;aNhwvzzH!vgm4A$Qwo1qmD%y8}LJs)JZ^gxJ;M~GB5A!Qgygml1dS+mP? zY8k^!k4F~hzm3xQ*2KTLN{}8n#71Lq49S@J5|nEyl4qtKe2Klau`Rj|J}mgC961c3LULdwGx0w(DJ759NdZdkGMow;K*=;I$R zUw$=MNGO9mkAU77n)Ya1gszeQFkK`hmOQSdJD*>3kFF_FHV_?B5Si#R^Q;Q7>8yA? zn;a6HMQP8G;Z*j~N!&6Do{H|%?xr%OQEs{I_g&1$cfHX|zUBzJY<2OXlaLa5PzTyY z-Gqf~zWN*o>d-C}=)042_YDUxL8A#V8acy=q^sS=ZF=OFY*tiM!X- z(uz!SPAUZ|(pz#(-pU zx3N`Mo3!BUK^X#+t(46qW9q0^k*4FuCuPh|VO38C0o5uhaLW#4Gs%~bf{#fQ=#q)8 zlb5E1{>_CYEt$Bsqo;czSy>CC3<1GG*PEZSrD<8XfsZR9ANWK*V2ZfkB^p1nA^)YB zAXkw)$&%PVW!l zT=%h^1Xgg$Egp!)wIW=(ICnL>lh=%LbtL6eZk{^)%+h$$`&NhQ)mqQPgZnbch>Ngl z;^8GV!?{HGv_|7rKZ*+=4I+oLOMVpyV&o5Rk>q+)JzLHW+Hs-tUT*IOWp{$k>>NB! zzU)LuiW!8-8KLX5xDrBl^J1byTa!^QR-e!&k+-PCMnH7WBQz$tkNGwVc{Xyi4To|L z?A~uafX@gQCD$I)d9ylBXFiqRm^8}$d?~Cgd*YWiZ6sN}e0agPYCkDI(PkzzvXv9g zFE!!0S}Ebp$Hd@ng`LsQs}#{&R-e~a2zJQzgOncm>F-}}{yiKW{305{AHzNND{=c4 zXtn*n|MqjqX@rp>h9u6dm;f-}!sTo@*AzK;Ef0}&5@OY-af^h|oRjPl4_#G8jvnQK z86ao=*1MLuburGRTER7wwGMg^xU@;`eLDS>y3wxm&O3?Ei?}cRf296`PQLy}@eW1v z8pXJKDL-+CSZC5)g zu?H0~W!egBmSSa|W`4CsADt{eeqP9}71z^NkT#m}$vV-vgYslZKryXf#Z(X>LggAUoX-8ecBbKX+P^4&@i*_ocn!F*AmZe zzbNk#u0`@5A3Cfe`8bmNo$+Dez>7u+9CxwZ1u-RHSn?mkcppm0)NpHHh-=wVZg9pU zfqxWT)|#xD>7pMIHjXMJYC_%+))jS9KT!W4*i)T%s_tloW+$XRx;c1dK<1*r$-Bc9 zJ!d*zwy^N6|GDH-C^e;)VXxKd3G$qWY(QeEvRe{L!1*xm^4=w^01iufTd*ArKQ^PC z1Xo+V5Z7%>F+$GDEBgp{6xyUb)8)Arfpt);Et5eGld8vwa%@p}V}`rwt7>%)No9qm zL;6TDScqIEO=>l;%HA23ihMn9tQHg*_LMQy-XJJavAy?Qm}r=(`0#wkW%mB^Sbz-6 zovP`~8^cIli!KPdmVTDKZOnXq{Q#>DOaLQZag-42hvhpu3U+Yel$YbJreQ5Q!FRI| zw=buEPx>f*80`1*p`WP9`ew2>C^S2*6#4mg3RZ0Vq=xh@4ZI8d8ZBHbrXTw^VUJ87 zuv%+3R2#O&cO9z8>IYF5aRBR(l04G3vCHXx4GBTW#36YrSI$u7+B)~M`V%RV$r>sK zx<(%~Jb^oh0)mMM$pZJG`9j<-&l(NXZ&Sj?*OsdT1otX*r}x(y^9)H*xZ^KrmS1~aTuIP{==>h*uYCA()SgT|Dw9;~5{v0g=2YjdcB zoF1k*jLj15@<9#RoiO3WkSDPM>F#Qu?@PwpgK1YAcRolo0U(Kyd!vNuK{sap1amPb z*^ewV-}6>aZEyS>0q3~*D2(bRA%NX`^HV^A z$iBBTk!`5<=B_bp{B+wd)nVHp2NP&9`!iEALN1+jc?6tiSMB%&Z`XVX+IrdML8IfQNUf8OTHqE;7QTU=p#cQyoPwTQG>EfSNz zZ~eMGY&JmQ#@Nl!@yzlTTY<^XWqrYJjLo8ELvHL9M)p&cc5F7gq4PuInZHYGN^?UG zTaRtlq)8Il?`Dh}S~^LBZ1FgBjZ=5p5As981u#c+YWpzaTd~p?jQeFNzTWbPKhLJl zYe0{Y+7-JB6GQYpyQGw=DJyQ7Dhe!>U&3<)`!05t+;$L&e?=9&bmtK z>UG=8mmqMNP-;~kRQZ5&WpC~;jbMN~tuLK_>Sh$B#lsDg9Fy2Sr`~ed&7%Qe@GHl` zHV#a$SbENaD?@1q>!>M8?mzoUMVtPv7i6qHWV!LV@_C+bARx$_prCc3r)my+M{3v8 zowi%4te9(oO(i8%jprz;dAlSKxzMOFm3P8I!Vxg|pkCwaRJ81z5Z!QXm%4-SV$7~*$+C0z}+wMn+vbc zlekV`dHqV+yzopue7-Z6r2K2WgoXX9p}x0F z_i1Ty3T^Bc(o59U_~9RwAO}ytY8=g5%6(8d<8P27EUGMDGJb7i-u_HZpENF|SO z$*AX-%Bv)1pOqEY=lOVOyjCrIvvLd2P%qKEd_<+UD0c+*FHSvwEhT|hz6Vg>7;YIL zs)3}tR8(zV%+vu>f5^lU&}!R}XB|KH*Sxdohy3^iYd??v56|2@Blm=p9D+7Ij+hQR zecZxD9apQLZ|`kqA(r91?@aj%FSO`66PXe0JRvq+anpiz9VHaQ<=kCIdB4}R(x^w8 zTD$od&Y#B1v|doZB%wYgezQzj^y}Bp=MTp8ex;sox2?I|)a|_rdN2Fm{$#!JmeIqp z&T!nHt1YYSELcrpBXzHeJL}HODO{6G;w3{}%omGwX;rc;QjLQqxC}}`ThXh-y|Q|3 zlsBpv1!LL#;+gy#f}T_Sm%o(rllVtfPL5Gepa3Bq5?--mp!Kb0cDm^gG8aSGF{
    !T(WH%wAhCiCafLG{W%KtH)3C@?5GcvVH%1Bh<7nzZ)86 z`o|1%EUkVrJvXN-ggyphIhGT3yuwY>fgSiXR7A&= z3&J0v{CAXt(%deiW*HM`sD{!! z%38CUzRE|+-Tuh*K7iJUp&Wkjb9dW*|FWStVt)3hsFOcm``h!>e-sXFYie?*R=>04 z=~XQn5=`TFet$E5Su;2O*}+}}HvVLCvn$>>*ZGg`$aTVfimO9#vrp`0_qcY4IiBmb zXY+5L_mMDbKM{Nc>x!{Pl_|sd_7{vTlc$Jp=Vv{Pn1PAm;AXDKT5;2kPN>%5%R&b> z=QBJyfXkpnf>k9cX}n52qqQr--9lh^ub(Y-rOKER~5AJ%I3Q7_lP+bL1sDs{iG>i=O$_9tsG<|A z%}XnlE6>r33f<}O#TB7~iY?{kr@uk{<=4??14$1I(XE2BhFlZddMt&`~ zk8`nheQZm;^4B)})2n#d!KV^$UDdj#4(xPLnZ7%m^;*+7SGf5dv|o zB)Y$YD`EksPBSgn=Yz!^&ioo``WkvqoAS)t0%yAWZ%H4N#|Rgp$X%Y06xk zz)SU`&j-zt?gr=@pGdYAr625d&r_$hJjzY$e>Z-Fqk>4$kLXv--o+}JvQdqwVlf>Uhu?Pwyx#~5#@iK4I@LnHg&4EJK`q<$%-L5WTO|!lu?py zH|xPZy&s;2tBQSp)gFd$6}9L!uby!D5xG6Gpjf66C@NknD3F&_x0Fi!=$g>`TnVpITxXD$RNAEL z+TMBo_}3Z0>Yb7>cj!Obep-@$U5%=kCt8%E;KWLN-i#b((+0#{7xmm&Sw zKkQL%j8v-519xRvQhRLAW7fL2A};S;&V}Da5|dl&NyQ6;jsjEi^U@%;7n1inyHSnP zwV-?en{g=6sSSJ}=Hz>Z*0W`9Y`LY%J}6wEJ$W$$Oyuo=?!u8uQW9~&0yo728qxf!$5ix;%_2Jq1J)Zst2dCjB` zKjb5M3CAhYx|z2#4o|+}SQ5I^L?_D6Axsej&|?Y{-M|Y>!xPnzlY0wV#NsnqM459d!t*URTEhr>=YC<+Vo*k9u;;`vcDw5$S)#xo0SfMKX4N^?^1M=|C^`Z zPDzAc+VAd@*4Id=Lv7{h_S(6O&-p`G)*LM?YaSHpd*!ixp7k2^IMyfadEX1w_N=FG zs9&x=5B~{BLpP5!Zo`D}H`^=ibzJMZ`I@wXD^>``dDm~K)0)?Q3z3a!Q03hdjHa)!Yt&!kQBrXf$HO&2Sfwb)q zw}!Cdi8V=a!!K$5)1hyjgDS9J1E+_}VQ&7yEQIw;%ElU1 z>(VxTTzF-dwYFmX#79y9+0mK?RgEpvv2prX5+S?00SiioEskGRX|usO$Bax3NJF@c zn#xq31$eo-ib7ZqU)P7d?B-SMAED1)bJp+jH-YHV(_uWoAMlg%DlX{IdrN5Oh|$Cj*%!Sr2HU3|K{MZWu^houjff6tK1 zf&fnJQXsro8M12aC~6Gz#%pEcS*wGceIdS#)((*A94wygwY4lLpEI+>(-=2~3qkbNR z1Ck@>iYct5aa_d^kLb(ruU^G4;31e3FB3jP6lpNpP}reimt`t;QEe=cH0_MJ<=XO;6epZzPJKvk{4B!)LxCm<}GWO`^XswGW$u}Z275=#Adur zg+c7*y}56U$m5_rFIDk zX=Ho%j5V<2nd0y_a99CKcgpeKZ-2yMS>1wiES|uNB5A4T8BBjol@l89DCgb@6#sM7i|qgbA$5J!wFV zY!LHbT0E#mxh(}Nt75Zw)v?uj%O@4os%l)8>N9+n$$Zx>O%269HuHNiRXUoK89FL@ z{{G0OIQDnjnRtlvt`_U`=O) zfyQH*jbsl39ECUFa?|QuLr#?SzMy>^9;CGfriYsKRO3aw4(=ov#4E3^&;g z@YisDQXF9tmo!m0xIzW@BVJ>AR05+NunmetroftS)Yy)!W}?01 zFK((m-kb))uFu;Gzb~l`OfWWwV`|B^grNP~YYEl+M&qUghQww=6*X~t;QFdAu&d7A zJ_mmgpk~RXreS3u0#8U~n&)d09E65?%yil=J#O?rWA(+e(c>Gy*bgrq1vlDsE&9gU ztgdu-gS^#0x_#OP|3yQpn36dSD^2wrReK^4^OrJ@zb3&yK>z8I?V98&rlW3$MTHnKV8+nA`yj95f|+y`zb`igT%teu~v zuu)NqK+HO1kCzXac?f{#9kc|y-Wh*MruyBNRCZ1IH<*`HqDP3?4i= zzJ4h{@-gh0bxR%_{_B7wf+G~1OC^{3bj_Z5sZMr9FOD{Sz25a(JNb)V>llC!)`4q~ zv{tM48MFumpL%W)G8^7$sk5e-6KTgR`zOu2IA;e_zxuOQ21_2T8wU$a1o+dBPbfl( z*(Zmos*`x^y};-Pr=H#OHkw*GGbHmDM5xqQd^TAC(H(t6|VAd29g;5#jC zaV{=#In@5dBe|MthJ5@|$nxa%9H)l+Ml~PBB@|V}o_!SF+q!O*IW#PrU{LSBzxC!@ zgR=Tf=Fc4;zR|-$7yT`8yg}~vg$6k0Q?8F3=kLbmY6=EUiwFoo((*t@19EGw^I5zD|%C+u-R{G z)h93VSI<|dvBtP0DZ8Nj;!vJ@rgMsE(s^=&UaRrC%X&HNtnUlw5F{ZsG7Ie!Qf(+6 ze1p{44}?*Tag+4cHmGQ_GERdbNo@KOe@1j_3pG?V)_MMeB?~%|JmLHkzI_0i%VGG3$?EJLNbXIvC9F}{6cBWIQ6#H$`by~4^u#{m@zp()q&wc*KUP#K? zys#;45MODM;W@k6X%5x5SW?iwX`D9YZ)y0ovv8^=aq8|1mPffMziHler=c=bgoYyH&D9sday<fEa9ZE!)*jvVaQe zL;bXMF1IdOT|hcoA&J*|d3jk){Tk6H+Rkd)t@-@=w`JDk&@grC=&Z9qpI+kyGcyv7 z=x#`;&5B#yMbSd5*E&^=N!rL-t7k-?$PI$pa{fyNFvrg&h-Gd-asqxPnBRl``g*H! zvW&c#i&xe^3Qyw&=OF~er5MQ_2abmGt&YFN(}H7O8Q@Vou(b1sGx7_EaVm$&M|NJ$ zUz=up47Z}YID4p+!eu*cUK9+$9~F%-`>jl|X;^Krs%O93=%`m4sX`5#!kuobr%;#VR?pby1q4D1d3Q0qcQY>qU@CJAjN>@tTl$hc9NTR7Rz{Y2p#p`2 z1rFa94r}XHn`q=~wSR9JM(f$yg{u0o@rjbSE@_yEZ1{mfh8?W&z^BJefOVeu61}5>@u3US@#?INDuoHJ z5nR8V%}G8*E1Kn`_&I7xq(Q=HP%k#Kr;@p}Ms88nTK`%ue6Fsc!%roqk6zPCDX^uG z86;Dz#WomPADb(BX0;nw|AG3#mpDCaH{ksNL2fBAtmk8t4FSr z-?}gga5k#PC?Pf$112LeVyy&^y=q5DnZEtBaqYoE_g=2*mk$N^s;uz z?DY<<_SZwXt0+;x&tT%Ns>bW_8 zJ<6-5>}c&9^{QZ`Fw%K=Q*KhTAjG}s9xC(jr~4&M&Ke?)j|=c~+$P(s3J}5zae4WE zOGnZ)J6Fvx0hx10^uqdtMI~XY_T(WXcpn;V_}Ie{%kNP%`OWt{il}<>9ZYMtjVa)o zxdOSptwBgzfp+v1etuL2-mYIgytOM`HgNKJU#jLejs&TT{ z+~jAW6JlU7s=3Ih5`;X`W?tPye=I36NoX~coaO#mU*q)ZScc`xtZ1KkB+sJ2`p$Re znfS!~nGAe>i_wV&yM_lJ-7mJ4W`-di@sWTZ)weTLnqfVGHqkaV5uW1eX~j3C&547Mv2aq zd_Dh#40BQLY=vW@$BzKW*!^McGCjYMm3K|P8QDsbrv{)=QWORxy1E2C zi6_1F#qq_cuniz$FBOTx1LOI2tFFlMoJz>D#FuG#Nqq$Mw#snXC-tIg2a@B?t(LRw zlN#3C@5OhT^SwJm3#0g00(kg=_=$9M4=rh=_Z6ItnDPc>wpt&1h8dE+v5e?fa`pKP zc@MYLxDDbj+EvQR{Tth5fXgJh#gu3k+d;ETH1Q1qK2@-AOSISOg(7DcTQT9Wn|5PY z*07U8O+)wz>wg7&GH(i)zUrlmt-UuAqxQC@@Af=;~0_&tcCi22H3 zdVWbkCg~Wj20a00R}nR22yvx%lF=hvBT2)ZTBvI}{2s|2{AEVonEAgd>t7+q&6dS0 zX02(W^^g0!g4Bwa>}>~peVv0}CiesZl$7gc7d1M2OXm-ERDiE8%&SM3Y-5MI0ef5nyQ#tVbn5b#eEvmQc{st6L*I%yO5wi$!Sc`JON#_UV>mA5L?Wk z&kYDxZ74bKv$A<(bMv%9b+uhyj*H))NB)6N_G#eXPiSJK#=)OpVZH51ymS+A%@Q-V zh>0p^f{igXW&oYZ;GQt-EP`uzFpoAtbi`Nv8d}I)F7_rqJ(W^j1NGFiY{024*`K;u zaq~*c<2~8q!AZk0NTB6C**J#pQ?OH{ z{fTMhfet5|P=|0rD7ALB|&*9 z0@Is@FS~&u9O+LKY(RR*{HyFphK@wWt3MTXwE9U3*AIS}`!cU_25^_K90*VFwkk8E zpm;C2!@sT29si?9C}atUo+e8dmnx2C{kW*MKqH~^tZEwiQ_aWXLM5M! z#<+O2v6_-m>r94Ts#*cw0&I#w_lL-BKr+@LT>WxJjqUkurtRdBdpH4~58Y|0o)>_oZ?B zX0~XTces>6OC-T+Fw~hpENglAWSw4kaDq25A%$+oPjF42rA);ITU+C-*Y-y>SK{=yau}V1}eo7(Ea?N zrzt}{%yZ2NcFlH(+a4-WQQc%g_b8{?qf;+jXJVzegq_s2QHz$*QWobnPV!#!#T&R5 zVWyw6H3sD_%}4UVx&BS;;U!7;g{z}cIF7X7<0Q?2TLaL_U9918^Y&*5BPnZg-`Dg0 zhB&A-_~*~lA| z`g*~F?Er27j?c7b3FkQpXgrR|v^T%2pY&4uo&~?KmQy}N4C?8VYp6ZlX*9tBWuwgzxdm|0mBJ2UWf)E%{zzNNlbDS=lIkpa1Vcy1sBpsIxWo*LW zNB6%Yq;dCQ#OKETKHi_<3s?p{i=1v9{mht9&= z%Y=$>KRTj@YO++IB*TOH17QaxyVlNGNt*3?74;(DGYoLUmm`(nSKfuI5Gavr#?fcO z@0urLEayT-e_YuL3L=ZeVvn z>{jd+z>*mR!C7QiS&{Liamupv#TW1Jn=3=aprHbpj-JlxI!?8#m&{wqug8H-+L_~v zN1Q7**?o>Q>bz*5fFw$K#T~h7@ZvIdd1!SddyfHoO#f-_!(YV*WVGp=6&{_YgsTJy=K6h|}onwhBihgjnJx!!ocj^^eVUD`S zB?im^@*?;hns$?1tA1ghg!4he%xv?_XI>Uzq!tD_M`Dh}cMU=_+-JOw#=`&~k@3-Z zXf>2%xxBYew{ms3n(89weVAvtR0gkJHuk~mh061I@L+4fd4QFz+yU&-i%V327*Jv+ z(DcpLukPZf#>@S^)2s&1la^e5((j9QkTYRx&=4o?b+zA7bP68i835_htAoW)1A!0+ z&8NA4F0PD;b6w~MU(0Hg36^3qYFKF-o_zI84Gt*1c($x%J;`GpP2()C+rngnvI5af zO)j>SZwU`9v20%-SS@RBZ1$vIbjxd88HRJ=!}vxNFYgd7>jFX@+_jJeV>`g6L5osc zF=MiASr6WDjato;Y2L{Ec?-IUik{N<8mt!FlL;$e-$)x}Nta^pPf=8QL@SQ~z4@>C z7Wq}UFx8%O)}v{~iIG`-~lVb6EL##2(3zd6g#j+b6u*4-am+uP+m4Z6_>1-ElY;0^DyR_11lK#oG zmfgq496mOOm5xTaNVCoF03q_M_Um=ktK-76$P^~y&sx>nwq?Vqh)+;){Dc&(G1K;b zwdb?48WjmyE=wnci^aEyr(}2a%FuIGhn;M7HllQ7-4W0NiGE$kxt+Tbi3}B$|9W)P ziT2j6_pkKS^R!h4pjD=(>E%xiSlJn(P^&q)D|WFlhM4j^AQ=2?QAPl=f&UdClExQ0>v_iB?b zwk?^%i0gJ@ksV)5B?APkYg%?)EYqb-v~;J8`hlpzx6>C(H7n!3%LuDGqvG!DiHe*^ zy6e{F&&tTQnPU3+5Bji@RbCUyHu_`x{J&?0Z;`c$%^@BnpP*XJs_mv-HrtNvv!U;q zVm3QLzx67_s`Xs{-d-BI%*uP(mpc2E<4!p6=JzQhC&VAkz0McLE9Qj-;JKFcCHZvI zPE@P6?-1$BPR?VpHk>?G3&)|A_tHX3V);`aYP)C>v)-P|!Ig-u@t4$(0`NXDR?9NP zp0}mDj^c#uXxtCGflC%ra466<7KGmWhs`Kq5hjOtsl48g|^s5MKnSP zAB#A|Te1%f$3IIpKWFN?6+*{*^MUd;M%cPL&=%e%(-<7sXfK~GHfn;S^`RASdfKm} z?P6(Rm@1K$9iSRW&2#PJ(>{x@6k_QGSNFNlYXWclsP3F4qs6onUCi3P^rgO{71F!v zF-fD>H)6lWQLikJmbA3uSdU!M#;i|<%XIv$9WOyWIYxQal2|`nd%gm@^9(iDrc*w)_(p(H~U7Vcr)~lUf@_=l_-zg55I2@ zhlAJ8oR!a2x_PY%MYbwva|HJZ$quSOf7p28sc=fD1qZV&0iWK!=Z2MT|5 zdhd6cY&t*{q-jT|y1A9i(k zyNXMa%9?Yt;Pv?SOCh$E7ad=|)w6P}{g&Fen18Tn5wlc7iV+%ghqJ|v5sY#N@xOQE zf1TT?ygvO18JkWs^|kdb*_h&7KTV=*jT2cT>Ki5Vu_>e1?WZBig08PS!x_#}1<8+Z}H+yU35-aH!-M@is)SCU}!m=sWy@qA=)JWv> ze-s+OF2N+>!d|PebVUF2VJ)B257H6)CU2f5WKcC8xIUox@2!0xpqX7mU*rO~@15Tx z!>yuT%uOAdcn3?p9DdX9cO#Y(8%HgSM%S({efdnwdFj~?;}|xt_BRUl%Ih#0HlMpd z`L-JF|Ne1NfQnmGwkojyFt`$Ot7F#D%EGZjb)}{53?K`T1b2u0&mY4oO&7INqB#d# zZgOa&a8vIJ+UTf9M=FF+FT2c2POCOCPw0p&k{=Fi;x|>~_XKXI3kErEe|4 zc5$;QagxYHCnj$ZWHj zk$#_JzESIEFYmW&Z|Yvnb8uiEUZ$;bzvCLPxz1gG|8;>-!M$$1P>!)z8&$ZmdO=L-RgeY`z6(SDadTFtO~LHvSdxfisX5mxqrdTfjToKv`k$A^02m&{#{f5|gR7I2 zE|N-Cb{QcBB1FaNAl7_{!eYyrLvpO+&Tnfco%em7$-Kcg7Puddl4x`_|>N#GFj%?qU7#UtyVi*-T0O3u6oS1cye_QaGP?6v$k}6 zG^`=5?9(0cui02gZmG(tGBmw%Xguwu+6D)GaA~)6H>P$hca~7UC+|#iXvj!hH?;Bhw0`X8oc>Z%j^a!aTBad^z#3h1k@y_4_K$ z=L%_Z#8GIvnVxE(qpr5rGw6LSvaCC!vn*`q+bXj~64i2`1O@vrEzM;jFqU8WxpI;? zr_PCrJ3S5$>EfDZ#+dI+v zA$D?0xl>GaM87Lx5bakMZ&s-?Yr$gZSLOTHnceW~N|hzXc-8D=m*CwFw3OD8GRyhs zv{qFw_${X#F;AzC^SW&@hJYt75~1CtHFKOp(bird>cVz!J)=!-%tf+WHrxlM3vxavdP-QFK3d2f6!;h34ls&jaH~9J*p!cd?rOt+ejZ7vv_i{#z-}lk5oLw zzGPs@$`5t*`?F-PG=v5Bq2BQkBH->Rb_A)S64Lm9qYNp(KuWrqNJ)2>sI+vqlEN4r0|qGFNJ~rS7&VY?5KxeoW*Z^Bk(2sd z`(A&<@5XNPc)T~x*XwFg2OQRxd(G%YmV+jjXI#;9VRt zJ8i|cVn%wni{dT%%dkPY70Vefv~tR*;S(DYKpjxN7o~V z|L~?nJRfG!3vAT;*fgS7a76rk7#!sBI(wi;M2pAwkK2Wm;!6x^VS4SK{ogum7IqqB zCA}UoV<{7J?=$7UG>uZM6A>e}0&U0%k_V7p^wqPaui>(@Mpf10R%wZ8@tK+)>)Xws zPMgbMC1AK4P3ua{G4PhOu~=is!Ddfpai+(2PS@r|YL!Rt0} zyz51Ck07%b5sB$-g*hHw8-|6lpT{Qoeh(pc4QXuZc#RWX?f8rc_WUI+T&<;Y zJo!NaP?9uR)Xy9cN+pm?%RQZ6!(H1=)qo?OK0K0MAO0HlS~JS{fp@4I-V^Vj(?9_} z1Ff&+9?jNE9oE`z_8m#=zzDL9^VqI-4#P*EcDS7k29=((({wWLL*OgyPwd+>ONq&T z6N(a~TAj!cZI>1KwPijIaFosD=Gvbu+d2x=@y_$tRy}H6)~Izo0?9oUE`2eyLTx;c)16;(WYA5L(krg@9|-wuzhk5GzHBLn`x%5ZgB;^TB1tqt?acp_?(70du1VPlOA*f=uz>3q=7gf^REu*Tay#a*p zIL+}QgkoBvG(HQuBt}0D6xE6(cDPn0k61=ozW_<3;nQWnPEb}!X8J< zb&X6pKR2c0Qof9VtzA_!d1JYaR-t zynX6h@X)!l9SbVaM#iKM8Gz+<+PdM3b&pKL?R`Akh(MmBWAQs0W$WIFN?)gzcdc7G zu#G4tag4-bER4yba2pO)dzJU9w{X5?428RJC4Grsd)_0O*5hhfm$0L1v<gn`w$Xa9^9VDgFnx_0`shOZ%DA#FALH;a_L*2yig=TXgj7=0I z4Zyv?!=(<1F_voB2xRZGrQ6rt7-+^9Ygb&(pA+p^--rZh)bTsE2m3N|EK8LCnqOSH z%~O9w(X~iU4SKn1(aj%fm;kdRx&YUt4sJI1%GBrxcm17?G^3&U)gQ7ul}qtlR8SdrHB}A1_z^rhGGFoJ}iY0|F^USI^w6*^8)h+p47RUy@<$rVd++93?O>mV*SbLI)0BS+h>Tlv-t{h4Xp9E z1Dk7Uz6RxEp0lnfFCNkD}$N(7DDr$NdaE{Qhh>lo5k` zLsnAj#ZvwYnyBNRDPUnNI@&2~C6I6Ls+!3QmXKKw>mHshr5Vr2^{KC()eYIIZw=_~ z5DDBNCsH-8<=2d~&|T6iaN*|4M*lsVbG_=+-18`3zGlBfl=XN+T$g=WME%6=+`RwYCE;2SoGGWKe7 zOyVSVojZNdma1IKl8xqK=FMbAvPJ=H=ng&@5qa2)aU7Vft z3Zy>av~H;BP%f?%78biM-y|#9R$=C1kq)+0`93XSc@s?Pp+5iH%4V#_hJ!Ot%a>}U zpY*4$_Zi3d9;+PspTPh)sz2~j(8ny4<^ES?vXM38xy7J{?4GLFrSXi8rhLyaap!E@8qR>LN0Hoeg#f94`Qo}0Uu4Py)D zNyym(uNjAZToW4&Rl57u0*JbQhM9`;?Pd#o3XU086r6_jkpH!%koYBa&#QhYuHh~L z3b>=4P{U+UV53K7)tp4vY_TSR_K8DhV}Kc3a@^2UA_4Oa%jzcj0hn&puu*kjd!3${ zE(VHWK_}@d@b6)qg2x~z0-mRr}x%WqIFFHz}R9+F+I&x?DjfL`tGf&dcNE$FsX3P?)nHij}R539aI(;o#ZP4YkyuIyPmJV42{`=I3%YKsFv^m4gw_W^YN+sv|c#9q9FJx+RE$VnOw=WTwxDr?E3T z0|8FFCv0~Qv0j@6Z&cA05ye)^!0daTh!MtFY`pE${ZmUDT?+Kk+_m;xM@z)jvV(B> zX19v<$%8aeChx_?09&+f)jhy!ZT(gR^DQ?-cSKPPQ+~IRe0XxJR>$HzvQS8nVust( z2>5AB26`OBZh5L*>8LjD8acu!)?YW4`ClSJ5)e~|2?3z8RSPU^Bx}3KsK}^^mGyUV zTQWiWOug@z2~xooWu_HPEbl>?BKYX^(`kU1M5ykNG%x)LrO)xp0ZsTjRwZ6&g$>$^PBy>sD=(GL_N9cYu^(jzWM*q{ zoK&%^$@^4cxqXd(ZY!CJPXDFKjru?lM?q#WjqG%`=>547WNHe41KHc)eP3V>-m}Mcyxzt>^(En6%xk=~uGl!O5BC)$- zJxI)rQdqwv!J!xudoN`MdD}bpZC;``y7%b?pBy>)@?KkQ#jOr@6umnr;0NNLv0kEU z?*2Y|!j*hHxg#S0st9KzndO+i&$^!jklm7QLSK(+VPkNIb1aTR8-NHH4x=4I7PyAc z-m?&>Vf_$yY!XbWvr5f&H&z|_7V~+}DTna)R>-ysTCe}9J=tjytK$rEkCu&=OqMKQ z_)y7JF8#ZJpLb#D2C$p0-$!pab@jt4K3iCr0x+T_m+&82HkCLAK zB73WXwu)LCgSF$5Zpag-v@p35vqLqO zT^X{F^nT<1?WGV1Wj?nlK16HCFrU{rvU)btmANrnBE2KKW4-mJWM?Pjlh6{Tlbhtv zDE&S9q>m*98F;5Zmh3}Hpo;nN{y5FSi|ixKY8@ zj+j9C3m>9?F0zti9UZLGUf%MRTm51@ctSgx9e@mOlx*{6c-vS$4^2!Q7#EdO`U6CQ zT9XjE%cBU7*!o4C>3jbBDMf+!AKE@mEBBPT#1@i`mD0E&(w;jl#E*ET9MEny%GJ#` zT!dD|HMg88FVr8(OK^Yc`cP7qE)Ww7x;5}^E0k~&h99Q{+bv4^XfxKzswiwx$i?0- zvOP**)V-w`yxhqf&k~U8L&w>%huw1h{hX%4gnB3-l9QU++8}N6D4cLIY{pHB2CS<{ z*5^6G6z|=|iccQdul95eY*_ocmDcyb5X$SLmkmz>^QP};<$~Hel|GB$U}d(~V@Xp7 z=yfHElp#AWgCQk*lQP#C7{g4hrf4P4uzn^_uyj@D%d*n)l!~y;G(~po8?+%p_ekN! z2z;eA11D#NaLxKokP}+$lM_#VIiRI#;VD-Wn#}IVsuMWm_#Vli0?TD*`wW{*N$iC$ z9+6@Okxu29H$%AI9n}J;)p}kM*P!yEgaV%y`l8M-FiTQayC8E;Sedk>&XvhtgYV&~ zSeC@aWe!eX{CL-$wY)ztv(evZw*K$Q>ADg?*1|@jlkU@$d&hh8L_sZ8hs3Xcjt$^# z1h*7?m-}{~adR>zF40{8<=@8|;U2GB4@RY1FDZs>-qXc>kBIlN5&7Zc7V5*Vz|6hq z`n#s7>oJK0ufc#`k`9>Dq^7|9`v{%4=C6v4q};90my18VZJ7H!TRpNin?^05eo@77 z<@}+NaA$qHMzSKljOqbgdPmbhU!(O>s}qZx0gqK;hHdB@u}n7*9I?Dd=2oDmHGUGn zG~ojDLBYu0h!`d4rx`7A9#{%GxInjC=G3w&0V2kO9uN=QkJN0hP!63rI;xB1zDo9; zO6n!qNjO?md@P%UcZej{lu-8yz%+s9%aS&FEo9cbpJKbe~5lc+nD*O8$6`%G%O7vlyvCjxj3)7|gBGN&Xr$BTOx%5UWfu({*r4r@6Mq!&N8*o6}Juif*7l-7wSuvbZ z6u!m3k&Frc08{pIf!bn4%q;%~1bEuKunxS|;{CfQ@Z!?~O8bjgj&MD<23(?%0Q>+(vK!Nbx?d%JEa=!h%a#$rCI`n6kQn)y%i_{k0MXPdjQw~ zR1d6_D-T0%h^AHrDd`8xEhV+3*H~Ft*jibx4rDFPtgLcP1h+fH^N&)ic2At7WFTnT z?LuTf|5Z?8UPS9MJDD+W#EZF23HIwxd_;*DKuw9Fq0Fk3^fk%Y>h}jPUt=}ltNVIZ zUDJ_s*8g;m?w?F}{Zk`x4D|nySo_s@P|xTu(u>*#K;4j#iKs?aw@+eoji8z>rQ8gf z@?#vCU16xv%$Y)sTYMGR|%D55d8%DlX{zET-dr3m$E8Ao1 zRQ-O{=UDO~YBaPhMaenk=^BIsP3?jKV>>p6L{|S=NUW`=0-_*nWX+Y!E31QcsW$BD z6RvMJM_T{ZQr6?aN))9ba(T$bffPoFQgd&LMmL5m@7c@+&j+zLF10Q}QCZDpQ$9~K z0zps8D=k85#2o?!a*a$(o~Ps;_R!yc#KKU3C;LiFz5qfj)1WOWgb$@n_8ZJJyxiJc z4{o!>R77|nfZguvcjpCUxKOO`NB(;!MxxUfsiVkZVakD=Y9k1FpZeYgl>D>*# zn>71sl(y?tojqHb-Qk;Ov#dYTuH=18yHmu^=-^D#>}sA+`KdHEZOCBaLv(?(MFy|I zPnLK6CUxn)#qxj`-US)wiPROIw)nWS+jgX=rEQoz;(x+1{T?eL)(^dbNbQ{Nd2asE z-$JD_MM6Moq%9~Q?mfEn&l^(cNu+p)`}OtoG0KqTB-YTVD{(wMhiUUaIU5mEWv;+G2K9rYD5S|ZaDjh3`UU1wg5V>J`{AfSw9#c zuZUYd&@6O<7wLKNx5C&N)B=2NxWRG*T2*V{H|Ch-`4@M4F$%p_8m*`zxvqhlS4q+;ZmZvwv z$STRxe{%hd!^bg|B9c;dZT{%$k3-W9Nm|T26ipdlSfH64i6Dhn_c%!nmt4SdkPn9? z^-`zA9)AjDGHnD!8K?&8y@Hf6q89?G-Jv(0#hIH;7 z^RUhMUMiZ`DT(*A4>ThQ2Cl1&i3dIzn!h`u$NTi;3Eq*d%x47i@TMnvct^%jvpLdP zX#JPwQ&$1Qf@(ga=ozn$4u6n&Z$s_S9}Sbd;_My$LuRx{g3xw4Fu}0(=1&0y+gV0qcUq!>Dy&8#%WqueVYv=Y&+{j6r$gItLY%SlU74?X zgs0ag@V7EYe*K!4GR{0r-@luCSlNGJ0uvoa2&DUYQEKu)k77bw*AKMa9R=BwV0Q&M z8dAZy2)~EcNvz4u^bG)ainQIOBe5YjvV$0Wv-waWaGg}5ydikn+RSX95!#&vPkA=T zilccmY_=wkx!;e;{`yQ+IvOQ!S|2)}+Z!owjhKo|f!&H>{UlR^fk-(R`LfG2kdecL z+aN(T)uUzXTq{X{7Nj|T4^+_i;?VKA*&%viT=b{*p6FyVEPR8oPLbijMg+4PzkWHr zg>kCr;a%|6Qn0(nUGA^bEcdeLfHbXNuhxB*hxw*_*;4JkfB#wn54JsGxxvK^PojEQ zu)&)Oun7Bveyv*SbR_7$7^&Mh3~_tsf2p_8U!7C@AKvREMk(-+zECQw{;DaLZ5Bq6 zis62^-~-z4TRDlMAmt@Bs(2lno64zzV16Ooi}6sPvy+!H}JHy+qRL~(SD;S@rw+(03D-Uusg z+l@&9Vr2evyuGKp5Xaj&3Au*f)<5^Se?9!cY5KFg4IjOGD;I!V?U1ajT)P#$%P6v( zUp}_%rRuK$_l*BLKCb8Zp0+Q?#P?VHYx17Mn@1*m?)qD*aapEQdtrx_IAC1wz{E`> zNt38`WopL7Br1w|L}B^12Y3Nb(eKav%bXE?{taq#g6Ba=mE+^=;V zN5;l>R;|@U2Fd}rQej!R^Gle&a3ZHFZ>7Mj#`pxX`#khv3W>_F?!z}Q@pi}d>BWnz9oy4o7sBRPu~Mq8TF?A&Z^_W5anG8c*$9BzbvA{e&b+cS(Q z$U3Bt+Vq51=auq!nm?@{r1fNCqE;tDv4~3yG)%mH&-DiwQSQ(eB%#_#*XS z>NR=w&o+>)bN6|7X3vShg@XF<3a}N*u~nE0S~-S~?L;$ub!cm6D$Zo&Ddn7#{k}Zb zuGtYzzHVYbAXB?gmHOt)HFCxn=t|@}{);Hts@_(Y zex9F3@F+#seJ zX6f!fylwlv?Mi{xOW&LBkbEWFPQ(;Pk*ZTxq1JowfAx8np7G&Gw?h4ZQ9RMJs{Csq zo}Q@2HJOWo;a=$+(9eB$_vC-v`r3j2^)s=511i#BIHPOJK4t}lmOInMz=Nl_c7}gA z#0L{=b-K(oJ<$L;=kidoS|vlL>;)m6w9eoK{J|`3|cn!m3K}7`JbmMxd{7bxh>GQU1KT zreQ`UQ&~oyf$OA{hU7e~95=DD92*u_Lr(_og&arM6sZ?+>Et)Fi@on0f>C%oze=%X z)goA>;nR!0|LxLER7Z92m+J}aOgYFtox`d&P~@LxfM1nbgt}J5&$x(-f&As3qA$Lf zW#l9yJ`>BadP<8Qge9^*ZvSLeQSO^s&_{HhWU+3Wv6)VNssDrScLv_Y6Zrk_VaaR( z0m&Bb0MO#davNexZJsAAbS*y<>UcNb-TMQ3y{n7~{E&hVo=>sO9?XrFnR@iKPvPHR zx$_t8Yia{M(%Fi(gC{InU3hrExtE14s{>RBxYN|7mo@t6Z(fJtBvP{XkyD(PP2){k z6lPrlNR2I0Vvx68f>t06J!<01Hx0F4Owv`*Pz8uYmj(x8VfE9IdvmP~QfzepQlH6c z>bgrqX9fL(7d)@~GbD{ag)K{G&3IP&!As@3X?t0&19~FNG+jbEgJ43(m$nO8x4Vn? zbP&Bc1AP#>ca)Mr6i?Q#%rd}tEM4y%$yS;!!`20is`oBeQBvDaV7P5SiC!xIjr!?C zvAY}XQ^GtOgLr&M4UOJI&j<4Ny*8o0ZHe7pGx+5#nq*01JP>z5+nELPG)vEC9UPK~ zpQM>Ql>S2JZ)~8d@*m!j5<0mbWjZgf>^*~@f?IAr0e2dx^y5>)lM`fzbiiar`BcA+ zyQb(I3S>=8Og#&3vxj@u+|U2b3>t1^8O$sOU7nt{7U)i}P+huV7lFJ}LIYvcLq=() zM>b5vg`YB5pHDo)>mPX%h)MB1pwAizal@24&{EdLg$^5)(neJTUb>l7`5{iShyoK;SrN@SErQAF? z2$Yd#5x-xXs^qG60{>{a%NK-ttWALgE_RtHgIO(3$BO^i5N994OKB(+f;U+??MTGRbEklm(kkH>70=B_Cj1Xycri z`Y29x5v(LY)1F#~jwr87hK3LnJ_y<{;!qX^CL+xI!6hCSrqe$+d_K zC-?(Xm~g0P8w~V5l0RmM?edqPr9u#DFgH?cb(pNu1F(|lpZ<@B;9OVeh#Q^E7L9p) ztSgf;xc=Ph5AN&84csE@_SrM$ysPRV9T2^LKIau4s!M`Rog}Ezewlw`FQ3e}lEUak z!mSCF&G?vXanjsMhhd zmYuJekL1zO%Wf`b7^~4sETtoy-PZT_YQzfEhxNa_uziLDF~p>B-hFLh;nw>tZ&(9v zwxL}pBC1Fqp}WqEn*Yu?j0E?{*nE^=ioNg(cwr--?f-Y9)0@+_uHr6RQJ&Z8t_UF& zTM=9m6*Za&A?6pZ`$)kCk3Sg|V99@4x*fj69%YtB<;8Iyr*xE#7JRV+_n>2mtR5XK zVr}&dswF48-78EitKKJ~(eYTZ-=xNq+g}%v?)#_62zl)-wqJ{AQiEVdAzoI}JsguF z)5Xlz=61AaT7ic%4Z!8)Fvs>p zPmzLOK>NRdy3h$gi((GRb<$`*j6%!VozZ0^uO3Wg)}^lJ;UA+l(`6Z0vmuRl2%oKk z2|2oPNY025Tb+E~(p7w3%VBAu?vVVkJRDs9sY`5Sbwww2)zWHZGMX=zJ6UEkla;4b zO-=uLsHkVRsHlyc>UDS>h^I;?Cwo5Xrq)RIzti&AC$=?BYV*TuJO0O1tn(7gPV6{7!syQNdezDwH&Mu`djFhwWPz zwe}by7KRt8cFdUUOK-Q++W7r6{5P;J`g3@B?L(kGt8voOtEZFXAudKyJmVQM`<%z4 zrU9W7rWIrElPWsQ7-J3;?F>k~pfI(iZswwSU$+8li3<7EMP~qcgw1y4R{3ISeSj0T z43N)X4NN`5eqT4jwZ#g&NRN5ipW*9?RYN^9WQR~;uJd8XDY1&=bbWpQ{2|64(Xs`T zmDPAx*O1VeFjDh)6`z`kXufve;331&M-1$V?@{5Nezmm${U+oT?9gf~ZfWcu;LZmFaJCE9?!fH3yFHBWW4ER*w7x2T}-l@f% z7Ie(;XksI-Ev!5=RCO_wGO*6bp9iB*$}l=k^2ujXnnwSY1{35PhHX}qOThaN54sro z>>hop6tI13@WmHD=FbCpXK2VrMQN4Uu)yC>3BmIc%v~Y9xhCm zCl%eGN<$=zE~0Xjcx?}awjUMVdN05J0{c2vg9DGmmfA6$12X#Z$rBlQ)6@+J-d%}M z{REDjmxT$cwtJL@twj)~R1YE)xw`T%e+J&8nHSfu0Il2uD_U_Ma#x0a#BMVl?xjlf z;8W~`w}IHz5*vqt!*RzgQ0|_|XY+UajZz+xGF(Y`jg%v#NajC06Y@gGjf+H~QmSDW z=1>=0^fD9HS*$Q?3cn6bSwIeK`nlIx;3V?|x+dEIO97k8fl^%e-3z*Lz~ftonpeu~ z;9dk?LVDVk&`@PwrN>J&-ZHt3l<8d>&he*U;2#)Dw136wPzB>$Obn%aY&JHO_OM5) zP}LFN`?(64I;))@pbT^ayrt7m52*K=3v5S#ITZ~?o-aFUkhtrWuy!9vI@~-lO(*8EXYn^<08=#Zk-GGX=?+t$# zxVr1Cv)XD3J1cvV*W@n_!XCh}`j~DzT_uD~iBALlR08CgIhpWEEC#=rJzP?RrM-Sa z2MfZuE=#Z8ig&4v{S-i^5Juy3b94YHxukzQXi|F*Tsu;7>5XX{rX{?n;Qai!j@@|F z;~#ixiyUDc(l(;-@c6CB-gVoT=@U9GJ`u)tjzBJ@*1Yg-Pedda^E3HhOZw@N()p!5w7mgA{ zz~X93w#T%{b`^~swjIO#kARM~GL6QkRxA>xG)cv;i$qftEHH^ysw+>xc7a)U@ZqdtCElKg0b31?n~1h#Q$EV=b38U%NY{xb+wnmwMY% zG|Ao3p*t^sViho@8bw0@(t7v_#m9y0qW4|hvhvI7ZQn)2#~C-wfW$e*8SfRks04$) zJdjwj6+m`zO4(9npsJ=5G!3gGs_841H6$03y6Hk7lNK^Xq;|Ehqe!M6TQuwFM~Zl6 zl$E4|R7DrHZ3=_(AMXxKC0<7+I-&tlw9o&TW{-9jdDM;+(tZhgPsEgr`i9dyp4y@) zxN)U}!d55&)Io#hSp*zHhLRaE^(WvEd5(WUek)i+8j;cne1wv|QK%2;-Tq5e_-Cq{ z7vg|E@8zuc%gzb6%HIxJQ#F_i0W%V7Tm*&m3-*B6 z`WE7e3v)^r!niW@alt8#RhMJjdpcH9WQes}fRlE?vT?6z*ok~za%*YPEWO)@axubUX^ z>e(U0W>tq-iZg>MnPH}kkyTBpZD+nw%Z_E+zW}r?0`+%;R-O-OOK?AFQF%ClNFjvC z&*9bv4+l-!(Z(GR<;CsfG4WcE;7Y&E3k)STdQhb^Jj6nY9#~tkzPb%UelF|kRPUMS zm`|Ggf#5%3fBZB@s5{TKg!gpv=PMggvrnShAHcOk-V&>c*2eVAbe`P-4xjp*@vZ>2 z?k`4dKHhfb1%FRNu9X%tJW3VgZy{V|RjoUgS=FH#aO)#TxOSbpLaaB!|1Kdzl(4&Xj>897lEO|J#$|#+g&YIh2TvU<@3A&W}8GfG~8} z(cm{raIj7bMl~+b3uZCYdetUtbRG1^n*P<>c9r(__>UYpG&W|E8qDry9FwIIbKFOR zn=XV)-}cMWUOhR{nUuq2gKgcCyRLC|1M?wgj&IOF%Pe6R0RiWQ`?i^@C4fcMriE!1 zRDijxQxaNUpDsV5v;;)SmHunBC1rQRqZMMoX6X$wA3I?kDfGzj1|*ebM)1V`;6@`0 zzs2m~C5{?@gn+l3m#Jbl;yn^Eq(dv;lt`hEd(NULcf9EL@IT?5Yk92LD!21e^)Dy# zTJeavW|52+YRRd;eQ5k#tCgkr%CYOG8-oH__Kk&0ZhoO2dZ=|fQyzNVMdsk|y!uJa zRh_qli-EyIIH~l*q}b5T#WxhEc)8>8h=_|hh|{SJel@+{vBwDJbrxJ|GGV*%9~ZqvKdcC#A{f%8kYn|J7=a$ZpRE$bpYta5^@NCHVa#8{$gw1< z3=IbuVw-@0(>i-4l4lRs%pn6*-<<1H!#*;&lXxv*tx2X{JZ!V*wB#CL_x(JpmFNH4 zoBDGn{SS$Sm0QDk?f?KfW$%Fgsr{D&smDd^f={`UH9_tVIF13rqnbH(VsB^CfF6yc zz9tLH=iM#6IeE#}A%RRwH)p*|XQqp_t9l%jPI zfY@O$Y*qmaIQyM%s(>O+VTQE;eGy<|?(c6tt|S zg}QhUdsKt9!Thw#(bW|juFZQu*?p;N2%}0*ag}+{8AKbSl)sMyIT3qt(VAd5Pk+2$ zOA#KD7hkdBqF3wMLRS%(59ZL?(EmxT7p~Y1~`H$N=C9U zt7+an>+evs_DY0jfIVP$1NtE2)o8L7em{!e>vz!kUs;THl!dT{RTf8@?kn}@!Pg|d zD4D7^PPC)1EO81s$8I}2H_ScrX#EmiR{&db@$I&WTk+ub8DBcLwEPEmkvs6cGd|Sz z;;(jp4DZ~q86SIGkoYdOdu=X4c%VuB_1ijSQO#X9eZC*cd@aAj2yfkUCH>GbgJx~a zqb#FCFiNqSttcw`P}&ZHm1w`X^0y(=bxk#Kc{)tRAc>?+qMhX_nxV&YikxOk%6N&} zsq3Pu3xvBs{9i#-5Y2YlmC_l|^6nT1M{Z>5N=}1+ai$w*rkz0I*p_&FSt{|f2WKK_ zqpF_QP1)?pT{Qx2Aw^Q!b!jUhQ*Ve#I8}H|v~pT9S4){JB)2u7mj7^4{EwA>TjpGX z(dbaRxMY8FtXa=XiU%#A)eUr=)bU!UG~RoX_vx*rx6;@RACfr56!b6V7d6zFwz%y_ zhl6y^*bs(;RgzXw|GVjZ{|#zC^fd0yj17JprJnawl9jEe%dao7ztJ5cRatwY=uyy) zIt?GOKTGHsWxzJq@izwcu*^iYx~ohK!>lztYnbjx`icKisPJh4e)%`8S|$Yidk%!( zZF^Pk{IU)pPfb*8mjfurm^5XdsKzNJpQXX3~IRdgo4Ah%NYIMCCy-UoV>6?=O zQp%E|c|E2mx&GSm#v}U3h!07QD{Eb)OA+`v5c1;p8?Ln+^`CobeHu|De**r)YoRTs zZoG>aFi9Vh3WNs2rhvT9{@l%Z{tc++o|x-ue2@9ASzQ;p$s>{Cf_ z7>Ien7nyxeIrX59Z#ylisj`pT&|nXv<|NrH?h_<7H0Q z{E5k;b0rN+Y4)+8fFp6u*8-kZoPPG z5G~}-blE<98udPCt$D!mWJY=4GF;XPD}>Q88449dGgH)jKErAaN$HH<^uZDi2R=uf z7U0yb_5*^^fRQi+bG-O?(p24hTBqf2RFx??$q!)|5!`zYh&<^uJpzGM4Fq5$+&&Q~ zossvm$oxPZXoLYdE^2}MN5mW2%a(WR1*5w7zN;>OvnEYi3kr(fglBI$5B(!Ng?Ma= zOEYzyJitc3@4MTSynXelYV5BTCUxr3818EL2ARvD0Z6`mn1+9|=n-@OB1`fI`;{kb zNIh5SYq-?A|L|V2*ApJ8jjZ%D|3R%oM3siz<-K8CZPKZUp4or*M? z?Nfg{puaaZ7MHY^L+f)Ce1j+~zA}CubgSvsdicc~50At-cO?P^LcNXN9b8ELseDFB zYNHjKvCB(qF5c<<-jFHbb&*KlqYsI#y$o<3ZfRT+Ed!)G zEmtx{QC^9BkN$Fm!dFS&+gEy=0!L#6iugc2za)=W($Wn(gL{Dc{^M7Rp=L)VZM@sl z<`Buh0@V5@&r9N8;{9KJYOd`4paYn*H_vw~U#cn2+kL~W_fo^U5|t#B7AnF>dT|RT zF6rZL)16SeTjIHxTOOroDMPNlb-ISEx5gY%2|okvjr+!Um`YGC%p#kNml}vyWvc1| z`HJ{7Bs%mC?@z%8W2|rlpqU3`co~efb2?oro)&Z~2gO{44;s#$k9zffnXQw{nI&Aw zDZN`sypg~1E+H(GnU8$0j`<|47bOV&4yjY!#Jef;O1GJ`rbe5Y{IdYNDdgH*W)yFS z9L)wZOOGklnd*Z=ugmAxU_UPp78XytTX=QWEo#KXqa}#gdmbhBzgq8mZ2eQ!>=T~C z6KQ%eVg5~)PxzCEJlyh)0G;kv%)yS>!I2<91Vo`0TRF5GDQgl_Vy+!hy|LD4c69WC zc^ska6i8pA#_T$y!Or2zkpJ|b={*xZLSP{i8KSv!Gt5eZ)6M;Nhp$ZT`O)zExZrBA z-RP4Ov)@Pc$w!(q9FFVkACF&94$bt_`*N=iIxJ;LX5jqbq(SE{zYO#D26K7c7m{;( za{1sD32#P*oc@JA=@Q1)ftVFsQ+JbO(>1=UE@st?2_~CZD2~o7(s@aqn~S`t-?Qf@ z<~rOIq2HHzbis^*znA!Rz8tmIwV;iYsmse+bBmTiYaZ@S!Jqv+E*-g$_)d+lM>J9m zJX*+KHpXFg@KHja1QA%D>Lpw;VXG3IQ1L8;BFu?0IK&BQOYYjk6?64>#Xxe#H+b(& zJE%#u0p$~ab`ss&0*kyCaJ6vkjgsfa@VhXU_mp~-W2cPKc`iLZ1Tez1E3$1@7 zsW$XaU5*9RmKooU41W<`kRfx!dAk5h^LNQ~xzf4Gd5Ir2DK%Yn_9yeR`4WN@7+;tl zTQmM~le$cLY)Lc0ukg~yAoJr~c)pB*fp=oDGi}ceR53d1kGhQWdpvIT^xx_EXQTSb z>gUKF=ebZ}+uj64er)hSD8byVHV~aYi2M)FYM%0V`Og}-=07~$bi)~WmNGMztF|^O z^S4}`-Omz$VT$yF8tfo|j(JPxGfn#d=gg-32Xy%(&y{8P8=BY~m@Hn6etHG_IknuW ziG`xiMj5Au0Z~1;V%{jw#ge?pH*or}A{90Qk;kV?XS23ODy9*lH6VMO=i6xOGGk5b zIB($abtR3#n&Q>PcP;+D9rH-E*%-oQ+}Eg~dBmuIU$mBCHa$w$`DRRJ)*#VHaG`#3 zIS^u)gF5}$L;sWCORQ3-DVdAjjQ4Adre}t|w5rRjCY4uyfogq8I?#U4_R|K9-$?># ztr@lyw;4slAf^cN!y!y%6zqbn#%ft9PCQnkmvqfV>M~Zq9VB?j;Q<%u3qPJgN`;%f zfd-ot*rR%x!O7$^_2tO z{Gl$znWP*bqv+9r9!0D>6@>s|`zaOm+sRmZ!Tw48cSiW2Zjc z6O-GVOgwx?=T@Q^s&V13T|Tvj6c&Q|$uATq>+B9U4+eONi&D!av{lKpv?+UcqjnFg zZ&U?}JG7k2K$@qK$fI8FhJCoR#N}Y^;^6W;h|Li~eHjAVK1#b$%(4F29=s zTk`u28-iK5(q~pSY_Z43BJ@`XWlK9Y0dau+q&3FxYc@O@cPs6v-+m~s`)xR&e08P$ ztRJTVofW1a52)30bNsLgRmGcRX#XzGg0y?aqa zvgzU(KUt%i(U^(g%?R|W5zJuIR~`okXtz(Aw769B2?b6#g!%|_jLakF(*}%7BZ>`# zp%A9rY6IW74EtDPI*tz*ozjTKHT^YM+XXH}wZ}?=&VnMRo~?&Oyhbk+gg}8(pIJSc zU2@$F*48IqBrMHV|={J#JNczNt~1+8z@=KlNq10-Yl5t~7|spj0a zDb<_Is%2LV?K7Zb^|d{E%3$8MukcB_b@1nUtxa6_LQl)$C+O1r%G)N8)=_*Ppe1im zBwzTER@Vn@AKdF#%5aDW0&sYN0U|x3x1$w;`)z1t7rrh&gAP5xkpe~((gucz*mD^i z;-Zc2&%7Jn!>dc*HU9ZiV)Oqfd+%^I|2OPkt1T_6_LjD&y;^&=RlBIYrKl09O|77% z_DJp8ReP`4MD3y|F)DWK5t7yj!sofafB%l-cRbG@_n#b&cXD5@_jR4;>+B+W&Z8^9 znvX}$%Idx`xpVs`nzobZPN{!(^co>~+?jn^fvf4pGo3;R6RUcZW=k$M5Amkqj#G#Z zibrhLOV--K_7BY%9W~;rJcl2dc#x}v=aBwo$=%cg$-O!ChSCUl#zK>Ih6hy5m3`;A zrvhD46c@Se(ixw@@L*HJ)GXMfF8jDHHfUICY3Z_SB0gFD6@OYd6WHwnnfGO4Bdds*?d|*?fAqoU0I$t4_*a?<> zS&k{Lg@iwZmccyW)zP`H*)$4~SYkaCY^{C-7)RFd9J}}Dgof!lwYeV*G^H)SBHCX? zcdzDz(u8n8Sy!U3MR%9^aRZU%1uoZY-BZV+ca^$pTmpS}5UrY3hlMkbB1bmH?*EKA z$9#Df*+bb~y3#cC14OQJsjz!-*1ND2WJ%~-4W^yYo0Ooke4fr`t*$lg%eP{I8f#p_ zMxOp&nyBgFS`@u_WhzCkQ2wPBGoRqbpU!_}xF6DE7*Tw*OdLhaOaD3sW{IOHli*p_ zbaiq`%RicJy1RTt0l_ru4vPy#*X5ygAhAIH`W_2jS_2Rp%PQR>zM6xv`BjdU4PeM! zg=`y=gCbiKm(g3$Ozft)!BUlbp&6}e!tAC)I=@tLh@nl$JgC`q`*Uc^F*UkxAh0(2 zaiXD8m@uN!ZlAR*={>RIG3ps#zdXiZQ}c%At&0^R!+IatkBiXWKf+CHmc<>@l0hYn z&697Z)}}V=E#IV<+2uh*Y@ckIe8~Ltv^<5yOR&HDojWN6`3!+VKG{dIG@JKW{uK7X5_{g~qy^B3_esx`gHPGgJ{{U$sA=RpvNyR5l#Ljcl>SWXx@gv%FT{t^cfMYmxYsK93_}c|EsT&IPb3w|DeqL1=P)pc zpj4FQr>*SSZvg2pcK!!5o-ex>KT5dTEbxv+HTCSF`+KmE;ZAqLH&dUakj+w~H6u zDL+OeLSxW*7qS5^w?%d~NyrcMW=Z+YEy-N%E-l$OS^UHa_?g#&d zJ>O=y{W~RFe^$8BXlV!Zg;3TA^qs|Xxne4P&w%YB_lw&K$L}Pu5qx8VO&LQt%Z?0;( zSBpYPo63CPoJ2Fir@|$xahy3=k0)U^#lJ-3N7mH25O-7S%kowU_qIC+Z{1Cfg9T5= zuNsaN#6dAap%6GD)EnJ<#>8q6oIEIB_U*1u(RJJ8S1dQKyah~-vV80l)J#{NM&*+XaJ#!7E5&rzed^J$fGSi@$y}wh; z-vdUyAr=!>=B(+uhERhsoMxFeTgISYr4A}v3(0C&w)>=*WkeXXI6Ajm}#xHZ{p4pOnXWsbWL=YJ6y9fN^^FTRRLYZ_;YUVfz=qL9fgz~Pt>o)ks5|k z21z1-ChB>nppKuKI0bs<5IVxh+3VR_iTPvUXMIwElDR{toprkw66vT3Pl==n#a@N8 zJCd|&ub~^26-^;qMCIQ^!*%LN~y~oUG>m++~*fgT?w8- z(gslRA$JTkyCc(={5@iy&zA~{WimZ&k>h6kGLPP$6Akcg77UVicK3cJ&CrjJCnKNw^Un;e?>peb3;2!7DPMOL zojb7@e1@p$JjqJ=pg+kEwO6pJn;dv!CPbz1zNCWxWont~pu%*Ui_Wx*$e7oB(DF$& zwDIo?WjE^RifsqPiuXON{#Z{`*!Wv4^v`A)b`!29we^5$>$9A`vV%aYF{GIwzAOImne*N>b60d*0UUTBVe!01XPVwM^1^=MF_IQ&ErH%@z z42+@yh4zw~ncHSZYcv`h7iTuJ9xWVFM|^Qr2=CQnTI`Mvbv&Yg$T=1lyBq=Wc8?IE z1U+|)sX2`>`74*+seyHrf^hl1To*D-l&5VGr6TU*KP?QSzI41E?`G(B3)Wsc`ecVw zj=bjF%fCg`=JKD@!o|-94raO+5as~rw|ddutjRFd=LRb)^rB>OzgFL9cVoVX^J)5( zU%!x>R5zI&|Jq-e;%#GxMzeNfv1bFVQ{}e>)hV=6Qv*^9^wsW(#ZNoomciK`Pr#ph z@rjHjTnhadW8SYl!1`LezHhlnrfEXKSSyKOkt17lUdkeK3SSCsj3UxE_9%mVCP;SC zPJR3PdUShdSpdYszNW9r#%hP6#?l|!&&k~}?ZY8*=+mxo650sy81nSTqlf6{3lPVFV=5kcn@%TAu#xql(ITyEnmErPb z;XEZiD(ANI=Be_$6VStwUJCkij$13Qfq?4H=D)mf$#9}Q24tnyhi#kH|FdtL_Q?h- zX&f9JS1TP}YJH7*a-`Sl{4PFyeM1x-y2i0pj29R(n#wjs;NUS5SN8ojGBdAOgX7yp z<5%<{_ThaOz5`vyH|O-5ThnSsU-m-3yL(k{@q`K({%|rF=QG|M;Ik9#1;!)V$)62k z4J(Tm>2!uwt*fbbE(r0>G6HxlU}~bPV+a?>)i!VKB~~0ccN905UHdA(&nNJa4FR+I zkl!|9zhR{KmBB2hPfcAW`-ZKt|Fot=L=RvcF|LX5?+K2529bTQ8o0ZYcgw5&sZYP)ON!k}rqKWNkj=QFmV8K;5KT3#>y9kzqlXS@u%d;W zO0gfD>X#mbd_yo=uV1dD(OWtW)qAm3`Q1XKk)yc78X^}`EN>2=$4kuTUu@fHT27d~ z8lO+w;&(AiQYirC5ruRQ;2M3!_w(&nG)$f21!XEu#MZd2ay_Mno@7h(1U{ z_A069U_OY@w>A+Cvn<*T;hOU0upoDLYRTG^vW5hXRhQ&fI=7gdB~@;XY~697rWoeF zT^RbKnr?7vyqQ%!`bp3gi$m-pMKX8Ru%X17`mht6XRgzYsovK6Z`ma%rA`|1TqAZ^ZIal6_ zsR`8&DILuTme$QXo1@H^)9cbszVE)zw7WV@o?9ATv0sxBsE0y1I_YrU>+lFzNS0ru z`!T&-OSpo{_mOpT$1nznTdl;E4xr>Rx*dbqz(lFvKDnZ= z@l>^u?&JBvKJA^eUN-3dzdR#x!7oCA^a*naR#s$P1Y47A!Cio z5aags-wq(hsOglf1ww-Yjq?gY2@>-scdJCIZIt=;L@82}SXI~^b$;+Cn|^7Fhi6YT z)NrS{RFcN@8@W{96?zrW<}$#iRaneeOWx7?x5H*)$wJEE>#t(NB0RmbekU);R+`Bm zdn*}^NOqO3NcIafw?+?b0-Sp2X#rscpMQz~?%?2fFzv>y11hr2p#vF9nFm|`#-+8sxvq7UYYRBEy7otvX#=D~qzOKP;!7ex5^aD;un7(FP=awUp!vBmuXiA4T5xUQu*`XCYq|l2GRyt}6yid}H1p zhpuRis?I>pcozz`YSm6IPbY&^xC|n1?b@(= ziP0O1l9!4@&3}lHpIi7j>*X>(a#Db1w)1BtzLoil;SCZ|M zub(1%K%u_Km80U(WZ1#O?} z5-}3#Vmp(_p*JHI(l@?*S*#=(@%}<3`5k)D#kzBNP0-JEYLM>eR#65VUIiEh^n?Hbf5YH!f}v;Z?(UZ zHLkY*7_sCj9c3}=P6<7G^SH57PG|i5xLl+ezBu5Ec>P1Y%{<&R3nogaF8043#8y8- zqI?wvuJ_gP)KMqdrl=-hd%ur{MGC8^&id>|WkZACuhKsKJwcgdwV*B8SwAvw+sLl; zME5~T{6Ri9Dn85oJH%U5?{VeozJ3%!FYj(;>#!19-ezu2eY-+2w`px%Kt?Mgs zgFN^NonXp`w`R^J2%l>s?qXp zgD$1#$9n!xx}jRP^{$zAp>Ny?G>IBt8!DRhc})Fd+itx2$@+Np@cBaOyL%Y5l1i>S zN%Xl30U$9B4-M>M@Lf#Ji?YqOhkvEtZnu#HUDIa>S5;S6HDiNTf+d5G^~w!9CM$)H zf=(fl986I2!-<#8ZR+nEtDFmR=NDYc*xw~TCzToZKY3iMXAgnRYCh9`j9yX+cKf}! zXnB3Dh>`Yom9X(~;pq03&UPa*#ncsf%_bL?=nk1!!`Uj@pVp1fs^5}J4t(%p=%u)| zVk7$?2}R3|=OiTG9^6d)c;g44`nhLdYSLf<@eRJPoY1}2wigW)RezV3RvRo=3h32$ zf?9f#+4|Zi)wlssuz9WEyJO!@+earP%^r%1&_7HH;R^+aftPbpFtRVm2u#|ep^SAn zjp#V}Ew+Xq1&T)7vY?4ihrYOdOu2&t*5#TGswd2HEQgj}NzM)>+1|2cembp8e;I!YY)UcS7?XyJ><@H;b^1)TQ~r}jL)M+xeN z+zk!iNo0Ax-aF48$_L($9{8BySv1 zeO32H&jiPyl_`)dz)7>^{`8j^ArP*OrY}~8$|}W*x$e477V#UEVac^@;x>Y{HIw#~ z#lfl9KuHOUgtpvq2Es41<@vsfB_3IH1ROH4-1yA6X7^T|$GqbsbQ|k_IzTw8mM16b z-TzXh@oGwf;QDj;vLJiRPVG6FyHalDIa6%6Gko&$VYPykVeAB1s|C`8!E>QQKP6UY*U=;O@ zSU4oy=|_W}eoF3tWup*5l6*rbh;+bSeYdzjGt%teLH^DfW>)!;hi_q~0`fDYUDG@0 zRiS|^V3U?;rY;+hWU=G-mJH(E%Gf{K2^p)byw4IUejUnc1=l~1y$)nsXBs@BSkboi zTz6;QwTP&6&6>Kv7`4VsCvpn5j^2+-?lAKz3ZL-)9`Z+-Q^L^@(6-vSjL4PL+PeFQ zk-hx+Sdn16vJYm;2tg@RAlrn!+&%ipK3gG zDt&lDd}c816+gJ5f~qYA9XZhnI} z@M$@)@z8#@OWCZ=%)mTLmAq_Vlsc7HA?I>E$9~sF^-_G?a#gy|#N$COZSbDh+P%H3 zu(Y3c%;mRe?^3={2os!YDsNGhdfv10vGh@)!ON63qm4~%5wW7xXE#!g9QFvWA0y$^ zFD$idz2wh#s*Zvux7I6CrM;au*~obMhi;1ZaZ8xv$J61a5R<{W-Etx)-= z82=Ws3yK>9(!C_(tksR{TRxdxRhTwMY-qo%-v0W^g=Hj`Ft>h$Wy9rTR{GqdFTkIw zdGNk7a3FII?4l$Xr`lRyk27KtpMTkYr#zs19*vM2uUj8UQU8?Z9FZyQ`Tgrz(Af|* z8oqYcyTSqKrf#a#i)O8j>wHnXw0B_=w?-X#EsD>amZ;>N5B0n~5p|rsvs9%mXx+#5 z%yMw=-{>dDYQx@g(0i zK;aYoLOiJ?>FLV{rJy2*zk{3Sy0l&I8xZBT6()nL^=}4-s9A(mN?B8KWhU~f=*xI- zCC_LoN-BZaw8;{G;r#xah;}{3TE3ZiG~Fri zckFgoXNxrY!$vHcR)F}djUd0~{(yLUD%9a}B1URi96oTtn7@8RwqH7QTOvP_qGV5f zuz7`6=;YFO646o3DefjAoB?uir&TFg*ablvlLMFz^x{`&|07v5f{Eg5`zc)I^=6!K z;7DI8yHTC4jDu$P09W$ZVYlsjTPW>V%~x4DJCPbbJBO@d8YIMn|43Mgp*WLUt%MaP z+>8PUqs^4v7s`CiVZH}UT6{$5T=a!!v)AC!S&mH=`x#lf`PE=6HdlalS))_1vUJWG zQhz5VAOONM_j|1oHl)xOq~$MgA5m%CcgY)XwEor3lYiN`uAyYzqF6>|WOrcXje%wh zzcMLP%H}yIzhT}pnuB$+bbe5OuYTrUa(8la-+QKD+Z4VGfs5NzF4 zW;?8Uu@>qx3d+Th4`*45fS_$fE4}p1v`E6VNqSkG8q!-sKUn3|1wUJir&wd^g|qCp zNOdnD#R>MSU`7|LJ*zs&46ur(fLJttbH&2H)>~e+pXz)G8>M{^{zcFp_!Dk6QCSY4 zqxwNnV1`a8E@&X+aYG%7Xe}CX&?#EIlgF+9az)1`$pXPKCOaN@#womn6egrwDc zR_L`do-9F$9`G7Rwv|~Brqpkwi z=`gi=1$=FmfgO!G;S;7i0n7w@wzk6Qzds~hzvv%sXxYVP@xZ1xO9z=*{71cLpm@Nk z1Y#l=T#^ZO7y9H%@!;gRJL38YVPQ34{M!mO&!oGAqSm#mp&^bp_T97{j+oIxh5WnU zhi=Yu>cFKf9sfdsnU9yCT6xz066mcb6j4A79iwd?7YF6&y)-K&soZq~u>>9ypRHY! z%6kH0rygnk6X{e>3Z3j1)?$$pB!AII^L8H30LtBT8rVs<$lf4=f6gm8XI;&6E6Yv9 z)WSIgX*#Ifk{^e_f=)f~XW^`;^1#&AV)BGKGK8jiC|dzt8!J?bXq{$UeDK$Nht;-g z&R6R8OEWWFm4HY|_Z;7&h0FC@AF5r8i1Y;8lI8ZNRQ3jh35=rG_=rmH;*$sn4&Hah z+CJ#9HQa=KFmfXf`}>_Xn3fPXc&z{sZSsfm8DaKJ@kF~*)Sul#-Kjg_Yap_nf1~ts zth`|eQonM&;`ya9Dg-+1w7Lpvaa}Lj)jBO1fEDt&)CQ$SGSOIQWfjZtOXO^{y{~2a zyW&^Tl6&-hZkN44{VXL1B%JlxVT@mKc23jJ_1tX)tv;muxsH&vz80S+Jta}g3VEsm z0VZBY(LDJtrfXYXP$o$wO18d#gr|Kf7cLd`%=YI*YjCc9c`$@ktz z*lk%bO>DtBpWemuTjDvwe>GW3>HJbmbrnQG_ z3QVc|+=jYE+vnWQZbDlgB$fR2ZF7%CdHDZK2Q* zZ<$p~-<5NCxNBs3R?Q*>kMDId8<|IPk;wr|(AaXBIWMEVfBd_8e{8gh-gn24HFSQj z30xUyMe;)-u4@w{5M^rJv8B|onmA<=A{!2L5c3_TK^UmR}--tE^ zJhQoNf(WbZ6WZ}XQ(n|H7tswwB?9C)iryf;#8XGQKTfwc9N;9w9ft@t;STDN;#E7W zIvdww$&B!`ts`~ZVdX6iy}Ze^$F0f?gpMEGP3k@HXd7yRDW19)JvI^TBZ~+q2|F0` z{I-O^{i^p5SGlR^t=4MVBFK|hYzy)K{NU}+w?TE1jWQ0n-b-2iVNW_ZKu3g2BR;?D zI(SuUV66uLzN;WMf*jirsswKuDcMb}h`wn-S^+s@e7PlQaM!={H{rJC&@C^)jWM#-qyAuM zU!F`SK4*p6mH@}-MWUs9^~fM{P79^DiKtHT!XECxns2Na`qs;k4sUMLIYzMoN|Rl{ zDIX`1ZDDvS9dp9=^Y}{bNT)8vY+4xW=Jp=(v!)sgUh2hgBZtM0^IRN-h5Y?nh;oecrbJqx*g(*Sb!vz;pUnKAfR-Cwgp7Atug*eA z)u?nqnn`6uZMIP^>%YDrHrWw+%e+0eaq(1M*}t+{{N9$9g}eEmIk_es8>W%$kVczD zF!3=0mmls69qrec{p*XnYHMl#7*mwAp2g<=)HLZ$(fAuTkYq5aBlGQb8TPz3&Nfh< z_qbl*`Q;k8Z&*PQ1CI$2zn*WJc2(lq3jxi(w`=}P>To~1Nb;j;8=W@CUu!bU=;9dr z=TW5ou0uPc6kgAVNVY$g%Jgj9B$M6hTnw#Cf8yQOye>0Xti8O~IhE$?1hpu1LAUO; zKdU9hu19FK$NDU;>!M3v-k-L~=y0M@>*g!#CQ30j#PTr(<4aqi)rY%qEn}Lnc?KLmt62 znhAPqpXW{lue8@vV7l;rgPoRBPUaN#G#E&-Cf}iaMa7-5yh5{tu<&BW4TFm4XLW7D zR!OI*`-!*2ZNOuY6qD}m0FW0?!8YK2p}z%{);_pXo6C(`NB33BbEcIhYAQnaYeK=LoXhef+_8x?EA>G)9@Lj7 z(Kab@64xgu9q%p)oN60{uA}9z7i zc9!0nm8-EtP>){wb0A+V? z(-z|je7dQ5D?FYi_B!H%&JGxDuE&&_rpefg%Q`UI@;pi1W;QA{DVDMB!UkBJZ8qxJ zpZD#eA_q-Zb?Ix>Bpt$fwi#UPrh%gDAn>eMs|elR?zL&!(deou5)^RRc|Ul9`6p+N z-^q3&@gX-5Nxc0Z$=-n8hRlJ+p+7VGMSkhN#-o(5J8J&em0c{s^y2gPBR0YJM>Vm# z9RUHZ4GSv7#%)V$iDhijr5{QUs6&CTYZ|%Ax4q*3B_+!o50alv1QK_FvBOtLGZfPu zdGWI)K~xkbEZOzz(&LN*;(MLQ;|UkHGrtS>;Cb=m$6LYUjy?;cxfcD$CG<3HUtNv$ zM>{w_>3jX^U%inNZ@N*6y|^R>+{+Eqa&j%ab;kLzd_!5|ORm95 zm)nzEcj1G<4`qTFGF}!IrmuS6b(Dm3yv$|S;WLboOOVLQnVIImj*dYE^Jf4KuA#2w z(Y*W1*3=Gqyzq3;_>D(CuD3R|K1G21K8lBlPtP5@u5mSxr*d?>jIXu2FQ(VRA@5VW zU3yJkg@17=;GFbeZ^}P5;6IXpzxA}v=*M~GEUN`1w^%mH1&rax!fP+unZJ6Fb9iZv z%gUVW&Jm%+=-S&XhKY&O<$#ZNp`6%+-K~b7#%3GD=bXS!*z{_VXCHP^?V3Aq6@y<9 z(GSlyKm|iyK|xp0^E2QRNFC*kKt6#P5Te#VEan9Ffp)UbM6QZGzpTjY+ELLcED%u! z-eZ!>3m1vZ0Kac-oe~n-=!!g?e0{T*u`xBYe|Y`sc&h1&%d!Ew^mx}@n5(U|A=x+* zb2Gyv86hoB-yVDSZmg=qB7LE~&-9IxM+M^`jE67SPfz+{d+hOuQWen= z8+RM=)I7Sq8Bc{e%~E4j(R6a0i^ADvYj4gMRIibc(^*Zc_^4Wv=j8{8O$5kh0KS( zQ<5N(BY#T*uxCYlN#S?@P!0Sxkta}(_-JZJTCdn_ZE?kswlT$QRm95hR3y_V478XSy7*xwBZ!~ zJ)MHVUQckdUB$Z=2}N;2b&F`7ICw+9wRRBfZu%C%YRMFHpS83%0OmZNW;LE}X+gg$ zJGoKFGF?$m-yJF|(vxH!Xt)}guTmN+ocn3HzSeunN<1CH@i>7SmG zTaYr@1^4y2)I z`ZtKNQ)dnPVRWtg(=|Pm^Y-uK1QAy~Ekb_9eh4Qab1k3JMUJs?%{}rgk2&L&!{mG6 zt*IiQJGSn;RP8r?DH!*vElmBzDfoxpP5*x{^D*!QrH9TIqT!MgG0Rddc=iwq+;s~u z3A~@X*1;j&m!%$w{hnf?Bd-xWEg;Wo8~+Fh8aH|4(Qntt)$yB|vFxjz8=gfHRlXw2n)G19)y z#c@B#zU`Lx5J%-+uBBH|=6jA-=3!YN>J_&Sw-MZ+j-T6ga1hjd$lbA#K14zyqxcNf zEPJz?2i{)`fDxxoQ5Tm<7rFe_&3VH|3wk~K-9%EtqbsDXwkVnjbL*z!S|e>BL*Qg=MP#`bk?6c@u$4>Ln%Fa_J(Su*C zuB8W3%`yC1OFj*IUAk^h3?IhZx_%mUWy{VhdKdPG`PMt?*N)%(+x$q_ga3+=TU7`$ zkbS(%!r?s|tunaz#Q4_D7vsM*NH@pDG&gR_<&X~lwKp^Rc2`Q=7+g?|sJP zXq~2O?8BJX)fZ?!^swb1X&$(X{Oaf9StwU71l=vFYq%;vk`uHw{Wn^0$ojP_mZOJ` z2I$YpnI~+;i_#IA?;a$vsW*j};Q!H1>185v3+J1g=V}X2Lix&Z3#LKmUDZt&=Wf?d zXVwtB=^%&#MtZ3Lxu$Ey-ASn=sbAflfA(zn$) z`x!C(kTZN290hE&CkElPp}pR#AS!?8T1J0~*xtBnIXU*-AcePDA*sUV5B1CfGv zvVgFRP8y7`pBC;UuiC+Lb>CG?w*@_zU-74_{~7s)t#DD*NSlEfsmEyrzH&5X{#>vC>NSCyzrT+m#cmN>B>2t|b;at{Bl6>Gq-!+BzI|BL1*C{)2^M z{{19h$4Ei>B`x6d{h2%kUTTP!rk?xhp;h(t=hm|{<>hr3RH=@!f0lmpV_=$8p%tE5 zJghn}D9rz4O8FLsQvHF!1m57=Ki+gyF^kOGHU4pcb^N4JAp@kYYtm6ZbNp~%_3Sw z3tMK6&yekZwHI_*pLy8D?U;j(3hw>*tMWGN#?PMz%6d~s0LuZBU(dheuXNdKBSKJy z;C@=@aF(I_U^>l&jB3I^@Jvx#8=ff|rdqDDwsh~^%%MA@e0E%RMmw~m?eDtT<7V=Z zq};lRpFi&fg4zSw*Jt!t6i!I&mD%!Cs3|9C>kzo(ol^1v+ie#8)IxGKWB$LoRa~r% z24&w$MQof0&n$x7srBd#`TMk)wH2L#uwi;${MoEL)UH-Ju%9qQ&p z4wlP*A#E{{8GNykb7NwA@oe8lYu>U!alhC#uN;xSV6hy0a>5%B`RAhyFT2yXA?926 z{T1bc?2}53Uz%Zix7*&zgHB^k*=Jv`IfZH1Xn($+z><7-GYq2;rlP9wI$3Q`X}|F1 z-JwAE7(Y8CGUbM$(7=LA_&<4R5nU4Q&6u|u50jbKs=lY4xEzh@Y@l$2BOuWp1~d|%RkZaNfX?r zOmlv3o}Zqk&&Fm27ytUZ0I5?j85WwIrCE5Pc#t6tdbcLi~`1YOovpUwy#5)+4dknBx(^>_e{yAv@GnToAh z?A?ei%KG)W&h(A=^H+M)#nb+YiguZ`1({|Tl*0T#iKy+c}Y&C8@2--ejzBWGRzqIqW5&d739Mg~d7$uIT z#G%&&yz9DNL@3R-<`?v=@HiOPS`a)MOs$~zRK3a4DC#-xED!qIU3-K!{s=^F% zbXR}=G%Uke(#;EmmD`4JhX87%#@are2gBYFoZPyKGk~t$lG}7KGDc! z<~-xKV3XNuq9Ne#q|>x*N+?PBHovqSZD=}0waviG1HQkzG_jzPj^0_yziOX33Km61 zPFfgkU4t6(l?euu3-3@(`K3uS#S7W~X+`I6SRT+;|9krgmXC4xq3FGz^C=~$Y=~C= z=vIWn{jV&_uM>%hin@ZFL9N)wce|oDB87Bq)OlHkm0_#Y?cYe0tZocKErt<@v{9v- z8m}El&pRTYvbVnD0(m@I%E@>`?%q(cX)rm{oE`%et_=Y+Fd;*qc*#3@XJ>|o(PCXq zL6!SK9hO_wTObysm?caAw|Nwc$i1^*g^%p6*a@M*ZDl1eq#_^U8Oxu|@1#p##P*|j zBEAQI-wMzg|7~tL{zzv4y4}qdG8Kx@1Iq0!*vmO27f}NDp(_ZOJ>D}Tb&z3(4j~2em}aq`aP{@;G>l%f4P6uGgXT{F zqa4JrV*89gN$~#e%qRzr*uslsV{*ZOaJ3O15?*b+|7^cmYW6fsB&uY${oU+^ zZ)|qllA8Hu`ibkQWxvwp<30zlY0s56#m928_^4C(T&Y2x06l}2h#=+nxx>x-4!omJ zjwFkdaPyn65wmzBkFQn1vO;v%WB$xj<&o)+P!**odGAoEj^8nDh3^VFl&adV>WR|Q zQ6ba>bnk889T6QuI}Ip$4~&)FeK@DU1RPc6+H%{vC@sWPN(leew_0RdrE99mQoj3y z>ehm;mImM-bIeD>2Ub{!+Rkn#qG4J2Q77({)HDE|m~7Bs4?r1ESQY0EW)%CEOhGHN zU0s*u%Y}TcwbjE$CUj<9^M1vs+yHYCUtWFn1#=Lc8fIaV7}5fwFuo-mDGCW?P~hbr zW&TYJ1w?n@!0`e4u!w^x?f@SA?ey~ZNS?Y&Bag+ET`?E<)~K&?#$o<#BpuPX4G-@T z1ag>R;(+jcNaZS*_^84^P{*`~lMim*LCCs@iYUN+egly+*s-8+=6nz@hF4t9uUgz= zEt?UNSTK8(EN?o^d%C|W^J3F1>#MB3S;Zf@CR^4+gUZk4SkI}_mjVWHxzHghRV@MS zBvd)yV({4nX4MfPKo5A05;xvoH+IQfIc=Y4PQuk*?d-r&s%@{o7zRPOQf(iUnSbKy$l zC|Nf0m>g#PSj_UFAoi8QZML)&O14Og(_qQ(UkdcZWbE#5^4&FD@F2VOmz-HKW_4~; z@)4hi`Ahvkb1h+sj=fr_ud=~uQdwKM)>Bih-GAKJWnuI}fDM{+5_jiA#w&a*?eNBP#1|X{gfQ+&k#5y z7nmx@)^ZZM@GU*ccYLI0VESc(Hj8(eG=5ieaL=4Tra{TGOPL=m2R%=-=i@&#uT~&R zAdh18$YT8SAFdu`bM!0dWUcOty9WBG8-Youj_@d%l;rh zlcvcxAhpm`eFfPHYz9C}kaRyL01?oYmRqGKIWY5U_|^ke<|XdrQ7!?s=x^zOt)A=& z@*bi4(g*MbiUt(Iq#N}Z_V5|8Iu>?#XOq8_J%^4-F1#GI`?v+O@NmzMSvt4B4R8(Tf%NTTAW{gB2aF}|4X@| zzS%vLUqp>%A8*tm9J1oH!bhI|94X-}Wwzfbca%Y7$CansKFJYFUHMaOu2pDpDUs#W z7&U6orq$hf&^6Eys0g+h^F0i#?Wax%rM>30)|8Iz)C*N?Y?KJJE~<7a>8%Pm_~1bw zUn66;ntm;m3>|sFLRvQH6}ZivlX5(vizv*=`S9@V$;R>a?(P_gXPBb@#QS`eUGNr& z1`nq7{9tb>g@OHhHsQ_sH?_j9QNaObY_f4UZEZgMlBug4rT_VZzP1V~-v0I|b6N4E z;0;m^xtr=>;5HhP7BZOMXp>pJi-VcqXY)CZX-C$3nY|PF@sN*6x=z& zWd2U8&Ark@-t5jMN7`4}S3a%fjju;P!{+I&WnHH#uoTP_puKsVxU0`lhV+E*yX_7Q zd_NwTTd2CToH?5Hc#oSUYjS5@pI+sLPy(>~H=};{x~-?ib5w%CslQ@{S}@4kF5@;@_gZU8OpNT|*UhBgr3!NyIWw$xIp> zNEjQb>PHxnkW`S7-1sPGR7HA|{O9rd#ndGDNWyullzggGD~EqjK)jS$O)Q>PQ&p8a zS<{@m3Sr4fw!I%Z6q@;u3`=t<=kL8v79}d;T2+lWVl}fIlY&>Nu&Q(aQ;XlXFMG=O zue!$U*5bJ{%ja1Cx1kg#97_9|)1rtmwY#qF$NS|~huF>A@4_(4CXvp6*v0tveuR$) zQDVAFW=Xi-NT^_35m>>b8@ip$<7=jjL$yOF*>mU_&S zlmGfZlB8}#X^$K0k9V2War2y{ROyZ4rDtxSOTn^b8O8CgtxK|W)wg?ng$CiSJ04I zu^R1R-vGH6l>QS2f6KU6?YVJJl|w>q6B%(wJ>6vU5Y}J>9n`yrzWubp{?7KBZXZJ_ zZmvL!{*57b5_tnL3b&+8_y+hOxCFh|jR1Z6-jU#tIDZmHnEd!~ao#!OjIlQS3oHM6 zqJwhpPx(*a&WHA>PoLl~P_fvnOeIE-D;o|BoS~kep!7`1d`XveM9`%4Uh=3I;q?3MHazjOxPBjQf$#ndh|;O?VN?GuZ=M~rFQ;*T*}LXI`snBmV7~OD zzEe_k+~xiec}ik`o-8}Hyo#V$-C{TFJJ)qj-H^?54g0Y*zt^vje>=ANo}@QZgqHE{ zni1OA1r?u~E7Ky)Ver9$Pgmbd-%apC+SCGZ5-VXqT`s$wAG-VeVSMb_Fk>tqpyvC( zd_z>lA(9IBj*cbKusM1_C&y_z*@gR zt+uW#yVP_Z72lOJ{r=p#>fi(%m6`YrFIms*Z=6eJQM7v*XmXmmxPi(M$t`AEvbOBD z47mdXG;m>y#248^9*a9R%mm5x65PqyPr!>BccT3HT43@?7zLcK3Ez)7*A)9=C4QTj;@{0N*4>*fShm#{9P?vw%xa5TVe z$N@*YvbNFgaF`$+_Klz#Ko+Ikc;eRyggxu9a_7@c^;!zHxrt<9XpvS43K50WPf+KZ zIG~#Ru<#rFoR9H~K!6zhpA$mOEnT?=+E30RVA9?|NWr^j5W3}ksSFcu^w%1@RBq4F zhM@AtEe;fd3c+(&x-!_qS)$$gT7KWkJp$t&Nc(eF!Je$^N{p+(2vK$0g>Ltvq&z@z zY=kX*LpGm8!tHl|($A6_C7!L{Ln@?{jCXQV#lJMiZOu5ScsOiM3YrL2PS zs%QjyrRVE46#@PuPaIeCDS(|-;myv)z!@MSqW`mE?rbvaSzLToomfs;*T+1~ie5!% zU!3FhhPqjiY*tJD-D-^h2W%xus#$C_c&$3L-Zui6qCh#3K0?2rFwV9~Ec;3U7-39PDnp7DerfnOLWyu?*yGc2et7{0%hF8cHtA8qQ>fB5MBX5g{w1g16R}lf!f%PAH0K#g@APjZiTJ$@-o<1!>DzpD* z+vMkhmOAWwX%RkE*Y#GJYr2}S>l1WCuhHCEE6enV$>HlrE$%AnMiWQ?o2op73C$PQ z;mo24{!R?bs0wG`-+NZV2X;YXuma|2ni?7WL(!?NDV-~O>p2yDlT7>quN?&=Yl-NU zl4It2p8RyqxZr38CuOWl@dGkxGUJPy{2yCksUBvrnuQs<4B&h^B131sDhtaDg7aWh z2LaP#&|t8Blc%mdbNTF;hrM%q@oYF;MF#4GY04>g389`9)rGL;UaPbg?Pq{9qhM;^ z_kO?7nO9hdIAa%jOL? z>F2vi+-}T{hW;|T4HAe@l{KpF^%5YZONWcYzy}g6hyNpCQ8M}g-QJsOoTRYAd-l(d zI9=!}T8onBc^lS#k(t|`KBy{~kr5V}~LA*ijJcku!BUm}k+ z{-L#kyNwuK@j{dth&8yyuO(lb&Cn#g7a5KlWi(%A@TKg9o z7*yZh*3vdz-SLfM0wi%Vy}G))ow0ZK>4V8u*qu31H>7RCJ)JB(;x zlti_gojH(09oy6|sr{s$Wr2b|n&alcv78Oa$z(145PG*?ax+9nzp0{E-BC{0FFqzX+@$IRP(EFFn z74)WJ3^DnF?vHY>3k7N($|ABrSXCqV za8WTspV300wD?nlX~#KB&4#eP>!zy9{HHUb9yL8PB855q3flNNZG-Px zpF7uZ8-a0+x{DX8yTRLu{^kp;V?cD(mj*#l!|jAKo=lJG?uXJ-T3Sac%Z#2&eXAkJ z+VdtoOc#Pcc%$4ZUCd6+E*ftuR9G#bHF`*VLMg!oZ->dmZo}=pOa5kt+@0-il(JSG zsKsZ#RY*r1T&AK%+!5eGe~PcmV69!|We$nnJai3Skgw;^bAvY%vv$xO!}=%Ss&wOt8cp4Ee39PWGBfTXXx2l53?o7<50yg?2^j31MwR3@_l+ zmuIPt8~zt)M@}-0xCb~@LhT0_v;E^bIGS_6?v zJI*Tz0HvGsgzT{ zh=aJ7SXoWFdr7?ZykCAZ_rc{S2f0Z9ym`l40ed0Sa4uH4HkwcUBO21+8lC3GQU%CZ zia;^n`~sh9KA(7vw%yB_%7{V@?;IeC#m9>CFX>DGTcz8{q@*@@X*V{hmK{gRvWgE|N-C{to?qbQqcJ4Y}Xux#&JGH@&)c;7Jn6knqMJ;(sxXf){XF7{m$d ziMCDb;@=DOU2Sz-&*Ru1kj-}Qs2le8b*HZjxVV_srcv8^vxT9cdJ{yR;!pi+ZPEMU zFLogwro8^Qg9~dv^c$uUXM)Y_UlM^3K9wjh^iQ{ zdTt>wZ!n`mx)F^j&IK6`d4`&f8FSSlIIjMiw@@IdKKz-;>4GZmPI8!snR%mcy@6SK z#378Xsz~J}NaoRIV*?V$klU7*nBUgWm|-frz*u?Dc1hpEzsg(5HXM%CulbX+p&6$H zLf5d>M0bc6;cYRT1U^ox5`8*o#;DLC!zQ+KYi3_zJnb~@o6n#5K1uS{f7jISa#I)= zeIjlV=izmZLxpG%(~!+mJRG}WT8lO7U+SbbpYb_Xi$y0% zL`#F#LvOt61ESD#WVh0+&8&`44(tn@s_eS4@Lpxp<+iaJ7uGz?(23^r1kpn~r4cqs z=4tbim`s;)DDPV`uE7us7z=K2p|{ghhd4f8GJjCRC?LAYC;{HRP>;S*FRC9CYP?wA zxVdO(3|#Y5g*qaSNB({6t0qc87Y9aeo4DU79?7f zL4*aqsqw7vh_|v)GOSW#7&!QsXbFw#Q>8oX5L|uwn?Q+9;Jv`eABvqGMe$;2f9y#_cP6&}%KCm|Vu@PITkq{_ta^=EroRS9i+k%Kf z6)Tr-l>voMQlyILw7aJVa^ITVAmgQnuxI#Z13XK@=soUFPB2fBJeHTRo=4St8#Z`I z@nTbX8GhrHu2k<}N4>rxtwcp_bpMfE?mgQm6lVlc0qXb+SsSIJs|d}InmIZ;@D-v? zr`k4d(+0KIk+k;RU3S*g zez{J3s23IM)8)$xapXKyy6^HTF8wyw+I*r2oEU3!i+~>5AE_p+A^qYCph2c}*vhfO zzn}U=@>bg=g~3hL(;CA!ifYJH`}8BeJ0{zPFPakOA)7INt%Ly_>E~l5f3$8*Ow;P~ z)Ehlgr_|obB5j7w>LhXuN<`IyDV42tntcXzkwb2a)ZJe8gls)u$JzFY#j_#^tQqan z)rCHz1spfV%~?#NkGG{_VtXmLBJ5eKblF;BUW;*TmgAV-VVmG+5MLkgxuD1(FS1$t zkHkaGCj+bf?Z~5GrVwdSoK*l(DiqS2U&f@f$|kezTK^7kTs7 zF7I*qgqdl&)(~U84lcG`-$G{ckopdcV*U7GJu01lLxP~;8C#Ms#*CxiGd7LYJKs@p zNpaPlT#42B9d2@b3lQde1&%xH(bRuZc80*R|03aRR?d_U%S(0xC3Ly0!OOeZ${h~_ zFkgs4M%;DQF9I%#8Z0F=nL)*&Ka#>xNAPMGKs&Mvu2_NwAbsoV6r5sxZn~+)OZJ;V z4L73e%hI#I*1z0OaCPJ30rNasUpQ3;hDgV^1uDD*{@bq|xM=HC%R=OYTAJW& zQqi_|R7%VL?6dv?+a{gmz1kkr3Su+zR9sc#sj6EpYi^Epb?|I_Gc!gdGFs=kr6M#g zS1SBV09{9~QqK2^E$*%gj> z*+2bcqste4bpFF;b#?8KNiW+kt89%2QT!{#yri!blZ3jMMDGmfquz&70!el!tp0%C zDb&6%#lnU75^uJy&j_7BO>gvtJfGXB%NbDNn?eRyYNvuNwWJg!AGF+f+w{~gt9fmy zoroOW+Vy#*xB*p{u;{CKIMDsng9BZz}^u>o91D! z%Ul(BGdG0x$AS>D!yKGbRqj$X)X>q>wC=@hT-}3oLXv0?gXol0{Ij2W< z&vhcX@{5@Taqxz!+g#;5L0?-*Nado<-r7R~<8R_)XfsA5;``oO!@|K~(e7o+ny!D@ zYpfF***}_bA?yE&r+Gn1v23^Qf0L{Y+@@d0x4tK?Vit48Ijce&=Ig4KP>^nlE{bt% z)P-{$&M6w^S^*UAuws2{cm7zeqVRODn_NLJA-WKI^wNsX^@(dG@Y33JchOTKM@%|0 z^|HC}^ozCnokON-Xy0)U-;nBqU#e76-U$4#RUNjvuy|LM`Vc`dD}l6$B*nn=?J@h> zp2(oJyE3Ji$~-~WTb*4_Jy*7$n~5iik+)g5@hTL%sx&GjYruxDzv~HZBE15C11K(8 zxNVqbI}}S-@u8aPQ&LHEyMF$GE4M>%PYj#6Q~HZKR%^su0mQMnE%vq~^%&|Ofv*fN zGa1I2G5kkT6%dqK`c!BLgY!;!`-Zj8)ZEI-gta>C_BwvG+?zW!PDM3Za)J|+eO9X^ z-R~NO8x>C-sN!V}m;ZPgH)sgWmAv?E9)6ovtpDN4ro6ZiK`_Vfdf`;jPLWFNxOQ|+ zJmEDaj$LLOxVEIh=9QGLmlMQY?aNTmIE+{vL0c+nAW&GA^~{t88v6G4xz;~z-oXyF zE8hkOLKHD;c>Zd{jRHXeFOA_$yq3zBg%7Vv;NfV%#Szzoa*u?|#KYJy_eyt9cWqc_ zrP*arK>QD~oLg>|5|(cocQONMr}M`;ENSepmBtSC+$FBc_TncT)=`oM5N zZ6>$wQ~$eS8;OhNG_C_r&iCun?{u|oK&YQH5%?g9;#|SS47@%fCKyRhk|`G^>b!D05^kGf{_4{-DvYG*jxETT(vSLM!B$7`T+@o=Pc zk9s4CbvaMAzfCn9*-{O#LzGnA0h4{omT!Bvg4B)ih#kb8b>g!J$2MDzb4TUHtJ~Q3 zcrL6_-}Tx+O?(K|l#h@Y`(L8W{Mm?fu%b=d^trVmx$0xeyXXVjqixihX??mVl0Lp= zres=u@RuXA7L*#L-_z!qq{6)q*6$Z%B}n5YqX+>Qkdx`m1RQfS*BNf5UXCv=njO!N zfcgxywnWN#(h3D-iI`q9z0l6q(p>)|yr5d1Jt_()n1n$JQn{Ed9fOoF+htW(&x5y| zMpLJE_P*t|3zUZC&I)wt7?!JObQZaDuf1s7PPOEnTg|XmO`F8?YkpbkUu%TN9{RFd z>gV^}3@B6=@nI*BKlUd%vV46hwCQXhve^-N>G+fv^%hpO?adMzGhn;E=AQ});jGeU zO@X3Wq25>`+U?j=)VF!&9AvDhxux`J&0-O<|A8wlBayM`i}~ff7kQX&aJP%?;>-Y1 z5s%y8n}Nv|;a~0dn4N<6SZ$iC_F22)FmW*hOf{kCWBL`m{wwW5dxZ*18!*dUzs$`S z=A_5CwSz;P?T~_0ph-khxRShE-4cL6W-Jgs4r+Wjrp+Er)0gyR6E|yR{&8 zYWS|*7`>$oTIycB8BhtDEVIQcf@&k|K8WwfsQ#2!d)&hr0BaHT&&#=4nAwmKtT}s{84}(*k;k)<=EV!<$N*8a$LShH7Ng;cx@;qZS;75DcERBcgdTS(` zI5#i4_I-v7bhdHw)1m{Lg6Dz##uzoNIrKAUKd^JD5E-=?FM&2;?mVvE6{+E}Ci~#L z>E4G`8|%b^Fz!xenPmsQtcWMZGtSX1W{O>f}@ zDT8V@wD&J38npOyzd}l8Jwk`d++^~V= zReU_>=_6p>tg=%fB;!FgI0#`gJhu82*xO}8CoOTL1Gg@!Vf8MdWL=E5yDF@+iK*WA z*XUqsm}44f^>AMsM^52iT361+3$JC6QZuf%eED@~uoF+5Fr%l+)VWjN8YVY{J(pgb>iD`puts6z3%8wsNoPudBIQx$OWvw}+T%U}ABa7qVln7~%6XszJ+LHsSt|VEqM9`dRj7wm$ zX`Pl%u-C1NMOoU??4cfJVS+fH{KYQYXaNU0eLaIG7GL>xLwjrJtjt5^L#afvFE?sp zOL05E&3v0^X?4i&ZffBU=_==X=!gA&4xUKWyRLp+OxW(slD$kO|F8iSPIJ-OgQ+9X zbe!Ce)Jsv)G3-^+qYW?fWhF0`2m$*o3TvHn6OXsb%oFq*YI^j4`L$0qkmhq2qY{OW z1au^mHkKh-_7W4~V=uo6zb$h_7Jf;vl6pDnlczJ2<|O|qSp7eL*6F(yPd`j(6sO)$C)Odm7-R;ICjw0;r=j2EI9UD^F zLk6rh!Fdg6TAM}Y47oymhJFv?Plt*ghBmw{R&QQP`{e$X`0=mVv)B`UJ8|ImAS2@@BvUG%Lv@x(>b}U*?mxbv{GVgoxV83XC+A3K{NEV7wdrkfq zehU|};@0MCYLqL*vy|Jfm5~Fk!bTeFUvXn>LY4Qv0D0H|Xgs4N+1PomC>Qml6ScdJ z&sBAGYXGLkcgn>*a%kPlYRzQOZvRH6^)}tb8!}i~&fnbCzEpjkM{%h`_1fW1d^|05 zACDzn;B8B~fbT&~v?|4GWOu*f*OpS*yGnatx$QWj_i2H0g@iiwb%_%MxmISbfjNi|H z;eHR3l;qKf)mUT${q_Wq?l1auJL7GpFAZjEgbzQ^X!{rJy*q9UvTZm%oVk%BfEUiX zDFCLR!cLr$H;&10&NpYp-v&qlMBC58%rMMnIS5|vpEeQ{ptHG5)C z3B<4MVT`?9F~pSBu?EW&yfOKi$TYW&{S~@IyS!*M_OQ?=*=jfd!2cdTk34*@VI5nn z9R~60SxdGpQpKvTMKiIk5$I*n$fmq9eC%3ZGpo};s{N1EeWvE78ZS@m=|JD=$qCBI z)we~9yM=%3i8EM@b_59zo%~1e(|gEFsRmPSA&Z{-s6iZZI#>*WTC-mq7&>#2<$E+F z&{9@ZbXK39cebFHa31s@$tP4s^NYr!5qD<46j0e{G>3-hLG(A{v6Me1kD1RHu7F>8 zK#Si;!>I_gt@)||WHp1x0gxiusGshJ+{NV=qibkH;Q?h?CBIAN2(ncW@K746xR&h) z=+(3ZqQ6!+{qmyu82kpB$i3!N2rbmK)Eq7+~KaPGP`}ypQ=&b5-OWsesix0Rl z#9Q|HmFiDhZjkoe+BoyHb3uf^eg6<$!7$BR6QH&;8X zU&G2l)q1AYCDkQMHb>)E)G{XjSAymnyi073JV*2gKKna%de`p z#5_F-W*f>T=x=3gg)@bX>Q_<6#@j6cLEWK(6nU`afjrc#N*Vk zi%TFfvcx&KN{1)Iajx^$VZ`X5&HY`H*ct+tLP$=lBhl!GU&GwUy=K(Dr-oH1wj z_fs}J$i^q!sWxMZS`4q6H{>ru^JZ(Fs>?47EtG@P1?t6FNV z2rYED(y-9WE)WDl!O$7s=SKoIKN4nbWu>xHr!P(YI}=4!QQjM47Ab3NDk5<$A0r*{ zshBgGYG&rF$nveBsa*Lj2mU8quwtWvsSt&bIS#&-&p-h%XJfU__ZiH>x%&ys%RBmc z>Xm)!W)&M1<8_<=YMLsSrzvgDTyJYe2FZUMMj{r;F zf9$`0R~(YdossCDPIps&tL}nr+?_G0urW-43tncl0gN0^U9q0Ivhw)|R-X@7PV$Cf zI<)nF8&_`usA#BqH&!zVbveZG?6yKl2pfip48wHZ8wm952dIL>)%%&Na`>!DO^iV) zgdF%v;cNOhWN><|g}d45d5E-`B^MR8x*3t`h|verh2%TkXO-*JsODEVr&t0{Azn}g zFMCo9Tr=YED{cjb;S(jxMLz`8jr&RGvH+)OqhEGwAn7`G_8ET=!7o|dFx zK3o>_#zNEGjd{!!Qp+|k3M*yD4U2bYN*@*-kHR-QjC7(Xw*S0+_&WL;snpNJ+E7$` zE>15fA0%g*wl^wyjbP9r&k*-Yt3Zx*WZfuYY5aD(WFAM5;JPZ*dhWh@_gNg5mTA>LmZqPcVN?zN)irB1*H@mTWw5NNAFFPglC@bCG1i z%(6Szp;6iM`H977$fKc)yVC!dC!Y|UhLlu$l%#XKoanacKP~6*_RS8y$4M6z`aWuA zHU6=(XNC|mD%O!r+u_c*6wKu@Gzd4@5)uO5F&_=pL%JJHXy|%=th+lQ!G5SMP3$(g zAVx)t>;aR(9EB51M!b0?o+0~iVI=&=RqAVe)`l1h@Vz6A7E{v4j2mv4&K)l|jDP%( zr2We?{Y-bKyPp{lMS_0)?vIPSsz0{J(b*2F2rP6!YFt!!a6E+T3`B*M^x&^kaYb#< z6#mTg*hfZgUaxWtufcW-KX?Jr-=PdS9;73)C;D)t$POwMs2z$WwCzZ6$2~xEo>bE=Jhm8_LYeKiE z_X)&}vUl2(%*2l5TUD_9WZkX8js48uU%!8%Xs>LW7uG{v~_& zzhQ$O&K-E*eXi)w?SQcNMxD2^ic@LIbmm;?MG&`Fg zVJUuHc`TR@sd_%>Iic=+l;vdT^E1=nAw&r{1wd<~?c!rR?BY*}H?h5Quz>YL+Ihh$?=El%NESIT~Y%RAO!O+q3&{o&QMQ;&Ro$Zk_GT4LezwQsq5rozE9~*@xcH z6EfXXK)x?vm^XxomVPUccPCT4hzl*4{k8wplj})Eta-zeyAdqhsqrKawSTUgonGB& z0hDqKHDGhVf9X@t1X*rQpY0}xX)0GI-v_%`X#`w}g4(Sp;)$ntwYyy%x5cV%m6Z0n zvr6RHYK%6fJJC|vc2JO&pE!z6akb_qAfD%ub7$s0i?5CHZaO3Up8TaN{^41Q{wKX4 zB6o_{u`TBE@Zq%%wmZ6RR7rTD?8VV_) zg>;uXz1%%L@e)+YmYAzpzfPt!I4;A`G}hC`vNS00`fqT=4JAavg_A>A>~02#?tcr? zWajt6EfA@?hFZIsv+pQylRGyb6)2oaLy%XU!0JiBdwZ8U=kwyz%PkvKv0p(PG2a{G zkVP|6R}^g#vq7!S9-bX>zIH>mDpn3pT+irCak5co#vkU+^JMkjNq`PF8411<+{xzg z_kNpQO#apdn$#Hf+ozv|J!$3(QpaMvg@ zs7{5tU`x5W6TsK>QqQVfQ#~Z+`todc^+!iaXySh)q=!Y~`Z&72sTSeK?1szv%35v| z-a|nqmDCBgWJoh}H>FT?T=`S9p|atcm&#IJXkMsE{{WoY#n`xDScyw;{G>uRx<1SJ zQ=3&s9LulO$~QITBL^-h;zY2@nB~&g?$O6nz>@qEu=;Ir#Ibcfx3`G);`%ww2 zG1YkcLDUukxl);y%rR-y+T^@xd+xn7QD&b{mV9{h%rDk_mCsjoian#U)Ws_R<$G9s z#zzEOTB%DsJ?kGj=)&_AhX@c+-Bi`UIQq-Yz{{SoAJ8NI^Ge9vqX=KQjl?DMMzQ#S zZ69m3$N=5*;T5;g`yo>YsWQWOubx#dY`#QI<9apE^`O<5VD-vdUQY2J<#sqg{0M1g zHX3{-YVzXB7z|omyk>DrDK|`;Yu&&i+h>9fOIK0A3G@~y%R*MzHW+iWIa=HsL)rgW zmUqm|HCejS@XFfmTK=h9`Le+1m~UzS(W*(_exi`8wNKO?bD!c0a zH1hqI!B_DOpU8t=mShcBmiFrilz!;%hTS;b!MD6@{h?2AK4o4<_oxcew|%W3GZ;4! z=Azjg7a_^QN2exVY`YWo)V&3Glf_Pb8($Q%9};NL13U9iqtLr>m)p*DozAJ%1CN@r;o(>pKy>_X65+utZrV zN@1cjj$%e;oA1tM@;5$m*00e8@9yAA3G`0=;LyZSAT*ZoScP_=H%^ zBI#)S+BE-A?r1$><v!1dC$7x}<2@eKc`+ZZaU*H9|Hj z!=hzp`#N>DKqr#Qye!B{ir*j|$`cZ(lf9GJv?@?MQ}bq0=w(E}+~8|URmYe-aB`_Z zcVtzu^Vo+pqd7>ayIXhoe74^*>g&iFzX4;8q?cteS+6!yJHt50c4unjqz}NH2U$38OlZGlQqoIkWzRe3 zz>FG%Icm3UA>OVI*Hpjylo3(2y6Eh^#I;@lR{EF?VJH&1+8jnXOb^Ri}(S zp}$$vk|M$RXs9yR8tTyRjh>k{lrpXf^9dme zeXHTz!D%1=jLInq4V2s#%b_aqE;@qZxj&lcEd#HXXFF%kh4#H4EHl+}1*B*`jeA@# zabm5-O(=45zQ6H(bAhH5bsJ{(WmaVN)2ev9)Ta7<^;c~r>z`O*?6F$Q243+Cg?P^CF(9uW7ysb$h_t^&_(_vBC|=UlNoHZT7PV$A4AQpHvw@vfT&9>Z~`N!wtAb zag}@n-Qm|j`R-iT`PjFHaxb;BB&)K`Ss{MmqIS5f|G`RU`$is4kzdFNUo zYIx7-Kn?qTrZ<#cg&KcxYM6Lxmb5|I&t|?l>GCIiR!RLn?a-sie0%L;jt`nVS~tjB z3oC*sULO-m3+Yl?fRUodb%z3tFZ>lkW1MQ$DwnJwH(i4gD+51|F4~vhIIh*oll-%Q zi@SLU1O;6PpYUqyi{~R^O3GfiDD>76ME~Z`VQJICx-!7v_b+kbBJQ) zUI-}HwD8Lyj!KLs;`*dtU!-DpD5qRzp5tjlyu8CzK~ZX~JNViq*!w#?DujIwWPce8e_j*d2c|~%AWe07stji)kk9X0<={xi{hTX)C`Z6n*~-+6@65ar9K^T z8er%7jNRNCVxHq9t$rW=N)aL#l2_7Jf;@od4@teTkkzC;NYJ>m-lSUNsvimY0kyxd zorAGqmu#^MgRZx>It#?-`0_;#S9i`Eg&QKBbBB9nf4SAto<3r2+~YbpTY39J9KhPv z*41ptUZe(a-F{aQu^kkS<;2LwY&JW8V<}8?$rMG^%6bbxU0fPVxSJZ+J~Vhd z-l{g%u(h|}PKp2^IRq1|(6EAk5&^iO&y1F8EoxHR9Or5LJ;B2BvueXY&zi|sd4JF#Y(UpwOz-+a+{w+i{pG8(U< z`Lv{<*izTuiM=7X+BGMFu8s7W&eWLVD7zX}*0M~l+q2DoAC-^UCly#S2c}RU$MM_L<*}`zSIVbXj@6GT%i1?r$pzd0xno?InD30E8x;7b zR84b_kc0~Ia9Gha=rm4k7BW4n4XxKCJuo5Dq+@M13FsU#tk+S>I7S>D@09;l;BBq= z<8s*pUfQRGNY59?tBWj={|~J8V0O#+NAJDXfIIigLo8a);BgoEGPukB8fut(3zlHY zK{3l6EHebC-iED-(-O0~+8T`IRRt#)-b))1I z=G;QrybfgGPtYIobxit|FY zDo|Bk&#-xkvtk9ZV%D^i79Gvl>e3C7m#%@jEl|&$I-E(-H7wrI)HevCD-mG$Z0EiN zR^ude6;>$K@S$mm z0A*>ol#rxI<6pa$SSY$y!zW`}`@8e9yYr^=H+ny#)151OLG9|N8wo$-kNy$LjFkArsH!^lvL#no$N&)&?xaI+qHVIUp1|KS zT9|5@AU7fEzNjtx%X0wVp?B~3xcE1hlZZfOaB8uNQJ z@Ig1O!`T(Cz=v}^$ygJ&bzaf{G^ZD#DeD%tx=L%i5OLd=cU=M0&l0&!JaNL79@!$* z9&E3dqt?+N!%B<`Y-0NEg5CAzAtsmiL%c+qbJ@RwXf;2^J;h1({XM+20&erjx3Ap6 z=58OzMdKNtZ=LgFUZxuh%!W+sC4kRU6SQrNuN(>-#~fxnF)i;Ade28rAN#tZy}lj! zM_u14q}9;_6_5%q6UbCC|LEhXiee7GrF2x?6*;bE7*480j$SeA&*#9OJ7GNQT&EZD zAJ#y%Sb%C~gyTT`0C&X|*#MpUXXcaNceCThDqRe(9@V0>F9fzIY0Kk!R2%0@%R{DZ z$zWuac-8()A{htuEKEE!^aoJVmsRjgggNq*M)9=aQdb6wjnrp6oH9@=cBm0HP{7tN z(G)o#^N6@%-_7<92S7}M>v%Ocn03|ON3gSB2>bLjY6S5;(kVsmS+=&wgyTt*R^88^ zu}gPz;UM6B7b@+m!5gU39i3BC*nsg3LxCdMyF2}r+$fQ%?EJ*C49R{eYDgI{G~8o} zw2Nil_?9*Fb8WL5Bl2`$}omcoCS-iG0&Sk}Mk`Ymyq%XR{^)b|> zLuwCDAgWox@{y78&l}EePRU;%gg}UM`H!(ap-8jA1agf9Z2%lonmvC?TL2R(`NLh_65N0CYH zW!+gH=M(5J#=Iqa;nEKMue8noBY}p9Hq#pynhXjX3!fQP^2ni3KsJ8vTDr#Qu*@N? zI4Z1*{dCYb%ch1FpP3NylGa%*Q7J}wJ}Zxf!MvIyUpKzl)XBC zr%2ZaH*iGyt!_X(1F>rl+4jMiY=!3%%hfi-8YM}7D(B}v85wCh z$_59R6BNf>)^~3|GKrQ#i^8V#;p!1@%Ch+kUabb<>9J0aHIC>ynlA-}yE-KQ9_D-)BMTx#M2~UO&btxpK!UbheKUFOTpnJejzmw5fEAUzz{DoZB z#@Er5rDZEUj=R-&0~Vr{f^qhkkQ{W-p~41+DGZ24CmByyNvYC06BVY9xI36?M~W6> z8ZT;7yeOA1-?5c2M$b<-(v8~12O!b2llXqhbC*RknhuV8EQaQ985B$yr1=fYAFz6e z7hdqLFDQnbfMn+Lq)zl$1|~X{LUbui70LAEavdtvCJcNb&4+ZptgzqlM23b2Q+ZI( zMIb()5-(;w%{F99-^C7T>yA7g|1gO&!m)EsdW7i$M z{+nqQH}{R$0Pa}hcsrQbZ3*l(_7Z(Kp9xHlH)Ic~%b@;mT(b(AXMbQ-nkyiE^P}^7 z)}oLjLo*~)s-}L@^B>NipPgc*ll=*;DuTct4Z!aaM^qoG@Ic{uxTxqEKq(McEdv!@ z1s=*Y1mkZ^u^gF2yEa@c*(XA+zV2r4W{|ofDr5TfEt1wQ(S7PqzLns|4`I?J1eJNw zkdYf>e4s{GPCt`^l`TaTRgOJoWTUROY3BS;2ZEV(JFjdfYyA5IZrIeEZO2o;qz%qx+Z|!Mnj~@}hMHEbDi>zjW<)8{6RuFqAUQP+OCO@Mun&M)K}Q zyMe2D)Nwx66GGLd*h>^c5{`ek4?=uo810FCl+%LqTTv7V5Fx67Xs%%pumLs_oDrU~{Y{sYE zRguyknhsFvq_v0~&8Qqq@kZ zJ)gITuv%M+V64~zSm)8d+?xeH{iU#{LS9@F81z)>p+*?bK3fKSs1D9QTBN2!mZcH9 z5C)TiX;;|d!+P3kqLDWU5aQrm&evh45g}_?=dNciwT%oPD;?(f+u9LHbJa^4CoB!p z>_v&jU^6j;#|geyMD~?G`(N{DflW0NI5XZIA$`mC_Qt{N#pq~^iyUhGJ6)=c^v>WL!s!ea@Y-t;{xg)5j;eSSt2UlgV@FZ2V)Vz{) zl@&hJaLQdIXRs|a%Dvm$pRq{kQ0lL~SQbr?swlepr(^ov!F02lOc>}!3%~!i9iLOa z1arn)+E+p)hx4Cd7otKQui~YT2q27QFk_HbRpU~y#`McBKQ=D@of0MRZ5)%k2PoBM$m_n|A?J90W5 z@@bcsjbhykHydC|l5Qf82|S{1wB_+Bl{b67+`DZM_0u+!JQF_IM{{~qt{E<Q*%L~Ao+maGxSHgS?c47$4eXAt@(E`3p%4}OF#9Y6QWWv0F&~`1 z_wI?SQ;#YwQ3CKYUuFld4ZtJ2=x}~H8*GQXp8whiVLRs&D)kE>s8jRCCJv#tmRM`E zce7H_6UC)gyYH<3jB(cuHfpvc8Q|@)l^03)01P#oErf#t&jl!aYlcIf;c|h_h$yn1 znx>aC#v|k8WIUf-Lx8<8N!YZanc4XjDGRsBaSZ1J;G$PGrh)SjwB9pJ!kHZ7E@U=M z6#DZw8v!3Urrt&AM++mz%%$SYJ(xgYR*~dtMZ@JqaUamAJy%k0z}IBNnKs60{i?}A z^NyTR0&52rDDZjSEDE}W`9A*u=iaR2*t_tRcEdgYcijFx-pp36z(PiB zTEL1=`Itsp`D#+fRrw;KyZ6oJZsTyxOb>IAk ziESKu_P?{3EY~mB6w(!i+m&iv=3A(^U)*-wu|Z=29(|!GQ5j#@lf5&PaQCJ!gdFJJ zVRX|PfRYa6I-`>`))S^nxt$^UW9|d1=OWkd7biy>iJJC)0|h7hT#3GF@5Ge4tAVVlJ7C2c;0(8`nGgLHS)qIqA2J?%JdVw$#`)2 zx_-n0Saqm7`v2H^&v!V#KWta3h~7Ji-bM5t@zsOqWiUb1(d%HCM6{^U6E%7r6TK5X z2%`5gBZxjjFk#H^xu17?AA7%;Kfrw-?zPruUDtUQ(yX85z_y;ME`sDUjZkjg>*9cn`#uq{_QuKq(=)m*{$X6 z=}B@5UZysAA+verX}MVyMcGcxHOAu+Em)tSnIX09^tyfZRO8HTfw5Ac3054R&0D-; z9&arcyB$2_f1?7EiXHJ;`I8e<Dk=cw9JDvq$nujZpyeS`=5WHSnZS~>mpr&cOQJ9|>x4);8=i5VO#<773 zATQG~0OXdKdRU;y!9vz9C#?4%P|KFY>_%6(_XuD%YMfB=7wg2wp)2zNq_9izB zE{Dlr!js?o905;^oS4(Rmt$uBmyt3&)oq#z4U7SIT!I_;zVR5_ z6J5Dac-B0F=u(4kldgNe!t#VpzOODX3KUJejz&EkwApaGqS;VqOYl1uZHkeX1ZVk9 z(QV6de{85@9P3W9p>WNjDHnhI?V{u(Fn8wa5^4|AH9dIgm0yJAEe&xBzEt8)dxPub z8OAdB>el+=NR-UTWcXKRvS@^iE=_F(1%^wj#>9Lx(mQfG0cW6<7{{yA&va{+*dN5c zMDK{riDX-RLM9?)aVw4}Ff%Uqd+&o1Y)nx#6p5y&3j{|+$m1ZQ8!4skgr|&fZvcI- z%HE93ECpGwPjNJRDz2|NeW-Qj6H2&wT4_*isq&20_4}02Bj!=Ip!Lzc_By^ZwJhN# zd1dV>qCNJut1BcDg}?ZnK4^MLNzJAqH#8k6@22~D*C&wMxwLq91(M|pzh4qGsRUFm zLbS;8ono>$YN}Yq9-BFmoC(EeTt$@@7jIPk$qRy<8F*9U98GQuNBZvL#L)iv~+fVb`S%BbYZrSgZEnx_P+JsPh~9)Fuh>EPs?f*Yj!s7NtME*9B=LiOGGRx zFas73!`Mwyhs8P-8OSwfER1psL2HYNjr*Gb_>R^s)m?&X!BbWH3kwZy1(Z$kSAz;2 zB15H3v*aCjuO1oxiC!z=Czd}@`yt14ymmf1W%sDg87(a65|2jDknGiq^Jbjh_ZF>f zsERj_d|9^T@~%N~(5&>OqhnL59U_8%ydH+6&s?b7x5yI9u#@qRUEn{Jn@iFVzl;c^ zKPnnM;Y0pB@i9WxMgSWf^Pl^(mu*mcA)PlUk}fIR5+T1b0TAuDpscxDopVl#kPbls z{D09=yq-69gvrYSVr)thUL9-lAI64*QX3{wc~FI=9J=1?^QLqKnjOtx>Lz0S=AJI> zEZDtcp-g#AzhXT%w|Qw=Q+P(o@Iyx-Kp4Gwxq8S#QG}LL(!Y5I6RO9OpGF1LcrqGe z;R&M7xL6l-E`;1L;L|}5Uk8_BN!2EGz-YK58@ANai~N{oU;+CmDlSY=!^_NyO4V#K{84>GIs6pkx4Pxk>jH%O6ST}F_6wdhHzu#X zY{Z;HUJnIiOSp{&QdE)G9jnNdsB!+J_MrBf5mq9==zUAG(~|MJ7-wR1cKS4AO&0rtbUC?x%u>fX%S5{+#p_ z8xZ)`Pc-zevV$q7J)-KU_lsO~H8Q^D$50USY;I+irP4MLdGTIxRr3-JrC3 zu4YvDe6C7Zerm&LH%wE)ma+z=R8a7$ z{Xal$e??0K1;M2`spe-A!y*z^{U};LLo(!AKW+lbBF1QlX}R=K#nnAPhHZ0_As6)v>@*jQqItQxd$ z>sr@=2wL?NMWh^G8Rt8;gx7V(cfR2}vB^@(ni3h@{`7Ur=RpJ)fEx&4r-E_LBOPaJ z5ngz8AbU=f??(_=5DdKMRHejV7<3f$V_{lP=)aMZ8Y;QN>znF>%{GUIOtPdOcj6pM zh4PXMH+b0mFOVbRIH8hG!X!)6O#&0%e(P%Mlb9DnHjV)W0btXtw_|Md6$Yf=*=?E+k0RL>s;Mt?aKHD9v|z=}V>LIwD~A6OIrQ|Vs!Y(F z;KO8p`YbUEHP012&MeWSE@Rd?pVZepP&nKKi;esV38Ltc(9M_Sa1U75k=N1i>wkQ? zJN@UcZLnPgtsC)Wc=wsowZ`|jk>68n4O%xy-Yl~KAxUb#(%;FZm6HcM7w^<+cKBOo(WNPdC@(f zs4G{-)<5X^>olxsn(_)qi3-1mrc4P~ryXixIiAS7k`QglM@@vOO<%ZKTmI~O(!J=p zGxM~SYejp5G&XssJV(yqt`=FlgG7_hoSjf{p{VpRn?v22qo*<8_O7XGZHb;9FdZ~a z=EzNv+WC=}XRHsfH=Bzy<_LpNkL8kXj zZxn$R#|z}$U8cM4Va~SAv-^P;LC$H_(6V?cf()FH#+zU&^su6Y%vw9Q_ab6m0p04R z?e%U?)M%x@`Q3BjTtdeB^_ctJ^Xy|w8Fc){e}?Wg9{2z3!fXJtPI_eTHr*d?k(IV{ zStl)Ie%TOzqi?=5KYG)-gtM_TKl?fItirl=fgeoG_R_y8pI1m~|3*&Pn{MCV)_T&q z^dwv!Bcxq0Fl=WzP?2zI{6^(ZV2p_8$UWi2_rESKRE{Lq99I!g;_qq+hU}HbUvZPi ztzM%J3k$!o?~`@d&*ZnCP{NU^V0y#r8-Q@A2f02|-n$Hn*ir61T!WVbxmbw@bVe`! z-#=p-dYvQUeVtC>PM&nnO%2?gAJFY#Yt?sni5gsuT^lG|RjVoMK-1aG%}VWTE0OkR zqnzco(J22DU+_CP1A+grkO2>=f;L*^sL?ejDVV)?u%B(33u3sO77MEJ7#RD0_e{b; zKiuiY59SJ|fo7>jU$d{WvksiJDxCN4IW5$UaR^%o`Ru<$|28_>Gq6$qvgi@t9T#1l<>cyrw<&y@Z=KH@H~HLbRpe)^Z=73 zP@;2TNHg_>v-=A&P4el9ZmGSAO58)qlvi+jjOs6oeUcG*F;?XPpAAaxK1a7%L{tj3 zV-`3bsab5CWQlUr?G82abp!H=eh@QOsZI7*K^%GQHYe9-hpT@h3M;m=nMUz`3h%-$ zuY-w!I`Y&*DD4oON;)i@w%=Ox1Q{k3sk-)ZcxBz{+l=j6>JDfy;apPt`!TVr<50xt zpTc_8@7)}(ySeJU^Xp8$)d$(K&s609A;#k-4Luz93zX}w2fhP;yAmzpP{I6TxofET z`!d@D8g+Y5@~Y3)FK2l8G+v+b%shxuJ{lb5iod=20C#Ss-`X=##5yKEf0Z6{mLu&? zHct6zvc*0L@nOIu5KFiHanNYs^?QuiL>+mA|QBFL^3TD&#ZR4_Qi$@QSeQp4Ai?3}H+Jk#~)=DE^pJ6XdMo^lmM z?B1~nHh08=wy8%T_r+{}?)c2#dzVa(iD_mWffGL)1jfDu4_hW?vUkOf*hws?Ji#^E zV1qjSu4J#fj~0o26-7}Z5mS)6XWWq+RH+(FtS>9K7xhrc0dab~8CJSA8qfRI%d2#- zHQUe0MW#1eFr&alC^~*noDLzctU_`Eo3^^!tgIrAU#g)SK;x!Kv3f^+RE7 zstv8*Ev;-LIQ}3bpYeQL2PBSFFc*BzZ6o(>0bIN8>A35*KS5&L&%N!3W}x5NfYO8n zuKIP3vCoi@yQy+KGgnT;&GLEI041aAfD={#*+0Gq7wzDTd_`>XBWfK=pnI&eT?N>(%EI^f07J4k9w3cPD#S?!azRj*UW+*1F7kDIQwu@n`yX zWC^oER!#=!BPTdBWH^)QtX-N>=0Z=e8Da(WE-AACZQ~-%pKr(k@Oy~&SKx;87deY6 zl^V^LI^$_rT8Dz1Q_Q^8GjTqPoIfWSiP|hZbPF&wBs2z9cX8}uvLN<0C^+|ZS6hci z3p(hdZ4@NE|En20(cSuY!@*&Jd+g!gp8Ie1BEjJ}i5msn)wbEVVM%|EVa)LkwJk2e zC~2q?z8y2kJFqcX?RUs3;+yE5Y8mZ~N<2))L#}mv%g73a3IcP@2Mw3r+HijwYvJS{ zZ5T7Jh#j!UWVjfT$MoB~3cM@}Ju`CipUYpL{4-k;8@)4Dixf)JJx1(=UmZc8yjFyR z_w>kX{UhFs6!U3fcYywhh%}P`@|<7 znOEnNp(v$rVEX^BRZlUYH?~K(1F|$#ilCUAhDml~nQ^UgaJ0yOJA4QV=lL^Byhx$A zOpaG=N9fgY#Si>HO!i<3JCxy!6@bZ>SkAnCKcB_qRTid0VPFiBw?dSf--9?SeS*I6 zf&8WH1E7n7H`Y*Va1@;0zIhrSK(&U0fSWbqg*$Ov4vot-g=^sISVjik9M)B5r?^ua z%E>}{oYtV-!$onJEIR4=w$A*KP3giSY0@^2$S>{Z>3sry@vh_CiJx>PoZYO;i;50H zBbv+B#$Br1g0rp`f}gePJS|u;%aPRt%qkgS)SuLd>Hnp~YyjVrXyy~)D7k*CEbl(c zBlXd??RRa-mhm|EHkNc#-*_euQ06NRRq}@is6%6)Ja?0XgvM73WlUzeuN!i%swQR3 zArk@KaOEj`T-l8hUJqwdsn38cT6ecr0CLDqi+^iEyqa!4tNnYMK4zY_eEIGqU0_9< zb&9?puYkSm#7qsXfD@#cH%KRBP_HmF4$_pKd57_7h>5mv6y^j^3yV@=21WdyGalhRzQtm*# zPMk;GDDufXbhgs$E&p+^BH$5#48^5-$nlJm2LBk#XT`@!_f1JF)!rYbtUK=`*5$VS z?AO4qrS+%u3cW8TzBRg~d8S43I<_hgJ}>KLh6Y2{(?KdpO|$bSEv;W#F#~9ZB&=fJ zifTfDja)fxq(#BBC$Qh1zrD6y8R z7cXrXh?O@ri#>6>j6P?Oaek!xj$+M)?c8=AUd_g>7x%|!Ltj0?{Y{N8JK2NB^4+iw zlPpr|#0rCFK+&-}HA%a_sd%?U8rm)$)U5R7On$Ua`r#?vm0qiN=ZoTa;r&PdU&F%x zk9EQEFCMOXzKE%q1)by=FJG(vpd5xrc@3bPbK{Jd12^L&LbP_N8(=T7a!hjf*`6{n z-?7aWdEt)70SC(xsHz3F^$3F9R+|qCOUg%4j3&WTXdE|9eaI{g_4S zU1w4W&pY@F0(~JrY9hnIUy+gquk9_H#wI=pr;A)(De)ouI3_UV^;|{awp&Tx5#_xM z-)`xy(Ni*)>7{^aH%yVy*iO*uR48{De5>?Za)=&(&onNTSd*rFRGiP!24h#!(9(^< z{4KIBzMFzjeG!tV$Zs(Y34%wK4={mGeV%@Yf@O_x3qn3>%K6#ca+s2MboiV>q-J0 z$W)=;ac7i$u&J4~0BVQNtyrxy%{#%nzW#e3;qc;VOvJ&~-FpOn*vmF-O0qPVIsx=q z)LSDzBPfOtm}I=MBJBI*j5}Ht=IHh|NtTOQh9}n9_191TL5xb0bD9ztw5((9!d_5A zo`TFb%d(FkXGL1s#}m!H<;!G4!N{4AMY=pjTf=jxDI`{{Upbf7(dlM)Y&WHuQdbc- zgnkBvqHPv=T2b;2dZxyG}`qQCQXH-BbD`RK7D<&+{W>? zUMNOrh6?N>P-fH@s5G*=T|a*$E^<`7?k%56KA;!u$=l_}E!{oTy*MiM{PQoVG$N7Ztca)EK-H43$o{RbP#oj?#vFl8jB?683Xsk(o$4V@or0)^(n}< zJmr@-4k#mhPy(xtq(pHD7HZ@xDH0F$#!A2;hIc{rG`Os>nWaiD{=!MOl83HYPAYHi zjFo7^D}dN%_Kn!MHBNvajR6CD2h1=fH8gE+=$bKFi5#uUsV+Jf!PL#cmTmJ3CSBnk z?6;&*{dt2s(94ry&ryce3;qb$&7ZCa_is|+A(+m-U~Astlx<&ZE{fH8j5nMDJvKXR z{a-^9|L>e(4ZEzf?~ar6R_gf7TYZ3UVgm8#XSyNrQTN zTQj_`vnP?#c>C-JHa(BdL1K!tRXvrMMn9Hh5U-YysEMDDdceyu=dSB zFizGsU*HSn`xk%u!gQibj!+*f&lZ^$yqE3rADg5om&l+5hG%pXHzzoARU7w4M1}Qc zkSfgjTa?KP^i73ScoWJ<6Dyn~mRtWidtYO3>lY{Ge%xwP~50 zgV@|tlV!6!H-)@v-RF7k!Y$hjp;>8m5ynki$Lo?IvN(%??^o6L{wd|@?^{7kLaGLn%`qr#r zzF1$4;5#M!$-Q&t^7-7E7-{Lw^U^o~nec=2$J3&uWu=xNkM~bJk%Vd`I`3Mz8*=5I z?roKl7HX4v700*tJ#;d^OeHnA9CWaf+*-T_T3z2XbmC2iW)W-+)gxIID~~H8Pp#(> zZy)K`W@TZ@%3y6hkLMQ+SdMan>ZEuJoLJJ_KIMj({`XDOKIznSO+H6^Cd?@XW)zZ5 zGkQ~z1b;SOky!H~sy^eXI=w)Jbs}E{i?=>qdRkh~5P2lsI6+G?X+U78FV zUY@kjp>=*l+N!=sD0y#mmy2wysFGSGly%Ut|GHLOG&_#-#oW`G)2GeZ+24qRp`?RU?h85dlbwvoZ?T;Dp8hbN^@>r-n55|Ao_z8yXFa#c+$w9m zFuKjIHxDmyyh_|Phr#-8-iR1<5{iYu#bB4?Iha8Bqzhg{P~C2#_D4z zzo)VJe5i+_I-q4}x(wybTb%9l^aYrH6gk=F0}$3KNDEx-MEiK2jWmmdOuK>W$B1xC zQ^!X2!WBbyLosM_C`YvsWIf)_ldL`Ol(x?Es3_xk)!i4}+7EkTZqxCOTkuE#quwRG zJr&=gBG&;>fz!JQ=_r9CQ6+WJe<{>f6DrO3uR~_PM3x;HuYTc;4Qx1ep&j@UF~=bS zl-vn2_!j`0PdhM)`+LDN?8B0}Ki4wt_MH|pqJfHEybSWgMJyC1%6|T8YB=t0ZNKYR zCH3-Wdpvp7I8}YmC<+l{nt_VnOK!HwaMDX#G&c|S+Vp>`D-|C5ym~#vU^0cfAyRMC zWO-v%Ecxo&={p6;GNgcR{uFTmJu07VUMRTS-MEl?^kzOlRCm_!oWIp+S$YuR&&FFI zm%r0uBAEPge&^byZ(UEL8M8S=3Jj2x<^zu5gP}>^FhNP%!mNdyZY|WK5finCp)8fL zTC+|v2)5_82f{(;dhU@^oj=$|08u4eCBup%Kv))@pBgEmt&B)S71()^rp! z>$PN5w0G{n^_z*mlUnF2#Q>M z`Rlk#zFfU{#n96)ZPK8=cJjPGc#``IcT|lYyWz9`adJi>`aH*k>`tgjJaFi?KKK`c zK(vS@VrKg-qFrv5>O2&>()VChiW(kSovXbj7eHQcvjt3p(_Yb>w&ed9!J(X!+X>nE zhd1-2A1CePcV#hr#x^V|qL?Aa6B2u)iVFm)2AD!$@6tr623brkXB&*kPrxXWqsCYg$A z?{Ka@c!(g--GEE(d63)h51I1c_Ot+DCvJ~6$(1xvhSaWLcLmLlF3J-t?&nL&<%Mqk z5N_mOZ?c`wWCPKdL-xn`zm9R4kDG3@>q}SDt1M{t;);yv7DZ^Q9++toZWYG_@T4Cb zUyX>NJ+$W7nKf(r!`(A(D_RkBMJxfBt|s@{K%UhrA>Hif2|JZ(sn-DDiX(z~6f*_f zKr=jj01iZD8&EloMzl>`Or+|xS; zEm#=+Y=m-b;VUSC4M<~Bv^3A#fcvd?EwFzVHkj2)pC}}H2FmA+deO{qtMq&2ll5{< zHHc_Zl=`{{{&Del-vD=Mq6tMZ)q9{=n0FIwjy( zY4*Jhb+|?U?Sj|1oGYKN2JL2SR3+3FVw#pDAmpDhFE2e=nld6D%R!Zn<{zGlDr8qu z$Wa~{7H7iSV7(KS;2hE0g(Q$vyx48tu@t16aR5w?*C~Sr4=N-j6%Z?rp zNU!VutMlg0naJw-dW&ot*Y0_U_iqEB9=?@0i`SS;L~~Yjg=-e4=M0D9XP_j#aiX{` zv}cxU)R{H;BD*80!|D+e=tuP=@}~|a7BnBh11SA6y>Gao>X(2Mmg?YoDiLqBtSa3%|pvk0Kjir78c|Yxou5b+qDn6>JcmY>eI&LMw+xlFOSL`>yHIUH6q38C$yNoheK?PUHvCk_x!T zpUucjq936IrZ4Awn=tc2=GB-bW{0P7L$CAb1M8MucY*H?IyER^WK<4dsOZ z?}vYagRLoJr9hvZ(ha9K)*TBDRyNghLG6w8IcRx@tgtv(|3B`qMKGpLJh@}&sviPQ zu#?1U#ldJjvEqF!F0mw8+vY8po_3YquTy1xZf+r=n0*$zGNq1y)~w6iWB$lV0q4Z# zrq_#0_3r;8B6XSmdn-GrdQa6o-(haN=zxL6D;1Oe3ed76Aa)YXZ3>=~UrGV;nc`0_90;hwIxS?WM4BFC;mt z3rGsn1MYD@6uFrLUACv3jDgcmb(XenzxMqH%3R&p7!Ly>fo`HR4>>c{BbBr(zL?g4 zqMxroWd-3)S|sViwZF5aEvqzcK>Z|R3S#DU1=(PKG4U-M&AW60z6_2EYxO%NBAT9~ zbjM7(vo;0z9OEz@MOhaly7$=D3FS=|u>fX~nxfqAINP@lBPEf#HQJrOVAnGScqnc# zBj{;x@#@#c?s@z9i(4g9D};y0gDyz*0RvX7D0qj#VxK>HxRZ<}rb5JGQO3ts%l=YZ z3K)d0T2J`~+zgcpApnq61ZRSw9J=ga z;}C0anMP`+BEqu(!}{!z=aD$x!ak&Gt-E^^%YpP%jeqk+EZ0z0;iF6z#EFdoa^3;B z^IDp_{8lC~DZ_?r(`zCK-}2STD`CG>;oMlKV8=MFGpywEVtj_MeB7&>w zsw$i`5t>_Rp$631(&)MLW2d^kX;fP*e+)}X)5JGH0ZlPuq(NqBT7m&hPKLExdH(w8 z+`sf;1wwu$$dX*qw72KXyKa1>Qpx~J!m(AGRlYD{@Q{9kiGjz#2Z(upyzRz0p}T!m z9^+)rCKt$MO;b>u{j93w<>@X$>$c-==w1fv@M5No8Rk=QWQnYajdGU>ca(Fym65eB zJ`u}*bcl`pP9q+rt0A0L`1=3NwMTvh~Lke zn+3rpxS{I3hJa@hE`-EIJ7xK$*qLu(B6_U9@tMetHaVIT$U&CLrrn?qDk>00!> zXzgH2&y$=7Gc3%B5TXvfZiMiYb6G0N>B7dvcU@{X+K>po>GC-x`cl^(k`!I6Y_vzS zH|`Zoyl(ufyTVcMCMNAqhfE0u@U3u^72`fiB`j@Y`SN8d92(tz4Yzocwx*vOMk?vS zJ#RE%ip>Cin75)&0Oq|_Pd5!zis(v#lzQx6BnPy7TL+T~V4{sxi1y7dJF=5Zz&%bH{8`h3r5S7=$^lB_i{K?4Turq~}1T~U{DQ5|$$$1!@ zRKnb!cbolO*Qf{SI9E3Ok4&*qSG^We+EJ@TmW#n$3KV=W9x)^aH|ysGgudEq4n z<{cgN*Xvu}Q7f^-n@gNqoCAk$VxmT;1ct*E#E-etCRSXN_anS+<6_|E(XEO8|A-9h z=i!Y_tEm-wo;)-OjgJ_CE8j!Ls2(6fCI%F|0#745fczCb?y&EAFX>{6W*K)iY$t{d zOc~UdGzUIE5tdUUy&S!>e!>Iyu9aS9-L$r0wN%;@+?&m3cZw4ogP&UMVA)9eLYQmszekFWEQ$ z{v&gF+CTx{JP4Oa-iyEef{pOZUK~dGmG>U|aU!2*h7MY1=j+@yO>=~`98ZAMZo8k&=`i=CrOoPXL#IFkDWq-w z{C*Ee`19`-)FWl>y2;I-o}K*4bTJBHF)sytu3fn2<_%|kxRuVnpm;_U|^EN?QzV6bzoe-JTD}Wt)Z%;KDOsT?u zP)Mb859^N-Q6Zl1GD89TEWjAYNMOdrRvug%ybmjaUY_@@^vxrr!x{A!kRlhhtQHu9 zf+Wc8XUxI19Uy@n4Rn+;zq+>*?!P5|Y*>jm#XM}TDtr&T^7kqne>gbXW=#QhH6~{i zs~-RgV+WyaPu~ZmJUU=ds4ZX*>Tbpu#_nOw5Lx+dJhBg=(o&!wy-xw6J+RiP2;7$T zZq?aI+!i(!vToqmmEIOG#Vp#S-{=|5HkD0B+;ig)&SueXDXOU5J#u@#8lAjL)UY0M zWWz0d^S2lC63j-WKXUBCF`bu+xw7)1^D~^n-qHN^H4S>NYFnQ0X~3s~9CK+na6W~9 zG2YPS?2I!<^EW#%yDg>d885HPsIn{i=lbDlkoS|2z{2(d^c1md%D;0uZ2Dnz?bF&?@fA_Y)eek#*3S2by9y)gL zJ*IJ>BRg42nex?KmprE0Ho}v8@cJ@WDVs4u1xwfSqM$@9*30p~vhOO`7c=Y0ZolbOsi^3$Mb=uay*fFutrMBw4f3e8{CYMg z}|;YYQU*rcG1H)WE>;bnw>10(xPo#2&U))xCag4f_4#|d%s|Rd#MU3ydEYOBY3Mm7m zz41NF&A{Sw8J*Qyj;rb0WD|#}-@E|GYQb@M{aWb4xfbSKnCktNWp&jUsYe0O6a1?V zn{4B{luJEVPx0OWMC~@&_sYKQw%;-@xC`xKdz%AgWH5tjmf1Y1{fXDE zWSnud<9~kjnT=<L9qMVpIBr36VJF&Gj@;A(W=b+^q^KIbY3T&0QW%gxp z&|!a9vV?6IY&rO{OnyEsFH=YDbrs9se0omz_J3ZxRsG`Y8QbD};1LcITqAl42*8#Q z`m+ZX4K^7s3?Jcw0Nk6DFu*mRIH`v~PzY7s9$X=3)PUv#?K;neq!ZY#HB`@n(NKFtNZNzuA%X!o~}b-A&!4^ zYcjY)MrUHBa)Wx1M}DF0J!)B~=XqlHh(FKvYf3=ZoD~8f77Hfnm#_QGl6cDanY32s zjN-NbK`u?F@miF9;1$_E*;a+-&19GarlN0Fs)u1d0M2|s_H#p|w=v~K8zy=$j%y*1 zQe}7_QPL3kue>`8^vJOQEq_#eaT?wG5N3#3y-dLA_?8osCXosi20k-!Y z%%TXYI>7QD#{;bXWM&uw!ni@zGQDYMHEQ2+S+Z*kgmdM@kY4(?L&>^i8`L>S`Szla5+h1?dC6OGrnh74qDOoE8=cT zGmYUj^fDLl>lM?aw4uH(_#V6u=1$r=Dy~x$AFS2nW*2F&!P#hX6!Jey-*Zf2}r&&?1;Qv&}_}obDI|P{GG)J6?4eh@M(~UftJR+XyC3U1jrt{U>R+& z@IgIFG8{1qm_A}QEwK;N>!9MsxbhDE;Xg+Kr1D-)SVt(!)e8_0<^o-9V@Y}Ju(;wM zUcT{nD%b4xal79(Pnv<>Lmj1?Gp&2)dpY<$9O_0A55~rGL)d zsBn@)oKBdXwONv4?9{u!`$3rAL1o^^D8ew7EGwt1yEW?!nP0x_6=&YnLNnBScgYI}C3)O0$CYh{v$B4y+q$VHXpXoY0=6cHM35v;3H# zu3k(Uz<=s_@3NI-tPi&i=hTXvnKEja7yrAeXDKGel@W$pQ+;S&kx)ctz>#Gi7bUn= zjiL{JUu2#cqHj8A(6#-e24$;Y_uHMg2E!Us%Ezl))aQ^$RylO{5hn-l< z>%Rv^6_hTqNlc^q(}Op<2|1=~m1mXhtz%!YQ^#6ZVT;@1%`M9Bn-6iEwjZ=H$oOXE z;1MvDbbgpV=5{fmiypp33a5jT4(tuIghmf`RKy-f2;kV8!*zE_JP_i5MpnuI#_l1meG51X zfnl#_U>Y^O3C-Yyj?)1!12ld3iX63WqSu}~XhGn|@NU#su_hFGhsZPw@u#I~IwHy< zru0xLIO8j0XoD!o92WwN345tw_O&+q#gpEwfFa1>{k9$_^_tt|YuhdbDUw=f{qDE= z=NsWETC<41mpQuukSe}z1IpyPk!4z>3aS0(Ma)RVt)FGJ&+sg?<3KV=d{b9Wcdlx~ zD5|`8k?TtfMGC_>r*-Xt1B%1}b5Q}TH&p}VvXQw1ul)=V`$Om|v-}dlYA>DhF|u<` zHo~leGZI@ksM>fM+aw>D099d!o?H!aNYT>GG!;_2MR4RACG-b*a7)-7R5@|2AGq>@ zk8tJ9S`YSYd&mDrgr^HOzX={rSzcf&mPk;&s~huTMD%7^kL}%~Cn+e$Nr_)Mgmfjy z4F#V58+NdlK}ojMU4ib}D;LWOUJN+&X2xr9t`_iN`7-^v4uFT;55Ck>&W;)naiXtY z+8hQNY8%?z+S&hHfmA}upKHSb&bUIr67kqlwE1`>%IiXL>R43Wd;!(ba|0=1um!*F z3W)Q50$Lrt|5(m)jz|~{9k{iDlCh4KCG1|8(>rWiC%)N`Hp_0wD6N?a^wMDRI}-@6 z;Okk9E*T_cO(HDCux6sMl%xvMWjx=!s4jJ%1w1*)aX0YW-Svl43d7S>X<-noGi99J zQ$2E*;e>LKd*jfXr=G7s8t!~|jF+chxiQQxJZE%MdXoyS0;u1tRbHxIDbeRY&nBdD zf(Q5c(u|Lve!<^EG6cKqd};Y)pyw2)s0rDgyDi2CoQup@Laja;JCYW+O!Ef`Eyi;5 zKQ++QBx1|C$t93T*61POeJ>+e+|R7`a{`A>^05pjyX;)Q+^%8iz_aVXa*ZokagUN2 zzk2aJPM2HWP3AWS1@rg8 z2Z=Jt)Im^Z=ydFcjvQ&;Hg}%m;i8gDBIcng4}7cKy0isOB!22}Z=w+!`(f|Jf%S6} ztAslk)6`YgSUXDV8=D>-2am;$DvR9+gDCtg=o)tHojo$+H=vgtXdKgHky+h|FwbT*`Bh-r{2pNURt7%`g^MjGI^x% zHAkR8dqa|E{Ek-AdyghL)lR>6Bi$dzqWV0xH*5fq2E@+Ycf}I44j%UxJx{B=qHg>_ z|9GOkza)>T=(9#@IxB7JK?Ehv2`f3s!9K5Ki#ojvVcClg7!0{c@;CgY+9Y+XFhdve zHZ1oh%&NH26-}wA)bO8DGr6#*Dfd}ke>qLQn}L6{f|sY(YTN3UZh4#Z#azpO$`>vh zsHfJi6WxaWvW3!3Px-yf!pFMR+-1=nPp~uuj=W(sY@I9$`c!1tg2|kg* zT+?X$Q&;01^PlR(aZNZ6aWqhwyCAEjrODC4ja_cNB1WU45WK{)vmF z)|_i^!Zi<>OWyQp1vE^O@v?U2*?Sh{gJZV1G&!+KbItW8Z=7L2aQYq0H)dz-%Tem+ zX$6RfOhat* zy7z^x#Oe;KN*#@je@A9Fd5vnw{AK=Yu zHAposVW5}Fqv@7L_zUuaiMs)FSg2~*k-8hrjLPCk9uxk!!C=&5D)dYI;s&)$_vpoN zP@U;J?c;R96ni_rG~Nr|Cj@i3QO7x6&SQv=uCN>8RLkp7$^L@pJ+pr)S*#~q&?yvr zH7LsF)s;2roeuYj2NNGaQxLaG!{-AeCii_R#=%RQu@wJlugREt?FDJe{b0ZI2W|(s z5Mj3|F1O0o6EKdJj)u_e@XWsgRmlntRgBG+{we!W!Y-xL3XehRNmL~NwP<07xqB-0)t#!7SXgz0h#NEJ5$==7*^GVXB`P4b>z+J2OZ6;#& znm^QuzB4@$xCcTy#3}TzONP(`Y_Uufo6DEAOl0Z#WokhAja>q)W-+oKniYI|48D~Y zKg1|sT?VwC0MpO?wrDz|S85t`ukZXnes|g4>{W!Gc_$T8i}o-A!g%on=RjJ^r7i^z zjc;CoieI06iw+^)ZA(-7HmdO;PKbn~VV&~gHeAtS#}H3Pi6&il?_t1sx~QIrpj3Dk zxHVA~xf6{uXupd5xa>wL!{LZ2K8icYz5fxFp2izt68e%Q&|`s)dQwov%(oxMvy3Mi zr7%k_z!XlIUMLei6O_ptX18ZRliiGb)NOoKuqy1;>7Fu~q;A|jf5CceVU(knd#ihb zzC1&}wAyKJPc6^UaxAdc@{){3y{N7zJSRx`C`Ui-J6+sF&fd4c51_GT*rhH_S$cD` zdby4ZU#9qZ){Fylgsd?_XLP;Yz|Svyb=oytVP;{P_n-CV;u;ehS%IpJn!oD{w4j>YIsT8+RY zd1R?`VSC&uCbLQr^fym$h;Gvf^bafTABzFfc<&a+(~wPvSs8EUQ_tV@$4vC8uOf@I0PA3G$;LQx`Aj(3a7j} zB|k??!pxy@SpIZ%Nl&^QH4hIT%$h_PGFJ8d4>Ty$P#Oi4eRqZ~rcU+%?+rjm~a?wgKcc7)!&zAyJo8@hDXK?{)BjfVKRNU`Xh14P?=|s!YW25OeekU}W}wCQJNGY) zHopFP@ozY$pw*R6u!J$(?AwS=;6fl^PS%5In25kuv&B zX>~AJ7A+Fa!j!lg3k`eJ5I3LbB%;*F1}cdkGB&o>pDnKv)UYENo8Wg`nBW(fi82Yw ztHmER+5Ww$UEX+$?b}1P8gv;054g=G>goNza)AG3{{r~~i4(9xh>i?$K6G_De^`k6 z7UY0u+zTSB4aZeeu9{SI6=zUJI;IrqDj7#I~4K9bfyT{FmhO6}0lnv^d$)=Y*JD~iq(krr%Pmzzgg zBXq|Y%;eqt;p8mNfjkGp`M2|Q$91Q+p(>Fx^!GnZ(KT6IL(cKNKh9-TByJm3C@i6; zsNoXyAt?`sAV$A-rAyYg_@md~FdyD|556~&Tw3l88>=T2qtflk%Ef5?&G;Ai3ZC>2 zi)nJqoL}&gQ|jOuWYPm9o=ZjGCTO!B-mhAd@a?z9jrfww`ISpz2!&)av7 z-e346KMZd@r11SAO<*U?dOi5jAWqdLo6u0J!b$Sk*Ul(0+20`1(eMzO*wHN%Adwa& zZ&JChKU-x~7t+kIQ>?t!P+Df-lesB8{m;tn5V@9mqk8k;;0%nX%^K4b3xLxfv>1{7 z*76o%kc}_-6|yMVqPj8}f^6}TNc7zY-vw4k6|<54DH{3vnlMMdqHjKfZaERC{j(jN z;m~)Xk8e&9@QT9!L)d#o!~MQ-yAnwdLWo`yy-V~ih#o}mCLwzCHW(%$dW)Wj5>ZAU zZ4hMi-lF$1qeY+5G8lgE_rKOY*!w-%hmNep%zEzUemg&j*TlOYT^i19{W-xxk0q+`E5{QbfaVwU6%;hL?EC-ie*NEFu>aT3L_TWQ7r)HOQdy+<2)7-^Wark}Nw$PA z`)+meu^ajE-U9>5cVFSEHVhiPKYdF0G(bR3t_E4Uws*N;gdJRBlco&n5$*L^9g3VT zLe+oTp4^|}aiIEHS4+Gmsaic1@kK3UL6-zwGyhsbibfXa>i2W|kcMw6!N}ui*0ZF- zW?TuN>;W%*CkZ*u)4A%Yt=^xDZf1&?w1;gL7fPTENJd=jwG7)rS|^fbwoMroDu*Wj zUV^(F?vbU!^VA{dc4pxvP2al~PjTp@v6XCM$w9XZ$7$`wg1~EuLH@$i&Z9{SOEK|4 zuJpGZ9IwpGRvHGVB;I#+i&7Q6^-*`5Knl4asew&qGQyogE%uy6R6s%2eCNA~@q>%K zvDIzxMmDt&d%t{Y!E2TuAA~Yw*4@STeW~OrEd;eeq})Fb-gwB11-N0Tg%nw zjxzbWO}%AlQm)tb>sWdy$BB-&-Eq=1{`dKBd`oERNb%QoFTLl9(kcneY#a$&B#Y3t z-^W6kL&L=@Yu=c-9!C97iu^dI-j>6nz(wIKiRIv#glyB?YNlK%gUMsTttcTelO@>l za#5gF<>s#k0#@l!`@TWXtX84UN-=8>!?=O(Q7Im93#PfCwxTWnctB)+{7vSr6>dNa z3>>rxxO*1NcZp9p3d{epJl||guoiEkkmy+xlQ*p&m`BtG<*0M0O&8@PPN3co#On2M za1z{MU?J{hkNqolKQ|6DpMVA%1&HT> zN8?wvx=``_I<~HHg1_}R(%wA!)#VG{SuRoW$w*M{=a z8HCU62i^$$qgaoMN4rz3tNrV;30arwTVn*dA{liksGM14r|p_By6aOOwr+_c-Ps9G zy1Bp69LVot`2^&<=vQBjVQ&PwgG_DAKKsNvKF?&YV%7zpyy>0#IZN9pp*8+TLtXQ6+(!tk7<#Tph)xAd(d{l`h4G9LIal!Pp_GdI{O%GZt2^m}m1$Oky5Ut{)y<8`UVv3dr^$`-ML(l~r_8{RHd;W)MQ1MfX5yl?w9jC5A5Ek1Z-tcCM$D zNi&QWd}=xk6hm-_D-KChRx|XMme!))$TiK{xFx+t!cX^z3ki%yYrZ`oBK+1*{1^Sq zw3?B!!_F0WJ29!N(5}m1;LKq3=TT|-yy$NU8MVB2piek`-tREZq+QK21+(?(f43oP z?4Tt*nJa8r8+b7lDSMW)o(&si;uC^q=rch(6#!3+X~Q(U;fABT zg)RxAA9#~hG!9#I4W#1!hWeI>XpyXNA{^v*H1Ohx_Z$&80>nThwYUgOlQxd2a2#Vg z+ih8kWr;*&%w+X22|-`awsF0C7gA*n;+l(o_Z=uV=av+^l~PzCloPAX81fl)~PX^uO!7TmorEQJ(KaK zLW~c~gJMfSvf@Ru(E5>Zgg!I=O*C4qJqE8<)$iD7#`q1}ADxEMT}jF>S-30%;<&*Q zHwj2{C&$~7)2%NlDR~-MUR&B=eu?K_Wx*qTSwcm7WBf(sW9jyaK|WKFg{+QyzZ7d5 zD+*(6FTPOeFxW>xyo-(|IJs5D9gw3p z$^Q}9-x#6HdLGpMInO5=#qyX>!ngi7;QBG+Xr<_CuBpR|#?o5`x@?;a#PmK>UsEJc z_U0=y;*{;*BltU5=x4vRL@4Rh>)#+UJPk%6G3z73{72rA)%WpOF`S{U`q8M3{&$JQ z*?6>tvdX;F2-{ov8!UhhgvLU6u3!GGfoNkj;*d|5lu=g0?VlNc-xSd<>Lq#$KJVOk zBxTfC)5O~{rM5Y0ALQ?2>L!Z)d0FnZ(&M#5;^4Ov3smniux|=LlxngWt~{*fdWoeW zXUiG9fSc>iYhdi}ym!vksuPQp`rGoEQaeo{0ZB7`Xy5#>qv(l3+sQCB zRb%-ssBSy#x5!}1u2QXu z^s*4X-WKhE&zw1My0D;-3g7vDtfX7IS?|_Facu9q=U*R6tnwQrxc1R7Z%7=VK0q!Qbr#o{xL>jz%CJ+P-Z6TBOiXG1^yY(=cgw1PT+L6#_H6U2Vx2Bzup zb~zOJE;KB>v8mnT|CZ+E4atmf!wTn;>soz4F;>bN=L7?TI#&5{qakG=@RSiFYkdJ8 zNJ~~&=-3N4CzflWb;j@aV(G!{8k5}?`Y@}$v?UVTduh|R{Nu%86IY-^E2ZdX0P`46 zSpXJ5QRgu^7hp{RA@e>XHw?Xh6L8wy*ndE^r`hOhRlKBpFW)75#XePrvnd9yt55C) z0s*k#U(XHGGPx#fhl+{#u|=h_hCo+2Lni0PuhdPeUHeoZHi9hVH7J0%mSobHq?b=s zXOI|Ql>bcJQ(?|5y$s6vK6|t+bzlPgHDFj+hY(eF*M+S-&bRFE32wMsQFQkFdpp^_ zS)Neh8HvQAZzE~AmQW6)r*s|CPslda&I5yH z-;#mA$`BG%1)OkM9!V7{y5h&+lxCc2Z}-jQlykPee2~4(BWZ4AitZlm(}(}uSPW(E zusiV7(94_=m9plX&Y$h<)RXCI@;dlUyR4rqX8c7J67y;s?9}JFaIa{m*7>+25UC2w zt)wdFVivX~Qlc=GYHp)4zAjPYjp2vSbARVN-8@LuN5Zt7P4Wg2}|8pp8@R1^Y0=QIH>YO<>wflX$fG{ zjcE8N*H7)JDp<$KdxWgLw`#XDvU#WPL8$kbBA`dA0_XR`KiA+rF#fPe{dj++`=GzK z&oNF(;`&dVFB+SgT0Gja!fi{=`366Q~sVpSrn#iz2{s{iAb_I=W~?i`lkJ+ z+u?9Mcq2G#3->tY<% z88b*$KlI&9Ls-e0vtE=)x#{c(kfveIb?PDroGz@N~jOFeAz`9qcQ%CH|{y%G*O*Ypvuzf^T^OIQwf)AZJG=p-=9De2U{L z0B86eKLV@1L{4sE1wCPZWna_LX3xbI%sT!l&ez8(!W~2w{92vQmRj{GNU8ztcT4lr zN5}WW##nhhaZdYejJshZn17!Y@9#1m6}qe+lk8<9Tir_`s=qD#bSZkIEb|aWyS{5` zgUc}_qF+UZrWX|N%Q(%YB3_d&Q(;`W2jIVrjjG7C_DW`B2YVZ~==gjZ za+8LbUt~_e8LJ!lD*!*EiR?_FEF^s!cHiONR7+fN>Co^usrH^VVs}K9S?_-Yh|$WH z#Dm5wqJEm%3FJbcM3+mj8-x(|qLi!Zv*Ez7{d<4X;r-3O+dOY1r_M|SPCct4YiXMs7~aH-7Rs zIOh_5J!Et!`c>YaWcyOh0iwtsY3;$9VUEK38GBjR{P?-WU<$KEJlNi~Wlk)U5CCn| zYwzE;WiWM7Vg4FNv-`GUx(G|}S`988Gg&_5ohVb!2vIh6bq(0kC7xcCsm8}ggK|*C0lvQ!H@uOFZNJ&t>$5+bFwWf#4E*txGjhb zwq64R?;ejra$>NU)#7zfd>Acuwf$PnRq4r}zb(Ku;+YG0yG+gaW^;z$M{D%N zr*91g4|&gFd>KVYL=OI|fv-O&+?~rqFq>t*OrX0Q+`A=o)P~CaMqpS{?Qk3&hPlX>t?@vI8^+rI+<-{s7VQTY9X+ zw`qtFTK7p$0101|&Tk5X+8Ots-;@<~M(xE1nSZ?h?8D^w)IJ*@hNPg=ozAsZp>Ox+Z6%izqEq$>X7rP5o?`z(18y2ZBrV)~n{dr|QV!AEtqQ)}ckrLwDIgK@ zbSg&Jh#xvFY5ckM@-M5bR9bI0ZE9+&SzKCN>h$%S(oE_0BvYzOKN*&<-ZGU&eR@49 z_P8`|%FbcYXLkLyOo;sL$O{Z1@hWF;-{IS{#!GXvb~LY+PA z|Ez8j5xSy_S~+(Op9%gQ>$pq(f{@c`^SimC$X`%BEC$fRd=~<~X;q5Pfit{;COXCw zqDr3iw7wOAu%WkF9QJEm5-yC}(Mk#tQm(erjn{5#&V8?SFK%sNzWV+Eu3re{vTc-8 zE3HU{Djw8l(0Oz&SYD-lE+#nXT8#j}CR|#j?LH>P=XLtHe~RK z)(?hgq4@1+1ztqT8gy>`xp3$Asgk+Y3lbPqS+w0bNDT#rnpw*ws(LYTKGMk3Be40GeK-T$E`zpY7YnIQ>sZ`P=C$;aaS| z#&K9x9EM?g^Y>(9ao@~zJ z)m{Z;HWm=EX3b@dBb0(iPe6w$r65;mQ{;AJF;D@r$7Xsy+GmU^wg=Mit4!_JkGA%R zVR;+HBvPc+`KA}c9k(<_Haq)wd3EqydEk=KNojh zHGoU38XVe7Yq+FRR!7I`uzN)la@Cn}fV;XFC^JXzhCrd4^Lc z!NL2&m?wa~ZSo`VDwKZTti?0hZJBU5bqkF~{(3kA%0KSeZv!mj!s_V)gG@7jImJnC7IHUV_zv|p8650YU@ z{6dP2!ZG`iUjH@Sb}nk-_2_whLx8f{Nu_B86 z5O!=W6It-a(}ni`_6fseEM0;g%`}y$2$i;0=1l2NZ-)&1 zVRkD^OSn&`^1Yms1&-#O93O&y1p@d+o7r_A`vtVUB5V$bM(Xe3#gb>7otJYN!?Z$D zc0Kn85R~raUtj*#Qx^J!f4W1M=NsGLzs*^tz^z@_`R>wg45*hbtD zAR<2pn{@{t$9Ysr=o+#RX(4BX{SGPgnr9@w&wqHEx~*d)rH8N(hI?!pzw>mz+m@<1 zZ!#!x!gFwX?E@CL$ixDNbQ|5e{$0E(5P@4wDcGYx-#B$MCVejvngv!VBucq3H$H!A z&mZHYI9DrosYA5Xj7Q!!{Tqogku#}&k;mZSu680oACZh&&AwVoYVai5r$auOVsDT- zv2lwh%6ewd3l`Y{Mr0E#78e zgHO@X-Bu#^7hSXGK7}#ky89Ga<{AWs>D}#;4Z}ml3~KUUX9yRyOr6Wcmw9q#{*enk zCV&4cz`lFof`c+L7t)m>BiK^uHl4tyoxovQU!_g$z!W0v>BOJ$HfJ)KGh-3xBgEE^ z^b3ujFiWygm2REp*gEK$gSAcG8N%v{N@sITggqQHw7rTY3yysSEN&a*^WF^Jzfs-| ze{sq>zn_+Dx#@X?N{~BB-t=Df4tQ=OcO0IAH-?@}_hLn~~K)5oZ>5S2iEd zCAmt2%(>*6ocAZ-cAXa)iPjK#Xq+!-)TW!K+NPF`y|D z>GDZGEOnXMGGQ`-qWHB&`!tewPu3s*1fU-kZ^C*m!e|j6xm(LevM9|5q0WZ%vD{C3 zyO+6)l)6lNRoZs@qS(b@gK8#k63beL^t?AS^q?!f#k2(mLk2pwIoEL;sT;f~p6JiF zwQAF!_e}kOr;v=Fzus@r^R5<7z@&Nmbo2kz{B{xMd{baQU+f^<>@>Li{f_YS2dase-@1V%%J%V=Rsb#|a55xLq?H8UT0P{-R}|g-2U7`}SMn_Z7=!%c36Qk=lXp z5yApnN(-R=7jD4Y4ch{6H#Xo&6n2-FfvNhUwHUXGX0|lvwS18m($&Q#kdD-4_EG*< zoL@Zc+%~13Y^a1y)`ZRJt}j4Q)_c&$ODGOo;fkRD)$Z_oD~3QPOfrH4C*AQrZcK#D z!V-+O!rZHMx#}wxxc}*EHG>nmQ6IYgg95}~kiWyQ;(*^YoiEgly67f~^>GDn6F)Xm zjfT}}Bz51{x<96Tz0|>^biLfJIH^iwsVl+B(}dCxK}n{Csj|<-mM0$cmDcZ3)MqdmW$`5!@Yf{qkzL~+ zpSQbHNsNz+%H|@WE-^jjNqOAGv_I2p=ADKm4@V98Jzu3<3HfipiScTHuwm4#Z>vgEtB`hTMAZq1N@*^gXxClV`Axcw(wCo|2ZhKckrzvu z80FWO4T66uH&!>*1;qck(TMUs_da`OTlBP;%ToR<&3LbLu-6zilAiuPW71Q@@4IFD za56RiE$$KOn9Am_7({3~Z$r1uO|CI%_p=~2)4HeM(2Vyzzw-M>HEDy30!PU>PS2Q1 zyaq7j5#YQ56{1A-Cws|UEQ4S}g+{hNqA3|Q7h_B)esCh6`q3eGeE9b_d*he)A#!Md z9!DUr3*VEynd=!OKmDSyO)#S!qAe~Dyv z2{uI##rVyi9miC?E4M1_5q=7d&U^NBnCT;S1FCu1=x!yyFZ$poHT~ zqr1tIS0+9!;sMN%hCe)(l@JBeCgTd^#0turZ?kW_ur$N`n#|z|4<5YaRS#t8II~X@ zeUTiD2LguS@heMe7y*;iP^30Ezw3}g^a}xFgR5r0w4ra32E?D};N)8N(1sIb;Mdqt zl2-+D`sa59xfKFET!mZe+RpuR?QA$(S-3i%5%`Zlw5jEusMwJ0`ydXEEcXHG)|**7 zvB+*(4!QbN4aGGK3>}b#`KS7O>MbU+1YT`p2@daD>XFTgk%&Q0xkGeOiK<=yyfum} z19FM^=_(F-!cl!V-tJpL< zUji--;~fq_U%3?@98LT)C)2f-O|%rf@b#OvPBnBD=9A-r8MifYxBS^?)8v#g7&=kt z|JGGjRI*~k`tMRy@4cR73Uk2W#HUC=z~`e2R(Nhrz-{+YR4m-VPQ%H^Y=GQCN+ zL9Zd$HAOEST{db{JaA0=eWLWJq5g7jFV`~Nu|h@HI3Z_h#sJ@9x+U?yeu;mE`;M(x_Y7|% zM5SXC+fk!RXrZH~9~vL>9h##yI{!WI4Rk9lacEx=UcWyjjxF5TN+t!(v`0n2)0u@2 z%D8|@f`?xIgm{nxu9{%BXHHf@n6bs+AV|wjpY30hOew5U{4l9#_nIz9a`~P1lYfUI z!B_c|R%~%2zRY9bmM4Y$=3oCre>Lo1Dio7N6xKymfqMsEgl{PErlTXiQGjYw%C#Z z8qIuPy&~a7#wj^x-(*5HP%rd(TLY9L;NkT-=+%~1);^Q_!S(w^W|?EREr=Vr2H&Kj z&=7nxPuh|9Rd6$TPFk|>+#G!F^v7f9z{S6RMMf!ON?9=YuU=>pED*RpwIF1Ex&2rkQ< zvfo8W7nt8M&i&s3RBxy=O8Fk^R|So8yfo}RIgAFki-BHjV4Wfa-Tg#ZUFyKCy7h6= zLg(h&=KiHW65NfOU7)_fCeP*P9Ma2$4-Yey43}+Dj@uE@7+fdQ zM8^l;f&IB8fg9X9sAOm2G{MJO*dcBM(jHkm!>7C%S{*{DoQ&ut#f!Juej zny{s31^a{Hf9p-X)WAF$EWKZn+3r-`zdUoobJ+A#w-Qe>>lmri7+bb$+5M4(op(Eg z$3yJn{lAXV(k9%Mf1!=Z9f^*{k!>15MOkm9_7>fHE1%}|8MWQPdFR1s4q7sRO~P|9 zkL^UmsFTj@860@t2@V;y_kA>;D!l$a$@G;wc9=SnJ3+Hl^=AsmvlnlK8czyi#P$<; zc`{<=D9zC1j3Xyk;=p>9B(`#Yrn^byVS>{kQ-%rgE}dJ79*wgx%W z*yW#lUmnONI5l}G<`v!M{j#a*PNT z1WLR8mec^xQijj!5~WvdYHMuMCF0pC!9=~;bDz(L0~^~Xj-47)tRL5_FeLsS;apev z-NP;O^NZKedb0Ak#j35#T)-7DHY#MCSC%PMtyIDv^*m8m)?&|;G*dSeWzbZLCc=|o zbb65jS1)k2W>VmX^?9I}o=thP?(^l+VY&zyXaVia!*yiGYaCG#RmO>iRZsmoo-HIZ z5w=>8lO7JS9lHv%1#w(?8B%!p4(xWEp)=bVZdq?v@~PxSoXB(0iBkI5&yRnqv7AjJ zGD|7F?qq9rt9f%zB_7n~Jy7OM``a>(r&cn}94-9QcE{b*@2|>esVh0Q2Z!qMdL|MP zfryK`fM0m>-2BMbVD9INa!EwX5A*c#KP-mi)1}$(*}Ir*=}vsEIV(4)p3Y6*o%RZr zD+1RIV;@?VsZ}g!U+CkLC*U!*iWtCdM!E+)z6+h1X3{>EkE`6>SsA1L>h8`V2tb?_ zr(ZF@--@wL!Cyf%u*gCzQ{O5(wi?zu)&vy-Vhlcui`?vW2vbg$%*I%1(j1nuafw>2 z2(Tee4insC|Bs+gb|mXf*THPC4buIr^{Kw5kgEGyM1)}Erp$GRx2>Hlfs7piVHqcO z3aP&X+S-}C-hBt!rO0;3QRt=@w6*E@#m(=Jk%nl4Y{z_M`WIB$Vhf45w4cNHj5`15 z8O2o?8bPKuqbnl1fLuV)v7r?**1{PXI^GUl&%0u70#QLg@XPm0E{Zfdv|l0+9{x6Z zljiCnVyY!8lym$PciTa38~XFts2>3JsA53$0Mj*M#b7fwz1&6^g`QZ3{r!XYU5}Cl%H4EG*nJt1 zuz#a-B{+p@zY~_U{3IMp5#!@QGa{xTjWT9)%fw>AlWbUl3LzHHx)PT*{q4C#CVk0k>(e_-?UF83lo~pN? zaX%(aXQ6qeILH~%*dC|QdNGLWg#ng{Y8c9msYj6)TUB`_@w?JPe&2?Bi_EeL|Is0Z zaVBr_Za}@Rbc*ORA0?`ob=C-?{nk%QgkNO-BVhfl9}fYcMOfVC@;I@kFvYTp)n6`- z-v-S$?p=CW_5XVtE{NvcxMLi!tR=@rcFXG4PA%_Lh*MH-3UX}!l?WGB5mSb_?6cog z-|qIQsCrTgg)65F^?eI80HMt$Df(ESUYUYBvvi&fVGTN3(xn3<>eT3rC>d$6l!iTK ziHh$l(B%j#%AsXG6#*-?`sMD4B-+HHNhtNonWtO8*>&}q5=hC8f8hsRMUH@g?^OVVF?Ki82=4cuf+xeM?O#Rex$~G# zcDZkPi-XK$A6Jd5wm(9th!D_*HYId>1e-=OMYBlvkua7p`eb=LsyR?-xK_sRg;%eA z*<7)T$m8OuZrKbvp&;YLMSUI1op@P^S_vmZ>Xl-FlA|3TYD3DJRrCgz zMGsyTrKf%l9{i28YCm1RnM-<=L9010`<$$@h{oaR<00jz;pEE9l=^Unn|!?XDj!Y? z^UpF>Up5FY0kc~9#aVAV-_a;ll&1{%HJZNqkHcl)j_`wO+HuUXQFjmp)!R8?I;ElK zK$cj3dA11w9V?1?}(X@E}{P0Bra>^-h z_GAf_AA>JDv?`#68xy>Y+w`b_P={8#(yqZ$w4W3m8$kv+|aQF&K>P$6;e?Y7|sW+ckm0O%su!4 zH@W=O`Otg3K2xO#^VQYQUJ3x9dlwZHa( zQ%pSc+^hs_um2;+#{vDkEIJikaqDzXE2IxD}=At<3GcRuN z`ebPqmfDjxMQ@gDRFd=+UC6w#iFp++_TGVy8mc7PJSHx)NIt(UNG2eV9E{}P%NQKk zkT`p^)&oj{l0xLlA#~6fMPVR@9ckbpVIj|Xb)ed1#$nUcn7xe>+-`N3RG$XSGXIF* zS!FHIXIOl3zZ}ysY2JbhuBvPV3-z}2nQ>;CBxH~icM@#AfBV=Mlyd_TEBI<(_|?ov zuin_Xxp}&9XxZsu(&F$pA&>Ku>1(N&j+xH&RdQhMskAz+hp8Hw`n+59^OsF_u!P6= zP(ln(XA7tg6mtRG;^F6^R_ZhUtyax=c0VCXe;I_X$C6HK3!<)h{&kI&cqXPoNI%dg>SUf*osSvvV8w1Deu%eLd@p z*Y4GEMly<0E@(adV%LtPh{bCKv}4k6eW5`q9`a?L!mycYtrU}L7F!hu0^-N=G1}{Q z`$@AqQMJdS#g@{|l@xUbUeJVM4~)4 zgvxPoCtY%_^b(~anda4;si=Y%2g;z~;{!32Tne@x)fD5Axx5QtqMjgGtgO3bQW%|& zAy$Rv72+CRcP72*$qkA>f6J+_89%EJ#Ozu~odwun9dmqvtn)jRz2uyFikwD-DDbbUCCxl@=AitKK+CH{ioerq%)|&l z=?Y4Gu(8%?=xTfI_O3XtjaRO@oG!O$XXJZQO0YSeDYho4nn!7rBXiorzw|9C`c2Ob zfHo#2ORr^AYnhFle&<*y^d6z>Z!2|EbIawX$c#~s2cUkogt!R*g6cFZn^u~B&5TH! z6#ARI*7_m0kda=}Ijc;=@QRpKzR@HnII(I{?^8q&=c7=wo-j!O&`LoEVZlYB2iig} zK*Y|9GMJsXqKUH=3KMrZ^JzpP?Wxx6hlWzr)MobVwR(1lPV>*$lE!AuO+##^bbEts z+BNUItM0~HtRgp%q-m$y&AT%J5n!$Qv1`_N`?P&Z=vc@C}j()Kg%eI1#NHZRVXjk3gnbr z{k$^+i&ZnLxac?mb=aYWuvt&am<)Di%a%Uq4NSJCM}Xg;SR7?W>VG{nW?Zsa=+08? z&bB5C`+T-^c{^RxP%2a_GjO4P3D-}xzq*gO(BE_d*S%&k9e-@Y}cW`dF8Pusv&N5+nvRoaZ}zUkn`fC zwpoBmT#vb@H(PXoq7#K}*fPzAnXLtL0_3cgvnHJtp!!jjJSi}dzAMG`6LFM*(Ej)L zMro*ju`%pPo%^stn=aSDT|+x{vC4NNZrsL~;S$0FOaY@K>LfCM3os4O2Y86N-nJT3 z16{R~0eT0EKI+_#$1)oL`rE zO_2ucUo<;08VE@9cseh#4^qKCs_fve;|@Ye`P3r(wu4Wf=Qj*DLnTL_x7&1I(?nl& zb)A~R8MTbF>J#%7%cXKSLaWgTjRE`S2)?0Os9~>czPTSO&%&SXma56P^vmBXi*M5E z=2lw%To*w2Tol*jJWvgndY?WD3`p<((tmmyerK>!i51U*0nU)SU^wbuOalA|uD?6G zKl0qbwU0DoN}__K;kwpM6!J&=S#F~&MMike+dCjJ2+vJ9#CKyYDOlqZL>Y6e4cw1B zA48pYS6OiJfess`Rc-cYD_zz#v&JbrN2QH(3fSyT)9;V2^-F?tv;RaFckAh2Pxgw6 z{Izl+){{^0C-m7sO7r|W9B%|yo(k5BqVP8S^hisS>31*>`lPElh>9Sn2=dEf4US(q*wP@+2dK%U1GmD ziB~Cck@oDRCIJqFzS4s0kNOj4kFq@9*~ypwYz$w1nn+8nxe^OWdrHrwzSH$lS@Z>g zLw!L|F+16%bk_!8kGPW*l6T{~rciOxbWwU!7AAn_$JJAO!i!!hML?KmgBbux9vm-- zor_2RIXowIcii6T*|3=OV8=916#!N3c5)WQbIWak6$g)EcKVH#iPWucS(F>)@4OIi z_qB6hn`og0uIZ&a%k-=#!_L+urv20N;%f(Uw=Dw6*Pq4qOqLx4?V`$5B8e=u#wHTn zsh8iT)~8Jf*bcIlAo;LKxu{m@_!W!A-e)K4X4$;T(w&+chTop1blvp{+6FHDeH9fT zCVPL^o*xRGgsI)=3?<+d8sn+;*MUP#tf2u4e@&j(&9i(pS!!~p+j?1NRj!7w|YZQWJIC2Ul-+AAW5rb@`c@7M`(TyU_}Y`Ks{{s;XK@Yd!+p7g6^@wf4*P-O|W zif8`LHx0vp;TvY3ZrN~YC|Jb#b^P|6qJXPxX4*Q|-a+C#qxbfkr-L{Ds=hOK<}3-- zEg{RFrtFy)0?Wgm)DC0+;^dvm!TMdnSxJcFyWj$dK#8*vI1!;BygF`@`tNm=bO}YV z#p0U6Y=yT(Wtsn@-|2>fg7@l}%PjF;H%0z2oHt*g@0tEW0NCE|;O@>_wpqVJ?G<#8 z1Va@H^M>|xIFLD|h-!6tK~-ThRoy+ZBU6i&O_o8i3jp%8JBxhMU)N7qYiLTWJQs-$ zR!l)v=-=OcvTw%9;m&_?JD|fG${>Ctrah%`A+qFGCCS#f=e1-z%*=Ge1ulXD$E7cG zt76YqgH0*QP5q&3j>94QwD6wIs_fwJ#yUBlga>plhMosy=z*tuC;e?C@XYxeS&4@bl~qc_)R~aBj*ysM_=atg2&KeNOO-3gT;reO z5up$&n?BDMq=G->4w>r3JrfqklWyi@%wch@ITnS2P{88$}BQYI!p$h*Ic!;n73?Wc$WJZ1hyaX{JA)p^Am8RiX&6OAM zdqTMKAi+yBnM}$|(fWxyq?<`=cFHfj)dBs*3R z$xZ2E7ET(Xj%b>2Xw;$Sj7+Hl8SzgHFlrr#t&n~d5vJ;aZ3Jw=A)yd&OJXt z>HHr_8q0FSG0DAIw6li}CG$m+|5&M!4~X6U=ASl!Ipi{B-p7yUs_(Akq(Yyy+vyWS z)NmE+LY_UlSOE=P9^KZdv(^u5xDtJC;xjjk^$48^?MZ~`)Ir0wy~C3w>%n*OB5oYL zRD$2XC(DeUzUK7Ga6yCW`X&?2`!a}OYQ;3XzqF9fgF{zEa|I<7!X0y0J)ya7e4IH{^(zu^*x_*xJ(3eRIl{OxJK+eoMDPI z;@dy%#BFYvq5a;g@t6jEGO(2%rm>>*ui4_xXAud{138ABynAhRvH@j51+FRmj}mW| z#>Ew%njiF2|sj zsLEr}E=&pC^KQFm8Z?4K;^kbC39gF?&tf7nocv||dE6#lU`#7Ti%RmNbvfixv2I(q zmM0a_uq@fy^ja#vr3$5rQGSCa!41-rX+vG-NhB$DiB_=YuluvVLfXPN8VC|4h1LzlOBr7iR7s5msF%zBjN+QzbeMfi-1L`e^bThZoY zfMNf$BI|BbmefTU)r62A81C_sj;`v#b{_iGn=-as`P7!4X3dmL@jJ#3ch_6p90&AF znpdSb0z3OC^xBeE&(*i_{mj+$t=g6vBatd7FZqTKhinIY26>?g8@|ikVg+Q9+0jT-z+ZN?60H8Qup#-hDy%4kbfDfGlDWK)XO`J^5iq(RC( zCW9N6CYP8gk|nsOD)T&49Qv)vKYx6&oJ00@Bgc2{ME~}oemQ6@tWSwyaizp9e2tuO zMQ9}4mmgw{dGa)Q@Minu<(nsD9jM^BEebsK`0c~{*Xnou<5&`+Q^20OUIuFP zM{B_L*l5q)Mr9HVhwo+6MS74Gb88g_k+l%Eb@3Hi6j*Sw8WlN8>Be=yBPySH==r8{`NyK$;F75ZzH#1xQ^phiCwLGQ=Hi`tf?^eO_oMjE37>T4 zW&SC@j1V4YyxC?(_EGW-Tdd_;*Ajf8`@$c%!3!?l%M+PWB%6nJE9;{ixW|<4tFFs& z&Q^szllU2$uxE&CbJ-sB%vt4Hw9$%89(BEWkGoR^k(_RKfzs}=-SHHEj{|5s4*~uZ z{W4g6BCWGYQT}$N$(>e?kcvBB5%C~Kg5r?mL*1~)pME*orxe>eC^|efkHzF!G8J2# z5+y#+o4j~a*@+??)M-m+aPPsc1h0gfKt9oaEr>+3-kHqP`AbI5Ks`wT?QJLw*vT2) z$~d>Q$2`TD^?1@*fqfpSs}?&0-g?XM`2k#G_R+Oo-q6tYraIy4*(-;-fssy*$d`m? zWJ^85Ort)Rs602*g!0hf33znxTtNR!qB{0PoOe#m>}FT1;;TY|3UeH!;u9`{e}oU6 zX`$T$J0}k^gn#aCz=+@E*s>aCpw6>|KWNwa;@mlb4Ph$<#me(G&B%qfo9kZ(6u<<5 zgDl{sj?Tm5E2qZ~1ShFqBYTHm5OTd_(Z3gx*Sy^x3HTN<=ALY@WWbDscf=m|R*7|r zxf&>=72LX6xphMAUr%j^CWboL`xdWqO}(O*Tl${PMHu@jZqt0~Wav&}S_2vzin)ZJtRNSIYJ*qJB$-tsMdE6-r z<^9zuZpfE-+b4>hKDgP{+*(a`B17|+avu%HF@WRQGP8B_{AG~=k>q>lYmKz{;QA*Q zFxS{&5WI`&8w`EEpMUosbAN9MVM|^WojeBJk}ehRHvT)c$kih?=a}aBB3Wjy2)h=t zeU-K-|0#pBHWl^0-qbLq(tw-6*zEqbe^>{Iw%tMhGvm(T!+ZoNxy`B41 zP^@Rifl!;sC*N(bL~-y#r?{Zwr&H%_F|>{CPLqaU4+&jcX#J9v&i~=-tpA$+-v5t@ zf{03oOr^V}K}A|XKsqMv=w`rR(hW)~F{E=$Vl+%zTB*tCAs{6i2n-m!zR&k>pP#-z zJpX|0cFuLqxvt0K{*dnQb~-p1o`vt`rGt*F=6kgtjPt)OPF-0@V@|3v7aa4Jn_)1) zH1nRmwJ(ntO{`U7DH zV%%E-fS`-jFFe~tB?-fmpGzy`v17Cmjud4xtyq`GGd84kSSxwVTq=xNW zoeL`bm*!`R%!SZJ5!_Q(rw<`R!kjaZrAhaLs$s@hDbzivk$OiRsg*FL#e}uU%Gg2cb;|oR^96na_#vy;%B>VG}BK<8@4N z|B!(iGh}<>i8%p4Ol~({KJvWvjx{zJ#_L;7;&ELxk(FlggekF?v9UnB|$bX*6A1aE%rX#PG>0E!@O)3)5xzZ!HNBb zS+3DY!x)ZV!D&5?pL@Kj4f$U%CwNz~8AJ5x)C|)a?MFbg$@OmY*ITMVDZXYdjrAS6 z0{+#_7W70}a^<06DKDU6UBB(y{q*Zm&}r@N`h}-${=u`~SE1b_54I6wZk!UoBv0y#{}3549WuF25*_f2#=!@dZ*6s5(Wn1qLt@<= zkT)qO3NXxab#%^jh?iM)mGj2z?eB_w-nEyF%8Kje*5D?1&zW%4?a>>TsW*Xc)= za>|pKYdeUk`v$AqEj5Z&O*tO?D(|v|L?&|s^sQBpb<9}y(weR^jwXd|59VO)PN}6Q zQg$^L8`uUPLj(eE`tH<8AD52*bdfDR!3?c;r(Mk+5WNjOd`9q0DQTI)&q$%Dp5t|2 zj2{mgUyilt^Sp}*ul$y{QK-?@(5@nGgrGLNs0b4>*QtSqtey;{Qo$VS+EcqtM2Rw5 z1cuVg@?Ipo4}PC4y?VbCJb0tS1~glHL?da|(T@HadJ>@TxM3|YC>7LuQFcjHFn9Py zOZhgG$%Lp8dCAqkD(pGHLDN7Cj4tg64fz(v-Pl!!-E$`gt|3QEqZ!%g?H-dy$=TLAgU~;G%pa0 z9#W54{nspf`d%OV&jhVj%C!vf38ZKhq}lCwTUl$`32aE9!ei)Y4a=wyPilx-+BMs6 zdgZ;|xC|h9wGmI;`3JN;5KStE{;424gxEgtEg*yM zhoWUEyr(Wvn?rn(O$)HP*ju}ZSwhpFPs0=f>?7pL(zbCYUeW9a$`q4iHWc)51=N>Y zfKvqwmduW+##l6n8fp(rj2^*wk-)Hr7N%Ax)g?BGta00K?9^>kxwp90bmq7kb1AH0 zknB+J*wh{Z&;AFB13&DNg)$v~Bo&;i!=AK|LXjk$V+iT7U~!1Z&zbZgt}cdpfd9qKro3Rvw%T!&&a*0WK;DTdwzA1jAE9y2T@iTX@AZyO^;akMhkpd!^*9r|YzldHh-o)|Pb?#Cg)AiwYGNFguACZYmC}`U{TNfT2wrw+n=J%1dKHU_5rG=+LRg8C*MphSs#Wd_&o7GrKBE4-=^8w7 zAM)?1@`RX3;FS?XB>k6X9wrne-u~ERg1TB)U!ESt0C9AS@*Ef?qO5@JXr)K z^xk->;I=nzzVE<7QRe+Wk4+}Th9I)BaBA+EFR-8IotU(uB9Fr;F$30eRQJ=JEOh4(Fz1WV0s~&?cZv#4m8}|wF zFcYF2Bg?mDB6#-r=c1Xu!s&;J2#1^>w+#l&xt4B(bwX*6 zccw16FQ+k$iSESK2QBdH%*o_ zr}%w}$pEUVwGrq%iRVVe9>%Q-50mYvW zE;zLrVyEX`5R7|O>FSA1dumWa!oF4ev|~!&#b>j}(j(z1L8fBePRwVQ%OZWaV!irI zh*8uc|DwoYqCrZsa2Qi9Y3?_ncddSxf%)gaYAZzJMB;U{_J>jvMPv!kto8H{^hhGv z2T zS7}7?c^1cso-6RgV5VNtyD;4fByu&?a~wRAUfM4>J!W`sxFvY#sA#V#>N#gjRWl`2 z8_Xp33`f?-(9(iwczF%;-cDZ>TWxzq|IJM&Thv}lc4l|rd+W>p0{o^}e{N*we(h~+e@KO-9?SsyK=udf2ynls-1v9P=6ZW> zPfliMUAsLy1stONvUWwz?Ar?;`ihl*sKxzXiT$7l(*IE~z|7!r%MUI=Fl!=^Bgoc| z)B%dX9dl?J!?aY0>s3D_+e_CGVYU|yleVnTq1r3{twg?7yaPN({N2eCqBhglo?cZ14I^=oLj{P#lfeBiRD(9d}sw)JnzOIq} zbm`Zr%O@5K3tQvP4X&vq(J22z`*#%eT=Pf->teec+g7W)v(Guh7Zc zt1O!RD%S*IY5tf=#W}<&JtitB;VHe`Ev858_6%nRfHEF}M$pb@ueu{~R+iSd=R}6u zz1jzw<>v0>8~B@I6YSyEW|;4PzTMN}x_TRx*ektP(FsfqvvB68|50RJ2p=8QR=(*d znleCVTeD#;LBC?-F*9BGE1PvI2hTYR+3CJbSZyj^s=~XqC_oJp@fmCHu!@Rr5DC4; zalh%(G+u})1>-SqJ6^_1`MeL;|3G~hwhv~-)s-n8{YcsSMgR{>VbRi z+Ppr!mT0`^zjSALX2f5amIy`!c9+;t!6e99JioTjd0NxnWyQBMvz0aWpm<)xYcs<< zx~87z_Rxn2?I#tFB~+8{r?v86_{RvwuG4QW>x`%c{MQV|5r;_v)>FYKpCYUJo!UX% zdP~JBzUB`3 z!$T|r=UmA@KYn&iNZfO8V@$Er&lWM93H&JQ$;ThVE8yVWZcFi-uV+tz&$92scHIER zh3X{BWI(4g5%O+w{HteMI_38mo{z6aRX=6keI4CvpU@K$d^bt(O{qY<1_H$D34w4s zp_b+wESNLZ8(rmJSA6-qDh+K}elxkKoL>u9`;X%5H297XW~BykzlEe@Ut|dd8m{vQyFycJ!4cc!=!4Aox=FN1G#1{blUV1Du2KA^wJB#MTR zwWN!%eAiQP;H0y?9ATyH-cP|?4dcQjxGRED&?W5PF~4__7JV1`~$>+E}PRf61I-?(^sOZ@<7Ixt>s5p$a#x9MGEBI#t(6 z9IA(P#Yhz8)zNeCRAD2fvJ{_l5fLv)_jC{*+~j5swg&v8H_smoE56VqIVd)2l2 zCC4fie~op-g+?i#yZ6BH z-@?N$+5ep=U0Lz*P8}q(T$GtdTj{6BJ-uq^fw1iUMeE4;4{U`rY@9X?^Ivz+&XcK@;VxnwpzfN{k+Y9Pn>T-FHe!!+Tdh47!F1zI8JG{2TkV z!B(#SCKyuEv*ujt$YFXyO7*~D(?8o+1)f|W8N0#bE} z(%VoYKPSAE+<3^FbK0Z@J zD2rMulu+oIk#3I!rX4*Q+%7uPDFT*gfjIR#hYF6^)8<%x8UQty0LNLju((m zXOnwGam^R(4->!0P*fts>a>wi#F5wat*O0F2aQu-H1`kWL!_>=`T9({UHYjtIua+;?l$ES5l?|f0+8-$4V!m`v&S-PVQeQB(!+H4Cp~OFqQxoV~*+N z55HuYL6rxM-_hU)+xPoJ%l~8(z!@l_=#PlDxr=u%`wb%Xn>z7pw zb_r4`(iCrRyfii#WT*Pdpg}=9jQKHIeQf0=&1&YHOG@rDYa=Gv@W{Suz7bO__vd$| zwz0FJc;{qBdM48UXVB!BVHwr`z&NQ(T&)CUZsZ-fnmU5V{gp%qTs1njhr{VwOb?oU*3 zmr&JBR4slG`=G&p@b8@KO|xrO;N!FY8;BR0G&WhO6g(nE zYBjPuY*Ido2njy$oyxJYXO;yOlve_02MW9vCc~CE>J8xW$+|EnNd^=DI_5lG^I3qt zttF>ds*UF6A2;;)Yv|q-!p~Kcrsb9u4~rVK{dS#w6NQ5J=KYYkO^H!1o~qp64K_R( zhYnsl*hC#X{B!N$;brJht+lDmqVP{RIQvuB+-0u?>NxdVsKC$ppr8H|_qNCfFS?3( zN~)kBf9V?(e%F{$b#2&gFhT#b`6V4ROCrn+7Fa0|`QzpfvI74gnM$3vNlVEW9E`nq z7Ro4oBq>_F97W2h_sN4Q2=pvAEsIbk^gOrTA^c4Fk0LWQyPvC$!Ehchk_PLKv>2!{ zTu}G|;RnzDzi{j8Yw2o_S(r7e}|QIhC(Z0Mp@2$LdOADXF&HK%PAO>XuHN~+2CjSlWJJIoLL za@|J7CQL!?`znQ~*#iJKva)=x1S*RkG$6`OEB9VeHoum>I5NNJ#oZPCUNFJ%{Z!Zh zs4>H!Fvk)Vbt!K4bR;wPd#sCnvda2kx0Sr_%rB^yz_8m|L9Th>e@D52zQu!D(bA3mL|MA z)TTby%OL-HZAAswm)5qjwBV+Hr^>b4TSe~-aqm1me&5I%p6|5~&oUd|ZTi(X=Wyl8 zjl(9@g1ov9H<`0@;PD>o4dC7EsTIR)!H|&Bvd`}Bx4F4GS~_)JULB(r4>HpNWhI$E zoDRprBuVk!gj{@ctYW|{E`Pl%T5`u{t4}p#=i)Js9gk|> z9J8q8<{%LaESo9;Zv7tx*4Ya}dM~A}d%E!eWR(RYV(ypV4=$5tRSOYnujA4A`2H}a=eAbk+r2dOL9}a~J z9#t>jfck!GvuVc*OGhlUGMR3KKL1?enw%6t4Y}^xY9$COxjwRYg9@|D)L$@n@@9$Y zOuKvd)Ef}fwu$*YY3QnE8DjG1Lr>0diB0 zX&BI%bKq=aKgP~r{yOKliq6Z&YUHyzq0Po!!SW5#U4KRt5b`mS8Hm}(0!013#iwvq zsD7{f1$y&W@?eZ#ZYs0cA~d8woAv2jhj_JXuw#NQPkC|sMe6Gr1CvzO-*$BG`-*x~Y=xyu+A(^Zf!L`k*bCkCw*I{rAu8&w!&2(1!bIqAgR zgH;_?LYo@hr6#N{5*`ylDaw4%Cn27|s|fVJvO$(0p}E^gGS&o*NGS{@)VbeBEvRr| zh$p*>G`#sbhPS?bT6og>34n0ejTiOs@SC?6LO!}o`z!PfAYdSdSR>(f}1G}dI|RaTWqT?oN8Vrrc79a4KQE0xkxS+<0W z#7Jm`OLnkudBzma;`4nj!w*^^0aa74RK5(^k0PHGRr>Y@cFR#X+)q0C{^;L;;KYDa zp82Qod_Cb~R|ahn*)UDpFQvB+hD!=&@`~njNac{Dz=eMYFk0HT#%5mFMl;AkNT3Py za~HJMjIZN`VSQvkQs{JkHmme^-Hc*`Lt2uh-U3=Bfw z%!KXY$oT`LKk6z6HcfIREYYY>9jEScXR4xxtLg@B3m*uqFxt<=ZR;DQxvrz)mK)fY zxQRBHHT|0~V>Zvc>n_1NM@y_rZ%_wA1-&zJM$;pLjx>f6sVxb)8{3FVi!cUJYI!?@cp zM9R3bF2Y4tAwCx=KQP%d*vC3sk+W3o35STFDt4LzKH$IuMF*}sBkw%#Wcx-nMckUm z`LxUkcibeN#P0!=sH@$@fU>g9dLX?jwB2-;b@_GIbd5+R!dg}HCyYaQ&fRTnlu--_ zlGCi$=gWcE_ueG8C$xmsI^#K16nb@Mzs*kACKtyg%e{~&W^JqzNRjcNUJOixAd!Bd z;JeQ0BeHCiX?73+v+oWwUdDXm26@FMe(M~@+{IxBC+Rbd^8wg{#N*kEnoCA#>TxJZ zh0v=8x?e;>63SNxBmR9Z|LOM6Rq3j*B)yX`lciIO~*I2@0f%)w}f=LiA4X&0_rNzhptvNzu~g z$=_2Bv)s+oesKZT3OkGePq7VK6D|*xf0(Oe(USO_qsdx?*tM?W(s|PRvdYz#M%t@Z z+ZGRJ)*AyQpw6o&5j10cA!$pVbqh+vr>-Jc_b9CgZ=LZWAbKb;k9s*HtxwV=TW^|6 z+(NEkQO|PSM7_O*hJnMsUX@~D>7{R@OT8A~%U1;@L@I>kWy9e*DcHMEZMAB)VpBd9 zBryHQBpdB98&MzygkWVjocua~K1q2?3QHTb6R2u1{$o^DOa*_FERTk0%pEN4b@OW* zw!4d9;gf@V)Iex89SK8lI$W*)v&`hVyX%MKv6gpD455*H-QGzUwp`eHur1%?f_;!K z-Jd~QIo=eZl{jpC|5Ny}Xg7w$M?nxJ(+Nxg2(QLYCVj0iMpC+7yR~y4VVkwCecI#i zM#u8{-)Z|C4Tx|JPMp2&%ANG4WB28O#pQUi9_xT8Nf-9!MD(qPXtDC687|A9-)x1^ z4>yw)XQPW+)1*Z{medty40F94;do4p%Cd-_C!zXoD)1M_NM1CDY-sL1j*l#Cmk@|% z8NbDw{A&!>1hL3^_w@vb>z0=;RQ4;`6!6wl?r-*7Y;T(EY6_(->Rxe-^mV;&QR2+P z%{Xb0m*Y`YZ*!T|l@nAj4aoB%!eNhRmGAWuPWpmP2OgSCye7a9>@&5};)RPg!kL#@ zvrJi8!NsJ6B?E{%{bcXkjYST=h=xZW*aK7uS`+g+y((A2K;+ki&Bz)>nL_kQzq`Ff zihi6$S$>7J&6ebryx!+h%i`@r?XSJguH_eH+d4rLx&Ho7ct3qrFFv&=WQ1`N-<-J0 zBuR(d+Dm&frBl7MpQTlLzvzo=c*mpBw8I`zMIR6f2TfN)ry42?cC|LPcDRPHy$MEXQgEu3f%6_Mo(Wj0tn3-Yd;lF5n`p;;h^JZop(lVXHcL zPKeRe=(Yi#LjY|y)GVv5RoPUOu~Czo_Gf<^>3gmZ{2{)VSj-)=FY)I2O2{1f)wH7Z z+CBqJ>)=S?yhU0xdJ7Z_L}B7tRtSB8%A5sn2zx2$;^#qCLyjD=SFN|3eY4Yt%((TJ zK(|O58U%O@Oleh==9gLt$+ZVa+gV+t)M6f}TiSB8)}eGO*!Y=`C7JodBGXio z(Uj}+2zc9$>`7nAz!wI}@F8Z3gPXob*M9sqT`qtA`&6~(#~D&S!$n})*2K45{#THC zYLh`hH~*ktEh+@WO=S$(n5%J}J)5qaDc!9e&*QY9uU5sii5Sd!N9C-$BhlC}J^Wzs zhuh=YNnSo0@URejN|c?Pu;Id7FINMl0R7?nXDcZ|*OTsQJ{-K3aLn8A?8_P@^g1HS zzWmkQ(1snW*#_G?M9s8ER6ebb^}Lg0zp1>JeRQDinxjGwhVY(91x)LCH(N>-m`wgu z@cb!iL?*yjN}t+1Y`p-g@Vis;^D13-B20}4I(9Gklu$Q61eZ$dxK%!8dT3*Q#pf;L zCacWdo{nqB-b7H8<#V8VgKD|%k*C5lukCOpVstL@5luX!J9ZWs~ z*qk;JM1}<;wbf7;>!%x&y4t2wsK!N;@!Pw9_iEiZZh9i*9%tyVsRvXycjI`;bZp1J z(bId5i7N%E!nWx41ibk`a#hRI9dG7rH@K52d@*fT4CK;~->${s%uX=z&z~K*F!4#g zqibQ7!`#L^DrK1fSbIdX+Hw*ClDfG|!f$;m{czLSFMVGN|D`PGi6xRYoEwHnbm&_akG&;K<%;zlCXz~OJ%PYsZrE_EfaNH~q#rC%W z2}B=1U8b)=3$~|Hx-hmqtdX}QSsX8ei4(CC5smf%2jE_sJ|>I4<#y+e$xBOz?0;Y_ zU~d5-)!iC?Gy=Hg9-KyBs8qkFSOQ(uc1}o7?(f%Ge?07-8iwt?(BLNbm6KJ(~Yuw^Axnn>1QPXlLVEuXX#46(44Rrvm#HuNaH!^@)l#RaWBN;| z%aq!W-6P5=R7q={>wGAkUUTcYOunb*x}qbd1vEFmIuX^O1H5d)Nk;y_sdx9?(&HKO zja6N0Lqh-FQDbn#A6x}7CEml|op<7e@IJ>h^W>I2li14x^_tw@l%!tZeQl4Le>!EI z+LHyk-X-$q1R*r@wy`B#Q5*>&E-qLP-(T;@f2;ZXkos>x*0X4J+H2P?s8v=FnA?DO zAZED^)k7Nv(m!3P$N;;;J31qz$5XUy|_HqRp_}c&Xorszs1K`6nrQI z=)IKWIWqUafU2B|l-s?`gmKWvmFdT3gYS3I!yXV7H}N;~-9A`18d^aCb9GmNa|Lce zO-c-MwqT(<6J-%S)|dk`-SLD#i6ejn0Gc|eYo|gDEG~bT3Z9|qK{DO5$s^~c@5!KZ znPbTGX38yd;{}1 zu*w<2TB3MR3^?<5tLN4A&wBE;Z|g*N{3Yk`Vs$;XOLs*&1rEzu#%1$4wJI7k4pSuQ41AqT zN4h4AEKfiKr=CU;yk}}wc)HO-Cf>I3!*jg5A%3hV^>qtEc2@`(^GxCc2g4 zUx&`d(4ef+mVY+MrRAV_q`yYpw%5$#ag=0`U4tG^mMC39;gL}4jv0)HDnoGOiaKPn zm{po@(!l)?&#R}G2E&C_lHEv~=Qd_!D}qX|O6;sMP5tx=>9I3W!<4|AtoQ_vUCXL- z_GKtYx#WP@2w+SiawJ8?XOfUKA{9Kyq00w&NO`*rt)nUV!dYQOdX^plYiqF@UaVmi7Iyw*! zfmv5W*}AhWu;IBc2WKr!dcbDUO#=sBNaUr)+r#<%Yd)U#yeJ zMXQf%u$kcn--PitwvY}hAx$6}MNZKu-GbC3C8x(VFczX`9OGtB7}w7!-TL||^87&i zOo49uEcc|W!hVDbvoz}F<&-?{ZZctG{~Me-jCUDGNmS+s$0<|Jc2SU@)ng$WfEu-ZA)a*S%O>Zq z&6J=)*-F+2<#&oPsuPA@>b@Utouz~oj861fd9ap?9y?t{zmnoxeN^2)L2ZbjyU#jZ z9@jHxgtU=}GOXkc;T|nn$ioy@LVY7pv8iN%4Jjap*4v+fUmYPJE&d7aXh<)vC7)4o zFrB$oG9S{(fO!CS6}jyV-PxLBj^w-1g5#8G%#G&^(MKgdK}qk^1-|z(8(!%q6MiVO!@Ff+ zTF9;7hXuV4Z1;NQii=US{F`@pank3iqZwxPyT1D1L*_7 z6ER`bBp^ho7yENNM?LvQX?}LxzR;0EvO3@8l<&Q^W>n!NEwuVrmZV!wD(C~1fMAptjYTnT{6}F@kL4J7ovqzDxw}L?UDuH&XD#f& zzXd?akX^T->b)!D&7pXmKp<=cXc_6QPTbkKbVrxvmszP5?*P71FQ=;~LcT00_ z*XF{-7~<6!+AE(FZA688YOJN|e3MPKrb_oX)g?Bw1$D=@MYiVVI&Y%B72JR^5C;2| zoLBl!62q96p-u1y(EYx>mE{M^e|r0rc|Q9q+3p`fR>u}eOwHNq+%0V%EC&@o%ri4Z z18NsA4vd$H3wulsA`Yf1Y6Ko9gZoaty2y`>zFv@6u+egK;|ZjbYx%fjHk4+LGk5gf z=tye_O1_K@5tHppj9lHG-(aI0ERS5Agg(*c!z%8LVg%nbBYjbRB@Mi$lEIPhJ7rCfjugZfCwJlyK ztr}!!gxu)};@#~e6dwzbWI~bKxWIvY5iaZk%Re~DB1>L6%8+L!#jJ#|kaM?epOxn0 zMY%ysj1-qp&=5-NqFkAWtW-zXWu@HBCej%ZdH1x44|G*}5LY@0&IwF-CyZ^eg^s6p zRe!BZm_!%xAu0w&O_|PET(dO%Qw(uy_E+4;G*K0P!hW11V&xD2TIGtPiC7jdLqxyr zSEz-ED9!{a5dVU{vTV~}7-Av3{m(k6;Gsjcz<_CnSN%W*zbZ{^|0*yvf3?QvV_3R7 zpRuhsd{0}nI22n7?|z}kT}?{t?YiID)H>COxw~b65~n5^5*ltcHVEYIoBuX|QnLncGRYcU@zQxo8GJSs88>M8D)rdUy!tE;Q@L>v-@ z`nxCO^y44j>;6^2JthtGQ&y!UTz(R6py;GI;!@LJiCg*>e(FDpBG0%>&_(&te-v|T zE3@ImDg7C;5wUg%0~w>UoaUJXUPUAuQ93Bki0+IH8?^#8GZNMK2^o_Z=DwPPAKKeA z;76Ev_EmcVW|u}Ph>bLm^hg0fqzWO*Pl?en)xM?g0xe2dn{w@uU@rN~4rF)WCST!V5%ZBKx~f-Rwq*Uh!r~q4SbskDb6ZFdooVLH331CLaa_4i^ywS> z@;wllF1|*#a3MVh z1plNFKd%t{iONdxF<(I=Q#Zshg1TL2;;swRZP&m%zLsBg&Wm1t)l6pFcT=D=xxTW; zT$Aynepm2y23u~}L9q28GFzv#{Yc485%tL~qm%_Vvgk6gIOV!EdooozF~Z#Slx(VT z3n4zk6x;w>FpKbxFq3QK)}vrC?6@nwy#F5siTf$Kl9YaYOmaoKVqct?wEVn$tmO;+ z*?k==p$5EY`tE56VVq;`3l-7SWq)9Fd~-XODoq+uVSF(4jwzVJ>Yno8U~0tz z&Rn=NCet-&WzSx>zBy)cTqv%8eXq2|F?l0>RQR!zQ?S?@7vp~0t;xtr!?#?{=}s8WY{u&71vX5a0ebn9*T zqe_;cJCs~2(Ze6Ke`9|SlIdRrQSP4NA-N|${Z-Il6M>%R?3I--G&T52d(xxrA_FNs zAJI-TlPy=l?C*%Kh`Yp_>3Chha79@9bMnJR^=kyZT>P&ARR=e(8mgved#C=uw2Hx0 zr2(KxWl{+9RDLO{_;zO*C$?5;L+$%sW7=8z=+i4D7unB7)q14@Ka3K~4MiR#wQ?6H zr9sM1IPUVGsaoVr%H{nbV=rd-hb5DW$FApiZzSr>VwYxBK8I?U*41S!S!q3NjM-TE z9QB~;Ym2j*Qw*Pe&hFgelfQ47nQY0*%PXF-%92FhC^RkWJD+z`f7;yAo`-Hg3tmon zD2{|kR_U;AF=3B$N>?nIlcM+BJsyvgs3ncDntryn*fQlYRMDoz7S$o6b3tvc9U zdL<_%Hm+URepus5|Cnk_f)hgqY;F)z;}z+OpRaybRKlAE9o{FSIDhoi7tIU)YezvxVd5TVjYE&u(Vun zJ&_BXX?;uN_-S;kw=|B^|L9{L(2iaAhy}r`bxX!y#W-B7k2<_!8&7qS7_E71SKp}L z8EE^uLiUY_aWE+MjH8YSw&4K%5OFJRkKhr))s{M!49q^;ca3+RHh*LZwR>^UHp-=U z>+au}*5)asCuf?coO!&bh~zaN$9pf$1W}p!^WQycC`U^wYMWOBlVDne^1i^f{qS;D zhU4Ng7kS1Ko~d2wmt8-O%&xPh6bP50+~KZD=-&=%US-mdC*04!_50ctC!KXH-F=hA zFS^*4b?j24jkRoSo^rt2!xX;`H!?ncbB0mbSIRwEr>-uY+k)qss(8UyvXv=G`2^}q zs>c9ryh{qp+tS!XXllSS1G5+lYn`5L;K}7p8P|xk*GbV_P27_S=4o}^SSYPwy5bNL z^e~gE`M7wskcDPL*5vm2hby>Uik`Yn4<8>rG1=e$E+sH4pH48Wml9!sO^v2Y1*To! z?kXIpjwK7z#-kcTLh1BpoPn&h)ZOZb3Tlnb5x8r|K=e#~@^5s4EWLWtYbKzn@1)Fj zUHhNP*-3DmTh(eopM|}gBBu)HH8_}fuaggSm<k^o;sqqQsi0yM z`se!7dgu9B45fmXlI(?&La2f%N#^|30j>qiRxi|}RTWflbEPw{$?z;QID_{@tM>Rj z?c`t(reIwHhzFK1v$J%yVzk(gTYKZ7Bz!jS)REjys^0YbLy|M|;FrHQLr%y_S1AVd zit~J@1Fuz{4EWAs#?{!_Ly{1AC;!-w00af?PKYI8 znnsEBOjpu;Qkt11EmXzmYgaV(QB6~}ft9-I-6+LpDW?=E-r&i-V$Y@sz5NGIL!VP% z4>?lTzo*@;7$$K>yvbr==E%!SkxU0qmPex7_3r~I?6|$ic%h?YHofV+d`-dMHaJyp z=I@t}>M43zuHOr~iNP+<*?%@NBpUHTGg<4+MeNxH(+o41(7nTLiHp4No@QbTe>+uc zdyb)6;oacid6bSCz3KT45<)EM!|iK47<$0bIrhR5lcMi3mN`k5DaH**ctzMMe_6Rh z2wal;Bd2(V-P3tkS`Z=reL{AvU=l;6;-(vbwIQA2H|sxg$G*}P)e5=?j3l!PJQ?up z4o+;TPw9UARUNqLNldOoM*Zo}w$U{adg|A?t`eN4W^npSt$XMyeXRWhU!3 zeFUo@R`uck5%!j0P5poTKZ=APARwI* z(%m@~X#wd5ksOn*A%iL19nwmT&e7ch0@Bj3N!NzNB=-63d*gpy|69M`jdTB;YiH;E zis$q3^hp-mtXFC~uob%%wNJ&p>fA^MJEY33zm=m@_G$`3xtO_$;64ZDIC&ggJaQ}0 z>C@3-+V)o$>P8A18!J8tI{JHYZ+6IA!c%_em1lb6T$>ws^N-bzY{D(naEF94;df$l`r2DFDDL0R2hA}#XCAJ2VC@0r=V|-t+UMFrHJ#%euf4LJ9nFgLCw?4$qk0LLY@QsnwzgX9-E42m@$XY|^!|fv6|((9 zccL>TIt$x&S7A1?5vGxdp9M>C?J$Z*C<=n6_%;-0-NoDlF4~WGyk<*k7ME~_2J2pN zRv!%8bi96ALE-f3>e_AE!K4t;(f`CJdRA{KphIbQlRWJTp21)x3Qxe43$v%X4HhPQ z@Fj6$1N&WeDsT^<{k^9=`paUR%qHxPqMIFHhugFjzN5!dfnyEGSCd#=-P=#8)lhdt ztjp0!HNktf?AXB@&AFb3E~dJjw&n|vR~1jy$Tv?c!hGNt880YjtQhWGim~nkEXFcJF~#Xi2TCQfbTE% z{+~Et-V(X~Q453R8^8~W5s|2fs3=9__OKJoFdA)?_{9`yo77SZ{nijOJKv^gG0R%MtKo;A%V6=3|X#y=cwB{t14-FYXMy))DET+N8M zCPXphm&sM*!yz5gI|p=4fAT5mHBVc?nj2oo-nS24=%~AAF0FTBbtjVe^3Ge=3A#ot zTWU!@12p}QkgYA?qmw_E_Yut8AvS($33BJ!KyOuL)8IK^+3bb;il>ughDCF^kE~Y7 z;j1YbcVPqIME6|NLFFlwkd4tV>A@uOHaF=}S%zEDWU)(TlMYLKtN;1oM2R_>g$9C) zLqp_I=byK{$zrRE?JV+?{NlnDAKs)8zOjD3oV!cK{*n3Vt0xp|Q{v(RC!2)WVPz&X z?6|q?4xBcm%$|6DW`)koTa282@vFuewRGk4$|E4qjcMIN(~s;pRa^1f$aq6#En=kS zK~pbd@C90()FM1-Jf>^ZNBlXvq~(GZ-IjOfXRZwT;gA4aw&lMm(AQ}S3TKl7j^ZjU zQ7@RTVOo}uOl7(;4wEfaarMl*W7)~}i!qF`K7+W@*lNB~J1vvkmxs#Avbx46^+ zxeU;_ecV1UEk2dl~eSFapLMN;CM@; z$ZR`5Te|a6#&aKH$G@D;EGFI1?YhX1ios~@fejM$i&Ck=s5@2g^MVs80T#ZGDIZU5 z;Y3>?PSv!7rN9GuE=ape^zFMylg{lMxIHrxQ~pg{Q6VyuUVVS z)fY`(TC84a^*h1xwJk>d?E9>{bJW|;j=8c_f;LS%we0XDD-es8?2Q?pnmhd45s<0B zU$*X(<%^BXPdz!y!qMBV_ahp^=N&IFf}-;Fi!?t(MH%iyn$t%*l11956&{RU_08WAxZ-?MFVNWUap4(od z*Y;~cFMV-H8-HivXiM)BfiGeIK2ZE;ReZ)f^+%?c1h;yaGkug5fJ`cZ+5F%p1CA9g z*c_t6Qud-#`>wEz9XTuy6-X5nW^mo*W5pjGh8q*a=d>U8XX>8-AX`I6qt8QO3^Il+ zG^~EQLOs5P3h^g3HQcmwE0b1tK5-u^1ka1pV&g@{-BeaIMb=wSNA!CRL_R4|&n*Aj z`+Nbq1%%;7?inKu<(TyK-f-m!=OWCK-Yr|)g$VfynDAo%Dac1a)1y*y(VcbkUBtvB z6>s}PKTqh_dxe1z?(P};?k~v)*BmNtGOI1hzs{JVKG&Zw5NddIJl?AX-K3*JN^!Rx zaE!cti#h)f&wQ?~%MeX8V6j+-u;zLDt4p)&)pl+M>h0py3gZSiXJq8sP`crvW~*r< z+@4DsW99tM8k1dd)IrxDEpGO3oA{(k-$E--Q@N<2QtWY)km^UP;`n_ss;JIYnpX3@Lqu_la%F}1^cC%vc? z1f+A>STt!Ut-#n0G5Tk&L`+q9csPUb#{_4O1Y!)`{k!a1pZ+Fg{QPq#nuO_LZ5+K zZdz1z^n5bJk|qCuS|H!KMcR&*tG|GDA+FEk{l#np0rp(@X?f>FHiHd_j*>`*bd3ae zf56nJ9sTG}QdYX7ym;T;UTWb#NpCR}TXjjF=n|w3umJGpuzX|&qDlgxeb5WXc}3JM z<`m7hV!CAAEmj6r`xiyKo8j+P`jx+SI0Q@~12ekR_2(3WU=Z1v_bn(4#+9+GdfF#FNr zmyX+*?Gew!m(`z&)||;0q_21Z)r56QdW$B4f;65a3O|Q#NI<6PCU&XbXqmbYe|!2p zjHNhLWAft=m80qFRKESO<}Y~f<3j`ReDZt`=1q}x2_ZyrN_tlwO*6_AU`s6387+ua zQI7@!2*aU=olsXbFd!pgwsKlv07BzhbFa^xt3z8KX7?gT<7X0F?%oOGv*kw7$4ZSW zAh*}4L@0n)KdwbeUO@vYRYAd!lYo#E+f8ku;c=n0Ik%K-qgs+8J`!bnRE#K#Qna|3$`D7R`9i5$!!Zzjs-P5oivQgBzCPRjqmU@rXDM-BiI4yh( z{McdiC8&!fNyFa6C--o;d4dT@JmI>-w7$UT-;mjG& zT(ba97#tvNdS%chBRw}%J|QXbW*j}i_EY8gBj-bbeGl$e@pLa&yBSz7&8irVJ#j z8ofH;OqO*@@_LjE`b)8`GdiS42A;shgLmm|+p=J^)zHo{m#ZuwL|HrX1T-YCH?-M$ zaPzZ=d9D`15D*}#%%J!5S(4H0DOVF*+oPV;B|Bm~_P%%)H)Y=>bjk8>wOERU1S3x* z23M4ezkyX=qenVcT2i)y1x)5_HG9HzTPcU;-ue#s?w^TRSVq@KFv=K&=%J&IN55eV zbjZyifoS|8EGtU6sG~OwLV*wpI<$DWnz zAU4mM*PtpgWQ4w%o1$v;F-cnGx{|%&Z(U85%#i=^1ao&gu&RKqnk5e8RW2qfF%JFk zFS`Sw5N@2eeWl>jmiUS#sSI>pO9pyZ-`v&Ml0n6y5|j0T7Js5({infG8}7^%pk0>T z1B7?d^((eYoY5#4-wfS*!i|<^;a7mRSYW2KvlmZq7RM!Hx+u25VMOhz+}z8=FCTLW zhT}a&ZfR32k0KUpC<@CkA&aN$lu7xl%_ZUlBUdXSzcu^DxE>bs@PygoghYB$l`C$+ zwgf_kix><38zI4tZejTRy+>3DGV_(3s#Np{Pvt>uWle3J$xZN;Voh^ZT$V{^wvEQO z^Y47mR9vHH#dh&xt@A%5FsgH}x~7iO6gztaDkli2NHwYk1~ThLQeVYHt#Bs!rq#2n zKAYv^C&{DI6tH~-gw~Iq=+v0^R~!HyLsTn(ODTaZD-q#*fzE!EJXDtJmhj|B)(3+_ z$FStb>`Oqx`aucHLrFM`!}M>h3CWg#c>3^+4rngZ$3 zKMPWqqQo7UKmmR^;L^3@17EIssTc(5Q8!2rJKxi(UZ^`?I#<>bIYp{qF&lTRF8t}K@O8wLtm@O$|S5T*QX^y57BZ!;^fMY z3SO-byW&HB7BaaD?Im0Yh%~OP#Vu1@<(IKKQoZ=&$n~^H&ESEOSN}78&l(w73-5$n zPhHakxB<`?ibCY>Xv&!bc7e8TwA~7>EdVQAyAzqV+Iqr=B7XrDc18ybxBr&#WM?B* zw0`PI^rRN`qolBnkYYpXz8*ty6_4RY>R5M)Z6~pqA2AN$@Y?pRbAI0)I|rezj6af$ z(sXpB^*=1qg}%=ESdEfbv#uAw%;N^}LJ;YNE|y!%JK{M-{b!4&$u@V^9byB@b04or zQE4ORV?tf%3Ue5hO!`a(53ky+(b5GB)!s#l%9-Axf%R>!C|F~f=@JyZiohO*80$I^ zqb~fKl@c9Np|~N~T{w_gUk2N%I(uws>&jSLbe+6%pA#f^+>Ga#WgoIP*#3f4Y`g1G z)x@)gcd%HnpDtA-i$$qLvkgaasbT6bm@Dv{FK9a3yD$!|9GEyE8~3cf&>)kw#_EZe z&0-Nai$Nczl{zqE7*{16xKX6j%$lT)O*~|K+C@VYdZNr;NC{N$Tgq%%31{V|egM+} z1#!Kz(0h^_FwWDKso@~@ zzo?s3ASDa&NLcJ`2p&lb*&s)W;0RrbRIYVTdY5tOvhKA!XtpRtNp7O?pSDk(x*JlL z@VL_~1jx#(Y|ECuGd$+i{q%=fjO*4Rl%fq;AP}WAw(oF8M8D*>AVAL-!VZ*9l)^YehS#$Xu(or-l;WnYI^9Caz0{{T=B3-A+l*v64VK5{-;>=6>JdfV-`<(E-^WCzlv6x}CDr!2n9M6rO_%DSKFuJ}!i8Jqf9!WU)zR*UWI`V| zd3`-7ezu8qmSdu>v`_)jigc*!VJKX0@Lu5EJVbSi5XZ?pV+E`0{UyMiHeofl5_e?t ze)&wg@bx5&#vO~F)N~w#&#P&&qsv-PMQyoOS$Xquf1vf-Vut7fXM+NvdxIWR+5>qh z&$gR}(uhRv{e#8IZG%H}f(*ZRPV;nT%}8Lr;xuVwqNQ#bEv8Z~F5dO_lUW`a02B-M zO)~}>#8ADbi~aiQEj^r*80_z6g>aFA7yQDvWTD2sxiwtR!VJ#tkw zbfLufh1+YyE~%y24+_CqjtA`#A+9)PmLE=00mm({BNTyvVWEIN&pXZT7G+wDb09+R zq$UPcprbV_D|814aQw6aVNA_E`nqV#ZF!v-#lWTy!N+)ghnU>Qgb;xZErKoe;Jp~X zEf!PVd3a0CoY{<20@t$Z4Q+$Hs5g7}>?M=7_WomnN68WI-z5iw`T$Kbkq}OVHT6gq zPKOS_Vc^R^J?v=KQe4!Gz7THji}P-PgCP=}u6%?)KD0EJekuIubL8 zkl7Y`;ixjz)R<4kBCKd(k7in@U-QTbR;fO8Qg`Pt<8jBc#r7C%iF}J2jbnu%hO{OYulh&HGgw|T7q3m%oa-o@)ROdYtQKQC9KzI|I$?>zmfL~Motra$rf3pO zcEagQnu=9?=q5Pwt87|P9^1N6s9ep3j~DCO7E6~&)JGEFwBZmww9riVQkQ0})i6t^ ztt%ZH2L=BkX^^%yIOTbBb13igmz4zedFU6$Ie#R+GfR4AhgTWqRp`gBIU7)w<-0aB zuW?VR2}!5sR&>w(8pD7jCnPW*xTC>c9g@yEy72E{!*r(wM&I;jMMw+HJ6+aEbAgf3 zZIMwX>N;q@KZLDl?d^v!t64>vl4%Y#^Gp`gtH9p+9Mvg&ILPxSKJ(Mq#~j^y{WwUc zI$*_ly9JlzBeQ*WQWdnVhpSevTj%yIr0Sx5kF>|?-iMBWswOPW-w>W3={3V!I~)b8 zlR4ZS5_BM0w|;l7@cUfc5meXVJSwC)Yhh;mkrMT3tp&CDABF)!j+KiyR5f~)c z8S+toRNj#~&ZzOncI|jYhB+8#uts_E44UB89V3yo5=$c;>{DK$0K_{vWjo+;{9xb*8zGe$uG_BH5}oZ5?cFR<2vF>3})s)iP1$>z90h_G|xdaD2;_{YTeu&q*d#R-h>8j03<#LFOF9* zu+b_~pvOf1!*i{B3{Japz+|KCanc%EMT;ybDOL>QjHP6dWFy|cqFlyJN+|Dhq2&bg z7kbAEKi+io#aQo>KL5}cyQO!>On^dTY?oU{$@WJ_a`^5vtU1}D-0u$?{=*CV3?aPD z061+j`JEw^*kqZhzZ7rzT^~(Cj@tr8DW*t7G zicF*n4%WhZt1<7LpfMtr<0_`TU!0HOjF{ltk<)vI5I>d_Fs|Gd6b6XJU0o>G$&M5N z9-BP7ANj|vE0)f+!@HuBf?Zz4lx`rE>7I=xW0I+&>K zX=02xi~cuTx7T<=9Q#l+;44jG{E{icQ^tU z1hG=7M+t5NE?StxAqpw2T-nHlPn+vV4y3t;OEIojq;V#*$0fr)tOn}VZZ;YFF zw9Z?AXk`xICXE!^vdAzUtITYdNF_#C$@J!X;E?*&HVvPl%#_aR1ncJ&klNeM3H zi1P!r8oBwwxneql0!E)$oA@x8 zaG~3n3$t9V@c6$Z$_E28d5gw>X8ebjrQoTy{;lx2Pl2~Y+UWM!0U*=o{JWgoc;ech z5LWDN?-#Gkn??Sqqa&KaO#@4T&Wm36(QALwtV6Kr(&4WB2HKg?Us zWv>nc{O}pBly`e+Lm2L4XD@<1wuYx8u)<)_Xow7|Fah!jw{VY8=0OiyV_wYe8M{G` zdw5VKgrp$pCB^5@&TB?;xO>D8vQ|n=&?RV(x|Oka_~U8GFM05pS@V_t=6&d8S7f;r zhkQV#;`HIdy=ATi(x}rYG||XPZ7b^AGR9f82Q^Y$107Iz+xDO)3mG%HHu-h(eZJPs zFOF%V{g0WHhKLE@#;-x!z`oxdvaSqy{K)Mvzr5!phWWhJrl*xQRDSOlYX8~aj+17W z9jX1mu*&x@4w+22>Q8Vd7^Uy<|B5gVHm-zk!edJ%Pjfo8Xi8@NVch=q`^p^Xw*j~u zN@bbfutC7_`s=~%&2TIS_$9>qX8~SbQZexN_8>t+d@KD|3aGPO;QX% zf9Z_|L|r8O_|no%!f;-gC>vU9W^1!nwKgr$tBHhuhSDm65c$p{H*AA!F+Id6No7F{ zMI9!s-=q<&t%r^`*?5?S$SkbEdG(xsi`eS+{*okySbqc2(#gYHOan|kZ6+Mp+ai~v zfWfFGgh^IWNZ%2{gY2+{v%eRIK!<2oL4hxFa*`qy@v8yD3jg5|Z-P&cbiGPekCx=Q zu~Fo`0Z%sGU^#nTXw7SD-%Z>|2@VoOnlY;i&XH+VWdOA(hqk+G2%a={%S-MVEyLJud}}BKRBNd|H%EFs?tl zrOHON(=~Uhx7^sDj3x<{n=2txI6h+CUj5ve$Md<9JH9fe++{bnog4wPfT5R}+cS1a zitcu)cy$vx%n*St)CdesZGN8za9me^**IJ4ajAz7cHP*RMmT?wqHWV=5qN`Ei$SpP z&v?9On?Du0xV=pf)g&nSd9H>tPLEz^nS9x4>PX!1@$eGrni=$tuD&|&`WPc$yu(uT zfy>xaKl`QoW2t|m2;1LBBeqnRzt4Jv?_Q$HivK4M#b%WqVu?^Xy%CC*H4~MC&-`Vu zqVvVsTl2PB1shB6Viz}PS~Ib1QW+{AdKI?gv4u^;gNl;^!*Vkj@)-^EmCe?&V{&uF zx?;JDD^oPQV?5O*sp|WAI>|(iXSu1}4c#EB^hj1(k<5I@ex77#qqBb64>?KJ{z!IZ5CRui6 zM_7r*xl<9q_VdN{_pPsB;CItx9l%gfc)_uSPM{x&>XnZv#PC)cXRylJt|}yjIAEGe z!G)@=9>lL;E;;Iv&?a9uwduhSzFEJc)iY`f9mSK1Bl+RluaZmP0s#T=j=u&JymgM1 zyw8GYyY$GRvIZ&Ww6_Z**y#KUpTOeo7_PG2PP!2}Pg@|V!rTf>? z92bXYj+Kd|Ce{{AZ((^CrOe`e5VmJiWrUS za=Uf4g_v6_Y~u_#ej*Xjhg&mu`dcTQ=4hFiJ1GPpmX!t_(Ho7_@gA|}5UIBih8I%Q zoheF7y{(wLBvbaDi5u%X2SnID40#68z$66X217b1iugMb)Sx+rZhJb;2EQv8F&(>? zJ0uT{t%VQ2I8v>j&z#n+H>{?2YW7^BvRYkJ7;X4fIFrN>G6kh99KkBiE7RYp|H86j z=n(3kag0$VG+_c=1hxK>WCBm0^alUzi6biW+cl{pOh-5ck-Zf))tus17Rs068T}}e zt;r-~+crADMi?h9l5%6xjoM<3LvgCi*6aWaU)G~GzPtGpfj(Jky!BikbaQX8;>p|u zepQtWPamdVJ9|+amcabPa~`Noq*Xv7Sz&b5rYWez<{{{?qlOc9yfxzC7MM@s+N-px z0EYf(vS@2HWNx5w9i-tya+{O_oMYp05iy+M@vh@WymNz^s-u~CYe+J-uFbvcQ*(4)eAOCl9?)9 zO!b@nfo?sJxj`x}qfk?~$f_=fPwr#UH9)pmNa50=_y6 zhIcVJl0B;oggb2o*0)~@hx&m{6sjC{zOU+CkQCRl$S1iM* zRMH^z4C&n5j1>;Gv=2KkF`P?T5w3PoFdL#^dFw@zswYyA7&>VPhQm#-S-GD;B;0eCOfrD2FQUW zfQOlCSHNv;jl->LpKL4L%iM@K*?7$+3<#Hgi0+N4m8^>eFk;D;F_nSMN(IDo@M&f+ z>-07>>Xf@9b7fYEd@Uon@HY5#oxk7EjwNZuQ8>G9GXke zwe0Y9eP=T>LUua^6K>VFu)d?!wlV9VUzRr#Mf>ho8dcb#Wj`fSrrOL_3&`lmm82^b zj8C>q@7hUL1$jKR1%-mzEiB`vg}Iz!pBXsFeRxc@$H|1EOwX7CA4+D^n*IK{WXjh5 zF6G~6nh$G%;Z?F`zwq!5U$Z`z{SnM&+8GoE6j05|^2q&~{&|mche#oi>zo+BU;)Q? zprF3vL2V8sG3{eTleCvYo*!n)v|t%;)gx$6Jt)?WBYB0tqh;rxQ<9c5qT)0Kot{qF zfzYyv2?x$XozRoZa`VkM+nU)e-x{+Pf&lErh1kiJ$(*v=_& zcf-;-in{t+pm?#M8xzkNO>B9J?eqDTR|aH8y|Z<-CM()blp2&NiAE#2JF3(gulU7F zo`#%mc|X7-pV$graREI2=vPMzvIuTTatju0(yIa+E805muDNNfxRF@Kz3DNVa(XKH zgAVtH0yFN`*_4t9Hx~0xQTiAm)=%O3CUKa;w1ZN(bg`CHD+mF`8u#%r2U=`~@1Qq|K~)E0H9duuDm-8OltjiDU5jc9 z#bfMK;@S3(D}S#Hzk}MWJV>$NUSZJN4DO?0hjg)JH-i6x>HoEjK;x5s1BRhwUCy|d zPXR+$2@wg?i&C%0*!vW@w#qw47Nar}VF)3GfgAXzk?$VgYKF(nxtC7OGn_M8ACfXV z{D1-Wlm;k*M)3gP#&V@#=yro~we{s5@dIS=|;P`;ac4nM8 zRa2RHu4_OYwSA7a_n87h@l9a&|I;ICIhS1}Vfg;TJD|j=a=wPf@_u{x|GUT~5HCUt zcu_KO5Cx9Vj?E~)1QDV9s;eW0nnB9LvbSOLlqt58YbiP&g2{SJqk`gNj~eO+)w$m4 z&qRtdSc%v3gi?6f&Q*Q>F+Rxu>XF|MMYh4EmEJcJ|CP%X)5P zy?pW0vV8166>Q+3kI-agBGHW)vzP6k(G%6JoVMzu!70FZ)k(*%T~Ko5VYy`auaR;D zD$#w#2l3p1Qs=C);b_Ouv_h{o)h0-&tEM*_@iG+5(t%{Fc|lJ2DY47B?IixgE$+-3g*KTeGbwtZcHn1 zyHx0KA??9L6(*?90$W`6BNy30i&|CXe^1E;_?WX?_L^uMO=N<+&Wa`uX>*{hCGL z`Y12odE0gfO0k@;Zi#a0EdBitWyw@EK^IA>^fQ$Hx$s(Gn#N(Yd?x!RWF7T3EE+5* zW#uIDrLBo9qL|2}_C+tnZhHA_S+gJid__dO-J=|L16MxDRjLY|PQKw@<9kTrlmGC7 zSOEBmKJ(7Kx`5$Ne<(-)9vu?FdMz$+4OBRQ8s15op!W_X6I~-HWCzO4ZHHf*v48P? z+bAQe`sA_f!7-Wl1{-QKTG70mOl0tr(p7Ugu|vDG|5Nzif0R$__*8N9au5mCb6SnhiiL#v%m)-GcGVIIk#jb%O72B2X60CGuSjzCqj=@xEU zLP9IR(!<3~<>`v(zLZhqs5^ADRqDp>mL5Bs# zT1V#VN6J=H)ApP!5nR&8@3;c*ZqXuNy6m_1PaJUwqf0kJg{4#l^?A1(f;O-*qj7XA z`Al_6CQBGem?qAZdU<46?oz;jCWHYQJTBG&nmz4dzRpjmz;+JKYRr{lev0oI?}PeT zmC!1E9@L`$Hpx*}UW!Ok_1}9CvDgW(Ulm^+Y4W%Y5(S7W1XZQRyUSQRL$7?S(C$K; zjPn%;zVopvrIH+f52xy5?0uI|@3 zg~b1lxd#VC;Up0LSM=_g%heqdAu>2Y*JK_1rx6EAvuC2` zb8F4rpiNn^jkL$Oqba_cNvyH9e}qtWiiPmgmQ(Kpw3KMpHU^vAr5{z3)HlJt-4$vU z%fLe}pITu^A)gvs7dJXN!aB!f{8}vcT|97vgfh0tV{Xu{I4UBeln1SSx~c>JmuLcB z=T6AxiV08Y$P@2K9`Cz+B>L#78d*qR$WLfg-l-tI=R_ zgc^!tHn=ZRX;D&nukV>E9`l>w-A=wb^5A5NVJ~c7{jF1CxG1-|?$)>ld!je-p3=G8 zg%oZWrv4vZi3me5n`~L&HCd3Nzx7wO0yd=|V%|CZyI@xzgD`jD3oj!N5xeNb`rSN7 zu$D%(8Y_Kt`P4y;QRdOv*^d2deN*zJ)zIR*U!<9{pt9)h9f)b75kNxy2&EE zhI|TiZ}|>Bcl=E~u-5&Qqcu`WRdBc@B|{BQmN^xSmxBev_2O-x-AT9$`2tulsRO_9 zs-9THPsQTxSIK0#jD(6cX4w3Y)bzDjcV0n!d zJ|JW7O-r62ATB8EX7jjiW$CI2j){0yNZv){c@DN=N)PriGx#BuU9%=>lG)xb4-x+& z(9U)s!R7FP5pNS8PfcNq@?Z_h&PUg_7f#?Vqyjzc!(V74Hj)B{h+gL#GY7c!Ul2580pxM5avndkp@j zk!7`OM@TQD`U|9EWmjd0(5BkkKgA51om{ye?|);Mwp&n91Gaek;v>%sMhE2$*2_dy zFBTj0K4~11T5C$=UCSvh)ffkvWio-k;}OJANzv1<#6ErRyRYE2SZ#W5=UJw$5{Yq+ zI)5S===o1tFUv9AzEwz(mMW7~plm$*JcD~$PWxYOFs>k}`^Juw4deaaED)UZ;0%HS!KlngwP>PkrT)q5>_c5860L)eJ`fpP9e|R5lA0J?) z?+cZsz}osaHVnWP*M&{WAA6)X#H9vcFy4Ro}_d#el7h^a`CE_%W8GH(u%6!eTF2{ zKl&#Q5BGOo;&Td$69#w-%=jhYh0Fk`C95{$j&Ktk`Xg2bC&mY86m&?zgrk%V0@YELkScG@o0Onl_dYMJE^8O9n2zBqtdU2)9 z5~1uOPkc%-RTC$?JktT>(awT|pyh-ki7$<7Ub>+{l`eTeIDg5Xwf2Bck0r}{UB*ml zdS?DnpQ*ZrGMJ&Uu8+P}G0cxd=^S7n zJO9Rp!9Sm=OMT?SL64@Tc8kje38@)LPvp;M>7hQm8n1sYk#&eNjm4|nfT!TdQ-zos-;)6WX4pL26W6VsT42I`||J(xTjmh zrRt1G_`9B&!Io`Kk8~2xu4ET{|HFF<`H1qp5foP^%tb;UFw{9a**0?(h|X}TQZ{Lg zi&JT=Xfo<_PHdglooK&FWGD__d!5QY7OzJ&#;_XUA>v)n<<7v#;x#9AXAv?sI|xKO z_g`gt2~t^uk$r#H~4!<)nx+npElxw_=9rbuRn4 zWObr4pV69-(y$zJTB2nwPtS@NQ{CCl@?3avZFdOEaYi<3flnsazF1#P>)oJ&rs{C1 zj*v;^qNZzBwhD6I{{SU{_#MjojS7PEDRA&+;Ikbwp&pY|K1MPq5kTolk;ct4$G!}b z+MwUne;gkI`>1ip8T(&O0S*E+IR-g7ZXBf@`>RJ@78=S%JMwaLu#Um!1UI0^etXq_ zXJ*fwWPug+!|h&KDNqDSaek8=N@@byF*<`PPb93@xv~@7x{?vKZ)Y;upqvslKPtRMV+PVEd3N+A*H|XC}K>Hc)@VCjJ{UL;IK7;bQ?JvF~ zlA=3;{~ns8taT4pv$9x5pZuYI2q||q+tr9(VHPNRJP8$FnLZ)FEq9iuopFojRWrQ^ z6`yk8RjO2Za_fyM4s@&;j|-h8VQH;TCZM@zf%bDM%R|I4fUTq_YmirH${G7#iYjQH zA^E)C<&K2I)dQjd>BDO-v(>dGf@F=iUNJ2GbYAdCn+?{|q^fL#NZTi>Z}mD|w(Vt% zOL>F8a=&QqnYIjQ7|xj{&?b=24zIsJO=S00kF!on(dMtKA?ldcTbu7G4v<r&y0CzG3INwWGE?ql*_>*JMN1>z=Z?}wI(4hxAw zXu+L>Hy)9S`dc1kpb*v>_}@|>qjG8K%99bZg9^mD(5zY2t~X9Gr8-5gzM0#wXldWx zgLExj+?IDT8G3$2+o^fpLRZzdxIut^LQ}a-e9W6F!lhrnq0YwLc-N*(4eM-CjNDMWWQRy>S9}*savH1^= z8IRZ0e{3H|3rY;hTN>^tJSjyL4u;UqLUd%JdZb-*g0J9;GLQ~vKa@?U0s|VRW9*U_ zYK^!vh3OTWSz(~K@V45T8p(C#8{R*?GPKjqSJAMDKQ~AH7MHDY7i0oMqQH>nzmN+x z1_!=LH2bX^OlY#?;LZJ&mYDLAfDX6WWbId;aqRT6{C!KT&f(L~NzA%dGDR}IGf4cr zbamPdTO~Pm>N@>`GppJcGVR6X<}1R+`R%NV>6a>0NK&<=1i#C;l;7U0&ei01Ja|Cb z7W&P>p_M!2N^=w)Ky>@9;CGEgiEHW0L2-^_15ckwXHGdmGb)V-uk%NmC*ffBt?S0zL0PBo~)s=vTUB=wwG^22_-Os?X5c~fTvmt|dCHUw-R`$J73j3DW=J8Aw<7**h&!{GBKotqWI{=!jG6NL)mJRJ21i86^VusKmKzuqjB(dts!j znss=H}qW7WEs>W5c|`rCC(m5T>o`LYf$ zABXY3Qw~J7=LU^&q>1V**gsJM+fV}L#3eYfaAJbMJotCI%`Ca z5+aO=*~UfV@{e-{1P~3$-szREt?8bD0*PnfY?Og5bn*^Mv>twr)l6~@v1nrYSXEmt z6wUC$R5!@Ok^9(GK&rEP_v(=Inb`X3&kg5{+tGxKCu+YV<2#3j>5DS3F^VE6*nskb z`!HNw=*wOd#2f5mt3x_0kBi+wxAgjf>h@D?$B4~7Wc2+yf&2cg-PoQS@_E^)!mPFd zD40;x9`VAjVOG=6n$7cUG;*B-cQnC{f#dID{i=+T_!ERpD)|He{!>3M|Ar8JPnj>O z*ljzk2bXvJ!s#WAtpn%`42*!U%JyWW#^-kRa((t~mkqB-&`Q_GRj7x!NnFp1$UXH1 zEFDgC7ks^mfFmwYr?TgmtawM*hl^3q6g-D@YU2|$uZP%o~ z<7}6fR#tJ1FK|Bf**nz$XPRb=V`nJu4uM_DqXrdrm$b{xp&rir7C!+#j@uIOSKw|_Ai_kncFdYVeO+n>qo6Z$X-f$9xaBdcUlQ`I z5nmcyqPqzZ7BbZT^>R)MB$c6&s3|Do=G>U6G4aMZBKt`Uymj6)Bjl~0t1r+voLf_K zf|5ywn|E0~XHiFb<5t9QX!?LB^1IxaoLX}_aAPrbDL12YdB1jcp^yPP$yOiL&lYCG zhiXlL2o!;Hrj1ZIQ9dLraWK%@r@XTr`tT zycL5SNRVeWGJOTazb+MepYCHRP#f8GhYzsJRc0rmUd zFa_WyWQrgf=nd}xjIc#yu57d-*dlBsXD>T9i4LgNDlvmE(Ym?ScXIRai3whcjB=F{ z9i)H=oeDEr`wCP@Hth3MJzf-}vOSe{Yo?B>L!M+Mc9|kpH=}zSp;2&=M_@KnMr<=d z-EbkzegQ8uUK}JbGD{ioq6XI%s(9H7hL@Q%3{2q;9d+$;hVaqD*JQXcq(6 ziCvZofhqM^bXzKkKMs6*qODus66 zlZNGe?;|WQdX9!GhLId)^0I-iQQds)K{M|AyU=`(*{fWXV@p0sy;gDFl|g0&Lv^t)ri*ne5dZivfdL1j_}ov zLC72n_fSFb?~AdVcjlNhT${>>`|7aDU^sD+(IGUw^YB7?aPJU~p;iM+I0 zyfD_v+$u760zl#8QVe8+K|9D0b*V_Q!tR8L&-szSu`n7_j3ycNVM&ECIkmd6#LMH~ zncA)@V5xhb6~<7lkD^6x`R<l%HWISSfXsUl06Q70wAWzty1D z3+wLsR_P=GlaGzd*ZQhGYfxJ(6YXam)J34sW<0!t&d+Lu*IK)aXAo-+ioj$CjE#VX z!xJk~YLLo!V5Rb@d`)_Vo%{T^yzbJBq%|Ezj)!(n?7ivixeVy=@`|!qt{UhGvXW&V zId$IBISPt(`eZ)He{7Z3Y=l4K^I5FWXC5nrOX0Ra-DUPRy1F(%bPAB8(i_~+1j9A( z9)e>HGtLxDyNRRZC$Y&~rGH%EVvH+n1RB=Vd_A{s(YR|o;F+}{!|{=ODDSw@P~3Tg zuUZaEZ2k`~2|yk43_HEz)U%S0nt^Ac$-gbyJU5w-U&^u}#{_P}JC+vyWCj7*>*p@O z4(sKse28IG83~ndfq%c4#f z?hB>bz%UJqYz0GY79dJxYZlhvFs(WGDlT(j_EMoF(@hnk#C`lpx>USU#lHIY=7HUY z<>MCXS;3wsINJt971cuV0Atr>ye&eEQ5msl1Vs26H_3}6_yK75Zv-=!IB3P!n5GFp z08scaeJG%zEs$(b5Sj^vXAJ;|@A$e=(qG6+D_zAfhFh~{`vvsqvq5NlffPzF31SV1 zhUis-EY8BZyih?FO$&Ey=)X1#rvxLofYlE2)?h!kN{o;G?DIAkKi(__WYl2r|KaPr zf|~ljXs@Dz(xi8y(z`T43`9Y?^iC)OA_kQ^ zyIjdN5~k9Fu$6My$cRcf?)muZ$kBe&D~1UYk5l!w|8U_zX;<-r4YcG?K=u5c_;Y3B zk_ilf*^^3K;EwI~r$XKQ2zHdCruTC_wkUY4Rqhz-GC`JtKW|t_web)>@}SSK+A>!l z%B$4AW~NP{*SJ*J%eMp@@XvvdO3YFDdnO;>p7WE&0KpPe$fz8~HYz`P1w?U!MyiAB z&xihJUaktk3Lu18ILVCwd9OtAHWi+&e~I*kumP*raS60*kOkf;N{O9Af@Wq$DB$&E zb}zR89+0k;$w7OI=a<`t8+f^c`WX<5B_aK`ly<~^9Fq3=N+-Pz{y>Mwnza|S?q8tF-y5ARIWBp#x=ExyCIs#LvUDu_fbEPHxNMZdfP36 zyWwx(w_aAwz?nsLLFmD%u2?ZW?Uu&`q8s*X^&~M5t0Ud(S2Q*Fm&5fHEXDa|zo)CW z=Y2%LM2%Li9GNg%hkNcH?>z7uI^iaS`lL&*W*Zpx#zeq~PEA_)E8-Y$yhn?0;` z_4bXnw&sf$(+wmgKt8KNkn0NJA^_V$u*7N{k`|uT&2gy!O`_b&Ff*uVHbZrwvVLpB zLS5ujrVhuf25wClD)-c75$_)1`V*CyNy0>He3)4r77~UCz~!(Q%XKn=Rqz-69kSC( zOeB6C!)?X8Tx!AO&!!K2ZDS2#^kP*BMcZCrcGb;P^XYYepaM_05^Ybth#-P@e@iQr z$kSsZL{weXoAqAZhzwyVjyXnhY-Tx~p2J&lvbl|=MRC;@n@6L#>^G>f{qIu}?^vwI zb-%YHBEdXn(3p$b<`;J1rBH_WUxy0{)t2T6S57qnHYyW}DW4}+BKCrR;?gx$W>n2i z%hK6ToYg$i`Tsq7((4R}rXS6SHcD3uGdjfln8MiMrMj^K%1qU4MwqE`K2~Kn)VlU; zkXD+|xJOD!<~CH2s`W>A{Cm%E`7Ve)&Gln}vGRolN?#|wYZ_~*PM^zmYfJrKzx+6F zmeH>(rRHrLYpV2=7`HMyJCBoyKm@P2C${`|t=ByfQeXW8;24n4z3rq1;;7@=p*?1u z^>SedN*wcqY`chh%NXKm1u?Wwfu_0?-Upv&!V6FoAw93T`cGG6x3X2)_G72$?*V(F5XfFCSR>OdaFXE`#rR$t^ zEbsGcOzq=lG(`=5Cb#yb3@0<{J*-Gc8-k>Te_XvjOs7 zH%gOW+YO@HM~IcH%K}M$fb512X5egN`u%XYq8FYU>L>9*s;LteIXY=R;rqH~!Xvd* z-pC~FASAj*y%t|390I^)A9+7x@cL(`TE5S%r7(U9gv5g^hi1PrUyW zs-dmG<*ogccav>qQO)_4oer;!M!eMBg6LA`1tzW(AGwg3j~(y58L@_#)}SVQ{{7OC zEnIT}(}NlMJt-9)IVxHG?icn9$V7ZiVtX-L_0}f_=L5 z9b*Z5d{yPYiE>wWZ{hT!Lv9kyR+8=^9%bR-Rns^LjDxG4i%d;|^B=@>cfQkPPfpbr zr;Ss|!;B4wZn3YFr9Np?kAS$Y#+9BB&j?YL(@NZk=aWj@B$4U+MCdotV}eX(b@7Zk zxMfHki@dk=96Uu(z15LdI=_{fVii51^u;gwhiX#@ftcTI!%27-h*0AHvwKp43bw@9 zjPrDczs#^4$rQ}(zPkC7(%bdXGDm|kH|rx_vqa4cFo`a9Uau}`)jiB~NE0~t0=|-3 z*M!Onv9g7oguBr6M<|`LC95UYHFXu4>U2RrvrU9t?-yo+bPR3$KuG-;!{XRNZO(kP z@8O=ZTa$>1?Q)$iqxe_zriP`=Se`7CGngg^bwWsff{ zX8(lxR`z6QPE{uf&+B760?RI#=U&Ne*t`1Z3X-)OOSB-6&0oZ-ch++2|{zR9&FbgThQzCe`D zaC>uRK;~8@<*6O<`bv!KK${pov&-^jF3(sMO3XS{{iAR5@9H~pSq}@B=jf+3T6q7R zTbE%R1g?L3@T}_I)sXEC)B%-?66J5w^#Y|Cdn0WtbuQ-Ja8qNh`SMFArnRP-k+dzG!`(T1S2ZNRz?`t;hG%I^ zxq`&q(m`V$_H-U0nd!PD8E$hL<`Iw72#txZLE{Si@MP(56u?`G41N%X`-)`$KE0+I71pE2CwXK z+a@YKm{ej0tc$sVe@G1Z2$g!`B0Nr!PP)78)i(9e+-*HY(NH7bi-2`X*56aN(V}Ne z9w6F0{#EnkW1c7{fuT_SP9&z(zGS@EVvyl4Ql@mGq#$i=f_)vu`09H~>xC};kmQ$O zu-?>a6fj0;nTf2KEYppRc#+R-KJt|vQEN4DWaB#eWs&b61P5?>Q*r#wxEyzrdOViH zT3tW)Z~?vccFF9sF0V4B8sKfVn~VZ;1{(m})k~raf!2a}=?ZkQA2-wpZC7l>%;Mf+ zTRrjg(-;T565888e>8}j7lkHpXWtr$oF*J3%F9AfCGZade>?Z|xC){}QEi5rPd~6& zRu5{dZTP8QJj<0*FxxyJ(FYzGB2V{;w*0kZYl1;DH%^hNJ9_jf*0$M0xHL;+|-lehnN&b|MoqRo`9Z8fa4`np4u9zy=Y6SUd z>i%hQJ1=x^h320fU_m{KJblY|Pe9>;klkg1a=&Hkm|9FBT*VA;#V!%iCRWnV3Wavz zcstyws&ewJ1e?Q*ejijF@R|1j>5@SKup_y>>H_Pn(7N8Km@4Z8ZG$nCJ2|YS;oHdY z>7_E}LTT#i7=?TyXZC2ogIk&N;MPxjmy_&XnqkIbHb=5VSKfrip#~bv@5!;EjHAt9|^fu5i>yd zmSHJ#af>vR^J|IczRXAJY$>KtpC(p0VdY(U8hx7A&uIL1r?v_M?xPcB0+joZ?{xM# z*Z|2Mq1l8lTC~;dlipcCrR6D{eH)fJ618Xeh@!q&^iWXU$#m}LBek_d;!{qtu;a!b z0A3*lVS(?Dm#u{KadZ7f>)qUJi9~g=5UGA*srSWygwq@^o~#KbL`lu%(_YUwsb~aPO7s|yLHu`W3ct; zZ?6Se#7o%Nw{*=igKW)Sh~FJlwx21KG&TzzU2V#^&M6J$>;4{@Y`RwEVDcuNTfJE$ z-|;~Q(NUGnE}o8Rn)22{=;lY(f#-r3R(irJGOaqlJTCLks=`ET%N>8c7GZjt=yj--G?VqbBlbidvJu9Wyct_ z2SK$p?6bCyc3T`HPIhZmY3Ibj-^;`vO&&FB9+a@I$VMeEuML0FdjkNX)uYy9q zjE08oCCjJzaQ$*q=XCia<5W*gi^ay*=yBi9+~VU6;P(4L47yN)hhjr_H?Y+aHas;1 zvv}D~dN{Vf*Z*)?RUles2Y$u1Gp(ZA_9uIw`A@~%77u&?edy+t&rhtL_z=Eqwhml@@e(N5H1}Y6!xut(#MD? zva?{P;rGnKmL*DmsXS`jF}bigRwhGe#e>N_^|A#XY@NYb)!i#cHbnLTb5CoZJS_3f zz|9Sw6ROU~-EU^qpkQ(K9Cmo1G-l8k_jcOZEx&9${&m5`n6u6xVM<3tBBnCaUh3Dl zqnjcfg7COzu}aWqm3MLCQzG8}Gt_m)tK^M4%r^$9ok7PX9hRM6^{o zpIxr2SASiKsuyWMo;?T({Ro-PUH!i)ulj-9#|F=+2D-$4ACos4jNA?uIRahXCC6{& zN>Gws)`dad2w+;q`@*qHZ(zsG>vrA!O#R4fqx{-UU3<30uWvjGxZQSyMScMEAJI!U z2`phJH>tU+i}h}`h2NN(c5dAhcUYjHhc1YE_4P+M-oyh@Rt4@6$8EOw(0I7SY#*GY zYi-1ls%2p4a}?hp!SFFn;(NMgpE1MM9(2>k&iR5JkJLUK`m=cn`FZ8#LH>+<)q10Q zQ9yUPg9k34IoTchW*MHO6S>ECUtQEDusKo(1JkrNCv6~Z2Sa30*s5c$+`pwR1X9&Y?+?F z_RBk#$M)=NB z1w7I9oi2JGkTm3&xX=V7jcBFM+c}+wIQ@oko{Pt+GpN|_wn0LxLC~+ z{LzN6rK>b0RLodwtt1l%P_7Lem1 zU`ksu9Zia2!Z$|ulWfEg#~^&YtWppG`=yKLWCH-ow5bprdS2@N$=p2nY%kv^S04XA zP=?Zwd@+Nlim&&tTbzeg>=_(fA~uzRfGSsTNR=`5k4vGj{(0X6uX0uO%rSp&-R%FX&L5Zv0gXt^q^ibYEYEs7*_}P@ zm%9R0M{@ZP@v^8)fB)JWYQ`v2znN=m8C>w{>JWb7SE3X4;D?(3tb1iu{WragyV>rj zO$)XG+(9>!y7h?UR2vd27uC6{P2whwgPq0riD3k0I4Un8{vBH60-mq?9_6*wkSVsQ zk|GZdeGQMwbPPC%0SjTpC8(o(NHo>C2EP_ym@`ICgzWoYbqbSXP}5(pxB3kK$U3$s zD(D&%D){?Xm$d?oiioeD9)8w&#N`yIzEeA@L~X?`_@210wT*VnL;W#6RL1#Jt<8e> zBel|ufNA;qCt45}$&iREa}E)VU0%&amlGX+*l^a39Ut7;dQ3H^m&#O_-qh6G(%6um z0UeMC`Au~M9s^U}t$%&p)*@sX0CIOfzz3U9)~1>md`Quok$J^u2uWDFhiM!I6^-tA$)OYOo?$%*0EEC&mCKfjgB~$%k z6-B`;wOS*H%0iC9Al_UB=UCC{5edcf@F+dJf1jcP&iF#2ME`zVOnm6e*5K4`C03v``Xg4 zKbPNeQTo6D))ptUcfSr8Pm{#a%KiwG8`@y~yyS*3o(wNd{tjmW zRvZLba$0qSHR}O3&$h7w09%!cS)cdb%oe-J=Xu8h*yC89`kDsQA0kxG*m#AxEhsfe zSu5{vo{iqz;39k&PYmOUC6V>U|94FY8=^RR^fi63$TqrKHwSE0QbzyF*{;M0GyQ8r z(_%bV3H`+0kvT23^gv{hV_a8K^I*R5r1i)>xOcRAYqYcYTVAX0&Lyo4Emw;{{MY2Y zL<;#4TD?%)tLFF<97ttbk=A`<&o;*vdeXjpQe3T#f_lI+mF0= z)!R7}Ixw7GPknK~N7qG>jpr%#IMgWRwmu!J zzx&8PVfwdYSG)+U)D_+!$rf$5Sxiq&{Rr`G(=7C&kG`>j>+4Dc5;xwvoYNB7@Jq|9 zPQcYjG`$yjxHRnMYmx5ZCae9+%2rDoF>|yy$rLm5LI0H?)7AT{Q3!>L=W;wFaUK+r zMhwMlL*}^0JpL9!!98lmUUPTQgG*crO^t&Kr6cLL#|&Q{9kDNsBs~l{QFqS_>90Bd z@7j)mDih#XaS6#Fg;tIt|K~`%#c1&C|N9_UtVIS2@+jqRO{JRY_?wauvbzS6Z-}{{ z|ALY_QFmQKw9<%OIC4(9!<-5Z)|+nUsf4q=)x2$`hnML<3Y89nW<7928%`=Q5XVOP z2LG^YmzRG*X(uy2`c6G6(qLlD`RR6`=cz?aF)S|I{_>=5V?I}$Ncpwf zT37P)n<9<${QN*3JE{g%rejnrY`is5a@E6~7&yP$;!>17ZxjW3GG1y~@Nj!jy3~+P z8=K`?A|i4zEGE~fLe#}4?P(Sf$yN%HU2&sfF%`sWjR}%da3TE4o!MnhXE7owVNcYx z+Gps1X6v-!R3V{F$iBX3+TR=VDEWGf0dO{oaT9Z}nAtj|{|0lQ7D381zq;l+#2D1P z-as0B&YLK?z0BSrI77trOYSJ}{VjDbvVc20A5$8?X_{e{YBd96&X9W|smh_rK1>zI zpq=^l27PaYr-E_Dc}^@d(yFyd>YqJNNk8R7yxgtBI*l|+j z$Ap&;2is{LPU{2s)UTC;Lb7F=v&$;m9?g-`po|q8F$Jjvc2|8^slG3xqk{jsp61h_ z0hy`t(#{nKSYIrB zNuXu&KHJ1$bgqwzA3J)tU8!d+LRaoM$Fo*?UIE7)Jr` z8;=x9s?>Y3!YmICHzwLPC`zVTM11QYV&UOxgFitxQKHxHV&r)VKWds_4lw)66nF%! zBYTx0kr%s`=3{2sFudsIC#nixEsit+)ug4XYf8ix1Q@2FS{vp%RTewn{Gm?j1txOu zB;DPa;8J|P$+-c>aHNI@6d}ZGr>5;#XY29fX&R8Dy2OZXOyr;Wz`bW|RkPUqQ%x1T z=16w$+K+>HY-jB9teH->7O{PGs66}M37ZqaEX-2KP2~#~ginDPHs)jqg3(mb`gPYR z^lz(%I&(9p{kzw(i@!5K_T-uqerLQR$n!ko4qx&r4|Ab&Q*I-%sG{Puk;I*;#9r<$ z*Sk4cYPYy}t_nNcKRvAHB`&h*eGFxMrSp-I2*a^{utzMXVp={HT{Gmk?-=(8=ta3h z69B6OGq)1afi@gz*f3tu)Re2~X7fV&n|4o{8c%=;D;w80^LtJ5Y@=auZH`)|{-}&4&%Nr9jNm^ze^NaBf=x>c#$lFcogwG`&1)=>dg`JN zh08nKTm;{$@?fVMR*$oT#B%BvpnX3Z@4Pi#L1jk&di;#xtoC2_9gnRGfPuAe6Fk zu@r^5CSRmy`_xf&W{ae)R$Pn@`G0icN~};aN=x?V2;r2t4a4 zZ&f4Qb*2&XmBs5Ho^a_tePzBSJed0O-oIZpzshtcM}K?Rz+wjLTjbj$>P#k#87kKD zn757U+pPBszT@2DhPi1O9f|Lzg{vcb2g|?zE51l;Mv8KH!nR=i2gP$!+dnTEh*1~! z5%!J5p&}v#!+dqWmB>_}xtc-r#Db`7IcVvLWG^NfKrS@_v%X5VsRRv92S)td%O6UMtk9(TIOH7K#B z>cWq&=Piks7u!4!SXGA|R~l*k$!8BHG4uum6fKFgNcgWT#~|5AcHVr*$PlHgp{(9t zEPl-1&+S~W0Y%!wx<>BB^9s`WqSND7+mp1z(h0R6J#CV!iS?)9c;SKnuHA|18=Y;$ zykTAWGH&pjWLU3Cy^wH|L6d&)wZ`9cZu!?f6u&C24~JYBDPa|AyB&#N)}4)Ehh;v_ zW*Dr#EkAI3W}aj*sIMJOr4=TG6TEPV=Q@h3XUqqt>^t4r5C_&*u>5ME@Y z5+^Zl)!NP-?8zP7aQ=1@btyb}j(ubPpeS7Q(xVC@l*69SfqPNpsl{eoLBPY z{jb(#PhwxZewWC3PwjcN9?=X3iq8OXqTR!7nZ&_#)t1O`OaGoq5gU9+b}7u&Rk1(r zB$R5n(59YCe1zgY!+g|T%D20rRw%()`CnT~^)y|YC1JBA*3N8zv&f?OUBK}&Ev3e>y zw-O##@27p#081F&8KRrMPdAF-E-(qZ=F#*1xjF9Ir)%az4tK9T`Io3kW$y6xn#lU- z$K?jvu7mi7mK$^06>yL_K`q;<0`C8UaGL44I*Yy(F~GnY=Wgfu+|I024Q5d1Ynio{ z+2s_9^0Oqbm!-M-h2uQ;(82bGsPL@Lhc zjI>6R%O1ij8bKd>M8!q!SSCIw?@L?xw^kX{D{=&zJ1E+ivh%j;HX-viR0O{;C#Gs7mX_M3MG8Gp2mN6Spr0!kM?I<0Yc&rq z^ZDQIiRV5zszmj^a3%FFA>=Q=yPb^ES#3ec5kkPE{my2t&@@6sB5oJZ-nn68-DOt{wOU}k?{za#|JFz#RnkXvEApcf`}FO` z)y}!No)C7tdlE0fy~mb{sDioTxSAP9Df(MktEf+qv_pg3VdCFptU(sJrzE()dE>{a zWs|T=eh03WZ|5CcKWozQ#26YiyaI z%Db2phqYSm>tJ(4s6_uT>7GdQJU(3TW1x+WU)xgP9^Vl*SkwNZ^ZY_DkXpowRQdag zm*k0`PEh|4wOe~3yR}Tu)11;L_K4Wn6G-JpSb)o2G3-oCv^l^+i#PoOi_(iNEiDID zv-h-~CVTpGrod7IV4mcA2fKNz2}Zcg-K&=Vo*{|b79SoMyc-yslh1E__PXWpfGV^Lg6h170HN?!ot(CP zOWf1GM1-duwzV^AiGGrQ>OeN(sd19gv~N)BPP-<0Sj9ZaIC6X0jOB5v`2g&uU_ES1 z@%_cq)#}(Q3dBQv;c{0eCA?Vuf@OCe-{1X-n5mt(YwK*oh)>MSUo_u5Q#kun*>DP_ zrLi9MWi#+_j44QAlq#EAP=CJ?uwH$qoAfkem2g~E;vkUeIMX7`8Z0zY(NWL8734f# ztR;h^>}oEZK%zb-i9d(N<$YG?=xN?}Fe9^!z0CB0 zI$rYK;1o9yb;uxywvDA|xB$SpAvxQG3N=ORRf^#5I7lKYSXwvWcV+*nU#eqSf8l&Z zqRr~Wtd`QaXnob#4{_DyU3dJ|fnlm?Cbn}=G_yxpwL9cD=pKK{lYD_+EovPT?ri*R z%JwbKLVnuwx$afgL?|NrLfJ!DN#L<#YWF@R@jo)I(!I=?{^z%L>tlE(D|U}#d}piP zg;VnA-5Gx%M<*r3a1bkhrYY(?)xk!x#6xB9o?d(H7qMP)7z6l z&$)5VEswf=v1RcG)zrwJ@GQk&@$AZf@Do-jCMHOzo+iSjOnq=s4P@ID!HMVSCi<~teS4`uXb8}iztm*ra?%MN3=Pikf%s9&A(s*GV=em*z9GbA|R z9N@+WO;n*e!y$}ru9ZN7q24uk8&#ScD&q=~%(m|;;VS+u z9{gz$`t!T--@LFNuZo3%I&2zyioV}mR9gPTt9NdX?^nj~iP}jy)}=qim(OA`NZvSm z-TROFmsxax+gPBFpK3K7dQFpCxtKnPYo`l&s0 zv!Ik>ysu*RCo9JXf%nhY79^)SGe9wO3m!z@HtowV<+2#!e9scQkt2Zz`vslyl)i4( zR%HWz7{Gk5#;X6+Nf^_4Tc1=B=q;5Fi{@dOCXiT_^SKM4{8|gM>~IzgEqr zgK85aA#9nsZKbxvK)P(XJ1E+<7n*(bYVo)|b=j@>ctH5^5A6*hIOC`{bNuH4D-vo-~xk24WY0x|lt?zLus7#(rDJ6wY zE=O}MbLY?T;tz~^upOmp-;JA{Z2p|W1Y`yKDymtZ2+npLmCRg47P!q&@6lbq`1;fMD}uX5hMFa31wCUx8N?tj+^w5G&* zynk1S!nCWaE4tmX&vwtKc;8w9r(fHW+x_?a$4jd?kpZ!}ApKu6kuR<%{?;oQxF;I> zemC3|#*wo204IN~;ZaXKP4mBKro)***7(~Zbm5f(do^fh{jB);*fhQ&anqbEzs{B5 zjN2V7kGl1Hf5)Dhml^MjdwYF8Fm#YXjouulweNZfPIr5oGFJ&)n7>mZ1Kaq(htr|4tLv3sT_#TsT! zf<)zib_%c|XEChs`25wHoi&O*Q7Yk%ruShdUs+wF_HqdK{Yr2r|F7C64WnEU%7{{% zcq@kZvR(m>6Ii>Pj*sFH7HG(Ckywc;6^OS4#zvM9`f-_IX`@E=AXH{cw~N#qenZ_%aB58m?S*zmX0&j!C`q8FmAGKk z1*5nms<$1&nL1+tA0@_T(Ny|zwtta${;7kO8Ip z*2eu8g0Nf>f?lHgnuQ^klg4j%!||0tP55wJdTU)tSmFaGjX6j zvd2*u+Q4YH@|$~Dt!5!?N{On8JqJT#!@on$jmgDWzcEa%g9YYcAVLhU-jzg; zFegBw!0!1wHuO^@gH5@Tq$ca`e5 zIrx+WHPK9c!u@^NOKbZBjFdBT!+BzXg&3;0ElD?*GAOR}VI*`*Yq2>QQ5ahwqL_ek^8GqA)%|!T4e6R3XJuph9B3so`3hm0tcpJ))n31~Ja2 z7IF8Va8Frmgo3X}(`Vea9hVk*q3lno5Fe#1lcr`P_gho|s2e$l{qI^|t`M<)^#BA& z(pkFOAuA(MuyW#buVqpUf)5)?J7a78!4niUchqe;QdVrK^VBcjvp51)xpLUHrrz}7 z^+Ctos|jv$;xwQT4rMqVhFIep!%5`TM5M;VKEmwvobN&gHw#L8r_y6aCdF!Q)@oL6 zZqKeIk)t8XMdq%>EyNan6w^ULgkD(B!XYcRvF^Z~ahIfn-{_HuhH#K%z#1LmzkO`! zbi83oVc0xr#pzR}@(O3EhSXCYKhymmk>)pMc@pPW8a{j{A~Br}P7x%HJ_xN#C|ifX zRv_j_{z#bC1X!~0d9cj=8;BXPHJJT%^8?lH+^Bcs5M;+C3X7oe2+Y_7P;uX#d@Jnh zVHhb6NC0Pz;?tZ3e}^~!%XUc@@PB?;>(thckF3Ooe(0n}(BY9-@zx@^cNc_7whw>Y zVv|?ml5&}i8FR6`71`*Eh0vH2V^?}<5&}xMYWl&A%v+F8M{1Q?)2CmEqu60@EGLKx zzzI^j_j5B50|>Oe%d}N(YDju8**7ca^UROFFjVCmR}nyR>*6wHnsG-p*6Q;u%&ywo zFn8M+B_TaRP%nr^iHs!pI|Pj2CWfuJ9K=J&-+=`{;jRb#L?m!A(8Be4Tl`QPHsfLK zMG>@-C|7!y%Qxo_T41~PliuAnHCiBv;JHql{V#N0A{zu^L+*4hqpJJkyjK$h^oc<( zup%jV)z#xkW(b|dP-*?rZI-$>J_(oF*pt8*&%n#TVvW&t_e8B1{%E2+K>R?h{9{Co;c`^GtzpJQ!j^z#ZWM3Q$1ZGzZCxZZ}+A)dlYVN-!^StB_?-*^0WU{&y-9&Yxj z6A%?VACom%Hz4ZioC_k*B$vThzOxlI2J9~G{mmdxG(CR2hJr;S~y7jPm3jK7au(>WyKUW+26pd=RkY2E~od3yG@Zu9s zjZ&ma%+H!*NnhzQhTdV_c#jGDZSN)}CyPFVp4CZEU5*)*ve^}7U=_`M%*IR>QP_ej z(A*M%E{v@-P)XJlybyn@O=~eZiMaEpWB)rki5GBieGEe=G&M~fSAw2(O!^Mdeq5#v z5!qsY;oneewG)W!31!&2qW?o;VzW10HjXnTfWoj@{!7^iRZ5De6#v4^Jp%r~=<+K` zh;ZT)^qG&K-mCL;Wg+BlrU6Q!Jtfj20yrFy1i9YqP11a->@tQqOr;GE`EW;AwYTE~mNu%B)_rxn zXaxCoDpPvi-rQla+X7&n%7FD=iQZR|{WJe!d=IRMlP3w*>bA&0xI_`|g{tKwl@B*L z^#bsj>QNX$t$&r}i%Yihw@uSK_Ex|W>Eb4d<#&`BcaDxGz02j*w2GKSQ0*0EhUrfl zngjTl4+scG&n3a`PT7~Y?xqzQ`WVv}Wi@pz%_o_A0T;GJ z=&8{kuxzOdJ53(8U8RS;H_d2^-KvyoPA>A+9=fU#JFKRbXh8F&0KJHM_Oql>?#!>@ zqxr9SV6$s>`iB^VKkD~eB2S!iryuplmtF~C9;f<}BRyS${T&@wt@)?sR1L&NV~RV% zXSK$8J$twk`fcmUW0ju3{jpcogoj+xdcYW@lYTQ7G$s?Q?Atj`62pi7=n&Oz zhp0tr@Fc6{fBBV3k#O z8W-%+DX_1{oHI2PJ9^_o)nCu$9V5x-XX311w%$tTeWMKcslm6&Fh5_}arU#xeztQm zW%?&Pk-uDbW&F;Z5e34rB}9rWQy&vV5qYFJrAov?XY#sN5r$!@jq z*X6>ofrC~2y7b}JIC3`rfA4^xSe45*N&u0>0IODGAZ_d_ei9i6X3K{=^_*Ub zjw7BIE^MD>$?jTK0jr_8fp3dMzwN6j+k269ZH?&qFK(_*Eh<@Hwu_hWGjoDFCiD&* zx9S#_uTGFK1;Riin1~Q8O*RffX>AExqMINYJZNlctf`$~F>Y{Ge21o1I@7B+H~mW) zEnbx#OAYV>!vGLmW-L1H07TrdCTfEceL%MX2?5!rUzSaE6%v!7{=Ug4%k7fW{FYUy|v-q(_~%*4hh zvNuS$V-PKB5}0;XuRv#R>GOoZ63)11SZEkG)!aK#%j!H~3bUo!P|1yW zsl?61L@{O9Yg{pTD`1eiJ6%vK?Gh>WqG%yW9q>Bs8R4?4=a}_ofr)=HMvS&UD=~G| zmd+*jKEW&&4E0{sqgAgW8oE<-0$D)$i%@uwwY8r09~7|Af-CPBo4UY7-%PF6=Zw7- ze-W_6d0AdWFiQxbCMrur1fHfS@z?@L_R-jr9JRm0J_ommxYfz(I4BhV&g+Nc)xsn_ zun}XAkK?7hRXQe6KVfQp<_Uee57g?U7+Y#|XBZInE?q&iH6zf5kvIr?n58F3tm8!@q0w$1$jA8~n_&osp3(}8OE_@c4?qaY6NzdKt3w>2eN zSLom(3Eb_gw6RFK4q=3P?)Kv(y;g!#PZAk1Q+4Vcg70-ktx{$_ri7R=bvQS57*tB# zVx=`6v++m(8J|Rfk;vOESp{sB3aE6AsVahr=O^=)Q1c#@IYGl>A$3aAcpi!!CDXOE z?30=l>|oRO(p=F)#*MgQljq}kC(h=Y!CD1x4N{|Iw$-!gv?{(9?9sTWHszajg|ee1 zVgix<%aqPGw1?Cn=vJv4_0V!H=rd~<&g9h4_`i&*&j`sJvDIJzAKobzw@sfDJF5{0gsK~W)+ zBV@^uoooK?hE0$x*sxO z%Xloou@h*Ly~SV&V=p*0(BaRP3>D&)ENzlp_^x@Mi?ihB`zKqrp`l&(+te%Jji+10 zfNEltex|{M#5*NkO;7M}#ydEf%{-^e``YL9UsW0H3}sYbm>AefEFz4Ewn3tMp7`89 zbB8Nd+rnd(HEqed27i;kOQB+hK5|m8Ne(cbl9T8omoXcs1Y%IYYVhMD?J;o~;Kb?g zcPi(91Gg*H`5vrR-^Dr9`0G8ly&1=pVp&%rD=CD9cznQ^sgz@6YNP3VAy<1W8xZ`p zeaY6>`lQ9vrTowQ)$RV1WUR&~-o$1R;Turzd)IDK3CZg}XA{0|A0XfyODYHIbhz^H z1%x>H5SJq=0Vcc5qaaJ@=lt(lqR5F#&tYA!q`bh;lXEXAg~V`A;`DkFiIGORv;H7) zFf5rXK00uv@c5?FGEWIf($*}4zr4S|_+)W&tRuTs40SX^@I1FGLwDBubqtxK_J}g4 zB-+2ZTt;fHUKcN4C6%bkt~tJW_b=Y^S)b$s^PkV8I3K(w=cRJ1n#Y7F5Nx9=-Fzwq zdgu0&^B4G*=TJF3&{ouVvC9mHUNcLEUuMQsCd8#ac~3y9Z&a+FmCxbM;b_`|>XHD2~9l#7Uy zrE^?S6Xc>hIN|kr1pkk|7fE;FNZppiUmC@gaq_t_WbAxC_mLiJ)O{qla4>(Wi=7w-s(^wevDBiOr_d*QJ&HRBw;a=*7i7{&`GPFP*t zBzVH~680skn15H)zs!D3!~2mjfbOB~qkFAP12>ws%cP_DOf>&w_6`rO3I-R7I}MKO z4nqd4ea3tpAd5$3v3p+4Lf+0(b4!;1;qLMlP{W@pv4sG8hs)ZI+gE=e+$XNuror~s zF5NbuW&&@w9$kA?`pPg=e>`8C-+W$Y%ymz!(A@Mnhh)ynM+%vrLSJ8jKKb)keZ7o8HaX>hrX3aR7l#>#`CO1_5PH7vU?n?XFZJ)Nuq-_nsN(< zFA~*_$5KbL_U>l@Q3)B8F>8$(<^aT&LllIiV{H2wuM{Ql2Z2j5{k|jW5G)J?s z)4`&_5Fq$4=pb6dnw1~@E$x}^<{8{U=MC-qN56WSZYFZf!n<=P^iZ*UQFU%=7yL#$_}{hp>Xqzyo96^?%xO3VlIegg$xGVT_@?euCU3GP5719@ z1_W;K9G1Q5Aj7l7xq+#1z_g-!45HvlX8e(a`5J&PT5Aet_yH4JOTX7R$o2vJ8noHj zlM5P07<_lOq^W(EndMgMB$l(-7R~lL)=_wYb2ZXmsDE&fV#^j-#&dU2I|E_eVE2IU z3%#N(OvfqK@E`+6cj4`>ugMIM#S5LP7ly?)WH>4j(#vx=kvxm&-Vc`m$x~7aKe2(x zcE4fkpL~0y&X0X3=Ip!au&yQPnaIImnC7fG;3Z7>>gXs~y#Gq_ZY9LdU`bP^>Le|6 zMWW{-sXtfZG8OXH{1{kR4)so7aZLG?KX4JN86>Q%$myu-fU%s38&0aS-~2>0MP3kA(-hUe^Wp-)>oA-me;l&M#7RC(Y| zRM%Bal|QK&BC^}vxkTT`n13Wyc~?pc*8S-ax+YrZ?m z*E61PBfp@E@Ox~&o!oDn4jU`gG0E09E;Vo#64FHbSHRSyOJ$a2wFUgY*J~L?2+GZ2C)*BuyWM7Hq^f|266Vmv+d>M3vODphvsv{q+rt=&z7GDqR&I zrtmR`M2|Lug3q?S9mROh*w-DcVmVP`sM`M_?7YI+{{OJAt(H=>YR{@wyY}YSDvFZY zo0cj`8hZpmYj3q%E3K_o?G@B6YVVi{szyl6l+fqv|4y^oN8i4mhn-lF{6O7?;pVdHL>4>r8{B!;KNf@Agt6 zF0p?r@25Wq*ACvoMs#+o$EXRn&MmH|SLGIK-fTpE{WH+5wDJ89TE9?;u|1yWna9UA z%g+-GExaBM()OIMwQal-+X;K%$4^*X1MV7xaNM68HxDIw4Pfzquc%cqw9I4fil-8y zy`bB%R}0-nU9W5333qM!zh&I~Tt!v>y#&A}Uij8JE`~|&V})c`#%ng^kCKOxf?r2Q zLVAK9;EN8y9efkj^?GL!;`CF75npmEHymPw3%oY#wASQ3R0$1s19AtgnEd}|*SRcM>HIM4mC@p&y|&ZPqefhk&WF67uXVJWY%nytgJmg=lU zTXnTK+ka&0sxmcC@$lWGkWv6HbZs=K12BqWbaGzZ^%taQG6HK?c_9gETclXEp!>rQ?IDXjI3UuT+=e}xE ziAtSgIop9N?2d7GAN==&bu`dD$m3x5DkuoFcGlhQ2D}mp-oV?wE!k@IH^!p^!hSmn zG&S)d56p2rU+bk2gGzlk8Rf0^D`rg2Zah3p2$RSCWA>L9VvAklMrikVSk8`Fr9zin z3gmI9tB;_F*4?4=Zanyki9Y&Swm8~tlY$precDqW|eJ~pV!CEGH8;u zJY)a;F{xd2a$wH3YAmdO}Jw!K*N;z=FIq&V<4J9dFO;rw9f7t(Q@3KQjK71^65 ziUvAjMoH~H%L}Tlbwo#^AKrTHwB$l+9`MhZW%t0=IW>$4SJ@Rd%kWiD{j7|10gVt! zZBC7*rP(?=SJ^NUi`VplF@Ki9JVEeY!v{vyefnr5*^oGV+ZdkEB>MW95%=Q_PkAT! zJM&tEFVPLt85Jx&C8H{EU^!E90#tOek;dDs&`W5WT_vYV(rKlnbL{iiS^nhw7|Rzx ziRpTvzf)s`O3i1S_p+vY8=Lm@@t2`5rMHKR`%KwC<)P@wMuTrKrp*pX+jK{Y+*g`m zdgzg^eAJy**2K)_da&$zpgHv>2*xp*;gtCbg259?^v8kp`{rh@#mvjBbj?mF19V5D z>W#IrD3l_$GhU5(ob81_e5qfB zQV5wv)Z6DTR5Fs#${E4;%MXPI;wv9(lGh4HLc~6!P!)2RZu9i?>auBoGl~rEPg@WF7 zgel(qGc}M5!KV=)>``m*3D!UeYVb{^MHPb;#;q1p>uOkk^@Ep3-ANCyN^uPU=0 z(Sz_85B&CB3_cl^^T0 zS&VrAeLI!*+v;^g?^KoZ!Y-%q?F0#QI=7L%BxStFKGh_J$*b#vP>`E9G z<_x5d>p`*g$jA=#~GRz+b zceRm6CS?X*<&lY8CTian!yWa@42%2={m`nmzgBYd8ayh8U^4XxwFiXU{*n^?0=w-1(^;fHH7`2b=da#PNqzSHhjLN;*ksB_U2n{m zB0KXz#D^~vC8*&X3gm+Xy@8j>T}IYjvwWcj@;4R9*J;|4r??qYW=ixPml#zlnuKlI zq;2gLo`kig7=gF*8>*{~_oS(OL|zLU7d)CO8&)w;&nxK>tD3tpf4Pq7gq=G=h0@te8*y zUCHI%!EaF5?g|xQE)u1^M#n(1BK{-GCzfNDko7imD|f$73*r-g*LdMCH1Lh_GHv9o zhZVB7>y;Cg9J^vP^fXKL{vk42u>)z#e;6T|JTC;!S8!$y*)HQrDbb@`I< z3v3r79jz&SZ(H)Fi%S-Smtx^Uf@N|=^(=yv!GL9@3x24ZJv33By$d_Xr6mit2g z#M@R=+)B5|kMgL^pgaYdL5ZiEkDR@DLA>|%56I2EgA2dkj!mHWflfb-T;Z5TXsp>v zTegJtsPRmDM@FLcpqGvyi~W7R49cPwXLYnIAUtY9?-#+Pe&$C zB|I8{?@10{BnhIKpsjK)`T*zNwc4eIa`KUVG$ zt-lhz3<$EnS`+K4#fm!}vCF!Is)H+bcu7})@;nP)>>+v>r-V2f9Xc~a51t}>-B|2{ zCw%kNi1PTku5n^h*GmmQ%osE2W$SFgqzsI^ccKQ4Lp)@g#gO#A5ra=zil>X~GpMaa zBCKUv0+S#1{LQ^kCkb}oS9?Je#6|NNwOgcT_{d}+DX@JWu@Z;nj+r~Rk5Mtltlou} zn|BgNO2HZDDy>YN>p=!%z4&yF+jArlr!O>i zXMh-2zwl}bCN5h)HPxGykcfl|Test|;JNY&+wA9CuVJE1o*ljEsdLyn>jFJyUH zinK}<#Kgf-FgAvkpkg+!;(4RvwI%siGRVpKl-0wai1C(Ql0k^(XI zVaM(hDU9pJQSzm5q|t zJCdhVteD^j>)u3LfTBBY1x}Te#LL_W*%)@874i#I)R`GO8tr-a+g}y$| zBb|QQtH|bAd!cFtWGc=zH@`qc&sxNPV6Sbh zJrEfCf4D_;uo7%jT+Ww^Gd=u$zQkOO=W!;Pbhb{vBdOK7I{A#_T)#}+>UOlRgC%WT zZ@y&46rt=JGW*4xR0Q3?YX@9F7b=ZRf}=^()R!;=0$mI+(Yzu#XWGP`yQ~|QLJFSG zc(+K{c>t%AQ*$l7B1r7niVD&ELK0y;cf86#oLqcD;A*HAKo+^oty@gr-Ti!DyLi!M zVqsaE_S~*S>tsha9qP*>x_xxUQmwgtBs^yf8QS#F-wTB?qtTIts=0Sr9W~K4U z0HXvQ-4Zbi{+o{~WtWu$rw?_HNJ^wfXfm8u}WdX?=~XFf6XzFgEd zYlw#^6LTPLVS#PVq=`8IHpygqBqmGkb{wbt=}g0m$&UHeZB8q3-;cK_Hyn@10zIE# z+f_g;J=~F%2E~?7O+}`^$}3o1DX^O6Y zWQM&H<=WD{{R}+OvGIS5&woM9j3R`0?{502$gxiK7#f!-T(Ce|3OC^Y>jjNRYxlL^ zH@X38!w)2o#5`L;i71M4tSYn{J#U{SWD>y~;50tcpIL5wP~Xwulp?>}q9u>x6py0& zL6=C4jp4JWZR+NZ30bUt#t$t$MiMm|QcG3KLZ827He84qDc6uOrv7j*@|in_X9sQQ zwF^hY+Y6;NIuy_~0($9^mn! z9=@Q~JK!M60Jp%fV?FD#O3js$3SwAS)@g1r7_FZ>GxKeSEf)}8v!M*0XMtRg?|USx z1u7Lp^-wW*XQ-w!|jg% zTR0_l=X;-18CbuBe`Y21HRJT-Kf|R15W)&B#iv!PMN4zV>)_1(I?2=z^B2W~9gFC! z=j_N9jNT*|+kiu85z_vpl~aQu48D?M>WMOe;D^@wW_X<-nw;A*_(i4~i|L!E>I=Kw zYL9>v9w)_%3E=SYoE4JEyIQNhJtv z!fcc?U^xg!Nn*K~!2R8mL3;l&uh~IrxAoZ|0Y#BnXG%`-8HalE!o!Deo3LXG%w6Xt z{m2L|(aUUpL*o0X@kqk?gOVaRc<8Z4kXP6|D-1xJ~ht{IC%G`fAs^y0sy(}iQ6!UAo z`d+`R#6t2>(Nr3$WHw()P&BS*ZVW4+_*vHKrQd9MB^x&+oi&--wP_(Jo7Ags&`3>T zOk)&QpzZ|LxzH9GnM5|EIf^?ys!w&ExwiUe;o%G8Ft{P<&{x~{IT4ySi}L!iZGTsV8$avQcC}2%j6}e&?HmJlq4!JR z)GzUN*_Cl^2|KUT#@3fvE14bR()GqZ-{B1jak{=>F~42ftyxpoSS#fS&fFX4<3HV^ zWYKOuS|wX&Jait&HCP8uvwkGtW@VM-ywTe_@SdcI2}$6lBiV;w)af8sqSGj855je~ zh}NwrpT$)=;P+rS=jJV`-jkrA*WNtkz1Tms?<1y$#mY8F>oNB@5h4CnV7qjy)Y4s} zU&0ePJN!ls@Ym(0J(|V@3i&*}X;x zoy+{W7sU28C`@C$GZdwd&+KE9=&97OB_zhZ#vDXuaMStNv%$kK2`AxK4_fecZKunD zI;g3)<3)4qS|K=-DcJ0DCy@7LJW77uLi|dBq)RAn!iL-h%pT)}yg2_akQJaugY*Dh zTvP~md%^}3=fM^C>UXQ@T+W!~y)=r^5T=hi_cdM4{50e#4^9+FQ9?i7%*VqxG_4dP zX)|t?DV^oi-5#JgsgPBeGT^8Ws`PL9mNStq&rr$U`RNDY7A$epeO~EU$aJ{It6%Za zxGuM0Sns9zJ=2k+GSgENhk{27{fOmv9Sum#)`te_>if2KMC)g5t%Th4;?LOfn0K$G zpr=ff6P61Q1C#cdhE^tvFuc@r^0hfZEcZg(8eM`<8A%7*8KK57dorADO|4vMu!DZn z(o#Q(1Lmm}NAd~LGAQ_t+4#Pe$erh(fAj^&6|V5D7IM?+ea)w_8$7{OTG`v6vM4g$ zC3q*<`p^4d4UR$$7ouklha(T~S2TJ`YY|S}>AQ74r#u>GO5O|+fAsOjkq+-oG90U* z0+};!8S$HCqf?}-w-<*K#Zdkhh|wy0Q-`1V(TK7LUpnqh@@cx~QaR&I(Eaya=Ao%6 z5jLu9$y=?ix>9jAqjo2_!1iDI^1##AcisX4Y-oH&nB!VprO3+(afFETYd2W_SmDk` zeYY}8J*PW*_kq6RU%UP&=4NT#NonOe&gGD zk_oG~j%dnaem>ICcgUq$eeb2C(*w4quaH)=_L8n|E>`J@H6;e4$@btg5uY3Nphitg z2VZUp!_=QVktQ1l-_!!`Dk=^iDtk>S_WS=-Nz`=Y@D(sN#l%$#=gl}UTFm8?;40nT zmHb+*Z_GLS-54`p{cUZAUt{N(k=to6D6Z%xokN3ndv-!QQm$hxGqYN3dGy8)ZmM7o zgm`0X1AtiUq$3)z|7FtqN4BR&S+UvX^fM0U$HVq}O(0k^!~B`ze0kQcH;!6sBC+_~ zF4OTXdiJZwH^{1U1g}zLk!NzB>dAu12-k4m6@l{l$lj*DJ3#(Y^4=0wFD2t7K_&lBDydb zgLF2QfXAU(B~&I~4elE0p*^*3KU%gN&mw!Zz>@XBr=lnzcE)<;KiVt1|& zGMhfAhx+gPaB6|?)Y;j&*=90J4<5ZZESD+VJoBV$zY!K{vOzmGpg!Cp_>XMPaHyOk zqsNic9d+%!HZPxZmDe9hTfR z?giFoYh`+(KSonZclxutU#2lyf`v0Spn&j_DLrS+I;#|vnEo1E0`@h_@*svvI{2YV8*u03WUC2M{$PO0U5UGWKygfAT_x$)nyFD#eYrs{ZcO3n zIe3JxdQtD}geuj0d#1F&kIE~{)@hKLuhAN}aja51hn?$QHh$SLSw9w|Mm8;Lt0uA- zhf^BpSGqZK63^!CsaFc}0pBX%!)rKl80+|p*5q4jv!i~?Xz>DQC^h!l*efW|(BhlC zo#oWnP^vmw=|pAWGFR!DVb#8?qZDT=MW}EyL!ZMkrrL`p`$V$+eS^(OWS3b8H-a^0 zpqo00#Tp@qKltFSes@<*Ap0eLEBqw7Llj{}&z2wyP*PQwF*_B5Uz*^hs^S=1= zrVqU7Svq5B?*|WO1*2tg_j~Z#axE3$R({kJHC$ju0$2ZsKR3DXt|tF<4POdF!p7l5 z9J!W5GX?jUd3Zy0q8Pq>4fscLP>O~|^<3R1W@6|PGwnnI6(bVM@WZ_!cX?~@2ca`@ z8A^@0>x;Q&R~U=e-fhp{KD+n*$!R7|vjoyvuR-kW|84~dsP5)|-@!NOZLKe&n-~~H z$Sa4I1NP_c3Bt{W_F5D=q9pS8)wx)$btL$$Qgz0ijQtWMJLZb}T0-|^Wv*daXm21S ziBV%=I?bgux#WYcaEU}y|B;={#`;i!GD+!V4fS8Iqq{=c)L^+$|G3F(4%rYe zegBG0(1(`< zB~-pc{=;l4{!=U{j#(_EW0vxnwt< z^nsQmspsKQ`k_O+&u5CKsFShEfg=xH>M!N6Xd0_S^z#WGY%muo*!D(`I%6g3elbFh z(3#W_!T{I%VNav>fFzCYJBT0&672f{6_{flDE%8bjnk0t*;R0D2w__WGaGM@|H(px zO2XWC$*`G}uXivWjP9nAs}==zX{w2Gd0e3pY>BZx5FOJ@8OPC$%iJZQDllKm=S7V; z=wvUZY#qFo$JM}=dOELz6;YfG%{KYUYMfB@rNDo|0M;*l+PP@{kBsGtK@(eo*F)&w zb>ZD2grY%ACP6$SYiP&qz0B0Bxu+PP>$;_NLR*=atLdGa<;-lS5gtJm;2J2KO;$$4 z&7#pZhpdR2mI>T}5!RaZM1i~mmSU?3_25S}J(ZMssk;sEOAd7}{v$rYr)pf*sgdu_ z-Nuf^2LL;F6-EEGM~g2|(;W|q>saR4;OhwS=BU0_@^NduKsVL1KEYYplIaI6jkOb1 zR|_)LFgMr#j*;{T#aWVi$i*A58q4HwuEzwoy#qXe85ftCuj0$>%~NUyEHpKAF$ZD- zm=aV6+>9lIUZr%TLWllQg2DXCy`eHKse;c~`Z5rWuyM6+JWsSw#&zQ|ec?n%nqzF1 z%`C(lTj>h5qmGl-9l5Y+qiulzN4!y)m2uBE5HpMMw`EyoD-aDuL0y8@+(IYXkn{wv zo~WXXZ9y;tk~J;yo0x>b^xE{BaoIRA%Xhyo`1_|@nWSG#9H0@kL*yT<9UpUq@O9#i z69jsC)tS^NTr%r)A9Ub5N={>Nq5czEK8l-vZ{Qc++@PCwR+&5I#kci_&>@@&4o7xG z?!r%qd-=hmXI6BH_8>g&D(W>CYVI7-N)c7nw;73KSa~=p#xu>duOic!>|Z90{g3Ww z9q{8aNsbWC)?Vs3Bmm)$*NtE^N(@+*`g;uTPczvr%vDf9&4V!eJda>&J+YJmgCet{ z|6$>6jZMoGXI^^meDh3WsAQCVd%4he;B^3Zl&<`2m}@n?-R)5>j5xMg7LJv{$SN7+ z$LF}o-$HlFSS`8@w>!+822T2vc?VW=K^o68rl|Fr?WXIrmA-2yZHDg$t#4B4?yq^+ z11_>I!D?@jvBd$*I^3yxQ7dv7D_dET&?j%}57&M- zD$TF)av28|Z~dF6rl#{6`sW{6BzmVF{MUDGm~i!`%G;^ArN#G?R*Jsbn${l8es9K5 zZKUdZ!Q_E}^PW>z;wmO7)XJ{?=2ch)yclq7)DpPjJl@EPh=kDDg0CLn6Du)`mItCG zwaqPoBTN^@N;5f)Q{B}*Zr6Xw#U~}X3eLeuwjn%O_ww~aJXhbgnkDmFTD|6|$**!S z`K$A4{Q;Td>#m*SW~a1@>^;ruocFkd<-$Ab0o{3)Jf|7+Rb;%WId3~HI4}|x|0Zku>i*6o0$@rO5(f-WS$gf_eoVF7``L|>kC%oS zQndzKD&tq3GoDBC!GEJGKCz4sh@lEuaV3$87PsZt+|=6_8o+Cy+v&7= zfBw(;?>u1daAbg&y_~J_ftA_s%vsS?$4CgwR##QzC-PaR&7_c}q~!cl9W z61yj=-F}9$JJE?eOX5LKzB8)nujH+xFMyQsXTR4B;SIsRsE+NdbB;xYT&TeHFa}B7 zVWgnf>+ROY1i6?Hirfl&OCa`9W!0FU$8&AYv>~u9+KZu1LrF(CdXH2@Pq*9D^M~)5 zC4*8*cKY`xJ-6&LYslaD{ruTgJ#~o6rcT+gbP^R8V2L&>F)Mfp(T)54(&QkpvC3`cCKPCUm?qU3&p|tI%(kV?%2DAoX>vX=w*iD$FU|>;5aR&th6j(Xw#)M~@ z;4ca=$+@7&V=Q&~`ycQB<9W~fwd+<#RCR6#MFz|q%Od4!SPl<4bIROM$0vZ7uBEsS zM|QD}l~(6#1?F5FS7&CUe&gJN0|Imk<`*=@KZgDz8|2-d27ELh|6dN8yUrZ(+(-M+ zpTRPS2l%sob&6%8pJf71tET^Pg5gW{1i4F-zs5ZM>+IYq@I&(C6r~S#olnT{&~B_9 z`yjmY;V+_Fv^#^e3R1q?v}^r4{F89n&O|vga{P{xj^V(v`JWta6EyQB5@VWWJBrfp501Dp5yb2z9D ztLK@obUSMPkvYut`~M>=9`fI~@T>lcQsq-;XNtJ?sAB>YVi!F;dBb?r6}p|8SK={;d5 zkJgNp^TQZs#GM=ek_%yuhdT-m5$IUCk1jDu|Hv%P&2x{V@W^mt9P>JeWed)BgcWBR zK?n^>p+8m%%ixJNW8yu=zl5g0G7c*aE(^)!uuVDYnier@Ne1stZvcNT6{miyTjPI2 z)+P29u%NI2zepcWZR_uINihcz5xG@Ju!=O_2u03ksh^m$k9TiUc|O_K4CsvNd<`_Y zFN4|i58_k+Etzts6|02~jtV-mRjGXd$DOJ6as~ac@&EWE@sB6%^XjS)mkW^~?cUBh z+jKP0QRVd-MQ9$gUay_}DBM~SYru*5cE!2j??{Fm2@{vwFXrd|846&>?xpjuH#1Ddb$H!rPSgsV-FzUtHq4obTEcsW!)|@diSJZ^Z7;O~31Be8<3g608DqG&X*wJNlRJ1a(@Lf#E zg6R&~R?b`w43%9_Lq0?%{v*4Odek8WlIT(q)ON2zSt1+U`S{U43+AY193dG4=V z5;MVMM8VV4nP47b9M(Kel;l@ryBK#sGf=GWRq&%0?uqVJezegv`Q|gOaB4GlGhIBJ znZAYZt_grAxJd$1l+o(-+`R|vM76aQ^w?VatvQ?#+Qw4XHDV+5;7s1VN6qv>ov~nM zeLUI7sLaS!+zOQk^ZgAK<#Y`ROhu14K|&H!F(5h!FLR!+I18^uG4b9P^;Ha1cCy3; zG%FfaM}RJK^)C|U-TTa5{tiA&m*rc64a>vi{SwQqtqy|!k%=z{_pnur@0eLJ_jXe6 z+6hjIk#<+8em3<_AJL*gNb#Lq&MEYuWMc%T?DcS8eA;pfuR}Esh^1QLz!2Q`1 z1}(bfA2(PSj|Ol$FgGY+6?=X0rfI5)HA_M;t2L@4GPKJ^+l ziVVLQOkWvF5Q#>p{E{mBZF)q-8gVC|)&eo12XvE_#C%H&YEY0TUjlBS`3bstGgCQf zoqnvvsaEaBhfsoA5Jgp>&-Q@eY88b{c<6tCQ`kOvUy(dSy-0*3xYK|F)ZZ2o)k%x6 zBxv;duCU-EKZ{)+Z^-_-(4F6&Ejk?xEVaR;pwVguI#RmCSjvshDRNgTKMzG$W4vsb zv_Ednqvqs(L3?NbWK-#A$HR836vOz}l!79*EBZw&+Lp=!qfPt_n*u4e){V%m7UbIM zEqK_#74H;63=?;|fyUS{_a6P@z6VL}^vgCnXRn(+(0%5Me;TnpNOrYHA}4ZxB{AXC zJ2KxU+wL|EbM|+Zr*XlS7wjAoqL&&oHqs&=dwf78j3jHUaRZ(oWT+LTo~b^lPafY7 zl)35A$CRX!WkWTUJ4PH?`5mJ<#}baDTSkKJ6x^WrM>d1AKX4mg{qrFVZ!K2RkAi8? zB@(!$dj?Wc4a+qm-5VTPQ3720GK3?2ZN})tqqLQr|;2#ui0vXH*m~6cFCC$7OwaMMVf{Ld1TyZ#J;> zq>b?;{4%om6&M~7*-tOfXXcn8+-c#WcOSCK?%2O+j}~0_j_3PZBSg3=Q)=DfBlqNz zl5E-(`Ejem_OePvF$j=2&(`H5>nFHRBWv)xeOa*Tyj^lGZ?xFYcvKZtVQ`h!M7(dc zz3^!gU6je9mv^PU$dS-Osb|N&p26q7u9YVoundy@*mk~Zik;`#5g`el6L z6{&QI)${5Y?pglYtH~)9O*bfAx|dvh=C%vc#$n#0bm%MY%YtCJ z|G|-b@N8p0^5`yZ&U7?YTP_nbd(JCIt3JX(ErTSj75L97q(wv0Drc=e3N*HiXen8p60(NGvzSfYT(TV+MFHBej~oe zizrOSwN-8YBa^V>&0aAwwq2YvAHR5ns@a@Z`i#iQDU)zncYE#R=Ct>&^5@!qO2ctu zhPL)s3mbS-FPmTJaiBdNxHY3XAkMKA8qgnu84+L6vdqmkn)Pw31Gk!3J3Lr|Fwf57 zKap2ZPI84#6uT_>=wu zOrW>_ND_08t7*P&qQIuj1{ z__?U#P8zV8m04WD!k<>t^t`xy{=Cmn#=LAtXV@pPNlV`M`pUAssRm1viL#D=nuju{ zTe#)Q(SauGZ|d9Ptbt){a$S_SYkJEV-r-WZNQ7kTUIvTDZ3P!qzlWrf%<#F5+kQIL za9>N#ng4XAY-=32Jn79`sdEmFXxaXwy?s@AB@Q**=BAL%%+$dDZack55YdXHW3kZu zMudz8S-)(mi8Gr${`(>Eut(4TY8tQHnz}GWp#vNqbRRlioO}Hd1SL4+daEj2coV&%3WyM6&gU z!BfK-E7;rV>lum+YvmH^FGWs%#kTc0E%*vRJWKT0jq+oCGlkRGH`9-U98&c(eOs@B zJ{z9*%Rla!g2;-z`g&8SydP)jB_cC5dk*V#{4J4WUw80lJ4+N;*cydW31iX3?HMKiRWdAS4S1>NDda zCz|C6!4x3lRt+m+k~H;SH{0Qc4_idkhwo-7e$HEX4x13(_$+dsN!Z%!#OpmH2CXL; zEOwh`Ru>W_`uxyZ=@rDfeqf0h=?!hJ=X|Ocm>|-PUX6AmDVGet`ypFk4K9Uoh*(AI zmT?cmPLUXi`$T>ccO^v5_qV_6o0cZ&LceR8>q9CnpIN$tL203WxrO_G&03n{IPch$ zhBP>MBuZDSgJX>1^S=#=85$VpAjQuDRFnO=sETQ2ZSd2NzvqB87G7^;r5307I1RHD zZcVr~ET8?&3qflg^;rdtCKtn90fN;Vlb{!N75g9Gh(Czea3$E}+;zUMbC^j@-zHLW z4BUOmGl;82Bzb&Co@~1^?jt}JAV#eZy3(Jrd#UEdt^IVZ5;bI7?!9C5Go#Iu@NJOi zjWVVB2djY}pr`=3BtI_1nIt2+T#&9OAOv1;>(WG zTnzmVbB(@ruiCp)HgdD!dw#8KHuh-gCH9Et6O;FEt)ock7~}^vWx`er3a}}}+i??N z7?uY6@N;Cho;?joe#S@Nlg4b!sJ*Tu$j@f_M1lrxn<6F!rBugoO<-$UFu)WLMH%1Ow5>qky>DYX~102v}+GuYi~INmhhiJn#L!oyB(}sJ;AM&G_Cs2i~9h zO%k3zI@Wow8ggG^TrdRF@3K56%}O3$BY-4JE`cMVc{(;;kV6JMmKC6AQb|6wnfy0T zGaCCD>s~K8p53iu;6pI|%3`7$8KdNxR>T~e`@FROH2l%vWnmBv7Rf=B00JueDz@tf z_y2Iw;`_pSI9Hmm`etKVQ#@II_ZEMgWlm{O`!>5@vyg(`dzV zMf6!}3cux>bM4a#dwSV{z26A#Vj|Rrz!Ab#zg?d|(RZFvPyi1!ZAro$^fE65eFL{L z#|YFyEzF>8fLv4q5Hu!V$1rGjj(|pkG%#C znDb8vbq5+gDNKZ%o3=Yv{W^7yBww zs#?hO@Dw{iPFVV@!|I7^r`tMv-$9FzoKT_0u5tj;XZw1ys0)qVtkm6LVSIlarbPzE z+-s*aEefj?-;d~PNS+px88Mpc$&#&(@%|Z63uR7@5qHQQ3{_Bb0Jshj2v0(FxBZ6@ zn&VYLK({4^m0pc2ttMjfbPkTG$7;0kfj_dCN)J~Shuwl04tK1klRtg*H~LilF#U*K zBt#8=#m;tEr5@*NlxHcb!hicoKLf$kCfg|ZvMM{x?aiFV>7CgsF3Z)MI(+K}it&&k z?h#|^Cz`s${+?}u9m8YC1HD|T#O!ZG?$eUlwejO#qCUa6zp;Y_kIG~Uh}}gad#&Lr z(#7o+RYjtFlg6O7*cEG+hw}Z0phq{8-s$h^V3W{VbL&+fN_QH$C_(H94&sAz^MNq8 ze0b=b?j(Y-f*487`i{g(p3zq@!-v$JG(#U)YRBp+2bpO+9NA<6Y@T|nKqFSTmDp%# z>nzH^fpDV^NZOBWnrT4{TvE8#rTaORSH`3fFlb@@$@D1GsmsN6*$22AyL z(g!O8w|T&=^mbdk0`>fR!mTsAS(2rHIdP)1ZUuO^46cA4x9Nil?|c3XcGO`8iG1nB zt@Pf0>WsnsauF9!BuzIKZ7+OAPw%-z4_z#wGooQvc@Y_#$5oSDA6QL`YMK068%>O| zh_Y(*_olJijEWLf8qFG-5`WWUFOP=*6v_>0Jm+<vOQJG&_#;w)&>uxxb?0^sZ8NqoxnS#h3m&37>RD zgCq7-k)9GQ32r(BfyxR%W0zR^4X zERougwQC+(&s{&|aB=GT!&d}ISE{i$ueCyme-m%%@K#-8{oQG?w#2txQI)7Ds_`-x ztOahK)-kEP$(LgtUQv~5Zk}+WE{!E=B(f`1hozMciKN_5>Z90yYNY=s%L-E8e!+34 z8pFL{-W4n`r=o|=Zg=htXz$+TzN_N*?UQwHuo}UHz&Y_W?~Q|qMQB5D*q6oOTiN+w zccdf^CswsT^&0@O4i6w1)LoF#0AMl(OTz-@BEJx5z#wnh=?gVa05F z1+6%kcms!=pA>NtjFYW?IJ+~a+c32jZCxF)n@3L^xUjjJ;-&{0zBPKRN!2DU_*%=GQ$)qg79j+q(mDCLBa{z+l2vP2Flc_$K}x zbKb4X3=*AZOcf*x5TawsNX`VgltmxqKpj}s@&o)+$UQyLL(Ap%LeFp3E@jYfeWys; zVDryrV|6(f?1=;B)wW~w+poWyo0hB;?h9GS>P`116Jun5p~v38I)O z%+y+zLIt+&c?u=Yi0?VM1OI<_uMvT>uD(Uz%W!rI%M@2ITopX)4hT>3RwM@)J^J83 z{E-V9u&<>siSe50iz~Qo`JycMy>o>^pVef#)sG2&+OV{v$jIPbv|~W$2;Mf3ip@BT z_0=gxnpQiG44F|&^*dyF3mS|fYI2-d)ZXOc#Q1%{f-oy9m*7U|YEu$Uv0%rZp#s-I zv)%Eq0Y5NcAH_|ratlEG*aI?cc&7$|3+e2&4q{laTN(^vDxnLja!$p4w?Ox8ETW#C zVh4Zv{^-1H1twu3p9{dNLUjJJ)D?JP(uI#RXt%v#*AZq(v~;_f(|VS;H#v!whRB5R z|B`1$LTBoaGbBY1ATfNh#7(CQvz_E+IG6HR^a^+Ap?boV+O&_teH%mCs8as_L)lq} zHT8#oA3>!-I%OhV(jcuOEg;<>UD6< z2F%bHemi&<79PgYZkk?9e=(Q5^Sa0d7ceRZxO&FhH8|KZQYS4c^TBS5H{R`LC{!D+ z8B9PgeV3|{J9pYaH(U=hir3Tp;bjgm3zqAO1GgZ+<-~Wnc~=fZS>G}=w_*LQ-Rw6J ziyDJnWboWJD`J;wqF`2ZX&?zezM&`*T~+%tDzjj3`(HYg7RaxE0WK>D?lNn7C zRqo99y%w}s-4e|Bj(ToL#{u?|3W-_ z?gl9M0b$V@Hm1k4PtBdt!m+myon*fDms5>3eAem_HuOYN`L|dpIOV0T$Noj?mFd;g z+?CtnD9qyUe&(Vx<1Xzp{1*?rHm_knr>)D~?xgFN8x3M+?ZN$W7u+#U?Bp|D>s(K@ z9Iiqvuu}4(!5WxT^S?Po^2EsY2QGGK@$J89+D*}my&D=T73Sd34HFcsr3qshMU$~w z!iQf_82KO0$CD)uV;GvV5gM#8c`IjM6*|r$jcwi(VDZ4)?+l9xwsH#z!0!zqI@8TO zvaXBir~PVdvDoiNsZp)+b0AZOzHcg28^9W>VZ%L0P0OHtU5~8zLI)W&2V*ELbdSvv z62J!lB{>K;AA!ER3%t>J#5Eak> z=q94zm*~|fbm3d1HCi$e`fO6xY_qx}(CwvjYsU6rr3Y%=P5u&VE_4Ys{e2zEi=Ct%Vx0H;P$r%g53$eN9Mk2!02b)bD-U`Fjh((=+0`|EW6;> zZh%XG5*zA4zJ#c5Y7FtXg#H1=6h3*5DQj@4bID2@B`q&;$T6>1bm>~Gmr)W=hT6+j zxzL(Iq7F&zecWX0G#%x!oJm@D|KWTOBo7xqSr7$I-Ekv+DfsnW<~^&+wM5jqLY$>w zeT)%??sv#1fTqy;s}9}VM@~0tTj@&o9}elUU-b}v4B+MzUB-SgJ4o~U2}Fu5{fFZo zv^EH(TD}$Nz%Wei&eVhoTVcJeC~lSO&v@g9gm1z_tx~V+h{V z#tgK9`ei&43W*VM7XiL&54uZS8OxHO8D-#5g(LECG+3G5x4QydJOj&?RbuW5@DMDW zdER1`=N2kd`(<4&sM~by$Z-SW)31RsvYG^b_a(icrx$p@Gn!tbw)^RERFx~BL{q68 z^r4HCr#AlF$%7R1gV?IhUP#_NU`(1>HvAJ%o^qp)-RuL>P`^pEZRGRLZmQIyXX0HL zW1@puoom2Z?>f*;SwW?1bdN64ZpADLaX5mvVJ0UR?Xj=NI%S2~wWn_E31mlFx#&-a&H&6*~}CdTJ>< z>;4zQ4$lrPi^X(U)k1rQogd}*261MDQD`= zv$Cq&v1F%BNK}L4PB_SLaWlw#J~Z^qw!p`P!g=)3aYKILsz)j@Q~hS{<+GfOyDv6x_wrzb~!hh#+B3&KEtJ zdwDtFlJ?x4f0=oc0iWw^Af(Obz^IhNd-(%dL=gffVlU6JSuf|uDPB0Wcb~ngb+^=( zr`jO%#YScalXmM0BL`pC}8h^^F4=eRFfRQS8+$K^fSbXFE=s#F(t=ButY(-yz_E@|o)XQb%rKBQyIx24o< zlWG6Xty{^)81E|~JINf#@dpsVG^MBV$2WnLP5twV8f|Wc>1$_O=H@I>ON&;sSCy2x zxovUBoU9L01MI$CiKbaxOuVvr#STSsp$9)20kz7J8fL986c0Oyg2rHiozRHxFme|w zQt=d8l}cAD^1?xX>Ekv>sEKo(v*+)e8uBmI}{*w!Y`U@BlMD0+2AjkU!;jUU4N#O)nlO`>dX&l=dZ zw_(-UG_qA9gX8{-z}6zi=H6`drfRNEvzgfy(q7mDmU=p))G_*7XFK7_-2@EED3H19 zxR(OD#$hHRdBX5^Uz+e!0?7PaVuJX~!9 zi$R<`(!r;y(692;_cH*2CColw@A5OIJRP&&h+W!{k3fat8!vQ}Ln~L!g4O2Q+0ZB5 zLZ(Bf!;-OnY-CBrBUl!{vtfUJ&;FfsG>9PB7EUY=;`FvAdd%%irzKm zTP~z52(TelC|Y9x10Zo%M7xRWPsq{5PQJez=`zKBQ<_TUZ|LK{<-X|wR{NP=T=5mL zeL5w2_({Iz4MIOjC~&PM6AE5Or@7vMhvv|EzV+()BM*ENj+PkNHLX?;W=_k3RJiI^Z$ z_LiQ*Kmav^NnOXRJo_zU!&J>N^aU4MZm+319<-*x=8~!brxe1IAFIbn#Z8r-JEudR zUFKm@;@SgHP{1;}p%N*p7lM)O?V@6`#9EYr4K?Zd6dprw1+Bw;Tq`X1x%66Fr^%Ll z>!-CUon1Nl4(DQ|Roz-Q&0}+iQvKkHkk77jY=qGv*8kl!3J*H97NjWt(Sep!`s`TZPT5U+`Atcqd(L+=EJr93JwV zvWW06ldnlinJL;%mj)H6D^e{KQKt38G8Yfs$COojdkHki$vncj%XzR zc6{1+=-04rX1K=a$&$x!y;X~GfB&C*VH7!+I~c&wAxR15GWq3Pn)$|jct<65Vd8;q zzh4S$#uZCl~TK1fS+Q2BN&@*07^m{$06y zJD&3khtxi+GpF!pAp(&WIYpl@|GwP>4({F~)+h|j9>M0*nb$vieAw&8W42`jMTHoe zuzXY!gVG`BS5}TUvfQ9SELzf|q^2iITAB;)sevEiXJ-e;Ne{0}%J>@}{EpuNFFf!+m9N_M0kLIERtj3FRgc z9z_<2Ex-4KIp=mzzQ^W33&JeVvA!SVFZi)`DbZzBjZY!Y#1$C?GE3j!*3qvr`cY54 zLUZ#=hI3ofyXm%|N$Z+%u{{ma5+pQHPxxHvlZ}3-wDi%iO$`R8uLvaMbH>tzT8#+9 zPz|t9q9-cLzy){WAz}|BUcq36?~UEye6c(6Bde~x%nh0XwZ*+hq|~S5?ArAPLp4t>=YOw0@Day1*N%bi02xOKoa^P2}lJ=HO%(UZkxF zHu}|vqbe-8?MacAtoVoOa5C_F{PBqHqxfs-PH!v=gav|m@Xo2esia6Xxl7o_mq}>n zT{6+P&mv&C=tm(;R#Ke5_DxKYIgKY{OLF2c_mg8qs~f*hfQb0(|0|fAaG3oGaAB^y z5bCJTXTj3w!afA~3fQOrTB)hBVwrR@%c9xPC+b7iCnKIFSF@i9pchV0tw@G6*jk(Y zR7}r&f(v;Or^^o7`S#d%NWQ_z0uaNOfjABn{#3NO{LfIurM?1`V8|G;%#j$yV}F<}11IA13hBfO`oc>|=~%C>rWhCd}f zJN~_H@E;ETt>>Rxj+^%fK_6x12xd=HoX#62{Zr@k2m`KVYfkTT z3;k0c5YNW{slai=>aYyskAh`MQaUAVSkOM5Xhp=#n$1Tla)r$Ncpczm5H`zDblN?n z1_A`89LdJ^!U&SD?;@k)?VMIrhn_{h|DC*^7-oe!L?p|4psje??V4MKnbJ8fw05lfMcZG_sSAL}p5;?yu~2@et=(wy5K*DY zL@&FOh-2}}9#H`hz1nWLgUyibTpIwO_+asFwHjrgdZ3M-$abzY**BuHWRj}&P10nq z3law9+v5&h4{s@eSa1Wp$K*GJk&{+46lBY5|^5ljC`{kB>L)8A$H2<8ue--Q$Kf z$1Fqo7Mh=U&JlRgTJ`Iou3PS(j(Hkn>S+j}s;GYgr$|ffGEl~^#64NQ%i>6Q`V&4{ zVx=Fhqmy2|IqobNKh@~mWrdhp3k8o}W}~eV6r7;Zt9;RB;|i#?&kn5#H|iTbN4u?( zv__K}p*e0a(bXDF{<`jmp|4wB!CD-C)Z&?WMcGrA8#_~=dXGQ&?&7He1)}0~Pwn>* zUO~%VK|TVM0j4i3tB5zw325{asWNUyrkp}4=Q(mbM$6jY~&k(|; z7Ze~)J*B6nkygC+-rrd)NO@5?V_7|9O#mhh6&#|A$ijXxU zn6w;O6-zx)M+yXgsaS>AyfakGIO@Bq>zQgGPKbr9djGWA;6HuvbeLgR0UYSHFP*4Y zV#03Cta{o;NnvZ~Z{zcsMn98%-79a)wj*$%Yicg#%zX3N7&a)nMK7w6q%naPQ!aXg z$D3CLNOf)YLagW#$2oKjcxR#|lGI@bAO4PrIqWwTja#db5)A01S8$IAN98u?7{b%s z_yP_(b3v6kbbVF}3aFGsSu>1(Z>Q)C961Z2J>x zfc3Z$zBR{Yvs3P^vg9gHmhldn&jBDWVTP@CilHu-w%lyw#d?i7Ztdqj8oPVH=6vgZzF%_m&6aWUcblmQyHDmE0BhM18K-Mvkw*h zHW7@nWd3kg<3V8~OpF&lDrCHTAm+9sH8@kR2VQpPZOB`;CeSPXbvJCnUgzgIZ@4|N z4}d^SS5B))<%8K&emfN%QjCE8cp|`(c>tEN3?1jbK(R9?bFr|MLA=vS&dp= zvZzKWji|55SRaK91qv&xS{Kmn-$BWPGLXwx9Oe*$z;M58A zZG)8xFd;7L^!L1DdwK<;*+721m1YIW1mWy~B7JKM9-FfU2LSWUH*?=>Gl!i(JoNPymH45;)%FcFOeC5I6UN=pzy- zi(sy04DVm>Iuiv_67D|kNGva{)ajimhwuvd#ORmdOXM2v9~OS{vgH{lQ`0S|t9)T1 zcDQVp>T+PVuzJU&fN0*-?stX8$#XZ%b~R=alhXCJs>DDJSNAs@g`H`IOxRCjb67i3 zKUUcuw8QO{Y$FQg{?s0wFu#70Um`Hd;~xZXolp3c7t`NU$4>KpUM7&m_1tz{B}Ksz zL=ZX#!B6mAi<&D0($lp!dHhUnm8>f*z#9T0GBOWPYGMrQvGZo^Ms9x3vlo@TYa0e( z5mx!D&(CV%JQp%a$_U*QT@D}!28bky&V$tt6R|6=Y(CqNNF+H;9C-jmcrkSHNsc!% zY z7$`eFo^1|-d~$r3YP_Bb&e3${8T*^iaa(kP-em!dt5h4v*udRVU-uw%~}bui&Z%9EuM+WG8d)j0xN^V`&dRVzhP7&ZrwH?cVS%} zOPyFiH;#>2@J!O8VwN`_%I zb5HV9YZvJkM5XnTcPmnyS!^1g&fU%r%Au;0k#&B;L>=Pd;^ZHucD>x>!`KUw1P2wz z!W@9D;gT`n^gfzNDR{d$@r8X<5W&pq*QT6p`yDmqN;tsT)EH1a zKhph`fy^L1Kl1Pc)3fNs*Lbq0IMB_6b^WPsj7)F68aL02vhtxXpl6bokfuMQpGOQ{ z>3k*RVtY1sseoe51&gL7wX?MQ9ux#jcrAA6j+XIk0lVno*s831^$YlAmtVzOM09QH z_<=Vxg;cE>sU|1e-n4kx6usLw&j}d0O)v~!pVy(e5}5cUw~by;6TWlbefFT`ZtSWX zy4i#5$uzozLibzG8NEbTs|EVoi66B@@2DogzAJHiw^My9$kzD|PxI?Vk3sQPwji zl7eKFaSGS-2Q5VjY6<7DA^Xuoqf?b)KrFEvlW4IYj z;D<&2QqD9^KPxS&_gl;M!`xdHl5UwQu*hSY?i;)G3QNc7C_+Nz?5p^qdqwL&7VG=AgCr=0V=Zg+4WbmcGDKL&c?lEM&IzD=U( z(n3^M!W>khxG+FjMn9r90#`H9^Su1Jli-=|zP2%Q`x+X3Jsn#1rkTHP+B&I>x8XPM z%n8pMSZVR*VP$`_xFn&tV1SHLXyW}ma{j;y|5gA))oVp_%etil=}F3&-|MCd8k#-Dd&DV4^Y1RGjvY3x%Lx16M7ruS{e}9#K?+ zgHTyVnrQ#NYhbT47wP8_-W<4=axeOqQ6Uam1SBT;9*G*ZGy%vA`wilkZnd&)W^r)A zdNubCwoh)#Efjk*@5!)xbiGP|;3CRmQ!t5z7RWZ~A!VHVon!PrBz|ga_)T|R3fc4HsM`EG(xwnNq~vBYm|i-%Z3t+m|G(wPm<-plyrkALRmxq zgf+su!p#gZ9p#m1sKs;*fZ>wvoDnk)=0g=WV*Pus$D6*8l~pb5P0jz)BrEjua`o9+ zJXG-S@vRH6)JYtzlAiJUS{Ywpyv!XG=mM6~YUffHDT+(~Inchz#V}i@b-`3d$HR6u zAy~jAI$mc|!!s2{i0n}j@iJIpXa%<*d)4!u-*gZlD~HD)aZgrr!*BLXcYg!5?4l%) zrV0Y5XacBIL`ne%Hl@_X-;!lI*h0QitZ+g81$^4i0)L41N_tvS*x1=Lv&bc9D0NDY zXEN!xP1V#WI^~vz>HXaCJt$bpgK}+uZV{5w2cn-J=Y$6M1O<@P-^yc!1^R!bo~m)a z%4)Ds#Wa$ysfpH|v48S_U06kQ!FC7M9tLY+V@f1@QywkczM6#}Sp&j6`u$zwWa1U0 z0eRLr0k>Njn#9>Fjmi}21ewPi(5pfUHuYJ2rRGW#c>IGw>u~4`b|z0qF;gD zVwD3{U?;S^b}Nk)4)9{uOevtwaY&Zn+DXzs%LDC@QB;U$cvC(#Jr$Me%{!`Regt#Nj#`gk>8yI;F$oO#%b&`M%ZHN`(sj0|*@p@K{ZgDP}|}1{9$!aTu5}GPg#v-7R61&-xMOVPvF6itn4k3OY*-ye4y&xWxYehM~=Q+<*ZG$#(zHBW> z61!}qFTVfNK=)~i&2$jg?Vytn8{p%$5ngHkq9~|%?{d-NuHD8gL_tSGkfwBwDXE6f zJACy_b81Lva7)9Fx_3NHD_Id|x}D&jA(OokJ(d$S_oW0m323>Dt(>n@=6#2!6&?5= zx_MoWs>u$^?tC5g@l4=3D-}PKJBjDGxwUWN~amhtS zX2oeX#X78(_}|9=D~Gl(p0YSBWy8lM*Hw~Ov-9e5fy8m)-1sJ^JOn3lNL zOXkztvtpz!0@Ay^*O_os^*jus*e6fkDFfHWcSVZB4uVj3ZxhG9Jnw=%wk=zm@90Bt zO%y(D4??X)cakw`#rqzCv?kB7=SPC7b;gjRnwp~@6ibUsW^Ztnn1!pVei{%7r%hhUtA847UZzb*sGo0KIc*q`+c7oE)4XQ1x`%W11egI|%ez81p1&r4#+-Sv$P^E0k^F-x(gOKOVMWdRF(( z9QAo?E?R{J;gQ8mRj`IK&n|F{A9o$4iO(zJ&1*=K($b3(E200{ul6@pjgJFflVXLJ zWqrCR)cZb?j^9dblVCv4?M!VLV&-Vl77zQzP^t&>GiuXHHm z;Q#rso7_=Z`El7uG7OkJeuW=5pPhDe0`2kYjUyG8+r|vq7;T-)1y6oL8#jd+pN|^9 zgi=;+kD|7A)ybLGc-!4vzi%}sPbpME`H0Su#m)q?qvrC%i-fRv#&nUfvw4%1 zkcOAKz>bQ#_b!%m`&P#3c)MW$E} z1MGGwIO0a}Mtb^2>_Eb~(Y=L%YnKRqokQ z?S^Qnf~Piz&1n@Y1izz=*hRLCN+QOEP2OgTJ~Awm(rf?4Dy5|Pa#1HIIWkM^+O{qNwKasQo%m;Xq*3; z4Wh65F#CbEjWy=r6pLRlq^y)&a!iTE0bPS;urGpikHXAZnx&Bai`&Od*SJt*rRBbK z(#h`0;ROay594^tm5rT2bx}G?u2BYCl$khp;$nlOHQ0$!d@Vc8=pCp)cAEBQ@nuuH z=ua|&_sFV+zHR-KnywGf7(=73$DzEyj(3$7W0~ZV&$&gZL+{EwV==)D$WVQF;SmKS=8kV#`1A$J zCCw(4gSC4K$$X`b;omEqpdMmtcur~WX1#l!Qm(#DkF|9$WNv)6l6Er;togplkI7KM zQ7>14G(;_!&aM3r^1O!SN%Egx+@EN^LB@V6lV|Re8B54%Y^WS|pbNqtf`}~EG}ocH zd&ndWy|(%})<31`oVgWyZ#4BRvkm&57&~Wv9dO8IP2^9yDz!DX#Koi>uAtQs?Kvceh$c7gI@rR>@Q>f%)uUQ*aujF$=39%Guq`t@2a+;Wo2*elHNQy{xR z3Zpw)2!askD*hZj@Svifj@Q%+hExlzW|}hpJND=AebD{SfsHP@gzRa>=%_(YdY*hW z5qU;azILEM`AVwkzmVbGO50|xdFHFlr)LP+PaC zCs#8(pgb<8;jP*H zXi?*yI0Nm9@{jk^eti23ZCHeHxKe7%8Mx^?T?NLFU_-NNN8z!Yk6&2Mbfefw0P!|2 z9q%W;7jqsJDEY@51uy%jyFDj#;>PwT<1+$)xHTe*Fk*;hNfNKSVQ_u=zcR;>{Oq%K z%>h~Q9(pI6mI$$;&q>avNm9SGI{cZ!h?2y48+AVIxX9LbLiMhcHr^B|@tor*6|AG0a9wS(DF_*OaxG@;y(ue$V*u`dj*KqJGL9j@n5=bjkn|8T~oX#T_T!3w^ZDfB_n zrF1ev8b@jm%E>8L&XMa&`nBh$`(c_;k`TovHHL{-n=g;P6kwmq!wY$N|3!obJS_B- zab%#m9UKL|!z1wD?X=5abY=I$7z}NbHXau}{a;V%U8H!LAMi5n?Hi8RyTV`=!iQ%Y zK<0A%I!W>Z;vKW6aJ<5XxvYt{C8#{hY_l%sBOGqDcF(xDcB|4wnzMaB4}FpI;lMTM zW1enfYv9#!nC9FAvuCM4?5;z6t}$~g8Jjs3y&as|aesn!UE88(exNlG;cRt046qy0 ziAL8N_*(Wo-2LHYHG#oDB4PI9fw26zu=RCNockEvWfucv)^feZ~xXF!w=#!nqp=Qdy&|OU?Uf?~6XI*3x(6w*9Nr>h0y7 zB4!^Xk+}qGKT7goY8UP2R_>IBJ5A-e^oVxrJL|`rr|P&Kt{iuUboqt~-jA>1V4<5` zWZmk^XObfK(pj70MfS2I;L7)1G4 zRyaEnjKG*)b087swaMI0%UvT~(&V#V-kN0AL-F+>x6NCk_ zP{ZBDPw25Js_4~R586g(RuIJUnu&Yq?)%2sJEVHA-TRVJ*7@kR!YE5oyA~ycuCe(G z-1Mq`*@^fhB46`rHQ)x6kiLbSn)087`Ka`16E&JEX4PF!urcXAN$+Z`k}}9w(n{6U zFkF0ZWV*s&54Qx&X+DQH{Q!O)pwE3DB| zzEdA>rQ9~gJ^G9acyE+eX5i4v@(Ra_gXRVo2}2`ELZW4M0q$>XgjViW?YY)xYz$5- z#{@RAsrASIsH(&NDTYfFe#cm`>?y!wdY}{shKuUZc$l%crea^9@|O*A3atC?JM>&E zT!Cn1-!KrK99Q!%&1`vvKS#M}%WSOabR}0UbHyT^^)@rvv2T7bwtx{5c$~TgmG(+3 zV^D{vw;yOZ1D#NlAk|ej%lm!g1!Hy?DT;-WK3<=jcee5k4RaA4J+e&uTj`X3I-BN8 zwJPT&jW&6eH+R{-VFcJ_b8JiqFpH%FBaND-WR2WVu2ukQ!wwe86w~KrE?@d>bzy#S zZ67Hs(p2c`S7Tv5>TKP#DnTS^bP9~KA88f{;srZm6*pqV{&IC`6YY}<0R14 zqTT0m8h+XPA##rn&XU@|9S|xkCn{{2u%?t%gw! z?yN2&sBK=6_2|(2e$>i*0nOa_=cwxyFxq$LK>f3a0*X-%&;OBXbVdE^IAQ}3b^f85xTbm>oi$&mI#(q9xg5pN$U9*OFC=-@h?WIh@{J+F4 zT>KpM?ct&AtB}L%-NP^}heJ`tfkN}(XFrIH67rmV+P5&)Ka0^lZwj8@(N};w_x99` ze@zV6=+T(EdWlRVE71=up8=-paJ$I$D)8xUjO_b43A%B6HjdtOwa6&?=#{K@N8LD- z9r(DNK*<>HjLp0cTLSf(cJ-3uo0+?K{SBjFLk~v7Ej}zLecJqe4WsBRt7_K`5au1` zxI<)7II5bilE}vPZU~8mG>MX{=O%KQ);ud+jMOim)=O_PU9y~$FQhRP^PH)g5cMq6 zoc4;}Nz-X;i1&9}YV>d)yy)GqcS!z-``X+d{EUU{l@$F!UUK^<=$OLN0Mj=#)rQ!& zW%f^)zb~NfAIRBLncBj5UrTw~p4NGnF?XJ{w?Kb|l7SIc*nG6n?|X5~+fRn~Y;)%c zqe(UbQbfiA+vSj-&QoPSZH(VOO8wHZwbk@sJ=pOkptt!l0Gsp1K000%FZEShBuY(g z7<6A^WfEPaN0@TmVZ@+cVxgClu#=E(PXq1{+`8Vs^0yRlImcwXLbbEs!0}&J@~LsL zIONPCG~}0LK%>ef9O;Y&Wj-(CiBn(`XXa`Y7Kl&M+qNYMg86cLDF_J7n#P z7gI+?A{}D~?5|=(+%s}Vea&O@Rg^wTGT=CLl%NC$1u25r>Zf6aqzPqoj+VkL02#TY zE~_t;z6~7;z!2I=1agmZ1hz7-R535}Z9g*ys99w?W_XSGS(0T)&&+bF4K#YGGasps zyX2=er^?UqMbo}7V>VDjmL0M=>#A$#E)0HKGOJ#^gSwhH?@+lMc`)l*W_+7cd;bqp zO}buK@OIt^Y$+0I`GBY_uDX-CekPRdfCq&jGA^&E7E%@PZ8L}ye1RH`k*II~FlN1c zHqxKmr{aI?GLDEY&0%uQ*SQ~jT*7?TE&3w|wMk5Ccf)M&uERl2wKV?xZSxa#uGmrf zhYQ%C>Or6n+dpf`fjoy#m%%jSJOad5V5HOs%>G_Avq#MP9L-c_qH&UyU!}jkMo6%3 z7!V>z8QohGyb|*__Bl$;w8kyG_o^DtBuXv<4B{a?16dNad?I|oC26(ReXP2*MjntUt!dQT1i{!_Mn7EjG;pg(tohgvC%u_4&4eXuV_ zUZMDi~uE{5!UL z`mjB2)Bj&KEBUh&Q|=#+=_j*Xae5y<35qzdRND0T+(jh+jF73XfNaXKHO)&psuZ{9 zRwj(e!sNT9<5PXa&gZZgW}`YCOZ+FE&7>GZGB6qYP(%9}zU~XE-W@O_{m{!%-;Np% z?zMKtPk$I47Bz^( z40^0dzY+2FR2Ggn$hpm;xDjcmsn!`up}-W-k~UQ;QhfQD+POUAd77s70ve*3>1L&jVSN3LH>Y9Vn-&Q_;sm0 ze7b;$x~$r?^iDeUO!`PH-R83Mt_>>Ku~z@DA0>$8f<{3Kc-pN24Xgq0>r8}tbBuP3 z+$YFbbbxx=S07wv#_K^~=+HRWBN%h9pMxI(Yif^uA^udIqSA`a@@=szphHZ1DFfMz zp7g z-*iMcDOG)Bm>ni{^A7-p89q>=e*eEZUL$N%LSZ_uKq-IT>GgH7FbFIKTd{<4r*Mi$ zssqu(-|D{w3^?%D1`NFbPw0a|gRvZ~SRc&e#nm2!PEHun!JoVEyD^EZ_-l)9@b)*G z7I`ziI;pt04@T}x;wOwBjfAj>%NWt&7PXr+5;JLFRk?PT!QIlN_mFsx^99TAGIGZ^vO zBHE~*Lt^Er$E&kuk+7DohG?EzTy>i>_h+v~*u*|Gr`u=P*yzJrNUiX{@4n<;lNu`v z*C~3r!K+^xRYqGBeVOX5zp_bvMCaP?>To`PJ;rGgKXO`w+xKfGp-77wLt}rkA(xuS zr8AhLb+rF4f97g=LE=-IibJXe)_&1A=0vFz!dCw25vrKHT>|wz{i_yJIH|4c@x>D4;$_!o>6o||p*&9BuCz7-gnk{=ru^J*0Z7KuCzoQrX#UfNhK#>d>-cm{!4nqvp}jZ0|9urfV#qkXUjKL&3nTI zB7F;dypJh}A}-~Hhsg?@U!1dbaSFK&R8^t7CK%F8?PyB{68*GwD_UHluR^}W=m$6~ za)DccdGYrm5TGMKYmAU9&qS)((#-4(&5n)KjQjCeGkw4JIen?Hg6IBvJS>=r^a&moLO2MLi2BL-`f|c&{>BJ{*bt;z1(Tx+;2XsBZpZHDxkrYo0>|$lc=cUQ z35{=UWL|r2J$~3k9j!aFVXK#3;B3qs*e5K9cPYmQsfqoV{C-UJF@A4bf+3CV>kmH$cB&gdWAMb-@n^ov;B<8D@?&m&%^^;}8t+t#pNW$frc@vdenQhRFb4|UGQNYKxn=PDHB zeB;?8wS%f#sx7D8tdA`QPr7cY6gGh_PB-Y`-+S?C-vhwk&gjvnF*46Mk1V6&bT1iNvp9?Y8k+$Y+*ku%eK3(%aqM@lu1qT~S6F+W9m8 zeBNo2kP$TjBgpp^G(6*6VnFJA&bB6(Z|6l5aLcsJLLtbF+jkI(lOOMAM9f!m-9$#n zVcJaDv_TQf+?*L!yC(K4&+C`zDRPeV-b}*vzq%}H0g-gYa)3P-dE`O)nnK`-wGT;E zk6hmmsrkN!^)#z2D~eFb`x&c;x7>c?T3728eQT8amzJPTZJfWKkXWm}0_qv@B*O_- z)J+i68Uru{7n*W+t9=0*6{PqMld_qHY;+XNx~i2mCp69~xRSGAPX-Ff+gZ^;#%M%j zO|Ty*{P6e!D79@oC=V>jF^?+&X0c0w zr(~oXBr0`%lLI=LEY*D+NzuHpB8~mY$o)jjARKv6_UjT z<2sp<_hd>y%++X5>ff#>1-%w+jniGQW3h1~?YgPMbD5B^n>ReLkT=AmQug((Qkp}2 zgSU8CpD@fl5>R<5I9XA;%1dKZdbDHZIj3MLF|D(OC=Cx%F!6>*?+N89*8QgMPgsvY z(O*w+n#KR&?L5QT`v17E)mGK2y=iOJZtbloirRaos1Ye@Q<1c_ckR}!5}On;YSyk@ zn*vFD>@5%XoKjZy*z2^>33gW-ZV=(X&RikDhL_O-* z(Bv!w7iDzz8pH|ZBJR{ov#0i4hic)sd&`IyIAO#lL)>4k_X}#0!lnN!_SbsV`#6-u zw>&H(CS5#T3|?-j#n`kn8&D=kFtStP();LCH%1OTK8EW6PS8CvSR%-tXi1RXoN5LJ z$5}|01bCvHI%LF_tc>5zs)DEt=T-a2Ebp<0!SUHXuL`Gw{0@bY5)K7fAxuxy>*Rgx zB+~hFqJma-!o}>m`rKU&Lw>4B>KcaJjUAc_C=v@Vlv_fXSDKU~JS-p2{UbSZE&o2I zEQm6c4^;DY5(cU9)au0xOBL2=GYz@kH8iVNQ@AIpHCFfWWB0e#Irs-qi(el5fPb2X z^vt0eI|QG#@!Lgs{=`{&u!ob#|B;ww3K`gtzUjkHUmrXPi;U6+>?ervo0y_7y`_`E zxt#(X)U4ci&}ET7tZn*VBv27)!(COaVOU=7-tE}fdaB^Rmha@-K-XTQCv-r_f12{0Kv1V-I~b*nK)) zfYagzFu`QwB6TfZ#3EAnpCMqEGmt>xO?^?D#oK`pq6)Et9vd1()t$MhR2jh%dc z(0A!WpUQa=A?AlL%>K3HSGZ?eP*79wqf*3+hsKsOWwR?p!V_}(ZG?3?y3CSW&9Q$< zzGh@O5?^`Ks#aGoAeQ5(#@r|$Q2^?XnS5C62yaT5UHzQ8G-*$-WSiZ1w`+djImH8* ziRhvNzWX$3?dkUc$q56siMnkL+N9>m7A-fo#1C)Zbj5BkJwpBphxhTSnf2Z}?d4ew zFT=&7<)jlIhBNKxXBiP@*Bz#?Og%*R}s)F_*ppL@|sR1@drBm?Q;k<+kn=G7C>qp{N@lgD}Pf`vh3Zm zo)o9ldL(E&adUTU-?}W>XUxcMs1u$9U)(v-u2`s>>oj)$k3t@8^9vP15nxNpIYm7|qDZ23_WZGU?t6(uX0>{h3q&!IZ&1%AH@Ee+r;YN&?) z&<#^4D&4*4^*)g%3b0j&QT<*}pH9`dy)rL)y{Vr0S z3#TCqYL1(xx3GI1&dvL|p?_apbpq$Iv*j0^oUzM(J&zu(Ty8;hIpmeF#-|HLA#DDA znhlKZuoj?EtZCWuRkU3zPhBmaFZpx8T0iGFP`o$oEEKZyBfY101LG}=n@;gtp%ZF* zlg#*S&~#J&R-h8}o86W`rLv&(3G;=8)GrOn+cj6ofZT*80)Bp2ebqKPPMtE8stTC^ z-^k%_tW1D=O2_rce>Y8&Gl1h{=QM7I@8~T;*?sBDDtBAay>WgmlI}WfrYvCDy2eyP z$i9BNLfZE16A@H<+ZS%h9^7S3QXN0#Hq(=0&;dKX>l(P?LRH*lkBa7syZ?4>e_|-L zc4lX5q3!Q3-o!L%#!M4Nu>2@@w_}Qr-q|j!;MZv+=xFLeO!YI_s@4Ltz?sgA^>Je< z6womecjlJ?4s~7BAZx_0o;-qTKoz1D)Rf4zRr-b(h`Qz&ai1u|*la9H=E***6-s@5tta(qE z9d}11Cq7BX0V7PF3j)DTQ7PciU!kNUgLl#YW-hx!j7k`Y_r|q*2)uuz%Nq$(dFc#J zL_TM22D*{TUA9G^-5P!T$XCgF)NSW)S$4t&&yKp9R#7rd-Tg4vA;unHqz(QG+0lJs z_WUJ$)0FtJ>@m?ae zRemdVW0^v$Td^JVAXmZw*YvP>c^YRgY4s|y5i=@1VA_7d-RWO{>agOw)*6*@K|vnn zyL;K*3t@->MC$R9lR0gv@;~6L5Vj0XkMB_4imGk`8}jX~>ekQtPu6;@^X)LSSEw!? zUDiN>W8vC;U{ley4|hL%1-Kye;!J_bHC9PERhl(R?Kw5hkHmptQGYq{ANww91W-c5 zJtLz7M~G9Ocg5b;_={vnxPmR9G3~2@H|Cw0Mw6vr7!8TpTkGMU4#=!f>Edl36|f38 z>F>~aH}ZYyrXst=@@~ee?)yJ?E}UGOxv%_F1rDY_Vn{V?j2~~G&I}E_tcOu!NxqlG zFafA`8(>NEOQmJ#GCiII$CGzVl1)0l%hmf(rC}~?`;Yx{PP{(cVYk6MI@c*INy_}m z6Led(420Mqy?>oyK}3JGqQZLgfl!&h5ipcqc8DcL<&hZKIW_T5#a}!N0x}@m0k|K0 z;V-!&8n}-}U?uJW&yO1U^ z6TG6;^k2Mvo^H~SZV#yUc)UXx=)y~k6t{Qumx8}Ij&?S6Si8p-v*oVa{q%oC+yxdJ zP!PR+M7ly$Ca7+K(&6sd=nnsA7%P!`a9x$ay0x39we%D)GYF|!)$vQOx}Sfv>l<62 z+EF62cN8x9$tKszvQpAmKH4GJ^q)Uc+7aerQ|wO=Ap_DQ&Cc^iBKLn349)-h6wgYC zp{#94QX+`18T*{}Zo!AFoK$3S_y1q*a7hJL(8Mxa(9_Lv{8+Uu&1I?rZ#kH6}B!2wX zFxsXRzyE|76y9^cRrXg0f0{2Tq@pu|{i#sWxd82AP%J=!Lrj%;{+SgV^Q5<7m;fyw zk#~mB4C#Je1ok1|j1{kjK3cjL5^WNXGmQ&z4A@xNIyxPFwgi<_Nc^-Wxwck>9+fOJ z#hv6wbSa12(wFN6zUz2XXLh3*GCy&9&H%62Z+cZ*O~+Gcj!Xx&Pu{GI^>d-DbI?(1 z*4;Grg=*HI(TZmj@{joR=(O09Cl@Y)33R5_v}^7**UWq#${zB z(tBTh&`hz!>;A)4F>1vK;{hJpByt!@{>nlcqIwTY*Yz;yWq!+Pp}$DXLEeOsV|)Vn zhqkNG8SKn13oQB8NL1kb&Sh%|_od<)gqY=vF!lx4?k_56aL$H^?~5B9s2a|nUYg7q zH!rl%K$a_7GsjKxgF8MvH+k$15n%NoMFSYJ#0y7~_;=U?h|8_ZDmC@3l0*lM5|4xJXPo_^GazDc3;zwS+ z_`I$eU$^M^>HIVX5MOQYDLfFWnZkLX?8@IHF~P&QZBIZUY)e9{dNXl5bNoo8dJt&p zuwVKr)DnLPv@|?=6TX*5Z{qLPR zsfq}^^a6u61LJwj+IFLn%I5Vdtl$MZv|Oc0bD{FQw0OT+(SaORolkg7DV_cO=22l% zgH{~EK@zt&LdP-2>OH_{f>4aBwqUB{3NqV<)|<%0iv@sTcj0~hn&9!?7|mvKG(K{` z;YYrIa*x7Z5E|QEcqDXC@|vXati&Y``q;p)qoFhau}jgq@TIxHGEG5Pl!ENr`v%qQ&DEz35np{Y>NYz zoiGqZcMf<(4&*PMLG=jq$+c0nU&)l6SvdHc7}>-Z$Y5z|Cl`CH&)J}-@_{@6Gn}l4 zEVAEX{4s~DyO;er_7V9Fd?SvJ75^vof^Uy}Z_Z-n6bO-^<^&eLyPdkA7M7XdNqTj$ z{-3W$9hH!ODq|ihT|i@^elwg<(tvn36kjW;jZ;QfnkEw8HgI)2oK_E;G9*sycFg~D zpjY&#dRtLF%+zHgtOy=9E*Wg^P%`E0@<+ZNcH2>l7flmjFpO16lWJv_gtoAXO6H2Q z{4}59J1!H=_!2U69~od+kI>L z#xD>9nVD#0gZD}}QRv}Q29P|P>N+Mpix#%_C(ati436LH>;9mK+T&{MfvZldb+vM0 z83OsFjyy8W!iBB-OQJvi4ioHZ-Te$u;mbdcCs|uhE9nO9HCf$i zHe|0`)N@K4rLtvK;qDv8h`f?CfYXl-*?SkI&&W>9{Q|~8l#2!8kEPfvc|xyR?Jo3K zs&pOn%UY%a701zv5|pjQtM!q+{{_|zaCcT(8j{|-Dhc~8``|9I%y7mxQ|b(AVUs%2 zBu4%-X^L7M!j%z@>6DP`8^z^URe4gF(?~yTf4al_B6=a7{sln#{xz86qHI7zY2#E` zWRsHrqdL6E9=_4}A4N+6wdQ6Fk)@py45B423G|p8@;}%w!R=#M{}>G%BAAK9N>-NK zw&_;%-zLClk4~<;3o)Xp|M&#w<8OyrG%)!)XLVUo|L5Rnp%aF1g7-1P-KIhvNRM>Z z0H%!0yn!J7YbO0oc8#q!_KLv9ugkF9As$L;LijyPo6$Rru8T~#p3R#=VbP~`SBt06 zwhs8ra)9|3Lpr>b3W&3KNl%DhaJ_&~b0FU~pN$xqsC>%0Qfsbtw2(0`3Pn}J$Lkex^ z;-Ye*-%u{cj*+pd#Vmq-sjZ>0|F7)($qqxppuG{p*zWea;-=DKChfpsZE))&qv zsgm){$w6Wzz=>*sNE~-HWg@W3>{+>M9S_a^%+H>!`pM_*Ed0;WRHuC5j%S*2^>Ow) zX)3|@L`wDMB`kn&=DmYYAD-qU$>SBjjx$8}h~OJqHl&kX#0ZP^07OO{M^qDTbpQ<_ z*@$!6=>w@AwRQ?~}^Pb-K zTbRNxZ<#X{j_99IatuG5Qh`0*kthDKEHM?awpNqpI?i$6$hQ_7s|kjDw|1w#KUXMV z9=MqGvU-y3AY_KzoBurc*h_03=@8?t*TWTn;POX*M~X?k?Aj95CXa~%@|L=y@&;gp zYr2G@1sM<26Jad~s2nk4qoA7#*On4&n*6G5kS@$%p-ZvWCqFHBwj4&$f?8^cZ)(dM z3af3^Q5a07MmNHiN-q<4^4K3qm z_~v>QnQE2QF}doI53{L?lN@@~k&VfIlV3Ez>dw7Fr|B!TIKS>X$g8!HVLJN73(NT) zEbE-XP#X)&BF02Ygij!c*L+#qngS-|adB9PY7U$6 z+#`2S5gEOL@9u{Nef;fkya}8rLQcdV4gn_!nXIVT(Ua&=BM9S6*FM@v4e93lkHVm^ z2O-?3S}W#4y(#|e1KR!T^m`3vI=ybO&-H(Ly_Du1_6nUGLOWOXpLYan^mkeUF6e%< z$w@N~lOm9M$JV@Ful;imeC1b%%6@DNnH8^x41k1Hhlff!s3zCS9QbNty0mKc-u-j4 zW@vfVnb-FfV7w@-?z+O%QUXmvB^5IIX!XF^=;-PWtY{08EfU@9Du z9?v^^LjHy9nJX~>j~P1aCPP0dD~W;eFOok>w8toX{_Z;BuLMxeSv*q~He&kWI1SAj7WBQp4FCgn4K(}hnL0PCGS>G$_)YfadULyT|d(W5lz!?Y3i1;{5 z>^+oKYn$0@>z4m@l+mqE2N<460VdyDV%SyAwH3c|yRDog-79IVvW3p?}R2NH4DLqqx`H; z{m%pAjAHUWdWBJ+Qr!L>uujZ^CVuC1v>Z9JR7Ee=Y#RhD>aGr^6U{Y z4Va&8@0;J<5wq@Xn!Kthp~o7{TQl@#DlGU~A#^oR8Iu7TTmtkPv?K=nA&F(_Ox^S? z7d-Z)TZTN{AGQuq0-3iI35(H{#Kx8qmKD%SYPieZ?a45yJl{`iYkgqJoN`|oBfbw_ zy!{y6OO&^O9}Cmf1EI*m9p0vg7%GvYkzHkl2$0IR&ocE4UOY0jx5QqW)s9OUXnJRX zyV)B5oq7#zbL#TcDvSi0=2wWUs5HpzRQ$YtUrHZ>fV3WZo;BHMydesL$V~iv3=gsa zzHT42#TD}CYo?FTuL04;`xyhavmAUm$6kH16a?w?47(5JUCP_|SG>Z^eA{G!W-4Vh z9zNYD;hSnn|Nc3mt=mYXqVw9dgHPX2PJYHB5lWKq{%$xMi@ENd|C^ca|Fgg8d_PWy z8#>&lB#?zx0A1Nz`8y@)#hUK#9;pt$n~3j_4_6C|-YkVxaUehaeY&nhJa2k?ixftv89CZ|P(XL( zdvsPt3jw44dP;o9AI;zZrz1%aQ;{?Q!RNNoYP!(Y)H`X)sXbXC_mKHj2b>|pPU5T- ztdzZt*@2NNx9Tr*E-wy$V|Gt$pFI{5{gvMYoMBFoJ$?Wl* zj>12oNSX+ayPQlBdaIelv8LN!cT`P`p)MY#5@q>YH6FJsdDIP$3%L#D5!cYswI0*L zWssoA#kCN){+nV~OR2sQnZn|GEa2*L41%jc9DN}lDKvo{sI-3WOSB!-5Xbv9mO>xl zHIwz@3pv{aU4CRNp?0eX3vunfatkL`ulCp zK6g9%RG0qq$%N%Inph8Az}CCpTnyuQ-L?N`gxlH;t#4mBIrmDqNp2_Fg+5RC()l=BeQeVFoi2if3ku4!SR;XanZ`6p+Ko5POP?U4x`_F%N z#ChwbATeUgE+s*cs5$s+MB-NMuch(gE5oaWr^BjC1YD3vw0t_951E0$da)YO(Te0< z%MP_|s%`~5;z)FDOCk?Ky`*6LM6~>95YT63deimbkx6nCis?q^ z4(EuH2ww~7rL*@sU-RdAz*Glo41UqkTGjSe=F?4g_Q1zn%ACCM&-%4q(_0ayQ`1a~ z^MT%<@vr(bU*G&0;8v>*_qYzi|EV5fj+Z>TGk&7e`?1lv9lD#p7@fgfv*J z+~4V0-|I;H8IGO}Tz)^qH1=gZMZ3=b!WSrLR}+nK*o1TacnLLE-l?+ENrG{gYE)SS z**JCZRYiK)%Iccb(6R2u+dVticPcmaR<8b`XxrRIY^KMW*^gEUx1WDVpMXTE44>WT z`mkl3(0oS^!|CZfr?G(M2dgTSV0wvy*g-fo5%8=QNl>${p;I($CXTvR8;RryjVI`p zd|EYuwwsq{-*fEx@MM~z@QSlC3nBQJM-6ZCX>hGd#qgA`hSb{ApwM$>yC6{Vurjtb zrj|A^c|d6$wzOen)E2ems9KAuPyh94`iyTbDKO{t~t1* z;5Q!E)Bi^gdq-5n`y1m!+XxK9He3ohTl)!j@Hxu{4O!O5a%T%}?J=0z%|)X-!tC_d z9?L;GgOkLUx|9iUpb(HCKn&1G+;lWH!E6>G)+;v>4`_`2>sP>M4}BDoEZ=SoFP_Z} zKR3A5)boqbZD;#i69e@(%%Odit5D3S-NTnnM%;W>X~LAUKNFn88dqpl{bfGp<7{Sj zc>@OiUM=gbxJi%GB7KE$U}-`vLxWYWj7+xGgVQowOk}u*LlVmlXXV&tZW4f`>6?xP z=!CSNfLN_Myug95liC$j*U-Bq%}soZHEHTzl-_J?oqOS1cQSboJqJL2e8r7XEuZIt zJ2}uwciupE8>F5#_eid0Fkm$M%wwJ%UdTdqUu@kshY6DuExsrZ{9Ne7-*~{Fap2AE z?UIb?6{v(o?C@Xu;KjefaVY3DOc>i`zJ~A}?#66T5&{QR zn&k;k|D+)Ut6EFpk)Re1EqM-$q@4EH|({U zp+#X<_FkK)NnlWRVL>)RR9RVdbbV(E)C~Wfj*s3};!Z)gNIoxYRMGtsH=~sVoNyiFx%+*V7w|__N`zqiNEh+j= z*b(@0ugL=W{!j$CEIhp*sLiyL0Ii&b7E?y3Mwa<}SCAl<0mYC&fROLZAIgoZLk7=t zd!gqg@xTA5Y1KznS}y&mv<#~mzmw~6!F{G+D!tLY>ho=%e;A7npuEfJ3S3c~;Pvy) z2DI^?&uXU0?=z90gTDmwlFhjzXf0L2f90=Jce0^kX0l>W8}SW}J1CMj4d?gwq2m<3 zAjeesZcdqmKqytO+Tixelt4n@SUXAgsRZDJZUr$3ai>)iih+%#@YLTZ*iJG)9D*Z) z`1mYek2MuaGi+xck<=wTo=z363&-5mLpbS#qbd`s%BC&U>MJM3TNk_kqfnJMUCC9& zFr=g3nU{}Q1vCPly-kvIcRJ{pZ+caV; z)$4&}7$S({gyPV3lS59gaGMNb1-w z_@}U0Vl+xZDpxp*_kB}dL{29z@&PZ_6+-kNpfqD7LCUl?{LyElxLK6C$H%6{x&lW$ zUAco^WiY|`m7J_&rDm#*S`$;%ezd0ToveSBD#V$kcm{FE_^Rg@ru)6 z?!>pn1H)>}`(*CsDE%S!j@rFqQL2IS;txR~HI6M^DjqqLbK|_x_RU|Dj-E^&GYk}7 z7g1iC@cLb?-Tl;|G%l##P;L(=z@g3RWymUKV!f--{VC>7IcD3bvbFt!Q=VgHy!60l zoQ_8vnP~OPCd4(dvk*r;Rw!DhZifu`Vo+Y@6|`|tvOJ(Y-*t7Je?bnJypIge+M?we z860WCr>7T>JjP2Rhob0b$4sxA`j+=&(K6voQ^wl=x)lEUpXElLd8LUupPrPg><#a1 z0c|2=FfyK>vlqvajKjvu!Q)jKyXL-82KYSrqn`kJ&1A zO-JK{5W1w%+0lm{SYHIZ$)vY7Ja25ATNj?iIx5~liDS>#q{L8;)qm}^HA6ajBQvhQCO z(cVyHjL89kCHU?IJI!096p0;GPt1iGT7-oz8S{~W6UfrQl+*Ex zUX>gvn_X#-#N3)9&fy}l2H66W@s%m&PDi=(&Hy;xLX%!PIT#cxS`FnUx)WsnV66$X z$?gRHp>w@h*N?Jj^qnuW8m+Te<1yXt&@3tx%*$eID2({Bt{|_@GSYY>qYfiuz3Nh?92U2;kj{TolTr_ ztD4l}%s60@$oe#QQsANgWO!+$THmnGl)Ni@Lz}Vimu&ZtHRVx-%x3+y=gcWbd$KXv zWlBN1>$^kcb4DNj6sKxSR=^cOjDF9%2)zkj1!i9scn^6B_Pb@&`M|?0SA&;J->RBX z+-j5%ZFzKEYa{SH__ni;faXhQLoB({348(uB^Ei8C$WfygV{y$)0zjFb^>;@(z2naDS8F0Zx1*cZu%aiQBy7n z6w6M!)q5ava`Vqz(n0eltT~r(UQOiQ$hi%9L=$gaLKLL>op&JvWxp&YNnh9znYbC^ zVAp3*sw?#;{wy_n8h5=lFq_WS>1RxU=D>S@$su-@Q}M|=16rY^!S>0Q0Vm)Tqc#62KZ?pZT9+Wp#W+O@fNxc)6_?)%XcgQCCmR zc3;&gwyK2Y(5*J=K8OajH@odi+$w4A#fNwu#atChgf1;8i(qrJa zKbBYmxLCn%L+=7%CO^9)+|x(%HZ-aNqB4@;E619v{2#?*wAY6T3%0WFzeT#uDJoIpDXV?g{U}R7i0%rxA`QX7F zF_}5uj{WPmQ8RLoD#4fUd~EWw6Bru=r~jdW_|E|7^6(m+EnK2{l%de}&fG1nC6aa6 zr|=u1ocZEF!ImrES!96GQ9RQ%?R=JPu{>TWZQrV$SNy;f!%e37kKzJKUg4(!xLSG`H0ZNf;OiP-~qX zrG(uje4T#kUTmUSSud7ltoN`Z$sokGyFO$eJ0ZZ<@Us)<{EGBP^jE-AOBDZw=(_VV z$qApms0d&`KZJa1bqY5eR@b+Eq{q#nr8rRndWv-{4bwoQaMM1cRrBjR9X;^9Zg8hmIP`1Wc;jNmkD>rM>J zU>neF=$%|NRE*FSIKunE_o|lvJ(OgD|H3p;gmEVlGU`5**Fnl#- zoNgdm?ERVWar=2#mNl#)5pS~K3bx>65^Mx-S;-i|c^+_^jvg+9^oz;~FWUInh)eRT zz*tsJ2oR@l8uN|K>fkJS3&JzUrmbfORz?J9-b>Wa&VWqw(adrT%w3>*O}t5w$+R6_ zWDqhAXC!G59@lRcuyibtxtI62JX3?@UhaX^htkUG_GR>g|AD!z^5u%wZH4tXp8}0o zR%>x2)@q@3t$WEM^1Qqb8CvE`|KhYQ7GhISf$B#6TyvQ=sn^V!zX%(4VZr}RgR0hr z>ksA27x&_NZ`(~*Lbx=_ICE#oV<8yH?*2F%ic@=m;9Nx-L6c0eCepO#Z}SV8@zOqA zE75yNCG5xsdf|P6Pms}b* z`LKB@uQ+9owAm@=3{}RIDE70Gg_Dxl5*9TN0)Kx;>D#FSvh!;l#QW;YKb0&-HxH-2;gc`&X010P5ejEq&dXTvm4fAPn>q1 z#e8+4INCn)%No*Hme?ZH$IZ&NslX^&v~(KYiH=8-d#d!(8XL)m+U3Uz82BC`c@-MwdBV_BAANVlD3&Nr;$H zW48wP9r+OdR?UQ>nX9X{Oj9 zK#R&TyZo7Xc2ZNNtQQNGvQ6l-&4-Qo9$WSlB0uo&crMYiK1wVs9p3y!Lmx0t=51Ho zYz=mn`8#-?8W)Rj>^dK=kMgRtThZsqbXr|^G39OPVk2lb92>}G-M30%3wr&r^~x`p zXgJ$3u4E9&M^ftzU*G9-kzDF}sQUIx*vu(+@;$8|fsM2oZ;Hc_fEt}Bfc$*~lZ7py z!&2o7SUUksLcNM6Kgd8%wX9%h`-dZuZD?CCCRfs2O8#f;yYjPhx(hqNF)~z(4l2*0ps8e4Q;!qT8ZVgdlkm2;md& zj>yw^Vdi5AI4T+rW>lgbgabGzi9MG+WX-kziRxRZfKl3!P+)rj*G}S0sqRG0=;KQ0 zjpSnszJ{@SA67cn>k3h@C;d^!zPxhj0PnNZ^j_BV!mbDmFLk(7wZf!{ahf<6qQS>( z$t844`_E+So|gN4G5MaEd2NOpzQ^uQFo$nI0~3FBy{Lc6^nAy5`CV<(b7C$$E)E~@ zdqlQ9m;J%oEaA^YOfPf^pIBl~=-;TZGM@Z0f3`e^`f&;#?N4eQEAEs%w;cJsSqzH9 z{h=5`r?HFon-6a8_RqWx-W|?mEBut-+?3-iU9Z2u4*}vQ^`5Jf7g}Us@1<805A*he zO5-pmgtp|-M|e8!fxw~g+_|@*GT6O)V^dGwr)!{%-hBin@Rty8+){M?*zRvyKTcAM zNmCkL&~>6He-#6~dY_OvcKU4N6&(Vf~Str|bDC=w=jQR#}2$GsH6QAs!^M_>oddCmfRpmQz^;G{(kzerD0E&S4SiTn!oI54o{9e zGNBs(`lX)QGxcU?F?PIQ!j(Fno$@*xdTTOC>nu!)<{!*zC?|B{y)u#e>1FNdn#tkQ z?nM|Q1kL^$;ImINk`(aqX>q+D*H=K{Wx52t#*GV_D9`@&UF34lX)HlcEA_O#i-c_t_mv7w^mD`)FGBjk|&M6bl&DHc8@_et> zW96EhT_(0?5iclae7~<>CcDtmJjMyf7ZEsoAp9rFeUmrx8<6hA`HPM^4^qaeWu#;j z29f1Sw&dmFd&J5uIP)Hyr3J+KO94_F-aDAj+w*}vUNA{ggO}f;qa~KjYvG4X^tC7U z<&UNBdg4r|P7YlO$D7tWLs8PWuyhzb{|$v|TqZBI7)UWdYp3cmqfo3D*-b_OgxcRDQsmC-Y;^z;gZ ztV#ExpUZW%l7)L0R5pPF3xEuwG%>l%+^PjZr6e>>72aC3*x~J;wVf?1;ajCbsJv;5 zuqb+BJuqrr@oQ`~%iQmKp#x+MidLU%wAnkve>I%aDgALb{)Zcw(GR*@=bovwVe6eX%jr}^h`VK7 zpme3Z26mGe>%ZmCOazdJ!`P>@bCz?$DRtDWKUaHSw7@kUeeuRQPc}V(x#qshy~U1$ zbteV<2&(wJL7RtCH*<$0dZ*yMZj@e!qY5iq8fGA57qOV{4Hvc~<{ym=t5n7>8G|J> zF!$5Q6CE^Gwqd%R;KG4>6OV4Kq{Q919{5s)gE}(8BW?j;jvQsDS+*4H$gszmrSWQw zrchA{*(>vqkwI?xWm1(a!&AHld>*Yit}+AHY6YvApV&KWKBg`GLG|~&=Z0-NNsef} z*_+t9F11MJ-Sw^CE#|cDn3s+4Qr&fM9(|`H^|8r-@!dn4REKqe?T&BJ{x^CxrXRis zG+U=NV;ryGc2x*bOpc;uj!0zrYDxW}`)<=1>;6ocNjA@(ikZ*DSE%ZWvo%ER;(rv9 z^r2|nL0wtIf!_*sLN?P^+6>iuGIC)5?!NV3y$@*vxgOm3j@fRDbZW)cWEPRC^Z27B2hSf0HiIU#u^L`~3@vM|OXocy^UMHyfcf+%^z= zcD33~YqMR3^pOGO4=6HBI6w8Uw%r* zjV(b}7gw;poR>ENuQ9ln=36owA@4VVkT(ERX(eWCMVW5G;wy|KJMHx=!okwP<0}on z^K^5mx|40%vL)bX#aiFMf*=U(wM2$9M%;-M1?Sjn6P1l;r(}48IMMzx19lavcbN@L zfoL}Eydjw*!EL?x_mFjVf^p$G+XAqlPv(Q2P0bci<&N>3ap0})Ir(evVuTeRSuX`p zUNn49s?wsz4+#is9Tkn-E!%@xsHS+Se?iX4{9cltXnIOHjz8JeOK$@lXTCT+r1vXG zHGu?;jh$_GXSGZx5B+RkrT0w>?>H5U4AJV(F@fOzv6Kmoc*?3X-z6h=>#>0g8wK&B~KL6Bve*gN+UHLDvu%O!k?fAFplEGYPl)f#-vG4nAX=w;-b%_mHHOUNM%D{=tVKjE|IWid^ix-1!a{oi=MT5bk{)Fe6VVs{ z*8c`nmsaXPO@Gtb*5dmHo;SBKVl!s}^-XR~Y8KA8*5!|=csH&7?d{`$oe^#+{(RDI zPv-C@`8?8IYA5l}p~lqTl(z=Yz=as)M@Dy#T4mF;+bG|FbYU|vdAw)a)|$d$Uo-e@ zaZ!V74mD|NHg`hwFzR+&#Coj89bRXrvq@3wz`%Dig5erUy~)nxQ^2C#4hmlFpDRJvDZ9R^(G z%m215o_)qTp})F&d*sp>z5ebre)VDI{cTM;iUO2f&2WB znxc&>g-npQ;jd&z%!ftfEef6Qk9@cvI9h>8GCThr=JoK{|#SzHGz*RMYcNPKpg*EPC zL4rN(zc&tQe*Gyr_{&e3RQqBN<>X}1H{)}*wvf4iF}BX>aGYAVCEOVOO`_YPaDy`3 z3Xl0wm_o;Q%*nBzHZt3rf=uA!o>$Yw{~hX3$e{WV0KC6C9+osqNGT9|I-9K1iz{0L36@>21oaO~W za8>vV&@G>Q#1As#d~gxhU#ofPI`{O!e4Y%Man;X3T&9AJxr2VJXN}i(-d({H<}10f zFAJTpJtbn@B^@mo{aS42f^+dCb%Q>B%}~<0vp4e>swWi@3gZXEuRx=47{^Q4*%W8p z0nQF7SuZ5BKExR=6!9bendb8tS40lYZ8K7*mg^-Wa4UD9Ts;EwB$0qBeb)6vFoE0X zb8f%2o~f#NyjI+{jXt+?<`fubq4nc6#deRJW)uH`$hEY*R)@4RPwk9-2ftCbcmF&U zm3;T_sb+GT-eO5F5I_GPU1a?-gM2qU(xP!Tq&squkE#X43MStR`!4@vqbsDXwT1gx z{siOoi7>WOfp)iBHADBc2ZxIy_!nRPOBF+w(ARD5O%;}ZD*se~vJ7ik%nR-PFqvNkni)KioU;3k8KXl!iM-)YPa%|$(-Q>j~3K;tB9GPx92-?8f+xG zq_winFN-94s1;NzYBT1zoQ5YqEZ%ltoh8$4Y+GH{%={hcG71mcpc*`k)#QMCCe!gh zX)oAlDA*_h4Tj}fsLC%5fcW*~D{YBy#hbFnjZ9Y!%CXEv6yIMa;Y>OiDp$ z@sZ_dT6GT6srq3}m{o4}X+_B7ht{lr3*&Vun*x%IB8%9e(&DCX#UDc^NHg9|NIkHxmPKQB7dMV<0L3aYxQ2W@C;OnV3T2qFFD}oi5?PvRi{W^ihp15`mMo2D zUmoN@&>$lt5V9k>B+!9dEGWKZCKBNv9i7n29}qV)8b*PWEXBXaE;4g`26fvyD;kmg z%4FxpW<@jy_vnMjc{WOHi%Q)C;NIQ!uZP38e)w57k;MJL(iD)i63-`*(r66S31t}g z@)_~JQaWtelqz#pk&{Ynz$@5t7%#int$g7Z*8xatK z1!^?cg?$Md$u&UIH&BNcgOWB|nE%{vUdbiL+wgP$$=IqNd33i&7M1lg`7z$Cchx{XsI1wz=i*z-c>fG!g)A&+{~RU6<_=CY}b z2)VeCd36!JY`Z6+vKEWdj}>3k>6Q#M9nAi{{?Td3?M8F(ZvT?TY_yr|`?#X#C*naT zHc1wWc9{iMb_VisUzr z6qKydPybNyp+bK4T^@H~OI)f+M4G1eCFHzgCXpy_~_&RGE9>O6!J2u~jD{u_##l9X+Mr6IfOy%x;5fL#&ObRE0K^z%6V zOg_r=ok@8^dlgNHnNA^h(W4Jp!zMHJ()>uwVj~G-jLE>v%3OuDsLuuql}-T*g}_T| zni~0;lv5t2juBU@rZd^mg#cJT`%@gpjcmxnMa37G)&(m}a*}Ulh(_(-1_%b6BRlx5 zo6iw~oKkq(S-=RAeqnwx?6K*>Ao=T(avx!JHW!`w!3PVA-((Jxz&&&aqOflYsqh?C zArgRD1r*)qoD040+-VXgHAVd&kySW+W90HpUt4$DkUK-d`3xm4Y*o7@4&k@p17D|I!_7_G&Y0tDd1_?@-KkR(1v)oCpypXmWkyj&oM}>9;!J(QP>UGHAN&PwN z$2*1{iE$G@#FMlLOz~SU`r;IoQNP2O16)?EF)h8(_Qg}~E_179YDf!mU8_^3hPv9GW-cc147^RlKT)=g}*l8;0%TBhH1&1t{GU_EhIw4&E_H)=)>lOG-GX!mCS&Hy z36-=i6`4MKiEFWi6fMt!6Q-Dgfc@`lI@$^)6q0NlJkr3@jrVoY3~t@(gbr+TIInyV zcjfGTt@8BgH+vFwy{3Cl2{i>H zty^-%3KvWuPyx1c+?mLsRi0ES${L|ob*fKL8LSYoZcO{-;IGrDZN(Dq@%nbUZ;l5) z4yug=?41N>Yov-x_ngdHTWkC>t3vzk7}utFsBt*pUkV2Hdgh|UlkX*7h?gFyw$kT; zb@DhQlLcLp68Ueq>yEO|bzQeGYXc^pDkc3U{Wyp!JocrCjHX#IOB;OT#ZzPgjG ztj9{_3c>h)PxA4mVjdN8X@*AkY+12$Juk9qc zf8nLAsJHs!fS5bcURYTrD*ijpf26el^aW}2^A_6Au5eq>=K`e+@B&cTNcM)Ubt}9c zM!BEx6w971+J`wEVvb0~`5R!+1X$7jOeOfzV84L3wVo<54csQEECGdxPypAXxwb77 zl*t0pknq~#LouuVvO{(uU}XYaE)Zwj$g#rCGI}os9>^;Y?9RL<1-F<7iFMm1r{KPz z0OScRaPL<)xUrXU()ms|EP9xO1KI1TrQvyJ^Pc95pt|(3vfK5fGFNX!SNG$9?MhgK;lacu+4)7hvK(tt0jn3DlC^~}#+YB&<>pFp;> zK7$vY6e2Y{!M~BNkx^IKi*Y?mZw-9kwvO8aV{K5r841k3g~=f%kc!n@t_SJNOGkcl zZ1U5`1N|kDyi`?9jeR{WZO^=E84N~pja6q}R)o#kur_C(b>%Cd`jSL==cKw488lNx zf^KBYjpl!5(NjIl$T~XZsclqGV)1%OP17oUw*y6(aJ487DlfD+XkBt$NtqPdxP|?# z-GNzM-puqWgJ%Hl3b_*Z;U*CjsfyFm0m83PAO%a+`xIxRkM)HoLy?V;oBs=Q`=gksO?lH?Aeui&!iLh2}v<({T$6AZQ-?HPn?O7%D|q`FWsvg zF!}RTHV*A;kuN&}B~^9=;v@VEN_;M!xM00SDYVIOPH)GS6^mKBECbc=RTur1od~bd zyF6iP2R7^ksY7Po24t-P$~_)-MivI?O0-w+T;jNeO{w2+9aTW1&AZ5?>5gohyrQ|$L~7J?CEGeJ0ZQ}&6;74pW?G}Ne&I9o*m_Fn9QNSy4Kg*hbUWx4R8Wyb>%9kX)8PjQm zo{mLAUcB4D%cWjx^G?25Y{~7Yvu*60D_#5(Kb~RScb6M?j;*#LRl_Xcb+KQZl{i`& z8)wg&YSuz?wVD>*-$+N+#;o^lY|L+7im9+vt5NZP7vLvsfi&kyBQ{yRn>oJ9cCozb~q_ipv7bvYr zFXI98qahK{8&gGH0C?!ih4%ltk{iz=)700Y6_MdY{WMIGX0Qn_k1a&|qu6w}W+D{T zm6%R5~xIDtlp~b??DSrbvEOqZYoQ|Q^;_aq?&y2`)UUa;d{^C?~ zK)*LcpJsX(B~)e9608tg(%I3rXsYB^T(HZ(m*FVNZfNq}^h58b+q5%Wi+j8hS!1Dw z{QM-!B7iWGv+7K4s#@ltt?}3)RYGxWo13ZBF#5+Q*4_Vz{PlQzC)PX9RPPS*%PMBaAlVK6b?w#r56F_t~e(GevSD+)BGhaN2EYKnZfwo$wuF6)^K zRYek6^vI9!q`GhPL+UeBlp8iNx*~p)Hn`Ajfg`+GSwO?qk`yGkYn9?YkpCwR;){A= z{d>(NM}gaI-sbWBi#DG7Uax-GO*D{RaojNC0u?2za99o%O!OzN2Ka6+dP4*ofc4!? zl-~VZC2W!lZ9@+eDi7{o$WW`%uMWknyicEqgqkY@JoRU7OWk}}TG+5IGu|k3(s)*X z+Ys9~7>V<(-1oAq>+@-)M7SntYd(l`G|VVcKl&aHf6SdKcjs+@k_}oqr>n;$=Y_1^ zK77NfZ7y%+;+x}C1&FKl09}iQBSb{c7OIrdzL+KpTnQG0}+xNiMKLrZL#O3274)bU44#AK?Q*#LkwJRB*JFd z>2UVjRviDEEyfj9uHY;Tv8u4r!+D(jz(waqW`Stda29h*c4JS5rouoB0W~8* zHjz@3y5zrcnG@TZJ@X>2XDq>2!dwfaE9MrH71r9^h*E7IQ8#WcZjO0IVZbyW(Z3~; zr{fe|7W>n9z^K5+fb@|G$zN0fZ*9=5r)Fm)ld5OF#>~1`8DnJ!A5K)3Hw&?6Fz$tJ z?Z9pKDEZL@C9y+4J?9|n=pP5m*Gmauk2^3<(IT8lH);)9>gV3j2f+Lk6`r(ANja{y zkWfH=LEI*V3E*ai`Y5|yF_|;wSf}`N$dtFu(uc)!!_*stzLc_#c3-Wpm2B(Z)EG?{ zB8`j~Ir#9>xU}lO$~0%N1Sng#ZK(_2fD#Z`Q9x?5Ap1T&jA)ZrZ3z7ib#}?wUJIx& zD?l%@Znt$NG_>Ww<8cHS~O*r_gWL^tQ1ZLqL=XsFnh65hY9`8FKF~xttf0c@(T4S!)b* zur?yHc^y-1;T#k(NwQ>_9}G)keTs}(bTnr8{8=xRTJ(KVRA2FiN~rJ2jdIna+LcjU*rVqEh%BGSO&k(b+lLC4 z|0BxkOSsBC`}o>>$5kH@L)!i{dz5uQPSO#OxTQ*DIhF}eadpR|FEJJ2KJ?m>+SEK9 zeeF%n|9spj!0%F-EowUKf!dA#%eQS2N!0W8=&tFZC$0}#|2?|w&G-BpY%&II1|4}~ z)GoevFSzwe?Dz6vS(z0f?71Z`w}JU=v$fp)6!Ktt29Fh%sz;k0&N(Lg?cN!YD8ZFu z_e`xM$zLa86CS?X#?=L!bqbVKBbo+fQAwOIZXWZs#j$lW$67<6a@` z;JD(y^PWX&4>YDK7#CskV!L_#o7t*U9cE@6{mDb_EC&Ek_bF~+lsV7woP#l-&>YLQ z(*JY~!W^+&o8bHO*PSEv3%XmtOxMrV=j4fzyimiydwzg-XGZ#1cx_^>pMh=f9*9t1 zQ*iyfHq8CxN!J&xm~TJs*-45HBghbi3;9B~zC!CGsE0X2gccqDl_kBT-H^Zvf1Q{c ztD|<_z!7ut{4Zct@GwK}5#6=qgZ$onCrE{<#cPOt#p+8(C&=9&9u|nzp|2MGw2;W8 z=eBQ>q$~wFt3MG9hwW_3CYi~yc+?pTSc*jc5|ayKZy~lX5I2aZw#E2l2=hF?k<*wE zhvZn!Z0wkv;)4gE4*}W|%5pFkm(%))Cb34daX?tOOvzGJv_eU+J8#i0H=&lrs;2E1 zl%o)1VUs)uxRp!LN>qRSUHKvjkN5jl+K64B(l_CjElj1!-0UjfdTH2#Z*$+*CSukS zRcXS1Q2@Kz(I%i0sNGhE3H@cigYnCShJi%UoXh7+pX#!a`6P0*)(5hef`v|P|Iql6 z&#bYcZcIi-E3vR6tq~54)(NojDv4t$k^zf!tE<6K0pGH;GBqSimYr|e9C2y9bi&)) zn_a84@~2wMTPoq1A(iS6E)_!}iZG1sAV;`O(?&EybjUqq-#xt4yy)XqcW0?}rWRro zmI6rZhQNvA^GW&?f}8sN<)$p$?O>kx&klD|4>y%>%hMhm(50d{m=0Ch6C(g+$=F8X zX5=!1(3p@(EOYLVYCRS2CGmVj=^3URgM-OU{&n=lPIp(m%iA$Gb$niJ>TFn9LZau9 zz$G-XfAsA?qPqb!DmW9sDBBM(@D!ylE{H`w+CcqEYza{E3I5CK!joKC7`?-sKYGR^& zHH3OKLD}$>T|c-B?B>{_RpZnZ^Dt+fFSd^BfnNILV{gtV4X*cQ4~OiXrC@mI=FoMz&2znc9R zY|4frgb}x23Ep7BnW5H&`h!3NeI$4YmSR{VMAsHY+@ec~tI@TIXMc*zN7nL^i9C%H z;VJ7}^ue`|#`2_>($A|=iHIKD3NBKQ8nkt`WV=d}dd-`!ua56n{`~dr)YZ-YSIUo+ zKlDj@8Qf9tp2HNW0_mQfW$%FG(J zl>yPfQ-%3M8tWr8{k8I^=I8V;Xw+XzBxrd1N*|Y1et*F3AK}>j6>_D5161p;e+hPU zu?E|q`0pbBieqMCK*SHC?sCFjgm2w26NcSG)Q~r|`X{ddK?suQHciE|o9te-qFrOI zI!MejT}V6S@6Ph@fwg)Dx!MaM+`rrJMM>MLi^386Hvo2BN#a%GpJwY19Z;r}7==&w z*j`*sYX`2Jf3*5oLSw-|JWyKme*1x-R~elqEe}aZN~-m?UJpFgP3O|>c14?2UU(HuFeImEr21QAXAD{{pCUmpIvw$8AYnzPUJ1ef&7nQsgmBew!kJqzF zUF~U${OX@++$Y<}tpz*@V76a5!#Tnx4Hl|%J8xr5uL8)P37Zh5eA3LjHritjZHrM9 zFIB5S%v7!&$e7sCQY$u$0-ANPS>D(BY^eVZ_ctdJ^($JMt8P{p!`!&6Z|w<-joRg< z(lq+-`m#uV)|)h_-^D_xLLVA|ev;`NLAUP8bpMQdbe3w({ywF6#^G$3SJ-;y)omUD zR8912gSN+LKYzrOh`p;ZtR3%ttsOM>@pCLmMBAskgMwNwX(Or*CNu9nXZ_>*un$NA zxn+nGrfnDP_Ek*)@6^Lu>SK$pk z&tW-xQ>RJL%Pz#svi+4%<_mUh3;hMRV_{$$Jbri4R8JixO02$AZ@T@Iah&^!&*44? zNiSbOGBR>~XC_kWgu=oq&6BpREl0ZtJ+PwTF47F2Xwu}Q)VMz%YdG}BDM(^0PA&GZ zQz_dQwK_xf{Iu>_Z`#XNmzOjAZrki)Z02U|%1Eu*L?o>y! z96NO;V-;1O{*;%`l1{#TZUY{$@K~lhcFn=!XWW(U79GO5-jw!*Y=i6pH!b5K4_K8Fr zzapcIH0-)`KsfVjVA0IPi-hPRRayYBq3&6Xdw~ka!QBa@q53@`K`EDrjBjIl{l-uC z;%gu*#8RgpU5^|Jh<97HYMNuM;k=P0>8%Sqjo*S zS+$>k2^wYQj{f+AX2+nNsG3QZ?iNY6XIP=x&Bi=iCMX#nQ6y@@ZsFCu0G0yCVC2=_ zRjMvO_?|Cm>xjzk8t8~9)aD$V{cBPN5@7ah$`_G1^o<2!5}2UE111IoCHjMa!2zYa zb1maX(1zM`(l>o@-&|4=nX!hPYt=%7p069W_Wv-dn9@S@;7dM|yGf5nG=6TKo->{+ z&-X>U!9pzkpvbh?cn?*CuwC zKi^Ofo1>ql){ZD5pw8|q(8W8DmD=~Jg@i$4nPBsczhtx{#~Kd;wOllf;G#K}_2t_~ zJ*g2!^YJ>`F2|`?cwwElY_T z>!U*K&^o(1#T7+%&!cws)620V-RCD~Mj@w|D9!>-tk4O{f{ZcZZ1o~zeSeH7Xe-EM zcJRe?=(Wj=wzP4h8`>zd&;K0uddb+c!nK3z>H)2u{{Pe5n*Y~1H~-)3L;3IhBi>EY zjVWw)0CT%tY_cnAu@t9{(5Lki9=98MM)o@v{^Ba^71MRkQ3e<9ZB-1vW~TGUJc?r! zIyS!lciBORXyRx18uIgfkHIfCx@%HoSeA=;sw$Q+`NLwPew$5>`#9qDMOk4MuhZGn z=E$Gybl5bFmgNxQZEeoeDSGqdDCt$L&nyw?gG%{6sUPj?=q?H~F2tlUNlY`?C;F8t*LB?h76)v(Dtvl%9qgqO-NRzo!Orcb{2Bn4YnA@ye7#>$%KI@Cu@lWAT|SIm1ynowl&Zdw2-e|GyQCJ z+N^+ZAUua_O|>2Xw%quw=$}Vtt3{2+BOodvRXW>()i;hgM4v|H%l^pT4Gz>)EELqN zc_!z_!#M*AzQ1i?5q}Ba{r9R^qsCO-kbB-;d|WC^vYS#WwaO_;jk~Fe#9=LfFLFpr zq9`UwT$o#+eey}h)j?~AQ!rv2?A95?CUrO)AlS^#jLX*6d|m+YdMVV-e|&s&vT%C7 zxw7K=9+y!@>gy3pxAudL+pfJ;{L1U?|5QXc6%qntPXlc)1!gX-khD?iu8tYhYOzCK zvy48(#w8cXDAt5-J-(N40Rs>YTj=lc7SV82d@fv>0{*Ylm;Vn{dS=?FVLA|V zzIeB>+yd{cb$5&YX>V!m{~UIGuVlJ#(ATWD(|Xc^Lv=rkpHd)fjnXq|n{TyXvqJjR z9W7UhSP5`ge>+GOMO65W9udgCcklV1vy-@UsyY?dQ<_vtz1&(@7Hgb8X4MM!s+Szo^LxSKChWz_ZVldAS6dR7ssKBzO2h~L7Wd}W zfvWO>_$QuYZXfIpU=**OX9I?J=fPQz3bcD{b(H}BM9!ax92X<$p5{*dP_jc*SY?$q z@^CrfKro~|C~W@SZhV$v#B?b|FSJ8?&X8#zeTOBm2-IHz1`S+WNpAosf>-hE(1FHm`LGe~B|)wj>u+n7ln{^}QOfGv!UP5)H8JL^?_V+TCMQ8b~++R9wMelfCJh*^8r3i0G^Z<38B;|zom zg^4SBxIHd7L0!XLyilB zdo5bUN*(@DyvA-6V!O5T8B6F=6g(i$k zRujgc^bV=d7t?{Ac4m9>iCEH`Li#V_atC4$*Ali1gIE=EM?7mD>n9XFpBAyhRE_BE zc&6T7v>DhvTC8h@tMv+Ml!7u#b=Jyb5F6N2( zwTIR#W1@u3tpb+Y{9d*Yl}?;CD$#z_ycp+igjI?}^-%#SH4?X(!JyH2X$#<(eqA`k zh*p%m&E4iN!9XLV$sj-~IeL)5+lKX=^LftOIj1yUxp}}GaiI)>#kyiQ{;l>G2w*tk zd+8v(_ZNC4{xV-A*Bum)EuP=?g+*DDVLxO*ZK23Sr(t=nLFu01!f}y7ZPqyK_+2q3 z-0KVexn6Ob5c}Jd77i-H5(lO92}Ot+b~93{lE7MOO<8ZnrKS8h>{-BqL8dO%%aYoW zmOU41)`cRQCh)Znf;(AQ(uFzk$S)`&ESbjhlGeiy#5HI*q$z#+MA+J1pxW1yF=hhB z*OUR7kTK*7@@o3ys-d~8WFWY8%!~?>8xAt$tlYxtn}yg_=p+hMd#0v?pATr7-gM?3iGfG{BO3b{ zI*Hjt@*Ul7gXlx-F+P1w$^$QS4KT7JRv)w_N8o)Alql7FtUwNc+v z?H?{-Ak0odC;WP(g)H48o`TcNopbpU1Oa6tJPw;SmqlA)z98Q~n=1NkaId?4G21B7 zs^H?kP~u*8b4XBhtPi-^vq-nXMgu9d%_{TZc<0=dkz3!ixsjSXktg}UX`AAK;UFAl z5bfFByGo|DYFqWb${uW3f;J4z2+DBjuM#Me7Ss{d^nRDPKTs7 zhN8BK8kL1u0duKPyG(_SC^`EK!KzY2Dm@gC+|8^~fSt=U*-Q6TU@~*<@rg^Q=AY`t0ANUduXIy8hgDRfFp^eT)7%JR1blpKzZ zPu%BVh??Ob?dYMC=mL6NHa6Y{M}hIz!+?g!0=r#{0ub)e#5MTWbD|+H*prJkaRV$h zd>TGIaGc8z&#qIG8+Utg>t%V$YL|UYyn?tqBo%S zm8r}1ZT`|?uZ!-31O@~1AD04j&71uFH+mt@u_D8p@moNjd1H8Q;ZG;LWd7s%oDC*ja9TP2lg`_*~U+4Sl(9Lxr3HLcnMg z*?~$?*!c@xO?W9*IlS(N$PW<){kGo76Mf)}Yumd}J9Ly#EEZ#I{6U`q^3eS&RxQR8 z5Spk0NXkk1%Rc?I_xNodn9uC9KO3p+_|48)v({XSy7Ui{A`HE*w&A~cO+nuHq)QZt zwm(apf!H_Tm~n9(Mw%Id%T=+y_0L@<@?7AzM}~X~!$KDME9Rre3}|VL7HV&_FRGAu z8|bTbQ9O1*I40KB*15>H^hLoO78&$s&*tO4408Z30rMuQL*cB43Zx7kSE+$fT)Hze z$sG0nmx%$3O5L}ibUh38HvD2f=ew?EGpG1YYW3FXhIyVvrm8yVx zDvXz5hNBn_jxGgurTV^is-Z~(VURE?9C$1KmPNY-vlo3<8RCiRdF?n=kWp#wY&;Gw zW_-}ISjW5gRvaQL{*q;7Rd}x7`@wjUUJ=kz6jyZO?Lxw+!0^n@-RNM^3;;GDb*fS} z@b$q?#8I3y886ma?&FEEM58Lfu$FFMoH>L(Fd3Pk>S&xPUwV7w@OPmy?Sg$iU&lgK z?=p1NOkw5hBaeuQ;#(|tTrursQZj>pm`kVE{^D@w^alY z3!KehV?eO_f}&&H-!w3~&c*sE6fHuc#ineKqitYVzaUy?uJyO#!E~V`%L5Qwv&)vr zIQ5FlQ>Mt$Dbj{jkIJxV|CHp-#JPvhK8t54hNOE=0M#xTQ>KdnS0|=g)|!WC=n=%Big5r_HSnAYnLcE z%5;0~yjB9T4|>{4Kd)mL_>G!9VHFf*pjsfJ2@N``ACDzjQ98S$LgFQc@tVU_?Ge@)r{poFl(lZwioL4aD-o7e`mM`|4OnkcS z$Nj9q4Jxx-Gc4WO|g`OZ{1?1v_(VyAdeESJW-?y2z^c@`jwWDX0u3+8oZ{wA?Hq{_OiX8U$ z{rkv{dqsc2YFzH!DD;oK?+iVM^LTMC4#E2zsIHnm_-fcDrY}z3(Bfa4R%Gt=U-%7- z{>)TTUMwlpTTEzW{!lm8Dc$qSW1K6r#OTx(qK-7nrLM?(KTdQ#%{+N|hHlcXmD#v8 z?sQ*t$ycjR$O*Gq_Qi4B9oqtJ5K+EV^xwC!Bn(~qFjtI%BK;U-jQ#5m02*btLec2$ z_qGp@-FzY6gwb`Qznxk;PKA%z6=GiLQc9?Pp2=$GsP1J2x-v3h`~j3d6>n#(SZsM4rO+y99aO%`xWsP@~o8~9MDO|9Mv9Y+du7{f6P$}ASE8*sohcT z{U?k#$S{F-A&hL2JQ2$>P{1Fr*MwzAgtbgDsAJIhWyyVOK*+`9_vEi#Z{Q-@g6fKB zTRj8^+WiYOZo3N~Mg7__Kx~Wswxr{q4#;y1Y+tBg_So~dbmx;Z15kfJTwO@|m$k(! z%;546s$#6tw(_OskF`CK8!YccUUN?qW`cIb0<4c;C9&W{P(-(RYh^ZaX|A=5=cS7iKkr=H( z0{=pYKNdE$$y@vr&|Bjg1Gy$?c_w7kp@O9Fw|nA?2I;QhrSA(ca$ZNiu*+f}&o$!XAnE z)F?D#Zg-2^k$*wR`9bI9uajgw^XqGyYh!N1gQYVfn^Ppho@i2=S*H<-6&lnVHZ&B2M+)mVlY99ql0!86?n}FpELd8xqc%0QO_00Up)W?GBYUPwu`A|>#1+<7 zmTTiaZBF`0E249Bd|nZfzF1?8+z%n4x!d*Mc5ZV`Ks84hYtA<+;SnYxDm7UWe#vIe z*G!lT*9=EIS;l)$Gs}u^3%@ES%B)R0dq)o&(-NxM9NCT2GABT}_9%)74w?{MEcwj{ zm8FVPnT7KvS%Dw(Ta!D-#qm~{+hVmqnIdnfN9!C*6JH8Mq}kf;&8kN`?C?0NoooBAq2ci%w&HwC_4*tKfDVr|8PR(JZ+$s&vP`0J=Nb)qE z@C}->RC@Zrg2lVZzAPhlN$-&%tskF>boNZs4A?aull42|4vt#|nc$F^oQ$h&&Dtj& z`f0k3e8gqz115bsN}R*CSiDWb$d(v{G@?K&!*+WTY~Wjo67OA7HNl}Om=umG*y5jm zY~W5@`$Yb~alS%NBhzZS4dQp|+##FE+!X)B6pZ5^Utk^{cf5!_Oemaepi{xrP8?f0 zkOL=4(QKH--akU`Y07^@HX;c%8QNX5jSW|?3Ih15{)#=~TRVHc$L`sFPL$L)^i+AS*~exy?C-mDd+vru?A@26 zir#;{<7P6#qj-Ma@zQeLP9@j%5HF~>mjF-y`GA{<-1Bqz|E6W{{8j%O=;k4eNtJHQjgdpjwJ7m zKAAqCa5x~y-4+vQ{$AS*f+B6`R+JcVySr8tsNLGieI?c=(jVaJ&d8em4H|4j>H%r{ zNJDG>Lp$LIf1JKtYY92fOv^j5k$aAa$=@M(Tb7+Ce(u)R)Kc(Yd={?d4BCLx_k<&i zO)?+5#bs}Yo7~x;^+=V7dOvjc#oH{I0^P(+(R@aun)9IM?-jq0OpAJ&u6z%#^!K?h zHs1thZ*T0P%mUkxaN zba8!HmVS0cpxh3Y?yW8T+bfQ#NbEMkS_~fA%JhYD3{L5eg10swkqSLiq@3|(Mev0S zYcD!zK-{a>*8e9na>#e)T4ipwW@%w%iRgc^^fmX$U-Bhw8+{?zNGrK<;;%#7>5?8F zmBdwbT%#MwgTUhwq%P^YxlEcrvX**J+g0{P=t$DJ)2EfJEO1hCztAytsTMIf^XA*{ zbjbUIM#e9$d}qQOu~J--C9lQCJOZkd5kFj=Ri(<}Dy(!eOnD}5b1z8AnB7iN%h_}T zW&R^l8Vc~W4#-*ZkUN$nCe;tn)G?^6Zz>Tq0_&QILN`P0j5z1_BHdIw?2^ZmKP$=O zYPb46DZRj~rDxP3C~|O&u&p%=v2NH^3n|AdXp9%`(H1 zS8-OgrY^q$X2CgJ=cntQ4uuipGysi8c}SN8r>j5f>yB_A=xeraD+>WFau_Ut!XyvF zcz_{^H~Y(N;%XinTpbI(8jd|ZaAxORjd-1c|A=N*z$_^@(cW9o$9%C;Cyb-WDN$wW zzlgA&vi+cDKQP-=eqo%bltm%s=zY(~&mZ7CnBzFmF}^8K(L98bY3QN)W}XryCbFPO zIrbwSgzQqLT#w~095T*f&vvi15}v5xTsufX)Z#bns%wOopJ;MMjp2AXw(^ck7b@DOZnNYyJ6tiLi%--oVvD;iYRVArkFkTOY#JC&>QYFZ2We+ zN~pe>tq>({9QFIxXQN4FJhw@)_}Bwayyc$@t`wUU>Ak3Kv7F{ky!pdO_C9_g-VXL; zTlU7SqR6Ed?ly~MlX&rZ@NX$6TNba1tB1Gci20G3A-@Q7>8a!qZK$#O(}xge_@QA> z>hm3$u6tRCkaKb-#*D8IxA28bdkr&U0eOaElN5n^Um~|BYSBF7IwboBzmOs4e5Uqi53N=d@E?&eb~te~ z(x;GSV?VxZWEvrzkB5I<|1lr(q?i|1 zr1At^snsu~_p6_N2-MZ$wQB;r^>PN)TNY8>;qX zHs&$%DWV^H`I@Z!$Jvb&uA_}a9#Y09FJUtkt^90nRBUk8xYkdo_6t> zqjDo^@EzjYV3N!%n3{Etjxuzn{I)PMd*t^Mqw`kwCX1Tjq=Ws9jp%<=)d8W>pSk*_ zWb}ngyPD)cJ@GWc+JYl=*#TdL+JCOD>;C3wBs5{51D#4$5Nz@gfwfS#yFGPcL8}Wx zwi(xQV_LpYx0P(V;CufixMCC%;A(%vO$g5Qy3DK;eVQboBm!^Qr0Yv`KRS9Vi3`$N z5?(I-@$R+wyD7WZKN5M@s_Rys>G)TBTB&?u@Td7~@9^_ja1)ZvEUgo1<=`W%x;V)B z{gfl6xsl*G6hKjHJY-vKoc9!Kkek8erR}xkwycBgodOw#`f0@h^HbTIZFNdB*>iR( zJBqKWR0)T3Ex|P_yjceB*7I)CYMrUm5_6%g2JYN0MQ$RClgyeP)~ZC2!m?_tnvuz* zaXpww*KP(ZkXw6(C0cOzQDFIYQW1Wt_GQRe;{DceaPfh6d2Xd@-3GWmHK4eQ-!4_X z#O|#1tMw1ilkj0~)1fh?-#5Gu-#*6j41qIQT}Qvob*VFcy6Y@!w3zAwceyY|S5%;90Md6nl$-z}01>fzw~{RjSB@K#!O{LO zW^Cd`{Fast(Qg;R(|NoWY|0&a8(mS_de>xLw0Y7Zw+1ZAnW~;&k{{7zz?@`)O@9O)^;|1jxhiV zFHd}5O}q-N;U_&6TB83SUw5vaRrANAoY2hbL~SFtFBhNQPvIM!i6#qwgcY~%zv^IL zI&B-(Hs4mmxo+Q@PrX~;Cs1PPevt}hCTKj&_Brgi_snsO>CT8r5hLAMW(}o#>}Ip+ z=I-9M;~|mmHEfj>CL#H|3TteNRH56=nn0|4#dRd0OJc`pwOF z7C>AHcRgqu1n(%`TRb1FO+O75v~24;VKw)2)AVjkY;n72?X>vyXM|tA_cqUlPgW-7 zk4GH1t+CPH)w$Q{YS{){$UqR&sKp^(a18ZwHqA@A%d|MzhKgpD2|f%E)<+=(o;9i$ z`8#|r-LQW$JrfT3Y^9|?&uVc%CiI&4p>b2E@X!D4P5tAEoy%1D@NTPpWQ_tvcYOx~ zy+{ST+V?Q-03TPnk2v6BW+;nYq6_N)DnD>~JMYVQ+$`5D)4C*usgbFmb^MdbWOrJ7 zDZrJ<9Tx0z=Un^M#es;-g>()$KXS;c6eco+79Q4-L0fG(glqJ>wOs9ls6t|<#m`QK z757#1)yBuVA1bLRE0<<1E3Z9c7+rLM@JW`C+Ag!On~%q&KITlG{nV=oUG zP%typIwdmF;~rejG^uJ}Dr>x)su1WoagZ7*8ZT7yfV(P9=Sd|#%7(F;h zUKXCmBiP>S805>jeYF4Y+(2i)%n@R>AG)tUp!>kQxq&)Kl-?81VDIY&e7o9D2aV*Le$P(q~6hp6XMs!~=Jdm)gC{#z+7U6() z&{tFX#Np1*Xe&&m@;d{W$OTG5ipO+-tE=P|mc6rn} z5RbyQy}{0=$Lq}AY5n{ais$`XXL|`Gw@&;SYAI#BSJo2M8Z{@H1vBG^eVZK^#$^t4 zpnoQLmL$;ErPsD84uWQ!N%Vm!SVHuG5R(OrIz&pItOZ^eTCN4NIYfI4A)Fgs5U!8$&k}%8YwZ0W-p=}=$@hKx zHX{{9os z5Bme|-Pd(r*Lj}D@j7gmKPRMrclKvWbp9xzakaMb&LYIcLdT}bDIT8OA21@0vYgHq z6wR*!H)YKdn8KCs^co}X4l$Ze)b!2v;<9)I?C5K&O^ko0X#i)AOU+&Y{v1gUyPG(& zyEQq~UU+a&$Gof=HO-Dc)zB_TGP~#a!u*9sXr2Vxd+XmV!UYgpNhRjB$t@pa89hlj zylTLp%_E<}i=k-fWX{%0JpKNvHWVC4Pnk0~=O+K{8x5(!LZf@J<;~A*v~pzflAmlH zJ^Sd0V$d;#Ll-|~5dv^mjmIM>kv$9)MZ)JGIu>$t&mZ7Lxi5MYaZfMn&Tf0^%1hH+ zFj{$u?rPjw=3X{#YECGIq(3Tx`K8-@W?~NtP>|Z4k9n%Ccdktl804JCSa(P>&!5^A zS{6cPdgiJ$vg#Sq9&aXTceGYi=6kHe!wq(YdLvQbzLel?LeqUNjoX*kR#}y_{e%TJ z_g<-c3TN6wVL~~b&2h#p9a9wnjiYlSYm6!17mSISgqXuLB`2{sm^qQqA4%J(7Pher zm=#<{?K`G}81Zy>>}+dw!)OQ7!a}(a2Tcu+ciC;%vxD3xXy8;J5WvjtPEZnpL+0E0 z`@=)*T1obR=a&%*!h4W&{!lml>>yF+4j^lOiCbGef2Kxa%YWrw=hFHK^4FZcyk^9F zwwoG8L-POM6}(C|i4i~X8J9*k4zw%c3@PBLCct*I+pq`5{$-K%UD;iG-1!;z!J;Qn zWJXa>DK3X=e`4j%Ma{GCzA3_@GL^Q8sgHyuP6MjUYK3O{G37W`Oc`-5m7ku<$lJ;& zMr%+;i;{me6~EhB@W79(?Qj_HQ7&K%SCAH;6H+ZNv_e|>_u(o_SU`Av2Jh`bFbDbu zd7BV7D28PR(YTZBZFX`)UfHS!ad;^qCc25B@62e<7BLucQ2k=Q$T9nG=rd6(jXyso zqsRsuaeeDIc0soo~V~>Bu;%qQ)>1SohmEBHvs=1TS$iUZg|;o=`SZ zIVW{grC0kL0)emD=y>yIXha(tJ-#p@Tl-G~Zdz2vy9lo^oXz_-PEZUt`zy%;HyQxa zjf#{25iJX?&PF%9yFGn^gl`!vhY*+s9ka{+x!Atkh6U>37fg-Q=@k zo3S}{-MEI8y1){(Y#o$*Z*+l&ov6x5ZEf@0y5*mXopzRSsVrCbS6}{pHdbO(5djf2 zPOko{!-=ruL$|c+g+}0D{NzGX>SXU(eIoa~Hp32nO^k z%WHd9H(JhMw}jH}*^WB7|HVp4zGR1vYJSZT?wgSY5<x zrR0<_;I>34TGcnV%$x+pF7$u&K-TWCx8&3#%6;xmYr7I_gh$5PWk7&4(s%fdt$Ot? zsix=6L?r4-ifN^xQl$pX#~S9Jyl$S+!<=+`qnFfrc->JXnP+{_!h0)cXEOd$;04A; z%XLJ%l5-$;Fb{3dsM}_(uRQXeE9y~n5Ao7EZhHX7W4yfCD%f;Us8e5IWROFj zS;N{fXyhdu_FG@^@udG(U8bbTMoyhr4u+j`&LJ-S>KdJ5RI<6$=1m=gRlj8KGA|>Q zUXpIaNRG-)Aj6R$mQZw)1n)PXT{Woo;FhT;O_XhW=8X?fT8=!->srjfUJ@OHc8VQ* z@mb%KeAZ6WqPpq9E}(1nSm+_hh zr5|giXD3NEb|&xJ7Sum!Ly{rj)bn7QHI@Q8DaClnxcV97PM}HVs zeH-uBg}$i))uJawGBrkiG43N}r=vx+E^d<*Kie|Eh(oLaekkUWCt{Lu4^2hVNXJ_X zfs%_GvnvkfQzE$z5a<$?gX_e~UrUp`>YZ)aH7IEGHS3UXvWmG;BunQ_0++QO3H7&k z`RM^l?>-RvtrA=GXx7>|Z_8RYjd_IP?3!RGi6dohu*x!U|Pmqsp*!>r#5y^A^T^8n*j|p|anB)1=+OZFPbvpI(|}DQTdBv@l+P$X=qs*KxLau8RSLxT z0|e_K{lGQDR5`1H$r%O+4c#7;7ITh4#hQfnfFUT)*iKEP?Laz<6E0G zxWUf4)2F(kNmai5&*tavGUJ_jtHiXpZifR&OOi@%5Q#^lqm4-W1?WS@>CB=Z?fqI~ zYien~98b0WL3>g5!l}c)QJp7rTzCg1+d3X9)|0lhfS>HS2qQd+tGk>;-zOKc45lTU zgYS1L6KDX9&5|~pEU9VF;9(xz9vSbN!&B3v^7%pi-kH^}7zSH4!;VzF#o*A5IMD1pQz?1VtOsAT(pEk# zbE*09aaUp`ltHYJVFYYleAoB4Q=TexY{sK_?(2LX;j$&SI61$Y!X3G1bfn1?5vtVYwOPWGJ% zLl4ocEET!My-o&MbkZkv$ zd0vU54w^r(_K2KYyW?j)T1}DcB6)Z5U49M=E8TI&h7!AKjfL6A^0b!AwO-=brxcM> zjAW2KIY1=_tAcHxC3iGl#SfR*oy>kl@@(0YtUa=oz#! z&@IG)dTptU?nB`(fnXypH4~CqHZJY%8cdex7TZ)z?+&b@6Hg07WwHLW!KrO!ChjXw z45IP_#BUhF>`Z?dok~1UloVy?aVC$oVJbMy=$_>~F)d@4g5V*Vbg>`uAsRt0dMeIs zfbkPyKlqw_7$d%-o;3Ei00yy9e( z3fC+ppwRPz1-CwQ7`w(F*4n8oy>P1Xo@A~!!=a0wseAms&c{nhjk|>IG-VnRq@{a* z+Zvq z-B(g|cJ96Ri@z2Fp9t6Wcin7g)*axPW7k#$xC)Z0yQ1Zx{V&pAhnDwTpKDc99eX|AM{J8?gS)bXP=L!$;s5 zF;!}!SxAOmJCQgeFUJ46pu!`OjsVI3%~HqOWBDaNMVm=>(SZ>nT~x#a&pc!gxz23; z9EjWeJBVD0-H&v#)&wNg@!c~)VRZMTRI$%)B|e--7|n0}XlE|uK8(zjR6kd%yBv>f z_#IcP3{N;7XCE@0qZo#fa)d;z4O4G#%~L=g#aNZ6EvfD^Tv%a+4=gOX`jdXwK0V2? z7k$*2MvQwO>8NKv#LY?^iar4@{80SlfVn*@MYbG3Q>v0Ensvb7eRIC;%>cuim;Rm_ zGy8|;wE&Ol9eOq4dcFdA{dN^@vl_kmvJXh3Yz4ddAc5W{e3h}UQI&wY6hIDyKlx|Y z0;wGHAVpmJKmg_k*$RzS>^g-yO(n8c6$Ju=64@)8P}GBbk8xf^f02p4z9T_?>q&RRvQO;8$*NDk)pe19iNFi{e$W!ZvgjITs4E2$tQ&B@KcHGX z+eTOP%u06u{kaPCE$D7vIZO#7@`wntI_Bmw3<#c@rPrgwwLKcXa2GD z3CS~QQcZsZ16dj8C6Ds_QHu(9wEiJQbCq#CAS}S^4oi;QLt067&PMD1#>$?A)wuu1 zp!4orEDr2y@cxo|R!N|S?DIWOKRa^6!uvH5vHC4fJ`n0-rwt^&xVZF7D*l*xKHkx` zMq<8_V(@>o35HSv|OVh0h zZp_I)2>27Sk^B9Sk=%m!E;(1D_{|4_?m@4rXCF_I3wpf1{#WdXnnjGA*_^(OO|Rf( zmts$gJwBwh)U8?_3dP@ED$h5~P~7vGkGug5uq40tD88AeEUdRi?#6||0HBHjB!v;87Eq7d zFgh+&_Xij~ZkrM65Hu=H?MLt&wPcVA8=a?Lakp~m_m_$Degye^*!QDdwwMJK2dE_@ zi8(YJY*IhaceF{|^S{lV+l#GyScY&v0#BVj&5z?gYE7o#CjV*(k`1DFBThX&JS5J# zC7w$7nN{e&O5Ppc8MZ6p5$mfSVEwDubROWFn(TQqGn<>W zElw}Y=9OP;W?QoUW)qd5dj6+KQ>6_YW5^CoWxVU2m|Xsv?Vcp1`_4bHQy+2{$#cj~ zo}7jQ#V2hP8ZGynT0K~>LcT+1-&$E*AS{?tG8R|u(^JV>6Fw>3{6Js)k6!ztc- zHWfVS_v3G=00e20>4VO6^ygpSUwEd0iPsqJcLMA31 z+gNd4JH&Q8$}K-U7%qNK1&;msz2Jg)^#&zQWv%Rb^g`ZPLGh<+{dA|k%KuR*Z5N!L z&D8{kEdP<#7A*$vo$b4>+}G~036kUIDUMJ9Qs2PY59;WDx|fAAJ-%7=-@9*GLu~17 zrglG1hNL6B`U{%n2k#s$sG!@nF>4Jj{@OQk?Ej-;?ddrlvZIUWH_B}AL813{-5zWk z)}@55T2@3X2ZkNjXETkiV3$|^G5!bSJf(Dv{4>8FTAy%NmL4$Y&?~yUB=*E=?-BnV z@R245?di~uVai0=*iKtw_xJfV5n!JrphkgHoT9I%V}12WoJi9vNV5Rk;JPp-0Z6N1 z`&J!X#!a^(DbSLS5A*Oro>7MALYzGN8QnE{f&!b+V{QW7wsin)_wn0vo8;ju)#=~><(wt>0A`}SPIVbr5 z-v&=^K@#{wU?|E7x2kANe51gdm(?DbQeIE0IE}_9U9fpO#FCDuOCTZWhnOEpZ>`=y zq93jVDG8kW4CBFAHFYv167Jp%0L&<`wP!O*SMeQTNpVGgZHVfX8PalM-tzU<)+zc6 z1M{bUG&JlDnv(c_`bX4~yU%6G{P>~dOGapmg%%Kn~FNkIG$?43X2^$3hPKK|&QGv5&h|dkGY|eq5QbnY}SpVt@5iZ5fqO z5w&UZ*O?miCuIT-6&kURDn=(y5}W1|K-aCsNZ08SJZV#7#b};S7qaPiFb=dER~R7_ zI!A22A=&4?Q6_#1#>g)l!^zs`W{^mx2zrVsd8uk;ne6#}{ho>daQRik)H%N2&h6)> zAr>%8xc~Lnl;lnN3XPGz?be*S#8r{uY3=D8oW=ZasCT{T@PLLtx)Y$!;%_Bw=yCK$ zfB=9G+0BOR*dAO(m(ql!wHPYfWwfJ(*{woC-d?7ad-_d=!*yLC5B@Tni>nL1{DC^Y z+uhK$9_OP3!WrE4VAq9lwU9d^Ng;#W%$+S6)MDO&DU7{u4c>K%xaXAjs3etounQOQ zwWS^euX!lArr+50>aSkJPVTqix!kNtMfue*qjoSgAbkLokY|72z3EhT@%ie({(Al(BUkVz}*6Kim&H? z-&$|nVVYGTat(_BY=|u-EUGS%SIaOD8ZhZY;^bngFrgX(+us;YJbPFETx|6KE zujt11&rY-|+kBYBJk=g4-424^T6L*)oY65b3)iGE9QR#H z5e&^DN!t`Xc~zBEz-M_Rr{iZ>xx&OM&7{5~YPPI>Km-pRrk)nxl_qzBK{2?_^YD*d z)~$J1ng4A1d7hGF9!R;=b3EjxnDY?N@uw94SR{f`8^NeE^YWt}ZGoKyU7+X{$ZzKu zrlp0gJMZ>isWA!n`P5L1fMBppyhaBE35~X+3AiiZSpPhf7s9J6;0nzgabbnr28jm+d6luYY_lXh>^!X4&kyAi6TM%pRl}Q#kn$d; z(foHel(WnkD3~$-WZmRg|CA}@o7B$bIJ^#ACZTexx z`6~=k>cD6RQ2Qq0@w)Ne2X8i;w0Tn5UYcQanfmt)ADP3<(``H>*r#EJpl{R(1;x_lVYMZ*ni!{*sQ%V@~Nw?w`Itvh!qycfvF)`?b0+-rbQuw!q!|)O3?t zgGt_I)o}MN(tLVp_JHC z_vy|>BBJnR~TM7Kpj2feZ1GmHFH}uFu{+Pq{*8; zR{e{P|GaTZ?cgr-$E(|%pekjZ?fPw2B;MeZ_o6UD2AT=ZO_8Epc1qYp&&I)RUT6Nk%0(M~Lvo$%6e(J90Z4klo?;{Xs$_v> zZ>>vZ73=@+d7m4Qor_ZXB~e> z(voX}JRN|s9FzT;4R3HT_7*b8&yUU0$=ZEilrR0g-ue6gw1iqW3IZ@|s89Kq%#jBV zIBUu%j>7LFW2|v*y_8rvkho%++Q)zbN3TFyU&z?M9e{K1qX#Nl08e_J zCX@S|NJ4|`!Hu|c+viegcOlnR&5q`=VF#Hj?%u1~ zJ#!D0iTt4QpIwD@1;%=|d+UMg^SFjk7kT~bIfhVkJ)f|# z#e~h}Q|AzfM-Rt1EN6KYU;Zi?ZHG-f;!V$fb#*l3ijUH~*zsN{-Qwkxs{n_ZZ*Hz+ z%{XWOb#`&Z)J;y#x5fBR(wo}^6%jw2nafsorCw%l-h;B^}2$W>ejSZ$eeE;1cV6f33Ex$jEA|oVZ!q} zmQj;tspEAbry4+v`xb*JqjO4jI{OO&!K`cQw;t%~ZQ_qMhR+N# ze9;mIk&--Dihs6fkb6jyrb%WqNF~p&%NAS;uICI)?|u4KESFXwKc?f8!}d4xw$zPY ze8lQZGbQaI5w3f>!FyX*{MIJ0Vg&yn4;A>evX5G>_Y>Mr3Ag-@VGSb>#$+6w1^3zGxo0 zC@+|)x+CGjT6TX#=b5=t-Br2QCL2G^3G4fPNSN9z`YE~6C-IVroV{^)>vHjJa3j(k z+l;`|au2RbC*9uaB!6=L>?(f$oAF+DnIxSk3`P(Ut&@1>(MIQ zmxIpGNkAalvJrl74}UAOI*o?b$$}*D>nt)wdNeH9dRb3(-5T=ZRUgf|$gfs6ADPfz zwhH^j0F`^8fdqZIxg>-U`dW&dLy1nqSCVgm=TjXfY|v9jh)x{ef`pF0U$-Eo@8-ZB zh|L6`z?A5xDs*W(x+#c)O|u0I13r8e2vgGFt`!offUXW`1b3X#eCK9g0DPLM;HHTB z@Jd@O#Ex%Hg>AfaSEARcX%?eT4*If_`^QQ}E8Xi*WV1P+L)C!eA#c^tkt{I2j3Rpy zx|t|!BpaX_LB><`y&}Er6X{2(;sUKNJn&aVnoIGJ5)9(ETcRwl1}}78`By!1BJ_M= zBdtGese5Rh9ma!4xY?7ti6iq112W7YIu$y|49s)EZ9Yi;MDF4A2{KVdv^#9|i5lPJ z(wYdBs=E}&ZQZ)6Dv#-=T9pdYjIL7&8Qy<{uJ^&&Q(vy5AI>XuG1+`7F#cR-HFt1RNl%l_;ATpnChfjIrB56Ia!LlA z_d z2u`~ci6N^J$vaLewc-o1Vb!SxZ$Fl%|j1l;jt*Dpo=FU&)2lm%@%{V5A zzRvM6AR7=nG>G7RWs*}*JM-tS9xUc>*9Q+2)pHcDeD(O0uuWOx7i43;+ zh4@h4xBV|8ywp74&9!faN35c3BXYq^&lm?rnUV@&4apBy6#~CusuJUx{5!pOjUWRR zd@jKUUMl(G_?HopM%hmtayV#oQXS0nm5!Bic3ahQ_zn|E5VMk=X7B zC;3pm=X|S!xh#c`9*aqEUDvgwao}2t3?4=~xr)5Ix@Yq@S*j|Kqa%qXC)N5>ZI02m zjQl=oS_4e$ooU{`pSPaX`52%AOlk!GuV@BPCSTTqsC{-)_~ea35i4_lx-B zF?1M0VYFKwLUWMeB%cAmxI)JW(<6eC(RU-pBCgGzh|%p9u{K4&Y{y(OxSQwY?KbDF zA>p>l|$hfCD1vDocepnkeHizEEI12g7{K4Pc|)x=LlQQz@S+Q1zq6lH~~+1yc(&e{zVG_Ei!_j|BYg&OAL^T`E>d$5-?Xm*%=!$lne z{lr~GIFoQbjO*gjB1uBdZgt@88DR><{dW5(Ym+G>&qB%XYu7v%VH((E<0MFFeWLvM zM8#=MXr!0Q^**V{TWC(r5PUyrbw!0?rlg$|=p$8Cx1x4C(eu-Go7Qia1Q(5#)UX)q zgtGT8`4WnZy_A>adI&Bp9!*cScEE8c2lNAOV}k|f&e?;TYnd)(bR1;!p7v#qFgNS- z6vs6>`k@d<6Oo#Wk9`56^QLtgnA5a{8+V#jxTcljn~;niHyvhBo?%)g|2HAwn=1eC z@~qrXuz#e*-u;F6?mg$m7HjSMV-ae}O^%Mvl}4#78wBp2_RCKJQ%|Gf?WXgE2=()4UUM-Z4O25qvM zSAMzpAaB&^aySgG|1BaSCIYYTY)Sl$-CF(9-dyycXbry>=)M`{UVclS2fA2OR>LD8 z_F!QzkrWyl7|PA7dY5cp20vGt=n^m;krbq~ zYVz||oAnsvbm;u8#0h>(ZO$TubA}wX=F9cr8h0&&0gFk2OQ7vblgFhiPn`q=4E6sS zCua#t70z;432<^3lVmrx`@6Uo2qBb**nU|RQF5W!&@H!FMBbl?aP#k0p!YEKjlG%^ zOdr5I8?d`Sb1wzqow_Agz=gRYCu)F!UHZ%Xtk%9})rL8Hi z=Y*R;@n&xQX6u|k(_YLpt;a_)i=is#h7Npgr9;Xg^-GXOm~sbEs`x5Xr!G}O<^aZH zW_K(~s7iE15a9OGi1l~h9X@|Sj_y@qB#Cr?Pzv?JDNFnv1U;zjd=_5bLz)vt zxT4WyMNq;Cs@wj~IDsSO4xZ%DJhzDv9;^!TWoM3@^tJICs2>ifohb@16B8P6Iev=U zTB+8TuFNW0>Iv@3kDGfJ_e15?xX~PX>H0x5JRuxTAkocJm zJ)hmxp3ti~-`!bPJ6j?Aj3eof7pAmnXN*)z9(Iu1MQrSaNTcWiPn z$%00g!!$~p@|m4=?KVy?r@H>TOh&{ev3RgMhFhMvg#y|o)a32HJODr=zg5?PXBA_n z<<}Mms(bW$C{%>dLjV0mgZ7if-q*h;nJ8TpT89$Kt&3zOL!u%8+oL}0R4XUj6JA_i z&m?Tsit5*tYm&egO+*;?9pGAWXoz`TPb&PKW#+{&V|k2hvC)J8fctajVr%5O2rPvr&=I=X~rZ?LXqzt7BBfslr|G6&LZXUdOmf zFgL2=E^oEmQq`Mv?Q@eI6|Re>eWk0!zZ=^BVMH`onF3%+<U3v*SEy)Q8`jAv|fgXE#TVf7^&Y6E%aHpieB_)Hn9cOo70kHW#a3(0$ypsKp5P5&S*}^9UnN=aRpD`eYho<&kY^lw84n zEPi5C!&;r7lVxRWjWCFgd_#wA*go~i?;#C2m9ANku`u+@qbq!19UN!^C!bW$_jn`=2rLW&|K+v zLvqt0xo$?DGEHIcZ^Zv-A3D@7ot=e4H^Jnj2*O+vQZh)IQ!MSIgq zb$Ma#<5aAbiq%Ehou4L01&xV*(1O7jflYGz$39GzT;KgNPCoYZl-q6m{Nn;rSb)|0 zR};5=Fd9ON(<9j@9H$7qh+6MGyR0u)bGu1tKH6hpw_vmg&rlpq7sl8v39CA%u<^8| zKQzv|diiSVP#E}|lRiR^hQLj31Km*o5g=I_%tofcp^AI^;LAHCiX1T_ow(P}Xl0}N z#$^_DH3UhHvu*3{?nFO#32<<@W;M+8t2OSZZ{rxmF12jHzEea!OVM?~ed>&?qt(@( zf*JV0v8bQ9I}iTQGK-k4?FNLf#!BT0vFPRq+<5cH!IJ<=DpCL#kD1y;x)h2eURmv> zS{*r8bq1eD!*L-md_oroqOCizcER|3X}9={x|#l)@W)8L?!l;_wv-mJ?mkH@UgB)U zK=>Xz^o=PS?x_PQ+g-ig!~zT=i6WG8+j2ag!aedW!0p{V$k6 zx(^C-2jwy~l{;p#x3op2t=pck0KSSZSP`dY*H7aYiZ59?(^J<4XxA}U+^!?L^@WaC z7UYJumt3D0Y++1~l!6(VgzX-S!`Vzt>VXDD5SN^Bl5Yj;fNr*XXWC~RrSWF^7Tcvk zcHi#5U`DnW3maK!ZH>&D4;5xD{7P^>_H3K-1xfAU0|a*AUI@eUL0|b{Ij$}+-DQ_~ z(MyK@%muce>Cr7z*FQpU5O|pIkql^MGJtpLsss$9aRX?6QcjJFXbn~LB{x~kj)5;RWfXWfF&Pq1umr22=1pi(bQUHwZdqdpp^Azbw-14|;xWd-L3*u_t zC`3xe5B;&-B&14Mn=^S`FLC3I$Q^%#nq1CfumwD-j4$_GA*kL|yncXxf}}Tet7@1( zzOlfz?bma;mLoZC#s2vk_8^HEjbkAv!9k0)w^`qs{QP^h{c9x*SSH!D9on*-k)x)K zCx6Tx(hCSYB|rFg_7;w6Lw`E;I9_@4^QZ{jHKCCDme2(oI`?0LR`;D+k?Vst5IVM? zftm^kJvjh~W6Hqlh67Pxzvj zXuear49a*KN>0FmSXZo)eu)MiCYddO=?wY{Jvbm=J{ZWpr-)TghTl9Bp0-}Y>I#cw zIYRwK?+k2zqTZ6KhrX42D>-0XyKCF---r3Ik)bEAq*mNmo}o7}J-=O3OlqciJY+oT zf%9XkXTrr6-qaBp^g|kAGW-oQ(!OcWenp|AHa(wAuAFBOe1E#}gY{On-=}`&-?La? zc>3c+sUWpWT=L*M&rWh4Wq{nhLH7ZCL+Q4(L2Ngp^aZ2ILepfFoj8dl&U}!)4%jBq zy>Gz)jMJY0{4F)w;eO#FADXR#epkUg*cWGoMS{Hejb?NHD65J*`uXh?L{CxU=Dzp} zgVaEp?F2}t`M7nUv2gC8@_-!f1xg6AkOm+~Mx?hpe|0NTRA=VIM4Of&qC=mRWF>x` z8m$iUMbX13}f3<~kc^&N-!&;QkV?DIVD*Zp;Ik*O$O{kK=A zf{r=g22GCPeWA5CeH;?Y6r>rFe&$+?Oh_g-XYrpp=NmQepS_Xcr~7Pd`t8KYD$`r= zRfu7hm64Ibnz6NZ)0q>rxw4LQ) zTHAQ(lkaZxwO(<9v+}1Fo@HXc@fY7HAS#9o-{9U(^*g{Mj{F|4vBeJmLRKd1M6~by z4F0+_xXkyrD{{m8U~0Tg_=kaa00!wII-`5?_44{%v3rWSv#sdlq?*MiPS*Ul7JBbj1 zB81tq3=s762m3VU9_2sJU<+JUrZPm&N(=nPH=CqB2}%3)=Pr`!Qy!v9J=UVdxRTJ4dnf?0t@O@$v zCqI)u!W&{`lw8{8Gcx103Ljj1&_>GM?ps842*5m@zVzY4*6*qF=!UwKOhVhk(IxUG zfAER;gLygARhN&kE*dXfK|dA_l;5OOlGnz6-d+H4E2-ZaQcR>qSuc(yUge~asg$9^ zOy@XacEuO5HMzGruXbgLMs?{4n3tSORC;BhcZ_^SO9IPrKi1>85~5dh86 zrIj_A@p6a~d3;j?voXEV&A~{By7~s?rb4@Jq>nEa?eY%`|Lj z6@kX;|HZoKKq=_TYvqCjchzhYq~QG+HcZu6IesOpYn#gX@WJsLpx4WNpLiPOrGA+3 zm~IQv(7W}t(%HDJU_dI7{OWx59sRqu_4nyU+MNPUHNUK6vg`hL#cS8!#%jeT-;cw} z(pvK|>x}28!aiM5wNSO2PFRbyEc5hBz%&~1n7lsFu8+hS(5$Q_$p5l*%$|UK<4SUGRwqw3B8&Ll4=QcX=z^^85w$}lQAHi zKK8XfTjW8q>HCzZ*4|44eNGIV+vi{CZ3NfqCKuB&ddG(hDm7_>Oz7zB(k?C4RD_$( z%`{^}8_%mTk)GX4y$)qi2Q>eVxM%vWw{J=nFU0!u!iztCTgG-_cU#(p+3gq2c49g_ zZV@d$M?ClS7aEIvvz1CX4Ip=f`0z^h!)R)3o(p?t3<#pWDvOAvYh#Wn0X@w_+KD)IwbXivcm`4u`bs#RZXO3L0U z*+AS=^ir7MlHsi*o?ogm(3f(AYsLIKLg#(Dn7ui8v2ZKm@~62pUgT}X^huZHI)S(qlZRw z6>1eC^PXsZ5_=|`n3&OCL)-SBrQc?Q_`|f!yM0^L&FwYNRPrK3W*uw3N#K6@th_;c zOCet7dqqXCd4?+C#!ZgNtMQ9-`v<7y1FQXi*Ay>w_FlET`u2&C5z3#vk#T!d(WES$ z&0a*O%EX9i#DG{Nc9+b8H;?O7!*h56BE1(;r;EGIYaE@J<1QBj)#nF0<#y{99yvJ* zQG=Vfw!8__qikJPUZ?j1b{2`y5UZ5ivj}$BND9`wG)*G01GTIT2|sqTl`|>~(x}ka z@%9icHTMuT^Il%gmOVOJINm$GORfjn@Iwdx7qto^NndsW(2oCIF(L*wlKy8^S~`(pi}l~Mo7yZ;;{<(dcoY#I9$ zi%kwMZCxA`i~8C3ExeDAB1@h|UjW2RhXX~NYaHqB5=Cy|m`luRUdhX^+@t96+=;U8 zfWJq^`kK9avl+9!%ZofkcbA;`#fiPGYM!wXaO(l}!l+HE#ocRR&Wwfd`dxXIi@ig+ zFpkdz2_>O12eZ5wow^i(Hh<#+f&q50pghlWH9EsUk2w#-SK#2wYO{WyXatwnF9bu( zII9ETEMV8I%xT+k4bp;LuJQuzEn$GYhl*`V>f#3tJ38ei|XnMi=14)Xpp7o5hw}~zDei3iBD?> z9~i1%`TzNgu-h}#PlIrP;^L zSKk>$eNZ`tau?T^hV z*i*6%o3rWY3(J}3^~BBF=@FVb|GEjz3(R1;&X7P%B!qsH$BtlhmdX^OW%Uo$rrZqOp@NNE6f4Cab{x{e!W9~y=XPN)cr?jvTrlf;|LcHi~looFm zr8b`1lxIj}S3HADRiDCLSj3+fsy@}1q5sJT_5w&8KewV4g%v8lmB@KIXj*CZCfhxe z?M>R_PZJ7VpyI6U1!#Gj+zqy?^YQWBse77kGl`J4mf*SW&psiUK2##Vf2->U;Xi5b zuD+!=E-dG_y!~M=Y$&-}K&IEm)WLb6WYa$A^P)mZx5=MHefG!U8S#E@tUlt-Q`ug@ z%6o-(lVxvJ4%NxjTG_-Xq3yJ##PnrXSN)yrC!B(Gd_<=+xiejjD?Y`%U%@mc7vzT) zv|7OIC93*RA{52qTB=Uk&vA%uv!Nh^Tu!~P1|qAzMI!!^?!DTqbJ&HZNLcz^w#e2x z4$Co=9HD=v<589EdaiViM~lr#eQ6*YIwk-5o1kpgA4BgdN3XO9zPfKL0lWiDvoesS zCQ+-uT0c1cw0>CrKsZG>$L_s&llen4LqA&$a__6_Zf8Y67h$@TB0xZC@c#0csKvr1 zMj5wGl&5<$yh5@IA??jL>_qUZC_4w^4zFk>LBXH5YGWVJ5xblS_#jz3XYLe_^|8?C zV(T*JD*a6L2emt6Vg_1aoy`CGLscf_ZfJRnSyl12Nf#)UIi%R&YT#6{@||ZtGyXe6 zpVPoY@DcBPNqG{XhpLrz@=2W*`qT1GGM4Q*(a$x}Te;;$o@L%?&*!Wcq-4inPar^L*U~avQo4Z=vrR&ey+x|Mk~q|4N_W#igUWKlUJb} zDTR00W}48(x7>{zdaS;6!4xOg+pN4T-%m;wVU4sy8fAE|2HkLv<}rCE=Upps zv!YH~?R%X_XVQVJ$@Qli8CBfRWtuKP(GscTAy$;o>o`UzLcy~C< z3(#=C`i0%NmP8(XH#50BkVKYXL_ zdxmT`@={~K;F0jJZ5+wc*@hh%2IOnS8bu{u&Vrquav)IdJilPO2+OiQ&S)Q0A6ba` zp>6&whcCf@57TXePcsLKDLka?|Km{bMxa^E^Qd67Ti8ioc?F1bBW$&*L5ZRD6}ccD z=cDG;H5-4%@ImQ<@1@Sm%S*kOq!}01;N93RmTf9?wYPob>w_ZB#YH4TFk1`x1-jZ< zUSc`&re3AmJ16g_^PxvGN8?|m@20GTDVIERJ89aJBuQ6Umy1~>lW%?c{f|)dl-J!l zMYnqFy`>13d?vvn%m2N%m_^c2;_yDUmrFyVKwQ}bCQ9-q-ec|^FGgC_8S5vPO7!(T zFvv1pP5!unFFod4`npIT9@qCLd0yL40$mMWkQsp zquKy#L>ETDztF}v%xdgFS;1FCm;XN{o?wY#q-5`l<$2$1=4kR}*n(R~7Tplu!pPJc3_hKp31=tg5WV?gr&d!??2dcN48~K35CzCO4g(y#9g3x~-U@*fBM!Vu18DYl-F1VFwiE_FS4UIHiT_5n>%U+06)yPMi_ ziN}89*85QIIpn2d;wrXmm=M+u`jp7Xv>uz5T(-ks+<2tlp9K@Tt|Q|*0~4EHDhB9LDY3bqCq(WIY6&_=s-y zQ8>|r-TPDBAT0M;o^xCC)sR}nm3Sx{N(%@Oca1Iy@{T zu6ky_Yw^oR3M=Kz^MK2Tm|>mzchA9#FH`e1iyfWY-h8u~g-x&X^&X2V(dC*yT)~ph zYE05|F>3WCnQLMJ-QuNba(Nxrb$@4muLcLGI5PDC30iGUfwkS`d=D8df?RVZVEtmw zh}nvvVhS9-9e#Xj4eUWkKBF)!{H>|bsrORRd9!m^ zU{^00Oz$dl)YvP(yj7PW1iS#VG1PBlY;{Un|~9llaYd&{x)v5ocPtQOh1^P#;6)l~O4Bliq$0iF!T zg>pPGJtV}N{(3I7wr##+G5f}(sZ}YRG_1wkB3eedsY}@QFYO6V;&O_uEk#%yZK!ye z)#VB)l}`C z=T{#;zcVTc8e}@I`VvGtWQZ90A8iV;xj2Pvt!$eps!rvg+Kc-=GDkiy<5lr|MLk=i zw8&gv%??#K(X9eVMbHXmCr8}(ZsWstHqBU5FbQCG#W12~ox2VnUXalm_a#jHfk_`6 zDup2y*LIA^YlOpXeh4r?91K>KGWeQ(&eD=~GCAV!F8mrsq3Om+v`q+oiWb~+^j67w zU4hpLyp{JcN-w9>U1*{&c&jTGq^e#OT@PNctMAaO0;-q3it*LQ5V>j@KpMtPld8zMaL`u}i9I2MuC?Y@8V$20CoYNEhfLDa&uAZ#hOV@10OwK1;0 zqhrV*@)b0)Q}u{0v0yn=3+O+AFso_SAu}HSQm9c6Gy`IYn2Sb4312yL3S%^$<_*=A zP{iy2?o03(*&l4$55zaow|eAqVdJLD*oX2|Orj4EJb(y@)&$iQh%>zGIT`>GDAE(% zV|Lz393kho0Dnq9{LE+LWkejzKPYON%XepczK1V5Bpt6AENT6BwFSpBN}g~8C>4P7 z@gs_JcHMeQ1JM38HyY1gRRXy6+OPE#s6^6i&Ae0?At0JyDiL`Yoh#3=oh8mchC^?p zHUAeW3dTpf$q~wAkvT$N#}FCaIBFjU@igG6SC$l3oXB*4P_0=_ur>^jSP; zdd~BEIZO9)4x7_EtMC)$+L>r&k$ZIsv3IjXXdclfp`&Zet)73ft%aAb#76l^%xT)c z@OC7lrdO=VLeay>#^iua+fagp>t_WDQvXXEt$E)N(vUTukW@8PHpQJPovVlDlE(xx z*#lQ8I!DjI*JrF62Zgl{+St{TMsKfK@_U0D)2qto@~v?zeO9jE;p$Sa%5HZJ{C^jA z9#G@|K7qshq@TPUdEW5fQG$PPFOY3S1~0d1@(Xan($2+GQDiwM^%7nuUJ~mtBG<2S zR@>&8pyo+*m^)*aNV~q(I9&0l0*IP)+AW;=D?G8dYT#w)|Kq%sn9!j^n#+?I&hWS!o>ay!LA&Y#XiN)6g3ixlQTUMuH=+dMQn3zYN+3 zs+K2j=b7M|Ojy=GDNJF9KKR|FAbX~=^Z7TE6Y7eBNHAHR5HKtqJa-+YV zhnqsD@U+w+%d~}yMG6l*1|mr^m*(desmhe& z#3sF3l>eQ#-Y4p1DkeSc3`%BtGJ;v-VKBGGrfWR!qbMu64@Z-W=+%5rm7v?C<(@$D z`GX*^+XYC|ZJflhBNdOkuT2k~8jVQ`Qxt1)LX@oP}U)BAAX3_mK`4mJU7ElYSa>#QVoaTtIshmb+I$DID>JiRu!?cdt^U5#Ot9JeNH zf&FT5)B+CXDzQDI?UqBV>Vu>J4O@%PVlshm~SO3Ds@zhC&VOZy# zwwNk6Pn_yAH1aC8S~x!2|6b5ToYXCk$PspXpjUwGZf@U^W;BV36=3ZTX@G6Go@E3^ z^8HP#o;P$bN|rSHFSi*4cqJn#_iO@YLIP9_1R_E7qSeH?vwh{bQT1lV~$H}VaI`Fhrz2YxUbRvC8N zkt{=tX`h&6ovC#0z&nE`Pm}MbO^FZo?->u`N1VpncHtWv#~9PIoDMFE+Gg%(FR1_T zT@;?_P+yk2#eaDsxFFJoqEK6ScQW{pJRL_G7MkkNA{yO)R;Y~aFo;Ha-41=R#EI4C+CZZn~4LxAW!JB)!-} z#NRn%@>qv<)eNJ z*t<>Eb+F5z{54_64y*cIK5WZD-QG#ngp#kMbgXjk3kOBjKwR+oQ1$K5#f?aJoCu7= ze)kpCsu*8%17u>iUh<>SvrHUw3db?4t!<6D3ULk%sk+ZvC)|y;LV1l-?<}qde1r@Y z{m#}tt2_W{C4NcrQlGB?f#x;!;_?#xx?&*<_;P-u2Jz*8M|2X?uJUEalIMEI;4L$a zu+3rLv(JIyQvZC%?0Mi^%)=2q+0Tz`irj7Im+sdY+y3P%HgZ4Md@44U@p0`(v3^`b zjSZ{vROO0r=kM;nWyD(azf^buslkwRG4qM26;eZ>&djaGqS(C2)g|j@K%L!Gg$VP;#Bg%j>Ko#Z}ACre(_d4!|&;zk+JrVb& zn|3caqn=}Du%b< zQU!#-;@;*=cM$iiPl1OJIv?&W5fIxWb%1gIvF=PQh=Be)Nj?{$TyB6X;*)pFZJi#^ zaCk^0K&CYwM1YH9yuoR6@NYAp0gI!EHw4^gN}$DzAdmzCGG>!a5@EZ*BdS?=g%^ak zLwr%OX}q3l5fUyObz%gb(K>S1;ui-jjI>5-vp6E_a585Zk)ATVK!znHJ6YoN)EOlsnahC73>kZLl+Z#o03Cf;P0o0NhZusUQ zGW%*=|5N`5J{m3Y-P1iY$y0RXx-?TOPZ4wTpiS2b&LQS3ZbdZ>zMsmY_kO}{Dl_#_ zO3A&1djP5%LGy^ifYo5OdeSrQYpaT7RX=lLmB~%CG)#Qg7Bean9dQ!`RWPYtm#H%3 zb}PUpYBL7>d*NO2vzLmZX9(N~U{E%2lbE3mA z=UQ)X(E;V5~Z2MK<*j>9-`BauU<%T+&SU?+Yj)fp(BwD2h zOCeersQ-9w`@@6gV$SLzS+4iY9&2bbCE6Aga3YHqb6wX*<{mn_a%{gB4cs?sc?Jem z=S(P}i3s*tICm_%a)iW`5OKdP%?3PSGFd)$a_Bv27-*IVL(WK`k%2n#XGuNyt2I)E zIZxv&Q&dMJ0GffwloKmlHf7(4A_Jbfko`T&&;;DIEgYnQa;uv-V>x}e^XOaKd3NpS zEwaA+DHyA6sYESogs>B4!BKL~TixZkwzKj(UjScl+a-aUv7J2J+g6lNGEpD2bYcDc z{yz5jR4*33g*uB~T{D{K+xhe9!?a#R@7UdyFXwP50t1LI^+eL4+$WZLBd<|CrCYj)f=(NS^b`U}g30)G@IjK~6~_Mfny%ZZ1UKcR`l>Aq@V>Aa40H44hOoxS zsj-KE-|}P+fjQTPu4*+aD<@Y{OpTfmhkkNonASJTV*O_R+={;wt8bc~X1M4TJ(1-y z=8zh?rwp^`U8QHQG%KKe>iu-%5rdgk9Wp<_(-ohcD>a?zi8d&I zbbB0)ZHeO3UY-lDJHs5IenCBl5iy03vubIOv34O8^)j&`!>lPHNgbiSr3S9$NQb_Y zkrk@5e9{iTaBh$J_$rpdIoY(!-0c_Cp11Ij{xr1y;dem{2~tKl%&Lg!W|6QO+f0FvZjVOr>&=tFuz}pW`=*fA7)QmBY-3K|#d`&69xQC1CIcT>);to= zhY{) z86=D-T)q!ww%Zw?eJ|5?E)om)=?OJjUeoCsan-VIF>F$X=oc?zUlldh9j63GG6Ci@ z1f#XIAf7aqC3u^33M5XL!k!aIx(tIP{>7@&8y$brBVKE0NOH(py*;z!5vAJj%@Q&= ziWkxT0*sKi2yrP?36f0A(j|G=x!5QvjR7UtHYI;%KGUxuVic*RcrG)I2?Fnb2HZz^ z2w#Pfr8r;vqcK78ZBTWX-w?9YSn;aEqT>8Fv+W|XNHZF_I0OIcPITas~?D5y4RuOoaGz))#AH*Quj>1`vJ6xVw?M6 zK$%!Mm1#d2(PEAEkrLMvtok{wZ*I(6e?PJ`f)lt%hJIz&5SvhABj0;{OBkvo7J=UF*JD_K1NAABQ^G@0CZylXe6sPAGM{dXt-jI=fJNIAB4QEFOmUd_& zzcg415kj6LGWA~ez?UE)Ul*k*2@_d}JBL@vxYw0i<$a#NiA>lerrU;Y{`~vG{c~?9 z#bEFvhfG}}>LhjukdwZ(#l4Q;0iyOFPWmaBB(QAoOH4*Ks7VlZZ+TnT!7PyBO-M&g zqF`*FjKT+VLh+LPTR+n-ny9Z7;qcgg>*9nu2YNc-rE<Qo!$PVRao2z(!!F$qgIwyEw+v4>qO8%5WfRKb~ZEMLUZ*Ae-bh9z4)FXwmNE1ZTEI$BI;9ca}) z{WN7xD;@&ivLg*AAJl>kA=3N`p09dqE&Z)P9QI3xG0XEF{kmX%eH+UPdhL)uuzh}Q z)r5d;44)2H6gnk&YbaUvi|0cmN<%m^*hfR06~k>=pgZV*f9Uv=X=znoWS4W&@YPBJ z>D?${cj8K5s@%cH@m-%?LB?-!hC#QPoN;BIi(T|ohf{<9tEi@@GF(k9twLs-Q^1~Z zMsI5f4T-}38V#=a`Wp1`OXZmw>;xLe{#3p_9qe-HvEZbXU;;BEzpAaUZ)qzKdg=oV zn*s##ejk3ZRf#HUlF*ixf>IV}ZES3rP?JFr!c49rL8BRmP4}Yem*sXKfxYU<-sp4R zF{*C0rQmZ(Zw-z$tf&b`Ear7DVcuUlMPI?=yirm?$Zn#PUrYLBDjOIOq+3+Q)zB|0 zzJ#&_cv}(Tz>35V-r!PX6DXy(y8hH#+`r1&7*%~Mf5WnxBr<5+Db~q1`uiX2k9m6L zOo=a$yu$n<=WzdI687$#IA(DDMKRW$5hxE*zCiD~v`#Avh(JX4DaJ zLKm1LI>`_!Vy`yIZnkJ}Ppiq1&yNY7G4fl;Ou^PEH659RgMFI3)ls3DSLjCBx+YE&U`-vPq(J2hFwjc=1i2yI>w# z0y>ALd=G=#-|g)9O@3dYF5Ty4{-9m1ktMN%WP_mou?Mc~(>PfNbw(QPB49 zysD6^9OSDO%gjQ74nMv4-!(I*LQzLo6XgfaLNkZpOGP-xzqXfm10RjJGQ+J^d%t%= zrQa>d+*WJ+zm3L`cxa|r3J+Y;|LXoIK7 zE*D;>6gPB+Dblj7f$b5EL_|UxIA68#h`N3^v#X&_=)><7L(_kI{c}l!0uSZ{5VAR3 zHc#0X{soKL*NG_vRX^P5)Gcy`y(0)lZE$?@vMIdN;lc{+ zIefv52G=9YiK}o1r#}-1MiM&d3y;odPHml>oXF`$f{Hbn zN#5(Vd}1OY)a&GymYiBX9+I_cr!`eQD)!>(k(l6}o|HVZumAmwzc+GIH7Az$?Er^e zwpET$(}d4Ld5VBnra)$9;4RIvpW6n41-7^QuU~ZV4M(4{Mf@zh1#AQ}7LdZjdimKq z5nRZ?M>v&`xY*({2d}oW78Y;*+mpNX7@zbJdD4{^pY0_&_SNT%QI*SqE>RRkSDmZz z{WiUU+L@B>x`PwtD-tU8v_oQwCr+Ck0pC^NP z4B+jl?6$uAfnI~R+@3a#a;M4CWu^aT>)XQvq3w7ONF0rC6OJL)(4UU*n0CghKi=JEL2|0TG~-!)(RA}yLY!R%xUkF$Cm_6kG*Q509bt^my9-+4R$bd{7I`6CRDS6 z%bJ=S!F@N))E`P2&qyzy%V<&fXOF-x?E11T<(vkCh{o|5TI2e>9$9V~o&8$!oS*s# z!WqH36D&{XW2xC|J!nAqj>6v>wI&To+zag>I5Sp7}r~Bd&PvGE90LhB>$^z z_XhiEIgif*15uU$^}K)q~}U^@tjH zG%fu{Gx>w>wx36kInsRYIg@6L2>NB{(>F0}ic?Atv`g)k2j&!ni-MXX{{)a)C-S0< zQE!8$>I+QVIj)?@FBVAW`J8jB$(-sUCys0;6kOsoWB}O`IKKRIcwjBkr1vIJWJ$)Q zX2Cqe2&Ml1Lvmk%7jM#5{nvybWBAV)DfePg-^sT>y7 zs%N1Bc1j6cH$QVC2xf2PoLf&HQ(+k-n&i>=ohGjxAGHT;M`>lhIkFD>-c2I>j_0#H z83gNsM#U>F8TR@=UZ6?b;Joez*mSA_D;eJpUl{zoBcI8PT zkUu9g^!&l9tBYv#ns%rCy9(>tyejkeLf)t$6PFi1H)Y$Wr+=L!UsICn`vZtS$VgF{ zta@k#Gq;YG_$eD~{<5jHY1-PrWBcV=kJO9(Z@G)F>o&M!^AO>LNY-_J`GzFZY3qrH zQ_?8az@sE}jdNYTvN!N{sj5y29qOwyV0ECSxyhfMT1l| zgVie8?zY7L(6scBzRw|;uK2bLlkWl--YLyhXB-+@bePO{>Zwrw5{t}vFKKgAoBVPA zx_b{~@#dGGnv}KJ?#cdN13#lq7C77Fw^~)Z3k)87llHSl!*_yb0)L_7F*k%91tsib zVB#4i>5cCtOIAulY{v0+F7*XAJ>Sak$Z`Bo|2clmw7I3TmHpFD!}r_o6^(}L9}cg4 z=Q5jyyRKpjB72+#$pg{Y0%#A}$d@R?@y$P^cte$tV80q>pl$cJ;y<9N zIa%K`e}FUb;Wv{VstDwWxAj+kcvIttu9y1E=0`#10U61YPYdRbpQTS#R71syN|1UI z$@=~gTqqztIdnyE)3PlQT$L7X);IHQcT#O3Pj&q7!UYsf$g&FqFhCgH`A^NMPOp69 zh&CjY?!CH>=`F$wn2f0zQId`_$aSme z3Z&akAvop8zHyQ~!mvH8zWA}`sOY|ql$w}I_kgk)C&QQYf#Ws8c@8Cvzz`RwAp-Q+ z1G4pS2=gJ|{hx@$LZvaBkU`yibKN~fYxB^FGX5JAXvR;o_+bRvwzlq;`OTjf&qKOk zE;PuvzW-go$_&s<)CRTZ)J5FcG6|H;vT{i9`@1S8c#$jTV`k|cD~Eu7%g<0*4NQDf zmBmT)x=q$yy5K28o1$1(sOuOp6!sE2I`tc0UZ;y`DC**yVOs9gD5^~wAi1eZ>8HN+Z?}e~) zvB`aYBH~=0LH7j%o;~&uReBdO~IbtUE>_$ zNPPeCU#aNq18u#g#gq2(i8d$#C3nh-6d~k0(@sY)Z@Q49sG8*RxXSgDv=pt5lfIcG z9=l(w6CjWk(7$)MlN&bTVL{ZnDfz_P3j({4`?t#z`WkF7qt~hW4S@FEG*X_FGjZQ~ zI+zJ~L>lif!2qdy2-(AMgv)98kC~tE-XR#eGI?+Q_pa}fc2d)6VJ0c<`sPVRQjn8~ z^QTFLw2KCwkmR6YIibFz*NVkY@tOG?(_{VPwa1F0$2a?~=js^xI{mB;Wr|zkk6=Za zfKnKO%vB(D%bX$;=W}OD!I%5EhhLg}xRMz&KjM4!&mhr>UN`0Am#q75<^9fK*2rU- z5tka95ulVWdSJXS%*TpDKgH13{@{+voBXp{N$-h;D z^`>^H8yJllUcSOOXS{u;Uh@Hvg9TPH;p2=aun(FHPPu ztGZ%-z6$g4%=9ZwbQ}gBJV-9_otb$>6k(%(Ltm;JD<;ve z*RQ{2Ibq__qI}PiWWkzg;iqTWzxMfspY+e@l5OH-sRT5^u0Hqo{_b@uJFtZ)_VT6B z9A!}ob`zh(KEM{2t{3tzPG0vRrj)({-t}aGgw&jEBQ@dgca2R&?LtZk9&&}AY99U zzswQny4@!hF%6UG({?)Vc8?PK24WA+RQqgB7_nuWic0=?yWgcwSs+-N9^k~)=GZeEa=~zLGD9eeJk_#r5t`<13CGQcJIxG z8|I-$fi;pQ&FKalxo)t5*)K8(hoVB%Ua{VT?mYkGvaD2Vlbt0dfWDg>@)g1q*$rFn zy1pe8Qq9QsBhsMIGY5N7etvAwm^v*%Ka)-=&t3EylK8uS=XtF})EL!* zOy9@PGOfnAbm3eyPd#FBYAvt3i+1~#mB zFIGPJt^SiDx3jDW0YH_g(^E7%W6k~dbuejeH>RzyCKx>@DN!#I?ezq$Gzt)@k@Tjl-FA!Dk2Xa6V@y8W#V zumQz7*E%f7X{5E3HA*;@j4bW#V(#Gb#UR_}OlQV>G&yLAQrd@TGWG4;#u2+>k4Xzw z79D*XEZ6yruq4kULETdfkwr(*;}HzPuR~6ysNh82D!fu8DkzQKakh^*qD085t3qxZ z6m4&XRRyKcJfyI{tAiaMUy_(Jk{&g~ecns|cQuse>u3T$^DhmFh@}Wt%5E}MwtQh8 zBa*{yL91l_EG+$J5g$*k1Nig|I>K~HLe_<09$|AW_?`3cHJryO$(LF~WzPx8#&zid_hQ4k;t~2U} zG{@0zvOV7$3gntvO)hW9m92`)f-u-HM^%aA7MqqD`YHwgOav63NEH`GaKKDjOH;FQD@A7XtF*+& z#^RyfyVo~91CP3G?47pp8YLOXSI8G%y(1ita7Hch9Y)m)`ZL0caxf5R;^^gz)I`k2 z5p<#j0H;c%$KSBX#3g1)H9JUJ9aRj0BJTa~!gtE;art;`Q6j%cR#?JcS9qv)Y(vuU zU{ZJ?-O2jHR1T4#Z27)Q-4 z`Apof&v1fscNXgf&*gMH3VfF960i0!!%$k`LtU`yi1zI2wN1|K3lUELyYNjXLJVfT zs7jVeL(!DFPz^sdhH5|zIHK$P6b?Hmm>vwr02;xs{FAdR>82tn!IkSnmR02+OS$y+ zErZ2PHohP@-jWR~db!FG#;k=B%+^@@OlPSl71n0K&%Yq&@J5CLU%Ark2mJ( z8|LjIzJsNUs4Gs~q&^iy{2>otFvj{polFqAEpcyL*;xX)Z7wE*5X7ZxJx-rh)E+8% zg#Bexjo*xroIF>e3Q=fMHLkYwaAN1^)lIazC?21|>TO6&$DP26twlA;)jxrHKA)Dn zxV4*4$`mzy4{aqserXMJsBBu${J0$nhw_6pCQ7|aubr;|o@MZJD1{?ge#D~JK0GEZ zF4*YC=1Zymgi>V1BOG{mCpv-9yrtq@{NAd8L`9gxi}b|<2PYpZ>L?9C+I<`SuwKg? zx#SuT*5!sj7<(@&7N(E&{uZVZ(Kk`BD@738@rX!Brs#+ypLO2YlqbI{WX~r_3X-gh zJ4&~U>CDgmbT+`W^`wG~*M2NDVtNgj_)!*Q>ukaj?H2BGn%<-@N>93!gxsC)r553lVu^jR z62a|%jgCn?Rga4pNNd(RUV8Xt(Ap@_B7als%eZ6HpN&>KgLEUG(AJjtd1!KSBXkGj z7W-8@$kSnSyi+mXO1Jxcol0|oZq;6u-H1=FjssJwhG0?wq-T+j%+XV06!w_>w@5Li z+7Za^Ravbo@lyF?!yTSl6=C$oaS#?sHxid?n+_9@JWW(lDwqfR967$qB-rl$TOGsGFasWkno2u~8<8p17~!*dVW7Pwc{AGI8%aBc z(MJxLY?5PWMa1iCTP-au(#>%r0w3P=p3BZq!#=_lb2+*(m*83Uo^gi|&P^Q0G}WM5 zXsH{+)4~2?qoo(X&!-$E*3x(!L+Evx&@EgtotKtxgFW*(2fcrw?%Fd$g|pt^6QhO+F72)jWJ@~_k&lf zs_U^k>vj1=Ls@dJBRg{K(<4YVK<)_Mjnnr<`=H~G|_#$(Y z9?B@t?~{p-`*>63AKJTI+4Lm0J`|l_^`dY3udpWIrL9V0HPCgs1(=pNicW ze|%#zVCnsQnoI(rZFUnnUfG=gUGSdn1Cv&)M86qmHRvA7ueRvvayQR}L){&=nCrCm zml)@g%TfJWu|(AWE~sV+BsL6!JQzQ}Mt>^5|MMFAENQm874gpF3b3Y3eeWc+nX)tb zeL7TyYIiC|^_%RFqhu_XCl}G}c3h++5k(SFfgzMI`#d`+D@sZx@o+YH9pU!rH8y;ciCn)#b zKg#js#yqk(CCAk&MX4#{eoAr9E5^W|cCYBvznZ-gtGSi#I;EjmkZ62yG%!{3;3N%& zvUV?g+URX5W)pM$VNx(pDQ&-1jj{zeatX|zQ7gV)UL_vXxo{g@bH*Y0{a&acg>8MZ zS8vAJfZ0sXysTOu(@Xl@4cj@7;4ztkEQz?{* z1C$Y&yGJr6pJPJ6t0`e+0bO4c2~XIODkNSXp4a*Dgyw;%CiT-a?k?38m^gii(xA`` zEX5V_0B*~O*hS??+WG|dYHy0y^achg(|fETI@y%el**vm`+{RyaYx~(%ky6PI71b^ z0K4l++^GptrmyHG?q18A4px771yI@xX;|uGkke`JXe;cVbQ~t_#w9;#?P#+3(i}w; zOkcDs)_%wG=yhS205bBN_LLH0K@l_uhIPSSHxv{>G~w99tHKslD9|Kd)E&aoO(fKe zyoa>u!ExfSjSW#Wos$q#T!-Ah#tUQODYKAj@}leeWn>6MEgaRXjBjQ0QM^_tj@C-5 z5C_B$&}u>o@fG?3bz<5Xe$gwpR$HgvW|QW%ve#_?3ViLk82dvg3SFqfng)v8j0m3G z4`R4KS0vSJyIYGV3y2SjSE*`Kx;nb9Lfz{SUuTN=aV$tr=b2h8<}=kWB=)E9)K0~O z2E4|#!w(gw_iEzvUJzta z({h%I>{XoZ`{P3$daR=?_{t%F=E#NIV?6$Gj0#yExvUB35ZXby*6@E9F78C!86^ky zIrCDyfzrogGMHp#>poqda z*8|}==Ryt;p{epq;DXrIN!;Dp1$!XOU`m)G)62xFNiY~?1cIqX?43j-Iz6848SbN$ zvIV?7IPz^@jpZy8`xkljxy{W-amZoOs?6z%gdY;_zZ37H^?u4m%PO?4+4T?-(^HhC z9166aP57Ld!~+9ygkDFHJOhPdNkzI;x7g}xn`E9E>lik=Aj_pbAu+ucxOU$338Y`> zs0Oaw;ShRdM39MIPkQpcSmKC<+m4iA<=Bv72KLp^wvhi>1$cs%-9hYt?)g*=dWxDe zUn{8ZT{cM_B_UXl()jCZdHv3ON)>QqNXlfRZ0aK7u zM(|fOG$fHO`jk&+aX8s^4fYv3j_#M#mmMlQg`J+Oj^Bc7mYP7XltYgq`@VftcH5+N zv)nfsylb1{H^Gd<7Hx9e|KsgE|JnTCKCDv}Ra$%1-qcn!+A4~o_A05Wy{d#Dl2+{z zwOg~bQq)fDQDPLeSH(=M+6hGvzW4RI|A^m%JmN``>$-BDpYwelM<-ygsTxka;DKEp zSto)4|5<3M)$Cu~50gF!3R>@-QEImUHex<1@<0^L;}-rNA04M>C@Wc7m}>cQjXgP` zrA}Id(IYG4drcF98{AAIo~v`=2Tan%Q`c|STBb@aZPp z5=+i8gvE#p6*MU_g=E@mQy5!eZpY_TPjUq4Z_v*_6}K!VIHiY*6(RkB-XKoQ%iv{w>ytjn)7kOVAe0{m0+8&AVxjhgVD3msoU(bO6 z0_Zwcth6QiSL?>z13uw2-H#3Kmd4!U31#4UJA-tITiR3?0q%MKO_NBuIuHgr78jSi zn)ldi^MLM|6ly}CZ-`ItCY#^^w zQ*A9L^NRA&u@v74Nq}Z6(s4oS!wnRadmV#1_`Rq?%!H)E1W_d6aMp;~)us+ZaFgL2 z%EQ)fs7^&eg)t0*Mg{h^H(CawaV-Ns5!Jv3fXKv!lsoTTe|mk3#_2YZ!S8OyKx#F4 zKx>L3zbM$35#C`vzc9>dZ^1WCMZ5aWrI4UOrHagjn z5AjDEJ!-*66-q~1SgN;{eELjqPv6E5L%}XN^Q~KBSdyVjRKH95lAF#o!*}1*4JB@t zc9vU@q?MTEXh}RV&`MjAr9I#xD4!#Jy7{vi!YHW)yvAy$X>gYB_g7|O(NDuPc7JE{4!mfQZiZO6Ky6cPvb8^_#`T51wPNr|16_^e7sXg(t5-Iis9xCC=(^7qpbA+ZLL;3HS`o+a9ea@9vl(M&EVyGnWnInwxDJ zntJJ()CL!RBF;#=eJ+KPSO3`SzAlI^;?fFaf9H@=5EU0zG{B}!qtc`5p0n3}~ogY&SV7XMLM5r0$)vkV=Zjf3@D<)50jkXNgd3K;9CH12Q2egi&0 z2O`g2=WXb%bu6n1^!03Kn;0={hV$gQLM0nC>lq1NElgtLr;tBtjqmML^zh6tdzE$| zHL?JlD#KCpI9!nOmaK~xQ`bU^KhA3PtYFt=I1@Wug6wVeIm)oNQdY_i{}|D0*S_!zOWiR{4Vui<%dCs-)d190 zBmt1Kw0guIKOCOiJj<(Wo(2x~DWYd#{bQ*;&nnR@Y* zgq#;YYpBM|n!Y$sgR^Xc6sBNaur{&g3_Frmef%Nf=1X$yP77lY!B*m-T>q?jBN3E!^Is!}GbWHp^Sc|kc@_~zYEZZ0O>(hk8lH=bS>yOa2NXAWr^}Q~T-2XdDUz67qVkD{f~7L98-|7M+TteYA`{c&ZypoJ`~?zP zLgSwuR6L}tpv(8k?q*vS<|Qb-mq{fYuw*Z7Qi4hc2K1&RWUT2p%PDFbOT<1QH9>Jh z<6X+Yoiw=~{cjMc?3;4d!~H|y`)(E9kOT>A22+;4+InL{Lqozo39CM)d)1dkky3gw z#WLC}(w$#;UZUYTuX%IT?5@Xb{$TPW5g%$1D&*JcLs@(~&H%C(ohkDXk_SMIh{%{_ zdSEv~2D`_;#RRk;jwHLih=|dNG_+X~B!{0pz5mDn6!Q1x%WkG;3wnb*hzuj#{*3nu z8S9+BJ1ujj1=dD>mNeg!4lEVDR(lXS)}APG9ipjRkmUI7i|X7^`mJ&X4@IHvBHOeE z^h)J04X`+vf0E_C_Ql|3X|Zoux;2O1O=v%4j!*RBNTEQmFw@{HxdlF01pN!RNQ3Z| zA9GbFy}VnjqzCCaKJ5a&tvuC>SrZ0a^QA98=l0f!b`ZG0PL(<?=x$o!@d#aV1{nX>sr+o+5Ya`h{4J8ToeLD7j zD@3*ZsE~W;8F=81x8AXrp0Y)at=gg;Pu=v;Im3w3g>&JL)QYKrqVjQrcFnUEq9>T- zLt&zAlv>)OM~9!UO6B8t3XtDwRR1l1G8#Z&23vrMJ-Kr2P0t0*)W=ur$IhcQs_SVF zI#yg}nGbb7%ome=maOl11m)5ZC*IfXWx-?KbR-(;KDdIUA+)_buXGF~(~`WH&8^4` zUD7vx@ul~e$o8n*<5?hAV){;skUv{(PKP*l_b%X11}sD1Y7m`a=OlfZ9w8S`snDsd znE?ZZ!};=I!gvpl3~)ZnJ&YfaupO@Ll!_?8Wi*((NtF*M_J2QMy0`t z(^0kaSdND2l;;@0jih&ggm{(+##Z;O_TK&eZB=u%c{Q-7+4i1uqm+d$XQ<(h-EZZT zSzL@vJ-^b4L(DX6hz|MwPOCZA@%^p)Ax3miovuuL?mBjDulv#pl18fKq1ShJlQk_T zzayv=Y@%oETder5NJ=Ka64xk+h*V=1Z}}88RiWHG4_#wMCz17b~K| zu_4SLr^o_t{R72qLT>5cj1+jIZa%Vz?Ssn~5xM>aQ&x0RMn~{w4uRCCijTi-0>&S8^VHzhfa!0GH}p*FC9_W@+}A@xVJ*XR zi+}u%9L5jzD?hZO8R9_qItYy^gv!n>Zkf&|ud~JC2!?3&#}3y9>ly`X6^^E>x-3}$ zxLu95a{3?n^JZwUj+rc%LQGZql?SHBM$bPYa}O_qz*Oqoq=BPgAi8^P11>dAu?2!@ zOwfal;3l`z)^rrg?R2%ZqWn#@y{2QyW6um9r+|f*$w45e*596&R`n6z@}iy{2;F>3 z760l`Lq@Yt{Z(+t>GaUjuxim zW;MeC93py02CE^}X{#nV?kcV$1rjC3Im(u}MiEpS%BajI!yI$|9~Iuee?fe*fL*$c zb1Vlb+c9xyP8Fd35&Q^%yGnt{B^Zle!xRDB3jtmw4KzlM=Am!jm24Mvy6N`mkKprV z#`6EDLfX$888&kMwMXcq8rqeBAeyt4vDRIx|J{pk=$0xlxfOn|@eo4Fi(TZdDM*Zl z^NMQ+%GGxaM|5Re%~lGeqXOBLhZ!ydgy&^#B5T5Ng?Wn@fe*cMop;7Eh|4db@vM-` zzoVlPLAo4Ht|X0=JgI>$W1nL^zAz!kW_k43NM|1z$ES5WYzdFA>b6whlSzT@_~m*ks#zCSdJXUQK;>mnaR=#d4X z9zI;XI~K2JgrMapn-mn0Xb?4K$I$)WL#odk`TF zEL}BEb9SBL#Y+BcY$?FqFt!MgniD#wvsWPfA>5$OgZA%ATc~4)DoppS$qifV1z&?3 zH}a~lcJ#gxQ#Ir6TVD2s=15MwykxSqGUM8(vP9?~?H}K^+Xhi+V8pf#7?!AaG)QpjYqG|ja{)NIzO-n(MUsoJk2Q##@YPYd7^#A@t{Wozo5#PSOLplbZAFfv_2Xz=sq$}iiF!)=t=Y1}k|{+k$75QM zRq{){V%o52dnV+VvX*TMp4;c$r?@q~OMafnD|P!{gW@o@Azjp*m2)_&mxA;`_?e0V znqY@2VBS`keBC?;g!KzyN6y>J%=HY%Ulx+n;S7V}{ush~X%ZrZYfySj#l#q`kutG< zIdc&RL?txKtt~6Z%-4RHI=WN+p@{f+{1iX9yZCGJ+r(qr`Bsd_Hy`}1tnUUS2Hjt& zIvjI9-+U23GDCNyuXgnb+*n5Hei*3DmmD(hAzr#zSN9+mn3HpenTyy{sqVCNjE_c? z`s4gMl*ds5&$=0ra@3TThQu&2N^ArsKatvv=UaK|qi7x*0jwAPGzjc5AaR&aNbzTA zw}kyir3cu^qK1th&J}Y8zB8`02}m~ojjZnAlk{3ncv%9hh{{}cI~nzll$1+X^4iap zo2p*tDah-scu+aBe{=FayD%@i_FITUreWc|X$2EAu?!e@&7uOLX8l3(<2l)i-3sALs#yIxqY>>{x$^?fyU1l;+)b}Bqa~CvZAjJ_}z`@ za;kq{7WK9{MqDBTH0bX5mK-dLbs+u|n=S*-yjWX>l!?2S>*~GB@_tz&RHOfN=trWI z)lCdZ!@4r2Qrt}R%w|{GxZsJQ**E5E%&v{Pb%$OH=j|LTRpd_M{1%*loC5K}+it~l z?Ue|ZdNL-j$=_A(T#`w-*%Hf_zNxaDYkrw&yO3cs@#01n0mu{9*|Zo#1J2CHoJp*a z5XbKuHg-n^TpYz;Q1ji_V-dB4Pg&(pXx5T(>~`ML^o`F5d@~s&KdbY6xX8j^%Tu3d z>Zl69{*CisscIz_BfT&;Dw6VDy}yN+$J;P}0tF=Bu={~xKi>n;8Z2)0G=NfJpsLH6 zT)s3AA6BiA-sH8fJygD~FcS91VC)%I^v!O;@4nLUqJ#nyfAcr3s79sbt0$Hc-l}y! z(38p`IVVLA2yZbC95n@E{kP2dQ**Kl1`BK+2ze~(7h`lb5goi&FGd!rVIjcQPY=)4 zaZERPwFsK=g8TvBei`SH0_`7oIr$M<-;qRaKeO>G(hS6BvE3umnLepgI?BrAj0$j0 zJ@e_X!>#Y|5x~(rmx+npgMipaiRf-mv1uR|;4ANvEqY`)tkqfCI7eC}9F}RhLHI@e zI##jo`uOkb#0_nF`ibFt0cZJrE1@5%7&)0hK`*YGRS9yvSz^p>SypUZA=30*6tH3G z-unLGdhfdj{;{kwRs6tF$W{_-(nTQBN<;1+iklWzReOz@U@@ZRId}0Ke(&O9QP(^K z69?~SGaFrzei?Y)rADYL(rMw1e)GP z#ajxKqiPjyS+|eVGsbs_1%#*YS zV`X}_exsSDmQCr^X?w+=xvr8_uEk&h^T=oQ0d7;;2OfqmC%ME;%DCqwH0OaR5{Mvw0BwX z--^+EN%tmA=EMtW5nT8eL5{10mXBBs;wbn=+vF1BCe-mU8NWn(U7IM~O4y4TBkT9t zbB!*F@qUDvL;UbYObpDu`B!iM%@tQ>bf3=Dt;bCBwM=+9P5P)sQy^z1&y_{CH;5aL zI|cv+Nm9d`4-sV0vwK7UeY|{Y&>IyPo_DR^nhL*=YOr))5X~R_=y-p5De|JL820Y~AHTN>lW{imip-ziJ1# z)c(K?e~(cF$R_of{$O1I58BNvHd} zlK^1Hp?O^Tk;XM^$KHcXidf5da!R5ty!2e8l885*57HeD57i1^??KpND z&%uHw3*)*}E4~P&HhCA6X@jV0?CouIQGax=j{AJp^|*4S^-^Uk9yUw;X=ypU2VVp0 zF_Mb}m0K@YkxFc2<1K3-s3#E5ymlAUnPDqKx%idEwK?#o*9{-J)h%clbDTzy_Czx` z(*Y7wgxJBsnbu8cw5c2F*ZG1gYLG@a8N^4{Dx`3b_I75Rma-7^FzAT-)!a*yGA)Wh z1fU{wjiYz$&0|!5SVlH7&*(l4Ul6DPu$wn*aCYvhhIvXQfj$loSF;cvQsq;X-*86f zH~9;VHMxv;XgDOF6+FCt`NM}H8Y-SIE7M&8(~B5K49oD|GAzOmcyREJgfi zFjZ*F?Ly%BK(g%Sy-hL2x85$`ezMgGzdHfHP1ezFCMite%l~B!dc3^&J+>!^yjVAy zAk=w*5ZMHuGMCRS%$^UQmq}vrZ~cjr`3K@wU-aIl=Dal8{X1UrU?Mht^=i?e<(J2z z4V@qq4SwtGBweU@18iNXYgzVP*GSe+!*B<7lW>Pf`*B8-yLcKg8yg|kK?zJ?If=G+ zL7E&znAceXcRbYG<`|4d%EW>1zCxet4M(5c4>Nb!mXQW=!Ek+Bw~$EXLM=WVFVEBdG)Ouk<2*9y}k6>5~t37xa!Evuy( z@=)&0_=(wM?yFVS16>Eued8#P$zTX^*qr>Bq(KnQBJ60G0P_=(&Q^v_IR7+Eh>#_WX&#l@ z{Q)!ZfGV7e*aGc&>+(n zM{((SwW&Mgb;eceQ1vtV_qj}U!bl!(BrnH;?BqAPPPf-phkW`siFGK$N!Q8m#XGEn zCY!^R0Ex3=dU?2G_@hQGkDMZP9Az79i(qW=eoc&uI{jG)uK;GybjYk{|d83 zJv=Q=LzHcS*lMcCPI&b6dh(RVxlE5m%@q#<&F}V`K z_bQ@rdC~qvP)osF2m=Wrw#1?QIs_V-RzweEk#0m1jy4h4H=CWr7bS){s?36f z*6d+{huzL9bUhG0EcAzyYISF4x&VXi-GX@RYTBI+L$p&=Y6<%5v|6f@YK^h3m@qsE z>em4W5x4J9#Ih{N%J@VYa$L_Mv!W06#Yp)wH_Lxiy_Uxy`H920zuPc&eAWP)BhLeX z14P@(adC2(W3nKnVGu1;i7RmZdLm%}l(g?)_QZ~s>M^+Bh6cNTB{g}O@TN&7Y@L*< zLGOdM)9J-&=P)NG9s)-^GLKs)dZX{P)_duj6MMdKS}!~qkZLX*>L#|_ITM0UsDeMV zaJwvfvD!{jTnO{;`qv+mSW<3%2m*4&!YL#*8`7FCfCnE(b&&^oo4c9>Dg|&&!yTz2kC*cw`B%Pie`L0|6aw~DzVw9pF1Gq(t z{}k3`wtrM-M&KD}!A7Ov{Eb?BJGa}?UkY>}3chy3;`tsrj4=bgDs#fd-PW23u2UuU z##sAY#ieD@Q0FvDMfy7E2&$tRE@obI(-z|Tz{LDASK=}pOA=F*CJ*u*GDK;M#9yILs?6Rc#y;x{Dv+u zu)9eo9y6OryHQs15a*tLalfY3;EMg3SL(6J+zdHIpC!ODrZ{cA+5TK zF73$Br|zo3^T1EE^+Jwu<_bK;rXYxAMOXClf+TIkb-XXf$D_!F+2a4GaubHYf+-6D z;-%e%ON#!kusuNd_Y-2BzZz!0w#|ON;oh`tMK${*|?s82j1JX>0>YTQn@>MA~{$-_Uw z%}D}bvoFRKIK52v^jKd%y>XhY6#Z)!d$+HW3%JTNFGd%{&okTK40DpFe>&SDxVNTl zj6Spoeb?f8{4Z3etDe8#%Uwp+DQ+j&BIjse_L73hljD)u!cyZb4GDNx9#LQBeXvpI z-gTHI`3zsuCJS>Te<*fC+=e8$^l-G*msq<7s#1(S>MW*|j5lxF+HW!z{Z>}ZEi3H} z4F!E2zfpu_=J6SG`f^=A_Lnc07vL{dV+ikFE?s>9vP~H&u;fH`E7U+3dzm!LLk^-iMYwbcf3atr7dd$CvIp!-B5>$Qlk*G_D0HWIkk zvJFlB=s6Sp<*d2$uVGs|Zy!TE9=1$P-^co0{RP+knky@4!uRUdw6>+mBeiE6nI~}s z@J`v8Bt?(}Tvl*Cia$~M<1!#>^->@^b2bn9*`V86zud#1Cw>6_!P3Ek0fl7kZ;DPe zYA@wq%Qv+MT-@|M(KP~JI%e<^^ynt5JeVF|T%(mPXin_QX z(V$@9JfmG1gmRs#x5x}g^b<}sE^eH}7}dG6PRkBTnqaR;)%X*KqsVk%8fSIioR*`Y zhmy_$G6PkOJeS$B4cz~UX=7ems4*H#f~c=V#h3IH>9)D2q$H@!D>-$wAQFC(EUY`M z<@yS;r#kVZ28y;%EEFcip;#*Zw%}tC05f!y&{O2PmmDu}cV&0@?}6-4lI|UepZ&=_ zk9$8?G*6zxUun|CzxPGTny7z!a@7;oaOLgsgI>Ss592%&f0nI``JcW@y7$yPo+>u> za>aF(7gSeJY~SN}-d6Y}%e5r^{QG$6&ej$<6=d)BPNctZBB&g~&0z@id;eM~iBkpa zdf8l!L8+lzo@>CL0?=*Kx?Z71>4*CWd=;EKc`%AhLlU}w{e>KGRVP#R-V=NE<5BOU zQ2J0YQOTAi;0T-akAh&Zmsn$9mef4@MK)X$voR&g6Fym+G2Yd@V5+<-zxU?tB}cTV zzvt1tWewvW&RU@;9;?64R&G&9c^6e3gCXpwjx@Es4C4c``=k+OH?8ut97b0pq>dB+ zk7{4O%l_1UlL2KUe;`7r_(<$I!y|Th^WE)bNx}(!1b`_UIc!97PQ*8^PquMWp4TT2 zzaXxm3TLg|f!qwXV3R}jrQ&={U2992uIJa<1D8u}vLqdB;`;?wvK>AVmjt@!mdi`# zEd(^**UD?5&3NS;()wA*l1sGzFx?E<51TUkrj2+Q?}^fvkxzHHJj z2rB=c!5%e@7(XsG;D#4q zgQo2C@1#2&3`>kgx_o|B5R=P$+%`-bgWBF4E2B1)W_ASAhfkSiyLR`xXJ;1|our3; za%Lu;6g!@Oj4V0Ndf#i-`NL@Uyh1oa%OuCf?_Gu>`-`sEg{^=3f8f~~b&{omsXOTr zSfE@}E1Yo~myT5!j^*X@&#Tr}IB~2RD+kF@tm?+4;P+-?3X-vSSXHOA!p5lN#Xvz@ z+*N>BrTg|js{6nmVM1=+nastMs+sOLD}9k}FF*YdDQ!+#pp3P_1})`9Dw*`UT+bJ* z&3h6l{ARQu^}g*@%%jp@j^MsM9*XlQMWb})?*i8(oNJ*z3bIua-sG~we&(((;BFZV zKwQhVR43{g|KPqX+DfF%XrZ~g+nmIM*&c5>jZ{2M8YF(u@3x~rR|EU`?T6O}=mg!h>(4j}gxE^c_4W;=cCL9z!)lj(X71qYP>AoFncyyP^gfn1y3#-H zTmcLXrj@Y$L_hJ)H51YnPoJJVB4%#tE2j{CLr?S-=szmp2Px=cAdk*pCKk>CK&h9l zF%LsJ7eq&RLRq_U!XNy6+^0Fpzt%L3`|w3BJgZ!fR(GAgUDTy4cDHVPNXWc0Ov4FG z1~)BsGf>0swUAqj$SKd-Ciq9tmr4yt65SSU%%g8?v%b%2k5RM;p$byjew}H& zcnKH?kNTm&8>4MAx4ztesz-^FT54H~L_`y4d|3?C^EhdSWstng4+e))3ph&U5=86P z#v>{bL3WF#hmyTs?oix_e*yX%L5K_m-Q4UYSjPKcun2(Z)u!AsMG;kJEVZ_s zb3cukKaP|7;lIeaX|vXlUiGsnpb>>rJU^K4=B^w;pf$QmT9m&+Ejy>GDV$lR3tyZ3SJxu|v z6}UNCVx>^y#A_zRqgM}G8u(lFhWtfGu>{wVuT{QfMt3)dZknSk?iSd{6@>!zsp?yA zO7$GY_Rb-cRKb%VbQ2?C(K%IVO;|UCY8f)5GZv{`$L1ETm0)u7?s&Q{6Vsutw22r{!62VcYEv1kiuR!^$Gxb=226$ zMocZLNSKJ>4?ta~Mx0#ucGU}%<5viFRgFwn;8t?IsUryIN2h}^0t(8Jp|iZ^9;j@_r_Yg6b^b4iGIU&%Yh@%)_!8gNv>>n>LIr%_)5`wA=>sjEXgJzg} zoa`2)?Red581)aC4T5=g3mHOy1ew0@m)@*y3K?tRM`Eih#@RTv=MWfs4a z;xXg+eH!9qpr+eBl9pl_@4RS=mv7%b&a>#9E;pjqm+Zk;gQjXMQp!J+JW(hx87!Q1 zt@jWS72QRjzNY=|C3H}sfAT_c~RxHlwgSt6spev8j=R(kE*=l!pw}lt6EJS)^W1oW84`mzns$A5LE2hnw*Oijw z(P`m#WO@q3t^R^JLASTkRT*Oa^Vm21TycAG+buM&hOez+C~fi?794bN_B{Q@`Y5y7 zDNAGVWUKiZEydP+%)bHdXpiVKa2%MUjRnT~5!+6zQP(|>QI1zs8lfnnY&L8bqZLDa zjIDU^JLq#x>}fzr>0Ee(Mv!Dcw=lLa z@hVK4&+7tFjUZe(_Ywoaw?T3+p0RML&>v95&!)+!u6gP8r)0=d$t({%1OIe{<-nN4 z(^>_>lsu%!t9#dd3SuEO=~5Qq(?`?kO^H3acCdz&BV?=aQ#XqjJAt5)LgCv~ixSFL zv){pOF6u?&?3i5q%a{0^9NY_B;C&DOFkuQ4>y@}(LuK$4kOVgRamvqydyfK{KD2envR$H~N+SF3 zfDK^c@xZrPM)q8jt7yASjDAI)XQh}nL7f~v^yf14)BNkJ_+t70(( z@r9xVP3&CPnM94lwCHo@`rJ@Jm^6D%ZC5YzP~bLwr< zhyC@gGFxD72OS{;6q(lgq&o(&z)4jDRGLN2L&7yo-;dpEq{X*PL08Z-&}*)12{$hD zt+Ay!Sy%Ca?6J_9Mc)-xDsQcbdaoB;1qxqYm`Zl3!u`70;jHX&J$Mr1(S%c6nOMhx zOsK`Xx8{=W1W?D0` zf@TOQzT@|%=7dQrh|Z*_HnJ(*oS)t7SG9yh+K)KY*vHTQDPfr_FYlL~x{X(`X+1#TBP5Bn2Rm$94}nwjrGu8^}4@>FigV^YL+d3HsR5=-)!` zHcJBOV=phJy?bxw-Lfu`0qCR{0Fi1>M$u-j__X3Ypwxyb^GJ|D5f6)sdN9649p~9B zYvX-m|B7;to)t8xv8cVdq|sPOAD*t8C7Bg&Lig%WYyIkN243Zt`+hwhWa0A!4X+$a z9e_8h1CSaP?vAYz2ivn1(D{C#f!S(M7HL|JPd+1ZEG+?QECW8O$b z*K2qRE}u;jtFA`ku>JwtzqSs(xz=JbvTy6s$z$L6#hz0O47`K2-}`AiP}W}rF=gbk z6Wi04O<;|x%Q6@$HQZ@4`)5l@cZ>gB{iR3Fs^2()Sv$OH(gfU=J+Eb_RJUS`+Qs#s zDu;sN$S<)MOgYw?$&18<4V_oq)JM4`k;5dG_0^sCeg~E#0sy*fp)G)HEx^m+K6*`! zI{aTypx2V@$SvnoGUfETSo`(x}NmpuXmHP(@7roT8`GJ%S7TNl<@*7P5rc5^? z{(z1(quZW^E+irm@AKiZ^y8K5(v)Q$2P(&u<-9xp+INg-$azM%A`CsXRjsk`(wD}n zhH#c%6}uCa^~Qg|tYf&?hX1qazCr#txH%v6o$CQU#*tzW3zRm7mqKRIUzl27S`G(&xip({us_ za@{2Ae;{xSm|4T24^kPGslZFyqK~iSA%AGQH#-k(rR-JM|Hbu2$v}qbIzl{{>}^`p zej(KgQ{4N7kY)~HY`pQBy~{fuU=paj)XnGnmTKB=b)Z+_%z};E)HFv9)<9&&fw6ri zKl<6GgNY%V#Ix)4Fli0y>{qqha8^0v0=@8gmGL$Eaa@T_e%6*Za`&t)YQ}-YZZ9I- zL3qmq5wR0Tq9k6V(RAy@MQo4P;s*9cdL|ATILMJe;BPk$;uYw-Ok4I)`bIH&ygc1w z-WiYnzEkKN9S6nfm~`8jTz5|U@{XfPCIMW_+g16#?kI4P@gLh#Yse_-4{fNUVUulf zZODMz&RTsnYshO|^lYiJ45Jg%$q5hn`*26ZG#Vu=Cl}fvJ>3J~8%2xZ|iT~PK(_}HaZeRt<+aX$5MHw}uh_AohCsjU(xy z&ELZpad%h*tFIy9B*BzqBjyVP_=cj)jZOH2hMI9{7P}|2IupB&9uQi`Yugq@756;T zEFg5m>jwQ}KlMHpd7R$>u~i-!F&JyBTeNigcGC6=Xs6)DM&{{bX}ODgOqLsyULLh00_Yp8d~ECQ`4=n$ zukLqU>Y@3yeM=UM-P;jC`HTVWo=+0!I%*QcOk zahvvJnZJjTj#XLS*7kxp+rinty*U58PEJy=G|gGt-t2aTU!7rV3>*93>+}dZ4K!r< z{VuRfhO5WIRi~WCydZm=Tc=PD30-gDFBLKvecd>@f5e-1zD}KvVor# z;(Q8fbSZlwftW;78pv=!rn^+dk^9lXhR4PlTw~zO&^2>wlLMYWBy{%g?yP#r>36vJ zc@>wTgRWnDkKPRbRV|h-nelwtP2|)KI2_?~w=g05fUBmY!!4XC^5|M<+_My=08)aFAM^Urmk_H8p{aFOLd)d6AbT|# z^y90~;*-lmdGjeWd|zQydmqW%kING>J$y8v{Kzxa% zF+tqSz!Y3FI8#_!BkW8r+8=@HrTYBlgj6RAEM@$~UzbjQExNgzkFwEoGw5-@J>Kl7=G~tuqGw$~S&Ixe{h5omMCtC3#0cefjFNPCf-feyi_AS`WW* z^D%AZMyH0nppTK<);q~O;oB(*^Oq{|aW>~a6q+?|&CR==g5p3W3bL)3j&c7K0F7p2 zB~s^hZ8S;HuujvO!`ES`eu29o(^nNa6W4rZM z$3*^y z&ET)#Wio6WB9dhFWbCt0mNP{;eN1{BdC8&oWRb#pUaU~=K`{F8FUJU2AH&p7DgN;+ z%+%-9|2)#nl>f}BjDd9}w5!5{Lj3X&As zXo(AX`Bqwi<g<^`BLWT02VhnpVR0gXC?V2Nqg!^&;VjqLwoAbOCAeEsZ2=%-5@a~ z9@#chZ-nQMZBL3Okwm#v@z^Rm?+*Fk}qdBDO}fk8(~v=yTnBOQ)=NdYad7!zp0XK zaPv!iXfY4^?V;mMw%Ag|l@dJ#K5>614or}HrwPi?H2dC35nH!zWo4W$|%*|ViOA{%;Wu5dqEazQQkvM=#+xoR-Au;LfFpcdQne=qoJJ!aj6 z0s3L2)mmo%Y3Dxfl`y7#T*hk`z4HY3NU*L2lS$3Fta#A-vE6ex94-rJv+_QS=$5$U zDiWV^boEGCh~n#}5mn2v272^7cw5io`&#$&wudY1HJ#)3_Yytx^bPI80+!Q4~Lkb%fX0JkQ}3Tj_m= zckx(uOU5WHepURlc0r73iC#uchFW3%szs5)x_Df&Y}~t4bZqdK<=Wqsmo#Z(x?g`Y zL`s3_MaRmGC+!E#-x;F}->oKSz)jpo6J}i|G7B@~SuEu@rb@osb>=#?MmOjq&~4E8 zVWo-aOX&+g|NS(1R+6-yF5#T1!S52rntOZm!T{S-E>!a?yf9K(h_=EqVc?TCT({;N z-Np#q_kfG6X~?6|UnY@9m8gMDq;}JrS~ml;KzqR{*zt`(k2SWgHjYO0q> zItk|QX4(X$L9vnF4bGlVeT4VqxQS|)Ta6Xji2IkBrK$QQh#D%bLb$yD&0C!f-eqRD z`=cQ$q*Ov(>O-wEq|9Wft?8UJTJO?MmGf6l<>#>Aa-C6q@JTPwCH0mg2z)tWT zsD|E@zZK;%zLIHEH8-vT8e%nGC@ZHab@b8qtwQVb+21L}Iq&E`3$cF`quvnHtNnz0 ze<_U0G?M!PMfL+yTcW>b$=5nS2w(leZ0m^xz{k@rjSUF!D|pb+I-aPkV4q;WUj581M7K7psX1mlPpR{R(?;EN7+(E98rt%^# zy}hr@m28$i_gHYbVx+;iNA6jl;CTL%UvgV{pWl4lLw?>M`%V`*rFkHC%m{mEe4;k5wVhT1HqXmkc*pBZ=n0$hDzNca%w-Z`q>$%hk4+iA_CFjnEI z?znUo#BL6ucf?wHK{Fj*_lMcpbVz%ask(;nYtvhteyv#4SI?vZL9>sDJvL1Odyn=9vNxT6de4GBk zIgsppdq-q1&mvGKKJbZ}@54(oz>?+$RkGGW2gW z@>ET*Bx6M&{g%aiX?e-w4b+Wsn6T;TYr-z&&^Kg!?6EYD@cI%)1m5(I)=@!z*U~|c z@R_yd_?%(*V|fY;oN{rT{3qj1>3>U#h~2&e4k}GJiL#HUt+!HvV~Xy#f%tn?D^kP1 z1wf>qnCbHM#`m{;>V3}0dRh#=X+DS_z*J8gI!z;IvNM>NLXk@1t4=hKTC<^v++uF8 z%xL@rrbLW$XMBVCq80OTBpt=);puUAO}YpqfTTCFGoawuG$D;G<_6mvi+1X7XFJVb zcz3E#am36OXTRW6oH-NtOd}tk_(Zkv){FyLxB7_5#P^qsuQbWyhXwkNKza0PQ|z%K z^hPAfDSdoAq={Vw#s6)x{Mac@a~=_pqLlpnnjqz#+_x>E)nWGBcnY^Mj$+^c5OiFa z(q6&8z1haSngtaGaoe$#4st@S7N=fjUef2=ZqRN-a8jzgokVx*5ghxamX+QbP~1+C zw~9YT-@+kXK!JDI0A1wtYK~*}?%^*@k1bvZneGVJKr}M=4O`E2j(eX&+r#|V?}>uN z;#u)^Quu0Y&R{QXmtwYSIp;(=0zwC=!pjYHSls3yS*dX3ZEg)vS>+{ka{Bj7Tmuv5{1q8IM$WF_QD>OPLJgjGg>$HWuSN&0ZFsD^sjf3oGsk$jsoh2cO zR_x&%pNW~7?efKPt=x+cFA8bDJw~Rk13#yaZw8#=ohx$&oXwu51rq2*P6R(wrUNTaQI$)!?f!;!BAY zEscx#vmx3q42v4e|08gLQe}OzBc+2d(zQMkvEQ`o6uSQ_e_*aK`RP6Gl2|4?9)ZHq z(FZEpVi~*t`TVGRg^$9X^4rkC2F<3rj5cI~*sEc~LsyfL=X>Wlox!r#Z)Tfs4Rn9) zCSL7oMiQ5_%>-5F5;Ktuyxa8UAHzlshmJ07SUa{}WQV^TgZP!LIQeB{zFe^{OyMn@ zju&Pgq#*n6+nN}2>>)Gbji%&=woIZF1NhuRHi9l;NJS!~I6AiSdQs7EMcn? zX?NcYPKOP`;@{#6c+%C-FB=R)I$w`wr%Q8|d|c;;`a3R7UEttR`5bdWEV$Nz1#{=6 zc=O1Sr3o!Ab@pEMp|XmMF*gAU>Tx-p?Qb{jPs8398tWy^Cq1}uLVcORjJI=O(_gDHOd8NV3q>ClRvdO_^wnnXomLp5Ce171miJ`Nu*B_ z)jjH#1+c?3!ugrLU)!wU-y;J9e!-vflJmG%2Sj~q{>k6cl|MYLYxRaN24biS2>#YZ zPxlm%*Vd7DSN~y?ORcg{EUvIHEzkdXp8ye*^764x2B{QL_qzr1VP4&UARXde|6yih|8#CfQ!+l&c=5Eo(T;wM z!jB30DeVy%v$6t>X(A#H2zY;v;)q#Gw z2d{n|)w-TrEH7?##_823y^9T0P+HSzRrL{Gdfp!DSe()why;k&1dqbEAZ;l#JZjXf1*x;SCK3wX~*>`v;=Gd3Qqz3016*E~H(z4D;$Evd!T-bFY zj^&}4^(b&X-Jz!4f3V`AJF1!Hr29fK71l6UUZ;*WhWdYK%{H#>z3`k3d9e>{`JT@;3&%^{akS%gFu>P?#DSyd&t9X)xiQ`* zcTZSBNdrITf9{ljwN6BX&lu)6@1Ut*Vp=g`F(C&@<_g!o2qlK55!5A~RziG+sPS<-F2$)uRR% zp6RX@UTqpRZlFL-v44R7A+$C~4@dU}?39#{EtF%2K3ER6L$&CLS^v4XJVTcEDKfMe zrI+f*fv+r6%}1J6l(&g#)o={p{N9KESNdCkl+7zgl8$rhG%yAa&5CM4iuYP71noYl zNJp~l2Haj|{(Qu$xAv-T$_>w7FhKEizo1EHI4RoqWmAAR=&830A8BNJlKtvj)ZodZ z@d^t8GW2GKv;>qP`Qj)=A~Ux%sQ+4OA4D8NrHa;}4$|($M%3eUBD(DC?S$k0o{+Ep zajDt!>eHVHT&ILwg}=1&_X=~uq3G+KrEP6uU)GMr)(*{5;rgL!MAzP@rEo&(!vI^t962rHxmmtIqEj;Rc2L$qKx9guCdi2wCVQ zl~>HJXrHQ+cb@-MqicauoP6AozW^;EXfup?XJ7C_{Y9cWc##6Q@5o?LW;qvLccU|| zKEr^XZbJ+WXo`V~7Y!;$4Y0~Lb*U<8_6pd0Jl@v|i$a7F&l$SYPK#_^z@kkr0AwkA4W%~-n zqNLkp9yGP$@+=Ze2rGoU zFu5(g4q;te3KD3+hps=_28N1yR%-aX!$+aDaEK)KkL`Pe7k?6wW`N+`QV63%7T)K zS)1P`&bVE9w`S@M+kdCIme+4OHdVQIr8Y?IKIF!zOlJItEmZoeO7h#!e5mLzhHM1) z`QrH^bO{J35CizQ7^GpjajlK|hnLj6_Tu|WC1_szv^rkBwC2p#>Yv31R0U1BGKE|- zj`*dOdr_qt-Sl=F^Y>MX_UgGtN=|~(gG9(Khy3ByViN@qR*5Tsx@V? zW@)-Ny1+5G&3hNz>wGP#WwW`xq9>IFI${!k`Lk1(Col#}7oSjE!7RlvUcIz!r@L!dQ!_o^)!ZREGxIm1#<3eEW_#G~ov= z{!Ar)PDksj|4)j_lBlh;QqZtw%0ZTHjxHD zn1Y7~Cka<5O;bB;$RUZ#(a#+`o};5#h{UWtu66b_6d&IhzaW0lXU*kD_`BkPX8S+2 z)kv9PPlbT3Yr4K13aO2S0b}D733z1weIChb8dYphTEDiAoZ)Bf0Ix$&FeLctqrUZ6 zogFzItZ+=LtC6mecXepU2mc>?iMyr2^BO5X8@4brur4;}+hrffpY!#x&JINz$%=fd zZ_47miz57p-U#s6g7q$z5R(9eag1imq52mUEg9~^;1grXZ_BShFyUtE_wVBg#QG5u$hkb6Pi^b-ur3k<&UY&@=M_ws3gb zA^rZ~^u*ooW-A-_ZQkmQ{!n7RLjr?=U?8(x15MV1=@C;gis<#k+&=$VqDbE?a#M_1 zUPNr5>RZRSNy#l3-tpbgOk<64bD@D@AdG8DR-0kyP*%6Ss4f)m-hg@pdjhD5`Q*NDbVrcK%Y8CRLIIO-KfdK`d0zxdnl29?%4%w z-8D&&BK}^DIi3O)gRy{92066iBe44nH{6x}k|XHf+c=jrlR=$^ue9^2hprV1Q31mv zrs=P2Z|7keO9tCAe4~SxrD2a&<11hPV1Ir*Lh$5ss?C4coi{eT=o|8Y-@i9mg-T)E z7vRbGnn?%cnnib47blSjd=PYAvzzA zug(PNZ2r5We_=zrALUDoMWwwYP>@j21)!fQI_$~A8_E424CZnUgB2jplJBhb>}C}OHP2!=vQ@u3-9DuVZU$X)iK*pbO{v`knuj5Ou08X zO8@nKk{s^t3+HKrGRYgYV-)l?#r0){$1cD)F3j zW1RZcVTm_W2t{KAJYY|b-)gxwDU*S|y;)9LBVB@jzuk(5mpddQ;BWIe_-E&)338n} z$P}N9SYNjIxifHL&1jX-MPxjKaP0zrp!KyFDfezu-%#Z;*8Q^ijPjufvgUIOJ%oDa`_iY|OMbz##L~Ayen>}=434z{t z&V>NM9)>O(^hv~3F}}4g02FhchV5ykNn29PtN7Ds%^;9HsMDFq@Uc0O;Gv(Nv2muD z3#)y@ravASF((c0wtcg6KQA>G^Wno(uZ|)#Qo3gA9Owd1f_qNt2H$_Dw=5vTrdKX{ z&Xg-<@|A1Hv(r4$HU|3W)FtMc3~@;@-g#W3^nkuDw4gY{Sx?)7Gk?3YV})!w)36tA zaq!hODsXy`z7>Wszl@RBL@W<`xJe+FJ~mn|1y^QI(e6v@v1i*klT0AwR^NDH>mh7r zdcAXPe&@jG3=#sGS9}q~2Y&|OP(e@LY!;AP!ZJ=Q6ZifGf+_L>#*QvJX3d?YynxeH zaHNcODK#w+KY8%(eGE$X_TRNtkmPOp4JS6RFW>~IuERnNaX?&H!I$D0UT(u%k*_DA zMsUY~aK0P?YkfC!;@t`5_cjof_bjV}Cw=EmwUs{@jLXxIUSVa-p!H!lx18fIS>bIP zF&EV_zS{Fnx$J5km?}3RjzQ`?CGjjlkUZJmZvLcE*xLNn7csc_Tpy$*?tRE|r= z#Cm@+4S^TNj-g`#xPJ>H+XG^vO1*z<&{ib;aB@fADa6W$b(QHNhYW>e4PcOj6@mH+ zpiHr^gp`67t;!kd7QTyD{g0rk$$>`#bQJq5K5xFju;?&yV(o?;}8xw5UeO8rz)C|98)2tdU6r_Hw5;9{#+mW81 zFAj>iV`B`zO5EaW-1p0=eeW`g*e>d%`Ox{wc%;AXFHOhvR-8bQ3jIOqXPNVZn%Y$`4MUIPKaV`&eD;RSKqdv!l~PZ*GGR(X&(>S?KLY#q&&}3?#d&y^1Z*pAH;x3TPiWFb$GOLBz7>21eTU0d5F=cUe z&;G53N=7W}cc`Ih58jJ*3f1hkQ~vjLwT5Q8VSTUk7V7QgL&7R~Pg}xt?S~hS0aS;3%|JuXy}Mu8 ze#33T%`9{So{k;L%@Hky4i)N{6B2x+X2tRErkAUbJ5YB=*VHi?=O;%A&WJu>BqU-6 z{i(qsO&WVjcS6_r<|P_-97g{PI#fJ5mqo zfj`rmCI8-%EGXbD$Ve_XxFq&ka4jP{&dMoNvw%-WfL-oxIsOOUJfBqjD#7u?uFfMR zZ;@1_hESp~g+_^pIK0{ULrr0Gq#?fZhh|Us$9%&o3FLiW{J;nP6EZ>fGec`;%9I z@InYw+2bRCRWStLh%LURFrNyUL9a97t0r~l1^!B44?{#XVJ>TC5)4O3RPft| zhfQYn>HcKz)4>mdWNt(66!E>NI}kPs1!6XZ>GXFgM10WYSG8Ijy+eo5tGt=ZP#xrN6yr%%}3`0 zu5Lh>g7|fUATWkJa8S~wp)RsnO-&tTdRyp! z{aiT>P<3M_eqw74iiA|UeJyO8WdVHi6x>Xms;u}0_qAit?JIHC-PE>@Qo;VtLlK2 z70{;i8CZvctkA2*{otl^7w(~T?3W*B3?+~nx4+8=d*sNMD7FlljN>iPH|O}O2b()L zkC3MC6lqJrN6Z~fx4D%ILsb*`Tu(1tgPQi$dCO8e;~I9RuUQsN=(b=#Rk$egA24Y% z<0@4mG=hHn@t>}Fm|J9VPShS2Wc`c6K6{4`$mR}nJ&#+o8NSFK&j&0HF~wb0+6v0g zBS`~wUx~^u#$?5QCrG7#xO-i48x{1R7(X#+fmQ5+gC%$Z)uNq7P24YVpqYN|QU&Zr3|pbp*S zw|V9t@F~i(_0q2+UiN|ZuYV~PYRMKWYmm##!&F2~Tyt5{b@FZY9TENn9TjtKLk$}n zVkMXr+`-aC+}!)`4=VvSvKj3HR+|ozsBr2?Sy@$V#hlPg2Kx9&R`YyCUHmA0O)^w( zQ|aEqM3=nbWofKfgZ1$+v!~0b`g>qd8CQ9}!l`URdfl$18(XN?KI)Ow`Edo|Hr`g` zEmq@d7S^wyD4Pfpue>dnrE%0wBuV>jn(bK}V?8fs#Ch~z8oRc>h6#iVrt{_Q{@oP( z2?(7z1gCbC1kv^gI>M=g-gsfg6r^mLr{vcOAU0&pClNgaNjkG`2%-1JiG$Z*t679O ztAv7`k&nQsTuVXt9bL#2oLo@`7IzWeg10Dw4cg$R%7Qf8a5~}MCoEeo6>rbHMIn)$soTCpYtX5V@J@1xz9#BRCW zQngwFT{X^t`-UkL3a?mXQ(%g7e|@CaS*&K$Es2QAn+J6Wjd@K*oVKgq z?4;{nQ8nsuyR}V^auxVT2mEq(3;?&DLS6#9fax8wiRxj&t><6>j(V6@4^Ak(v?QPo zDNK(~LUq&xSk)H$kk2??WY@OB%OI^(Z$qJhG+xbdd^f>px8Ik@d`X<}5d)5O%;uNC z0!FAM2!dtDfFhd%gUwyQrmas&M*e=w zL7<(AHU{pgr@LakmqF*%ph8mAHDe(kANzzr;1xZ=hbEVe&^77*T7l)m)Xuc9wbisJ zmS@(*6q6`!lt683L`nD{V#8QEgrhtZW%LuQ~2sZm2j5a0wE-cdI>0lM3ab8?MQOna-K~iSwplkA3l4IZ_PD(9>FtH zIqo-J4W_(#0B}0C@k8i1;jk;NVuT}|;uHMqs*p+WGkFmD@wvKIPXx{z--!OW-Xw`& znOywR)?)Px4FuMN$)c1KPxOHTGt)UivIdQH$PLMDqP#G+0IeEIz8?9vJ8)At;^x6^ z4imn>X71(x+MY_Ot@(a`c`#mRi1!;DUGS|z2 zi6t)%Rw(Lh)rJGUoxX&jQ5zK2Z(oJYFkj#2FBaJZwu7P(vOWh@hM1W&ckBg8)o!{v zs;Yc+`-so5Qg(W7Hg_e*%^*_%yByh2H3$7QIMJ-}HJ%M8VIO@V|6Mn#ao0t4aTxD0 zFVd6Iskt$^xVf=_gcAiBx8t1G|L=ci&`*wrBBYSkq}bu46QD8{);T0*+0R+lS@!4D z6mk*582dw2j61DC$Ah_ufq(>gd-!@a_en8n^J|7n7M-)nN2L;Gi7LNLnEYrNq=&)o zBAeW)3#|dM)TY@VKBnl21LgT}FODMi&kuFk<5em5+4ZSeKYK!V8|5czq0xz4O)rR5 z(q%<-cQZS+ING=MefYF>{*`mhr6d&77w>rn6=i5eW-x|V8HHDCH>R7AbL*AO+7doi zl4|XwuRafGjKgQ*qz2$5@^W<1H)b9c0w&oBWpTw2S>?2=+I9@N?~R6wxD|y)Gr7WD zvFvO4YoZ^8Ev;=G9ocJZ#P&L%)Qdhmw*$I!@+qv`XhEKoHF?wRG3*gC0GuH1-=yF+ zD0`B4JX9X>X~B6XL+z+Z!7wv>-69mTtMzhu?Ws)0=su4JAbiQyqd|;8_weliwsWDE z;*J^LIHZeTa*=x1Ghc$84H3dlUTDW{S|Fr!T06Q^wWovyYsI^jj^~#k-pe*r>VZ6o z6HM&@d`BEshaNr>0aPm;56K z57PeW;w*oph2gWsR4a+*ep(IikqOS_96xQJ@Xtbf_@^^-aX-@Tq0KgB?&xNitxVV% z80Z+{RnhP$B{}uBm!Q+)^GcFxN^`j=kM9u+lEw#Dt^8RN#!&}QXDAZQhp?@#S$|Ma zTpzfitt@uDT+s0*CU^ItpoDy1Hh-HWF_PZ(-At*Kr7~pJhREA3EC4j@VlpHKxY8-Q zbf`V?A*cHj-g6QT85dA`gmaTS@K#DpG3DrhfRsmu)Bk<9lz50dS~PDCJ9b;!PtZBh`vE?seCj8kW~ zbXp27ORAM6%^53_Ly!*A8Qk?{%CgLd30yUohu`?N1o)uR1+wGmR8e>Aj#@1Rg4LEo za($z=PgOV^^UPG{E&m$-@C@Q`uPSx=U2Xu%7%+1GT_qA>`9w03uPTkYa@Mulx~{*+nPb}3f5@|Dl`m`2{Ky>= zPod`wgt)W#jx*WL?7m&0%oXF>at^8)OdY+EYjlz71N0@XLya|-U!`q{#}--Tk-pOc z8Ja#8DU4#I^k0ris>I=ClU3$x7+r2b5n#Gt=(|6GB|LlG#c4J-V7osbZ>L|%=)(;y9p_Qe9$8vCEN%TdJ$7ko`{keMXOYx+ zZ-yWH6c4>C-{<%A zTbs`l!>Jx`89dHb=|@^VNJ{%o_GLDO_&MP8_PmE8f|7=i`vr6gAt2ROz3hb+nC_+q zzXp?*?hs7pKdrv^ZNmi2XNm3f?5!C7U7MxU3lFT{kutVg7w>?n9?KJ%zZKr6lc27TekI1V$3|{E4DVJNt9y zU9Rk38q-JQxm(^39dZjYpC?a%ug>$?0O5$S&FL@NJOZYX?qozK&aDlpRMObr*Bti~ zO7}-s>(wb0M`(z}@6E=|KTF8{*wj5^?t2EN`5(bYVAl@^SW=&KlGeCd@e7znx*-L* zw;gfliQcNc0J<;0@gjAgBkDJ*9)UMFMDas{v?pC0Aa!Q@t)5Q4^+U`VRTr&f=T`<8 zPz;!)PW)g@=8o+~!KW=$ZAmVP9_EM)LfQ{j@4uxMP7!UT->+pUw*3?o3;LxSOEJ?yE0%0Q> zK9y(9#){L{H|bkwZjMrW>Nb%%{Gb#Pv;V<^UVc>Kw#3ecfidksDSjs2aonJrx5~p+ z#7V?6qP=L_7pT{gvoc;s7BuP%>MT|d*%0{T1^-=-SP~wbq+9>f`!wX4sna+{fm`kS z^xr*sZt)PF&d%;I!`@g}?e1$gKbExr1iZ4=WN)SMq}V{@8VE0k9UCm5L3L7zWGR6g-Sy^ zM|Idf%k2^h-*G;Zr%#q&$?une!?JbYgcu= z4vKq#0zXxJpe^iJ%<<|}qa_)EXsITz zEhuxMoxW|hZ=)Pza$(;(qCf%TI`MUi{VTV`kOwdw)n4qUUi1kwo*lg#?Ts)Q>K6rm?H|3~i3blk{y%S#8{H?&F;EGr)b&00No~=wKI{7_R1W z{OA3EgrUg7+CLfA>*qIdgauJI@>eaT-d9A)vSe}vA~Pb_K1He%)X$$o4_*uXVPAY1u1QH&u_5*VV=#gJ3k#(CT%J@(^82bS z>%+^2K27TKN9I(;L0Zn{S;ep?))XMIzYqSxPC=}F)KTJev05)!nSx?#D-sM$*iO94mc%l>*ckj<6l zQ+XieISDOa)%0_KmM@Qa_&iPFj2lx=x@lgG$k65$J4JGj$X@(Zb+-@j>1_&Xsz*X$U(HtXNtIUibyXAppBeF z_LjrS1_x9AV4Y|$(4}!E3$@cc=r-@uc6qqW`r5RgiqbABFUN_@!odP@C{1Vl{gR4eqL^wO`_;sXAiF7~`G zqJS!dbzjOuGPxFSW8C#|=A7Ro^my15Xz?~Vyts-i@T?yvi-RRAdpyLU`bmokV0DKl z7s2=gTq`EA61`3WdxRm1!#x<1T^IyL^VIm*F$=s_AX-Zp9a*zvDVr2lcYIEK`GF*)jZpmyr+Gw<~an1{Fy=@K4_S`)?UM0bI) z4cBPGh4>)RE9KhWTD;=b(!)?etz+@_BXCnwT=aJLl#iSyG_YG}|M>5cTAW;I$d^8u z$tS;lRL_imPlIA`Mw|wu<}I`|m9}YE>~`9wes1-tSGy-FZEq}3dAyBR`G%Wi>qa?x z!adzH-bzDSUV*1ZnGaSuRSC%1Yw^r{d?s7!t@<=^~KB03B>hlr~H?= z;R~(Ih!7SSs|$EQN)lMZ(kH4yI30n9nlnDZi}MJ9Z2684e3gAX^LCp138E?|@YeG2 z5m(cr(I7C+>mmg|1(fAF-#x@dMcoi$mzA)_Nt;O#0lvi>w_u9`U@F@-FRxix)?R00 zUFF0WQh?E{BeU9Pl>QFeVx&3FfieBe`g~X$IZc>oJm<9kX zT%I5wR`-nxr*-G< z>jl+%rDw{Ot@JR2UBm*{Pp)543O~4!XYm?a7kNhwxnp$k>TA7XW^BYanx@S2_cB
      !T(WH%wAhCiCafLG{W%KtH)3C@?5GcvVH%1Bh<7nzZ)86 z`o|1%EUkVrJvXN-ggyphIhGT3yuwY>fgSiXR7A&= z3&J0v{CAXt(%deiW*HM`sD{!! z%38CUzRE|+-Tuh*K7iJUp&Wkjb9dW*|FWStVt)3hsFOcm``h!>e-sXFYie?*R=>04 z=~XQn5=`TFet$E5Su;2O*}+}}HvVLCvn$>>*ZGg`$aTVfimO9#vrp`0_qcY4IiBmb zXY+5L_mMDbKM{Nc>x!{Pl_|sd_7{vTlc$Jp=Vv{Pn1PAm;AXDKT5;2kPN>%5%R&b> z=QBJyfXkpnf>k9cX}n52qqQr--9lh^ub(Y-rOKER~5AJ%I3Q7_lP+bL1sDs{iG>i=O$_9tsG<|A z%}XnlE6>r33f<}O#TB7~iY?{kr@uk{<=4??14$1I(XE2BhFlZddMt&`~ zk8`nheQZm;^4B)})2n#d!KV^$UDdj#4(xPLnZ7%m^;*+7SGf5dv|o zB)Y$YD`EksPBSgn=Yz!^&ioo``WkvqoAS)t0%yAWZ%H4N#|Rgp$X%Y06xk zz)SU`&j-zt?gr=@pGdYAr625d&r_$hJjzY$e>Z-Fqk>4$kLXv--o+}JvQdqwVlf>Uhu?Pwyx#~5#@iK4I@LnHg&4EJK`q<$%-L5WTO|!lu?py zH|xPZy&s;2tBQSp)gFd$6}9L!uby!D5xG6Gpjf66C@NknD3F&_x0Fi!=$g>`TnVpITxXD$RNAEL z+TMBo_}3Z0>Yb7>cj!Obep-@$U5%=kCt8%E;KWLN-i#b((+0#{7xmm&Sw zKkQL%j8v-519xRvQhRLAW7fL2A};S;&V}Da5|dl&NyQ6;jsjEi^U@%;7n1inyHSnP zwV-?en{g=6sSSJ}=Hz>Z*0W`9Y`LY%J}6wEJ$W$$Oyuo=?!u8uQW9~&0yo728qxf!$5ix;%_2Jq1J)Zst2dCjB` zKjb5M3CAhYx|z2#4o|+}SQ5I^L?_D6Axsej&|?Y{-M|Y>!xPnzlY0wV#NsnqM459d!t*URTEhr>=YC<+Vo*k9u;;`vcDw5$S)#xo0SfMKX4N^?^1M=|C^`Z zPDzAc+VAd@*4Id=Lv7{h_S(6O&-p`G)*LM?YaSHpd*!ixp7k2^IMyfadEX1w_N=FG zs9&x=5B~{BLpP5!Zo`D}H`^=ibzJMZ`I@wXD^>``dDm~K)0)?Q3z3a!Q03hdjHa)!Yt&!kQBrXf$HO&2Sfwb)q zw}!Cdi8V=a!!K$5)1hyjgDS9J1E+_}VQ&7yEQIw;%ElU1 z>(VxTTzF-dwYFmX#79y9+0mK?RgEpvv2prX5+S?00SiioEskGRX|usO$Bax3NJF@c zn#xq31$eo-ib7ZqU)P7d?B-SMAED1)bJp+jH-YHV(_uWoAMlg%DlX{IdrN5Oh|$Cj*%!Sr2HU3|K{MZWu^houjff6tK1 zf&fnJQXsro8M12aC~6Gz#%pEcS*wGceIdS#)((*A94wygwY4lLpEI+>(-=2~3qkbNR z1Ck@>iYct5aa_d^kLb(ruU^G4;31e3FB3jP6lpNpP}reimt`t;QEe=cH0_MJ<=XO;6epZzPJKvk{4B!)LxCm<}GWO`^XswGW$u}Z275=#Adur zg+c7*y}56U$m5_rFIDk zX=Ho%j5V<2nd0y_a99CKcgpeKZ-2yMS>1wiES|uNB5A4T8BBjol@l89DCgb@6#sM7i|qgbA$5J!wFV zY!LHbT0E#mxh(}Nt75Zw)v?uj%O@4os%l)8>N9+n$$Zx>O%269HuHNiRXUoK89FL@ z{{G0OIQDnjnRtlvt`_U`=O) zfyQH*jbsl39ECUFa?|QuLr#?SzMy>^9;CGfriYsKRO3aw4(=ov#4E3^&;g z@YisDQXF9tmo!m0xIzW@BVJ>AR05+NunmetroftS)Yy)!W}?01 zFK((m-kb))uFu;Gzb~l`OfWWwV`|B^grNP~YYEl+M&qUghQww=6*X~t;QFdAu&d7A zJ_mmgpk~RXreS3u0#8U~n&)d09E65?%yil=J#O?rWA(+e(c>Gy*bgrq1vlDsE&9gU ztgdu-gS^#0x_#OP|3yQpn36dSD^2wrReK^4^OrJ@zb3&yK>z8I?V98&rlW3$MTHnKV8+nA`yj95f|+y`zb`igT%teu~v zuu)NqK+HO1kCzXac?f{#9kc|y-Wh*MruyBNRCZ1IH<*`HqDP3?4i= zzJ4h{@-gh0bxR%_{_B7wf+G~1OC^{3bj_Z5sZMr9FOD{Sz25a(JNb)V>llC!)`4q~ zv{tM48MFumpL%W)G8^7$sk5e-6KTgR`zOu2IA;e_zxuOQ21_2T8wU$a1o+dBPbfl( z*(Zmos*`x^y};-Pr=H#OHkw*GGbHmDM5xqQd^TAC(H(t6|VAd29g;5#jC zaV{=#In@5dBe|MthJ5@|$nxa%9H)l+Ml~PBB@|V}o_!SF+q!O*IW#PrU{LSBzxC!@ zgR=Tf=Fc4;zR|-$7yT`8yg}~vg$6k0Q?8F3=kLbmY6=EUiwFoo((*t@19EGw^I5zD|%C+u-R{G z)h93VSI<|dvBtP0DZ8Nj;!vJ@rgMsE(s^=&UaRrC%X&HNtnUlw5F{ZsG7Ie!Qf(+6 ze1p{44}?*Tag+4cHmGQ_GERdbNo@KOe@1j_3pG?V)_MMeB?~%|JmLHkzI_0i%VGG3$?EJLNbXIvC9F}{6cBWIQ6#H$`by~4^u#{m@zp()q&wc*KUP#K? zys#;45MODM;W@k6X%5x5SW?iwX`D9YZ)y0ovv8^=aq8|1mPffMziHler=c=bgoYyH&D9sday<fEa9ZE!)*jvVaQe zL;bXMF1IdOT|hcoA&J*|d3jk){Tk6H+Rkd)t@-@=w`JDk&@grC=&Z9qpI+kyGcyv7 z=x#`;&5B#yMbSd5*E&^=N!rL-t7k-?$PI$pa{fyNFvrg&h-Gd-asqxPnBRl``g*H! zvW&c#i&xe^3Qyw&=OF~er5MQ_2abmGt&YFN(}H7O8Q@Vou(b1sGx7_EaVm$&M|NJ$ zUz=up47Z}YID4p+!eu*cUK9+$9~F%-`>jl|X;^Krs%O93=%`m4sX`5#!kuobr%;#VR?pby1q4D1d3Q0qcQY>qU@CJAjN>@tTl$hc9NTR7Rz{Y2p#p`2 z1rFa94r}XHn`q=~wSR9JM(f$yg{u0o@rjbSE@_yEZ1{mfh8?W&z^BJefOVeu61}5>@u3US@#?INDuoHJ z5nR8V%}G8*E1Kn`_&I7xq(Q=HP%k#Kr;@p}Ms88nTK`%ue6Fsc!%roqk6zPCDX^uG z86;Dz#WomPADb(BX0;nw|AG3#mpDCaH{ksNL2fBAtmk8t4FSr z-?}gga5k#PC?Pf$112LeVyy&^y=q5DnZEtBaqYoE_g=2*mk$N^s;uz z?DY<<_SZwXt0+;x&tT%Ns>bW_8 zJ<6-5>}c&9^{QZ`Fw%K=Q*KhTAjG}s9xC(jr~4&M&Ke?)j|=c~+$P(s3J}5zae4WE zOGnZ)J6Fvx0hx10^uqdtMI~XY_T(WXcpn;V_}Ie{%kNP%`OWt{il}<>9ZYMtjVa)o zxdOSptwBgzfp+v1etuL2-mYIgytOM`HgNKJU#jLejs&TT{ z+~jAW6JlU7s=3Ih5`;X`W?tPye=I36NoX~coaO#mU*q)ZScc`xtZ1KkB+sJ2`p$Re znfS!~nGAe>i_wV&yM_lJ-7mJ4W`-di@sWTZ)weTLnqfVGHqkaV5uW1eX~j3C&547Mv2aq zd_Dh#40BQLY=vW@$BzKW*!^McGCjYMm3K|P8QDsbrv{)=QWORxy1E2C zi6_1F#qq_cuniz$FBOTx1LOI2tFFlMoJz>D#FuG#Nqq$Mw#snXC-tIg2a@B?t(LRw zlN#3C@5OhT^SwJm3#0g00(kg=_=$9M4=rh=_Z6ItnDPc>wpt&1h8dE+v5e?fa`pKP zc@MYLxDDbj+EvQR{Tth5fXgJh#gu3k+d;ETH1Q1qK2@-AOSISOg(7DcTQT9Wn|5PY z*07U8O+)wz>wg7&GH(i)zUrlmt-UuAqxQC@@Af=;~0_&tcCi22H3 zdVWbkCg~Wj20a00R}nR22yvx%lF=hvBT2)ZTBvI}{2s|2{AEVonEAgd>t7+q&6dS0 zX02(W^^g0!g4Bwa>}>~peVv0}CiesZl$7gc7d1M2OXm-ERDiE8%&SM3Y-5MI0ef5nyQ#tVbn5b#eEvmQc{st6L*I%yO5wi$!Sc`JON#_UV>mA5L?Wk z&kYDxZ74bKv$A<(bMv%9b+uhyj*H))NB)6N_G#eXPiSJK#=)OpVZH51ymS+A%@Q-V zh>0p^f{igXW&oYZ;GQt-EP`uzFpoAtbi`Nv8d}I)F7_rqJ(W^j1NGFiY{024*`K;u zaq~*c<2~8q!AZk0NTB6C**J#pQ?OH{ z{fTMhfet5|P=|0rD7ALB|&*9 z0@Is@FS~&u9O+LKY(RR*{HyFphK@wWt3MTXwE9U3*AIS}`!cU_25^_K90*VFwkk8E zpm;C2!@sT29si?9C}atUo+e8dmnx2C{kW*MKqH~^tZEwiQ_aWXLM5M! z#<+O2v6_-m>r94Ts#*cw0&I#w_lL-BKr+@LT>WxJjqUkurtRdBdpH4~58Y|0o)>_oZ?B zX0~XTces>6OC-T+Fw~hpENglAWSw4kaDq25A%$+oPjF42rA);ITU+C-*Y-y>SK{=yau}V1}eo7(Ea?N zrzt}{%yZ2NcFlH(+a4-WQQc%g_b8{?qf;+jXJVzegq_s2QHz$*QWobnPV!#!#T&R5 zVWyw6H3sD_%}4UVx&BS;;U!7;g{z}cIF7X7<0Q?2TLaL_U9918^Y&*5BPnZg-`Dg0 zhB&A-_~*~lA| z`g*~F?Er27j?c7b3FkQpXgrR|v^T%2pY&4uo&~?KmQy}N4C?8VYp6ZlX*9tBWuwgzxdm|0mBJ2UWf)E%{zzNNlbDS=lIkpa1Vcy1sBpsIxWo*LW zNB6%Yq;dCQ#OKETKHi_<3s?p{i=1v9{mht9&= z%Y=$>KRTj@YO++IB*TOH17QaxyVlNGNt*3?74;(DGYoLUmm`(nSKfuI5Gavr#?fcO z@0urLEayT-e_YuL3L=ZeVvn z>{jd+z>*mR!C7QiS&{Liamupv#TW1Jn=3=aprHbpj-JlxI!?8#m&{wqug8H-+L_~v zN1Q7**?o>Q>bz*5fFw$K#T~h7@ZvIdd1!SddyfHoO#f-_!(YV*WVGp=6&{_YgsTJy=K6h|}onwhBihgjnJx!!ocj^^eVUD`S zB?im^@*?;hns$?1tA1ghg!4he%xv?_XI>Uzq!tD_M`Dh}cMU=_+-JOw#=`&~k@3-Z zXf>2%xxBYew{ms3n(89weVAvtR0gkJHuk~mh061I@L+4fd4QFz+yU&-i%V327*Jv+ z(DcpLukPZf#>@S^)2s&1la^e5((j9QkTYRx&=4o?b+zA7bP68i835_htAoW)1A!0+ z&8NA4F0PD;b6w~MU(0Hg36^3qYFKF-o_zI84Gt*1c($x%J;`GpP2()C+rngnvI5af zO)j>SZwU`9v20%-SS@RBZ1$vIbjxd88HRJ=!}vxNFYgd7>jFX@+_jJeV>`g6L5osc zF=MiASr6WDjato;Y2L{Ec?-IUik{N<8mt!FlL;$e-$)x}Nta^pPf=8QL@SQ~z4@>C z7Wq}UFx8%O)}v{~iIG`-~lVb6EL##2(3zd6g#j+b6u*4-am+uP+m4Z6_>1-ElY;0^DyR_11lK#oG zmfgq496mOOm5xTaNVCoF03q_M_Um=ktK-76$P^~y&sx>nwq?Vqh)+;){Dc&(G1K;b zwdb?48WjmyE=wnci^aEyr(}2a%FuIGhn;M7HllQ7-4W0NiGE$kxt+Tbi3}B$|9W)P ziT2j6_pkKS^R!h4pjD=(>E%xiSlJn(P^&q)D|WFlhM4j^AQ=2?QAPl=f&UdClExQ0>v_iB?b zwk?^%i0gJ@ksV)5B?APkYg%?)EYqb-v~;J8`hlpzx6>C(H7n!3%LuDGqvG!DiHe*^ zy6e{F&&tTQnPU3+5Bji@RbCUyHu_`x{J&?0Z;`c$%^@BnpP*XJs_mv-HrtNvv!U;q zVm3QLzx67_s`Xs{-d-BI%*uP(mpc2E<4!p6=JzQhC&VAkz0McLE9Qj-;JKFcCHZvI zPE@P6?-1$BPR?VpHk>?G3&)|A_tHX3V);`aYP)C>v)-P|!Ig-u@t4$(0`NXDR?9NP zp0}mDj^c#uXxtCGflC%ra466<7KGmWhs`Kq5hjOtsl48g|^s5MKnSP zAB#A|Te1%f$3IIpKWFN?6+*{*^MUd;M%cPL&=%e%(-<7sXfK~GHfn;S^`RASdfKm} z?P6(Rm@1K$9iSRW&2#PJ(>{x@6k_QGSNFNlYXWclsP3F4qs6onUCi3P^rgO{71F!v zF-fD>H)6lWQLikJmbA3uSdU!M#;i|<%XIv$9WOyWIYxQal2|`nd%gm@^9(iDrc*w)_(p(H~U7Vcr)~lUf@_=l_-zg55I2@ zhlAJ8oR!a2x_PY%MYbwva|HJZ$quSOf7p28sc=fD1qZV&0iWK!=Z2MT|5 zdhd6cY&t*{q-jT|y1A9i(k zyNXMa%9?Yt;Pv?SOCh$E7ad=|)w6P}{g&Fen18Tn5wlc7iV+%ghqJ|v5sY#N@xOQE zf1TT?ygvO18JkWs^|kdb*_h&7KTV=*jT2cT>Ki5Vu_>e1?WZBig08PS!x_#}1<8+Z}H+yU35-aH!-M@is)SCU}!m=sWy@qA=)JWv> ze-s+OF2N+>!d|PebVUF2VJ)B257H6)CU2f5WKcC8xIUox@2!0xpqX7mU*rO~@15Tx z!>yuT%uOAdcn3?p9DdX9cO#Y(8%HgSM%S({efdnwdFj~?;}|xt_BRUl%Ih#0HlMpd z`L-JF|Ne1NfQnmGwkojyFt`$Ot7F#D%EGZjb)}{53?K`T1b2u0&mY4oO&7INqB#d# zZgOa&a8vIJ+UTf9M=FF+FT2c2POCOCPw0p&k{=Fi;x|>~_XKXI3kErEe|4 zc5$;QagxYHCnj$ZWHj zk$#_JzESIEFYmW&Z|Yvnb8uiEUZ$;bzvCLPxz1gG|8;>-!M$$1P>!)z8&$ZmdO=L-RgeY`z6(SDadTFtO~LHvSdxfisX5mxqrdTfjToKv`k$A^02m&{#{f5|gR7I2 zE|N-Cb{QcBB1FaNAl7_{!eYyrLvpO+&Tnfco%em7$-Kcg7Puddl4x`_|>N#GFj%?qU7#UtyVi*-T0O3u6oS1cye_QaGP?6v$k}6 zG^`=5?9(0cui02gZmG(tGBmw%Xguwu+6D)GaA~)6H>P$hca~7UC+|#iXvj!hH?;Bhw0`X8oc>Z%j^a!aTBad^z#3h1k@y_4_K$ z=L%_Z#8GIvnVxE(qpr5rGw6LSvaCC!vn*`q+bXj~64i2`1O@vrEzM;jFqU8WxpI;? zr_PCrJ3S5$>EfDZ#+dI+v zA$D?0xl>GaM87Lx5bakMZ&s-?Yr$gZSLOTHnceW~N|hzXc-8D=m*CwFw3OD8GRyhs zv{qFw_${X#F;AzC^SW&@hJYt75~1CtHFKOp(bird>cVz!J)=!-%tf+WHrxlM3vxavdP-QFK3d2f6!;h34ls&jaH~9J*p!cd?rOt+ejZ7vv_i{#z-}lk5oLw zzGPs@$`5t*`?F-PG=v5Bq2BQkBH->Rb_A)S64Lm9qYNp(KuWrqNJ)2>sI+vqlEN4r0|qGFNJ~rS7&VY?5KxeoW*Z^Bk(2sd z`(A&<@5XNPc)T~x*XwFg2OQRxd(G%YmV+jjXI#;9VRt zJ8i|cVn%wni{dT%%dkPY70Vefv~tR*;S(DYKpjxN7o~V z|L~?nJRfG!3vAT;*fgS7a76rk7#!sBI(wi;M2pAwkK2Wm;!6x^VS4SK{ogum7IqqB zCA}UoV<{7J?=$7UG>uZM6A>e}0&U0%k_V7p^wqPaui>(@Mpf10R%wZ8@tK+)>)Xws zPMgbMC1AK4P3ua{G4PhOu~=is!Ddfpai+(2PS@r|YL!Rt0} zyz51Ck07%b5sB$-g*hHw8-|6lpT{Qoeh(pc4QXuZc#RWX?f8rc_WUI+T&<;Y zJo!NaP?9uR)Xy9cN+pm?%RQZ6!(H1=)qo?OK0K0MAO0HlS~JS{fp@4I-V^Vj(?9_} z1Ff&+9?jNE9oE`z_8m#=zzDL9^VqI-4#P*EcDS7k29=((({wWLL*OgyPwd+>ONq&T z6N(a~TAj!cZI>1KwPijIaFosD=Gvbu+d2x=@y_$tRy}H6)~Izo0?9oUE`2eyLTx;c)16;(WYA5L(krg@9|-wuzhk5GzHBLn`x%5ZgB;^TB1tqt?acp_?(70du1VPlOA*f=uz>3q=7gf^REu*Tay#a*p zIL+}QgkoBvG(HQuBt}0D6xE6(cDPn0k61=ozW_<3;nQWnPEb}!X8J< zb&X6pKR2c0Qof9VtzA_!d1JYaR-t zynX6h@X)!l9SbVaM#iKM8Gz+<+PdM3b&pKL?R`Akh(MmBWAQs0W$WIFN?)gzcdc7G zu#G4tag4-bER4yba2pO)dzJU9w{X5?428RJC4Grsd)_0O*5hhfm$0L1v<gn`w$Xa9^9VDgFnx_0`shOZ%DA#FALH;a_L*2yig=TXgj7=0I z4Zyv?!=(<1F_voB2xRZGrQ6rt7-+^9Ygb&(pA+p^--rZh)bTsE2m3N|EK8LCnqOSH z%~O9w(X~iU4SKn1(aj%fm;kdRx&YUt4sJI1%GBrxcm17?G^3&U)gQ7ul}qtlR8SdrHB}A1_z^rhGGFoJ}iY0|F^USI^w6*^8)h+p47RUy@<$rVd++93?O>mV*SbLI)0BS+h>Tlv-t{h4Xp9E z1Dk7Uz6RxEp0lnfFCNkD}$N(7DDr$NdaE{Qhh>lo5k` zLsnAj#ZvwYnyBNRDPUnNI@&2~C6I6Ls+!3QmXKKw>mHshr5Vr2^{KC()eYIIZw=_~ z5DDBNCsH-8<=2d~&|T6iaN*|4M*lsVbG_=+-18`3zGlBfl=XN+T$g=WME%6=+`RwYCE;2SoGGWKe7 zOyVSVojZNdma1IKl8xqK=FMbAvPJ=H=ng&@5qa2)aU7Vft z3Zy>av~H;BP%f?%78biM-y|#9R$=C1kq)+0`93XSc@s?Pp+5iH%4V#_hJ!Ot%a>}U zpY*4$_Zi3d9;+PspTPh)sz2~j(8ny4<^ES?vXM38xy7J{?4GLFrSXi8rhLyaap!E@8qR>LN0Hoeg#f94`Qo}0Uu4Py)D zNyym(uNjAZToW4&Rl57u0*JbQhM9`;?Pd#o3XU086r6_jkpH!%koYBa&#QhYuHh~L z3b>=4P{U+UV53K7)tp4vY_TSR_K8DhV}Kc3a@^2UA_4Oa%jzcj0hn&puu*kjd!3${ zE(VHWK_}@d@b6)qg2x~z0-mRr}x%WqIFFHz}R9+F+I&x?DjfL`tGf&dcNE$FsX3P?)nHij}R539aI(;o#ZP4YkyuIyPmJV42{`=I3%YKsFv^m4gw_W^YN+sv|c#9q9FJx+RE$VnOw=WTwxDr?E3T z0|8FFCv0~Qv0j@6Z&cA05ye)^!0daTh!MtFY`pE${ZmUDT?+Kk+_m;xM@z)jvV(B> zX19v<$%8aeChx_?09&+f)jhy!ZT(gR^DQ?-cSKPPQ+~IRe0XxJR>$HzvQS8nVust( z2>5AB26`OBZh5L*>8LjD8acu!)?YW4`ClSJ5)e~|2?3z8RSPU^Bx}3KsK}^^mGyUV zTQWiWOug@z2~xooWu_HPEbl>?BKYX^(`kU1M5ykNG%x)LrO)xp0ZsTjRwZ6&g$>$^PBy>sD=(GL_N9cYu^(jzWM*q{ zoK&%^$@^4cxqXd(ZY!CJPXDFKjru?lM?q#WjqG%`=>547WNHe41KHc)eP3V>-m}Mcyxzt>^(En6%xk=~uGl!O5BC)$- zJxI)rQdqwv!J!xudoN`MdD}bpZC;``y7%b?pBy>)@?KkQ#jOr@6umnr;0NNLv0kEU z?*2Y|!j*hHxg#S0st9KzndO+i&$^!jklm7QLSK(+VPkNIb1aTR8-NHH4x=4I7PyAc z-m?&>Vf_$yY!XbWvr5f&H&z|_7V~+}DTna)R>-ysTCe}9J=tjytK$rEkCu&=OqMKQ z_)y7JF8#ZJpLb#D2C$p0-$!pab@jt4K3iCr0x+T_m+&82HkCLAK zB73WXwu)LCgSF$5Zpag-v@p35vqLqO zT^X{F^nT<1?WGV1Wj?nlK16HCFrU{rvU)btmANrnBE2KKW4-mJWM?Pjlh6{Tlbhtv zDE&S9q>m*98F;5Zmh3}Hpo;nN{y5FSi|ixKY8@ zj+j9C3m>9?F0zti9UZLGUf%MRTm51@ctSgx9e@mOlx*{6c-vS$4^2!Q7#EdO`U6CQ zT9XjE%cBU7*!o4C>3jbBDMf+!AKE@mEBBPT#1@i`mD0E&(w;jl#E*ET9MEny%GJ#` zT!dD|HMg88FVr8(OK^Yc`cP7qE)Ww7x;5}^E0k~&h99Q{+bv4^XfxKzswiwx$i?0- zvOP**)V-w`yxhqf&k~U8L&w>%huw1h{hX%4gnB3-l9QU++8}N6D4cLIY{pHB2CS<{ z*5^6G6z|=|iccQdul95eY*_ocmDcyb5X$SLmkmz>^QP};<$~Hel|GB$U}d(~V@Xp7 z=yfHElp#AWgCQk*lQP#C7{g4hrf4P4uzn^_uyj@D%d*n)l!~y;G(~po8?+%p_ekN! z2z;eA11D#NaLxKokP}+$lM_#VIiRI#;VD-Wn#}IVsuMWm_#Vli0?TD*`wW{*N$iC$ z9+6@Okxu29H$%AI9n}J;)p}kM*P!yEgaV%y`l8M-FiTQayC8E;Sedk>&XvhtgYV&~ zSeC@aWe!eX{CL-$wY)ztv(evZw*K$Q>ADg?*1|@jlkU@$d&hh8L_sZ8hs3Xcjt$^# z1h*7?m-}{~adR>zF40{8<=@8|;U2GB4@RY1FDZs>-qXc>kBIlN5&7Zc7V5*Vz|6hq z`n#s7>oJK0ufc#`k`9>Dq^7|9`v{%4=C6v4q};90my18VZJ7H!TRpNin?^05eo@77 z<@}+NaA$qHMzSKljOqbgdPmbhU!(O>s}qZx0gqK;hHdB@u}n7*9I?Dd=2oDmHGUGn zG~ojDLBYu0h!`d4rx`7A9#{%GxInjC=G3w&0V2kO9uN=QkJN0hP!63rI;xB1zDo9; zO6n!qNjO?md@P%UcZej{lu-8yz%+s9%aS&FEo9cbpJKbe~5lc+nD*O8$6`%G%O7vlyvCjxj3)7|gBGN&Xr$BTOx%5UWfu({*r4r@6Mq!&N8*o6}Juif*7l-7wSuvbZ z6u!m3k&Frc08{pIf!bn4%q;%~1bEuKunxS|;{CfQ@Z!?~O8bjgj&MD<23(?%0Q>+(vK!Nbx?d%JEa=!h%a#$rCI`n6kQn)y%i_{k0MXPdjQw~ zR1d6_D-T0%h^AHrDd`8xEhV+3*H~Ft*jibx4rDFPtgLcP1h+fH^N&)ic2At7WFTnT z?LuTf|5Z?8UPS9MJDD+W#EZF23HIwxd_;*DKuw9Fq0Fk3^fk%Y>h}jPUt=}ltNVIZ zUDJ_s*8g;m?w?F}{Zk`x4D|nySo_s@P|xTu(u>*#K;4j#iKs?aw@+eoji8z>rQ8gf z@?#vCU16xv%$Y)sTYMGR|%D55d8%DlX{zET-dr3m$E8Ao1 zRQ-O{=UDO~YBaPhMaenk=^BIsP3?jKV>>p6L{|S=NUW`=0-_*nWX+Y!E31QcsW$BD z6RvMJM_T{ZQr6?aN))9ba(T$bffPoFQgd&LMmL5m@7c@+&j+zLF10Q}QCZDpQ$9~K z0zps8D=k85#2o?!a*a$(o~Ps;_R!yc#KKU3C;LiFz5qfj)1WOWgb$@n_8ZJJyxiJc z4{o!>R77|nfZguvcjpCUxKOO`NB(;!MxxUfsiVkZVakD=Y9k1FpZeYgl>D>*# zn>71sl(y?tojqHb-Qk;Ov#dYTuH=18yHmu^=-^D#>}sA+`KdHEZOCBaLv(?(MFy|I zPnLK6CUxn)#qxj`-US)wiPROIw)nWS+jgX=rEQoz;(x+1{T?eL)(^dbNbQ{Nd2asE z-$JD_MM6Moq%9~Q?mfEn&l^(cNu+p)`}OtoG0KqTB-YTVD{(wMhiUUaIU5mEWv;+G2K9rYD5S|ZaDjh3`UU1wg5V>J`{AfSw9#c zuZUYd&@6O<7wLKNx5C&N)B=2NxWRG*T2*V{H|Ch-`4@M4F$%p_8m*`zxvqhlS4q+;ZmZvwv z$STRxe{%hd!^bg|B9c;dZT{%$k3-W9Nm|T26ipdlSfH64i6Dhn_c%!nmt4SdkPn9? z^-`zA9)AjDGHnD!8K?&8y@Hf6q89?G-Jv(0#hIH;7 z^RUhMUMiZ`DT(*A4>ThQ2Cl1&i3dIzn!h`u$NTi;3Eq*d%x47i@TMnvct^%jvpLdP zX#JPwQ&$1Qf@(ga=ozn$4u6n&Z$s_S9}Sbd;_My$LuRx{g3xw4Fu}0(=1&0y+gV0qcUq!>Dy&8#%WqueVYv=Y&+{j6r$gItLY%SlU74?X zgs0ag@V7EYe*K!4GR{0r-@luCSlNGJ0uvoa2&DUYQEKu)k77bw*AKMa9R=BwV0Q&M z8dAZy2)~EcNvz4u^bG)ainQIOBe5YjvV$0Wv-waWaGg}5ydikn+RSX95!#&vPkA=T zilccmY_=wkx!;e;{`yQ+IvOQ!S|2)}+Z!owjhKo|f!&H>{UlR^fk-(R`LfG2kdecL z+aN(T)uUzXTq{X{7Nj|T4^+_i;?VKA*&%viT=b{*p6FyVEPR8oPLbijMg+4PzkWHr zg>kCr;a%|6Qn0(nUGA^bEcdeLfHbXNuhxB*hxw*_*;4JkfB#wn54JsGxxvK^PojEQ zu)&)Oun7Bveyv*SbR_7$7^&Mh3~_tsf2p_8U!7C@AKvREMk(-+zECQw{;DaLZ5Bq6 zis62^-~-z4TRDlMAmt@Bs(2lno64zzV16Ooi}6sPvy+!H}JHy+qRL~(SD;S@rw+(03D-Uusg z+l@&9Vr2evyuGKp5Xaj&3Au*f)<5^Se?9!cY5KFg4IjOGD;I!V?U1ajT)P#$%P6v( zUp}_%rRuK$_l*BLKCb8Zp0+Q?#P?VHYx17Mn@1*m?)qD*aapEQdtrx_IAC1wz{E`> zNt38`WopL7Br1w|L}B^12Y3Nb(eKav%bXE?{taq#g6Ba=mE+^=;V zN5;l>R;|@U2Fd}rQej!R^Gle&a3ZHFZ>7Mj#`pxX`#khv3W>_F?!z}Q@pi}d>BWnz9oy4o7sBRPu~Mq8TF?A&Z^_W5anG8c*$9BzbvA{e&b+cS(Q z$U3Bt+Vq51=auq!nm?@{r1fNCqE;tDv4~3yG)%mH&-DiwQSQ(eB%#_#*XS z>NR=w&o+>)bN6|7X3vShg@XF<3a}N*u~nE0S~-S~?L;$ub!cm6D$Zo&Ddn7#{k}Zb zuGtYzzHVYbAXB?gmHOt)HFCxn=t|@}{);Hts@_(Y zex9F3@F+#seJ zX6f!fylwlv?Mi{xOW&LBkbEWFPQ(;Pk*ZTxq1JowfAx8np7G&Gw?h4ZQ9RMJs{Csq zo}Q@2HJOWo;a=$+(9eB$_vC-v`r3j2^)s=511i#BIHPOJK4t}lmOInMz=Nl_c7}gA z#0L{=b-K(oJ<$L;=kidoS|vlL>;)m6w9eoK{J|`3|cn!m3K}7`JbmMxd{7bxh>GQU1KT zreQ`UQ&~oyf$OA{hU7e~95=DD92*u_Lr(_og&arM6sZ?+>Et)Fi@on0f>C%oze=%X z)goA>;nR!0|LxLER7Z92m+J}aOgYFtox`d&P~@LxfM1nbgt}J5&$x(-f&As3qA$Lf zW#l9yJ`>BadP<8Qge9^*ZvSLeQSO^s&_{HhWU+3Wv6)VNssDrScLv_Y6Zrk_VaaR( z0m&Bb0MO#davNexZJsAAbS*y<>UcNb-TMQ3y{n7~{E&hVo=>sO9?XrFnR@iKPvPHR zx$_t8Yia{M(%Fi(gC{InU3hrExtE14s{>RBxYN|7mo@t6Z(fJtBvP{XkyD(PP2){k z6lPrlNR2I0Vvx68f>t06J!<01Hx0F4Owv`*Pz8uYmj(x8VfE9IdvmP~QfzepQlH6c z>bgrqX9fL(7d)@~GbD{ag)K{G&3IP&!As@3X?t0&19~FNG+jbEgJ43(m$nO8x4Vn? zbP&Bc1AP#>ca)Mr6i?Q#%rd}tEM4y%$yS;!!`20is`oBeQBvDaV7P5SiC!xIjr!?C zvAY}XQ^GtOgLr&M4UOJI&j<4Ny*8o0ZHe7pGx+5#nq*01JP>z5+nELPG)vEC9UPK~ zpQM>Ql>S2JZ)~8d@*m!j5<0mbWjZgf>^*~@f?IAr0e2dx^y5>)lM`fzbiiar`BcA+ zyQb(I3S>=8Og#&3vxj@u+|U2b3>t1^8O$sOU7nt{7U)i}P+huV7lFJ}LIYvcLq=() zM>b5vg`YB5pHDo)>mPX%h)MB1pwAizal@24&{EdLg$^5)(neJTUb>l7`5{iShyoK;SrN@SErQAF? z2$Yd#5x-xXs^qG60{>{a%NK-ttWALgE_RtHgIO(3$BO^i5N994OKB(+f;U+??MTGRbEklm(kkH>70=B_Cj1Xycri z`Y29x5v(LY)1F#~jwr87hK3LnJ_y<{;!qX^CL+xI!6hCSrqe$+d_K zC-?(Xm~g0P8w~V5l0RmM?edqPr9u#DFgH?cb(pNu1F(|lpZ<@B;9OVeh#Q^E7L9p) ztSgf;xc=Ph5AN&84csE@_SrM$ysPRV9T2^LKIau4s!M`Rog}Ezewlw`FQ3e}lEUak z!mSCF&G?vXanjsMhhd zmYuJekL1zO%Wf`b7^~4sETtoy-PZT_YQzfEhxNa_uziLDF~p>B-hFLh;nw>tZ&(9v zwxL}pBC1Fqp}WqEn*Yu?j0E?{*nE^=ioNg(cwr--?f-Y9)0@+_uHr6RQJ&Z8t_UF& zTM=9m6*Za&A?6pZ`$)kCk3Sg|V99@4x*fj69%YtB<;8Iyr*xE#7JRV+_n>2mtR5XK zVr}&dswF48-78EitKKJ~(eYTZ-=xNq+g}%v?)#_62zl)-wqJ{AQiEVdAzoI}JsguF z)5Xlz=61AaT7ic%4Z!8)Fvs>p zPmzLOK>NRdy3h$gi((GRb<$`*j6%!VozZ0^uO3Wg)}^lJ;UA+l(`6Z0vmuRl2%oKk z2|2oPNY025Tb+E~(p7w3%VBAu?vVVkJRDs9sY`5Sbwww2)zWHZGMX=zJ6UEkla;4b zO-=uLsHkVRsHlyc>UDS>h^I;?Cwo5Xrq)RIzti&AC$=?BYV*TuJO0O1tn(7gPV6{7!syQNdezDwH&Mu`djFhwWPz zwe}by7KRt8cFdUUOK-Q++W7r6{5P;J`g3@B?L(kGt8voOtEZFXAudKyJmVQM`<%z4 zrU9W7rWIrElPWsQ7-J3;?F>k~pfI(iZswwSU$+8li3<7EMP~qcgw1y4R{3ISeSj0T z43N)X4NN`5eqT4jwZ#g&NRN5ipW*9?RYN^9WQR~;uJd8XDY1&=bbWpQ{2|64(Xs`T zmDPAx*O1VeFjDh)6`z`kXufve;331&M-1$V?@{5Nezmm${U+oT?9gf~ZfWcu;LZmFaJCE9?!fH3yFHBWW4ER*w7x2T}-l@f% z7Ie(;XksI-Ev!5=RCO_wGO*6bp9iB*$}l=k^2ujXnnwSY1{35PhHX}qOThaN54sro z>>hop6tI13@WmHD=FbCpXK2VrMQN4Uu)yC>3BmIc%v~Y9xhCm zCl%eGN<$=zE~0Xjcx?}awjUMVdN05J0{c2vg9DGmmfA6$12X#Z$rBlQ)6@+J-d%}M z{REDjmxT$cwtJL@twj)~R1YE)xw`T%e+J&8nHSfu0Il2uD_U_Ma#x0a#BMVl?xjlf z;8W~`w}IHz5*vqt!*RzgQ0|_|XY+UajZz+xGF(Y`jg%v#NajC06Y@gGjf+H~QmSDW z=1>=0^fD9HS*$Q?3cn6bSwIeK`nlIx;3V?|x+dEIO97k8fl^%e-3z*Lz~ftonpeu~ z;9dk?LVDVk&`@PwrN>J&-ZHt3l<8d>&he*U;2#)Dw136wPzB>$Obn%aY&JHO_OM5) zP}LFN`?(64I;))@pbT^ayrt7m52*K=3v5S#ITZ~?o-aFUkhtrWuy!9vI@~-lO(*8EXYn^<08=#Zk-GGX=?+t$# zxVr1Cv)XD3J1cvV*W@n_!XCh}`j~DzT_uD~iBALlR08CgIhpWEEC#=rJzP?RrM-Sa z2MfZuE=#Z8ig&4v{S-i^5Juy3b94YHxukzQXi|F*Tsu;7>5XX{rX{?n;Qai!j@@|F z;~#ixiyUDc(l(;-@c6CB-gVoT=@U9GJ`u)tjzBJ@*1Yg-Pedda^E3HhOZw@N()p!5w7mgA{ zz~X93w#T%{b`^~swjIO#kARM~GL6QkRxA>xG)cv;i$qftEHH^ysw+>xc7a)U@ZqdtCElKg0b31?n~1h#Q$EV=b38U%NY{xb+wnmwMY% zG|Ao3p*t^sViho@8bw0@(t7v_#m9y0qW4|hvhvI7ZQn)2#~C-wfW$e*8SfRks04$) zJdjwj6+m`zO4(9npsJ=5G!3gGs_841H6$03y6Hk7lNK^Xq;|Ehqe!M6TQuwFM~Zl6 zl$E4|R7DrHZ3=_(AMXxKC0<7+I-&tlw9o&TW{-9jdDM;+(tZhgPsEgr`i9dyp4y@) zxN)U}!d55&)Io#hSp*zHhLRaE^(WvEd5(WUek)i+8j;cne1wv|QK%2;-Tq5e_-Cq{ z7vg|E@8zuc%gzb6%HIxJQ#F_i0W%V7Tm*&m3-*B6 z`WE7e3v)^r!niW@alt8#RhMJjdpcH9WQes}fRlE?vT?6z*ok~za%*YPEWO)@axubUX^ z>e(U0W>tq-iZg>MnPH}kkyTBpZD+nw%Z_E+zW}r?0`+%;R-O-OOK?AFQF%ClNFjvC z&*9bv4+l-!(Z(GR<;CsfG4WcE;7Y&E3k)STdQhb^Jj6nY9#~tkzPb%UelF|kRPUMS zm`|Ggf#5%3fBZB@s5{TKg!gpv=PMggvrnShAHcOk-V&>c*2eVAbe`P-4xjp*@vZ>2 z?k`4dKHhfb1%FRNu9X%tJW3VgZy{V|RjoUgS=FH#aO)#TxOSbpLaaB!|1Kdzl(4&Xj>897lEO|J#$|#+g&YIh2TvU<@3A&W}8GfG~8} z(cm{raIj7bMl~+b3uZCYdetUtbRG1^n*P<>c9r(__>UYpG&W|E8qDry9FwIIbKFOR zn=XV)-}cMWUOhR{nUuq2gKgcCyRLC|1M?wgj&IOF%Pe6R0RiWQ`?i^@C4fcMriE!1 zRDijxQxaNUpDsV5v;;)SmHunBC1rQRqZMMoX6X$wA3I?kDfGzj1|*ebM)1V`;6@`0 zzs2m~C5{?@gn+l3m#Jbl;yn^Eq(dv;lt`hEd(NULcf9EL@IT?5Yk92LD!21e^)Dy# zTJeavW|52+YRRd;eQ5k#tCgkr%CYOG8-oH__Kk&0ZhoO2dZ=|fQyzNVMdsk|y!uJa zRh_qli-EyIIH~l*q}b5T#WxhEc)8>8h=_|hh|{SJel@+{vBwDJbrxJ|GGV*%9~ZqvKdcC#A{f%8kYn|J7=a$ZpRE$bpYta5^@NCHVa#8{$gw1< z3=IbuVw-@0(>i-4l4lRs%pn6*-<<1H!#*;&lXxv*tx2X{JZ!V*wB#CL_x(JpmFNH4 zoBDGn{SS$Sm0QDk?f?KfW$%Fgsr{D&smDd^f={`UH9_tVIF13rqnbH(VsB^CfF6yc zz9tLH=iM#6IeE#}A%RRwH)p*|XQqp_t9l%jPI zfY@O$Y*qmaIQyM%s(>O+VTQE;eGy<|?(c6tt|S zg}QhUdsKt9!Thw#(bW|juFZQu*?p;N2%}0*ag}+{8AKbSl)sMyIT3qt(VAd5Pk+2$ zOA#KD7hkdBqF3wMLRS%(59ZL?(EmxT7p~Y1~`H$N=C9U zt7+an>+evs_DY0jfIVP$1NtE2)o8L7em{!e>vz!kUs;THl!dT{RTf8@?kn}@!Pg|d zD4D7^PPC)1EO81s$8I}2H_ScrX#EmiR{&db@$I&WTk+ub8DBcLwEPEmkvs6cGd|Sz z;;(jp4DZ~q86SIGkoYdOdu=X4c%VuB_1ijSQO#X9eZC*cd@aAj2yfkUCH>GbgJx~a zqb#FCFiNqSttcw`P}&ZHm1w`X^0y(=bxk#Kc{)tRAc>?+qMhX_nxV&YikxOk%6N&} zsq3Pu3xvBs{9i#-5Y2YlmC_l|^6nT1M{Z>5N=}1+ai$w*rkz0I*p_&FSt{|f2WKK_ zqpF_QP1)?pT{Qx2Aw^Q!b!jUhQ*Ve#I8}H|v~pT9S4){JB)2u7mj7^4{EwA>TjpGX z(dbaRxMY8FtXa=XiU%#A)eUr=)bU!UG~RoX_vx*rx6;@RACfr56!b6V7d6zFwz%y_ zhl6y^*bs(;RgzXw|GVjZ{|#zC^fd0yj17JprJnawl9jEe%dao7ztJ5cRatwY=uyy) zIt?GOKTGHsWxzJq@izwcu*^iYx~ohK!>lztYnbjx`icKisPJh4e)%`8S|$Yidk%!( zZF^Pk{IU)pPfb*8mjfurm^5XdsKzNJpQXX3~IRdgo4Ah%NYIMCCy-UoV>6?=O zQp%E|c|E2mx&GSm#v}U3h!07QD{Eb)OA+`v5c1;p8?Ln+^`CobeHu|De**r)YoRTs zZoG>aFi9Vh3WNs2rhvT9{@l%Z{tc++o|x-ue2@9ASzQ;p$s>{Cf_ z7>Ien7nyxeIrX59Z#ylisj`pT&|nXv<|NrH?h_<7H0Q z{E5k;b0rN+Y4)+8fFp6u*8-kZoPPG z5G~}-blE<98udPCt$D!mWJY=4GF;XPD}>Q88449dGgH)jKErAaN$HH<^uZDi2R=uf z7U0yb_5*^^fRQi+bG-O?(p24hTBqf2RFx??$q!)|5!`zYh&<^uJpzGM4Fq5$+&&Q~ zossvm$oxPZXoLYdE^2}MN5mW2%a(WR1*5w7zN;>OvnEYi3kr(fglBI$5B(!Ng?Ma= zOEYzyJitc3@4MTSynXelYV5BTCUxr3818EL2ARvD0Z6`mn1+9|=n-@OB1`fI`;{kb zNIh5SYq-?A|L|V2*ApJ8jjZ%D|3R%oM3siz<-K8CZPKZUp4or*M? z?Nfg{puaaZ7MHY^L+f)Ce1j+~zA}CubgSvsdicc~50At-cO?P^LcNXN9b8ELseDFB zYNHjKvCB(qF5c<<-jFHbb&*KlqYsI#y$o<3ZfRT+Ed!)G zEmtx{QC^9BkN$Fm!dFS&+gEy=0!L#6iugc2za)=W($Wn(gL{Dc{^M7Rp=L)VZM@sl z<`Buh0@V5@&r9N8;{9KJYOd`4paYn*H_vw~U#cn2+kL~W_fo^U5|t#B7AnF>dT|RT zF6rZL)16SeTjIHxTOOroDMPNlb-ISEx5gY%2|okvjr+!Um`YGC%p#kNml}vyWvc1| z`HJ{7Bs%mC?@z%8W2|rlpqU3`co~efb2?oro)&Z~2gO{44;s#$k9zffnXQw{nI&Aw zDZN`sypg~1E+H(GnU8$0j`<|47bOV&4yjY!#Jef;O1GJ`rbe5Y{IdYNDdgH*W)yFS z9L)wZOOGklnd*Z=ugmAxU_UPp78XytTX=QWEo#KXqa}#gdmbhBzgq8mZ2eQ!>=T~C z6KQ%eVg5~)PxzCEJlyh)0G;kv%)yS>!I2<91Vo`0TRF5GDQgl_Vy+!hy|LD4c69WC zc^ska6i8pA#_T$y!Or2zkpJ|b={*xZLSP{i8KSv!Gt5eZ)6M;Nhp$ZT`O)zExZrBA z-RP4Ov)@Pc$w!(q9FFVkACF&94$bt_`*N=iIxJ;LX5jqbq(SE{zYO#D26K7c7m{;( za{1sD32#P*oc@JA=@Q1)ftVFsQ+JbO(>1=UE@st?2_~CZD2~o7(s@aqn~S`t-?Qf@ z<~rOIq2HHzbis^*znA!Rz8tmIwV;iYsmse+bBmTiYaZ@S!Jqv+E*-g$_)d+lM>J9m zJX*+KHpXFg@KHja1QA%D>Lpw;VXG3IQ1L8;BFu?0IK&BQOYYjk6?64>#Xxe#H+b(& zJE%#u0p$~ab`ss&0*kyCaJ6vkjgsfa@VhXU_mp~-W2cPKc`iLZ1Tez1E3$1@7 zsW$XaU5*9RmKooU41W<`kRfx!dAk5h^LNQ~xzf4Gd5Ir2DK%Yn_9yeR`4WN@7+;tl zTQmM~le$cLY)Lc0ukg~yAoJr~c)pB*fp=oDGi}ceR53d1kGhQWdpvIT^xx_EXQTSb z>gUKF=ebZ}+uj64er)hSD8byVHV~aYi2M)FYM%0V`Og}-=07~$bi)~WmNGMztF|^O z^S4}`-Omz$VT$yF8tfo|j(JPxGfn#d=gg-32Xy%(&y{8P8=BY~m@Hn6etHG_IknuW ziG`xiMj5Au0Z~1;V%{jw#ge?pH*or}A{90Qk;kV?XS23ODy9*lH6VMO=i6xOGGk5b zIB($abtR3#n&Q>PcP;+D9rH-E*%-oQ+}Eg~dBmuIU$mBCHa$w$`DRRJ)*#VHaG`#3 zIS^u)gF5}$L;sWCORQ3-DVdAjjQ4Adre}t|w5rRjCY4uyfogq8I?#U4_R|K9-$?># ztr@lyw;4slAf^cN!y!y%6zqbn#%ft9PCQnkmvqfV>M~Zq9VB?j;Q<%u3qPJgN`;%f zfd-ot*rR%x!O7$^_2tO z{Gl$znWP*bqv+9r9!0D>6@>s|`zaOm+sRmZ!Tw48cSiW2Zjc z6O-GVOgwx?=T@Q^s&V13T|Tvj6c&Q|$uATq>+B9U4+eONi&D!av{lKpv?+UcqjnFg zZ&U?}JG7k2K$@qK$fI8FhJCoR#N}Y^;^6W;h|Li~eHjAVK1#b$%(4F29=s zTk`u28-iK5(q~pSY_Z43BJ@`XWlK9Y0dau+q&3FxYc@O@cPs6v-+m~s`)xR&e08P$ ztRJTVofW1a52)30bNsLgRmGcRX#XzGg0y?aqa zvgzU(KUt%i(U^(g%?R|W5zJuIR~`okXtz(Aw769B2?b6#g!%|_jLakF(*}%7BZ>`# zp%A9rY6IW74EtDPI*tz*ozjTKHT^YM+XXH}wZ}?=&VnMRo~?&Oyhbk+gg}8(pIJSc zU2@$F*48IqBrMHV|={J#JNczNt~1+8z@=KlNq10-Yl5t~7|spj0a zDb<_Is%2LV?K7Zb^|d{E%3$8MukcB_b@1nUtxa6_LQl)$C+O1r%G)N8)=_*Ppe1im zBwzTER@Vn@AKdF#%5aDW0&sYN0U|x3x1$w;`)z1t7rrh&gAP5xkpe~((gucz*mD^i z;-Zc2&%7Jn!>dc*HU9ZiV)Oqfd+%^I|2OPkt1T_6_LjD&y;^&=RlBIYrKl09O|77% z_DJp8ReP`4MD3y|F)DWK5t7yj!sofafB%l-cRbG@_n#b&cXD5@_jR4;>+B+W&Z8^9 znvX}$%Idx`xpVs`nzobZPN{!(^co>~+?jn^fvf4pGo3;R6RUcZW=k$M5Amkqj#G#Z zibrhLOV--K_7BY%9W~;rJcl2dc#x}v=aBwo$=%cg$-O!ChSCUl#zK>Ih6hy5m3`;A zrvhD46c@Se(ixw@@L*HJ)GXMfF8jDHHfUICY3Z_SB0gFD6@OYd6WHwnnfGO4Bdds*?d|*?fAqoU0I$t4_*a?<> zS&k{Lg@iwZmccyW)zP`H*)$4~SYkaCY^{C-7)RFd9J}}Dgof!lwYeV*G^H)SBHCX? zcdzDz(u8n8Sy!U3MR%9^aRZU%1uoZY-BZV+ca^$pTmpS}5UrY3hlMkbB1bmH?*EKA z$9#Df*+bb~y3#cC14OQJsjz!-*1ND2WJ%~-4W^yYo0Ooke4fr`t*$lg%eP{I8f#p_ zMxOp&nyBgFS`@u_WhzCkQ2wPBGoRqbpU!_}xF6DE7*Tw*OdLhaOaD3sW{IOHli*p_ zbaiq`%RicJy1RTt0l_ru4vPy#*X5ygAhAIH`W_2jS_2Rp%PQR>zM6xv`BjdU4PeM! zg=`y=gCbiKm(g3$Ozft)!BUlbp&6}e!tAC)I=@tLh@nl$JgC`q`*Uc^F*UkxAh0(2 zaiXD8m@uN!ZlAR*={>RIG3ps#zdXiZQ}c%At&0^R!+IatkBiXWKf+CHmc<>@l0hYn z&697Z)}}V=E#IV<+2uh*Y@ckIe8~Ltv^<5yOR&HDojWN6`3!+VKG{dIG@JKW{uK7X5_{g~qy^B3_esx`gHPGgJ{{U$sA=RpvNyR5l#Ljcl>SWXx@gv%FT{t^cfMYmxYsK93_}c|EsT&IPb3w|DeqL1=P)pc zpj4FQr>*SSZvg2pcK!!5o-ex>KT5dTEbxv+HTCSF`+KmE;ZAqLH&dUakj+w~H6u zDL+OeLSxW*7qS5^w?%d~NyrcMW=Z+YEy-N%E-l$OS^UHa_?g#&d zJ>O=y{W~RFe^$8BXlV!Zg;3TA^qs|Xxne4P&w%YB_lw&K$L}Pu5qx8VO&LQt%Z?0;( zSBpYPo63CPoJ2Fir@|$xahy3=k0)U^#lJ-3N7mH25O-7S%kowU_qIC+Z{1Cfg9T5= zuNsaN#6dAap%6GD)EnJ<#>8q6oIEIB_U*1u(RJJ8S1dQKyah~-vV80l)J#{NM&*+XaJ#!7E5&rzed^J$fGSi@$y}wh; z-vdUyAr=!>=B(+uhERhsoMxFeTgISYr4A}v3(0C&w)>=*WkeXXI6Ajm}#xHZ{p4pOnXWsbWL=YJ6y9fN^^FTRRLYZ_;YUVfz=qL9fgz~Pt>o)ks5|k z21z1-ChB>nppKuKI0bs<5IVxh+3VR_iTPvUXMIwElDR{toprkw66vT3Pl==n#a@N8 zJCd|&ub~^26-^;qMCIQ^!*%LN~y~oUG>m++~*fgT?w8- z(gslRA$JTkyCc(={5@iy&zA~{WimZ&k>h6kGLPP$6Akcg77UVicK3cJ&CrjJCnKNw^Un;e?>peb3;2!7DPMOL zojb7@e1@p$JjqJ=pg+kEwO6pJn;dv!CPbz1zNCWxWont~pu%*Ui_Wx*$e7oB(DF$& zwDIo?WjE^RifsqPiuXON{#Z{`*!Wv4^v`A)b`!29we^5$>$9A`vV%aYF{GIwzAOImne*N>b60d*0UUTBVe!01XPVwM^1^=MF_IQ&ErH%@z z42+@yh4zw~ncHSZYcv`h7iTuJ9xWVFM|^Qr2=CQnTI`Mvbv&Yg$T=1lyBq=Wc8?IE z1U+|)sX2`>`74*+seyHrf^hl1To*D-l&5VGr6TU*KP?QSzI41E?`G(B3)Wsc`ecVw zj=bjF%fCg`=JKD@!o|-94raO+5as~rw|ddutjRFd=LRb)^rB>OzgFL9cVoVX^J)5( zU%!x>R5zI&|Jq-e;%#GxMzeNfv1bFVQ{}e>)hV=6Qv*^9^wsW(#ZNoomciK`Pr#ph z@rjHjTnhadW8SYl!1`LezHhlnrfEXKSSyKOkt17lUdkeK3SSCsj3UxE_9%mVCP;SC zPJR3PdUShdSpdYszNW9r#%hP6#?l|!&&k~}?ZY8*=+mxo650sy81nSTqlf6{3lPVFV=5kcn@%TAu#xql(ITyEnmErPb z;XEZiD(ANI=Be_$6VStwUJCkij$13Qfq?4H=D)mf$#9}Q24tnyhi#kH|FdtL_Q?h- zX&f9JS1TP}YJH7*a-`Sl{4PFyeM1x-y2i0pj29R(n#wjs;NUS5SN8ojGBdAOgX7yp z<5%<{_ThaOz5`vyH|O-5ThnSsU-m-3yL(k{@q`K({%|rF=QG|M;Ik9#1;!)V$)62k z4J(Tm>2!uwt*fbbE(r0>G6HxlU}~bPV+a?>)i!VKB~~0ccN905UHdA(&nNJa4FR+I zkl!|9zhR{KmBB2hPfcAW`-ZKt|Fot=L=RvcF|LX5?+K2529bTQ8o0ZYcgw5&sZYP)ON!k}rqKWNkj=QFmV8K;5KT3#>y9kzqlXS@u%d;W zO0gfD>X#mbd_yo=uV1dD(OWtW)qAm3`Q1XKk)yc78X^}`EN>2=$4kuTUu@fHT27d~ z8lO+w;&(AiQYirC5ruRQ;2M3!_w(&nG)$f21!XEu#MZd2ay_Mno@7h(1U{ z_A069U_OY@w>A+Cvn<*T;hOU0upoDLYRTG^vW5hXRhQ&fI=7gdB~@;XY~697rWoeF zT^RbKnr?7vyqQ%!`bp3gi$m-pMKX8Ru%X17`mht6XRgzYsovK6Z`ma%rA`|1TqAZ^ZIal6_ zsR`8&DILuTme$QXo1@H^)9cbszVE)zw7WV@o?9ATv0sxBsE0y1I_YrU>+lFzNS0ru z`!T&-OSpo{_mOpT$1nznTdl;E4xr>Rx*dbqz(lFvKDnZ= z@l>^u?&JBvKJA^eUN-3dzdR#x!7oCA^a*naR#s$P1Y47A!Cio z5aags-wq(hsOglf1ww-Yjq?gY2@>-scdJCIZIt=;L@82}SXI~^b$;+Cn|^7Fhi6YT z)NrS{RFcN@8@W{96?zrW<}$#iRaneeOWx7?x5H*)$wJEE>#t(NB0RmbekU);R+`Bm zdn*}^NOqO3NcIafw?+?b0-Sp2X#rscpMQz~?%?2fFzv>y11hr2p#vF9nFm|`#-+8sxvq7UYYRBEy7otvX#=D~qzOKP;!7ex5^aD;un7(FP=awUp!vBmuXiA4T5xUQu*`XCYq|l2GRyt}6yid}H1p zhpuRis?I>pcozz`YSm6IPbY&^xC|n1?b@(= ziP0O1l9!4@&3}lHpIi7j>*X>(a#Db1w)1BtzLoil;SCZ|M zub(1%K%u_Km80U(WZ1#O?} z5-}3#Vmp(_p*JHI(l@?*S*#=(@%}<3`5k)D#kzBNP0-JEYLM>eR#65VUIiEh^n?Hbf5YH!f}v;Z?(UZ zHLkY*7_sCj9c3}=P6<7G^SH57PG|i5xLl+ezBu5Ec>P1Y%{<&R3nogaF8043#8y8- zqI?wvuJ_gP)KMqdrl=-hd%ur{MGC8^&id>|WkZACuhKsKJwcgdwV*B8SwAvw+sLl; zME5~T{6Ri9Dn85oJH%U5?{VeozJ3%!FYj(;>#!19-ezu2eY-+2w`px%Kt?Mgs zgFN^NonXp`w`R^J2%l>s?qXp zgD$1#$9n!xx}jRP^{$zAp>Ny?G>IBt8!DRhc})Fd+itx2$@+Np@cBaOyL%Y5l1i>S zN%Xl30U$9B4-M>M@Lf#Ji?YqOhkvEtZnu#HUDIa>S5;S6HDiNTf+d5G^~w!9CM$)H zf=(fl986I2!-<#8ZR+nEtDFmR=NDYc*xw~TCzToZKY3iMXAgnRYCh9`j9yX+cKf}! zXnB3Dh>`Yom9X(~;pq03&UPa*#ncsf%_bL?=nk1!!`Uj@pVp1fs^5}J4t(%p=%u)| zVk7$?2}R3|=OiTG9^6d)c;g44`nhLdYSLf<@eRJPoY1}2wigW)RezV3RvRo=3h32$ zf?9f#+4|Zi)wlssuz9WEyJO!@+earP%^r%1&_7HH;R^+aftPbpFtRVm2u#|ep^SAn zjp#V}Ew+Xq1&T)7vY?4ihrYOdOu2&t*5#TGswd2HEQgj}NzM)>+1|2cembp8e;I!YY)UcS7?XyJ><@H;b^1)TQ~r}jL)M+xeN z+zk!iNo0Ax-aF48$_L($9{8BySv1 zeO32H&jiPyl_`)dz)7>^{`8j^ArP*OrY}~8$|}W*x$e477V#UEVac^@;x>Y{HIw#~ z#lfl9KuHOUgtpvq2Es41<@vsfB_3IH1ROH4-1yA6X7^T|$GqbsbQ|k_IzTw8mM16b z-TzXh@oGwf;QDj;vLJiRPVG6FyHalDIa6%6Gko&$VYPykVeAB1s|C`8!E>QQKP6UY*U=;O@ zSU4oy=|_W}eoF3tWup*5l6*rbh;+bSeYdzjGt%teLH^DfW>)!;hi_q~0`fDYUDG@0 zRiS|^V3U?;rY;+hWU=G-mJH(E%Gf{K2^p)byw4IUejUnc1=l~1y$)nsXBs@BSkboi zTz6;QwTP&6&6>Kv7`4VsCvpn5j^2+-?lAKz3ZL-)9`Z+-Q^L^@(6-vSjL4PL+PeFQ zk-hx+Sdn16vJYm;2tg@RAlrn!+&%ipK3gG zDt&lDd}c816+gJ5f~qYA9XZhnI} z@M$@)@z8#@OWCZ=%)mTLmAq_Vlsc7HA?I>E$9~sF^-_G?a#gy|#N$COZSbDh+P%H3 zu(Y3c%;mRe?^3={2os!YDsNGhdfv10vGh@)!ON63qm4~%5wW7xXE#!g9QFvWA0y$^ zFD$idz2wh#s*Zvux7I6CrM;au*~obMhi;1ZaZ8xv$J61a5R<{W-Etx)-= z82=Ws3yK>9(!C_(tksR{TRxdxRhTwMY-qo%-v0W^g=Hj`Ft>h$Wy9rTR{GqdFTkIw zdGNk7a3FII?4l$Xr`lRyk27KtpMTkYr#zs19*vM2uUj8UQU8?Z9FZyQ`Tgrz(Af|* z8oqYcyTSqKrf#a#i)O8j>wHnXw0B_=w?-X#EsD>amZ;>N5B0n~5p|rsvs9%mXx+#5 z%yMw=-{>dDYQx@g(0i zK;aYoLOiJ?>FLV{rJy2*zk{3Sy0l&I8xZBT6()nL^=}4-s9A(mN?B8KWhU~f=*xI- zCC_LoN-BZaw8;{G;r#xah;}{3TE3ZiG~Fri zckFgoXNxrY!$vHcR)F}djUd0~{(yLUD%9a}B1URi96oTtn7@8RwqH7QTOvP_qGV5f zuz7`6=;YFO646o3DefjAoB?uir&TFg*ablvlLMFz^x{`&|07v5f{Eg5`zc)I^=6!K z;7DI8yHTC4jDu$P09W$ZVYlsjTPW>V%~x4DJCPbbJBO@d8YIMn|43Mgp*WLUt%MaP z+>8PUqs^4v7s`CiVZH}UT6{$5T=a!!v)AC!S&mH=`x#lf`PE=6HdlalS))_1vUJWG zQhz5VAOONM_j|1oHl)xOq~$MgA5m%CcgY)XwEor3lYiN`uAyYzqF6>|WOrcXje%wh zzcMLP%H}yIzhT}pnuB$+bbe5OuYTrUa(8la-+QKD+Z4VGfs5NzF4 zW;?8Uu@>qx3d+Th4`*45fS_$fE4}p1v`E6VNqSkG8q!-sKUn3|1wUJir&wd^g|qCp zNOdnD#R>MSU`7|LJ*zs&46ur(fLJttbH&2H)>~e+pXz)G8>M{^{zcFp_!Dk6QCSY4 zqxwNnV1`a8E@&X+aYG%7Xe}CX&?#EIlgF+9az)1`$pXPKCOaN@#womn6egrwDc zR_L`do-9F$9`G7Rwv|~Brqpkwi z=`gi=1$=FmfgO!G;S;7i0n7w@wzk6Qzds~hzvv%sXxYVP@xZ1xO9z=*{71cLpm@Nk z1Y#l=T#^ZO7y9H%@!;gRJL38YVPQ34{M!mO&!oGAqSm#mp&^bp_T97{j+oIxh5WnU zhi=Yu>cFKf9sfdsnU9yCT6xz066mcb6j4A79iwd?7YF6&y)-K&soZq~u>>9ypRHY! z%6kH0rygnk6X{e>3Z3j1)?$$pB!AII^L8H30LtBT8rVs<$lf4=f6gm8XI;&6E6Yv9 z)WSIgX*#Ifk{^e_f=)f~XW^`;^1#&AV)BGKGK8jiC|dzt8!J?bXq{$UeDK$Nht;-g z&R6R8OEWWFm4HY|_Z;7&h0FC@AF5r8i1Y;8lI8ZNRQ3jh35=rG_=rmH;*$sn4&Hah z+CJ#9HQa=KFmfXf`}>_Xn3fPXc&z{sZSsfm8DaKJ@kF~*)Sul#-Kjg_Yap_nf1~ts zth`|eQonM&;`ya9Dg-+1w7Lpvaa}Lj)jBO1fEDt&)CQ$SGSOIQWfjZtOXO^{y{~2a zyW&^Tl6&-hZkN44{VXL1B%JlxVT@mKc23jJ_1tX)tv;muxsH&vz80S+Jta}g3VEsm z0VZBY(LDJtrfXYXP$o$wO18d#gr|Kf7cLd`%=YI*YjCc9c`$@ktz z*lk%bO>DtBpWemuTjDvwe>GW3>HJbmbrnQG_ z3QVc|+=jYE+vnWQZbDlgB$fR2ZF7%CdHDZK2Q* zZ<$p~-<5NCxNBs3R?Q*>kMDId8<|IPk;wr|(AaXBIWMEVfBd_8e{8gh-gn24HFSQj z30xUyMe;)-u4@w{5M^rJv8B|onmA<=A{!2L5c3_TK^UmR}--tE^ zJhQoNf(WbZ6WZ}XQ(n|H7tswwB?9C)iryf;#8XGQKTfwc9N;9w9ft@t;STDN;#E7W zIvdww$&B!`ts`~ZVdX6iy}Ze^$F0f?gpMEGP3k@HXd7yRDW19)JvI^TBZ~+q2|F0` z{I-O^{i^p5SGlR^t=4MVBFK|hYzy)K{NU}+w?TE1jWQ0n-b-2iVNW_ZKu3g2BR;?D zI(SuUV66uLzN;WMf*jirsswKuDcMb}h`wn-S^+s@e7PlQaM!={H{rJC&@C^)jWM#-qyAuM zU!F`SK4*p6mH@}-MWUs9^~fM{P79^DiKtHT!XECxns2Na`qs;k4sUMLIYzMoN|Rl{ zDIX`1ZDDvS9dp9=^Y}{bNT)8vY+4xW=Jp=(v!)sgUh2hgBZtM0^IRN-h5Y?nh;oecrbJqx*g(*Sb!vz;pUnKAfR-Cwgp7Atug*eA z)u?nqnn`6uZMIP^>%YDrHrWw+%e+0eaq(1M*}t+{{N9$9g}eEmIk_es8>W%$kVczD zF!3=0mmls69qrec{p*XnYHMl#7*mwAp2g<=)HLZ$(fAuTkYq5aBlGQb8TPz3&Nfh< z_qbl*`Q;k8Z&*PQ1CI$2zn*WJc2(lq3jxi(w`=}P>To~1Nb;j;8=W@CUu!bU=;9dr z=TW5ou0uPc6kgAVNVY$g%Jgj9B$M6hTnw#Cf8yQOye>0Xti8O~IhE$?1hpu1LAUO; zKdU9hu19FK$NDU;>!M3v-k-L~=y0M@>*g!#CQ30j#PTr(<4aqi)rY%qEn}Lnc?KLmt62 znhAPqpXW{lue8@vV7l;rgPoRBPUaN#G#E&-Cf}iaMa7-5yh5{tu<&BW4TFm4XLW7D zR!OI*`-!*2ZNOuY6qD}m0FW0?!8YK2p}z%{);_pXo6C(`NB33BbEcIhYAQnaYeK=LoXhef+_8x?EA>G)9@Lj7 z(Kab@64xgu9q%p)oN60{uA}9z7i zc9!0nm8-EtP>){wb0A+V? z(-z|je7dQ5D?FYi_B!H%&JGxDuE&&_rpefg%Q`UI@;pi1W;QA{DVDMB!UkBJZ8qxJ zpZD#eA_q-Zb?Ix>Bpt$fwi#UPrh%gDAn>eMs|elR?zL&!(deou5)^RRc|Ul9`6p+N z-^q3&@gX-5Nxc0Z$=-n8hRlJ+p+7VGMSkhN#-o(5J8J&em0c{s^y2gPBR0YJM>Vm# z9RUHZ4GSv7#%)V$iDhijr5{QUs6&CTYZ|%Ax4q*3B_+!o50alv1QK_FvBOtLGZfPu zdGWI)K~xkbEZOzz(&LN*;(MLQ;|UkHGrtS>;Cb=m$6LYUjy?;cxfcD$CG<3HUtNv$ zM>{w_>3jX^U%inNZ@N*6y|^R>+{+Eqa&j%ab;kLzd_!5|ORm95 zm)nzEcj1G<4`qTFGF}!IrmuS6b(Dm3yv$|S;WLboOOVLQnVIImj*dYE^Jf4KuA#2w z(Y*W1*3=Gqyzq3;_>D(CuD3R|K1G21K8lBlPtP5@u5mSxr*d?>jIXu2FQ(VRA@5VW zU3yJkg@17=;GFbeZ^}P5;6IXpzxA}v=*M~GEUN`1w^%mH1&rax!fP+unZJ6Fb9iZv z%gUVW&Jm%+=-S&XhKY&O<$#ZNp`6%+-K~b7#%3GD=bXS!*z{_VXCHP^?V3Aq6@y<9 z(GSlyKm|iyK|xp0^E2QRNFC*kKt6#P5Te#VEan9Ffp)UbM6QZGzpTjY+ELLcED%u! z-eZ!>3m1vZ0Kac-oe~n-=!!g?e0{T*u`xBYe|Y`sc&h1&%d!Ew^mx}@n5(U|A=x+* zb2Gyv86hoB-yVDSZmg=qB7LE~&-9IxM+M^`jE67SPfz+{d+hOuQWen= z8+RM=)I7Sq8Bc{e%~E4j(R6a0i^ADvYj4gMRIibc(^*Zc_^4Wv=j8{8O$5kh0KS( zQ<5N(BY#T*uxCYlN#S?@P!0Sxkta}(_-JZJTCdn_ZE?kswlT$QRm95hR3y_V478XSy7*xwBZ!~ zJ)MHVUQckdUB$Z=2}N;2b&F`7ICw+9wRRBfZu%C%YRMFHpS83%0OmZNW;LE}X+gg$ zJGoKFGF?$m-yJF|(vxH!Xt)}guTmN+ocn3HzSeunN<1CH@i>7SmG zTaYr@1^4y2)I z`ZtKNQ)dnPVRWtg(=|Pm^Y-uK1QAy~Ekb_9eh4Qab1k3JMUJs?%{}rgk2&L&!{mG6 zt*IiQJGSn;RP8r?DH!*vElmBzDfoxpP5*x{^D*!QrH9TIqT!MgG0Rddc=iwq+;s~u z3A~@X*1;j&m!%$w{hnf?Bd-xWEg;Wo8~+Fh8aH|4(Qntt)$yB|vFxjz8=gfHRlXw2n)G19)y z#c@B#zU`Lx5J%-+uBBH|=6jA-=3!YN>J_&Sw-MZ+j-T6ga1hjd$lbA#K14zyqxcNf zEPJz?2i{)`fDxxoQ5Tm<7rFe_&3VH|3wk~K-9%EtqbsDXwkVnjbL*z!S|e>BL*Qg=MP#`bk?6c@u$4>Ln%Fa_J(Su*C zuB8W3%`yC1OFj*IUAk^h3?IhZx_%mUWy{VhdKdPG`PMt?*N)%(+x$q_ga3+=TU7`$ zkbS(%!r?s|tunaz#Q4_D7vsM*NH@pDG&gR_<&X~lwKp^Rc2`Q=7+g?|sJP zXq~2O?8BJX)fZ?!^swb1X&$(X{Oaf9StwU71l=vFYq%;vk`uHw{Wn^0$ojP_mZOJ` z2I$YpnI~+;i_#IA?;a$vsW*j};Q!H1>185v3+J1g=V}X2Lix&Z3#LKmUDZt&=Wf?d zXVwtB=^%&#MtZ3Lxu$Ey-ASn=sbAflfA(zn$) z`x!C(kTZN290hE&CkElPp}pR#AS!?8T1J0~*xtBnIXU*-AcePDA*sUV5B1CfGv zvVgFRP8y7`pBC;UuiC+Lb>CG?w*@_zU-74_{~7s)t#DD*NSlEfsmEyrzH&5X{#>vC>NSCyzrT+m#cmN>B>2t|b;at{Bl6>Gq-!+BzI|BL1*C{)2^M z{{19h$4Ei>B`x6d{h2%kUTTP!rk?xhp;h(t=hm|{<>hr3RH=@!f0lmpV_=$8p%tE5 zJghn}D9rz4O8FLsQvHF!1m57=Ki+gyF^kOGHU4pcb^N4JAp@kYYtm6ZbNp~%_3Sw z3tMK6&yekZwHI_*pLy8D?U;j(3hw>*tMWGN#?PMz%6d~s0LuZBU(dheuXNdKBSKJy z;C@=@aF(I_U^>l&jB3I^@Jvx#8=ff|rdqDDwsh~^%%MA@e0E%RMmw~m?eDtT<7V=Z zq};lRpFi&fg4zSw*Jt!t6i!I&mD%!Cs3|9C>kzo(ol^1v+ie#8)IxGKWB$LoRa~r% z24&w$MQof0&n$x7srBd#`TMk)wH2L#uwi;${MoEL)UH-Ju%9qQ&p z4wlP*A#E{{8GNykb7NwA@oe8lYu>U!alhC#uN;xSV6hy0a>5%B`RAhyFT2yXA?926 z{T1bc?2}53Uz%Zix7*&zgHB^k*=Jv`IfZH1Xn($+z><7-GYq2;rlP9wI$3Q`X}|F1 z-JwAE7(Y8CGUbM$(7=LA_&<4R5nU4Q&6u|u50jbKs=lY4xEzh@Y@l$2BOuWp1~d|%RkZaNfX?r zOmlv3o}Zqk&&Fm27ytUZ0I5?j85WwIrCE5Pc#t6tdbcLi~`1YOovpUwy#5)+4dknBx(^>_e{yAv@GnToAh z?A?ei%KG)W&h(A=^H+M)#nb+YiguZ`1({|Tl*0T#iKy+c}Y&C8@2--ejzBWGRzqIqW5&d739Mg~d7$uIT z#G%&&yz9DNL@3R-<`?v=@HiOPS`a)MOs$~zRK3a4DC#-xED!qIU3-K!{s=^F% zbXR}=G%Uke(#;EmmD`4JhX87%#@are2gBYFoZPyKGk~t$lG}7KGDc! z<~-xKV3XNuq9Ne#q|>x*N+?PBHovqSZD=}0waviG1HQkzG_jzPj^0_yziOX33Km61 zPFfgkU4t6(l?euu3-3@(`K3uS#S7W~X+`I6SRT+;|9krgmXC4xq3FGz^C=~$Y=~C= z=vIWn{jV&_uM>%hin@ZFL9N)wce|oDB87Bq)OlHkm0_#Y?cYe0tZocKErt<@v{9v- z8m}El&pRTYvbVnD0(m@I%E@>`?%q(cX)rm{oE`%et_=Y+Fd;*qc*#3@XJ>|o(PCXq zL6!SK9hO_wTObysm?caAw|Nwc$i1^*g^%p6*a@M*ZDl1eq#_^U8Oxu|@1#p##P*|j zBEAQI-wMzg|7~tL{zzv4y4}qdG8Kx@1Iq0!*vmO27f}NDp(_ZOJ>D}Tb&z3(4j~2em}aq`aP{@;G>l%f4P6uGgXT{F zqa4JrV*89gN$~#e%qRzr*uslsV{*ZOaJ3O15?*b+|7^cmYW6fsB&uY${oU+^ zZ)|qllA8Hu`ibkQWxvwp<30zlY0s56#m928_^4C(T&Y2x06l}2h#=+nxx>x-4!omJ zjwFkdaPyn65wmzBkFQn1vO;v%WB$xj<&o)+P!**odGAoEj^8nDh3^VFl&adV>WR|Q zQ6ba>bnk889T6QuI}Ip$4~&)FeK@DU1RPc6+H%{vC@sWPN(leew_0RdrE99mQoj3y z>ehm;mImM-bIeD>2Ub{!+Rkn#qG4J2Q77({)HDE|m~7Bs4?r1ESQY0EW)%CEOhGHN zU0s*u%Y}TcwbjE$CUj<9^M1vs+yHYCUtWFn1#=Lc8fIaV7}5fwFuo-mDGCW?P~hbr zW&TYJ1w?n@!0`e4u!w^x?f@SA?ey~ZNS?Y&Bag+ET`?E<)~K&?#$o<#BpuPX4G-@T z1ag>R;(+jcNaZS*_^84^P{*`~lMim*LCCs@iYUN+egly+*s-8+=6nz@hF4t9uUgz= zEt?UNSTK8(EN?o^d%C|W^J3F1>#MB3S;Zf@CR^4+gUZk4SkI}_mjVWHxzHghRV@MS zBvd)yV({4nX4MfPKo5A05;xvoH+IQfIc=Y4PQuk*?d-r&s%@{o7zRPOQf(iUnSbKy$l zC|Nf0m>g#PSj_UFAoi8QZML)&O14Og(_qQ(UkdcZWbE#5^4&FD@F2VOmz-HKW_4~; z@)4hi`Ahvkb1h+sj=fr_ud=~uQdwKM)>Bih-GAKJWnuI}fDM{+5_jiA#w&a*?eNBP#1|X{gfQ+&k#5y z7nmx@)^ZZM@GU*ccYLI0VESc(Hj8(eG=5ieaL=4Tra{TGOPL=m2R%=-=i@&#uT~&R zAdh18$YT8SAFdu`bM!0dWUcOty9WBG8-Youj_@d%l;rh zlcvcxAhpm`eFfPHYz9C}kaRyL01?oYmRqGKIWY5U_|^ke<|XdrQ7!?s=x^zOt)A=& z@*bi4(g*MbiUt(Iq#N}Z_V5|8Iu>?#XOq8_J%^4-F1#GI`?v+O@NmzMSvt4B4R8(Tf%NTTAW{gB2aF}|4X@| zzS%vLUqp>%A8*tm9J1oH!bhI|94X-}Wwzfbca%Y7$CansKFJYFUHMaOu2pDpDUs#W z7&U6orq$hf&^6Eys0g+h^F0i#?Wax%rM>30)|8Iz)C*N?Y?KJJE~<7a>8%Pm_~1bw zUn66;ntm;m3>|sFLRvQH6}ZivlX5(vizv*=`S9@V$;R>a?(P_gXPBb@#QS`eUGNr& z1`nq7{9tb>g@OHhHsQ_sH?_j9QNaObY_f4UZEZgMlBug4rT_VZzP1V~-v0I|b6N4E z;0;m^xtr=>;5HhP7BZOMXp>pJi-VcqXY)CZX-C$3nY|PF@sN*6x=z& zWd2U8&Ark@-t5jMN7`4}S3a%fjju;P!{+I&WnHH#uoTP_puKsVxU0`lhV+E*yX_7Q zd_NwTTd2CToH?5Hc#oSUYjS5@pI+sLPy(>~H=};{x~-?ib5w%CslQ@{S}@4kF5@;@_gZU8OpNT|*UhBgr3!NyIWw$xIp> zNEjQb>PHxnkW`S7-1sPGR7HA|{O9rd#ndGDNWyullzggGD~EqjK)jS$O)Q>PQ&p8a zS<{@m3Sr4fw!I%Z6q@;u3`=t<=kL8v79}d;T2+lWVl}fIlY&>Nu&Q(aQ;XlXFMG=O zue!$U*5bJ{%ja1Cx1kg#97_9|)1rtmwY#qF$NS|~huF>A@4_(4CXvp6*v0tveuR$) zQDVAFW=Xi-NT^_35m>>b8@ip$<7=jjL$yOF*>mU_&S zlmGfZlB8}#X^$K0k9V2War2y{ROyZ4rDtxSOTn^b8O8CgtxK|W)wg?ng$CiSJ04I zu^R1R-vGH6l>QS2f6KU6?YVJJl|w>q6B%(wJ>6vU5Y}J>9n`yrzWubp{?7KBZXZJ_ zZmvL!{*57b5_tnL3b&+8_y+hOxCFh|jR1Z6-jU#tIDZmHnEd!~ao#!OjIlQS3oHM6 zqJwhpPx(*a&WHA>PoLl~P_fvnOeIE-D;o|BoS~kep!7`1d`XveM9`%4Uh=3I;q?3MHazjOxPBjQf$#ndh|;O?VN?GuZ=M~rFQ;*T*}LXI`snBmV7~OD zzEe_k+~xiec}ik`o-8}Hyo#V$-C{TFJJ)qj-H^?54g0Y*zt^vje>=ANo}@QZgqHE{ zni1OA1r?u~E7Ky)Ver9$Pgmbd-%apC+SCGZ5-VXqT`s$wAG-VeVSMb_Fk>tqpyvC( zd_z>lA(9IBj*cbKusM1_C&y_z*@gR zt+uW#yVP_Z72lOJ{r=p#>fi(%m6`YrFIms*Z=6eJQM7v*XmXmmxPi(M$t`AEvbOBD z47mdXG;m>y#248^9*a9R%mm5x65PqyPr!>BccT3HT43@?7zLcK3Ez)7*A)9=C4QTj;@{0N*4>*fShm#{9P?vw%xa5TVe z$N@*YvbNFgaF`$+_Klz#Ko+Ikc;eRyggxu9a_7@c^;!zHxrt<9XpvS43K50WPf+KZ zIG~#Ru<#rFoR9H~K!6zhpA$mOEnT?=+E30RVA9?|NWr^j5W3}ksSFcu^w%1@RBq4F zhM@AtEe;fd3c+(&x-!_qS)$$gT7KWkJp$t&Nc(eF!Je$^N{p+(2vK$0g>Ltvq&z@z zY=kX*LpGm8!tHl|($A6_C7!L{Ln@?{jCXQV#lJMiZOu5ScsOiM3YrL2PS zs%QjyrRVE46#@PuPaIeCDS(|-;myv)z!@MSqW`mE?rbvaSzLToomfs;*T+1~ie5!% zU!3FhhPqjiY*tJD-D-^h2W%xus#$C_c&$3L-Zui6qCh#3K0?2rFwV9~Ec;3U7-39PDnp7DerfnOLWyu?*yGc2et7{0%hF8cHtA8qQ>fB5MBX5g{w1g16R}lf!f%PAH0K#g@APjZiTJ$@-o<1!>DzpD* z+vMkhmOAWwX%RkE*Y#GJYr2}S>l1WCuhHCEE6enV$>HlrE$%AnMiWQ?o2op73C$PQ z;mo24{!R?bs0wG`-+NZV2X;YXuma|2ni?7WL(!?NDV-~O>p2yDlT7>quN?&=Yl-NU zl4It2p8RyqxZr38CuOWl@dGkxGUJPy{2yCksUBvrnuQs<4B&h^B131sDhtaDg7aWh z2LaP#&|t8Blc%mdbNTF;hrM%q@oYF;MF#4GY04>g389`9)rGL;UaPbg?Pq{9qhM;^ z_kO?7nO9hdIAa%jOL? z>F2vi+-}T{hW;|T4HAe@l{KpF^%5YZONWcYzy}g6hyNpCQ8M}g-QJsOoTRYAd-l(d zI9=!}T8onBc^lS#k(t|`KBy{~kr5V}~LA*ijJcku!BUm}k+ z{-L#kyNwuK@j{dth&8yyuO(lb&Cn#g7a5KlWi(%A@TKg9o z7*yZh*3vdz-SLfM0wi%Vy}G))ow0ZK>4V8u*qu31H>7RCJ)JB(;x zlti_gojH(09oy6|sr{s$Wr2b|n&alcv78Oa$z(145PG*?ax+9nzp0{E-BC{0FFqzX+@$IRP(EFFn z74)WJ3^DnF?vHY>3k7N($|ABrSXCqV za8WTspV300wD?nlX~#KB&4#eP>!zy9{HHUb9yL8PB855q3flNNZG-Px zpF7uZ8-a0+x{DX8yTRLu{^kp;V?cD(mj*#l!|jAKo=lJG?uXJ-T3Sac%Z#2&eXAkJ z+VdtoOc#Pcc%$4ZUCd6+E*ftuR9G#bHF`*VLMg!oZ->dmZo}=pOa5kt+@0-il(JSG zsKsZ#RY*r1T&AK%+!5eGe~PcmV69!|We$nnJai3Skgw;^bAvY%vv$xO!}=%Ss&wOt8cp4Ee39PWGBfTXXx2l53?o7<50yg?2^j31MwR3@_l+ zmuIPt8~zt)M@}-0xCb~@LhT0_v;E^bIGS_6?v zJI*Tz0HvGsgzT{ zh=aJ7SXoWFdr7?ZykCAZ_rc{S2f0Z9ym`l40ed0Sa4uH4HkwcUBO21+8lC3GQU%CZ zia;^n`~sh9KA(7vw%yB_%7{V@?;IeC#m9>CFX>DGTcz8{q@*@@X*V{hmK{gRvWgE|N-C{to?qbQqcJ4Y}Xux#&JGH@&)c;7Jn6knqMJ;(sxXf){XF7{m$d ziMCDb;@=DOU2Sz-&*Ru1kj-}Qs2le8b*HZjxVV_srcv8^vxT9cdJ{yR;!pi+ZPEMU zFLogwro8^Qg9~dv^c$uUXM)Y_UlM^3K9wjh^iQ{ zdTt>wZ!n`mx)F^j&IK6`d4`&f8FSSlIIjMiw@@IdKKz-;>4GZmPI8!snR%mcy@6SK z#378Xsz~J}NaoRIV*?V$klU7*nBUgWm|-frz*u?Dc1hpEzsg(5HXM%CulbX+p&6$H zLf5d>M0bc6;cYRT1U^ox5`8*o#;DLC!zQ+KYi3_zJnb~@o6n#5K1uS{f7jISa#I)= zeIjlV=izmZLxpG%(~!+mJRG}WT8lO7U+SbbpYb_Xi$y0% zL`#F#LvOt61ESD#WVh0+&8&`44(tn@s_eS4@Lpxp<+iaJ7uGz?(23^r1kpn~r4cqs z=4tbim`s;)DDPV`uE7us7z=K2p|{ghhd4f8GJjCRC?LAYC;{HRP>;S*FRC9CYP?wA zxVdO(3|#Y5g*qaSNB({6t0qc87Y9aeo4DU79?7f zL4*aqsqw7vh_|v)GOSW#7&!QsXbFw#Q>8oX5L|uwn?Q+9;Jv`eABvqGMe$;2f9y#_cP6&}%KCm|Vu@PITkq{_ta^=EroRS9i+k%Kf z6)Tr-l>voMQlyILw7aJVa^ITVAmgQnuxI#Z13XK@=soUFPB2fBJeHTRo=4St8#Z`I z@nTbX8GhrHu2k<}N4>rxtwcp_bpMfE?mgQm6lVlc0qXb+SsSIJs|d}InmIZ;@D-v? zr`k4d(+0KIk+k;RU3S*g zez{J3s23IM)8)$xapXKyy6^HTF8wyw+I*r2oEU3!i+~>5AE_p+A^qYCph2c}*vhfO zzn}U=@>bg=g~3hL(;CA!ifYJH`}8BeJ0{zPFPakOA)7INt%Ly_>E~l5f3$8*Ow;P~ z)Ehlgr_|obB5j7w>LhXuN<`IyDV42tntcXzkwb2a)ZJe8gls)u$JzFY#j_#^tQqan z)rCHz1spfV%~?#NkGG{_VtXmLBJ5eKblF;BUW;*TmgAV-VVmG+5MLkgxuD1(FS1$t zkHkaGCj+bf?Z~5GrVwdSoK*l(DiqS2U&f@f$|kezTK^7kTs7 zF7I*qgqdl&)(~U84lcG`-$G{ckopdcV*U7GJu01lLxP~;8C#Ms#*CxiGd7LYJKs@p zNpaPlT#42B9d2@b3lQde1&%xH(bRuZc80*R|03aRR?d_U%S(0xC3Ly0!OOeZ${h~_ zFkgs4M%;DQF9I%#8Z0F=nL)*&Ka#>xNAPMGKs&Mvu2_NwAbsoV6r5sxZn~+)OZJ;V z4L73e%hI#I*1z0OaCPJ30rNasUpQ3;hDgV^1uDD*{@bq|xM=HC%R=OYTAJW& zQqi_|R7%VL?6dv?+a{gmz1kkr3Su+zR9sc#sj6EpYi^Epb?|I_Gc!gdGFs=kr6M#g zS1SBV09{9~QqK2^E$*%gj> z*+2bcqste4bpFF;b#?8KNiW+kt89%2QT!{#yri!blZ3jMMDGmfquz&70!el!tp0%C zDb&6%#lnU75^uJy&j_7BO>gvtJfGXB%NbDNn?eRyYNvuNwWJg!AGF+f+w{~gt9fmy zoroOW+Vy#*xB*p{u;{CKIMDsng9BZz}^u>o91D! z%Ul(BGdG0x$AS>D!yKGbRqj$X)X>q>wC=@hT-}3oLXv0?gXol0{Ij2W< z&vhcX@{5@Taqxz!+g#;5L0?-*Nado<-r7R~<8R_)XfsA5;``oO!@|K~(e7o+ny!D@ zYpfF***}_bA?yE&r+Gn1v23^Qf0L{Y+@@d0x4tK?Vit48Ijce&=Ig4KP>^nlE{bt% z)P-{$&M6w^S^*UAuws2{cm7zeqVRODn_NLJA-WKI^wNsX^@(dG@Y33JchOTKM@%|0 z^|HC}^ozCnokON-Xy0)U-;nBqU#e76-U$4#RUNjvuy|LM`Vc`dD}l6$B*nn=?J@h> zp2(oJyE3Ji$~-~WTb*4_Jy*7$n~5iik+)g5@hTL%sx&GjYruxDzv~HZBE15C11K(8 zxNVqbI}}S-@u8aPQ&LHEyMF$GE4M>%PYj#6Q~HZKR%^su0mQMnE%vq~^%&|Ofv*fN zGa1I2G5kkT6%dqK`c!BLgY!;!`-Zj8)ZEI-gta>C_BwvG+?zW!PDM3Za)J|+eO9X^ z-R~NO8x>C-sN!V}m;ZPgH)sgWmAv?E9)6ovtpDN4ro6ZiK`_Vfdf`;jPLWFNxOQ|+ zJmEDaj$LLOxVEIh=9QGLmlMQY?aNTmIE+{vL0c+nAW&GA^~{t88v6G4xz;~z-oXyF zE8hkOLKHD;c>Zd{jRHXeFOA_$yq3zBg%7Vv;NfV%#Szzoa*u?|#KYJy_eyt9cWqc_ zrP*arK>QD~oLg>|5|(cocQONMr}M`;ENSepmBtSC+$FBc_TncT)=`oM5N zZ6>$wQ~$eS8;OhNG_C_r&iCun?{u|oK&YQH5%?g9;#|SS47@%fCKyRhk|`G^>b!D05^kGf{_4{-DvYG*jxETT(vSLM!B$7`T+@o=Pc zk9s4CbvaMAzfCn9*-{O#LzGnA0h4{omT!Bvg4B)ih#kb8b>g!J$2MDzb4TUHtJ~Q3 zcrL6_-}Tx+O?(K|l#h@Y`(L8W{Mm?fu%b=d^trVmx$0xeyXXVjqixihX??mVl0Lp= zres=u@RuXA7L*#L-_z!qq{6)q*6$Z%B}n5YqX+>Qkdx`m1RQfS*BNf5UXCv=njO!N zfcgxywnWN#(h3D-iI`q9z0l6q(p>)|yr5d1Jt_()n1n$JQn{Ed9fOoF+htW(&x5y| zMpLJE_P*t|3zUZC&I)wt7?!JObQZaDuf1s7PPOEnTg|XmO`F8?YkpbkUu%TN9{RFd z>gV^}3@B6=@nI*BKlUd%vV46hwCQXhve^-N>G+fv^%hpO?adMzGhn;E=AQ});jGeU zO@X3Wq25>`+U?j=)VF!&9AvDhxux`J&0-O<|A8wlBayM`i}~ff7kQX&aJP%?;>-Y1 z5s%y8n}Nv|;a~0dn4N<6SZ$iC_F22)FmW*hOf{kCWBL`m{wwW5dxZ*18!*dUzs$`S z=A_5CwSz;P?T~_0ph-khxRShE-4cL6W-Jgs4r+Wjrp+Er)0gyR6E|yR{&8 zYWS|*7`>$oTIycB8BhtDEVIQcf@&k|K8WwfsQ#2!d)&hr0BaHT&&#=4nAwmKtT}s{84}(*k;k)<=EV!<$N*8a$LShH7Ng;cx@;qZS;75DcERBcgdTS(` zI5#i4_I-v7bhdHw)1m{Lg6Dz##uzoNIrKAUKd^JD5E-=?FM&2;?mVvE6{+E}Ci~#L z>E4G`8|%b^Fz!xenPmsQtcWMZGtSX1W{O>f}@ zDT8V@wD&J38npOyzd}l8Jwk`d++^~V= zReU_>=_6p>tg=%fB;!FgI0#`gJhu82*xO}8CoOTL1Gg@!Vf8MdWL=E5yDF@+iK*WA z*XUqsm}44f^>AMsM^52iT361+3$JC6QZuf%eED@~uoF+5Fr%l+)VWjN8YVY{J(pgb>iD`puts6z3%8wsNoPudBIQx$OWvw}+T%U}ABa7qVln7~%6XszJ+LHsSt|VEqM9`dRj7wm$ zX`Pl%u-C1NMOoU??4cfJVS+fH{KYQYXaNU0eLaIG7GL>xLwjrJtjt5^L#afvFE?sp zOL05E&3v0^X?4i&ZffBU=_==X=!gA&4xUKWyRLp+OxW(slD$kO|F8iSPIJ-OgQ+9X zbe!Ce)Jsv)G3-^+qYW?fWhF0`2m$*o3TvHn6OXsb%oFq*YI^j4`L$0qkmhq2qY{OW z1au^mHkKh-_7W4~V=uo6zb$h_7Jf;vl6pDnlczJ2<|O|qSp7eL*6F(yPd`j(6sO)$C)Odm7-R;ICjw0;r=j2EI9UD^F zLk6rh!Fdg6TAM}Y47oymhJFv?Plt*ghBmw{R&QQP`{e$X`0=mVv)B`UJ8|ImAS2@@BvUG%Lv@x(>b}U*?mxbv{GVgoxV83XC+A3K{NEV7wdrkfq zehU|};@0MCYLqL*vy|Jfm5~Fk!bTeFUvXn>LY4Qv0D0H|Xgs4N+1PomC>Qml6ScdJ z&sBAGYXGLkcgn>*a%kPlYRzQOZvRH6^)}tb8!}i~&fnbCzEpjkM{%h`_1fW1d^|05 zACDzn;B8B~fbT&~v?|4GWOu*f*OpS*yGnatx$QWj_i2H0g@iiwb%_%MxmISbfjNi|H z;eHR3l;qKf)mUT${q_Wq?l1auJL7GpFAZjEgbzQ^X!{rJy*q9UvTZm%oVk%BfEUiX zDFCLR!cLr$H;&10&NpYp-v&qlMBC58%rMMnIS5|vpEeQ{ptHG5)C z3B<4MVT`?9F~pSBu?EW&yfOKi$TYW&{S~@IyS!*M_OQ?=*=jfd!2cdTk34*@VI5nn z9R~60SxdGpQpKvTMKiIk5$I*n$fmq9eC%3ZGpo};s{N1EeWvE78ZS@m=|JD=$qCBI z)we~9yM=%3i8EM@b_59zo%~1e(|gEFsRmPSA&Z{-s6iZZI#>*WTC-mq7&>#2<$E+F z&{9@ZbXK39cebFHa31s@$tP4s^NYr!5qD<46j0e{G>3-hLG(A{v6Me1kD1RHu7F>8 zK#Si;!>I_gt@)||WHp1x0gxiusGshJ+{NV=qibkH;Q?h?CBIAN2(ncW@K746xR&h) z=+(3ZqQ6!+{qmyu82kpB$i3!N2rbmK)Eq7+~KaPGP`}ypQ=&b5-OWsesix0Rl z#9Q|HmFiDhZjkoe+BoyHb3uf^eg6<$!7$BR6QH&;8X zU&G2l)q1AYCDkQMHb>)E)G{XjSAymnyi073JV*2gKKna%de`p z#5_F-W*f>T=x=3gg)@bX>Q_<6#@j6cLEWK(6nU`afjrc#N*Vk zi%TFfvcx&KN{1)Iajx^$VZ`X5&HY`H*ct+tLP$=lBhl!GU&GwUy=K(Dr-oH1wj z_fs}J$i^q!sWxMZS`4q6H{>ru^JZ(Fs>?47EtG@P1?t6FNV z2rYED(y-9WE)WDl!O$7s=SKoIKN4nbWu>xHr!P(YI}=4!QQjM47Ab3NDk5<$A0r*{ zshBgGYG&rF$nveBsa*Lj2mU8quwtWvsSt&bIS#&-&p-h%XJfU__ZiH>x%&ys%RBmc z>Xm)!W)&M1<8_<=YMLsSrzvgDTyJYe2FZUMMj{r;F zf9$`0R~(YdossCDPIps&tL}nr+?_G0urW-43tncl0gN0^U9q0Ivhw)|R-X@7PV$Cf zI<)nF8&_`usA#BqH&!zVbveZG?6yKl2pfip48wHZ8wm952dIL>)%%&Na`>!DO^iV) zgdF%v;cNOhWN><|g}d45d5E-`B^MR8x*3t`h|verh2%TkXO-*JsODEVr&t0{Azn}g zFMCo9Tr=YED{cjb;S(jxMLz`8jr&RGvH+)OqhEGwAn7`G_8ET=!7o|dFx zK3o>_#zNEGjd{!!Qp+|k3M*yD4U2bYN*@*-kHR-QjC7(Xw*S0+_&WL;snpNJ+E7$` zE>15fA0%g*wl^wyjbP9r&k*-Yt3Zx*WZfuYY5aD(WFAM5;JPZ*dhWh@_gNg5mTA>LmZqPcVN?zN)irB1*H@mTWw5NNAFFPglC@bCG1i z%(6Szp;6iM`H977$fKc)yVC!dC!Y|UhLlu$l%#XKoanacKP~6*_RS8y$4M6z`aWuA zHU6=(XNC|mD%O!r+u_c*6wKu@Gzd4@5)uO5F&_=pL%JJHXy|%=th+lQ!G5SMP3$(g zAVx)t>;aR(9EB51M!b0?o+0~iVI=&=RqAVe)`l1h@Vz6A7E{v4j2mv4&K)l|jDP%( zr2We?{Y-bKyPp{lMS_0)?vIPSsz0{J(b*2F2rP6!YFt!!a6E+T3`B*M^x&^kaYb#< z6#mTg*hfZgUaxWtufcW-KX?Jr-=PdS9;73)C;D)t$POwMs2z$WwCzZ6$2~xEo>bE=Jhm8_LYeKiE z_X)&}vUl2(%*2l5TUD_9WZkX8js48uU%!8%Xs>LW7uG{v~_& zzhQ$O&K-E*eXi)w?SQcNMxD2^ic@LIbmm;?MG&`Fg zVJUuHc`TR@sd_%>Iic=+l;vdT^E1=nAw&r{1wd<~?c!rR?BY*}H?h5Quz>YL+Ihh$?=El%NESIT~Y%RAO!O+q3&{o&QMQ;&Ro$Zk_GT4LezwQsq5rozE9~*@xcH z6EfXXK)x?vm^XxomVPUccPCT4hzl*4{k8wplj})Eta-zeyAdqhsqrKawSTUgonGB& z0hDqKHDGhVf9X@t1X*rQpY0}xX)0GI-v_%`X#`w}g4(Sp;)$ntwYyy%x5cV%m6Z0n zvr6RHYK%6fJJC|vc2JO&pE!z6akb_qAfD%ub7$s0i?5CHZaO3Up8TaN{^41Q{wKX4 zB6o_{u`TBE@Zq%%wmZ6RR7rTD?8VV_) zg>;uXz1%%L@e)+YmYAzpzfPt!I4;A`G}hC`vNS00`fqT=4JAavg_A>A>~02#?tcr? zWajt6EfA@?hFZIsv+pQylRGyb6)2oaLy%XU!0JiBdwZ8U=kwyz%PkvKv0p(PG2a{G zkVP|6R}^g#vq7!S9-bX>zIH>mDpn3pT+irCak5co#vkU+^JMkjNq`PF8411<+{xzg z_kNpQO#apdn$#Hf+ozv|J!$3(QpaMvg@ zs7{5tU`x5W6TsK>QqQVfQ#~Z+`todc^+!iaXySh)q=!Y~`Z&72sTSeK?1szv%35v| z-a|nqmDCBgWJoh}H>FT?T=`S9p|atcm&#IJXkMsE{{WoY#n`xDScyw;{G>uRx<1SJ zQ=3&s9LulO$~QITBL^-h;zY2@nB~&g?$O6nz>@qEu=;Ir#Ibcfx3`G);`%ww2 zG1YkcLDUukxl);y%rR-y+T^@xd+xn7QD&b{mV9{h%rDk_mCsjoian#U)Ws_R<$G9s z#zzEOTB%DsJ?kGj=)&_AhX@c+-Bi`UIQq-Yz{{SoAJ8NI^Ge9vqX=KQjl?DMMzQ#S zZ69m3$N=5*;T5;g`yo>YsWQWOubx#dY`#QI<9apE^`O<5VD-vdUQY2J<#sqg{0M1g zHX3{-YVzXB7z|omyk>DrDK|`;Yu&&i+h>9fOIK0A3G@~y%R*MzHW+iWIa=HsL)rgW zmUqm|HCejS@XFfmTK=h9`Le+1m~UzS(W*(_exi`8wNKO?bD!c0a zH1hqI!B_DOpU8t=mShcBmiFrilz!;%hTS;b!MD6@{h?2AK4o4<_oxcew|%W3GZ;4! z=Azjg7a_^QN2exVY`YWo)V&3Glf_Pb8($Q%9};NL13U9iqtLr>m)p*DozAJ%1CN@r;o(>pKy>_X65+utZrV zN@1cjj$%e;oA1tM@;5$m*00e8@9yAA3G`0=;LyZSAT*ZoScP_=H%^ zBI#)S+BE-A?r1$><v!1dC$7x}<2@eKc`+ZZaU*H9|Hj z!=hzp`#N>DKqr#Qye!B{ir*j|$`cZ(lf9GJv?@?MQ}bq0=w(E}+~8|URmYe-aB`_Z zcVtzu^Vo+pqd7>ayIXhoe74^*>g&iFzX4;8q?cteS+6!yJHt50c4unjqz}NH2U$38OlZGlQqoIkWzRe3 zz>FG%Icm3UA>OVI*Hpjylo3(2y6Eh^#I;@lR{EF?VJH&1+8jnXOb^Ri}(S zp}$$vk|M$RXs9yR8tTyRjh>k{lrpXf^9dme zeXHTz!D%1=jLInq4V2s#%b_aqE;@qZxj&lcEd#HXXFF%kh4#H4EHl+}1*B*`jeA@# zabm5-O(=45zQ6H(bAhH5bsJ{(WmaVN)2ev9)Ta7<^;c~r>z`O*?6F$Q243+Cg?P^CF(9uW7ysb$h_t^&_(_vBC|=UlNoHZT7PV$A4AQpHvw@vfT&9>Z~`N!wtAb zag}@n-Qm|j`R-iT`PjFHaxb;BB&)K`Ss{MmqIS5f|G`RU`$is4kzdFNUo zYIx7-Kn?qTrZ<#cg&KcxYM6Lxmb5|I&t|?l>GCIiR!RLn?a-sie0%L;jt`nVS~tjB z3oC*sULO-m3+Yl?fRUodb%z3tFZ>lkW1MQ$DwnJwH(i4gD+51|F4~vhIIh*oll-%Q zi@SLU1O;6PpYUqyi{~R^O3GfiDD>76ME~Z`VQJICx-!7v_b+kbBJQ) zUI-}HwD8Lyj!KLs;`*dtU!-DpD5qRzp5tjlyu8CzK~ZX~JNViq*!w#?DujIwWPce8e_j*d2c|~%AWe07stji)kk9X0<={xi{hTX)C`Z6n*~-+6@65ar9K^T z8er%7jNRNCVxHq9t$rW=N)aL#l2_7Jf;@od4@teTkkzC;NYJ>m-lSUNsvimY0kyxd zorAGqmu#^MgRZx>It#?-`0_;#S9i`Eg&QKBbBB9nf4SAto<3r2+~YbpTY39J9KhPv z*41ptUZe(a-F{aQu^kkS<;2LwY&JW8V<}8?$rMG^%6bbxU0fPVxSJZ+J~Vhd z-l{g%u(h|}PKp2^IRq1|(6EAk5&^iO&y1F8EoxHR9Or5LJ;B2BvueXY&zi|sd4JF#Y(UpwOz-+a+{w+i{pG8(U< z`Lv{<*izTuiM=7X+BGMFu8s7W&eWLVD7zX}*0M~l+q2DoAC-^UCly#S2c}RU$MM_L<*}`zSIVbXj@6GT%i1?r$pzd0xno?InD30E8x;7b zR84b_kc0~Ia9Gha=rm4k7BW4n4XxKCJuo5Dq+@M13FsU#tk+S>I7S>D@09;l;BBq= z<8s*pUfQRGNY59?tBWj={|~J8V0O#+NAJDXfIIigLo8a);BgoEGPukB8fut(3zlHY zK{3l6EHebC-iED-(-O0~+8T`IRRt#)-b))1I z=G;QrybfgGPtYIobxit|FY zDo|Bk&#-xkvtk9ZV%D^i79Gvl>e3C7m#%@jEl|&$I-E(-H7wrI)HevCD-mG$Z0EiN zR^ude6;>$K@S$mm z0A*>ol#rxI<6pa$SSY$y!zW`}`@8e9yYr^=H+ny#)151OLG9|N8wo$-kNy$LjFkArsH!^lvL#no$N&)&?xaI+qHVIUp1|KS zT9|5@AU7fEzNjtx%X0wVp?B~3xcE1hlZZfOaB8uNQJ z@Ig1O!`T(Cz=v}^$ygJ&bzaf{G^ZD#DeD%tx=L%i5OLd=cU=M0&l0&!JaNL79@!$* z9&E3dqt?+N!%B<`Y-0NEg5CAzAtsmiL%c+qbJ@RwXf;2^J;h1({XM+20&erjx3Ap6 z=58OzMdKNtZ=LgFUZxuh%!W+sC4kRU6SQrNuN(>-#~fxnF)i;Ade28rAN#tZy}lj! zM_u14q}9;_6_5%q6UbCC|LEhXiee7GrF2x?6*;bE7*480j$SeA&*#9OJ7GNQT&EZD zAJ#y%Sb%C~gyTT`0C&X|*#MpUXXcaNceCThDqRe(9@V0>F9fzIY0Kk!R2%0@%R{DZ z$zWuac-8()A{htuEKEE!^aoJVmsRjgggNq*M)9=aQdb6wjnrp6oH9@=cBm0HP{7tN z(G)o#^N6@%-_7<92S7}M>v%Ocn03|ON3gSB2>bLjY6S5;(kVsmS+=&wgyTt*R^88^ zu}gPz;UM6B7b@+m!5gU39i3BC*nsg3LxCdMyF2}r+$fQ%?EJ*C49R{eYDgI{G~8o} zw2Nil_?9*Fb8WL5Bl2`$}omcoCS-iG0&Sk}Mk`Ymyq%XR{^)b|> zLuwCDAgWox@{y78&l}EePRU;%gg}UM`H!(ap-8jA1agf9Z2%lonmvC?TL2R(`NLh_65N0CYH zW!+gH=M(5J#=Iqa;nEKMue8noBY}p9Hq#pynhXjX3!fQP^2ni3KsJ8vTDr#Qu*@N? zI4Z1*{dCYb%ch1FpP3NylGa%*Q7J}wJ}Zxf!MvIyUpKzl)XBC zr%2ZaH*iGyt!_X(1F>rl+4jMiY=!3%%hfi-8YM}7D(B}v85wCh z$_59R6BNf>)^~3|GKrQ#i^8V#;p!1@%Ch+kUabb<>9J0aHIC>ynlA-}yE-KQ9_D-)BMTx#M2~UO&btxpK!UbheKUFOTpnJejzmw5fEAUzz{DoZB z#@Er5rDZEUj=R-&0~Vr{f^qhkkQ{W-p~41+DGZ24CmByyNvYC06BVY9xI36?M~W6> z8ZT;7yeOA1-?5c2M$b<-(v8~12O!b2llXqhbC*RknhuV8EQaQ985B$yr1=fYAFz6e z7hdqLFDQnbfMn+Lq)zl$1|~X{LUbui70LAEavdtvCJcNb&4+ZptgzqlM23b2Q+ZI( zMIb()5-(;w%{F99-^C7T>yA7g|1gO&!m)EsdW7i$M z{+nqQH}{R$0Pa}hcsrQbZ3*l(_7Z(Kp9xHlH)Ic~%b@;mT(b(AXMbQ-nkyiE^P}^7 z)}oLjLo*~)s-}L@^B>NipPgc*ll=*;DuTct4Z!aaM^qoG@Ic{uxTxqEKq(McEdv!@ z1s=*Y1mkZ^u^gF2yEa@c*(XA+zV2r4W{|ofDr5TfEt1wQ(S7PqzLns|4`I?J1eJNw zkdYf>e4s{GPCt`^l`TaTRgOJoWTUROY3BS;2ZEV(JFjdfYyA5IZrIeEZO2o;qz%qx+Z|!Mnj~@}hMHEbDi>zjW<)8{6RuFqAUQP+OCO@Mun&M)K}Q zyMe2D)Nwx66GGLd*h>^c5{`ek4?=uo810FCl+%LqTTv7V5Fx67Xs%%pumLs_oDrU~{Y{sYE zRguyknhsFvq_v0~&8Qqq@kZ zJ)gITuv%M+V64~zSm)8d+?xeH{iU#{LS9@F81z)>p+*?bK3fKSs1D9QTBN2!mZcH9 z5C)TiX;;|d!+P3kqLDWU5aQrm&evh45g}_?=dNciwT%oPD;?(f+u9LHbJa^4CoB!p z>_v&jU^6j;#|geyMD~?G`(N{DflW0NI5XZIA$`mC_Qt{N#pq~^iyUhGJ6)=c^v>WL!s!ea@Y-t;{xg)5j;eSSt2UlgV@FZ2V)Vz{) zl@&hJaLQdIXRs|a%Dvm$pRq{kQ0lL~SQbr?swlepr(^ov!F02lOc>}!3%~!i9iLOa z1arn)+E+p)hx4Cd7otKQui~YT2q27QFk_HbRpU~y#`McBKQ=D@of0MRZ5)%k2PoBM$m_n|A?J90W5 z@@bcsjbhykHydC|l5Qf82|S{1wB_+Bl{b67+`DZM_0u+!JQF_IM{{~qt{E<Q*%L~Ao+maGxSHgS?c47$4eXAt@(E`3p%4}OF#9Y6QWWv0F&~`1 z_wI?SQ;#YwQ3CKYUuFld4ZtJ2=x}~H8*GQXp8whiVLRs&D)kE>s8jRCCJv#tmRM`E zce7H_6UC)gyYH<3jB(cuHfpvc8Q|@)l^03)01P#oErf#t&jl!aYlcIf;c|h_h$yn1 znx>aC#v|k8WIUf-Lx8<8N!YZanc4XjDGRsBaSZ1J;G$PGrh)SjwB9pJ!kHZ7E@U=M z6#DZw8v!3Urrt&AM++mz%%$SYJ(xgYR*~dtMZ@JqaUamAJy%k0z}IBNnKs60{i?}A z^NyTR0&52rDDZjSEDE}W`9A*u=iaR2*t_tRcEdgYcijFx-pp36z(PiB zTEL1=`Itsp`D#+fRrw;KyZ6oJZsTyxOb>IAk ziESKu_P?{3EY~mB6w(!i+m&iv=3A(^U)*-wu|Z=29(|!GQ5j#@lf5&PaQCJ!gdFJJ zVRX|PfRYa6I-`>`))S^nxt$^UW9|d1=OWkd7biy>iJJC)0|h7hT#3GF@5Ge4tAVVlJ7C2c;0(8`nGgLHS)qIqA2J?%JdVw$#`)2 zx_-n0Saqm7`v2H^&v!V#KWta3h~7Ji-bM5t@zsOqWiUb1(d%HCM6{^U6E%7r6TK5X z2%`5gBZxjjFk#H^xu17?AA7%;Kfrw-?zPruUDtUQ(yX85z_y;ME`sDUjZkjg>*9cn`#uq{_QuKq(=)m*{$X6 z=}B@5UZysAA+verX}MVyMcGcxHOAu+Em)tSnIX09^tyfZRO8HTfw5Ac3054R&0D-; z9&arcyB$2_f1?7EiXHJ;`I8e<Dk=cw9JDvq$nujZpyeS`=5WHSnZS~>mpr&cOQJ9|>x4);8=i5VO#<773 zATQG~0OXdKdRU;y!9vz9C#?4%P|KFY>_%6(_XuD%YMfB=7wg2wp)2zNq_9izB zE{Dlr!js?o905;^oS4(Rmt$uBmyt3&)oq#z4U7SIT!I_;zVR5_ z6J5Dac-B0F=u(4kldgNe!t#VpzOODX3KUJejz&EkwApaGqS;VqOYl1uZHkeX1ZVk9 z(QV6de{85@9P3W9p>WNjDHnhI?V{u(Fn8wa5^4|AH9dIgm0yJAEe&xBzEt8)dxPub z8OAdB>el+=NR-UTWcXKRvS@^iE=_F(1%^wj#>9Lx(mQfG0cW6<7{{yA&va{+*dN5c zMDK{riDX-RLM9?)aVw4}Ff%Uqd+&o1Y)nx#6p5y&3j{|+$m1ZQ8!4skgr|&fZvcI- z%HE93ECpGwPjNJRDz2|NeW-Qj6H2&wT4_*isq&20_4}02Bj!=Ip!Lzc_By^ZwJhN# zd1dV>qCNJut1BcDg}?ZnK4^MLNzJAqH#8k6@22~D*C&wMxwLq91(M|pzh4qGsRUFm zLbS;8ono>$YN}Yq9-BFmoC(EeTt$@@7jIPk$qRy<8F*9U98GQuNBZvL#L)iv~+fVb`S%BbYZrSgZEnx_P+JsPh~9)Fuh>EPs?f*Yj!s7NtME*9B=LiOGGRx zFas73!`Mwyhs8P-8OSwfER1psL2HYNjr*Gb_>R^s)m?&X!BbWH3kwZy1(Z$kSAz;2 zB15H3v*aCjuO1oxiC!z=Czd}@`yt14ymmf1W%sDg87(a65|2jDknGiq^Jbjh_ZF>f zsERj_d|9^T@~%N~(5&>OqhnL59U_8%ydH+6&s?b7x5yI9u#@qRUEn{Jn@iFVzl;c^ zKPnnM;Y0pB@i9WxMgSWf^Pl^(mu*mcA)PlUk}fIR5+T1b0TAuDpscxDopVl#kPbls z{D09=yq-69gvrYSVr)thUL9-lAI64*QX3{wc~FI=9J=1?^QLqKnjOtx>Lz0S=AJI> zEZDtcp-g#AzhXT%w|Qw=Q+P(o@Iyx-Kp4Gwxq8S#QG}LL(!Y5I6RO9OpGF1LcrqGe z;R&M7xL6l-E`;1L;L|}5Uk8_BN!2EGz-YK58@ANai~N{oU;+CmDlSY=!^_NyO4V#K{84>GIs6pkx4Pxk>jH%O6ST}F_6wdhHzu#X zY{Z;HUJnIiOSp{&QdE)G9jnNdsB!+J_MrBf5mq9==zUAG(~|MJ7-wR1cKS4AO&0rtbUC?x%u>fX%S5{+#p_ z8xZ)`Pc-zevV$q7J)-KU_lsO~H8Q^D$50USY;I+irP4MLdGTIxRr3-JrC3 zu4YvDe6C7Zerm&LH%wE)ma+z=R8a7$ z{Xal$e??0K1;M2`spe-A!y*z^{U};LLo(!AKW+lbBF1QlX}R=K#nnAPhHZ0_As6)v>@*jQqItQxd$ z>sr@=2wL?NMWh^G8Rt8;gx7V(cfR2}vB^@(ni3h@{`7Ur=RpJ)fEx&4r-E_LBOPaJ z5ngz8AbU=f??(_=5DdKMRHejV7<3f$V_{lP=)aMZ8Y;QN>znF>%{GUIOtPdOcj6pM zh4PXMH+b0mFOVbRIH8hG!X!)6O#&0%e(P%Mlb9DnHjV)W0btXtw_|Md6$Yf=*=?E+k0RL>s;Mt?aKHD9v|z=}V>LIwD~A6OIrQ|Vs!Y(F z;KO8p`YbUEHP012&MeWSE@Rd?pVZepP&nKKi;esV38Ltc(9M_Sa1U75k=N1i>wkQ? zJN@UcZLnPgtsC)Wc=wsowZ`|jk>68n4O%xy-Yl~KAxUb#(%;FZm6HcM7w^<+cKBOo(WNPdC@(f zs4G{-)<5X^>olxsn(_)qi3-1mrc4P~ryXixIiAS7k`QglM@@vOO<%ZKTmI~O(!J=p zGxM~SYejp5G&XssJV(yqt`=FlgG7_hoSjf{p{VpRn?v22qo*<8_O7XGZHb;9FdZ~a z=EzNv+WC=}XRHsfH=Bzy<_LpNkL8kXj zZxn$R#|z}$U8cM4Va~SAv-^P;LC$H_(6V?cf()FH#+zU&^su6Y%vw9Q_ab6m0p04R z?e%U?)M%x@`Q3BjTtdeB^_ctJ^Xy|w8Fc){e}?Wg9{2z3!fXJtPI_eTHr*d?k(IV{ zStl)Ie%TOzqi?=5KYG)-gtM_TKl?fItirl=fgeoG_R_y8pI1m~|3*&Pn{MCV)_T&q z^dwv!Bcxq0Fl=WzP?2zI{6^(ZV2p_8$UWi2_rESKRE{Lq99I!g;_qq+hU}HbUvZPi ztzM%J3k$!o?~`@d&*ZnCP{NU^V0y#r8-Q@A2f02|-n$Hn*ir61T!WVbxmbw@bVe`! z-#=p-dYvQUeVtC>PM&nnO%2?gAJFY#Yt?sni5gsuT^lG|RjVoMK-1aG%}VWTE0OkR zqnzco(J22DU+_CP1A+grkO2>=f;L*^sL?ejDVV)?u%B(33u3sO77MEJ7#RD0_e{b; zKiuiY59SJ|fo7>jU$d{WvksiJDxCN4IW5$UaR^%o`Ru<$|28_>Gq6$qvgi@t9T#1l<>cyrw<&y@Z=KH@H~HLbRpe)^Z=73 zP@;2TNHg_>v-=A&P4el9ZmGSAO58)qlvi+jjOs6oeUcG*F;?XPpAAaxK1a7%L{tj3 zV-`3bsab5CWQlUr?G82abp!H=eh@QOsZI7*K^%GQHYe9-hpT@h3M;m=nMUz`3h%-$ zuY-w!I`Y&*DD4oON;)i@w%=Ox1Q{k3sk-)ZcxBz{+l=j6>JDfy;apPt`!TVr<50xt zpTc_8@7)}(ySeJU^Xp8$)d$(K&s609A;#k-4Luz93zX}w2fhP;yAmzpP{I6TxofET z`!d@D8g+Y5@~Y3)FK2l8G+v+b%shxuJ{lb5iod=20C#Ss-`X=##5yKEf0Z6{mLu&? zHct6zvc*0L@nOIu5KFiHanNYs^?QuiL>+mA|QBFL^3TD&#ZR4_Qi$@QSeQp4Ai?3}H+Jk#~)=DE^pJ6XdMo^lmM z?B1~nHh08=wy8%T_r+{}?)c2#dzVa(iD_mWffGL)1jfDu4_hW?vUkOf*hws?Ji#^E zV1qjSu4J#fj~0o26-7}Z5mS)6XWWq+RH+(FtS>9K7xhrc0dab~8CJSA8qfRI%d2#- zHQUe0MW#1eFr&alC^~*noDLzctU_`Eo3^^!tgIrAU#g)SK;x!Kv3f^+RE7 zstv8*Ev;-LIQ}3bpYeQL2PBSFFc*BzZ6o(>0bIN8>A35*KS5&L&%N!3W}x5NfYO8n zuKIP3vCoi@yQy+KGgnT;&GLEI041aAfD={#*+0Gq7wzDTd_`>XBWfK=pnI&eT?N>(%EI^f07J4k9w3cPD#S?!azRj*UW+*1F7kDIQwu@n`yX zWC^oER!#=!BPTdBWH^)QtX-N>=0Z=e8Da(WE-AACZQ~-%pKr(k@Oy~&SKx;87deY6 zl^V^LI^$_rT8Dz1Q_Q^8GjTqPoIfWSiP|hZbPF&wBs2z9cX8}uvLN<0C^+|ZS6hci z3p(hdZ4@NE|En20(cSuY!@*&Jd+g!gp8Ie1BEjJ}i5msn)wbEVVM%|EVa)LkwJk2e zC~2q?z8y2kJFqcX?RUs3;+yE5Y8mZ~N<2))L#}mv%g73a3IcP@2Mw3r+HijwYvJS{ zZ5T7Jh#j!UWVjfT$MoB~3cM@}Ju`CipUYpL{4-k;8@)4Dixf)JJx1(=UmZc8yjFyR z_w>kX{UhFs6!U3fcYywhh%}P`@|<7 znOEnNp(v$rVEX^BRZlUYH?~K(1F|$#ilCUAhDml~nQ^UgaJ0yOJA4QV=lL^Byhx$A zOpaG=N9fgY#Si>HO!i<3JCxy!6@bZ>SkAnCKcB_qRTid0VPFiBw?dSf--9?SeS*I6 zf&8WH1E7n7H`Y*Va1@;0zIhrSK(&U0fSWbqg*$Ov4vot-g=^sISVjik9M)B5r?^ua z%E>}{oYtV-!$onJEIR4=w$A*KP3giSY0@^2$S>{Z>3sry@vh_CiJx>PoZYO;i;50H zBbv+B#$Br1g0rp`f}gePJS|u;%aPRt%qkgS)SuLd>Hnp~YyjVrXyy~)D7k*CEbl(c zBlXd??RRa-mhm|EHkNc#-*_euQ06NRRq}@is6%6)Ja?0XgvM73WlUzeuN!i%swQR3 zArk@KaOEj`T-l8hUJqwdsn38cT6ecr0CLDqi+^iEyqa!4tNnYMK4zY_eEIGqU0_9< zb&9?puYkSm#7qsXfD@#cH%KRBP_HmF4$_pKd57_7h>5mv6y^j^3yV@=21WdyGalhRzQtm*# zPMk;GDDufXbhgs$E&p+^BH$5#48^5-$nlJm2LBk#XT`@!_f1JF)!rYbtUK=`*5$VS z?AO4qrS+%u3cW8TzBRg~d8S43I<_hgJ}>KLh6Y2{(?KdpO|$bSEv;W#F#~9ZB&=fJ zifTfDja)fxq(#BBC$Qh1zrD6y8R z7cXrXh?O@ri#>6>j6P?Oaek!xj$+M)?c8=AUd_g>7x%|!Ltj0?{Y{N8JK2NB^4+iw zlPpr|#0rCFK+&-}HA%a_sd%?U8rm)$)U5R7On$Ua`r#?vm0qiN=ZoTa;r&PdU&F%x zk9EQEFCMOXzKE%q1)by=FJG(vpd5xrc@3bPbK{Jd12^L&LbP_N8(=T7a!hjf*`6{n z-?7aWdEt)70SC(xsHz3F^$3F9R+|qCOUg%4j3&WTXdE|9eaI{g_4S zU1w4W&pY@F0(~JrY9hnIUy+gquk9_H#wI=pr;A)(De)ouI3_UV^;|{awp&Tx5#_xM z-)`xy(Ni*)>7{^aH%yVy*iO*uR48{De5>?Za)=&(&onNTSd*rFRGiP!24h#!(9(^< z{4KIBzMFzjeG!tV$Zs(Y34%wK4={mGeV%@Yf@O_x3qn3>%K6#ca+s2MboiV>q-J0 z$W)=;ac7i$u&J4~0BVQNtyrxy%{#%nzW#e3;qc;VOvJ&~-FpOn*vmF-O0qPVIsx=q z)LSDzBPfOtm}I=MBJBI*j5}Ht=IHh|NtTOQh9}n9_191TL5xb0bD9ztw5((9!d_5A zo`TFb%d(FkXGL1s#}m!H<;!G4!N{4AMY=pjTf=jxDI`{{Upbf7(dlM)Y&WHuQdbc- zgnkBvqHPv=T2b;2dZxyG}`qQCQXH-BbD`RK7D<&+{W>? zUMNOrh6?N>P-fH@s5G*=T|a*$E^<`7?k%56KA;!u$=l_}E!{oTy*MiM{PQoVG$N7Ztca)EK-H43$o{RbP#oj?#vFl8jB?683Xsk(o$4V@or0)^(n}< zJmr@-4k#mhPy(xtq(pHD7HZ@xDH0F$#!A2;hIc{rG`Os>nWaiD{=!MOl83HYPAYHi zjFo7^D}dN%_Kn!MHBNvajR6CD2h1=fH8gE+=$bKFi5#uUsV+Jf!PL#cmTmJ3CSBnk z?6;&*{dt2s(94ry&ryce3;qb$&7ZCa_is|+A(+m-U~Astlx<&ZE{fH8j5nMDJvKXR z{a-^9|L>e(4ZEzf?~ar6R_gf7TYZ3UVgm8#XSyNrQTN zTQj_`vnP?#c>C-JHa(BdL1K!tRXvrMMn9Hh5U-YysEMDDdceyu=dSB zFizGsU*HSn`xk%u!gQibj!+*f&lZ^$yqE3rADg5om&l+5hG%pXHzzoARU7w4M1}Qc zkSfgjTa?KP^i73ScoWJ<6Dyn~mRtWidtYO3>lY{Ge%xwP~50 zgV@|tlV!6!H-)@v-RF7k!Y$hjp;>8m5ynki$Lo?IvN(%??^o6L{wd|@?^{7kLaGLn%`qr#r zzF1$4;5#M!$-Q&t^7-7E7-{Lw^U^o~nec=2$J3&uWu=xNkM~bJk%Vd`I`3Mz8*=5I z?roKl7HX4v700*tJ#;d^OeHnA9CWaf+*-T_T3z2XbmC2iW)W-+)gxIID~~H8Pp#(> zZy)K`W@TZ@%3y6hkLMQ+SdMan>ZEuJoLJJ_KIMj({`XDOKIznSO+H6^Cd?@XW)zZ5 zGkQ~z1b;SOky!H~sy^eXI=w)Jbs}E{i?=>qdRkh~5P2lsI6+G?X+U78FV zUY@kjp>=*l+N!=sD0y#mmy2wysFGSGly%Ut|GHLOG&_#-#oW`G)2GeZ+24qRp`?RU?h85dlbwvoZ?T;Dp8hbN^@>r-n55|Ao_z8yXFa#c+$w9m zFuKjIHxDmyyh_|Phr#-8-iR1<5{iYu#bB4?Iha8Bqzhg{P~C2#_D4z zzo)VJe5i+_I-q4}x(wybTb%9l^aYrH6gk=F0}$3KNDEx-MEiK2jWmmdOuK>W$B1xC zQ^!X2!WBbyLosM_C`YvsWIf)_ldL`Ol(x?Es3_xk)!i4}+7EkTZqxCOTkuE#quwRG zJr&=gBG&;>fz!JQ=_r9CQ6+WJe<{>f6DrO3uR~_PM3x;HuYTc;4Qx1ep&j@UF~=bS zl-vn2_!j`0PdhM)`+LDN?8B0}Ki4wt_MH|pqJfHEybSWgMJyC1%6|T8YB=t0ZNKYR zCH3-Wdpvp7I8}YmC<+l{nt_VnOK!HwaMDX#G&c|S+Vp>`D-|C5ym~#vU^0cfAyRMC zWO-v%Ecxo&={p6;GNgcR{uFTmJu07VUMRTS-MEl?^kzOlRCm_!oWIp+S$YuR&&FFI zm%r0uBAEPge&^byZ(UEL8M8S=3Jj2x<^zu5gP}>^FhNP%!mNdyZY|WK5finCp)8fL zTC+|v2)5_82f{(;dhU@^oj=$|08u4eCBup%Kv))@pBgEmt&B)S71()^rp! z>$PN5w0G{n^_z*mlUnF2#Q>M z`Rlk#zFfU{#n96)ZPK8=cJjPGc#``IcT|lYyWz9`adJi>`aH*k>`tgjJaFi?KKK`c zK(vS@VrKg-qFrv5>O2&>()VChiW(kSovXbj7eHQcvjt3p(_Yb>w&ed9!J(X!+X>nE zhd1-2A1CePcV#hr#x^V|qL?Aa6B2u)iVFm)2AD!$@6tr623brkXB&*kPrxXWqsCYg$A z?{Ka@c!(g--GEE(d63)h51I1c_Ot+DCvJ~6$(1xvhSaWLcLmLlF3J-t?&nL&<%Mqk z5N_mOZ?c`wWCPKdL-xn`zm9R4kDG3@>q}SDt1M{t;);yv7DZ^Q9++toZWYG_@T4Cb zUyX>NJ+$W7nKf(r!`(A(D_RkBMJxfBt|s@{K%UhrA>Hif2|JZ(sn-DDiX(z~6f*_f zKr=jj01iZD8&EloMzl>`Or+|xS; zEm#=+Y=m-b;VUSC4M<~Bv^3A#fcvd?EwFzVHkj2)pC}}H2FmA+deO{qtMq&2ll5{< zHHc_Zl=`{{{&Del-vD=Mq6tMZ)q9{=n0FIwjy( zY4*Jhb+|?U?Sj|1oGYKN2JL2SR3+3FVw#pDAmpDhFE2e=nld6D%R!Zn<{zGlDr8qu z$Wa~{7H7iSV7(KS;2hE0g(Q$vyx48tu@t16aR5w?*C~Sr4=N-j6%Z?rp zNU!VutMlg0naJw-dW&ot*Y0_U_iqEB9=?@0i`SS;L~~Yjg=-e4=M0D9XP_j#aiX{` zv}cxU)R{H;BD*80!|D+e=tuP=@}~|a7BnBh11SA6y>Gao>X(2Mmg?YoDiLqBtSa3%|pvk0Kjir78c|Yxou5b+qDn6>JcmY>eI&LMw+xlFOSL`>yHIUH6q38C$yNoheK?PUHvCk_x!T zpUucjq936IrZ4Awn=tc2=GB-bW{0P7L$CAb1M8MucY*H?IyER^WK<4dsOZ z?}vYagRLoJr9hvZ(ha9K)*TBDRyNghLG6w8IcRx@tgtv(|3B`qMKGpLJh@}&sviPQ zu#?1U#ldJjvEqF!F0mw8+vY8po_3YquTy1xZf+r=n0*$zGNq1y)~w6iWB$lV0q4Z# zrq_#0_3r;8B6XSmdn-GrdQa6o-(haN=zxL6D;1Oe3ed76Aa)YXZ3>=~UrGV;nc`0_90;hwIxS?WM4BFC;mt z3rGsn1MYD@6uFrLUACv3jDgcmb(XenzxMqH%3R&p7!Ly>fo`HR4>>c{BbBr(zL?g4 zqMxroWd-3)S|sViwZF5aEvqzcK>Z|R3S#DU1=(PKG4U-M&AW60z6_2EYxO%NBAT9~ zbjM7(vo;0z9OEz@MOhaly7$=D3FS=|u>fX~nxfqAINP@lBPEf#HQJrOVAnGScqnc# zBj{;x@#@#c?s@z9i(4g9D};y0gDyz*0RvX7D0qj#VxK>HxRZ<}rb5JGQO3ts%l=YZ z3K)d0T2J`~+zgcpApnq61ZRSw9J=ga z;}C0anMP`+BEqu(!}{!z=aD$x!ak&Gt-E^^%YpP%jeqk+EZ0z0;iF6z#EFdoa^3;B z^IDp_{8lC~DZ_?r(`zCK-}2STD`CG>;oMlKV8=MFGpywEVtj_MeB7&>w zsw$i`5t>_Rp$631(&)MLW2d^kX;fP*e+)}X)5JGH0ZlPuq(NqBT7m&hPKLExdH(w8 z+`sf;1wwu$$dX*qw72KXyKa1>Qpx~J!m(AGRlYD{@Q{9kiGjz#2Z(upyzRz0p}T!m z9^+)rCKt$MO;b>u{j93w<>@X$>$c-==w1fv@M5No8Rk=QWQnYajdGU>ca(Fym65eB zJ`u}*bcl`pP9q+rt0A0L`1=3NwMTvh~Lke zn+3rpxS{I3hJa@hE`-EIJ7xK$*qLu(B6_U9@tMetHaVIT$U&CLrrn?qDk>00!> zXzgH2&y$=7Gc3%B5TXvfZiMiYb6G0N>B7dvcU@{X+K>po>GC-x`cl^(k`!I6Y_vzS zH|`Zoyl(ufyTVcMCMNAqhfE0u@U3u^72`fiB`j@Y`SN8d92(tz4Yzocwx*vOMk?vS zJ#RE%ip>Cin75)&0Oq|_Pd5!zis(v#lzQx6BnPy7TL+T~V4{sxi1y7dJF=5Zz&%bH{8`h3r5S7=$^lB_i{K?4Turq~}1T~U{DQ5|$$$1!@ zRKnb!cbolO*Qf{SI9E3Ok4&*qSG^We+EJ@TmW#n$3KV=W9x)^aH|ysGgudEq4n z<{cgN*Xvu}Q7f^-n@gNqoCAk$VxmT;1ct*E#E-etCRSXN_anS+<6_|E(XEO8|A-9h z=i!Y_tEm-wo;)-OjgJ_CE8j!Ls2(6fCI%F|0#745fczCb?y&EAFX>{6W*K)iY$t{d zOc~UdGzUIE5tdUUy&S!>e!>Iyu9aS9-L$r0wN%;@+?&m3cZw4ogP&UMVA)9eLYQmszekFWEQ$ z{v&gF+CTx{JP4Oa-iyEef{pOZUK~dGmG>U|aU!2*h7MY1=j+@yO>=~`98ZAMZo8k&=`i=CrOoPXL#IFkDWq-w z{C*Ee`19`-)FWl>y2;I-o}K*4bTJBHF)sytu3fn2<_%|kxRuVnpm;_U|^EN?QzV6bzoe-JTD}Wt)Z%;KDOsT?u zP)Mb859^N-Q6Zl1GD89TEWjAYNMOdrRvug%ybmjaUY_@@^vxrr!x{A!kRlhhtQHu9 zf+Wc8XUxI19Uy@n4Rn+;zq+>*?!P5|Y*>jm#XM}TDtr&T^7kqne>gbXW=#QhH6~{i zs~-RgV+WyaPu~ZmJUU=ds4ZX*>Tbpu#_nOw5Lx+dJhBg=(o&!wy-xw6J+RiP2;7$T zZq?aI+!i(!vToqmmEIOG#Vp#S-{=|5HkD0B+;ig)&SueXDXOU5J#u@#8lAjL)UY0M zWWz0d^S2lC63j-WKXUBCF`bu+xw7)1^D~^n-qHN^H4S>NYFnQ0X~3s~9CK+na6W~9 zG2YPS?2I!<^EW#%yDg>d885HPsIn{i=lbDlkoS|2z{2(d^c1md%D;0uZ2Dnz?bF&?@fA_Y)eek#*3S2by9y)gL zJ*IJ>BRg42nex?KmprE0Ho}v8@cJ@WDVs4u1xwfSqM$@9*30p~vhOO`7c=Y0ZolbOsi^3$Mb=uay*fFutrMBw4f3e8{CYMg z}|;YYQU*rcG1H)WE>;bnw>10(xPo#2&U))xCag4f_4#|d%s|Rd#MU3ydEYOBY3Mm7m zz41NF&A{Sw8J*Qyj;rb0WD|#}-@E|GYQb@M{aWb4xfbSKnCktNWp&jUsYe0O6a1?V zn{4B{luJEVPx0OWMC~@&_sYKQw%;-@xC`xKdz%AgWH5tjmf1Y1{fXDE zWSnud<9~kjnT=<L9qMVpIBr36VJF&Gj@;A(W=b+^q^KIbY3T&0QW%gxp z&|!a9vV?6IY&rO{OnyEsFH=YDbrs9se0omz_J3ZxRsG`Y8QbD};1LcITqAl42*8#Q z`m+ZX4K^7s3?Jcw0Nk6DFu*mRIH`v~PzY7s9$X=3)PUv#?K;neq!ZY#HB`@n(NKFtNZNzuA%X!o~}b-A&!4^ zYcjY)MrUHBa)Wx1M}DF0J!)B~=XqlHh(FKvYf3=ZoD~8f77Hfnm#_QGl6cDanY32s zjN-NbK`u?F@miF9;1$_E*;a+-&19GarlN0Fs)u1d0M2|s_H#p|w=v~K8zy=$j%y*1 zQe}7_QPL3kue>`8^vJOQEq_#eaT?wG5N3#3y-dLA_?8osCXosi20k-!Y z%%TXYI>7QD#{;bXWM&uw!ni@zGQDYMHEQ2+S+Z*kgmdM@kY4(?L&>^i8`L>S`Szla5+h1?dC6OGrnh74qDOoE8=cT zGmYUj^fDLl>lM?aw4uH(_#V6u=1$r=Dy~x$AFS2nW*2F&!P#hX6!Jey-*Zf2}r&&?1;Qv&}_}obDI|P{GG)J6?4eh@M(~UftJR+XyC3U1jrt{U>R+& z@IgIFG8{1qm_A}QEwK;N>!9MsxbhDE;Xg+Kr1D-)SVt(!)e8_0<^o-9V@Y}Ju(;wM zUcT{nD%b4xal79(Pnv<>Lmj1?Gp&2)dpY<$9O_0A55~rGL)d zsBn@)oKBdXwONv4?9{u!`$3rAL1o^^D8ew7EGwt1yEW?!nP0x_6=&YnLNnBScgYI}C3)O0$CYh{v$B4y+q$VHXpXoY0=6cHM35v;3H# zu3k(Uz<=s_@3NI-tPi&i=hTXvnKEja7yrAeXDKGel@W$pQ+;S&kx)ctz>#Gi7bUn= zjiL{JUu2#cqHj8A(6#-e24$;Y_uHMg2E!Us%Ezl))aQ^$RylO{5hn-l< z>%Rv^6_hTqNlc^q(}Op<2|1=~m1mXhtz%!YQ^#6ZVT;@1%`M9Bn-6iEwjZ=H$oOXE z;1MvDbbgpV=5{fmiypp33a5jT4(tuIghmf`RKy-f2;kV8!*zE_JP_i5MpnuI#_l1meG51X zfnl#_U>Y^O3C-Yyj?)1!12ld3iX63WqSu}~XhGn|@NU#su_hFGhsZPw@u#I~IwHy< zru0xLIO8j0XoD!o92WwN345tw_O&+q#gpEwfFa1>{k9$_^_tt|YuhdbDUw=f{qDE= z=NsWETC<41mpQuukSe}z1IpyPk!4z>3aS0(Ma)RVt)FGJ&+sg?<3KV=d{b9Wcdlx~ zD5|`8k?TtfMGC_>r*-Xt1B%1}b5Q}TH&p}VvXQw1ul)=V`$Om|v-}dlYA>DhF|u<` zHo~leGZI@ksM>fM+aw>D099d!o?H!aNYT>GG!;_2MR4RACG-b*a7)-7R5@|2AGq>@ zk8tJ9S`YSYd&mDrgr^HOzX={rSzcf&mPk;&s~huTMD%7^kL}%~Cn+e$Nr_)Mgmfjy z4F#V58+NdlK}ojMU4ib}D;LWOUJN+&X2xr9t`_iN`7-^v4uFT;55Ck>&W;)naiXtY z+8hQNY8%?z+S&hHfmA}upKHSb&bUIr67kqlwE1`>%IiXL>R43Wd;!(ba|0=1um!*F z3W)Q50$Lrt|5(m)jz|~{9k{iDlCh4KCG1|8(>rWiC%)N`Hp_0wD6N?a^wMDRI}-@6 z;Okk9E*T_cO(HDCux6sMl%xvMWjx=!s4jJ%1w1*)aX0YW-Svl43d7S>X<-noGi99J zQ$2E*;e>LKd*jfXr=G7s8t!~|jF+chxiQQxJZE%MdXoyS0;u1tRbHxIDbeRY&nBdD zf(Q5c(u|Lve!<^EG6cKqd};Y)pyw2)s0rDgyDi2CoQup@Laja;JCYW+O!Ef`Eyi;5 zKQ++QBx1|C$t93T*61POeJ>+e+|R7`a{`A>^05pjyX;)Q+^%8iz_aVXa*ZokagUN2 zzk2aJPM2HWP3AWS1@rg8 z2Z=Jt)Im^Z=ydFcjvQ&;Hg}%m;i8gDBIcng4}7cKy0isOB!22}Z=w+!`(f|Jf%S6} ztAslk)6`YgSUXDV8=D>-2am;$DvR9+gDCtg=o)tHojo$+H=vgtXdKgHky+h|FwbT*`Bh-r{2pNURt7%`g^MjGI^x% zHAkR8dqa|E{Ek-AdyghL)lR>6Bi$dzqWV0xH*5fq2E@+Ycf}I44j%UxJx{B=qHg>_ z|9GOkza)>T=(9#@IxB7JK?Ehv2`f3s!9K5Ki#ojvVcClg7!0{c@;CgY+9Y+XFhdve zHZ1oh%&NH26-}wA)bO8DGr6#*Dfd}ke>qLQn}L6{f|sY(YTN3UZh4#Z#azpO$`>vh zsHfJi6WxaWvW3!3Px-yf!pFMR+-1=nPp~uuj=W(sY@I9$`c!1tg2|kg* zT+?X$Q&;01^PlR(aZNZ6aWqhwyCAEjrODC4ja_cNB1WU45WK{)vmF z)|_i^!Zi<>OWyQp1vE^O@v?U2*?Sh{gJZV1G&!+KbItW8Z=7L2aQYq0H)dz-%Tem+ zX$6RfOhat* zy7z^x#Oe;KN*#@je@A9Fd5vnw{AK=Yu zHAposVW5}Fqv@7L_zUuaiMs)FSg2~*k-8hrjLPCk9uxk!!C=&5D)dYI;s&)$_vpoN zP@U;J?c;R96ni_rG~Nr|Cj@i3QO7x6&SQv=uCN>8RLkp7$^L@pJ+pr)S*#~q&?yvr zH7LsF)s;2roeuYj2NNGaQxLaG!{-AeCii_R#=%RQu@wJlugREt?FDJe{b0ZI2W|(s z5Mj3|F1O0o6EKdJj)u_e@XWsgRmlntRgBG+{we!W!Y-xL3XehRNmL~NwP<07xqB-0)t#!7SXgz0h#NEJ5$==7*^GVXB`P4b>z+J2OZ6;#& znm^QuzB4@$xCcTy#3}TzONP(`Y_Uufo6DEAOl0Z#WokhAja>q)W-+oKniYI|48D~Y zKg1|sT?VwC0MpO?wrDz|S85t`ukZXnes|g4>{W!Gc_$T8i}o-A!g%on=RjJ^r7i^z zjc;CoieI06iw+^)ZA(-7HmdO;PKbn~VV&~gHeAtS#}H3Pi6&il?_t1sx~QIrpj3Dk zxHVA~xf6{uXupd5xa>wL!{LZ2K8icYz5fxFp2izt68e%Q&|`s)dQwov%(oxMvy3Mi zr7%k_z!XlIUMLei6O_ptX18ZRliiGb)NOoKuqy1;>7Fu~q;A|jf5CceVU(knd#ihb zzC1&}wAyKJPc6^UaxAdc@{){3y{N7zJSRx`C`Ui-J6+sF&fd4c51_GT*rhH_S$cD` zdby4ZU#9qZ){Fylgsd?_XLP;Yz|Svyb=oytVP;{P_n-CV;u;ehS%IpJn!oD{w4j>YIsT8+RY zd1R?`VSC&uCbLQr^fym$h;Gvf^bafTABzFfc<&a+(~wPvSs8EUQ_tV@$4vC8uOf@I0PA3G$;LQx`Aj(3a7j} zB|k??!pxy@SpIZ%Nl&^QH4hIT%$h_PGFJ8d4>Ty$P#Oi4eRqZ~rcU+%?+rjm~a?wgKcc7)!&zAyJo8@hDXK?{)BjfVKRNU`Xh14P?=|s!YW25OeekU}W}wCQJNGY) zHopFP@ozY$pw*R6u!J$(?AwS=;6fl^PS%5In25kuv&B zX>~AJ7A+Fa!j!lg3k`eJ5I3LbB%;*F1}cdkGB&o>pDnKv)UYENo8Wg`nBW(fi82Yw ztHmER+5Ww$UEX+$?b}1P8gv;054g=G>goNza)AG3{{r~~i4(9xh>i?$K6G_De^`k6 z7UY0u+zTSB4aZeeu9{SI6=zUJI;IrqDj7#I~4K9bfyT{FmhO6}0lnv^d$)=Y*JD~iq(krr%Pmzzgg zBXq|Y%;eqt;p8mNfjkGp`M2|Q$91Q+p(>Fx^!GnZ(KT6IL(cKNKh9-TByJm3C@i6; zsNoXyAt?`sAV$A-rAyYg_@md~FdyD|556~&Tw3l88>=T2qtflk%Ef5?&G;Ai3ZC>2 zi)nJqoL}&gQ|jOuWYPm9o=ZjGCTO!B-mhAd@a?z9jrfww`ISpz2!&)av7 z-e346KMZd@r11SAO<*U?dOi5jAWqdLo6u0J!b$Sk*Ul(0+20`1(eMzO*wHN%Adwa& zZ&JChKU-x~7t+kIQ>?t!P+Df-lesB8{m;tn5V@9mqk8k;;0%nX%^K4b3xLxfv>1{7 z*76o%kc}_-6|yMVqPj8}f^6}TNc7zY-vw4k6|<54DH{3vnlMMdqHjKfZaERC{j(jN z;m~)Xk8e&9@QT9!L)d#o!~MQ-yAnwdLWo`yy-V~ih#o}mCLwzCHW(%$dW)Wj5>ZAU zZ4hMi-lF$1qeY+5G8lgE_rKOY*!w-%hmNep%zEzUemg&j*TlOYT^i19{W-xxk0q+`E5{QbfaVwU6%;hL?EC-ie*NEFu>aT3L_TWQ7r)HOQdy+<2)7-^Wark}Nw$PA z`)+meu^ajE-U9>5cVFSEHVhiPKYdF0G(bR3t_E4Uws*N;gdJRBlco&n5$*L^9g3VT zLe+oTp4^|}aiIEHS4+Gmsaic1@kK3UL6-zwGyhsbibfXa>i2W|kcMw6!N}ui*0ZF- zW?TuN>;W%*CkZ*u)4A%Yt=^xDZf1&?w1;gL7fPTENJd=jwG7)rS|^fbwoMroDu*Wj zUV^(F?vbU!^VA{dc4pxvP2al~PjTp@v6XCM$w9XZ$7$`wg1~EuLH@$i&Z9{SOEK|4 zuJpGZ9IwpGRvHGVB;I#+i&7Q6^-*`5Knl4asew&qGQyogE%uy6R6s%2eCNA~@q>%K zvDIzxMmDt&d%t{Y!E2TuAA~Yw*4@STeW~OrEd;eeq})Fb-gwB11-N0Tg%nw zjxzbWO}%AlQm)tb>sWdy$BB-&-Eq=1{`dKBd`oERNb%QoFTLl9(kcneY#a$&B#Y3t z-^W6kL&L=@Yu=c-9!C97iu^dI-j>6nz(wIKiRIv#glyB?YNlK%gUMsTttcTelO@>l za#5gF<>s#k0#@l!`@TWXtX84UN-=8>!?=O(Q7Im93#PfCwxTWnctB)+{7vSr6>dNa z3>>rxxO*1NcZp9p3d{epJl||guoiEkkmy+xlQ*p&m`BtG<*0M0O&8@PPN3co#On2M za1z{MU?J{hkNqolKQ|6DpMVA%1&HT> zN8?wvx=``_I<~HHg1_}R(%wA!)#VG{SuRoW$w*M{=a z8HCU62i^$$qgaoMN4rz3tNrV;30arwTVn*dA{liksGM14r|p_By6aOOwr+_c-Ps9G zy1Bp69LVot`2^&<=vQBjVQ&PwgG_DAKKsNvKF?&YV%7zpyy>0#IZN9pp*8+TLtXQ6+(!tk7<#Tph)xAd(d{l`h4G9LIal!Pp_GdI{O%GZt2^m}m1$Oky5Ut{)y<8`UVv3dr^$`-ML(l~r_8{RHd;W)MQ1MfX5yl?w9jC5A5Ek1Z-tcCM$D zNi&QWd}=xk6hm-_D-KChRx|XMme!))$TiK{xFx+t!cX^z3ki%yYrZ`oBK+1*{1^Sq zw3?B!!_F0WJ29!N(5}m1;LKq3=TT|-yy$NU8MVB2piek`-tREZq+QK21+(?(f43oP z?4Tt*nJa8r8+b7lDSMW)o(&si;uC^q=rch(6#!3+X~Q(U;fABT zg)RxAA9#~hG!9#I4W#1!hWeI>XpyXNA{^v*H1Ohx_Z$&80>nThwYUgOlQxd2a2#Vg z+ih8kWr;*&%w+X22|-`awsF0C7gA*n;+l(o_Z=uV=av+^l~PzCloPAX81fl)~PX^uO!7TmorEQJ(KaK zLW~c~gJMfSvf@Ru(E5>Zgg!I=O*C4qJqE8<)$iD7#`q1}ADxEMT}jF>S-30%;<&*Q zHwj2{C&$~7)2%NlDR~-MUR&B=eu?K_Wx*qTSwcm7WBf(sW9jyaK|WKFg{+QyzZ7d5 zD+*(6FTPOeFxW>xyo-(|IJs5D9gw3p z$^Q}9-x#6HdLGpMInO5=#qyX>!ngi7;QBG+Xr<_CuBpR|#?o5`x@?;a#PmK>UsEJc z_U0=y;*{;*BltU5=x4vRL@4Rh>)#+UJPk%6G3z73{72rA)%WpOF`S{U`q8M3{&$JQ z*?6>tvdX;F2-{ov8!UhhgvLU6u3!GGfoNkj;*d|5lu=g0?VlNc-xSd<>Lq#$KJVOk zBxTfC)5O~{rM5Y0ALQ?2>L!Z)d0FnZ(&M#5;^4Ov3smniux|=LlxngWt~{*fdWoeW zXUiG9fSc>iYhdi}ym!vksuPQp`rGoEQaeo{0ZB7`Xy5#>qv(l3+sQCB zRb%-ssBSy#x5!}1u2QXu z^s*4X-WKhE&zw1My0D;-3g7vDtfX7IS?|_Facu9q=U*R6tnwQrxc1R7Z%7=VK0q!Qbr#o{xL>jz%CJ+P-Z6TBOiXG1^yY(=cgw1PT+L6#_H6U2Vx2Bzup zb~zOJE;KB>v8mnT|CZ+E4atmf!wTn;>soz4F;>bN=L7?TI#&5{qakG=@RSiFYkdJ8 zNJ~~&=-3N4CzflWb;j@aV(G!{8k5}?`Y@}$v?UVTduh|R{Nu%86IY-^E2ZdX0P`46 zSpXJ5QRgu^7hp{RA@e>XHw?Xh6L8wy*ndE^r`hOhRlKBpFW)75#XePrvnd9yt55C) z0s*k#U(XHGGPx#fhl+{#u|=h_hCo+2Lni0PuhdPeUHeoZHi9hVH7J0%mSobHq?b=s zXOI|Ql>bcJQ(?|5y$s6vK6|t+bzlPgHDFj+hY(eF*M+S-&bRFE32wMsQFQkFdpp^_ zS)Neh8HvQAZzE~AmQW6)r*s|CPslda&I5yH z-;#mA$`BG%1)OkM9!V7{y5h&+lxCc2Z}-jQlykPee2~4(BWZ4AitZlm(}(}uSPW(E zusiV7(94_=m9plX&Y$h<)RXCI@;dlUyR4rqX8c7J67y;s?9}JFaIa{m*7>+25UC2w zt)wdFVivX~Qlc=GYHp)4zAjPYjp2vSbARVN-8@LuN5Zt7P4Wg2}|8pp8@R1^Y0=QIH>YO<>wflX$fG{ zjcE8N*H7)JDp<$KdxWgLw`#XDvU#WPL8$kbBA`dA0_XR`KiA+rF#fPe{dj++`=GzK z&oNF(;`&dVFB+SgT0Gja!fi{=`366Q~sVpSrn#iz2{s{iAb_I=W~?i`lkJ+ z+u?9Mcq2G#3->tY<% z88b*$KlI&9Ls-e0vtE=)x#{c(kfveIb?PDroGz@N~jOFeAz`9qcQ%CH|{y%G*O*Ypvuzf^T^OIQwf)AZJG=p-=9De2U{L z0B86eKLV@1L{4sE1wCPZWna_LX3xbI%sT!l&ez8(!W~2w{92vQmRj{GNU8ztcT4lr zN5}WW##nhhaZdYejJshZn17!Y@9#1m6}qe+lk8<9Tir_`s=qD#bSZkIEb|aWyS{5` zgUc}_qF+UZrWX|N%Q(%YB3_d&Q(;`W2jIVrjjG7C_DW`B2YVZ~==gjZ za+8LbUt~_e8LJ!lD*!*EiR?_FEF^s!cHiONR7+fN>Co^usrH^VVs}K9S?_-Yh|$WH z#Dm5wqJEm%3FJbcM3+mj8-x(|qLi!Zv*Ez7{d<4X;r-3O+dOY1r_M|SPCct4YiXMs7~aH-7Rs zIOh_5J!Et!`c>YaWcyOh0iwtsY3;$9VUEK38GBjR{P?-WU<$KEJlNi~Wlk)U5CCn| zYwzE;WiWM7Vg4FNv-`GUx(G|}S`988Gg&_5ohVb!2vIh6bq(0kC7xcCsm8}ggK|*C0lvQ!H@uOFZNJ&t>$5+bFwWf#4E*txGjhb zwq64R?;ejra$>NU)#7zfd>Acuwf$PnRq4r}zb(Ku;+YG0yG+gaW^;z$M{D%N zr*91g4|&gFd>KVYL=OI|fv-O&+?~rqFq>t*OrX0Q+`A=o)P~CaMqpS{?Qk3&hPlX>t?@vI8^+rI+<-{s7VQTY9X+ zw`qtFTK7p$0101|&Tk5X+8Ots-;@<~M(xE1nSZ?h?8D^w)IJ*@hNPg=ozAsZp>Ox+Z6%izqEq$>X7rP5o?`z(18y2ZBrV)~n{dr|QV!AEtqQ)}ckrLwDIgK@ zbSg&Jh#xvFY5ckM@-M5bR9bI0ZE9+&SzKCN>h$%S(oE_0BvYzOKN*&<-ZGU&eR@49 z_P8`|%FbcYXLkLyOo;sL$O{Z1@hWF;-{IS{#!GXvb~LY+PA z|Ez8j5xSy_S~+(Op9%gQ>$pq(f{@c`^SimC$X`%BEC$fRd=~<~X;q5Pfit{;COXCw zqDr3iw7wOAu%WkF9QJEm5-yC}(Mk#tQm(erjn{5#&V8?SFK%sNzWV+Eu3re{vTc-8 zE3HU{Djw8l(0Oz&SYD-lE+#nXT8#j}CR|#j?LH>P=XLtHe~RK z)(?hgq4@1+1ztqT8gy>`xp3$Asgk+Y3lbPqS+w0bNDT#rnpw*ws(LYTKGMk3Be40GeK-T$E`zpY7YnIQ>sZ`P=C$;aaS| z#&K9x9EM?g^Y>(9ao@~zJ z)m{Z;HWm=EX3b@dBb0(iPe6w$r65;mQ{;AJF;D@r$7Xsy+GmU^wg=Mit4!_JkGA%R zVR;+HBvPc+`KA}c9k(<_Haq)wd3EqydEk=KNojh zHGoU38XVe7Yq+FRR!7I`uzN)la@Cn}fV;XFC^JXzhCrd4^Lc z!NL2&m?wa~ZSo`VDwKZTti?0hZJBU5bqkF~{(3kA%0KSeZv!mj!s_V)gG@7jImJnC7IHUV_zv|p8650YU@ z{6dP2!ZG`iUjH@Sb}nk-_2_whLx8f{Nu_B86 z5O!=W6It-a(}ni`_6fseEM0;g%`}y$2$i;0=1l2NZ-)&1 zVRkD^OSn&`^1Yms1&-#O93O&y1p@d+o7r_A`vtVUB5V$bM(Xe3#gb>7otJYN!?Z$D zc0Kn85R~raUtj*#Qx^J!f4W1M=NsGLzs*^tz^z@_`R>wg45*hbtD zAR<2pn{@{t$9Ysr=o+#RX(4BX{SGPgnr9@w&wqHEx~*d)rH8N(hI?!pzw>mz+m@<1 zZ!#!x!gFwX?E@CL$ixDNbQ|5e{$0E(5P@4wDcGYx-#B$MCVejvngv!VBucq3H$H!A z&mZHYI9DrosYA5Xj7Q!!{Tqogku#}&k;mZSu680oACZh&&AwVoYVai5r$auOVsDT- zv2lwh%6ewd3l`Y{Mr0E#78e zgHO@X-Bu#^7hSXGK7}#ky89Ga<{AWs>D}#;4Z}ml3~KUUX9yRyOr6Wcmw9q#{*enk zCV&4cz`lFof`c+L7t)m>BiK^uHl4tyoxovQU!_g$z!W0v>BOJ$HfJ)KGh-3xBgEE^ z^b3ujFiWygm2REp*gEK$gSAcG8N%v{N@sITggqQHw7rTY3yysSEN&a*^WF^Jzfs-| ze{sq>zn_+Dx#@X?N{~BB-t=Df4tQ=OcO0IAH-?@}_hLn~~K)5oZ>5S2iEd zCAmt2%(>*6ocAZ-cAXa)iPjK#Xq+!-)TW!K+NPF`y|D z>GDZGEOnXMGGQ`-qWHB&`!tewPu3s*1fU-kZ^C*m!e|j6xm(LevM9|5q0WZ%vD{C3 zyO+6)l)6lNRoZs@qS(b@gK8#k63beL^t?AS^q?!f#k2(mLk2pwIoEL;sT;f~p6JiF zwQAF!_e}kOr;v=Fzus@r^R5<7z@&Nmbo2kz{B{xMd{baQU+f^<>@>Li{f_YS2dase-@1V%%J%V=Rsb#|a55xLq?H8UT0P{-R}|g-2U7`}SMn_Z7=!%c36Qk=lXp z5yApnN(-R=7jD4Y4ch{6H#Xo&6n2-FfvNhUwHUXGX0|lvwS18m($&Q#kdD-4_EG*< zoL@Zc+%~13Y^a1y)`ZRJt}j4Q)_c&$ODGOo;fkRD)$Z_oD~3QPOfrH4C*AQrZcK#D z!V-+O!rZHMx#}wxxc}*EHG>nmQ6IYgg95}~kiWyQ;(*^YoiEgly67f~^>GDn6F)Xm zjfT}}Bz51{x<96Tz0|>^biLfJIH^iwsVl+B(}dCxK}n{Csj|<-mM0$cmDcZ3)MqdmW$`5!@Yf{qkzL~+ zpSQbHNsNz+%H|@WE-^jjNqOAGv_I2p=ADKm4@V98Jzu3<3HfipiScTHuwm4#Z>vgEtB`hTMAZq1N@*^gXxClV`Axcw(wCo|2ZhKckrzvu z80FWO4T66uH&!>*1;qck(TMUs_da`OTlBP;%ToR<&3LbLu-6zilAiuPW71Q@@4IFD za56RiE$$KOn9Am_7({3~Z$r1uO|CI%_p=~2)4HeM(2Vyzzw-M>HEDy30!PU>PS2Q1 zyaq7j5#YQ56{1A-Cws|UEQ4S}g+{hNqA3|Q7h_B)esCh6`q3eGeE9b_d*he)A#!Md z9!DUr3*VEynd=!OKmDSyO)#S!qAe~Dyv z2{uI##rVyi9miC?E4M1_5q=7d&U^NBnCT;S1FCu1=x!yyFZ$poHT~ zqr1tIS0+9!;sMN%hCe)(l@JBeCgTd^#0turZ?kW_ur$N`n#|z|4<5YaRS#t8II~X@ zeUTiD2LguS@heMe7y*;iP^30Ezw3}g^a}xFgR5r0w4ra32E?D};N)8N(1sIb;Mdqt zl2-+D`sa59xfKFET!mZe+RpuR?QA$(S-3i%5%`Zlw5jEusMwJ0`ydXEEcXHG)|**7 zvB+*(4!QbN4aGGK3>}b#`KS7O>MbU+1YT`p2@daD>XFTgk%&Q0xkGeOiK<=yyfum} z19FM^=_(F-!cl!V-tJpL< zUji--;~fq_U%3?@98LT)C)2f-O|%rf@b#OvPBnBD=9A-r8MifYxBS^?)8v#g7&=kt z|JGGjRI*~k`tMRy@4cR73Uk2W#HUC=z~`e2R(Nhrz-{+YR4m-VPQ%H^Y=GQCN+ zL9Zd$HAOEST{db{JaA0=eWLWJq5g7jFV`~Nu|h@HI3Z_h#sJ@9x+U?yeu;mE`;M(x_Y7|% zM5SXC+fk!RXrZH~9~vL>9h##yI{!WI4Rk9lacEx=UcWyjjxF5TN+t!(v`0n2)0u@2 z%D8|@f`?xIgm{nxu9{%BXHHf@n6bs+AV|wjpY30hOew5U{4l9#_nIz9a`~P1lYfUI z!B_c|R%~%2zRY9bmM4Y$=3oCre>Lo1Dio7N6xKymfqMsEgl{PErlTXiQGjYw%C#Z z8qIuPy&~a7#wj^x-(*5HP%rd(TLY9L;NkT-=+%~1);^Q_!S(w^W|?EREr=Vr2H&Kj z&=7nxPuh|9Rd6$TPFk|>+#G!F^v7f9z{S6RMMf!ON?9=YuU=>pED*RpwIF1Ex&2rkQ< zvfo8W7nt8M&i&s3RBxy=O8Fk^R|So8yfo}RIgAFki-BHjV4Wfa-Tg#ZUFyKCy7h6= zLg(h&=KiHW65NfOU7)_fCeP*P9Ma2$4-Yey43}+Dj@uE@7+fdQ zM8^l;f&IB8fg9X9sAOm2G{MJO*dcBM(jHkm!>7C%S{*{DoQ&ut#f!Juej zny{s31^a{Hf9p-X)WAF$EWKZn+3r-`zdUoobJ+A#w-Qe>>lmri7+bb$+5M4(op(Eg z$3yJn{lAXV(k9%Mf1!=Z9f^*{k!>15MOkm9_7>fHE1%}|8MWQPdFR1s4q7sRO~P|9 zkL^UmsFTj@860@t2@V;y_kA>;D!l$a$@G;wc9=SnJ3+Hl^=AsmvlnlK8czyi#P$<; zc`{<=D9zC1j3Xyk;=p>9B(`#Yrn^byVS>{kQ-%rgE}dJ79*wgx%W z*yW#lUmnONI5l}G<`v!M{j#a*PNT z1WLR8mec^xQijj!5~WvdYHMuMCF0pC!9=~;bDz(L0~^~Xj-47)tRL5_FeLsS;apev z-NP;O^NZKedb0Ak#j35#T)-7DHY#MCSC%PMtyIDv^*m8m)?&|;G*dSeWzbZLCc=|o zbb65jS1)k2W>VmX^?9I}o=thP?(^l+VY&zyXaVia!*yiGYaCG#RmO>iRZsmoo-HIZ z5w=>8lO7JS9lHv%1#w(?8B%!p4(xWEp)=bVZdq?v@~PxSoXB(0iBkI5&yRnqv7AjJ zGD|7F?qq9rt9f%zB_7n~Jy7OM``a>(r&cn}94-9QcE{b*@2|>esVh0Q2Z!qMdL|MP zfryK`fM0m>-2BMbVD9INa!EwX5A*c#KP-mi)1}$(*}Ir*=}vsEIV(4)p3Y6*o%RZr zD+1RIV;@?VsZ}g!U+CkLC*U!*iWtCdM!E+)z6+h1X3{>EkE`6>SsA1L>h8`V2tb?_ zr(ZF@--@wL!Cyf%u*gCzQ{O5(wi?zu)&vy-Vhlcui`?vW2vbg$%*I%1(j1nuafw>2 z2(Tee4insC|Bs+gb|mXf*THPC4buIr^{Kw5kgEGyM1)}Erp$GRx2>Hlfs7piVHqcO z3aP&X+S-}C-hBt!rO0;3QRt=@w6*E@#m(=Jk%nl4Y{z_M`WIB$Vhf45w4cNHj5`15 z8O2o?8bPKuqbnl1fLuV)v7r?**1{PXI^GUl&%0u70#QLg@XPm0E{Zfdv|l0+9{x6Z zljiCnVyY!8lym$PciTa38~XFts2>3JsA53$0Mj*M#b7fwz1&6^g`QZ3{r!XYU5}Cl%H4EG*nJt1 zuz#a-B{+p@zY~_U{3IMp5#!@QGa{xTjWT9)%fw>AlWbUl3LzHHx)PT*{q4C#CVk0k>(e_-?UF83lo~pN? zaX%(aXQ6qeILH~%*dC|QdNGLWg#ng{Y8c9msYj6)TUB`_@w?JPe&2?Bi_EeL|Is0Z zaVBr_Za}@Rbc*ORA0?`ob=C-?{nk%QgkNO-BVhfl9}fYcMOfVC@;I@kFvYTp)n6`- z-v-S$?p=CW_5XVtE{NvcxMLi!tR=@rcFXG4PA%_Lh*MH-3UX}!l?WGB5mSb_?6cog z-|qIQsCrTgg)65F^?eI80HMt$Df(ESUYUYBvvi&fVGTN3(xn3<>eT3rC>d$6l!iTK ziHh$l(B%j#%AsXG6#*-?`sMD4B-+HHNhtNonWtO8*>&}q5=hC8f8hsRMUH@g?^OVVF?Ki82=4cuf+xeM?O#Rex$~G# zcDZkPi-XK$A6Jd5wm(9th!D_*HYId>1e-=OMYBlvkua7p`eb=LsyR?-xK_sRg;%eA z*<7)T$m8OuZrKbvp&;YLMSUI1op@P^S_vmZ>Xl-FlA|3TYD3DJRrCgz zMGsyTrKf%l9{i28YCm1RnM-<=L9010`<$$@h{oaR<00jz;pEE9l=^Unn|!?XDj!Y? z^UpF>Up5FY0kc~9#aVAV-_a;ll&1{%HJZNqkHcl)j_`wO+HuUXQFjmp)!R8?I;ElK zK$cj3dA11w9V?1?}(X@E}{P0Bra>^-h z_GAf_AA>JDv?`#68xy>Y+w`b_P={8#(yqZ$w4W3m8$kv+|aQF&K>P$6;e?Y7|sW+ckm0O%su!4 zH@W=O`Otg3K2xO#^VQYQUJ3x9dlwZHa( zQ%pSc+^hs_um2;+#{vDkEIJikaqDzXE2IxD}=At<3GcRuN z`ebPqmfDjxMQ@gDRFd=+UC6w#iFp++_TGVy8mc7PJSHx)NIt(UNG2eV9E{}P%NQKk zkT`p^)&oj{l0xLlA#~6fMPVR@9ckbpVIj|Xb)ed1#$nUcn7xe>+-`N3RG$XSGXIF* zS!FHIXIOl3zZ}ysY2JbhuBvPV3-z}2nQ>;CBxH~icM@#AfBV=Mlyd_TEBI<(_|?ov zuin_Xxp}&9XxZsu(&F$pA&>Ku>1(N&j+xH&RdQhMskAz+hp8Hw`n+59^OsF_u!P6= zP(ln(XA7tg6mtRG;^F6^R_ZhUtyax=c0VCXe;I_X$C6HK3!<)h{&kI&cqXPoNI%dg>SUf*osSvvV8w1Deu%eLd@p z*Y4GEMly<0E@(adV%LtPh{bCKv}4k6eW5`q9`a?L!mycYtrU}L7F!hu0^-N=G1}{Q z`$@AqQMJdS#g@{|l@xUbUeJVM4~)4 zgvxPoCtY%_^b(~anda4;si=Y%2g;z~;{!32Tne@x)fD5Axx5QtqMjgGtgO3bQW%|& zAy$Rv72+CRcP72*$qkA>f6J+_89%EJ#Ozu~odwun9dmqvtn)jRz2uyFikwD-DDbbUCCxl@=AitKK+CH{ioerq%)|&l z=?Y4Gu(8%?=xTfI_O3XtjaRO@oG!O$XXJZQO0YSeDYho4nn!7rBXiorzw|9C`c2Ob zfHo#2ORr^AYnhFle&<*y^d6z>Z!2|EbIawX$c#~s2cUkogt!R*g6cFZn^u~B&5TH! z6#ARI*7_m0kda=}Ijc;=@QRpKzR@HnII(I{?^8q&=c7=wo-j!O&`LoEVZlYB2iig} zK*Y|9GMJsXqKUH=3KMrZ^JzpP?Wxx6hlWzr)MobVwR(1lPV>*$lE!AuO+##^bbEts z+BNUItM0~HtRgp%q-m$y&AT%J5n!$Qv1`_N`?P&Z=vc@C}j()Kg%eI1#NHZRVXjk3gnbr z{k$^+i&ZnLxac?mb=aYWuvt&am<)Di%a%Uq4NSJCM}Xg;SR7?W>VG{nW?Zsa=+08? z&bB5C`+T-^c{^RxP%2a_GjO4P3D-}xzq*gO(BE_d*S%&k9e-@Y}cW`dF8Pusv&N5+nvRoaZ}zUkn`fC zwpoBmT#vb@H(PXoq7#K}*fPzAnXLtL0_3cgvnHJtp!!jjJSi}dzAMG`6LFM*(Ej)L zMro*ju`%pPo%^stn=aSDT|+x{vC4NNZrsL~;S$0FOaY@K>LfCM3os4O2Y86N-nJT3 z16{R~0eT0EKI+_#$1)oL`rE zO_2ucUo<;08VE@9cseh#4^qKCs_fve;|@Ye`P3r(wu4Wf=Qj*DLnTL_x7&1I(?nl& zb)A~R8MTbF>J#%7%cXKSLaWgTjRE`S2)?0Os9~>czPTSO&%&SXma56P^vmBXi*M5E z=2lw%To*w2Tol*jJWvgndY?WD3`p<((tmmyerK>!i51U*0nU)SU^wbuOalA|uD?6G zKl0qbwU0DoN}__K;kwpM6!J&=S#F~&MMike+dCjJ2+vJ9#CKyYDOlqZL>Y6e4cw1B zA48pYS6OiJfess`Rc-cYD_zz#v&JbrN2QH(3fSyT)9;V2^-F?tv;RaFckAh2Pxgw6 z{Izl+){{^0C-m7sO7r|W9B%|yo(k5BqVP8S^hisS>31*>`lPElh>9Sn2=dEf4US(q*wP@+2dK%U1GmD ziB~Cck@oDRCIJqFzS4s0kNOj4kFq@9*~ypwYz$w1nn+8nxe^OWdrHrwzSH$lS@Z>g zLw!L|F+16%bk_!8kGPW*l6T{~rciOxbWwU!7AAn_$JJAO!i!!hML?KmgBbux9vm-- zor_2RIXowIcii6T*|3=OV8=916#!N3c5)WQbIWak6$g)EcKVH#iPWucS(F>)@4OIi z_qB6hn`og0uIZ&a%k-=#!_L+urv20N;%f(Uw=Dw6*Pq4qOqLx4?V`$5B8e=u#wHTn zsh8iT)~8Jf*bcIlAo;LKxu{m@_!W!A-e)K4X4$;T(w&+chTop1blvp{+6FHDeH9fT zCVPL^o*xRGgsI)=3?<+d8sn+;*MUP#tf2u4e@&j(&9i(pS!!~p+j?1NRj!7w|YZQWJIC2Ul-+AAW5rb@`c@7M`(TyU_}Y`Ks{{s;XK@Yd!+p7g6^@wf4*P-O|W zif8`LHx0vp;TvY3ZrN~YC|Jb#b^P|6qJXPxX4*Q|-a+C#qxbfkr-L{Ds=hOK<}3-- zEg{RFrtFy)0?Wgm)DC0+;^dvm!TMdnSxJcFyWj$dK#8*vI1!;BygF`@`tNm=bO}YV z#p0U6Y=yT(Wtsn@-|2>fg7@l}%PjF;H%0z2oHt*g@0tEW0NCE|;O@>_wpqVJ?G<#8 z1Va@H^M>|xIFLD|h-!6tK~-ThRoy+ZBU6i&O_o8i3jp%8JBxhMU)N7qYiLTWJQs-$ zR!l)v=-=OcvTw%9;m&_?JD|fG${>Ctrah%`A+qFGCCS#f=e1-z%*=Ge1ulXD$E7cG zt76YqgH0*QP5q&3j>94QwD6wIs_fwJ#yUBlga>plhMosy=z*tuC;e?C@XYxeS&4@bl~qc_)R~aBj*ysM_=atg2&KeNOO-3gT;reO z5up$&n?BDMq=G->4w>r3JrfqklWyi@%wch@ITnS2P{88$}BQYI!p$h*Ic!;n73?Wc$WJZ1hyaX{JA)p^Am8RiX&6OAM zdqTMKAi+yBnM}$|(fWxyq?<`=cFHfj)dBs*3R z$xZ2E7ET(Xj%b>2Xw;$Sj7+Hl8SzgHFlrr#t&n~d5vJ;aZ3Jw=A)yd&OJXt z>HHr_8q0FSG0DAIw6li}CG$m+|5&M!4~X6U=ASl!Ipi{B-p7yUs_(Akq(Yyy+vyWS z)NmE+LY_UlSOE=P9^KZdv(^u5xDtJC;xjjk^$48^?MZ~`)Ir0wy~C3w>%n*OB5oYL zRD$2XC(DeUzUK7Ga6yCW`X&?2`!a}OYQ;3XzqF9fgF{zEa|I<7!X0y0J)ya7e4IH{^(zu^*x_*xJ(3eRIl{OxJK+eoMDPI z;@dy%#BFYvq5a;g@t6jEGO(2%rm>>*ui4_xXAud{138ABynAhRvH@j51+FRmj}mW| z#>Ew%njiF2|sj zsLEr}E=&pC^KQFm8Z?4K;^kbC39gF?&tf7nocv||dE6#lU`#7Ti%RmNbvfixv2I(q zmM0a_uq@fy^ja#vr3$5rQGSCa!41-rX+vG-NhB$DiB_=YuluvVLfXPN8VC|4h1LzlOBr7iR7s5msF%zBjN+QzbeMfi-1L`e^bThZoY zfMNf$BI|BbmefTU)r62A81C_sj;`v#b{_iGn=-as`P7!4X3dmL@jJ#3ch_6p90&AF znpdSb0z3OC^xBeE&(*i_{mj+$t=g6vBatd7FZqTKhinIY26>?g8@|ikVg+Q9+0jT-z+ZN?60H8Qup#-hDy%4kbfDfGlDWK)XO`J^5iq(RC( zCW9N6CYP8gk|nsOD)T&49Qv)vKYx6&oJ00@Bgc2{ME~}oemQ6@tWSwyaizp9e2tuO zMQ9}4mmgw{dGa)Q@Minu<(nsD9jM^BEebsK`0c~{*Xnou<5&`+Q^20OUIuFP zM{B_L*l5q)Mr9HVhwo+6MS74Gb88g_k+l%Eb@3Hi6j*Sw8WlN8>Be=yBPySH==r8{`NyK$;F75ZzH#1xQ^phiCwLGQ=Hi`tf?^eO_oMjE37>T4 zW&SC@j1V4YyxC?(_EGW-Tdd_;*Ajf8`@$c%!3!?l%M+PWB%6nJE9;{ixW|<4tFFs& z&Q^szllU2$uxE&CbJ-sB%vt4Hw9$%89(BEWkGoR^k(_RKfzs}=-SHHEj{|5s4*~uZ z{W4g6BCWGYQT}$N$(>e?kcvBB5%C~Kg5r?mL*1~)pME*orxe>eC^|efkHzF!G8J2# z5+y#+o4j~a*@+??)M-m+aPPsc1h0gfKt9oaEr>+3-kHqP`AbI5Ks`wT?QJLw*vT2) z$~d>Q$2`TD^?1@*fqfpSs}?&0-g?XM`2k#G_R+Oo-q6tYraIy4*(-;-fssy*$d`m? zWJ^85Ort)Rs602*g!0hf33znxTtNR!qB{0PoOe#m>}FT1;;TY|3UeH!;u9`{e}oU6 zX`$T$J0}k^gn#aCz=+@E*s>aCpw6>|KWNwa;@mlb4Ph$<#me(G&B%qfo9kZ(6u<<5 zgDl{sj?Tm5E2qZ~1ShFqBYTHm5OTd_(Z3gx*Sy^x3HTN<=ALY@WWbDscf=m|R*7|r zxf&>=72LX6xphMAUr%j^CWboL`xdWqO}(O*Tl${PMHu@jZqt0~Wav&}S_2vzin)ZJtRNSIYJ*qJB$-tsMdE6-r z<^9zuZpfE-+b4>hKDgP{+*(a`B17|+avu%HF@WRQGP8B_{AG~=k>q>lYmKz{;QA*Q zFxS{&5WI`&8w`EEpMUosbAN9MVM|^WojeBJk}ehRHvT)c$kih?=a}aBB3Wjy2)h=t zeU-K-|0#pBHWl^0-qbLq(tw-6*zEqbe^>{Iw%tMhGvm(T!+ZoNxy`B41 zP^@Rifl!;sC*N(bL~-y#r?{Zwr&H%_F|>{CPLqaU4+&jcX#J9v&i~=-tpA$+-v5t@ zf{03oOr^V}K}A|XKsqMv=w`rR(hW)~F{E=$Vl+%zTB*tCAs{6i2n-m!zR&k>pP#-z zJpX|0cFuLqxvt0K{*dnQb~-p1o`vt`rGt*F=6kgtjPt)OPF-0@V@|3v7aa4Jn_)1) zH1nRmwJ(ntO{`U7DH zV%%E-fS`-jFFe~tB?-fmpGzy`v17Cmjud4xtyq`GGd84kSSxwVTq=xNW zoeL`bm*!`R%!SZJ5!_Q(rw<`R!kjaZrAhaLs$s@hDbzivk$OiRsg*FL#e}uU%Gg2cb;|oR^96na_#vy;%B>VG}BK<8@4N z|B!(iGh}<>i8%p4Ol~({KJvWvjx{zJ#_L;7;&ELxk(FlggekF?v9UnB|$bX*6A1aE%rX#PG>0E!@O)3)5xzZ!HNBb zS+3DY!x)ZV!D&5?pL@Kj4f$U%CwNz~8AJ5x)C|)a?MFbg$@OmY*ITMVDZXYdjrAS6 z0{+#_7W70}a^<06DKDU6UBB(y{q*Zm&}r@N`h}-${=u`~SE1b_54I6wZk!UoBv0y#{}3549WuF25*_f2#=!@dZ*6s5(Wn1qLt@<= zkT)qO3NXxab#%^jh?iM)mGj2z?eB_w-nEyF%8Kje*5D?1&zW%4?a>>TsW*Xc)= za>|pKYdeUk`v$AqEj5Z&O*tO?D(|v|L?&|s^sQBpb<9}y(weR^jwXd|59VO)PN}6Q zQg$^L8`uUPLj(eE`tH<8AD52*bdfDR!3?c;r(Mk+5WNjOd`9q0DQTI)&q$%Dp5t|2 zj2{mgUyilt^Sp}*ul$y{QK-?@(5@nGgrGLNs0b4>*QtSqtey;{Qo$VS+EcqtM2Rw5 z1cuVg@?Ipo4}PC4y?VbCJb0tS1~glHL?da|(T@HadJ>@TxM3|YC>7LuQFcjHFn9Py zOZhgG$%Lp8dCAqkD(pGHLDN7Cj4tg64fz(v-Pl!!-E$`gt|3QEqZ!%g?H-dy$=TLAgU~;G%pa0 z9#W54{nspf`d%OV&jhVj%C!vf38ZKhq}lCwTUl$`32aE9!ei)Y4a=wyPilx-+BMs6 zdgZ;|xC|h9wGmI;`3JN;5KStE{;424gxEgtEg*yM zhoWUEyr(Wvn?rn(O$)HP*ju}ZSwhpFPs0=f>?7pL(zbCYUeW9a$`q4iHWc)51=N>Y zfKvqwmduW+##l6n8fp(rj2^*wk-)Hr7N%Ax)g?BGta00K?9^>kxwp90bmq7kb1AH0 zknB+J*wh{Z&;AFB13&DNg)$v~Bo&;i!=AK|LXjk$V+iT7U~!1Z&zbZgt}cdpfd9qKro3Rvw%T!&&a*0WK;DTdwzA1jAE9y2T@iTX@AZyO^;akMhkpd!^*9r|YzldHh-o)|Pb?#Cg)AiwYGNFguACZYmC}`U{TNfT2wrw+n=J%1dKHU_5rG=+LRg8C*MphSs#Wd_&o7GrKBE4-=^8w7 zAM)?1@`RX3;FS?XB>k6X9wrne-u~ERg1TB)U!ESt0C9AS@*Ef?qO5@JXr)K z^xk->;I=nzzVE<7QRe+Wk4+}Th9I)BaBA+EFR-8IotU(uB9Fr;F$30eRQJ=JEOh4(Fz1WV0s~&?cZv#4m8}|wF zFcYF2Bg?mDB6#-r=c1Xu!s&;J2#1^>w+#l&xt4B(bwX*6 zccw16FQ+k$iSESK2QBdH%*o_ zr}%w}$pEUVwGrq%iRVVe9>%Q-50mYvW zE;zLrVyEX`5R7|O>FSA1dumWa!oF4ev|~!&#b>j}(j(z1L8fBePRwVQ%OZWaV!irI zh*8uc|DwoYqCrZsa2Qi9Y3?_ncddSxf%)gaYAZzJMB;U{_J>jvMPv!kto8H{^hhGv z2T zS7}7?c^1cso-6RgV5VNtyD;4fByu&?a~wRAUfM4>J!W`sxFvY#sA#V#>N#gjRWl`2 z8_Xp33`f?-(9(iwczF%;-cDZ>TWxzq|IJM&Thv}lc4l|rd+W>p0{o^}e{N*we(h~+e@KO-9?SsyK=udf2ynls-1v9P=6ZW> zPfliMUAsLy1stONvUWwz?Ar?;`ihl*sKxzXiT$7l(*IE~z|7!r%MUI=Fl!=^Bgoc| z)B%dX9dl?J!?aY0>s3D_+e_CGVYU|yleVnTq1r3{twg?7yaPN({N2eCqBhglo?cZ14I^=oLj{P#lfeBiRD(9d}sw)JnzOIq} zbm`Zr%O@5K3tQvP4X&vq(J22z`*#%eT=Pf->teec+g7W)v(Guh7Zc zt1O!RD%S*IY5tf=#W}<&JtitB;VHe`Ev858_6%nRfHEF}M$pb@ueu{~R+iSd=R}6u zz1jzw<>v0>8~B@I6YSyEW|;4PzTMN}x_TRx*ektP(FsfqvvB68|50RJ2p=8QR=(*d znleCVTeD#;LBC?-F*9BGE1PvI2hTYR+3CJbSZyj^s=~XqC_oJp@fmCHu!@Rr5DC4; zalh%(G+u})1>-SqJ6^_1`MeL;|3G~hwhv~-)s-n8{YcsSMgR{>VbRi z+Ppr!mT0`^zjSALX2f5amIy`!c9+;t!6e99JioTjd0NxnWyQBMvz0aWpm<)xYcs<< zx~87z_Rxn2?I#tFB~+8{r?v86_{RvwuG4QW>x`%c{MQV|5r;_v)>FYKpCYUJo!UX% zdP~JBzUB`3 z!$T|r=UmA@KYn&iNZfO8V@$Er&lWM93H&JQ$;ThVE8yVWZcFi-uV+tz&$92scHIER zh3X{BWI(4g5%O+w{HteMI_38mo{z6aRX=6keI4CvpU@K$d^bt(O{qY<1_H$D34w4s zp_b+wESNLZ8(rmJSA6-qDh+K}elxkKoL>u9`;X%5H297XW~BykzlEe@Ut|dd8m{vQyFycJ!4cc!=!4Aox=FN1G#1{blUV1Du2KA^wJB#MTR zwWN!%eAiQP;H0y?9ATyH-cP|?4dcQjxGRED&?W5PF~4__7JV1`~$>+E}PRf61I-?(^sOZ@<7Ixt>s5p$a#x9MGEBI#t(6 z9IA(P#Yhz8)zNeCRAD2fvJ{_l5fLv)_jC{*+~j5swg&v8H_smoE56VqIVd)2l2 zCC4fie~op-g+?i#yZ6BH z-@?N$+5ep=U0Lz*P8}q(T$GtdTj{6BJ-uq^fw1iUMeE4;4{U`rY@9X?^Ivz+&XcK@;VxnwpzfN{k+Y9Pn>T-FHe!!+Tdh47!F1zI8JG{2TkV z!B(#SCKyuEv*ujt$YFXyO7*~D(?8o+1)f|W8N0#bE} z(%VoYKPSAE+<3^FbK0Z@J zD2rMulu+oIk#3I!rX4*Q+%7uPDFT*gfjIR#hYF6^)8<%x8UQty0LNLju((m zXOnwGam^R(4->!0P*fts>a>wi#F5wat*O0F2aQu-H1`kWL!_>=`T9({UHYjtIua+;?l$ES5l?|f0+8-$4V!m`v&S-PVQeQB(!+H4Cp~OFqQxoV~*+N z55HuYL6rxM-_hU)+xPoJ%l~8(z!@l_=#PlDxr=u%`wb%Xn>z7pw zb_r4`(iCrRyfii#WT*Pdpg}=9jQKHIeQf0=&1&YHOG@rDYa=Gv@W{Suz7bO__vd$| zwz0FJc;{qBdM48UXVB!BVHwr`z&NQ(T&)CUZsZ-fnmU5V{gp%qTs1njhr{VwOb?oU*3 zmr&JBR4slG`=G&p@b8@KO|xrO;N!FY8;BR0G&WhO6g(nE zYBjPuY*Ido2njy$oyxJYXO;yOlve_02MW9vCc~CE>J8xW$+|EnNd^=DI_5lG^I3qt zttF>ds*UF6A2;;)Yv|q-!p~Kcrsb9u4~rVK{dS#w6NQ5J=KYYkO^H!1o~qp64K_R( zhYnsl*hC#X{B!N$;brJht+lDmqVP{RIQvuB+-0u?>NxdVsKC$ppr8H|_qNCfFS?3( zN~)kBf9V?(e%F{$b#2&gFhT#b`6V4ROCrn+7Fa0|`QzpfvI74gnM$3vNlVEW9E`nq z7Ro4oBq>_F97W2h_sN4Q2=pvAEsIbk^gOrTA^c4Fk0LWQyPvC$!Ehchk_PLKv>2!{ zTu}G|;RnzDzi{j8Yw2o_S(r7e}|QIhC(Z0Mp@2$LdOADXF&HK%PAO>XuHN~+2CjSlWJJIoLL za@|J7CQL!?`znQ~*#iJKva)=x1S*RkG$6`OEB9VeHoum>I5NNJ#oZPCUNFJ%{Z!Zh zs4>H!Fvk)Vbt!K4bR;wPd#sCnvda2kx0Sr_%rB^yz_8m|L9Th>e@D52zQu!D(bA3mL|MA z)TTby%OL-HZAAswm)5qjwBV+Hr^>b4TSe~-aqm1me&5I%p6|5~&oUd|ZTi(X=Wyl8 zjl(9@g1ov9H<`0@;PD>o4dC7EsTIR)!H|&Bvd`}Bx4F4GS~_)JULB(r4>HpNWhI$E zoDRprBuVk!gj{@ctYW|{E`Pl%T5`u{t4}p#=i)Js9gk|> z9J8q8<{%LaESo9;Zv7tx*4Ya}dM~A}d%E!eWR(RYV(ypV4=$5tRSOYnujA4A`2H}a=eAbk+r2dOL9}a~J z9#t>jfck!GvuVc*OGhlUGMR3KKL1?enw%6t4Y}^xY9$COxjwRYg9@|D)L$@n@@9$Y zOuKvd)Ef}fwu$*YY3QnE8DjG1Lr>0diB0 zX&BI%bKq=aKgP~r{yOKliq6Z&YUHyzq0Po!!SW5#U4KRt5b`mS8Hm}(0!013#iwvq zsD7{f1$y&W@?eZ#ZYs0cA~d8woAv2jhj_JXuw#NQPkC|sMe6Gr1CvzO-*$BG`-*x~Y=xyu+A(^Zf!L`k*bCkCw*I{rAu8&w!&2(1!bIqAgR zgH;_?LYo@hr6#N{5*`ylDaw4%Cn27|s|fVJvO$(0p}E^gGS&o*NGS{@)VbeBEvRr| zh$p*>G`#sbhPS?bT6og>34n0ejTiOs@SC?6LO!}o`z!PfAYdSdSR>(f}1G}dI|RaTWqT?oN8Vrrc79a4KQE0xkxS+<0W z#7Jm`OLnkudBzma;`4nj!w*^^0aa74RK5(^k0PHGRr>Y@cFR#X+)q0C{^;L;;KYDa zp82Qod_Cb~R|ahn*)UDpFQvB+hD!=&@`~njNac{Dz=eMYFk0HT#%5mFMl;AkNT3Py za~HJMjIZN`VSQvkQs{JkHmme^-Hc*`Lt2uh-U3=Bfw z%!KXY$oT`LKk6z6HcfIREYYY>9jEScXR4xxtLg@B3m*uqFxt<=ZR;DQxvrz)mK)fY zxQRBHHT|0~V>Zvc>n_1NM@y_rZ%_wA1-&zJM$;pLjx>f6sVxb)8{3FVi!cUJYI!?@cp zM9R3bF2Y4tAwCx=KQP%d*vC3sk+W3o35STFDt4LzKH$IuMF*}sBkw%#Wcx-nMckUm z`LxUkcibeN#P0!=sH@$@fU>g9dLX?jwB2-;b@_GIbd5+R!dg}HCyYaQ&fRTnlu--_ zlGCi$=gWcE_ueG8C$xmsI^#K16nb@Mzs*kACKtyg%e{~&W^JqzNRjcNUJOixAd!Bd z;JeQ0BeHCiX?73+v+oWwUdDXm26@FMe(M~@+{IxBC+Rbd^8wg{#N*kEnoCA#>TxJZ zh0v=8x?e;>63SNxBmR9Z|LOM6Rq3j*B)yX`lciIO~*I2@0f%)w}f=LiA4X&0_rNzhptvNzu~g z$=_2Bv)s+oesKZT3OkGePq7VK6D|*xf0(Oe(USO_qsdx?*tM?W(s|PRvdYz#M%t@Z z+ZGRJ)*AyQpw6o&5j10cA!$pVbqh+vr>-Jc_b9CgZ=LZWAbKb;k9s*HtxwV=TW^|6 z+(NEkQO|PSM7_O*hJnMsUX@~D>7{R@OT8A~%U1;@L@I>kWy9e*DcHMEZMAB)VpBd9 zBryHQBpdB98&MzygkWVjocua~K1q2?3QHTb6R2u1{$o^DOa*_FERTk0%pEN4b@OW* zw!4d9;gf@V)Iex89SK8lI$W*)v&`hVyX%MKv6gpD455*H-QGzUwp`eHur1%?f_;!K z-Jd~QIo=eZl{jpC|5Ny}Xg7w$M?nxJ(+Nxg2(QLYCVj0iMpC+7yR~y4VVkwCecI#i zM#u8{-)Z|C4Tx|JPMp2&%ANG4WB28O#pQUi9_xT8Nf-9!MD(qPXtDC687|A9-)x1^ z4>yw)XQPW+)1*Z{medty40F94;do4p%Cd-_C!zXoD)1M_NM1CDY-sL1j*l#Cmk@|% z8NbDw{A&!>1hL3^_w@vb>z0=;RQ4;`6!6wl?r-*7Y;T(EY6_(->Rxe-^mV;&QR2+P z%{Xb0m*Y`YZ*!T|l@nAj4aoB%!eNhRmGAWuPWpmP2OgSCye7a9>@&5};)RPg!kL#@ zvrJi8!NsJ6B?E{%{bcXkjYST=h=xZW*aK7uS`+g+y((A2K;+ki&Bz)>nL_kQzq`Ff zihi6$S$>7J&6ebryx!+h%i`@r?XSJguH_eH+d4rLx&Ho7ct3qrFFv&=WQ1`N-<-J0 zBuR(d+Dm&frBl7MpQTlLzvzo=c*mpBw8I`zMIR6f2TfN)ry42?cC|LPcDRPHy$MEXQgEu3f%6_Mo(Wj0tn3-Yd;lF5n`p;;h^JZop(lVXHcL zPKeRe=(Yi#LjY|y)GVv5RoPUOu~Czo_Gf<^>3gmZ{2{)VSj-)=FY)I2O2{1f)wH7Z z+CBqJ>)=S?yhU0xdJ7Z_L}B7tRtSB8%A5sn2zx2$;^#qCLyjD=SFN|3eY4Yt%((TJ zK(|O58U%O@Oleh==9gLt$+ZVa+gV+t)M6f}TiSB8)}eGO*!Y=`C7JodBGXio z(Uj}+2zc9$>`7nAz!wI}@F8Z3gPXob*M9sqT`qtA`&6~(#~D&S!$n})*2K45{#THC zYLh`hH~*ktEh+@WO=S$(n5%J}J)5qaDc!9e&*QY9uU5sii5Sd!N9C-$BhlC}J^Wzs zhuh=YNnSo0@URejN|c?Pu;Id7FINMl0R7?nXDcZ|*OTsQJ{-K3aLn8A?8_P@^g1HS zzWmkQ(1snW*#_G?M9s8ER6ebb^}Lg0zp1>JeRQDinxjGwhVY(91x)LCH(N>-m`wgu z@cb!iL?*yjN}t+1Y`p-g@Vis;^D13-B20}4I(9Gklu$Q61eZ$dxK%!8dT3*Q#pf;L zCacWdo{nqB-b7H8<#V8VgKD|%k*C5lukCOpVstL@5luX!J9ZWs~ z*qk;JM1}<;wbf7;>!%x&y4t2wsK!N;@!Pw9_iEiZZh9i*9%tyVsRvXycjI`;bZp1J z(bId5i7N%E!nWx41ibk`a#hRI9dG7rH@K52d@*fT4CK;~->${s%uX=z&z~K*F!4#g zqibQ7!`#L^DrK1fSbIdX+Hw*ClDfG|!f$;m{czLSFMVGN|D`PGi6xRYoEwHnbm&_akG&;K<%;zlCXz~OJ%PYsZrE_EfaNH~q#rC%W z2}B=1U8b)=3$~|Hx-hmqtdX}QSsX8ei4(CC5smf%2jE_sJ|>I4<#y+e$xBOz?0;Y_ zU~d5-)!iC?Gy=Hg9-KyBs8qkFSOQ(uc1}o7?(f%Ge?07-8iwt?(BLNbm6KJ(~Yuw^Axnn>1QPXlLVEuXX#46(44Rrvm#HuNaH!^@)l#RaWBN;| z%aq!W-6P5=R7q={>wGAkUUTcYOunb*x}qbd1vEFmIuX^O1H5d)Nk;y_sdx9?(&HKO zja6N0Lqh-FQDbn#A6x}7CEml|op<7e@IJ>h^W>I2li14x^_tw@l%!tZeQl4Le>!EI z+LHyk-X-$q1R*r@wy`B#Q5*>&E-qLP-(T;@f2;ZXkos>x*0X4J+H2P?s8v=FnA?DO zAZED^)k7Nv(m!3P$N;;;J31qz$5XUy|_HqRp_}c&Xorszs1K`6nrQI z=)IKWIWqUafU2B|l-s?`gmKWvmFdT3gYS3I!yXV7H}N;~-9A`18d^aCb9GmNa|Lce zO-c-MwqT(<6J-%S)|dk`-SLD#i6ejn0Gc|eYo|gDEG~bT3Z9|qK{DO5$s^~c@5!KZ znPbTGX38yd;{}1 zu*w<2TB3MR3^?<5tLN4A&wBE;Z|g*N{3Yk`Vs$;XOLs*&1rEzu#%1$4wJI7k4pSuQ41AqT zN4h4AEKfiKr=CU;yk}}wc)HO-Cf>I3!*jg5A%3hV^>qtEc2@`(^GxCc2g4 zUx&`d(4ef+mVY+MrRAV_q`yYpw%5$#ag=0`U4tG^mMC39;gL}4jv0)HDnoGOiaKPn zm{po@(!l)?&#R}G2E&C_lHEv~=Qd_!D}qX|O6;sMP5tx=>9I3W!<4|AtoQ_vUCXL- z_GKtYx#WP@2w+SiawJ8?XOfUKA{9Kyq00w&NO`*rt)nUV!dYQOdX^plYiqF@UaVmi7Iyw*! zfmv5W*}AhWu;IBc2WKr!dcbDUO#=sBNaUr)+r#<%Yd)U#yeJ zMXQf%u$kcn--PitwvY}hAx$6}MNZKu-GbC3C8x(VFczX`9OGtB7}w7!-TL||^87&i zOo49uEcc|W!hVDbvoz}F<&-?{ZZctG{~Me-jCUDGNmS+s$0<|Jc2SU@)ng$WfEu-ZA)a*S%O>Zq z&6J=)*-F+2<#&oPsuPA@>b@Utouz~oj861fd9ap?9y?t{zmnoxeN^2)L2ZbjyU#jZ z9@jHxgtU=}GOXkc;T|nn$ioy@LVY7pv8iN%4Jjap*4v+fUmYPJE&d7aXh<)vC7)4o zFrB$oG9S{(fO!CS6}jyV-PxLBj^w-1g5#8G%#G&^(MKgdK}qk^1-|z(8(!%q6MiVO!@Ff+ zTF9;7hXuV4Z1;NQii=US{F`@pank3iqZwxPyT1D1L*_7 z6ER`bBp^ho7yENNM?LvQX?}LxzR;0EvO3@8l<&Q^W>n!NEwuVrmZV!wD(C~1fMAptjYTnT{6}F@kL4J7ovqzDxw}L?UDuH&XD#f& zzXd?akX^T->b)!D&7pXmKp<=cXc_6QPTbkKbVrxvmszP5?*P71FQ=;~LcT00_ z*XF{-7~<6!+AE(FZA688YOJN|e3MPKrb_oX)g?Bw1$D=@MYiVVI&Y%B72JR^5C;2| zoLBl!62q96p-u1y(EYx>mE{M^e|r0rc|Q9q+3p`fR>u}eOwHNq+%0V%EC&@o%ri4Z z18NsA4vd$H3wulsA`Yf1Y6Ko9gZoaty2y`>zFv@6u+egK;|ZjbYx%fjHk4+LGk5gf z=tye_O1_K@5tHppj9lHG-(aI0ERS5Agg(*c!z%8LVg%nbBYjbRB@Mi$lEIPhJ7rCfjugZfCwJlyK ztr}!!gxu)};@#~e6dwzbWI~bKxWIvY5iaZk%Re~DB1>L6%8+L!#jJ#|kaM?epOxn0 zMY%ysj1-qp&=5-NqFkAWtW-zXWu@HBCej%ZdH1x44|G*}5LY@0&IwF-CyZ^eg^s6p zRe!BZm_!%xAu0w&O_|PET(dO%Qw(uy_E+4;G*K0P!hW11V&xD2TIGtPiC7jdLqxyr zSEz-ED9!{a5dVU{vTV~}7-Av3{m(k6;Gsjcz<_CnSN%W*zbZ{^|0*yvf3?QvV_3R7 zpRuhsd{0}nI22n7?|z}kT}?{t?YiID)H>COxw~b65~n5^5*ltcHVEYIoBuX|QnLncGRYcU@zQxo8GJSs88>M8D)rdUy!tE;Q@L>v-@ z`nxCO^y44j>;6^2JthtGQ&y!UTz(R6py;GI;!@LJiCg*>e(FDpBG0%>&_(&te-v|T zE3@ImDg7C;5wUg%0~w>UoaUJXUPUAuQ93Bki0+IH8?^#8GZNMK2^o_Z=DwPPAKKeA z;76Ev_EmcVW|u}Ph>bLm^hg0fqzWO*Pl?en)xM?g0xe2dn{w@uU@rN~4rF)WCST!V5%ZBKx~f-Rwq*Uh!r~q4SbskDb6ZFdooVLH331CLaa_4i^ywS> z@;wllF1|*#a3MVh z1plNFKd%t{iONdxF<(I=Q#Zshg1TL2;;swRZP&m%zLsBg&Wm1t)l6pFcT=D=xxTW; zT$Aynepm2y23u~}L9q28GFzv#{Yc485%tL~qm%_Vvgk6gIOV!EdooozF~Z#Slx(VT z3n4zk6x;w>FpKbxFq3QK)}vrC?6@nwy#F5siTf$Kl9YaYOmaoKVqct?wEVn$tmO;+ z*?k==p$5EY`tE56VVq;`3l-7SWq)9Fd~-XODoq+uVSF(4jwzVJ>Yno8U~0tz z&Rn=NCet-&WzSx>zBy)cTqv%8eXq2|F?l0>RQR!zQ?S?@7vp~0t;xtr!?#?{=}s8WY{u&71vX5a0ebn9*T zqe_;cJCs~2(Ze6Ke`9|SlIdRrQSP4NA-N|${Z-Il6M>%R?3I--G&T52d(xxrA_FNs zAJI-TlPy=l?C*%Kh`Yp_>3Chha79@9bMnJR^=kyZT>P&ARR=e(8mgved#C=uw2Hx0 zr2(KxWl{+9RDLO{_;zO*C$?5;L+$%sW7=8z=+i4D7unB7)q14@Ka3K~4MiR#wQ?6H zr9sM1IPUVGsaoVr%H{nbV=rd-hb5DW$FApiZzSr>VwYxBK8I?U*41S!S!q3NjM-TE z9QB~;Ym2j*Qw*Pe&hFgelfQ47nQY0*%PXF-%92FhC^RkWJD+z`f7;yAo`-Hg3tmon zD2{|kR_U;AF=3B$N>?nIlcM+BJsyvgs3ncDntryn*fQlYRMDoz7S$o6b3tvc9U zdL<_%Hm+URepus5|Cnk_f)hgqY;F)z;}z+OpRaybRKlAE9o{FSIDhoi7tIU)YezvxVd5TVjYE&u(Vun zJ&_BXX?;uN_-S;kw=|B^|L9{L(2iaAhy}r`bxX!y#W-B7k2<_!8&7qS7_E71SKp}L z8EE^uLiUY_aWE+MjH8YSw&4K%5OFJRkKhr))s{M!49q^;ca3+RHh*LZwR>^UHp-=U z>+au}*5)asCuf?coO!&bh~zaN$9pf$1W}p!^WQycC`U^wYMWOBlVDne^1i^f{qS;D zhU4Ng7kS1Ko~d2wmt8-O%&xPh6bP50+~KZD=-&=%US-mdC*04!_50ctC!KXH-F=hA zFS^*4b?j24jkRoSo^rt2!xX;`H!?ncbB0mbSIRwEr>-uY+k)qss(8UyvXv=G`2^}q zs>c9ryh{qp+tS!XXllSS1G5+lYn`5L;K}7p8P|xk*GbV_P27_S=4o}^SSYPwy5bNL z^e~gE`M7wskcDPL*5vm2hby>Uik`Yn4<8>rG1=e$E+sH4pH48Wml9!sO^v2Y1*To! z?kXIpjwK7z#-kcTLh1BpoPn&h)ZOZb3Tlnb5x8r|K=e#~@^5s4EWLWtYbKzn@1)Fj zUHhNP*-3DmTh(eopM|}gBBu)HH8_}fuaggSm<k^o;sqqQsi0yM z`se!7dgu9B45fmXlI(?&La2f%N#^|30j>qiRxi|}RTWflbEPw{$?z;QID_{@tM>Rj z?c`t(reIwHhzFK1v$J%yVzk(gTYKZ7Bz!jS)REjys^0YbLy|M|;FrHQLr%y_S1AVd zit~J@1Fuz{4EWAs#?{!_Ly{1AC;!-w00af?PKYI8 znnsEBOjpu;Qkt11EmXzmYgaV(QB6~}ft9-I-6+LpDW?=E-r&i-V$Y@sz5NGIL!VP% z4>?lTzo*@;7$$K>yvbr==E%!SkxU0qmPex7_3r~I?6|$ic%h?YHofV+d`-dMHaJyp z=I@t}>M43zuHOr~iNP+<*?%@NBpUHTGg<4+MeNxH(+o41(7nTLiHp4No@QbTe>+uc zdyb)6;oacid6bSCz3KT45<)EM!|iK47<$0bIrhR5lcMi3mN`k5DaH**ctzMMe_6Rh z2wal;Bd2(V-P3tkS`Z=reL{AvU=l;6;-(vbwIQA2H|sxg$G*}P)e5=?j3l!PJQ?up z4o+;TPw9UARUNqLNldOoM*Zo}w$U{adg|A?t`eN4W^npSt$XMyeXRWhU!3 zeFUo@R`uck5%!j0P5poTKZ=APARwI* z(%m@~X#wd5ksOn*A%iL19nwmT&e7ch0@Bj3N!NzNB=-63d*gpy|69M`jdTB;YiH;E zis$q3^hp-mtXFC~uob%%wNJ&p>fA^MJEY33zm=m@_G$`3xtO_$;64ZDIC&ggJaQ}0 z>C@3-+V)o$>P8A18!J8tI{JHYZ+6IA!c%_em1lb6T$>ws^N-bzY{D(naEF94;df$l`r2DFDDL0R2hA}#XCAJ2VC@0r=V|-t+UMFrHJ#%euf4LJ9nFgLCw?4$qk0LLY@QsnwzgX9-E42m@$XY|^!|fv6|((9 zccL>TIt$x&S7A1?5vGxdp9M>C?J$Z*C<=n6_%;-0-NoDlF4~WGyk<*k7ME~_2J2pN zRv!%8bi96ALE-f3>e_AE!K4t;(f`CJdRA{KphIbQlRWJTp21)x3Qxe43$v%X4HhPQ z@Fj6$1N&WeDsT^<{k^9=`paUR%qHxPqMIFHhugFjzN5!dfnyEGSCd#=-P=#8)lhdt ztjp0!HNktf?AXB@&AFb3E~dJjw&n|vR~1jy$Tv?c!hGNt880YjtQhWGim~nkEXFcJF~#Xi2TCQfbTE% z{+~Et-V(X~Q453R8^8~W5s|2fs3=9__OKJoFdA)?_{9`yo77SZ{nijOJKv^gG0R%MtKo;A%V6=3|X#y=cwB{t14-FYXMy))DET+N8M zCPXphm&sM*!yz5gI|p=4fAT5mHBVc?nj2oo-nS24=%~AAF0FTBbtjVe^3Ge=3A#ot zTWU!@12p}QkgYA?qmw_E_Yut8AvS($33BJ!KyOuL)8IK^+3bb;il>ughDCF^kE~Y7 z;j1YbcVPqIME6|NLFFlwkd4tV>A@uOHaF=}S%zEDWU)(TlMYLKtN;1oM2R_>g$9C) zLqp_I=byK{$zrRE?JV+?{NlnDAKs)8zOjD3oV!cK{*n3Vt0xp|Q{v(RC!2)WVPz&X z?6|q?4xBcm%$|6DW`)koTa282@vFuewRGk4$|E4qjcMIN(~s;pRa^1f$aq6#En=kS zK~pbd@C90()FM1-Jf>^ZNBlXvq~(GZ-IjOfXRZwT;gA4aw&lMm(AQ}S3TKl7j^ZjU zQ7@RTVOo}uOl7(;4wEfaarMl*W7)~}i!qF`K7+W@*lNB~J1vvkmxs#Avbx46^+ zxeU;_ecV1UEk2dl~eSFapLMN;CM@; z$ZR`5Te|a6#&aKH$G@D;EGFI1?YhX1ios~@fejM$i&Ck=s5@2g^MVs80T#ZGDIZU5 z;Y3>?PSv!7rN9GuE=ape^zFMylg{lMxIHrxQ~pg{Q6VyuUVVS z)fY`(TC84a^*h1xwJk>d?E9>{bJW|;j=8c_f;LS%we0XDD-es8?2Q?pnmhd45s<0B zU$*X(<%^BXPdz!y!qMBV_ahp^=N&IFf}-;Fi!?t(MH%iyn$t%*l11956&{RU_08WAxZ-?MFVNWUap4(od z*Y;~cFMV-H8-HivXiM)BfiGeIK2ZE;ReZ)f^+%?c1h;yaGkug5fJ`cZ+5F%p1CA9g z*c_t6Qud-#`>wEz9XTuy6-X5nW^mo*W5pjGh8q*a=d>U8XX>8-AX`I6qt8QO3^Il+ zG^~EQLOs5P3h^g3HQcmwE0b1tK5-u^1ka1pV&g@{-BeaIMb=wSNA!CRL_R4|&n*Aj z`+Nbq1%%;7?inKu<(TyK-f-m!=OWCK-Yr|)g$VfynDAo%Dac1a)1y*y(VcbkUBtvB z6>s}PKTqh_dxe1z?(P};?k~v)*BmNtGOI1hzs{JVKG&Zw5NddIJl?AX-K3*JN^!Rx zaE!cti#h)f&wQ?~%MeX8V6j+-u;zLDt4p)&)pl+M>h0py3gZSiXJq8sP`crvW~*r< z+@4DsW99tM8k1dd)IrxDEpGO3oA{(k-$E--Q@N<2QtWY)km^UP;`n_ss;JIYnpX3@Lqu_la%F}1^cC%vc? z1f+A>STt!Ut-#n0G5Tk&L`+q9csPUb#{_4O1Y!)`{k!a1pZ+Fg{QPq#nuO_LZ5+K zZdz1z^n5bJk|qCuS|H!KMcR&*tG|GDA+FEk{l#np0rp(@X?f>FHiHd_j*>`*bd3ae zf56nJ9sTG}QdYX7ym;T;UTWb#NpCR}TXjjF=n|w3umJGpuzX|&qDlgxeb5WXc}3JM z<`m7hV!CAAEmj6r`xiyKo8j+P`jx+SI0Q@~12ekR_2(3WU=Z1v_bn(4#+9+GdfF#FNr zmyX+*?Gew!m(`z&)||;0q_21Z)r56QdW$B4f;65a3O|Q#NI<6PCU&XbXqmbYe|!2p zjHNhLWAft=m80qFRKESO<}Y~f<3j`ReDZt`=1q}x2_ZyrN_tlwO*6_AU`s6387+ua zQI7@!2*aU=olsXbFd!pgwsKlv07BzhbFa^xt3z8KX7?gT<7X0F?%oOGv*kw7$4ZSW zAh*}4L@0n)KdwbeUO@vYRYAd!lYo#E+f8ku;c=n0Ik%K-qgs+8J`!bnRE#K#Qna|3$`D7R`9i5$!!Zzjs-P5oivQgBzCPRjqmU@rXDM-BiI4yh( z{McdiC8&!fNyFa6C--o;d4dT@JmI>-w7$UT-;mjG& zT(ba97#tvNdS%chBRw}%J|QXbW*j}i_EY8gBj-bbeGl$e@pLa&yBSz7&8irVJ#j z8ofH;OqO*@@_LjE`b)8`GdiS42A;shgLmm|+p=J^)zHo{m#ZuwL|HrX1T-YCH?-M$ zaPzZ=d9D`15D*}#%%J!5S(4H0DOVF*+oPV;B|Bm~_P%%)H)Y=>bjk8>wOERU1S3x* z23M4ezkyX=qenVcT2i)y1x)5_HG9HzTPcU;-ue#s?w^TRSVq@KFv=K&=%J&IN55eV zbjZyifoS|8EGtU6sG~OwLV*wpI<$DWnz zAU4mM*PtpgWQ4w%o1$v;F-cnGx{|%&Z(U85%#i=^1ao&gu&RKqnk5e8RW2qfF%JFk zFS`Sw5N@2eeWl>jmiUS#sSI>pO9pyZ-`v&Ml0n6y5|j0T7Js5({infG8}7^%pk0>T z1B7?d^((eYoY5#4-wfS*!i|<^;a7mRSYW2KvlmZq7RM!Hx+u25VMOhz+}z8=FCTLW zhT}a&ZfR32k0KUpC<@CkA&aN$lu7xl%_ZUlBUdXSzcu^DxE>bs@PygoghYB$l`C$+ zwgf_kix><38zI4tZejTRy+>3DGV_(3s#Np{Pvt>uWle3J$xZN;Voh^ZT$V{^wvEQO z^Y47mR9vHH#dh&xt@A%5FsgH}x~7iO6gztaDkli2NHwYk1~ThLQeVYHt#Bs!rq#2n zKAYv^C&{DI6tH~-gw~Iq=+v0^R~!HyLsTn(ODTaZD-q#*fzE!EJXDtJmhj|B)(3+_ z$FStb>`Oqx`aucHLrFM`!}M>h3CWg#c>3^+4rngZ$3 zKMPWqqQo7UKmmR^;L^3@17EIssTc(5Q8!2rJKxi(UZ^`?I#<>bIYp{qF&lTRF8t}K@O8wLtm@O$|S5T*QX^y57BZ!;^fMY z3SO-byW&HB7BaaD?Im0Yh%~OP#Vu1@<(IKKQoZ=&$n~^H&ESEOSN}78&l(w73-5$n zPhHakxB<`?ibCY>Xv&!bc7e8TwA~7>EdVQAyAzqV+Iqr=B7XrDc18ybxBr&#WM?B* zw0`PI^rRN`qolBnkYYpXz8*ty6_4RY>R5M)Z6~pqA2AN$@Y?pRbAI0)I|rezj6af$ z(sXpB^*=1qg}%=ESdEfbv#uAw%;N^}LJ;YNE|y!%JK{M-{b!4&$u@V^9byB@b04or zQE4ORV?tf%3Ue5hO!`a(53ky+(b5GB)!s#l%9-Axf%R>!C|F~f=@JyZiohO*80$I^ zqb~fKl@c9Np|~N~T{w_gUk2N%I(uws>&jSLbe+6%pA#f^+>Ga#WgoIP*#3f4Y`g1G z)x@)gcd%HnpDtA-i$$qLvkgaasbT6bm@Dv{FK9a3yD$!|9GEyE8~3cf&>)kw#_EZe z&0-Nai$Nczl{zqE7*{16xKX6j%$lT)O*~|K+C@VYdZNr;NC{N$Tgq%%31{V|egM+} z1#!Kz(0h^_FwWDKso@~@ zzo?s3ASDa&NLcJ`2p&lb*&s)W;0RrbRIYVTdY5tOvhKA!XtpRtNp7O?pSDk(x*JlL z@VL_~1jx#(Y|ECuGd$+i{q%=fjO*4Rl%fq;AP}WAw(oF8M8D*>AVAL-!VZ*9l)^YehS#$Xu(or-l;WnYI^9Caz0{{T=B3-A+l*v64VK5{-;>=6>JdfV-`<(E-^WCzlv6x}CDr!2n9M6rO_%DSKFuJ}!i8Jqf9!WU)zR*UWI`V| zd3`-7ezu8qmSdu>v`_)jigc*!VJKX0@Lu5EJVbSi5XZ?pV+E`0{UyMiHeofl5_e?t ze)&wg@bx5&#vO~F)N~w#&#P&&qsv-PMQyoOS$Xquf1vf-Vut7fXM+NvdxIWR+5>qh z&$gR}(uhRv{e#8IZG%H}f(*ZRPV;nT%}8Lr;xuVwqNQ#bEv8Z~F5dO_lUW`a02B-M zO)~}>#8ADbi~aiQEj^r*80_z6g>aFA7yQDvWTD2sxiwtR!VJ#tkw zbfLufh1+YyE~%y24+_CqjtA`#A+9)PmLE=00mm({BNTyvVWEIN&pXZT7G+wDb09+R zq$UPcprbV_D|814aQw6aVNA_E`nqV#ZF!v-#lWTy!N+)ghnU>Qgb;xZErKoe;Jp~X zEf!PVd3a0CoY{<20@t$Z4Q+$Hs5g7}>?M=7_WomnN68WI-z5iw`T$Kbkq}OVHT6gq zPKOS_Vc^R^J?v=KQe4!Gz7THji}P-PgCP=}u6%?)KD0EJekuIubL8 zkl7Y`;ixjz)R<4kBCKd(k7in@U-QTbR;fO8Qg`Pt<8jBc#r7C%iF}J2jbnu%hO{OYulh&HGgw|T7q3m%oa-o@)ROdYtQKQC9KzI|I$?>zmfL~Motra$rf3pO zcEagQnu=9?=q5Pwt87|P9^1N6s9ep3j~DCO7E6~&)JGEFwBZmww9riVQkQ0})i6t^ ztt%ZH2L=BkX^^%yIOTbBb13igmz4zedFU6$Ie#R+GfR4AhgTWqRp`gBIU7)w<-0aB zuW?VR2}!5sR&>w(8pD7jCnPW*xTC>c9g@yEy72E{!*r(wM&I;jMMw+HJ6+aEbAgf3 zZIMwX>N;q@KZLDl?d^v!t64>vl4%Y#^Gp`gtH9p+9Mvg&ILPxSKJ(Mq#~j^y{WwUc zI$*_ly9JlzBeQ*WQWdnVhpSevTj%yIr0Sx5kF>|?-iMBWswOPW-w>W3={3V!I~)b8 zlR4ZS5_BM0w|;l7@cUfc5meXVJSwC)Yhh;mkrMT3tp&CDABF)!j+KiyR5f~)c z8S+toRNj#~&ZzOncI|jYhB+8#uts_E44UB89V3yo5=$c;>{DK$0K_{vWjo+;{9xb*8zGe$uG_BH5}oZ5?cFR<2vF>3})s)iP1$>z90h_G|xdaD2;_{YTeu&q*d#R-h>8j03<#LFOF9* zu+b_~pvOf1!*i{B3{Japz+|KCanc%EMT;ybDOL>QjHP6dWFy|cqFlyJN+|Dhq2&bg z7kbAEKi+io#aQo>KL5}cyQO!>On^dTY?oU{$@WJ_a`^5vtU1}D-0u$?{=*CV3?aPD z061+j`JEw^*kqZhzZ7rzT^~(Cj@tr8DW*t7G zicF*n4%WhZt1<7LpfMtr<0_`TU!0HOjF{ltk<)vI5I>d_Fs|Gd6b6XJU0o>G$&M5N z9-BP7ANj|vE0)f+!@HuBf?Zz4lx`rE>7I=xW0I+&>K zX=02xi~cuTx7T<=9Q#l+;44jG{E{icQ^tU z1hG=7M+t5NE?StxAqpw2T-nHlPn+vV4y3t;OEIojq;V#*$0fr)tOn}VZZ;YFF zw9Z?AXk`xICXE!^vdAzUtITYdNF_#C$@J!X;E?*&HVvPl%#_aR1ncJ&klNeM3H zi1P!r8oBwwxneql0!E)$oA@x8 zaG~3n3$t9V@c6$Z$_E28d5gw>X8ebjrQoTy{;lx2Pl2~Y+UWM!0U*=o{JWgoc;ech z5LWDN?-#Gkn??Sqqa&KaO#@4T&Wm36(QALwtV6Kr(&4WB2HKg?Us zWv>nc{O}pBly`e+Lm2L4XD@<1wuYx8u)<)_Xow7|Fah!jw{VY8=0OiyV_wYe8M{G` zdw5VKgrp$pCB^5@&TB?;xO>D8vQ|n=&?RV(x|Oka_~U8GFM05pS@V_t=6&d8S7f;r zhkQV#;`HIdy=ATi(x}rYG||XPZ7b^AGR9f82Q^Y$107Iz+xDO)3mG%HHu-h(eZJPs zFOF%V{g0WHhKLE@#;-x!z`oxdvaSqy{K)Mvzr5!phWWhJrl*xQRDSOlYX8~aj+17W z9jX1mu*&x@4w+22>Q8Vd7^Uy<|B5gVHm-zk!edJ%Pjfo8Xi8@NVch=q`^p^Xw*j~u zN@bbfutC7_`s=~%&2TIS_$9>qX8~SbQZexN_8>t+d@KD|3aGPO;QX% zf9Z_|L|r8O_|no%!f;-gC>vU9W^1!nwKgr$tBHhuhSDm65c$p{H*AA!F+Id6No7F{ zMI9!s-=q<&t%r^`*?5?S$SkbEdG(xsi`eS+{*okySbqc2(#gYHOan|kZ6+Mp+ai~v zfWfFGgh^IWNZ%2{gY2+{v%eRIK!<2oL4hxFa*`qy@v8yD3jg5|Z-P&cbiGPekCx=Q zu~Fo`0Z%sGU^#nTXw7SD-%Z>|2@VoOnlY;i&XH+VWdOA(hqk+G2%a={%S-MVEyLJud}}BKRBNd|H%EFs?tl zrOHON(=~Uhx7^sDj3x<{n=2txI6h+CUj5ve$Md<9JH9fe++{bnog4wPfT5R}+cS1a zitcu)cy$vx%n*St)CdesZGN8za9me^**IJ4ajAz7cHP*RMmT?wqHWV=5qN`Ei$SpP z&v?9On?Du0xV=pf)g&nSd9H>tPLEz^nS9x4>PX!1@$eGrni=$tuD&|&`WPc$yu(uT zfy>xaKl`QoW2t|m2;1LBBeqnRzt4Jv?_Q$HivK4M#b%WqVu?^Xy%CC*H4~MC&-`Vu zqVvVsTl2PB1shB6Viz}PS~Ib1QW+{AdKI?gv4u^;gNl;^!*Vkj@)-^EmCe?&V{&uF zx?;JDD^oPQV?5O*sp|WAI>|(iXSu1}4c#EB^hj1(k<5I@ex77#qqBb64>?KJ{z!IZ5CRui6 zM_7r*xl<9q_VdN{_pPsB;CItx9l%gfc)_uSPM{x&>XnZv#PC)cXRylJt|}yjIAEGe z!G)@=9>lL;E;;Iv&?a9uwduhSzFEJc)iY`f9mSK1Bl+RluaZmP0s#T=j=u&JymgM1 zyw8GYyY$GRvIZ&Ww6_Z**y#KUpTOeo7_PG2PP!2}Pg@|V!rTf>? z92bXYj+Kd|Ce{{AZ((^CrOe`e5VmJiWrUS za=Uf4g_v6_Y~u_#ej*Xjhg&mu`dcTQ=4hFiJ1GPpmX!t_(Ho7_@gA|}5UIBih8I%Q zoheF7y{(wLBvbaDi5u%X2SnID40#68z$66X217b1iugMb)Sx+rZhJb;2EQv8F&(>? zJ0uT{t%VQ2I8v>j&z#n+H>{?2YW7^BvRYkJ7;X4fIFrN>G6kh99KkBiE7RYp|H86j z=n(3kag0$VG+_c=1hxK>WCBm0^alUzi6biW+cl{pOh-5ck-Zf))tus17Rs068T}}e zt;r-~+crADMi?h9l5%6xjoM<3LvgCi*6aWaU)G~GzPtGpfj(Jky!BikbaQX8;>p|u zepQtWPamdVJ9|+amcabPa~`Noq*Xv7Sz&b5rYWez<{{{?qlOc9yfxzC7MM@s+N-px z0EYf(vS@2HWNx5w9i-tya+{O_oMYp05iy+M@vh@WymNz^s-u~CYe+J-uFbvcQ*(4)eAOCl9?)9 zO!b@nfo?sJxj`x}qfk?~$f_=fPwr#UH9)pmNa50=_y6 zhIcVJl0B;oggb2o*0)~@hx&m{6sjC{zOU+CkQCRl$S1iM* zRMH^z4C&n5j1>;Gv=2KkF`P?T5w3PoFdL#^dFw@zswYyA7&>VPhQm#-S-GD;B;0eCOfrD2FQUW zfQOlCSHNv;jl->LpKL4L%iM@K*?7$+3<#Hgi0+N4m8^>eFk;D;F_nSMN(IDo@M&f+ z>-07>>Xf@9b7fYEd@Uon@HY5#oxk7EjwNZuQ8>G9GXke zwe0Y9eP=T>LUua^6K>VFu)d?!wlV9VUzRr#Mf>ho8dcb#Wj`fSrrOL_3&`lmm82^b zj8C>q@7hUL1$jKR1%-mzEiB`vg}Iz!pBXsFeRxc@$H|1EOwX7CA4+D^n*IK{WXjh5 zF6G~6nh$G%;Z?F`zwq!5U$Z`z{SnM&+8GoE6j05|^2q&~{&|mche#oi>zo+BU;)Q? zprF3vL2V8sG3{eTleCvYo*!n)v|t%;)gx$6Jt)?WBYB0tqh;rxQ<9c5qT)0Kot{qF zfzYyv2?x$XozRoZa`VkM+nU)e-x{+Pf&lErh1kiJ$(*v=_& zcf-;-in{t+pm?#M8xzkNO>B9J?eqDTR|aH8y|Z<-CM()blp2&NiAE#2JF3(gulU7F zo`#%mc|X7-pV$graREI2=vPMzvIuTTatju0(yIa+E805muDNNfxRF@Kz3DNVa(XKH zgAVtH0yFN`*_4t9Hx~0xQTiAm)=%O3CUKa;w1ZN(bg`CHD+mF`8u#%r2U=`~@1Qq|K~)E0H9duuDm-8OltjiDU5jc9 z#bfMK;@S3(D}S#Hzk}MWJV>$NUSZJN4DO?0hjg)JH-i6x>HoEjK;x5s1BRhwUCy|d zPXR+$2@wg?i&C%0*!vW@w#qw47Nar}VF)3GfgAXzk?$VgYKF(nxtC7OGn_M8ACfXV z{D1-Wlm;k*M)3gP#&V@#=yro~we{s5@dIS=|;P`;ac4nM8 zRa2RHu4_OYwSA7a_n87h@l9a&|I;ICIhS1}Vfg;TJD|j=a=wPf@_u{x|GUT~5HCUt zcu_KO5Cx9Vj?E~)1QDV9s;eW0nnB9LvbSOLlqt58YbiP&g2{SJqk`gNj~eO+)w$m4 z&qRtdSc%v3gi?6f&Q*Q>F+Rxu>XF|MMYh4EmEJcJ|CP%X)5P zy?pW0vV8166>Q+3kI-agBGHW)vzP6k(G%6JoVMzu!70FZ)k(*%T~Ko5VYy`auaR;D zD$#w#2l3p1Qs=C);b_Ouv_h{o)h0-&tEM*_@iG+5(t%{Fc|lJ2DY47B?IixgE$+-3g*KTeGbwtZcHn1 zyHx0KA??9L6(*?90$W`6BNy30i&|CXe^1E;_?WX?_L^uMO=N<+&Wa`uX>*{hCGL z`Y12odE0gfO0k@;Zi#a0EdBitWyw@EK^IA>^fQ$Hx$s(Gn#N(Yd?x!RWF7T3EE+5* zW#uIDrLBo9qL|2}_C+tnZhHA_S+gJid__dO-J=|L16MxDRjLY|PQKw@<9kTrlmGC7 zSOEBmKJ(7Kx`5$Ne<(-)9vu?FdMz$+4OBRQ8s15op!W_X6I~-HWCzO4ZHHf*v48P? z+bAQe`sA_f!7-Wl1{-QKTG70mOl0tr(p7Ugu|vDG|5Nzif0R$__*8N9au5mCb6SnhiiL#v%m)-GcGVIIk#jb%O72B2X60CGuSjzCqj=@xEU zLP9IR(!<3~<>`v(zLZhqs5^ADRqDp>mL5Bs# zT1V#VN6J=H)ApP!5nR&8@3;c*ZqXuNy6m_1PaJUwqf0kJg{4#l^?A1(f;O-*qj7XA z`Al_6CQBGem?qAZdU<46?oz;jCWHYQJTBG&nmz4dzRpjmz;+JKYRr{lev0oI?}PeT zmC!1E9@L`$Hpx*}UW!Ok_1}9CvDgW(Ulm^+Y4W%Y5(S7W1XZQRyUSQRL$7?S(C$K; zjPn%;zVopvrIH+f52xy5?0uI|@3 zg~b1lxd#VC;Up0LSM=_g%heqdAu>2Y*JK_1rx6EAvuC2` zb8F4rpiNn^jkL$Oqba_cNvyH9e}qtWiiPmgmQ(Kpw3KMpHU^vAr5{z3)HlJt-4$vU z%fLe}pITu^A)gvs7dJXN!aB!f{8}vcT|97vgfh0tV{Xu{I4UBeln1SSx~c>JmuLcB z=T6AxiV08Y$P@2K9`Cz+B>L#78d*qR$WLfg-l-tI=R_ zgc^!tHn=ZRX;D&nukV>E9`l>w-A=wb^5A5NVJ~c7{jF1CxG1-|?$)>ld!je-p3=G8 zg%oZWrv4vZi3me5n`~L&HCd3Nzx7wO0yd=|V%|CZyI@xzgD`jD3oj!N5xeNb`rSN7 zu$D%(8Y_Kt`P4y;QRdOv*^d2deN*zJ)zIR*U!<9{pt9)h9f)b75kNxy2&EE zhI|TiZ}|>Bcl=E~u-5&Qqcu`WRdBc@B|{BQmN^xSmxBev_2O-x-AT9$`2tulsRO_9 zs-9THPsQTxSIK0#jD(6cX4w3Y)bzDjcV0n!d zJ|JW7O-r62ATB8EX7jjiW$CI2j){0yNZv){c@DN=N)PriGx#BuU9%=>lG)xb4-x+& z(9U)s!R7FP5pNS8PfcNq@?Z_h&PUg_7f#?Vqyjzc!(V74Hj)B{h+gL#GY7c!Ul2580pxM5avndkp@j zk!7`OM@TQD`U|9EWmjd0(5BkkKgA51om{ye?|);Mwp&n91Gaek;v>%sMhE2$*2_dy zFBTj0K4~11T5C$=UCSvh)ffkvWio-k;}OJANzv1<#6ErRyRYE2SZ#W5=UJw$5{Yq+ zI)5S===o1tFUv9AzEwz(mMW7~plm$*JcD~$PWxYOFs>k}`^Juw4deaaED)UZ;0%HS!KlngwP>PkrT)q5>_c5860L)eJ`fpP9e|R5lA0J?) z?+cZsz}osaHVnWP*M&{WAA6)X#H9vcFy4Ro}_d#el7h^a`CE_%W8GH(u%6!eTF2{ zKl&#Q5BGOo;&Td$69#w-%=jhYh0Fk`C95{$j&Ktk`Xg2bC&mY86m&?zgrk%V0@YELkScG@o0Onl_dYMJE^8O9n2zBqtdU2)9 z5~1uOPkc%-RTC$?JktT>(awT|pyh-ki7$<7Ub>+{l`eTeIDg5Xwf2Bck0r}{UB*ml zdS?DnpQ*ZrGMJ&Uu8+P}G0cxd=^S7n zJO9Rp!9Sm=OMT?SL64@Tc8kje38@)LPvp;M>7hQm8n1sYk#&eNjm4|nfT!TdQ-zos-;)6WX4pL26W6VsT42I`||J(xTjmh zrRt1G_`9B&!Io`Kk8~2xu4ET{|HFF<`H1qp5foP^%tb;UFw{9a**0?(h|X}TQZ{Lg zi&JT=Xfo<_PHdglooK&FWGD__d!5QY7OzJ&#;_XUA>v)n<<7v#;x#9AXAv?sI|xKO z_g`gt2~t^uk$r#H~4!<)nx+npElxw_=9rbuRn4 zWObr4pV69-(y$zJTB2nwPtS@NQ{CCl@?3avZFdOEaYi<3flnsazF1#P>)oJ&rs{C1 zj*v;^qNZzBwhD6I{{SU{_#MjojS7PEDRA&+;Ikbwp&pY|K1MPq5kTolk;ct4$G!}b z+MwUne;gkI`>1ip8T(&O0S*E+IR-g7ZXBf@`>RJ@78=S%JMwaLu#Um!1UI0^etXq_ zXJ*fwWPug+!|h&KDNqDSaek8=N@@byF*<`PPb93@xv~@7x{?vKZ)Y;upqvslKPtRMV+PVEd3N+A*H|XC}K>Hc)@VCjJ{UL;IK7;bQ?JvF~ zlA=3;{~ns8taT4pv$9x5pZuYI2q||q+tr9(VHPNRJP8$FnLZ)FEq9iuopFojRWrQ^ z6`yk8RjO2Za_fyM4s@&;j|-h8VQH;TCZM@zf%bDM%R|I4fUTq_YmirH${G7#iYjQH zA^E)C<&K2I)dQjd>BDO-v(>dGf@F=iUNJ2GbYAdCn+?{|q^fL#NZTi>Z}mD|w(Vt% zOL>F8a=&QqnYIjQ7|xj{&?b=24zIsJO=S00kF!on(dMtKA?ldcTbu7G4v<r&y0CzG3INwWGE?ql*_>*JMN1>z=Z?}wI(4hxAw zXu+L>Hy)9S`dc1kpb*v>_}@|>qjG8K%99bZg9^mD(5zY2t~X9Gr8-5gzM0#wXldWx zgLExj+?IDT8G3$2+o^fpLRZzdxIut^LQ}a-e9W6F!lhrnq0YwLc-N*(4eM-CjNDMWWQRy>S9}*savH1^= z8IRZ0e{3H|3rY;hTN>^tJSjyL4u;UqLUd%JdZb-*g0J9;GLQ~vKa@?U0s|VRW9*U_ zYK^!vh3OTWSz(~K@V45T8p(C#8{R*?GPKjqSJAMDKQ~AH7MHDY7i0oMqQH>nzmN+x z1_!=LH2bX^OlY#?;LZJ&mYDLAfDX6WWbId;aqRT6{C!KT&f(L~NzA%dGDR}IGf4cr zbamPdTO~Pm>N@>`GppJcGVR6X<}1R+`R%NV>6a>0NK&<=1i#C;l;7U0&ei01Ja|Cb z7W&P>p_M!2N^=w)Ky>@9;CGEgiEHW0L2-^_15ckwXHGdmGb)V-uk%NmC*ffBt?S0zL0PBo~)s=vTUB=wwG^22_-Os?X5c~fTvmt|dCHUw-R`$J73j3DW=J8Aw<7**h&!{GBKotqWI{=!jG6NL)mJRJ21i86^VusKmKzuqjB(dts!j znss=H}qW7WEs>W5c|`rCC(m5T>o`LYf$ zABXY3Qw~J7=LU^&q>1V**gsJM+fV}L#3eYfaAJbMJotCI%`Ca z5+aO=*~UfV@{e-{1P~3$-szREt?8bD0*PnfY?Og5bn*^Mv>twr)l6~@v1nrYSXEmt z6wUC$R5!@Ok^9(GK&rEP_v(=Inb`X3&kg5{+tGxKCu+YV<2#3j>5DS3F^VE6*nskb z`!HNw=*wOd#2f5mt3x_0kBi+wxAgjf>h@D?$B4~7Wc2+yf&2cg-PoQS@_E^)!mPFd zD40;x9`VAjVOG=6n$7cUG;*B-cQnC{f#dID{i=+T_!ERpD)|He{!>3M|Ar8JPnj>O z*ljzk2bXvJ!s#WAtpn%`42*!U%JyWW#^-kRa((t~mkqB-&`Q_GRj7x!NnFp1$UXH1 zEFDgC7ks^mfFmwYr?TgmtawM*hl^3q6g-D@YU2|$uZP%o~ z<7}6fR#tJ1FK|Bf**nz$XPRb=V`nJu4uM_DqXrdrm$b{xp&rir7C!+#j@uIOSKw|_Ai_kncFdYVeO+n>qo6Z$X-f$9xaBdcUlQ`I z5nmcyqPqzZ7BbZT^>R)MB$c6&s3|Do=G>U6G4aMZBKt`Uymj6)Bjl~0t1r+voLf_K zf|5ywn|E0~XHiFb<5t9QX!?LB^1IxaoLX}_aAPrbDL12YdB1jcp^yPP$yOiL&lYCG zhiXlL2o!;Hrj1ZIQ9dLraWK%@r@XTr`tT zycL5SNRVeWGJOTazb+MepYCHRP#f8GhYzsJRc0rmUd zFa_WyWQrgf=nd}xjIc#yu57d-*dlBsXD>T9i4LgNDlvmE(Ym?ScXIRai3whcjB=F{ z9i)H=oeDEr`wCP@Hth3MJzf-}vOSe{Yo?B>L!M+Mc9|kpH=}zSp;2&=M_@KnMr<=d z-EbkzegQ8uUK}JbGD{ioq6XI%s(9H7hL@Q%3{2q;9d+$;hVaqD*JQXcq(6 ziCvZofhqM^bXzKkKMs6*qODus66 zlZNGe?;|WQdX9!GhLId)^0I-iQQds)K{M|AyU=`(*{fWXV@p0sy;gDFl|g0&Lv^t)ri*ne5dZivfdL1j_}ov zLC72n_fSFb?~AdVcjlNhT${>>`|7aDU^sD+(IGUw^YB7?aPJU~p;iM+I0 zyfD_v+$u760zl#8QVe8+K|9D0b*V_Q!tR8L&-szSu`n7_j3ycNVM&ECIkmd6#LMH~ zncA)@V5xhb6~<7lkD^6x`R<l%HWISSfXsUl06Q70wAWzty1D z3+wLsR_P=GlaGzd*ZQhGYfxJ(6YXam)J34sW<0!t&d+Lu*IK)aXAo-+ioj$CjE#VX z!xJk~YLLo!V5Rb@d`)_Vo%{T^yzbJBq%|Ezj)!(n?7ivixeVy=@`|!qt{UhGvXW&V zId$IBISPt(`eZ)He{7Z3Y=l4K^I5FWXC5nrOX0Ra-DUPRy1F(%bPAB8(i_~+1j9A( z9)e>HGtLxDyNRRZC$Y&~rGH%EVvH+n1RB=Vd_A{s(YR|o;F+}{!|{=ODDSw@P~3Tg zuUZaEZ2k`~2|yk43_HEz)U%S0nt^Ac$-gbyJU5w-U&^u}#{_P}JC+vyWCj7*>*p@O z4(sKse28IG83~ndfq%c4#f z?hB>bz%UJqYz0GY79dJxYZlhvFs(WGDlT(j_EMoF(@hnk#C`lpx>USU#lHIY=7HUY z<>MCXS;3wsINJt971cuV0Atr>ye&eEQ5msl1Vs26H_3}6_yK75Zv-=!IB3P!n5GFp z08scaeJG%zEs$(b5Sj^vXAJ;|@A$e=(qG6+D_zAfhFh~{`vvsqvq5NlffPzF31SV1 zhUis-EY8BZyih?FO$&Ey=)X1#rvxLofYlE2)?h!kN{o;G?DIAkKi(__WYl2r|KaPr zf|~ljXs@Dz(xi8y(z`T43`9Y?^iC)OA_kQ^ zyIjdN5~k9Fu$6My$cRcf?)muZ$kBe&D~1UYk5l!w|8U_zX;<-r4YcG?K=u5c_;Y3B zk_ilf*^^3K;EwI~r$XKQ2zHdCruTC_wkUY4Rqhz-GC`JtKW|t_web)>@}SSK+A>!l z%B$4AW~NP{*SJ*J%eMp@@XvvdO3YFDdnO;>p7WE&0KpPe$fz8~HYz`P1w?U!MyiAB z&xihJUaktk3Lu18ILVCwd9OtAHWi+&e~I*kumP*raS60*kOkf;N{O9Af@Wq$DB$&E zb}zR89+0k;$w7OI=a<`t8+f^c`WX<5B_aK`ly<~^9Fq3=N+-Pz{y>Mwnza|S?q8tF-y5ARIWBp#x=ExyCIs#LvUDu_fbEPHxNMZdfP36 zyWwx(w_aAwz?nsLLFmD%u2?ZW?Uu&`q8s*X^&~M5t0Ud(S2Q*Fm&5fHEXDa|zo)CW z=Y2%LM2%Li9GNg%hkNcH?>z7uI^iaS`lL&*W*Zpx#zeq~PEA_)E8-Y$yhn?0;` z_4bXnw&sf$(+wmgKt8KNkn0NJA^_V$u*7N{k`|uT&2gy!O`_b&Ff*uVHbZrwvVLpB zLS5ujrVhuf25wClD)-c75$_)1`V*CyNy0>He3)4r77~UCz~!(Q%XKn=Rqz-69kSC( zOeB6C!)?X8Tx!AO&!!K2ZDS2#^kP*BMcZCrcGb;P^XYYepaM_05^Ybth#-P@e@iQr z$kSsZL{weXoAqAZhzwyVjyXnhY-Tx~p2J&lvbl|=MRC;@n@6L#>^G>f{qIu}?^vwI zb-%YHBEdXn(3p$b<`;J1rBH_WUxy0{)t2T6S57qnHYyW}DW4}+BKCrR;?gx$W>n2i z%hK6ToYg$i`Tsq7((4R}rXS6SHcD3uGdjfln8MiMrMj^K%1qU4MwqE`K2~Kn)VlU; zkXD+|xJOD!<~CH2s`W>A{Cm%E`7Ve)&Gln}vGRolN?#|wYZ_~*PM^zmYfJrKzx+6F zmeH>(rRHrLYpV2=7`HMyJCBoyKm@P2C${`|t=ByfQeXW8;24n4z3rq1;;7@=p*?1u z^>SedN*wcqY`chh%NXKm1u?Wwfu_0?-Upv&!V6FoAw93T`cGG6x3X2)_G72$?*V(F5XfFCSR>OdaFXE`#rR$t^ zEbsGcOzq=lG(`=5Cb#yb3@0<{J*-Gc8-k>Te_XvjOs7 zH%gOW+YO@HM~IcH%K}M$fb512X5egN`u%XYq8FYU>L>9*s;LteIXY=R;rqH~!Xvd* z-pC~FASAj*y%t|390I^)A9+7x@cL(`TE5S%r7(U9gv5g^hi1PrUyW zs-dmG<*ogccav>qQO)_4oer;!M!eMBg6LA`1tzW(AGwg3j~(y58L@_#)}SVQ{{7OC zEnIT}(}NlMJt-9)IVxHG?icn9$V7ZiVtX-L_0}f_=L5 z9b*Z5d{yPYiE>wWZ{hT!Lv9kyR+8=^9%bR-Rns^LjDxG4i%d;|^B=@>cfQkPPfpbr zr;Ss|!;B4wZn3YFr9Np?kAS$Y#+9BB&j?YL(@NZk=aWj@B$4U+MCdotV}eX(b@7Zk zxMfHki@dk=96Uu(z15LdI=_{fVii51^u;gwhiX#@ftcTI!%27-h*0AHvwKp43bw@9 zjPrDczs#^4$rQ}(zPkC7(%bdXGDm|kH|rx_vqa4cFo`a9Uau}`)jiB~NE0~t0=|-3 z*M!Onv9g7oguBr6M<|`LC95UYHFXu4>U2RrvrU9t?-yo+bPR3$KuG-;!{XRNZO(kP z@8O=ZTa$>1?Q)$iqxe_zriP`=Se`7CGngg^bwWsff{ zX8(lxR`z6QPE{uf&+B760?RI#=U&Ne*t`1Z3X-)OOSB-6&0oZ-ch++2|{zR9&FbgThQzCe`D zaC>uRK;~8@<*6O<`bv!KK${pov&-^jF3(sMO3XS{{iAR5@9H~pSq}@B=jf+3T6q7R zTbE%R1g?L3@T}_I)sXEC)B%-?66J5w^#Y|Cdn0WtbuQ-Ja8qNh`SMFArnRP-k+dzG!`(T1S2ZNRz?`t;hG%I^ zxq`&q(m`V$_H-U0nd!PD8E$hL<`Iw72#txZLE{Si@MP(56u?`G41N%X`-)`$KE0+I71pE2CwXK z+a@YKm{ej0tc$sVe@G1Z2$g!`B0Nr!PP)78)i(9e+-*HY(NH7bi-2`X*56aN(V}Ne z9w6F0{#EnkW1c7{fuT_SP9&z(zGS@EVvyl4Ql@mGq#$i=f_)vu`09H~>xC};kmQ$O zu-?>a6fj0;nTf2KEYppRc#+R-KJt|vQEN4DWaB#eWs&b61P5?>Q*r#wxEyzrdOViH zT3tW)Z~?vccFF9sF0V4B8sKfVn~VZ;1{(m})k~raf!2a}=?ZkQA2-wpZC7l>%;Mf+ zTRrjg(-;T565888e>8}j7lkHpXWtr$oF*J3%F9AfCGZade>?Z|xC){}QEi5rPd~6& zRu5{dZTP8QJj<0*FxxyJ(FYzGB2V{;w*0kZYl1;DH%^hNJ9_jf*0$M0xHL;+|-lehnN&b|MoqRo`9Z8fa4`np4u9zy=Y6SUd z>i%hQJ1=x^h320fU_m{KJblY|Pe9>;klkg1a=&Hkm|9FBT*VA;#V!%iCRWnV3Wavz zcstyws&ewJ1e?Q*ejijF@R|1j>5@SKup_y>>H_Pn(7N8Km@4Z8ZG$nCJ2|YS;oHdY z>7_E}LTT#i7=?TyXZC2ogIk&N;MPxjmy_&XnqkIbHb=5VSKfrip#~bv@5!;EjHAt9|^fu5i>yd zmSHJ#af>vR^J|IczRXAJY$>KtpC(p0VdY(U8hx7A&uIL1r?v_M?xPcB0+joZ?{xM# z*Z|2Mq1l8lTC~;dlipcCrR6D{eH)fJ618Xeh@!q&^iWXU$#m}LBek_d;!{qtu;a!b z0A3*lVS(?Dm#u{KadZ7f>)qUJi9~g=5UGA*srSWygwq@^o~#KbL`lu%(_YUwsb~aPO7s|yLHu`W3ct; zZ?6Se#7o%Nw{*=igKW)Sh~FJlwx21KG&TzzU2V#^&M6J$>;4{@Y`RwEVDcuNTfJE$ z-|;~Q(NUGnE}o8Rn)22{=;lY(f#-r3R(irJGOaqlJTCLks=`ET%N>8c7GZjt=yj--G?VqbBlbidvJu9Wyct_ z2SK$p?6bCyc3T`HPIhZmY3Ibj-^;`vO&&FB9+a@I$VMeEuML0FdjkNX)uYy9q zjE08oCCjJzaQ$*q=XCia<5W*gi^ay*=yBi9+~VU6;P(4L47yN)hhjr_H?Y+aHas;1 zvv}D~dN{Vf*Z*)?RUles2Y$u1Gp(ZA_9uIw`A@~%77u&?edy+t&rhtL_z=Eqwhml@@e(N5H1}Y6!xut(#MD? zva?{P;rGnKmL*DmsXS`jF}bigRwhGe#e>N_^|A#XY@NYb)!i#cHbnLTb5CoZJS_3f zz|9Sw6ROU~-EU^qpkQ(K9Cmo1G-l8k_jcOZEx&9${&m5`n6u6xVM<3tBBnCaUh3Dl zqnjcfg7COzu}aWqm3MLCQzG8}Gt_m)tK^M4%r^$9ok7PX9hRM6^{o zpIxr2SASiKsuyWMo;?T({Ro-PUH!i)ulj-9#|F=+2D-$4ACos4jNA?uIRahXCC6{& zN>Gws)`dad2w+;q`@*qHZ(zsG>vrA!O#R4fqx{-UU3<30uWvjGxZQSyMScMEAJI!U z2`phJH>tU+i}h}`h2NN(c5dAhcUYjHhc1YE_4P+M-oyh@Rt4@6$8EOw(0I7SY#*GY zYi-1ls%2p4a}?hp!SFFn;(NMgpE1MM9(2>k&iR5JkJLUK`m=cn`FZ8#LH>+<)q10Q zQ9yUPg9k34IoTchW*MHO6S>ECUtQEDusKo(1JkrNCv6~Z2Sa30*s5c$+`pwR1X9&Y?+?F z_RBk#$M)=NB z1w7I9oi2JGkTm3&xX=V7jcBFM+c}+wIQ@oko{Pt+GpN|_wn0LxLC~+ z{LzN6rK>b0RLodwtt1l%P_7Lem1 zU`ksu9Zia2!Z$|ulWfEg#~^&YtWppG`=yKLWCH-ow5bprdS2@N$=p2nY%kv^S04XA zP=?Zwd@+Nlim&&tTbzeg>=_(fA~uzRfGSsTNR=`5k4vGj{(0X6uX0uO%rSp&-R%FX&L5Zv0gXt^q^ibYEYEs7*_}P@ zm%9R0M{@ZP@v^8)fB)JWYQ`v2znN=m8C>w{>JWb7SE3X4;D?(3tb1iu{WragyV>rj zO$)XG+(9>!y7h?UR2vd27uC6{P2whwgPq0riD3k0I4Un8{vBH60-mq?9_6*wkSVsQ zk|GZdeGQMwbPPC%0SjTpC8(o(NHo>C2EP_ym@`ICgzWoYbqbSXP}5(pxB3kK$U3$s zD(D&%D){?Xm$d?oiioeD9)8w&#N`yIzEeA@L~X?`_@210wT*VnL;W#6RL1#Jt<8e> zBel|ufNA;qCt45}$&iREa}E)VU0%&amlGX+*l^a39Ut7;dQ3H^m&#O_-qh6G(%6um z0UeMC`Au~M9s^U}t$%&p)*@sX0CIOfzz3U9)~1>md`Quok$J^u2uWDFhiM!I6^-tA$)OYOo?$%*0EEC&mCKfjgB~$%k z6-B`;wOS*H%0iC9Al_UB=UCC{5edcf@F+dJf1jcP&iF#2ME`zVOnm6e*5K4`C03v``Xg4 zKbPNeQTo6D))ptUcfSr8Pm{#a%KiwG8`@y~yyS*3o(wNd{tjmW zRvZLba$0qSHR}O3&$h7w09%!cS)cdb%oe-J=Xu8h*yC89`kDsQA0kxG*m#AxEhsfe zSu5{vo{iqz;39k&PYmOUC6V>U|94FY8=^RR^fi63$TqrKHwSE0QbzyF*{;M0GyQ8r z(_%bV3H`+0kvT23^gv{hV_a8K^I*R5r1i)>xOcRAYqYcYTVAX0&Lyo4Emw;{{MY2Y zL<;#4TD?%)tLFF<97ttbk=A`<&o;*vdeXjpQe3T#f_lI+mF0= z)!R7}Ixw7GPknK~N7qG>jpr%#IMgWRwmu!J zzx&8PVfwdYSG)+U)D_+!$rf$5Sxiq&{Rr`G(=7C&kG`>j>+4Dc5;xwvoYNB7@Jq|9 zPQcYjG`$yjxHRnMYmx5ZCae9+%2rDoF>|yy$rLm5LI0H?)7AT{Q3!>L=W;wFaUK+r zMhwMlL*}^0JpL9!!98lmUUPTQgG*crO^t&Kr6cLL#|&Q{9kDNsBs~l{QFqS_>90Bd z@7j)mDih#XaS6#Fg;tIt|K~`%#c1&C|N9_UtVIS2@+jqRO{JRY_?wauvbzS6Z-}{{ z|ALY_QFmQKw9<%OIC4(9!<-5Z)|+nUsf4q=)x2$`hnML<3Y89nW<7928%`=Q5XVOP z2LG^YmzRG*X(uy2`c6G6(qLlD`RR6`=cz?aF)S|I{_>=5V?I}$Ncpwf zT37P)n<9<${QN*3JE{g%rejnrY`is5a@E6~7&yP$;!>17ZxjW3GG1y~@Nj!jy3~+P z8=K`?A|i4zEGE~fLe#}4?P(Sf$yN%HU2&sfF%`sWjR}%da3TE4o!MnhXE7owVNcYx z+Gps1X6v-!R3V{F$iBX3+TR=VDEWGf0dO{oaT9Z}nAtj|{|0lQ7D381zq;l+#2D1P z-as0B&YLK?z0BSrI77trOYSJ}{VjDbvVc20A5$8?X_{e{YBd96&X9W|smh_rK1>zI zpq=^l27PaYr-E_Dc}^@d(yFyd>YqJNNk8R7yxgtBI*l|+j z$Ap&;2is{LPU{2s)UTC;Lb7F=v&$;m9?g-`po|q8F$Jjvc2|8^slG3xqk{jsp61h_ z0hy`t(#{nKSYIrB zNuXu&KHJ1$bgqwzA3J)tU8!d+LRaoM$Fo*?UIE7)Jr` z8;=x9s?>Y3!YmICHzwLPC`zVTM11QYV&UOxgFitxQKHxHV&r)VKWds_4lw)66nF%! zBYTx0kr%s`=3{2sFudsIC#nixEsit+)ug4XYf8ix1Q@2FS{vp%RTewn{Gm?j1txOu zB;DPa;8J|P$+-c>aHNI@6d}ZGr>5;#XY29fX&R8Dy2OZXOyr;Wz`bW|RkPUqQ%x1T z=16w$+K+>HY-jB9teH->7O{PGs66}M37ZqaEX-2KP2~#~ginDPHs)jqg3(mb`gPYR z^lz(%I&(9p{kzw(i@!5K_T-uqerLQR$n!ko4qx&r4|Ab&Q*I-%sG{Puk;I*;#9r<$ z*Sk4cYPYy}t_nNcKRvAHB`&h*eGFxMrSp-I2*a^{utzMXVp={HT{Gmk?-=(8=ta3h z69B6OGq)1afi@gz*f3tu)Re2~X7fV&n|4o{8c%=;D;w80^LtJ5Y@=auZH`)|{-}&4&%Nr9jNm^ze^NaBf=x>c#$lFcogwG`&1)=>dg`JN zh08nKTm;{$@?fVMR*$oT#B%BvpnX3Z@4Pi#L1jk&di;#xtoC2_9gnRGfPuAe6Fk zu@r^5CSRmy`_xf&W{ae)R$Pn@`G0icN~};aN=x?V2;r2t4a4 zZ&f4Qb*2&XmBs5Ho^a_tePzBSJed0O-oIZpzshtcM}K?Rz+wjLTjbj$>P#k#87kKD zn757U+pPBszT@2DhPi1O9f|Lzg{vcb2g|?zE51l;Mv8KH!nR=i2gP$!+dnTEh*1~! z5%!J5p&}v#!+dqWmB>_}xtc-r#Db`7IcVvLWG^NfKrS@_v%X5VsRRv92S)td%O6UMtk9(TIOH7K#B z>cWq&=Piks7u!4!SXGA|R~l*k$!8BHG4uum6fKFgNcgWT#~|5AcHVr*$PlHgp{(9t zEPl-1&+S~W0Y%!wx<>BB^9s`WqSND7+mp1z(h0R6J#CV!iS?)9c;SKnuHA|18=Y;$ zykTAWGH&pjWLU3Cy^wH|L6d&)wZ`9cZu!?f6u&C24~JYBDPa|AyB&#N)}4)Ehh;v_ zW*Dr#EkAI3W}aj*sIMJOr4=TG6TEPV=Q@h3XUqqt>^t4r5C_&*u>5ME@Y z5+^Zl)!NP-?8zP7aQ=1@btyb}j(ubPpeS7Q(xVC@l*69SfqPNpsl{eoLBPY z{jb(#PhwxZewWC3PwjcN9?=X3iq8OXqTR!7nZ&_#)t1O`OaGoq5gU9+b}7u&Rk1(r zB$R5n(59YCe1zgY!+g|T%D20rRw%()`CnT~^)y|YC1JBA*3N8zv&f?OUBK}&Ev3e>y zw-O##@27p#081F&8KRrMPdAF-E-(qZ=F#*1xjF9Ir)%az4tK9T`Io3kW$y6xn#lU- z$K?jvu7mi7mK$^06>yL_K`q;<0`C8UaGL44I*Yy(F~GnY=Wgfu+|I024Q5d1Ynio{ z+2s_9^0Oqbm!-M-h2uQ;(82bGsPL@Lhc zjI>6R%O1ij8bKd>M8!q!SSCIw?@L?xw^kX{D{=&zJ1E+ivh%j;HX-viR0O{;C#Gs7mX_M3MG8Gp2mN6Spr0!kM?I<0Yc&rq z^ZDQIiRV5zszmj^a3%FFA>=Q=yPb^ES#3ec5kkPE{my2t&@@6sB5oJZ-nn68-DOt{wOU}k?{za#|JFz#RnkXvEApcf`}FO` z)y}!No)C7tdlE0fy~mb{sDioTxSAP9Df(MktEf+qv_pg3VdCFptU(sJrzE()dE>{a zWs|T=eh03WZ|5CcKWozQ#26YiyaI z%Db2phqYSm>tJ(4s6_uT>7GdQJU(3TW1x+WU)xgP9^Vl*SkwNZ^ZY_DkXpowRQdag zm*k0`PEh|4wOe~3yR}Tu)11;L_K4Wn6G-JpSb)o2G3-oCv^l^+i#PoOi_(iNEiDID zv-h-~CVTpGrod7IV4mcA2fKNz2}Zcg-K&=Vo*{|b79SoMyc-yslh1E__PXWpfGV^Lg6h170HN?!ot(CP zOWf1GM1-duwzV^AiGGrQ>OeN(sd19gv~N)BPP-<0Sj9ZaIC6X0jOB5v`2g&uU_ES1 z@%_cq)#}(Q3dBQv;c{0eCA?Vuf@OCe-{1X-n5mt(YwK*oh)>MSUo_u5Q#kun*>DP_ zrLi9MWi#+_j44QAlq#EAP=CJ?uwH$qoAfkem2g~E;vkUeIMX7`8Z0zY(NWL8734f# ztR;h^>}oEZK%zb-i9d(N<$YG?=xN?}Fe9^!z0CB0 zI$rYK;1o9yb;uxywvDA|xB$SpAvxQG3N=ORRf^#5I7lKYSXwvWcV+*nU#eqSf8l&Z zqRr~Wtd`QaXnob#4{_DyU3dJ|fnlm?Cbn}=G_yxpwL9cD=pKK{lYD_+EovPT?ri*R z%JwbKLVnuwx$afgL?|NrLfJ!DN#L<#YWF@R@jo)I(!I=?{^z%L>tlE(D|U}#d}piP zg;VnA-5Gx%M<*r3a1bkhrYY(?)xk!x#6xB9o?d(H7qMP)7z6l z&$)5VEswf=v1RcG)zrwJ@GQk&@$AZf@Do-jCMHOzo+iSjOnq=s4P@ID!HMVSCi<~teS4`uXb8}iztm*ra?%MN3=Pikf%s9&A(s*GV=em*z9GbA|R z9N@+WO;n*e!y$}ru9ZN7q24uk8&#ScD&q=~%(m|;;VS+u z9{gz$`t!T--@LFNuZo3%I&2zyioV}mR9gPTt9NdX?^nj~iP}jy)}=qim(OA`NZvSm z-TROFmsxax+gPBFpK3K7dQFpCxtKnPYo`l&s0 zv!Ik>ysu*RCo9JXf%nhY79^)SGe9wO3m!z@HtowV<+2#!e9scQkt2Zz`vslyl)i4( zR%HWz7{Gk5#;X6+Nf^_4Tc1=B=q;5Fi{@dOCXiT_^SKM4{8|gM>~IzgEqr zgK85aA#9nsZKbxvK)P(XJ1E+<7n*(bYVo)|b=j@>ctH5^5A6*hIOC`{bNuH4D-vo-~xk24WY0x|lt?zLus7#(rDJ6wY zE=O}MbLY?T;tz~^upOmp-;JA{Z2p|W1Y`yKDymtZ2+npLmCRg47P!q&@6lbq`1;fMD}uX5hMFa31wCUx8N?tj+^w5G&* zynk1S!nCWaE4tmX&vwtKc;8w9r(fHW+x_?a$4jd?kpZ!}ApKu6kuR<%{?;oQxF;I> zemC3|#*wo204IN~;ZaXKP4mBKro)***7(~Zbm5f(do^fh{jB);*fhQ&anqbEzs{B5 zjN2V7kGl1Hf5)Dhml^MjdwYF8Fm#YXjouulweNZfPIr5oGFJ&)n7>mZ1Kaq(htr|4tLv3sT_#TsT! zf<)zib_%c|XEChs`25wHoi&O*Q7Yk%ruShdUs+wF_HqdK{Yr2r|F7C64WnEU%7{{% zcq@kZvR(m>6Ii>Pj*sFH7HG(Ckywc;6^OS4#zvM9`f-_IX`@E=AXH{cw~N#qenZ_%aB58m?S*zmX0&j!C`q8FmAGKk z1*5nms<$1&nL1+tA0@_T(Ny|zwtta${;7kO8Ip z*2eu8g0Nf>f?lHgnuQ^klg4j%!||0tP55wJdTU)tSmFaGjX6j zvd2*u+Q4YH@|$~Dt!5!?N{On8JqJT#!@on$jmgDWzcEa%g9YYcAVLhU-jzg; zFegBw!0!1wHuO^@gH5@Tq$ca`e5 zIrx+WHPK9c!u@^NOKbZBjFdBT!+BzXg&3;0ElD?*GAOR}VI*`*Yq2>QQ5ahwqL_ek^8GqA)%|!T4e6R3XJuph9B3so`3hm0tcpJ))n31~Ja2 z7IF8Va8Frmgo3X}(`Vea9hVk*q3lno5Fe#1lcr`P_gho|s2e$l{qI^|t`M<)^#BA& z(pkFOAuA(MuyW#buVqpUf)5)?J7a78!4niUchqe;QdVrK^VBcjvp51)xpLUHrrz}7 z^+Ctos|jv$;xwQT4rMqVhFIep!%5`TM5M;VKEmwvobN&gHw#L8r_y6aCdF!Q)@oL6 zZqKeIk)t8XMdq%>EyNan6w^ULgkD(B!XYcRvF^Z~ahIfn-{_HuhH#K%z#1LmzkO`! zbi83oVc0xr#pzR}@(O3EhSXCYKhymmk>)pMc@pPW8a{j{A~Br}P7x%HJ_xN#C|ifX zRv_j_{z#bC1X!~0d9cj=8;BXPHJJT%^8?lH+^Bcs5M;+C3X7oe2+Y_7P;uX#d@Jnh zVHhb6NC0Pz;?tZ3e}^~!%XUc@@PB?;>(thckF3Ooe(0n}(BY9-@zx@^cNc_7whw>Y zVv|?ml5&}i8FR6`71`*Eh0vH2V^?}<5&}xMYWl&A%v+F8M{1Q?)2CmEqu60@EGLKx zzzI^j_j5B50|>Oe%d}N(YDju8**7ca^UROFFjVCmR}nyR>*6wHnsG-p*6Q;u%&ywo zFn8M+B_TaRP%nr^iHs!pI|Pj2CWfuJ9K=J&-+=`{;jRb#L?m!A(8Be4Tl`QPHsfLK zMG>@-C|7!y%Qxo_T41~PliuAnHCiBv;JHql{V#N0A{zu^L+*4hqpJJkyjK$h^oc<( zup%jV)z#xkW(b|dP-*?rZI-$>J_(oF*pt8*&%n#TVvW&t_e8B1{%E2+K>R?h{9{Co;c`^GtzpJQ!j^z#ZWM3Q$1ZGzZCxZZ}+A)dlYVN-!^StB_?-*^0WU{&y-9&Yxj z6A%?VACom%Hz4ZioC_k*B$vThzOxlI2J9~G{mmdxG(CR2hJr;S~y7jPm3jK7au(>WyKUW+26pd=RkY2E~od3yG@Zu9s zjZ&ma%+H!*NnhzQhTdV_c#jGDZSN)}CyPFVp4CZEU5*)*ve^}7U=_`M%*IR>QP_ej z(A*M%E{v@-P)XJlybyn@O=~eZiMaEpWB)rki5GBieGEe=G&M~fSAw2(O!^Mdeq5#v z5!qsY;oneewG)W!31!&2qW?o;VzW10HjXnTfWoj@{!7^iRZ5De6#v4^Jp%r~=<+K` zh;ZT)^qG&K-mCL;Wg+BlrU6Q!Jtfj20yrFy1i9YqP11a->@tQqOr;GE`EW;AwYTE~mNu%B)_rxn zXaxCoDpPvi-rQla+X7&n%7FD=iQZR|{WJe!d=IRMlP3w*>bA&0xI_`|g{tKwl@B*L z^#bsj>QNX$t$&r}i%Yihw@uSK_Ex|W>Eb4d<#&`BcaDxGz02j*w2GKSQ0*0EhUrfl zngjTl4+scG&n3a`PT7~Y?xqzQ`WVv}Wi@pz%_o_A0T;GJ z=&8{kuxzOdJ53(8U8RS;H_d2^-KvyoPA>A+9=fU#JFKRbXh8F&0KJHM_Oql>?#!>@ zqxr9SV6$s>`iB^VKkD~eB2S!iryuplmtF~C9;f<}BRyS${T&@wt@)?sR1L&NV~RV% zXSK$8J$twk`fcmUW0ju3{jpcogoj+xdcYW@lYTQ7G$s?Q?Atj`62pi7=n&Oz zhp0tr@Fc6{fBBV3k#O z8W-%+DX_1{oHI2PJ9^_o)nCu$9V5x-XX311w%$tTeWMKcslm6&Fh5_}arU#xeztQm zW%?&Pk-uDbW&F;Z5e34rB}9rWQy&vV5qYFJrAov?XY#sN5r$!@jq z*X6>ofrC~2y7b}JIC3`rfA4^xSe45*N&u0>0IODGAZ_d_ei9i6X3K{=^_*Ub zjw7BIE^MD>$?jTK0jr_8fp3dMzwN6j+k269ZH?&qFK(_*Eh<@Hwu_hWGjoDFCiD&* zx9S#_uTGFK1;Riin1~Q8O*RffX>AExqMINYJZNlctf`$~F>Y{Ge21o1I@7B+H~mW) zEnbx#OAYV>!vGLmW-L1H07TrdCTfEceL%MX2?5!rUzSaE6%v!7{=Ug4%k7fW{FYUy|v-q(_~%*4hh zvNuS$V-PKB5}0;XuRv#R>GOoZ63)11SZEkG)!aK#%j!H~3bUo!P|1yW zsl?61L@{O9Yg{pTD`1eiJ6%vK?Gh>WqG%yW9q>Bs8R4?4=a}_ofr)=HMvS&UD=~G| zmd+*jKEW&&4E0{sqgAgW8oE<-0$D)$i%@uwwY8r09~7|Af-CPBo4UY7-%PF6=Zw7- ze-W_6d0AdWFiQxbCMrur1fHfS@z?@L_R-jr9JRm0J_ommxYfz(I4BhV&g+Nc)xsn_ zun}XAkK?7hRXQe6KVfQp<_Uee57g?U7+Y#|XBZInE?q&iH6zf5kvIr?n58F3tm8!@q0w$1$jA8~n_&osp3(}8OE_@c4?qaY6NzdKt3w>2eN zSLom(3Eb_gw6RFK4q=3P?)Kv(y;g!#PZAk1Q+4Vcg70-ktx{$_ri7R=bvQS57*tB# zVx=`6v++m(8J|Rfk;vOESp{sB3aE6AsVahr=O^=)Q1c#@IYGl>A$3aAcpi!!CDXOE z?30=l>|oRO(p=F)#*MgQljq}kC(h=Y!CD1x4N{|Iw$-!gv?{(9?9sTWHszajg|ee1 zVgix<%aqPGw1?Cn=vJv4_0V!H=rd~<&g9h4_`i&*&j`sJvDIJzAKobzw@sfDJF5{0gsK~W)+ zBV@^uoooK?hE0$x*sxO z%Xloou@h*Ly~SV&V=p*0(BaRP3>D&)ENzlp_^x@Mi?ihB`zKqrp`l&(+te%Jji+10 zfNEltex|{M#5*NkO;7M}#ydEf%{-^e``YL9UsW0H3}sYbm>AefEFz4Ewn3tMp7`89 zbB8Nd+rnd(HEqed27i;kOQB+hK5|m8Ne(cbl9T8omoXcs1Y%IYYVhMD?J;o~;Kb?g zcPi(91Gg*H`5vrR-^Dr9`0G8ly&1=pVp&%rD=CD9cznQ^sgz@6YNP3VAy<1W8xZ`p zeaY6>`lQ9vrTowQ)$RV1WUR&~-o$1R;Turzd)IDK3CZg}XA{0|A0XfyODYHIbhz^H z1%x>H5SJq=0Vcc5qaaJ@=lt(lqR5F#&tYA!q`bh;lXEXAg~V`A;`DkFiIGORv;H7) zFf5rXK00uv@c5?FGEWIf($*}4zr4S|_+)W&tRuTs40SX^@I1FGLwDBubqtxK_J}g4 zB-+2ZTt;fHUKcN4C6%bkt~tJW_b=Y^S)b$s^PkV8I3K(w=cRJ1n#Y7F5Nx9=-Fzwq zdgu0&^B4G*=TJF3&{ouVvC9mHUNcLEUuMQsCd8#ac~3y9Z&a+FmCxbM;b_`|>XHD2~9l#7Uy zrE^?S6Xc>hIN|kr1pkk|7fE;FNZppiUmC@gaq_t_WbAxC_mLiJ)O{qla4>(Wi=7w-s(^wevDBiOr_d*QJ&HRBw;a=*7i7{&`GPFP*t zBzVH~680skn15H)zs!D3!~2mjfbOB~qkFAP12>ws%cP_DOf>&w_6`rO3I-R7I}MKO z4nqd4ea3tpAd5$3v3p+4Lf+0(b4!;1;qLMlP{W@pv4sG8hs)ZI+gE=e+$XNuror~s zF5NbuW&&@w9$kA?`pPg=e>`8C-+W$Y%ymz!(A@Mnhh)ynM+%vrLSJ8jKKb)keZ7o8HaX>hrX3aR7l#>#`CO1_5PH7vU?n?XFZJ)Nuq-_nsN(< zFA~*_$5KbL_U>l@Q3)B8F>8$(<^aT&LllIiV{H2wuM{Ql2Z2j5{k|jW5G)J?s z)4`&_5Fq$4=pb6dnw1~@E$x}^<{8{U=MC-qN56WSZYFZf!n<=P^iZ*UQFU%=7yL#$_}{hp>Xqzyo96^?%xO3VlIegg$xGVT_@?euCU3GP5719@ z1_W;K9G1Q5Aj7l7xq+#1z_g-!45HvlX8e(a`5J&PT5Aet_yH4JOTX7R$o2vJ8noHj zlM5P07<_lOq^W(EndMgMB$l(-7R~lL)=_wYb2ZXmsDE&fV#^j-#&dU2I|E_eVE2IU z3%#N(OvfqK@E`+6cj4`>ugMIM#S5LP7ly?)WH>4j(#vx=kvxm&-Vc`m$x~7aKe2(x zcE4fkpL~0y&X0X3=Ip!au&yQPnaIImnC7fG;3Z7>>gXs~y#Gq_ZY9LdU`bP^>Le|6 zMWW{-sXtfZG8OXH{1{kR4)so7aZLG?KX4JN86>Q%$myu-fU%s38&0aS-~2>0MP3kA(-hUe^Wp-)>oA-me;l&M#7RC(Y| zRM%Bal|QK&BC^}vxkTT`n13Wyc~?pc*8S-ax+YrZ?m z*E61PBfp@E@Ox~&o!oDn4jU`gG0E09E;Vo#64FHbSHRSyOJ$a2wFUgY*J~L?2+GZ2C)*BuyWM7Hq^f|266Vmv+d>M3vODphvsv{q+rt=&z7GDqR&I zrtmR`M2|Lug3q?S9mROh*w-DcVmVP`sM`M_?7YI+{{OJAt(H=>YR{@wyY}YSDvFZY zo0cj`8hZpmYj3q%E3K_o?G@B6YVVi{szyl6l+fqv|4y^oN8i4mhn-lF{6O7?;pVdHL>4>r8{B!;KNf@Agt6 zF0p?r@25Wq*ACvoMs#+o$EXRn&MmH|SLGIK-fTpE{WH+5wDJ89TE9?;u|1yWna9UA z%g+-GExaBM()OIMwQal-+X;K%$4^*X1MV7xaNM68HxDIw4Pfzquc%cqw9I4fil-8y zy`bB%R}0-nU9W5333qM!zh&I~Tt!v>y#&A}Uij8JE`~|&V})c`#%ng^kCKOxf?r2Q zLVAK9;EN8y9efkj^?GL!;`CF75npmEHymPw3%oY#wASQ3R0$1s19AtgnEd}|*SRcM>HIM4mC@p&y|&ZPqefhk&WF67uXVJWY%nytgJmg=lU zTXnTK+ka&0sxmcC@$lWGkWv6HbZs=K12BqWbaGzZ^%taQG6HK?c_9gETclXEp!>rQ?IDXjI3UuT+=e}xE ziAtSgIop9N?2d7GAN==&bu`dD$m3x5DkuoFcGlhQ2D}mp-oV?wE!k@IH^!p^!hSmn zG&S)d56p2rU+bk2gGzlk8Rf0^D`rg2Zah3p2$RSCWA>L9VvAklMrikVSk8`Fr9zin z3gmI9tB;_F*4?4=Zanyki9Y&Swm8~tlY$precDqW|eJ~pV!CEGH8;u zJY)a;F{xd2a$wH3YAmdO}Jw!K*N;z=FIq&V<4J9dFO;rw9f7t(Q@3KQjK71^65 ziUvAjMoH~H%L}Tlbwo#^AKrTHwB$l+9`MhZW%t0=IW>$4SJ@Rd%kWiD{j7|10gVt! zZBC7*rP(?=SJ^NUi`VplF@Ki9JVEeY!v{vyefnr5*^oGV+ZdkEB>MW95%=Q_PkAT! zJM&tEFVPLt85Jx&C8H{EU^!E90#tOek;dDs&`W5WT_vYV(rKlnbL{iiS^nhw7|Rzx ziRpTvzf)s`O3i1S_p+vY8=Lm@@t2`5rMHKR`%KwC<)P@wMuTrKrp*pX+jK{Y+*g`m zdgzg^eAJy**2K)_da&$zpgHv>2*xp*;gtCbg259?^v8kp`{rh@#mvjBbj?mF19V5D z>W#IrD3l_$GhU5(ob81_e5qfB zQV5wv)Z6DTR5Fs#${E4;%MXPI;wv9(lGh4HLc~6!P!)2RZu9i?>auBoGl~rEPg@WF7 zgel(qGc}M5!KV=)>``m*3D!UeYVb{^MHPb;#;q1p>uOkk^@Ep3-ANCyN^uPU=0 z(Sz_85B&CB3_cl^^T0 zS&VrAeLI!*+v;^g?^KoZ!Y-%q?F0#QI=7L%BxStFKGh_J$*b#vP>`E9G z<_x5d>p`*g$jA=#~GRz+b zceRm6CS?X*<&lY8CTian!yWa@42%2={m`nmzgBYd8ayh8U^4XxwFiXU{*n^?0=w-1(^;fHH7`2b=da#PNqzSHhjLN;*ksB_U2n{m zB0KXz#D^~vC8*&X3gm+Xy@8j>T}IYjvwWcj@;4R9*J;|4r??qYW=ixPml#zlnuKlI zq;2gLo`kig7=gF*8>*{~_oS(OL|zLU7d)CO8&)w;&nxK>tD3tpf4Pq7gq=G=h0@te8*y zUCHI%!EaF5?g|xQE)u1^M#n(1BK{-GCzfNDko7imD|f$73*r-g*LdMCH1Lh_GHv9o zhZVB7>y;Cg9J^vP^fXKL{vk42u>)z#e;6T|JTC;!S8!$y*)HQrDbb@`I< z3v3r79jz&SZ(H)Fi%S-Smtx^Uf@N|=^(=yv!GL9@3x24ZJv33By$d_Xr6mit2g z#M@R=+)B5|kMgL^pgaYdL5ZiEkDR@DLA>|%56I2EgA2dkj!mHWflfb-T;Z5TXsp>v zTegJtsPRmDM@FLcpqGvyi~W7R49cPwXLYnIAUtY9?-#+Pe&$C zB|I8{?@10{BnhIKpsjK)`T*zNwc4eIa`KUVG$ zt-lhz3<$EnS`+K4#fm!}vCF!Is)H+bcu7})@;nP)>>+v>r-V2f9Xc~a51t}>-B|2{ zCw%kNi1PTku5n^h*GmmQ%osE2W$SFgqzsI^ccKQ4Lp)@g#gO#A5ra=zil>X~GpMaa zBCKUv0+S#1{LQ^kCkb}oS9?Je#6|NNwOgcT_{d}+DX@JWu@Z;nj+r~Rk5Mtltlou} zn|BgNO2HZDDy>YN>p=!%z4&yF+jArlr!O>i zXMh-2zwl}bCN5h)HPxGykcfl|Test|;JNY&+wA9CuVJE1o*ljEsdLyn>jFJyUH zinK}<#Kgf-FgAvkpkg+!;(4RvwI%siGRVpKl-0wai1C(Ql0k^(XI zVaM(hDU9pJQSzm5q|t zJCdhVteD^j>)u3LfTBBY1x}Te#LL_W*%)@874i#I)R`GO8tr-a+g}y$| zBb|QQtH|bAd!cFtWGc=zH@`qc&sxNPV6Sbh zJrEfCf4D_;uo7%jT+Ww^Gd=u$zQkOO=W!;Pbhb{vBdOK7I{A#_T)#}+>UOlRgC%WT zZ@y&46rt=JGW*4xR0Q3?YX@9F7b=ZRf}=^()R!;=0$mI+(Yzu#XWGP`yQ~|QLJFSG zc(+K{c>t%AQ*$l7B1r7niVD&ELK0y;cf86#oLqcD;A*HAKo+^oty@gr-Ti!DyLi!M zVqsaE_S~*S>tsha9qP*>x_xxUQmwgtBs^yf8QS#F-wTB?qtTIts=0Sr9W~K4U z0HXvQ-4Zbi{+o{~WtWu$rw?_HNJ^wfXfm8u}WdX?=~XFf6XzFgEd zYlw#^6LTPLVS#PVq=`8IHpygqBqmGkb{wbt=}g0m$&UHeZB8q3-;cK_Hyn@10zIE# z+f_g;J=~F%2E~?7O+}`^$}3o1DX^O6Y zWQM&H<=WD{{R}+OvGIS5&woM9j3R`0?{502$gxiK7#f!-T(Ce|3OC^Y>jjNRYxlL^ zH@X38!w)2o#5`L;i71M4tSYn{J#U{SWD>y~;50tcpIL5wP~Xwulp?>}q9u>x6py0& zL6=C4jp4JWZR+NZ30bUt#t$t$MiMm|QcG3KLZ827He84qDc6uOrv7j*@|in_X9sQQ zwF^hY+Y6;NIuy_~0($9^mn! z9=@Q~JK!M60Jp%fV?FD#O3js$3SwAS)@g1r7_FZ>GxKeSEf)}8v!M*0XMtRg?|USx z1u7Lp^-wW*XQ-w!|jg% zTR0_l=X;-18CbuBe`Y21HRJT-Kf|R15W)&B#iv!PMN4zV>)_1(I?2=z^B2W~9gFC! z=j_N9jNT*|+kiu85z_vpl~aQu48D?M>WMOe;D^@wW_X<-nw;A*_(i4~i|L!E>I=Kw zYL9>v9w)_%3E=SYoE4JEyIQNhJtv z!fcc?U^xg!Nn*K~!2R8mL3;l&uh~IrxAoZ|0Y#BnXG%`-8HalE!o!Deo3LXG%w6Xt z{m2L|(aUUpL*o0X@kqk?gOVaRc<8Z4kXP6|D-1xJ~ht{IC%G`fAs^y0sy(}iQ6!UAo z`d+`R#6t2>(Nr3$WHw()P&BS*ZVW4+_*vHKrQd9MB^x&+oi&--wP_(Jo7Ags&`3>T zOk)&QpzZ|LxzH9GnM5|EIf^?ys!w&ExwiUe;o%G8Ft{P<&{x~{IT4ySi}L!iZGTsV8$avQcC}2%j6}e&?HmJlq4!JR z)GzUN*_Cl^2|KUT#@3fvE14bR()GqZ-{B1jak{=>F~42ftyxpoSS#fS&fFX4<3HV^ zWYKOuS|wX&Jait&HCP8uvwkGtW@VM-ywTe_@SdcI2}$6lBiV;w)af8sqSGj855je~ zh}NwrpT$)=;P+rS=jJV`-jkrA*WNtkz1Tms?<1y$#mY8F>oNB@5h4CnV7qjy)Y4s} zU&0ePJN!ls@Ym(0J(|V@3i&*}X;x zoy+{W7sU28C`@C$GZdwd&+KE9=&97OB_zhZ#vDXuaMStNv%$kK2`AxK4_fecZKunD zI;g3)<3)4qS|K=-DcJ0DCy@7LJW77uLi|dBq)RAn!iL-h%pT)}yg2_akQJaugY*Dh zTvP~md%^}3=fM^C>UXQ@T+W!~y)=r^5T=hi_cdM4{50e#4^9+FQ9?i7%*VqxG_4dP zX)|t?DV^oi-5#JgsgPBeGT^8Ws`PL9mNStq&rr$U`RNDY7A$epeO~EU$aJ{It6%Za zxGuM0Sns9zJ=2k+GSgENhk{27{fOmv9Sum#)`te_>if2KMC)g5t%Th4;?LOfn0K$G zpr=ff6P61Q1C#cdhE^tvFuc@r^0hfZEcZg(8eM`<8A%7*8KK57dorADO|4vMu!DZn z(o#Q(1Lmm}NAd~LGAQ_t+4#Pe$erh(fAj^&6|V5D7IM?+ea)w_8$7{OTG`v6vM4g$ zC3q*<`p^4d4UR$$7ouklha(T~S2TJ`YY|S}>AQ74r#u>GO5O|+fAsOjkq+-oG90U* z0+};!8S$HCqf?}-w-<*K#Zdkhh|wy0Q-`1V(TK7LUpnqh@@cx~QaR&I(Eaya=Ao%6 z5jLu9$y=?ix>9jAqjo2_!1iDI^1##AcisX4Y-oH&nB!VprO3+(afFETYd2W_SmDk` zeYY}8J*PW*_kq6RU%UP&=4NT#NonOe&gGD zk_oG~j%dnaem>ICcgUq$eeb2C(*w4quaH)=_L8n|E>`J@H6;e4$@btg5uY3Nphitg z2VZUp!_=QVktQ1l-_!!`Dk=^iDtk>S_WS=-Nz`=Y@D(sN#l%$#=gl}UTFm8?;40nT zmHb+*Z_GLS-54`p{cUZAUt{N(k=to6D6Z%xokN3ndv-!QQm$hxGqYN3dGy8)ZmM7o zgm`0X1AtiUq$3)z|7FtqN4BR&S+UvX^fM0U$HVq}O(0k^!~B`ze0kQcH;!6sBC+_~ zF4OTXdiJZwH^{1U1g}zLk!NzB>dAu12-k4m6@l{l$lj*DJ3#(Y^4=0wFD2t7K_&lBDydb zgLF2QfXAU(B~&I~4elE0p*^*3KU%gN&mw!Zz>@XBr=lnzcE)<;KiVt1|& zGMhfAhx+gPaB6|?)Y;j&*=90J4<5ZZESD+VJoBV$zY!K{vOzmGpg!Cp_>XMPaHyOk zqsNic9d+%!HZPxZmDe9hTfR z?giFoYh`+(KSonZclxutU#2lyf`v0Spn&j_DLrS+I;#|vnEo1E0`@h_@*svvI{2YV8*u03WUC2M{$PO0U5UGWKygfAT_x$)nyFD#eYrs{ZcO3n zIe3JxdQtD}geuj0d#1F&kIE~{)@hKLuhAN}aja51hn?$QHh$SLSw9w|Mm8;Lt0uA- zhf^BpSGqZK63^!CsaFc}0pBX%!)rKl80+|p*5q4jv!i~?Xz>DQC^h!l*efW|(BhlC zo#oWnP^vmw=|pAWGFR!DVb#8?qZDT=MW}EyL!ZMkrrL`p`$V$+eS^(OWS3b8H-a^0 zpqo00#Tp@qKltFSes@<*Ap0eLEBqw7Llj{}&z2wyP*PQwF*_B5Uz*^hs^S=1= zrVqU7Svq5B?*|WO1*2tg_j~Z#axE3$R({kJHC$ju0$2ZsKR3DXt|tF<4POdF!p7l5 z9J!W5GX?jUd3Zy0q8Pq>4fscLP>O~|^<3R1W@6|PGwnnI6(bVM@WZ_!cX?~@2ca`@ z8A^@0>x;Q&R~U=e-fhp{KD+n*$!R7|vjoyvuR-kW|84~dsP5)|-@!NOZLKe&n-~~H z$Sa4I1NP_c3Bt{W_F5D=q9pS8)wx)$btL$$Qgz0ijQtWMJLZb}T0-|^Wv*daXm21S ziBV%=I?bgux#WYcaEU}y|B;={#`;i!GD+!V4fS8Iqq{=c)L^+$|G3F(4%rYe zegBG0(1(`< zB~-pc{=;l4{!=U{j#(_EW0vxnwt< z^nsQmspsKQ`k_O+&u5CKsFShEfg=xH>M!N6Xd0_S^z#WGY%muo*!D(`I%6g3elbFh z(3#W_!T{I%VNav>fFzCYJBT0&672f{6_{flDE%8bjnk0t*;R0D2w__WGaGM@|H(px zO2XWC$*`G}uXivWjP9nAs}==zX{w2Gd0e3pY>BZx5FOJ@8OPC$%iJZQDllKm=S7V; z=wvUZY#qFo$JM}=dOELz6;YfG%{KYUYMfB@rNDo|0M;*l+PP@{kBsGtK@(eo*F)&w zb>ZD2grY%ACP6$SYiP&qz0B0Bxu+PP>$;_NLR*=atLdGa<;-lS5gtJm;2J2KO;$$4 z&7#pZhpdR2mI>T}5!RaZM1i~mmSU?3_25S}J(ZMssk;sEOAd7}{v$rYr)pf*sgdu_ z-Nuf^2LL;F6-EEGM~g2|(;W|q>saR4;OhwS=BU0_@^NduKsVL1KEYYplIaI6jkOb1 zR|_)LFgMr#j*;{T#aWVi$i*A58q4HwuEzwoy#qXe85ftCuj0$>%~NUyEHpKAF$ZD- zm=aV6+>9lIUZr%TLWllQg2DXCy`eHKse;c~`Z5rWuyM6+JWsSw#&zQ|ec?n%nqzF1 z%`C(lTj>h5qmGl-9l5Y+qiulzN4!y)m2uBE5HpMMw`EyoD-aDuL0y8@+(IYXkn{wv zo~WXXZ9y;tk~J;yo0x>b^xE{BaoIRA%Xhyo`1_|@nWSG#9H0@kL*yT<9UpUq@O9#i z69jsC)tS^NTr%r)A9Ub5N={>Nq5czEK8l-vZ{Qc++@PCwR+&5I#kci_&>@@&4o7xG z?!r%qd-=hmXI6BH_8>g&D(W>CYVI7-N)c7nw;73KSa~=p#xu>duOic!>|Z90{g3Ww z9q{8aNsbWC)?Vs3Bmm)$*NtE^N(@+*`g;uTPczvr%vDf9&4V!eJda>&J+YJmgCet{ z|6$>6jZMoGXI^^meDh3WsAQCVd%4he;B^3Zl&<`2m}@n?-R)5>j5xMg7LJv{$SN7+ z$LF}o-$HlFSS`8@w>!+822T2vc?VW=K^o68rl|Fr?WXIrmA-2yZHDg$t#4B4?yq^+ z11_>I!D?@jvBd$*I^3yxQ7dv7D_dET&?j%}57&M- zD$TF)av28|Z~dF6rl#{6`sW{6BzmVF{MUDGm~i!`%G;^ArN#G?R*Jsbn${l8es9K5 zZKUdZ!Q_E}^PW>z;wmO7)XJ{?=2ch)yclq7)DpPjJl@EPh=kDDg0CLn6Du)`mItCG zwaqPoBTN^@N;5f)Q{B}*Zr6Xw#U~}X3eLeuwjn%O_ww~aJXhbgnkDmFTD|6|$**!S z`K$A4{Q;Td>#m*SW~a1@>^;ruocFkd<-$Ab0o{3)Jf|7+Rb;%WId3~HI4}|x|0Zku>i*6o0$@rO5(f-WS$gf_eoVF7``L|>kC%oS zQndzKD&tq3GoDBC!GEJGKCz4sh@lEuaV3$87PsZt+|=6_8o+Cy+v&7= zfBw(;?>u1daAbg&y_~J_ftA_s%vsS?$4CgwR##QzC-PaR&7_c}q~!cl9W z61yj=-F}9$JJE?eOX5LKzB8)nujH+xFMyQsXTR4B;SIsRsE+NdbB;xYT&TeHFa}B7 zVWgnf>+ROY1i6?Hirfl&OCa`9W!0FU$8&AYv>~u9+KZu1LrF(CdXH2@Pq*9D^M~)5 zC4*8*cKY`xJ-6&LYslaD{ruTgJ#~o6rcT+gbP^R8V2L&>F)Mfp(T)54(&QkpvC3`cCKPCUm?qU3&p|tI%(kV?%2DAoX>vX=w*iD$FU|>;5aR&th6j(Xw#)M~@ z;4ca=$+@7&V=Q&~`ycQB<9W~fwd+<#RCR6#MFz|q%Od4!SPl<4bIROM$0vZ7uBEsS zM|QD}l~(6#1?F5FS7&CUe&gJN0|Imk<`*=@KZgDz8|2-d27ELh|6dN8yUrZ(+(-M+ zpTRPS2l%sob&6%8pJf71tET^Pg5gW{1i4F-zs5ZM>+IYq@I&(C6r~S#olnT{&~B_9 z`yjmY;V+_Fv^#^e3R1q?v}^r4{F89n&O|vga{P{xj^V(v`JWta6EyQB5@VWWJBrfp501Dp5yb2z9D ztLK@obUSMPkvYut`~M>=9`fI~@T>lcQsq-;XNtJ?sAB>YVi!F;dBb?r6}p|8SK={;d5 zkJgNp^TQZs#GM=ek_%yuhdT-m5$IUCk1jDu|Hv%P&2x{V@W^mt9P>JeWed)BgcWBR zK?n^>p+8m%%ixJNW8yu=zl5g0G7c*aE(^)!uuVDYnier@Ne1stZvcNT6{miyTjPI2 z)+P29u%NI2zepcWZR_uINihcz5xG@Ju!=O_2u03ksh^m$k9TiUc|O_K4CsvNd<`_Y zFN4|i58_k+Etzts6|02~jtV-mRjGXd$DOJ6as~ac@&EWE@sB6%^XjS)mkW^~?cUBh z+jKP0QRVd-MQ9$gUay_}DBM~SYru*5cE!2j??{Fm2@{vwFXrd|846&>?xpjuH#1Ddb$H!rPSgsV-FzUtHq4obTEcsW!)|@diSJZ^Z7;O~31Be8<3g608DqG&X*wJNlRJ1a(@Lf#E zg6R&~R?b`w43%9_Lq0?%{v*4Odek8WlIT(q)ON2zSt1+U`S{U43+AY193dG4=V z5;MVMM8VV4nP47b9M(Kel;l@ryBK#sGf=GWRq&%0?uqVJezegv`Q|gOaB4GlGhIBJ znZAYZt_grAxJd$1l+o(-+`R|vM76aQ^w?VatvQ?#+Qw4XHDV+5;7s1VN6qv>ov~nM zeLUI7sLaS!+zOQk^ZgAK<#Y`ROhu14K|&H!F(5h!FLR!+I18^uG4b9P^;Ha1cCy3; zG%FfaM}RJK^)C|U-TTa5{tiA&m*rc64a>vi{SwQqtqy|!k%=z{_pnur@0eLJ_jXe6 z+6hjIk#<+8em3<_AJL*gNb#Lq&MEYuWMc%T?DcS8eA;pfuR}Esh^1QLz!2Q`1 z1}(bfA2(PSj|Ol$FgGY+6?=X0rfI5)HA_M;t2L@4GPKJ^+l ziVVLQOkWvF5Q#>p{E{mBZF)q-8gVC|)&eo12XvE_#C%H&YEY0TUjlBS`3bstGgCQf zoqnvvsaEaBhfsoA5Jgp>&-Q@eY88b{c<6tCQ`kOvUy(dSy-0*3xYK|F)ZZ2o)k%x6 zBxv;duCU-EKZ{)+Z^-_-(4F6&Ejk?xEVaR;pwVguI#RmCSjvshDRNgTKMzG$W4vsb zv_Ednqvqs(L3?NbWK-#A$HR836vOz}l!79*EBZw&+Lp=!qfPt_n*u4e){V%m7UbIM zEqK_#74H;63=?;|fyUS{_a6P@z6VL}^vgCnXRn(+(0%5Me;TnpNOrYHA}4ZxB{AXC zJ2KxU+wL|EbM|+Zr*XlS7wjAoqL&&oHqs&=dwf78j3jHUaRZ(oWT+LTo~b^lPafY7 zl)35A$CRX!WkWTUJ4PH?`5mJ<#}baDTSkKJ6x^WrM>d1AKX4mg{qrFVZ!K2RkAi8? zB@(!$dj?Wc4a+qm-5VTPQ3720GK3?2ZN})tqqLQr|;2#ui0vXH*m~6cFCC$7OwaMMVf{Ld1TyZ#J;> zq>b?;{4%om6&M~7*-tOfXXcn8+-c#WcOSCK?%2O+j}~0_j_3PZBSg3=Q)=DfBlqNz zl5E-(`Ejem_OePvF$j=2&(`H5>nFHRBWv)xeOa*Tyj^lGZ?xFYcvKZtVQ`h!M7(dc zz3^!gU6je9mv^PU$dS-Osb|N&p26q7u9YVoundy@*mk~Zik;`#5g`el6L z6{&QI)${5Y?pglYtH~)9O*bfAx|dvh=C%vc#$n#0bm%MY%YtCJ z|G|-b@N8p0^5`yZ&U7?YTP_nbd(JCIt3JX(ErTSj75L97q(wv0Drc=e3N*HiXen8p60(NGvzSfYT(TV+MFHBej~oe zizrOSwN-8YBa^V>&0aAwwq2YvAHR5ns@a@Z`i#iQDU)zncYE#R=Ct>&^5@!qO2ctu zhPL)s3mbS-FPmTJaiBdNxHY3XAkMKA8qgnu84+L6vdqmkn)Pw31Gk!3J3Lr|Fwf57 zKap2ZPI84#6uT_>=wu zOrW>_ND_08t7*P&qQIuj1{ z__?U#P8zV8m04WD!k<>t^t`xy{=Cmn#=LAtXV@pPNlV`M`pUAssRm1viL#D=nuju{ zTe#)Q(SauGZ|d9Ptbt){a$S_SYkJEV-r-WZNQ7kTUIvTDZ3P!qzlWrf%<#F5+kQIL za9>N#ng4XAY-=32Jn79`sdEmFXxaXwy?s@AB@Q**=BAL%%+$dDZack55YdXHW3kZu zMudz8S-)(mi8Gr${`(>Eut(4TY8tQHnz}GWp#vNqbRRlioO}Hd1SL4+daEj2coV&%3WyM6&gU z!BfK-E7;rV>lum+YvmH^FGWs%#kTc0E%*vRJWKT0jq+oCGlkRGH`9-U98&c(eOs@B zJ{z9*%Rla!g2;-z`g&8SydP)jB_cC5dk*V#{4J4WUw80lJ4+N;*cydW31iX3?HMKiRWdAS4S1>NDda zCz|C6!4x3lRt+m+k~H;SH{0Qc4_idkhwo-7e$HEX4x13(_$+dsN!Z%!#OpmH2CXL; zEOwh`Ru>W_`uxyZ=@rDfeqf0h=?!hJ=X|Ocm>|-PUX6AmDVGet`ypFk4K9Uoh*(AI zmT?cmPLUXi`$T>ccO^v5_qV_6o0cZ&LceR8>q9CnpIN$tL203WxrO_G&03n{IPch$ zhBP>MBuZDSgJX>1^S=#=85$VpAjQuDRFnO=sETQ2ZSd2NzvqB87G7^;r5307I1RHD zZcVr~ET8?&3qflg^;rdtCKtn90fN;Vlb{!N75g9Gh(Czea3$E}+;zUMbC^j@-zHLW z4BUOmGl;82Bzb&Co@~1^?jt}JAV#eZy3(Jrd#UEdt^IVZ5;bI7?!9C5Go#Iu@NJOi zjWVVB2djY}pr`=3BtI_1nIt2+T#&9OAOv1;>(WG zTnzmVbB(@ruiCp)HgdD!dw#8KHuh-gCH9Et6O;FEt)ock7~}^vWx`er3a}}}+i??N z7?uY6@N;Cho;?joe#S@Nlg4b!sJ*Tu$j@f_M1lrxn<6F!rBugoO<-$UFu)WLMH%1Ow5>qky>DYX~102v}+GuYi~INmhhiJn#L!oyB(}sJ;AM&G_Cs2i~9h zO%k3zI@Wow8ggG^TrdRF@3K56%}O3$BY-4JE`cMVc{(;;kV6JMmKC6AQb|6wnfy0T zGaCCD>s~K8p53iu;6pI|%3`7$8KdNxR>T~e`@FROH2l%vWnmBv7Rf=B00JueDz@tf z_y2Iw;`_pSI9Hmm`etKVQ#@II_ZEMgWlm{O`!>5@vyg(`dzV zMf6!}3cux>bM4a#dwSV{z26A#Vj|Rrz!Ab#zg?d|(RZFvPyi1!ZAro$^fE65eFL{L z#|YFyEzF>8fLv4q5Hu!V$1rGjj(|pkG%#C znDb8vbq5+gDNKZ%o3=Yv{W^7yBww zs#?hO@Dw{iPFVV@!|I7^r`tMv-$9FzoKT_0u5tj;XZw1ys0)qVtkm6LVSIlarbPzE z+-s*aEefj?-;d~PNS+px88Mpc$&#&(@%|Z63uR7@5qHQQ3{_Bb0Jshj2v0(FxBZ6@ zn&VYLK({4^m0pc2ttMjfbPkTG$7;0kfj_dCN)J~Shuwl04tK1klRtg*H~LilF#U*K zBt#8=#m;tEr5@*NlxHcb!hicoKLf$kCfg|ZvMM{x?aiFV>7CgsF3Z)MI(+K}it&&k z?h#|^Cz`s${+?}u9m8YC1HD|T#O!ZG?$eUlwejO#qCUa6zp;Y_kIG~Uh}}gad#&Lr z(#7o+RYjtFlg6O7*cEG+hw}Z0phq{8-s$h^V3W{VbL&+fN_QH$C_(H94&sAz^MNq8 ze0b=b?j(Y-f*487`i{g(p3zq@!-v$JG(#U)YRBp+2bpO+9NA<6Y@T|nKqFSTmDp%# z>nzH^fpDV^NZOBWnrT4{TvE8#rTaORSH`3fFlb@@$@D1GsmsN6*$22AyL z(g!O8w|T&=^mbdk0`>fR!mTsAS(2rHIdP)1ZUuO^46cA4x9Nil?|c3XcGO`8iG1nB zt@Pf0>WsnsauF9!BuzIKZ7+OAPw%-z4_z#wGooQvc@Y_#$5oSDA6QL`YMK068%>O| zh_Y(*_olJijEWLf8qFG-5`WWUFOP=*6v_>0Jm+<vOQJG&_#;w)&>uxxb?0^sZ8NqoxnS#h3m&37>RD zgCq7-k)9GQ32r(BfyxR%W0zR^4X zERougwQC+(&s{&|aB=GT!&d}ISE{i$ueCyme-m%%@K#-8{oQG?w#2txQI)7Ds_`-x ztOahK)-kEP$(LgtUQv~5Zk}+WE{!E=B(f`1hozMciKN_5>Z90yYNY=s%L-E8e!+34 z8pFL{-W4n`r=o|=Zg=htXz$+TzN_N*?UQwHuo}UHz&Y_W?~Q|qMQB5D*q6oOTiN+w zccdf^CswsT^&0@O4i6w1)LoF#0AMl(OTz-@BEJx5z#wnh=?gVa05F z1+6%kcms!=pA>NtjFYW?IJ+~a+c32jZCxF)n@3L^xUjjJ;-&{0zBPKRN!2DU_*%=GQ$)qg79j+q(mDCLBa{z+l2vP2Flc_$K}x zbKb4X3=*AZOcf*x5TawsNX`VgltmxqKpj}s@&o)+$UQyLL(Ap%LeFp3E@jYfeWys; zVDryrV|6(f?1=;B)wW~w+poWyo0hB;?h9GS>P`116Jun5p~v38I)O z%+y+zLIt+&c?u=Yi0?VM1OI<_uMvT>uD(Uz%W!rI%M@2ITopX)4hT>3RwM@)J^J83 z{E-V9u&<>siSe50iz~Qo`JycMy>o>^pVef#)sG2&+OV{v$jIPbv|~W$2;Mf3ip@BT z_0=gxnpQiG44F|&^*dyF3mS|fYI2-d)ZXOc#Q1%{f-oy9m*7U|YEu$Uv0%rZp#s-I zv)%Eq0Y5NcAH_|ratlEG*aI?cc&7$|3+e2&4q{laTN(^vDxnLja!$p4w?Ox8ETW#C zVh4Zv{^-1H1twu3p9{dNLUjJJ)D?JP(uI#RXt%v#*AZq(v~;_f(|VS;H#v!whRB5R z|B`1$LTBoaGbBY1ATfNh#7(CQvz_E+IG6HR^a^+Ap?boV+O&_teH%mCs8as_L)lq} zHT8#oA3>!-I%OhV(jcuOEg;<>UD6< z2F%bHemi&<79PgYZkk?9e=(Q5^Sa0d7ceRZxO&FhH8|KZQYS4c^TBS5H{R`LC{!D+ z8B9PgeV3|{J9pYaH(U=hir3Tp;bjgm3zqAO1GgZ+<-~Wnc~=fZS>G}=w_*LQ-Rw6J ziyDJnWboWJD`J;wqF`2ZX&?zezM&`*T~+%tDzjj3`(HYg7RaxE0WK>D?lNn7C zRqo99y%w}s-4e|Bj(ToL#{u?|3W-_ z?gl9M0b$V@Hm1k4PtBdt!m+myon*fDms5>3eAem_HuOYN`L|dpIOV0T$Noj?mFd;g z+?CtnD9qyUe&(Vx<1Xzp{1*?rHm_knr>)D~?xgFN8x3M+?ZN$W7u+#U?Bp|D>s(K@ z9Iiqvuu}4(!5WxT^S?Po^2EsY2QGGK@$J89+D*}my&D=T73Sd34HFcsr3qshMU$~w z!iQf_82KO0$CD)uV;GvV5gM#8c`IjM6*|r$jcwi(VDZ4)?+l9xwsH#z!0!zqI@8TO zvaXBir~PVdvDoiNsZp)+b0AZOzHcg28^9W>VZ%L0P0OHtU5~8zLI)W&2V*ELbdSvv z62J!lB{>K;AA!ER3%t>J#5Eak> z=q94zm*~|fbm3d1HCi$e`fO6xY_qx}(CwvjYsU6rr3Y%=P5u&VE_4Ys{e2zEi=Ct%Vx0H;P$r%g53$eN9Mk2!02b)bD-U`Fjh((=+0`|EW6;> zZh%XG5*zA4zJ#c5Y7FtXg#H1=6h3*5DQj@4bID2@B`q&;$T6>1bm>~Gmr)W=hT6+j zxzL(Iq7F&zecWX0G#%x!oJm@D|KWTOBo7xqSr7$I-Ekv+DfsnW<~^&+wM5jqLY$>w zeT)%??sv#1fTqy;s}9}VM@~0tTj@&o9}elUU-b}v4B+MzUB-SgJ4o~U2}Fu5{fFZo zv^EH(TD}$Nz%Wei&eVhoTVcJeC~lSO&v@g9gm1z_tx~V+h{V z#tgK9`ei&43W*VM7XiL&54uZS8OxHO8D-#5g(LECG+3G5x4QydJOj&?RbuW5@DMDW zdER1`=N2kd`(<4&sM~by$Z-SW)31RsvYG^b_a(icrx$p@Gn!tbw)^RERFx~BL{q68 z^r4HCr#AlF$%7R1gV?IhUP#_NU`(1>HvAJ%o^qp)-RuL>P`^pEZRGRLZmQIyXX0HL zW1@puoom2Z?>f*;SwW?1bdN64ZpADLaX5mvVJ0UR?Xj=NI%S2~wWn_E31mlFx#&-a&H&6*~}CdTJ>< z>;4zQ4$lrPi^X(U)k1rQogd}*261MDQD`= zv$Cq&v1F%BNK}L4PB_SLaWlw#J~Z^qw!p`P!g=)3aYKILsz)j@Q~hS{<+GfOyDv6x_wrzb~!hh#+B3&KEtJ zdwDtFlJ?x4f0=oc0iWw^Af(Obz^IhNd-(%dL=gffVlU6JSuf|uDPB0Wcb~ngb+^=( zr`jO%#YScalXmM0BL`pC}8h^^F4=eRFfRQS8+$K^fSbXFE=s#F(t=ButY(-yz_E@|o)XQb%rKBQyIx24o< zlWG6Xty{^)81E|~JINf#@dpsVG^MBV$2WnLP5twV8f|Wc>1$_O=H@I>ON&;sSCy2x zxovUBoU9L01MI$CiKbaxOuVvr#STSsp$9)20kz7J8fL986c0Oyg2rHiozRHxFme|w zQt=d8l}cAD^1?xX>Ekv>sEKo(v*+)e8uBmI}{*w!Y`U@BlMD0+2AjkU!;jUU4N#O)nlO`>dX&l=dZ zw_(-UG_qA9gX8{-z}6zi=H6`drfRNEvzgfy(q7mDmU=p))G_*7XFK7_-2@EED3H19 zxR(OD#$hHRdBX5^Uz+e!0?7PaVuJX~!9 zi$R<`(!r;y(692;_cH*2CColw@A5OIJRP&&h+W!{k3fat8!vQ}Ln~L!g4O2Q+0ZB5 zLZ(Bf!;-OnY-CBrBUl!{vtfUJ&;FfsG>9PB7EUY=;`FvAdd%%irzKm zTP~z52(TelC|Y9x10Zo%M7xRWPsq{5PQJez=`zKBQ<_TUZ|LK{<-X|wR{NP=T=5mL zeL5w2_({Iz4MIOjC~&PM6AE5Or@7vMhvv|EzV+()BM*ENj+PkNHLX?;W=_k3RJiI^Z$ z_LiQ*Kmav^NnOXRJo_zU!&J>N^aU4MZm+319<-*x=8~!brxe1IAFIbn#Z8r-JEudR zUFKm@;@SgHP{1;}p%N*p7lM)O?V@6`#9EYr4K?Zd6dprw1+Bw;Tq`X1x%66Fr^%Ll z>!-CUon1Nl4(DQ|Roz-Q&0}+iQvKkHkk77jY=qGv*8kl!3J*H97NjWt(Sep!`s`TZPT5U+`Atcqd(L+=EJr93JwV zvWW06ldnlinJL;%mj)H6D^e{KQKt38G8Yfs$COojdkHki$vncj%XzR zc6{1+=-04rX1K=a$&$x!y;X~GfB&C*VH7!+I~c&wAxR15GWq3Pn)$|jct<65Vd8;q zzh4S$#uZCl~TK1fS+Q2BN&@*07^m{$06y zJD&3khtxi+GpF!pAp(&WIYpl@|GwP>4({F~)+h|j9>M0*nb$vieAw&8W42`jMTHoe zuzXY!gVG`BS5}TUvfQ9SELzf|q^2iITAB;)sevEiXJ-e;Ne{0}%J>@}{EpuNFFf!+m9N_M0kLIERtj3FRgc z9z_<2Ex-4KIp=mzzQ^W33&JeVvA!SVFZi)`DbZzBjZY!Y#1$C?GE3j!*3qvr`cY54 zLUZ#=hI3ofyXm%|N$Z+%u{{ma5+pQHPxxHvlZ}3-wDi%iO$`R8uLvaMbH>tzT8#+9 zPz|t9q9-cLzy){WAz}|BUcq36?~UEye6c(6Bde~x%nh0XwZ*+hq|~S5?ArAPLp4t>=YOw0@Day1*N%bi02xOKoa^P2}lJ=HO%(UZkxF zHu}|vqbe-8?MacAtoVoOa5C_F{PBqHqxfs-PH!v=gav|m@Xo2esia6Xxl7o_mq}>n zT{6+P&mv&C=tm(;R#Ke5_DxKYIgKY{OLF2c_mg8qs~f*hfQb0(|0|fAaG3oGaAB^y z5bCJTXTj3w!afA~3fQOrTB)hBVwrR@%c9xPC+b7iCnKIFSF@i9pchV0tw@G6*jk(Y zR7}r&f(v;Or^^o7`S#d%NWQ_z0uaNOfjABn{#3NO{LfIurM?1`V8|G;%#j$yV}F<}11IA13hBfO`oc>|=~%C>rWhCd}f zJN~_H@E;ETt>>Rxj+^%fK_6x12xd=HoX#62{Zr@k2m`KVYfkTT z3;k0c5YNW{slai=>aYyskAh`MQaUAVSkOM5Xhp=#n$1Tla)r$Ncpczm5H`zDblN?n z1_A`89LdJ^!U&SD?;@k)?VMIrhn_{h|DC*^7-oe!L?p|4psje??V4MKnbJ8fw05lfMcZG_sSAL}p5;?yu~2@et=(wy5K*DY zL@&FOh-2}}9#H`hz1nWLgUyibTpIwO_+asFwHjrgdZ3M-$abzY**BuHWRj}&P10nq z3law9+v5&h4{s@eSa1Wp$K*GJk&{+46lBY5|^5ljC`{kB>L)8A$H2<8ue--Q$Kf z$1Fqo7Mh=U&JlRgTJ`Iou3PS(j(Hkn>S+j}s;GYgr$|ffGEl~^#64NQ%i>6Q`V&4{ zVx=Fhqmy2|IqobNKh@~mWrdhp3k8o}W}~eV6r7;Zt9;RB;|i#?&kn5#H|iTbN4u?( zv__K}p*e0a(bXDF{<`jmp|4wB!CD-C)Z&?WMcGrA8#_~=dXGQ&?&7He1)}0~Pwn>* zUO~%VK|TVM0j4i3tB5zw325{asWNUyrkp}4=Q(mbM$6jY~&k(|; z7Ze~)J*B6nkygC+-rrd)NO@5?V_7|9O#mhh6&#|A$ijXxU zn6w;O6-zx)M+yXgsaS>AyfakGIO@Bq>zQgGPKbr9djGWA;6HuvbeLgR0UYSHFP*4Y zV#03Cta{o;NnvZ~Z{zcsMn98%-79a)wj*$%Yicg#%zX3N7&a)nMK7w6q%naPQ!aXg z$D3CLNOf)YLagW#$2oKjcxR#|lGI@bAO4PrIqWwTja#db5)A01S8$IAN98u?7{b%s z_yP_(b3v6kbbVF}3aFGsSu>1(Z>Q)C961Z2J>x zfc3Z$zBR{Yvs3P^vg9gHmhldn&jBDWVTP@CilHu-w%lyw#d?i7Ztdqj8oPVH=6vgZzF%_m&6aWUcblmQyHDmE0BhM18K-Mvkw*h zHW7@nWd3kg<3V8~OpF&lDrCHTAm+9sH8@kR2VQpPZOB`;CeSPXbvJCnUgzgIZ@4|N z4}d^SS5B))<%8K&emfN%QjCE8cp|`(c>tEN3?1jbK(R9?bFr|MLA=vS&dp= zvZzKWji|55SRaK91qv&xS{Kmn-$BWPGLXwx9Oe*$z;M58A zZG)8xFd;7L^!L1DdwK<;*+721m1YIW1mWy~B7JKM9-FfU2LSWUH*?=>Gl!i(JoNPymH45;)%FcFOeC5I6UN=pzy- zi(sy04DVm>Iuiv_67D|kNGva{)ajimhwuvd#ORmdOXM2v9~OS{vgH{lQ`0S|t9)T1 zcDQVp>T+PVuzJU&fN0*-?stX8$#XZ%b~R=alhXCJs>DDJSNAs@g`H`IOxRCjb67i3 zKUUcuw8QO{Y$FQg{?s0wFu#70Um`Hd;~xZXolp3c7t`NU$4>KpUM7&m_1tz{B}Ksz zL=ZX#!B6mAi<&D0($lp!dHhUnm8>f*z#9T0GBOWPYGMrQvGZo^Ms9x3vlo@TYa0e( z5mx!D&(CV%JQp%a$_U*QT@D}!28bky&V$tt6R|6=Y(CqNNF+H;9C-jmcrkSHNsc!% zY z7$`eFo^1|-d~$r3YP_Bb&e3${8T*^iaa(kP-em!dt5h4v*udRVU-uw%~}bui&Z%9EuM+WG8d)j0xN^V`&dRVzhP7&ZrwH?cVS%} zOPyFiH;#>2@J!O8VwN`_%I zb5HV9YZvJkM5XnTcPmnyS!^1g&fU%r%Au;0k#&B;L>=Pd;^ZHucD>x>!`KUw1P2wz z!W@9D;gT`n^gfzNDR{d$@r8X<5W&pq*QT6p`yDmqN;tsT)EH1a zKhph`fy^L1Kl1Pc)3fNs*Lbq0IMB_6b^WPsj7)F68aL02vhtxXpl6bokfuMQpGOQ{ z>3k*RVtY1sseoe51&gL7wX?MQ9ux#jcrAA6j+XIk0lVno*s831^$YlAmtVzOM09QH z_<=Vxg;cE>sU|1e-n4kx6usLw&j}d0O)v~!pVy(e5}5cUw~by;6TWlbefFT`ZtSWX zy4i#5$uzozLibzG8NEbTs|EVoi66B@@2DogzAJHiw^My9$kzD|PxI?Vk3sQPwji zl7eKFaSGS-2Q5VjY6<7DA^Xuoqf?b)KrFEvlW4IYj z;D<&2QqD9^KPxS&_gl;M!`xdHl5UwQu*hSY?i;)G3QNc7C_+Nz?5p^qdqwL&7VG=AgCr=0V=Zg+4WbmcGDKL&c?lEM&IzD=U( z(n3^M!W>khxG+FjMn9r90#`H9^Su1Jli-=|zP2%Q`x+X3Jsn#1rkTHP+B&I>x8XPM z%n8pMSZVR*VP$`_xFn&tV1SHLXyW}ma{j;y|5gA))oVp_%etil=}F3&-|MCd8k#-Dd&DV4^Y1RGjvY3x%Lx16M7ruS{e}9#K?+ zgHTyVnrQ#NYhbT47wP8_-W<4=axeOqQ6Uam1SBT;9*G*ZGy%vA`wilkZnd&)W^r)A zdNubCwoh)#Efjk*@5!)xbiGP|;3CRmQ!t5z7RWZ~A!VHVon!PrBz|ga_)T|R3fc4HsM`EG(xwnNq~vBYm|i-%Z3t+m|G(wPm<-plyrkALRmxq zgf+su!p#gZ9p#m1sKs;*fZ>wvoDnk)=0g=WV*Pus$D6*8l~pb5P0jz)BrEjua`o9+ zJXG-S@vRH6)JYtzlAiJUS{Ywpyv!XG=mM6~YUffHDT+(~Inchz#V}i@b-`3d$HR6u zAy~jAI$mc|!!s2{i0n}j@iJIpXa%<*d)4!u-*gZlD~HD)aZgrr!*BLXcYg!5?4l%) zrV0Y5XacBIL`ne%Hl@_X-;!lI*h0QitZ+g81$^4i0)L41N_tvS*x1=Lv&bc9D0NDY zXEN!xP1V#WI^~vz>HXaCJt$bpgK}+uZV{5w2cn-J=Y$6M1O<@P-^yc!1^R!bo~m)a z%4)Ds#Wa$ysfpH|v48S_U06kQ!FC7M9tLY+V@f1@QywkczM6#}Sp&j6`u$zwWa1U0 z0eRLr0k>Njn#9>Fjmi}21ewPi(5pfUHuYJ2rRGW#c>IGw>u~4`b|z0qF;gD zVwD3{U?;S^b}Nk)4)9{uOevtwaY&Zn+DXzs%LDC@QB;U$cvC(#Jr$Me%{!`Regt#Nj#`gk>8yI;F$oO#%b&`M%ZHN`(sj0|*@p@K{ZgDP}|}1{9$!aTu5}GPg#v-7R61&-xMOVPvF6itn4k3OY*-ye4y&xWxYehM~=Q+<*ZG$#(zHBW> z61!}qFTVfNK=)~i&2$jg?Vytn8{p%$5ngHkq9~|%?{d-NuHD8gL_tSGkfwBwDXE6f zJACy_b81Lva7)9Fx_3NHD_Id|x}D&jA(OokJ(d$S_oW0m323>Dt(>n@=6#2!6&?5= zx_MoWs>u$^?tC5g@l4=3D-}PKJBjDGxwUWN~amhtS zX2oeX#X78(_}|9=D~Gl(p0YSBWy8lM*Hw~Ov-9e5fy8m)-1sJ^JOn3lNL zOXkztvtpz!0@Ay^*O_os^*jus*e6fkDFfHWcSVZB4uVj3ZxhG9Jnw=%wk=zm@90Bt zO%y(D4??X)cakw`#rqzCv?kB7=SPC7b;gjRnwp~@6ibUsW^Ztnn1!pVei{%7r%hhUtA847UZzb*sGo0KIc*q`+c7oE)4XQ1x`%W11egI|%ez81p1&r4#+-Sv$P^E0k^F-x(gOKOVMWdRF(( z9QAo?E?R{J;gQ8mRj`IK&n|F{A9o$4iO(zJ&1*=K($b3(E200{ul6@pjgJFflVXLJ zWqrCR)cZb?j^9dblVCv4?M!VLV&-Vl77zQzP^t&>GiuXHHm z;Q#rso7_=Z`El7uG7OkJeuW=5pPhDe0`2kYjUyG8+r|vq7;T-)1y6oL8#jd+pN|^9 zgi=;+kD|7A)ybLGc-!4vzi%}sPbpME`H0Su#m)q?qvrC%i-fRv#&nUfvw4%1 zkcOAKz>bQ#_b!%m`&P#3c)MW$E} z1MGGwIO0a}Mtb^2>_Eb~(Y=L%YnKRqokQ z?S^Qnf~Piz&1n@Y1izz=*hRLCN+QOEP2OgTJ~Awm(rf?4Dy5|Pa#1HIIWkM^+O{qNwKasQo%m;Xq*3; z4Wh65F#CbEjWy=r6pLRlq^y)&a!iTE0bPS;urGpikHXAZnx&Bai`&Od*SJt*rRBbK z(#h`0;ROay594^tm5rT2bx}G?u2BYCl$khp;$nlOHQ0$!d@Vc8=pCp)cAEBQ@nuuH z=ua|&_sFV+zHR-KnywGf7(=73$DzEyj(3$7W0~ZV&$&gZL+{EwV==)D$WVQF;SmKS=8kV#`1A$J zCCw(4gSC4K$$X`b;omEqpdMmtcur~WX1#l!Qm(#DkF|9$WNv)6l6Er;togplkI7KM zQ7>14G(;_!&aM3r^1O!SN%Egx+@EN^LB@V6lV|Re8B54%Y^WS|pbNqtf`}~EG}ocH zd&ndWy|(%})<31`oVgWyZ#4BRvkm&57&~Wv9dO8IP2^9yDz!DX#Koi>uAtQs?Kvceh$c7gI@rR>@Q>f%)uUQ*aujF$=39%Guq`t@2a+;Wo2*elHNQy{xR z3Zpw)2!askD*hZj@Svifj@Q%+hExlzW|}hpJND=AebD{SfsHP@gzRa>=%_(YdY*hW z5qU;azILEM`AVwkzmVbGO50|xdFHFlr)LP+PaC zCs#8(pgb<8;jP*H zXi?*yI0Nm9@{jk^eti23ZCHeHxKe7%8Mx^?T?NLFU_-NNN8z!Yk6&2Mbfefw0P!|2 z9q%W;7jqsJDEY@51uy%jyFDj#;>PwT<1+$)xHTe*Fk*;hNfNKSVQ_u=zcR;>{Oq%K z%>h~Q9(pI6mI$$;&q>avNm9SGI{cZ!h?2y48+AVIxX9LbLiMhcHr^B|@tor*6|AG0a9wS(DF_*OaxG@;y(ue$V*u`dj*KqJGL9j@n5=bjkn|8T~oX#T_T!3w^ZDfB_n zrF1ev8b@jm%E>8L&XMa&`nBh$`(c_;k`TovHHL{-n=g;P6kwmq!wY$N|3!obJS_B- zab%#m9UKL|!z1wD?X=5abY=I$7z}NbHXau}{a;V%U8H!LAMi5n?Hi8RyTV`=!iQ%Y zK<0A%I!W>Z;vKW6aJ<5XxvYt{C8#{hY_l%sBOGqDcF(xDcB|4wnzMaB4}FpI;lMTM zW1enfYv9#!nC9FAvuCM4?5;z6t}$~g8Jjs3y&as|aesn!UE88(exNlG;cRt046qy0 ziAL8N_*(Wo-2LHYHG#oDB4PI9fw26zu=RCNockEvWfucv)^feZ~xXF!w=#!nqp=Qdy&|OU?Uf?~6XI*3x(6w*9Nr>h0y7 zB4!^Xk+}qGKT7goY8UP2R_>IBJ5A-e^oVxrJL|`rr|P&Kt{iuUboqt~-jA>1V4<5` zWZmk^XObfK(pj70MfS2I;L7)1G4 zRyaEnjKG*)b087swaMI0%UvT~(&V#V-kN0AL-F+>x6NCk_ zP{ZBDPw25Js_4~R586g(RuIJUnu&Yq?)%2sJEVHA-TRVJ*7@kR!YE5oyA~ycuCe(G z-1Mq`*@^fhB46`rHQ)x6kiLbSn)087`Ka`16E&JEX4PF!urcXAN$+Z`k}}9w(n{6U zFkF0ZWV*s&54Qx&X+DQH{Q!O)pwE3DB| zzEdA>rQ9~gJ^G9acyE+eX5i4v@(Ra_gXRVo2}2`ELZW4M0q$>XgjViW?YY)xYz$5- z#{@RAsrASIsH(&NDTYfFe#cm`>?y!wdY}{shKuUZc$l%crea^9@|O*A3atC?JM>&E zT!Cn1-!KrK99Q!%&1`vvKS#M}%WSOabR}0UbHyT^^)@rvv2T7bwtx{5c$~TgmG(+3 zV^D{vw;yOZ1D#NlAk|ej%lm!g1!Hy?DT;-WK3<=jcee5k4RaA4J+e&uTj`X3I-BN8 zwJPT&jW&6eH+R{-VFcJ_b8JiqFpH%FBaND-WR2WVu2ukQ!wwe86w~KrE?@d>bzy#S zZ67Hs(p2c`S7Tv5>TKP#DnTS^bP9~KA88f{;srZm6*pqV{&IC`6YY}<0R14 zqTT0m8h+XPA##rn&XU@|9S|xkCn{{2u%?t%gw! z?yN2&sBK=6_2|(2e$>i*0nOa_=cwxyFxq$LK>f3a0*X-%&;OBXbVdE^IAQ}3b^f85xTbm>oi$&mI#(q9xg5pN$U9*OFC=-@h?WIh@{J+F4 zT>KpM?ct&AtB}L%-NP^}heJ`tfkN}(XFrIH67rmV+P5&)Ka0^lZwj8@(N};w_x99` ze@zV6=+T(EdWlRVE71=up8=-paJ$I$D)8xUjO_b43A%B6HjdtOwa6&?=#{K@N8LD- z9r(DNK*<>HjLp0cTLSf(cJ-3uo0+?K{SBjFLk~v7Ej}zLecJqe4WsBRt7_K`5au1` zxI<)7II5bilE}vPZU~8mG>MX{=O%KQ);ud+jMOim)=O_PU9y~$FQhRP^PH)g5cMq6 zoc4;}Nz-X;i1&9}YV>d)yy)GqcS!z-``X+d{EUU{l@$F!UUK^<=$OLN0Mj=#)rQ!& zW%f^)zb~NfAIRBLncBj5UrTw~p4NGnF?XJ{w?Kb|l7SIc*nG6n?|X5~+fRn~Y;)%c zqe(UbQbfiA+vSj-&QoPSZH(VOO8wHZwbk@sJ=pOkptt!l0Gsp1K000%FZEShBuY(g z7<6A^WfEPaN0@TmVZ@+cVxgClu#=E(PXq1{+`8Vs^0yRlImcwXLbbEs!0}&J@~LsL zIONPCG~}0LK%>ef9O;Y&Wj-(CiBn(`XXa`Y7Kl&M+qNYMg86cLDF_J7n#P z7gI+?A{}D~?5|=(+%s}Vea&O@Rg^wTGT=CLl%NC$1u25r>Zf6aqzPqoj+VkL02#TY zE~_t;z6~7;z!2I=1agmZ1hz7-R535}Z9g*ys99w?W_XSGS(0T)&&+bF4K#YGGasps zyX2=er^?UqMbo}7V>VDjmL0M=>#A$#E)0HKGOJ#^gSwhH?@+lMc`)l*W_+7cd;bqp zO}buK@OIt^Y$+0I`GBY_uDX-CekPRdfCq&jGA^&E7E%@PZ8L}ye1RH`k*II~FlN1c zHqxKmr{aI?GLDEY&0%uQ*SQ~jT*7?TE&3w|wMk5Ccf)M&uERl2wKV?xZSxa#uGmrf zhYQ%C>Or6n+dpf`fjoy#m%%jSJOad5V5HOs%>G_Avq#MP9L-c_qH&UyU!}jkMo6%3 z7!V>z8QohGyb|*__Bl$;w8kyG_o^DtBuXv<4B{a?16dNad?I|oC26(ReXP2*MjntUt!dQT1i{!_Mn7EjG;pg(tohgvC%u_4&4eXuV_ zUZMDi~uE{5!UL z`mjB2)Bj&KEBUh&Q|=#+=_j*Xae5y<35qzdRND0T+(jh+jF73XfNaXKHO)&psuZ{9 zRwj(e!sNT9<5PXa&gZZgW}`YCOZ+FE&7>GZGB6qYP(%9}zU~XE-W@O_{m{!%-;Np% z?zMKtPk$I47Bz^( z40^0dzY+2FR2Ggn$hpm;xDjcmsn!`up}-W-k~UQ;QhfQD+POUAd77s70ve*3>1L&jVSN3LH>Y9Vn-&Q_;sm0 ze7b;$x~$r?^iDeUO!`PH-R83Mt_>>Ku~z@DA0>$8f<{3Kc-pN24Xgq0>r8}tbBuP3 z+$YFbbbxx=S07wv#_K^~=+HRWBN%h9pMxI(Yif^uA^udIqSA`a@@=szphHZ1DFfMz zp7g z-*iMcDOG)Bm>ni{^A7-p89q>=e*eEZUL$N%LSZ_uKq-IT>GgH7FbFIKTd{<4r*Mi$ zssqu(-|D{w3^?%D1`NFbPw0a|gRvZ~SRc&e#nm2!PEHun!JoVEyD^EZ_-l)9@b)*G z7I`ziI;pt04@T}x;wOwBjfAj>%NWt&7PXr+5;JLFRk?PT!QIlN_mFsx^99TAGIGZ^vO zBHE~*Lt^Er$E&kuk+7DohG?EzTy>i>_h+v~*u*|Gr`u=P*yzJrNUiX{@4n<;lNu`v z*C~3r!K+^xRYqGBeVOX5zp_bvMCaP?>To`PJ;rGgKXO`w+xKfGp-77wLt}rkA(xuS zr8AhLb+rF4f97g=LE=-IibJXe)_&1A=0vFz!dCw25vrKHT>|wz{i_yJIH|4c@x>D4;$_!o>6o||p*&9BuCz7-gnk{=ru^J*0Z7KuCzoQrX#UfNhK#>d>-cm{!4nqvp}jZ0|9urfV#qkXUjKL&3nTI zB7F;dypJh}A}-~Hhsg?@U!1dbaSFK&R8^t7CK%F8?PyB{68*GwD_UHluR^}W=m$6~ za)DccdGYrm5TGMKYmAU9&qS)((#-4(&5n)KjQjCeGkw4JIen?Hg6IBvJS>=r^a&moLO2MLi2BL-`f|c&{>BJ{*bt;z1(Tx+;2XsBZpZHDxkrYo0>|$lc=cUQ z35{=UWL|r2J$~3k9j!aFVXK#3;B3qs*e5K9cPYmQsfqoV{C-UJF@A4bf+3CV>kmH$cB&gdWAMb-@n^ov;B<8D@?&m&%^^;}8t+t#pNW$frc@vdenQhRFb4|UGQNYKxn=PDHB zeB;?8wS%f#sx7D8tdA`QPr7cY6gGh_PB-Y`-+S?C-vhwk&gjvnF*46Mk1V6&bT1iNvp9?Y8k+$Y+*ku%eK3(%aqM@lu1qT~S6F+W9m8 zeBNo2kP$TjBgpp^G(6*6VnFJA&bB6(Z|6l5aLcsJLLtbF+jkI(lOOMAM9f!m-9$#n zVcJaDv_TQf+?*L!yC(K4&+C`zDRPeV-b}*vzq%}H0g-gYa)3P-dE`O)nnK`-wGT;E zk6hmmsrkN!^)#z2D~eFb`x&c;x7>c?T3728eQT8amzJPTZJfWKkXWm}0_qv@B*O_- z)J+i68Uru{7n*W+t9=0*6{PqMld_qHY;+XNx~i2mCp69~xRSGAPX-Ff+gZ^;#%M%j zO|Ty*{P6e!D79@oC=V>jF^?+&X0c0w zr(~oXBr0`%lLI=LEY*D+NzuHpB8~mY$o)jjARKv6_UjT z<2sp<_hd>y%++X5>ff#>1-%w+jniGQW3h1~?YgPMbD5B^n>ReLkT=AmQug((Qkp}2 zgSU8CpD@fl5>R<5I9XA;%1dKZdbDHZIj3MLF|D(OC=Cx%F!6>*?+N89*8QgMPgsvY z(O*w+n#KR&?L5QT`v17E)mGK2y=iOJZtbloirRaos1Ye@Q<1c_ckR}!5}On;YSyk@ zn*vFD>@5%XoKjZy*z2^>33gW-ZV=(X&RikDhL_O-* z(Bv!w7iDzz8pH|ZBJR{ov#0i4hic)sd&`IyIAO#lL)>4k_X}#0!lnN!_SbsV`#6-u zw>&H(CS5#T3|?-j#n`kn8&D=kFtStP();LCH%1OTK8EW6PS8CvSR%-tXi1RXoN5LJ z$5}|01bCvHI%LF_tc>5zs)DEt=T-a2Ebp<0!SUHXuL`Gw{0@bY5)K7fAxuxy>*Rgx zB+~hFqJma-!o}>m`rKU&Lw>4B>KcaJjUAc_C=v@Vlv_fXSDKU~JS-p2{UbSZE&o2I zEQm6c4^;DY5(cU9)au0xOBL2=GYz@kH8iVNQ@AIpHCFfWWB0e#Irs-qi(el5fPb2X z^vt0eI|QG#@!Lgs{=`{&u!ob#|B;ww3K`gtzUjkHUmrXPi;U6+>?ervo0y_7y`_`E zxt#(X)U4ci&}ET7tZn*VBv27)!(COaVOU=7-tE}fdaB^Rmha@-K-XTQCv-r_f12{0Kv1V-I~b*nK)) zfYagzFu`QwB6TfZ#3EAnpCMqEGmt>xO?^?D#oK`pq6)Et9vd1()t$MhR2jh%dc z(0A!WpUQa=A?AlL%>K3HSGZ?eP*79wqf*3+hsKsOWwR?p!V_}(ZG?3?y3CSW&9Q$< zzGh@O5?^`Ks#aGoAeQ5(#@r|$Q2^?XnS5C62yaT5UHzQ8G-*$-WSiZ1w`+djImH8* ziRhvNzWX$3?dkUc$q56siMnkL+N9>m7A-fo#1C)Zbj5BkJwpBphxhTSnf2Z}?d4ew zFT=&7<)jlIhBNKxXBiP@*Bz#?Og%*R}s)F_*ppL@|sR1@drBm?Q;k<+kn=G7C>qp{N@lgD}Pf`vh3Zm zo)o9ldL(E&adUTU-?}W>XUxcMs1u$9U)(v-u2`s>>oj)$k3t@8^9vP15nxNpIYm7|qDZ23_WZGU?t6(uX0>{h3q&!IZ&1%AH@Ee+r;YN&?) z&<#^4D&4*4^*)g%3b0j&QT<*}pH9`dy)rL)y{Vr0S z3#TCqYL1(xx3GI1&dvL|p?_apbpq$Iv*j0^oUzM(J&zu(Ty8;hIpmeF#-|HLA#DDA znhlKZuoj?EtZCWuRkU3zPhBmaFZpx8T0iGFP`o$oEEKZyBfY101LG}=n@;gtp%ZF* zlg#*S&~#J&R-h8}o86W`rLv&(3G;=8)GrOn+cj6ofZT*80)Bp2ebqKPPMtE8stTC^ z-^k%_tW1D=O2_rce>Y8&Gl1h{=QM7I@8~T;*?sBDDtBAay>WgmlI}WfrYvCDy2eyP z$i9BNLfZE16A@H<+ZS%h9^7S3QXN0#Hq(=0&;dKX>l(P?LRH*lkBa7syZ?4>e_|-L zc4lX5q3!Q3-o!L%#!M4Nu>2@@w_}Qr-q|j!;MZv+=xFLeO!YI_s@4Ltz?sgA^>Je< z6womecjlJ?4s~7BAZx_0o;-qTKoz1D)Rf4zRr-b(h`Qz&ai1u|*la9H=E***6-s@5tta(qE z9d}11Cq7BX0V7PF3j)DTQ7PciU!kNUgLl#YW-hx!j7k`Y_r|q*2)uuz%Nq$(dFc#J zL_TM22D*{TUA9G^-5P!T$XCgF)NSW)S$4t&&yKp9R#7rd-Tg4vA;unHqz(QG+0lJs z_WUJ$)0FtJ>@m?ae zRemdVW0^v$Td^JVAXmZw*YvP>c^YRgY4s|y5i=@1VA_7d-RWO{>agOw)*6*@K|vnn zyL;K*3t@->MC$R9lR0gv@;~6L5Vj0XkMB_4imGk`8}jX~>ekQtPu6;@^X)LSSEw!? zUDiN>W8vC;U{ley4|hL%1-Kye;!J_bHC9PERhl(R?Kw5hkHmptQGYq{ANww91W-c5 zJtLz7M~G9Ocg5b;_={vnxPmR9G3~2@H|Cw0Mw6vr7!8TpTkGMU4#=!f>Edl36|f38 z>F>~aH}ZYyrXst=@@~ee?)yJ?E}UGOxv%_F1rDY_Vn{V?j2~~G&I}E_tcOu!NxqlG zFafA`8(>NEOQmJ#GCiII$CGzVl1)0l%hmf(rC}~?`;Yx{PP{(cVYk6MI@c*INy_}m z6Led(420Mqy?>oyK}3JGqQZLgfl!&h5ipcqc8DcL<&hZKIW_T5#a}!N0x}@m0k|K0 z;V-!&8n}-}U?uJW&yO1U^ z6TG6;^k2Mvo^H~SZV#yUc)UXx=)y~k6t{Qumx8}Ij&?S6Si8p-v*oVa{q%oC+yxdJ zP!PR+M7ly$Ca7+K(&6sd=nnsA7%P!`a9x$ay0x39we%D)GYF|!)$vQOx}Sfv>l<62 z+EF62cN8x9$tKszvQpAmKH4GJ^q)Uc+7aerQ|wO=Ap_DQ&Cc^iBKLn349)-h6wgYC zp{#94QX+`18T*{}Zo!AFoK$3S_y1q*a7hJL(8Mxa(9_Lv{8+Uu&1I?rZ#kH6}B!2wX zFxsXRzyE|76y9^cRrXg0f0{2Tq@pu|{i#sWxd82AP%J=!Lrj%;{+SgV^Q5<7m;fyw zk#~mB4C#Je1ok1|j1{kjK3cjL5^WNXGmQ&z4A@xNIyxPFwgi<_Nc^-Wxwck>9+fOJ z#hv6wbSa12(wFN6zUz2XXLh3*GCy&9&H%62Z+cZ*O~+Gcj!Xx&Pu{GI^>d-DbI?(1 z*4;Grg=*HI(TZmj@{joR=(O09Cl@Y)33R5_v}^7**UWq#${zB z(tBTh&`hz!>;A)4F>1vK;{hJpByt!@{>nlcqIwTY*Yz;yWq!+Pp}$DXLEeOsV|)Vn zhqkNG8SKn13oQB8NL1kb&Sh%|_od<)gqY=vF!lx4?k_56aL$H^?~5B9s2a|nUYg7q zH!rl%K$a_7GsjKxgF8MvH+k$15n%NoMFSYJ#0y7~_;=U?h|8_ZDmC@3l0*lM5|4xJXPo_^GazDc3;zwS+ z_`I$eU$^M^>HIVX5MOQYDLfFWnZkLX?8@IHF~P&QZBIZUY)e9{dNXl5bNoo8dJt&p zuwVKr)DnLPv@|?=6TX*5Z{qLPR zsfq}^^a6u61LJwj+IFLn%I5Vdtl$MZv|Oc0bD{FQw0OT+(SaORolkg7DV_cO=22l% zgH{~EK@zt&LdP-2>OH_{f>4aBwqUB{3NqV<)|<%0iv@sTcj0~hn&9!?7|mvKG(K{` z;YYrIa*x7Z5E|QEcqDXC@|vXati&Y``q;p)qoFhau}jgq@TIxHGEG5Pl!ENr`v%qQ&DEz35np{Y>NYz zoiGqZcMf<(4&*PMLG=jq$+c0nU&)l6SvdHc7}>-Z$Y5z|Cl`CH&)J}-@_{@6Gn}l4 zEVAEX{4s~DyO;er_7V9Fd?SvJ75^vof^Uy}Z_Z-n6bO-^<^&eLyPdkA7M7XdNqTj$ z{-3W$9hH!ODq|ihT|i@^elwg<(tvn36kjW;jZ;QfnkEw8HgI)2oK_E;G9*sycFg~D zpjY&#dRtLF%+zHgtOy=9E*Wg^P%`E0@<+ZNcH2>l7flmjFpO16lWJv_gtoAXO6H2Q z{4}59J1!H=_!2U69~od+kI>L z#xD>9nVD#0gZD}}QRv}Q29P|P>N+Mpix#%_C(ati436LH>;9mK+T&{MfvZldb+vM0 z83OsFjyy8W!iBB-OQJvi4ioHZ-Te$u;mbdcCs|uhE9nO9HCf$i zHe|0`)N@K4rLtvK;qDv8h`f?CfYXl-*?SkI&&W>9{Q|~8l#2!8kEPfvc|xyR?Jo3K zs&pOn%UY%a701zv5|pjQtM!q+{{_|zaCcT(8j{|-Dhc~8``|9I%y7mxQ|b(AVUs%2 zBu4%-X^L7M!j%z@>6DP`8^z^URe4gF(?~yTf4al_B6=a7{sln#{xz86qHI7zY2#E` zWRsHrqdL6E9=_4}A4N+6wdQ6Fk)@py45B423G|p8@;}%w!R=#M{}>G%BAAK9N>-NK zw&_;%-zLClk4~<;3o)Xp|M&#w<8OyrG%)!)XLVUo|L5Rnp%aF1g7-1P-KIhvNRM>Z z0H%!0yn!J7YbO0oc8#q!_KLv9ugkF9As$L;LijyPo6$Rru8T~#p3R#=VbP~`SBt06 zwhs8ra)9|3Lpr>b3W&3KNl%DhaJ_&~b0FU~pN$xqsC>%0Qfsbtw2(0`3Pn}J$Lkex^ z;-Ye*-%u{cj*+pd#Vmq-sjZ>0|F7)($qqxppuG{p*zWea;-=DKChfpsZE))&qv zsgm){$w6Wzz=>*sNE~-HWg@W3>{+>M9S_a^%+H>!`pM_*Ed0;WRHuC5j%S*2^>Ow) zX)3|@L`wDMB`kn&=DmYYAD-qU$>SBjjx$8}h~OJqHl&kX#0ZP^07OO{M^qDTbpQ<_ z*@$!6=>w@AwRQ?~}^Pb-K zTbRNxZ<#X{j_99IatuG5Qh`0*kthDKEHM?awpNqpI?i$6$hQ_7s|kjDw|1w#KUXMV z9=MqGvU-y3AY_KzoBurc*h_03=@8?t*TWTn;POX*M~X?k?Aj95CXa~%@|L=y@&;gp zYr2G@1sM<26Jad~s2nk4qoA7#*On4&n*6G5kS@$%p-ZvWCqFHBwj4&$f?8^cZ)(dM z3af3^Q5a07MmNHiN-q<4^4K3qm z_~v>QnQE2QF}doI53{L?lN@@~k&VfIlV3Ez>dw7Fr|B!TIKS>X$g8!HVLJN73(NT) zEbE-XP#X)&BF02Ygij!c*L+#qngS-|adB9PY7U$6 z+#`2S5gEOL@9u{Nef;fkya}8rLQcdV4gn_!nXIVT(Ua&=BM9S6*FM@v4e93lkHVm^ z2O-?3S}W#4y(#|e1KR!T^m`3vI=ybO&-H(Ly_Du1_6nUGLOWOXpLYan^mkeUF6e%< z$w@N~lOm9M$JV@Ful;imeC1b%%6@DNnH8^x41k1Hhlff!s3zCS9QbNty0mKc-u-j4 zW@vfVnb-FfV7w@-?z+O%QUXmvB^5IIX!XF^=;-PWtY{08EfU@9Du z9?v^^LjHy9nJX~>j~P1aCPP0dD~W;eFOok>w8toX{_Z;BuLMxeSv*q~He&kWI1SAj7WBQp4FCgn4K(}hnL0PCGS>G$_)YfadULyT|d(W5lz!?Y3i1;{5 z>^+oKYn$0@>z4m@l+mqE2N<460VdyDV%SyAwH3c|yRDog-79IVvW3p?}R2NH4DLqqx`H; z{m%pAjAHUWdWBJ+Qr!L>uujZ^CVuC1v>Z9JR7Ee=Y#RhD>aGr^6U{Y z4Va&8@0;J<5wq@Xn!Kthp~o7{TQl@#DlGU~A#^oR8Iu7TTmtkPv?K=nA&F(_Ox^S? z7d-Z)TZTN{AGQuq0-3iI35(H{#Kx8qmKD%SYPieZ?a45yJl{`iYkgqJoN`|oBfbw_ zy!{y6OO&^O9}Cmf1EI*m9p0vg7%GvYkzHkl2$0IR&ocE4UOY0jx5QqW)s9OUXnJRX zyV)B5oq7#zbL#TcDvSi0=2wWUs5HpzRQ$YtUrHZ>fV3WZo;BHMydesL$V~iv3=gsa zzHT42#TD}CYo?FTuL04;`xyhavmAUm$6kH16a?w?47(5JUCP_|SG>Z^eA{G!W-4Vh z9zNYD;hSnn|Nc3mt=mYXqVw9dgHPX2PJYHB5lWKq{%$xMi@ENd|C^ca|Fgg8d_PWy z8#>&lB#?zx0A1Nz`8y@)#hUK#9;pt$n~3j_4_6C|-YkVxaUehaeY&nhJa2k?ixftv89CZ|P(XL( zdvsPt3jw44dP;o9AI;zZrz1%aQ;{?Q!RNNoYP!(Y)H`X)sXbXC_mKHj2b>|pPU5T- ztdzZt*@2NNx9Tr*E-wy$V|Gt$pFI{5{gvMYoMBFoJ$?Wl* zj>12oNSX+ayPQlBdaIelv8LN!cT`P`p)MY#5@q>YH6FJsdDIP$3%L#D5!cYswI0*L zWssoA#kCN){+nV~OR2sQnZn|GEa2*L41%jc9DN}lDKvo{sI-3WOSB!-5Xbv9mO>xl zHIwz@3pv{aU4CRNp?0eX3vunfatkL`ulCp zK6g9%RG0qq$%N%Inph8Az}CCpTnyuQ-L?N`gxlH;t#4mBIrmDqNp2_Fg+5RC()l=BeQeVFoi2if3ku4!SR;XanZ`6p+Ko5POP?U4x`_F%N z#ChwbATeUgE+s*cs5$s+MB-NMuch(gE5oaWr^BjC1YD3vw0t_951E0$da)YO(Te0< z%MP_|s%`~5;z)FDOCk?Ky`*6LM6~>95YT63deimbkx6nCis?q^ z4(EuH2ww~7rL*@sU-RdAz*Glo41UqkTGjSe=F?4g_Q1zn%ACCM&-%4q(_0ayQ`1a~ z^MT%<@vr(bU*G&0;8v>*_qYzi|EV5fj+Z>TGk&7e`?1lv9lD#p7@fgfv*J z+~4V0-|I;H8IGO}Tz)^qH1=gZMZ3=b!WSrLR}+nK*o1TacnLLE-l?+ENrG{gYE)SS z**JCZRYiK)%Iccb(6R2u+dVticPcmaR<8b`XxrRIY^KMW*^gEUx1WDVpMXTE44>WT z`mkl3(0oS^!|CZfr?G(M2dgTSV0wvy*g-fo5%8=QNl>${p;I($CXTvR8;RryjVI`p zd|EYuwwsq{-*fEx@MM~z@QSlC3nBQJM-6ZCX>hGd#qgA`hSb{ApwM$>yC6{Vurjtb zrj|A^c|d6$wzOen)E2ems9KAuPyh94`iyTbDKO{t~t1* z;5Q!E)Bi^gdq-5n`y1m!+XxK9He3ohTl)!j@Hxu{4O!O5a%T%}?J=0z%|)X-!tC_d z9?L;GgOkLUx|9iUpb(HCKn&1G+;lWH!E6>G)+;v>4`_`2>sP>M4}BDoEZ=SoFP_Z} zKR3A5)boqbZD;#i69e@(%%Odit5D3S-NTnnM%;W>X~LAUKNFn88dqpl{bfGp<7{Sj zc>@OiUM=gbxJi%GB7KE$U}-`vLxWYWj7+xGgVQowOk}u*LlVmlXXV&tZW4f`>6?xP z=!CSNfLN_Myug95liC$j*U-Bq%}soZHEHTzl-_J?oqOS1cQSboJqJL2e8r7XEuZIt zJ2}uwciupE8>F5#_eid0Fkm$M%wwJ%UdTdqUu@kshY6DuExsrZ{9Ne7-*~{Fap2AE z?UIb?6{v(o?C@Xu;KjefaVY3DOc>i`zJ~A}?#66T5&{QR zn&k;k|D+)Ut6EFpk)Re1EqM-$q@4EH|({U zp+#X<_FkK)NnlWRVL>)RR9RVdbbV(E)C~Wfj*s3};!Z)gNIoxYRMGtsH=~sVoNyiFx%+*V7w|__N`zqiNEh+j= z*b(@0ugL=W{!j$CEIhp*sLiyL0Ii&b7E?y3Mwa<}SCAl<0mYC&fROLZAIgoZLk7=t zd!gqg@xTA5Y1KznS}y&mv<#~mzmw~6!F{G+D!tLY>ho=%e;A7npuEfJ3S3c~;Pvy) z2DI^?&uXU0?=z90gTDmwlFhjzXf0L2f90=Jce0^kX0l>W8}SW}J1CMj4d?gwq2m<3 zAjeesZcdqmKqytO+Tixelt4n@SUXAgsRZDJZUr$3ai>)iih+%#@YLTZ*iJG)9D*Z) z`1mYek2MuaGi+xck<=wTo=z363&-5mLpbS#qbd`s%BC&U>MJM3TNk_kqfnJMUCC9& zFr=g3nU{}Q1vCPly-kvIcRJ{pZ+caV; z)$4&}7$S({gyPV3lS59gaGMNb1-w z_@}U0Vl+xZDpxp*_kB}dL{29z@&PZ_6+-kNpfqD7LCUl?{LyElxLK6C$H%6{x&lW$ zUAco^WiY|`m7J_&rDm#*S`$;%ezd0ToveSBD#V$kcm{FE_^Rg@ru)6 z?!>pn1H)>}`(*CsDE%S!j@rFqQL2IS;txR~HI6M^DjqqLbK|_x_RU|Dj-E^&GYk}7 z7g1iC@cLb?-Tl;|G%l##P;L(=z@g3RWymUKV!f--{VC>7IcD3bvbFt!Q=VgHy!60l zoQ_8vnP~OPCd4(dvk*r;Rw!DhZifu`Vo+Y@6|`|tvOJ(Y-*t7Je?bnJypIge+M?we z860WCr>7T>JjP2Rhob0b$4sxA`j+=&(K6voQ^wl=x)lEUpXElLd8LUupPrPg><#a1 z0c|2=FfyK>vlqvajKjvu!Q)jKyXL-82KYSrqn`kJ&1A zO-JK{5W1w%+0lm{SYHIZ$)vY7Ja25ATNj?iIx5~liDS>#q{L8;)qm}^HA6ajBQvhQCO z(cVyHjL89kCHU?IJI!096p0;GPt1iGT7-oz8S{~W6UfrQl+*Ex zUX>gvn_X#-#N3)9&fy}l2H66W@s%m&PDi=(&Hy;xLX%!PIT#cxS`FnUx)WsnV66$X z$?gRHp>w@h*N?Jj^qnuW8m+Te<1yXt&@3tx%*$eID2({Bt{|_@GSYY>qYfiuz3Nh?92U2;kj{TolTr_ ztD4l}%s60@$oe#QQsANgWO!+$THmnGl)Ni@Lz}Vimu&ZtHRVx-%x3+y=gcWbd$KXv zWlBN1>$^kcb4DNj6sKxSR=^cOjDF9%2)zkj1!i9scn^6B_Pb@&`M|?0SA&;J->RBX z+-j5%ZFzKEYa{SH__ni;faXhQLoB({348(uB^Ei8C$WfygV{y$)0zjFb^>;@(z2naDS8F0Zx1*cZu%aiQBy7n z6w6M!)q5ava`Vqz(n0eltT~r(UQOiQ$hi%9L=$gaLKLL>op&JvWxp&YNnh9znYbC^ zVAp3*sw?#;{wy_n8h5=lFq_WS>1RxU=D>S@$su-@Q}M|=16rY^!S>0Q0Vm)Tqc#62KZ?pZT9+Wp#W+O@fNxc)6_?)%XcgQCCmR zc3;&gwyK2Y(5*J=K8OajH@odi+$w4A#fNwu#atChgf1;8i(qrJa zKbBYmxLCn%L+=7%CO^9)+|x(%HZ-aNqB4@;E619v{2#?*wAY6T3%0WFzeT#uDJoIpDXV?g{U}R7i0%rxA`QX7F zF_}5uj{WPmQ8RLoD#4fUd~EWw6Bru=r~jdW_|E|7^6(m+EnK2{l%de}&fG1nC6aa6 zr|=u1ocZEF!ImrES!96GQ9RQ%?R=JPu{>TWZQrV$SNy;f!%e37kKzJKUg4(!xLSG`H0ZNf;OiP-~qX zrG(uje4T#kUTmUSSud7ltoN`Z$sokGyFO$eJ0ZZ<@Us)<{EGBP^jE-AOBDZw=(_VV z$qApms0d&`KZJa1bqY5eR@b+Eq{q#nr8rRndWv-{4bwoQaMM1cRrBjR9X;^9Zg8hmIP`1Wc;jNmkD>rM>J zU>neF=$%|NRE*FSIKunE_o|lvJ(OgD|H3p;gmEVlGU`5**Fnl#- zoNgdm?ERVWar=2#mNl#)5pS~K3bx>65^Mx-S;-i|c^+_^jvg+9^oz;~FWUInh)eRT zz*tsJ2oR@l8uN|K>fkJS3&JzUrmbfORz?J9-b>Wa&VWqw(adrT%w3>*O}t5w$+R6_ zWDqhAXC!G59@lRcuyibtxtI62JX3?@UhaX^htkUG_GR>g|AD!z^5u%wZH4tXp8}0o zR%>x2)@q@3t$WEM^1Qqb8CvE`|KhYQ7GhISf$B#6TyvQ=sn^V!zX%(4VZr}RgR0hr z>ksA27x&_NZ`(~*Lbx=_ICE#oV<8yH?*2F%ic@=m;9Nx-L6c0eCepO#Z}SV8@zOqA zE75yNCG5xsdf|P6Pms}b* z`LKB@uQ+9owAm@=3{}RIDE70Gg_Dxl5*9TN0)Kx;>D#FSvh!;l#QW;YKb0&-HxH-2;gc`&X010P5ejEq&dXTvm4fAPn>q1 z#e8+4INCn)%No*Hme?ZH$IZ&NslX^&v~(KYiH=8-d#d!(8XL)m+U3Uz82BC`c@-MwdBV_BAANVlD3&Nr;$H zW48wP9r+OdR?UQ>nX9X{Oj9 zK#R&TyZo7Xc2ZNNtQQNGvQ6l-&4-Qo9$WSlB0uo&crMYiK1wVs9p3y!Lmx0t=51Ho zYz=mn`8#-?8W)Rj>^dK=kMgRtThZsqbXr|^G39OPVk2lb92>}G-M30%3wr&r^~x`p zXgJ$3u4E9&M^ftzU*G9-kzDF}sQUIx*vu(+@;$8|fsM2oZ;Hc_fEt}Bfc$*~lZ7py z!&2o7SUUksLcNM6Kgd8%wX9%h`-dZuZD?CCCRfs2O8#f;yYjPhx(hqNF)~z(4l2*0ps8e4Q;!qT8ZVgdlkm2;md& zj>yw^Vdi5AI4T+rW>lgbgabGzi9MG+WX-kziRxRZfKl3!P+)rj*G}S0sqRG0=;KQ0 zjpSnszJ{@SA67cn>k3h@C;d^!zPxhj0PnNZ^j_BV!mbDmFLk(7wZf!{ahf<6qQS>( z$t844`_E+So|gN4G5MaEd2NOpzQ^uQFo$nI0~3FBy{Lc6^nAy5`CV<(b7C$$E)E~@ zdqlQ9m;J%oEaA^YOfPf^pIBl~=-;TZGM@Z0f3`e^`f&;#?N4eQEAEs%w;cJsSqzH9 z{h=5`r?HFon-6a8_RqWx-W|?mEBut-+?3-iU9Z2u4*}vQ^`5Jf7g}Us@1<805A*he zO5-pmgtp|-M|e8!fxw~g+_|@*GT6O)V^dGwr)!{%-hBin@Rty8+){M?*zRvyKTcAM zNmCkL&~>6He-#6~dY_OvcKU4N6&(Vf~Str|bDC=w=jQR#}2$GsH6QAs!^M_>oddCmfRpmQz^;G{(kzerD0E&S4SiTn!oI54o{9e zGNBs(`lX)QGxcU?F?PIQ!j(Fno$@*xdTTOC>nu!)<{!*zC?|B{y)u#e>1FNdn#tkQ z?nM|Q1kL^$;ImINk`(aqX>q+D*H=K{Wx52t#*GV_D9`@&UF34lX)HlcEA_O#i-c_t_mv7w^mD`)FGBjk|&M6bl&DHc8@_et> zW96EhT_(0?5iclae7~<>CcDtmJjMyf7ZEsoAp9rFeUmrx8<6hA`HPM^4^qaeWu#;j z29f1Sw&dmFd&J5uIP)Hyr3J+KO94_F-aDAj+w*}vUNA{ggO}f;qa~KjYvG4X^tC7U z<&UNBdg4r|P7YlO$D7tWLs8PWuyhzb{|$v|TqZBI7)UWdYp3cmqfo3D*-b_OgxcRDQsmC-Y;^z;gZ ztV#ExpUZW%l7)L0R5pPF3xEuwG%>l%+^PjZr6e>>72aC3*x~J;wVf?1;ajCbsJv;5 zuqb+BJuqrr@oQ`~%iQmKp#x+MidLU%wAnkve>I%aDgALb{)Zcw(GR*@=bovwVe6eX%jr}^h`VK7 zpme3Z26mGe>%ZmCOazdJ!`P>@bCz?$DRtDWKUaHSw7@kUeeuRQPc}V(x#qshy~U1$ zbteV<2&(wJL7RtCH*<$0dZ*yMZj@e!qY5iq8fGA57qOV{4Hvc~<{ym=t5n7>8G|J> zF!$5Q6CE^Gwqd%R;KG4>6OV4Kq{Q919{5s)gE}(8BW?j;jvQsDS+*4H$gszmrSWQw zrchA{*(>vqkwI?xWm1(a!&AHld>*Yit}+AHY6YvApV&KWKBg`GLG|~&=Z0-NNsef} z*_+t9F11MJ-Sw^CE#|cDn3s+4Qr&fM9(|`H^|8r-@!dn4REKqe?T&BJ{x^CxrXRis zG+U=NV;ryGc2x*bOpc;uj!0zrYDxW}`)<=1>;6ocNjA@(ikZ*DSE%ZWvo%ER;(rv9 z^r2|nL0wtIf!_*sLN?P^+6>iuGIC)5?!NV3y$@*vxgOm3j@fRDbZW)cWEPRC^Z27B2hSf0HiIU#u^L`~3@vM|OXocy^UMHyfcf+%^z= zcD33~YqMR3^pOGO4=6HBI6w8Uw%r* zjV(b}7gw;poR>ENuQ9ln=36owA@4VVkT(ERX(eWCMVW5G;wy|KJMHx=!okwP<0}on z^K^5mx|40%vL)bX#aiFMf*=U(wM2$9M%;-M1?Sjn6P1l;r(}48IMMzx19lavcbN@L zfoL}Eydjw*!EL?x_mFjVf^p$G+XAqlPv(Q2P0bci<&N>3ap0})Ir(evVuTeRSuX`p zUNn49s?wsz4+#is9Tkn-E!%@xsHS+Se?iX4{9cltXnIOHjz8JeOK$@lXTCT+r1vXG zHGu?;jh$_GXSGZx5B+RkrT0w>?>H5U4AJV(F@fOzv6Kmoc*?3X-z6h=>#>0g8wK&B~KL6Bve*gN+UHLDvu%O!k?fAFplEGYPl)f#-vG4nAX=w;-b%_mHHOUNM%D{=tVKjE|IWid^ix-1!a{oi=MT5bk{)Fe6VVs{ z*8c`nmsaXPO@Gtb*5dmHo;SBKVl!s}^-XR~Y8KA8*5!|=csH&7?d{`$oe^#+{(RDI zPv-C@`8?8IYA5l}p~lqTl(z=Yz=as)M@Dy#T4mF;+bG|FbYU|vdAw)a)|$d$Uo-e@ zaZ!V74mD|NHg`hwFzR+&#Coj89bRXrvq@3wz`%Dig5erUy~)nxQ^2C#4hmlFpDRJvDZ9R^(G z%m215o_)qTp})F&d*sp>z5ebre)VDI{cTM;iUO2f&2WB znxc&>g-npQ;jd&z%!ftfEef6Qk9@cvI9h>8GCThr=JoK{|#SzHGz*RMYcNPKpg*EPC zL4rN(zc&tQe*Gyr_{&e3RQqBN<>X}1H{)}*wvf4iF}BX>aGYAVCEOVOO`_YPaDy`3 z3Xl0wm_o;Q%*nBzHZt3rf=uA!o>$Yw{~hX3$e{WV0KC6C9+osqNGT9|I-9K1iz{0L36@>21oaO~W za8>vV&@G>Q#1As#d~gxhU#ofPI`{O!e4Y%Man;X3T&9AJxr2VJXN}i(-d({H<}10f zFAJTpJtbn@B^@mo{aS42f^+dCb%Q>B%}~<0vp4e>swWi@3gZXEuRx=47{^Q4*%W8p z0nQF7SuZ5BKExR=6!9bendb8tS40lYZ8K7*mg^-Wa4UD9Ts;EwB$0qBeb)6vFoE0X zb8f%2o~f#NyjI+{jXt+?<`fubq4nc6#deRJW)uH`$hEY*R)@4RPwk9-2ftCbcmF&U zm3;T_sb+GT-eO5F5I_GPU1a?-gM2qU(xP!Tq&squkE#X43MStR`!4@vqbsDXwT1gx z{siOoi7>WOfp)iBHADBc2ZxIy_!nRPOBF+w(ARD5O%;}ZD*se~vJ7ik%nR-PFqvNkni)KioU;3k8KXl!iM-)YPa%|$(-Q>j~3K;tB9GPx92-?8f+xG zq_winFN-94s1;NzYBT1zoQ5YqEZ%ltoh8$4Y+GH{%={hcG71mcpc*`k)#QMCCe!gh zX)oAlDA*_h4Tj}fsLC%5fcW*~D{YBy#hbFnjZ9Y!%CXEv6yIMa;Y>OiDp$ z@sZ_dT6GT6srq3}m{o4}X+_B7ht{lr3*&Vun*x%IB8%9e(&DCX#UDc^NHg9|NIkHxmPKQB7dMV<0L3aYxQ2W@C;OnV3T2qFFD}oi5?PvRi{W^ihp15`mMo2D zUmoN@&>$lt5V9k>B+!9dEGWKZCKBNv9i7n29}qV)8b*PWEXBXaE;4g`26fvyD;kmg z%4FxpW<@jy_vnMjc{WOHi%Q)C;NIQ!uZP38e)w57k;MJL(iD)i63-`*(r66S31t}g z@)_~JQaWtelqz#pk&{Ynz$@5t7%#int$g7Z*8xatK z1!^?cg?$Md$u&UIH&BNcgOWB|nE%{vUdbiL+wgP$$=IqNd33i&7M1lg`7z$Cchx{XsI1wz=i*z-c>fG!g)A&+{~RU6<_=CY}b z2)VeCd36!JY`Z6+vKEWdj}>3k>6Q#M9nAi{{?Td3?M8F(ZvT?TY_yr|`?#X#C*naT zHc1wWc9{iMb_VisUzr z6qKydPybNyp+bK4T^@H~OI)f+M4G1eCFHzgCXpy_~_&RGE9>O6!J2u~jD{u_##l9X+Mr6IfOy%x;5fL#&ObRE0K^z%6V zOg_r=ok@8^dlgNHnNA^h(W4Jp!zMHJ()>uwVj~G-jLE>v%3OuDsLuuql}-T*g}_T| zni~0;lv5t2juBU@rZd^mg#cJT`%@gpjcmxnMa37G)&(m}a*}Ulh(_(-1_%b6BRlx5 zo6iw~oKkq(S-=RAeqnwx?6K*>Ao=T(avx!JHW!`w!3PVA-((Jxz&&&aqOflYsqh?C zArgRD1r*)qoD040+-VXgHAVd&kySW+W90HpUt4$DkUK-d`3xm4Y*o7@4&k@p17D|I!_7_G&Y0tDd1_?@-KkR(1v)oCpypXmWkyj&oM}>9;!J(QP>UGHAN&PwN z$2*1{iE$G@#FMlLOz~SU`r;IoQNP2O16)?EF)h8(_Qg}~E_179YDf!mU8_^3hPv9GW-cc147^RlKT)=g}*l8;0%TBhH1&1t{GU_EhIw4&E_H)=)>lOG-GX!mCS&Hy z36-=i6`4MKiEFWi6fMt!6Q-Dgfc@`lI@$^)6q0NlJkr3@jrVoY3~t@(gbr+TIInyV zcjfGTt@8BgH+vFwy{3Cl2{i>H zty^-%3KvWuPyx1c+?mLsRi0ES${L|ob*fKL8LSYoZcO{-;IGrDZN(Dq@%nbUZ;l5) z4yug=?41N>Yov-x_ngdHTWkC>t3vzk7}utFsBt*pUkV2Hdgh|UlkX*7h?gFyw$kT; zb@DhQlLcLp68Ueq>yEO|bzQeGYXc^pDkc3U{Wyp!JocrCjHX#IOB;OT#ZzPgjG ztj9{_3c>h)PxA4mVjdN8X@*AkY+12$Juk9qc zf8nLAsJHs!fS5bcURYTrD*ijpf26el^aW}2^A_6Au5eq>=K`e+@B&cTNcM)Ubt}9c zM!BEx6w971+J`wEVvb0~`5R!+1X$7jOeOfzV84L3wVo<54csQEECGdxPypAXxwb77 zl*t0pknq~#LouuVvO{(uU}XYaE)Zwj$g#rCGI}os9>^;Y?9RL<1-F<7iFMm1r{KPz z0OScRaPL<)xUrXU()ms|EP9xO1KI1TrQvyJ^Pc95pt|(3vfK5fGFNX!SNG$9?MhgK;lacu+4)7hvK(tt0jn3DlC^~}#+YB&<>pFp;> zK7$vY6e2Y{!M~BNkx^IKi*Y?mZw-9kwvO8aV{K5r841k3g~=f%kc!n@t_SJNOGkcl zZ1U5`1N|kDyi`?9jeR{WZO^=E84N~pja6q}R)o#kur_C(b>%Cd`jSL==cKw488lNx zf^KBYjpl!5(NjIl$T~XZsclqGV)1%OP17oUw*y6(aJ487DlfD+XkBt$NtqPdxP|?# z-GNzM-puqWgJ%Hl3b_*Z;U*CjsfyFm0m83PAO%a+`xIxRkM)HoLy?V;oBs=Q`=gksO?lH?Aeui&!iLh2}v<({T$6AZQ-?HPn?O7%D|q`FWsvg zF!}RTHV*A;kuN&}B~^9=;v@VEN_;M!xM00SDYVIOPH)GS6^mKBECbc=RTur1od~bd zyF6iP2R7^ksY7Po24t-P$~_)-MivI?O0-w+T;jNeO{w2+9aTW1&AZ5?>5gohyrQ|$L~7J?CEGeJ0ZQ}&6;74pW?G}Ne&I9o*m_Fn9QNSy4Kg*hbUWx4R8Wyb>%9kX)8PjQm zo{mLAUcB4D%cWjx^G?25Y{~7Yvu*60D_#5(Kb~RScb6M?j;*#LRl_Xcb+KQZl{i`& z8)wg&YSuz?wVD>*-$+N+#;o^lY|L+7im9+vt5NZP7vLvsfi&kyBQ{yRn>oJ9cCozb~q_ipv7bvYr zFXI98qahK{8&gGH0C?!ih4%ltk{iz=)700Y6_MdY{WMIGX0Qn_k1a&|qu6w}W+D{T zm6%R5~xIDtlp~b??DSrbvEOqZYoQ|Q^;_aq?&y2`)UUa;d{^C?~ zK)*LcpJsX(B~)e9608tg(%I3rXsYB^T(HZ(m*FVNZfNq}^h58b+q5%Wi+j8hS!1Dw z{QM-!B7iWGv+7K4s#@ltt?}3)RYGxWo13ZBF#5+Q*4_Vz{PlQzC)PX9RPPS*%PMBaAlVK6b?w#r56F_t~e(GevSD+)BGhaN2EYKnZfwo$wuF6)^K zRYek6^vI9!q`GhPL+UeBlp8iNx*~p)Hn`Ajfg`+GSwO?qk`yGkYn9?YkpCwR;){A= z{d>(NM}gaI-sbWBi#DG7Uax-GO*D{RaojNC0u?2za99o%O!OzN2Ka6+dP4*ofc4!? zl-~VZC2W!lZ9@+eDi7{o$WW`%uMWknyicEqgqkY@JoRU7OWk}}TG+5IGu|k3(s)*X z+Ys9~7>V<(-1oAq>+@-)M7SntYd(l`G|VVcKl&aHf6SdKcjs+@k_}oqr>n;$=Y_1^ zK77NfZ7y%+;+x}C1&FKl09}iQBSb{c7OIrdzL+KpTnQG0}+xNiMKLrZL#O3274)bU44#AK?Q*#LkwJRB*JFd z>2UVjRviDEEyfj9uHY;Tv8u4r!+D(jz(waqW`Stda29h*c4JS5rouoB0W~8* zHjz@3y5zrcnG@TZJ@X>2XDq>2!dwfaE9MrH71r9^h*E7IQ8#WcZjO0IVZbyW(Z3~; zr{fe|7W>n9z^K5+fb@|G$zN0fZ*9=5r)Fm)ld5OF#>~1`8DnJ!A5K)3Hw&?6Fz$tJ z?Z9pKDEZL@C9y+4J?9|n=pP5m*Gmauk2^3<(IT8lH);)9>gV3j2f+Lk6`r(ANja{y zkWfH=LEI*V3E*ai`Y5|yF_|;wSf}`N$dtFu(uc)!!_*stzLc_#c3-Wpm2B(Z)EG?{ zB8`j~Ir#9>xU}lO$~0%N1Sng#ZK(_2fD#Z`Q9x?5Ap1T&jA)ZrZ3z7ib#}?wUJIx& zD?l%@Znt$NG_>Ww<8cHS~O*r_gWL^tQ1ZLqL=XsFnh65hY9`8FKF~xttf0c@(T4S!)b* zur?yHc^y-1;T#k(NwQ>_9}G)keTs}(bTnr8{8=xRTJ(KVRA2FiN~rJ2jdIna+LcjU*rVqEh%BGSO&k(b+lLC4 z|0BxkOSsBC`}o>>$5kH@L)!i{dz5uQPSO#OxTQ*DIhF}eadpR|FEJJ2KJ?m>+SEK9 zeeF%n|9spj!0%F-EowUKf!dA#%eQS2N!0W8=&tFZC$0}#|2?|w&G-BpY%&II1|4}~ z)GoevFSzwe?Dz6vS(z0f?71Z`w}JU=v$fp)6!Ktt29Fh%sz;k0&N(Lg?cN!YD8ZFu z_e`xM$zLa86CS?X#?=L!bqbVKBbo+fQAwOIZXWZs#j$lW$67<6a@` z;JD(y^PWX&4>YDK7#CskV!L_#o7t*U9cE@6{mDb_EC&Ek_bF~+lsV7woP#l-&>YLQ z(*JY~!W^+&o8bHO*PSEv3%XmtOxMrV=j4fzyimiydwzg-XGZ#1cx_^>pMh=f9*9t1 zQ*iyfHq8CxN!J&xm~TJs*-45HBghbi3;9B~zC!CGsE0X2gccqDl_kBT-H^Zvf1Q{c ztD|<_z!7ut{4Zct@GwK}5#6=qgZ$onCrE{<#cPOt#p+8(C&=9&9u|nzp|2MGw2;W8 z=eBQ>q$~wFt3MG9hwW_3CYi~yc+?pTSc*jc5|ayKZy~lX5I2aZw#E2l2=hF?k<*wE zhvZn!Z0wkv;)4gE4*}W|%5pFkm(%))Cb34daX?tOOvzGJv_eU+J8#i0H=&lrs;2E1 zl%o)1VUs)uxRp!LN>qRSUHKvjkN5jl+K64B(l_CjElj1!-0UjfdTH2#Z*$+*CSukS zRcXS1Q2@Kz(I%i0sNGhE3H@cigYnCShJi%UoXh7+pX#!a`6P0*)(5hef`v|P|Iql6 z&#bYcZcIi-E3vR6tq~54)(NojDv4t$k^zf!tE<6K0pGH;GBqSimYr|e9C2y9bi&)) zn_a84@~2wMTPoq1A(iS6E)_!}iZG1sAV;`O(?&EybjUqq-#xt4yy)XqcW0?}rWRro zmI6rZhQNvA^GW&?f}8sN<)$p$?O>kx&klD|4>y%>%hMhm(50d{m=0Ch6C(g+$=F8X zX5=!1(3p@(EOYLVYCRS2CGmVj=^3URgM-OU{&n=lPIp(m%iA$Gb$niJ>TFn9LZau9 zz$G-XfAsA?qPqb!DmW9sDBBM(@D!ylE{H`w+CcqEYza{E3I5CK!joKC7`?-sKYGR^& zHH3OKLD}$>T|c-B?B>{_RpZnZ^Dt+fFSd^BfnNILV{gtV4X*cQ4~OiXrC@mI=FoMz&2znc9R zY|4frgb}x23Ep7BnW5H&`h!3NeI$4YmSR{VMAsHY+@ec~tI@TIXMc*zN7nL^i9C%H z;VJ7}^ue`|#`2_>($A|=iHIKD3NBKQ8nkt`WV=d}dd-`!ua56n{`~dr)YZ-YSIUo+ zKlDj@8Qf9tp2HNW0_mQfW$%FG(J zl>yPfQ-%3M8tWr8{k8I^=I8V;Xw+XzBxrd1N*|Y1et*F3AK}>j6>_D5161p;e+hPU zu?E|q`0pbBieqMCK*SHC?sCFjgm2w26NcSG)Q~r|`X{ddK?suQHciE|o9te-qFrOI zI!MejT}V6S@6Ph@fwg)Dx!MaM+`rrJMM>MLi^386Hvo2BN#a%GpJwY19Z;r}7==&w z*j`*sYX`2Jf3*5oLSw-|JWyKme*1x-R~elqEe}aZN~-m?UJpFgP3O|>c14?2UU(HuFeImEr21QAXAD{{pCUmpIvw$8AYnzPUJ1ef&7nQsgmBew!kJqzF zUF~U${OX@++$Y<}tpz*@V76a5!#Tnx4Hl|%J8xr5uL8)P37Zh5eA3LjHritjZHrM9 zFIB5S%v7!&$e7sCQY$u$0-ANPS>D(BY^eVZ_ctdJ^($JMt8P{p!`!&6Z|w<-joRg< z(lq+-`m#uV)|)h_-^D_xLLVA|ev;`NLAUP8bpMQdbe3w({ywF6#^G$3SJ-;y)omUD zR8912gSN+LKYzrOh`p;ZtR3%ttsOM>@pCLmMBAskgMwNwX(Or*CNu9nXZ_>*un$NA zxn+nGrfnDP_Ek*)@6^Lu>SK$pk z&tW-xQ>RJL%Pz#svi+4%<_mUh3;hMRV_{$$Jbri4R8JixO02$AZ@T@Iah&^!&*44? zNiSbOGBR>~XC_kWgu=oq&6BpREl0ZtJ+PwTF47F2Xwu}Q)VMz%YdG}BDM(^0PA&GZ zQz_dQwK_xf{Iu>_Z`#XNmzOjAZrki)Z02U|%1Eu*L?o>y! z96NO;V-;1O{*;%`l1{#TZUY{$@K~lhcFn=!XWW(U79GO5-jw!*Y=i6pH!b5K4_K8Fr zzapcIH0-)`KsfVjVA0IPi-hPRRayYBq3&6Xdw~ka!QBa@q53@`K`EDrjBjIl{l-uC z;%gu*#8RgpU5^|Jh<97HYMNuM;k=P0>8%Sqjo*S zS+$>k2^wYQj{f+AX2+nNsG3QZ?iNY6XIP=x&Bi=iCMX#nQ6y@@ZsFCu0G0yCVC2=_ zRjMvO_?|Cm>xjzk8t8~9)aD$V{cBPN5@7ah$`_G1^o<2!5}2UE111IoCHjMa!2zYa zb1maX(1zM`(l>o@-&|4=nX!hPYt=%7p069W_Wv-dn9@S@;7dM|yGf5nG=6TKo->{+ z&-X>U!9pzkpvbh?cn?*CuwC zKi^Ofo1>ql){ZD5pw8|q(8W8DmD=~Jg@i$4nPBsczhtx{#~Kd;wOllf;G#K}_2t_~ zJ*g2!^YJ>`F2|`?cwwElY_T z>!U*K&^o(1#T7+%&!cws)620V-RCD~Mj@w|D9!>-tk4O{f{ZcZZ1o~zeSeH7Xe-EM zcJRe?=(Wj=wzP4h8`>zd&;K0uddb+c!nK3z>H)2u{{Pe5n*Y~1H~-)3L;3IhBi>EY zjVWw)0CT%tY_cnAu@t9{(5Lki9=98MM)o@v{^Ba^71MRkQ3e<9ZB-1vW~TGUJc?r! zIyS!lciBORXyRx18uIgfkHIfCx@%HoSeA=;sw$Q+`NLwPew$5>`#9qDMOk4MuhZGn z=E$Gybl5bFmgNxQZEeoeDSGqdDCt$L&nyw?gG%{6sUPj?=q?H~F2tlUNlY`?C;F8t*LB?h76)v(Dtvl%9qgqO-NRzo!Orcb{2Bn4YnA@ye7#>$%KI@Cu@lWAT|SIm1ynowl&Zdw2-e|GyQCJ z+N^+ZAUua_O|>2Xw%quw=$}Vtt3{2+BOodvRXW>()i;hgM4v|H%l^pT4Gz>)EELqN zc_!z_!#M*AzQ1i?5q}Ba{r9R^qsCO-kbB-;d|WC^vYS#WwaO_;jk~Fe#9=LfFLFpr zq9`UwT$o#+eey}h)j?~AQ!rv2?A95?CUrO)AlS^#jLX*6d|m+YdMVV-e|&s&vT%C7 zxw7K=9+y!@>gy3pxAudL+pfJ;{L1U?|5QXc6%qntPXlc)1!gX-khD?iu8tYhYOzCK zvy48(#w8cXDAt5-J-(N40Rs>YTj=lc7SV82d@fv>0{*Ylm;Vn{dS=?FVLA|V zzIeB>+yd{cb$5&YX>V!m{~UIGuVlJ#(ATWD(|Xc^Lv=rkpHd)fjnXq|n{TyXvqJjR z9W7UhSP5`ge>+GOMO65W9udgCcklV1vy-@UsyY?dQ<_vtz1&(@7Hgb8X4MM!s+Szo^LxSKChWz_ZVldAS6dR7ssKBzO2h~L7Wd}W zfvWO>_$QuYZXfIpU=**OX9I?J=fPQz3bcD{b(H}BM9!ax92X<$p5{*dP_jc*SY?$q z@^CrfKro~|C~W@SZhV$v#B?b|FSJ8?&X8#zeTOBm2-IHz1`S+WNpAosf>-hE(1FHm`LGe~B|)wj>u+n7ln{^}QOfGv!UP5)H8JL^?_V+TCMQ8b~++R9wMelfCJh*^8r3i0G^Z<38B;|zom zg^4SBxIHd7L0!XLyilB zdo5bUN*(@DyvA-6V!O5T8B6F=6g(i$k zRujgc^bV=d7t?{Ac4m9>iCEH`Li#V_atC4$*Ali1gIE=EM?7mD>n9XFpBAyhRE_BE zc&6T7v>DhvTC8h@tMv+Ml!7u#b=Jyb5F6N2( zwTIR#W1@u3tpb+Y{9d*Yl}?;CD$#z_ycp+igjI?}^-%#SH4?X(!JyH2X$#<(eqA`k zh*p%m&E4iN!9XLV$sj-~IeL)5+lKX=^LftOIj1yUxp}}GaiI)>#kyiQ{;l>G2w*tk zd+8v(_ZNC4{xV-A*Bum)EuP=?g+*DDVLxO*ZK23Sr(t=nLFu01!f}y7ZPqyK_+2q3 z-0KVexn6Ob5c}Jd77i-H5(lO92}Ot+b~93{lE7MOO<8ZnrKS8h>{-BqL8dO%%aYoW zmOU41)`cRQCh)Znf;(AQ(uFzk$S)`&ESbjhlGeiy#5HI*q$z#+MA+J1pxW1yF=hhB z*OUR7kTK*7@@o3ys-d~8WFWY8%!~?>8xAt$tlYxtn}yg_=p+hMd#0v?pATr7-gM?3iGfG{BO3b{ zI*Hjt@*Ul7gXlx-F+P1w$^$QS4KT7JRv)w_N8o)Alql7FtUwNc+v z?H?{-Ak0odC;WP(g)H48o`TcNopbpU1Oa6tJPw;SmqlA)z98Q~n=1NkaId?4G21B7 zs^H?kP~u*8b4XBhtPi-^vq-nXMgu9d%_{TZc<0=dkz3!ixsjSXktg}UX`AAK;UFAl z5bfFByGo|DYFqWb${uW3f;J4z2+DBjuM#Me7Ss{d^nRDPKTs7 zhN8BK8kL1u0duKPyG(_SC^`EK!KzY2Dm@gC+|8^~fSt=U*-Q6TU@~*<@rg^Q=AY`t0ANUduXIy8hgDRfFp^eT)7%JR1blpKzZ zPu%BVh??Ob?dYMC=mL6NHa6Y{M}hIz!+?g!0=r#{0ub)e#5MTWbD|+H*prJkaRV$h zd>TGIaGc8z&#qIG8+Utg>t%V$YL|UYyn?tqBo%S zm8r}1ZT`|?uZ!-31O@~1AD04j&71uFH+mt@u_D8p@moNjd1H8Q;ZG;LWd7s%oDC*ja9TP2lg`_*~U+4Sl(9Lxr3HLcnMg z*?~$?*!c@xO?W9*IlS(N$PW<){kGo76Mf)}Yumd}J9Ly#EEZ#I{6U`q^3eS&RxQR8 z5Spk0NXkk1%Rc?I_xNodn9uC9KO3p+_|48)v({XSy7Ui{A`HE*w&A~cO+nuHq)QZt zwm(apf!H_Tm~n9(Mw%Id%T=+y_0L@<@?7AzM}~X~!$KDME9Rre3}|VL7HV&_FRGAu z8|bTbQ9O1*I40KB*15>H^hLoO78&$s&*tO4408Z30rMuQL*cB43Zx7kSE+$fT)Hze z$sG0nmx%$3O5L}ibUh38HvD2f=ew?EGpG1YYW3FXhIyVvrm8yVx zDvXz5hNBn_jxGgurTV^is-Z~(VURE?9C$1KmPNY-vlo3<8RCiRdF?n=kWp#wY&;Gw zW_-}ISjW5gRvaQL{*q;7Rd}x7`@wjUUJ=kz6jyZO?Lxw+!0^n@-RNM^3;;GDb*fS} z@b$q?#8I3y886ma?&FEEM58Lfu$FFMoH>L(Fd3Pk>S&xPUwV7w@OPmy?Sg$iU&lgK z?=p1NOkw5hBaeuQ;#(|tTrursQZj>pm`kVE{^D@w^alY z3!KehV?eO_f}&&H-!w3~&c*sE6fHuc#ineKqitYVzaUy?uJyO#!E~V`%L5Qwv&)vr zIQ5FlQ>Mt$Dbj{jkIJxV|CHp-#JPvhK8t54hNOE=0M#xTQ>KdnS0|=g)|!WC=n=%Big5r_HSnAYnLcE z%5;0~yjB9T4|>{4Kd)mL_>G!9VHFf*pjsfJ2@N``ACDzjQ98S$LgFQc@tVU_?Ge@)r{poFl(lZwioL4aD-o7e`mM`|4OnkcS z$Nj9q4Jxx-Gc4WO|g`OZ{1?1v_(VyAdeESJW-?y2z^c@`jwWDX0u3+8oZ{wA?Hq{_OiX8U$ z{rkv{dqsc2YFzH!DD;oK?+iVM^LTMC4#E2zsIHnm_-fcDrY}z3(Bfa4R%Gt=U-%7- z{>)TTUMwlpTTEzW{!lm8Dc$qSW1K6r#OTx(qK-7nrLM?(KTdQ#%{+N|hHlcXmD#v8 z?sQ*t$ycjR$O*Gq_Qi4B9oqtJ5K+EV^xwC!Bn(~qFjtI%BK;U-jQ#5m02*btLec2$ z_qGp@-FzY6gwb`Qznxk;PKA%z6=GiLQc9?Pp2=$GsP1J2x-v3h`~j3d6>n#(SZsM4rO+y99aO%`xWsP@~o8~9MDO|9Mv9Y+du7{f6P$}ASE8*sohcT z{U?k#$S{F-A&hL2JQ2$>P{1Fr*MwzAgtbgDsAJIhWyyVOK*+`9_vEi#Z{Q-@g6fKB zTRj8^+WiYOZo3N~Mg7__Kx~Wswxr{q4#;y1Y+tBg_So~dbmx;Z15kfJTwO@|m$k(! z%;546s$#6tw(_OskF`CK8!YccUUN?qW`cIb0<4c;C9&W{P(-(RYh^ZaX|A=5=cS7iKkr=H( z0{=pYKNdE$$y@vr&|Bjg1Gy$?c_w7kp@O9Fw|nA?2I;QhrSA(ca$ZNiu*+f}&o$!XAnE z)F?D#Zg-2^k$*wR`9bI9uajgw^XqGyYh!N1gQYVfn^Ppho@i2=S*H<-6&lnVHZ&B2M+)mVlY99ql0!86?n}FpELd8xqc%0QO_00Up)W?GBYUPwu`A|>#1+<7 zmTTiaZBF`0E249Bd|nZfzF1?8+z%n4x!d*Mc5ZV`Ks84hYtA<+;SnYxDm7UWe#vIe z*G!lT*9=EIS;l)$Gs}u^3%@ES%B)R0dq)o&(-NxM9NCT2GABT}_9%)74w?{MEcwj{ zm8FVPnT7KvS%Dw(Ta!D-#qm~{+hVmqnIdnfN9!C*6JH8Mq}kf;&8kN`?C?0NoooBAq2ci%w&HwC_4*tKfDVr|8PR(JZ+$s&vP`0J=Nb)qE z@C}->RC@Zrg2lVZzAPhlN$-&%tskF>boNZs4A?aull42|4vt#|nc$F^oQ$h&&Dtj& z`f0k3e8gqz115bsN}R*CSiDWb$d(v{G@?K&!*+WTY~Wjo67OA7HNl}Om=umG*y5jm zY~W5@`$Yb~alS%NBhzZS4dQp|+##FE+!X)B6pZ5^Utk^{cf5!_Oemaepi{xrP8?f0 zkOL=4(QKH--akU`Y07^@HX;c%8QNX5jSW|?3Ih15{)#=~TRVHc$L`sFPL$L)^i+AS*~exy?C-mDd+vru?A@26 zir#;{<7P6#qj-Ma@zQeLP9@j%5HF~>mjF-y`GA{<-1Bqz|E6W{{8j%O=;k4eNtJHQjgdpjwJ7m zKAAqCa5x~y-4+vQ{$AS*f+B6`R+JcVySr8tsNLGieI?c=(jVaJ&d8em4H|4j>H%r{ zNJDG>Lp$LIf1JKtYY92fOv^j5k$aAa$=@M(Tb7+Ce(u)R)Kc(Yd={?d4BCLx_k<&i zO)?+5#bs}Yo7~x;^+=V7dOvjc#oH{I0^P(+(R@aun)9IM?-jq0OpAJ&u6z%#^!K?h zHs1thZ*T0P%mUkxaN zba8!HmVS0cpxh3Y?yW8T+bfQ#NbEMkS_~fA%JhYD3{L5eg10swkqSLiq@3|(Mev0S zYcD!zK-{a>*8e9na>#e)T4ipwW@%w%iRgc^^fmX$U-Bhw8+{?zNGrK<;;%#7>5?8F zmBdwbT%#MwgTUhwq%P^YxlEcrvX**J+g0{P=t$DJ)2EfJEO1hCztAytsTMIf^XA*{ zbjbUIM#e9$d}qQOu~J--C9lQCJOZkd5kFj=Ri(<}Dy(!eOnD}5b1z8AnB7iN%h_}T zW&R^l8Vc~W4#-*ZkUN$nCe;tn)G?^6Zz>Tq0_&QILN`P0j5z1_BHdIw?2^ZmKP$=O zYPb46DZRj~rDxP3C~|O&u&p%=v2NH^3n|AdXp9%`(H1 zS8-OgrY^q$X2CgJ=cntQ4uuipGysi8c}SN8r>j5f>yB_A=xeraD+>WFau_Ut!XyvF zcz_{^H~Y(N;%XinTpbI(8jd|ZaAxORjd-1c|A=N*z$_^@(cW9o$9%C;Cyb-WDN$wW zzlgA&vi+cDKQP-=eqo%bltm%s=zY(~&mZ7CnBzFmF}^8K(L98bY3QN)W}XryCbFPO zIrbwSgzQqLT#w~095T*f&vvi15}v5xTsufX)Z#bns%wOopJ;MMjp2AXw(^ck7b@DOZnNYyJ6tiLi%--oVvD;iYRVArkFkTOY#JC&>QYFZ2We+ zN~pe>tq>({9QFIxXQN4FJhw@)_}Bwayyc$@t`wUU>Ak3Kv7F{ky!pdO_C9_g-VXL; zTlU7SqR6Ed?ly~MlX&rZ@NX$6TNba1tB1Gci20G3A-@Q7>8a!qZK$#O(}xge_@QA> z>hm3$u6tRCkaKb-#*D8IxA28bdkr&U0eOaElN5n^Um~|BYSBF7IwboBzmOs4e5Uqi53N=d@E?&eb~te~ z(x;GSV?VxZWEvrzkB5I<|1lr(q?i|1 zr1At^snsu~_p6_N2-MZ$wQB;r^>PN)TNY8>;qX zHs&$%DWV^H`I@Z!$Jvb&uA_}a9#Y09FJUtkt^90nRBUk8xYkdo_6t> zqjDo^@EzjYV3N!%n3{Etjxuzn{I)PMd*t^Mqw`kwCX1Tjq=Ws9jp%<=)d8W>pSk*_ zWb}ngyPD)cJ@GWc+JYl=*#TdL+JCOD>;C3wBs5{51D#4$5Nz@gfwfS#yFGPcL8}Wx zwi(xQV_LpYx0P(V;CufixMCC%;A(%vO$g5Qy3DK;eVQboBm!^Qr0Yv`KRS9Vi3`$N z5?(I-@$R+wyD7WZKN5M@s_Rys>G)TBTB&?u@Td7~@9^_ja1)ZvEUgo1<=`W%x;V)B z{gfl6xsl*G6hKjHJY-vKoc9!Kkek8erR}xkwycBgodOw#`f0@h^HbTIZFNdB*>iR( zJBqKWR0)T3Ex|P_yjceB*7I)CYMrUm5_6%g2JYN0MQ$RClgyeP)~ZC2!m?_tnvuz* zaXpww*KP(ZkXw6(C0cOzQDFIYQW1Wt_GQRe;{DceaPfh6d2Xd@-3GWmHK4eQ-!4_X z#O|#1tMw1ilkj0~)1fh?-#5Gu-#*6j41qIQT}Qvob*VFcy6Y@!w3zAwceyY|S5%;90Md6nl$-z}01>fzw~{RjSB@K#!O{LO zW^Cd`{Fast(Qg;R(|NoWY|0&a8(mS_de>xLw0Y7Zw+1ZAnW~;&k{{7zz?@`)O@9O)^;|1jxhiV zFHd}5O}q-N;U_&6TB83SUw5vaRrANAoY2hbL~SFtFBhNQPvIM!i6#qwgcY~%zv^IL zI&B-(Hs4mmxo+Q@PrX~;Cs1PPevt}hCTKj&_Brgi_snsO>CT8r5hLAMW(}o#>}Ip+ z=I-9M;~|mmHEfj>CL#H|3TteNRH56=nn0|4#dRd0OJc`pwOF z7C>AHcRgqu1n(%`TRb1FO+O75v~24;VKw)2)AVjkY;n72?X>vyXM|tA_cqUlPgW-7 zk4GH1t+CPH)w$Q{YS{){$UqR&sKp^(a18ZwHqA@A%d|MzhKgpD2|f%E)<+=(o;9i$ z`8#|r-LQW$JrfT3Y^9|?&uVc%CiI&4p>b2E@X!D4P5tAEoy%1D@NTPpWQ_tvcYOx~ zy+{ST+V?Q-03TPnk2v6BW+;nYq6_N)DnD>~JMYVQ+$`5D)4C*usgbFmb^MdbWOrJ7 zDZrJ<9Tx0z=Un^M#es;-g>()$KXS;c6eco+79Q4-L0fG(glqJ>wOs9ls6t|<#m`QK z757#1)yBuVA1bLRE0<<1E3Z9c7+rLM@JW`C+Ag!On~%q&KITlG{nV=oUG zP%typIwdmF;~rejG^uJ}Dr>x)su1WoagZ7*8ZT7yfV(P9=Sd|#%7(F;h zUKXCmBiP>S805>jeYF4Y+(2i)%n@R>AG)tUp!>kQxq&)Kl-?81VDIY&e7o9D2aV*Le$P(q~6hp6XMs!~=Jdm)gC{#z+7U6() z&{tFX#Np1*Xe&&m@;d{W$OTG5ipO+-tE=P|mc6rn} z5RbyQy}{0=$Lq}AY5n{ais$`XXL|`Gw@&;SYAI#BSJo2M8Z{@H1vBG^eVZK^#$^t4 zpnoQLmL$;ErPsD84uWQ!N%Vm!SVHuG5R(OrIz&pItOZ^eTCN4NIYfI4A)Fgs5U!8$&k}%8YwZ0W-p=}=$@hKx zHX{{9os z5Bme|-Pd(r*Lj}D@j7gmKPRMrclKvWbp9xzakaMb&LYIcLdT}bDIT8OA21@0vYgHq z6wR*!H)YKdn8KCs^co}X4l$Ze)b!2v;<9)I?C5K&O^ko0X#i)AOU+&Y{v1gUyPG(& zyEQq~UU+a&$Gof=HO-Dc)zB_TGP~#a!u*9sXr2Vxd+XmV!UYgpNhRjB$t@pa89hlj zylTLp%_E<}i=k-fWX{%0JpKNvHWVC4Pnk0~=O+K{8x5(!LZf@J<;~A*v~pzflAmlH zJ^Sd0V$d;#Ll-|~5dv^mjmIM>kv$9)MZ)JGIu>$t&mZ7Lxi5MYaZfMn&Tf0^%1hH+ zFj{$u?rPjw=3X{#YECGIq(3Tx`K8-@W?~NtP>|Z4k9n%Ccdktl804JCSa(P>&!5^A zS{6cPdgiJ$vg#Sq9&aXTceGYi=6kHe!wq(YdLvQbzLel?LeqUNjoX*kR#}y_{e%TJ z_g<-c3TN6wVL~~b&2h#p9a9wnjiYlSYm6!17mSISgqXuLB`2{sm^qQqA4%J(7Pher zm=#<{?K`G}81Zy>>}+dw!)OQ7!a}(a2Tcu+ciC;%vxD3xXy8;J5WvjtPEZnpL+0E0 z`@=)*T1obR=a&%*!h4W&{!lml>>yF+4j^lOiCbGef2Kxa%YWrw=hFHK^4FZcyk^9F zwwoG8L-POM6}(C|i4i~X8J9*k4zw%c3@PBLCct*I+pq`5{$-K%UD;iG-1!;z!J;Qn zWJXa>DK3X=e`4j%Ma{GCzA3_@GL^Q8sgHyuP6MjUYK3O{G37W`Oc`-5m7ku<$lJ;& zMr%+;i;{me6~EhB@W79(?Qj_HQ7&K%SCAH;6H+ZNv_e|>_u(o_SU`Av2Jh`bFbDbu zd7BV7D28PR(YTZBZFX`)UfHS!ad;^qCc25B@62e<7BLucQ2k=Q$T9nG=rd6(jXyso zqsRsuaeeDIc0soo~V~>Bu;%qQ)>1SohmEBHvs=1TS$iUZg|;o=`SZ zIVW{grC0kL0)emD=y>yIXha(tJ-#p@Tl-G~Zdz2vy9lo^oXz_-PEZUt`zy%;HyQxa zjf#{25iJX?&PF%9yFGn^gl`!vhY*+s9ka{+x!Atkh6U>37fg-Q=@k zo3S}{-MEI8y1){(Y#o$*Z*+l&ov6x5ZEf@0y5*mXopzRSsVrCbS6}{pHdbO(5djf2 zPOko{!-=ruL$|c+g+}0D{NzGX>SXU(eIoa~Hp32nO^k z%WHd9H(JhMw}jH}*^WB7|HVp4zGR1vYJSZT?wgSY5<x zrR0<_;I>34TGcnV%$x+pF7$u&K-TWCx8&3#%6;xmYr7I_gh$5PWk7&4(s%fdt$Ot? zsix=6L?r4-ifN^xQl$pX#~S9Jyl$S+!<=+`qnFfrc->JXnP+{_!h0)cXEOd$;04A; z%XLJ%l5-$;Fb{3dsM}_(uRQXeE9y~n5Ao7EZhHX7W4yfCD%f;Us8e5IWROFj zS;N{fXyhdu_FG@^@udG(U8bbTMoyhr4u+j`&LJ-S>KdJ5RI<6$=1m=gRlj8KGA|>Q zUXpIaNRG-)Aj6R$mQZw)1n)PXT{Woo;FhT;O_XhW=8X?fT8=!->srjfUJ@OHc8VQ* z@mb%KeAZ6WqPpq9E}(1nSm+_hh zr5|giXD3NEb|&xJ7Sum!Ly{rj)bn7QHI@Q8DaClnxcV97PM}HVs zeH-uBg}$i))uJawGBrkiG43N}r=vx+E^d<*Kie|Eh(oLaekkUWCt{Lu4^2hVNXJ_X zfs%_GvnvkfQzE$z5a<$?gX_e~UrUp`>YZ)aH7IEGHS3UXvWmG;BunQ_0++QO3H7&k z`RM^l?>-RvtrA=GXx7>|Z_8RYjd_IP?3!RGi6dohu*x!U|Pmqsp*!>r#5y^A^T^8n*j|p|anB)1=+OZFPbvpI(|}DQTdBv@l+P$X=qs*KxLau8RSLxT z0|e_K{lGQDR5`1H$r%O+4c#7;7ITh4#hQfnfFUT)*iKEP?Laz<6E0G zxWUf4)2F(kNmai5&*tavGUJ_jtHiXpZifR&OOi@%5Q#^lqm4-W1?WS@>CB=Z?fqI~ zYien~98b0WL3>g5!l}c)QJp7rTzCg1+d3X9)|0lhfS>HS2qQd+tGk>;-zOKc45lTU zgYS1L6KDX9&5|~pEU9VF;9(xz9vSbN!&B3v^7%pi-kH^}7zSH4!;VzF#o*A5IMD1pQz?1VtOsAT(pEk# zbE*09aaUp`ltHYJVFYYleAoB4Q=TexY{sK_?(2LX;j$&SI61$Y!X3G1bfn1?5vtVYwOPWGJ% zLl4ocEET!My-o&MbkZkv$ zd0vU54w^r(_K2KYyW?j)T1}DcB6)Z5U49M=E8TI&h7!AKjfL6A^0b!AwO-=brxcM> zjAW2KIY1=_tAcHxC3iGl#SfR*oy>kl@@(0YtUa=oz#! z&@IG)dTptU?nB`(fnXypH4~CqHZJY%8cdex7TZ)z?+&b@6Hg07WwHLW!KrO!ChjXw z45IP_#BUhF>`Z?dok~1UloVy?aVC$oVJbMy=$_>~F)d@4g5V*Vbg>`uAsRt0dMeIs zfbkPyKlqw_7$d%-o;3Ei00yy9e( z3fC+ppwRPz1-CwQ7`w(F*4n8oy>P1Xo@A~!!=a0wseAms&c{nhjk|>IG-VnRq@{a* z+Zvq z-B(g|cJ96Ri@z2Fp9t6Wcin7g)*axPW7k#$xC)Z0yQ1Zx{V&pAhnDwTpKDc99eX|AM{J8?gS)bXP=L!$;s5 zF;!}!SxAOmJCQgeFUJ46pu!`OjsVI3%~HqOWBDaNMVm=>(SZ>nT~x#a&pc!gxz23; z9EjWeJBVD0-H&v#)&wNg@!c~)VRZMTRI$%)B|e--7|n0}XlE|uK8(zjR6kd%yBv>f z_#IcP3{N;7XCE@0qZo#fa)d;z4O4G#%~L=g#aNZ6EvfD^Tv%a+4=gOX`jdXwK0V2? z7k$*2MvQwO>8NKv#LY?^iar4@{80SlfVn*@MYbG3Q>v0Ensvb7eRIC;%>cuim;Rm_ zGy8|;wE&Ol9eOq4dcFdA{dN^@vl_kmvJXh3Yz4ddAc5W{e3h}UQI&wY6hIDyKlx|Y z0;wGHAVpmJKmg_k*$RzS>^g-yO(n8c6$Ju=64@)8P}GBbk8xf^f02p4z9T_?>q&RRvQO;8$*NDk)pe19iNFi{e$W!ZvgjITs4E2$tQ&B@KcHGX z+eTOP%u06u{kaPCE$D7vIZO#7@`wntI_Bmw3<#c@rPrgwwLKcXa2GD z3CS~QQcZsZ16dj8C6Ds_QHu(9wEiJQbCq#CAS}S^4oi;QLt067&PMD1#>$?A)wuu1 zp!4orEDr2y@cxo|R!N|S?DIWOKRa^6!uvH5vHC4fJ`n0-rwt^&xVZF7D*l*xKHkx` zMq<8_V(@>o35HSv|OVh0h zZp_I)2>27Sk^B9Sk=%m!E;(1D_{|4_?m@4rXCF_I3wpf1{#WdXnnjGA*_^(OO|Rf( zmts$gJwBwh)U8?_3dP@ED$h5~P~7vGkGug5uq40tD88AeEUdRi?#6||0HBHjB!v;87Eq7d zFgh+&_Xij~ZkrM65Hu=H?MLt&wPcVA8=a?Lakp~m_m_$Degye^*!QDdwwMJK2dE_@ zi8(YJY*IhaceF{|^S{lV+l#GyScY&v0#BVj&5z?gYE7o#CjV*(k`1DFBThX&JS5J# zC7w$7nN{e&O5Ppc8MZ6p5$mfSVEwDubROWFn(TQqGn<>W zElw}Y=9OP;W?QoUW)qd5dj6+KQ>6_YW5^CoWxVU2m|Xsv?Vcp1`_4bHQy+2{$#cj~ zo}7jQ#V2hP8ZGynT0K~>LcT+1-&$E*AS{?tG8R|u(^JV>6Fw>3{6Js)k6!ztc- zHWfVS_v3G=00e20>4VO6^ygpSUwEd0iPsqJcLMA31 z+gNd4JH&Q8$}K-U7%qNK1&;msz2Jg)^#&zQWv%Rb^g`ZPLGh<+{dA|k%KuR*Z5N!L z&D8{kEdP<#7A*$vo$b4>+}G~036kUIDUMJ9Qs2PY59;WDx|fAAJ-%7=-@9*GLu~17 zrglG1hNL6B`U{%n2k#s$sG!@nF>4Jj{@OQk?Ej-;?ddrlvZIUWH_B}AL813{-5zWk z)}@55T2@3X2ZkNjXETkiV3$|^G5!bSJf(Dv{4>8FTAy%NmL4$Y&?~yUB=*E=?-BnV z@R245?di~uVai0=*iKtw_xJfV5n!JrphkgHoT9I%V}12WoJi9vNV5Rk;JPp-0Z6N1 z`&J!X#!a^(DbSLS5A*Oro>7MALYzGN8QnE{f&!b+V{QW7wsin)_wn0vo8;ju)#=~><(wt>0A`}SPIVbr5 z-v&=^K@#{wU?|E7x2kANe51gdm(?DbQeIE0IE}_9U9fpO#FCDuOCTZWhnOEpZ>`=y zq93jVDG8kW4CBFAHFYv167Jp%0L&<`wP!O*SMeQTNpVGgZHVfX8PalM-tzU<)+zc6 z1M{bUG&JlDnv(c_`bX4~yU%6G{P>~dOGapmg%%Kn~FNkIG$?43X2^$3hPKK|&QGv5&h|dkGY|eq5QbnY}SpVt@5iZ5fqO z5w&UZ*O?miCuIT-6&kURDn=(y5}W1|K-aCsNZ08SJZV#7#b};S7qaPiFb=dER~R7_ zI!A22A=&4?Q6_#1#>g)l!^zs`W{^mx2zrVsd8uk;ne6#}{ho>daQRik)H%N2&h6)> zAr>%8xc~Lnl;lnN3XPGz?be*S#8r{uY3=D8oW=ZasCT{T@PLLtx)Y$!;%_Bw=yCK$ zfB=9G+0BOR*dAO(m(ql!wHPYfWwfJ(*{woC-d?7ad-_d=!*yLC5B@Tni>nL1{DC^Y z+uhK$9_OP3!WrE4VAq9lwU9d^Ng;#W%$+S6)MDO&DU7{u4c>K%xaXAjs3etounQOQ zwWS^euX!lArr+50>aSkJPVTqix!kNtMfue*qjoSgAbkLokY|72z3EhT@%ie({(Al(BUkVz}*6Kim&H? z-&$|nVVYGTat(_BY=|u-EUGS%SIaOD8ZhZY;^bngFrgX(+us;YJbPFETx|6KE zujt11&rY-|+kBYBJk=g4-424^T6L*)oY65b3)iGE9QR#H z5e&^DN!t`Xc~zBEz-M_Rr{iZ>xx&OM&7{5~YPPI>Km-pRrk)nxl_qzBK{2?_^YD*d z)~$J1ng4A1d7hGF9!R;=b3EjxnDY?N@uw94SR{f`8^NeE^YWt}ZGoKyU7+X{$ZzKu zrlp0gJMZ>isWA!n`P5L1fMBppyhaBE35~X+3AiiZSpPhf7s9J6;0nzgabbnr28jm+d6luYY_lXh>^!X4&kyAi6TM%pRl}Q#kn$d; z(foHel(WnkD3~$-WZmRg|CA}@o7B$bIJ^#ACZTexx z`6~=k>cD6RQ2Qq0@w)Ne2X8i;w0Tn5UYcQanfmt)ADP3<(``H>*r#EJpl{R(1;x_lVYMZ*ni!{*sQ%V@~Nw?w`Itvh!qycfvF)`?b0+-rbQuw!q!|)O3?t zgGt_I)o}MN(tLVp_JHC z_vy|>BBJnR~TM7Kpj2feZ1GmHFH}uFu{+Pq{*8; zR{e{P|GaTZ?cgr-$E(|%pekjZ?fPw2B;MeZ_o6UD2AT=ZO_8Epc1qYp&&I)RUT6Nk%0(M~Lvo$%6e(J90Z4klo?;{Xs$_v> zZ>>vZ73=@+d7m4Qor_ZXB~e> z(voX}JRN|s9FzT;4R3HT_7*b8&yUU0$=ZEilrR0g-ue6gw1iqW3IZ@|s89Kq%#jBV zIBUu%j>7LFW2|v*y_8rvkho%++Q)zbN3TFyU&z?M9e{K1qX#Nl08e_J zCX@S|NJ4|`!Hu|c+viegcOlnR&5q`=VF#Hj?%u1~ zJ#!D0iTt4QpIwD@1;%=|d+UMg^SFjk7kT~bIfhVkJ)f|# z#e~h}Q|AzfM-Rt1EN6KYU;Zi?ZHG-f;!V$fb#*l3ijUH~*zsN{-Qwkxs{n_ZZ*Hz+ z%{XWOb#`&Z)J;y#x5fBR(wo}^6%jw2nafsorCw%l-h;B^}2$W>ejSZ$eeE;1cV6f33Ex$jEA|oVZ!q} zmQj;tspEAbry4+v`xb*JqjO4jI{OO&!K`cQw;t%~ZQ_qMhR+N# ze9;mIk&--Dihs6fkb6jyrb%WqNF~p&%NAS;uICI)?|u4KESFXwKc?f8!}d4xw$zPY ze8lQZGbQaI5w3f>!FyX*{MIJ0Vg&yn4;A>evX5G>_Y>Mr3Ag-@VGSb>#$+6w1^3zGxo0 zC@+|)x+CGjT6TX#=b5=t-Br2QCL2G^3G4fPNSN9z`YE~6C-IVroV{^)>vHjJa3j(k z+l;`|au2RbC*9uaB!6=L>?(f$oAF+DnIxSk3`P(Ut&@1>(MIQ zmxIpGNkAalvJrl74}UAOI*o?b$$}*D>nt)wdNeH9dRb3(-5T=ZRUgf|$gfs6ADPfz zwhH^j0F`^8fdqZIxg>-U`dW&dLy1nqSCVgm=TjXfY|v9jh)x{ef`pF0U$-Eo@8-ZB zh|L6`z?A5xDs*W(x+#c)O|u0I13r8e2vgGFt`!offUXW`1b3X#eCK9g0DPLM;HHTB z@Jd@O#Ex%Hg>AfaSEARcX%?eT4*If_`^QQ}E8Xi*WV1P+L)C!eA#c^tkt{I2j3Rpy zx|t|!BpaX_LB><`y&}Er6X{2(;sUKNJn&aVnoIGJ5)9(ETcRwl1}}78`By!1BJ_M= zBdtGese5Rh9ma!4xY?7ti6iq112W7YIu$y|49s)EZ9Yi;MDF4A2{KVdv^#9|i5lPJ z(wYdBs=E}&ZQZ)6Dv#-=T9pdYjIL7&8Qy<{uJ^&&Q(vy5AI>XuG1+`7F#cR-HFt1RNl%l_;ATpnChfjIrB56Ia!LlA z_d z2u`~ci6N^J$vaLewc-o1Vb!SxZ$Fl%|j1l;jt*Dpo=FU&)2lm%@%{V5A zzRvM6AR7=nG>G7RWs*}*JM-tS9xUc>*9Q+2)pHcDeD(O0uuWOx7i43;+ zh4@h4xBV|8ywp74&9!faN35c3BXYq^&lm?rnUV@&4apBy6#~CusuJUx{5!pOjUWRR zd@jKUUMl(G_?HopM%hmtayV#oQXS0nm5!Bic3ahQ_zn|E5VMk=X7B zC;3pm=X|S!xh#c`9*aqEUDvgwao}2t3?4=~xr)5Ix@Yq@S*j|Kqa%qXC)N5>ZI02m zjQl=oS_4e$ooU{`pSPaX`52%AOlk!GuV@BPCSTTqsC{-)_~ea35i4_lx-B zF?1M0VYFKwLUWMeB%cAmxI)JW(<6eC(RU-pBCgGzh|%p9u{K4&Y{y(OxSQwY?KbDF zA>p>l|$hfCD1vDocepnkeHizEEI12g7{K4Pc|)x=LlQQz@S+Q1zq6lH~~+1yc(&e{zVG_Ei!_j|BYg&OAL^T`E>d$5-?Xm*%=!$lne z{lr~GIFoQbjO*gjB1uBdZgt@88DR><{dW5(Ym+G>&qB%XYu7v%VH((E<0MFFeWLvM zM8#=MXr!0Q^**V{TWC(r5PUyrbw!0?rlg$|=p$8Cx1x4C(eu-Go7Qia1Q(5#)UX)q zgtGT8`4WnZy_A>adI&Bp9!*cScEE8c2lNAOV}k|f&e?;TYnd)(bR1;!p7v#qFgNS- z6vs6>`k@d<6Oo#Wk9`56^QLtgnA5a{8+V#jxTcljn~;niHyvhBo?%)g|2HAwn=1eC z@~qrXuz#e*-u;F6?mg$m7HjSMV-ae}O^%Mvl}4#78wBp2_RCKJQ%|Gf?WXgE2=()4UUM-Z4O25qvM zSAMzpAaB&^aySgG|1BaSCIYYTY)Sl$-CF(9-dyycXbry>=)M`{UVclS2fA2OR>LD8 z_F!QzkrWyl7|PA7dY5cp20vGt=n^m;krbq~ zYVz||oAnsvbm;u8#0h>(ZO$TubA}wX=F9cr8h0&&0gFk2OQ7vblgFhiPn`q=4E6sS zCua#t70z;432<^3lVmrx`@6Uo2qBb**nU|RQF5W!&@H!FMBbl?aP#k0p!YEKjlG%^ zOdr5I8?d`Sb1wzqow_Agz=gRYCu)F!UHZ%Xtk%9})rL8Hi z=Y*R;@n&xQX6u|k(_YLpt;a_)i=is#h7Npgr9;Xg^-GXOm~sbEs`x5Xr!G}O<^aZH zW_K(~s7iE15a9OGi1l~h9X@|Sj_y@qB#Cr?Pzv?JDNFnv1U;zjd=_5bLz)vt zxT4WyMNq;Cs@wj~IDsSO4xZ%DJhzDv9;^!TWoM3@^tJICs2>ifohb@16B8P6Iev=U zTB+8TuFNW0>Iv@3kDGfJ_e15?xX~PX>H0x5JRuxTAkocJm zJ)hmxp3ti~-`!bPJ6j?Aj3eof7pAmnXN*)z9(Iu1MQrSaNTcWiPn z$%00g!!$~p@|m4=?KVy?r@H>TOh&{ev3RgMhFhMvg#y|o)a32HJODr=zg5?PXBA_n z<<}Mms(bW$C{%>dLjV0mgZ7if-q*h;nJ8TpT89$Kt&3zOL!u%8+oL}0R4XUj6JA_i z&m?Tsit5*tYm&egO+*;?9pGAWXoz`TPb&PKW#+{&V|k2hvC)J8fctajVr%5O2rPvr&=I=X~rZ?LXqzt7BBfslr|G6&LZXUdOmf zFgL2=E^oEmQq`Mv?Q@eI6|Re>eWk0!zZ=^BVMH`onF3%+<U3v*SEy)Q8`jAv|fgXE#TVf7^&Y6E%aHpieB_)Hn9cOo70kHW#a3(0$ypsKp5P5&S*}^9UnN=aRpD`eYho<&kY^lw84n zEPi5C!&;r7lVxRWjWCFgd_#wA*go~i?;#C2m9ANku`u+@qbq!19UN!^C!bW$_jn`=2rLW&|K+v zLvqt0xo$?DGEHIcZ^Zv-A3D@7ot=e4H^Jnj2*O+vQZh)IQ!MSIgq zb$Ma#<5aAbiq%Ehou4L01&xV*(1O7jflYGz$39GzT;KgNPCoYZl-q6m{Nn;rSb)|0 zR};5=Fd9ON(<9j@9H$7qh+6MGyR0u)bGu1tKH6hpw_vmg&rlpq7sl8v39CA%u<^8| zKQzv|diiSVP#E}|lRiR^hQLj31Km*o5g=I_%tofcp^AI^;LAHCiX1T_ow(P}Xl0}N z#$^_DH3UhHvu*3{?nFO#32<<@W;M+8t2OSZZ{rxmF12jHzEea!OVM?~ed>&?qt(@( zf*JV0v8bQ9I}iTQGK-k4?FNLf#!BT0vFPRq+<5cH!IJ<=DpCL#kD1y;x)h2eURmv> zS{*r8bq1eD!*L-md_oroqOCizcER|3X}9={x|#l)@W)8L?!l;_wv-mJ?mkH@UgB)U zK=>Xz^o=PS?x_PQ+g-ig!~zT=i6WG8+j2ag!aedW!0p{V$k6 zx(^C-2jwy~l{;p#x3op2t=pck0KSSZSP`dY*H7aYiZ59?(^J<4XxA}U+^!?L^@WaC z7UYJumt3D0Y++1~l!6(VgzX-S!`Vzt>VXDD5SN^Bl5Yj;fNr*XXWC~RrSWF^7Tcvk zcHi#5U`DnW3maK!ZH>&D4;5xD{7P^>_H3K-1xfAU0|a*AUI@eUL0|b{Ij$}+-DQ_~ z(MyK@%muce>Cr7z*FQpU5O|pIkql^MGJtpLsss$9aRX?6QcjJFXbn~LB{x~kj)5;RWfXWfF&Pq1umr22=1pi(bQUHwZdqdpp^Azbw-14|;xWd-L3*u_t zC`3xe5B;&-B&14Mn=^S`FLC3I$Q^%#nq1CfumwD-j4$_GA*kL|yncXxf}}Tet7@1( zzOlfz?bma;mLoZC#s2vk_8^HEjbkAv!9k0)w^`qs{QP^h{c9x*SSH!D9on*-k)x)K zCx6Tx(hCSYB|rFg_7;w6Lw`E;I9_@4^QZ{jHKCCDme2(oI`?0LR`;D+k?Vst5IVM? zftm^kJvjh~W6Hqlh67Pxzvj zXuear49a*KN>0FmSXZo)eu)MiCYddO=?wY{Jvbm=J{ZWpr-)TghTl9Bp0-}Y>I#cw zIYRwK?+k2zqTZ6KhrX42D>-0XyKCF---r3Ik)bEAq*mNmo}o7}J-=O3OlqciJY+oT zf%9XkXTrr6-qaBp^g|kAGW-oQ(!OcWenp|AHa(wAuAFBOe1E#}gY{On-=}`&-?La? zc>3c+sUWpWT=L*M&rWh4Wq{nhLH7ZCL+Q4(L2Ngp^aZ2ILepfFoj8dl&U}!)4%jBq zy>Gz)jMJY0{4F)w;eO#FADXR#epkUg*cWGoMS{Hejb?NHD65J*`uXh?L{CxU=Dzp} zgVaEp?F2}t`M7nUv2gC8@_-!f1xg6AkOm+~Mx?hpe|0NTRA=VIM4Of&qC=mRWF>x` z8m$iUMbX13}f3<~kc^&N-!&;QkV?DIVD*Zp;Ik*O$O{kK=A zf{r=g22GCPeWA5CeH;?Y6r>rFe&$+?Oh_g-XYrpp=NmQepS_Xcr~7Pd`t8KYD$`r= zRfu7hm64Ibnz6NZ)0q>rxw4LQ) zTHAQ(lkaZxwO(<9v+}1Fo@HXc@fY7HAS#9o-{9U(^*g{Mj{F|4vBeJmLRKd1M6~by z4F0+_xXkyrD{{m8U~0Tg_=kaa00!wII-`5?_44{%v3rWSv#sdlq?*MiPS*Ul7JBbj1 zB81tq3=s762m3VU9_2sJU<+JUrZPm&N(=nPH=CqB2}%3)=Pr`!Qy!v9J=UVdxRTJ4dnf?0t@O@$v zCqI)u!W&{`lw8{8Gcx103Ljj1&_>GM?ps842*5m@zVzY4*6*qF=!UwKOhVhk(IxUG zfAER;gLygARhN&kE*dXfK|dA_l;5OOlGnz6-d+H4E2-ZaQcR>qSuc(yUge~asg$9^ zOy@XacEuO5HMzGruXbgLMs?{4n3tSORC;BhcZ_^SO9IPrKi1>85~5dh86 zrIj_A@p6a~d3;j?voXEV&A~{By7~s?rb4@Jq>nEa?eY%`|Lj z6@kX;|HZoKKq=_TYvqCjchzhYq~QG+HcZu6IesOpYn#gX@WJsLpx4WNpLiPOrGA+3 zm~IQv(7W}t(%HDJU_dI7{OWx59sRqu_4nyU+MNPUHNUK6vg`hL#cS8!#%jeT-;cw} z(pvK|>x}28!aiM5wNSO2PFRbyEc5hBz%&~1n7lsFu8+hS(5$Q_$p5l*%$|UK<4SUGRwqw3B8&Ll4=QcX=z^^85w$}lQAHi zKK8XfTjW8q>HCzZ*4|44eNGIV+vi{CZ3NfqCKuB&ddG(hDm7_>Oz7zB(k?C4RD_$( z%`{^}8_%mTk)GX4y$)qi2Q>eVxM%vWw{J=nFU0!u!iztCTgG-_cU#(p+3gq2c49g_ zZV@d$M?ClS7aEIvvz1CX4Ip=f`0z^h!)R)3o(p?t3<#pWDvOAvYh#Wn0X@w_+KD)IwbXivcm`4u`bs#RZXO3L0U z*+AS=^ir7MlHsi*o?ogm(3f(AYsLIKLg#(Dn7ui8v2ZKm@~62pUgT}X^huZHI)S(qlZRw z6>1eC^PXsZ5_=|`n3&OCL)-SBrQc?Q_`|f!yM0^L&FwYNRPrK3W*uw3N#K6@th_;c zOCet7dqqXCd4?+C#!ZgNtMQ9-`v<7y1FQXi*Ay>w_FlET`u2&C5z3#vk#T!d(WES$ z&0a*O%EX9i#DG{Nc9+b8H;?O7!*h56BE1(;r;EGIYaE@J<1QBj)#nF0<#y{99yvJ* zQG=Vfw!8__qikJPUZ?j1b{2`y5UZ5ivj}$BND9`wG)*G01GTIT2|sqTl`|>~(x}ka z@%9icHTMuT^Il%gmOVOJINm$GORfjn@Iwdx7qto^NndsW(2oCIF(L*wlKy8^S~`(pi}l~Mo7yZ;;{<(dcoY#I9$ zi%kwMZCxA`i~8C3ExeDAB1@h|UjW2RhXX~NYaHqB5=Cy|m`luRUdhX^+@t96+=;U8 zfWJq^`kK9avl+9!%ZofkcbA;`#fiPGYM!wXaO(l}!l+HE#ocRR&Wwfd`dxXIi@ig+ zFpkdz2_>O12eZ5wow^i(Hh<#+f&q50pghlWH9EsUk2w#-SK#2wYO{WyXatwnF9bu( zII9ETEMV8I%xT+k4bp;LuJQuzEn$GYhl*`V>f#3tJ38ei|XnMi=14)Xpp7o5hw}~zDei3iBD?> z9~i1%`TzNgu-h}#PlIrP;^L zSKk>$eNZ`tau?T^hV z*i*6%o3rWY3(J}3^~BBF=@FVb|GEjz3(R1;&X7P%B!qsH$BtlhmdX^OW%Uo$rrZqOp@NNE6f4Cab{x{e!W9~y=XPN)cr?jvTrlf;|LcHi~looFm zr8b`1lxIj}S3HADRiDCLSj3+fsy@}1q5sJT_5w&8KewV4g%v8lmB@KIXj*CZCfhxe z?M>R_PZJ7VpyI6U1!#Gj+zqy?^YQWBse77kGl`J4mf*SW&psiUK2##Vf2->U;Xi5b zuD+!=E-dG_y!~M=Y$&-}K&IEm)WLb6WYa$A^P)mZx5=MHefG!U8S#E@tUlt-Q`ug@ z%6o-(lVxvJ4%NxjTG_-Xq3yJ##PnrXSN)yrC!B(Gd_<=+xiejjD?Y`%U%@mc7vzT) zv|7OIC93*RA{52qTB=Uk&vA%uv!Nh^Tu!~P1|qAzMI!!^?!DTqbJ&HZNLcz^w#e2x z4$Co=9HD=v<589EdaiViM~lr#eQ6*YIwk-5o1kpgA4BgdN3XO9zPfKL0lWiDvoesS zCQ+-uT0c1cw0>CrKsZG>$L_s&llen4LqA&$a__6_Zf8Y67h$@TB0xZC@c#0csKvr1 zMj5wGl&5<$yh5@IA??jL>_qUZC_4w^4zFk>LBXH5YGWVJ5xblS_#jz3XYLe_^|8?C zV(T*JD*a6L2emt6Vg_1aoy`CGLscf_ZfJRnSyl12Nf#)UIi%R&YT#6{@||ZtGyXe6 zpVPoY@DcBPNqG{XhpLrz@=2W*`qT1GGM4Q*(a$x}Te;;$o@L%?&*!Wcq-4inPar^L*U~avQo4Z=vrR&ey+x|Mk~q|4N_W#igUWKlUJb} zDTR00W}48(x7>{zdaS;6!4xOg+pN4T-%m;wVU4sy8fAE|2HkLv<}rCE=Upps zv!YH~?R%X_XVQVJ$@Qli8CBfRWtuKP(GscTAy$;o>o`UzLcy~C< z3(#=C`i0%NmP8(XH#50BkVKYXL_ zdxmT`@={~K;F0jJZ5+wc*@hh%2IOnS8bu{u&Vrquav)IdJilPO2+OiQ&S)Q0A6ba` zp>6&whcCf@57TXePcsLKDLka?|Km{bMxa^E^Qd67Ti8ioc?F1bBW$&*L5ZRD6}ccD z=cDG;H5-4%@ImQ<@1@Sm%S*kOq!}01;N93RmTf9?wYPob>w_ZB#YH4TFk1`x1-jZ< zUSc`&re3AmJ16g_^PxvGN8?|m@20GTDVIERJ89aJBuQ6Umy1~>lW%?c{f|)dl-J!l zMYnqFy`>13d?vvn%m2N%m_^c2;_yDUmrFyVKwQ}bCQ9-q-ec|^FGgC_8S5vPO7!(T zFvv1pP5!unFFod4`npIT9@qCLd0yL40$mMWkQsp zquKy#L>ETDztF}v%xdgFS;1FCm;XN{o?wY#q-5`l<$2$1=4kR}*n(R~7Tplu!pPJc3_hKp31=tg5WV?gr&d!??2dcN48~K35CzCO4g(y#9g3x~-U@*fBM!Vu18DYl-F1VFwiE_FS4UIHiT_5n>%U+06)yPMi_ ziN}89*85QIIpn2d;wrXmm=M+u`jp7Xv>uz5T(-ks+<2tlp9K@Tt|Q|*0~4EHDhB9LDY3bqCq(WIY6&_=s-y zQ8>|r-TPDBAT0M;o^xCC)sR}nm3Sx{N(%@Oca1Iy@{T zu6ky_Yw^oR3M=Kz^MK2Tm|>mzchA9#FH`e1iyfWY-h8u~g-x&X^&X2V(dC*yT)~ph zYE05|F>3WCnQLMJ-QuNba(Nxrb$@4muLcLGI5PDC30iGUfwkS`d=D8df?RVZVEtmw zh}nvvVhS9-9e#Xj4eUWkKBF)!{H>|bsrORRd9!m^ zU{^00Oz$dl)YvP(yj7PW1iS#VG1PBlY;{Un|~9llaYd&{x)v5ocPtQOh1^P#;6)l~O4Bliq$0iF!T zg>pPGJtV}N{(3I7wr##+G5f}(sZ}YRG_1wkB3eedsY}@QFYO6V;&O_uEk#%yZK!ye z)#VB)l}`C z=T{#;zcVTc8e}@I`VvGtWQZ90A8iV;xj2Pvt!$eps!rvg+Kc-=GDkiy<5lr|MLk=i zw8&gv%??#K(X9eVMbHXmCr8}(ZsWstHqBU5FbQCG#W12~ox2VnUXalm_a#jHfk_`6 zDup2y*LIA^YlOpXeh4r?91K>KGWeQ(&eD=~GCAV!F8mrsq3Om+v`q+oiWb~+^j67w zU4hpLyp{JcN-w9>U1*{&c&jTGq^e#OT@PNctMAaO0;-q3it*LQ5V>j@KpMtPld8zMaL`u}i9I2MuC?Y@8V$20CoYNEhfLDa&uAZ#hOV@10OwK1;0 zqhrV*@)b0)Q}u{0v0yn=3+O+AFso_SAu}HSQm9c6Gy`IYn2Sb4312yL3S%^$<_*=A zP{iy2?o03(*&l4$55zaow|eAqVdJLD*oX2|Orj4EJb(y@)&$iQh%>zGIT`>GDAE(% zV|Lz393kho0Dnq9{LE+LWkejzKPYON%XepczK1V5Bpt6AENT6BwFSpBN}g~8C>4P7 z@gs_JcHMeQ1JM38HyY1gRRXy6+OPE#s6^6i&Ae0?At0JyDiL`Yoh#3=oh8mchC^?p zHUAeW3dTpf$q~wAkvT$N#}FCaIBFjU@igG6SC$l3oXB*4P_0=_ur>^jSP; zdd~BEIZO9)4x7_EtMC)$+L>r&k$ZIsv3IjXXdclfp`&Zet)73ft%aAb#76l^%xT)c z@OC7lrdO=VLeay>#^iua+fagp>t_WDQvXXEt$E)N(vUTukW@8PHpQJPovVlDlE(xx z*#lQ8I!DjI*JrF62Zgl{+St{TMsKfK@_U0D)2qto@~v?zeO9jE;p$Sa%5HZJ{C^jA z9#G@|K7qshq@TPUdEW5fQG$PPFOY3S1~0d1@(Xan($2+GQDiwM^%7nuUJ~mtBG<2S zR@>&8pyo+*m^)*aNV~q(I9&0l0*IP)+AW;=D?G8dYT#w)|Kq%sn9!j^n#+?I&hWS!o>ay!LA&Y#XiN)6g3ixlQTUMuH=+dMQn3zYN+3 zs+K2j=b7M|Ojy=GDNJF9KKR|FAbX~=^Z7TE6Y7eBNHAHR5HKtqJa-+YV zhnqsD@U+w+%d~}yMG6l*1|mr^m*(desmhe& z#3sF3l>eQ#-Y4p1DkeSc3`%BtGJ;v-VKBGGrfWR!qbMu64@Z-W=+%5rm7v?C<(@$D z`GX*^+XYC|ZJflhBNdOkuT2k~8jVQ`Qxt1)LX@oP}U)BAAX3_mK`4mJU7ElYSa>#QVoaTtIshmb+I$DID>JiRu!?cdt^U5#Ot9JeNH zf&FT5)B+CXDzQDI?UqBV>Vu>J4O@%PVlshm~SO3Ds@zhC&VOZy# zwwNk6Pn_yAH1aC8S~x!2|6b5ToYXCk$PspXpjUwGZf@U^W;BV36=3ZTX@G6Go@E3^ z^8HP#o;P$bN|rSHFSi*4cqJn#_iO@YLIP9_1R_E7qSeH?vwh{bQT1lV~$H}VaI`Fhrz2YxUbRvC8N zkt{=tX`h&6ovC#0z&nE`Pm}MbO^FZo?->u`N1VpncHtWv#~9PIoDMFE+Gg%(FR1_T zT@;?_P+yk2#eaDsxFFJoqEK6ScQW{pJRL_G7MkkNA{yO)R;Y~aFo;Ha-41=R#EI4C+CZZn~4LxAW!JB)!-} z#NRn%@>qv<)eNJ z*t<>Eb+F5z{54_64y*cIK5WZD-QG#ngp#kMbgXjk3kOBjKwR+oQ1$K5#f?aJoCu7= ze)kpCsu*8%17u>iUh<>SvrHUw3db?4t!<6D3ULk%sk+ZvC)|y;LV1l-?<}qde1r@Y z{m#}tt2_W{C4NcrQlGB?f#x;!;_?#xx?&*<_;P-u2Jz*8M|2X?uJUEalIMEI;4L$a zu+3rLv(JIyQvZC%?0Mi^%)=2q+0Tz`irj7Im+sdY+y3P%HgZ4Md@44U@p0`(v3^`b zjSZ{vROO0r=kM;nWyD(azf^buslkwRG4qM26;eZ>&djaGqS(C2)g|j@K%L!Gg$VP;#Bg%j>Ko#Z}ACre(_d4!|&;zk+JrVb& zn|3caqn=}Du%b< zQU!#-;@;*=cM$iiPl1OJIv?&W5fIxWb%1gIvF=PQh=Be)Nj?{$TyB6X;*)pFZJi#^ zaCk^0K&CYwM1YH9yuoR6@NYAp0gI!EHw4^gN}$DzAdmzCGG>!a5@EZ*BdS?=g%^ak zLwr%OX}q3l5fUyObz%gb(K>S1;ui-jjI>5-vp6E_a585Zk)ATVK!znHJ6YoN)EOlsnahC73>kZLl+Z#o03Cf;P0o0NhZusUQ zGW%*=|5N`5J{m3Y-P1iY$y0RXx-?TOPZ4wTpiS2b&LQS3ZbdZ>zMsmY_kO}{Dl_#_ zO3A&1djP5%LGy^ifYo5OdeSrQYpaT7RX=lLmB~%CG)#Qg7Bean9dQ!`RWPYtm#H%3 zb}PUpYBL7>d*NO2vzLmZX9(N~U{E%2lbE3mA z=UQ)X(E;V5~Z2MK<*j>9-`BauU<%T+&SU?+Yj)fp(BwD2h zOCeersQ-9w`@@6gV$SLzS+4iY9&2bbCE6Aga3YHqb6wX*<{mn_a%{gB4cs?sc?Jem z=S(P}i3s*tICm_%a)iW`5OKdP%?3PSGFd)$a_Bv27-*IVL(WK`k%2n#XGuNyt2I)E zIZxv&Q&dMJ0GffwloKmlHf7(4A_Jbfko`T&&;;DIEgYnQa;uv-V>x}e^XOaKd3NpS zEwaA+DHyA6sYESogs>B4!BKL~TixZkwzKj(UjScl+a-aUv7J2J+g6lNGEpD2bYcDc z{yz5jR4*33g*uB~T{D{K+xhe9!?a#R@7UdyFXwP50t1LI^+eL4+$WZLBd<|CrCYj)f=(NS^b`U}g30)G@IjK~6~_Mfny%ZZ1UKcR`l>Aq@V>Aa40H44hOoxS zsj-KE-|}P+fjQTPu4*+aD<@Y{OpTfmhkkNonASJTV*O_R+={;wt8bc~X1M4TJ(1-y z=8zh?rwp^`U8QHQG%KKe>iu-%5rdgk9Wp<_(-ohcD>a?zi8d&I zbbB0)ZHeO3UY-lDJHs5IenCBl5iy03vubIOv34O8^)j&`!>lPHNgbiSr3S9$NQb_Y zkrk@5e9{iTaBh$J_$rpdIoY(!-0c_Cp11Ij{xr1y;dem{2~tKl%&Lg!W|6QO+f0FvZjVOr>&=tFuz}pW`=*fA7)QmBY-3K|#d`&69xQC1CIcT>);to= zhY{) z86=D-T)q!ww%Zw?eJ|5?E)om)=?OJjUeoCsan-VIF>F$X=oc?zUlldh9j63GG6Ci@ z1f#XIAf7aqC3u^33M5XL!k!aIx(tIP{>7@&8y$brBVKE0NOH(py*;z!5vAJj%@Q&= ziWkxT0*sKi2yrP?36f0A(j|G=x!5QvjR7UtHYI;%KGUxuVic*RcrG)I2?Fnb2HZz^ z2w#Pfr8r;vqcK78ZBTWX-w?9YSn;aEqT>8Fv+W|XNHZF_I0OIcPITas~?D5y4RuOoaGz))#AH*Quj>1`vJ6xVw?M6 zK$%!Mm1#d2(PEAEkrLMvtok{wZ*I(6e?PJ`f)lt%hJIz&5SvhABj0;{OBkvo7J=UF*JD_K1NAABQ^G@0CZylXe6sPAGM{dXt-jI=fJNIAB4QEFOmUd_& zzcg415kj6LGWA~ez?UE)Ul*k*2@_d}JBL@vxYw0i<$a#NiA>lerrU;Y{`~vG{c~?9 z#bEFvhfG}}>LhjukdwZ(#l4Q;0iyOFPWmaBB(QAoOH4*Ks7VlZZ+TnT!7PyBO-M&g zqF`*FjKT+VLh+LPTR+n-ny9Z7;qcgg>*9nu2YNc-rE<Qo!$PVRao2z(!!F$qgIwyEw+v4>qO8%5WfRKb~ZEMLUZ*Ae-bh9z4)FXwmNE1ZTEI$BI;9ca}) z{WN7xD;@&ivLg*AAJl>kA=3N`p09dqE&Z)P9QI3xG0XEF{kmX%eH+UPdhL)uuzh}Q z)r5d;44)2H6gnk&YbaUvi|0cmN<%m^*hfR06~k>=pgZV*f9Uv=X=znoWS4W&@YPBJ z>D?${cj8K5s@%cH@m-%?LB?-!hC#QPoN;BIi(T|ohf{<9tEi@@GF(k9twLs-Q^1~Z zMsI5f4T-}38V#=a`Wp1`OXZmw>;xLe{#3p_9qe-HvEZbXU;;BEzpAaUZ)qzKdg=oV zn*s##ejk3ZRf#HUlF*ixf>IV}ZES3rP?JFr!c49rL8BRmP4}Yem*sXKfxYU<-sp4R zF{*C0rQmZ(Zw-z$tf&b`Ear7DVcuUlMPI?=yirm?$Zn#PUrYLBDjOIOq+3+Q)zB|0 zzJ#&_cv}(Tz>35V-r!PX6DXy(y8hH#+`r1&7*%~Mf5WnxBr<5+Db~q1`uiX2k9m6L zOo=a$yu$n<=WzdI687$#IA(DDMKRW$5hxE*zCiD~v`#Avh(JX4DaJ zLKm1LI>`_!Vy`yIZnkJ}Ppiq1&yNY7G4fl;Ou^PEH659RgMFI3)ls3DSLjCBx+YE&U`-vPq(J2hFwjc=1i2yI>w# z0y>ALd=G=#-|g)9O@3dYF5Ty4{-9m1ktMN%WP_mou?Mc~(>PfNbw(QPB49 zysD6^9OSDO%gjQ74nMv4-!(I*LQzLo6XgfaLNkZpOGP-xzqXfm10RjJGQ+J^d%t%= zrQa>d+*WJ+zm3L`cxa|r3J+Y;|LXoIK7 zE*D;>6gPB+Dblj7f$b5EL_|UxIA68#h`N3^v#X&_=)><7L(_kI{c}l!0uSZ{5VAR3 zHc#0X{soKL*NG_vRX^P5)Gcy`y(0)lZE$?@vMIdN;lc{+ zIefv52G=9YiK}o1r#}-1MiM&d3y;odPHml>oXF`$f{Hbn zN#5(Vd}1OY)a&GymYiBX9+I_cr!`eQD)!>(k(l6}o|HVZumAmwzc+GIH7Az$?Er^e zwpET$(}d4Ld5VBnra)$9;4RIvpW6n41-7^QuU~ZV4M(4{Mf@zh1#AQ}7LdZjdimKq z5nRZ?M>v&`xY*({2d}oW78Y;*+mpNX7@zbJdD4{^pY0_&_SNT%QI*SqE>RRkSDmZz z{WiUU+L@B>x`PwtD-tU8v_oQwCr+Ck0pC^NP z4B+jl?6$uAfnI~R+@3a#a;M4CWu^aT>)XQvq3w7ONF0rC6OJL)(4UU*n0CghKi=JEL2|0TG~-!)(RA}yLY!R%xUkF$Cm_6kG*Q509bt^my9-+4R$bd{7I`6CRDS6 z%bJ=S!F@N))E`P2&qyzy%V<&fXOF-x?E11T<(vkCh{o|5TI2e>9$9V~o&8$!oS*s# z!WqH36D&{XW2xC|J!nAqj>6v>wI&To+zag>I5Sp7}r~Bd&PvGE90LhB>$^z z_XhiEIgif*15uU$^}K)q~}U^@tjH zG%fu{Gx>w>wx36kInsRYIg@6L2>NB{(>F0}ic?Atv`g)k2j&!ni-MXX{{)a)C-S0< zQE!8$>I+QVIj)?@FBVAW`J8jB$(-sUCys0;6kOsoWB}O`IKKRIcwjBkr1vIJWJ$)Q zX2Cqe2&Ml1Lvmk%7jM#5{nvybWBAV)DfePg-^sT>y7 zs%N1Bc1j6cH$QVC2xf2PoLf&HQ(+k-n&i>=ohGjxAGHT;M`>lhIkFD>-c2I>j_0#H z83gNsM#U>F8TR@=UZ6?b;Joez*mSA_D;eJpUl{zoBcI8PT zkUu9g^!&l9tBYv#ns%rCy9(>tyejkeLf)t$6PFi1H)Y$Wr+=L!UsICn`vZtS$VgF{ zta@k#Gq;YG_$eD~{<5jHY1-PrWBcV=kJO9(Z@G)F>o&M!^AO>LNY-_J`GzFZY3qrH zQ_?8az@sE}jdNYTvN!N{sj5y29qOwyV0ECSxyhfMT1l| zgVie8?zY7L(6scBzRw|;uK2bLlkWl--YLyhXB-+@bePO{>Zwrw5{t}vFKKgAoBVPA zx_b{~@#dGGnv}KJ?#cdN13#lq7C77Fw^~)Z3k)87llHSl!*_yb0)L_7F*k%91tsib zVB#4i>5cCtOIAulY{v0+F7*XAJ>Sak$Z`Bo|2clmw7I3TmHpFD!}r_o6^(}L9}cg4 z=Q5jyyRKpjB72+#$pg{Y0%#A}$d@R?@y$P^cte$tV80q>pl$cJ;y<9N zIa%K`e}FUb;Wv{VstDwWxAj+kcvIttu9y1E=0`#10U61YPYdRbpQTS#R71syN|1UI z$@=~gTqqztIdnyE)3PlQT$L7X);IHQcT#O3Pj&q7!UYsf$g&FqFhCgH`A^NMPOp69 zh&CjY?!CH>=`F$wn2f0zQId`_$aSme z3Z&akAvop8zHyQ~!mvH8zWA}`sOY|ql$w}I_kgk)C&QQYf#Ws8c@8Cvzz`RwAp-Q+ z1G4pS2=gJ|{hx@$LZvaBkU`yibKN~fYxB^FGX5JAXvR;o_+bRvwzlq;`OTjf&qKOk zE;PuvzW-go$_&s<)CRTZ)J5FcG6|H;vT{i9`@1S8c#$jTV`k|cD~Eu7%g<0*4NQDf zmBmT)x=q$yy5K28o1$1(sOuOp6!sE2I`tc0UZ;y`DC**yVOs9gD5^~wAi1eZ>8HN+Z?}e~) zvB`aYBH~=0LH7j%o;~&uReBdO~IbtUE>_$ zNPPeCU#aNq18u#g#gq2(i8d$#C3nh-6d~k0(@sY)Z@Q49sG8*RxXSgDv=pt5lfIcG z9=l(w6CjWk(7$)MlN&bTVL{ZnDfz_P3j({4`?t#z`WkF7qt~hW4S@FEG*X_FGjZQ~ zI+zJ~L>lif!2qdy2-(AMgv)98kC~tE-XR#eGI?+Q_pa}fc2d)6VJ0c<`sPVRQjn8~ z^QTFLw2KCwkmR6YIibFz*NVkY@tOG?(_{VPwa1F0$2a?~=js^xI{mB;Wr|zkk6=Za zfKnKO%vB(D%bX$;=W}OD!I%5EhhLg}xRMz&KjM4!&mhr>UN`0Am#q75<^9fK*2rU- z5tka95ulVWdSJXS%*TpDKgH13{@{+voBXp{N$-h;D z^`>^H8yJllUcSOOXS{u;Uh@Hvg9TPH;p2=aun(FHPPu ztGZ%-z6$g4%=9ZwbQ}gBJV-9_otb$>6k(%(Ltm;JD<;ve z*RQ{2Ibq__qI}PiWWkzg;iqTWzxMfspY+e@l5OH-sRT5^u0Hqo{_b@uJFtZ)_VT6B z9A!}ob`zh(KEM{2t{3tzPG0vRrj)({-t}aGgw&jEBQ@dgca2R&?LtZk9&&}AY99U zzswQny4@!hF%6UG({?)Vc8?PK24WA+RQqgB7_nuWic0=?yWgcwSs+-N9^k~)=GZeEa=~zLGD9eeJk_#r5t`<13CGQcJIxG z8|I-$fi;pQ&FKalxo)t5*)K8(hoVB%Ua{VT?mYkGvaD2Vlbt0dfWDg>@)g1q*$rFn zy1pe8Qq9QsBhsMIGY5N7etvAwm^v*%Ka)-=&t3EylK8uS=XtF})EL!* zOy9@PGOfnAbm3eyPd#FBYAvt3i+1~#mB zFIGPJt^SiDx3jDW0YH_g(^E7%W6k~dbuejeH>RzyCKx>@DN!#I?ezq$Gzt)@k@Tjl-FA!Dk2Xa6V@y8W#V zumQz7*E%f7X{5E3HA*;@j4bW#V(#Gb#UR_}OlQV>G&yLAQrd@TGWG4;#u2+>k4Xzw z79D*XEZ6yruq4kULETdfkwr(*;}HzPuR~6ysNh82D!fu8DkzQKakh^*qD085t3qxZ z6m4&XRRyKcJfyI{tAiaMUy_(Jk{&g~ecns|cQuse>u3T$^DhmFh@}Wt%5E}MwtQh8 zBa*{yL91l_EG+$J5g$*k1Nig|I>K~HLe_<09$|AW_?`3cHJryO$(LF~WzPx8#&zid_hQ4k;t~2U} zG{@0zvOV7$3gntvO)hW9m92`)f-u-HM^%aA7MqqD`YHwgOav63NEH`GaKKDjOH;FQD@A7XtF*+& z#^RyfyVo~91CP3G?47pp8YLOXSI8G%y(1ita7Hch9Y)m)`ZL0caxf5R;^^gz)I`k2 z5p<#j0H;c%$KSBX#3g1)H9JUJ9aRj0BJTa~!gtE;art;`Q6j%cR#?JcS9qv)Y(vuU zU{ZJ?-O2jHR1T4#Z27)Q-4 z`Apof&v1fscNXgf&*gMH3VfF960i0!!%$k`LtU`yi1zI2wN1|K3lUELyYNjXLJVfT zs7jVeL(!DFPz^sdhH5|zIHK$P6b?Hmm>vwr02;xs{FAdR>82tn!IkSnmR02+OS$y+ zErZ2PHohP@-jWR~db!FG#;k=B%+^@@OlPSl71n0K&%Yq&@J5CLU%Ark2mJ( z8|LjIzJsNUs4Gs~q&^iy{2>otFvj{polFqAEpcyL*;xX)Z7wE*5X7ZxJx-rh)E+8% zg#Bexjo*xroIF>e3Q=fMHLkYwaAN1^)lIazC?21|>TO6&$DP26twlA;)jxrHKA)Dn zxV4*4$`mzy4{aqserXMJsBBu${J0$nhw_6pCQ7|aubr;|o@MZJD1{?ge#D~JK0GEZ zF4*YC=1Zymgi>V1BOG{mCpv-9yrtq@{NAd8L`9gxi}b|<2PYpZ>L?9C+I<`SuwKg? zx#SuT*5!sj7<(@&7N(E&{uZVZ(Kk`BD@738@rX!Brs#+ypLO2YlqbI{WX~r_3X-gh zJ4&~U>CDgmbT+`W^`wG~*M2NDVtNgj_)!*Q>ukaj?H2BGn%<-@N>93!gxsC)r553lVu^jR z62a|%jgCn?Rga4pNNd(RUV8Xt(Ap@_B7als%eZ6HpN&>KgLEUG(AJjtd1!KSBXkGj z7W-8@$kSnSyi+mXO1Jxcol0|oZq;6u-H1=FjssJwhG0?wq-T+j%+XV06!w_>w@5Li z+7Za^Ravbo@lyF?!yTSl6=C$oaS#?sHxid?n+_9@JWW(lDwqfR967$qB-rl$TOGsGFasWkno2u~8<8p17~!*dVW7Pwc{AGI8%aBc z(MJxLY?5PWMa1iCTP-au(#>%r0w3P=p3BZq!#=_lb2+*(m*83Uo^gi|&P^Q0G}WM5 zXsH{+)4~2?qoo(X&!-$E*3x(!L+Evx&@EgtotKtxgFW*(2fcrw?%Fd$g|pt^6QhO+F72)jWJ@~_k&lf zs_U^k>vj1=Ls@dJBRg{K(<4YVK<)_Mjnnr<`=H~G|_#$(Y z9?B@t?~{p-`*>63AKJTI+4Lm0J`|l_^`dY3udpWIrL9V0HPCgs1(=pNicW ze|%#zVCnsQnoI(rZFUnnUfG=gUGSdn1Cv&)M86qmHRvA7ueRvvayQR}L){&=nCrCm zml)@g%TfJWu|(AWE~sV+BsL6!JQzQ}Mt>^5|MMFAENQm874gpF3b3Y3eeWc+nX)tb zeL7TyYIiC|^_%RFqhu_XCl}G}c3h++5k(SFfgzMI`#d`+D@sZx@o+YH9pU!rH8y;ciCn)#b zKg#js#yqk(CCAk&MX4#{eoAr9E5^W|cCYBvznZ-gtGSi#I;EjmkZ62yG%!{3;3N%& zvUV?g+URX5W)pM$VNx(pDQ&-1jj{zeatX|zQ7gV)UL_vXxo{g@bH*Y0{a&acg>8MZ zS8vAJfZ0sXysTOu(@Xl@4cj@7;4ztkEQz?{* z1C$Y&yGJr6pJPJ6t0`e+0bO4c2~XIODkNSXp4a*Dgyw;%CiT-a?k?38m^gii(xA`` zEX5V_0B*~O*hS??+WG|dYHy0y^achg(|fETI@y%el**vm`+{RyaYx~(%ky6PI71b^ z0K4l++^GptrmyHG?q18A4px771yI@xX;|uGkke`JXe;cVbQ~t_#w9;#?P#+3(i}w; zOkcDs)_%wG=yhS205bBN_LLH0K@l_uhIPSSHxv{>G~w99tHKslD9|Kd)E&aoO(fKe zyoa>u!ExfSjSW#Wos$q#T!-Ah#tUQODYKAj@}leeWn>6MEgaRXjBjQ0QM^_tj@C-5 z5C_B$&}u>o@fG?3bz<5Xe$gwpR$HgvW|QW%ve#_?3ViLk82dvg3SFqfng)v8j0m3G z4`R4KS0vSJyIYGV3y2SjSE*`Kx;nb9Lfz{SUuTN=aV$tr=b2h8<}=kWB=)E9)K0~O z2E4|#!w(gw_iEzvUJzta z({h%I>{XoZ`{P3$daR=?_{t%F=E#NIV?6$Gj0#yExvUB35ZXby*6@E9F78C!86^ky zIrCDyfzrogGMHp#>poqda z*8|}==Ryt;p{epq;DXrIN!;Dp1$!XOU`m)G)62xFNiY~?1cIqX?43j-Iz6848SbN$ zvIV?7IPz^@jpZy8`xkljxy{W-amZoOs?6z%gdY;_zZ37H^?u4m%PO?4+4T?-(^HhC z9166aP57Ld!~+9ygkDFHJOhPdNkzI;x7g}xn`E9E>lik=Aj_pbAu+ucxOU$338Y`> zs0Oaw;ShRdM39MIPkQpcSmKC<+m4iA<=Bv72KLp^wvhi>1$cs%-9hYt?)g*=dWxDe zUn{8ZT{cM_B_UXl()jCZdHv3ON)>QqNXlfRZ0aK7u zM(|fOG$fHO`jk&+aX8s^4fYv3j_#M#mmMlQg`J+Oj^Bc7mYP7XltYgq`@VftcH5+N zv)nfsylb1{H^Gd<7Hx9e|KsgE|JnTCKCDv}Ra$%1-qcn!+A4~o_A05Wy{d#Dl2+{z zwOg~bQq)fDQDPLeSH(=M+6hGvzW4RI|A^m%JmN``>$-BDpYwelM<-ygsTxka;DKEp zSto)4|5<3M)$Cu~50gF!3R>@-QEImUHex<1@<0^L;}-rNA04M>C@Wc7m}>cQjXgP` zrA}Id(IYG4drcF98{AAIo~v`=2Tan%Q`c|STBb@aZPp z5=+i8gvE#p6*MU_g=E@mQy5!eZpY_TPjUq4Z_v*_6}K!VIHiY*6(RkB-XKoQ%iv{w>ytjn)7kOVAe0{m0+8&AVxjhgVD3msoU(bO6 z0_Zwcth6QiSL?>z13uw2-H#3Kmd4!U31#4UJA-tITiR3?0q%MKO_NBuIuHgr78jSi zn)ldi^MLM|6ly}CZ-`ItCY#^^w zQ*A9L^NRA&u@v74Nq}Z6(s4oS!wnRadmV#1_`Rq?%!H)E1W_d6aMp;~)us+ZaFgL2 z%EQ)fs7^&eg)t0*Mg{h^H(CawaV-Ns5!Jv3fXKv!lsoTTe|mk3#_2YZ!S8OyKx#F4 zKx>L3zbM$35#C`vzc9>dZ^1WCMZ5aWrI4UOrHagjn z5AjDEJ!-*66-q~1SgN;{eELjqPv6E5L%}XN^Q~KBSdyVjRKH95lAF#o!*}1*4JB@t zc9vU@q?MTEXh}RV&`MjAr9I#xD4!#Jy7{vi!YHW)yvAy$X>gYB_g7|O(NDuPc7JE{4!mfQZiZO6Ky6cPvb8^_#`T51wPNr|16_^e7sXg(t5-Iis9xCC=(^7qpbA+ZLL;3HS`o+a9ea@9vl(M&EVyGnWnInwxDJ zntJJ()CL!RBF;#=eJ+KPSO3`SzAlI^;?fFaf9H@=5EU0zG{B}!qtc`5p0n3}~ogY&SV7XMLM5r0$)vkV=Zjf3@D<)50jkXNgd3K;9CH12Q2egi&0 z2O`g2=WXb%bu6n1^!03Kn;0={hV$gQLM0nC>lq1NElgtLr;tBtjqmML^zh6tdzE$| zHL?JlD#KCpI9!nOmaK~xQ`bU^KhA3PtYFt=I1@Wug6wVeIm)oNQdY_i{}|D0*S_!zOWiR{4Vui<%dCs-)d190 zBmt1Kw0guIKOCOiJj<(Wo(2x~DWYd#{bQ*;&nnR@Y* zgq#;YYpBM|n!Y$sgR^Xc6sBNaur{&g3_Frmef%Nf=1X$yP77lY!B*m-T>q?jBN3E!^Is!}GbWHp^Sc|kc@_~zYEZZ0O>(hk8lH=bS>yOa2NXAWr^}Q~T-2XdDUz67qVkD{f~7L98-|7M+TteYA`{c&ZypoJ`~?zP zLgSwuR6L}tpv(8k?q*vS<|Qb-mq{fYuw*Z7Qi4hc2K1&RWUT2p%PDFbOT<1QH9>Jh z<6X+Yoiw=~{cjMc?3;4d!~H|y`)(E9kOT>A22+;4+InL{Lqozo39CM)d)1dkky3gw z#WLC}(w$#;UZUYTuX%IT?5@Xb{$TPW5g%$1D&*JcLs@(~&H%C(ohkDXk_SMIh{%{_ zdSEv~2D`_;#RRk;jwHLih=|dNG_+X~B!{0pz5mDn6!Q1x%WkG;3wnb*hzuj#{*3nu z8S9+BJ1ujj1=dD>mNeg!4lEVDR(lXS)}APG9ipjRkmUI7i|X7^`mJ&X4@IHvBHOeE z^h)J04X`+vf0E_C_Ql|3X|Zoux;2O1O=v%4j!*RBNTEQmFw@{HxdlF01pN!RNQ3Z| zA9GbFy}VnjqzCCaKJ5a&tvuC>SrZ0a^QA98=l0f!b`ZG0PL(<?=x$o!@d#aV1{nX>sr+o+5Ya`h{4J8ToeLD7j zD@3*ZsE~W;8F=81x8AXrp0Y)at=gg;Pu=v;Im3w3g>&JL)QYKrqVjQrcFnUEq9>T- zLt&zAlv>)OM~9!UO6B8t3XtDwRR1l1G8#Z&23vrMJ-Kr2P0t0*)W=ur$IhcQs_SVF zI#yg}nGbb7%ome=maOl11m)5ZC*IfXWx-?KbR-(;KDdIUA+)_buXGF~(~`WH&8^4` zUD7vx@ul~e$o8n*<5?hAV){;skUv{(PKP*l_b%X11}sD1Y7m`a=OlfZ9w8S`snDsd znE?ZZ!};=I!gvpl3~)ZnJ&YfaupO@Ll!_?8Wi*((NtF*M_J2QMy0`t z(^0kaSdND2l;;@0jih&ggm{(+##Z;O_TK&eZB=u%c{Q-7+4i1uqm+d$XQ<(h-EZZT zSzL@vJ-^b4L(DX6hz|MwPOCZA@%^p)Ax3miovuuL?mBjDulv#pl18fKq1ShJlQk_T zzayv=Y@%oETder5NJ=Ka64xk+h*V=1Z}}88RiWHG4_#wMCz17b~K| zu_4SLr^o_t{R72qLT>5cj1+jIZa%Vz?Ssn~5xM>aQ&x0RMn~{w4uRCCijTi-0>&S8^VHzhfa!0GH}p*FC9_W@+}A@xVJ*XR zi+}u%9L5jzD?hZO8R9_qItYy^gv!n>Zkf&|ud~JC2!?3&#}3y9>ly`X6^^E>x-3}$ zxLu95a{3?n^JZwUj+rc%LQGZql?SHBM$bPYa}O_qz*Oqoq=BPgAi8^P11>dAu?2!@ zOwfal;3l`z)^rrg?R2%ZqWn#@y{2QyW6um9r+|f*$w45e*596&R`n6z@}iy{2;F>3 z760l`Lq@Yt{Z(+t>GaUjuxim zW;MeC93py02CE^}X{#nV?kcV$1rjC3Im(u}MiEpS%BajI!yI$|9~Iuee?fe*fL*$c zb1Vlb+c9xyP8Fd35&Q^%yGnt{B^Zle!xRDB3jtmw4KzlM=Am!jm24Mvy6N`mkKprV z#`6EDLfX$888&kMwMXcq8rqeBAeyt4vDRIx|J{pk=$0xlxfOn|@eo4Fi(TZdDM*Zl z^NMQ+%GGxaM|5Re%~lGeqXOBLhZ!ydgy&^#B5T5Ng?Wn@fe*cMop;7Eh|4db@vM-` zzoVlPLAo4Ht|X0=JgI>$W1nL^zAz!kW_k43NM|1z$ES5WYzdFA>b6whlSzT@_~m*ks#zCSdJXUQK;>mnaR=#d4X z9zI;XI~K2JgrMapn-mn0Xb?4K$I$)WL#odk`TF zEL}BEb9SBL#Y+BcY$?FqFt!MgniD#wvsWPfA>5$OgZA%ATc~4)DoppS$qifV1z&?3 zH}a~lcJ#gxQ#Ir6TVD2s=15MwykxSqGUM8(vP9?~?H}K^+Xhi+V8pf#7?!AaG)QpjYqG|ja{)NIzO-n(MUsoJk2Q##@YPYd7^#A@t{Wozo5#PSOLplbZAFfv_2Xz=sq$}iiF!)=t=Y1}k|{+k$75QM zRq{){V%o52dnV+VvX*TMp4;c$r?@q~OMafnD|P!{gW@o@Azjp*m2)_&mxA;`_?e0V znqY@2VBS`keBC?;g!KzyN6y>J%=HY%Ulx+n;S7V}{ush~X%ZrZYfySj#l#q`kutG< zIdc&RL?txKtt~6Z%-4RHI=WN+p@{f+{1iX9yZCGJ+r(qr`Bsd_Hy`}1tnUUS2Hjt& zIvjI9-+U23GDCNyuXgnb+*n5Hei*3DmmD(hAzr#zSN9+mn3HpenTyy{sqVCNjE_c? z`s4gMl*ds5&$=0ra@3TThQu&2N^ArsKatvv=UaK|qi7x*0jwAPGzjc5AaR&aNbzTA zw}kyir3cu^qK1th&J}Y8zB8`02}m~ojjZnAlk{3ncv%9hh{{}cI~nzll$1+X^4iap zo2p*tDah-scu+aBe{=FayD%@i_FITUreWc|X$2EAu?!e@&7uOLX8l3(<2l)i-3sALs#yIxqY>>{x$^?fyU1l;+)b}Bqa~CvZAjJ_}z`@ za;kq{7WK9{MqDBTH0bX5mK-dLbs+u|n=S*-yjWX>l!?2S>*~GB@_tz&RHOfN=trWI z)lCdZ!@4r2Qrt}R%w|{GxZsJQ**E5E%&v{Pb%$OH=j|LTRpd_M{1%*loC5K}+it~l z?Ue|ZdNL-j$=_A(T#`w-*%Hf_zNxaDYkrw&yO3cs@#01n0mu{9*|Zo#1J2CHoJp*a z5XbKuHg-n^TpYz;Q1ji_V-dB4Pg&(pXx5T(>~`ML^o`F5d@~s&KdbY6xX8j^%Tu3d z>Zl69{*CisscIz_BfT&;Dw6VDy}yN+$J;P}0tF=Bu={~xKi>n;8Z2)0G=NfJpsLH6 zT)s3AA6BiA-sH8fJygD~FcS91VC)%I^v!O;@4nLUqJ#nyfAcr3s79sbt0$Hc-l}y! z(38p`IVVLA2yZbC95n@E{kP2dQ**Kl1`BK+2ze~(7h`lb5goi&FGd!rVIjcQPY=)4 zaZERPwFsK=g8TvBei`SH0_`7oIr$M<-;qRaKeO>G(hS6BvE3umnLepgI?BrAj0$j0 zJ@e_X!>#Y|5x~(rmx+npgMipaiRf-mv1uR|;4ANvEqY`)tkqfCI7eC}9F}RhLHI@e zI##jo`uOkb#0_nF`ibFt0cZJrE1@5%7&)0hK`*YGRS9yvSz^p>SypUZA=30*6tH3G z-unLGdhfdj{;{kwRs6tF$W{_-(nTQBN<;1+iklWzReOz@U@@ZRId}0Ke(&O9QP(^K z69?~SGaFrzei?Y)rADYL(rMw1e)GP z#ajxKqiPjyS+|eVGsbs_1%#*YS zV`X}_exsSDmQCr^X?w+=xvr8_uEk&h^T=oQ0d7;;2OfqmC%ME;%DCqwH0OaR5{Mvw0BwX z--^+EN%tmA=EMtW5nT8eL5{10mXBBs;wbn=+vF1BCe-mU8NWn(U7IM~O4y4TBkT9t zbB!*F@qUDvL;UbYObpDu`B!iM%@tQ>bf3=Dt;bCBwM=+9P5P)sQy^z1&y_{CH;5aL zI|cv+Nm9d`4-sV0vwK7UeY|{Y&>IyPo_DR^nhL*=YOr))5X~R_=y-p5De|JL820Y~AHTN>lW{imip-ziJ1# z)c(K?e~(cF$R_of{$O1I58BNvHd} zlK^1Hp?O^Tk;XM^$KHcXidf5da!R5ty!2e8l885*57HeD57i1^??KpND z&%uHw3*)*}E4~P&HhCA6X@jV0?CouIQGax=j{AJp^|*4S^-^Uk9yUw;X=ypU2VVp0 zF_Mb}m0K@YkxFc2<1K3-s3#E5ymlAUnPDqKx%idEwK?#o*9{-J)h%clbDTzy_Czx` z(*Y7wgxJBsnbu8cw5c2F*ZG1gYLG@a8N^4{Dx`3b_I75Rma-7^FzAT-)!a*yGA)Wh z1fU{wjiYz$&0|!5SVlH7&*(l4Ul6DPu$wn*aCYvhhIvXQfj$loSF;cvQsq;X-*86f zH~9;VHMxv;XgDOF6+FCt`NM}H8Y-SIE7M&8(~B5K49oD|GAzOmcyREJgfi zFjZ*F?Ly%BK(g%Sy-hL2x85$`ezMgGzdHfHP1ezFCMite%l~B!dc3^&J+>!^yjVAy zAk=w*5ZMHuGMCRS%$^UQmq}vrZ~cjr`3K@wU-aIl=Dal8{X1UrU?Mht^=i?e<(J2z z4V@qq4SwtGBweU@18iNXYgzVP*GSe+!*B<7lW>Pf`*B8-yLcKg8yg|kK?zJ?If=G+ zL7E&znAceXcRbYG<`|4d%EW>1zCxet4M(5c4>Nb!mXQW=!Ek+Bw~$EXLM=WVFVEBdG)Ouk<2*9y}k6>5~t37xa!Evuy( z@=)&0_=(wM?yFVS16>Eued8#P$zTX^*qr>Bq(KnQBJ60G0P_=(&Q^v_IR7+Eh>#_WX&#l@ z{Q)!ZfGV7e*aGc&>+(n zM{((SwW&Mgb;eceQ1vtV_qj}U!bl!(BrnH;?BqAPPPf-phkW`siFGK$N!Q8m#XGEn zCY!^R0Ex3=dU?2G_@hQGkDMZP9Az79i(qW=eoc&uI{jG)uK;GybjYk{|d83 zJv=Q=LzHcS*lMcCPI&b6dh(RVxlE5m%@q#<&F}V`K z_bQ@rdC~qvP)osF2m=Wrw#1?QIs_V-RzweEk#0m1jy4h4H=CWr7bS){s?36f z*6d+{huzL9bUhG0EcAzyYISF4x&VXi-GX@RYTBI+L$p&=Y6<%5v|6f@YK^h3m@qsE z>em4W5x4J9#Ih{N%J@VYa$L_Mv!W06#Yp)wH_Lxiy_Uxy`H920zuPc&eAWP)BhLeX z14P@(adC2(W3nKnVGu1;i7RmZdLm%}l(g?)_QZ~s>M^+Bh6cNTB{g}O@TN&7Y@L*< zLGOdM)9J-&=P)NG9s)-^GLKs)dZX{P)_duj6MMdKS}!~qkZLX*>L#|_ITM0UsDeMV zaJwvfvD!{jTnO{;`qv+mSW<3%2m*4&!YL#*8`7FCfCnE(b&&^oo4c9>Dg|&&!yTz2kC*cw`B%Pie`L0|6aw~DzVw9pF1Gq(t z{}k3`wtrM-M&KD}!A7Ov{Eb?BJGa}?UkY>}3chy3;`tsrj4=bgDs#fd-PW23u2UuU z##sAY#ieD@Q0FvDMfy7E2&$tRE@obI(-z|Tz{LDASK=}pOA=F*CJ*u*GDK;M#9yILs?6Rc#y;x{Dv+u zu)9eo9y6OryHQs15a*tLalfY3;EMg3SL(6J+zdHIpC!ODrZ{cA+5TK zF73$Br|zo3^T1EE^+Jwu<_bK;rXYxAMOXClf+TIkb-XXf$D_!F+2a4GaubHYf+-6D z;-%e%ON#!kusuNd_Y-2BzZz!0w#|ON;oh`tMK${*|?s82j1JX>0>YTQn@>MA~{$-_Uw z%}D}bvoFRKIK52v^jKd%y>XhY6#Z)!d$+HW3%JTNFGd%{&okTK40DpFe>&SDxVNTl zj6Spoeb?f8{4Z3etDe8#%Uwp+DQ+j&BIjse_L73hljD)u!cyZb4GDNx9#LQBeXvpI z-gTHI`3zsuCJS>Te<*fC+=e8$^l-G*msq<7s#1(S>MW*|j5lxF+HW!z{Z>}ZEi3H} z4F!E2zfpu_=J6SG`f^=A_Lnc07vL{dV+ikFE?s>9vP~H&u;fH`E7U+3dzm!LLk^-iMYwbcf3atr7dd$CvIp!-B5>$Qlk*G_D0HWIkk zvJFlB=s6Sp<*d2$uVGs|Zy!TE9=1$P-^co0{RP+knky@4!uRUdw6>+mBeiE6nI~}s z@J`v8Bt?(}Tvl*Cia$~M<1!#>^->@^b2bn9*`V86zud#1Cw>6_!P3Ek0fl7kZ;DPe zYA@wq%Qv+MT-@|M(KP~JI%e<^^ynt5JeVF|T%(mPXin_QX z(V$@9JfmG1gmRs#x5x}g^b<}sE^eH}7}dG6PRkBTnqaR;)%X*KqsVk%8fSIioR*`Y zhmy_$G6PkOJeS$B4cz~UX=7ems4*H#f~c=V#h3IH>9)D2q$H@!D>-$wAQFC(EUY`M z<@yS;r#kVZ28y;%EEFcip;#*Zw%}tC05f!y&{O2PmmDu}cV&0@?}6-4lI|UepZ&=_ zk9$8?G*6zxUun|CzxPGTny7z!a@7;oaOLgsgI>Ss592%&f0nI``JcW@y7$yPo+>u> za>aF(7gSeJY~SN}-d6Y}%e5r^{QG$6&ej$<6=d)BPNctZBB&g~&0z@id;eM~iBkpa zdf8l!L8+lzo@>CL0?=*Kx?Z71>4*CWd=;EKc`%AhLlU}w{e>KGRVP#R-V=NE<5BOU zQ2J0YQOTAi;0T-akAh&Zmsn$9mef4@MK)X$voR&g6Fym+G2Yd@V5+<-zxU?tB}cTV zzvt1tWewvW&RU@;9;?64R&G&9c^6e3gCXpwjx@Es4C4c``=k+OH?8ut97b0pq>dB+ zk7{4O%l_1UlL2KUe;`7r_(<$I!y|Th^WE)bNx}(!1b`_UIc!97PQ*8^PquMWp4TT2 zzaXxm3TLg|f!qwXV3R}jrQ&={U2992uIJa<1D8u}vLqdB;`;?wvK>AVmjt@!mdi`# zEd(^**UD?5&3NS;()wA*l1sGzFx?E<51TUkrj2+Q?}^fvkxzHHJj z2rB=c!5%e@7(XsG;D#4q zgQo2C@1#2&3`>kgx_o|B5R=P$+%`-bgWBF4E2B1)W_ASAhfkSiyLR`xXJ;1|our3; za%Lu;6g!@Oj4V0Ndf#i-`NL@Uyh1oa%OuCf?_Gu>`-`sEg{^=3f8f~~b&{omsXOTr zSfE@}E1Yo~myT5!j^*X@&#Tr}IB~2RD+kF@tm?+4;P+-?3X-vSSXHOA!p5lN#Xvz@ z+*N>BrTg|js{6nmVM1=+nastMs+sOLD}9k}FF*YdDQ!+#pp3P_1})`9Dw*`UT+bJ* z&3h6l{ARQu^}g*@%%jp@j^MsM9*XlQMWb})?*i8(oNJ*z3bIua-sG~we&(((;BFZV zKwQhVR43{g|KPqX+DfF%XrZ~g+nmIM*&c5>jZ{2M8YF(u@3x~rR|EU`?T6O}=mg!h>(4j}gxE^c_4W;=cCL9z!)lj(X71qYP>AoFncyyP^gfn1y3#-H zTmcLXrj@Y$L_hJ)H51YnPoJJVB4%#tE2j{CLr?S-=szmp2Px=cAdk*pCKk>CK&h9l zF%LsJ7eq&RLRq_U!XNy6+^0Fpzt%L3`|w3BJgZ!fR(GAgUDTy4cDHVPNXWc0Ov4FG z1~)BsGf>0swUAqj$SKd-Ciq9tmr4yt65SSU%%g8?v%b%2k5RM;p$byjew}H& zcnKH?kNTm&8>4MAx4ztesz-^FT54H~L_`y4d|3?C^EhdSWstng4+e))3ph&U5=86P z#v>{bL3WF#hmyTs?oix_e*yX%L5K_m-Q4UYSjPKcun2(Z)u!AsMG;kJEVZ_s zb3cukKaP|7;lIeaX|vXlUiGsnpb>>rJU^K4=B^w;pf$QmT9m&+Ejy>GDV$lR3tyZ3SJxu|v z6}UNCVx>^y#A_zRqgM}G8u(lFhWtfGu>{wVuT{QfMt3)dZknSk?iSd{6@>!zsp?yA zO7$GY_Rb-cRKb%VbQ2?C(K%IVO;|UCY8f)5GZv{`$L1ETm0)u7?s&Q{6Vsutw22r{!62VcYEv1kiuR!^$Gxb=226$ zMocZLNSKJ>4?ta~Mx0#ucGU}%<5viFRgFwn;8t?IsUryIN2h}^0t(8Jp|iZ^9;j@_r_Yg6b^b4iGIU&%Yh@%)_!8gNv>>n>LIr%_)5`wA=>sjEXgJzg} zoa`2)?Red581)aC4T5=g3mHOy1ew0@m)@*y3K?tRM`Eih#@RTv=MWfs4a z;xXg+eH!9qpr+eBl9pl_@4RS=mv7%b&a>#9E;pjqm+Zk;gQjXMQp!J+JW(hx87!Q1 zt@jWS72QRjzNY=|C3H}sfAT_c~RxHlwgSt6spev8j=R(kE*=l!pw}lt6EJS)^W1oW84`mzns$A5LE2hnw*Oijw z(P`m#WO@q3t^R^JLASTkRT*Oa^Vm21TycAG+buM&hOez+C~fi?794bN_B{Q@`Y5y7 zDNAGVWUKiZEydP+%)bHdXpiVKa2%MUjRnT~5!+6zQP(|>QI1zs8lfnnY&L8bqZLDa zjIDU^JLq#x>}fzr>0Ee(Mv!Dcw=lLa z@hVK4&+7tFjUZe(_Ywoaw?T3+p0RML&>v95&!)+!u6gP8r)0=d$t({%1OIe{<-nN4 z(^>_>lsu%!t9#dd3SuEO=~5Qq(?`?kO^H3acCdz&BV?=aQ#XqjJAt5)LgCv~ixSFL zv){pOF6u?&?3i5q%a{0^9NY_B;C&DOFkuQ4>y@}(LuK$4kOVgRamvqydyfK{KD2envR$H~N+SF3 zfDK^c@xZrPM)q8jt7yASjDAI)XQh}nL7f~v^yf14)BNkJ_+t70(( z@r9xVP3&CPnM94lwCHo@`rJ@Jm^6D%ZC5YzP~bLwr< zhyC@gGFxD72OS{;6q(lgq&o(&z)4jDRGLN2L&7yo-;dpEq{X*PL08Z-&}*)12{$hD zt+Ay!Sy%Ca?6J_9Mc)-xDsQcbdaoB;1qxqYm`Zl3!u`70;jHX&J$Mr1(S%c6nOMhx zOsK`Xx8{=W1W?D0` zf@TOQzT@|%=7dQrh|Z*_HnJ(*oS)t7SG9yh+K)KY*vHTQDPfr_FYlL~x{X(`X+1#TBP5Bn2Rm$94}nwjrGu8^}4@>FigV^YL+d3HsR5=-)!` zHcJBOV=phJy?bxw-Lfu`0qCR{0Fi1>M$u-j__X3Ypwxyb^GJ|D5f6)sdN9649p~9B zYvX-m|B7;to)t8xv8cVdq|sPOAD*t8C7Bg&Lig%WYyIkN243Zt`+hwhWa0A!4X+$a z9e_8h1CSaP?vAYz2ivn1(D{C#f!S(M7HL|JPd+1ZEG+?QECW8O$b z*K2qRE}u;jtFA`ku>JwtzqSs(xz=JbvTy6s$z$L6#hz0O47`K2-}`AiP}W}rF=gbk z6Wi04O<;|x%Q6@$HQZ@4`)5l@cZ>gB{iR3Fs^2()Sv$OH(gfU=J+Eb_RJUS`+Qs#s zDu;sN$S<)MOgYw?$&18<4V_oq)JM4`k;5dG_0^sCeg~E#0sy*fp)G)HEx^m+K6*`! zI{aTypx2V@$SvnoGUfETSo`(x}NmpuXmHP(@7roT8`GJ%S7TNl<@*7P5rc5^? z{(z1(quZW^E+irm@AKiZ^y8K5(v)Q$2P(&u<-9xp+INg-$azM%A`CsXRjsk`(wD}n zhH#c%6}uCa^~Qg|tYf&?hX1qazCr#txH%v6o$CQU#*tzW3zRm7mqKRIUzl27S`G(&xip({us_ za@{2Ae;{xSm|4T24^kPGslZFyqK~iSA%AGQH#-k(rR-JM|Hbu2$v}qbIzl{{>}^`p zej(KgQ{4N7kY)~HY`pQBy~{fuU=paj)XnGnmTKB=b)Z+_%z};E)HFv9)<9&&fw6ri zKl<6GgNY%V#Ix)4Fli0y>{qqha8^0v0=@8gmGL$Eaa@T_e%6*Za`&t)YQ}-YZZ9I- zL3qmq5wR0Tq9k6V(RAy@MQo4P;s*9cdL|ATILMJe;BPk$;uYw-Ok4I)`bIH&ygc1w z-WiYnzEkKN9S6nfm~`8jTz5|U@{XfPCIMW_+g16#?kI4P@gLh#Yse_-4{fNUVUulf zZODMz&RTsnYshO|^lYiJ45Jg%$q5hn`*26ZG#Vu=Cl}fvJ>3J~8%2xZ|iT~PK(_}HaZeRt<+aX$5MHw}uh_AohCsjU(xy z&ELZpad%h*tFIy9B*BzqBjyVP_=cj)jZOH2hMI9{7P}|2IupB&9uQi`Yugq@756;T zEFg5m>jwQ}KlMHpd7R$>u~i-!F&JyBTeNigcGC6=Xs6)DM&{{bX}ODgOqLsyULLh00_Yp8d~ECQ`4=n$ zukLqU>Y@3yeM=UM-P;jC`HTVWo=+0!I%*QcOk zahvvJnZJjTj#XLS*7kxp+rinty*U58PEJy=G|gGt-t2aTU!7rV3>*93>+}dZ4K!r< z{VuRfhO5WIRi~WCydZm=Tc=PD30-gDFBLKvecd>@f5e-1zD}KvVor# z;(Q8fbSZlwftW;78pv=!rn^+dk^9lXhR4PlTw~zO&^2>wlLMYWBy{%g?yP#r>36vJ zc@>wTgRWnDkKPRbRV|h-nelwtP2|)KI2_?~w=g05fUBmY!!4XC^5|M<+_My=08)aFAM^Urmk_H8p{aFOLd)d6AbT|# z^y90~;*-lmdGjeWd|zQydmqW%kING>J$y8v{Kzxa% zF+tqSz!Y3FI8#_!BkW8r+8=@HrTYBlgj6RAEM@$~UzbjQExNgzkFwEoGw5-@J>Kl7=G~tuqGw$~S&Ixe{h5omMCtC3#0cefjFNPCf-feyi_AS`WW* z^D%AZMyH0nppTK<);q~O;oB(*^Oq{|aW>~a6q+?|&CR==g5p3W3bL)3j&c7K0F7p2 zB~s^hZ8S;HuujvO!`ES`eu29o(^nNa6W4rZM z$3*^y z&ET)#Wio6WB9dhFWbCt0mNP{;eN1{BdC8&oWRb#pUaU~=K`{F8FUJU2AH&p7DgN;+ z%+%-9|2)#nl>f}BjDd9}w5!5{Lj3X&As zXo(AX`Bqwi<g<^`BLWT02VhnpVR0gXC?V2Nqg!^&;VjqLwoAbOCAeEsZ2=%-5@a~ z9@#chZ-nQMZBL3Okwm#v@z^Rm?+*Fk}qdBDO}fk8(~v=yTnBOQ)=NdYad7!zp0XK zaPv!iXfY4^?V;mMw%Ag|l@dJ#K5>614or}HrwPi?H2dC35nH!zWo4W$|%*|ViOA{%;Wu5dqEazQQkvM=#+xoR-Au;LfFpcdQne=qoJJ!aj6 z0s3L2)mmo%Y3Dxfl`y7#T*hk`z4HY3NU*L2lS$3Fta#A-vE6ex94-rJv+_QS=$5$U zDiWV^boEGCh~n#}5mn2v272^7cw5io`&#$&wudY1HJ#)3_Yytx^bPI80+!Q4~Lkb%fX0JkQ}3Tj_m= zckx(uOU5WHepURlc0r73iC#uchFW3%szs5)x_Df&Y}~t4bZqdK<=Wqsmo#Z(x?g`Y zL`s3_MaRmGC+!E#-x;F}->oKSz)jpo6J}i|G7B@~SuEu@rb@osb>=#?MmOjq&~4E8 zVWo-aOX&+g|NS(1R+6-yF5#T1!S52rntOZm!T{S-E>!a?yf9K(h_=EqVc?TCT({;N z-Np#q_kfG6X~?6|UnY@9m8gMDq;}JrS~ml;KzqR{*zt`(k2SWgHjYO0q> zItk|QX4(X$L9vnF4bGlVeT4VqxQS|)Ta6Xji2IkBrK$QQh#D%bLb$yD&0C!f-eqRD z`=cQ$q*Ov(>O-wEq|9Wft?8UJTJO?MmGf6l<>#>Aa-C6q@JTPwCH0mg2z)tWT zsD|E@zZK;%zLIHEH8-vT8e%nGC@ZHab@b8qtwQVb+21L}Iq&E`3$cF`quvnHtNnz0 ze<_U0G?M!PMfL+yTcW>b$=5nS2w(leZ0m^xz{k@rjSUF!D|pb+I-aPkV4q;WUj581M7K7psX1mlPpR{R(?;EN7+(E98rt%^# zy}hr@m28$i_gHYbVx+;iNA6jl;CTL%UvgV{pWl4lLw?>M`%V`*rFkHC%m{mEe4;k5wVhT1HqXmkc*pBZ=n0$hDzNca%w-Z`q>$%hk4+iA_CFjnEI z?znUo#BL6ucf?wHK{Fj*_lMcpbVz%ask(;nYtvhteyv#4SI?vZL9>sDJvL1Odyn=9vNxT6de4GBk zIgsppdq-q1&mvGKKJbZ}@54(oz>?+$RkGGW2gW z@>ET*Bx6M&{g%aiX?e-w4b+Wsn6T;TYr-z&&^Kg!?6EYD@cI%)1m5(I)=@!z*U~|c z@R_yd_?%(*V|fY;oN{rT{3qj1>3>U#h~2&e4k}GJiL#HUt+!HvV~Xy#f%tn?D^kP1 z1wf>qnCbHM#`m{;>V3}0dRh#=X+DS_z*J8gI!z;IvNM>NLXk@1t4=hKTC<^v++uF8 z%xL@rrbLW$XMBVCq80OTBpt=);puUAO}YpqfTTCFGoawuG$D;G<_6mvi+1X7XFJVb zcz3E#am36OXTRW6oH-NtOd}tk_(Zkv){FyLxB7_5#P^qsuQbWyhXwkNKza0PQ|z%K z^hPAfDSdoAq={Vw#s6)x{Mac@a~=_pqLlpnnjqz#+_x>E)nWGBcnY^Mj$+^c5OiFa z(q6&8z1haSngtaGaoe$#4st@S7N=fjUef2=ZqRN-a8jzgokVx*5ghxamX+QbP~1+C zw~9YT-@+kXK!JDI0A1wtYK~*}?%^*@k1bvZneGVJKr}M=4O`E2j(eX&+r#|V?}>uN z;#u)^Quu0Y&R{QXmtwYSIp;(=0zwC=!pjYHSls3yS*dX3ZEg)vS>+{ka{Bj7Tmuv5{1q8IM$WF_QD>OPLJgjGg>$HWuSN&0ZFsD^sjf3oGsk$jsoh2cO zR_x&%pNW~7?efKPt=x+cFA8bDJw~Rk13#yaZw8#=ohx$&oXwu51rq2*P6R(wrUNTaQI$)!?f!;!BAY zEscx#vmx3q42v4e|08gLQe}OzBc+2d(zQMkvEQ`o6uSQ_e_*aK`RP6Gl2|4?9)ZHq z(FZEpVi~*t`TVGRg^$9X^4rkC2F<3rj5cI~*sEc~LsyfL=X>Wlox!r#Z)Tfs4Rn9) zCSL7oMiQ5_%>-5F5;Ktuyxa8UAHzlshmJ07SUa{}WQV^TgZP!LIQeB{zFe^{OyMn@ zju&Pgq#*n6+nN}2>>)Gbji%&=woIZF1NhuRHi9l;NJS!~I6AiSdQs7EMcn? zX?NcYPKOP`;@{#6c+%C-FB=R)I$w`wr%Q8|d|c;;`a3R7UEttR`5bdWEV$Nz1#{=6 zc=O1Sr3o!Ab@pEMp|XmMF*gAU>Tx-p?Qb{jPs8398tWy^Cq1}uLVcORjJI=O(_gDHOd8NV3q>ClRvdO_^wnnXomLp5Ce171miJ`Nu*B_ z)jjH#1+c?3!ugrLU)!wU-y;J9e!-vflJmG%2Sj~q{>k6cl|MYLYxRaN24biS2>#YZ zPxlm%*Vd7DSN~y?ORcg{EUvIHEzkdXp8ye*^764x2B{QL_qzr1VP4&UARXde|6yih|8#CfQ!+l&c=5Eo(T;wM z!jB30DeVy%v$6t>X(A#H2zY;v;)q#Gw z2d{n|)w-TrEH7?##_823y^9T0P+HSzRrL{Gdfp!DSe()why;k&1dqbEAZ;l#JZjXf1*x;SCK3wX~*>`v;=Gd3Qqz3016*E~H(z4D;$Evd!T-bFY zj^&}4^(b&X-Jz!4f3V`AJF1!Hr29fK71l6UUZ;*WhWdYK%{H#>z3`k3d9e>{`JT@;3&%^{akS%gFu>P?#DSyd&t9X)xiQ`* zcTZSBNdrITf9{ljwN6BX&lu)6@1Ut*Vp=g`F(C&@<_g!o2qlK55!5A~RziG+sPS<-F2$)uRR% zp6RX@UTqpRZlFL-v44R7A+$C~4@dU}?39#{EtF%2K3ER6L$&CLS^v4XJVTcEDKfMe zrI+f*fv+r6%}1J6l(&g#)o={p{N9KESNdCkl+7zgl8$rhG%yAa&5CM4iuYP71noYl zNJp~l2Haj|{(Qu$xAv-T$_>w7FhKEizo1EHI4RoqWmAAR=&830A8BNJlKtvj)ZodZ z@d^t8GW2GKv;>qP`Qj)=A~Ux%sQ+4OA4D8NrHa;}4$|($M%3eUBD(DC?S$k0o{+Ep zajDt!>eHVHT&ILwg}=1&_X=~uq3G+KrEP6uU)GMr)(*{5;rgL!MAzP@rEo&(!vI^t962rHxmmtIqEj;Rc2L$qKx9guCdi2wCVQ zl~>HJXrHQ+cb@-MqicauoP6AozW^;EXfup?XJ7C_{Y9cWc##6Q@5o?LW;qvLccU|| zKEr^XZbJ+WXo`V~7Y!;$4Y0~Lb*U<8_6pd0Jl@v|i$a7F&l$SYPK#_^z@kkr0AwkA4W%~-n zqNLkp9yGP$@+=Ze2rGoU zFu5(g4q;te3KD3+hps=_28N1yR%-aX!$+aDaEK)KkL`Pe7k?6wW`N+`QV63%7T)K zS)1P`&bVE9w`S@M+kdCIme+4OHdVQIr8Y?IKIF!zOlJItEmZoeO7h#!e5mLzhHM1) z`QrH^bO{J35CizQ7^GpjajlK|hnLj6_Tu|WC1_szv^rkBwC2p#>Yv31R0U1BGKE|- zj`*dOdr_qt-Sl=F^Y>MX_UgGtN=|~(gG9(Khy3ByViN@qR*5Tsx@V? zW@)-Ny1+5G&3hNz>wGP#WwW`xq9>IFI${!k`Lk1(Col#}7oSjE!7RlvUcIz!r@L!dQ!_o^)!ZREGxIm1#<3eEW_#G~ov= z{!Ar)PDksj|4)j_lBlh;QqZtw%0ZTHjxHD zn1Y7~Cka<5O;bB;$RUZ#(a#+`o};5#h{UWtu66b_6d&IhzaW0lXU*kD_`BkPX8S+2 z)kv9PPlbT3Yr4K13aO2S0b}D733z1weIChb8dYphTEDiAoZ)Bf0Ix$&FeLctqrUZ6 zogFzItZ+=LtC6mecXepU2mc>?iMyr2^BO5X8@4brur4;}+hrffpY!#x&JINz$%=fd zZ_47miz57p-U#s6g7q$z5R(9eag1imq52mUEg9~^;1grXZ_BShFyUtE_wVBg#QG5u$hkb6Pi^b-ur3k<&UY&@=M_ws3gb zA^rZ~^u*ooW-A-_ZQkmQ{!n7RLjr?=U?8(x15MV1=@C;gis<#k+&=$VqDbE?a#M_1 zUPNr5>RZRSNy#l3-tpbgOk<64bD@D@AdG8DR-0kyP*%6Ss4f)m-hg@pdjhD5`Q*NDbVrcK%Y8CRLIIO-KfdK`d0zxdnl29?%4%w z-8D&&BK}^DIi3O)gRy{92066iBe44nH{6x}k|XHf+c=jrlR=$^ue9^2hprV1Q31mv zrs=P2Z|7keO9tCAe4~SxrD2a&<11hPV1Ir*Lh$5ss?C4coi{eT=o|8Y-@i9mg-T)E z7vRbGnn?%cnnib47blSjd=PYAvzzA zug(PNZ2r5We_=zrALUDoMWwwYP>@j21)!fQI_$~A8_E424CZnUgB2jplJBhb>}C}OHP2!=vQ@u3-9DuVZU$X)iK*pbO{v`knuj5Ou08X zO8@nKk{s^t3+HKrGRYgYV-)l?#r0){$1cD)F3j zW1RZcVTm_W2t{KAJYY|b-)gxwDU*S|y;)9LBVB@jzuk(5mpddQ;BWIe_-E&)338n} z$P}N9SYNjIxifHL&1jX-MPxjKaP0zrp!KyFDfezu-%#Z;*8Q^ijPjufvgUIOJ%oDa`_iY|OMbz##L~Ayen>}=434z{t z&V>NM9)>O(^hv~3F}}4g02FhchV5ykNn29PtN7Ds%^;9HsMDFq@Uc0O;Gv(Nv2muD z3#)y@ravASF((c0wtcg6KQA>G^Wno(uZ|)#Qo3gA9Owd1f_qNt2H$_Dw=5vTrdKX{ z&Xg-<@|A1Hv(r4$HU|3W)FtMc3~@;@-g#W3^nkuDw4gY{Sx?)7Gk?3YV})!w)36tA zaq!hODsXy`z7>Wszl@RBL@W<`xJe+FJ~mn|1y^QI(e6v@v1i*klT0AwR^NDH>mh7r zdcAXPe&@jG3=#sGS9}q~2Y&|OP(e@LY!;AP!ZJ=Q6ZifGf+_L>#*QvJX3d?YynxeH zaHNcODK#w+KY8%(eGE$X_TRNtkmPOp4JS6RFW>~IuERnNaX?&H!I$D0UT(u%k*_DA zMsUY~aK0P?YkfC!;@t`5_cjof_bjV}Cw=EmwUs{@jLXxIUSVa-p!H!lx18fIS>bIP zF&EV_zS{Fnx$J5km?}3RjzQ`?CGjjlkUZJmZvLcE*xLNn7csc_Tpy$*?tRE|r= z#Cm@+4S^TNj-g`#xPJ>H+XG^vO1*z<&{ib;aB@fADa6W$b(QHNhYW>e4PcOj6@mH+ zpiHr^gp`67t;!kd7QTyD{g0rk$$>`#bQJq5K5xFju;?&yV(o?;}8xw5UeO8rz)C|98)2tdU6r_Hw5;9{#+mW81 zFAj>iV`B`zO5EaW-1p0=eeW`g*e>d%`Ox{wc%;AXFHOhvR-8bQ3jIOqXPNVZn%Y$`4MUIPKaV`&eD;RSKqdv!l~PZ*GGR(X&(>S?KLY#q&&}3?#d&y^1Z*pAH;x3TPiWFb$GOLBz7>21eTU0d5F=cUe z&;G53N=7W}cc`Ih58jJ*3f1hkQ~vjLwT5Q8VSTUk7V7QgL&7R~Pg}xt?S~hS0aS;3%|JuXy}Mu8 ze#33T%`9{So{k;L%@Hky4i)N{6B2x+X2tRErkAUbJ5YB=*VHi?=O;%A&WJu>BqU-6 z{i(qsO&WVjcS6_r<|P_-97g{PI#fJ5mqo zfj`rmCI8-%EGXbD$Ve_XxFq&ka4jP{&dMoNvw%-WfL-oxIsOOUJfBqjD#7u?uFfMR zZ;@1_hESp~g+_^pIK0{ULrr0Gq#?fZhh|Us$9%&o3FLiW{J;nP6EZ>fGec`;%9I z@InYw+2bRCRWStLh%LURFrNyUL9a97t0r~l1^!B44?{#XVJ>TC5)4O3RPft| zhfQYn>HcKz)4>mdWNt(66!E>NI}kPs1!6XZ>GXFgM10WYSG8Ijy+eo5tGt=ZP#xrN6yr%%}3`0 zu5Lh>g7|fUATWkJa8S~wp)RsnO-&tTdRyp! z{aiT>P<3M_eqw74iiA|UeJyO8WdVHi6x>Xms;u}0_qAit?JIHC-PE>@Qo;VtLlK2 z70{;i8CZvctkA2*{otl^7w(~T?3W*B3?+~nx4+8=d*sNMD7FlljN>iPH|O}O2b()L zkC3MC6lqJrN6Z~fx4D%ILsb*`Tu(1tgPQi$dCO8e;~I9RuUQsN=(b=#Rk$egA24Y% z<0@4mG=hHn@t>}Fm|J9VPShS2Wc`c6K6{4`$mR}nJ&#+o8NSFK&j&0HF~wb0+6v0g zBS`~wUx~^u#$?5QCrG7#xO-i48x{1R7(X#+fmQ5+gC%$Z)uNq7P24YVpqYN|QU&Zr3|pbp*S zw|V9t@F~i(_0q2+UiN|ZuYV~PYRMKWYmm##!&F2~Tyt5{b@FZY9TENn9TjtKLk$}n zVkMXr+`-aC+}!)`4=VvSvKj3HR+|ozsBr2?Sy@$V#hlPg2Kx9&R`YyCUHmA0O)^w( zQ|aEqM3=nbWofKfgZ1$+v!~0b`g>qd8CQ9}!l`URdfl$18(XN?KI)Ow`Edo|Hr`g` zEmq@d7S^wyD4Pfpue>dnrE%0wBuV>jn(bK}V?8fs#Ch~z8oRc>h6#iVrt{_Q{@oP( z2?(7z1gCbC1kv^gI>M=g-gsfg6r^mLr{vcOAU0&pClNgaNjkG`2%-1JiG$Z*t679O ztAv7`k&nQsTuVXt9bL#2oLo@`7IzWeg10Dw4cg$R%7Qf8a5~}MCoEeo6>rbHMIn)$soTCpYtX5V@J@1xz9#BRCW zQngwFT{X^t`-UkL3a?mXQ(%g7e|@CaS*&K$Es2QAn+J6Wjd@K*oVKgq z?4;{nQ8nsuyR}V^auxVT2mEq(3;?&DLS6#9fax8wiRxj&t><6>j(V6@4^Ak(v?QPo zDNK(~LUq&xSk)H$kk2??WY@OB%OI^(Z$qJhG+xbdd^f>px8Ik@d`X<}5d)5O%;uNC z0!FAM2!dtDfFhd%gUwyQrmas&M*e=w zL7<(AHU{pgr@LakmqF*%ph8mAHDe(kANzzr;1xZ=hbEVe&^77*T7l)m)Xuc9wbisJ zmS@(*6q6`!lt683L`nD{V#8QEgrhtZW%LuQ~2sZm2j5a0wE-cdI>0lM3ab8?MQOna-K~iSwplkA3l4IZ_PD(9>FtH zIqo-J4W_(#0B}0C@k8i1;jk;NVuT}|;uHMqs*p+WGkFmD@wvKIPXx{z--!OW-Xw`& znOywR)?)Px4FuMN$)c1KPxOHTGt)UivIdQH$PLMDqP#G+0IeEIz8?9vJ8)At;^x6^ z4imn>X71(x+MY_Ot@(a`c`#mRi1!;DUGS|z2 zi6t)%Rw(Lh)rJGUoxX&jQ5zK2Z(oJYFkj#2FBaJZwu7P(vOWh@hM1W&ckBg8)o!{v zs;Yc+`-so5Qg(W7Hg_e*%^*_%yByh2H3$7QIMJ-}HJ%M8VIO@V|6Mn#ao0t4aTxD0 zFVd6Iskt$^xVf=_gcAiBx8t1G|L=ci&`*wrBBYSkq}bu46QD8{);T0*+0R+lS@!4D z6mk*582dw2j61DC$Ah_ufq(>gd-!@a_en8n^J|7n7M-)nN2L;Gi7LNLnEYrNq=&)o zBAeW)3#|dM)TY@VKBnl21LgT}FODMi&kuFk<5em5+4ZSeKYK!V8|5czq0xz4O)rR5 z(q%<-cQZS+ING=MefYF>{*`mhr6d&77w>rn6=i5eW-x|V8HHDCH>R7AbL*AO+7doi zl4|XwuRafGjKgQ*qz2$5@^W<1H)b9c0w&oBWpTw2S>?2=+I9@N?~R6wxD|y)Gr7WD zvFvO4YoZ^8Ev;=G9ocJZ#P&L%)Qdhmw*$I!@+qv`XhEKoHF?wRG3*gC0GuH1-=yF+ zD0`B4JX9X>X~B6XL+z+Z!7wv>-69mTtMzhu?Ws)0=su4JAbiQyqd|;8_weliwsWDE z;*J^LIHZeTa*=x1Ghc$84H3dlUTDW{S|Fr!T06Q^wWovyYsI^jj^~#k-pe*r>VZ6o z6HM&@d`BEshaNr>0aPm;56K z57PeW;w*oph2gWsR4a+*ep(IikqOS_96xQJ@Xtbf_@^^-aX-@Tq0KgB?&xNitxVV% z80Z+{RnhP$B{}uBm!Q+)^GcFxN^`j=kM9u+lEw#Dt^8RN#!&}QXDAZQhp?@#S$|Ma zTpzfitt@uDT+s0*CU^ItpoDy1Hh-HWF_PZ(-At*Kr7~pJhREA3EC4j@VlpHKxY8-Q zbf`V?A*cHj-g6QT85dA`gmaTS@K#DpG3DrhfRsmu)Bk<9lz50dS~PDCJ9b;!PtZBh`vE?seCj8kW~ zbXp27ORAM6%^53_Ly!*A8Qk?{%CgLd30yUohu`?N1o)uR1+wGmR8e>Aj#@1Rg4LEo za($z=PgOV^^UPG{E&m$-@C@Q`uPSx=U2Xu%7%+1GT_qA>`9w03uPTkYa@Mulx~{*+nPb}3f5@|Dl`m`2{Ky>= zPod`wgt)W#jx*WL?7m&0%oXF>at^8)OdY+EYjlz71N0@XLya|-U!`q{#}--Tk-pOc z8Ja#8DU4#I^k0ris>I=ClU3$x7+r2b5n#Gt=(|6GB|LlG#c4J-V7osbZ>L|%=)(;y9p_Qe9$8vCEN%TdJ$7ko`{keMXOYx+ zZ-yWH6c4>C-{<%A zTbs`l!>Jx`89dHb=|@^VNJ{%o_GLDO_&MP8_PmE8f|7=i`vr6gAt2ROz3hb+nC_+q zzXp?*?hs7pKdrv^ZNmi2XNm3f?5!C7U7MxU3lFT{kutVg7w>?n9?KJ%zZKr6lc27TekI1V$3|{E4DVJNt9y zU9Rk38q-JQxm(^39dZjYpC?a%ug>$?0O5$S&FL@NJOZYX?qozK&aDlpRMObr*Bti~ zO7}-s>(wb0M`(z}@6E=|KTF8{*wj5^?t2EN`5(bYVAl@^SW=&KlGeCd@e7znx*-L* zw;gfliQcNc0J<;0@gjAgBkDJ*9)UMFMDas{v?pC0Aa!Q@t)5Q4^+U`VRTr&f=T`<8 zPz;!)PW)g@=8o+~!KW=$ZAmVP9_EM)LfQ{j@4uxMP7!UT->+pUw*3?o3;LxSOEJ?yE0%0Q> zK9y(9#){L{H|bkwZjMrW>Nb%%{Gb#Pv;V<^UVc>Kw#3ecfidksDSjs2aonJrx5~p+ z#7V?6qP=L_7pT{gvoc;s7BuP%>MT|d*%0{T1^-=-SP~wbq+9>f`!wX4sna+{fm`kS z^xr*sZt)PF&d%;I!`@g}?e1$gKbExr1iZ4=WN)SMq}V{@8VE0k9UCm5L3L7zWGR6g-Sy^ zM|Idf%k2^h-*G;Zr%#q&$?une!?JbYgcu= z4vKq#0zXxJpe^iJ%<<|}qa_)EXsITz zEhuxMoxW|hZ=)Pza$(;(qCf%TI`MUi{VTV`kOwdw)n4qUUi1kwo*lg#?Ts)Q>K6rm?H|3~i3blk{y%S#8{H?&F;EGr)b&00No~=wKI{7_R1W z{OA3EgrUg7+CLfA>*qIdgauJI@>eaT-d9A)vSe}vA~Pb_K1He%)X$$o4_*uXVPAY1u1QH&u_5*VV=#gJ3k#(CT%J@(^82bS z>%+^2K27TKN9I(;L0Zn{S;ep?))XMIzYqSxPC=}F)KTJev05)!nSx?#D-sM$*iO94mc%l>*ckj<6l zQ+XieISDOa)%0_KmM@Qa_&iPFj2lx=x@lgG$k65$J4JGj$X@(Zb+-@j>1_&Xsz*X$U(HtXNtIUibyXAppBeF z_LjrS1_x9AV4Y|$(4}!E3$@cc=r-@uc6qqW`r5RgiqbABFUN_@!odP@C{1Vl{gR4eqL^wO`_;sXAiF7~`G zqJS!dbzjOuGPxFSW8C#|=A7Ro^my15Xz?~Vyts-i@T?yvi-RRAdpyLU`bmokV0DKl z7s2=gTq`EA61`3WdxRm1!#x<1T^IyL^VIm*F$=s_AX-Zp9a*zvDVr2lcYIEK`GF*)jZpmyr+Gw<~an1{Fy=@K4_S`)?UM0bI) z4cBPGh4>)RE9KhWTD;=b(!)?etz+@_BXCnwT=aJLl#iSyG_YG}|M>5cTAW;I$d^8u z$tS;lRL_imPlIA`Mw|wu<}I`|m9}YE>~`9wes1-tSGy-FZEq}3dAyBR`G%Wi>qa?x z!adzH-bzDSUV*1ZnGaSuRSC%1Yw^r{d?s7!t@<=^~KB03B>hlr~H?= z;R~(Ih!7SSs|$EQN)lMZ(kH4yI30n9nlnDZi}MJ9Z2684e3gAX^LCp138E?|@YeG2 z5m(cr(I7C+>mmg|1(fAF-#x@dMcoi$mzA)_Nt;O#0lvi>w_u9`U@F@-FRxix)?R00 zUFF0WQh?E{BeU9Pl>QFeVx&3FfieBe`g~X$IZc>oJm<9kX zT%I5wR`-nxr*-G< z>jl+%rDw{Ot@JR2UBm*{Pp)543O~4!XYm?a7kNhwxnp$k>TA7XW^BYanx@S2_cB

      u_Ra_FLhkAEVelf0_99uc3|av4?!>u?3tdW%1VdR4 z^;OxDThQ#eLuUzH=}YP~x7M)Y3jyqkreJ2+jm{>}A1kIe-6dRvAM9f!zsLhc$=lhY zCDfWO=Y`ywf>q61I#L$jn&(ZVSNztgRz0;*=jE*a7k1m;#ZR7|bYxLsZb8pJ1DthM z6-OV&kG@cQ(Za-T^uy@!7p0)SG8&^-m^#H__Z{KLw&ble9{uo_ZDzpRRH1PMcig~` z0dm&ngvQE9UpFN!mv=-p`y?Im6)hb`jFgwVZ8UE-PeFdLH7~&lHS^8U(sr%BlLujW z`LwBb>FCc4<5FUq*SDnN-4to?V2deng^=^6m~&{`3m_{iysfFF5F6aFqfjBrC2L}EYJa*ne=9`%%)53J= z-+U{xzadKNg+E*{9WirGE3R&6TpM?@yL?2w>Ah@W)?5wYH-mb&ER?qXx;yUO$bJb+ z)xFK-3Pa{|_u_okqBc8^*mY*lq0w7y%~J;bYeci+2v&(#wES9<3hIcX7rG*kO&HEZ zLqc!MTt2#efzt`*jH-Yry3Fe1v$nkh8^7K^`>~lAM)L<=uR3tV-4Ac9`&>4oeD-E@ z@(E0Ac;V?jv1E`^)~6XzWi#k)9S_%nUosiCQGhdJ7;tP=0gr|Y9u8Lpap1F@ z1hP*dT~9Hv&89?2h=W&&^*xed#-_vx_a5{6hiXO-b3rrPv4wG%So#_cL&w?S_bi+v zj2>D7;+)4N#iXOcI*QkKfy@%l!sH8sAKLTT@+nxW)Y}brJTurdPVpuG7#r4$ricH1 z#~(9ApEKBYst=|4wmeCO4DF;i(0*^(`>@&^G_Wj7MhRojUdO+|77v4|-R9Q^j4Aic z5#xu($&ROMfFfNy>Ak}w{XX&zYSds{A)&+M2#0j-ksO2xpgN3=W9BOWx zX4}v)rnne8R?CTtzM?yS)S?vC^swFb8@{0#I1u=r`#o}z*_N?(p>DL3=m2}J=Q;)vc)4w9!LIl*d1T}l!UFT8vkY&}oj+zU z>n13Guo+WrqL7$NC}H*Iixj_aF(XGTnE`ztF5p&B)1{0h-BjtWcDiHl!Smxt=6nvu zjy^$Q@|@LXzn}X1d3B3lLLFA!SO!KOYBXr*TL3H>92*Nb5>E1eQcI8ARL={%@P=O; zoyk-)f3SmwmK(aJhyB+s?Xjy%cA%i2R@clqsbfjv%LXe|_XhuvkL5o{SS8+-OTp|% z!t0oI8ZBFkrD*g74J;9!L#=BUCJJgh44!qhY-tshOKa04`e6ak@lGxNMM$vblHcJG z=49~6*A15CDZRKnYPOOj`kn~y%zDu?Q``{7pywi# zEw;ln_Y^B7i5nq{#tD4cKt&+*b&P(O48;&|s*(8Ws2>m#GQo`=Ik^@t z=BGO@5_9V9{GCU?cag7WTRVT|8h*??Eh$Pp-JY4=-BL~L-N=I13&-AQ+;K025JIvO zd#)nZDkR+Snq6?H56k)a_|W#|tBZVrR*OLYTGv`GN!=1(wNo)w*YJ3~4nRhSgrH1x zm;1r}_>ZkEi6290aIMH_?)%1M?9kux4m5*9#PqGPs`g*BfBSNe*;I7Y4cgFHqKuby z(k;~}0P{q#Kxf0Kx^S9pzY$aP9p^re@W484LC*DysB5m{S-YgGy+p+VM1XXSp$9(Z zgGahC|1&*h?H)EKgjvO+YPMHbwmL`cYD)8jfF#3v$3gOlvhTm0f+o@#d1uNWagXyW zN$TmRdO|pTm;Ks-ebWuq$%Sy_ouHC%M0S@jdAu>@@(|7dGfV53EGJcP;TYukL<(ZH8h{wB(L4vh;8t*tGM$}uTe3>lC4QHzRwsS?G9w=^6czZt0%927+}cWi=!mKXo|PFa}y z8)IKH>#F2ys8Kym*RxG9{hXtx#J-XKfW5x9VFmyspgq_jgda)2w|BG%wpKE%w=(-4 zEpxSQ;)5~bBaE(+nM+-E%E^2V&z|P5N0NuNaJ?GajvIqN(1d@vT!=5XThj3Q0%d=9dj|0wydbKMA_)BMF|EH!Pxncq=JG6!e2G@kR38LNe6owpt*6do#5;MGb2FIh zx_F`V(mvL%ca_vJt(Lo(*kp6xMgcCvQr%&+c4luKfbwWxX6H_q-Q*o!U``!>zYnSh zA9k}vWTJ(__le!sobI>;o)EpXFna%pH7e}0idJx?r(Wg@Bc;j-Qrb`KUw|n1SC!Y3 zmb;0*o3`tx%)1PIgXxo_p2Yo=4+B`C2MaVF+$~&cuyp*`Ou}no-8Q9$bi&}2 ziY(wEohWNEyxb;542b1Mxb9C&FWHS|)r~eQs25+b$s&im$gmclQ)K6ka&|la@AAO5 zTI#cFVjSU$=&(|`$iK*pg>@_d@U3Mk~2AC}DBdnp7_H7+){8W#TspIUE9%2-d zkWzoEti^A)^3wYV`4*U^0$;O8^R5aa$kkS#{vY4pb`uFJC9c>^!s$3dO+`!Ugr}5Y$XdN+5ifz$(U?AG0x$If z(Wm4l{71n%VW^_tVYz?xi+X%)4^i`!IKRyi{^Vm4hI+w(n1y9t2HZI~49y1QtU~F4b={J%Y>3tSup_YpWxQSqgJCVq@hKTDi~1AneUuy`4$B z36Vqc#BTC0&=$8&la@W$<1bzaGZ#%Q*8?CJe;)T%r^CfZMlk=frK@cN&pK_ zB|*l-GuPf|0VxA40MzYNaxl9H6AFw-It^^D+?pg8GQ2#NEmF;k@~t-ZC`#j~tP-c@ z4eUA=($>1U#&N6VpKQ_{PF9*NclR~olHysfPFIC$?V4KPB=i{Q2<^JFhUkKG6CJhDFQ1pgzDJ-g*vBV4LZdRgf}63(}Q>-?Pc-YY^e zYVS{g*F#u{B|0@!>i#`umy@H!n|n533nqDMkl>((WFk?XhDgxLM2Qo|!NTy4iTBj} zR@kThFSWZNHoftkmW(9stkh~aUDyF|n0X82pJW;6yL7L1O(yhE0S=lDd@C^ZhtoXU z1RvgRbn_1}+Ch^YJE9KHH}gJek@V-QXau@N#|R?+{-_^<{RLB>~PAaPvhPM ze1`PA&n&hj@7h0PcwuR)F~_u~ribVtF;nVAR>+ux573UPKi?{KZ?5?Cc|OE1;foX{ z1#+F?#-y(I5PnT}!yaYPjU5iX6F9gC03%&oQR*(caB>J;hqvfn!#IQfQt+75QH9Mi zopPs^5K~~ng{S49)P5#P__x%>nXwfcPDdxXBoqW22#+plAbJ&3g-;wFw=z|;@ye55+e#CH9Z$YY6%uTNKT*)Ck$hDflsXb6GG*RM zY3nD5f4T{#yn6xgJq!YgvT&pqYq!~5yp8F6z}5-P;Lo~#(B6mnBh2iiz-W4=sJoD7_6|+ zGKGga{@?a2MdHiNZshn@%y?;Y4ek7KzO_zXJPt02w7(G(2ope`fAbJxtQCqK7p-Z? zrvpaMk4HOl3%{gm%osRP&q`TeH5n*4gCp9lK{SAC2D-y=J@C;q8|G9eJnkif;Ww<~ zs%X1@_n}BQ-SXEkr;{AVCR%ggpQ3kMN%C_hcXB zcwL#-y5^d5jPbi~Dy%{pA0-H6W_v7`E7md{-c4^rj5 zoMF30e0rFZqfPQeC`%{a5)-WDhdGCbKffQEG^o&;zP_KUP%N3LQBuYik~Lm9_3HL} z$7kaHFJ_cP%gCL|Cb|7hW-|QXo92xk%1DEGuQ?LqemFnd)@(@!P+ir2u~}8!=j_RC6EHD&p(xgS{7Ke_WphMbwo2Id@Y60UYqedbLSP=bweoiBz@h|m$nmva z=GRxZ@nhoy!}aOECpRPY@p0JuRt`4?xLXtY&~6T28&>weL`^XRK$C~O39qVn=1Gdh zn|c)kIuF6#&dCiRnLm#6QLLneunV#nrS}>|IQlBr*)%!e8aO$CAx4X1i(x8^X%C7q zm0E7xQXJTf7TQi5JfZ!qNl*0Kstz33N3N#Plf`F;;Fa7BXeq*D2QD1ZxoQW@2}+7+ zx^?_;u3*KFXAhx>^+Pca-R|9j1`rMFbB_n%;fR>O?|2W*TFIc{S4$=p2Q#6r|57+Q znvZtb`N>(xI`aoAI~PTn*6408GKlMhWxWx!8~ifz>%s&#FXo}FV{J|QX#fyXg0iNl zFsr@u6p<4!so{P!!mlHH zOG{U#8oZ61%@aPr1Ll}>y-UU0$gR<(mIJBl#Mk(JjMu4MrSL_ds@6TM2;fMDj#vgC>hoOAGLe*;GK!gH(s1)ipsPwkn`zYzYt$nDzPc`u&!k@j{y>0xN&2$*#O*GqPN_)~3lTV8$gU4OT5cMl*l_`sm*gum+JdqZUu-_9X- z+Ja*45@uc#W9CF>66G5;*4R(bz$m<8DlM!4huz`*1FK6_vMd$+T4GSiuCqC1 z_;b49lg8VShuhsz{8;N`;oaubDfV%^nbUGMjRsjk==arwti1kcmZ`#GGusD;I8Noa zS4_6)7>V#B6a_JJaTOl;$l#EaZTCMM4zC~5724+Qn!PO`TQU!=Gheuw8=I$;n;Vp* zgH(M27yhNVL;l2xt%lZuG+$TdRjOvE18vb!lthujm54A4HM2q4uuqSTOJr3v;O3cI zv5xd)eV9fo#t;Ca--Zz%JbN)MuZ))Pts*LWW0;Z0Mca9yP9g#urLf-%D(Dqk2R-Yf zfSwH4P?4<~;rn>C310AIi2K0-v=N*r5hU2X$lRA3Uk*aLMeOECR=dr)&p(=T{Q}Ph zL6FZC#z&ujj=r`(N^aRokWo%t_;p3NR5FzPF`9ZiVYoXGz7kghb3qx389A!68ydd9$T3?O!%U?WIZ12}I|y~E zfM1mwTln7%fd55Y_5!Y6nv256e80h0sq>XoROs0Ys1<)+bY$`F zyZk`9srNico>kH^cuu_&Ss6+|DP(9gV+L`TU06@3@3z>_*&bRVCo_bx&5Z*9$%#O= zHA`sNGT97eEz~t7mVR;2lHc8A(GayK-ona5V|zrw{ZEM2NIyo0-z|=UiGw88-af!6 z^jUXr?`(CA_Cg$4a@44kdv4eh{bZ3k9O_AjsgmW>-*Z%*R^uk9k=Mvr?HaN+8tC#p z)CnGLoaBubGI*m3$^XmmUI0{r5);#V@Z=cY@{uNx=5w|ay_S6`A3@j*@G zy-(8uzk?~>MtsoVIamNy5@j$>?{lep@ASJ#l%h*kgyJHVt9dUn#yO@PVVS(qeGD-{ z;H}c$M%|-&BpG`;#Pw)~NWVpYEi^+n>siuZcveDFx18?$SvzTtsY=CYzU9rZU_Gu( zKiT9RuARr#i;e@LDIGPw!8zBZT^t4PVgFfO<2oCZ7XL2=S5wlVgQ{8YY|U`N&*o$k z&K_8)1Hk8DK-cp$jj;pP&vKMOR7`*EskW(@_qyy-ks6|d{>f#A30UP!abxXtXX!IH zVKHw@(-fb;51EVn-&V*nda^K8Ze)#i(3YDT8Csbjqh?8C5x6FJZF;h?%a`|SvC7xu z9iyL_A_M+e;_WDT_R)ZK?sjgv$LpFytrE3x^_ueH)z9MJ<86G=lFbzGi5&M-eZH(C zt>?gbegd8@(R%Y~GzEpfOy7-_UUl$R-g$>c0fy=YMkDL><5g~|!$J`ZDaA!#=v-DI zvj}*830R{}D)($}lX}d^>QQJbu%lA+}hQeyKuk) zYb{hveC3(qo@i5G(4o&BQ;bZ6ra;8Qo4rKiV14C0{#!WFb`3OJcauh$28f%h71cFLL1jhy) zusWZxtNp=_kJ{=IKvm(z`0x?j@$KS>y|&Ijz80`N~L|$ zfp7F*m05pDm&@qaXg;g^NK2s}Z$vX|&FKub%e!vFME5 zix12x)3OEJOB`MnMn6b5bv)1)_ERxSBkYVz3a_0(@%bho^@k@82;ZkEkdWr8Al2Q%5?BSEMZ zVoquVygn{iY1}7%2KW1eUHy_s(s+4P8hfNdOA9{3uZHMGK7S6833*6FJlpX3kO`fM zRP0-)n?5JZN#bg@@92t<`_)~VZV?(#?ii4lVGdKt{6z4#QDS8zA6eQVsEtBDgl{YM z`>_m`yem!LRS!XKl-T5FlMs78Y+jtpmlj zQd447(i}(HbHHAPqYk!blS;4sXUdw}?qsU@TCUW{#U{|Gt5{EYW?$O&2-;LRgc7U` zG6naiU}W3oQ+VpA)TXr}>3 z*6F_~>`rrM?45DFKY0>oNi5=z+EUq7BO3XqX2NLtBU{LUFpKD>=i(`MWIp_H>kA!y zsaUf$rY98LSN>b;X6$}AxG!&9apQ75BV*AcKM7A$_~d*f0teTD-Vrcnw~mg#2_lF! z;6|>2i}s58ImHT7?76r&K3Dvz$=gj@7!!M*S?zJYepoc)uvn|4KWDmQpt^qC95QG0 zR$oHxIP}P>f{kj*$t$zxsSbY0VuYxm@HwU#@>Gq91q7M%d*F9q$I!d$-yZpm)d z5qF6aIZtCNpPgdpm+3jMY0%iY!k^N3Hy#g(3hlUG4BkJKNDRBd>Z4r$G+l16lcFR- z>>Jj9Z>+ZxC)86wYSqBMKfP;1T6fx!%(BJ*e(>sF3aY91>3UsLHTXBdz+NE^Of7 z(yGZwCxZH7W(GVXk&-9syvj#J6Ue3TyAuVQScMy$;2Di>&39*T@N9h$ee4L~dlR$z zWIPgTnlqw)MK3QiJe$HcZ^i4A62!7lQlK|d(f~yD4f(VN~TfnMP#4A~*uW6LLbZX-G8%(kqA!{U^0I0&RDAAiR*n zt;T!8V;`=E3V%~pa=B_udrt>TyQiDX-T6ILy&jhuIQLz-I)Xmd$;}yVZ;kpkH*iMo zKj`i4uQmsi?d*TgGXfwsI~G(`#k}`V>z69G=ls%Xo4x*NsRs6>RsTz&$}LHhz=Jj4 zM?HvC#z#~b(iH`6oh0AyZDU z=ED$+Q0}-%2)E?MdmUPiMCyyEp-1w#t_jVd-zi^ih15XNDiT8C&(|`mepTpKh8>13AxAZZhmQNpP*#P6YbzQEMqc5UcPm|<418OYrO>p$pD`-W zze1ZkG?P86EX6aZBHJ{glm;x@C63WS^k(10}i_zO@ zxvE2b<9FZtHf%@+j-9#mf{Fa*@heOPZ?*iHWokYhfh2}pd=F%KBD7`O|ivC;Awvl2-0zs2PL6n3|r(~{!i$rP1ww#H;> z%GfO99ezqwAeVHg(8*h(3fCLQG!Kl<$TYEIXW|2QUQoWz8^jG}8Y+I=A(Q|QD%LE>Xz{_^Tqxt}K@A=8!0a8(=w%YP6&HU-!su5E&)*FkRJq79g z%stJf)`!vdqXEhGv8|c`K)1OWlifVn=?Kxn-P(9ZT^n)s-$OU#Z?Y@p{!R=3UXU z7*Y9l(=F!v!^p+&87qt4!QCf+eyT2EJKGALcrq01#FQz!-l8*BiKgc-{PzAwjTKH& zHOG2qi=pq=-(y+1R9zE$FRnji%{`}H!WEScqf1O0T48m{APs-Ef4G^EIMRlf!(I>S zYneuY#`HzkfvKmO1gTFQRX+1nOoJK5;1>wy^~+d51E`a+x+y_8+M+BDxdD75(BEc&xj z)pE)~t0P44+^B^|`hMRS+GJzj@kQ&*Os{U`|2kE9C+bd~BBHc!Z<)^f5)*VstMBhs zKQ&aVPx&x+kzjInC30@r&)DhlIbq|9^2`8{d!R_Zk1!gnsQQ8Jd@e(jRBsEuEcPi= z>gT_;zZ4#P#)4w4X&HSUKou}-PGco6s~1eM$|w^vu{2Od7}~Pdf!^+V$4+dyq?<{8 z*ppuvs}}a;Mm{RpIbxy7iAF6r`)cZg%qBYI<{riM+sSX?U`N%3FOzlN-*?P)@|s01 z&z#6$+pWs6`&KDCtime>quuh|M_I6<3qJCm4!*7VihF4esT6a!uvr_~gbGojJkF0xuZFb5~dc=Gsfen8{<_0DN$@0YbbcLz0 z?k41dez{MG|Llyy`R=I_BCbmY_4=R%oV~3CrA{7JyKqh!wd309``WWB|D$8w_RWk|~{pmCjeo*>yD> zDtunEv+ZnHV#-|7trtu>=gB(@B(ba_ccYv>^xl5*W2Z~T2hQ2|FNN;GyRe&oQoqg- zI72zybuqB5A7+7n@CM7>sZXNa-CDvD8kQ`B66G-iE|{f! z4jxJqNSse7{BbFzXTe1)Fwfk+_EV(MSbg>yhy`;NzMNbt{#M4O%hE>)CK3p<%C9q! z7%>CAMuEg@qM}HXnzwq`BSo+})mYtaDso)q8om{NKKd4ijzIO&uE{z&iYO|EoTJNC z5MW8lwov|8JRg6I9nFFqH*s0`AdDUA0Pi-!1|Ff0C*8vrA?^5^=g#zqe#m`ipr3Lr zUtQrgtyX?_%G#X0jd9{kr-^#=Shmn6{jy9H+>!2d$p}-sm5|e&c$>)T%X|9g^qBGK zgcElJmA5(thvj<$H(nxYZ=g5E?eh|Oa!eG#p2q(fG}`AItAVm3JXtBrl0U8jt~o}Wjqaha2neMr1lx$@uyX70N|+#h>scQA2e$Sjf# z0w>)!p=ay}0F;(!dnpoDjwA&L`a_d}9l-%dfNmGEW#f0Lp;GL&od{Y_=| zYc0suuj2ZAubgigAhD#;DAv1FL@}xNqf>fL*KPBoRcKZV4FgB}IIJSo2OZfklj0z? z>)SNiFGjfF?4RIsu*9LoB43;70zf9a1#ii`_b>oqS2q=!FjR&6&KTO}k7n88uRsbT zWmuBc+2r$*ORet3KNOh<35kqvbhP{+CTUV3-lLoS?nbIzRYeMUY*m}-o3R5;K6VIv zY;Ml}BGS?7;JIvuM1j(&m1>HeOBdbrUcR#<$o>X5W*rfVoQCN~{NgWbKQ%*if1X|2 zzIyQ7ig8xg8@TIGQhP7wSFY`@srZ~8{O&i2cZIzT3Gufyw^xbxxTR5~d#Z9@Hg6oE z^4~0OvXmy_Ofjbw7rpcvRLrAmqnOJfMny(x8Y(JpR%O0NTh@a516<7RthtlYERiIe zipay;^-N6REVqA#o~2MiDny~m6a8jxBs?AxS`;{Q?CQvb#SCBe)7 z4qz8rOlBdsbnDu+Bjd#)O2YVJ{MmN(pTl>zdbo+~cu+Yx#1th=n&xh5B^MYueAw(e zB9@o*x7QWW$9BdL+bXm#EX%YbkyFH%V+x1+V{m@gqxG|nfNk+rAa_G+Jp2aoq@O4M zUy6zM?)0o%;NnZl{ms~6V`#&9!q+mcYj{a!K7X$3^*`*vbdNac`J$!$b)OmD@85X1 z-3UfkEQuck?R|<@s9`nIz2U@aH1KlRazJW*sv_N}^?0<}_4xSr8-WDs=h zNz}vDvHF@sl2qE!srN^%)By{9;svjTb|8pff&#o=RcJ%&)SN_+_NKTONsBRgl+ufR zV&_J|^-cRQM&-?y)cC^QMlMLv8?x%4{f88}1x(u`GqRPPRDNWq^mpGOUu&?34J#-K zQIzT51KXDByX;s~JKET~N{_KLB5p@MygL-8)kQ^zJWb`OpnwM-M@N>>HP7ViaB+Apd(w*x?JPI>=Y%KB zM^!2zE4D89ShT0BjT!R&*vlPyA_$|cfgHVZSUw53Yv5g$wajgq-jl-3RjYWRT+=+< z=X`sBiA_mHqQ01r$AvdR5q|>*#%phD<5S4<3W;R;b{EK-b|T!jD5QF20wQ}rt%!@S zlpoY)8s04rmz4auVJg~pet%4;U}I?|0NlJ69mPb3x7;TxV{bemv+lX@o}APJ0H=fj zuup8L=iFI$pcUb%Ua=1!*yrh&%yBVo5toz_Qa9{q^R+bl0Q6Sh9#16o?XCR3B0s1& z-(42^SYG9WjOCDNA5^KXS@&Unaop34z3KcHJwheeR)Imp%ZG+x2F3#uZ7mJ3!xnL( zWAX>vuJf5bZ3)JfLY4??5k(MV%csAyh%O^of%v}^hdCU7ZqGv4@?m$=ON~GLlTm7% zCHlb)#Ax`_=Y)tS>RlB`^hk~tX`y;olLjtHUyv8YStc`n&1p@m&!;7a`eiK zEe*O|bco1;Vz&U@G(w&-f~88xkfp|a#N9m*b@ z=SN>nx$-3wzn?M$CGRpVCu*V)$Gu=Y*Rp>oMGPO+aSVNrMrL_w5o9P7VCw6_t5e%NG{CFGuV;KRkx;&gA{`q`_AnJ_=5^?zi3JquwQ>mE_A z8P(vxS21#1PLuEWpg4?b=vkXuB9z3``|*zInL0;|N_FOpYP>>5PAA<)lc#)L+d=w} zxQ=M5pzoimeU+X$pSWF;gMWKUf2{^}V(>jH%tpG?7I3lPL*s<`>wvnOJVl%V#d=PN=W^IB0*cbQ% zcWt0IZFiMZXPhA+m#DOOubizgo4NR?F<(Jef0eLyBh54!cL?E5h~g)oM}hlKV#1f! zIOqvizr#`a_ieZM-uKVr{*-?lcD1)>0(`x&R2rKyEj1F;(hNqo>!Tx7*-)a}Zys;3 zWr`}jmY*+WvDhs)GxRbm>D~|6Tu`q)C6gVs=cB(_BXOnBEU1vmuCbLr_F0_qo|K>R~pWaI`)v zhS0uo8wINlabtZ%mk%w+U53<5Sh=8!$$2Vi;D(>R=JAEVVs8=r+3j*g6-YqOr-)Hd zO;#r Date: Sat, 9 May 2020 10:33:36 +0800 Subject: [PATCH 48/54] fixed some typos --- components/net/at/at_socket/at_socket.c | 2 +- components/net/netdev/src/netdev.c | 2 +- components/net/sal_socket/src/sal_socket.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/components/net/at/at_socket/at_socket.c b/components/net/at/at_socket/at_socket.c index 11be4e23c0..220bf9d620 100644 --- a/components/net/at/at_socket/at_socket.c +++ b/components/net/at/at_socket/at_socket.c @@ -744,7 +744,7 @@ int at_recvfrom(int socket, void *mem, size_t len, int flags, struct sockaddr *f goto __exit; } - /* if the socket type is UDP, nead to connect socket first */ + /* if the socket type is UDP, need to connect socket first */ if (from && sock->type == AT_SOCKET_UDP && sock->state == AT_SOCKET_OPEN) { ip_addr_t remote_addr; diff --git a/components/net/netdev/src/netdev.c b/components/net/netdev/src/netdev.c index 68e5364a9e..aa43d8d3db 100644 --- a/components/net/netdev/src/netdev.c +++ b/components/net/netdev/src/netdev.c @@ -1087,7 +1087,7 @@ int netdev_cmd_ping(char* target_name, rt_uint32_t times, rt_size_t size) } } - /* if the response time is more than NETDEV_PING_DELAY, no nead to delay */ + /* if the response time is more than NETDEV_PING_DELAY, no need to delay */ delay_tick = ((rt_tick_get() - start_tick) > NETDEV_PING_DELAY) || (index == times) ? 0 : NETDEV_PING_DELAY; rt_thread_delay(delay_tick); } diff --git a/components/net/sal_socket/src/sal_socket.c b/components/net/sal_socket/src/sal_socket.c index bd51c829c6..e3bea5a28e 100644 --- a/components/net/sal_socket/src/sal_socket.c +++ b/components/net/sal_socket/src/sal_socket.c @@ -679,7 +679,7 @@ int sal_shutdown(int socket, int how) /* get the socket object by socket descriptor */ SAL_SOCKET_OBJ_GET(sock, socket); - /* shutdown operation not nead to check network interface status */ + /* shutdown operation not need to check network interface status */ /* check the network interface socket opreation */ SAL_NETDEV_SOCKETOPS_VALID(sock->netdev, pf, shutdown); @@ -970,7 +970,7 @@ int sal_closesocket(int socket) /* get the socket object by socket descriptor */ SAL_SOCKET_OBJ_GET(sock, socket); - /* clsoesocket operation not nead to vaild network interface status */ + /* clsoesocket operation not need to vaild network interface status */ /* valid the network interface socket opreation */ SAL_NETDEV_SOCKETOPS_VALID(sock->netdev, pf, socket); -- Gitee From 53977c1fb4f92b3c5e2420b674d7764eeda187fc Mon Sep 17 00:00:00 2001 From: thread-liu Date: Mon, 11 May 2020 14:10:48 +0800 Subject: [PATCH 49/54] [update] tools/eclipse.py --- tools/eclipse.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/eclipse.py b/tools/eclipse.py index 699ecef4d1..48b38c8f0a 100644 --- a/tools/eclipse.py +++ b/tools/eclipse.py @@ -109,12 +109,12 @@ def ExcludeFiles(infiles, files): def ExcludePaths(rootpath, paths): ret = [] - files = os.listdir(rootpath) + files = os.listdir(OSPath(rootpath)) for file in files: if file.startswith('.'): continue - fullname = os.path.join(rootpath, file) + fullname = os.path.join(OSPath(rootpath), file) if os.path.isdir(fullname): # print(fullname) -- Gitee From 1e94742a0e6f2cd11faada1ce7cf7638d501a05d Mon Sep 17 00:00:00 2001 From: GaoJie <13492467@qq.com> Date: Wed, 13 May 2020 09:35:30 +0800 Subject: [PATCH 50/54] [BSP] In bsp of stm32, Change drv_can1 to drv_can2 in function CAN2_SCE_IRQHandler() of drv_can.c --- bsp/stm32/libraries/HAL_Drivers/drv_can.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index 4490094470..db35f9ff4f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -806,7 +806,7 @@ void CAN2_SCE_IRQHandler(void) break; case RT_CAN_BUS_ACK_ERR: drv_can2.device.status.ackerrcnt++; - if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) + if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 0 << 8); else if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 1 << 8); -- Gitee From c4eed718e87206990f45902dbd01bfdf3a27b751 Mon Sep 17 00:00:00 2001 From: GaoJie <13492467@qq.com> Date: Wed, 13 May 2020 10:05:23 +0800 Subject: [PATCH 51/54] =?UTF-8?q?[BSP]=20[STM32]=20drv=5Fcan.c=20CANx=5FSC?= =?UTF-8?q?E=5FIRQHandler()=20=E7=9A=84=20RT=5FCAN=5FBUS=5FACK=5FERR=20?= =?UTF-8?q?=E5=A4=84=E7=90=863=E4=B8=AA=E9=82=AE=E7=AE=B1=E7=9A=84=20TXOK?= =?UTF-8?q?=E6=A0=87=E5=BF=97?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/drv_can.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index db35f9ff4f..b423d79c95 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -688,9 +688,9 @@ void CAN1_SCE_IRQHandler(void) drv_can1.device.status.ackerrcnt++; if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 0 << 8); - else if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) + else if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK1)) rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 1 << 8); - else if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) + else if (!READ_BIT(drv_can1.CanHandle.Instance->TSR, CAN_FLAG_TXOK2)) rt_hw_can_isr(&drv_can1.device, RT_CAN_EVENT_TX_FAIL | 2 << 8); break; case RT_CAN_BUS_IMPLICIT_BIT_ERR: @@ -808,9 +808,9 @@ void CAN2_SCE_IRQHandler(void) drv_can2.device.status.ackerrcnt++; if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 0 << 8); - else if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) + else if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK1)) rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 1 << 8); - else if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK0)) + else if (!READ_BIT(drv_can2.CanHandle.Instance->TSR, CAN_FLAG_TXOK2)) rt_hw_can_isr(&drv_can2.device, RT_CAN_EVENT_TX_FAIL | 2 << 8); break; case RT_CAN_BUS_IMPLICIT_BIT_ERR: -- Gitee From 3496017c840dceaa6d6f896baa5a2efcf8d36361 Mon Sep 17 00:00:00 2001 From: thread-liu Date: Fri, 15 May 2020 15:06:21 +0800 Subject: [PATCH 52/54] [update] spi nss type --- bsp/stm32/libraries/HAL_Drivers/drv_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 3267ffe749..a736952b71 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -137,7 +137,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur if (cfg->mode & RT_SPI_NO_CS) { - spi_handle->Init.NSS = SPI_NSS_SOFT; + spi_handle->Init.NSS = SPI_NSS_HARD_OUTPUT; } else { -- Gitee From 7b1a32f1f0b0153f197c106125c13d39e02802b5 Mon Sep 17 00:00:00 2001 From: XYX12306 <50113550+XYX12306@users.noreply.github.com> Date: Fri, 15 May 2020 16:16:23 +0800 Subject: [PATCH 53/54] Update .travis.yml --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index 8b4f03006a..9eab3a5c9f 100644 --- a/.travis.yml +++ b/.travis.yml @@ -90,6 +90,7 @@ env: - RTT_BSP='stm32/stm32f410-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32f411-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32f411-weact-MiniF4' RTT_TOOL_CHAIN='sourcery-arm' + - RTT_BSP='stm32/stm32f413-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32f427-robomaster-a' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32f429-armfly-v6' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='stm32/stm32f429-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm' -- Gitee From b98690e2110a9ddf083004340b5170715c84996e Mon Sep 17 00:00:00 2001 From: Bernard Xiong Date: Sun, 17 May 2020 23:14:24 +0800 Subject: [PATCH 54/54] [Kernel] Fix the maxlen issue in rt_object_get_pointers --- src/object.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/object.c b/src/object.c index 62d70816dc..6866d805ca 100644 --- a/src/object.c +++ b/src/object.c @@ -291,6 +291,8 @@ int rt_object_get_pointers(enum rt_object_class_type type, rt_object_t *pointers pointers[index] = object; index ++; + + if (index >= maxlen) break; } rt_hw_interrupt_enable(level); -- Gitee

    u_Ra_FLhkAEVelf0_99uc3|av4?!>u?3tdW%1VdR4 z^;OxDThQ#eLuUzH=}YP~x7M)Y3jyqkreJ2+jm{>}A1kIe-6dRvAM9f!zsLhc$=lhY zCDfWO=Y`ywf>q61I#L$jn&(ZVSNztgRz0;*=jE*a7k1m;#ZR7|bYxLsZb8pJ1DthM z6-OV&kG@cQ(Za-T^uy@!7p0)SG8&^-m^#H__Z{KLw&ble9{uo_ZDzpRRH1PMcig~` z0dm&ngvQE9UpFN!mv=-p`y?Im6)hb`jFgwVZ8UE-PeFdLH7~&lHS^8U(sr%BlLujW z`LwBb>FCc4<5FUq*SDnN-4to?V2deng^=^6m~&{`3m_{iysfFF5F6aFqfjBrC2L}EYJa*ne=9`%%)53J= z-+U{xzadKNg+E*{9WirGE3R&6TpM?@yL?2w>Ah@W)?5wYH-mb&ER?qXx;yUO$bJb+ z)xFK-3Pa{|_u_okqBc8^*mY*lq0w7y%~J;bYeci+2v&(#wES9<3hIcX7rG*kO&HEZ zLqc!MTt2#efzt`*jH-Yry3Fe1v$nkh8^7K^`>~lAM)L<=uR3tV-4Ac9`&>4oeD-E@ z@(E0Ac;V?jv1E`^)~6XzWi#k)9S_%nUosiCQGhdJ7;tP=0gr|Y9u8Lpap1F@ z1hP*dT~9Hv&89?2h=W&&^*xed#-_vx_a5{6hiXO-b3rrPv4wG%So#_cL&w?S_bi+v zj2>D7;+)4N#iXOcI*QkKfy@%l!sH8sAKLTT@+nxW)Y}brJTurdPVpuG7#r4$ricH1 z#~(9ApEKBYst=|4wmeCO4DF;i(0*^(`>@&^G_Wj7MhRojUdO+|77v4|-R9Q^j4Aic z5#xu($&ROMfFfNy>Ak}w{XX&zYSds{A)&+M2#0j-ksO2xpgN3=W9BOWx zX4}v)rnne8R?CTtzM?yS)S?vC^swFb8@{0#I1u=r`#o}z*_N?(p>DL3=m2}J=Q;)vc)4w9!LIl*d1T}l!UFT8vkY&}oj+zU z>n13Guo+WrqL7$NC}H*Iixj_aF(XGTnE`ztF5p&B)1{0h-BjtWcDiHl!Smxt=6nvu zjy^$Q@|@LXzn}X1d3B3lLLFA!SO!KOYBXr*TL3H>92*Nb5>E1eQcI8ARL={%@P=O; zoyk-)f3SmwmK(aJhyB+s?Xjy%cA%i2R@clqsbfjv%LXe|_XhuvkL5o{SS8+-OTp|% z!t0oI8ZBFkrD*g74J;9!L#=BUCJJgh44!qhY-tshOKa04`e6ak@lGxNMM$vblHcJG z=49~6*A15CDZRKnYPOOj`kn~y%zDu?Q``{7pywi# zEw;ln_Y^B7i5nq{#tD4cKt&+*b&P(O48;&|s*(8Ws2>m#GQo`=Ik^@t z=BGO@5_9V9{GCU?cag7WTRVT|8h*??Eh$Pp-JY4=-BL~L-N=I13&-AQ+;K025JIvO zd#)nZDkR+Snq6?H56k)a_|W#|tBZVrR*OLYTGv`GN!=1(wNo)w*YJ3~4nRhSgrH1x zm;1r}_>ZkEi6290aIMH_?)%1M?9kux4m5*9#PqGPs`g*BfBSNe*;I7Y4cgFHqKuby z(k;~}0P{q#Kxf0Kx^S9pzY$aP9p^re@W484LC*DysB5m{S-YgGy+p+VM1XXSp$9(Z zgGahC|1&*h?H)EKgjvO+YPMHbwmL`cYD)8jfF#3v$3gOlvhTm0f+o@#d1uNWagXyW zN$TmRdO|pTm;Ks-ebWuq$%Sy_ouHC%M0S@jdAu>@@(|7dGfV53EGJcP;TYukL<(ZH8h{wB(L4vh;8t*tGM$}uTe3>lC4QHzRwsS?G9w=^6czZt0%927+}cWi=!mKXo|PFa}y z8)IKH>#F2ys8Kym*RxG9{hXtx#J-XKfW5x9VFmyspgq_jgda)2w|BG%wpKE%w=(-4 zEpxSQ;)5~bBaE(+nM+-E%E^2V&z|P5N0NuNaJ?GajvIqN(1d@vT!=5XThj3Q0%d=9dj|0wydbKMA_)BMF|EH!Pxncq=JG6!e2G@kR38LNe6owpt*6do#5;MGb2FIh zx_F`V(mvL%ca_vJt(Lo(*kp6xMgcCvQr%&+c4luKfbwWxX6H_q-Q*o!U``!>zYnSh zA9k}vWTJ(__le!sobI>;o)EpXFna%pH7e}0idJx?r(Wg@Bc;j-Qrb`KUw|n1SC!Y3 zmb;0*o3`tx%)1PIgXxo_p2Yo=4+B`C2MaVF+$~&cuyp*`Ou}no-8Q9$bi&}2 ziY(wEohWNEyxb;542b1Mxb9C&FWHS|)r~eQs25+b$s&im$gmclQ)K6ka&|la@AAO5 zTI#cFVjSU$=&(|`$iK*pg>@_d@U3Mk~2AC}DBdnp7_H7+){8W#TspIUE9%2-d zkWzoEti^A)^3wYV`4*U^0$;O8^R5aa$kkS#{vY4pb`uFJC9c>^!s$3dO+`!Ugr}5Y$XdN+5ifz$(U?AG0x$If z(Wm4l{71n%VW^_tVYz?xi+X%)4^i`!IKRyi{^Vm4hI+w(n1y9t2HZI~49y1QtU~F4b={J%Y>3tSup_YpWxQSqgJCVq@hKTDi~1AneUuy`4$B z36Vqc#BTC0&=$8&la@W$<1bzaGZ#%Q*8?CJe;)T%r^CfZMlk=frK@cN&pK_ zB|*l-GuPf|0VxA40MzYNaxl9H6AFw-It^^D+?pg8GQ2#NEmF;k@~t-ZC`#j~tP-c@ z4eUA=($>1U#&N6VpKQ_{PF9*NclR~olHysfPFIC$?V4KPB=i{Q2<^JFhUkKG6CJhDFQ1pgzDJ-g*vBV4LZdRgf}63(}Q>-?Pc-YY^e zYVS{g*F#u{B|0@!>i#`umy@H!n|n533nqDMkl>((WFk?XhDgxLM2Qo|!NTy4iTBj} zR@kThFSWZNHoftkmW(9stkh~aUDyF|n0X82pJW;6yL7L1O(yhE0S=lDd@C^ZhtoXU z1RvgRbn_1}+Ch^YJE9KHH}gJek@V-QXau@N#|R?+{-_^<{RLB>~PAaPvhPM ze1`PA&n&hj@7h0PcwuR)F~_u~ribVtF;nVAR>+ux573UPKi?{KZ?5?Cc|OE1;foX{ z1#+F?#-y(I5PnT}!yaYPjU5iX6F9gC03%&oQR*(caB>J;hqvfn!#IQfQt+75QH9Mi zopPs^5K~~ng{S49)P5#P__x%>nXwfcPDdxXBoqW22#+plAbJ&3g-;wFw=z|;@ye55+e#CH9Z$YY6%uTNKT*)Ck$hDflsXb6GG*RM zY3nD5f4T{#yn6xgJq!YgvT&pqYq!~5yp8F6z}5-P;Lo~#(B6mnBh2iiz-W4=sJoD7_6|+ zGKGga{@?a2MdHiNZshn@%y?;Y4ek7KzO_zXJPt02w7(G(2ope`fAbJxtQCqK7p-Z? zrvpaMk4HOl3%{gm%osRP&q`TeH5n*4gCp9lK{SAC2D-y=J@C;q8|G9eJnkif;Ww<~ zs%X1@_n}BQ-SXEkr;{AVCR%ggpQ3kMN%C_hcXB zcwL#-y5^d5jPbi~Dy%{pA0-H6W_v7`E7md{-c4^rj5 zoMF30e0rFZqfPQeC`%{a5)-WDhdGCbKffQEG^o&;zP_KUP%N3LQBuYik~Lm9_3HL} z$7kaHFJ_cP%gCL|Cb|7hW-|QXo92xk%1DEGuQ?LqemFnd)@(@!P+ir2u~}8!=j_RC6EHD&p(xgS{7Ke_WphMbwo2Id@Y60UYqedbLSP=bweoiBz@h|m$nmva z=GRxZ@nhoy!}aOECpRPY@p0JuRt`4?xLXtY&~6T28&>weL`^XRK$C~O39qVn=1Gdh zn|c)kIuF6#&dCiRnLm#6QLLneunV#nrS}>|IQlBr*)%!e8aO$CAx4X1i(x8^X%C7q zm0E7xQXJTf7TQi5JfZ!qNl*0Kstz33N3N#Plf`F;;Fa7BXeq*D2QD1ZxoQW@2}+7+ zx^?_;u3*KFXAhx>^+Pca-R|9j1`rMFbB_n%;fR>O?|2W*TFIc{S4$=p2Q#6r|57+Q znvZtb`N>(xI`aoAI~PTn*6408GKlMhWxWx!8~ifz>%s&#FXo}FV{J|QX#fyXg0iNl zFsr@u6p<4!so{P!!mlHH zOG{U#8oZ61%@aPr1Ll}>y-UU0$gR<(mIJBl#Mk(JjMu4MrSL_ds@6TM2;fMDj#vgC>hoOAGLe*;GK!gH(s1)ipsPwkn`zYzYt$nDzPc`u&!k@j{y>0xN&2$*#O*GqPN_)~3lTV8$gU4OT5cMl*l_`sm*gum+JdqZUu-_9X- z+Ja*45@uc#W9CF>66G5;*4R(bz$m<8DlM!4huz`*1FK6_vMd$+T4GSiuCqC1 z_;b49lg8VShuhsz{8;N`;oaubDfV%^nbUGMjRsjk==arwti1kcmZ`#GGusD;I8Noa zS4_6)7>V#B6a_JJaTOl;$l#EaZTCMM4zC~5724+Qn!PO`TQU!=Gheuw8=I$;n;Vp* zgH(M27yhNVL;l2xt%lZuG+$TdRjOvE18vb!lthujm54A4HM2q4uuqSTOJr3v;O3cI zv5xd)eV9fo#t;Ca--Zz%JbN)MuZ))Pts*LWW0;Z0Mca9yP9g#urLf-%D(Dqk2R-Yf zfSwH4P?4<~;rn>C310AIi2K0-v=N*r5hU2X$lRA3Uk*aLMeOECR=dr)&p(=T{Q}Ph zL6FZC#z&ujj=r`(N^aRokWo%t_;p3NR5FzPF`9ZiVYoXGz7kghb3qx389A!68ydd9$T3?O!%U?WIZ12}I|y~E zfM1mwTln7%fd55Y_5!Y6nv256e80h0sq>XoROs0Ys1<)+bY$`F zyZk`9srNico>kH^cuu_&Ss6+|DP(9gV+L`TU06@3@3z>_*&bRVCo_bx&5Z*9$%#O= zHA`sNGT97eEz~t7mVR;2lHc8A(GayK-ona5V|zrw{ZEM2NIyo0-z|=UiGw88-af!6 z^jUXr?`(CA_Cg$4a@44kdv4eh{bZ3k9O_AjsgmW>-*Z%*R^uk9k=Mvr?HaN+8tC#p z)CnGLoaBubGI*m3$^XmmUI0{r5);#V@Z=cY@{uNx=5w|ay_S6`A3@j*@G zy-(8uzk?~>MtsoVIamNy5@j$>?{lep@ASJ#l%h*kgyJHVt9dUn#yO@PVVS(qeGD-{ z;H}c$M%|-&BpG`;#Pw)~NWVpYEi^+n>siuZcveDFx18?$SvzTtsY=CYzU9rZU_Gu( zKiT9RuARr#i;e@LDIGPw!8zBZT^t4PVgFfO<2oCZ7XL2=S5wlVgQ{8YY|U`N&*o$k z&K_8)1Hk8DK-cp$jj;pP&vKMOR7`*EskW(@_qyy-ks6|d{>f#A30UP!abxXtXX!IH zVKHw@(-fb;51EVn-&V*nda^K8Ze)#i(3YDT8Csbjqh?8C5x6FJZF;h?%a`|SvC7xu z9iyL_A_M+e;_WDT_R)ZK?sjgv$LpFytrE3x^_ueH)z9MJ<86G=lFbzGi5&M-eZH(C zt>?gbegd8@(R%Y~GzEpfOy7-_UUl$R-g$>c0fy=YMkDL><5g~|!$J`ZDaA!#=v-DI zvj}*830R{}D)($}lX}d^>QQJbu%lA+}hQeyKuk) zYb{hveC3(qo@i5G(4o&BQ;bZ6ra;8Qo4rKiV14C0{#!WFb`3OJcauh$28f%h71cFLL1jhy) zusWZxtNp=_kJ{=IKvm(z`0x?j@$KS>y|&Ijz80`N~L|$ zfp7F*m05pDm&@qaXg;g^NK2s}Z$vX|&FKub%e!vFME5 zix12x)3OEJOB`MnMn6b5bv)1)_ERxSBkYVz3a_0(@%bho^@k@82;ZkEkdWr8Al2Q%5?BSEMZ zVoquVygn{iY1}7%2KW1eUHy_s(s+4P8hfNdOA9{3uZHMGK7S6833*6FJlpX3kO`fM zRP0-)n?5JZN#bg@@92t<`_)~VZV?(#?ii4lVGdKt{6z4#QDS8zA6eQVsEtBDgl{YM z`>_m`yem!LRS!XKl-T5FlMs78Y+jtpmlj zQd447(i}(HbHHAPqYk!blS;4sXUdw}?qsU@TCUW{#U{|Gt5{EYW?$O&2-;LRgc7U` zG6naiU}W3oQ+VpA)TXr}>3 z*6F_~>`rrM?45DFKY0>oNi5=z+EUq7BO3XqX2NLtBU{LUFpKD>=i(`MWIp_H>kA!y zsaUf$rY98LSN>b;X6$}AxG!&9apQ75BV*AcKM7A$_~d*f0teTD-Vrcnw~mg#2_lF! z;6|>2i}s58ImHT7?76r&K3Dvz$=gj@7!!M*S?zJYepoc)uvn|4KWDmQpt^qC95QG0 zR$oHxIP}P>f{kj*$t$zxsSbY0VuYxm@HwU#@>Gq91q7M%d*F9q$I!d$-yZpm)d z5qF6aIZtCNpPgdpm+3jMY0%iY!k^N3Hy#g(3hlUG4BkJKNDRBd>Z4r$G+l16lcFR- z>>Jj9Z>+ZxC)86wYSqBMKfP;1T6fx!%(BJ*e(>sF3aY91>3UsLHTXBdz+NE^Of7 z(yGZwCxZH7W(GVXk&-9syvj#J6Ue3TyAuVQScMy$;2Di>&39*T@N9h$ee4L~dlR$z zWIPgTnlqw)MK3QiJe$HcZ^i4A62!7lQlK|d(f~yD4f(VN~TfnMP#4A~*uW6LLbZX-G8%(kqA!{U^0I0&RDAAiR*n zt;T!8V;`=E3V%~pa=B_udrt>TyQiDX-T6ILy&jhuIQLz-I)Xmd$;}yVZ;kpkH*iMo zKj`i4uQmsi?d*TgGXfwsI~G(`#k}`V>z69G=ls%Xo4x*NsRs6>RsTz&$}LHhz=Jj4 zM?HvC#z#~b(iH`6oh0AyZDU z=ED$+Q0}-%2)E?MdmUPiMCyyEp-1w#t_jVd-zi^ih15XNDiT8C&(|`mepTpKh8>13AxAZZhmQNpP*#P6YbzQEMqc5UcPm|<418OYrO>p$pD`-W zze1ZkG?P86EX6aZBHJ{glm;x@C63WS^k(10}i_zO@ zxvE2b<9FZtHf%@+j-9#mf{Fa*@heOPZ?*iHWokYhfh2}pd=F%KBD7`O|ivC;Awvl2-0zs2PL6n3|r(~{!i$rP1ww#H;> z%GfO99ezqwAeVHg(8*h(3fCLQG!Kl<$TYEIXW|2QUQoWz8^jG}8Y+I=A(Q|QD%LE>Xz{_^Tqxt}K@A=8!0a8(=w%YP6&HU-!su5E&)*FkRJq79g z%stJf)`!vdqXEhGv8|c`K)1OWlifVn=?Kxn-P(9ZT^n)s-$OU#Z?Y@p{!R=3UXU z7*Y9l(=F!v!^p+&87qt4!QCf+eyT2EJKGALcrq01#FQz!-l8*BiKgc-{PzAwjTKH& zHOG2qi=pq=-(y+1R9zE$FRnji%{`}H!WEScqf1O0T48m{APs-Ef4G^EIMRlf!(I>S zYneuY#`HzkfvKmO1gTFQRX+1nOoJK5;1>wy^~+d51E`a+x+y_8+M+BDxdD75(BEc&xj z)pE)~t0P44+^B^|`hMRS+GJzj@kQ&*Os{U`|2kE9C+bd~BBHc!Z<)^f5)*VstMBhs zKQ&aVPx&x+kzjInC30@r&)DhlIbq|9^2`8{d!R_Zk1!gnsQQ8Jd@e(jRBsEuEcPi= z>gT_;zZ4#P#)4w4X&HSUKou}-PGco6s~1eM$|w^vu{2Od7}~Pdf!^+V$4+dyq?<{8 z*ppuvs}}a;Mm{RpIbxy7iAF6r`)cZg%qBYI<{riM+sSX?U`N%3FOzlN-*?P)@|s01 z&z#6$+pWs6`&KDCtime>quuh|M_I6<3qJCm4!*7VihF4esT6a!uvr_~gbGojJkF0xuZFb5~dc=Gsfen8{<_0DN$@0YbbcLz0 z?k41dez{MG|Llyy`R=I_BCbmY_4=R%oV~3CrA{7JyKqh!wd309``WWB|D$8w_RWk|~{pmCjeo*>yD> zDtunEv+ZnHV#-|7trtu>=gB(@B(ba_ccYv>^xl5*W2Z~T2hQ2|FNN;GyRe&oQoqg- zI72zybuqB5A7+7n@CM7>sZXNa-CDvD8kQ`B66G-iE|{f! z4jxJqNSse7{BbFzXTe1)Fwfk+_EV(MSbg>yhy`;NzMNbt{#M4O%hE>)CK3p<%C9q! z7%>CAMuEg@qM}HXnzwq`BSo+})mYtaDso)q8om{NKKd4ijzIO&uE{z&iYO|EoTJNC z5MW8lwov|8JRg6I9nFFqH*s0`AdDUA0Pi-!1|Ff0C*8vrA?^5^=g#zqe#m`ipr3Lr zUtQrgtyX?_%G#X0jd9{kr-^#=Shmn6{jy9H+>!2d$p}-sm5|e&c$>)T%X|9g^qBGK zgcElJmA5(thvj<$H(nxYZ=g5E?eh|Oa!eG#p2q(fG}`AItAVm3JXtBrl0U8jt~o}Wjqaha2neMr1lx$@uyX70N|+#h>scQA2e$Sjf# z0w>)!p=ay}0F;(!dnpoDjwA&L`a_d}9l-%dfNmGEW#f0Lp;GL&od{Y_=| zYc0suuj2ZAubgigAhD#;DAv1FL@}xNqf>fL*KPBoRcKZV4FgB}IIJSo2OZfklj0z? z>)SNiFGjfF?4RIsu*9LoB43;70zf9a1#ii`_b>oqS2q=!FjR&6&KTO}k7n88uRsbT zWmuBc+2r$*ORet3KNOh<35kqvbhP{+CTUV3-lLoS?nbIzRYeMUY*m}-o3R5;K6VIv zY;Ml}BGS?7;JIvuM1j(&m1>HeOBdbrUcR#<$o>X5W*rfVoQCN~{NgWbKQ%*if1X|2 zzIyQ7ig8xg8@TIGQhP7wSFY`@srZ~8{O&i2cZIzT3Gufyw^xbxxTR5~d#Z9@Hg6oE z^4~0OvXmy_Ofjbw7rpcvRLrAmqnOJfMny(x8Y(JpR%O0NTh@a516<7RthtlYERiIe zipay;^-N6REVqA#o~2MiDny~m6a8jxBs?AxS`;{Q?CQvb#SCBe)7 z4qz8rOlBdsbnDu+Bjd#)O2YVJ{MmN(pTl>zdbo+~cu+Yx#1th=n&xh5B^MYueAw(e zB9@o*x7QWW$9BdL+bXm#EX%YbkyFH%V+x1+V{m@gqxG|nfNk+rAa_G+Jp2aoq@O4M zUy6zM?)0o%;NnZl{ms~6V`#&9!q+mcYj{a!K7X$3^*`*vbdNac`J$!$b)OmD@85X1 z-3UfkEQuck?R|<@s9`nIz2U@aH1KlRazJW*sv_N}^?0<}_4xSr8-WDs=h zNz}vDvHF@sl2qE!srN^%)By{9;svjTb|8pff&#o=RcJ%&)SN_+_NKTONsBRgl+ufR zV&_J|^-cRQM&-?y)cC^QMlMLv8?x%4{f88}1x(u`GqRPPRDNWq^mpGOUu&?34J#-K zQIzT51KXDByX;s~JKET~N{_KLB5p@MygL-8)kQ^zJWb`OpnwM-M@N>>HP7ViaB+Apd(w*x?JPI>=Y%KB zM^!2zE4D89ShT0BjT!R&*vlPyA_$|cfgHVZSUw53Yv5g$wajgq-jl-3RjYWRT+=+< z=X`sBiA_mHqQ01r$AvdR5q|>*#%phD<5S4<3W;R;b{EK-b|T!jD5QF20wQ}rt%!@S zlpoY)8s04rmz4auVJg~pet%4;U}I?|0NlJ69mPb3x7;TxV{bemv+lX@o}APJ0H=fj zuup8L=iFI$pcUb%Ua=1!*yrh&%yBVo5toz_Qa9{q^R+bl0Q6Sh9#16o?XCR3B0s1& z-(42^SYG9WjOCDNA5^KXS@&Unaop34z3KcHJwheeR)Imp%ZG+x2F3#uZ7mJ3!xnL( zWAX>vuJf5bZ3)JfLY4??5k(MV%csAyh%O^of%v}^hdCU7ZqGv4@?m$=ON~GLlTm7% zCHlb)#Ax`_=Y)tS>RlB`^hk~tX`y;olLjtHUyv8YStc`n&1p@m&!;7a`eiK zEe*O|bco1;Vz&U@G(w&-f~88xkfp|a#N9m*b@ z=SN>nx$-3wzn?M$CGRpVCu*V)$Gu=Y*Rp>oMGPO+aSVNrMrL_w5o9P7VCw6_t5e%NG{CFGuV;KRkx;&gA{`q`_AnJ_=5^?zi3JquwQ>mE_A z8P(vxS21#1PLuEWpg4?b=vkXuB9z3``|*zInL0;|N_FOpYP>>5PAA<)lc#)L+d=w} zxQ=M5pzoimeU+X$pSWF;gMWKUf2{^}V(>jH%tpG?7I3lPL*s<`>wvnOJVl%V#d=PN=W^IB0*cbQ% zcWt0IZFiMZXPhA+m#DOOubizgo4NR?F<(Jef0eLyBh54!cL?E5h~g)oM}hlKV#1f! zIOqvizr#`a_ieZM-uKVr{*-?lcD1)>0(`x&R2rKyEj1F;(hNqo>!Tx7*-)a}Zys;3 zWr`}jmY*+WvDhs)GxRbm>D~|6Tu`q)C6gVs=cB(_BXOnBEU1vmuCbLr_F0_qo|K>R~pWaI`)v zhS0uo8wINlabtZ%mk%w+U53<5Sh=8!$$2Vi;D(>R=JAEVVs8=r+3j*g6-YqOr-)Hd zO;#rDL>%Aqd)Il_djI;p=d5-1UZ20R*JtOt_ult#-Pe6GbF##8#mv~$ znB~k_7M3%oC(Fqk%LA4(|A)taHu*o?;>?+oFDyKl&gh&eJ9p+5%UPZ?=XlPX^stDZ z{?7~lwKvQEbDTMQ?)-&|te4o>IZiLYU12$U=G?in=g(cZaQ^)1)e)z^vz+I-aP_8= z!9`w6H`ZJJe9Euh6*m zO&*z=S=-p!f$SX|-Jf}QdU->jfkDA9LJ*;0Z{9}7#Ky%Zq@};l$jthXo%5-%sJH}O ziYcqDtH(7oHZ`|&b@%l4^?w~0oS4K<5vFHmi6rv!kCoN6pX(dc-@AMJv;+E|!~ftq z!*cF_ne4xS{eN)roZ>or{`|S~tpCAv=4{C6I>&SV!cC=%R}Cy#-TZlPDZjeJXZWt5 zrjt!V#frlJG+>-v;I=ABlKLNL{}b7N57_JfEoA=-*#C=*$a4AInbU`Nj)z5`g~`18 zDS_qx`l>oZkEU8hD4eiZjqlz600)^SDPYRBV?d29-g@Km^^m}84FfcDi2O>vSBl4? z;(MKj#%%EJt0-UnxSXo^R&XIbEIe`hT$gt8aCCn{$&}A_(6fey7%vyF?NlM%Km1=u zNEWB>rXLpyyOA&P8J4J8Lz(|wUx%*Ae5O_DCsH>=p*vbqB{~WVSDl>fVvk71i zc)upp$K&gJUKb6F_M?l_^ z-=3h9)#ooqZA=&WT}6Cj8D37kdRaklHAc_pB|=2QnNfJXroT$3wjxMMCID?=#{2$u zhPSD-v2!gbdD3)05rVabS(gcI$v-kIk}>TnlF-!mQbP>NnBpXbWzlt}<)!Uel!doQ zMNCI*(2UrcJ($x4h*AI4aIT9+3+t=GI5|V??6}Lq=nCAUN_)0QH4)yTwXZ*@s!PjW zUQ)u20BOt}auGT0J>Ko^0G+-dJy3gi!UF0AVcA;~AST>)ka_8VU84Yu!+fA7rsD;d zwN=7#SJBrI-8wqxckBtvg)1j4uUDO!Un8X`UN0lB(qoP3L*%@GgFZ)K5<0b?)+HVj zwixXjG_QAEsz*d1_7hZaTH`Q!e;dyUyHilqs=S`{B<*+XZ>=5rof8&@zz#WN+lwmR zgJRXwCN3g%>DgQz$5|w}MrQzOD>qkO7cP$*P@8QvD9fcQ`UKyf<9C89a14lykYTY6 zS7zqFSLOV6M*5G+VF0Qsie4h+=i+GfO1x<8Cs;OPeu$A{5Ssn{pN|n0lH4An(tU~( z4*6X6cUNsT!ja7*PY^_|JRcoN_LL<23ZMwpY^Q>@>{GTWW(x;<30d?XE{tlfl?2Y6 zuuL1=2>#_ypI(vbI$3yEn!nH3IbrEE>{u$zT&!M;Ze=ZcYCVczjT@ zifP*KnV%towJ_!_d~voa%nc3u$Hk#F%=1&D$v5-JgGOryaE8)(R9}brg95ZAW;oiM@W)iD#GuNuNW3u9x{DKAcmToIy zd(HOCRDr7ybiX=C7T-P9+m+#Ch?aKy+3uL3OTXRxtU1)lD*d@-Qd^PYB9Iq=6MlNP zs||Xk3dkw*zI50VY<(um%HPFTuw+1SAv`#1)uDxC5mNRw3 z-s4ZDpZvBG?Ug^DIA$6wuy?}3UOJ&x6&I$S9SqGpB2Vvci^)IYG&XJTUTa4y&#Sl$ z@KI;8?X!_tj}kA%xhClWlY1?@$@iFjZI@jX;j!hhrPM3sz`V(TH^pps-lqd?rdzfl zz3pMMB^=z2?P6`FPq5MDBAN-oq%BFaq5_ecqzsT?2*7!809^*4rhy$mHs>Yii6pGF<}MdY4wTQ zzo+sBe|IyIQ9_4=4j8}4SVs@**_T&|vh~ios@zX8GEUL6Z`7{I0G2h83b%MOV1)M* zb_oH|%SUsP!0gZB9sZGH;%pu)sn_TZreAKh0!gifS00(nl~;dfxxFpN#l>~e;vIF7 zWN26H5ZW8R7>B)^l4`)CF28c4cxF%^(F=mB<_P)k=z8|(9!4Upi} z0rHcsIEF$`4HS341XdDH}P|u1s(H7XhP1Pq#*qx%mfJW0C$#iyRD@^e5@Y zp;)F!s>tlmhAe?B5hN(!yG1E+(b%i0!~QlR|E5@m+pSSK=D6Z^I62W~Ou=KqCpeKa zY;;>g8R6FlB4(nO!jI;|JBeJWq#dz!%b#UL*HS-*jp{HQyVevTYU_0OSB1o+N86N7 zdtGcmMStA-bS8VAls3ORz-Gh7rg*1w@LHwokMHx^WlBlSxd{mX>(^Pad0wHB4`j^m zVKfcvB{gk|0k(y|G-a}$04$%->c1CF%h`PV_})#+WS><6WjPbfz(kGQpZ=6c7un1g!&86c;PI;AhmThWa#D6zpN$<&vX2u!ny}vQqjOS}1M&Bt0qXv*foNsHtvy zThUtnhwbA)`gBj-rUnh$AE#s6L^AA1Y&A1IAN~D&PCIv{$v5Li1Df(DEN}CF5s2n_ zCcWBQJU7Lj{iavB;u@1ho-}N1t5>_*5vg4heh+jy?%6Edaz0H{{OvyHUk_p{m<=R@dxdFf8z~%8Wf! z5Th}(hXsTyrZF!>bs96Ys7_>1cgLmmsCvKCxXCw6-aKIugk1d@DM;Pj5R()kWT-eJ zo{}%scf>EqQ`Tsn7|$v+G_xfVP426kULD&Kp#GqqZy<6P1EW=>mzI+=kPXQ)X;mWk zs*-}rrw?(8aNDs$8Rsd9XX{;N<9Sivdz(wL^7JIWbPLLf6nr3*Um_Jd+T8QSiikT_ zlujgv)nEnyjzyj22{hxXXyNj{;QV~&ra3_pMuGOSlLwIws5l~xnz)xV} z@xQjpJP>6wb?FQIDdy>}(ct@5Tp!l}cB^kcN_qt&KHt};d(BJCzkR zmq+tiK6zqk#K-dATxb5kj~+omFAhz%IXLTDc{zZBPIDvI`m91*1>v`^_TSR<9vspn z{xPhGuD&RA!jgk}iIWcMxQY~Succ;UxQa=s@i~BO@+QK!ey#^))iy0jRUU>0g|7#% z?`;l?8@;ywM0I@!yU@D@npPJCy%0Sc^+{@bd%4Z)i`a!@^!~9*_ivc;%p5fF>89#g ze!Lp+B5}6s_iVXIXb6AuA`OyBT+{${TRwsp#Tn@kPFU6=mcsS9IAKfPW36ZWi#M3^ z)L(gJ^kqA|+UM{g&Tz}gVAu)E<<7uQKlMU#Nk{VBCIsTd-O8sLpvJ^Ig{lYMw7$hc zfg07)=lfi+qy-VrlZyg^9wqF$?En zLa#1&j~gDYjCNnw=vTH+7SnanF)L`*>tk&ELw}C&)iRyDSgm%?r+jm6uJj*`ohyGc zdNjY>__*@wOZV9#-Z{ul>JWI=i3CcHW!%*l2bSO((oig|(j*YUIAbY8&)8(g}ovDD^NmM@xrSrI?Qxp-^s## zG-*>K2lb1;3B;D|?s2V4$O$cmg}V}FhqoIzeLAJG&9oij|~p1~KDX(#fWep-^;ksmir?{+DGERX+5 z`y=_+_}5x4c1N_w&`lhR_8MXfM1L)Y7@OJEHU2&=i!ZR@_d@j~=q;r5#|f*O zWbW;HIlu1@_~-jtnHtn)N@2Ie!{5W21k~dMd|l6tQ2EiExFQhzgysD6$>8hyv@aC3 z{?y=2U2d}at4ex`F0AvQ`V!8<9n_IVn6|8&OinAwTAOitz`5&aAkjm+_uZU@4Z4+& zI=!?0arz!AhAA?6!r~pr@GnP{bUV`%%Qg>VyTMoIAT_3>^3+7oL8L4mE`hIrUo1w# zgJUu|(D?04=S#UzjgQGo`V>>F81ab7ev>i@z~f%G^v5!6_2YM>+98GM_HaAm;$JP} zOXf3^RIK#soUSLkP(C)MsiuPxt0&8gr^ zno-JMl@S#EE2L_xVlYpxS7x{SPqOsDj2s0I$ZW*xlHY^;(Y)p<*!6YEb&uq_fM0 zNPb44Bh-*_rx1hf!xkEpb&G7~z~>Lh0=QEH^w4*g#Lv3UBl>OXC?_n5IC)zSN|Io{ z1VyqVS}m2!yG4EhLzXwi1(KujoW~hy#rtj1CCR#jGxiHEgC!c=th84p_DHVd%K9ii zq^CP zSM{<4X{xzyIpOzi)q|3KuP}A3bgt*v49a@Gr|$cIAO;o0_YC4{>`z!AnLu&ihLSbf zI2bZsXjOi@b<%TazB}-Oe&s+{ zusgsOW?hmgV71aSl^(5OY-;^yh{?u5VeJKTM#?cB(%&3CK*YhgDo!4c?#nq+L zi$qt|?_7MVk6YY=Ex`l3iC~7zFsz%1tBm(o%YWrg2J%L^{cIGcNJ-aR@&&Im3Ly-N^z8$*sEqXfb3B8T#wB+|{zwLz|2VHmHoYM3Q5aJ76A?e`3oR$1fwR45*sqP_zyB||It~IiC zWz_koUrm;&20MLPlX}4G#F}7*W*7339&Xu_F|`8V+bc>taoQPDM~X_l_-{(imL@X2 zPho@t)oR?eTjg%0PbsZ9N${2Te-{GUG{f!EN~vZQTg!kfyq?B!_8vF!zRjDSd==`# zXw7EJXo8RGXsk$d5ka8+CSFen+QGJW95(IRQ4{`~_#zc~NXYZPp&kHxp*?mi;dw#hpIRsuIi}XtL9|cqfkEyxJ0*rKJhnpuKW5zp(-Iq zZGXQw9yU~N(;UT3j}(PpoqjaF)vk2vD@7uw7X{jt8Rm4%5;#8pjD<+wbhn-`z9Lvx zqRVlmm{wkv2Lsi9p2BVBt(i8~PQv|sFQIu)^L9Nw`W?^q&{8Rua{etp-bV8 z=6<6P1n0J%^4ovW7~SBy(;1)|kNG9>v{ zqz!-n7-CKPn<6l>z^mBhWsNoGN$fjy*j8A!kxZFr)2>SO;GdRBvetzF{u?U*p7+h} z!Z@+03|v&wK~8ESlg$NrXKDw>&4K6!Wdh@w;?$~ci>S^M7D_Th3w#;z#;Sq-inJq) zcnxP?_yKjjQ9rpyh0t^j3G&Ju!*(1+aq5ds^npNfo>b?8WGh`5M!G|fBZOUclyB%D z1GyVAbKZ*3V|$3$t^C{6*nbp8qqlV2gGv=t=d{#xS>}45)jiPh`qts0_=XtUKN_9m zT1VdD@y3>UcL?--CU4(BsC)@&0mbVmdKJ+>8#GeddQVtlRp<3h@IijOKM(gDw?H(F zoSqk+c9Tnrev(^($EN-y@GD{)4FxG0Cbdb}0As7>KvhuO&?1F`e z=5`_V+y-aKokAKmQJ_61!TEgigTOz~r41zgu1+7Sq4N86;iZ}&nAJzmiMJGbj%vA? zb%M3!laFbTL0R+TJw$B2P(n?osb!(ipqfNtmrY^Z8#91^xgplf(#)dEDj>=4y69BJ z;%j~0Uv6~M5YnhPln`)A{^o#R2S4(IZ!L}2C;Qs#-TZlQHi~<`V%;5MDD*(!U0{*< zb7GmJ+CKWjY)%3o-Pl76nBO$Of|;u3cXAo);kGybwMPo zb!xwc5QtT=t+LqqD@NG$fH^QkB($mhx1!_1+OMcHNNGydTVDcPyjxq~!>_+Xi)+X0 z=cIDXt!4lEL7aQY_r)uFd;Dy1NA`_q>+o}ZQ1R-}#A9)ri>^LWU(< zDPBh$5=d&{o4H4yvnz6@d&VkreRiQ?ub3l~ggJmwOTHS;{)dNO)mL}x+h30DVrjvS zIFCd`PIe|&gF;eae2m!pNUT}3k7}u1@nvm)tTe!8%?gkuiTm??lk*spXuDza?e6&N zP90sH&w@Z!JKipQl@*Z3u~=rKO{A{J5rHtw)BXo7L z)4?Vmw0PyT`b#vU-=z52HPqwl^Ng3DoHmnu*40}|#b+HKQgb7o3a=)FH2yO$i8sG( zJQMmG71QAjyh!h73KF8r=;|=kC5NhhV`^%W*Vr`qu|~Vj(F@E{6sJX@;|wC?Nfv2p znh3u$iR$4+nv7LU5W39GQ@LTZgHt|=1BrS~lm!29j4$ILZ#P}XwkD31yIc50Ap zxX8PHQ;;nb(30>v=*RKL)e@3Oz`OpBc0CkVZbh=sb)RlgC*}UXVGp>S_^Mu|+K9feo3d<&?*v?ZT8l4idYz%ccb{O#gn7+=_W8$r^^K z>Q=mbTH)xPuy};f%PSx)tf~7EpgvcgslV~TJDd=vG$pc7FHX3BW_b#Ens8j&A8yF@ zjWiOFvS_R^=ILoT643155lr@w>hIulBif)7;f85v7H(6bqHkY_bbrh_*poTDbWp2Q9-3C*( zeO$kOYtK|IH&5T82{-vo+lzR+HhnX|S^TOe9|eJYBc17Y$?om0kag!&AEE0>Idj;s zjr~a{xg#8O9n2P;@UgVZx86;75M7t}hcU|EO&5&s@yaez#tbGEyv%$2?4C`H8m51f z|K}7&$5rqksM^L~GjpjNz@DD|7P32{58rUT0erp4b|dvceY$-uMKNY?&Kr)qe*{;C zC99anOb~vBCnn!FPwSHX8nlalKbWBZvH59kgfHnejF+eMX@~n5axc4ZR8l2 zQ%0?*AjX~cdz1U4v5op%YN9Y*sfRD2Et1$jr(9!$Jp5M`E?N1JTdT`mr`rNqK(8z2 zFLEZtx7I+^)9gV9M%gr_#=hBy0k0r{y)FEejsI@Y3WnR!#T%K4fnEXcfY&rG)fsL$ z3X>8LA5~TQua$k(ADJWHpgfycVEk1*t)rosP(qKcoZAGm8^>47K@MHB(9p&jgOEEV zEgu^2@ZgZf1oKTs^sh1JSY;zWhmyeDXZ4r|+{yhOTG5Yx75Oi8sY!!+0IF!g z2g2gd<}Z=TWqzke_L*T_9R`R>5@*s^9Iz(Z^v7aeFH@|68!~lh$7mt#_e5;8FT@U! zqYpAg+vyFas$N|Sh+6F5>Zj&U+a5=^3nCq;3RzJw^k)9WXobC0cJBk`&0O<0wgg|s zee`-xWOm7ni_0*2U1 zFpHv=P{c;s3CorW<&6!6`Ofd(xsB5>mbfj|O^YtUO%UKf*R;{c^&yCbNAd}Yh}nkL zM3MV)ejg+6M2_lnGH-f=>od@aLHg0Ou*kaOVlu}GOUw=isi-X{z*J?9jc@B{c#vU3 zmzMFWx?;?}2v=!E_I0~B!gwO~=_L`{W?IerGP{u)U-p*r<3j5hJ9JvVQj9=(kFDz* zZ*uU>eRe2-H&~$I?FL5Q%e@nAm2s``!uEBU_r;l(N$Wt>%!`N*GJIG-438n$8FLq7 zV3qY*O4ABC)hRV`zTDVUrz4AxnN0TfTtJFbgdQxL zG(mzWh`4=%?D)b#wz#%>93JaQPzyrr_oPF9DWk_jE^p$FEBgo5Fc-5qvy6c1#Sp6Q(QTHp?IakUEZu>{EH<`Dy;Sy0N zz-&P%2BCxXCjJbxI6I(`5PZ;rbJz*SYHLLfc}_MYwZschp)Uyc?)QobOzf{%MxkdG zb3^l;g4*g||D3asQ*kua(L?&)e24W_kk7XvIxd73$UV)NYI|&_!TsQVaYDJ7X6Zz+ z&~%2*V9DP#Y9zKv+vTJxHh>P+>Um-kp8sysXVYtRIj%dErgFO4bzR!K=>;Oq9&)Tx z-h)A9Ey`VPC54i=H~IptlF%|~R#W1gquYg$VyHH{zeC8W>tH%kf{N~sFmsA-ZBLW! zE@6%>u)q1sn?V1P%%7ZJeA{j;*9qdv_CmL1@N44Ysk@a?Jr0YSi=qWiA-&MRPl%Bn zvy?T*37l*)0PcAAmkx*w+-eqa2|HnVGUes4=Usn4Hzf1WK(aowH=ycjWllQkh*(s` zM%6KfmDGzGW#uZX1vAAJPjeA?WGA>jBwF8BF6H zqk!@Y35meM2*0R~f8ESP6y|Mj-+cH8i~2iZ{+LTMLvF4|OlY*Wd9u&r!?kiwbKa!l z?PnN(G6pI8ei@)-AEqW%mM00EPiz#tWL=*5T!ZIX_It1BZ~mb%cZx5|gFV|S zoS!pr%OU}o;r)a$jEp=mXR>^oH^9W?6l|?gRI>gxiRSUx_zAz4?MnHZ1}$P5O)ju4 z)D`A6mt1%8mrt9i5yPZ3arN;a@BF2O3VAJaV7*yK(>UGt7x&wo6P7PkLbE@gAV6gB zYorO)&zUk(P>T3GOos{Nil^)^f0}igp@-XLF?o*lEys04NgY>Vpy^ZDP(03j_$jB6 zY8!OzNj*V9$BE`}9NT&-pgRAXzFmcUCZ;{Er=AQmISszU5}gY?)p%8`mkG)xzrUvi zevstLzL{8v{jSYf5)X&NAtCZ3ZDe`jD<&la{^5Q{y8?Nn;b(K3(;|SZhzQ+;Zoks` zb)w7Ek1+Ur!|l4pj(hdn?%F^tZ%5}x3Q|@j!s^poVp`NJF8@2>W|e2NXw#g_wcksg z^h{PIf7x9Xj$}uGE<~4=+MxHNpx-wK(+>Mp-Pz3eto4N`QLpP5xw2K)T&172n!NlL zco)bC;(Xh$mgP>h@n`qr2iRiphuxo+MR>|34KNmcyk+CRQ@6q?y9SfYvveoxiTcmi z&zVzw-;^vm(!nN~%$daz!M znyEZFyY)dy-LTuKByMFfrYNav@aOGxBbdCS*21d!o!7EMvqVwP=-bTjks2*8E_`uf zj~j&0h3|2aEq;^XZ1a0Cs6aR)nHjO{!KhB0K=F5?Iuw0Zh5Dz8OOsvdd`%cPT*UMQsiBHJ?h*# zFBsANi0ZMBT{`dhwdyoUzG`17$rUW?*;+q!Lp!KJ1ramiVt5_i$|GuoUbj0eNy8jw z9I-NF>0TZbm{SKON!xirj2b$zCySLZult$H}UP{5*9qF$Ssim8sYG@D#pGkyQK9rZ;&B~Z9rZi%^`l$YMf!V0 z!WK5d@)po#kZAz{OSR(q#y}HDu_IJ~nysK%`Ges8nk2W9BI>rPCrP>nH$ynb#@1we zs$)$6DH6vGWi*{BFBxSTzVH%rRY=?N{WTl+x8@nUCbKkBE!XYN=BFyHhcRAn(Eyb^ zHaAMW7VPemx3ba`d5b$M$>o~EHgNJ{YqQ7bp~aG4tgA4^VtBqUzStfz98kWhme=|u z`-%#$=q0jC4W|2s*W518O68c-eR68&=y{}V;%RTvM1q(E>H|D+wt7j#I5MJ#b}Ie4wL2s^3MHgq!ZZE_Tp!z!YkxdNd|W zOyVw0_D0Qk?rt4gPUc$2b~05co*4P<)<9gzN69G#IWO~hbMZ?RLS{I3GJNtf@ya0FE}5#!m?oW1&P!StD@LWE54 z0{=vxn~Ij)U{-COqv~;mzmTJ5aUwdlTn5`Tn14sp=b;3Dq<3GDXBsd^#!zS@qgtr7 zQc)fw+?NL}%XqA=P$|5$FTG)xBF zhYJGUNxYWu^K*B*o}BXmextD=SwN^TsTkYVdiRVIqQLgAj&J>2{-;he>$o&hICA_D z+`}z`v`e=f3;G4U_EJ zaU7vy*_W6Zda8(pO%m!gxVJ(6laaqzBPmbLw90{=`lQxldVh{nMD}4l1)Eub)m<$J z4)JsMB+%;mVZr{_e-NhQ{b-^c!>567k@BQN1aYu@r;t+D*TVg>Rr^q(nUyxujD{(w zmg{q27vC1(J<{gvKG)(a+6Q$^6|=BVB?H!3pNG?77MP45&R%c((3xJ)io)SM>rT=S ztQO&$j1|Vk@VS4$4_eUL@Lg5%+WGBK(F~>Rz|a^I&35pXSA36=kRLEjrpyg2#=%*rq&FUCYl(L>4Hq6S>aAtbDdB^4NJ z5mW4;AEzn`f4ViG(Co(3fE&X}|8j3Juj32hwZEPv?)`cp>YWbjkqHEhAZU5OZMZ?G`g?PDS@7JN6q8n1YDRQCqy9nyz*)QbGZRf!(8* zeb42X6ZaGjMh^P-EGud1NCZb>_a!y^Rf0;pIL$dSO)HFVv8&kptp8p%nDNMH&<5?N zPy&k?ER+*tk5S|wda!9Odbcs-$gwUBCYWucEfkhg6j5wLE(EAShD-a3fRjTVSJxre zc#R^wLj0ajR9HKHmm4#$1tq;rlaTWr*RHq9aF4hAUGuT89Zm)JgE{x~Ilp@|RjCc{ zma-Y{pI{C7V$GkYZq!XFpc9Dq?_+`~3PT|fKG&e?ijDyk zgHMB&ecYnQ&iMPZ7>@D;U!~9LU0?JLYj1>wljb?PBK0U$@j9kuh{aw(=B>7|{Y36_ zkOtRhEj`l%7zmAUZ`SdBgSov87LVP;A~u*Ss%>E7#<2_A=vY4|yM$kB27Y^9<4dnY*KqaitDU6hi5i75 zSaaPQph^<4&@ONC<8pW~U8NID0Y#XTI$knG=@PCFGIJH?d|gkCfe>%y#~izEx8lwGhk&r5Ab)kC?)Tz&> z?=?yk@1~qa5UB+DR>`tWwh{!|mO?9E7Sd5v>yP#IIAx%ck#hMr#)>0kX!3UiP=Ddw z8(QmXT4R30@)VfiNok6#~!`+n&SB%XG>EvdE=v|?#qLz+1 zEP*^5;un#+<ed#+Ez?b^(HpUGvqSEw`1u+7LKL5t znSqKS`q&O{{Z}YXrUt@NN0-WB1dn?7dJjr_(p$0V_!#U1*ZbXdza-ZXAM{7jP2DkX z;H~tRdGDcLvYrF2qc_DIm&6u(l%ed)YZp0c>fBe+m zcb_9!v$t5UT;YwoN0DJ>VDTPx7$%;5b}-$@`*xFkamvCAKqHBD8&qOJIp}68P}Sc+ z#EL8EUKZ46nMCn;hOTz9iVgL04xinN7cG^=#hYQ3;f?x z>MsITvdFMye>LTbx@+ZRh{5pE&G;lGK5v_{<MWNoZe9L0 zhstSNZRZw^s(k7fegq2NiL^(#y*XhCE@-3>=A4Qfk6L{AER6#4ZW{4DIrHCKtmMY+ zH7pa~er+;RYD2$PKUzm)8659L?udn}UDxQTwZBkJDeB;C)mJZwDstR#9EnCRY*cSN zFiHNq6)(ggTfY7Ymq(5>V(cLwP3YL=-#IQ(gCJ#(H0hO_4wTVYwFux}RKY}~26wWK z3H2g3FG69rUu36$PIO0jUAyD8D)<~MkY2KSsvyq!v2dOuOeImo-W9Gd+-k&)ZU0~v z>8UeL#|FA~gc!!tIu5j^pk!;ZUu?aWUj?>(iYxC_`gtm#G(E;t)F7f$Qr+NQY9m-o zGeULlQVw(fQ*F$uca#Dnio#3dr{?wdF2*0^3r(pFThkIK)|)84`Z*Vq-l4M8%Rj?< zOA1Oi9G?mBmb@b+9{I(I@r;3-J3ix=CY)?1ql-YE*Ue-ttPf$G3-Sfs&8m=P#ES~b z{>G$DpbuIGo7BI0s))t?Znb?Z<_12pJ|ph-vU{oAwo}{cO`*)GD4YF50^*y-Zhyje zC6NAbp*3rdDunDk@xFXTtI`X|@%qbY8Bx1?Sxv_iY~(RB5bhIe)x=}l23942RwgFV~Q7B)qDGHsPv0{NU`Wmv;EAAm!VX>C&8{Z8o!sju6pd%O93uj@(bp^ z-0!zMuW#2jE?+3Pz@Nii-)$j+~%*tVO(2J8gNIv4z$gw@v6fEJZm`Dm1C5d zy3}#aTck(u&|=U9dZ2BWsGqvm#=g)sf^ZiUd7DYgznwqzSb#R{ckhi;N6w=0bW7r4{8&r{FHh?eCm}<)p^kpthp|xe7_5a0#Dm zbA;!_(%6n8T*W#aNZ=iAX!*SL?fIhRx9XYi&XgzUq;E?6)hP{-b}8`Q`h9# zePh&HK86-N;8FBae4$(~^Z55qvY5sNIROz(48HU4=XfQ(A;m88z2CGMnPBOb4+(X) z)$g4>cBcN#c%%?|dj%kP+&~X3ob}F^q13y|VhTP#Tp47qWM1BS@Me@>vmvz0slR7+457*+=T+F&12{);pv3^lSkOMmk zLzggBVKw0XTBQ`+FZ{?Llf%DOX|k86{B@pO_w^)n7Rl?OHFXWg=6SpFO355*jI`mWP=vsjkJCwM%fv zmCO8RS_Xh8iKr*!u6!(7+dAyujvyr~54qM*rCuU~e380^-WtSJOyRnS#agu5O|qi1dhd|@_MGFe7epYh6uUL{h~R188c3b&5x<~g66NOsCpp!(igBbq zuE+B_Hcb2YAPq_ZEsb#snLPfS3#lG%?h)J{ed;%_D_Vx1Z=d>AS>-;SOVH7$E|YfN zwu{Y{)5VUu9sQzpbcM41qUGlLUR4EkTy}uz35~U0D265aLn@#l%V6qxy<54Do7-_y zs@_k>eYW>8?T54%yc<`x6S|)`ytq>oF!d^G=1+1Mf;fY=(;VEp*95J` zzAg|^vr*zgt2x?x+aycNJ@huKziEL-SoVSJ6I2P_)XgJn#bOZ01J*6{+hQl)IJ7pR zGi6BnjA!jN8{b?R5kbetb@36Hmns+)(2z+DRFy5-3gKbrYT&SP*-M+9h z^97iuMa#ENNb;BDj*+HRZn|%YTMRFUM?tSCwftBiW99VhF6w@!_MKx z=S=f%xy&@8Q-z)p(M0TNZNCCFo~1-$iVs%rQ~wBnGRH=gu0m|Oj1}6# z=v8%E(ynEgxaX^ZVGTcs@WoHZb^G&9-8tYS9n&R?)7jt442K5Fbh4VooxXk(?SKIc z)K#3KPynTDEp3nQha{%tcLABBUf6SzgDi_NV*YwO2B({)Jvr<(@~T%PREg7_sgAJ^t%u5 z*7o|H`mnaD(;GIeluyK zZeep?E1{f#c~_wfM}_YL&}D@EXT5CrWy_lA%j3iTqIJTOF)Q%z#%Ehb&Knzk;}?6} zLlK&fIZ)egWbh82_BCl^bk1ORKSY)(*})G>p4_@Qb;|P+U3Kdl2%r|`o686H%-O#? zWfHc;*xZ~-rH%}ZtEj6fy$>6bCfpRB;hdV`%S{Q8>s}e3(yn^?OZ@Vav3>pzvex2; z(xtf#zZr$4jgAKWPVbww(TVizCGVoi`s8P3i%(mhIsv97t0#ON_{~E>S(ZJ|z)H`_ zcVQz*Ws2S(fBgCTM@g>59h59?E_I+;VZ2t?w2xC>HS;4@;bR$SV&wQp4}EajD!5EU z)u+DJ;US-nx1~D2>0z?9eNGuebUbV!Z23wOkoT9GSDKqArKrxd>01Ln`Q}RQWeO;< z;?Qu}FKU-==P`-n3^&RgX(6?Up^sOf*NuN(&OOPMJL;dR{C>kk5U3|q9LGss9xqEw z?eZnY0a1PR|Ql*QO2qAcAJ-#*8%6ViZvtGbHAYp?uPr$d(l;7tGh5WtvSB0DFXehgv=;L1m zOU4-eHEruqm~Kf+SvmTTDY@BojvASswIZrVVvYt1Ba(ESS1!^L2)nE!HBh@Bt!|(3 z#m)bt^&h9@?6j4_r&68xo~QW+1}h#NEgn$C2l)U)V8KT2p%~AsdRnvv)hdm~wWhG8 ze{l)Hf(gMU95TftAUI7$;6qXxQ3U-MczB4e;m_ql=ltD2XKqCMtI(y3 zfQt4kSkv-;LR(dgqZ4oSRV?D(2@sg z2tg|#ujQ1Lg%`;_U8)C_CU!T12LZ)E-;Jix3tM38kLJXSFPEN&GL@;(2}py7?+9e@ z)lIGGDBhgM(+6)rl~eoL9V0@M!j~BKhyR7Km2z(>L`LZ5R-%4qFu14e=`gaT#EN?L z3P!>P-`Lnh#e6GaonrV<*FBPtFN(2Dz(F36*Beg17Nsz!V=u94BgRhZt+V&QmoYh0 zUPjwLqFMBp^ELDv)_YYlywvC*N`?sXF7O}G2FD$e#N$If0YF5r5PeE*De+jk`Wl{( z1-;qA|G5h6sb2m-?G331v+kZq96}^aFHtT3oH@hrrAMs%IV0*128wbtq`>g#Ka6DS z3`m7*6KFdV9L5hK^f@rN)VvZ-DxRC&TLD(=WC>5}nZ5tiz(;9r;^1-PYR~dsk@0lX zPxy<+`;BxJjJHhwDgx=LZB81^;Z5ls)Im1%+ox2=R0|lPOPjJug`k1ip_@3>I~T6R zJ}bzNrPPP`jxyt@+$~KvrA0xKWCQF;k+41U0Mw7 zE-H|F$~Nl%gkEN&?eZBaJ%!$@H(}VG$XlyzynYL z-D6PFCh8})uT-3_atJ+5>Js)yyEvdFR!#-qYj>m`tYIoPZyTT(dU=K)x~6oDuhja@ zh78ZMs9dLUklb`{yG@1$LzG{4nLJMVbEegg!P(TSj|&`70%~2qewC|qw=qJANFWDb z1N!V2N*T^BSa<54QGT4~Jgake-QbDkG+(Y;D5kQrt{4LKi4|`)*_uZ6ah#`1+@o`! z=rUBt_oGw7iT^RKS0lBj4>I@w_t%vj9oK58o+uTt(w=WkXg;wP`;o^-0#P;J^2iS|%1E~pY-#uQZ16se#8dev(fdk!Iq0(M(Qka9&8&B z!lIk!T_DWM(Y%}XbYEwWw&$-z-6%sRE}06|75_q8oo_C9L9ZH0b(M=w=G%5RF43Jz z|2|N<6D5LZ_mm+2In%FQcpBK3;X_USjpU~IHw$y{gMkvn%e}`h8sq8W-@YBk%u-1V z8R%+no?e{}sNJ!c-PTcMY9MuhX@)7|JXK@+`tlelSwCY~v3ey%seC$X^X<3SeZLY4?bi_Xn}NMBm_^Zg z_U80$3+I-;-l~VG7()Y&xHMB)+mFtKi1X(=}|Fo8|2w&L{_n9kmY1Rh>w@UoFTcT;w|cs&s%!#&51 zJ>(0xJy0MwLTlKjo;XmhMs$9jyLdgCrK{2x)X@x+!gMxkSLKM2SZ>@6-p}}1MnzFX z#LwtRL8wjrU4nE=NMIE(m3i=CLI+$~hl5izcNqq^A>p=p7Wjnz}Uguf|4_V z!`r*DzC){GFT;vHb)x*0IXOr^%FyAbv5qd8Pw1#dkRi^_)a)a!O>d%IM+`(N!)ON2 z({6ZJ7|lLYxth7*Em=akf1;y=*LN(B>RS|^))V`|WTWk-1Rj`%L`qnUGndG^90aB) zH-sdO39a2Q%iQ9Nk|$!6z1zF-?(2;-c3fSJ#1z=3xxn+*+#oj75&Q3m-@%_VfiDRL z9QRUdD8Uw9L8i{-ZsllG>VR~d4lm18H*Eo8hJIFQ$C7-*Eht+|*SeZtx+N3_@73_VMqXl7RF@zJ{H^rozT_$BQ`(tdi z=6vV8uj?nS+;=?lJ+b*dj=`1@ODy-&YHo`u6JLS!r zH*3lxH~1to9?^4Zhuk-IH;k>=O8M0JEe9=1C1MxLG8d6#wV5>vsRXj?5XbM&;nns;dP9&=(ae`rG+Qmo897{va> zO5%L>#9*yNnb3@MeX_#>)MI*v#+8bdohtNbom4(L3OvZ@!(Kp0+-ucJ&mdc~Lo}R( zLP(yKYlUSSxf<#P5yO&ey^9pmq#(IzuTI$$?(_NqyUyUSv=N9Iy2OW6t?a4Z)aQIs z$B=FJ!UBh;00g^iF3xKiNtx&PsRV^-FBpRx)gSJ=i$34H^LVnNz;mx+C)ai)@bOOf z4_$I#(viMs)FnEY5;vBRM^K@hh(3Nk?ra|kS38^nZ95yd*xNJ5CgUcD)TW+&Aw{+f z6y4YO?G4o9y1S`*7d`;Pb8d!7{Zz<_H49)!=hpEfzgMGSI!DoB=(k>nZD^htb!7;qo=u7vp{K>`TI4fW${5}J zNu6ZFw9i!9L2+p!$y~kAq(LY({2e3+d^fO~ah57^*gd5qPFYIQSiDL%Ue;vFB9*Bc z89JfM`uuL2T4RZ7FpS^F@C)S_>FR1%5B2;=v}tf~Minn0$29p~Ptco}0|UHb)Qc4=d4YY0|qsqc}OqqH@3%8IFh>Z7nBlwx>5+2$kfv z=6>dBguEpcc0`y|O-3!ztbgvJOqao_f6nkCUS&#`H~;0nLFU#9P6f z*9u>))x0r{ah$DW4TW0*b^vGdwP#55dGPfYsT=m_)bxi5<@Wpu#r`%$5GR7IOL#WV zj8-PfD6`DY9%yA*(9cMJ&OAf1183GdCQ*pLzw|5u?J>*Hjt0&^?k;pSozN4m42%ku z^oABfd|<4u5T|y>eLYs=3HXzTQ;GqYz$d=&qa!Vk-7uNbV?a4M&rRc(%v2!vrEPm_ce6v%|R~xVWNz2NhiqZM+Df43eG@^QuDm~U&dpZfp6|=zGWcOpH)t9O``Vo{ zM)i{nxw4d#B{q7J-WUq%tR?;KL2@7m)PBkRF1e*U#eC|Z0kiQ9uMsu0HHRIE9L1q=t4RyV&_%P6%Ka^^m*dl+AQS*Ec( zxySMp%yLoFv3mPvXfedT?B#%+J@Qx4s*VnTd>U}%M)9`d%Y~dk>#SU)H%B0T^V5-wxKm^c3oEZVW5+l3XApymL6{Tf4_bkQO5E zpHtNjw6Pd~M6laaa-CM18nVT%;xNI`h4@m~oel+!K12q+O}lqzr43hKpMFUBH95Iu z{{pVoAz+CQUQjA7x-?;!L3KB4Ai|rs;O6AkShW#0LJ1f3gno+xWW0|&nzhhd?M@Be zAWZnW^X-0~aLFf48>Eu5z!xZ}ll2u;HDnAD9kF+j!4o{#b%xsdvP+n*(pREPO^B(Q zM*0S#-Nz^k&%kW{)E~26Vl=%Z-GQw4#?ciUy8wP*#jY99EGssh8#azK!k?&)ogZn- zTmXW_!imE{!Jiu~27X6gu8Na)&GixbYG^rC{<6~0;pip}W%Vp%quQ)?vw5w0)KT7W zwwn5eRWKf$FnYW8@=69Kf416Q<>N3%YVaX0C{$hx;?OsZwi9W3KMlE;nfbE%(o`kr zUg>mh9`h1SxubTY-3W~WZwV<)ACkICVxd}{5l ze3@#IR7?vd^S|s;rE@Y^DAgb~xU$l{-sArLtu1pwciToic%gwr?JpkJvyv^V*WFWZ z-Z1Ia{4MdZyBSMpTCo& z_dKs@wJjJK3nis$)O&2ygZi_(vkQm}-mpWXX@-w->3e!gKhf@omuh1|PdGm60_~n& zhF(5pR~#1ZoZ{1(;`!2g2B&?I*5p3F;Wkoq4BFSa@0Pmux$Z(Sglx>7Y0m4GGIo=W z)bXEc!q}y`jyg)%#mnbR{}?>tCCh`niE202`HD?6yUP&YMiC|st{@M`7c&Lf{!l6;k?Fcb7&wb|by$CX58HGg#o~F-={|yUVb{$0rNu{N~Cq4hbTfF*( zG@C(5<<9V(Spah8F041CE+_B_$QUxJrhR$mCl>bX-Q zmgZvgSvJK*L(|SuZb5{w8CQzi2?lAQ9NSy)+b%QZow!!~Biz(JqHDfp5wtx}9>`nO z5FAvs8T}aF(lLdJ(!#R)+|J&7Bw*qlq}sRq6jvkXSZ$?R9Rs!{ytiME6`?k7m?hh0 z?0A#H#ePvluGm6flqfxXKa_r(pVd*~l9gGyoUw2sK3htYz-ecLRff1VPfnB$#C0>c zGY;RinXDvOP}@)6dES!EXZVr@+`kY(y4LrbG@}7BXk8gADE#!TQg$ zfY)o{w7fZx6iBvCJrEV{IWA3LsA4zVh)Ls!!X6>|WV59a`@P%I@BK5EpliP$sPCX3 zkdVJTygr}r5dP9wf4@Bdn|TLF0iIB2j@1BcyQ4DB+6F@dQ$h3gi9 z>hVzxo8whDJY5N5Wnq;YS{8Qw9LZ-3VHa-7b;OLWQ8XWY;51e#@D|sPA8O#KnW#?d ze}rYx%5e<09eD4QE$dh;G_kstX7(Io6|$>rKE%s=$4d$8T?G@OVyxMXZ>IV87RFiE zSUHg8$K#;Lrq$v*t!7UPQ(utmV^Mq+*kcH7^3NGdIzROUIQR%D83O+38U(5@k2Lz~ z*XHqhuO%xPud%GT@6N96FpZb1Ga&|VFs1P0cn`Jt2)KgPtj~mRL%f2L(PFRpAixsP zk2{D?jFO@80EfPg!SY6E#!Eg+^7cjBLW>NG**DNd&E}bRlVFDrc^1tySNv3&r68s* z%aJ+i^1UH{O+f!n)KZiZ-I*r6LU=WgNS*`j#@WJzT5x1*u8r_wG>qhh3-o!G*X|qZ zmirpBWLjxXuHGq+A!&|$8}FBeD01Wn0ks`_w_kJ|Q-30)J6Q;vi1&e@VUuH_wQLI< zrpc2po+upzvd_D_LA+GQan)*Dmn4izOheph5Q?Uc}{(5Zw>WkR3tOub8T zGd2GL*jTyjzd>7q;}^*$tv79JZ)*9ZjGFH_)N6XQJIL>unQ3OcFcTu|eVOqt%eU=& zAffm?C>@=KN$Vl@O?~X~eS^F;e3Op9og<%arTNY20ebRjsz*HlQVO#_9_(FY1Io4N zi@-m1Vj5mC{y@kup&u*^B{BiFkiUf66kZqhezWBEtXdMTYW&f3?Ka$td?43+n0smE zd19GL>8g8QG}V4AO-$~zbAO4%(R*B)TGu7KA*PZ+@Die10s=3;)?*B{4CSf3YXOv( z&+jY_M03%ztT`xxbwaZg_h=qdZ<@CIM(*pu6WtR#<~W!Gf0nZQFSs5z{aj3jnwP30 zQL}`EHW34a)=ro_euUD$VWe0s9ykj8V@f7PCoq_7Y^g^Xh>(d3sa^p@PrsRWY}?%p z9NVHNatuehekjd{?EJAK@TF4$@4->rPqnkuliv0#os?qtdsAXNy8PtTwWQ0c^b@C& zfpaY>mXiT8Gb_`cYA5JNxh7JjMJQM;#1wiRKQ8;(a~hnF`M7## zRz^H7UAh8lJK&wGq1CsndIcmqZWYhZCWPk7Rb&*VmAR+vAxq;M(=~dY=2!{#*$?%MezcZcJf3YrYm)RG)edvtc(cCInzYJyk4c70K=K zM92EZX-ql3xvjCoJYoy6Q|69VctdG#{=oSuMHlnMb}UfV-#1M%Z5m0S2`wE~N2*Z5 z7&qXk3k8J!t>tO+=qn~$$b!XJNUkTO6W87!!3bLrTQskz)ew7>ZupiXe$pG?(nLKi z9_#yarrw#sb7Xs31+W~%Q@a1^lA_-uk}(Ya_PTPayFusFZgVNm=XdmHu*A@AR>bU* zZAa1Y3Jk8S9eDM#XmMw(sfgJ1Rz9XxX~6D*b>E2l;n(I#<_)(EFOl(`pCv1U&*)CO zMlIAL+Auj0)mYj~iYkw;Mhu%y?_<19OfpnF@6K2Yi%2RtlM(zFN?=v2^idVp_H45#H4{a+$kQygE zbSz~pt_Ep6%kYiHZW6oL>AFDc_%l+!?^q9o@%$0~AFVWYo-pgiENDFz$vfhlzZ;~e z^(6eT_{C}5UvUAo3sQ(bXMls?Ng%1o^t7}an!!3!F;Aa&rST>tO3?1B7epuKkukGL zb#o*)0|@(4yb^^LBb|Xogl`Vb1!nbOf-$a@-}!&MVoWlBMh$BKjjQ*po|-v8QjOA` z0N_Amaegq}*uJ5Kx_y)pg1LUsG4BpH+Z-h1PHY`TT~8kxwvI4ixPzEDc?GGLn1ne+ z3eyJA?P@ffHKK8P`FDuUeHNshuIl&D+*UWgKK@tiH%xEPKt;zbsQ2z}6`8!_m$UA> zM0S=bR(f_{9egZ+Kd;loVZE6HnXN7&W;cA*;d___v{|@4)4@4!)wXcl#$+r;pf@X4 zHxtFTI+TB0<@hgQ1-i23c)W0D0+nl*Fr(`7g-^_eIW$Bbaf;`|$vZ+pwUxGJQ8Ux9 zynGZ;G^7CEu+b?>j^2u*_wFt82wC^R(zH#eX=91oz(}g~K16K}#1=shng6PW9xhgo zR2N=>A@arn-8C>*^TsWfbGH9sWO8}046w8*yYq>a(Anws34H|%bj4Mf#X>~9HA zK!R&F)ej%<+N8IEc{8wmACOcRP4C;6JxwQS>#f;xR#cm3IAA*Zhp}?^Fq$*5cRbeZ za|=91)C$6BM#3s(1o~2)v%^gn#Jvislz0hM!b4yAnjEcPJ!bZC&Q`&8Ha7VAMo6c= z8DO3Mb0(wol1}t{Fj9){%klLmgQNT#cw=@Dp#3JVXO0s3nl{>F1J(0@p(6Bo?qO@5 z5WF9~71m%-;|i^>d)1oz+&P{Do4wo{FQeykwf`PATm7^2Zv&HVW#=K`a~YjetFo?H zza*F}!GKdo?HSUdV;Z!3nU4OafItZ2D;UA{8PXH5?m&pTva9UMD`oG=kcNtlamXPW zahP|NMM%`(e(Z~|+3?QdjIHX(cSf0pY5Yp~Y&HRp+}CsQ6aQuQe|;DG`Rp3+;qL;h z$fH>m#p*1|H@PwH|Ih_?qw@AxJJyPI#YmnqC&w2nc4oh_rDO!v_QAKaPUIfEqt2!2 z5ZQ#XP;mqH!+zP5)%S`{i{uFB9rq^FWW@dWrX9#^6|>k$CZCZ65$V|aT-<_+kIj2= zC2ES|pIp=Nn&+;M9oNm*yAVmXHB$-k0PGdIOB;cKa^)Dk5R!aqMG0A28lhst(_9JtC<+K}ovfSY@0#O=U z-Bh!-x{xN6A+2g>;RcsU5`TWL{dYtvaN2(kHVOU&Q2t^_jlq7l??(xA{dD1hCT-l7B&u%NOwx&}F^Rl+RgutTsS zGG6MZXa+ak6OQ&;fE+r_w&pF0d)iS> z+_Xv$MQiy`y|*l-MjJzl&2+W6wv@K}i~BJJ9^Z^OncaW!8nYNH_kL&2bHr8}smTs; z_6?L^8q)(SoA#kuUtR@0*Z=xh& zDJzy|2Y>+?(hhm|EfiMu;}rtC9I+`>Rm|5>ZYo-Yt#PBj10IeZ)4?gveDY_gf@|%g z+4JqufiR$qTUhSQumCtjrB{npI5$hbMhSyC-8U2`l5$1ewv4D^C|JdZe=(m@Y%}LZ znj+DGbDy$lO^hhICl_Y4_(YANfp0|+jDtm&5`0|w4F3HrDfZWgd#S9i79X-_{aRVm z`$cgRz(VYKGwlY~%;LhW#kKY;6H(i|Cibglsox&n;MHA_IDP&NE*d2rn1-V^GfWh<;F^$zh)HB-IZP_Y1%a_O@Bm?CQ_EQN6FTatI4@Xs%c*Uj(xrGJqiNR;NDN8R24m`B z2Gm+%4Q%}x5Ly`dh%ld`0 zLwJzrG;I*3cB}vPJ^J!WVu|>i%}1*&tm6#IC`UG!;&-WSz^2H%FnK*&5hHL%edg!r zH{+QyTOv9owwM)~W(M%`jAG?AN6l=5A!b&bS=o6yAM85o@@8klvxDy^1Ydu2E}k>@ z97_IY`sX&kz#&gWZ)OGe@41tRs84Qr+xGk~-NyRWNlJNfVw;ENkMWVpo9hnhT9}-; zA*c*tQ6fzV!|jaccZwejC4F*~PFhJeJRt(VMO@xb8Wl}YSy4$WWe3zVnckbBHwu{u}NnPKU2dEqd}-Kn8fr<5-x z{Ok#p@s)N0@|lP{qZ}azN>#NMRMoO`^tt|5_d$Jb+*o{)UL1D>eVI$Jk2N!ghM_$m|6?sMCnW><96^?j-B99I$Y zliEt&>vk=OE>Txh!m??X2pDmJ#rbZQ%ZJ=8CtPQT7)YzCvf67T6w^1$eSY$b9DFmn zv32|Ni9T~CihWAw1(iU)kc6T;+m`knzS<Tr)V`!Qjmj;i={kJ(y$X zJ*7JAyAN5uqn|`E%62+SDdJRH@j2p0A#iGdjttp4Zs{sWKcPhFWse@HDF#-oZ7~i? zK}QTXR7S&pbe*B4b(L5Dqxf~f)wSpQKrL43i`_8n{O4SnWMit)jS{zd0YPFPSrxQ_ zf6i(f=OM-=;32v0%&pa!(bW5XGPTC>Sx~E5QHAfDM=no#;{?}uRloKda3uHIS06lq z<~8YP zXAygP0}0qfV~QEPG;I7f-WHAIrRJpP*H}{K;Zh8dZOUOjk~I%b5yZVY$oLB(1ZSOz zB0MEI{4$7yMYDHq_YwK7x~gS8KkRPB{>-46JK^cBpw@UD&K1G!bPNg-r8;ik)1Hn( zK}gx0ptU5u1{9D#t`N$0P1e<#J-{AV-q>6TDAg_Z7~uGci~VRn8uWoz?t3V7xKK6y z7RPzn*?x*Vg;$6UO)kvdn&}7U<=4EA>8lRj8+YrSuJW9RhInnS;CD&*!H zsDrOvx^!VpnKj2{-47UkE89GhCDQ@vNthY8 z=s*+D*L9VKJhVXsXe$g(Vs~~!MmTIs9VT%~FpC0BwT7T_Nc>`?(XZkC!k$f}6!|Ms zS9dW-VSWk5AJqT$$BNNp?c3=C_xY1Z^`Rlb^lSBi(UOl67J(*kwzUN-W@IG)IRovU z2OsL3z5x~gJ@1^=+wN5b5(W2miI#rs5|}(d4+~@EKnf$O%6PqWlA6%JGXXminG|=J zc~Upd$<@j4QQI$-_-^V`>`%YtP8Az!pWazoSVlm|>Ai@QPGcr7Ux#w}lV9hTAdx{* z~x2CGs==i8k1dw5FW|d4`cdt)NkPgoh#+v)Oso^DPAN-q7Tzq z5l@s@p*g4hR>T~XR=)3?(?ff1MXx}|*#WyWq?FLBN~f!YzqV)XU4RK8=6-a~y(mcpjI1Ar!-^u$ zBoMkU;N_V-RIxl1eT8zN6ozsi!$Q3zx@Nw|bNuyLkj7W}9{SIw+erKTf|sFBRZ{c| z|3-};M={;Yl%=nzf$*h6-V8#=migDfCrW-Topj$9zMvvfPESkAUfTEEVXogF6^|^q zW+ymG!xZ^GD^4&6pwZ14|1uPS^4yM|zrt}D5lrynoZ9a+c5ms<>nVsMY#xiIzZ6fb z!*yRF%?||N4J+ziQ4X-phyb`3{~0qgZRbsdb;X}EB9B6Dwc8M$#>uV1)y#6s;R|hK`F;AGMuK*dgT-iA7wf|DqX*mFtPXYHk5vhYY?#>EAUpJ(6Xs> z@d|U!)roz!{nO7fn%}zhrC+HP+ar;?@1ZA85{xsNpHWYhhtNnRSb@P!b`)!A=Nx%ArE?3Owl0|KW)|lPU zx7-rtBUks{2tEIgvdfONq5?}K!rnr{4NHpa{0qX8o7oMlC*}CR zuh8?-_eRzGAM9Do#)IS0u_-PVVxIRjkzJ`!2bZLF0sqkuS$mB0QC3-k19hjO#_7;& zw)4fzv6t|2ZC>onH~3ZsY(}5`pqai~zt7e%XFB?``PW`h&=sD|*&HEwFE83GbecyF z5DnyQDrsFclp1}^Jy;FT=?{2TyMXxi~cVu-1IwLzvs(|(SVRi znnB!ZG1p_|j;;sEKmHlo_1Po#J?2$dYpYdO5zQV)1CFDIPsih;(UT~%;A)K#)+X%IIOeVtj2=A?9fjWK_b>ZM;4i zV{AMP(pAL-GNQFNom<2B_~S>-6*T9bIG8?XITO`DLi$d>&Uf$a;pYicH8WF%1{5Pk7cjD))fe`)3$x2L@uRiVA3!DI92$HD$O-$m zD`EH#@AfA)BA5}(e(+_a>4`pFp|6V*FpV*8Q%pmnxxujGfNJ=PLMbQoFP!%9e9DMs zA)J1zrIz!Z-jppnfd^M_cisEz z&hHj=)mNC*D@#m%tJ?IA5DdHVojwgDR+!htbD4L?tlsC-rJ!O3>(ub(LC93dyDvuP zAR(o4lCr<+JTfl{*BhTxWxZ6FIL3eJ{p3gca!ZJSF}GH-{P4C@j$7T%@zAr`4Yk@_ zTf(^M5TYPQq@*!N;O?+5bs|nv!M)-}a|a#=1ST%6n->T6Wf@BbVBXOog5Jf_cW-#o zlfJ9A$9?;+QdTrm{Xt=>$)$x|-nEj8G{C!&ta1<$F{}VH0fzrtE?$41tie8GXN?~C zzPgm{cH^yrNF3v5Oo_X=IkvR#1Ku!9^Vi789YgJk-`AQW9W%pr=C*8X9U$+`3*_~F zw&TLO{U#Tt3em7oOTe>D0gipOJ!nkwt55t!h_EH(79eCOF+--M+io?vl+6QV_BEz0P z32(}y)v_%H>tsFt93s1qfU6DvUfh^F5C}C`RSViUdb0G8eqs;!4^wDyRgv!(l_#Vm z_t^k>22K9t{o#Shc^0Xsw*;-Pt^Ynl2bzTQl|;2Ap(Tbv#$hNhK`MH*}i74N_HLMQNnX%CO zenao&i1?bBZ-Ksl%h7V!+zW2&y%j3;lZ0aX)#eydg}=NQufnq+BBkR~m~+Pg9UJGW z#p82HMk}joWvFOX%p}5OZ|K`ZG02JI2;8eLq9?Vb&kf(_;G_rW3jgzBXFsJ_Ysr%K zHy9wg@U?$y?YhpKYa6ei?x4uR=xueU z=)Xy%t#HTH)qgYWCY6;}VCDy%ZIdAOTSqos1<^o&mV@zhJW3v6Oy*B4qv~ZuyhplF z<;}@hUeY%g61}unfudk(x5#d8IE{C$qK8?w$#EG*sd~>XSm*d5zC7ta z&QPMNX-OUu`RWmY7BM>rF%1Cz&E`)bN_K~=;vUcP?Qb%l@=Mrj-21_nag*aSnDl=o zC>?FuFh#oXLdUxw$5B`c3^autPOJ@aALFcxdv})-p{ssqm|~V?pVc=B)h7ud`IVxB z>$)1`S~DL$oB8F}$3ZgaTjZl%$yiS55KmkJ4CG|hf=IDxV3_JtwQ+2mbYLzjv~FK8 z42)4(Rz@sw7e7ok&(8@Sr0G%mm*al!$k?jcj8GE>u}Q=hJ;`zSyzO{1T2vSy-j5~h zcitPAJyaOGx-m;SUCe`*|7efTNBcKf$V@$X*=|^|Sr06OdbgpqT1Zcu?Xs68;|;!4 z+x1yZ``*KEOcO>NL(2q4<;_A?oY;e>pr&`!rn7;CYI^9Kqdz7;&h$Mbf?OQStU?+% zLprn9!Jo7C<$K&mPg4Q(i>;L-H6e zUBehKbaqiOsfTW8M0uZ>_*BW_Brr7hoO-gOwk_UY!qt(x?viKI)P&2kZ3XsRKIp_x zE5B_OGM&I%l1n+G)DZFh&XBVHv8) z?sBbS-j$fM3GecJbKA7(K`HuP&k5&9jMAFk1~8_P`aMT_*Cx5mnoi&(gpU<$IHL3l zMA>cE02n%}l=iZ`$J7<`#sTAqGH3xFQ$08LV-k{Su5{Wxzby9P&zXkmYMZsnnEok( z25a_*n;X;Bj^3X9EDqTy+4g6#mHuXCwURp-*@HTr(QwO}Z@3_YR$F$ZS$Xaac|hg4 zj5exxP%eP8yOo?-U5eZRx_-VW*hOauP z%D-ujUTCd)H|Swl@ajUv)1+;~f`vxydph~gjMv2(JRH5^=W!WxXDRN;+YOlt8S&!h zk%17&UmJ_EQ#;DrI8*#xKZx$>Z0q$D8-Ts&)4M3!7^l{e(R4rXz~H@M5c^KS)^Q+h zg>sRA{V%$yq+vy0++Qnao#2kZgO<0gEvT{2bMp$KGAK&-#t1=UsQbSFUPDV3?-x5v ztqONagb#1~C#Hw-ULcc|m!cB;iuw7^8LsB;IAZweLS9DK1;mzf%WNPZVk^L%EnFFJ z^jDMkHRpW48HPbEy=ptZR_zD;LGA*0IPGmq3te#%d7bq&b284cG$K@_&hg=h84p$r z>_07Z_>Gv+{*>#QXY)LO%7Ux6+f=wz527x5o(&f#gs|KN=WGv@~Q!sd=0Qd4+dE%jm+aT}$ z*{e%m@rQZxG?ROb|4#Iy#=S(SV{y%ae6q?S>#L$>wJPQ&F`?1sl@OOpx0}1Vvi;30b*9ny93BkN3pk z$~W)+pnVN7+JN?eKhENx5Bn&UN1q^-SM*j(ddkf)YFMz#Ih zJrJ0^$bR&W9!BJf_=V-u1l;KYYvB2xcOGn%j<+(dN)QUh()Ax%b8Ko6Qy5O|5E{0h z&C>awRwBq9%mLejJ=@4Vau%ve@p}RB)oHjFcl|owMblL0ryhfWk8-DH_8--~CU-Cp`bjbvl&b)Hzuf@`C}RMNyc{LFdLc{C~(hVO5O_#&45= z*bh83a<8(oKhtB7+a3F+O1&+23fM=m{IbL{YO`G_nTGR9S7eNkv+ z+EL*F#4daBy3wY~aW<8fQnMSrm!^jEpUms*h&Pm>HCSt zFM?wc+YWpjvh#8H-I^l(z~OpNyG2w zU^OImW~M$46#F`qEh9<)0Wj+{nkVl9GNT3%4NSrM!C%x^?3waaM=nQS6^`bTqprU+ z?y_J4vR_4F|Y*eX*t09)Vab;z1IpFJm=Sja{xtFKtdyuLI-qSF1 z@KuQ)-dN+MPYK$e`{vw;Hp|fhJ(QIaLWBpKb)6+WnvuA3V%krpap8X3IXe0e{$2xw znPa*Wu?KiPIKC*elw_lTh3Ksg?a4NIxv!UmMY(49l$19D)Rv@4!o$Cn@WZZ>|6w0H zWE=2SsQ)=L9AAmv6q@!`4pi0~W4SQ&IUs-?R}>LbYpd{SXz<~gPvnZoj_*0E-Xo{~ zME8U+faZ}+qF?Mx<2bg;f!f-)3ycW`AbE1nKL`6hP&(j?`AKq_8!df-FCr1PK-qPg& zOh^NLKuOyI*oWN~x^&4j7^76354s~kto5s>j^@GErOU3*1UxW}`{I;$!5s}(pZWy2 zQDLVyLUQQW$JcvG32ziXAtJP2P2T(FRLJ%CG%YKvvI;2zgC^w5du$F> zJo=rdkoF-@EX+7jm6OmVj4?`AzEv&Xhz9X0YTQ^$1uOpcs5y}t`7HUaFbHORvtKf?ot zpGvWxvrtzt1}%GJ_85u2`F^G&|I+6%t6O0{y4Hf&0_Mf2@p|OL_|Xv^MWl{>Z%e^9 zZk1Fe9k6JhYD@8x)zEY4Z1bO_;bz>BNaO`<(4qV1gKZ6?h~n!9(Se=q4xhX)UHez_ z&c!?DB3{N=Ay(e5Y{-)<<3cvtqei*Q&2R#HM&O?ZZ&8Me%BC8Y{mrDzFgw$#jEgME zsMOd^`%+wv7Vf=MK`Qx)AxnGc3`(HGsP<8od9M3_rP|0`=wC;?6CTQ^sLY{CgW?b8 z|5bcjFDbn$BN+!5XQwLy&19i<+qBG7bBDRh4vwXn#xehGBCl?~%~_GUV2CIMc9hIZ5K0@xUxx0c zmRtvjX?NezVFpAjC{4oB|9t;pR@nxBi41^RgQX-oY15mxFC1?US!NBkFS^^EUFa8K zX!g63(Gh$zhGLJVnpQ3E%yqc_S|l;X{8%^Ir#s87{VQfDD9P-A7RV4un{*P8Q5JQF zA=gSbFZ;?cphjV9_0s$(9PIv4^3>6Wa1uU@uSA7*C7%q_^)c?o|2bpT&^ZN4d)&Lj zoP~9ysYeP1&W?`G9twjsMh^6^4*EjWCWd*Qyvj9tZP9?v(e^S~c`bDR%3WVqZ{>1U zT2>CDSe*J)|L4MqC%uV`{dlTD?(XkCb9ZG-6mhS&A8Gk+V}Ro-9j9~GFO;mLwPj;z zH`BZzJ?M#RAXfhRxf6gB44Ho<=2_wVT&pCI!E^g?A$l%_9Jv9eua<-M*uu;^FYLGy$vIo8q=2Tu|_v6c|Imc&>i(@jZW~!?xXgiF_WSN!7WUQ2( zeV%-Pty`s>|5$5i25IGE!I@0YXT-jO$8Y>-qIIPdmS*(h@q=oH0$*(?xZZPq)0yKD zCbG;EqJ<3K1a>`X6|cR9`%4QA6oSU;k-~H$u+-~0DZY%{THr3MWCm9=4^}R`jyH^9 zOAK6&9|XE%HieUjH{Wq74(9BJW!gK6*PK(kX-X;#p1qZUhUIPd!6P8H`PXI_D^08; zdim6w-Ds=7pqU00I;|?NU2@^LxQKKp_;bc+3TG3lYZfst%3(3F6ROdMcO9tPl8A}} z#-iH5f^M+5-Zh3ZJ*;9A%%;aHL*Nicx=rW_ZVBbZ_z^KWj+MY(*eR7dHQ4znr0dG5 z>%5Ur)ax)<1mE157QNv zLUzT%XKoZ*Z{J@2_JN4J|3T(?%G++Ncp&kD)vdoS-Vt06y9+jO{seB^P3b0USc1Wx zx7JO$AzKgN0Rc|}GmR#7?$$xZLVc;CU0Kemrm?1u)2+tTid|V-!bF;dl{`*FS3buFBXk=JVufz+EKZm|U+mE3 zsEksI8t-P;yYi2H-|_f|+5bb?w=Qy4h*W10>72n_YJkQU$Bp_HFDHoUk z9DSQ^3xW(?__bYbCN}$*j(F4kqnL_ons?51Qori#5cEzlhOU6QbV=@cwqF!K>d9Y0 zQ{RZkOH7(V-pMlNbj!`>i|2NFW?WC~Ziy^JR4gre*%hBm7neC3ov~-kG(K2ZavXUy zoV?&LIwp>5UeD8Y7cP@GS!1}~cTGuHfb+jgb-%)n-J$DS!3waw(Es4p6j#Roo3Y0xi>AkKmT_vV%ooV4Gb)0ed0epw*SDQ z5>eB6eI`!NYEAC@KTEC(hu^aHfEtdmXMnM0>^`iz=cCCyq{S-NU-ofT`B~#FVSA{` zESE;$)bY9mifCe}|L`#lo$k3mHeWZ9QIv8weYI&k&lN9#i6^4(Q&n=kpMHURBdEvT4x_>+-U)FFXKVJaL|b?bl4%-|hF z?Ytkf6zbBniIjBks&F-;zpRw*lpJHgF6BO zmsFk*>)U%*aBwDtok5hCCr<1T>GQbM&B6UNj+V{omoNAzc~AK+sZ)8hSqO$4iDe>(f0e(jsH_| z3}i&;iV2RIy;SB-`*ww^5Bjt&lE?GEro!+gJ8XnZ)S*OXs$SHSor$r(lIKTQ zs;|VbOH%JVm|)R;VXWhQV>JET%;KzX!wkRau!yH@+-Hexd{)*QzeJbV#;55HvI0@HI3XnGTWo>I^zF^AD1|$h!R)3HY+%yv zGqP|jg5bQkJG~D@4wWqIp3Q(#ATmp~c75XtO>@b{>gXc1=42Ru(=up1t71JUWW5_* zi~4Q(p-1a1@PF49e`K{lspk`C)>7@f-iGj&Wrx0yU$JfC))Imj(ILk?6|J`NzKf{C zP@byhNylfJ1W>-ChBWYa25J<9zD=>8bx??B`18^G0R?WbUxb-=xY5|@nkwU%3GQ)+ zr&F=O>tu+a`6cWI{Kk~^-(S?4tjUu2yX^TaQr|ETo(JQZRX(Xr| z@me}YOvGKWZbV|eP4O*x0lhDXu8)dw-d!g2cN=r>^3~1kovmtq%34GbDO^9#zvS^X zPRcbM$ot-(&3(NDeYpLRJ^xj>PV=SW3t9gfMFI`lS{H z#!P0?HgUC9Y4-vhTtuFSmu@>EeO?qwMLG{6_A|-aYWf#O)ERcr*;nc#Eg~#TlF~3n z$W6~E4~@l6pMF@9nd0w^b*`~7I}nP}*PHI&vlsRzYtFA_#>&HJ&U%N&zN%=(02YJY zJgGz?7?uA;F8?}~fY{4tq=Ch7CE-HtZpGaj{C8>I(NTF(O^-` z?Q}8)GBVjy@H)T-PmV8=1bYh6;36$zAvp2i_T^YqWdJ7c!n75i1L!55a|VqcTiW|B z2GVC;6I4xrqXek)(}|<5HF?r%uIdNdS$F06mrhcW*W6SIim(>SJHTg#KH6KWBMbHw zmnr1C!J#RJQTtXCyaJ^ z{AEYa5lJQU&j{PllUA;w-3l1yjxDq@{dgf-f*FhtK$09X?5dK=heB2|5tsn`S|04& zGoqu{ZdWmi3LQ1?U6Y||Jsx5L!~UXQsdG5py0epuE+1?5_=D;(c_p(~1UC$R1@ zTdbNEZ5!&^d1skyR1zl(J^%f=-c}RawZ1K`?(3eWqHh2-8ugL>m<28OtBcF1H?vAx zJ_D9|e|3>sFWs+Ffo42=Vpwz$tn=qbX>XPF#b%sjz?eWUm4WQ><)BS4NV2+cY4*h% zu!5csN+P{)>6Cb;*E)Gv4TvR45@C^7t$|?1?kwkj;MYrG&e$*kihn6Zv;Qe9N{^g? z)TooIzU!%=B0A!_G9u99%nGLmP<-ui$s@P23$m}Q)}iqod2-vCb{8AV6v0!VVik+1 zzl{}vOB6bL+tF`Eu8{?oVmde{>5iPL;;4d?0IlfD=MXtu-l26(%|x37;Y!@A#qzgT z#}hR9_AG{8h&Hw19JtMjDEh0Kv0)q(C?d3I(aY&^9cd=Ia7IlGxec;7*Ye5}h{DcA zpuQ|U>YUk|@6PA|O`|Kg;+cD`(p!FoTjNmjt+|p%T&(!2&Y+>A;SSpa({COoL!zb? zUt&({*YgCesAFYT@xg;mgYQtFg*J?v+NZ!y6(K7$ zyK2UikgBpvoou!y=DI@sisrmJ-!!1V>5XG~(zD-9JI5|#toLdGV&@$4pSEYDT>`Qv zksGqaIo@XNvdVYgJ4<^hx7vP3pDbY3;6fa+@AcoF842|FLju+;_58r8_Mgm)hCxA( zJEb#Sn;I;3T_9^GR<|;0&Z`uZt;FVLDmYavMXvmJLzQZ5zy(xfU}}I!-@SCJGj=J|hEmzF5~Z+3-+)f1X=+}?mIejB>8@A6Z^5fOyA~FIY1nmH`KqBa4qy~ z)Ut;JO0jOAHQEW~0$=AZ9zCW%{+t6?Nr>jGX>&Rmg+Eb!LGdkz0Cc;+GGJnZRoFIB z)&oNb2u7i@s(CvvP<-Fl^f`%!G9qozY*y$!;>mF%?saqek|*?pN9NBryE~VMf^G}u zDik%Sc%dS8bq6eNrFb_2_V$fuKl4A>LD`D0-IJ*<+zkzG(I3%{bRB+_M`l+xalVX# z(O5O0Quh_HP+a3d)g$Zf!FuefA2)znYFAPg?@o7orfYiv?|wkpe0jnbm5;HG4!d`0 zJ4xlFgaF%_q(WyHUW-(M;cZ93K~O`zW_+d3F}dVfiC5m;>>d?pWQL50w`$*H_2Hop zM%{@T66#?;>Faj&?Ft12kco+aA((Pj@=Lb_cG2CzfJbw5JlY=d^&p1IcC+&eVhk^o z0yzs>(22$|>b@53X};p?XbhyJL*v;e$%mU5-+wyqo+Pp^QVLD*C$1kutM!Shl=uai zxy9W&{VIv{@@>J&v-BB|7bU|grZ-?W+t3rY9Y3r{2ePWYa09fX4wlQ?**zfV20!6iVZf!}ZE~>kAO)-lt$+c=s z{#Ujkdh$4^+AYoYEupo6p$4OBeDw|8I0<(wq99i`zo4Vhj$#HWIyO}9-7vx0DW5lF zqee(MW~u%MTy&}u03T!1)3X|q$^e=HX=~F2S1_Z-Q#Qg@!?y=z?m{#~eLl&~XR)D< zXxGm%hxqMt{#cY`R)Tb&||=X2~_Fks({UwbudYw83KN;&Cg_#?q6+xiLBeYD?TDJc$xzYex=xmuvVi=@0Nr}P@bb%I;)9a zhS+-d^Y^F84&*xD_1d;)5xvbD$|a0y|K)fY=jE|KBE z2KU#DMx4YlDe@N*6vbYMN8m?Nmzs20KIe9ePjSHzY2FzBBesj(E`Gltd1u*<^jzEL z%+5>KAHkXt4F}V=fKQ{HjV{a~R-Ium{Anb`ja1#st4@IsuRI7E#VfHA3PYwdmp59d zrErH+p|Ng#;%s32ja?i3@l82^QW&TZQM{Gqjtn8PbjHy6om<`p+?ci-P zu`(!KW?fcM`BGzgZCp%F*<_%AscxRw^dRX^njKTwmmXr>f_iX(w9?C?f_}*x&&q8#1mTYP-Fc(u28Lh&9`yd9#W@ndr1p&GnO3>;X;)BGFWw= zN=eFUv;-Rb-mnq(R`N1%wMl3qP^@=Y<54ZO3oI&TF>WRcDW(|d2hwsa?~CnbkG$vN zQkQz(c!G!m(dWQ@rX7J7U~{z_@*&YU~CrTsKFUfF8e`9Xd*AP`YtuqJlQ;Xqg6fbkS5Kf;By3bt4xoXKX$Zn(p3{G9{N)A z;)7%xkFNRbOx2FjNK=^-axhuPBSGyt*}q@o(L~^gYi|RU?K7?$dc#q+i>gGOW+iR~sy zqQqtw7Z>amw-`FzF3k8CVG7;T%-BIvwiC+KenA4Q}&3ZR@BZ>rKFQLvLYR zef@#@8b(KZiViqL7auSm>S~!{J;RT$6aotk1_52wohv`sI=Lk@-JN5`h*C_j5PMRN zCJo%V*kRxiCdw(h_rnq$Icpa*MZq1bLRIYJ4Gq$FSfXBf(~FLJ>wVrn9r2UJ?rq3R zn-2N0IC&?j(B6&yQS-~zvBjinr`J5CP-xu}kF?82=eVzGF1??&bmgvVfk8G{#KbF9 zEjuv43fLwMiAm$YrIhh`CC5J*4L}aueP*E9>XTTXLbcI+y({KR@yVY}={3c!hJ?gc z&)p<^IkNZeF!UTxA@V55@@9X174o6moi!c8QV`gE9awD`I+JY4MN8C?8BkYr{Aq5b z4WuE%i>{Am%5ftwd3Md-76;Y^<2F);byEeK6BJD!e**R)&cCSk>RP9Z00-LXv zeh{X1DFXm!`5Qm0(;5MrL#f7>y2X{LS^?5k|RTB#s52|R_>fzBH`Q)6l{@@*!_{VKX8djJc}^Z%cHi$=W5vkA zY3MO$pi)tzp=_mK$}%R_HXHBHtnWdG3t#^_-e2RucHMYe>hb{+J7)n%-R#{64oXxP zGqB%cU*>?bu7uJ$#5&bu>PX9R@>_weC!mZ7yC8Y`;2HCYfOelLDIR{j9P#eI#zE>u z(o|Q^cRR_RGL%p23E*4vW({~>A*%=!yJb^d&`*_*rzs2be;Q8D7+HpV*V{}-n3^EZ zbgndkcd6;@FJM__dMQA5DkFsY+miOj`iyT-J_3g-Tp;Z2F(duu-)$=Kd$dG)rYhb| zi@b~HwbSNCP1cbTDmrOJjV<2ahWR*Cr_1POZcK|wA)joRBx>+8Sp3LtDSo^uN0yM^ zTOT+WHSx+3&pM~;&JoNYT9m%t5qae%3^HFYQylUzlbkS!j34p$W_{9(-a{1f?M)SU zYOp12VyU1B^wn+M+Hvs*V=r<0#QIvac1N>0H(Sk@7?x|Lmf9xeH_G>~NlnWio&D5V zEca473J~*eyv--{9jgh8EBj!^sJuDJSn9nzEG+tM&tg+i*{C8FDYP!4-zU+m->^2{ z3T+K(tepWaebGN=pmf(jV5rC>X_!52Tk?7CU@u#(u6h)K!#=@QuO zzzxQG*9tCFD8AZcMBi9c*6ptXF`@j24!^5V9*@4ass!dP71N{+E{i8QIm~JORa+w_ z_g?PteMeV;@nW-jwBl+)!o%B}cw7@f~^trQ8TTS5Xa~Mxm#Gx=_ zjBt&q1Gx%}b$xq#h7nGnHTsYKeuhlYW zRc1`ccSXdeV4t1B zDWJJE!XID#t|HvojoOzb8Cwj$PKp>!uDL3-54AU+uHvWNSlC&fYfOJ18`(!ZZ8&Y1 z_Nxf}Rq*l}hsO?A^n)jY={gpAt3jNzpUcZd+}$7lbK@WVfmP1xNj151VS<_&um@`z z>KkK&1NFfO&NrFXtQ)rU4Dvne3!J)lvs^qkzKNHlo9m>ml&+9Y%FHU%)Zr2w({a=? zU3#OZI+lJuX|~TJKqe+BF)0yib7%IQYnYC#6HTT|W3sF{h2F0M&PEX^2mf^%oIeZq zSZ%6=u94YeE{#E`%2O2!pGN&+V6y@+-e|o|C5|)n{Zy8ubMr!UyPX?$w-Kb2KL8s= zW7ze=sf(Ds-g#8x3>(*}YDqAN`=dF#=C({D4=ApO7?10Mc z$Ady&ch2)#eSH~$S8PqdeH`%f{+m%Ur!BGpMkyR9@1o0BIhJ;FRx-`8>3;-0x_#3&6XfPIF^G z`{@)~8ixGYAuOYw7IB%v@tr!3AL;4qx32>VytQ+C>UuxY)rjV!sDFix0W9!N4IxV|v@&tTu%%lU%E1^UhkZe%g&M=|@~jYJGj%!VSsp;zz1{ zzpkX0996pYpFL>Lt@w}8RNxucQ;n5m)qH?+&~Tsb2a1mV ziV?NgEh3GdzoLT444;6CMU=;^Lc*_&tnQZ$nn)FMn>VFn>~~m{6`3uQgxj@*KAV%!2sPKo`&2#7Q^tVhxI87|&gf6S@t~yC z`U6r8S?Zn(81K%U>f~8alu2jWI1MQ~yKRN{keNK*pbn`eO4tVyTgH#J45>1TbQRCb zvLbtL4auyze&g{pz=eGU!AK~-xsW1bKd$;RkA3%~-sm9n{Dz6?OjaGfMSH^t3R#Xz zg>o6z8OcL5F%Ap)(rd38Gm^iBr#9M{8YFJtBxv>}h6CaJ+wi9oaQp9+)n1U=GQ$Zo zA!J0j=Obw=neufJqCoQ+4`?qQq>aJ~+lB2JX3A$O@d{cPB)9bzhqvvhYduFW{H7DK z|2$T{It7yR_}ZnF&lnXc@!JX&U8rLeZ>{Y=it-AZc)u;0W{;Am9om3x(nt5bmVvD- z>{vu_J7l50<~k^|CIMCe`2J|$z1bD#uQhX&j^%FWJ8D6z zi4Q2{^v=C`isNw2LN7MiKUrtlS+L)3=n!k3GzTZxKP$6$>KCfG%9n3Q%}~5AF_~mE;t%=D+}SSF$F_%6%pJBM zNxS1;Xx6TO@pd{w1qPQXGs{()sjxDT+cGbjL*CjqxcBkhhS!pYrVv(Ftc&Q^X;jgQ%8G$6=~n{ZImfw6l~#P%olCyy!%8)J zA}s>62*VPpKb>SR8atvV&|=l}b_UyY(!Ks6RoiE$itHbl7iJ-+!I3}4b(zwqk61}# zdx>tu(CfE~FP>a-;xT;px3h$50?Rts;gYq}`@-Pc){`e!Ql>cHK(SvgQ&pEbauTxG z68Gj9b>{sUr-v;QCv54eh*HEGsX1YrtM6)-WZIX_4d|4=N&DzVJIlqigrpLOxrfuX zdr*uv?h-;w1=I~Ry{oqOuOErVu|_R5=`MnM!IMmo#p?ZdB4DH9qwU}X&spayO3aCfMda%RKbTLD%C`uWUokR%Wui_qv-(ENCh>y$UA+UHqU~xbKdnc$U&Eqk zqOiCMBU?B$qDQIAWlIT%orYVW3pTj+n7-T*PHjX{aiAS2K%`~V)$3HDBGldfU)tQh_nh5CT<`} z|9ML9=Fc%fraJ^$snac!EA@#l+nRZK$cN!KJ0b+z8WpBNIPWaSh5By?=-k*Jnund$&;U`YC}|yFh&Lf-7;Qb0_42*$}v}O*WxbX2pjl0^G9_8em~%NBKe56 zRZ$N`z=ICf*E0rXg>hj#S5+E3u#nRa6#vu1m|*K@`7t2RMrm~OF7ZBFVj^8GGkzzb zPODc&G`m5XaS|&vjpR2=!cco~GiapfJoSS@3w@FQomUC`VYD%#!V~xBw5dmifIn6Bem{k~6ROsH{{OfAR4=J*!BvM`2w{|Q>*j@iM_-`@IKSTZ; zgstgZ&Pgn>eAL3hBLZbmEO_r%ASnGqc2+ppK%ZJl=_g2G`IvQ~9@Q|}ZcrQ0bL@@$ zHNU)dYF3q7Jnzu&hn%w)n!1qBMUB+8$9a~gA0*R;M(TgOTqjrjjc;Reby;<$M}9fj zcXlGNWtYQbh(w3#@T(=Cf*5D*L9f2II^Nc&CSTgsJ3&fc!|h% zKd9jHrb6w7&LtZue=pjNu$#yUQ?#c<6USzGM-RJ`y&u4wwIU z_@b%!$VOMB_o}&~O1)6kk<+rX;4q0Ru?`5aO2q{0_Iz47yaDqjM&!q|y`yqa^vM}k zlde<8^NjbsvV7{xZTnZ-Z=Ckc>*Fx=);hR7)WKR#k32o^rs>pv0r>A`&wi_Cy_{(; zheYDxypLA=7&*-_+}goaX-b4@wU@#);J%pD0$#7lW)H>$S>zKP!&v2k8t0VPlep9-qO9#ny?NDS&F+uqM)^PNwx`WX zs(>O;f$_%^t3X1`9^wnt!1o}l(RO%L9*)I?9QiwrF2E}BS3J^L-t>K%E1zlM%+5VuFX$5<6?3A?LkrV$axj z%M_5lG^3F|jPq8so<1JU5NJs=0#(+hq*js5=ahfyZhA7TR`F8Mx&i=%km%7tHA1ihycy8JA_YT`k&Ca>y(l=Dd4@Vn-?ONLy z5^=-6lWr#~A}_6~TLDwN-($#>wWPP{qeZ>3N?&$9U=w6Ha;&P1g@J zcheaW3f)9epLG`MX)FY1Ej!~AuK_kEaOYd-ZPV$K=c+?Kfj}n zb|_O~e+)o~`FwCI(yiw59ls^p?o(?ZFxly~e2pUHD8nNy7oy&9rqF^(FZPuyk6dCk z1L_rfK^wFda)rniWRLSty{8VzPxF6lbc#jhCiYp$p~U& z&xinFIW|ld{%j^N^-hs&ZQVV*xISp4dkaJYgBu zq(x-6&NT2u|Fn||_d!!!YcPq%4NdMppc@ncQiE@-N*{7XD(0grk?uWQG`8!UH@?Dw z5{gj`7!Pdvk78P4Pf^`-delmq4qug!k99{-WpOA@P!Zj z<%Dss=GXiO8Fn)gKx+w}U>$#HNq}k**?WCyx0Y{Qny&6M_Jg862N(nOi8#rQyPk@? z52xS{k8A*~e^RjBd!u=Vz_0XrO?P5dfvgzd+idM$;@WsZOo*8LStM9 zD_jk?hZ#cLpm6C|V;A51GTOm*b%7;Vv4g|*+(yRtdClWc z7-9YEkaWQN|6J;ZKQQz6x$L?rd0LgxImt?liHVCL#d#QAqI#`T*LDZvnmq|yRtci% zVtMgWn=Pzj-RUk7)tSaj-&SgEr`eed6?#f#$U5Q$#ATjqB1S+d}I&1F|pb} z#Z4dVSBbBVziFM&9`pnyR3N?WFn#&OvpbCnd=i)MDD}kr@MX5WHYrm7-{g$b5Aj6J z8#_zvGZ;h!uK*bn6(JYzVM@ZBX1bz+mhZz=i?QrcJa5sS@*;9qT+X;-!|X%`!yv)5 zzS90bo6&XfR;e*qID5~x!9SMVMxoiE&jYsAz@j@ggHw<8MO`4PqGs zZ{19@8tAx{2;MzSpd^WTwQST9_#RMH!IJ?TGY(T2=UYIW=z*u^>*jG+sL!Ex!dX8X zRjg^!r?(@vhIUDa69*FZ`Whg{Kv5S2=B#A%$8*TJL>xtn^mHhZcBn z?peIVq1@JL4bBYT6I@b;cvT13u#UHp6Z_hyQIH=yif^;hrVAjD849x=B^wFLJBABP z!Jp@8=6C1cmA8LPhOVh3cJJoX+bzJk8z|xakd;4bZ{#i{USD)EX+eWq>^v1`GEC(@ z@CxeRiVA^T4#PGtZuWMP>{`E7`y8t}0(TIk)!z6)R}gZSw5-M+ldadFF zR9L0a+vepzwhfF@MJ=<_UMzHU(qlQwWxEE0di9oAe^=_bOlZ4X}4z-}k4>M*?uI#0|& zJ{rwO+a`7Kc>90X*r<0MU^6Bpp~Thpu({v*-s!Q1WIfU$V4vKz>nN!H<+wfJFz^N* z7(}!^#OBgJk?R|o04JO%wWoXGJaDU`a+eAsjbWn$I%#+9Dz+8F z+#(Lb$>Fx1P^n6EJZR%Upmf(R;`dkuYP4qmJ>F2|=UWt1{StA1jiZXUETVxSACcPG{YUZ)C(^yj4pRqqRk`i>1ARqoREuA(hO+DRd z5RffY9?+cyT&^pV1?IUHDVwP-l6J}KhO-_1WW`hPB%(nR>N{I+8P%UBGqvwQ`Ar&x zwFy_*ws*uAmd=Q~jOM;mdsf=BAtcCZl>PRlnZ`_9qQw8MeNUu_xeWqpff6PB@#APB z4^4s0jd6*trW|{-S^{f9!$U zN*|Nv{F2hml>^V=CDSC6l*Uh^G;m&PsRg3zk9KjLx}7CXRDe^WebBb+vG{9;<9VaY zW4o}lRWbCBtPk_3=ZHn@{>I72%X`J8U0DapL%!B&irmJ-KljiiPKxOfQ z7MN-OJk1aN$fJoFuHuwF)f!5TBcZ1ux@+GrIwR$Bl#oUzhXNE z=iENu+H|kr&gU-}dBfX52*QrweSh1UO&s!z!IXpxARO>_i-i# zWW-=E-k+0qnb$sWn39736oa3@gc@Vd8#1f5X3Tzh&1qjX6qYP$^)xhocwc#XRQj-N zmS044XQF9PkCQWXi?$v9X8co|X%6*9Q<1g>-9_UsvgybY`g{o{SRsVT`CDtmv z1k?GjwZGMnrFY5`V~i;<3#et0mh%!tSKumcbK+4(m9A#2j|86>iJC%+#wzQ)M#Su< zw|%Df!jKeTlI1I`O7vz=fYVnZpjrhNVBHsP0#+dG_R=>Czf7|;26P~DuiIa9sETWU`ip6(Rj>iJMj{^ z6~sik-DXb(#Cs;r+a26#m4^zWPL-!YYE3!3vaAt(rm#Va9b(PYp@xrCsY%?FftST5 zr-%;DM+6z7)Ou0vo?-`e-C_LHiJplE*xIv!d~}Ojg$|@u=OKy1h!fi?xm+#1$-ZAc zOMUzMRc~sO%|WrPVzJ7^Am(A4{mr1_lnLt7um!3JC7jT@e3zn&6+7Os&3&L@uMIdwoRRL@HSnojkEWd znpohfn5zE!=HB8^oX_q@_Kn#;_zPJ|V%KuLaU@Xb0XJ`M#j9zr{t_1;jeUVut~Haz zJGg2>qK#1MpFDN4Ar(&GSY>(rw>TmfP2OU0f@vZU0a*DF_E*gG+Lp!*vfIf{1?`I| zpMZE7oNm`IA3;p>lzWW&ugAK+Vod)&4dQzY*C55u?CW1>?^YAJF4Ay5hZqF2cXIC| zc2k%yxb1VlF;4u=yBDHnp^Ao)+79#coWd_W{^mLvdI8jY`2P(E+;|O6iXcD6!ltB| zw2^^;uV1@idqR8Roqds+a9!5H!SE6FRIKM*&V~B#rOQv71U`~#3``X(b(_b*ky zQxL|v;Krzc#(z~EotHk#U1=I)6zw7w*H;}4xiT`x=0Ima0P<&W;AHv|h@==TKd)q? z1LUn5RJi>`d4A|UJUUTL6v?2`7*9W1y7{RU9ufBzwr*_Hs<-C9k3)QG>sKeSAdZRox|ni@9`{+aDckErn!* zN@>`FkxO*HWjcQXrwb`HczXgFi!>_Md*3BgW)_zf_d2&~t{#dh84&Y4({$CiL7h?Q z?CXq8rkMHC|Dt$f6A7VKXGR$NS$TD{P^ZCNu%F=6h5fAdTI}tPd2gEJeYotH!j#xq zL>LFPSA6yKD=DVW-uoA<*nRVJJ}F^`K0M(=G@Hia-_;9*aqDy2V^*?pJTM3P%M!yh zM!h{|uXt6*>bBikOI_YIcI)0uS@m?;b|G0jrP#4N#q~`g4btw(5$@bLekTiyJ9`!pQ9%%mX#eZ_a-p>@wb&1{(g&Ybco zvg;M?Kg&=5RuaAQziTpwbL>4c!HGQ*z68t8I8>YdN`7RRH2I|Svq!96Lrt#xvI5CopK zfS+6g%D07Yf4H^$`za9UGHP6A#w*)dc}JwMbRW6*e*d=84`#4B{M5CYEnqbN0YV`aJVV{Qk@0(0k{;Qh%6O#c&H|b zvW0o~#QVaamGYbzF-I+v&%_Pf@<0Nolkp~3Z{Cv`fSbfR(I%|k)jSbkxbJ>ph}#!` zEAC5k&~%!z9F+AHw$bug7yYF><7lDR9hgd85@f~616Qupo_xkj5n|`;;i(^465}gB z-Mqqc4~Zku4FfE){dG34k~Iy(c^~BQ$=OEo zW_J%(3T>OUO&QeMlsDNW$2p2A#>Rtwr&s0RKUNH`N~y*`Ui-1uZLRE%Dt*QKSqlB( z7BPUSz`phlSc1i6Q3m%0j6`(L-~-j`^~9M7xT0{ZeCxiiey#ofjm;jAQ*6Z;@vC@s zR^OQOTT-OPxsq_Qf04-_x}q!kYN-l=%DTsD4*pz|Vj!Q%wzmEIA^RhtWY6Ji=sNm|z88^-)%%I3 zx30c*@BsAT&943D|GQ>RHn)R)9_kL0nF@%QL|=r^?tjE4FZBLc2>rpsukJIb>K&3j z@8^s3ntpBBk!;I(@B^JSvq-RUo2rFTHefkmQOhUYl5+3Rwa!3lNp90B*B}t6k9OrK z>z0j;(C>ZjbGNyFgebLt$K_q;Y|~r$Abf=aKnb?KS1SM952<4L?3c7oWeCmF9u{TvB#zyk{I8#Ea_7WdG`zT2PD*%dtNJtDIVMmJ5qeT0`VckpgP zq3=Me9(iBHatM5W-B9yiz~)Rdrlh1Oo44 zj(7~ZZK|LsA9O|QE{~4-A=Dq~=xDcuRWHK7m<(gM{EKAWy<5~W9tid~hoMelB_wBT z0Ff^AH4b{x?hXyHPBcn{l)uCe>h*qm??pOIO3;?bj_>8 z*3Wk?{qVwNBcZIG>rHf_piC{)iJfGwUXy8Yh5=Z=xjcZBx>e3Sj&^%eGP$rX(ko)v zixm$OmO$ysA)^xb%ggRQo36+-kCNm6zNu!hqq0zcR(MybKj}F++((-F9x$8G^AY4b zKWjXOtK-5zTR>)rl!(=gr6*`UfM^IVb9eCL(aU`Le;snO13lwZw~WXtpYJXC`%AnH zh8OWlUIQWbAc~s3a$&NQ1&wSeURlG*MJeL%70QBN$8fSOvI(%~AAKEuUw5bb%W^W; zy|OF7H`!$vrn=RlULB)xN1tHxFtI1>M!o^!0m9R1yKfY5A~4&uDb(6gv}~@6^X|-c z>-tNy9X{02bE5skx9+>A2!w{d0S|$_B}uZCoB8_01j_bWIJ6(OI0J(`;CO)1M(#aqpt=wIel@fRrLD_k83 z8ShJa_7S0$p%PhEVpr*Bk52UW<8^%r?`(1cPU4?A!@3llcxL(%%i#B7EmU;Mcw-qd z%PAX&R@qkReVZ5j^cqVSJ^r%`UNQ@Mwe#~1&;00Sm>-*IJvLJ_`_NgRamk!=3ecTD z!zlUIl>Ab--ZY#o?{R%2Ng};WGV=$&e%X?D7H_e8dJ-~Ho=0Y9-{<&i9*4XHFG)Rm za|FjL|*Y}w)Z#wtO*oyO77(7VD+V`zmtYvc55A*6(*$)&NA{Ph#(h+$bEr_1v zIncByOd^PkF&XlF8eRVf6&YC8U1j~;GPHy@CCy-}jJP!z2QdX&8sbVPPtzWW2yLrO z5<4}6mPAo%a-?s=@vdb=0iF8dEUS2pmtdQ|T#)?Jv{frhuS&Ibr77gz_NeF}vMw7D zo6ig|uTuEx8JfvA_@eUI$h!N|#MlcdMlg}~zqcBqklm}KD%{zcoKz5!d4-((f0#PYpr+P%>+3lx zB279{Rho2>-W3D{43Q2A5S1D*bRe9BDrWU`%dp_L54sE>c|lPrf|mQ*12NZD(6WZ~ik%(Q7~9@JP6<#=%cFm*dVG?+ z%oo(X$N|P4b-dTAvn)EG|L+Pn+G7XK3P550yP}GYU*g-Cz|R>@QS}Qe%S1|C)_+0a zr*9WIrjCp8>%==1*g1dq?_V;4TwT7;bT|ReNp4?CB8Z$A)8Sq;b`Jh!A; zkl8ZQ!}m}!MU*&7vJq(uiU9XObo=5<+*r12pf(CA9C!^XNBUV`o^KKSUF6QM5Gjmg zAGVTsv4|Tvujdh@FDeWvy>39RoQZ z&b8cMRVUEbk=_(O(oW-YRitF(tB6hgKMLzw*vij@UcP}7j<5$do2gV- zx{5UF;gW8BSsLg@w6M{0qBM!7YT`_)A)< z7{H-`h1=7l_k4Ip@=u-V?x06{1atPNVxnIG^P#}}&AJ^`#HtI}eK2;9&S0v%QsIsr z^ygs}$NW49A!*SMML{pJ+vQ=dknr`-B@2`^r`mBT8GwVO4hB%&fBZq(0<;S{4#aFl z30WsknrIXhfMY}y7H>hq+)kU5us_e9e}u`bBwJ^+g0nY9M295Skgfd+y?R=}0^+(- zV;%DgZV^`agOlI23E~syrdvD!5K*mSJE*>6h?*L z=~F*6U4sYJB!^Wg7uP2O@m+HA3TL9a0bzumq64Ks2@5KI2T^Is`Z6Dqd$}bYzGa|0 zGo2=|J*31$KNGlT{&tScOu76*b7^u>H`}|MREBL`#$3`tOb9<5FWLvYLp7dMzXLRG za3Zx#$)52jgK~Q+ZPV}N7(V0Q;7O{xdl7)J|M_lcI+qx1yuEfbQ$4YOTWd-qNI52{ z5MxgSo>A0D8{Y!Fx7%-$)`}ua;lNfD`s|HIWnrXe%#41zS*Q`TB{n67LHnRvRd+n< zdJVKp%qe=*ep~zCcO&>*A2w9H1MnAiH%RB&lWDG%QrL6Y4N8z%`%J4@Frh-tm>dvY z>A%zj?Gh`5!u%Mkf>k`LFk2q$X)&Hg!S_7BmSm0*2KN5J!yQf zuDq+kE!$1_@+Hge0U^s>+sr`Rx3X~X#`=8TVd5U^au8FD{k17|6$CMt%ROVMH(Ti$ zIjsak(c_cp1n`H~2}U5(jc=;-Iea9>2BH9m4&mSqG8alob+6d*9tsupZT?wATWH`Eati`HBT7o3(4?ds5W=5}eOi)$+hQUXll-fVX zzjKYR0+2A#>2y6*4!C+SYeIDSDsNfGf+`leQfAZVriGc4;S52 z1z3bid*&BeYr1_bmo_1PZS%|Ip5#*m%PHXgx7_ppqM#&;gGiL1XxOoJ{WBXGTp-58N5nf@ktj^+j}y$;POnm zehuvlM3?y4n}O29rj;Fz3BfUWq<`+;((eg#@o#qWpWCV0srI>s%<;9QC^jRGSGC=P z=uGa_Cm5{%-uv40;n{dQ-Gj5b0dMN%;Er4QMND#0W>|3-JKLOL`HJ(T;Pu^c3nvxW z?9zd+K!xNW-R=~)bRh8{!_3=4&|)CNK-l<^$NXXDNs>p_%dFtSj;r!ULvJW<#QBS6 zty_v!*N2YF(eA)A$d&Tm@6QLrzl7e#mIQyqn7cT)q)p1=Z)+}1R8fQ#^ImGfmp+_X zwgi!BQPP?UDD_E{m;+%<0;QHr^gJn@?G%lRxL#QQMP1FiT(@A*H5V`Ulc?5Y+3Udq z`w3#Qm|7imo-n_OdUO_Nb(-PSl(HpipU?%>!rlolFcAKZOIufV{M@=ETqGXF{}^qE zUQTVe>xfm5r8lz%%EXhm z<+jRrjnh@bOnN2eZjNCnl9deWjcR6ttN&fW!UukpKw_-oHAI(`*(%uelS$j7lSY-y-u*ROkMfR9orj1?DUnm%7#mHvLUKUfT(eSJe;Z$;=f zlkt~e1DF(wW?;MWpDX#@rys(v{MB%#L^sU-Y{hLA^@WV(I7@5W^*mn`tU6E%4*m{A zy}looNSH<}F@XVJ3?oop=*xXQP^LeTX^@!s0nOs~?Dh}e00M*4p2G{9oc-acgNhdq zt|iSV)?A@cCl9@w(if+7KrXPae7wWQ<*3>yKJa8Yl=d2L#I;aadr_9v6y@|txl6uY zwO4i2bon3Nj59d;iR-ZI7IS6hJ3p%A&4qs`|M0w{XS6zT!L-hMJMiR6!aqI_pRCL$ zT_SO4#tnq^ z$?-*jo4=lhOW*%sm}Z4z@N;}h=PN_)Shc71*7Wabzvor)#u=9EyvQ^0b0eD|$8A$7 zcn1<_|4O}sm7ei$(Lvwm!SDP^pUm_+0N`B?8rnCOGR%5mDI>-H#C&78ie6z8#Jiyt z$SI85H7tQfqOM*!^ilQOmdm;5FH-eW>3wiz)g@=6Qr`nu0Yauu&6~Blq|Cat>MHXQ zq#*6_{YyE@;*RcAK?6`ogSq@(19ZFeNO3-CG-7X@0-R-47_cwH;Pbq_p52r3r2DGx z>aziT>MlAa=OLUbS&O{?yBi-I8Rl0srQpquiJ7=$edZq#vnA8JFfnUH`fUThpFy<# z*RGNh@j_-RP-{#e4jEI)$g9@J%bsc0GZGPuLxQ6pdVM1_R)v*%7eV8DbsiFSrL4ju zOeE`b#LeMTB}M{SFCQ9aZC^OO`i(4>z|dmg@@+FAHpMnUb4^N~LbHI{P?OuQMT?9i z^nD;5m`|1aRdG^`ImZbTRh9Q~2$$zJg=t-vYw=)v*%dEjfu{R#CfnOo=byI|$zR9F>`1s@xIM3(h>IBnTd;5VB`WI#4 z&e_BmaIX=AOt)%Bn7V!dP2_SzVt4cPu=q-m3U6QH=T^hB%4GJH`Vah7!nG9Jxh19gtdhsdqbjhN%UUGq~aPBdT=|YkEoWOM5tCbxrOrYsjr`$Nyn)N3vFG&?&b1q-&Eh=s!@chS!1*l9G4rWimRhuS!f;)3Wpm?#m}4v*#` zzqUC!(%p-7Z!t^+$6O9f2NI(pHd0|bx6})7Urs+EM-rU+qSSRcd$ee>dB2G&RS+4Z z*v(vDSFxo_$oo31DULsFxO%Ar9757MvPJ{1#d*)?sQECelK(h=p4s{EFO7NqId*ZkJFpQ^M~9R^&_+ zle=sC7KcZlb%Oo$nYaD3$%i*L6FVv@th}$+VE*^`-mYAX@g3Srs zFXEM{4-KR*tA_SR8qqK9{sI}T=;c+gEqD?-XtvWCq_3JcPga)8&-o1_;ZkcI{(q}$ zQ+6^gvZ}(+FLNVJkuHQH%nJ0}mjOV7DX?dJS4~a6WWEp>##Q_N%SD$ti<1c3u7%>T z-)(HU&zn0oA>02xQ}S|>>+4C3zO~B^`Q81qp#IUw zaxPDKH1oa0MQ4#H9))@>*d%ja8GX3=dF`O#^$)& z2EY?vOB+NuefeNE?xpWKFY^p_5D-T>BD#qivF$v+@JNmTl4wHvJw22S;nVe;Dq@NH z6XJzgk5els*cWwwQUOGFu8UH;rOTA+bmLQ+xJ#0lXgd9LMvlpc%x*nQ?N840r=>pX zO7gPe1F8RA3EnFwE=ioYsr6?V9624Uc>jtDel>CONoKj&SA1LH;lX0g(M8Udo!D2_y*?IZghzbmNi6d*ajAq*1F*{u6w3hxS-$hpjpxTdn}q0lzkOf8 zstar-bkNs46j;xBE=L0J@U$IM-R6WDog_O`K0&J-2K(P;?y%eOO5GuMYcG3)g87Lv zJzDrWcv^!dcl*o{G;rV3Khs+1U^(mW{$Sthu7r@9m{7C$QX$}&;1*<{Ye*Xe^&QMG znk`XMavb~7%QY36Aiz}>jYLW2)*;5)86<(}%AA3^xK_7PI@{mAEs9Sd)LbKuG1mSDeE~Mif+6$@LU$fFpV2w-qAK84NN=*nv7=j zC-%#CJ&!AttfuzTO(KouMi}#6IR$;m|H*wgVnmjS=2$!$33eBboFPfOTqI_!bM{Sk zndNYs7h0y?oJlFX)7UBQTWGal464s^Y=2-dEF1k>{Z-na;-FVe1Y?eLx%chT;;AZC z<~S#=0d#9P#OU*3alwl6k4hU|ZBv(Npr+o>GxCyd8kl5q^z-eP-AFA#razug0I3ly zF%AxdQ!)VE{-<29wv{Y&hKW(w$!ya+f7;0TE&*4zxFl~c))Ky2Jt5`r{_=FR6-*Fd z{Wb5VDjMx4^}1{P;9T?Y06c~8_*yqf-}TFSq18-l)*~YzL3wZEaP8ybJ#IzHAZnx- z>0m^$BGvWH1Y}H}dM!~J49PiVK>_YAE)1>xHl*goi$vpb1Y(cCpx zREb7}K@MUikGu&(5(cA!E$tI1wGyCe1(d&i_E&I%hSO{zklPe}l+AhTu$zFf=^SC# z4tqfK_K4t_9V@Y{xcORqy5xrwmkc7xZ>z~X@%t;c^*b7nJI(^qg(j9?%ZOs*W+q)T z72?0%h?hnAOPGd>A9j!BGX?~R1&QA(eAdU*-GPvq{qKq)Wr6H$=h>;c6xwPNf;Ubl zWNI)}7ot21oI;O_w{3?IDh!EiF9m2#-CdhN%p?Ym>WuxuwA_ z=h9TR381>NqYH1$7+U&$EJ1aO;l3Ze!%!tWiEip}{8)hrhbGu!za`VY}s(~@v>er=OcrKGVD=}CFS0UQF zC{E^2EThYnFqyc#zk^Rm_v0|wtsEa;@A^}|7Ne4%v#?^oEn)P@_VK^APYqG9bMug2 zTJ)EkNFsoxjM3z_MdFR<7XFe51iYTH3yKU@J$T*Y?Drqeo$PvhGA!0hFbnqgS)?jG zUnc1#tXr?1ojxTEQbnc!CybFXxw55l&K*P?1T#Y@IS6iOw%!lPRvqH`2%oKfA-wsi zC8QZyd)RF>bsP(IN2r-4_cA{z#gCL471+*QDu&E=)XpSmY619?nI3_gaMhwVLJ(YC zl%c(5`NH@7(S*&!(a>K~YCWp<`6mpfy*QqemimP0z60~6B3yQJ_`jX>Ofb36CN?~& z#(equtoAMO&n3lPxecpHC@a?BbP|5}`PGqEY>e7Bm;FCNin_nITga*Aqq{okgf4f945 z982(CvQ9} z$l+veGR`B%Dg6hUV1PW^`L@VbGX|`0*EfB1^Qmg}MpbOqNV*r(ScI1D#G49~ZjrmC zYGQX4C%AHl2_YJFRE)bp{s(KPWH~-PJ}_H;Fn+KpaC@6OF-%=)xubfnVwGEAIQtc` zO{-hgkrPl`9G?*4jej!mJgs{#3N`Y)T_3jPS%}v=dFRvehj~_C8I0{QOd$mZOvxVS ze}0{N4ia;=PLG8%t}f{qM9tSCGHJs5`+`w%55fc(v70D>6t@HY@x%EE&x4#G4!-2gtO8efoEWWNK{V4m(r0o1M9Qq^#Hyj;toBJML|=G1`qdGCCQbK{nr%&U>jX-$fYJdSU(a?7 z(%^M(;Gh$ZPx}G@8~?F2z!a|MI~4u!mE3XCSUb-Ch{q1VR19y5Meg>kfnU}u=%sU zxWY`G5mVF#95fj>CD!Z}vV*brFiWvhV7fsD$LzPtYQ}pnk1$es(k6OC{w5pem%AQP zoX2nsYDC3UQvFKbJHEf0%9NQMg z_C_+mVu?{p{rE=uUpaUK%R^kFg%r!PtA&vx#bf3GB@Tc5An49`s=rE?aucd-#meV+U_&a6=29yc*$ zTfZof8N6A=L@~=l>JzQPgvsdGOKu81CFi^+M1Bl6m`*}RB(1zi?z&W&md^~Tcnoz5 zk;W>egYzM7R^E7IzI`3%>LA1UE_3I1lqsnrR$Z=AzZ5`f>61pxaisnC!7FOvZKT3D z)%F@9LYl5;0t;i<=E!wC7l^8=*sXXYKR0{DNU=2`=yU6*alzvhjx=tI3S4-6MNy{H z6=;x=n)Ur!T-2+qCkRh&-CHjus$+yquQ*`iKK7#?cL3DegpFlEsGBF-PVx?^+VPOOg!|##{t_$I=J4RR zILPgj0g0M7AY1YGTIxYyL(U1fL|I#S zT6BT6JkS8Yx@BcA%XzkT8jWA%k<#i^QVa<$b>nEL6L=uNiFOB>>1Uq16D+fVMwQ#$ z`CFt}U8V5j4(6?Q>rMRW1y6_|`y)8_CNOFYcP|FooD3={0mjWr_{t6k2MjXgPC^T? z+iSDxMFV(VcNiV=6I@B)${TgNJR4kEUhz&l3wNkuUIFbgcV%V~)OJUy1{gI+9>=R5 z4v02SVrM<&W!T_ASPt`ia*opyh`LQ*b`4y#^1LGCDZNKjYWAXmy$X>t8V|e+=R|p^ z!<;nwBRwrQx^j5O6w2OX;IiBA^e|<}@-6NZ2wQqGZ0l=#ZIM8#_~3nlfJ<~3pXw*n zfORU9b5q-ZY%fui)*@~OYvF1%52|t!w-DD^6?+|6rMr=3C;ln0aS{_XC>W6nc3t5a zZkT#Fno+2%WNcn0yeIVaqFh{?6~K^~QVP%Y7Ph!;%a(aE)mrRaEbFJZcRIO&Gl-{9 z#*MN-0-ceyv_jC0Q9l6iJI*rKqbW9>KY=(>^Std^yPd|*-yUf?UJ+t)(d;i1b-Gk@ z+W&DS6QsD{Kv4?}@Dxt?=vyS=p00U|l8PX@+kz{0bf=k}3YKho*TrfZCIxY6L4TgK zde-4`V>-BT5{dM>`AB8FPGG^1OW8;TRfSw2veMgaM(P?~G<2`VgtaPQknXnaGgAAl zx^HJR?@h|v>33J79o_2p5HNYI}olF6if_krC+vA!auh9`oDwn#?`thE7YuPBqyLk%fuek>gpYvLXAEM1G zOJCo6V+c;WJZ{R2^Y=DK7$^^jXP$)!RB^_4V-kmJ5W^|=$>z2X4}H3en##-DrULC? zc#O#+0|+giTiYq84cn1HK~ypfDyIdouUl+EH}AS}OjUkUDFST@hlvuPC{e zl2^4PKoM^OQ=CV5mpx~Tk#?=Mb59f6g(pIv4)?o7+m^~F9)3+)_5Sz=5QTN!&vB`_ z%^hLMpsoGmW+NjT{Kh77DO|C_!w4EI%IDVss+zv=)5^4CvY)c*Rp9S3N~X?X>6ArrZ@>Pn^V z%{h^IODH%6TItFG(U0)EFanXa;&;_eFtG?ud%)15g_D;6>J9>NTz;FP!D?o05i+>g zz^|czfTEzTLX@&lmncSB(uB@*zsmux0iW~lOKd=<)x_>PuKwdOM}z7I;q11H&4hdY z44JXfYv)=SKlQgbsVt|K%Y`9X^9g~&um`k7Desso@&xjt3H zt$OZ=60XL~Zc|+s_0!RxYYvkk18F`69(x{+f1X#S6lN@scRNiXK93dWMVI{0GcgU{ zvB(wTtdFQ$mS{wd)UXZy3=+t{%%5tCA72!j{9W>tXq z1h!;J;vjtEbuZ}SNhZ?jYe40=b~XOjpkr#+(RWb~&BCg*kZT@xwk5#?tkjeIYgZhe zwvJk){HvtmBDt3R-t=v_;KyTyAj;Bdt3G9VX*m+Jik#H?0H&(GvpYjno9MC+ya6<@ zD=67>cPf1*ktzHo8BiR{Ggf+Y=y0Fx=brE=^wkkUN4$Nny?O%ozEOPmWicVS&97(jl-r2A6 z(+95%V?I>pFiTqxOt_y0GnnWkhv@3_g!WnFXTGeS>0a4c^9D51{F^|4m?upWJlXkL z?1!XAaPq}`CR_ryuVER#7p!DF&=1)8?nv+Xp+mVJk5z}tcFn;2|=$n%NCB7I2Y>H7c`3N@5*(MYV*wBYuWP2bRmJ~uT~z2}Z6 z2y1PTQGO%;;6v`lLMg!{XMsC5-+Lraa|Fm%k?KwaP{_PX+Brv=69F1-GAu1}_ew;^ zhmZuWTvn>#kS{e;f~bFU+QB0B(7w$9RFb++>%JrP>qK#Xe-N%EMFs~>| zYm7ROt4cBbMzk$mXWs@kcjw}$_;J&9pQ-vLkIa_il#1~gm-RRN^5cj%l?=Jz`M4QR zlxjO?`{c{XG(KtQjb{i?nRMMm0FdZuGV$eHYK_{QHEQ6kF`R$G9CZJC0@*VPyTs?F z>5)i?_nEM2%utqmlRsl+Q&T&>_w^&<2qd82Kst^)IZ1o5n=r+(?Z76hW|(XwnQS#h zM}mFh19yuNl7owbHv)R+J_Th zG)Ta?&QDeQii8m=PND_=X&1#KU(4`zmMkq;?^w>{T%Gi%eRE7v(9kBppsh^~CA0Hz z4$HKUza+HD?;|~8`2V8he(IO}p&S|0XhzpPuhYY;kYtfS7n!5PXIT&bP7>lu1gwiHSMI3jNkaxfY<88arwF|tnk@nu zPuT~m#k<7^21CmW)}UVBUxl_jTRthccALgF=ZR>M57=X+!T4h5U`U6c-{sm$=gE=h z!h_80fid7b1&UhWE-TskJsj_LC>cgUaA~0lM5Q`s5k+rW_98LFU+expPs!`%9P6pD zp+S@<;B^CpxXOr!ND8)tf! z%@$eFX#Ts9)8VV^WF`U-;p0Zxk%c=VS_O*QCiBLQ`HY>AM{V4rH4H%|3*n9t5C0B) zQ5=-n029aGaa7aaPwWJTE^<-C2wW(Yyf4iiO|lEf5B6z7Mhl*%%wcfHz7>Y-#s&89 zm==9^=GPFL^~M~}(e}s=UHaes#uDGiGAvG%EShi?M%5fa#hAlf%$@Z-a5p^G;=f6Vfll*T0)KQa)?82cLY-<7Z2Y!3*oCf%<} z%<=#X4n{lt){A&mbJwvj_;{gVmT8>W1cs~Yc8p1!sew>p){@uP7>O4^+~lAC|I(7{ zaIMLWw%0V(2h%swcxZak!}B%d{{8Wh|+Eqc=!;b{ADc#)d0*s@2l`$qtzsgP-a5%G{x9#&&CRR+B};+J#U?EmN)T z1xs?0D%w>{$Xf%-?p7rxfhyOvn8gyx&y$QRF2`#+OVc zaS}Xp&`dD1>)A=>x-C@yHazWz$BLP{n2(f4)vM-9dv#DLL^SNELUHBkgz1LCltRm_ zx(=pq2ESgyelW{FXVB~tYV=tOyO98{?n-(XHzIfg**AGvrL~+@8=E-mKw#*UECT&? zeyiKT$$!Ygz;X4SZ~*%yYq$!ro?u{{ARr6y(T5GOcKf9w81b>>wRF|B(n68t{ro#V zjfHtCtAh3b8%22Un(z82<82QOp1cYF{(C zkDW>GP6PQh}TD6phuIrG6f5 z%V*1vf-_!!z4z&tgxF<2aEVNzOYG`8=Q31|DL!n4;ENxlKi~ zYY1nuZlpDCRHjwNrKH8}th~WMq^`IqFR*ayRP_-Ao<15JaDB$>XU+UsulgYiO&HV9S4e}|$`>#n$ zF~SoYpD{UVMn|=r)2FOL^`<)h4KJ#xTof`HGIL@>5g=m#W)&k&>n0_+2Xcv{iK-+f zKTX`l*iCAxyFvyRbP$TM3_Z>K*?cYCg`!dRBbL}EJH=pCiIj=>^UEQWC54k{G{j2i z=oVnxrs)e2n!ZnVS_(&4y&wx;=Au_L=pK`@<8$hWOsw{l$nJLsVMjwD#|H{hAs`8} zrn=A*C`fgwyIrEA!#jXN2OL{?D1Qf#mX>q(oct7wc-qj$WPz~VR*$slYKV=--cs*i zHrSwT6wx1c1hSOkcbURLUHARV1~VBT#Nk62!_YhV1>fC{pdK4z{z{|n4%2$g96O!Z z8k+>w?CW|N`O)8AdvQHCgZGuMz?e;y^;JvX7Pn;yVPkgeZ%$j~Qyq&Vp_8CthP?1u~)CbMj_H~x?dfGo&!v@3K_+2d&BZ>m^p z^~Boy`_M#&&04^Be)A$dTslsP8SK&T0Ka6yzF+ywE>m$F?`|CTT%jz}>fHU3w(~rI z>O+>)~L?Ue$mc;FHJ@g zB$Re?G8X)~Vv!L0qy8_)##srgWouQoQfF&%|7x1cq~w^B(vi>RZaa4QZJ7{k zhkLJ~N#|=P+6I}j>G3nzY@rJh=Gc6ZnY%Euca^Xd9U@IuiuOzVI~sx2FoZE|!EWQ) z=)Yg8*OOK?*{5WVz)VOGLkko#2ZTxFmf+1175;&6IAO~lwx?Evt!)IxT!M$`CmR>d z?JSqy?djSsvRmyQ@IN41g}uQJ#tU@+wrPlL6^$qD9p{+4Blk;-xY}@ld9-%K7iZX8l{OyEHTZxn+-X%-kvZ? zDMS{I{0MNIfB7||)_v~+dU*>?${}C>u=#p@yIh=K@5Z`Z0K({#Thaz%5UgZ>-0wkWW`uL(65h6v&H=;z6J}d*Kqkk6p#;Cev z_mzPDT-I%%Rv1BGCL;9gM7uIrmt31^qWuy2J&WR#i2VvbDgN$f8Ad;(oMMLzR_j7{ zmYArlF3azKXaV+6im29e;BKN7*khfj61p65iTNWO7N34llV&-!A^`&}*44G0jt}=w zo$GQe2@9R!vw|wee#0~rS~PocKwKk*N;@U(AFZIqqkyoS1Aqug=q{O{drb{wrBJ`d z;~?ba*a}xX)@t$5m|w})n}XK%3zgsMKcK9%T5{_G`VK;u8kVB&0bXD3kr$antxhJU ztq}IfJ#}sQU=G+Fihya(;S)j`UA7z$d~%%`5lIe~P7JKT>wMWBRBslILUPL1GLr{VQJvYHx^?yW?aO2HLPFKLY#tU-nv3y=bOZZ-T&I+p5CEP5efLN4a0eo@@ywO6JIu%`Ia+7O=U* zKhm%qpLdn($G8iApWgHE*z=n$*K7T~wB2x0k1iLWQI`Pft_h1DI6jJe*{OoyDYfKd z4eb@vX4Qxe%&&!!+ik7zszMyrggq^reQjuR8Ulp5bNM=PxKQPG4YF1^^#-+G*R%SA9JrIuVE%g!( zC>YoxMq_E#_at*F6;vd(}>g#6kuB~&MI_7;}-0RH?dO8@Dq1A_Q2nOx>6ti4QDtiOje33#|EczC6GBB`!M+U;FzT@AB20NWp|h=v≶IAKh zx!A$n;gZXPQn<*`a_;zhYl&IQ6&>@UyLfgBpPjl`hsbk1O>f|KPPspNw5JbhYzOAA zgHn2~PHpYD@uPS(qozp(wwy&rS)}>94JxPo`n1?mmsXu!>=4Vd=@~g>&>qLyBdt(WGkH#Pz>&wMeCP zc<@U27A~Yre6-}2f9V791V$5MMwaw%4(bL251ZPZl3vy(h!W}TO;pW&RaWot3(9uA ztWhZG!g}FqOtMwAY~sbbd@%s>`DebESV?clklntg9Lgg?u`9ig7a{OyPvx8Bi$5_K zpCnF?KF_dARjM}Sf)I4TVNdy+5b}A&j;4F05Pk*@}};o zJ)893`9Xc!-<>u+t;!KwJm_A&f~3#LsFS+ zqr>?8t>ec*&m)8Zn+9kaNUJ$8#9BI6AlatWBkf|3^mG>gyHZxu;h{yTAQ zqPz32GkPqum9C5Rl^HW-yoj@pUz!!B{C9;s4zP^cA6$-7MA3x*uCQCXo~7XbTH0I$ z_^mk5>*<4@cQsK^h_M3CpoUr}#5v`Z)>ET3V7mLOC9rie0I-^Tz?O;e$DS;z%zO+vN}pr=X=*Y*-DkRe=NLHE>yhcV8Z$uHynK)`_G=cKZ3srVXU3vd z<@ImL6Lwj*td+3-#o{RuC4JSr-LFQd%*gvqkkVqn*+({+nc7|wp ztIQYcL2`QMLnN%{%(!;({?uBdYQg=^W4`-n7Ps4TkTa3TxBLaXU5-)EZFf|iJY=y8Wv0nJcJ5%k`ihU)f!67;L%FOInvt?_AsymFCx z|0*SW)*V4FX+M;>R$os3cZH^vuN2ug({-W*;|^g&ChCtnj`me(#i@hxkt0td!K91& z23A`pM)9YIFtB`*F5}l}wBs!gkvOIiE&84DhHww6cp3=`aQ^ZQe#d!Uh_qi{Ie+PJ7yZ)BE>qx;d9*KZMN&2^ySw^)>R1YeBPk=Mryh5s zyEICD`;;f;`MxFjZvAuhAnBppu~aal(!~MuC6FX8(3v>2k2-vSzL85oTWz-Q{T1_| z((J|mYY@N7yZUzy7W;zcdj~h#VI)$E-KlxT?+c1`h4yq%x~u^D^vna})qUYylfV7| z^KniD+M-fkx$6AL*1$JDk|4uL{R>D|aKq-@R6%`hL^TA@6ExixWGNJ9aDc&)Mm`+^ z#zc`%>hZ4^d+J&fUF*#t<>4`)dv?d?U|qBb5_2R^itWkjzSE`-R9z! z1v_}fkyf^bSwD zS_|HI@YFla46*`<1HEd0{FIu>8!;Zjr1`Ha+5uD25GY-q8~&Z$nK9dGV39l@m9S~neXZn|hcG<6-EFUZ~OPvdr1BX6eRabmVRvyXM z=gtaIpmxLnXvH_=TU;^)Gwl5`=GE4&X1$Jo%E`Ao*KqkT>8{1ZJ7! zRTx=zb285`C8@#mXCA_9to=;Ey#=-lvzQqZ2-V~qN4x%ag@=Noh;}P#G2>vj>{{x! z$~f{ozc6czwxtTUwLpV4CE%V+__gMSfa_ax&fWb2SY!HNhA&$3O+&H;Al>%z5lJyj{u!M9!A5 z{~c-l-&Y7cWL)+=S*fr55q+~&I9L6;fUjY;`OErIT6)GS3m+SqhtL`5y+C-uCYrs~ zZdpUC^POev$`UQggi?bB{!0Q|s+Sezi1YwU*f6Amc)etg<9h8!o4 zBxjO)es7Bohc4U$Vntv)$bgbdBsI?afo~~`3j8LZ8dpS1H?lGB6H{1W>*?oqo7@7C znvba3q#k~*<{C70-sIOW;I0kS|cH)&h?d8uE zRCn34-1BmJyD@aPFlD(k*uD+y@~NO~qL`q=v?oTata)e}TE<;}%Idq8t?B6^(zJEt z^xK^;DzZKw1im&`Xqu}48BlnLA5E9c;!~0dF64I|9)<_i{Yme^M@D`nrR8Ggk*{4* zIyW%BrEZ$C$!3$s2L22h6aHzR`NRBrBPM>>SQ}5D`piEY)2A!HuM+Uz6^mSw@tw4l z6D!IS)ilRsoetW6E!sf=R*CD{TqVw?hRKaCyu34qEyZ(it24dK!uDkKko&nd%}E=u z*7i1_YgN=5RFo~m9h%7#@V?g66*8>HiVcwQYBzxGlwHy;EUVQ3lc)!W=D45S#&sTB zJh{>~d+H_?bI&$c?v^J#wejx$kaV>|88E7exK61?2f5lcHAxKk^Q^UQ><`Qzt^7=R znY0=+cBcn$bl08_Go321ya;<$;Gl0H%(V!&GX^P%Db8osp$7%_g!8w#Pl3;I*Qc&z z>*!#|sBkjNhzV(`t*GdYe{4NDr%B%3Tm6v^uN$fPZu_G=eZ$Ld0Hh#i=~jrm zdq%>jMafO6*X%0qPiv6z4ufOqKA@u#UD#hp-Nq!=jZMiy-__>zVmLVr@O~@ z&W&}GTm4M_opWZ1)uGrqh~m;0u*69Xbk9R#Oi4%Fp7HI1v)hXTAW?`GJ^-;I~hZRistk{y9mtwQC9#+6Eb1)LqbSs&pTXwE@_9@ zUdMY1K?yiCPh4vj_<%#OS^?n6*La8>#TdGYUC=jc$Ti7vH)=4dJE8tnras5Y&6UN$ zJV>V?-Z(ErPBDiIIIVHIjX)qd>@k=&0Fxgatsc-TAsNncI>9VePVLL>jbwYY_^KJ8DTai1z zbX}tPs7I?=;44ow`YZe~yq*R6^ks8fhRud2JEiJeY`f!*I^Rlc@EZV)V-*?lkm@=K zoO!+}g>Zf7euVB4{em)`_P=<|T(Nn!o?M2^?Mdoi-a)v$XiF`eta^iOx=+U!k>%it zh$MDIg1cJ4SKQn0PRX?2*CoW$JejsX?d-TMU+h6OaVpw6h2Vzz@`;`d@Dey(pxh42 zg8QS{Kitlq2Y9Zh$xP@mY>?Vg_?UZhT2mQPQHv3{R$5Y~ z7*or)R8u$=@rfT$PXh1H&2O2`M|lz(8=f6FgkhE(#MfB{Yd)a{bHe1_c!*v%DVLn& z=V<58m3q#8r*k-4g(x;r#+`C+7;vVU`h>MJrg2KyL@>5PRvs9I#X0~4p#}~SaLq?Dj|fN8M7p@ zEtZ^?(<-MTlw&zw%*<)dGv~z|Le6Z?+K8ODVivRO_x}9xyWPJ3eZPOW@dvY+_v`g~ zKOc|B{ed|{W?+D!(3{5*gSDg>PEu6fG34?DvJS5!(Wb=Iz#QKnNF%l*vNjb5e3)Wq zD!p>|!;zM`ly63gl>LdN3+6s(dL>UU|G3ou*eog?q?2u`VH(WVybXYZbxzglBr29n ztVIVqSRqdvO{{XiCJ$}_8}ht#GG!EDhy|n2+pS__ zv}?J_jD<)wU7!T0$*o2?>=x0eiLpcpqOuTJ?~D+Kl+syvn-n7Jz99FgJ|#c+F>CKb zzkAu4ZRx6sXEGIXi?NA-N6VWl3RiUsyHyp?$Qby{jGoJ;5$ z&sENYCimP$bw!^4t%JnE8`O+^Cl_)Ok!t0os<7}eQY12*=9bd-C zo0Y@v7Qj_~ZcY$_^kiYPhJSCP3) zChOc2PVTw!GI|LB@^F_Qm&F-l(vZ)7Si(YwBSw2y z2l`m!hn9!&Tvc?tR9zDLn%6s!M`aSaZttyuC?}LnT})+9Euw|k2->MGAi&B2u|Lx+ z9#3*^)OZmXfs|PK=CO`xgGem;nKvS0--olm7w2fzR@2fPX&1SpL1mHZ*g!wcasLdv zaf4G4L!(^ELY+zv@Ajk|D-_^ylA_u!F#J=f{F8f=F=LtDbSYS4-y-%GQS$S_(X~wbv}puan!#=MD@MijSdZ==W%2-0 zUU|T#Nw*XueqBRTLsEi5;QdI~72iJEQ#LjGZBI-uL^uxVLj#O0qje2h`bhJ`a&&cG=LA`G(v0-F801TGYga-IScW9 zt`Kn_hu8#9I&4ulHu|~>pE}JfT8YE*s%lZZohuz~*O_4kpt{U?3DM0Rr0{|>{1c_U zv2DyJuvcx}8tGS<%p_N?=>$$BG>5;+v9hVr*&^%>aV}OMk7{nZEQ)e3R^V|QU8n&2 z=@@xOyCMC{vw=JET5f06x6#+iYXKlyX;XX_g)*VLDYq^HV2L#HF z?)5FPMN0~;Hq=M1+oyB@2VE_pyQrL3O2i3ePy6h5(L*7o_)6JK1@=>U;dHjhwZeKbOzqch$j zQ!(}P`B45m%JxpC3Qw0reRMfOxJ@w~F?4a2==S&Tgmnu5y0ykjOAt3n2VGc~lsVjs z`3b#(-K>p%^M#6)OU%FAysq9>xp`CTnIYDO8Yn5|Uv??`A`1Pq2nSZ;D&+yLljzm% zT#MaVPqDhi$WHTHPHtApYdxjnDcA-%a4^2W)T0dUQ2&*vsoI8L zQp_NlRqg@Jih01rPawwZ%nZ%&vYZdgB5tAJx+?zt(3!EX zUy)EeGi~)<+snX>t@N10XdN^4#NQh+-hXrGFUL6_%(`tc#nkN4Sdj~U&r!a4s)2EH zbzESqT3=z9V}BqIBUNv2_%Rp1uWZcGlHN;+@AAis0rVPuV3K!~9Sa%d7{3wR8*7WT+cWQgAvfG|+=b@GyY#@dNs0VYEP)hkok(MFz$MwePv%<$zkMXG&Je zCeca?KD=?C_>o%HBM|o!*q!;OBUx__alpwqKZ&8h3S*O*;_U{!@!cVg?VHLfN7>D; zBWjH#npAUxl_ZM3HDlCPS3iC(t&bhI16O^SVDP$N^=qxj)p)6A+>V7BbkFvb01L1c zw8_eK%t1)-%C`;zY=7F`8~3K+8OUfrtG=Td<8Wo#K?_Iv|e^ zhO&Jj{jMR2EwjQAAks-+(3epez_Tj|2=zJE{o-dvn}Q(7^l_q>bf7l6f;Il?}j6P#~($M$(vs- zN{Xcj%^|<4M3q~Eu1rQ^BiL>;vshHE>w_;T*eEYoQf7Z<^e!Y3GQSC}$7 zv!+=Fa`YDR1--tkzF*I-r3OzIEbi?Fil-IP<9v8BTvI6i(#N^NqUpf% zU%wgbvauKlJEPrAo_gszCC{?0SRK#Vxzna4J zD0AJbnu`mY{fu-Fu;&`+P_~uJebs%8*V{wPC1kr@#6w-wm_hjwitlUYAoB}TtCXhP zEZUs-=C9^SR47?Yz0S=xyyOX2KH;+ZGY#1`Y2p5NX04o z3ynXJ^mQKAJqzQ9_%A-JnD4MMlivJOIhlQ$D#SA!l?iw@(vv1nt594s@zb zh=XKg#BpUfS8B(V^2ax%3@7Rq2y+YUP;g^Ql=uE7p_Tg?3pQ73`_~67d+_44bWr-= zL)B0gn#)s(>jrtE-@SO$`=kH+-mmJIr&eM>64tHq-yZp>BXB9f z7KKHTFmt*mN}crAEylp^`!d>&OSqvWA>G_L{g;txUN6ieb>{qN|J4&lAMTUJDmj8r z2hg;X2)X-?ikJ?*K1`^#)n%0b8L4m0*bk4j#;Z=6SZ80(OX`V^7H8EHa#^Fd1##0q z&OIaLa4%6F`TTW2?#E7@R@XheZEXRyeRD(42%}W4d733e>@bxa?Q{3P(pqyz$82Qg z{@ZJ@>id8ye|*?S!)jUqsL<(E;fk+b0Q!`^BRj<*{#}{R{89fMv2Gh~yUO-7iQ=52 zUy2=gO}O+@Y}>e@@y)c0eM|1BLRnq10COr(&Q`s>=fFTDR&k79#Z%9$5Z7;$Y5&7E zQ!hI~!SJ)jccKk-wtM{Hm&aJeCqJ+M*u`v08%`g9URX_a^Qqdl&MZGqHiM++tqL;C z^qWTO|B?P@+;}0i`XXHH!Vu^tZ`FG~gXb>VhEOZ&H_{0r+NZ)Xl6GjW_`>oxI{*8{ zJH3y1FFHwOXi3XNWC9Iq=vK$y+0X^cvy7jWbG8#4mCC)mKM^VofGPVM{QsO@{olTh zKyXK2lW5-T+7r)#T}G&f>3_0Xbm+m8f{%L*616>liXx^Y#YT3l67tUPghJ$?_3RuE zrXxN4zaxo(3e5*f<|Y&0DPh4C>i`dF#9^MbwR}lZtZ7ub_08He#lF=gJ-}84c-f%` z=AAC|;CH7VYoZ)GoWCqpAun8)y4imDQS^$`Km31i5mR8k==?A*b_x!k5l?3WvORAo zePAzfd)LPVu>1Hv3$(ht9uf`2?Gb^gk6>?=KRk%Z4($^l+zC zJmY+|Qy-Vwq&S7RGCGNu!DE@Xtq;eLrX8FbWTw7$SRS?dg8j`AtG|A1taX{S{PBw2 zs~VUqG5maBZgfBpZWRYZwc*?aC`&$&Yv_;N$0q(7ngKLX}Q-s=&|d zX1#>^>$u)g3%>9*Y$;vaPG`L%@fP_h%(xDO=54C+cL;pCM8~SUo@-M0Y^=7C`Z%-B zD{ouW-#2?2qbm9~0qGv%oOqdRO4dv&U;9!#a zgwfq_S;UM;5*aPFQ0p9Cv36Z~p!;?Hx|qB9Bwd)&t?(zTUpGGVjo{M5C3+ z!XFrk-j$c)ElzI!lfB%g$@?b%Eyl7HUYp#?gR*~{W)L{EjRi*%t~Fl9$lX9(AIk~? zOVxXINySQ@XXfUF76QdyVpw9ly10a4H)|NX@S0=mLD%I!$DUp>0(zT)OX2Ez`zXvB zmT5YUblAJo{LagZWR5szW#8D0M4un@vc@p-3!b1x2k5qNXnYV09tD!f01xL3xNag@OR`*oufF&}LC z9`#qRrzfpg8L7kqpYip1+!(j@6W9BkC=zsN#V{eO2%t_au5>O)uI4H+`dxuD^?CKv z1Yj~j8dkzT3up}{!(QI@&Qy7??!z}^%e2g=A$kdR>D&DyE7ioz_08n&_{${Sj;S`? z3+89ydYNhsG1I@RYpsCtJaLas_*dM z5tngwh!6|vqL)~uCQ;Fu|a@b!&ggFI@UFPD$YQ{I~aWl@4-f}3)mrmcaPBPcY%~zk>jLyw3A^(n#@~_-{#^3+a+?|SK@D5P>bs#+9e;H8r{)iAA| zZ@9*e<5UIwoqiSn090#fSAC)EdWG@I6M7!wivIyGcT{7>Uhf$GKIC!oH67!Int@CE zx0q)y8cDJ4C})Vt_ZH98ELr)S-8|!eJYVaea!PY??&CM^QA$wu3DnM^1v#>)tw!vo zA}B=M+*D<(|J?F)*R|>`rv<5>QjFg$yGAzkdm%I8HPhB=tZo3j*i8`&^9utp+=}Yo zT;B}i$ITlR!!q%k2|uf9hAX#}e8o&Hu?D3?$BV8q*t#*>36Ll9M4rSNh`)k+Q;R7x zz`_((q#zh@(+#!I1<{`jxTJ(3o?p{q0YQ`Cx2qY;r0?JHJ2GD3E551YS_%6twYDwT zH2GeyW<#;eUC{aQ730F?RpV3)Pf9Tz$U+FfmBR)#VgB&SU8!|h!;R|U_<+Tj zocm4imNI3yby2DD#nctS8^&k+>k9t_fQII!rmPkR$f-$R#3(^uJ99ub@)z|r&beo+ z1u45qC@)Lgy)8+T!H6!N{rI*2P!`>OiS$@SER2W3l@2pHELIBz@NBt42&H2-!${?# z`yRRUnawp7nHbh|DDUKZaB0tpoFDjJ#MeI4r-n1)NekMb?>Y7Hf#JbYoim}Rtsm6F zWI?vyzcu$VC$YRw5JuWpSrtqCkVNKm^ezrXUHdj^H<(wsjXZ%wVs zvAxF-EK0|jG$hWCnMZbuJz;J8Eb5ze98>RZ^sQeGBrs;ygo2*KAAgy(3iR@SDO2y) z_uI+6+OnSa1h@`kCIa`*UNO(Ke^feAa^kxGfjnU0TDD$>+Xf|OI(&OhkbfAhXb-=+ zoLVjLUK{?RTQfoDMJiOGM5AEZf`BT@G5{aqxnihVD8p)F)BQkeh_0ol`#p;!hCX8(h-p+!SFfO zVzbw(ZyjndK$~)mSVuP2hapAQ0cKC?{1*w^i5?UsEVDl8CH)U@Ks`0rb7FIj8-Luu zbCXhnI7=)NY$mi;Ro6M~Yzjey&Bi^4xus55V;nvU+D|^Jc27RlA30>@@iQc#vbyra z<6j(Km&9+hcO4!u&q>rMxf>65GOH8R8#-Hh2+cGtY4P!a_H5j+927D@p2~FhzpM;8 zmtjwSd^4qo5?I!B2~LMOrv55_P@-ogr|P$#AaQk@zuX}X)>r@=fA!+a8>`D{qJN() z?mqHmv1I3`Ldy8j1%h>b&DZ(IuRQK1h)i~6n>Imj*2rU&CzlkzwjbMmu(Tq6e`(kC zd%)1Zn-_d9e}<&=E^p69dwk5k{N(+ANA&!;f}=SHVXeZus~)8}n!*DESbR;bqs8v8 z^`~vW)7oSV&oZnkD^R=o)wy3X*=37Xz^LgWd)=DpR$CC}#H@Txu<)=N34n|lwa?Q*CN%Y`|P=n zkc0+-I$!=@AI#;KHoqd{xVOWuG8YmE&`WTxD4Re>{xuH|@r}iJn_|{9>HVg4F8u)j zze+Z9kiuU&3$rS&h*x#-t($P`<1WK4&TQ;%JVC|A_WbU-nV(L2irIZ{EU=#H68O{9 zw!~!0AuO>k5L%nex|QwfInb-3qDwyXP_a&jLT@ft{Mfk3t}L~8t%Gxa3AW-D%rt-C zq+r6Eo@Z_-+%Q>&fxH$H>-VMN>Lk1t@mtMabPHam(c_y2jX1ZTDe#&FL@+f3vgAMO z7Kx^VYGGdpeY4&X7Xdg^fNs1Oq2?3~G-L98B_T|jVNOpZ;@L9?E+&*+5MOxw-Eb?1 zaUVUUvs~2?<$!@>_rpzvf=0tM;hESLVXEdi1I%HukiLph;y?lEAb0UQZd05uy5eUh zsT&oT$~>8Xhap0d#q0aPcHckn)O^!-&u$bsI#2(T8;8PboyG~0B zLEFYM87K9_--3bN-RnZ1WLNa`Oczpm%h*@)+HGc_Mg<)Khb9l=JdSUpSlhQPlOf6n zY6(l9C;PCGQfty&o@yiy_bcFBab{LaGZ0Os+fOf`*2$_b%|#zcn%>>G)A-^WrpN-V z0x*dwIHqHV+m$MItlqvv1@?Qi!7+r7+30ET;NpY0|v zYgB#$X8z!R2!NN*dplb4yb$-4kMRQV>$kOZPIv_(x`-jrrTuhVX2U^l%B;-(2FSZqzN8~N z==q+@bDwtH%h1Wb+@Ygy^Qh9X*8K>R=_bBHn6l|SUsfzhGqi-L@-B3>2*XWTIC(Pg z!vgRx_)e(6@2jZhv`W#PY1K=)|7NFTQ%5I$L)(*MoldIqB=Fm~CX25?42_K+e)+&t z6&U#CO3dlw7ocX2ql=*VGIX2-0AN!F=H?E1VxSHjSNOjp*!$ND;+EC^|K#NV%V&@t z8YaTaF{MtS?G#q5GERow7|2Yb z&#fdX?k?Bsc*cCzOd^z#P7LKk{=BYu)XW$j^*x;%ZvHIUf~Uv*T+1!e{!{KSYaZDt z0jtj@MztvQPT!dcr@uOV1bN&e+3N0J-%k$xDdo<(of{1R0SdXmu1lUMD(N8`SHgj_ ztHL~Jc!Wi3Epd29h5aDVJn!`E}DmREI+~f)FZ%k!CK7D*; zfmWKo$=H4kJT}x@r(9CLwUIe7PbxbXN+t%?3+0Lfx56hs;~-9Je(+nC;LsVo5y3^F zSS9^@I!nXx!?lldbszsbavwnS?&e_gHcSt65qn~Oc^1_*%vUWF4$}&U{3bOGlwFMe z;URX2ocFHY=iCx&c-miIHOfO4BvW4ksRr}!C*dB0H%-+%%g=$hL`=Kl9LqdQc{0NMmTq?z9{=P`aZ>m z1=Aq$fqdswI$v-{7etmBuNb$yBW`dkkpdNs{y3A0mmlG!`;L=J+eOi0O9g|B&*x)K zm`T4fLW4mJt94}Je$vJO<06Fbx9La=Ka#QCK8+%px8B%oF6)N`n@soy5+NpcTBBfM zv60VY7!zG_Zbl_N{`lFsDQq1}qvU zXJ|5PP(BPCp8K(!ZM@L+o84iapiCd?Tn92iMyb=++%CtHgRGs`H1>pX&R!H{u`yFb zvqI=sE-v~;pLUzhg>=WQu@Vcr0f^Qplw@raC1+suY!lb@wKAykCCb&vK}Csdm+db% zV3T8V7ME+EvkED(%(k182@HSy17q#uwA}&)z2&L`^Ww#x4&=oi>{^50Rz02%(kQgQq)FZ|A4Q)&a|`K zXdOwwqzImo89uw;nzor(@?<(X9Y<@7-Q*IHSJ{=D;P*j$VgrfQ42J=N=+2?Rg0)?1 zTT6-!ksnSq^*J%ISuQNB;XtjOIzxMhNq4{Wg18LbG-B93jMn3&uMbGlySG4s=VbZ$ zP-AY4nD~E{Q?3oY^rQ{(%{!y0&dj$SioqUaH(+gxitM@`*y<@eTFwC#B)~9-hN5w( z_f0juRa!hRJ5|f|^>BQ1CoWs6|JZ?1;CNJbK@3pjv!)X<=+NS+v6N#q@SOc}xZBtn z;2_w_mwa|C%XGBH-*9K-K}&4na^x+>UXc52qSdVjHTM=pX77=+e;Yq+{<&d$c^|q7&%RdFM7jUEd_#-u1ID=g!^j?ws@Nx`{fLt_30LM0O2k`;tZ0*e*e*T{tR`es+40sZ` zL*)G(20Vn)Fg#GY3cfiGwIsB)C9l{t)Dj`TvXZpXmq@TbXcz*W6q1lfuDrme-e)}F z9wjtSs9oQvYo5F9G7%f2&Z-@+`)mIM^{qSN{?cgj{qhz=+^Q|~UhOQ5n$Cc@tf5PF z0^Dv>1ZabJB;zNXpLxucsWxqyaJ{Z-yzYL0NMN&)fJ*AqUIfd%&Y5pvklu0p=}G4~R{`U9R(Hrk6epNz!MROaKOl)Lc!MJ% zafqhq4adw2)wOvYrUIzvusz2!UL_KDC$_+&8%jILE{;Q9gx`E(z-6Gf!1w!sugY6Y zLW!+X+1VfsJH|u59QoA)9{Vf1nd$`vt2SIEQ=Q4I>tn26U@c4O0l&%Y=JO1Z%d&TN zbpn{<*vO6!RIhCb&$zaS4OUxE9ems0ULLzqB4ffI3M5QChTfsY+9W4Y!CfGM!0mV7 zwj3Or7t+F{w93X7yTTljVNKgzDYVZ7!17qm(PKxXOoG?Ml)kaVwxiU|dles5g(4cT zPty(s9Glol400FPB#{%&EV6L;sgdtT^9fm}K`Qd;15)5-i0rRv&;@p+{b(UmmM9S$ zqbFGEeG6V6AtG=`sIdfAdyf^5#({ShY850xzwZGFUwuvRc$iVX5o5S3e|5TUUao$a z)-<7Ke7XH!-1~y6PcCpr8#CoCHE+49blBg~z6Rr0i3VgklHaIuHthQNWSYyQNB^u$F zM!wenoGtdSpP{XxwD_z1q}RJjEB^Q0?rYQ%TY=~jMZGdwsgb?i4+h6xwthj7M&)~4 z`=I+}w^w}EV38M8yTjyYrpK>u24YUx8a(CRcST(7)!#;o?Yvy=^D|RTZG?3Z2ll*T z0uN2-!e0_V5TY1<8IMOvI_1*2-9YZixy?ruBUZD@3aVG|l5G2yiA~5KQ!D$Vw4I+A zF883pRPhn_*#Zr>Y5pC}Hq^6SC-ptUk{> zzqXaoc(n#G9zEZ^=0s1N5dH561|0*s1n8OE3-5OG&aWC=9uHK=(l_3cFnk#K^%FbR zX)H`B-?csDm2;t+{DjOHnkHH0k3hdfpgrYR8RhTG82F(MygA+LRm6>T$>Sp&=W-O1 zZq?<38rRi2iIryvHG-qmBPN*gPwHkH-5m?L)b#931Cc8}RIv~%lvhoCWeGI}a zH}$0GvCLDWj~W~gk^Kxp?X27FtNCViaPtdqUUZD$^`=ug2Gy2Z6NEROZ#gyDxr;jA zwJxl{43HD((A{7`+jA*2#!HGU_DuW3&OWUcBQa;leY(2?e4=c+71eVFT!)o_%UMqi z^eloVB}fP-k~i|Kx0J|9ywn#f9yX>EfT8fMG}ot3&V}7c`a-9=jn=Czw8nG{TG&jQ zUprsk)LK-!ejA84dmXj_QQ5$mpJ5g_)LHL`U6>g+SSGHM|H8V78DlTD<<51)efsDl zF}|i;h4B{9i*=1!j~k;q-jzc7JU)nnhw%C)$5&xt>_D0na1%7z;`d$Z49fOPoAx-z zJTR~n)v-XUCoasWjN{lZhUW0}8&2%-zH2clgN0aDVrC#P%^*kbeL`1viaPcH z44H|z!wCXz5aYsJhue6hq-fk>H5O2sE z)eEiUjznB#W|}j)N6pdE#w*4tHUPiFMT#Hw>$IX`Ad2IH{TU+MnQ+@O4lw|9fXV;^ zx!rKHKA)=+&^wLQBo*wM@JXp9bM6^D;QKoEKhF?MWg2724qwa@or0irAFzd)GY;c` z#0@!tr#e7R(L4_aTAnEvF^|71H&@Oox+6)X7E+`dE9i^J<9K+X!*?Q!2S0AVP`3WEi6sMcxbx zG;QV0-a{%toj2%Ts~YRO?J5(tpo~eAchYMXJrP@()}8I;mfAQDw@owS3!KxkvAcCE z&B`-mmQk8L0g@85(gXw-)iCmf%s$j?&k38rpUW>&X|bgki#`FnGOV#W+-|>Hv?Hqw zu2);IC~UiJE&*MvNJEAy6KNUD<6!$J7y865z@YF3Ftn@$D@W4HIyBo@ZPU=aiCQ;z zW+z;1+j3&2eg6cjQII?dUwCxNHaV1E{AaGhnDoRBf>h^X=@p&qgspF>ZLUw-+^(B5 z?)Y)FX)F+;v!z{5P|{$Ds3@xZok>}{j(s{`9Rh(DS!6~OiI{Cq9m=R53w~;#5H3F*-qGravy*g4+K8a0CD>W=xZK})roCzUz zTM41c=zn=HNbM}}qJSE)HnG~#LSjq(O(>iQJ{4Ww0;wQlXXfwF8W$fn6@rhay9rtt zZ$rkEF8a8g)6i|b#Swi{=U4HfGOqX6T6K(2LAte4bQ6C(GKx zg$Zh16h`Y;6V${|yCjMQj}g}T25Wo_d$H(tF~Qk{??>-jvLyj-o1@d0f-|y@V{w-- zIxj5j4;7h*75ECaNmq#R>wss01CHdTR!P{+ps$ev2CJUswyhfWmM0EDNX)8 zzuqQ6ty@=u8nrYNTNsqu^8Q1DAKFK~JGItSFq@T(@*q3j6mDg(vhY3OORoKe+`W~g z8N?Up#ek&Ok}4BnCZ%&lv6tK=N4s-WfYlLIq`IHcy}-LRFADPsglJF%C-n4bl;+_; z{tFg<;poy1#o+!cnpAF#ICF&a+@dNXQ=|TF4uV?7O#?O1zMuC^8s@>GJf1i|N z3lb3f0*7URp+lFrWT+HC2fb)fwz~3=Q9EVoPoLQqQhX>S={=oIOi!vn$Q&q zIFsULtugAL(WhRePT7M!X74ovyM!hlE*A8?pzUPS2Wl}4D8@{pG8gTt z`Ek4osO^f)^q&hN6kXw5mBE^Q`J(?#617_HrXyk_fWFbu60jv!T<3*7R7OHc>jhR$ zENRj_^Y?+Pr{h_^tLDNnb{4T8U$4ijUNXYj<-P)c9=R>_##s1WO?^i&Gryd^i{E6et(tjIw&)@G5l3x2} zay(@xCtUgV;To|Vv@>!0OFlR zqNm!q!h_F^jWP6*FZx!JoY(IqNz2s-foyvKot?JsJ8jE--)pil;UKBlSmKZzjW<JY{OsnBkIQMiH5#4hyhG_EHvo~6@6o(jk@ zv?L9OY2(;45F!IVoMHUz1b75XY>Zst{aXQI@5ZXg zdN{hih!lc>_2!R_?S5`~vS*-_*D02ph5mjcz{i+sIofi=1J~}4L&YF3=+-9{8{ieG z4oXFN%4=O}KUdN+c~kF`$^c{YUPrh|cV4yTMwbq36kabTkrYpGs2<^1sYDY_6S4+8 z+-gP$Ihyta<5xYH-r#V*8j!Npt<54rXxV+=I=tFA8a@|<6teo) zh|#;#3ZA!P&{wV9$L&uy^@7gLp9}fMyCvy?j`H z`SEJ0z>laWi+9Uq2Ch|Z%Io$r{oF3*-aY{FgKx6zy)_STJS~073HKXsG%=P_3v$5z z@n)>0xEfHh6ksa{vM$?+P(i8*V=tOxRp}gdpB>K+oTs-1Hk#_1M*=;o5qRkbz-^yL zXo>n*Phj|8<~X-Giyt55>qbu(aqCI$>)VN%c{PshZ^NVu2pKU&Yyr$_W)QB>m91&b z^sG!$QN+uQwAdms?1JqFjNO&!^13W7p#!tFiH$(>#=!i`8XrtOWqy!;^#G?lAqM&_ z?y$5?)0J&Po6C4B{E$7wd;wTqGPfa()v@=81m=@6uWRX6#T^g|Z^@G!r7PAlgirk9 zNp-i;cBJa3We0{%T);$h=2^sL0GdV2^dx@Cxot6u44iYL2m&X}SM?6DmJ@V{wu-}I zN6<81hA!Aet$GeVJ>Qx?HD`f?^_HwP1&=?+Yv+NVjUc0<*Z252* zZ>hJ(wp}rW&i!cR@X1+Y(`bt~mgCN+-l*Kjw86j6j8;p|Q<6{lLF|#~y`c*>q3Z0C z-WE1cx0c7;wmWt7E8CMUuI;P0&S4;KuHHZu^z>F1&b2%!GjOoLM!ar}cuuE-_2Wu( z(b(q7?@eZlX8{c0J*%Pl)^vp5J|d271_n&vw{Rngg_Qm1NDJhNZ$Xa1VnEbkk^juv zS89me^qU7^x^x90o!sc)KyRh*e_~m+hi%+*5#OYQ)RBLM-O1%ziLv85433N=cZSZv z+XS*#19&G z}H1Rx;RuUI!GJP7KQncG}>hgFi*`$RL{Iy-Nc&r@{*zEAx$f_;~7O}|-( za9^dZ+^vujew|U9T9tak0V8j}{$g4naw)`8@>g;WO&+alenRIHc>FL%o}g%9He6{X z5YuBc{-%pkau@jVpEukBR)nn;I)dXZg_2A5tryGqr^O#KGkPj{QMcR0wweKl8#b*z zkr>n@8T;~@{{SNsfyhA`P6XzOq1?n>(x@CzAv^GKbA6UYG~uPnHfG#1&(lNhr&}H^ z{3QAaN)fd{PNL_rLl!$yVMzuQsHV`V0}G_8g`5E&BaYKHZeyC z=OxU7u*w1a&YCLZs-V3_y;wqLw^U8u?H$q=N7AwUro;tW^j=3Eacw_jt`x4;nr>!ygV}HkN~GTZ{zie1524xcwgO!!EBG2I!;H^Q-&!55gCskS*$$N3gSC z-;aV_1549kwx23|AJvWZe_++jxnOIJu6?9NK(c5#%C6KKm7gAa##;&6j&x-R%m|O}2jY_`!&e^dq~%G|e>K3iQX|M$@}d%=I~kN8K69MiAS zUalRu%{lAErRQe!HJbcdi!c%I9IE}h-N5W)n#n1#lHv+vREu^#w;voFzk{55 zv3{?WUAwq>j0`?&po{qL$T>E-dtPLCE8yS?9WP+bj>KD>#D2FrjcCeF$A{A(w;wju zPi(67H$$XNh=gHZypq>$Wh63ed{V5z6<}jMw}>iOB&!b4wl6G98Wz_j1nTtg=O=Y6jrI9!)V?*`?U6pcd_!>YpUW>4 zz7I`H)A*w}`lUlaAG%meu0Uj`hQYC1(Afd+d7#dDv2Qyj@ zlJ3qG%Cn8>zDm_x#X;D~-7N0>s5Vl-JZ68HGQEY8Cgf#|MksTxv7_lw0hD>WqyYmN zALdEp)p|nR3Fif9QtIdAN0+`ZT8idPF3!B0AGeaJt2KcIu$T~$3Q0AP=9@uMO}eAb zz~h_DG6$zH33w_t_GOL^LE&!Ubw?aHzKhJ)*qA2gGO6u+VDN;SA^NdL6Q5~YI4>@! zHOykK*{$_ls%c8~9?j8wOSa2*cK3Q~slnoQIa=>Qj82mHTLczKktF^$vHr@{rr+}@ zk{!dVt0c@(wv46(B2%w+BTsXTG&C6P2pWQSj^8qO-IT#O?*vqZk@9?y$~gul=(0P= zUzHpIDjk`m=XhYlF=%UIM>BBNjEDmFv493WB_H}qo^us(^y=$pn~|2 zuVij+6&YV|}wJamDNy z1YU9tSpygIX#u=~!NE8GQC2KUJ{}n0{%7UVN~6hn<}M1VopCEK{Y2pNDPO1L9Rt*DX;G=YL>z$r&(_rw^6EFRbaD#1=K_ z7vcQ9a5@mzzN&lI#-`Uu<=ZnZPK@K|TB%K27^Ar}7vMe+X`9Eu7RY;)1#rWd3I~E% z+~!??C%eqJx)};$oaW#`=Vy8fomX!S3AKhfEZR4`L4*qfXgZ*^UD_ap$^TuY^Z)DZ zJcF8A`>wCYf`CZxO$DSE=}3elN(<6^C{d{aA<`t&c$6kZl&VxIp%;Nb1OiA2C@4q^ z5Fn5sB_NQ9!~h}Z$^GG-dB5HBe0jd@nLV>-_TDr9xvq7s^;>S7EdB*n)kHW>YQR&- zz8W!Yr5V#`)ZZ*IcfYe_n}L^m>M4y&_;qy0%lq}sE6&VQOa!1!`?CzNLsg+dDUOqB zYD`#;QZise7_;$&*upZS8^qUTfyG*Sqwc#$?#jX&Q3j!P(}TVdc~{W!$U0N5+5tyO z4(Y(zeJXxnvRY9_Xr}12h%bu!lmPP_BnlwN^>!b6x=Wxbg3;j2$C|f6KCRP!jLEDu z&sK6twNgR2(eRgoNo3k^9)9UaA$B@=>UlDObMY>7tn-KWJzL>Z0f575I-a-18fKcl zI>6WjzDBpv!Q^%9J7@&23&=dM#$V(dj>NOg&E9#qd#Anr)Xib0LWD0mav@LhGDFHA zuRBRMCG?5Nv^RAUZwGHL4i@aE0Kk!z+s=Z0oWJ8VOj|lzbp)M2L8xT9c@-^lxO4$` zUu|(mZAImshHIUvlA#)7vGhDWf?&OHg86ei@+uUL)4dr_U%2$8oXqPz2+E*Fy|UHws#EB5KF;+? z9V99Y{~EAE&fa2UwR1r5g9;PF=cGw98HSR)hjaF=v~LbF#*tD6w6Vot z?W#6G_C3zFIws|{#f3lplU@#9oU28JYU<$2aB83W zJ+5t@vM$#PpI$k2a+l)&x|{-Ms`@nfq%;Erlb7mb?EjF(nB4G9`D^;?;T9NbFbt4| z%3J5>XIhjvNetuP6 ze@6*ZYY|lZVA%;0&1?SI#$dZfVDE{f%F^nC00`!Bf?06YyX@WTODW29RF+QU1y9!a z$Tt&L&oQUM)q??nM@G>8}|2dQ^ zb#yCMi3)l!y{oyi4AdWlhDm%DSXcZ3W_N{MG-QLdD(+f%^isa$QtIZpAd0cU@ zDMnu$&{T%NE#N(uJUtrokDt)m20{Wy^R*f7w{py`9~6mM2UnR`M7f6cdu6#w+&GJF z{dMN!>o*6(wI>Gd+d6-ALj8OBi}!jVRh=CjQHa-_kACUn^!0fn_n>ckHy&B|BI}Jx zG|q`hQzF#1b!+Bwq{b8+b3B|XoOnRUx|rf?Qe5mRxuj|IbRuu zjrvkiNnnLiS<={(d7L$`lJR|y04*u$+UZ1*@XnRCALgBX(F*FJmMT6fzI!brPK~dc z6KZM(G5}g4ABv#z?hx7 zA%0$`El{G+cN<;Z!KQ(PkH{6lrAnUVMK@eGkfVLF#0*Cgu0RDQWPW+>oO#@Qnh6M6 zixZ_f(nNjUe<3uUGcH`se0~|US6xdBw8JL9^!S~!(bN9DlEQ&Rb+OUB?qRP+l_5Lx zZby1fIp8{{+C`=QKrv9-b?DE3C~hO3O0-<2IDad+n#rXT3ye;F8S7j-LJ=i;=5_UU z*NxBV{AsQx;T4e6jf_eCcNcnk&|D@)bqWgUai*)yFAT2GbXLKaW0lEsiOS&|=RQTt zBqwW%U-u3qDTT+WpYLcvS?n5FERM~lUN9E4_gos&*7>5@v|hhVKwELDjLZ%_`Y<0m z%$xS3OfQVt+^oLwq$sYa^j_U?rOK|H<}yA0>LBspvX~kT;3TC|P!QH^sXJ=Bj#4P{ z-Znao%c-?)@DrAvAZ{|)`cHIX9cYaw-iAY&7wH0MS{nj3_Nj!uQ>64c+LCcoHBUBS{lBslVgZ3bzKAhbhwDVyZz>xZ``OWupe@y^Bg4_q^+&=cf zVDjpM*O81J18Mq2a&iXUzMPg1&bC3fe!raU3Uiz`hh7#X1^sAe5_rBLS314`s12`s zI%kYuXrXm3&MyVOW;SPW#VYR|6Z10XYvqYV)T7dt-iuJ$xjWE6h&HuX943qazMUoDLGFZ zd@1r>nnhAp;mfyzLnE&FsfHHT+M41wKW(}@Cp0JZk8$Q$D-F)%>dl2O4m&11A(_&S(A2s1>tB{`I|cEg7Aj7BVHfBQG> z?rDPgY1ap0T<{alv+Z(MT9{4={`noB-E!2&Dd_%nRA2Uq1F)~7SM;=)IruIFK!}nY zFcheJPWb_OwKaJNTcC_j_!G}Vjz^FW2LI&eMPGSG*fn3YB3re^RVrzB^%UtuUgQ9t zssxuS9TlLGkjtE(c($-RnjIn|Lx!xL0Zs>_l^&V=u`cA(y>5ugU-d34;#O3gh3~TH z!u=owr?8Kq8eM)4twD^7Sv~56o~1FFF{&XhSGk6r4?H$o8nTHuxW6qNiIjNgN+D;BdM3}rbErK6&m6?3|`^*3dRFa6!7`DpZ6q&U9nep>O*#RVB0_0!&N7Gh?#k*G*YnLw`U{ z#nt{@J=C(AZ5a}L!s8uSNvNW=sO~vd5>D7ut_Y683CEu7fH3V zufisD2ZV46x@>kOUUy>5(B~y20wfZ_Y#|DYoNm&e1MJ4grMU2#*%4p+3gb@a2nC~} z)>md-+5NLQly)gGeuzTo@zSjSDEKLjmr(VBOayc3BsZyEoz`0Xtm5?@bX(Ml=_?|% z$1L!Ovj8VG<5X}fupaN8o*u!1stWP;!T?b261E)jA3BpEx4{jFffV+4A1g@!)Hq(+ z2m>+;lo0!gXsd6;+vjWw2kdrAZh*x=9!-fA7%`?vI94x+V>jou%L+-c4sW4_4qNCO z1@Ym9Iw?<6{&X-{Iw?(!lrb1bH#sz0fq5E={*8#`Rn7E0eIINf;t~IKp9~*(GvY%YzWsE^ z5=EJ(i1_osUN%XSd(aa4*4*ZeoR=rWr~GTHhPJ}KSqw1*sIxaejz$eXl;5~H>LW5Q zh5}I>WJFrwi|U)Dt-vBOSIBsf{35GJ>ZUQA6PCX{Ll$E7arKrb_`SstS{4%5OyZY; z+~9fgkLUHWPP$(X)`7N}+SeUct`fb+V__9LH%%3#^F$y2Jbmyd#Ztg+j;H z76U-`kmY+$ZcGTA@Fh6bk0oVob|UHV{hM1;E>_<<-Vqm&%7ViNT8q%tQ=O46!{L=H zFxgMwHXvPyoX`c$WQgM3VZl=em{wZV+92=FGxZxvK=diV^z7Xcn9wk2vUJTi+%M(GJa9FwHpbMA>-rLhw zWHD}xgA_0qc;u^HCB<@h=*<1ri@3%|x>4Y&nFG=B%s+9|QtFbovKGiu&^pdoZ`0O( zkz{BvYiIQ1*^|}P2bW7=dS{5ePLq8;J+hx91<+m;ztxGv*qadIM5+MlCT)1p3C{g_ zKQ5$B+{ zI!HKQN^sFu5HKA=a=#n&Iha+;LOgIl&>1g$uo-8>Ol07h<#JMxIoyGHt$Bk{mk~*l zR36#WCVO~7)x!oWX%;grGuv*i3m8~Xyu@f%)N~Nos3U7nboZ|*-x3$qrtoFp)OLgb z3DRa=fFBlBRW&Uj>?;!i*#O4;&;zxpp+~x4K_ed5US6eQ-B}D#<8tRCwXA^+*F=y| z3P9qTRk8nSi_IX`62UquHM}m2b#zu7^r{=-yqogmZEDVX4)NfE?I4SV%E)-0if&Q& zSt|tVi13}^@anX|@pfU%4T7-hw?=2G)(b*2#x-7=?m|W->}iUd1ENIX-ZZcKsf&XG zj9Zk5=5#Gfi=m5f&cQIE>J>;=s!Z{CM_2CG61KKL_8wrrW?&=KrKPhx{&VkbB&E2d zk&ih9f6}kXro5kt$k4_Q4(7Me@{LiHh@|F#YU?zDRjwAg1r{utp=gQfrC6uszsTE7+Wa1l)BwE@JMLS}1y%7={i&h^#I#UE1HQ^d}sz=IhGxC+c z)^!|sY`Q?3osAa@aORqKq2DIIk5d2Z#!D}LBv<-hi+18~jEWw5r7NUM zL$XrhS6GG}+eCy?JG0(z4|5HSmiOCY9?sqZIzncvjoPEt28lJ}4VBxN8EQ5)!X1LG zo-oYAkc*Z0$iF`*R8+`M@LsYIb>m10ElgB+og3{EeK7PeU?8hnMBQOlw=SnbZ>shu z;Yjwxoq4L@mt^R-k4qkcl$%yKXKXKKPOe;OdxVqIVJN=%LoP@R~aGqUU{8qD= zwvz!Kg7c$&8cDY*areGsqND}h;I~L|wV=Pd;tF`GXTQ9YvLzLhc>=!c0vK3(9BLu0mf4fg+b=ymX#~am0N-#vN}22dRmKBm5Yi zw1T`*OlEPHkeh983Qw3dxMD2cv(XpSw6u8SsY}i%>4DZBMF)yo*v-)Wl&fEAW_UC; z2?EJWmhUw{>$@t<#zI;=&x+|-fVRv>7H%u`GY@B)%#L2E!=$Oix*hn1>vO-mccmP% zEqYsKf_z)i$nLhlw7|5OgaswLk?XDIqL(i^xqHj&DR9I*Su04Bjl<@w3Koj2v(EMKo#`@W?dI|S~Xk9*RXo~gbFLIHdd$SJ;+*CoFk;#cTKO? zH#u*$*iIW(7dw zD)If)QdO63^i1}>k8QBsARg+*)ZRGdD=Pl(AUjA0_uvnF!IY{`W1@srKXv85G`PT+ z!oqojdR6EOrTw>NQG=3PTN3A|H1#>fXwmx^k&(1mi@K!+i=fLAVrkA6F)?x6_kMkW zNOz^4FTg{8E5H|8f3!$>eqdbJadj8FxPA8E?;roXJ|lGOlvI2ISejopeG+k^Eq6v# zN#^{Si}7CC(d$X@G~G`d=wrQL3u|tX3E{W84Gzr3AXk}gjcz-TU+Tr52S>N}Lk{%J z7d&JZ?Zw}Yzo@KP&B2Q}=&dK`5M*Vb5Cym^y0WM^yLjeN#nagpQ}TdxvRk5*s8^=( z3^#1p6!$y3=o!3w=T*pJCcMdQ&{LqDyxw^)XW6|gF>Afz(o=bsu?+QfsYi9=>@AUJ z+Qe%FYioxc6Jsqw$o(&}qB`NH^G1Sg3pxVF(H^b-CN_vm=F-HHG{jl7;Fjes`U z>DgV7h2|X!FVMUy+d7=O7ke5-R>I3WQ8dl2MEeKNvs9hMKDl(8^7+%qU#%6V#T6N| z$*ErYz#{mAl7;_lw@O&QeAxtebDe2M)HLR)@^myB_P}$SH++7|{d;EOEP3cvojgV6G!yAUZLlaYn;!$z(@b zetfBRa~JNt&jIpW+O}a@>2C(;r10!9I0a$Hcq+;HtiZ;eq^QzCxk6o?*-yT+>1X)j z9vX+=)%+?ytd^uwmvCd-NXOEsvb;=wfb`4CCjHU6s19HDQ&TPXHq~YwyC#90jn!J9 zrT%D<_ohfFq{&}?)Xp|{DyI;*TPmBmpg+hS6H=qf^!20iL!tyDUkn>^=N)ffHJNWx zm7;80YTk*IH)sEgZOz|Kc;`eO27yY?IAc6-dKkH2<)I@P4B5sXAId}@<&g}oOaC&d z(6=oO$nHL$dfbr;$1S`n-Hpht+E&zTv~&CBsv5V92lIB%*%`K~uN4y)Dy(#m`4B@uTqqyrxe8mTR^le2;`S zCAoT)8zzU&{3W+8$wMDX%RB`3-+U&Ro?p7)HE4Nj36&cAc*ph{%Gv~x+xK^qMT+K-4yrfM^D5=L~DH|y9O za5uf{v{bnxrZ(I0u!XppS^s?9@C6Io2uQ%6)sFzW`=s`08#{NE$% z!slN6vxU3y0#de^QpPU*^=t|0wNjhf_|od@n)k&mFWRF3Z5raEilrs--|XzNDm$u* z-?#U^akB6TciZWlCl)Q6bk^P8R2+p?wMIgXgQ(14`um6fMezP_g82W%eU^V0{s%c< BFpU5J -- Gitee From 921aa67eec10a259171eca546001c8c77ffda50a Mon Sep 17 00:00:00 2001 From: luhuadong Date: Fri, 8 May 2020 19:33:09 +0800 Subject: [PATCH 47/54] [BSP] update the picture of stm32l412-nucleo --- .../stm32l412-st-nucleo/figures/board.jpg | Bin 383711 -> 102826 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg b/bsp/stm32/stm32l412-st-nucleo/figures/board.jpg index d4f9c76a31dc157266163f5b2194f30c9404e0b0..e2029fd0202b96d044dabe64f089c5e858073589 100644 GIT binary patch literal 102826 zcmeFY1yCH{*ETpvf z@%z8;_r1GYwN<-Y?^bQq{_phd>F#s-%zd7o?mp+3LjeF#{&RZ= z`9Gvj8yHtsE-ns292|De?8avHCg$v>_O=`z#ts}@?3^3`5it)3V^grX3$2N{CCE;c z?zE+YjuvDlN~g)E$f@WcX>J9Q^>Q*-^HTb1>IF6xG@}y((u#NpdDuGGn!6a&df3|7 zISYA+(*4W0(DU{`hdJnI|E1yr7Nyft{6Z^f?_^HP%g)Qr$@UD+jhpV-hLf3vkm@Jt z|FrPDCrbC9O?7v7XLsjew|BDS;1U!RPF?4Qm5bp?R5|1SS#;NJ}Vn}L5b@NWkG z&A|Wv82B$A&fMsmCM11LNJRLL5hRr7b5LJkym)~@h=YYg_lHa|=r=khQamtDC!rr&rMT;E>R; z@QC6zKN`Gv&|*yh&u z&hFm+0sQaz#pTsC;^y`rTu1G zT?eRBHS?Ni^ojuJyyM4Hk!zEI?%i0+J&lk2#+J<6oZu?ZM28>ok8C#7=YM*A=BC zuLi_+>-?|(_++j?j`xCEJaKEO?*IfAN1|HJu(#lwl_w?b3AZX^`;3CoO0_A zsyFU#RlE}o1~SE`20ZI{5!7$sjCIH|Ro-_|17?jwFMsa|{{CIQ%|~K9f6K`!+Dk?a z-MD@N;9s_V*k6xd?A+4m$+RddI z>0k-;G0ufY*D_<+ios(igf3F)ZMh_KYG)^vG|z0T6^kuj`@8}Z#V6$2F zVp}G!PAB4X$@sX^7ZY`Q^!G$=tO(gE?SM-@Bz-C2agqbLU-Ee?rwIArj%a6b9`*c{ zBV%}Em>V#JG9OE4p}>=_gD8{|zMQMhs{8XwSN-Ts&!F70y)|jslSl_I9yx0yNs$~i zi0(|mM)=)kr*XDBur{C*D^DTfrz)nk%GKRq5q%P&FESA?1rPrd$M+&qzMUC`RWA^YO9H!TT z$^Ly7PXO||@Zjfl0_i>L(H>sBBo}mdPE$Vm$mcsiN* z^&rI*X?+*=kg8$qSB&ipmn)3(GAES zQ8(jaWEvsw9&(=mAbo;$rkuk4DXSErisK9EuL};Qp8%Wj&Z`B8lww5a`V*kD&H7+U ztv>#iEkwB3c1Y08M!0^*cEs5b&F_y;N|cChxz%frbX9$g9bJaBg%G5#2|Jh`l#`Hv z*s5d};%%kg4LD?}ABXoQt?3v@|Ih)=1a9jrbtg|O4dDKs!yOTF-D!_U;KPSMB7Uw{ zaHvk7R2)GSa#a;1>3u31i>bV?AR`nBs6hOd`li~rOH%vK77x?Mv8eYy$EO;sFZ~y4 z^;#x12CWy|`)&j;XH3kyh@zDlV4&2Fa#$htY+GppTes6+4D}-Ny86j|GnRWbAjQIL|O~5#dc_fM{bN(!N8*xE?1tUQ`1hrd3(=YcK16cSX(4YMqVW~X z;@)goAj8v3p4-Cm_BY_7aF{pmQK#L16~Z+Qd;^a2xUxl;DFPiB4ns)>+4rX*uUTUg z{{nZ>f=0pj{BzJX{P_bCp(!mGYm=>s?%Nf?=mpZu5$6nKQNcrf?yg3epYuC0+&tNI zZDZ~Rh?Gk4Jbgt|N;O0Fnp+zc*)7($Xk>!x7dx%zst73TQ1?OXv-hsPw9_$Ps~4Ce z?AzycrhD#$`;XIWgg(ke2+Qu~&`8+XXvI}2pW9TFYHe8l;JXg8zP~SdB4B){#2)<0 zvnH{R`2A*BP%S-qcDigk?9X@Y>S#gpxZpi2W8=ZmqZ265tDVK?zO*1KR1MZaxqA5c z;twC|PllMClU0@XAbQj-qiyH8?fs=R7x{Kme6|G?Cn*iioJR>0urSg3{Ts;At#-_1VZ~UoC2w!IL>Yem1Wnh7t=_C9$h`WipQkdSVnmNQclXM*nC%U^f9A zLE{PV-A`uXgZ$ZY{(1{4YT#gO;s*gi(bE2yP2Eg|-+j_7F((=R_^dy~B)_V43PD4n znPU0F*eWg<<>yx)OY%z=T(Wz~paye|F z;)b0l49lGWhZJjeWV}Qc8h>9VVBD0 ziQM=rt8P4@6V1{K4rM~;965Y5!;?l-b!TInk7AaQ^p8IyYSxmi`KfC4GKx=k%w?*f zV~VZXmw$Ud&DIYO1k(CSU}haiQrZlKXwY=!Bl`>Gi1sHdk4E^ET#)db$WBP#`Q(QK z?Ne`zw%mz~jT?5axz6_jYc|?n^L#6C%P_kTajSHPY4)TWhO`rA>okWKeRYkdMRlh_UzUU?KrA`z z5%1ov4pB{X+l#hPY1363Fp*Rn6qVs53J!iKxOXn{5#};f6g^5I`GNM~mCauZ&PKCU zW!7{4vrFWn;n6ypfd=r34Y3IF&~Q7KZ#Dbwp(-+K_8{{_B*==MRmf>T$A6hSY3ZaD;T~eKM57yEbjJgr>Sd>UX^_j2tcFZ9P=$J^~exe z&O_I^qde<2c|$tn+}0qbD8l2%rXR1(MPW)23z*Y2Fl4Rm`%|tQ@@3Vy?~gmKsIx&< zhl^&cx{gc{nhP7DiZ=NRLY0sI?bQO2@F=yS_Sk0r1o(pk(r^z8@ewPDy>&}@0*Lcw zb<4!<&q*s15B7budUgJ|2N|_rQd*&V$X!#Jre`bke1$=}i;6S=pnO!nl{8s{(^k`- zj5broUQ78|Kd#0baP(p&V02ONcAhp;bDioFXy%V>uznR$?p?%b6)Go~A9b@m875TN zHn;jsixeu@&v(mqM|DW7W06p~yu2cVlLU<}6B+UQ!o%q2pck$DW%8anEqz(B*uLqU z{JvIfRnM$}?^^k&w?NK&eVk|^GSwzOWNb)1P5Xlk1w%Y1W0(M?m&Q*$ >Fk^big zxoRMA@a#0&B^!Tb5DemtbPC_`J{;f;<^dO)nCwgQgoyM{meF)SHrDhF<3_h)`} z89#(~eh%Yx{ft-QnQT%ji#S0e+sScTPot7aHMBlOp{O1c<@qA3EGVLi(^uD>26j~iE~KpD5)`V73qy>zElSYhF7 zU^G{q@K<#0sy=%Zu~J%-`Mdi$YVUvH&3{jD`$^ZI^raDID(TiH$_|9&p(120IxVLY zwG-p^K55Z!sQ%dV*|jFtEeo`4tBy8Fpc5Rlcvy;?(9MA?z*W?_1^OOHcKpO8l#(6a zEj@=h^e5gq#xORfgFgoJ;x4f^W`Qa#JF4iY?v=_i2<0nLYaBzhnf#ec^zXZ*=t;c8I4_0U_(t4>OvC9@`&mMgBEID$)=vavDS_wHI1>GZ z?wj+HsT#%i#wYfjOyW!UN(BswJWQzMZGl?@Mt3N}xy7Wm!woMxxPVNLLnc3r_SWi1J%-p`1u=(=V%#eZIs1&Rt;I`rF61JDz;7;!L*BE5Gttx(7;TLA5vr^b$ z!UQ$h18Q(fe+lVtXWhjRd9&$R_XI%QC;75$pu=4^>?l+VV2Ed%_>44&`8C^NbtdzD zd$7fH+mdJ6OrJ)6VoICy&?BY~0US4JbA{*2>=FC>i$mYP_PXw=1D#4UNHSysI~^)O z%6*NiG>xBLBN`8N!`|9-%qK^Bn^ZA!khlwf^cAbObL3HK!zD8B2hzkFvX6c)Hxi$e z%X5*^W?TZ3E)2V~UoP%H0bW7dWI>9c=E<2{PqJ`Lb9+v+41y`X{Ij~Miwt89o-Bd1 zq{Dae%+9W7r*ds@Wb3I>Z-z+DOxv{m5o#k!{*(+eKXuJ7lTgu@e`Gf5r^<7@!z~)g za|iA+mjw08x#E=#RrD?3LFd>pt#i@$hKR^w4<&uNx0k~DeA^)hApOnNcwVdWFmCZ( z(WXikkxPqT&`Y6%zRb5xi>v8rnuaKK%CB?-D&<_ACiQ%4z*_A2x`twc%hmCYkY%u{5cN3*rUD26}JLQ`;7$Fx@|8ff$}FnumR_cj|y(C>(?08FguBSl|YfYx8;Pp zB@|&yZEw3obpHp+U6M+Nb6k5c!8pqVA9{ zMSmg|83X|dx7MQ@8|lwH$4IxyOPNc$I-Gx5BIbn)NI_k8WA_9i5X#e zfDgV--ygLgM7B&zoz3H+8{W}Ex(^PDTd2YkO;!U|Losequ?Ql!t2E^(jlNaZ0KAMV zf6Jef@Tz!hlP_F@B5(tnDyVu!+-liW!nJmvk9!mRMNxpQ=^1?H{fTs*J!OsdP4xh+ z@O9>J(7f6su6|`G*k=(Ec4Eg~_=AADq%=J_{3}gMU`B^@-j46 z=LsM2%Eg1Zc2sZH)RSD29PLfvM5^dM@VLJf2c=YbC#bOB>W>WAYkfuOs)B%18t@|S z%u^J7)XjkEO!P?8OT2M*)tl;r%6pC670t|ir-d;=rgj%Z=X&H5fB-S1h16E9>nknS zJEW~hN5mq7ol1K?t=T58+Fk7Z_MF!P3MxIZF5CWm30XMp{i3tFs;vX!rFTGGfnLAb+7t!Q1p6XyVb2Y8)EWf)t{ajWcGIn_L@Qm7ffk2k^HgFr#&;Bb9hnpr z<&#*3v+_N)3oyUr;mSKTQ?TMLPk&msoK1nqLwIZ{XD#K39!4CbwNvTNxRnGUKSj(- z4^l|D7WDTQF9NZmCDfBwrNgM!4oC%zyY9|d=YemQ^;Xvq&aw^7#1>aKa@lsU0y5d( zm1{7WZ?-@>?PYD{@?pE&m5S{J^7`LHzvHG*Lv|k~_9gm!l{Brdxw9w^<%cw?w+(UY zj@`TKQ@Rb3VV-vE>YHgWiO#`rew%Trl@@@e8Vmh*w;UCHh#`8V;Wr$(I(IP$cO@Fs+ zlCe=uJ%(wnoEO_o5U0lFG&oi=U!k_ZN5tAPskZtDG%jjFf(D5E$!(O?hUaXSj8MOP zJ#*ZF&&>KE*u%9#`l}SE97f^@okEY3bwC?&j`5zGps7Ax^kedyX!h%Hcc?O$59KCg zQct&H{jqhPt#cL|l7-s@R}S})%#{J&K(Wvo!ZZ8X8fj7!enav)%zTMyg0iWPe7H)M zf3?Lg_aHlwOSHx2KoWCv;X-Z7g{51?R&`KYemY%5NX3^VA8IALSeg?krObt z4M$MwR#V?FY^$j1;B9U-ALc(p0RP=}91a)@D)FDI%f7{^z|4W1=U9tfo-#iMf<(XF z?3`*&U!1;BcD6N2(9>Ni3H*>^J03XNmoUldr~jy<5D!%~V)h?U`Ox zUK-_7+LBRU?s<#ZOUAMJOQtM(lP{0%-)6JiOTi6lVX;IMOG{!^`XnpcpLzp#Nl{|Z zpuU}VLRKlw{UP_JV6a{7u%of%U0zi4X@UpYrXyLWDBMtpqiY^YrD(_TD|P%0()?#_ z0F~Hx&BcydjRfLQSAQI6mp+oQ9TiLl6ZghXuZoP;^t{4>x9EFRT6Da$z|fB#D8<3T zybs@5xtC@v({x=X)4ALfLxWjU%q?LQ%6I&7qu2hy!_+rK31x`1ak*(%uz)?EbB>lG zk0MoDO`;t7`yoTO<0ghp(rbtrKdt77|La!m!X?DPfx^Nht4Be+AUT#<1SrLBHac|x zrI@)y=jyG-ZO?M4n~2xEf0?*+R&#>&BkNgadr2NJ+qrnORNH=%UdRjQZBb7Vhxz2CAZ{6^?lHdv zT?L(>$(HA@%x;u3NHGvsFEW!=71a6!IA(4E*^3~)n|cGJ|B%9?+$*CjYrl55vi>v{ zTrphj>-R4{c$dFFN8*$>NcpZQo-0{Q+3Wl+JNg4AqvnKb0VdF9DVWxOO?~2C)|fef zuVA^@CnIp7AC=kxqn|3+&&8vxw}HI9p?sLCZC~!Q1Y_zzc{*VT`Uh$XU|X=ysc_7n z9npRwjt0{UWeIq1VSVMK?()7Crsmzp_qyj(_M@ZV$a!|gc!8Z5Ir_W3C=A15D%NLb zJ0uHlrkx2CCknm8t6gM&0@O**OLN&`qDC$U#S3Yc-@ivVmm?&5`RC^1(AU$5rI~g| zu@z4A^Q`DmXt%QFA>t|pEWnAO$s`&Ui^}LUWAooJJL@=QKpl97V9Y z3ImwkOOiP#Kcx!axCx`ZAxCOT^VXfU)Q3$k+Oq5Q3^7=@VWHoIXZsm;3 z!zs$SLXYMLAT+(d!4jPb6tIF;BXahH`8UEmjEna)KkR)@t{KVeZTkd(Wi zMr@SprYq6IJOlxlEi~pe7fT4qtDd2XaRPQPU)C)LKEY}hs-Ksn1G>1|TYe=T-Ru5A zevF1vz7Pyja-e%fuF{z?EWPr zNz57&X}~@KWNwcw0Bd^bN0;N*^jp4*b>fV7VMGQ{}FzH|oznu-ViZU6EXlihLC;8U>W;*_*L;eNXgD7~A z<6fa0ludNcSMD*a;BhHyTNHssdYq@V{rwxpGSxMwNh?ivh4tgC0bY6!5Pvc{N@8L0 zi@)n#l78=pn;<(GAIJH*;ho6je9=Si_M(QQmM*vGhf}3~#T*|{E!=lsk!ffA3sg6i zHZJH@_XvX-9s;9sxQEf^s3;wfC~bsS1<7v5_n^=?vx7MQ(OV78FLoTT*m z?KL++%`&yP`ME_UBQ>2Su9AhV`HQ`;vXai%w7qg4*HVvLJj%mJSIV==$L9ENy!lXT|HDiKT#S z0hT~-7lF!97<;6n^UI%>AbZN%aa3gf#2>{PCpR@7q5(v_2kIH%^M}k}fvNAsf5jr5 zE5)Ehl|dVk`Vz;-lLTID%!%~LQAaC3+LSyh`|KCf<*OT}cGZ9EU-L69>?SkGMArv) zyxYx~8`W9sqB7Z4l;-~cyV_NY4$!cuSJ#R;?gnhF$B35cY9b{4AEJ%zukHldE!)Lt z#}}^3Oj>3r_$?d~Hd9p9LBz z3eg$KF&P|B%RYkS7+k#CZ`W(5fswzmC2aY|8+V2ExMSf^JVAWc=3?PK*{rUGc}O_m zX1&kjSSI=jU`~VO5!u6^R{leISFc4l;2p|)&)>)T7n{t4H#c@M8gslUj7Q^{{>Jv< z%}M<|ws!jVUt3#ZkE~51G%Qwot8X^j{33B=^|W-CI|)W=ZGVdg{<;?Imxsp&Jpll` zcp;0sSB2U3EGwQCv<4F0pu_vJWqqwS5%(7YwGF zVoG@bqim`CyIevbKdxY}&+!HXceNk3Lgf0~1?h5=pJbT~8#MixN})xp@+b%?X&3VW z&iH^!=P3jjlP4+owWI7dzHu|Ty)eSEU3PH7WkuV_?u6i3rz{S3Ok8r*beTrX;%E(L zyz`w5RN`Ks#0}7#ZEi2|@|#As&IAkz)h`G$o@>GbMa4DvsQzil}XgDt#+lZF3KrV^SHK!z+zb zhixKhhdEVo(flwfL#X)Z->Y)Aq&pkA0-w1{AsdHmIsGSS}2(Nb$M4EN(w8t(CYM)H}bgD96MiQSAgE%$fa!3*09o zY=osQ<5|ZQ*oJN0cxm_!6J(sRil?}5Eat{z2lb-NpBoa@pN0WZ6mtUF6KL;f1s_;z zo2HUlK_x;5CFBYy;k2Ctj9dvzC>5R^J%+EvH%`Ob(V)%d0S4|F%LAP%ghZ;izRm`1 zB_L|@$xDi3HI5%{R*LI%S_W{UFk63W}vg1apDGTj@0v{nn+ z>E!DNOeaiaWS{SwX@Bh_{qR!y{aD&!HhVFCEr2+C-`2G^(h0|F3VvNTjk3%F@A^a+V4w%CXo{?ZqX4;IoH3RbMX|=9q8?OPHMFq_8 zel(oZ7#;(TJ4qk@X%ThT0tMrO<<*L|wl3ZuyprIiuu93Qfi6zI{o&UK?^G@YOE!}D z$yY@7VIwyD)(_%Y=$ow+L#ClkGlVKgX$r0u zJ?zqADmtdBI~Q$;j0~k~FPbtyoxP;8>{1&o4I{o~{b}?=H>h?y0fh`=rQFyd|93@9 zHb`=+(x_flLp#fD+4-EuY_3G+nq*(wM8}nbDl|kjT3EqxT1Cn!Q(TJh3(|jg{R*wl zBuBVBJP%**F;&ip8d=J<(Of+Dnq3gc9iheV$>W9AO?stUH9Y~oVfMlmp^yawaFMJ@ zlpRR#8=-f?WPPj1!r5w~uPxnk|NRTkwf=0h0|UV`-bKG8rlmL*d6SifQFTGqv;*hF zcjr?2Kl|`Arp=Bbb@=+y%Zsv&MWI_{{XbDyEB$ht51G08zOsDdM4~$E1_FEpW_|D; zN`NH4fRc_tF0@C{Qt>UN^BX$UUU5ht(ZD(%eH@cY#40QZNv4ILql z=Yso{dJ-vdoru$~Q&0|~1Clge6Dpw0!-#b{attT()@Fy-1MWjGRG~s`!*@x4S>#;C zsX8Ps+~~POD(!w|%7*yr77JuY7bvJ@VG!VaXjtT5y%w6#MU6Y{a{1G;x5rM;`G+Z5 z#e3q!!ff-K5DuLxKl{JJv5{i@0`BURYQ*0|yy5HYKGQs2kuRiwAEp~9T zw{swh*Az3owgY7cNXM39NUz7Ceh?qI`l*w9sxrRgaHzz53A6d{t5(7 z*Q`+6vMR_~`VFIe+ZG^bIUxot+okjbXqD|#i!$tV-dmeLh1JagvFWv^EoS&AnwI-& zM&n*r0#F-1@3aiIa~wK?6zLC|m9rV%iP+FGCM{%Ytl1qAGs-YTVW;gr0W1XWxz0|z zryeTb))k*A!G2q34GxZ}mY=^ztUcSEGC@BK8bh35Rp1O_j5dZ;LmGa?-_aZ9dUnWa#%cy`*injvIz3_$t!aO!@i^q5Gm8rFjrh%1k^1qj*pcFZFvw1Oy^8J$ z_AGY$7(=!f?1UUM+WeNn<6|VrJUK@0of0X}i*S!0Wz?VZ`xG7*&vqlBx({wck9+g{ z^D$+1&-r0JxC*jn>?C5#dRL=%d$WtKE7@WCmweM~YKpQJ(@c}5mJxd+>L#-C@PKco z%$4Z9-hI{i3t%0aTi=zY{-q?sqY@50gkP(wdMmfjkA(X@@z=pdllEmWpeYGgTW3zjef|_d% zO40b!yyim}o2VUqa1rw<>C`Y|<5EblUXLYUGlrGEC&hpa?v`fjs@UK*F#Pt5)+;B8 zADU>DQg2};?>Yx<8@EG>H+i$}s98&Tl4-EmPkBibdw~TzTE2zEZdqcij14t*^ukL5 zSA~jTd(-tyv@bK%hsrhlQ%ccAWg@GFi9ny`cdnEPjV=O!IS3vuf<+Wplu3ah<@33M z3^s)Rg}L4+aTA;G6Vp46KZwR4t*L`ansBQI2 z+`3ZYQ%-fpX7ox8Yq3IOGE>}=HHWIVW|E+^lN|;1s6eCmJ3D22KyZ2%`nqYG4laQ9 zk!ZlkF^2P1;BSoa6|)+QC0rYlQu8ahr!C0JRv)FN)pm}C>q zL`-XY6Moa+(@(mNq|^7k0M{?%b&mwkmUmXjJj1lOG~VA5Er)keMQD_Bf-@!gMc@hpaD3gL1FcLfMQ0&#^gaU(%se=s z#9gnBXwpV~`j-ZU;4eGen*z+pxh~6_TbS0b*VKLkQT>J=sm~1W8E`OKBVhaHwQ-U0 z*yaJ!WGd%4zpf#sK^rSQSGOHk^|kB;uD(W#*5g~{CZw`98#1a2W(j+&eseuut}D}S z@D*vx#2;}%gPUTL&_>ZRYv&|^w?#QoC2A%7AE0mQf?e*wR@_>2dqS0H&@mhEO0A&WWt?NSX*l(Z&?suIkTSCmKW(kX0!;l2rU&(f1 zu!)ot8Kwf3nn*igty8^*b+ibq4L0DoLG=t|66V=jHWD8(X=*-Jd(ZR_~8j`1r1$E_HVcJvNyZ zcIO``I=Tvp(~PAu#)yIsXs8gBKH`(_+2}js2aOsD>grE4q;9lu@_qf~yIzF~sd-Tm zSpuc^E0if8%I+;U?$*#M3d$EQs`tYx=HzP4w@2ov`e17i?Q$sOc4$x zqosy+DWCbPpAmgmJ8-{hh{g|#!+t}V&4(wzEanoCp-*n8RX{3S80BzTdWRXGR;zp; zogFMzhtr!CS-3a5^}eKNP*~0x0Q8cGX8OI>h0)n3$9Kh^1XC2&s14Bt-+^XTx}}~6 z$gzKLdTaJQQXnKN5z<4uD$~#~JKK)xlc7Z^;y)q-=&D*xgDU+1SH5E}j!ulDoCvAr z7==L6ibFW9OpwJg01aoYvE;XE0SnIP!g9H}PE}MPEw5p#4hmXx=Y_23zrYQH+Sdpqex?`CnLr!^C7rLmnO4s1+0i`C}Z zBs-#AZkH>HY$sevF=xH2N@f$lh zI;%$P87JnDv3py^taa1Wg??{U*}wt!yoyY>atX$Bw&%v zD0l!?*s#c3KMg%QG~hl{e9S48Ec#e|;AM~-Ng0jB*%KER_e07TNdLB5nn+z>IPGBW z!B;t>d#5p6DLo^F!w`Ws?RC`q^*rr<7Lf$m_oH~o7m;x;TVy*VyU*-QnILJG%!w|KQEbWm#uoIJznrlQ3W$rNHm| zV`mEYvJX!icau}f+iwZ+FFOMa({=cw+jjD>`S~SQi5gQu4U=ZyFL< z`=QKS3Rfr{_yWPYC7f^6?DWivak5kWUBSoW)B`4Gz^WS*;^Seab)G)iQ$s>Tx^~*s z*J*X$0S$pXTn$mdpFfgFI~T=w-SYAnE=Mru9CSWb4>y^-Usx{cu+da5zW)R-OkZ!aIC(2p?@F2s3k0o8TEpD8j69HT870y3#g%%Zckd`qgTtb6h8_YXf3Kn>hgk;cMsp zFiwp76RXoZBVzn(-(B&=Y^|}a5GAkE3SCXMgA#anD|99XQTA?RWhO(Q{KV(1`VrE27Q!FoZt&ENW-{T8Ar@|ohwPm9V$&RJheG<-&x=G4xIlou5As#=n4 zc?Cb&VOH_5YYmYZ9S?th7KjsG7mKG)L>^Ti)!ISF9p#nraB8ED7eoDa>Rxhv z$tB{7ls;yM{~hB%gC%xF1Nha)%Pkj3c3lO5VbXgxW_W!>GI2@=7{A~)L}K|h#^JX- z>a97*cL;_mROd=Rt3NWTKn!$O%I`b7yWD|u0?F=NR6QUNnHzki80xin*IB;zV`cdLHSuDlLS2S5L%8%*6wT)hFU<*0folj;b71BMYoXV? zr()Msq{fNo@pZ7Psq=>)jMe0dt2qz9m_X>+NI^BI&*|rtUgX=ZSP$Oaz&F!;YlNLe z6tn5vH0`P>i|-Sh|eox8$?F-t#4NPT!b!8hxejq{`0eK*pl^>5C&d#eRQQsoG~5 zn;#dGscyf=#}~V8&{E+2X+Yc8#`p36V=@&;WwKROTdjwB6T`&DeR;r*esux)UdaxL zDE|?Xnvud-y7hT7#3Hd+CF?mW!Odk;P>_1dE?#Cuv!f0-lmS9_=oH8}&45`d5$`|{ zds6jaZ3PrV*eRr@DH^zl^HtMUI+Wp4x5XOjAdD-pq-jP^zlpz!cH>|xL@jR{ zXQsW2Nxg#fGMd`KYX%m^BrzWt9^k;mfO(Et3_id`(kZA#%)tvKmstW??ToDUG;xSJTfDdS;*J zd?{sm8-oa6dNM|6C$Fev;|IQ6XQhW-hw#OcG9|d^DWXWZQl6)~scVf?|M=xPMiR6} zly{~e9Wt&t^&+@nMB_|PamO=`JD7w50P9F?+IJoS*B!s?C&Fo^j* zsERYm9q^GJ5%TUYHnjlXi_s$?-|_|$?)+EM1^LMun5Cj}d(o&C_5~{*chY$ zc-n1kZ<sLrPe7DN^P8$hwFc)3CLn@YMae#pLOk>)>yopJLYbt z3S*o9I|S(UB?E6#;oiP^PY%tWNOB(<0v=#j-y+Snx`_ol8nRauX&(srC=vbE6>xmT z9+mC!8iVXuZeuNEwn0M(`k3iVTwrf?edW&YT*e!{^NIfN(hpfx^v!zVId-ZqF7(HY z7SV^p_?VMd4$T(s$M|LQ9>t&(a<^)u`m5O#Z1Z?ab)#PKyABVZQ2KW8c=^4qdu6xt zM!G@=uCC6(>p_pIa%Vu)hxI~2r+kY-MCVzbE%FDFc@ zk=HpM+CI}Gh7qV%dpP$%nXeYh+5SU81M!X|?j|&R%0x$5;DpqpVsX4hbBD~ z2CR=_;*ifi0X_wjwYKQ~d@1X;+?yl^h(QxA6B@??58bZ?wBc1aYwM=KMf^7myTyof zJr28XgA3DH+A6j*F&*;RNu8taG!I4o8d|mEOtZtp7Wq|lPd`chU8qio+Fk9S@fHE8VW>(gFgV`~TIy;eFZ9`h*nBlZaJaV$BY zyY6-)o*g6~%3lauk#obu^}CV?8Gto9!nD|qPib^I_=iih*|Q1j!+xN{x?jnX4X&%D z^lGkB)lWl(+rCCi*}k5|id69U9YVBxvv6;TvP8C7;bky~qoVVnW&STA7bj@wN;m5# zWD(?L*kemh05X4(*_YyF@F4(s;NT2tsaV7QciOqAseVci5QW6;wkN!JLE(LkZL3vy z0|6IlKN?FTD%?QjPS(dDjRsY`RI;?a3_VIu9Jj=%I_3RG(g9S*tW1xcc1s#4Uf88~ zn}FWFmqiaNA^YqmdJ`#?5T5*3xPX@&BYm!x*QMREjbFvSSISjkB*^`Bm0XTCk>RP) zHwWLtP5TI;&h}~7vL^b!cD9vN8uX5|=W=nOiYwoa4RsOBYVminAv{~l=sAjWuZGaw zSQi|pR@;RTgBw<^&(oIH)b)+Y2u?F!Kj~f8**`O4`yWqt@h8i=$3_!`jDA z*{^UX`Z-0_&|1wlMWrrA&bGquPjBXo)+Wf#+t2loJT~@H!5)JmU5rS3L{`Hi*(>oP&zPQstaoYRj8I?ke-`U|{+t zP6#Qzz@b4V+HKeqV1;I=wO8UpI(W)EoVXEMiox*~cM=8TMUo$QzXmWurA(7rs+mpSYuo^F9+T$}ji zR=5rTW`^54%_$gM1Ev!kve^Ep79StPNTHrVc&!2S4z1ax(3h!I`(Je%=r1#9i`SzXCShOwMBB~7&J zgK$stu;Ko!Tv1+WneHb5ARy2I@SNQKM|oa)V{IdUqqb-7rLt{chd}wU?cyzIWdWD& z3B^3F%)Vj%6QCx#J$>Uj3eD}ZhiZQ^NfohllSztyVH^-$GR9iN+uN}!p*;Q<7zD4F zY4%{&B4J?&uE^9Ut-|J-+D3g;|0~;g_L$&Uyr8RSY$N^oO!t7K+wG;&M?Grv`@Hzr@Uzsbk8b5t?$W(vJMi-!tg0_8hnU@|^jeP6)cZn7(SrpsIHkxb&rd zv8d^$%|X;l6CCnCXnU)uwz{xw7YZ#7#a)UQE$&dDxD|JIg1fuB)1t+l6bbI`F2x;+ zCrBFf-TB7er+bY5;QtPCl!L6yxz=2d-1qgcWT%GPB3H)L-YDvbN5hnA>_TwvTRVO6 zSc7B*cW{0OmF(x6waUBokCppy2kL=0?TP)9>h4VbY~-sk)HnCe<#@{@Rfw!*zkC5p zyfD2HCwzl&u3I-R9%zS)1VsKw`~8c)dM~*&{-S}m4@Vy^aU!OoYfZUILCGV!m%1Rq zXhyhqYL`gzlKqmY3sNhpZ~bzTZwPgAzwbRQw_iJ}J!@TSZ7|vK#QQ{tg6u;41<0&m*yyA`tPG6(a*N;d+}h3n%-5iGz9~wPMA3^+%`d!Nt{=M2am|f>e zcV~b;`Gc#4b&t2j_HT?klU_)4Lnj{<5eK`6X~%>xD=q`;?PjxR$liVDTXp$vK~Mu@ zhn(zPrL1IogE67rJO08$y2bVoJUwG0n4W#=-(oKeb03N+h73d(#OW^ zP~{6%y7Cp>QZx{q#X-=uVU^$zEMM<~CyZxy{%=of5w{L43)FfU%4i?RqN;~6OFXD)-+Ok@MN(8qBemPQ>U8@)QKl~>0 zShJiSZOv#@{5Pz5-iHm^%vq`TvZs|2{hM~bY$8l#F%q&vcqcJZ8?aw#%$IwCX(;LX zAA%*(T{Qw+A>GH(cjc;P0=iL$CEteN_+~m_&u^LHGZf~L7ALH4k+NZHrwnBjX8E%Y@F7BHXi?}!*Hg8o{r`c*7-1>XxSS7FfQ=X z{&Bx=>)WNYzvM=}Jut?nHuRLf5m-U&?uSKs6ioSdrTked%`af;{iiUBWEH=gyxg&p zx-_Sc<=qz)iTj(0jVPoSiCXw=xkDr-AH2ivwD?)PBbfy-Pu*&rm=9giK*6?SSVf8f zT+Zqpqr&VEqwD5pUe0%i$|=yC&$MEso0$4|!>*LU4+>yN5AkC66C!T!qbJE7bKNZ-$l9$6LjHYYM~3q%|>oj;IjPe9`=}*v(!$yOc_V zMn0Y8gFJqJ7-q7<>OOk3v_43E?Uyd%a~>A$eZ5cC<)>kJMhcw7d8jx?hbr zEuU$+-N@LMsU&X}X#_P~^;4$9>xOIaLm#`A@S@VR|VA}WC0 z?BKC_&h-2=>WVALeL1>lB}Emc3vkViZuASG7*fv`#N9bKM>90T9PhF~;M`$iY6z+g zdujW@5nyssnL<3%xlLUXra5*lQXj9n+*%A}wC;Z`DV65nbrgF!s<26=&ds`Cw_MW`5%1MWjrF%Ywtq|cI(-l{p zy}GZZvKrpzd1v{Ny9!oAZ3JqXxO9#_xvS7PwX|u7fx%D%j02T6!%@InmM_&KbRzK$ z1PQqUfXPj}z$bB~_MBCKJfrb7jT4zzj(5M1)4TC^^L2kgxLu*HmDLlN+=;Js6>~Yk z5eYbS{JWg`b$%zAV{`d86 zce-U2c#JwPKot+-W59l<$gb=1g zg*ZOo+s%uY{xYy9w%Hy_DZ$btedCH-{B*iQiia+qP_m=eFw`{ zL*G2pZQ}$g@YTw_mfuY;z+1jQ{47Z)#>9w$gm*+~&$PZpSE-Z1^BVkk%+L7011S=N z0LVm`XNKc$4^n}vtOC$G1tNZb?5K(UMxcx zTAnr(@4Dn$R~NedwmcHs=!7mzr31MaADCP6{D6)vwN}~hssEbA5u+oZ93x$rARcmJ zI1u%UuWT4|e&@fP+*5IJo-K1>!$HbFX>+e8X+sa3Yn+-wQ}9ro>hRbL&I1r9IG#j1 zd2OjG=>LkdKyE-4bVm72c(XdUr^2ezsbtS9Vn|xKElUNWzch{gM18+o}6|(lV ztu_<1%8sdZ+bevGw$0(;G$TQlDEBW4XSaY?sWcTZOXQE5BHY_pi`cyRfL@h`#%Rc^ z;Aw{b5biIVjY~olYaLO;QUpEuhaO|Y`<24Ii};O4xgo<{yM)G5@6>E72U90#MMJYY z$hW_yq|Gy*Zs}6*&&7*>iXT#GitpcHD9>c4g%hCMek2ef=VzoPnyvMzlus5=-!7^sc|7rffd;X2^=ud!hF$A6{CBoU1;Ei)L& zCyL|Dz;tsF5;u51@$x>{A$Tdx9tcs=)kA8nu(cGfqDS873ZVj>SUj=}s<6^64SinB z)GAmX3Y39FwIu~gbJV^sS?7%>JT!9uI_mqbcl|Y@W;$3nnpB8cV4*M%`p=e#0ot6{TK?ll~p|5N~kDc`6k)-bSzL=EZ_%SQ7yPW(# z1Orlkn^HfjpF!fO&e~4*n?Lyo`2R!r@?#YJBb?$wLOG!7mV2volPnx@-dVJMQ^?Db zR_10{h2AAM^G{7^`%&jKrB}e$axnPw+KX7lU+?h=`c@D2q}t}Dprtz$3a~IX>kO}H zy!d-!omE{j!mPe`LLAqgx2kgF`Di>3Ksl1L0~QlLp}-UoEVPBFe2$=caLz$*7E{C( z2zB4@Snrn-G+N@purD@LXjEvd-XoX*d^HR5I3OwO_`P%mwEV8}+V1DwdzUpqu8R6Z z29Y3pTPWQV4=V*m@nX>^)zViORuM+Jvxu*J^0>)`6i7pJ*LL*zzI(0%Z>;V(Xw%oN zkP_YU590OWePvkO{r|C4P*pHxmuxovJMx!^vw#)+a**2Dc^bgXZe2`B|EBY%gGNWP zB|jUG3YY(ls1YaOk5YY(2iIu~PeS-c+F63+Eqb_;?|0Y7pvirZEr0&}UGvubZUu%+ z*DtS|cwGz4Vc}n7MOIO+_-eXMm^)hwH%`oyRBMkk> z_CJyFq_-7T8iQl>Og|cyt!kE@Prq4LB~z#MY9@ajGkDl0+SP6+`vz?@c&gJ)duluLA<;a5)8@Q1c`M7a^oV|M4T3bpn6W?TcYj^; z!NT|ob>dC?hJJjMdekbX5)lpnvQ!+as=L^(d1P=^m1=M+c`aEkh~p^v`Q{$AvDeg@ z+Nom-*ZfXpMkb!19+q_#q|gcO1DmMmDy0vqs2dD26$0!=+VSerosaV=QZa%B32VWF zCr{5Kg>=~-buyNb@)j$WZYN)C*jY}GzxyB%cpK&3>m;`f&uX13$W`n4yH%@l7~|xN z+CTGc`WAira=uvBChn+AAK9u{lPWpa00^aSTur4bz>T#XouGF6oHE)w)X|2=!4lVK zbjvylC3vO+wiJ1ci@yu}5V7xcwLOyviE|DF{oLR-&Qf(1I%I6>a}d)wrvwaX8Y(U* zr)~2Fnx!+e_5*)8nd!xt8*z?=M8a#TA7`S5|G6MT#ci`dh$tSiTd$&xkE;unB%|ud zIm(018ktrP&2q^wAI)W8oo)N7>Shjiu~Mijft0JfX}fQy@#mp2_Fxt-PRRzZ|2y_oPR-w`!wOB}BXk=XO6$T6p9ENArlknqXyS!jLRff^f5Az0JQ-*^nyODFd-x<$oQz3%O? zt4325KWF+Wa~^ONT^Um0OLTsxxOBMULYFR^yefogq3Zv^xpKG1%r3VwHkkQ^b5&P! z@k3IOchk`Oj?|-2`Nt-~($NGjTW|xEwaVr4H208g*Y5RR-pEGEat^`$YsCwD-|xOW zqn1U6{IlP4xY74&Y~jvmG^Ao&5y?Wp@={e!j5;rI|9ZKHJf`B=v+OrcGOFTowF-L= z`qheAE?eK&-;9gxquBm$S>u50jhyJ{=t92e)zfdG-H7Z~cZzA4MZQS+$C+=0t1tZE zwphoCWv>E(?=9cDIXNbu3e7nC>JE7OzmCOS@%^#r%EkJwh^a3lXZO7z z|H!MZq!ew&ozurGhfiL5HyC=#v|og194OQTzRWGyU*o7)#Z8B9@mSDS{?nts7hO|; zi0o(A9!PvtaI^D#Z0Q^Q79-ZdQ7DkIMeBaOioxg zZ`b`SRcbF0o^(%BE~g+4hx;kR0PjL?V>)%(oiqL3uWH*K_e{WIz9+zkwIm8cA%r8( z+FAFX);|i2A3^QbLYW@uM2fRwIB>iexZ?ESo4?OGQ!+|(^!`^@arbis%~W5(llFQa zs9k!Hu!su(FXCSF`a zlj(&ywnClPNm<{kL~p*SnBg@AS)6Z9aYNsoCQDWdHtAe z=#_~?86bDLkZRe{`6xTUj_o?MJ(EjkPynHjb#{0chb0ic5r3|V`Si7pp3zTNsQ4pc zfI;D`OY|vGx6mZqjsA2L6sm_ify6gDV`FL8oHc{`OCpV?13=l{kEY=7y^--x9*2y@ z)%-s;IP%J*{h;Iexwn8uJj13`UDpB8y~DqNz5fsrdCr0f*GNTG7xYYauN~L*;|>p# zDLU^Gy=z`y#Lm44f-mAa`GPi5U2esH!(`wYsQNqyp8|;d;tz<`E_1}g+v@$-aSgXk z!r~Cf2}xjx%f29cSXP5dOFEj+cYIef2`*FK7lPMcf$ZR2g&Y-ujn=XZ?jKVdQF?Db zQ$txy@m`!@hE=|W#%A`Npo$ji08@i1jcLKzZ-rSiaRm;IZ7oLIGk-P8Rn9Qz&c#f} zE_XhG-_l$Vma!Xoq5YGns0)etiSAgsE8S`wKYjdcZ7mUc;*|u8?-XwD_&w555Zz#F z*?}04{}3X28DPH#031NElOpH4+Hov;u%sD`?A+aBt(_$@Z+ zv*Q)IxKTdzf%iAI)}~&ZhyMpI51D}XE}AHV)OdU=sKr8ouctP#oxQ0AjXkS+-LM2a0g&HbVS9ou5 z^&g==UraZh$9`hO7!PgfmYQa(f|JrFVou^g3dY%Zh@^-zYKa;tJ)M~xLA9w@EIUX< zKi$Gr=`82?cJ=c&q~G9$V3s{E!JJF?aU~nUU38MYBOl6(-lmgTq@{m=m)hjE;pALH ze03SZu;2eLQ}utis{i*snv5sJa2(9iSw={8$UhZK9DFcVTh3kqp@8ixHeFE-`es&u z6@^z_3L=j{c#91U4~G0G3MB#hLAO2R?i<)P_WC{`N#uKbN1L{7fTvU?otP5(`bwo# zZkC*tRHbmUTX>h)JN2-QCKu^1=P31l+Ba9m`|bEAi+nE62NG`_W#E`Aq++<_2Hg%S z>|N|4QYug1u7wshXT$e#biSH_WQJ=B%YfxJuJ7PWV2N&huydd$r1?ecwSsTP-qCV7 z5SS{-N=Rx4$xrs3^#v{lxv-NTe?<}$0#4s-MAbP5vp9HXLz@(8(0-P4Rf}XeTv46Y zd#;5SkbWjz%t(^4oP1F~K!H$I^A~d$@!M?mr+YuY3()Neo?Du$T355j%q`E!a7-sJ zpknkh;+Gv8AW`MH_$w25%qz8Mks(9-1&MhoWj^=W1!}zPS=G%@Er-0|fP#dN9Fp?&{l`qP!4Ujazm-jq~rk28U6rzAVrYT7npQVL8m<(3wamZDrV+I^wl zn|ph|)i{wgl`Y|$?(T76{2#)op2cb}Eg-4FV9I^h&f7K$;~m<#sBT^pFLyURuY1Iz z%yVD8pGUm*R%c-(<=^u8hoZO*!}B84U~1D3l7pMw8AL+7B`uOt$8m+1FGu(m{Vz><$eaedc z`E&8!&y_UNI_0%l_6mW?xNx|IFC}`UsIX;_*%%0 z67!;4v$?x9hqW@7ne95^LHY>ZJs)-+keq~Em?Z9?L!u)rR()DGR_=^R3`jlC7(P3? z-Ax`&(~k=y2+r|s_*#zo^B31{j8*t@Orp7_bgI#QMiY80A$eT3yg`C*LxiY)4J`XY zGx=FAMJ0LC(xt~avV6;|kUtR<*SN)86w}%|_@C%gav{Is^_;ck513b_@95GP6>G+@ zrnGp0a6i-rKFWqG8u49ID7H8h$4K*y2X>(W{*YkpS2;wm<9R~78{VHK;$3Y$C;o7z z%(GVRdvk?SCH~X8WP5YH{AG0wuQBe>o-iiU1E1yeCL*!$XLTuG?69n+;%*qoPE?#s z5i4U87Bl>`7FlNtYHw><7T+;1^xGrRi}v&V7gz>K#UX8|9a>xa*Q)F#=w#U;yJ0Zt z!KQ(8gBdC}|7O$OM2S8iPGGpn&?1~wmK)pE-iq5jO0b(wXo|V%OOaeqTMq+>N-b$V zi|2jFsRT^`zQwON{mekhmb@7aSULElmUa7&2}kHo?&rPmQk~wmsma-5@U5X4a-D1%b5?esm!!QG>(xMO;2aJ9B8~?MF7|M6 zaxwkhl)PRN&=U144P)=Olkb^PA+Hyx>33`E!lp(%xx6`q#aOmUmiC**7?UrZ zeLuxVzZ=B@bX9?jt(vTJCcAs_oH%}jQj+@ywNY`jCdh{@_5_3B)$1~nR;)@f--gt4 z{)G*Oq1iZ$LqIbEw!g>sp}O^^<_R}+sjsYbf~5Z;i0bAv&)+-eE@F!L(}na;_*HBL{fTE9gOqWC3s(y4sfRy_$&R-#8=Bhmu)0qb;;U3N2ry;(!gp3 zx1$k#UcwcN?Oa0UR_0Ar{KbTPk87ZEDXkKEyY^fbksRPqtYw5;W=)$ zbVKqX?VnrhaTzfAywt60PY)&jZSpM!6Fg3W^gy^Gn^`SWE%H+<(`HF@3Yr6vfyTYY z`B;3-z-X3btE|PqdSDJZ`Lv1T z+_6atI7SEG;f)KFy`{f16qv5!LUl+HP)dS6jc9&b=qgBCI|Ei7omH}0^djZ0MQy-4 ztNRqrgPC3vN*XP6mhU;oH}4A=lmMqVtUV=mMs8#sAGr-K&eoL4MomVvVCHum-7WSA zCtzkCt6b29C%Wk-IxyH3pu~4;TEk;NEC=E3m&Dd=bzWdwx~njb$6_D9*9`tx2xYfS zm2b)J&_;Gyn`Ua0B(9bA8v)86U3jYkPn^ftG!Ouu8=Ao!;N@1v{@pa%L?0^~*i9{i zTvP>A0N;!N5e#ARrYL8fSxH$B#kV8*G%_S&D{fKa_k=gcE49`HuXUe2R2AQ1ZyWEc zPO`-E&u>RLcIseVgS(A=!y&k{3H&)!Nob>Iz*CI2w|5;bi+%9>(bxOmU?J8bZ<5@1 z;ripO&LM_%<6axVS)MZkhGZj#bQkYa%ouN8*R1uWrb~q~-8=gb-_0Rx6^DXlWI~Erw zaprC-$s$#wqaGn82J_ur=j{E@8N0YKNM!F_mD zT^ya#TXwWrx~XUl9kJ3HPn5T~#U7#@pdq`Ze(wv^b8>iA2>EEDQc*@0$!bfV*3FVY zFrb*|Jkej*m{}>SrM3Nl$)~5IZA922UIS~}%Q)El<7M58X46`gg4^Mn*>ED%k4$k* z8N_-=2hCk}VdqRvWsE;mG0gF`60#R0Ij+5rI8Ynf48czl&~wsZRk-r3D$%pv4$CMw z1>m?nuAR(Xk#m%mrCfUFvK9zA|BOr)}#KR1s6sw{t_6Kr}3%2RxpZ9)jA-bH@Qhh)>7o>k9gzmJT!fn7<4icB#vkaBoZYiGhYh0f{!Fv@Rhx4yuW}F1iVjDf#ZU$%qG2o;CE;8K+GdvKnI%dV~hRLe>(BfBS5I5Wf*+{ldgH%L#kC3V45d*@(5_(a;$# z@>OEA{zc@qh`k%-K<}X)6vv4v4|!BWRUaQX>1M;$k1y5X&RyVH8a`y!s$?EHpRF}) zHX}()`^$PKedrP=vH$+H^1;~rGX0UpnsG;#g@gpM>@K`^p7h%J#W68oce0PH&xVzg z$~XR0Gdn=bzKr{Z|1nK=o`uWN*#B!*7QP_aAklr;$`!Xzwy!OxY}-t=h&T6^7)rl#Ha|_gKvnXF~1N&Q0G>D zGFFEWoTyoQCK1(#T?$ss@u5g@`UFSmDFwKZRcUVso^-mh2r9MSl&4K3YK*wUhsvDn z)E+#iybCm1cCmH265P+fNfshwKHjsez!qxOMgzGhRx26^{w`f zz<^-v&EbuTzC)ijtg@~8k!f?B8`%*-Hen}=c9J72T?xx)2^jzS;#FlfLG=9A1V!V! zGwyaZ<_13@iOHsH{m(02ng+RYUlPr#TjrP{I|Xc}&8HF9q)JEuf{YzjJnfpwiX zlx7=D@a1$w>+WJN7+g8nBQX~8{__4JQ!nt;e(pN;hpFFW*u3W$;RNuqv~(0^xLB+P z9&Denj2rr_wN|_kQ@2dmSxETIah5Ry!S4sqcFHgoiw4AAs;dO2{0XF3DD7A*&(EuJ zbo{h5j7RgCb~K%a-aqZrOYK-M!3$aw7zzS-QB~5%nY(Ai=5EVPqu5*uof6)66C3+^_LyAj8VWM$g;*Y+m+TifY}_V@kw_5${~tH0%`i zmoy%(?sh;l)}Pc5D90+v`+*~x`Kj`U@vTh(|Edb?mvu5I>@+KG2=vlM1%XL@_He@f zMK2j7YXq7h*7>Vj-YWht&!=t2L~In(2U`ej@33gb{gtWsi#d$g;}A%sP_1TfUt@3c z^<>gd@rIW7d+-_Qd$m)2C77m?dv5o^6Sc_t%lEbNk0$3Ib^s%(;|J@CqvLwa>Nn@C zOS~b304lmgo1Sl3RC<$j-kPxm1kQ8p15euU77?5^W4gdblcNS&x+Gea^JUx5&q7Fb z4OX-8*OlA9iSA`u78UujY^WH0t11y#;YnAtkLc>xV4`qWxs<)jV|6&b0_xif#&Ipg|(}&<%vPt^%EG7Ys1sW})7`Q)qOWW71pC zYb(K|FzI@OF(-32?^J^Ue7SaI({$lOyE(qo-4@-;o_g4p;auf8QLSraSfg^t=SyEc z$o-j?*0SO1<&(WuMD=ubwp@SAi2tvQPk%UG>$DMXZcG8e^}@?k7~YK$nZdIClJK z?WN`DCTkPZ!uhFInuoNvJsDOj+60|K4n8#hy5Ny^D7l@zWe_ye*F7;)I4r6M_%aQy zcCN*Gk;b1ZxH(m$+|^wXAlq!F><}Y25P(rURN$;o)iyj>us|;{WbjVqIP{b5?EF;z zX?{URKTvrwn9yM(kSwap!JBsJd$-brK8=eocYD9=TwA4w$tX7d;7Tn^!=xdVEW;4K zYNkEwZI7A}_oLZF-uQc8 zrYn2!;cyXtAbaW1{$iViMZ2GEGxvM$bzJef-0HRZfv2@Efa?%97t4Xtz#7@}+u(}9C5E15Oq)ji0Uhey6qGyaq#!T1N<9-C#sEXVfvHD# z+4=`TKKPnqh~fibV>->tZ*(wWEY4vAb^UtK6sbDdUc_X(^xQ4*mp8{%KUTk`x6nwi zOWsP9vSzi4e$VAK@aSc(ck;6;iM47)wNud5iR+FSI6Eq!l%s$vMpdA>%x&^_L^$?U z1X8GX?w!yZmAyCx7+UP;bzv-_v_O|lJ~2~4;T-#5u?60HUTc8esq}QlD0Mfs3Z&cr zOK@ME959gCn3T#G4R*XcGeU_ICqCa1UEuR$Og;PXbgtA`F+-+u^7fbBLe(u*)|V+= zjCC$b*h|Y=$B;6MN!VGvoN{vaqv)p+Smc?H`}rn)igMDYxHg2d{JO{wgpc*l@_g3? zI8aZXgaUeF{&gL^U#VZjEmQ&b2X}kjPbV3_6lzWB|E&_K572hg*xLO?6}1$c3)F?< z_FXP}4npw6T66X{14ww~%kJWpM6mrWi$%RIOb8u#s$&DI4LdI8>q*p&HpIt<$uQ>` z3#HpNd?HfSBaXSX`OaZXL{4&ekw|E(SJBsOP;HK59RyE$E*Ac?5$Qf{YueN0WI3Tr9LY?i+&zVr0s zKN(n7l>y&RV`-&WCA7uMBPG&IL%eq_MLL3yDWISj@WJSzD%iWgiP!bp{3soUGYQAS z{M{Vi?MUC{aUJQEb8?*Du#6H_Mc$ZR3<|5o}6A$KAWRtvZYN0MP?@du^V!LQrgyEZbO=CtDSpe3=~+Ja1XdDaE< zd}eVzm>URNu@_~kYg6KtfUX1NVH*$BC-Hdge-URxgn<$%z%}pj`mqYFq6_VrFD=S> zMMxJ-;8r(}3&DmEO_=lnzx`@>e*T)h=@jFI{Q^C zble%|R7KI;F8`avyKdPA4E7Z2d+_dyjFU9n7Kl4c?369{D&X?Q2%>}4)^Y@nU;cP_ z)Q*;boHy+ffC!L5^__>+LjAAycUp$w#{pC_Rc{k;$EVW`TXK8a8Bf_1WoUk6>^Q1u z?CsYrdCmS8<{YR0bz3>|1{W$@3ju|WkJ|q zl8l#g@|1+mdFrm#X3e4l9f{Rez1&yQn3ZZTIm&&B^$ZQLcM?^R8Si+BoUMqh7pB7b z*OVefkPjGtxSu!n$tu$0xPB-+_-7){^y+dE$%|CSFcI}Xc-RH20m6?+;IOpF)upT4 zdrLF9la;(`9n~8TYt#XK3X?Q~Y!4;O#ulD$Ba|fWb=as9NuG_W#MM_j9kG?U0dWn^ z^xP_}#6Dtw@-qzL+;T=dSvNJvMA+#DcNkWRi9hNY4A>2E^=z-prTSm#?IN9fTp3L4 zh2W+1VE-%vtV_UVEdIi+OB_B571BrDt1JnOT1OvHT>fI&&p>ppXLk(qD%-+$__l7p z^sAq%0!UdJ{o@3=PhUQn&~Cofs&2z$)$|ZZZunt;Fm0M(g34UaWzmaG`BE^mLY;nI zE$OH3P|JU*SQm4uGB$u+BH(>VRbZF5wXG(vl@)g1Y}0Ahm8XcDdtos+XM{M??99xc zd;)$^+SDHcwMy+W6gS~N;Qk*1q~=xxzF5p5k(ZU}NWgVcT1T#rLN)&(fN!ZkG!9<0 zetVXBDDg6hWk+uCFCV*nKESBL+{6ZM^*CxFX?1IYO*zNcCV2?i$ufL*}+`r{teu zf(Ob5**l1<`xLE(I4$tK8`jMV6n$;<42ct%u`YG+UK2nskAIYLM==3i^io1*c4IHI zuNM{%Ftc{?tQ9D5iyUS(a<{{e)@jxEUhO!s%*fw5g{YsfPzIjXCF2|sZ?Z$cHUCWU zuI{f)u!Jwv+v1;&CuJP}Z0TX9CHEEhR`fh;!D3YVpx7+n280$7fq81%-HA}49G+1{R@ZS3g1$r1TPt!v;p|b131zc z(=hy;pWKyiZ`fPjWB#H7R7teFh5sU2Mn@z~OECO`k$9}uhZ6rcni^N#q^P?)+0VjG za>HMO2j~(*R)t(YTR7~giJ$l;B=}N0`=G)zY!DL1!Dq~>(p>0QH=5^T@8xOnvD^8w zp#it8`p%FJ;gIT}lN|*bKmQ`h*UkR~>fD+gu?)Aq-HsLPN9hHae*bwSfJc%ydm^Xt zRp>=U8K8v4UqdJ;jf=eBcy~27Ff~Kun!0(`=04rp2NCwMyLQ4YZd~SGj&; z-5+$;S{MU_npsGE7yD?%o7!N~HEQq1p9;!2wk~f;A+T%Gmzofm=0?ox`+C%WAeT3e zUW+F9EffPY7+qm6fuQ84Vbv&q%@0zjUVB65+P6oU1GZ4WhhrjmJnH73id_3s)HdFa zy|7?Ol4P#bXQm~-{_KNwE`eZv)n5tt%N<}OOqZ8v@S4KKNr4FT1zdhE#|$Cp)#Mk* zbL0q`W!>NnNu<;Ny~L5Bp3eM$6stYYihrhY%Dxr8V4!z>2zD;{`5%G`NW7>Wer@HZ z=;sdPuiSHjhyQTkRK-=D=0ke$O5&P9Lxtnj;rBVZrqEx@R39PRZHf1hE4)EEhR?(n zwE_ru!iVwd`IRMU>@v;?`~t*OR?vTLbw2#JB)d~WvU?w=3WssW96Itplu3vt(Yar` zt5sJJJ+Hts8)eE)yo7*+Q9UPR0M9!gMYQi?uEI;3gPjv}ui|6W5Afjh#aM>o2ESHz z)5wRA_bF+suJ25P5!*Eq^VPSmtTKqS&d;fu6de6~+Q)%EK+W87_r=&|C-6&epM}lx z6*z#s5zb4jIocRG=vEJ^2>eaw9u}6O86R)#p`Ns!efD_i7WSldyL_#^|7V=~J)_WU zJ*mV4{D@uGEQK-eyLwqeN7|`Z%i1ACHFIe}EYQJ2>dACYyz}Zb=oz`h4$=$rarIVh zf1541#E^#Hq5J7IKO_lW78peH36%iF{`<%&QEvr|^Wqlj^teZQ`3#1S7R*LHvM)>e zDaqANYHBIRu6poKgiNlV7}K54h8j9xKeZ=PurAznb$?6L9I{Wd%#{M_GlIgKQfe@H zmnqvTcN}M~muh#dYmu==_`gFH?f(y9TpeOeOIw=>IDQPQdHvlV&yfb*?fF z30UN@5NG~aL+bS>&!a_aMW#mtTv15A57P$ACZo_@PC8s|O_83y>pTN`k<58ZdITYB zvZ=73k!MNub3LKYWj|6x<1y>(VJ3r)I-|>farD$-`TkxF-s!VuEfSeJoVxAlJf(VU z;89uTqeQ2~RodFI_m6H`qK{R|^CObms(j6+NO6_%Ul@=zwYxoz&-6)oI0<+mOUhiF zgWB)ss`b#0(AXR%e-+hH8zy1s06SNu8e<4y%KfVw`ARt|M@N_Vy!IoIEq6_FmG??Q zak*smSK-Xe^5D8<_PZ|c95cknI6ACZxz!%aVgK>PK%tJMFP8Sj;(>M5e+uBV&@ z1xa6U`0nS1>_5RJ-<*o!j2ceGdX%~_eP7zCz$bdw*%@%mK&68z|%Wy*m63Pty`dKA;)HBUR;g_S*ODp5&u zmqTNIeP_#fEbd9|&a@O%Yu`yE*e53N1CWDELGRvV;|F(xUg0b2bT5x@;nLufOx_mX zzar7PREEqGwtUPSy5CTsOxv;(h=d5Bf7l+?dztpdS|YYV^MEMM1*mWM^@;3)r#1tl zrR06d%M=9*YAbQoPhOOL%tReWlsp$JJ0jh`18R|MA_GB4SHsOS= zzv7gCjQ&t6p5J2pX}JC=Aoeh*I7{%6t1a|{iV3VK&@7YTuirhkiA=g_nL+b!`3Hq-&?d% z#90)vp4v4UNKy3FO;X93`zEc?Yo_sQBpa2pTj=3#;u^z2kFE-&BEhTL9(X!Nn!Y>B ztd-vLbxv@`caAOJ`iiM>lfscP|5L|f{eIjvA6D?&>a2Y3iTxjva-$pMhZoijQ7-WA zP%l}^w39gb=BP+wM#Em^g4|cuxnNBDMu9lK&8A;d1bGC7>r4`pJ)!xpfPdH@CtRm6 z8?!8DK05`+z9=O&=PNg=y;oG_N`@|8HdpEW-MF-&l#_4nkm_=`Kn#V_rgfD6c z=N~URmGfHsDCldMx8SMF)6T<1{2!rOfoye$H|pif2IA>xLmy=7;*lU#w{&wJOtu_a z4JFx>TUGr>M@gGA50j5~wEsA{)-Pa*qBM57q4@3Ve0Ws7Uv zJskAqx{+|$T3s%@iYVb$^0nAbi4!cipj;{EY!ns+c@PfQv2z{;Ezl*GS#AoR_PF;7 zgC*j-RjT4dxorLcZGZ&n^i_xq%~|7zVWz%vWqMzy=)H*+I$u}iwQ%ogbcZ+KZ*djd zeX3v3jX1s3U$*8C4h=hZI>=4z; zgI9x7gWley7T?T*dMofcd<7**d*%DGv})dd>X%Pon}`QP$#5b4XYOsb@<+hv^ldl)*fV$xJe6X9PCb$!VF#j|%@o$Ozae&%`F>Qef-sU>MCZiiGpFS$5vWy`U+Ri2} z0IQ#aHao3jWQgNi76AIKt*-^fP%%(F2>qu(AG;uY#e&#Roy}Ud@WyE5ptC4#y?@fV zZ2q$(m$zN|ozwS`?s=~HL`*OE2qp5hJ%~WerI(UjAqhtbUY$DviEZPEy&57LtGlhh znq{m}Bk!p8*UQh5uh;fu%2szX-)2HRb~@4Mxy@3_KRcS`Hkg)Uaf-RyXU0)B;YdVj zWw`t)dg>2m^^B}(H^9{ffMkT<>Dg@rGOXogMk!8{j z4E>LC)9$|7NRO-5F(VfWFVdBEZL0#p)~}bUlg(iuV?*cZ zV1xKRt7dhq#GudD2FrO^9Kdx#68AHGS^gh>Y~Ek!Jj8`$`E3t{{4&b-jQbBE4Jfq` z>%=&n98LJ9eX0XXTUWCrGGv*{`k2*xP+&sP>R_(z2@RtAqMrU0$OrKm z-R6|$bg8Ufc8(#{j9q>Wcq2Tb`UJ}X!jgWd_=5*SjuTNF-U*fG#ijXF4JJxN@~a)OruV`A{W8R(Nj~|Td>)Fkyf()+GOL%()X{LW zZ#$H6C^Esp(Uj}dh45!@d?(^*?R44qLUpDPd}1s^TV9JjCs2vWf~KWAH0q5xav&i?2F2){!Lz3@ zTVv4Pn*>;E2W>T}xiNi1xrO@)Sh=h#gpA`Q>h`VtC@s7u`RE=v6|$E99|HS`C?f}p zhUzM)kIqCMxD6=cjam&D&A{~uWolm4l&e}XsvKkt1GIfz^2Nqj8`&LWQIOiGGe zs#6o8CBl`JJ%y4UGX4VpKXkoSR9juRHVOrb777&C;#!Kk6p9yjr#J-H06_``id%se zEyXpsy9IYhaR}}N4f>tzbMcR{FZRW{Udfu7EAxHSX5AqCx;MThiu`&9Ix5|?Kd3?I zkjs2A6(zyXykl@Tt)#f*S{Um^s@cJamrGz_d|J4f;^nI-DbI3>;TupD6@UIDyO|=){o^;R*aFkwee{F^NS3 zC)?&66{Xf*NbO0`@#V1|A{r;1CXQ+Wwl+V(5N_ivkhy#>(nKuDN! zaHuMza@Da$Rj|Oz;+|^f^)j*q_o2qBr!HfsNs;;uHVkT35c%B->)dz**pLV@^ z_e=LWj{Ajk8C#)t^}_IYx=~AKpH?EkTrvcECdet@xJDGm@-Z1*mf%P@S0>0p$M@bWYuZRG+h4=MLoNp-=u;=I3G2N260<%K~&8s zMQ!b=(&PI6ipDJI&(&)~!eNLhRDg|5Ps?8S*lX5PJ};_yS*<&I`RbHx#1B}_Xd7z$ zZ`DPb_p{Cw;nC`Y!Jp$U=8m~P34v53^GU?}3iXwq7&m4c>{0_U7w7nZHp!vdtw%K$ z`y8%y7)FfImk6?#0Ppi7fCenR`Au5UueQ2JXMARHs&U@muh;SyfL}*MoD(?P-1p0? zJ!DnhWqrBkW*uzP7$|Pa?Auc+oCT8_<)=%0bg2~D&p+}XupR#gz7%1A$f+El zQ&aXHnAe)s;4b>Mmmum#uRScK(`!9^I*60$qf6R<8?WsZnA08J*vSd|l5QLyS3e*y z7Rf_B<1$9VNO2Hct_0R>jFrH-l8&t3kS}v;vzlnn_0~OO*IkP`fdl(wrF}wa~C7TU>Ib=j~6w`t1=Zo=CnN5E9VhWY;xQ?x`?e zLp!#i*t>xvA?H$z$kK0Uv8ppwcZZaqLz~GpT+^!SDL3*!01JVm8LtNk<)6D7tgZeduAN&lfxr$nM1U>aYxpOdXV zeS*Jp7k!j3PnpHea&Q+%5yN@N-v3ea%TyqZ-CWH9l%UpcIPS~xp+VF#XX&K7=5q`( z%LKfO8*!N!{QGscW`~5ZY$5)_ee2^JV8Bf9$0JP>Q|?MsGEDI_T(sVa;BN>yEo2iS zRf?KQ$mws;D$@n1Qn!|zo_HAY)nZDoHYv7!EpNvA;+dRAumvS}Lkd*Zn_*C!$5jT^*IUKV)ErgC44jM@ci zlYg^n%6?1Dm9hjvR4($!fNLGcIcyt^)%h4F5!I}%Gjf|Q!MH#!`S_==}D13cyK=*p&IPp)|^0lGhn_snJGa$smgs#9ZM3*=y3y9 zSpbRp2o?P0E{SN27gkTOPa4e#Twjz3|E~ET3cIUUn7dTtwFtY2j%jSNuYFWZSdQYv z`F+7Oh;eJI6HUF9tWE}MAWYzX>{MhW`|nn( zZDO#aDdB2q4UN}hpIYc--*+S6CKA!?2BX7rGI0F!*J_z1!R!P_AolK;eW_&qatEIN zhmYlR^S3n!e=)}@0_1PR6|j)muZpq{7=b)rSx{^!-X0JsMNMEWZ+i6}0FLRFo#ZNk zq;peYdx5d+nf#y=p^==9T(K9ytKj^6auY!qhke8Fn-JDMxe;e7HNLMdF+LqVPL%_XW?yVY28n3@v z!<6&c-1N}d+Bl_(R&oB+<%JAUzM_x`Rc)E!;yynczgyHl=FDeY#YErnIsuGI z5N~%QgK;cWx?ABtkFEV3TzAJA_D(mvTn!QLbwS}w)~RL9tS&f>GJkBh?7EvY`;coZkk|ZvG=pe@_tUtzf`(4NdV1R z6Ok&Y%b0|_SFi^mcSzzTRGY!SpezciDNFAj;)WhYw(p zM_?D5b5A_Oo!}3bObMWizH#P+xxKwLW^wJcv2r#?VwvFRlLUM`SL^~m9z4=W`9dd7 zxbuNerbi+H!=LOF7cK_Sz&~#D7SitJj``$6Grsxm=lvg0K@088kygn>iCj#>z1~9( zYYfQ0$VoUexTpvi_1WYYGpNkRx67m=ltP(0yk~#8j%BeS$M;Az-fK`yZt^zr?V=w? zl^g5tPD(!YU~^H4%%`VC36nsW%HRCD0 zaIN^l7*)0ZP(I*eS&m`}#*TOX{K?Syy2gA#RO!)PZuVMLlDBeY@P#t%ylN}#;RW_- z|MN^e%|-Twl512x1^90V<8~*e$vn}N#-jJ*QnsyibBlp>LQC&nH*M9qW$V25x<9BW zIqW_{8I83XQ}9Ok+$ihsNv_mbx-$sd|&`8;mxm!uDE^kN1Wt^FFw%{(>ad zv5R2V(j(Huhbe%F{~2(bh{twiM^e7x@ZvmF4MDa+eGlaWJQ%e*P3nvy@6M@Ic(IVy zi#Cz4?Uak4-w6)usMw0b_So)ZX3`wn+sB-LCGV3*BVmmX4st78R^F3$QXL(e?v{~8 z&6})!!Eu}j+Wy6i#_mR?1evRO@p*#e=ob9;h!EMjQPEOgGhRJPNSc4p)t-?LQD^+g znbe3#E@_TA7oe)YHTjjzrM|zL!B`wfd3?Or9Ul;Q_#&3+s^`jRL=r^{xgmj58)aL0 zN-**MB$-XoHvck9sO@V%YZ=BTS_Gy*Xu)ku9Ik`xv}d!q$UX$$J#qyF9WQ-Cw=t+s z**7%3!l@OpKWZ!f@)ve8hnX%_rx^l@+Hr8O^JDmG7*t9(TM#`x?ziFMPqQd64Pv@SGa zRh|^^t*PZiH_AxZTwTBJ_*Keg=Lz*lJvLZ>-{mD1&cDeZzf#i!u9ddw#@on4 z2i7b3%g0X)Hvw07BK|`$3X^#-fEcv-7H!3UWwuqam7&`4akjCsC%Lsa35Ox6rX|4D z_>WYD^xCH!eDn?|IHTcbb|9@Qua`j4>K!+0FIhUDqt4ox6|}}&&CkmZ-A4Jt$rh@_ zcCKe24&w2)6VVA%qk{#l#}+#I`HJH-9aI~A!YjZb6QSO}0_ShT6}n-#F4`s)IXcRD zDh+tay{~5kcC$($<04v#0f?yE%C^>wZRUlA(eG`S^p0eY;2I)nv1{IxGOV>uBgl8% zy;G9Eyf-0~Ah`>daqhBX%J_CuI*}nL=3T-3=G{%zIq8$le21-Hk>ktTRK14G&$wb) z5W5teCC>nZ-@x#}fT%c|Fx4w60qojWA9^sS^#;xuTA_hm$}UkBNg41Bn%X{rDF_U1feJ18?Thh z2dJ$b+mlAPzT1;?PaC8n@=QA5YS#~GxASeO8Q4SHtFUrlpkDh$b)#F^QZmg#MU(=g zh{$ynDd*e#u0jb(GVTWP-@)$@Q+;APO>MFdQ#L>!A8LqkQ)TJoZ9kGvl#R`632gRV&%x!NuNUT z1~0fpQc4aSZ@K8{1&`6jA{#aL)>V=r)0DSt8Y`N?3%Pp0K#sAcztRzTueiF%Ah`cN zWO(_%vlDF19j+HL6f)V{iSxKAw;)dKt4G9hgA}FGTzmw$hS)3}!d(w0mwFycX!s`r zDgVf${dv^|K#aG2$s-h0Y7BCBe5)idWVrk;Nu_tMKL<(rMu8XOXkVu}wN?EXf;nlG zc;88U>$bMQ1Ngd?_E-5Y&PIkvpJb_m%XaKKkVx*W&&6|Y8p~hq4-vH%LP&b1f(i6A zaCRTyE%mo+`a-|+L+cimzkQ49lIoWVK6))Kr(HQqJj*z5aO@LcE8b7HzIDDzP_;$C z;SBWabp0UbmmLSn5DIPDf>^`HNtHTdsiBW0`fZ7IZWes|QPTG3sK8W{mf6!r3aL34 z7n-sA^rMd^(k#M0rd~JINY%$C>uxpe0b$~)Qnf>)9qe$bf99F?HKAA1TC`-`odR;4Pl#SPbD2bvXB<%v2c zJmDd4Iz+cl^*%8CTpMf%cZPFR@V+p3Wyd^{ZSh2Xo$*F{$GbezCP$y5w3H<}JTSD>n|S@hlepjqg1)n zp$xMi0k*5uKk_C}xG@l!jF6>2%GSHGdTiq?7=qNC_%!n|>=FM)8*zMea*QO=w)W#N z!#WHz49wp|eW{Ivj?|H6xM!e*Qsgm_vN}-Qf}c`%JXhn;DeAc3!Svv$}Mx%49Tl1 zwLKCi33AoyGAEq;=7=|&YGj%n4XsVxzl_UAJh(`);IdRqM1kIt6%`1hawElU7u3%N zbce!3T>KgiBi$%>jN!fLzSa8>Ivm%=Q){z%twJNZlT$Z>WeSECEGm#E+cu`iUZ*pc z*-sD6-RaHBx%Ph5UvRA8*H4lyO|3aDKJQCbG6+CTg!hbY+5{zAI-f2$dzz94C?Q5f z!-v%RmxnXw$aGysMs!d~XCPhp6L-18w9_qk>o*Ho-ItJ%fH!3dOywshqL5ehu1^GD z(-BvznX}XDK){cpmoXO&@2sJV38WX})m9Y6{&M?*7`~dLb^K&EN5Cqq0KvW`O(6N( zh0`>;ni=~orENRS)21hZguzTM<%Lx2W+H)O#?K5n+avT8M_i9+5%EMp;}wPO z#S;ORN4#_b#~`W>{&6NZ?oSk}V!412Sap5DK`?>EX_m>@igL01$A7P{)UiaVg2Zk} z`nBJdZfj%&P5v6y)Xus6cfeD5P4J^lX3o`hR;dxg2g?OrjsA=4Hd^tPsZ`blROv!M za|vkVlcP9h#J#SH`)}(X$)z>@4NC3dv8nJAce}U?C9|@mrv|u zg~7GAuL(GEYG!-dR8;DaNq_Ml%8y1GTEj|8KvtHj#rmp5O8nEusdaQH3&Xq17KzWK z{Y9dCM1}!58u|#2uOH$!X>j_sU%}Rwtlg=Fu#WiGTh6J0V3UjUXx2rZZ& zvTiMPWyhJeItpXVsRSn8VlYud*wI$?eq5WxS(a)NgcYsmQw2~%e!lVZysP($|GD+h zQjRC^@CMQ;A;mxxya-SL=zsqilp_qF^(Tw-sZf1Gr1`9Ut42=P-c6h?d}8!6 zKwC5pk2Ao+DM+~Rkkrw|v7{G|aF|6`_h7pKc{=^IC?Q&Scvxm(;&^*uu8Nnn_Zc^DdpoK$6SP8?D^0tf^TNcFWH>4Cby3vTvJqdmnoEJQCX0fRl{>e(F z7AafniT6K0mHXTALc8F$__awDSoPV)D^EZOQ1_gD_C*@4gGre9<-3SvtKitnoB>`i zl~W3Pul9Gs7X(=4XJ!Dko>gI^6bf0!sie4(Jh6J(|^TFVoww6x4q#?V=8ui3A zw(C)EjX?qGM3D3&8-mlY`+s=l4%IRzHSSWLH{}#@386y}Mrpr83!XvI&Q?RCHN6## z;Yn%ZhuBTbh%*odyrjo>+Ns{$=%}W%zwf~MpNvoMm*f@EyQ+&D_Mti*13SHZVYSP= zARtwbCPHd`XXR))V%{^#FXl*QbbK|Pm4bB@+TsvSDVekxe26TvA3wReHNq?xz67fv z_sdi0iS%*I&4Ym}i)Z#+@`x;939Vt(8>GCdRXy~7i@()>qN*A#oHj^`1+J73_7kPE zJ{XKi3BY}zaX!%>_U#NmF_72y@gSf8c>fSYXFf6>@cvP-c6?9+?6Ya# z52OC<>W%~0Hu2UsX*;-5@)lwepwUCaFe`J{%x`X;ljozcYvCam%0D`*qC0QkJ3~9m zid4B?IOno0GWthO2(5k3AnL~b_9S`-Hi5o~I<#?S1(NT~(@2>@Lc`(brX@q%!8C;L zFD4UW?VT&SJg`>UXMj%={*kGLX2%)urKQhvQ}289UhJ1Uc}~SvIYn(nH9C#D1N6H( zQ!Ytb8|_Qg9_1|RgO9&NlRcL(En@zV;s-pezCrh7{;t;VPqC`F*tSM?3(|ORqSNgr zkYF9^E=_Er33@eMU}=-PrzuYQs_WZsw#%>CM&pihbI0J%>sS|9mYKI6)Jj)h_CpJp zGH=~*R7;S)MA~hA@tfFbs*@Sdqk=!T#}j^92z!}}*Qq`sF4oj`SYyAj#5;Y+?2dJKaS{Oz~V7?*Tw61=MLZOiDU?aZ*xx zcW7=8>wa~#j{l4MiGBcrEdeSB7R>s4OeTh3f^k#vYcKj6xdh=Vof9(X$nZ*xFWo4Y zmBVwU%(Y|gl8$4Iq&N(~8JVC9w38dH=|{7W0ns9&{zJijlXq)-{k!{Huz~eUW5|I1 zBl6)Oz7-m8tp0<%&;1CKC-=x*BFXrAVWBcBDB@P>T3uBf-TZ-$@z5eL*?kC*v~3;J zqpQcJ;S*>ky+ARlqB4Fh#*T@i4L$p@kK7i&F#a#!^ZP?pB?q+qDop8%xMe()V2?xu zmBB!Fvs6~u;X3~XINEzpK2XH=eG4;AU3L2uwZ9^rA*MXY9a({+e!foMhHEea=$(*?hwMoMlfoiGAf7n9~MyiIb^WK;rP`dqK zXveA-TTy!Di#b94q6gn={c}uw$8Pu}8`~GK&=IAQWU5f#U;5?47M-K#y#iCWYrr-I z80l7XoDu4V&)zPhlri^w=NR5bNh2SjwqEc4B4N8(1ZPR*PBHEL@zY9~UY=_d$a#eZ zUF;U=c9O>20LsBS*Pef|qrVn`rTIGy$63+_i9>^hR5}F?tF$2BWAlZIuk8~NQT=`| z*z?Q%dhyn+XyVrH+jLr)66v-t{ZOg-H(TK&o2%YZLL{s?sXSC3Dpm|X57`R_WhMf5Pu7NI_}p!dX#LG^b-TE z9C)?8u{Bb9TtgM4{kwC= zW#OwamvnKr>-LG`V&C6*6l@sFq>d-4G4>NFoiaHQVmtpzhf(_e61G~ppKJ=FZZY#F)EivF!U6uZ5cZucVzYN2)9t7ELXQ_E< zl7%bH@6HJfpBY8ejU*ZU?sB$9zW|(B;2N_;RBj+#N%)M7Oa{GKQlD*7R4&QvAk@jr z9j`6$oJgB8+P;gOefw%tk1Qa!?`*bDVK(weH~VKD4pCR4InE-Ctcdy9nPnl(Z>+Z! z73V*9n!l4vJnQ4Azpg=Oz6u~!wRdOK;T`43XBIucI!p|>&r?or8YrV8AttdW-)0p7 zcSwkChLD&7V^va)wQ9!>Q_V(pR$2ljkMvOQhaVyD74J;ompYFWOF8^1$g%BvG4j8< zVf*ToF>E1L%KA#g^ujj=mixL=JJzwAu{@VA%T-w*F&hj9rR74$k`2rLz1{VN$3a^_ zlz~?lFVianav3d##)9{;=dqoJ8cVcCN2)793|E>##xsn*&F$eQ_liseS$VP^hvv_l ziDAvsSiv|*uHR)T#L;ZU^f$c;g=$Uw?b)Qxf}+!G?yEwbSf^8y;2qr|ot#V!#h`ZD zuV6>9u?c&RQdLemwlf}fE|mXJ4C1`+o9#O7x8#eSf<g-+}6+Ph(GD)^SB+B9g zP%uq%8ux3+`7 z<)P2%b<8o%R_1p$EbS{w?vypV4<9{2Kd--TUzk`KA)iYS3ai^OxU#EwnU=<%8tvkl zGko|h{V<;jgnmL~Y$d)uG$&fDYION>c=eUr=Kg10noch772$+GPdo_YVyZ77@y7|l zcW=aAT^PFnV!x%88#In>iPOY8O%RZEYduqWEuHuxJ$L=c`_=wU=Dlw#>nO(b>BxR3 zfD4~SD=okj8q?ME-Wt$WTcEv|+LR&I?iRJYp6KURGFEitXX|FHH{Y;C__a9}yLl{b zSg4jWEYK@%ul7lA%gj&dV!621yG?)x7(5BRIvFt>_7m~jjiyd$Ip91}BBm)HUwmuv znG{A|j5|z3?;Pv{(;E_-_TFmtB%qn(m%UiyTX?ZB=+ymat0km9=7im-iUAElqO z;n0iuHJ1LVMY0uK#U;V*u}y%5@Z6(1wVHg__*0;bdEo2sr{2(&Up9m-@HvtrLSUf! zWN^O|FS78@;E7X(ZI(P;WX4MVpd95@N5C&9{@8@JJ4rU(GP3a#Yar3=mEuKu&eu}^ z(?CjI-xkZWV6XUbY>XPkfNhY+_Jn=^^3(K5L)~1;$LTSDytoXe@Z>%4=yyvz!b!j! zMY~-KG9?OurV1z79t(yhQio!@XrIZ4nR>60iwLen-g@U0H;D2QmWjNa9=WGJ>Cc0N z^CizZno^z%)X5eTohw6mE%WJ^Hf=NZ9u_0=271e$Bkvh{ z&4>&Hs{;Bjo0*4-aOpfG#p z{5Nv%jKU=t(zLg`YZHpkAPd>C_?i$tts|jWuw-EpRKB->cRSOOT#Lr$OSl4lr&3Kb zwl&?NHNdu#ReQe#2WyK#2CS9?qiF;hNQ}s-S8u79DL~Su8@4>Fm zf1S_m5wT904j#g{Ae(#chV49+%j5Pp0qcwU?SN$0?!fV%+wi?E-=fyF!~mQb18JpT z6y?M)TEhQOz$7nrt>9&W-(56LTJFL>Dd^5|mJzQXgRy~1_}x}?4}{e^xA85~7uAB= z*my#OiFXlxb8FOTBy&=fWLC=dQKP_27WyVW>?x<|uss9Z?ujIO&Q`By0EbCBKT+?b zI`#w9q8jK)LnS{4X2^xfc`Na1yp=7)5H;l;7H`Y;7TnVPshg-x=qg4I<@lx-HjH(x z9+DFz|HuktQI>GrN+dRQN?zm1w2E05UY)TM5^+<{;oJq7^dsSOZBBGwGEv8#>`U!2|lOtH~C^4x&aV4$f-R*s4v z79^FOM(zgoi4zhT{2jBk{xq@t#3L*PQ&sN_;5LOv%A+Rr4I39cQHn7jEnCa~P>zh6 zl@rer)Pl?$9ZAyKKA{8NDZMJE@A)4FfH#OHF`?>nAu6AMlSUb}!JOVR?^ZhPch93V zSmzz5)a`+n-s=BP`UOxvC!bh?a^SDw;12r=C5T8)QV=HHY^T>IPb92i+IAra&2+U@ z&q`F6CTbpuufe-1@-;}EjsjwTOJ6gZA71e5#oYB)I9E!n7*Ws!p^Col{*90lsDR5m zT1heOEIh6r<@E&!zSFXpV`c9HIko}ZP}ea;t|&C0vB7yD_WV3TL?lEV6IURVmnNg^ znR7)->S)FUXobt&KiTr@ZR~ z^)NE2^*S=E#N<$4%XsB;O+RIXo>nNw!aIX&Ju#0W3@lD2FN!Yu=~Iwgk%p}wc?$cx z1V#D>W$)#evTfscYsC-pEoN97K=?rxU zZ~=bjeoewbGTW%yc$5(Hbc1W=h>tgTAyif?OUwQ|C)*2@%!(6 z`e!D-Jk21d^XLwKzfCjCf99+G5(P~3Bj%+Hgr%975U@wS;R0f*92V*IaPFpumr#bz~s+F{Qp!#fy-fOli9U1Ft;Ztp7 zv0`RyP`gNBB)8BcHKtt>(GtyV;_y5& zs{hr?@`l!|03>~;preanl<)8Bc-?Q8w@G=UogN)L&TSPNL*b`H97AVfY1&G3k=yrB z5Bp6TPW>=tSLeSu)%2vZ^*r3<;$hGH6J9fe3PRe(GXtWc>Hde<(B#V)juToPsyisn*o+5keMm!(K+<@M9;0$~9lvWreE1qqi4U4g58!ydwKP@~73pjf6S3 zp^^Zi=ps0gX0JF&)gex^dWj-qUtEL{Wz)XO>F_R>Cgn}YY4E$*^sCQJ{9pc(FB!|6 z73noy-=j`-B7Hc)q=#Mf;p#Dlvmz(!5*WiQ0!-i0Jw^8~D)^Cgf@|}da#9&+gE(or z6ja|t-*?h3sS z>ED89Lb;||l^&%Dg5-LiLNRNqS=ReCWu>Do4E|#fRDxnHJOrC>R7)wW!-tJqq z&|klAgVHz-Y2SI9C6sHqCw5kdyZ^Zp0h1$|3xNe%aFx#Ql=I7;%r%LR90#&3$l1dI zPZ+P(ER=SA;qV*=z;)5*<}TqbRVBzxKj1Usk4qfN`B0A@@Lhi*MII!%-|>P?v-0Xi`F zzB+UNQ%z3w5B`Sq;UR4?*WrES2e%lYp&O85n7^hGGCFUR6n>G)kHKV+{?f#26bkE1hY0=i<569CadqU~LqaD!itsmehckz~_k?Tgd{ry=!7Av>Ql|T?zMS&{|Dlkq939#V z{v;z4y8FQtrmIe)A-unq<%zc^BaQw*nftXI1yypR`kKe(e zHl%*AJE-&1s))qS=%PBm$e~Tn=^-25xek^{4c;}Dm8C{U!Fwu~mRRVf0JKTRbWup& zWXF4zj7c~p*5fE85oCWHTD_UjntP!;4q)l7aw09Be1Wn)3JqKN+yi!g>6}c~O!@~Jgkg&GUMrnG6EoqrwSED}+?_e|NtKaYdk^d4 zC5P^}jCGFZE+j4k9)oNtOenUp!XkRC%Jf90Me3m zl8W_il=2Hv5Rlq$5TH^pD5_&@8a-!dOPOdw_xTDMs5i#KwCw@T0AXxDTj#ys63 z{9!>B3J6EHVq>Sv17qJRSYG|c(MO`Hce2Q8rXSu%8e10mO761vcz8RT;oI7_<)hRw$hlK3bb)-^ovE=Y#4G9m3VJ4Wcl9$%I)Cd71@l9F zT05*^V;WTED}!6dD}gkWSj-HZwUeHx{n;NhssV+FR+vKr0hyzLpYO8V`f+;t?7DKr zVWi<^pQm0z!2a1cqi*~sOk~Oq>H1L@X{{7R7#-F|u{MC2&CYT|?5X3Tq{=ss$~%a5 zANHoYq|7Pe#*A`Sx?#!eFvZMRltbMbw`WR%+869uP=GUI9wDXi2nOFHulF3;lR3*ysV5k>ZHM{zWvFg)nZ5kWWdD0gDcsH zgFg}Wew(6lBi`bjPcqCA#49)||Hs_%&;vl8Kwr5h_^*=usoX>g)+B8|4@6>=8$Y5s z{`@>VGF0$vT_bf5;!M{)QpC`jT!!2z+Sp@T)8~i8Ufa(*;)~(rkiAYec-3)f5nJlr zO}Hv&!x;3zRw;h$RC(KOnQ6*)l{}aP{_bEB+>=;aVf?OYa!N&Oxg+&9tf_m^h3h(= zN_(EG(LX<3i=^`So%Uy(3jgoPYmvND#<>t!F1XZb=1@pK(`@Y|6~mOco(@~ytyR5sNJPIT@6y`4M zv=1>VF0VVFaRgZ6-GJp0fD*+*1dn=MjBd_XeBpt19p-UEGnL;O4aZ5~02XD=gu)4Avn|73+*}z9Z zx4xJ63+G>(!u2|1HD6|D-(1-Ic>k@2uY~5)8f3N>c?Qpy$}crtMR+1rVRI*kxc+~Y zSViRDD~T)1^iz8?PS0-;oLSX}$~{Lp7Kb<~XwbS41CA#A9c2?Qvy`dte_x)58{{-lJ7fX=#zh`0uP7mnq zMH1_aX_RzywaM*w4e=hz%=8|YaAfZs$s7plKa>>4E#5;L)M7-!NnZOh!gai)$#`OG;ukHV7XytmqX}T# z znt) zixYnR00Pza@TZ;y8cZa*aJfW9Pe1S_t4B`yuMmD>iki{Pyz7R&-*-){(=`wdlpfBr zC)OG4;_QG&R^BzcByJ^q1j=8N97xxnMP4~IFIQAEM4+=l+G#a*Fpo{AB3_7(a~Xb9 z8dCPni8_{$i`>#2yCIXub^4kL`d>%~gl_MRKETs`&lC~RwA8+0Ow#(3vqM&&pj{s3 zrFS=`rFToNTj9?(Wpt0@7`j;lVlHiDDGwN0^S?1bX?_(OM_!~Y?JX_7(vbIpOaY`- zV!K?fIT|6{t>C7NXrE)@8&fI(^eH*7&dlf-iIxTPnFPg{iGTh%CJ#wMl=*y(&hO1t`pTEl#Aa03~agG!5Z-z(pXMV;T@w*)fR74q(j(0?04n_?b;~c#qkBEzlK%M*ueCFJxybD>{ zJ0G9%5w{9im?S5#>V9^*5wVWmh>)oog3Rygh74~fb{lSv}JF}ztcqhKQ7G4 z2Nh(9)o(B8MAm;O3Y{R2NAH8XTBl$#`0G62t)H>8S6zdvRur2bC;oSVlpT>%Kl?NO8#^vPsX1K)6syJkKP{ zsqVFRcVs?nMdH=%=D|hEZ}(t*Kv!<&^yR$|+J@nr>^JD%6)zty;`c*+Y->AmMUgr4 z+*Vb#3h? zv85y$XP#tCXd9Su$h?J);3={A!Mm_0^~>%o$}DEf{lC!`lAQm>?5bA-Y3;;5jHtF= zPh~@)nYAyID;_`mITB4xehYG?dH%_UxTnO|Cmkj}Ava>?X5nxt@ z%T!U00)*GMdz>A?ATh(6ir**Bji?2ZJCU4!el@YD4^f@lUn6sC?Mj4_t;^RG%1@eE zcfT%zkM*2%{4#XdwhsIL)*S>smz-K#TDZ@apw&2%Wj+#Y*_9#5db)_yvvpM5Y+GU1 zBh;71d*ZL#xK%!|_+-mC>G85B3*%=wgi*yYrCVeNQxj~)*|l09w{yu6-x@>qmPV8% zPApB?aJ?Z-WGxdKLg=F;;pO+Y+{DDVG7-;@jL;?C_ivM5I%W7c? z+ry^iw9cRU<{?WTmKh=ztqeIL@YO}=KB5~WgWTJjLuigUeTr8a96c+3$A!{mq|=L_ zZ{nnG>c^HGcS&3k&8fW_SWzP$e3xT*iE1yAcx+w*t#K3)5nrj@>5%&HG-@1>_qFlw z9g2bIcI-%l^cyF?rhJU?x8lW@DCqbdNz(jgh3N(UQ=B%B>;EpUjcqBEKr)3I){BE z&n8YBs#3mq`46Sn%jig0lO)NK4UIlEG(^s{wIT!h{$wHj`|c`yJHP~LEc}+3hmVs0s&1f`+_>YA$6!w%|QV7H~ z8+kr1o8;4=uFXkSNXV0@zB`+6(DnIvH2grY)s^J|$AsO*JA*_kOdW+~EyNC|$@nf` zf5hs!1}niWVo$QR_Nrc?wyjUXmR)*W?e#2G{ifzK5d~ZSp`3oD3wtuDIF?14ZRhC? zS5EZ%gqVmty`a*@ki^?kq-pOK%QnW)l_f>ts!CNnlIaQ3ZMp-k#{3r6*QY(Tqo5@J#UrJM;EOldN-Y!VEh4MV|D`6jIxuR(O!DQ+zh(T@ z9ehPo90YM6T_Y6`uytFs)s(qImCCMBAD{eYUjiHqI6YqyhLCL#N?=GX{z)IbZDt^s zZ;<_1`)ekO0*N?4)nC(2Oe$ypE1CS8c@!vwXHT!|Wk%StpY2^m+O%Dy)md*79TS&% zY?5*-E!6Fhx6C*cz%vk}s5&d57)Y&YszNKdS^jnhLn{FV#lzgzAHEOqycZVREAzCp zLibX`u}riwD3R=R%xe%_UVbuz2i2Pp@Pc>Uc%xYN1QV@cfi(8L7Y<@My)_A(z75JQ zn;&F?B7W`GsWWID@BynO^jR8lI_78QBKv16ROalBz`^szdAB)*ZQN^X*{e}M$7!+> zP((KMr;wfuXF5{Hht3M8yXA<*TxyCG+`o0s=i$fZf`BazJfOE(mIaYwspLfK4>`e# ziuc3f-+F1v_ev@qmTxQT8h?tJzBT5OF)p=`>}9IO`D6d*5HTBRYhLuZ(ZRDv>pPXS zsT2w5Q%&22K{)NprK8);@VDlxx9#2NyThCAVwv~Hw+;voB-)C(l^1=QI?$F8W!5(zhx5nrhw;?2UN;SFP-c3SoC!TA3cKduAFci~bdHL$WJfml4~*gZ{(=U%UI^ zrlT=8S!rcYpKdktEdnhiC?co{yD_T#kS75C^hie%_a6$dh%#}l{wa~Hu`y9K^J+j$ zcb!j)IIt!|iaydM(h^@dIU(ShwKIqnjteV#SnJ>7A^5lKMEZ~x_c6r9Y=q<2vhF}I zfPQnrg?-a!rPT*xPqAu z(&vETIFtF}q!Fos6ZwBM0Ba zXkp^Ds;(@IFb1V1Mn|CRv-0*;6;I62Fp0>$0k-6c4M04eUSL4&@3*4~;m-~1byxo5JQ zJkNbyryR-3l{)!fm`#~P`*DR84T(&leci7D`^*pzLyM*_$RhS zIo!K`!Dp_wRsDK@mEwFdv&73_cTz|ANFuqlEs*EP0!vK7(DJ>b+(=bt!0RyK+4)v5n28pl?!|fUtSE9s-enf1a%A?5nrN*=%viear8D6JB{ZWTn$RSvC z2pg6NdcXGuC7xL)tvT#Xi+-vGd}Xm(Mm%Ik!jGz#R=iv;`{wa)vuz?K)o$I0>q!03 z35QNb1G#)fj*9zU=sFrsjQ3H=Y^w#mPW zCh$`>jjAfEBw?iGXd1294x0nnZJlA7b5|P0eYKmh*fs|DRnZU{W9}jQGl4&;3#v6T zBC<5n?d5~ePlKCI7lrQ%1B&y17KY^;Y4U#~yPeA$f1n2JEp^w~F zh07+3>Ngwb7LnU#)OvimY`9#5YNpJ}`zO_9x&ri&)zjS(KoI?V(rC2#m(S#wY= z9Nf+w^=Y>gx_;Aab$+He^T@KPq54iz$=g*B#rkWPJe*W*0wrj53(bY+IQ#4fQ}F;Hy_iR+q;Qt)tvhAt+57tv#@ z=5P&LmIv|b^D4@7C$Sr{?KNuFIIoDMhc`;$>H4w$Ftl;ek*@;5Kd|YGv+UZRQVd8o zRXT>OQ@M+&3};^`kF2a61VvPz;A#NJ!~pyjKXSEJBRrKN{d}4e_BQQn2G)n~KYzNb zosv50DL5AiZ)lmAJLg|2#XLz55Ic&vnOX#>x6D1iW$Ub(OM;MQj+44e9gXq2;jHju zr|sG#k#4>C?0SslU4`viKWoB}Cxec9?7dOz`+WHvDkgJAz1?l2+>a#C*Zc>1dIi)! zM{RZof1ekL{)Z;dFb-!yAmdTaVBpBeKLQyYvxZx-y?SY;|8bG?Db14-z z3A%HQ0caMvgbA2k>JK_dD`5DU_Ah8KfNl<^Yf@=r8ooFsq0X3Z9aDS+;xcNe2Q4Y^ zEjXN#ZL_1xNvYga7YDpTddi)zLAB862(;DaGg<8t60qN_w*|#v>!WS0Huld&0od4l z^LJ51x;-epWb@XZkc4LrFk!|73a66rHNrtGUWTnsR&U)0- z%ErAndJfZIEXa#^#9cO)n~!*hHi6RpNQ}+YzPOVO@aWq75r2OyS6%I}u(AgZp zTJU^L2Go(5;YRySy+Yszf8z+xZQzxX)WWEr`h0r-GhTN~_;FI=m?B-IGl*M(W{Ptt z!d&Td4!(T7m4b&i$pY%<(QXpry0hCGbid5pmPKF!O?Weh2z8 z4>T--gzuYTrcaeDON>Y3NxAtg1C zMK^!qsFAsv)r?2O!Kt(?hUtQ@;2)OXb;9!{3ew&RsyPOup!ypdN z<88rH^!OghvWKYhhLAk8_kT20UZ&Ms`U_8qq-UuatyZ(%$7;m9Xzg( zf~GQ7Zm`to^ebpZ@+-J13vAThrAB>Ud?Wjpd9H!mXYtx(v^8Q?Bf=w#T3#l}Z($3B z2i@p&*c_>Po<+R8OLBV6NGw&GcCU9M*yYWA-8VV-(W!)L1cM(~9F*W`vpzVupSrN$ zCb4RM;6paxT9xVP&Jt;JD&ozF;eh{YSZs*k1BlmaE^o$9Z>RTEv zgtbhxL`EM8mTJnz^b{dBQ>WNXw$k1^q=+4DkgO3{L+#UB7XICkR>g`Su!_G`RxLMW z(k9w`=5K$u?2_As%K8WB@4%m>8|EItj#hz13oD|Tka!2nHK+F9!sj8*&4}vH2;T3F zc&e9r!alz}=8enpRtC;bof|CPxeh7O!n3^6H!^N0cr4l)A6~Un1a-t-#VIMQ9V{IT z`e?_{!?P+b_D;@h$^qF~G7XQ;atNTlvW0TKQ31M+6B>3<#HB!~yaBGG5i$SIpuhj2 zWx$J{r-dnepaUmg)ohGSO+`gdCcMX`Um(a}W&H)q!&85mEwc-~42vJ;7f!Ti(iA9J zLDG_?C~Gx(T60eGLRE8zLUZ-Vg~Np1KR@RTem##4CSve;D(DGVGq7T{juugHa@Y_G>wo6jAtgD+bZ+HJgB z7Bk{?RqwNH|MXR9sp|u($UBm^hCBnvXSjq6S-{+TDh=)tD{0DU8z#5>Z(W=QY9@RP zqKl+ca~2k+1eP^unXKafBuvEq**i)*E|;58X>yq!;A~^{0>z@NqcShNnoV10ucd^I zPOIoL|Bc0{j6ms&TH6B`*f$!>3DW=&M%sq$?aL)H*Ugu^g|1(pX-wKncFuSDwA`Jl zMrT;mBOOHWTXnbpLu>!kfl+ce&$4kEU%G5+8W}#g)3}u2w?ENN9zAs%AAU4Tv~SmC z2v$uIh##RI;V!M_Va=LJSG>OhC=cm5lXq8-KE-GVj>#>TQ)pPUs$Q{{tWXj<;!eXDQ&UYl9;F<)v<^GM3!r*B@jwbg})c!#sl674%F zZGqg8IQy#LTP9D_Z&05u5grH}Bm_%zdTS{7WU6 zE@7S#I-6O|d!HDBLeFmU5ELUyi+I`lrj2VNUygO&r+`ReSlMx<&*U_Y|1}-LjPI$X z3l+kgHGSfOqSSIDpX?Lg^GL%MmFkA{v4yxVmMt)%g@B)FhmJI23LO%voNIHFR=A`V ztmVbyXHSNgYmxW~*Z41~(Knpq&@w7HoamVr6P>Pt)KUu)Q8(ykI$NSNVXY`cR zSWZCn{CAbBdj{p-KHi(|lXW1mOEL&?kv$u9{}iI|qx6J%E+0NeJDVvIU9`b^#*-EG zKv=g$xi_Dm2-f9Gi;J+Ut_<*{o4&_Qjyk8q7hxN)>g;ujVNk{c@rndO`ZMZlr|alaP~)`57H5q^2}2DOVJ} zJ)ffUfH#q`)HO7teEj@*Q-OV_=lM+AWTxCp8a7yqZ2ssk$4mc8-Pt5mFGtLsc= zlkx^~2}mYDdfYjdd5Zw~Nd1j(=UTCvncNv30&JE2eu*OhRRRRL721~QW~T}8oTqUU zPu|QN!F611)lnC>G&CezD|-yx?YWD&yhGQvrKg_?xEQ7B*m$qZrL!D3`!-D(w&~5<+2Dl#qM-ek^mpKt z+NRWX?M?RagY#xHQom@~M9tCD`qf2#O&f^o7>zbR*2M>*`)JqZivs$z{jN7r`F5P| z$G-)*B+$fjUB!7_;wN!Fm)VtG+M6k5*)se2+h;80r$sCbgrq^rpo9%0QpPL!$KJ4E zfS%XDs5fnb%7m|OgiciKTVe;@AVlBt_~m3>4iQIRoX;h&@|Lq|9DQFy+s4{Ob%;uC zPZId0>fm0gD6{ZCG^=Ht$mXc@yecF8mL94XUA6_40K?nQ>A%9>nx6Ks`kvbz5-c!i zop)pb&aaO>AtK>}|L`1n>5Y%=Pv{<8L7aJJG~sb4pV)U+tJCW+>_BwJe zkCE~<)HN%}CD`5N@%`S;C-ZQN*8w)-;poi#m0J0IGwLH4E?XEYJ6ovWR?}knCGMj& zCJ;DVD>+F&2|W1*$O|F!&>+$IHBCR{4#p>>9A5S>19XZXX>syEc7i>%_>?C;o;My8 z?O-KbSOC&)r-Gz;LN65|)Ydqz_A1eaPutSjs^^ylAnxu(yo^3vhs!r~E!Pv&dZ1pH zW^u37Z{gc2uf#y3UHM@G>RJT5gaf|9FynHEj_?Fs18HahJDpvRV0NreXB0Edk?84) z*IGg}ayH;Ca%>auARlK;$3sDRDWCC-3BRI68R6gE;8%!cq^L=tnrx?zSH`mG{Y>z4 z-68o)qVbS_BYfD=D`<~mk4IxynTlpCdQF`_Hw{_wW&X#B$fCv~QR``uFz%vK1iy5E zWExBeaD3xca(4vSyOk^$-k}P9 zoZXT0Sb0r`;xqQ$ASe=dPMTL@yX(`Q#sCNa2A8Fun;>PFa#Zh-#%o3ZLK zWP8LKk$x11Qu1$MGn3PaFZlmc=X6;wTb(P7_K(K#wU!vA2nBBcKB_BkjU5d*AMj#& zGGs$acsj*Cl92Zqfx60wKLz$n(p08tkwBOj2LH_Y(4p+Kpjqs9Itrv{|F4fOwedTQ zy=ZP(SmD)!+0=84&mF#2->c>6l&&jzsgYbr3eyK_6~PKL7po{H&{uvZuWKRt5WA=L zD)0@lY7=6mtDh6v4n7%D^0^?*A9JtW7i|Pcjnm1c&DM|Ct2)P};-Y--N)ME^!uRb- z7mvfapR=+BlP=){1bDq0sO!c-+;ZnZu#Es^lVv=NN@lY2_C`K6@xd~Qt)oS8`uP%` z|04n1_-|{VD6QM|NW#R<4SnX-+<#~tgczVKl)QYl9SjY4+f2wcyckt*ih0@AEqB7k z_TClh^LUSJ^c7CuB%m@gDG^XA83wYjNR+EacMf7E{M~L8K_S2didkv!KbEwxAgX81 zg6Q$5g%~h6m%+&}7Ou~yQN#fs9lFi!E{etmeTuq0-+@FR9e%p^q+ISimOBHqwSk@`Wua`XvD_ptEBj%B@83 zfe{yr^|c3;`lG}ejo*g^K!T4N$Sv-o#*%|tBctvGR?Ag~Oix1R7>lE;34bZ>lt0eR z-KOw?ZZb(JSN|=4)4m$O>w;JZ=fsYv#2A4LxR7lU$I#W5ho~ZPQZax9`lz34f~+3U zTMPWUwDKA>nLa$n;GhNiT_UzsBXpLH{rq~rf73engt;zl$Zm9dV&NiE75#rG#(n!sNyhNBIDj>yMxMI4Cg9sF!`!cA`n_ z*u|f9rs1ArTfmc+Qf-L7J1@yN6z$H(bl_QxOs9&AHwhE?{EoduW+CR+l^AoYnDN8g zTeB&N+NWec%6s?niF^{l@Tvi`QJ<*2l4^tV*dR%^4Q_gW?k|mAMcLzNfDykLt5-5z zS||*&>cOLQH)NXoZSr)*Kc2O>A4b1B2_SJ%Y!hvyfcKURiFCe2MYJ%>8zSNaK2ZsJ zO>8eUUO3q`rJ9Pd%Z`C0mli+pr+4ZBcga43WhiM@kBK5~Jfr2mb|+8tllZF%SLyu>bc%Z-Bem%9+}%CwggW>u69vdFoLjZ;H|0&Tjju@GDS#H;j!_b$k1tQ>WV6wn zAPq#JqU!Wm_t{E!T6L7wNsNjPfok8*L6*xQutPt?xw97W#PJTRc4ULWoQl3q5*|XJ zPe|{oLwb&;xgCGug{WFJkH0E_*TNnbe@HF%mx+v`&o2isKAKTk%_L9GxH{WzBap*RV{EUD6WqP{h2&}t5LpC*>P;Zf%_;%Cwp&DU@mrk z56{R4~cO~E{kH!V9bi>R@^ z0nZoM#ihsCl`fvfx8ExoaGngd)Mm(UMyF4!>?K>$tT_3#5z#&8{&+H4=R)hPb+9Vx zx6@zR)3xK6py@2i#_w+Kc{~}MIMe)?x?5(ib8Zci+aQk=@!r~0AXoKQ1Usz&Dk|3B zL#NknN#dTjX^*&vqm^pDrRn8mj{=M7v0+=^WFO2$d(onz5QB1?zOndVY0{JdYGBxv znfVZzb<(qP560hP`wT?PJD4=p@|YFV9F3;$LE}5e0%1hLPsK9f$K}19Clpu^2%5oz z-zdzdAxu})B$MHPYt^OseiWDVZsktc?2)m7yVLn}GV< zT%lk!{=Ka4NmErEvrY*OMJUaG{L@o`+1AVAlxnzW-ZM81|TEs=U`P8Jc-JyT&x;IQ}!D0`uA5$`?f#`*)#g4z&L$l`4< zDB>l1<%S52iw)Hp*=w~LpV~^T`iSCgVUH5>yaZekLmh9YSx$&bNy?B3u(JAOZ zGkAI&znt2N0d%$~{Kn(~W;|8~LuXp;fu)*g3kxJ^xlTTv1DONWf^y z@lE@1{1B_vo5>u@po|y(Sg7lVq_M+esCHjN<)q&otI5@`*sw-!*@J201uZ9*)CG;H zKj^Y1>`9aBQsfnfBF1`t+IA8+2kWhkxNt16Da(tWTtvn4GT~WsCp>>oq(R9RbRO|R zMrps_KV_{S%dsazMX3&SBvm1+Z)^IEN0c9TkjLe&2+mz5w+Jg(UuaTOS++VnxcNJ; zV4OqO8rZF*=XZo@lay?=`%}JK=v)`8!kYS}y9n_VtitJZBz(i=!Jl!e%HqbbELO>}-^mYc9(L_B{ehiIoJaAQ(=$R~?4b|CYu z8N-HjF~p6?1o!!qy%F=v3qq2A)?{mbxa`lQ)hMm`XgpBBv>WPI{aq*{`_AggZaNys zW=E@;5WVduM>jY#A+D~IGx9pS6TVorh$WXf2K|zj&s{OT^LyiiRdb-~vAg3jFH)%? zu^8j2NCao1Vn++7A-cyRvp)(RqHB;@;S(3V<@;x*_2QOH+uz0R0F^}#eBB)>DNR~~ z&{_fl-iaoeDO_5G%bUU5bms1>_2}|RP zSXe!tLBY565%VD+Ykjb9>U{B(#*xL$$;k~ zfhZyec!4pS$(up-xDvtg%H9^Gg9Lr~UsBWyV5*YQSmQCUUBkF?hUygF`!rGBtyO`5M?S@=n$kX zRbLM}(Q}_~uad)08}8)#ge@!{)&9++{MNCrSC8UBYX@!V|JICf%M_)p*W=e(DN%Ui zA4z^#p42Xd6YoUa;SMQB|Big}ef1GVwS_i|S&5qy{C1^0B3uGV=z1(sgkrtDm9fFn z0<(=v2X04A(I*fHcJd1}#a9^FgC$c6)^ zww^hql%6{SZ@z#E`n=Mpny{QIR>V_gRA=hC63(gy+}NijtxLU9Hl;!`j}-r!n2oZ$ z`R)_DV*;YKhnvn+>;z$_J9FK`E&qsw`TLaU9#ru)?&6|$IU?4W& zlz5`3FIztwIK4_ErdJQuU9^q_q$tv|x{BR-XREBU~P3 zaH64{U}*v!7)*%aXJh%3&;2u1+k7itW%_}*AOtVQS#UexVmk&kV|o4sP8gH|3C!J#3k6RTj7J*lpH#*2 zV^-efH)3^5CAQnwNTzXkk^cTJ?r)P9Axjrcs*`4epS>{^7W+%m#L5Ba#@C$ATQoi4 zZ%{@iOZU<{w&&~>9nD97%?;t@)%7YR&fwy``A+HXN>QA*-sT2npA0fJK*b*t3aa`d z-c`?x|M=fQ+W&JV$g)Q#Z_c@*xHY`@J_9iatWvXO?#AcZlBl0+q56I~KQacs$q4w- z)z(B)$t%Y$_{$~l>X>*Nf_r~*KDH6_O^rg!}2egAk~_@_n%87m#P2Tl01KhSE< zG*z9pQ{{!9T-{}L05<7^z#CJGlrWP<`*+PdWm@>0XE%`$rJu@E za&wco8?okjsKzI6zHvQ$km7taVMXXTiuI>omFp~l>QS})r1~z_uN$2@ef17QFH^XIzqle2s@a3xCB7S0dAntJ#yT`?yAH)f9b3|5HZ?>}S zXIEb$xag_;O>KpF^GquEOqIT-;E5OAIF*$D6^X?x81hSem@=?J zS7Ci~&OrCb1ao(!u?4~dC?U#bm|i>;H;l4m&7o5Uthd;bu7ie%t1hOwifeyvZg(je ztq#zM919<@;;--1Rw_d#U^M!lb1EcC((mheZ(!>%+H~OUgTm0@u9(A{S_U9 zZ@OzNQMkT8lw|5^YT^FEuJi3FysxNtyF(AvgewdE_CxtkjYQo*UX2(gZPrWw;G#v7 zgZcO+V<=q*Q536oj=s(@HVQaJ@bVJLt{$rgPPnf8F+Az~Zg`9R;U9F%JTNn`FW@!I zT|*kMqIjv*+0h_8BO#cmz&c(sk=4R1kgYziU(98)lh~N*mQTyM8__v^!mPmEpp4@_ zXSJ zOS}h8rGOe7>fF7KpP@xub@BC2Z%ti?|3gc5Kgw?KOb(zjPicAJyR^7NZAAn|pP9QT zTIVG{u!nE06%O!(u5p?nSr|Nb&Y+#%?&WiZR`{UQl{e0%9%mQQ$0$5}hnLUlo-yh* zq1qBZFDm$N`_FG}9KM%wXy1zFq`7R8#V3Z6SVeYkSfl3!8(BvgBs_esWRje^aFfz| zj05sZZAE-M3P~^Iuy5R?Ei0-b%!IeHQm5?o14%?e^#=Z~*wQo2ZOuX|0~Wrx-Sqs~ z9L5Ze>ehbWA8~s=TRI={8@}vyT|QT|82m703Tvb>^Hp!^t`8Jm+`!0X!N#8TC^B8R z`$?8K*8jq5QmIg;f03;#B-aRh6E)$8DW|{uIC1JfVURuG<0hQatR-sVE7mn70FhzY z#tq!+>$p?Au%)4Iu(m0df|`AZ^!{V{g)+)xvnwEMQ@W)aqsqQ(n*EWDChgrWKZC%C zm^0652P2DgUgs!mh+4R|RHdNbWkP@=iiCz!d944X-{<%>vb1b$NvSpwK4nV{sfP83 z){B4J+12*&0D8Cmx8+LpN?6Q7fQJ3Cku0z?E39|39hT>nXwcad-;ur|qwO`r^|9cK zUyrC{_U~t*{bw5SaKzrv(^H|5Yf&LOEN^NyiODU zt~z~lk+-qZ$fS+N=|`1(WEN$yxJKu2x^4oVqP~j@8CtBzOio6e6ac8yICt!4v^D0{ zXc8@dQpuF|*EBnU!Ya|W>BZl8^2>gv7(h^(&Y-AQ?yBCkSmf8B`fwzS! zC=yR&gfVO&`K4%xv;(g)1Dl-~;%1=*c(czJD(0-AKbn96V~MN>pn-Hi-8p$DK}fcF zETnL!LU*}B_(E;ZtghuV8|GGC+jJVi^WV)A&n8g%$hrbK{ZfCAYRw+ z2_eQ1dZrwZSEBA;A-cB*RS@@RmuKJT<Iy57?dRY2@HZK5d`z+rRp%AQj-iF)Ma=O3d4)j4HAJrhdI1Qmwg%1jHPu!CSt z(LM4L4O@bj<4K271R0NV1qUf7l5I9!unq~Dz7foMn2IBJkHIRvOlLEVi@zYtgcl zl;q^5-3z1K2)g{+(;gmz?n3rRh|2}u7qYw7skG03=^uJ(O!nIXa_tfOFWvR%k$z)2 zB^K*jzLqK(9+L1v=|r~X0X)rf|D0auf{<^XZ{PRczmvp>RXt66o;(#TjM(JR`B&kP z@PhIlm)?&5Os6SLVwj~RLS-|$d8i79mkw&XR~eq9_E4-(E6L>O^>~Iv)-wD`_#o6L zTX&F)nLv-FQvJI19Mf3Wzi7#zx!sbnL9RxtrP}E!U-0)_0ILFxX47HQo8x1Cw2^9> zwmKN(3z&Isz169Q%lUY3wYriDh)=$^_cT!9Pb;avV z=I~>OyCg)#Y_<|725fucv$bsR zEjGwoH%?I1l>Hy_!P5)2e9L1uyAgB|cT4pd7m5toKJy_!%{o<)Rx)rY%+o_g!!7vM zMI4xmR8HLJ6k)+02JM);7b=(5doQ)DTens#oTr7H?`B~sGMP6np&DgASeT>e8?Lhd zOI$-koiQd+*ik}cx(Y>8d~l%cYs$l;Wnj>L+jIU#d%sl3*y6;k2^}<-?B+FE6n)YL zh*FxeF=NKg*wiR!1iT@4t9ASRs=6O}6nf-}+Rg01^>q5rPL23)+#oo0b80y^9vf8`CFb^r)jdh9r6hAD8iqOUvh1h34(A)uI(?=GDf6npDuJzT6qS1uS<_Bem4v z()1#Wkk29{6w%g}G(jg5zIRvzbm{P91_GnOK{1Eh|Imch)0E;Cy|Q&{VGhSkZ5(!P zDyi@Bx3pj#z>AfH8iS+|(ks zNdw&paP?Ry==k14a%~7l_x} z%AZ6Zyi~71--2OB={F-*Ynk~45nnu7=|n< zqyKrg8ep+nThT>iciZHw)wGJ0o;pBR^ef zrkft0R`LN1Qv$8d$9gWj`c1X?Uez=+6Pcgu4hqXIsP)N_!#JlecLspm(3H}!N*0!Ws|F;h(?E2 zi~^k)C~|Tr*vFuLyPV(uck=cBp6?DvJWSTCoYod80`J9+wzHR-m0-Mrbi{|xA4vbw z#InuRctS9FyOhbU2e5B_!Y~O=aB@)+X;zoeQ|na$+)oMRz;9_0zG)UAQQ|86{^qq@ zMi#(kL_Qq?`XEBVQIHuM`sHJ0sF92F*l=K9C1sTDEBEEj{wx{Q{Qy>^n#OrR9oI4Y zgCS=f)x37E+%vuC)Xr6f6dP7yg^`KYTkc|~I=UkUs^?25>7tG#)~)d-DGKszz%sOb z&Av+eHEZu8&fXmyWo@gSje(2TCds!(@B?AHwuo4|1Mz@gn>gueR9$npUp!RyxH{rq z)1>T(veWti8v};35f9~-5Jzqq?xFT`T`dqxB4HX>VD`~ns&lu~xoBzaFgZ~r*x7A_ zsX5$-Gelx)AFxY6JSG(z(fEgJQSC^--Fa_{V*K%%g_in(XVr7Mk=x=yOJ%lE!0%s# z+DHD}NXpl}cdzzfRjwc!gRC^);XCZZYMJ?jLH6;9oul)*4Y{F3;@6&jpWxsfUgmDL<3UKQou5-`nM9;B_NhSL9S&kxl5=doMU3v*|; zX{Y&W%cF2>l9diwwF0{`Lxl8po7ZE$r70_ib)| z>N28#Pw+2Q1UDviYRo)%(~(eRV?tPLquHdqv{=pSYl0RxPHoTfKT(Dt)C6ly^-gL5 zN`1A1t(Pat5Kg@lnqB5KGjwxu+}*%!KO>ebz#Lt6-20tzJqT6Aa^AJ3dG5;U(^j|* zZ|0n@$8l|a?OLn2C!z1Tjy}_IwCPX_*_0Bs0~Dy`FPh0Y)5dZgT~5*Rqp@g9pKbK;$?3@wJ^AsdgCYW^dS8#dICZ* z0IkofGOOh<(@x7@)wZ>@#mgtw`HxH1xIR~GUEh|8gP;W1CUgt|o#hyIv~bN&49Oee z0~Wjgp?z{fC2M=VQj0B?KQYfu)v~4Z1~AT^2#I`fc6W((#%%wCZHQi)CZlr+EW}W$b5l?%&uIUTi#syBB?af8j=V5pni7#$aFl4^4jrl_&URVJn;zVQ2$r2nc5Vz1^r` z>lYcc<7Lg4>Pmmt3V5W+^uUs;5AC_1ziBT~EB12KZT}u5NnWS?Gb*}Q1*;==z?`oh z>A6wG(xq&gZIjx5d{uzNk|(Y|A5sBFc~5 zHFrTd@lay(&qoFuopuZ^Ih-u#td{E6ElA$#5r4AfHjK_~3Hj_3%-0w9-~We&6}e&P z;6~Yz`DJ_FPo;{4--x`gPxP)Ja6=Aif3Ke%EzQ^llf+;vEUI&RGB)}W;+UuYo16KE z{AC<=l~=ViadCKLk`22>YuWG2(n+|8Bw&3)_qLCm&s^jNzuwAere6}b-jZxl1=Ava zP(~N2|5WL|Yb(Aocfr=)OOZbm2@vLS?%ma6mAYRi=;3w^KA-+ zGY>g=_gh`~%)NX3QaU2lA>eg*ojy_Xs{j}1ENgDiBk73wLfqNx{dm5HOaI3&TyN4l zuC3uZIT5T;{q5lNEeAPL-TFce1uv9V5aIw3fM$^~|ME*mv|vC872I z(9TnBMU2gXLvR%V@I~D5xJL(^GP>2luZHg|?VmJnOPGPDBbC`xrn{J>&B(d}UQ<84 z>*SuqCDJ1=+2RePbF?(rofs$uQapF4=@Lfa7~TD?^A1v6mkV4+NaU9;qeB8*69zVF zV|}j022RVjm1_yt6OP&eSxTr?T^9-^a>fIJoH+Qomk31qOD|;7g<4tjOJ<0;qdVVi zwws z%rya-T5M*!iZyq995>=FD5vw{bYxk=lWZqI0QsR3j}Jf7DcZASMG5TD^!|>h-;UYa zrLKfM<8$J%6kyFH;@2e#cA}S4N$L#m>uc|5mNuw64;z5+uiNVMa?A(RI}gwBy|g^lpPWs<$?yzX z;x4^cGfBMlwZxrg2){Z34z3dYn1Rr%srge&c<;d0W9j{#zcvk;UJ#+PT9>0QcGg}$ z@mLYiJ#|EEum6(6#%bBg*0c?uzj{dbs$%N+q0AP@&8qa$s11TWpD-|CbYVYc=p{wk zESbQIJ5pk&eR#9@@rFFIT!Fi>qjaZ1W#=SWBlYeBZGic;n%oR8q_IW6;aA08y~$8# zcf7vtfoZ~bVVBjef7P0BNnrlIr;f=Xby8#IK)#ETV31L$a|Zofb_p^}Jy|VUjJI<2 zVZ{1DG>&3OAj815T36+vO~6LGn7s2u=MI6mK1tuS7<6}Oavm!x^NztsjckOS=Zfh? z@^EtTWf6WRnmooIkJq&BH`Ufpc@4vjGQSu#oET%Ir06nuWQXjAPW2RG$lu%c9hz=@ zjgi*c%6jQ{{QTB8(&EZw-5X=QJA@B*toAtJDnpB^dihCW#A^9U1r>vf!S3yT!(3x; zSo)-a`c97?eZCd7Wy3T3ean|Mj&yaaT{WeM6XepI8*-iin?Qd*YyuYsKNDs0Uo7t}Ho7WvKKRFDuUUbV1`u*e1;xJ5og;|Og zb%pZy-2>Jqi*pYH$)u@!^A<+v<|<+7BN}xI9dzx|2drCo@cE`(gHMO$fYiC4)*36> zCDh88xuUGJ5mz#==~iiBldca*yB)WxJ-vtiFMTL}*8hk0YBxLkZo3mu)jWXe1w~D9 z|ECx9f8>l*RyBTp@lXRw#;9PeyhK&isn3#tP3ztRu2nOw50QS@+}vf?AorV_YUVEu zadMdMSY6XBENPeBbdU6~M|Ja4C?qt;n=5}i4%MwKQ&QdMRo?#}nj?n=e<9dmYwhoT zh-TE?P-m>%?DljQ!Jsdd#Ckh$tBckWnC2DPCte*=g=-vA{!w7yyA{p8?ILn@+e@rN zYFiPqaC_G((YD*oJ>sl8%t!Xzl)*kc1FQaE&>DXt&06z=;RQ0{`Cl+rE@g|hlrmM7 z(&l^i4R|or93@IkyN?VaWVE%go5L1g6?`AEAg-18K4DUWZ1l9-c!2Oj#AnVIzcZz| zuhi4w6F7rB!#C~ADKlu7#YzjV7FB_kF7@+5qFaH#=ov22Mi<6`(%szNg`H==v?3qX z+xT&Qn1%F>D!#DXD!rdqtVL*{y7oIIJ`pK6I$IV3zbQL8XFTisY9qT{r7AZU4h+)# z=QdBWc9||aT`fd|xrSU_=6{P>F4oPPAA;tF@}^;=K%_!mMGizHJ`B4^a@EdrC@ndu z2)U=6;N?zr&H9s)xuI8)O7e4dr8gcl=JZsO0XuA*sDkLd^LzFHxe3Q!MA|W1L$k4d z=5D@2I&(*y-;v4RO~2Ou1=ou%W1mKUi?-`y9s`ei|3mWyugx1AuzeMsqD7MYaLWfc zL$qs}1XUOIp|m#_xn8~JERa3NPi6K>!~FSf!1F6|cautK^f`O706`FY`lwN?kpJ)C z@4<~+vwzw&s`d};jE_U4Frm_VF)7)E%*cwZxif+qppfn~CCH&ilLe*l-ly%8TSAnR zImDyuHIm7{oZrk2bHVtUF!nn7`l{Mx`bv%a#R#`OWM&nUmXl!iKCM5r1)JoLs%TWN zi{1&!7#LTm!yUDTh2-q-ZL?`^khQX>`o^;BYKDg@Rc)fcQF^H;_)aMqVCgF2gtBp# z$o($~8vXxq#-2(>NsD?%L;3FT=XN2#^apoiFh9~&F!;h zwjPw_K^|3lquA&NesD81woSY3AJdR`bu6CpOQiuwWLZ=Y$1Lxc1=rUm?jxF zQ4ZeH&J0OZe%Z6q%(0fWas<`u@Q&Xf751wb>SA7U{;7C@BFR$SR_AtG%qN{)e``Tg z{-TMk)nSLK>i<$`e59+C7c1O@-nep0>_lKLFy;5=R%U_e(!UHB?W3)DV54~`-WrG{ zmbkJw^*S?NS{s`o#1DYrKBL$~)l1IvBmCRs@6<2T9@_dPWQMv3kt1y5^z4X=Wc$qx zN6@#))(Ja3-LEcfxmlZR6z_-y?}GW!gHJ$t-Syc&uQV)r{tBI@fW2!O-T3<|e^^k- z#9;4$lBwN?nq8fV=8U(#ZS4F~M3KD z!QVzT()rUyJ1W5ku=<2spYkbPIA2A$2(c`-O?6HvzT0jw2S~54G%`fhAw$0^mKR}A zoU7{g@E;mdDF=44QQH}@A$YK%F(bgD=us*eVsME4Hh)f1-_h5*kfzdDc-rAamQ$$Vz-joP62%42iTi{0+ z5(2d&Uo}+(w_#)z9osF*N;Y#hB@eBvu2XWc^NEm*F0L#oxd;>Qsg~H%K~SRFbY&x8 znD}apc%U5=fTg8#2I4kags>cPRJ#*S<*-tO$~1MvbLHZ^VCIN%3!$8Q0s-jpZBV02(ban_c##+0l>f zrX*2OknLGr&$L!Oq|t*?C0|O9alA#sJhAmNQmD7M|5fyJ?B)_c>x5>cVK^sw-n*u3 ziNZ26G3tdFLz1U>>eP4MN$=;W#Q)F~(l(@-k?o((v-?4~reI(nisKzZw>VPO%$qE_ z*b!Ult8YP}aOo-O)l?4f;Ft9F%Eo>qs5}a=U9(%W1{bzx_}^fJ(Eoq5y;V?~fB5YS zg+dE0DNtNnyg0>OifeICTbw{}2wtGLLxJL@c##x$m*DR1E(sbS@H_d>oU1)&&p8+S zT;w9}WG0zR@_ip!>$4)n@Q`9#+^3qQ$Hu*r{`F%QRNhlcg@%h*B=2g1{pEf4VdoL^ zlyPaKnZ6tbb{?-gf1NKBJm21ZqIK&F@K9>mPslk@_a17c5qiPU_Sp}0VN(h8^XO<& z{1i7yl4=Wo3$I+RLei$_1qj(ofgWVy7IK9~>A7`k?9kHr?x3Zpo!xkgqLZtGCn0;D z_G_>~GJh&h(#hu04VA4VOHlg{h;r4sYonYB13trA{SAf6yRa$TGhp?N3+O zKeL=Ziw7Bd(s{z+8xYM9TzSMIHCAOGfz!;5A25BN7FPKsXKGy|&bDG{g*RLZ)=1YQ z49$T*7g(Hep8Xu7(=2_hFQwdJt+~Yg8JW4o%KxacH>bm>BR+?a)?(GpBp37^+Z#BI zx>s1M*>-GgCqr0pwqC5RERAD+N^hVr+IBsSFBvB}1lByCxiyX}78oaL%lP|1hKoud@EMK5XHJa-$S0 z4~UFSse~&+VcEiwjQzV>I8<>i=JMR9hz%4X@2L0*?JT4$l{!7%6x^^ihVJEV8&3~? zq}1MvWwz4!*r^-O@fUwPKFD~*xG}zGy4h|HuDA3 ziLuV^KG{-%`WnPa)g(e0GkJ}@Lb8&6!_4gd542exE zKN7#Adh~|cJr;0O)a6FP#u|D0UI(}ERk{qGn)80NeMSaSS1~EQz>uMp`Un(|usrjf zoTU2$#Cie-KM{))-!SbX1V&L#$+S3gnA&bw?i6J}43yG*0M3NFeswBIh)Uch7bAni z?-sTt3EVbCM6);q-((!*S-BwJSC)0A^4U|8SklrfjlhzVxT@Pic(0B#k%Ww?+IQ>k zXmQ!Vm|^KF4a~}p&xq&sEx!+!9P4x6dTEJxJ+==w66JnuF)sC*vK_s^k2+jyLCX0 zonj(vstvbWj+W-%HeEBd0cN2m`n>2ig?RS5KQ0`bd9*X+P*I_22w!afcSr<-w&~M4 za!RUS3^~k4Nv!nqnaKDJg~U?QWR1kDLrpQok=zuYP?D`Z3PCJ^crLD_v|M0oA#=T? z{hTBoBw3XyFHGzJ1~JJUm}l|ctT530#>M{-5pmr7G3o*57lJY5RaDQ4!5(D%RrURN z=4)-Oi^Phk#eSmf4tg19Srhah###*JH)No?PU2TEpjP#X zWJ3!715iz+AG*(wjAiR!y6UFL?Xj<6iY*>t~bK3yG@n_tK^wA7-iA)M-6 zEbqZ@-A;6CFU}phU?{f5-msGr>7hw55oogAqFV zaC>Kg-H;gvCD6(0F|wiROmPXO(bc1om1Sb`!aq^>-Ov6Pq1ylMIUsi?nYjdm?t-uh zm+pGDY$txXzzztHvn|#&j31XuAdtJu#Nmyby{=X$W3J?J_FzvQe{>f>z)q(@U)}zq zB%}2Mxz&6RNjC=>UU=>&4s12VJZ1~Aqjw&(-mGh|Zp5$jZkiI8v4zV=`^g%;cme{< zqi+XNqK5&T%Mfi?9}YLJxU1dYCcgZZvw#gUjO`=#?8!e3?XwORGnJ|Aia$AG*{dt3 zXOb}K0eMgw)eP}D2{J0xpF^`0zrC^f7zPx`7|0(%2XqTNY67oK#=8QU+~UIb1h#WT z|4mkSu;xz|M?pU0W_+`tAE(BlC;E75KKsB}^)x-xFPO^)xw~SD*-;Jl7H%6sX zS9(K#gD$GHR0)$Xpv3T3fJzXjlb4gD^YfOW3QF0DH-sv84%w!Xu3}st&Cx#d%J_|S zLgXIOaCynd_>gp3>7Ojw?&BT!t=E#M58h=PzSissf87kURYaWdAk|^+=JVmj61!8Z zc)v|x+D@02w{_QbWy-LC$Z}n48-a+M&QFGb+XkS{#c-d#jtL}0E24Y&{n*h_XK(@K zP~6I0X&Vr{nMHu^KG16bi_WF7CYsfo%)k7%212O~RFu-R+rA_oSbx7OYN~{5AgMN3 z;#K$#?rXd!G;Md#_dHUzac9<*<@3a*4t6tABF5&I)&Ey2^Ey?wh>}9|Z5t z&{673!khK$5wxSoI7ihfG=KzBsFeH0^|r$b_cn0t{0eG}5U3Sgqny)c?LMzh|3$F> zb^i*=g8WmX3NP-FB?mJ(CRmy*cYVa%y;qY(k6>^Af@C^A_J@ddY2d&~r|JMzn^XxBG*R0ZX)y-nmFd-cOzCiOyThW4NCwmH_{@+O;G!=UQKQ zNTixgy8A-kfJlw4eky>52UA~Id`?2kW&-N&g|?6Bg4V0JL;b`yV}YBG9r3MRB_eU(hM*nU8H~ zrkN(Wy(H)46CX-S%3-dSJndAU*3gTMVrU@Bm5PEMTIi6b4FI71({)H2bo)MT@gK(b zZFH?r0`7323-#os00&yH3a)W%`~CY{8BoZ662FLh^9w$H%DWjIQ8eY~K2Bz*5~4jl zf?vB&uS`c>N{^VKgy$kz=Ni`}5a-_|Um%Uw2utm~l)VCXep7kT{40ASin%9pgRchQ ziofYZ8VPjdseM^yTYCFyJS-}XU)t}HfY%Gjd zUboPh@nw@KRGca(ItBXii|f_3Nx%si_u!0&0?O%4#T zNBo#;7Ye(VNdTbSG9J<5#NJ$ZEX4hA>xhSzDZ%IyXBQPN$5i|pz-qtk3!32?6^JjH z(qcYiJYE?HzR_Dp@B#7WVj@sdnOP$3`bMi?lW!bD=7`in!~T? z5xLTD-GKTKryFv(es)oRM&IaJv5)j6qq1M^xF6sHfVq$NdZ86eS6o=LMTU~$(<)< zgU_iMIdq^^7G4@#0kC5~u@*Yfflq@a2hmfsAa!-ADyJTS|1i?nd#;CsDz7}|V`X5Grnfe0-ieH!B?$*KA`hPC8y4`5Z`?(;9x4tHSMo2=v3+xio&)#QT zC@8Z0(0{#w!KyfNKhRA1w zH?jerSBTvBo)}%-y?;{%Z;&od^lsj}uu+T9WC;S^$`SZ1CIeQPHE}o;ig% z_DJzX)h18te)P5=I^Yc?1O_B(e}8ZDxkm$}L2)~N3Y-d0cT8|_`jRvRneB^L|B z+%UlWjbfZ>6@V_A4O61ik?pughe=YU*uOlZ{%R7G43r(g5Qc5*a_hY!!odiBvDa$2 zwNLKKummyG@H?MDjUmsSXo~yr`)0u6Eud&7J;*d8*7C8rl=r6Nv;OswX#o-A0}Ebd z!k+E*DySE7+ar&TV$FnUX_Q(`$8F5=KocWLlOzSctO5s@K}}$#{^_S(cPV?zEf?=w z?Yf$1%gz4yi@;evS!@9C?RPtI6-;zUMd<`G1pxhH;#ifu6jC-8=A{L;bE1;bAe*93 z2@5^shT4KdB{u?lfmB}@Iw{ZHZfq(xnRhC`O`)3z>{vCQ*xtOA$d`A%cnft73~xDp z#1QBFDHVvS8F={D714QoRSDBU(4^*X`b((O1%SqN%;w`ax~ z+C5Sjq)ng`V=x88N0(diPw!EJVbiMVI`VC_{wtv-@1nktVz@8(T(}u)m1>jZ55ydG z6Bpg3--8Nc^IWD{)?Z{HJz-f-CkD7h1d4@T?L^oRp8*~;Ackbo#O?pBkNDs97yn{n5u7hk?(SMQhH zu}bs`lgc})moUYG64g-w_EV~Z?^c#RLweeplg591;l)?B|DEEyaKDuCzQZRz^CkS` zUqYKb#Ia51QHYtW{85VumtDVxk4{#+XFMZ$2!A}p)3>nSp?^KpwBXHaC-J)*e7YSeiWu^Im%z^RER)f3{FB`6R#sl}&uoM#b zexFS{FmjFg;iF^38jr)5S5E@BmZY4oycq=GY5fN_$$e{lCXW5qO=6zcqjoxHo|BRW_uQ{GV0(VAM#h?U!ZF_TS^Ohh5YA*-(pILiCZjw7*afrH~uq zp>c`PFD$Sl`X*oqGiB|BCi{tO=8{9K*ZUP#ukn$okkbqbqsT;~U+MYd`97Wk*P)qo zA9xhuaUCkxRp=7Uve128=yk-+Ets@wzg=`#9wBbS@I-hZj4mKn<_nJpv2$oT$h7dw zT)_QGh8x1m11Qj_I9QpExKrwqvonyU!Q<%MA?@C`i&@RJ|8vzm_Lo^*&lr;nR7`2v zkh1raO~%Ud@*y1Qvo*GK=6!Zr)YcHp#(=}jN|U0>C9)oqtC9z@UK-8)F_vy?HDgtm zbkFWv7HU|b8^g0wqDo{Mr}zz21-}jAzB+DU6W}xi_7t1c)g^Jf!z;sRa?Aa7ilGz! zovZc%y>~RuSOOl_kAn6G39gd_yXY%@f-y-lio@F~Ttw#UZ|KpffM}NH8>E-U4Ch{3 zEshXjKg~y+)9z1n++{)n61m;}q}?wP!A?KrIFj>UeqS)Hau(j8fkg$ce{O>N-Oy4@ zam;JQ4b8Eg?Kfp9EHfsQu){c0Tzx#RD;4`YXyb$bAh0R>Vw5FX6Pc1^-o4*r!wR@% z{KC2v_{N^}`E2glc0Sv-g^E;bYRQ!p5$LAjUj9UXo>vXbx%0`=C0Hdv1O*yy=UrNY z!HcD%_D@`YKr8}l8Iu)TnE{0RIbsNNnS$ewFg|&Z^V+9lD&bd3jPbiM1|`VEC8yve z_Lq#`v*r7dPR~o}KHf?Mr0hLFX7oy+|HgKeyLJC|)W*jJ+OpD$l&3P&8Y+K(;F<^t znh>Hl7~C(tpI-vjY9!qfA9l?dd}9_t+ay_b%|ioj=TV@2sZjH0)2((k6%{jH#7DfU zuLPYxJ!!Xy4rz|aP*q2VGFpQ7qb^EYR<0I{;ej{#$Z$A|LhH0RRasAw@tPV-7M0VpBy?YU>5M&j}YDw=TM+7DK?D1Q(fKinQ?O# zHKi8vyPwc7Dntv(zFFHbyET1MXVPUAKp)2Np-hu1{6lYIs7$R@bzpQHyQ9*?b^LPraEgC=2PrWD-A|Eg_s5c66~{shRCKGsRu?Vtg?3?}Aw ziJG9zwhzp~-4sY04%Z8k6AfJ2;C2YKkn;%(!gaw~Sl^lfc}c)XCd^T|15EeaHQ3o~ z8ZUHBL{UxCBOZ6lFSu{8JssVMC63;)3=#0TG;&KpD(HEiFj|VEsQWJ%yw#s7cfU$y zdO$ne$=^4_i^E<`DzZmzGK{2}jCQb|v?^Xhe>{;c+T8>ac_{IFn?I;V?wZ(*CNy$= zN0sYdL0eisbV3YzR9&B>g$PrKly9VaS;!Y}J2p)9xsfH%>hZEVv1NZj(wrl!;5X7- z`xurR`UL168DJ8222xjGiJGQ$tJh_f07%3E1aSL?UwTMAJMx_9c{L^cIXV)Lo+`}n zAAJl#Al^lrP)~De+GYod-8fBsnRBY(UqVByI9P9DvuJVgF$nlsmtpMD0FSNHPE-a>=-V5P3HTB)yJp2Ml@U zX2qA;TtNQ?;3MU<;j8@}g=^;Nm5epfRx3^&C(Etf4B7!VD`%^5*PZGQ&mcbDw2BDk z-)524-=dS${Uz0bSSee(`mIo_yvw^n4r`0B7&e7@pWIg_GPrKkhx+`_nm-?FH$vejwlfWgKYo z!?sMtq;TcI?M4+&gamAI_++nqqZ$Q13feGWf5JWMLh%J|=ppD}bP>2)QoR)xhU?9X zg}f%gKA&2-B-;WhAEIx{5i7vg?Qd3$7djTf*Uu^a%UuvvE|*_?S)t=n_z+E9L{XbX zft}~5i!THZr z>q+Yi!#|lD#+Sl&fokUEZoQwo`ep76OE-30*@e2Ei0a@5Kls~lu=T^HNMf@5_h>Y? zyvr^HU;E)$ML|Y%kKGRs{40TBhNj|n*GFzk^U?gHM7DosxZhPJIov6WeK&oE$#6-R z{RN1eR?O6X8d2B4@>Bi{rrKkn=(F~dt!>WiP1JPyBiMw0*g)#=SI0qHtlz+MyR%a~ zYJ9qt#=W^HV=0PVzF>ioP>r|QZc*B6-2B;w&CHxiiU0}oSh#+Ea+ERME0laq+}=$e zgJG(I_iYWckI1p9n3>6v#`>ZD6ID$yun*rpilzE~p5b&!qwq1PfIcGSa*mYFg)jDsIq;|S6pS`ic? zjFaiy&o#a%6LCB7m{v{J|5`UUcEY1S@4m?oVJY<|Cn7PiwMVJ67p?eXxqdlRPi$P(^s&knbJ+fEuD-kRUn zWqG1i6?E2-Wt6T(cZ>ICMU@!naaW30JK2{dno=w*C(Zsw38DJuUIA~vERmE_JhVO4 zts4B_29I)lJk~$o|NnT1KS#FA3ByooV5uw7JI$NjxvN!%Zc1&S0&|jgp;AIofMd3Q z6;NM^+#F;?{vSqUO21_0@eW|Qh+PLg7vpb^7)#BFj{butaRwzgOMEnu1;1U%UkE1= zVO)f}n&k`Yduidk!259dTj`>_)1nCougHx=%SPh|p^2L7=rL6ne9Q@K@ay;V)c<7PuBN|*>uuBV~4T;j;Z8BF)scYtYW-T+Lgn`pu@|bXz zH&eGNYq)(e>(HGbY6CgEn;%;fK}*7HOr#b_!l~Qr!pJri4(<>K?PM92$BJZ$vdTS2p(4TjJR?z=z`8AMu zS0J>-3p837BY8W|gmCLK4haAKA4Z|M$ujyFaA8Vdb8>#|p(1`VD#oc9CABGyj8eQP zZV&!sart_mZm7KiG!QI6$-H!alby>JA&gVD)k^~nf)g`EB2w9oZeQjnpJ zZQy6ryIGEFvloL_ZX_eN%c|X*--QnoO|+wn?*7PY7;zcVJn!g%15h!d2=prQwvzd^ zCn%Tr$cL$LtjWd8mWdSyO3%5wok|746}J$d|JT{cI_jMUQ~U>iigYY3%1Aczu6~AS z=|%OAIZsw+?UHraU;mrE4wyB);N>U#;GP}B4S-CmBJkAqTKHDSYvi%wOgW0V zUMPU|X&~J*?I(wH5u?KZI@r=J4eY%$ujv7w@0}-mb~ZE*jCBMjJ^C#Vi;!%6cs4L( z-M@?1r9{pE6`08(qi)KV)Z6o}gk-&KvLbMjoA>*?1#$ATp-wadnlJT6)aNdeVSUpm z_nYJvK5RI5iJAXcXxGrrl55yd@2F4i#J%;vktPHnUVaA1z*uv|Fb9-EsbjbZi75PV*<7=5uV@V43o5mz^gVJhX}bb)Hf5++BI&m&?*2&&@BLE@ z^TWCrnj2c*%z0NI0VPOv0AO~`uD)j5X&MI0`;_n z*-d{hk|VM<1B?x*Jm8+&@^ji$>WZ38QO96LuFjZO&dDH=eu1@R#d8z5=^~&7tzw%J4E^gbu37+u zDt?I{+fO%0olnFveY=Y6i5CjHmRWKLmq8i>KO%Dk`*UfB+1IG%X@t;&fgv)O91 z?o4+4YbNbiMQZUgKH=H3M;;}V{b@(9Ch;-}FQ{QaE0z2gT&e5H=JK!lroV#Joo8bF zLmieaWfZL=6CIqA)buu^jXeA8?@S?af-k*D=F0tlR znl|%6Tsn=G%_@1At|?*9D2I1?7Ico@m6!~*112bm-ElM0Dcx0E1>rPBM-pincUU(( zaP`OiUJy%T1LP#zI(DI+uS*8DneoU040|GOnm(bQ`R1L(41CYhn)a=c`b}O{j?eTB z(Y}rkMRV00Yy7rTRBamzx;0r`%1agYz}U2o{LcHc3pb~AI||XJ3KOK1&#BLNydIq$ zD|JZBESY?-8>=}SN=>UN0Rr80*Lh#Xl6!DWpB~@VzY1uC{z4~Rvh;I(F;mzw33*HV zErd61cVK%NmoCMJq{_p2DpVAtQ0c7GqtmP4mRX|#o6UXYXZ#*vGU)5^SmZ1!tye=bnar#;1B{{uyaN@qCB$91Y zD$-zb6%sY%D62H@U^~zEf&NCz`2#el9S6z1Sy{$axcT_b;oLHQh_5zghfRbY%tFIH zNt1F}7xHCeV;`ri5oUjKzv`j6$kuMY`bx4)W_;;_3%pN^0Bj0{NwPdfKM_etq35?2 zt2^-m30x=O1BHNtaxnlt1hCOdSeFu-69rb5Pqg4<{PAjAJh{(Dt(dtHN{uu=?#(C) zXR6z|AzV^rAC;&nNx)IV5PBy1pr;KLOraPp@qAzLf_*lIIM)R?rdD-f3nHLuN2r^)H6`JC$^C7Sy~T(sN2FV8IM%f{LK;BAuhMH`jphbIC!+*Co8^ zjCZ4hj^#VIkBd&dbM#2I$^}Ry<;yp=Wu?r;JLRx&Weogy^>hb|3XgJ0%FoRuu8$VP z6h_k$biFzJ6XNWCsm-A$`VC$mtO$Q_jO1ffEdj9N)NRza)k*y|I7Qi!yDcel?|(DC zQBWMg5ux4|7$4ot_V!Sa|$gcQGt_P@FI)e3~R9Pe$R)I8*d`r940HLNWfmYT2=EL&|$lNR|zq zNF|L^?Xc=#VjUw#S<>&zTs4E=kg+ADx@d>fVNF*N@mC_}=5qe zXyM~!5omUWlkGS-tuwx%!@`ItFzh}nI;q;8qemh}72T?-`VkO}>Aq<3@w?vDB}zoo#Ga zXUr>-U47U6YDFtab9D`$?ay)28?Hm79U0pXib zrkTqB91ekR#;{afK)N!h{hp~h={#rw%9o>rR%vlbhH_G z`3grs9PX?PBd@fP6HL9Y3ppaJP30YKw#3hZ7NNr#UE>ANaT{!|E5$C(iDSl`r{jtu zqyFp<@9l&AT_1z7Kif56#d%dgq~f9OW}3b9$bdCfb@BIGe4)|~Zdp$PC%|gmbOb>` zluTcfcwlSY!57QrwgyFJHm1V+TKU?0sqz8Njk_Akf3pFC=o)Z>Y_D+JUbr208=E;SLma~Yn|lSR*|02GYdx&1ASGvAgx zZ6u(KIj~fT?6LIb!z=VK4sI9}94Pwu;xV(8;deuK3x4UGDt0FIvKrV7Pe{F|J1;5I=lpj9~lQr%+&4JW@OC%-I+>>42-?R z@K`mgjVAWfXf$F_)XDF69(wT~h8YWTzJ8r)Uf{|m9_;H|KT9Wp5;Q_#iW?ZrXQ&#} z0alhw9)F1`GgiL{Q(7Jv;@$(Twtn0`Wzd9o{j-|QvH7RuHI7})n-Ink67sz;f~G3Q zp#MLNI-x!%Vn4~oNzPWO(rjLv)(#`QPq7I#u_1f77zX(8@S7xLY&l8?9vWA?6&<}S zQYWmfwD<G=>4YW>w%<7Y!l6Nsrldi;y;o#Xay~D9BpffS}?PlzgI}5PxY7M zEhvVFy?KRz9h+(PbiC5UjdWjCJ-H9aeV$)7kh*Q>wJ_xT?7L5#W}COyDGNeKcS0QK z@zy}dRdz~|QZ|i~h<-7-`A=YNu4Bv*V|ARhc*!Z8`X4KIK-hP?gX; z+0INV6}F6akyw@3X1xA!Z+R)tAifg;1jFe)yHGWznn3~d=Ew%a=?celRcV_jwjolA z70uTTg2c5FU+Y0E{6 zqJ#khyzG_|4BdF`E8j4?wEjS-ThY46`PQv!e`Mf1=jGdTqQj-w>#$$V)B()Fd+hm~ zWh*rahlx#edmCOYXue_;TPGR z+WC#8VZLAHsJN&SYbL>0yi#A&wA!~ZQGlNoqU=gYk!4%6N}lUXvb>%_2O5YfT`MPr4P4GUk?cj(lRL=;lU zUmE2o2R?`$$p4bhm%}G(*K->H)V|%8c0FF%OE$Aio&v#uVO!zK(3s#1D zz}I`q07Q_C`}tGj*owZCUayXJV5;82M3RW`>zK=6=hu#X4?@O;)x8;gUHFbpI4HM= zbo{(W7jyT20(LFR+3-G{5-9PmSjXbDqB{48ATN%I0n_(=R~78+`vhs)pJ`Gx3cuzn zs}@Ycg}iu6jznU}ThK?t;4Sp;HQ;-*=-`Ky{4DbA5NI5FgI% z=;7BM=Sl2kMqd3x8~lX7x|1a2+%%6o9DNVyjEa5fXp92J?>YKODg8_+sn|SI_w6_; z)>{ZVLOpU`JZ4|<&%0kYO*s|~s})*m=?*YbY+P?#odVGw(VmZXQkEuef6Y!wRV@-@ zPK^9I-Hu-NIofq#JMdSyuIs8R92SNl&YuwpCT-xD`nY^@uF*J+osW&vmcoQsY?@^p zdHOKL{;VqdTJign=lB-|(U}13_E~YOuO%R#ndw8%SJ;B^<^9obZWnz6j1AKhI|jdz z<6VMl?`CRG)u&VsPU4uRd;F>^-4aB>xR+)1o>~X`UOu~5a{dL}oNZBr)r%x8`X))F!P+0Slq7l*9EST zr_7DsWZ*+^;Wu0ff-}+CehD@TG(6{Xb+u6S zilSd!3U)klCPtaY9#^D@Kf*}Qtxk4lXTw9lTw$*$CGJB(jLRb{)w{(0Ewp1TYF}Ju zYgMZI*ug2oVWlaKF_<~=S5R_yyvn+jo~JX0H8~4)uF4k5X_FbD_Y||YWdh;YOH!s> z)1l6)#CcJ{#wr4}tIDpz93;06El2|72Pv$hHJ&o0d9!d0<2R4K40PQ(1k~ zjAJN+>k1m!Z7XH4hkBozdWXlK7n zLumsW)Tz|!;hj@F^1>XlAwk#W3+?ahD06BvtO}}E#txwEtdTJ|6cpfWc2dn3$Y4;5 zBgEJ^+uk$xRBL5KI!;Kd>bKQ69M7QI{zsj&j6?m_(xa1QVa}w-`c|j= zjB-;$@Cq%IZ$#*y!-J(i?tiE)`_-*a%(wZy zM*qP!G)a((Y8~}C>pl0C`NVQ0-LDJEN|^wkXDof^LkEky>Bh9EL$Vs=fHEjrv>EEA zW@B)tUVg&e|1;x*g3|NsNhRvbTU?dDw6pqAMe3T?hwW}xx9V6}QD-PV-hxk3OHPk3 z<^jb#OO2K5JrtCmyhZLZ(V2w;s|IeVRFpGlxwGN_Q&PbHfoqtX24A@HE6|7I(?l-% zEurY1AMEtDZxf1h_+gTwu(>gbktWPSgyj-i!G)H^MW)up-@j1vzK^=2yV8+NZxB~22yzb#Ix!U6BwBh0%VX!DYRGijbm4U*_}0lJ_qSZ<3`(^f6LVG0iZ zj)$DSDVRC~w{vLT=rb1nw953HQeZz7BY$Cf+vgYkpkh4ijgZp|CjHEAH$=vP^OAhj zNoxrAdt2-fc9N073F?_z)0pqK4&^}WY?Wzcq;j$8nkmfDiKh0$I0MG-q)s0fCZPqTW#_%AY6Qe7RanU>6zEO*xfOyd z6G1Sw51evmFQq)xAHw_q4pqf4Lx=g)i>!1eo|-?=y?!}_R=+}i#eCZMvrDtM(NS02 zy-o~i-&bm$bf24H2)@*@6C8;C_fj`W=6$PTw-i9!2F+SRhxc|%SKsnh67jhU==>k=$yOKeB~#a+Ko=s zX5>41S<-!jw7IbOf%E0#O31*|HJer;+k-MVSU4)N_+$&Rf2z#pM6+s1?Om04`p|q~ zX1vO25${mO=FWL>gQkA{;rNOmts!}0ids9jtZMkF8}km^G6&MNeOXD>O^3TPXH~Cy z%>H0|mQ6&Kj#q~B1#`^*!C-g`p44Zc$2Mqm3bi=kS!momXjGRFl6cr8Nc1j8i6i<` z@C?m*%4N&mB%M1{4b?}G?Z7Ihv*rs{WVQq+9Zy@|q)iqWc+Qh0*f$t8+FtzraU`2W z<-&s0U=Nw_WBKbx+cH;qD&A(GHFfqSh2wO~)mpJZce!gE!*ae3`Tjwt1wjfeS*s4T zTRG5Aqm}KqAmsH$fAlQEwf2g+Qi{cbt)z#O_@r22b@Nl@hFi1Lr?=6E9_MdHJqXG` z_@d>`NADtB@vY@qg0eO+7x1o{en&xQ+47CPIqN0%%g~0kX3EdE%Kf#warK_p6i*Dx z99CpUvxJz}USN5tbR))Ewy9S6R3&gv4Q}^7#dKwV-_kNA`$nQMiKc2QHW51h`w(cFw_7eX^wuFA;THl)t6+|p`H6<~ceJ{n2c#*k@B-hNtBE_p_qC^>oDLQ4 zr}k7PkRrC%6HZKj)NtVeuP#4p>Sm?4mN=CT8PK3_*V=OpRH{Zpvuodtq$g-3zHALko{Yt8`GcZu>%#C-g2C7fGr!VWaO`TNM zp%aY4*3AC>GIWT+kY4`&3ueyeGye;SdJDgv)(j*l6Te*fg<3W-d>W?hT=~iy+)|(P zF)J!~((f(*GC9tl3@SNl&uKY-_{~Ow1e5XuE))O7dn=q@6!e|CUjV1EY4}_r&QH1IJB&cSxpO)T3iTo#I0@ zGvDzdVu5gsy@qS+i4$h{jPIam$QhcnjzxXzj>@u(5d(o_NZyy(E{`i|4#fJT{ zsWzo3Ou0U$VHGRJCa#VwN|MJ6?Q5C-O-8s_RBsVx$H3snD=D-sZUf%TK=>UEtw_so;`&G`%{HSh0>xIPr!t{O&a_XJ= z<|-0ie%-%fEen?x3OSTDu@WSaOR~O~Mn2(@wWEAJrwu-_b#>^QC&xHPo{pzW153LM z$yg8c_~}EcNj#u1yD}l%(!dMRLY2RoC_}C(>+{Gy>SwU=+V$wh7R+fe;|`+wUL zkscW6dQtrAZ_Mf&juAfZOT|L>sU8K5X-~e2D3{nxs+=yCICt`?#bx6v-DY&a!f_;z zwD5iwk(B6UOH0%oPL7>6tFBe{*jqpa#MDP(CWm|W`UQ$fU^gcZ46{rpJotRc%KLwDY|uyQf%}UShetqQfPr_go@X&Va?AmG&tv%o@1Ho~!mP;p zR1>ExkQkyexAuk8!|}r$zp|s_mQ|B39;Ox3zg`RBPIP=HDAi{)#vs+;r5lK6CF$Kp z{N++3i!x02EMAu6?P^X;74KH5ipzAND&r!Jn;xxNTvK`Mm_?r?Z%9vC>fDskn)$G} zwq~?a&&j6`6md#V$irkksZIVVE|2Kff>enDv!_+f5%dEWXa?8K7zAbKXR!HbqBG~< zbX8VnV)w2-XZC59N^1CB%$X_Sz~cH`(*s?ICna-B;gP37TDw)bm6c+ne+^BLB1I>) ztEih9JeELr=UTY<18P*>)=vlVVUp{b)p0T6KMb{I#<+C>?;jbJAvPuI#7Ef8&U%WB z_Xg!C*&lLcFpeY+8E9n?2ZT-la*g)hwXkRF@7>VY6My7Qc-Oy@vj`<4bOJF<=c5GN zj?Nc#VEO?RNZ)dGm#-zJGEDc$Oy#uS`tiOCQOCHM*C412>*fQfL23GxeUif;QWEj1 z|6!BRU%hYldCWFG>*>55U{w7Tdh~88vc*@8MR}OE_m3axxhK`@|OZ+u$&B#J!RO1?Y1~qP2dO=-~oGx4I*pSTb#DOXK-$xlg z@xC(hJ9KqzPsBtaGGiqL9}g}D)p$h)NUpfMKOv-gRdex7M;*U{HdpC%BYWrI912Dh ziJJJsw7ATFqy8StYcoS@Zd^S8)3Jg)6)lYWSl9@&@vx2^V!DUX|1k0>H?Q{YbbaPs zHp{b_#Sxc6Pd`A-mHQlm0%(wZ=fwX?DEvS5905XmlF`Nfe;B}vYczme=w=^b1cwFJ zhQ@L8fm+hv>ttd68q+)mny!`6s2Yu<{=-m>FDAKgI_)SdXr>E=GEeW!IF?`Iq#AA? zk=d}&AaSFXh<<*BfIsC^{7+NhUT~5`$U!x$sBe9IH`~BdYww(^nTZ0`A?qp+%s6~>Kyicg*d?MO1s2w4&5X9l)gDjTD`(2fb6)8LIxXXt?MM1 zll)4vQvYCY2KP@g?C)v!#E-Q{JVu`cz_w^)NJ12EEM_im=USJy_8JP2(|wmf+k4kT zeRc9@&-L_VafSPQ8crOE8lpT%WN89MU>{s1?+x;Uz#69}a?zwo`o_7k!&?-Ab=+I+ z2#SeUL@B`wChSgX=#*Tsno}U>(*#>7BpOz=suoODWkEIEr3S48sKH%;pN~Z!*U~EN z)%~~l|4nav_=^5wjgr5>M({~s#R8YPutBK?KS$pkV00(?q@LimFJjZ*HmpAX-pN93Isc&p z!0#`##i3)HY--mW)jK~0mUQQHa*X4F(Py{C;TCch|3GP_HFH+%=o>6)W@}fE;n;FO_^8irSdCOzEwn+Iv#+^hxEaXve92W<+#t_SC}(e|8~@b$ z$i1d6V{z-_z(}4~%!b=ib708&%L=Y!gR0p*(VzMwL5yKetK~6(Um;D)Fv;sFyQjBs zy~3Dg2cL=)H)-hxZtCiYY(pO5#jzJO$NPC{LnNj09YM#J62`y!w6m3&z>e*Tz*0L> zT6)A-@|KwtFz8)-n-bBOCLbGIr#DCS^Yvsxt}>4q7S%e{ zBJXXacqL43zta_Z7oLWPwd(j6+xrwpftQV@cD+aDJTE$Wi@7Kfr>u<|x;N01G=4_+Ezpkoj9opeP zw&t$z#XdC#FX8`R?Y(DE6XE~v9R&rYgY+s@x->zmihzLh-ldliklu+%?*al+1eFpx zQbX^(_h6_AC3J|i00E!;&UyFD|37nP&Us!uGw1E@&b>Q3yZ7GT?_SsEDmQSFRC)a1 z&Erj8gD!lxT_X@~;>M~v{I1M(h21~WH%?I(`Ul908RRTwN(x+fc!9o*t@btx3V4_k zz}XT(E6IqY3Pp{IlAu0s+=kT^60Sry8l73-`OEKGNVl}2eJX!HlUap^!{Q9&JL}hU&ouhNh8;KXA8f$e zF14Flp>x8FZ)fV;UyQi^>XoRhPtrbr5T1bIX>bp=JkghbguY8Dv9ippe*t2;yr(Gh z{%At8dk8;GC8~a3m~PPTHZv5)3xwhZi&c+TigW z{(^wFj%*+_%2fy|$|q6w>YEjEIs2xJM9?lf$nbWWv*$WcXZ}Lom`7 z%jOt|j*++}}AyNkPJ~$;{y>&Syi(Vz4!M<@Lh2FEq z|9i!mK_Cx=;(hAEcC^dw&lEOg8hJPai!3#~_bH*@MF|IH=$>m263}m~)?mdr14*+2 zAeOsOcOR0zNv`=e^gTM_G3mT6R5t3u%b-EgfMd9M|Biz8-E|=;02;M18YaW{0B}za zQ|a|%O&Xt4g{W4n$Nt{$fW?>YKPt$G{Z}X7O|wbg_8HRZy|dLu335+8yjaS$BiC|s z0W(Ody#}jI^V^nW(-6>Df+TNY z>eml{F#v-kW2-9bl|QNQDrUU@+Xwaoz_?E8RKk(e6K#2{QG#+6sW{o7KUC{MU#WoS zv6t|(UT1SsO=QsH^J-$}4vuU&&12PihWCD^mXzvgR7CO1!D)%#Yv%IWJdEyGc1`E2 zW9;%kq81!lLC>M_AJJkf7N38py#UwJQ3h`LBRirDo@!{Nb2YRjlZrzOW>N0g3Edk+ zW&-2{?o4Hl@m$mVyf$P)xm-RF=J9>;ta87TYPaM0jjW_;;fp+)c#5q;I6R)T%jYi! zXWk3pFT_B|(|SPnCNt&c+jNCIni&j;A&Z}tf;XynuR)oy^=m|n{+|0PQ3DutzY+^- zu5cQIMX#O@X<=7}#-=*u8ub|3mLi4bE7&PL05E2q+rkb(5M{5{Ovv9;|R?045F#S2P!1*QqU#$k8Y*=5;I9YGa z-ifL6D*K#6HbKCFK~9g{Xh(x zHeKucE;RZsYNXe2;m~b9vVT+1X^X4*u^$`!-ea?qUCRjuZ}f}O(Y*lwZ~DDZjdz#% zQTY_-?zH{|rnASDJ-tANp^6$;iqxZ4v9#7mf(Bn{oENx$lB^HcbLn?rHpv`wwY&dg z1D2_Si94D6q(Dj47b@UC2ICD1aOZ?hjZzV|P5lG#WV~aheTn5SL~okH5+y(qPiLzH z-0J^uszRKg%B@wP5mCqJD_aNo@B4X`gz6L{w~LGLB=*9O*tI8BK7rAF!lae)7XJV) zZ$6N1WdL$th~A?cLbkbB#lRh-Wu2c-*{12&%v)0yH5B|BL`6Mac4rgD%k^Pz=jdb5 zKt-H^fZ9pE3lgncNnEy+13#+X1Q#Tb9H>^)&jsIe3_{)t5ykYighXbT6k26C6ESUG zr>Yhyi*p366sV@NH$ zrItHpg@eD(C?DDJLle$=9ezu6e$G}&Y#gZ&&=JTUr+m;;WlX-o+=U-15i0ztk;7c$ zwXg-Xo9_O>Ugy&kW)nu1pNc|Y_(j=Px714Gx2u{mQ_ksjq;L#xfq(YW>)Kf%i9}7~ zY{#UPl(%XRl}%#k*(eDb^qMhQ6m#B$wzCdF8Xpehwu+P%dygOLdZi?UxC~*uN`x01 z2z{gu8>Yo!w36JcB6gxeD?ccubZ|j-v{-&s#0#2e1847Y6G{)fo?=Dz?|spG_uSr9 z(9WkPR>%0sGh#AgLn?@zMJcL}aKN1~qts>KHA!BnEJ*-QF2woua?<<(E9Iwfb3@0+ z3iWQ6jz6wiV2PH&FJ_L<)#DN65!uQ@Wh(R%2phpeJ6vE&R8@$~4Trz&8?P(7 zZC~T5uc=ic=w5it6*;Rp zVQ1R?K`1dMdUNbJlrwwZsK>NDDw?In!)ba^hP?ts$JNb$6{(Q!b?IfIRHo%{zb$qp zv%1}z40&^N`8A4Do?>bG5-!T*fIVm^@R%m26a&|k)W9{q*R{cEjVEAG3MJHfP` zyazLHbz-^NTKyGS5f8=Eu3-z8pK!12zQXwpkJXRrubpm!?0c8Jmh>&qMoACjJFZ=y>M|8G< zdNZjy>1iUu7FFz5>+cG_kUvgv=t#JYKGWgeLS?4*>5$nvb!DFJR z&(Ea36vnb;QdpR4747?(>icPJYvJn*>{g|3w`0R^))xitVl<01R848SRt4aDvPuw) z*7{*yc}a8BjEvdGu`*Q@8?oQM)wh}8=b62~o_Zd;xGby4_jDdIW;)S#KGDiw#oM9&5@0ex*Fen>*5|`Q&yk%B-nt`64NBq?nbysBWT;DT%n}her?%%(HqWSnar;{DNPl9bIaALM0;)|@I5dPU zD0Ql=p=j|B1(Vb^Sl{ps_K-2}tXbdCl=@J2{3L~ZWEcBjBa*w7T*^UzR)s6I8=$Gr zbl69}lzr35HHtOClAz_F(Z`72b+d;@M-SR2ZyKy5fs{j<8>gspZw~6Vk0%2LJ}#>L zxzsL`j~+bs(3PV_faB`-E4?hHw_B+8sDNpzpqSBZcE~na0_bAgSCW+w)p{}+UJvUq z-kd)CRoiA~m9Yni<4oS^e{x5ic{11qUkyhSSK>lqOtr?i@JpbYL5~OvE32yG_@{JiPa=t17t{daV`Z6L2=%0Rxwfbgj9JliHpV z4jH;5=ypWHENG)-g;}G2WT@gIXf-#ZTiU+_&)^aOb^fTRAv-vCi4Z}8R((QHcv6-S zXUFuR{acf$m7-VSsf+hWw}>Wrt2`btUhga zX3s{hUU1*X{}5O35x&Q4Mg)7>vfUC|`o^_ik)C|KC!HJ}>;t;^F5_i6 zNVIBhQaARcKxna-7a*i|4)`MXz~fE?OREoul`}Zw4eSMPVifHW1&efd{w(MWoEBNIX+mUzAG(V=`L57womZ7bS6j#;ujF@Gg8h}P93Uu&Wj#L=(2gkcf%>su)3tyQ^~eY9#KNhmT$DZQ}2 zZ|twEW2j{hJ6et=7Gl?p_`d8HLJ~rtde=84AdbpBe7JxgF``VgZY$x)v`+TpteXCW zY;XmLbdLkgzCAHGIf;Ka1mBuRArt5o_cz20DOVkxIE$NIM2RrR_K6(npE9Iw=~({kgd_$ogP#aAXpt|P zcV$v2k~c3qh9L}=oABN6@bfy_ft&mB$&dUe^;=EWYd|L4Py3faC`!7`I_hqMgb%P0 z2bW(3N5%OmXBdJ<2A7-JN0Sf*hhutYc{cPD!{L%e7s*yTpBGMDB@>}GuP%49uklRL z@+pN6C9~5j8)1v9c0a6Za#@4DtiA#98|stJQx=CEP>ip3)-O>FfmTVC zXPx)`!wq3R%Bb-qdG#< zFe!W6fc4BHI!THwE#B=N=Tl}+$>b`y($xPe1MBm;o06_vHi?^cAO&wA6|wM+^xM`7 zUD*2C=YxY)v-luC1J$B8RYNrZ`Y?Ke#WS3VnCTbe85XOaI*&xrq{Q&1HP{rjcg zuPvs(c+B2wsz4j;P1PnIBqc~N_*88+ICk8Pfa&egtZ{`&*SsHIWTa_GW^$&+(()&# z@uW;@nck4~^rH_cypqb`^1&6JUOP+2^zQ_8%1!DzKSH1TIL^eZ!<#d%jv57mTE)N zc4yjikS&AGNRmULxx3j`{JijNG)NKA80}Z8w`|E_=dpLvQ@!Ow>>6~gwt za_FKOh{(ou#&cR;< zQ5qO}zS;_7v#plV+S2!Vd2lFEdWOl$ablGbdc84c*p1dKFWEuwrkS_31lt?GtpVKA ze#L{A>&78}zGb9$k+X;J^Sj{r5e<#saPBX^Y4&dr zLsG?uz0Y`e z`jAXd^Q((mg~9XEXMCWs+qW}AFImo4{he&pv@ZXLhO29r=i^JJ?bbD7rd{5l+%SMT_7>!(lN_6-K7!orr6 zgWn5AUk;+IELH~-t&A^QZLbA`ad>l#=ds~QbyQX5Q!1QwY>#^j>45jqVB+Pq;oQ|# z$oSaS2#%hD-Se-maC-%`f7M=?=&5j@4-3;aGrLL{o2f;BKYp9svgqt*Wrbrk7M?ca zh`HZ3o4*e8QQqXRS-;vH_j>UH7rq7*DCVUhiu^h-bFb+>se;;H_RV?t+*#qTY}Fl4 z_*Y3<&I)ve&d`g9XHQT~yH?tF-5Jl}{+YV^D%v13C!Q@jy*%Wl zc&q;}z7c!F(X`a%dtrCfhpfMsJrv@F;Pm(<3$?^ai{4dOytGyqxL6ups;NwQ!I2c( zNRomYhX0~A3FIRFT+JbHJho@>msjo>uZtoSttsaIh&`g?6c%$mGIX)NYeBDVWhMG6msP5vWu3U6d6+H?ik)oCHFr8D*!W>GD(EB7_)hKhc@@l}51>XFwmkH~N69F%H%urVqq zKdRk2dyJ@McW4|OtNMfYC4?j}5rH`ANH}G$p~5VTvz!KmY>#x2+jiqqtTum>B|v}% zeNzaBhYcJai|yR&s*cUS$eVw!{H{%BcjN!0Z!MdcnP!OaA- zkvjsKy`AW!==|Li^75D{KeYP<*5fJqdm6zRn4z%HGA@a5kIZ{uKXquHx5BChbKFN> zb8!$yDSnn|;7Lx83URQ4omPuaRk-3wRWc$>;X*S9WR3b__gwi&hqT>gMWQXzFB&UT zFPY}0jihskKFKixnw>KR?Y^d;UU*&xG+Ok*b4Oh>lgJ{8EgC51q4JI#uflIie$6` zN+B5}?S&6jSZrE_wVZPASk7mIwIp9arOZF(wpA^N3fw)w=q{LLbxitr_;@_-g6XZu zj8MFTQ`e;rNU>MBC=j;Em8gEW5vsHtQm&Dx998LYbo&@Epk-y6I*6PIE4Acm|JmB? zssCO;N4%y{gIMQ z*uBG_Ja*I=J)VDGsKT2y@gLxcfJCMln0#fmaN+pl$C)MU@>98HO9C8=?4okExNe6k$zq?w6<2Z@!7zODdI0w!4VS3Rt9Tixs1++co$0z*GikfORCYC@c7 zi;p@O>tkKV1{#&7d{Hso8k~n%)|G1PU@LsK&Rnc_$_!{${iJY6MMAQO<%bIBb9bDz zziQY*<(29-?kBTicwe^ubx5x?=MQppuITfZ#B$vL7)e#I0V_#8v$7Vg;?ultJQcb6 z0JC`>m-GWhx!1eqplW;H3+Wk`hDtQ^*A}^$ro4>hKoHL`TF%iWSe@VoUjM z_Ad>5n!n2-sS8ge$pu;sikepHpGyrJ?C$Wd%0I!n&2$Kbv@oix9taEc)b+}fZn>_1 zmg|1l#(yz5!*Z!-yy0`2SXn+u|DmX7RQ|y3VwuEVv%XySYf0moZ%wNW~yH7av7A{ zjdDdKe~WfsCs70;7;oCWG_w68bP6^z*p4m+L(`GgtCCA9S!%0(a!hY}g6KV)uoWR1 z2(sA5KnCZQKGU}pW-gkg{o@PIPmrhf*R^%A zX>aBZ_yNE|hB?o7#H<*DpHF$8wI!VzH@(n4_77EU`(@_vYTV0qFNm{<>(>12`SXiR z)qem(x$q0I<~k_mlPlw451#d{MU$rK_(>;oz=;cr^d8Z($MRJbb5-+o((whx+2 zlr}@=n`h=MP1UJjn|4XR0sj5?k0i-yd;|TLG>lRFXLOj*0pue);Jd=y+II&dkGMh+ z@*54_2=rre-Rzc^Xga@_60{B;yc^#wHxTKSam~=VVX+=r#o$e@!ZeK$|QlA5#G!%kPDz!yEY3*ge5)Y z>xq@VJn7)R&1-aCy3|Q%V$mOUkYlmgYy5A*49d?Jck_#U6{(ekeHn8-dkx)9@^kZP zKbT-&3+UaSX4XCY*v9g!&2)c&g{f|iv%y*7G&AYR(_qmXvrDfs=w78Vw#u*++CnGUnTb_P}&p`Rp+?&sN$A^H@WXxljXOE6 z-Mih&=Qn-X)hmvh7Zn3C8H)*O8v@@0{i=$EAG&1Zk!u76J8C)O;}`z;?fD2$ZT>M} zw_gc4Fk62Za!{dIZ>^u@@r86cCHsqir)lTZuW3|Aa|k;(33CnJ2R0@!j$V=(t9#Mn zC*#y~BM~|%$%XydSYaQ#UYmeyH+zE#sPt#CBJxjZAfzE$c|+H@q?JXUE43=^UG-2Y zN{V!4_|x8pFo=-dX7yw{sW>M zbC;I9BO-Ge?Blqr(Thopb(Q~VHv@+g4W)}@cIYoCH(Xr6!sBoT3Ypk&a&we_dn}hc z_EP-NR=G710!^L!N^)BKIN98$QG!H`G3Z@ac0jS$Cj)}9we%21baa;$g*?B>?lJJ> zSbL`GFk4afvf}SBn~l7|JpjNqY&_s7>qZ)@R6FmzdlW2KQm6PaE#1sn`7naX(Yimt zBLeQGuGgU(3FDta1JMEA+RIPhv9gs5J-SXXn)?U%t(;ne>9`ryD8DdT_huC}5RP3V z!rE^bpViNVGQ0d%b*LoigYg}67DDkU<9?9oSnl4iV5wm8%r0r;70$D!lU!|a+r~8v zl*9E8C&x4yAxuUEpCZmZ4X1OBhr3Ob*7QTTQ(O~xt0&2psI=5O69Xr+o2s zPQck63TJ!q>WOcRP+Eu4B=uIz5;^Llk&Wt=(&D7rP)O+vo$0 z)NI@>A4U!-70hu0)STyvJsPTSd>bX;mXf4AeSK$eRnF5ZC)3-rdNFGfcVY0sE`nbO zomY@R90EKGU)PEjZ&yJ$MpX&dgKQ0Frzx%NpWK_zEwD~9wpUhVIiLR=;i$K^xILh$ z4LNcPjQWYDWVE6*c1D|(|5@&R@(%z?&(foGbi(JQ-)LqAB9fO<2ep1PMYWXlh44+v&3fUtMB>+^=4;1q+3IHBNW0D zBV0f3_(s|x*UQU;;c0p}w&dZ)Vjgg&51~J!pMtXX5E5(|!&qQte);QZ%+4AaOJp4# zuxwUnH5+RD7-V$i!B16b@PfNF7c9HT8(fATp7q;#)^a9)U%XO&B&W&0uMpi?3yZ7= zDX*UDZt;mzZ#jjX_vZ+ypj&iYjbGne2B%vfY3Gp2UhC(UrdO;HrKR&&s(hN zQpNiu>2uD?dr|##6BDDXsfCtP%AU$Cpvz}<>7bl#V@2k3=(faN3JKE<^D(JEp#3${1ZM&e?xurJ&1)&H+q;JTRtr7cmr?>Wtpn-AtG_OJ6yl7teT|_ znv{ETQC%BK6U;v?`=EFi{Ab`04xcjXzlevV=n&!~9>GOl?Z_A@lYae;M&)#BWhDuD z^r@%vk6%9#2S;1-ot&kts>mfl%9i0;pa3sVwS+pJjP6&P58m74Bf!zw`QZoRhw{4! z5YgLa$&_WK7WLRq@1Ma5tjrxHb_n{f8B!}N7I~S--Snza>i+G>l}lK7wtN@@Q~0NM2|kPW=0kQbs06`ZdZcu85{oqh+!=0g_E|kWu}II4!X8vjfiS}> zK}lHkcGlf)HFmT_)s;6Ea3&I&YcRHXs%{DP@bD)Dr>a~roU>vyu~KB%Xzv4DUv&hW z_!PYs{lsn`?sta|!OY*P9&l zyk5W{=F~O9DvoC+n(HG9a0>_rn#oW&25SK6M-o}ME5XFg;?o;}s+Cp8_xYcG80n7s z_z%w&M4rt;k)A5hhxNfvk=4W)Kb0HK4vv{sJ%Lmj z^~g;zN`>!AYP>w7G(fes9P_^_{)x@1S78$`f5vwAY;Hg*y++ZjJr!hFeQA$Db93Ii z`e>w9q!jB(it`$VymQ06V+1@hF$vPTN|{;@G?GLUbhY^PX%SgCWyg3BFWRTbpSh75 zL{CkHa$w&71B~@T9Pc`4u`Ubw8(>nPbcC<3>3sV5T-G0Ay;6rkbK<#?gk00F-VD|F zvkB>w>=;KxBFB1hd3kR|+ir&39}~%PG5{k+MkR(zE4OuD8=2_ zreW*uh)h1%w%}eEfUn9#f4*ZQ85R5T;`t_M(Dj^pFI4PAVkM)7dMi5Jwptl7lnX9x zPwR8)C#L3 znJtgwS~Jq}QBbA2{>(vxoY?z3DYu2^zva*3Bn`b64PtnBCjyv^Y|&&&;l?m~B5*Or zbC=rBg&jp}=X)heaC@G8R&JL6Xpz{=!kK0RoORP|Yn215Hl1jX?v|8J9QY}4Eep*g zOc@nV9q9jza`Oyw6Q9>KIn@hS9~z(CjuzO?FFox%4D#Uqeu7fVTivmgO42ujbf1cm zN_q^+`BzWm?5ig~@u#_)p`mhNh1bN)S<}2Rs5_+u47P`6hAv2h^4d?f$qrh}O@79h z(~Y^c-g~DGVy+9D>6DNa3w7*>nhByPGgJM@nMz#Z*u}w=vTsRaOE1-5RC=_|#W-xG zIQtJ^&+Mmrk{?&O-msi`(CN^pQ&C8{M=JI=4TJ1BOGfgu*E^m+B?cozDerACaLI z0Z=um(Q|#{HqA=rAD~;Zo=%}w){I}kv%RvvDbAvhoZgOre)kLi{-NJHhJoY~Q+B$| z44&Bc;dq?33TmrVT4_Tg9>DxDtmOjYn?=)O^90aikEIS^=u-D(h9$!tJk51Mo&D_| z5kJ2as2L}Ev~OXVKhKN@+XxyN&9gVnI{cn_q|K8samxRkZn;@oIdFqJC*+1J`0ZSM zj5z-!ZLe2Rf3&)v^53rsk%zFft87FcVy`7L-cWkS@H51jJNN^PN;aP8?F3Wgl{Box z6e~C<`-m*6?bW4dufTNzd5&K!(xZt0pQ@J_Z>Bx5^TQgInzF8zk>7O^pdo-bETJp)BYDg#&2Or>YGSg;1)5SF7o>l2-{~u!e{J;4?cswREkwd4y ztky_L6=IBp{qO+#KM8)0`^^nRvL3VNmy{1x10t+)< z{4F*5{6cSzntH+o{-}1Was6BCk2{8vaVr~hlQ2=#?B6P)K}*6`v@Gi28uACH>o>FL znsz76f!YULnUze+vbvl-0(j)I4wPzUF(vWWQgdmXzTM8{(3P!~-O$81LUscmtmf6c z$e{rHFd^gp2WcwB1ilW*LtNRkE4UhkYLhP zv;GR_7kMU8s(@4S)8uMPxqTf_unAhGzeV{cvaxYi{7|rM=rFuwdD-qHfCq1fzh_`> zK)~+nOX$p!S>>e4BVybZ-K{0FV=uh{BRzBfk-_d&s%i1$LuZ7fB#yr_WD8A}VzN#B z=t4vg`|Q ziBFpzd4YL+QRzkg@dK+ewP>DrH_(T84ZRDX|B8P2+2kIOAzh@?q;`A7?8+5HXf2nx zCRlme47O-)!6o?S;DErh;yJ)_rw9F8=ksM!2~5@o9_ z8=V;SV6zaXOmdYivp1>F7TeGX=(+RrpOXw|Lvx(eVyW=~6Z=oF@50qG=-_%X5$jXp z5A0r$*32i(__69jYl!o)z1%4)1glM*SZr-&#vS8uk(DwUA)17Jzn7QHeyD0+4oH-gL*`{Br+W1zQ zWKWRjPE%-m=WVOCs{M|X&HZ-)9L3+Bg!GGTB^Pb_1}F3i-oQaIlO zC_DP~%O%sz{BhK^c#BY7xqoI~c4g%Pw3OQDU9n<~*MY|_<}q)G-##C9sr3S?{unZM z8;|idJoZv}o7vw<>l5N&McA1B%PHHw*R-PU4`;Fm`}rOOFKM-*{baD8z*2fOy?S>+ z8)zyJC6gJ)wYZW0&EwFRh8z=*@GY$%BXlvfSWPQ^54+D8JNtYnFs}p0kp<$iRko_5 zs0`;M#$6_kjpp-1rm0GqG5g1wp9gMjE#06UtA^C>r8lf~GYe}I+maF1XjK1>grHY1 zl))(K>>bLf0+BKBk_F|?nES;8W0)L?4UmipWx-Sh#q$G&DV%i7l|O? z=yjh}fJDitv0~6U@oK_-IA|c_a|GEeaQqE zK6lbx)2hTL#Pl`+LfZ9g=iTF`7z0Fk{v*lg`kNbEh6`+-#pXknodB_5>cOj52`sFJK6yTmB{)g4rJ>Sm=Q!eetmEkkD6hbWNoRF}EbmLIjyV(gqXYihYKfEf zioE-^aqz*AtuF$0F&kh3O~mmqvV{hd@~hCUZuyY{Dg_$y2U|W*yo5nnAma*U$V?rq8kuU*%Cgr+>fY|TKlGsYBx zF>)^0l_AWwM`85;0i@yO8SJWmM5*c8r#GdKds|7olv-v`GaNTuJ)*S&0Nan<97&`y zu+bMdxUxnkk+W&7<)RD2vQT2P!RIE{qR`JeCTisw+clq)21i&QDcIr?ys(03yFBii z#yPi!Vq*MD-Qe=PCT#%r)N(J|VnX@D7jPG_k z;Lcd#_SEA0lOScL=r8_*h^X%y6qG;)Vumu6)Oa62np@z8#3Mo8COkf!VMerB=6$8St9K%8bq- zooAkv7a|B{qf}UllQxtjN1l@^Ol{-fapx|)H-=2n>14z%uQde<32xy~dqm|M?%{@% z&|mF*aiR0k>@O>Ydr$8ddu)}U=r>{S%ANoo0*Zdsea(e3s6Ke2qpkg4^eq3YKIZ@S zHeGVUZu%$n+5~c?{`QcZkUDnWz3M!&2FK3uV`J9U9x}Iv#c6|aq0PSqk!f9-)yZpJ z3V0eUfHr#hVESu@<7bdbA;d`1Q(3aWg4OlDkd;s0=?8RTc|mmEv*K%50^GhCoGbF6po3^%N|Jc-lBopp=V-Th?rk6^}`d&9H!omf2ToqFAid2m+rJg)1^ zCwmsm{69y)HHO%5YyQaBg&T=7>I8Rf{edJ;f?V?dGhAmnO9<{N!&N7-;b*upST}GD zrN{AVtfyqSYd9e``k|xJSc)AB?aBOGfcvF`&~*-%`u(3>gy2M(JL(r%{{ZsR4k4if z4Qo2;OZs;XEdM$3GwyU6MVB?RUi%jk+#xsA#ZTe!kq`?HhL%kSXhxSeMeM>pApDPcIl&2m#$vkopJq1-ey{=$T4 p1Zj&^5E3!1*BQHs{DOP1qW(LP$p7801o*%A;Qt@@0Q~RI{{s%Gw_gAN literal 383711 zcmeFXXHZk&_bwU*L8SK%Dj*%Cw*aEjrT4BkLX=UI1u?$!ZhYD%g~fCmo&fCu+K zz}*ty4dB85kc=(SAo)F&O&_D)w_y7mzAui6NN4U86cL&^G2jG%FqIf2xfJdqG0spxhm2hxE z-eb1cHQm&@Q)qUPkM5rdp3u`4Soy{xu>pF)2AEHSJq^#*h4h!lL4m(z4pR`i91)=9bo; z-oE~U!J*-i>6zKN`Gr4=a0GJW@8;I_znxvo(ecUY**W&&@;|s90C4_C$o@O9{~Ipy zdt483adB|*|AXtnL!W!YA;*36ObCxcK?nbX8|8E1;Kx+26Y^@h3D`t*(bON^r=HNT ziy}BM|AF>j$o}5}`~3e2+5Z6cf8v4zh;Sa@y=fIQ&#mg`3(;D6iyj=}%j9*8IN z(|$OmNCnXOe=^l(zqrA;ZH1>qN&NtRDxFu4sI(tT4O+(y1U=z?fL{m*nGT|fb z|6&9>tSM~ciX zw=b-Fer$e=r=oaO{S-qwfFf1W{v;|$4hbH&R+P~|&S_%I2 z#P#v^q)hN6-F02ReHTi$kXER7U5idN4*7DiPgY4nQ}wzAo}YaOm~6cRV4pXoodeIV zS}mH*P;`g--#((qc(H^&5`(~42BiYO*?O& zEG()1hL2)(H3`4wnWQ6nNR@u_iu0MP7NwQ~C7T zS(4Tq=Jx%U)5Gg09n-g3@(W<|Gnb1}LDTvL=cD86$&y-;SnMQ1Nx2f*aR(q~E+IO= zY9W8gHW0JP#~nh>_OSX+S1OJ+aoGA!Zfz3b%c{s?&gQYKYG|}I)q)5-#eU~?Ri?{< z?;XIDU|{~dbg$_UbOFM6-p43Rt}wq4+Qo{ZF8Mi(H9|^WQm<7wY<|nKKB(#5X_J-R z#lI==vhlXU>UTc3HH6cFTj^GgLYf~g4j}byY&LuV!5Z9M7amr309=Ek+wI)b!nw5L znMHZz%pN$PT4Xn{-e{EgO4ac@w2Pqq?RbMp@*bQaW#!LiYcz`=6O;c!=2^;o{P%DK zO&6~m(gVr=<*I*l zs=2_e`rZP%@WpD~-{4`a!qWic6CS4<)l`BgAtZC=WcN6T3h+vfAC39=nDaYs$iClM z@vzY?bm2m$?8-YXcm29b&UmpkIb|hfPuKL`J8WS&0IUf837GQ2Lf4sv1J7;A8A>pZFX`ggbUQR9rQMUl#3=TnH`wDDZ+n|dG0w@WJY_&BbA?KA8$ zuRzLG8lnuWL6u$+mDl-ve)fH=Pu4`;)U#_x8f(Ws>i#MbjOimQSfAe`h)$6(c#m;T zH1eWhs4J#IIfIVeD^1M~uBSr!5c!6pESyB;>MGNaNV#cK3pmsD#Hc?%Y3n~(66v$* zxU{o0%$EXDtH*W@L%QFwldp}~{~j^OJ*JbpI4Lzdi^B8@Y+}_zf(%#(GK3pFVpZZ? z=(d^t8F~||a+@oC3R8IEFq9!Z1bg zD%Ui8@4frwm8dIu;r;Genbgw1^u zFuDT>a>Le#C&Zx$Hhx#;hBhK<#ltbN846d+Hm}5U zq_2)=s9?RXA=ry=SSvemqAI9$apT4x=+D0_EiAKKhE9dAJ9AHVElr&Q^B`WO8ekWs z(oLh5fp>$^^5tIT(+3JCdsa-NSIXF3fGI4DrsQGbYe?yB7#i`)L{PFShQiNJI3I*ca7Tbj1 zEc^?&1Kd}(a~zB;FM|E1{2C;*MB7^_;rk#csV|}QkEGAyCXKD(Q!;!E*MzZ=LhOT|{Xt6|F&^Ob_v#J;fX zT0SP4%Jm0@(8*I#btlHSYAD{$fF;qERnSZ<^ z%f-vz9?aC_GJHS7AzqDu@1c~igEWd56u>k58)+bS^u1Xk3)h1ZNN^Y0d@J^yM#_mOsT81? z$$*iX1}B|Nr@?qpQ*`Z3CGSlKH(5q7>YT{-TB_BbUYjK#RW$CFf*r=KOywb&H@$&UerL2JhxPz$LldL_vo>ii-Hyqzio1{L!XPUL&m3>?rHD#nm( z0kBdXKyUM(6P4UL28Fu9(HHuMs)bz5oZ|!*VjzzB!NU8rC*)Rn>Q_@K9XMP}3>r2t zicZdLVV}$1c#&qIwfYYR?h5sJLIxSNFd@(O&c(AD7zDr1${t#z+c;!#6_&g&x*&9& zZ%n&OSz=7X9RL~Eh3{?rU?E2V2Y@-P9{O_AdLmB_Vxh!p2=?;h7+^FDK~8zQ(zg*G zK71%$-t(i$IP`+isU)OS9q@CuwuG(_x4TUg2mU7ge(}5C#}Ne*>s?FVh~#3!y%0}5 zHWv+*bn0e%&xjl3dlBQS{!%Y0%NA13>FjU?H(m1fD?aL&h?ptWI8t@aG?Nu9H}q+k zYiPLSkDHmfGKKQm$v~aT$(CN1L1c73GFB~zPH1WBTQ77xyD67rjCcz}XY7u4xR*i6 zOKK#C*j3n{0G@91NYPJS1{M>%S%d)Ru;^fPHr2^6~qzFp%)J@z7c{0l4QzF$oeI@Al--B~Gdv_}OU^na^8osWNusy^BuL(%4*F zG6;Y!X#LU@iN%;%>1Rv{+_y%A%QrNv^>={YMRpdWIIl+!4AQN-r9-O5655{Yv$?S) zx(a1^SgZx#iv42|?YzPZt{g@Z7DVczHS$*eX)yi>BeH2td<#u1v!=5(A{{9=+Q@0R zdd<1Nhh!!-or5yvu%lz!3LL#NLMMug;pzoNjcJBSp!uH`TDdRICg4jtIa}iJIx~x< z+EgJ)R)fG^t9mN=`h_T{)kZccA~kQli{zh=5u8aHeT9F`mh*g;PmFL+y?#nD-#3as zwB8%uVID^uLCnUi%qrFZ8h?EX&Mjc)I( zzM9t7P#PPP3BQU3ha?P}hbb&X#|3g%(C~MyYX}^yX5TMzSK)U6i>ZAR zmiiDWDWLZqK(d;}>T7Gf_p#^|IqL&)b&vLVsgqpB0Xh^fGa}(z>aXw2Wq?x;`LN65{eD!>rWQxxI@Nh7)$U zR~~g$b;hLgaOc_d*rjRY1%Kz$Yde#!jqP79Bp$~md%Vx9T?-X(6IN=1C#8OUw)(n8 zKeycPvHpgBOJ01^1Q%AThSTDA+&xrsStW5Bw0AQ9yGbKZ*6<2kG!IWPmub4v;Mesz zzg*G^4}euVovx`#FAR}lI5&hFH(Sxqbd7jEow{1D+u&q1lDgv;$-dBv$fZf3wrNG% zB-y0(=M+WM*ZeZ4P@=`*pS{#GHn;Y^%(lG)1eu`fw&xdMKHsvT!VMVFhMhwTr>?f` z8!N3U$sJUdzwW{?0mcaVHZhZG7Dyq+9&JAASYuUR?rilwxrcH5v2mGi=xdi}3c$G( zY#he8PknOz4)D_YOT*lggdC6NkRkd>>x7+D^tZp$5b50=F)!lm2Fu%W%gkFnCQTZ% zk01%}imdF$HFa3h)RI|%h3Zj`D~Ug{)95}zRB9CGa+HP>sA2n(pM*Elj4tDoIy23O zI`Vzh5tu<+~TaxkCSA76gHu?vu^gGIPLane`!-Z=WQ>fYAjk#Q1 zXq%NuK}O>>e02#_ed-T(DKB9s>6nmbz-Ag^PdA*%cpWnagZUCHRg71GshP$4#|96Y zb6(ay&f#=8?gHcCfFHVU-V{PVP#2hfxoirqtlwd#7Ncjkt@$R!^FyXZfM&T)o-pF^ z$0yZd?d}!xI?)@c$Ys0P_j97Nn;c$ra$waCUDXbwmCP~WO>V_4y0_~sMcD=r4!h;K zYO16*=N0jm^GbSpoP}b96*a_TV>0@*)bMCV7j0Kp%pNAyRcEOhB#A#NAzr7&pz{5* zf>gKeEBxGiATtJ!m15$Pz^A`8U60vcsV1&&zG55`b{#Qd<9>?Yd}w0OZSCL@U`=2d z5>mfm$Riw^HZS2MD4w=#0W_p(4atkhw-hmoE>+JEK1oT0y_i(}5pU0Q-vi4fH;g$` z=_msJm)e&gsh#Q6_ABIU;u~}m5;#R;@)6A$^*1IVo!Lf$Kph-c&tcQ;dH z`e-6WO7%!)lRpV>hN_cy%8f-_4p3(UJV^ryu{f%#+(I9umroXAUCpw8FZUNIKguaD z)m-ET*6!6f#+zucU>UUYa6!WX@I9FRF8ld$mfHwyXO{o6T z&d1jC6ulZzqwoBbS@=(ID1JHROzMQDrrU-69pI7wO?iXWBJWus+P-g+bSI{C4-K_J zL;Zkwm%Gzrs}2K)eM)NvpO<;9K&_v5NQ*2@WqOEw6z5-If&$a{@)h5Z)QAOy(sM}9 z%`z)$rF%%JahIx%FFL}_Eb@m3HS1Cg!t+skN|-|BY~8aMQ(&1hCgyzZV97;~5-EYA z-4MBY3+^PJm6HX*9$kw$A-fnLmdtv3b?Dg)urb!7*OGp|epDN%PWdNB2|TWgmK{)> zMW=+ilUdJpGGLE4s{5VT45xt{7|P!B44SBomXj7apcy2vM;=v8u(b1XwPPYU&;0(Z z-6J0mz*5S#lV+NwdXvG{l<4oe-&cIJxZZ{3(Hb};!?yM3vRHM)2n2y|oGKx?ebtDz zN=A#heU1Q_%8cmfkmc6I0=||OUwYSnR?)rd4C53USO-Z{)re+5GDebLCRJO^)rN~X#%8rt^Ei&@ zep3!@ZXzIBV2$iY)@T}6^mMZFcW;1|$<2sOr+RhH8ie%GCjl|biG>;(W@;IKZmYZO zidxGZz}Of0p7H(y(@kjZq6ZVjfbaf6}sx4NaIQ#_&gVuZ|1*zc<&Z z>>qZH2=eQ{5nh;$$NTk68K+dPnQp-24luu6MGP&y;=~R?dJ(6yWZ+z)hA7r2j@l6C zi6sOq9H@uLrhVJkI9=iVe)^ySXjI}TA-u{ip)=7WE_@Sa2Fi07i#AodM6N#kPFxX9 zr6R%0<*-aqQBXqEg6m9AkLzbNxLp?Q0W~XBN@38fl+euPa(|OBQ#>l!-IFWWVATOq zR62%sqS8;VfxDyJ-8^&U24$tH`q_?=g_d5rYT8+|yWG;wCx>H8+UAoPe-pBt_<~{q z^peAL%(1d{K6o$uhaN}rQ7jdcN3^bl zb}@kT+h3dk<&p`v9Lc|@)l!OJ&#GLdE6%mCQ_C)|rmoYQ=ky!~54>Nf{&g4j+rUNp zogQ9JB?L?T!k2ue^osplYLbb_BQ}Liol)kc(+B}Rk4}idgI`bmq067O@XBjmwSARQ zPd)~4y!}Q*)$~e5SGk0xr)vIBCRe2ZYHJl`v4ruqAR4zE_u>~m*Dz}vWo`V0W*nEZ zYwTzcz(1_C2h_V4KQeav6U{)iA4W$A9N@B!DM*NVcWYWkZwsXHS!($cU6<%+!npNE z4l@iOEeb5Y11$X7Dw8RZ`zR>Tyo}H8_1A6h_lexe!G6k#Mw@Sa73#=zpJpN5;lzR^ zqJt%_tt-=ik(NdwjF91PJRzCyAdtn+KKe2vRu%9R@k(3u*MuL5f9&;xnGl1qJpCYx z2m`kkW=a=%9u+<7csz498BWF^qVMzeAf^-|?^1gM#@g=`eE=B}RaQ&vW5bxNobvLv z`|YwKzH}W?+!li)6fM;YEt7M~|2f2zaKCaj8!i^nZND<^00V+yt(+(vFN{(DEj6|n zS&rCI{TO zpi3n*0c(}Mq>#Kc8alrN)cSV&an)wpm5KJEJ*Rxnh9{q%yBUJX+Eo_Ef3lj)u79wo{_ zQOpRR%SusvHU&ih6$Y_SrcSzFD~XT?mlLrIVf}zpsSJ?x4;?Xf$esJrk(pGK#-Cba zI|enYwerw*YfD7e!U^iC z*w1$Wm5#W9W5~zVL!G(QkrC~TiiOtDS?Scaa!0p@oa`dw=InVXMxU9$XE)im%#eJ< zWM6d{3tMgbJd_`!-XF+^N$sHii@B*B zZMYpV+n;GSz!*V+z~8r`*QV%+%I{dtH)y)qbB=(F$-Ae*Pt8}seFWy98T zKR#`=%sKNH#;OlDCq#2Ish;U$GsD4##*reaMqi6f^-6gllKxD#JP@EP16g9Y=s$nc zb~NqP)_ux2Kc731hI*u>BPUl`k;Ee!dl^Anb5wmR^-L+ycB}vFJaV0hdL41b=Q^yDD*2SN@A|@lvt9LH5g{Qe=S4 z+uOC-O3}I^Qwz%qACAAqx{DS#Z*$asvR#bal*y4olDfOS1&Gy^< z3AHq_U}84a$qT8}Bd7feDb|_M-_T8rX8tl6Ca3@j>;0V;cw-%0-m z>(UQzO!kT+H-;SR)OW@5llE3TYDf8&?l9=nN=S#s1pUr$xzev@&TgwO9wL1*(W$up z^;r{|v+n}s1qP=!&xk&rzGvGMuS?ohizjB(Y{UL2(Ww0RLLBa!T#GQu?ZvvtR$DP! zWeAst_ad2?8NNld8jtW~IVxxCWZ6H~yfhiG0?GWj$&?)~>BT28EH$cBRFnMnyAb6% zXDgsSo&YHMBah4Y|herD7 zfnek~ui=bW8zI=ttc~!7*Qzd2LS+$;kUf!&E!VOIn}=T0Y!8sp#oPgc>u;0@G6-X2 zv@v$U-~bol8W#Qe8Ak#hxkH3QHye`;vI`$(4g1>3Hr2JBnOi>@E6S|9JKA@N-&;*; z0W!@HAuN~a;9VCC+IO;#nB+ObEb$C1eJkpF6h#8dxDZ2G9{3&#HfR_gob4LrfLl%p z)9q4Cn1)3Y+heCyd0W_9;+Y3I#cr|@=RsI23SN6inN;nNtFQaWhB~P_DbU)>ttEiZ zz)Z8!VOTGElY<4MsUf?ca2-6DBeemQ?fv`5G2Q-bRfL&uYOc?)oani}t8b_|KdXBR z2d%F5=dHx(j~RaAi?=bV0XFeVD+Tcl9fOHK&3iQZL?SLir;S7M2mV$qQhghG{|2B? z`7MRsinsYkUHo^-FS=u|o^Csa0a>y|tm4+tifasz%z?GqCvZrsW#yBT5@i- zl(@~Y#VR?exokT((}lB0MUol;tFP{ZQ9^}(2Qsfgoc&c^U^x3-h_PC_;8Ej)L=8%# zX`r&NdwfJN+4xzE`0t9HhAEt&S01?&lVPm&O)*e~AJ;ew*Ya0-5VMWkSUL9Gu+a^d z;8bba-Zd0ILA#N4(dY&}bnW3zYUeX_EtW#P{3>d69EPGvP$(LHgp}=z)Y3HTZb`LI z9TY7zBUSsd`SlB%&PVgCpBVSjiJjls(mYepx^hW{JAn8$%Y7#CHp&3zRPt#+H6%Zj z>3inTE2mL%Fa%DBxl!#JCc>z=dfY#^=>!Ds+!O`^L2Gq~-IHI}=)^P_jxB$p4P#zZ zyA^apQj;tTG}$1?mPC5%MqLiW<=?771?zvUFZeO?*EF!Rx|{DX2Y=X;zzJ#C=j%s^ z70_nQZ%;wGKcLp%1L?LtrH&Z`4b>~Ac8}$TK_0Ga_D%YckLPqLw(-x5&N?v*eTS5R zLsm^n!I+G_-j|jTX^^Nt7m&TKF}(m1cn46QIi=fAz1&)5R@ZI$Eajt7Vgb(|b)Ejk zZ-^Va3?o@1g!)!qb7I@_u;;z7#p7kHnNiNclvr}=p>k&}&R@m zXUDmT{2fO0nQ_0>v;LpuiR*HCVV*gTWpfpndPmJd>15m2NqL$AYC>*$F6l=e77b(5 za&4jIy;6OnFH6cQ8udX_u_PUmN)_PO^(l@?YKQ6Fii%Rrg-(=Cxl>yGR#+Y%)Y6rB zHsD$tUEHlj{|8drvvv5UbE-L!>=}%9`hW`B# zXTkwSEJu8=EXRhUqk3wWAP0aT<>BlEi#9EMfDqs>G|Ew^+vPI zdH?jH;EIfcIlBz`?fkRIn?j(*l`f>~H6|^#0{9G3UM|a`AucQbOWJkX6S63{)ha;& zI`^sLZ$GCPo0OgX_(xcHUzaLr!^OUU(TS)(fUUOM)so&ic9$j*ywo3)|KU-)>%~-G z;o^a_q<#vss`19fyYR0fpXAJRbHHziBL)@<5EIKSFXsei9d+x%MUzbpOKE9N)!_0) z6T;9(P%nmWPq0~X452EciNL06jR66D$760&{y`&rni+7$nS3P-7uIccD`s&m8G^hy z+<&uCsfDOWHA-7UXF_16{*?@}yqbv!FUG<2leYBtjdfSVqZaB?u^h3Bn}VBMZYK-- zp!*sh_4^J0iu)?<65<*6MF{f28ES@bAzFP=x&a2AHbnKC2G2a5JIUtoR7oSH8Fd)V;PPWOwowV0iiA>J@*+2?R%aOytw)x<>^bO%Y3@KqEu4xvj=X zl-8n=Ua^3SLxyg{g=byV9E&{j`sZW~4|rjiZ(1;BQ3@pMD>=TCfB>T-QLL-y~D1(|;t0?~l#gf80v zbz}kjaB!03+5~eVPbL;e1XXEln6BPGxo;Db3U{PqW2mnglu`-`=l0A@7cVjiM}6IZ zM|c?~5>kT`x%Kt~@-Z;dTk$<A-=CskwIm z0`^?$)0Fxyj7u1zVZNHC=Kv{zK8q^`or|aCF1fWY4gM2_Sa$M?^=<0ce3Q^44i9@~ z0H%~&h%prfE7AGsqfdpz%DCoYHW(yyqPM1_P0$9|&R9yWo~=1o$eQifel0>Coy*p2 zf|+U{u$ONT{~FewZgTp#qZK-^g3`!faRKxa~Fj1j7f ze=eSON-4%INA3}=bM=f@{i58Iwyg=0=(H` z7M<1;M#$QIPh+|U&El5uCVvUvP6zU~qY1D&g;1BI*Y)VQUdYMbWc{^b`|lU%PZD#i8MN0^r-!qGn7e_^koh&38p>y zrh`r?x@3O4PzU)E?N+v-Sr&5U#YXRb%xfWMZW*91Gvv{l@)A4NnL|qTlf>hU+FrMv z_d^TMv@!JUhP3%9NXoK+>HFXO-`B0!oigYP>;}dI$=dJG$z|%$MGTd3LhEUux9|B} zVn;bHtX?VPSS52%BF&UF(#iDq&Sg<3acr?eYs^?xV=8Tv_}2yPl}9)m{*#OlWn=7O zk+1vhL>G}~rF?gw%yeAb=^?IT#zOZ!10R0YpOtTn)=VhXps(w4`18guRaeW|_I2u( z`2w7^-UsyolZH@6%^`9_awyOf=~Ym&5QJtLhIO!uC?CBVbXf+{=|)DyQSV9z^j8-4 z_s>@rniwniwFWfIo;3;Y?AN4Qd#@pKp5C;dt_Tk1u-E;ZuGeCPNc6cNM_IoZm9O9M zw-X@1-Wbb}B9NRg#=D^yq~%tKHBzphom>*&kP&c(O$o3^zCRkg$}tHVcd$+OGWE4( zG9>9#4XsS=-ZD0s?Rj7Gq)_q=C4p^~@PNF%Vf)U4Ztn;wT)SwOYdDbl+lKHbL#JUpna) zEwuuiyxiofrV$*qX$B1%mj8NvzyGo1(_3;lr#X%qr`5{fq?s>*(FTug@Yp~W2oWT1&}iYZaxJ{wv6DX4-$}+Srop2c`+22e z!^vIsIRp{5Z#p*p+=QDV#bt4+4KnudfZO^QHI`_G-xLY?CY>w(GS>C&ub;wwOP^~b z;l7cCl{)*naR1C2=jZw~)2eKMHoTsDJ+{&J$#*g(z^|b?u`m3#fL8w~Uddl?Q>nY6 zMO43?n+@ALc_P03#365Il`i<#{W*6c+4m_D<-#wqc4Tz18&Ig$IsYS9khdWheyXlm ztl7#E;9F&SpmCa;UOO9OYml<3U?h2F~ExC89Q`REC9Vk<*82m+p_VMX2hH{JwC0{V!TS)TN+=W)*7uf58;fZw-?*_8Y0l8h*$e^nJ)`%O!kt?m% zx|-(Nnygy*t}6A>(zpk3X5d(<=v|t&HP>MJ_)7LslnFEa$e@T>T_0(xaiUtwqb4W8 zcop^_s?_Q#m>p`I^7v{WsGW=E?QydZ~as7H$qp4S( zj+FuqnKWy`5M73UWt%E$o^Dq~EOOegFm=_=QWs|sih@=7&0p0BrhYL*y97abF@#7L zlpFfE-;kDeYWK1#l%$19gIyf-15(6FW)A9FJTEe6k*?5P)bjG;b6x7S7dEc^o~qc= zoK}%}<}$@sQ51zdA6#R^!hb{T&CyyR_%Vmq&%T>s0~ai3%+$MDn;0zPekdcY$YA!u zOI6iK>bXO2UKPf%L{-*HwvgR7e51nG;^Kilt$ow|NOWR%g-sn1wbcjRP%)bg2PKiD zVqNWMs*VERLI>6;H>W4*sn)T5AGj+tncwfd|A`&i=qzNaX2h2?DCZV0$jZv6mUc@n zx*0ZQ!5oK&-2oh|B7IEd_xI3)gPl(UI5#+o`_{tGayVuyyFbq$m4mM})>)}`{p2Ix z2TxwwhHj3DPwg3&^eyee{rjKkD#)E*iH>5Nye8pny@A}=*jveYs37K`=MPx=_FKYI zHzMH8uN=~aYM}i0okj|??n1L)mjzRxf{U8&v_zZqKN*KW@Rc-F6l2(irtKGjJDTQ3 z-ac3bNwAR5o`A<+Fl%nVvtV!`74=(hO@#A~Q|D!(rupbHWC{d}i!66-PdK9=l)#jl2ifm5fbaCpmy#0W>dk92BM)riOI9Wn zE}H*o0khn&M65mKn(CiPamn6zN#Q@m%&y0-=@{C`{KU`0|3fBpiZY;o)1)oVEu)UY zCmdpXDgyiS4lfb%;ri{;ltk(t?fukIN42Xyz6L{_Z3@@r*g zx7GBdBsX>Y8KavO=|w;I!bNgHGj7dOA|j^k2gx~re+qO@gC|SrCd?ONE9w4N`G4UH z^`L`Kb}Gcb_0`UDmdSo)ZWHa{<98OXQ4U`;-lek^Ys?K0FLZh!6GXOZZoHH9j{c>3 z#}}s52a>qQ(m8Fig@vg8n4h!N&l;LjXSBctb+k=FeW*uyZJvoT)~;6{DTf&g6u(4Q zlsUGrpGEmQCV?#H7i?jz2uQhyetoNALuDn*%xZFc-zT2Yvjsdu_2Ninyw1W`rHRp`?if1tL?h5m-O2AE@O6(10tBXhF1u=f3O0iWgvz5c;SNPJsF_ft=)ZgwVn z088^$r@~DW3{2l;YxM>06IH>-*0BIoN6J_c?Fg?Z+11V1q!LsMxKuq8e#2BrTra?% zXkv)hEOdd`SYdSClDwq1BPEaPpV00_aH|!Xuy1qqF!AxZIel{#J=VJYkI;4C!l$E-o zle0ydKee#(Unj$KwX?QZV_p^bC?NOU&o961QrL60#Sz=FbnVN4zrsluW>-Y_Q_l*g zxp4VGcwDbMjhXLd$UmdYt(1~sl5~=M{4>4RE|rJ!HJ>~yg^?r1Rcv5xJ@xt)Rb7>0 z|9ISD6e&FM-T_T6;P!>%8ks0L5=IR1?`>jX%YCb1P|w@ec7vzVAj<^G*thDM^3tEH ztXR^RuxFYEE;+-z_%PI*=)s8L!HmbRwkM+ zLDy>M>Jh?Yqv3_Iy$hjS8$X+U4I{I%)kFeE;R;f^(FMr)m>vPJnPMB~MJ@)W+dOv% z0CyOvbYk5~t{rCN5iZvzD(!f!`wUKb#`5-Yi$%r_R8C5swY&w(s(yx#a0@O&N1qz` zdK~0F?xX>M3!r+xp}vS}0tlx9<~-^XR2jXr4*LovU-z?f7S7(<$aC3Q z=OSM1RR9W82Xp0_w9lt*8Cw0-yL}>aWruCE!mx${`OzM?6r^7|@qY`nzbUEk4iuh0 zU8949^jY%MPjw-<7Jx<@;6**-g{o6>koCtn&yR$~JB_Kxr!{}CAE4LHzP3!!_K8~x zVh+E05nCS2D>YE=Nw19m%Q%vJYMl2(z(@0asw%*nFigh8Mklv*vR$!fD(?-?=u0Qv z(SJI>Mi~u%6zjJ2eB6$RF;LVm4=Y;H)Zb+BZ644$i=}YDR)qIfyet3c@oto+%xJ8} z05giClq)MuK7g1bm`X8v0?DZP!Xcw%{!=&Eet$O6{*p29SF7m#@%tn$(h5(kT$cFS z_I_I5bnlh}BN1lb1|x+OxqQ{O+%x@jW|)?=teW4L0=Dt2$>->cUou%*)S!Flkvl6- zxEoWnrr=9A`by~(7X^fl<}|ZCW$``jhdpLRE4aXUk!ca~PA(6xc^9AxB^Fpqc|6F; zIKVeCz!V`GA+W!NVIJ$RY6vOfZx;e3thN!$sy}9n$Swx;CG*Oh;U!(#B+4hsR6l`FfP+KNz*}`$tH3vA)EWM)A2FUYUJn=X0;Sb zjd<=f_vpF1XXTIco5>BJ?+0Ijdf#_iPb1Ztiwd1NBRDPU1jmNDXK4UoN=%dqA*-!C zM|Xe_ZAPoGRqCMT_^KS&y{X_FZ`OAY@ezBLc~;p9O>~VF@YyS+L?`|#)K;r}#uKg| zB?^jE+7JF$nWaDGlQY%?!=cbEhl7FO#}c5=emuAzH=d;aXRy6SlX6ex^u_mX%00vc zqNQu^M-604K6kW8ZDdSTqqlEq^yMV)0Fm+;@^VntGJXv`jiLJdXPs#TcM<{1k zSyVcl9syhCLz%3zs_nnVi1~6AY>QDHI?ecdoh)65qK$gv9$>rH$Fozq;=+S&c^yrQ z|4dKIvpPz9-2oy*OP%v$Ds9kSvmQI=T!eP32lKoiEo^De+4=0`D9?P+EBma>*Zc+J z(v~rleG5~o7VlJj_0%$ue^%(}R6_rzkS7nam3}H~TES1m>R~=kDq$}QA+IM9=e=vR zaHs;tB@|_ck%&FvS2o6^h3A1M1>T}N3o&+i=*Hgd6P5 zm4}uKg2Q7}l`O|KU8lu;bX1Q@R976Q{nk*&1n+k@B~7LZpLp#Es7*(kZr7WcPoiY% z51q>{%X8P_t|@+?ssgE?+P*e%qv1%6;!KgzFA=oAuf?_N%1CFl}OV@ zTnkofc(~+2qLk;iYTc-pP3=nUOVl0quMD|28guNvI4?K5ey5fk;Jp~VNjn|I!ai!n zQoefEs@R1hMkB2l{=j+^@k4X_Eb$wEV*TZ#fC3qFb1PrG%aO$5+@38d)lPDAPHwW9 zY6)6TpACxkdG9D+ZOsDtWfSn814| zUS`t5IW%F@jftBqwKYjDc|*-a^TOD%Ot;uXH}lKv^Gykwl#FOScYhNJ{}+KNd`o=A zmJn5IbWOEZq8QgmJ+;b+6PIFt$EH6=o43lzMb=MAHufVe&HOHQw;bh49pASQy+o>` z7JNSccqvr8a<$y50x~z|_Tl|77*h82mEmmFQ*>tsX_(jv`ZlEmES;KJImxix?|9}- zV>EM2LsU!X9b*l3i5Zb}>FJ7I#l;KO!gxn`lUc8p4EZRm^SZMqlB`83l>Myd_o>AU9?!akRo{E2{U?9;6l`$>6y&)- z*#r;bB+chj3g-tm@i%P^KcbVAVhVD{nc>1di$QHzxNj#L4 zUmKDo5y>J`28I})?at5d5n5VW)uuC|d{Cbjgu@e-dBqAVQ(BBe9_I@!4ZL*-9vyB~ zvT5P`;jFr({%NJ6zB9Yki*IZY#GXa+3V8fkI=9dBAB@p zJr@|lggz~0Z{bii4;ZtjJ8Wj!<~{A<8$Q3a`^ccj_>(=6@R3It;V*;r_uhXuUu1$j z_hyPukC;2Miv?vAcUw&wV5427!1FKMOxsD#o;cC>q9716!@QT>h^j?9aS~yi3>D z1ogtD-Nthm^T*J|c`f0-VdNE=^M_RK{G$SG{p=}oJe_DIl?0ek*Ltz^{otv5+**xu z@dmbC$O#!WdPSJICrGfSTIK+^alz2O1v^Q3Ndaij4c(|Ck9OJBLC(~0TyiH)jL+FA zM)o%J$_DD*@-u7(MI%ph>SVcUk_Td^oo}i!e>Eubcnl<}`Yh)6z+Xfy0reH>SM-@B z+20n=We!slbJr|PnkchkY-L%ZX}`&CPM6407pap`KX98_Q&@jhW=}vwRcjH*jGLsf zqPogmc`4Cyv2$g?-E>oUE6V=l_iLz6HI?FWx``mWTZ_lBjkr3+(vjvCKIcAbXcviC zF5^x{QL$wK5HAIyt z=|fXBDsn8r7i?kRnR1i$n`{*=ffOLWZ*!Gto&Lw=QdKZ}a*J=lkC_#4^{Je{rdv@B ziL2WHw^1?S@JN=0qAmMDQtP4=FaP0>+g~tyRuXU^?tR1J8VF~h!aNL}7q!BP;w@ZW zYv)G$^lT9*XT*<3RK63TO64kiwaF1Fr85P~{8Px^K%&Y?&rHBPj9Tj??SLt))o%A| zC~r(&Q)ZqGVw0+tdhyyyA+HTP)IG_~s%i?LEWbU8m3AMe{WU)2LTO9|xx|vzfBW%i zfDR_xI5zzA)5Xw)%G0D-w?96tp|FZBr3m$1s22UA#@vwa2G}VHvEbu5Gj;1Ha@~6Q z=5=Ntdbw1sM_UyMo)M3?VJ~G9-w+g>j5Ok ziE|^jH!h5oqzjZwe>-JKj7=}ZHeajFGz6&k!c!~JXM?I!uzF7yhI>%~trUUSspo27 zc5d+NsqNw*2HQ9o8;IdOCS~H;?Ci*&P=QT+y4U66BVm0oep|276rf zbINLzn}#5f-=~v{ddSAE4WWFnJXO2A2U_bLwhIZ1&0(71K%X^8^pyb3kaR$0AD8u| zNwQ^dtpj*n7Qb(md)8}-&8dLc(%;OVl|*8(;-i0hU=UUrow0^c?uiS7k#66Pcg|fu zLhp6wJed{ikk?X|JoT?8!un`TIX65u2yTvLT-;~avCdFRCZHYX=oUNCT0DQMME?Mw z%;|BR4@mS&WlBBp+m0NWwdRQlPWp`hlqpD975Gs4WOCto7u%p43FsT5>il)kZXiHneXrd&oy%&C`ptDeaiz<<)-D{46Te3?C+HN}brW{;Jl zyH>##5@}yEwxG{@2?av~g{6U3b#cA^W)?mg*iht^6V3Unj@d16W*aZFz=*v#ys&fU zV2G5zok+iURc}3-#w(~t88`-dL(2nZeO<*!Y8bdctSf0Q`to*d@pW>sX2H(NfJZ^L zvah9Z)8K#O?L5QT{KL1eL$&s(J<=AnrM0&oilQiLuc{e)3xd|HUAr}_#2z(+hLjLR ztr)48iP}{Ot)_(j^MCm~ub<<2k>g0--A9i5d*9b}UZ3;4{!z6kHP!NFMk-wGKw2~q zQ0=82#eVx}yw%SFCL+ZDLdc5ce`R?@bAr*NjWWIQS0)QOZ@55^!bZxk6BGg)G~ zO8oBMz_cLR4-W-!RlMc=CN~9i=uJ)xZ-45mnKxdhi*Y}mgtvrs4BTZN@9JU5@8Ngj7BVcyI+l`@f zEBjGCph@`^Y}(sc3yBT-Y>g4u2ey{JvsObCI$WcTPa;1*NG|Z`+wo#r-gYy0uu`1Ht|8pfXD%=8J5=;!k6qfnx=XW!n?i&< zLvK&6Bae7~a2W`wGg%f~5BB%4?2BKM2Y>Snl96He=e~5fyr49-d>ZuNqM^cE$Wx-@ zKv@;PJ%wQSJWWH2(}DLTGqJOQ@ZaPe^+28PuCCeJ2x+f06;a#0h!F4evN0yKqFl}4 zU2!+Trh_MBn}y4}djebp&cR95Q%^!>#Y>2_ubL(<#@;;Z2p?YJUOQd2HsV*ee^&5a zZ$I+K-R^h`I;4soq7KjzkPxtr|C#NwxlXdAl=%ZnJ}N&EeoV;_-E&!R$df#iw1uO4 zv-0Z+2=+~25T4TI4XGM^(d?AQ`xJl%lZWroo0wU(gftkMSy-V-dkF1TBhz~Jfz zi)>h4dSIm)sxb@Ry%4A6L`8~m-$1aC^@&p5(1^$|BEY!~bL1!O`pRWaq-{=cPPe~m z*l6r_4ob-N0VCh0Q0Q?*+IqWl@_@9@+THoCfV4P1h$`+M70;4AXh5A5iPHo?Q(mcg z)@o7S7K;&QPS6kgXUQpyl{Kio@TN6}1^7b+sF(Ah418MXkYa#p^KT=^7DhgHn%-2j+HyU%J6M>g0@53YzlN}chZKm8=&GL$k}oM zu@_$E#RV!FDD+c@+>VTvmKXtRBgyGwZ;fTKa$dUM8M+^B>do^vt;+9J`#c-q>9+}< zZ)(u6wmcCz(wh_jHbN9<)E;iC9;Iq9qy6OrQdNM1IfN5rELZR1R5otn;u@v(>AK*3 zQehSYH1|{4Ke3Bzn`rDAI2V4$%CF*>fhObdM|2SXi>fKD|{b0+F14%{axnqxi?6jLc8Bf~+T?&N7@6F7SG#j@TE#I%~%=tAFsG7OD#O$rO> zaG+R=VY#xZEhTN4VMDNYfuOQs>0KJbE-|A5 zp_0t$M+EC1iiG8%IPOEr2u#X#RFgAS6k^^v6QCx+*iV!lKI3TRB5ZA!)$PrB9oBf2 z-zFR;7M7bdMu`7?BUc}YgU_*m-70Z$-=a4(kv>P9Yb0x=V!G?5y6Q-uNf)kP`)>e5 z2^*0a=F;rb9o`p$tB~=z_Ut?@iQ>-+e4hyNER=4SZmG;>SQ;4g8Vi+pkpnO4 z2Y78LuSkAE-sdQJ6fCBa6tJl{)URmRgZZr-mT9gkx6o>i75jb5Ot@TCE=TH+{CS#> zWt7`fq7Qy_>e@L~wHXaIcYCa6RIkrhEpy|>Pn&rul*Y+V%OQi@L9OeUHRtZ^gx`nG zxakyWh%(OD6U71=jznNNUU^`!lT+F64?gTzMDxmwV`OxE?Mx*fdOQu3kvKLw zeMg{FgQf!eebS#cOliqhB>s(a0E<@;X;I2Qj)lY{u`4vcd2Z5GyLYC$``BO7*Q4-~ z!4Bg-(p?GFmwPiNp}$Su;n`?YuBCJDP3a1Yt;$Btk93JnwHMxSm6)<>u_!qcqL7>9k9^J!=6C zLdv1m`G2v~)^QAQpd7}|bco_SC4h7Hk$i_rq+HZR=X$xbD$3mP} zw5g?~h2t<_b3RP<%jJlln;?AQ&hQ(1uOs=@?><{@zYw?NTay4C;VBIyn11@;rUga~ zyv9sQs`S3(ZtLkI#Aa8LZRZCBMAH22O$k3jR%&Y5zuKMWF-*K|L9+$BWE#gBnKHbt z*AA{VgxZ-K-kM@bufhMVM*pexcQ) z!EW(!m|{kAx9RSmx8k~rK_nD6h{Q8Nv|sR zgTdG}zkAV>%uai!#R5GL;g%Jxs>qKHlX6>Ys$cG;`u}S5IC=SSygE>+ZoIVYmRFw9 zTCTUW%z_-Y9}N=f`YjtK)>+yh!ZkHH;M@iNW8L3(*o@VbjB`EI*{mJ@N5u)bOSI0= z^af(rE>}b2=*hYmGO!t9hf&knU}EX6bU)3*+1GU`ADJ|M&{qq#^X@JR6x!?dIuuFX z7>s86wRQe*Z3UL5!C`jwSA8@0U5;6!^Zf2+6>J1;aM`DCI?x0L*gG* zQWWCHZ`^g5Da)>gFad}HzP{um9KDw7*PEJ(l#=t~G&*kj^{rVX_b2*zY77TH5|ojP zb(l33iP(s-)=$8HU%Nwc!5w7*Zo>hD6BCZ8g>=&N2)4WxFQt8APn0XR>@#f!XMJ{- z$|ehiD=v1Q{h0l<+sF7psKW-$bSSWL-!^^Jy4KGGDw=M#YIaC-OAEok5uOK> zq^1hOyH(?JTe88t20y74r&ocmpdsC#MsnDZ&-}XEC{DwhuoN}ti^e*8>AV<7x7naZ z+x4dtk_Qrot@md$Dn7Sj1vfs3z8A_}g!?+C&d<1`0ol25U&Q&2Iqyi17Pb1l+Z4Pcski~5$HJakrZ$K;; zyM%~q*-ZyB2R!#4g|3$$Q1%f?R-hjBgnXh@9Y(z}4AcYCE z)fjI~I0JkTEKP^$Oiaj&>SAtEN}V$}YYoNwbFZ!%$8oJ?BgwovwDN7!YQ;@ zg3K5wK->lPP(O*=zyr0J(35*bt(?>fl*NAqa&8L0wU}u8#rCC$<;8#|+*~tx#RBl?;eq^a?54^e{Mt#_mmh&t(B59Z9;qRQ#y7HA zOf<{$zcy=(A^)h(|0CnczojVruo22yl6603JOVTZ42#R%ep`Ir&Ox)!5p4Mo2735=D zaGH5Qw205%@(xk+Q2$)ZYn?V$4m@E(bROPSW2*M9XkY9SNoxA7$vlu*y9z#54;h&V z(8yt18My{78OwW;%-#Iod`1vf{Nb&efYL&zhYP>sl8bW5*GQ|x;B#b@>7aAMnkES< zolc|~E`N|bz4@4OU{jhr2pJk8M8E0O-d ztx{0falt?W;#T5V;yeOwfvbj{sewDByvALg+fl=I1F#^!7CP0&MhRzTQtoHoCGIen z5Av72)gbL*`86niO@(m#->=rgnjTC^>-=z8ioZgWP!0hsv|KW;l6eWj&WugR{3mmo<=`yamO?^|rDnYG*3k(gxF4Ny)f$_2V!!DrbPZ9N=9iWDvGnL+iS zc5nM+kk&yNdkqB-+J}@wMxJe_hk1_4L1Whyvk6BsqaM?oYTKI6>Ybq8fyq3bK}z9U zdj6#kAC3ssPtJV@nWxp$jH4GXewH-L;_t5j?zEs^1>dCSHe~(wJ-#K8C9fyQAsgkK zu+Bs&egRjV$Ql$SZMtq3W}zE#{nR2|%GwYC^IOCg7KP6`=rgQH+Q_WfJKC;LFr6*v zSH@YzX+)RED3G6g?czNgShN3+il)m?aj1f0;2uPo1bROyUCEC~`B6hufDsw)FNUfv zM`ya4%>Sk{1{e~4pSD7=2DQAVhtWnpudeCxFg276s|cCQ8nu7|;ZMvqODx(AszPbG zg{%r}ZSB=$;#CBKeZ~qM?UlysT=$>z`+icfftlo{4eLQw*jIUorFW_~x#s`8*x@>{ zRr(R#16j2T~5s%!d2gsJay)p9Y6b|-a%WP9?%vk z20uz?oxSLQ>j-If07n(GaJIa-+H~f>!S&+`MZq^EGn2Tu$CP;WA_oOb&x67H6FPk) zU;w@s9vwz-by`$26B(w9OXkFuwKTUHyH+n7;QGb?JSAMLmVcC!Nbi-d?oT%!=vLHq z&5E?U^X$@ztVPP);62yOzT_d%)R2t`J4kgMitq7roo>@m{zXDLmKq*#dln+ynI>*t2&3wCavbJshGO&Z!k5UfGuh8>&IPuy08f-L58yW`Ei4$zE-1D7f* zcG0J&{_GD38Tsx&KbkOw5A*h##Q^N+llFlHx%?h@*W7m66!y@`LXfw+hjrP&KgV8Q zD1#`KA;YcK{Us0dCNr&H|MN5t<^H(>XQH(FS#bM)o`b6Ih`X_$>K;Mg13Ep~|v)JV}Uv?N;;?u9d z&!!g{&_&HiaOi4YZAY?lEZvFt??+R+hG3Yd?z@8`A~0Dkq%n3Zu6+xW^aA7eejcv7 z*-Go3pxry~5@Uyax&SjQn(&jc8*>+58v{wf#~;PpG7NRHQiLz{pjh@7KIVf{A8HM4 z(=#8#M8))Is{->9-=jeia=#*?0r0?uFvIj=lmOP*9Pa!H{7I``*HDJ!G``pYv-o3u zdDD7>-<9GmJqaP6BO`e9N~)JYvG<7@y;Zy=ueaJi65ZJB3|y}VcqbqGsFr+b&aXxf zYjMgN_o!6-L_Yb?mWxr#AqZ2hc{dw^A!h%hx^W5$2D@%XWW&|N{JXK`c^iIKL+9h7 zvx?u~2JW=^g@WxiiG{}>N-2gY3BNnmry=kA40GZ?7v2mi75MLZ#;M3$bIc_Z?Z;j{ z7G0&e#>4`{*guM&BF*iN{!vN)X!+Z>`twqdI}Kbq&2k^3F8R!BdNt@zsf)FBXT?An zdTSwc=5#%NSs!Uicm2h9x8xP|xXtZY)lfC-ddyo0uXHRQ$>%GtgWcn%2UR&CN>iM# za;EnqTTNT@?SYS?ak{rHs6M2L{(t+lFyY_15GL^VM^-2@W&#-Iy}|!gj^V#o2^b+) zz8(2BYdWG%MKXd}FVHj|^6bh^e5mRr#b#o=uvm%#w~dDFBV*$sE^t{1uTw#`!QWfbOwQWsL6P`oV&S~4vmAR#P9dWRBcn214Ha}Xwd z)b2@X7z3X47Hb9ZvbyD5&fc;aye@4+%(&d8SmP7lkW|m@mTeY3WRDKe5u^^ZPaYIK zn)fBsK}o^(Wg?L-ZXMr1#g<6>dw&h;bt1r8#m6t=a-2z$z{DdpMZzcK8h^r53|Xt1 z6n$Dn8u3$T!}IIKxY|Ug!dVFTze4bN>Ga3j_~;9hr;XjBSjU`uNmMa4&dC|aeBmyp zta~pWga*z&Q|1i=;p0NgA*bzIAx4FNa*MoH{=!Y}n@th8Zs9JVd|?ic%KXCs?)D5! zem8?5=G$g@0}}=Je@?%OWsOB$(ky83jh;J^vhn=5MY1~HnPHV=`q_@X?1R%gR|NA2 zV-0Njc7&b1W1`W-;eFc*(^Sk=n*Tcrp zj<@flQ-vfOw*V@-6CcHICY*u@ztV{ngFLSgZMiGnz7y^CW6)K(0G_{Sg8q)VN2heA;?X9zg zPN*|LY(ZglAVn2aGcN8LD9XLb&ZL5`$PQH-77-F~Bd11}r%cBjEVX7+sF$OWaZv=Z z-!x6p>?};*KxABACumd>qfu5GoTh9L-^G&Q=7#D4X~Jba-jC_C0B4r*Js=}V|EZr0 z(n4X4y}gi4b$MNC;rG^OA%Z5sG$1}4z zE|*B@Adm9qdMJtEZ$D6a*T<5*;QhRRWty2-VPEU0jIP^THET6c$$?3_H)k@jk`O}_ zH8RdSfQvFBa;kED4-$|d$#29+;EqzmYM4O}jc^Dy@Z!lRmYyf^vpv>Zajc1?V^;X> zORl%VnRojw90uCdXJsANpfV;pIzBA7H~0fo`qSrWusD0j6Qo zL~Lx?i(s5S_lH4qLS8s3cuXos{Q(3 zTd2Fn!8uQJR_X_cAt556>---T7ettlomtsVioj1=PxxHeNg3(P{SIJ5o#onL!+vmWODH?}u8V$~xUZo(-j z$JY)k>*tr*Y4$pyT*;5HP^xL>uH6wRR{-9=n1dOZET*56_>-DC(&P&}B z6NdiCfeuY?bvpUFZzBC$VQT8<-VmWK^!sk2RR_MLaCRv)fEhwzN)u)LG(Q)W3#IF- zY>kw4U6c(IkZOzKXsw&wk8S5BY!x5SppovZU$>OpY|qv*LMVQ!1sT^-rTJu}wyE=WyR;{Jxz~&~pOZnzoXpHoX zSz!Yo3&txce<8QWjWux?tbP&J5~98)_^SM|n%ib6ALGK7GmWN~X39GM2Tb;>b;q<# zcN}kS#-L*|-^qEF&JnZ$j-@^0&xiIu%x9iZ$Dn043vYw2?%sLJPT|AvR4P44{ zE_M-h4JKPkdayQc(*6>jHu098&Nb5aXrfHzZ+nJk1UL7vlp%A*s5Z_v#lc@tDwvb8 z^B^#A<7YE*Za5Y&8!PFh(u&e#+qc5P*SIj9lM2g2noNrlyrOJRiPotBWc{nludbV| z=!4w7!X#da+PrXv$GxA_yU^+ISGsfEX|#TG0GB~f`mCNAD-}Bnpox2a#7uT34j_n% zxSf%hkkR78$^em6;4jTvkVgY(k$y)Fv{Lc-fg#%2xQx0fe0SPMGUsply+UbQb-+ZhBN(tW6TrE)5>HiRvg_$u)!rvBrnGhOfAYjvFtHNm1e)h_b+PP~KA{O4(B! zrDsv-X~AO15^pf^&4_`!XR&ZL{{z0IIK4xI`l2SMuS8x)2mB`DWGp0Gn^uR`)L zHlNFoszwwGulj`yo-D2GMx@!uw=Kx?s`7r;qaDxvZyYLoLtZctX@;la*p95R&cu2D z615uK>P_?pPOA*Y}!dI5fzMB2CMJhPBg%-2l4V}cjo=x z?z9DeyPx`f7J|xstG99@m+y7dBNYPSbWrY4rq^upi|^!S!4hU>uDqQ^)ePE`(0tU@ zk8a0r>Lou@JKX&{h9#-TK1X0$vtN-d@Vu)0H!jbg_0OnD#o;NVyC$pSv7oyB)aoUZ zZiN?%67|)+{a$y(=-VTSO~HMn(PNPcU41etB~G?ipQziF~S1_|$^_<8nT*9S#3kyU03 zS6gl}@6mr!Zf}?+=ylSRaj&Sxd|bNz;h~4{H-#x)ThtQ3CXeEX!9pq}(<5cLPZYldkb| z-CYdiTm>rRU8)wY%i=hs9+_t5_pQ+Me^i->o1y(ylw#%+J&3^qZ%Wd;ZklAYwQcHrcWZ>Ek7!K{h35NGdxqpGvDCRld2LvY-@lr z5Zd%;ZOODh;XHM_csrnSIicB}GQ_Vr>_kswN`wEm-boG1)}RPY1g~_GFVl$89&(lM`@$Bi`lvc81zGW0gED?j>OU6)`wSzl$x|X%70-4k zz*)NHa?uRQ$bdkT1h>WQQOY;%yg@suom06l#RHAh6{n74-Edn@O2Tj1SM$U7l0WeO@ves-caTn0|JEgmo&zh)IQIt{)?veMvOv zNMupKfEB$qwq&J^W7?@WOsyf?6EGvdZ`jdIrr}mjQv2GU)0ZUm1~8)!;3il{oA8%7 zvYr*{C}K+(_!M0U?QZl_ho!W(1T?qYIA_p$(!FKj_HJ{cLoI;YHK^z7X%-v9ThFkb zgxgzOn;^WU9T)9Msh5i&z{N@_VvM8FK%RZ_KJ+@KqHGJS!8(K!b>qr#^u1x6^5x_7 zpB|OBVD#{d1(h&yyfDzucyXt+v|eu#>QnXSevBP&beYVWaPq0d#FC#pT?Nd3`5%?r zGBoKsakbMNZ?si>hFvy2_CrMS6@A!31kv}5EQXcIU=5_!p4r|DW0fdXz&QNWhO^#4 zN4QdD^|BLbkQJHle$8*3NEe3ez@%cPDPZ z4Gtw2v=7YTFC9^H6W5Th4~W8ujSo&TXt*D-2zkczvNN0WoA-cZH!Q)n1XXzYbngoJ z;Rk!94 z#akIGexi-5Rc9}hB-IV`clCJ0Y|hX|?f*nOTIkIEEFQnn18aLDINna- zUEmp}`DE{lO!yU|D8w-O!pLS8N=n56Zh>{4_H-(oNEf+oWSXd3>wW6XBD$p+6oQ|c z6lp(p%V6HvdWE^j?OF!1l28+t?daeAw9AecB^o^7Tt`{!`RakP07{D0{{Hc<2Y!o1 zTBPTV{Uu?1F`n&?UVxNF76}ntSk6o|(o=XW$M1Pv0g$P&Qy^IO`C{$>jWD{zPVF`o zGLMe4)W7`vLR7nqhb2=9zrZstn{lTgQt#Q`T9^Y={${P3`j{*(3bEB#cX(4SXYQ+W=WlxN(SHY_3sZ$Gzk|5=s7Ib0`4~04x zQLkawdWv?8AQdBZ`4z`hH13NNwJ`>iLAFhVdqX=4MiD zW+9LR6h0uUA@27I3`lc353g@v5`t!YWO0dKdUD^KWlVx5=b(*w{&Z|PB z5%d(eLiJ0arPs!ZT1}{D`s9PoRX*bY&v(xWMDtq1z)D8DuDezSxW+8dx9umvtXE02D;p5t6teR(6tP=G5~gxCC-H*H)i1C z2wF+`<@sU^o}p;iPr@<5z9V~hfSqWS4c)a1<;ltkVPUwUfW6IuG2{ADxc2iWcU*+n zwOv!%%dfGtlrRw{T5!s61((J>@Tf7tsXuH}Glh~hr-!I@-V@*^Qe!Iats^5(iRGYl+}HkvYTuLZW=%zoQtH!`BkKq(_A#G+4~Suke7^$YMia3 zIH8h}Sb2)F`y-Y^v7C0+5EP}6f@6sbJ~sAsP4)Zn!)l3=ocOL~Gig!pZvh_2VqN(T zWBE|N4&5rLaPQOix+*o@N@?$t>Q&kTSCiROe}?@kpYh9%4R~@HgyEJBgJEaA-he=S zetqvKlc)(1N}FnxBx2bsRxf2a*RI*blpM=Q&_~h*aC@t8y#Gw=4PU8XIZpqM_>26BwV?6-!5~qV6`{PmOT{pNwzR*+qOm(P&|4o za|kb(*7_<-yrc;cZB-yCCt`q-#$>n0o0WtIrGa*RBo*kc6skGVu_YHW7RuwGKdO7h z78}z7o2M4gx%Fa(W>NJTDGQne3*hqRXXg%+gb2b3%8oM?=t6q8G0nUe2u{~E3PXq5 z%9lv#=)vO8>u}iFt@%BbIEsC?8`#ytqyW zzePwHG6x5k#7}FX)g(3!LyU;j3#&h@JGvIOJMa>dyhd5u8!rY{vFx2nW7`%9KFAeu!Y5Ne@oA)mVOXIKX z9c?JprUr6RCr>EFhKk}rbB*TBzQPb)?>U&zfp(MBO}!@9+k1m@y}qkQ{(RPqfu}D2 zE10V%d6T?5peFf2p$~p}%{jCuiOuB&m+p<5=ax1dNoD^kxOlDU#eeOzjxvy}$PnN~ zABFk>hXLMMstj6a19N+^>lSJjdfLcf*LK90kZw$!LSoD!yjeG=1!?vfmAN&l z07?JrHW=jdA5btlzXuVTrO=a7SB*J8AN!O8=8r^(&p+lp8@ODL?l&L5L^CKvPzJmm z{d%x+x*93Ld;Vsh0C0hOZS!4Xq1|&`6J@Lt{8kd@q{C*(7F34|t6}@@ABG6t{%TGJ zpsLtqbw+pw=@WC(mBw#Kk+jf~ z3w1ffYn9ck_YnD@pjuLqY2l(Dd-KotUA<{BDsDYj*CLU+CkzW`6j77xand3yi`D^RQJtFlk;&#%l6%n$M9@f+ooq>kGE;3wAmEK}E@ZmefX7s8+zdiWhv zj||-(*@hThl%;PQ?N>Nf>f}gtjhQ@K*%Z^QKT%e#ca$;YOb71KEUo z(?bJy2)fg0_vT}{!Ggm)QkV5LDQ!lNi|hx`O@7dGsmaySB9$jC0-}J)?he^DTTgv{Q!<+f>P)_{02lWv2)obI-Hc4AKLx`Em$@I- zwIV~HdshFbJTk^!riRFgN^JsVg@T&Wcnsc|8N5lrAv!CNlt~%uKCzq)p7MkvSr4xut_Rp>uK_f%$I%j}=h62I)m z6*4Wn{zivqbLHVnF4kK@%vyrn680?ZjlZc)w05!*J!f7TkP#YRrBzuHwnHuH zCTmuGrFoetOW`oDp=KkhJ`-+dr8aPCdRIfZcV~B|q{+QRr*+mUs|tm&=w*-(prji> zFacc4W>!pEO)w=RkH*U` zlEfj0jq;Px-U~_blwp{(NuoDYRpd|tFVWa&H`{FPtqvTggdqHodA{QEpGZs0t(|NK zPr7nr^W4V^+>ifu%ocHf_owOEtbHEa6>H6a(z*^Ac%LvGtbCBOoQCS9MqU?kRT5mz ziY|@I3@V#VE7Grl9nZyl`epC4GKlEC7O9o(Q1N6VD*TLxqY6$4+KUgYUCCRa&)JWy)ug^$ z>4tGqz@cBus)3h2WK&YG;%Jdq4n*G{{p5CdvOMT5vFmBxONOW=K37Q$HTNeyOQGty z4g+*KEGjlOrC=CXB#b(i7_-PMDy}zxRejpOhyuic5AXxcgsMRVO~fesNWpfxyI)H~ zuk9l%6{&=&#knol%tBlK;arBM+oIRPeF{mh&L6{)!ZfKIwew7I2rh7h$s#;eI44YO z**3+pd}Xr0wtAm&ycSX*48OsJ`&}j+hy0ZfgH9X z0=mh0{(GLR4tA*mTmFf8M@7%OVG-8^gCkQ=0sJIQqXb+A6JZnChc?=1q&o;NHu~l( zMM>&d8%G*_Wd53Q`h9tI+CR6m`FllvK4>CN*7ZO!8)a4tdRFUXGPi9Ox~k9nv*1Tr zbCX|qh4WJ2vwI(vp6Ghnu~T4Ihk$8XP~-g)D?g_LN0rj`!)$k4wg7nNRHT!rQNhu6 zyMjl}ta(r2&kM(idQvpS$&smMQ01J*+j4&ni0}NA>6pfSFGHp8h6VZWOo^yJxL!ailQ=n@9b&JSC{#D2oXLh9}}ZRQGH}mncMyoP= z^Tw3Q>iv-}A*}bG@XM#fJYfA>59LDE#C9_0VjEa&@$19423F4&0ax?_p|tr$T~Mb_ z{$==eAlO?^ysB>S02nE`{<87VzvcI z=UkZ-zdmet4dOIGMpX*F;1%dE%26Rn} z$B%0sf8W7VZUIWB>-4ZOkW#f#;@A`Lx+%z3+SR4YX^KCnlR;z%K<^hu(^j}SV&{%| z4bjIlG5hc|cCA&##6){uFC;YRQ`hHiCGV8Ijq#_`n5f?(!3$pOuCtV28qJ>(!wMo^ zN2V9>0O_XLof*U(T8nRQ8k?Ahu?1$5)0PBW)Q~i#YQjEG$3On6Z+L5GfoxLwEV|fm zP-igH%2RrGuTeYP(?jyUm`Al$&cd*3!WWFv`D0uW^H{{c+*vdkjRxC+wQ-_)JVS) zO`#u^e5JxGE&klzRIwDuOMmJo_cOP<#Mx2a0MMXGFa~DWwZ>B>M-68*$z*x_xzT#c zr6RGs4Of`0GcVN=>S*)?V`X$;A8oLaO1)Lq{JrE(K`O(RgmjSeI%j-Wrig79D74ws zWWfq`79(@KY225*O&5Kxs1@QVq5ZRM)jmMC{Kmb9=Dz}QAZxREGtV^8f@+Pi;EP9 zL?xIGiQs{7;~Ev)W+3Y4I%J)WIX}1Z=%OrqrYDvhSo$h~f6o85_Ogvvr$>VSJ^n+~N)U57X1P^Ze|c^YHYjP*OIqR-Z}B zRu~&N-!A0DC^aJpLv6P*HXR5OnsN zLQF}K9&kZa2qbsWHDi=z@=6?ZdM4!6N(j2&a6rnBf`a{{$}SvTIBLy3Mq??PsGt0w zE35zS71sZcfA<8WepW%1a7o$|5TL z-&2zu@Rb)}DglEppQq*7HEu<*Go@+bor^UUV*&r2K;#Lx!v0RjL&S%lXW47FNrqn- z93-sK7i~wQptTfgq0R5hK#OCILtlSSIjSdb9V?GV%=ZS`aOF zsOo_538}SN(hBhdxd<_)jn8^`x}H@KhUDXtHJPg4Kn^!dZ^od*Uxunmjf(I|Zws~@ z_GeLR4s!%eU!Toqr6d|X=b{QJRPEVYK5p$Cd-!y)fwfitz$TJHZM(QDa#_cxd6$+3 zcodtbcXZ}P$w!>nws3$EARhU0Ugpv@02|kdDU(IhhY~xvziutPAF!G!{MM&Y^PE=m zhhNLD5@}M<)?K!DFUk>KK&FXin_Cs*<(G5D1i&||<7ddJmaJ6KyNdUkqgn@BDNt1> z(ed44sJ$jNXfXt9>e&dYxO%DS)BZloe7Ttt0cK=b==JSJ(iZqdW_Pzk%iM*fBiLiv z1l}JW*Qp<&`Hs&*|7O%$ z!C)ZGpN}{BwhTmOFmBciLk>qG!`*A>Q3K%!KPi2E#Q3OM5wp^96NZ6X8ewMYBV|$F zpJ%s1WcsFuH2C3xDOXAr7xC&>nYFnwz?rh; zJG3s$h_{FS4Jgp=@5e81AXPE3iQQEl*H5}$eI7(!Lxs$wI{#BVTjsYm z(=^RxJFAteX;A;&PVh^0}!*Mq5R7W$fb)`~M-UXywB{lT>%eabUA@m=Sq*-8LQ zOwX=CGnYGuh>fEv=TWVG(3U*bR%T_4@mKP*U_LIgqZ&r8@O~)=Yx!N=?ofV1U;Zwt zK;@aB*nE(2qfT+~mK8=v@)M1<_=Ib6nZXOF&hkRpV~Y$CJ4^8?c)nN-I-(>)Fj`fj zb6G>;0zM$(2-dVD7*gV#NeLSlUSR7{p8vH!hKyD)K{#;|&a_L;BqNjg(KHPHg(=Q{ zsb)Ux;+{H>>D@3oWxG&V@k7Z}k?%?CsMe*^&t&!Jby}~euaq2qb)v+R6!ZQIsK!;N z_5F_!6Z=mUY~Cu3$VNkqqEDTZaf97xtuA|4DUL;I_>QhKU)-QutPps8WSu6?T_QWx zNhHCESXPu3=flJRPPavOF3kLzv>^%NFEB~J3ShIoSoe=}i_^$6h}D}(`K=L(Rx=hI z85iE+WOUp*oOdp-b1t!J2M#bLF=-BiAa^%Fq0_g)9!I0OWGh7fyh{gVFHT?XMC`!T zfnv}X9|)w#sR zQ-uCeg*O;lS*F>fit(_Wy2$$$U%qS*Q% z8t@UoAiqvaYB(9x;Jm2l$~4t41SID`q)LVcu3l6lJP+2H!LXsH&a3+!BSC(`$q>{>P7UGXl?EN_d5 z4wK04G!2pNh(b?F&s4zkbAN^>6so=w!qmUUXIOIvt^s*7ptK+v?d20txNyF4H4EThR`CK#LtWM=E{YR*{!ygW?hOYjfrNbX2z)8yk=!% zEnS19F~|F{iKF0j#H2gz><oE5wYwXWibGDa z3rz!@WPLO_u9CEWv~h&W1Q>V0XMQz1tsBlc>$T6xIU4S()9%<5bIa2p6rv_bI%2dfu{A-SU(cBp>{5O{ zq9R@5S$z=k=PDE9UX-uOVWOXBd$f)PE9hB%*rMUA z$x&S5k;aw%;^yfQAQymbH;&n5mh6g?ij^p#-J=tg|(0207jJl7!#I zn_jmk`SUs&A*1G1)E6q!JH;#}|A)7;{A=?4-#?0qv`Du~w{!|B(gM=WL_`>Kbc|NI zk#10G)Ihoh2&0j3lr$S9y-7_Nd;j)%{QigUjqS!ByLIilcAn?)I*#Yj)SEUm^p{>1 zsT}dtiC{yZ4E+sgzUabgp-v*tisJ~PO>nGM!dVDU2s9pUM)xY+C|)`7MKvVLM#uC~ zc0!ynYv~yHrDj-jcMx%^5G;++vzaGw+gd{|he8?c)YRLRl3?4dpTTIdSs6Q_`~l?R z#Kkqsu|dh@_u-Fqm-kp5ysc?^8BjeO_ZCeqhv%RBm$>YquomXw6mplfXN_|z z&%WmE2e`;YhnyCnFoJ}cpqP{m|ZD86$%FSPSL?-fNoU(Lw$ zNS~&aj<6!>0=ib*SB3c7#pmd@czP#E0HbTGg}ji7n|yv-C_!01c_HQIviaB@l&!fA z6^B=CR+f07D4)E=BDyL_)!wxrEg`$VTGO-nn^Vh7P>;IFtdrHZR>_sdk;ZgS4$puG zIhdEaRs((8qUMhpI@8+Uw9kA748U7PBY2EWbGsy?H!R+dJxtbkAQ%j$3lUtIsD3jL5)AU?G77hI2c zAZH1k<$5x!29n2#ppxX#u(mi~eX`d?%PB3(lI3q)N`Dbs>n~X%e`5CUPrKKQfzHsr#j<^j z)#(Ma1eLbYU9TMWCeL?2TjdAL#vLe+vUh zI!~dr#C0MGtY2q*DJN9t!RDs}OiCKCqu&kh)84n)6qY?0H1X6}O(dv6DyGnD5wOr% z04d%MOKXCCRm6@9fT>qMTdS$E`{TXO#f=3-^0jrhCEp|ryo=x8ewT^1V$el=8L;@1 zjc4GtYQi!PNc-d&lcm5##`6Ala|UA0mDbR5N*aW!$j1gddH(;5kca>RQD+l4RkY*GI1z z1tIPhVpkOpy|QUPWJ1j?bv*{g>8Y$EKkO=8yEKdFC}wdS}B{v)}qVz}8$x?jZCiQ$gHKi*W%Ioo@Sr5=vO zhpI4F0JCVpp|w@2-_QW^z00F87g_cfplYq^JtT+L7WvNS5B=DMC{)5wD0SZDo2Fk= zv3PpSxUHUffQ0*#)?Q3q#>1WWZBg&krL9Jrn^RAyIYwaYS%#URVr#BS(cM((K+GO; z6wIUN4!zyb8MmdpmHgoLhJ%Nf=F@=sX|)G?*mc)1(&NLoGrL)*8^ws?mXJzt{zP~` zy071%U~;-OjgJ1fL{Eg}^J>b5Aj&ZcZLN@_%kg_x7!o@qm!HfD7?mcp=-(4b?sCVPq+1WdGbK?zg?kEUo z8W)k2;B8bCKio>Q%1JZOssE#Q!P1mBMIgVt1|eiSci&)=j$t6aO8!*`I4&R-oxA#p z{@drs&&=<#pIbVU{yS|Dtm!VOeD%T0;wwkdJwuZB8}I!NhOZXSoXT~ZAr(zfGGqKR zGLtNo$-L1&7lHg5ZFp}_$ry4#G*aOf!9g3OmALCSxDfx1xWmJqb*5g_34_%id%lk5 z-WhQ>4jZc^wZqE?t1IdvwKk>c<+xuc+LX{+*tWy<%FuZo^a&eiDdva{^I>@7ByIss zC?u*h)DU&c23-Eejh=POtcq9#F;@ubT?*WdIdXd&GeDC!(I3n8EAh6sSU?+|o(EC% z2y20-Uq=57Wx^GI!;5C?;YLAdYW1NWKCF9+3T^3L9#?S*&pu^99bOe{7;%2^K0}8+ zwqkBUKVvw5+-j`fWZ(UFKFVT9BEFYHl)x9P^*;-~9gcfrAulY3n3(S21p&C>`gI_s zFHDzyokUGPj4YU#nnUO7GqLyvQLCQA{X_wrKWtbzY=xcHrtapN6|5!?s%i6x#;|Dk#m}M ztw49&lUXOi$6&E*YFrFaoO>AhWS@;}07i+DOL5v1xjWm#p|b%Z_LQ&6E&S+V>1m#E z_XXQngNQ2>r#R}Bz5bT*l0F~OF!cS$wmJN(0rq zxQy!UD~@dIXJmAVNLjDlpo(loFuoEu0w$8}=jgPE-5zq3kLM&A_$; zgYJh);T�S4j58j^6Ru`(^d#GSBNzE7H~DKN3+r1l8`-%EoxOQTSEQ<9Cwh4Brx> zAF>pPv6*qoPP_=RE*k4rFsWjw8uN#;c8G6w+!0YG(V5|kaiw1a(OGukb@k7Tx>z8?5kbG!7;)5jSR2+{&B+B+9@Y;*sFH-J`c zS#L3xta_%^|82<{4NA#A4fFVzC5dL;H1Jj>XkvwATG6Ko1kf&zlO>}W5>u=7b}0Y{Yj zZVPF9t#aVXe}=r8hd*oneiAuYPhM}*3Rjg5MJ^Gtp{_m3-y{0N$VGj_7;)~XlTSSq z%hqxoyc5ikKCRf|6ufe!-ReH!@h`C3qn2sD<_@GNx}~LKmgxGio&W>Yegm4!<1h$Q z9PLIs{xNiIe~tB;O3tW0Ian4IB0n&_Z%>C6yXoH}@FL;LB`yT6w)tQl^fG8Wd}P#9k+ygD>G(sZxVbg*w?v^DR| zYVr7F;k6QEd6PB@u7S35NAs#aY{Zq`bOi-%l%N4kl*2_(<6w;iZxT(epqs5LvMsJy7aK?w|mgc2avLrlEOl0b}4 z*n>q#@|gQAh?+%DM<)DvUU%k_22YYOsupFrwz6E=xy%nZSasVsWNaW7m!l7gm!4J;K%Xqm&-_ptP6{@|Mhr1wiI4?6pF@?By`?qrasR=^IrlMGzhc?d zuc{Oh&nojT*i6*W^Psmix?M%~T5mB}O^GjxD7wHcP{iUY|JGhA6%CC1k5H-UW^UR) zowNQAY>6|M^;fepH3`?tV9p~qf%(u;e^dxRQ7>=QbLW2{p)Wz^U1b`eLA6g8{l7*N z{wM`=(`qeRgXAalQOM}W*P`#8$(UM9pl&_^zQGowRmdW+4R4L&w%Oxshl4T80JF#j zMgh%o#p_8^hU$$K-rX?2H#N1QQ<18V2*YbET|_(ZU6dH`FpweB{X@5igU9a{YM1uO^Uo44bhNADdK=Xw`a-uc6$o=13c%!exA23Ye%J)E6Y zmU4Lkc_O1m32C$m(bcm$OWvJ^7_&vw(+!7ULa! zhIGsnI%YqNqc}7ymCOPHICWmq8$($&WQr0Rv*|Y46DSiPGeD!F!eh~DAwH-0Zil9J1hAiQpTme zM2B=yQmT!_%}+n1wzl4Lf#Q?Fxv0INOezGcW(KpU(9FPmY~bV-kP7wvz|$7 zeQ%qoEiKxJkf{NKIgCWpr6PEaRt|5y^PmnqyKqgvsnzp@zu5Zs1a0#1PBLp@?PV<6 z$1U;B8p1idh zqENuL$dGA&!JO??XVEuD4kgCAD3EKLCm{4dx7zNzmzL9R>hQvh3XS)9?IO>;mn-2N zZ*Dz$o4I23Vo6(AuHkORd!bwTYL1!M9>=WhFJnB0#pDK=+Q>waS;QElu<5|;MN_6i zi&ej6b#kE+d^$3%z&LXe%L={iWK{=LLHqIO4I?z0y=T;1oc+A(*(AJvz?)@9bbq3epd{T>#9vZUT(#pUaEV!S! z)8OJk8XfUyFs!^b#nDypVNkh1E$4Rnp)4Q%ZYS?SJ%^rh83sUlc|i7k4~pNOBi*ikKjw>vGQR0y>S7++!WV z?adYHoX%$KKl3dp7wATIftT&F3RO~?P4|#xdnVyfE(@2L@OYb#nR%UUnrGct+`Af^ zYRmZ-#Y8Y-Jh2xLT^|ce>K%BdKEQM&UN+6*yHz{}HWGiIr*Kr~6fYAWfFFr$5VX>< zwOA&G!)r=8&NMM?jpmDabz1QN2F?lU1}`2 zisiv#%1|Ci_#{GSuH=_HSj7-^U?*=f9sRW)T)(pai&a8a=W*7x5%MfsuUiSd^i1h5 z>%)I4_MAWWoL1~&hBd_tD$$+>g#ZWELDLM^A$s88;LzWoL1>7DdTCtaRc`iu$EPxm zQ^u|LqSQX@?6o;-EEmcOHY5Fe(+|RC697rv55iCh-*A%)S=5`6GtE|c7+_Yh6R=JN zT;U=waZ|)2mlL8CFlYMewl-RWV*mb$Di>~f^X~4EI@SU;oRShHh9^=zWH9o{s@y<( zcAL0!mgXDBAyrk(HqmDmdkz}63HUHC>w=ed_f;))iO@rq`~`#U|2lQeN+?9#WT}d2 zmB{y*;Yv3U*Yfi5NAQY|;S|N`=ErG2IEVR(mQ6yKMso9&;^>CR=1Q zTCon6dAH?^E$G}{QHpiU(s>sy_={p(qdFweb;akTg3uY!z*{%{)GwUozQA6@GAjpL zWIs6z8L;o2)*ZT8u7R_w>-d4LIV!KkT5H(K5QWd2G@hiZo?3Lz7@ovR?dXW zeD=eB-el!=%kU6*xaYS#2iMs?)8QAw@OFqSv$6e9FwDR_ek=5}C(ku__rZ+s-&%XF zBDt)4^~VJb^!78qhnJ1P?OJP>u(58#S~yu4Mg-l~uNJvZC#yz>v$6k$7eIBZ88<9E z!ZIdyiow4FzbvgAdW-s(tOY?dI&&YMJduyH+O(p-cTtRXUj(3wQ<|;L)Yx%618Xvv zspy{da_ha$)#d~+YT_lR#s-A=&?J_4G2zkH@LPNIalDbo+uvrt!}xlew2lxP^^4;h zVexP>v>FRu7+ar+mq6!t^~P|M69jSTD10DIigA(Wd#?Xa8`53j2?qql!tb5#H@ZAcW%@1$l26B9&%;h2-RKz(8cP!ga zhe$0CGKD_Ez_JRfpZ^^(84zE}um(@8X0{AY>|5H}5ZFZ<-c{}_#`lkzerK$_d1thf z06p(aE@1EO=qT%Or>vOI=dOhNJZ)(_q#qQVA2O-_^P=pg1c8jwX>mGU;yUdLROX&f z86ID!UWHsV~xOQVb9WJN|`Wy$;6kHR8*R9b*L5XxZ=hhv!IYL{#7R|{dJ zCX8s-a7WcA0?1(mMcl)K3!5I?w!~mD8>GoD2F;(oDRI~GPmj@W}JL1TRt&O;nu&z`da`jx@^AQ? z@`F2iO%Mmf=>1T=hlR~`pTsqDa(veIH)Gl(R5bUiJF=d%I*HEf<_)MA5B{y>(=jzM(Mt_UD1(Lg?l114{w^^P z1+&zQH7*uFwYRQC<;GsS{Lh7f^QIHWe?GYXE#Ci;+?1+lp~-q?LOF?Jr@$$Smib&D zw%2afCr*}}D$KRJE&O2PROf9ry=Wt)ve0IW)|ZBt*Q@Ol0tE8GYoix@Wm3Q}D$Sz0 zzjkG6OfAh_UI(9APm3dI8Jt5E+vB%HL9zWkd$eZ_=vDD0jIE&;isI!1%~WtwqEl)n zow3%sAn%vI_a~n|{ppYG^h+BTeKV|ug)E^$z+ACc;yh}tG_Sq1DW246_Gi| zKl&@9`rbHDLLOo2*8KNladB=3fYNNW+rDURK1}S;OG|h_Q#eDq04*7=EA$Sy$B@<; z+IN_3b9^$3QzMX%Uen?oan#o@a1rR?B(kWFcy3s*nme@(u+?6n2iw|{_pLh`mFsp4 zzq^6^Hp82&kki-W&GBc@EV3izk{i)UlZsk&pNuQ}4IH+a7nhx|U3`^=zBcc%OglC1 z_&XhNnO+X36s-1?s7wuU|?%lJ+Md75Q{rnb{V4c?&e z7%k&BSJ5eV=I8ygkN`VZ;}>jY*_ZvZ_O{BIYiT|;s!Qdb(>&E*cKk^ zT7DFp{!61s2A**S7z2@x({V=Dhj@$&`ueZdYQUrp{bGdK1pJ5WqhI}-dO@7Twq2Q#BLzDjdb9rT%XN-F99Cb_2X zoBB9wisK7`U1c%@H7?S^;{GjT$|LZCIF}84TCghSGw%%=inzE#IyyQ`J?@>JrU>J- zBplnp3*_cFoD+{81^$JfPl8A{&JNW2PNEXKw9`>j;ahe|nQzy)W=59QV@LLtH_le) z7#k6Ow^)xpe_n}LE}rj6xu5<`cM9M{_IJy?weCNX`K*R5i$<78%~IX6{i@vJ`3k|X zM;Y&XQyQ#+?Ly1J)KcL78~;>THz)jckTQ1614x864uc2g<1 z8*`LeZTHW??9JrM%I75W{~I4*)Q43?VulDJM15850i=SdE!DScoL}1DqD;0qyFo+L zJTJZ9EVyk}>^T1JbMiM|1Cx@oIrF<--ErNc(xFJoy1?|Y#0$bo%*d%+;~A<+zTO&A z3T~tE*a2sJ=-5$yI$6DA`EjzdCK6$oJ50&tGnY}AQOZ10%8;3Pxx5dFcs6$Wx>u-w zqcP7aB={~PmF5$UYRg<}$>0gsV`4CC!N&H_*9_kK)gJ96%nn&UKHeqqGFX2unMOV& zLTla0^lRige9I|Lfi&DJh(=3cYDN+EvO2!@CCc;rCk2Hcq#W4xD-Z2G`yh0}%`e@k z4hlWeX_QT}QjxM}1hNMypO~g+=AN17Z=YxRPnjRq85m$yJjRS?Ng zQM2~4nBsvjGDA30i z6UKTEx^eH~%Vw4lunW}afXmN<3gJAT2WsV{qPb~5sxmXiWismjM>1aI zt7zcw4%9XL*RtpW;YM)NK=OyU*bg_{Qr_N%}ry ze2SP5oFjZv!{~8J>9b$R;&e(~LqGbrrh?|vv{Z@Lfxm6u{Z51G^GCy}?Q*m#_+du; z>?pJc|)jffG(^I&-aE}Dr= zMu^ISaK>tJmzq;Te0)gAYKYaT)z%|in?SL&nYl%treu)r!|%ZkMa^ zbv0IZSNWhtjkgb7>iu5PL#)CMeGDO*uZvha8oIEuJL#wwPFTvm!1qD|6?9Cz?XV+1ND>83&M240{|~7{h`O#2};ZOnG!oH}6l17Zwyi`6j9_P0dbV7ZP-l zlMR!ZDoszX$~=yZE6ar{M|DK_Sel#D{L>FwYG?4*IPdHGxJgf=2StId98sMbXd|`_Y)iNWf03e`HI~ zaM-+IOmVaGkvs@XiU3f++3zKkQ>HvDzVBksG9P>kMD)2wU9kCOqC}qASjS5+?8#U8 zGIf*#R*8fe2g^U}-HFYf;iTkkOR`bwMvujkIMlhoC_8{oyykw=@~ zF?jQ|X!z2MiWY2n~D-8O3d9hH-yhu4o_xcda%fEkxW&xMv z{q=~}i*sy?;<93$=e-1Zzr->p`YI>M zk%P}h+*Q=E+?rk2oRQMSGB3dH9QUW5d?Q}#FZDk~w$_(Orf83hu05w5Io_dExp7x$ z&i!x+DKSvr!x&%pFDdDMEDv@`qE{oXC5elV>rF0k?_q&;{_!6PdoVLbymZql_+e*k zSA=e|NPYtK3t5o9iD6cd)%&lEsaK!~-|aEvN{Ip?IJm(rw5V{qx$nqtG9tJX-HL|}rbqroQ$s#303;+Y_KCnvWw0M73j z*jG9cNON~ad43qP#Yl&6oF7_8{AsCnvOyG;oSNI&H&0Kts@ zi3oA0Yf%GAPWH_&p*7fv=j=Xz$)(@d?d(Yw^TfQzbF3lJNk#*T_|V9?|R=zZp476CA~i>E(6-nG8@+zYmPpFI(alPUjds-YKT zh_h&;X1H%kVkR#qJ*mJ-VsU!ulKQEv?zx&&I4L9V*6kO|sYQONQ;*K-_elxlI+$o$ zCc@}?b9R3asPd2xtD1!BCC~5q08&1(__1(dv#W3)`5dh#KfdzKpDK&-pCc@+k2lOM ziQTdrc|>3whAms!PJqBQd)7mR{KX-+M_$Q$Xd_Eww_j`bYtS;G)4VErXWUD(*)a3! zdT}0$1n*B{pam#m?vFaVIZGH=msMZbD}&E$NUEtdt_tK+*!&-fQgA4W=E-E(+|@sR zlf;RqXPz7{G@CI#+jht*6S*qEmt_t=7o?1h{2I4iFW1j|3HK40Qq-jo=TV~fOlarS-?s~D)!!WwtBxj|1tmfFm9Xe9nl-=J; z2MiU(`D3PDW3pq<%)QH9JKaj_^~DOj`Y+m^YPeVJFU;GUt!6Y?=~B1*L_0ri_PXPX zM-atvuzCq$fcrkNxFCH~v-U!bN!C49KCq}`112?eU_N_Rp?7Wv#{I%0{Im zmc1k)Tk|SwUZlgZk;>Ue{pufPdANs~SgO0LK_o!coj7B%6VK*~4YIIq&7e^*)HzOX zaK~oNYK581g_fgwtd#UiSYfdJgtw>#8}g*9{kDE0S9ml14r z#|k`;N4at8eswEm}? zF5eJ&)~#&WJ>%vJvJ;S}$eBqW>~zDrd-U1sn43}V%`4xl)G z;@W9n!b_|fY=A$I)ae=aclUYng^KYDg6E(6H29;u5r93|aat>(7f1}<$#e0~!WGM0 zdz(^H-p$va<)1qFmoJSIjbOAVy*lv0i+?wpryn!6URA`u;5!<<+4LiniQ<#pdZn8Vvg0QrR80B)n}U3aRj639)#GRms6`` z?Q_99woIKq4eT&B$T}D~%uB8H2~(JT$N(y(<%J^4{&i<6Xqs#%WTeG|15Hnt8ir9` zcvY@U-G_sweWxLgd0kQWm(0H19~vu^WjUP$Yvl#ktXbdKV974RaA8>Xf!)FEOM)CG zC2o7>>-4!;7_rI(uD)S&)0+606W7%$(h^>`4sgpU9 z9?%21i@_qBVvo$N5+i0pWkUzOh&H{?A)5(d338qM`85Yzcd;7(kwl!kM+cH6HCMrP zFc)IFoJ{+ubMU*V$tE6?+?|=S7D(YQj){WL|3hpy&se$^DdepW7CoM=4VK4Fq1q4* zAciHD@B{UEi@r;)M`OE)ln4k8dg$Ot3U<6^po6b84m?y?1R*8jpIJFZDCx+~57(y!E9Xrp8t?*+TWIiMPf9 z^A}-K;4$6Xa1mdVn69rpXN#Zj%qR|$poZ9F>d^vd{{Ba@f|h(bI3HPKFbRKKRmBf; zUmee^S1ZHNm zQFBK}m+}Tav>6AxItA&}y=`lXw)j%(5Pu_$;YPJ~VcdV1bKRc9gPb>&^=Zdjrrn5P z<-31+NSlyn5V6hZW!(sk=?{4bI+i8#4uH50mwLBUhZ@ZiVRj+=l8vz}^vV3HZ+(1` z3}&Nf?L;qJ8!nH6sqWi={$w7mgW*yGX?C`q-;1fLw!^8_H^Pa*p71iBK!h@?HSJB0f>7;F-%qXeO1+g=bo*A*Z^Q9g@fi&`HmheJ zK~)iEnYs*S_lL7;cYhYVPfIf}Y03A~7vUVr$ItpEl^g>v|y*Ustn!B^{H* zciU_kH>F#)Y4O1m^`E}wWA8NJ$jqa(w|^Imb+hHfM3sF{pk{Ml)JzsK_o|ta<#v{3 z6p~eFajO5bOu`^}%a9k9+cC_-OLaQwL2d3CGj+@FSYd=O|BKf>T8=C1Lb?5yO1}GV zJ**7wu_p$l7?7dj>$|9UmU@MSIK6I-91JT*(9n`{Dp?F($@Ug!5`y;je&5{Hl>>{& z&S>0(_3bUFx+}Kb_v%~% zSn;lR65lC5k<9#pbE7y(jflk`6102PAHG$wm|t8>A_d(9;zcvUtr+zJTn{Iy_gw&?9yE+et6&^lY>B z8tHAO=w;zYPXym6Tv_x3+6+>#awstZ72co)YgdtuE{@+2UhG1Hs6bkOddl+8;bu$E%MCgEK@lCD| zn}USw?0*(8xf@EN76x*Bt*vYlw}ESn1wsoxoPS2wj*Sc?!E!L4RyF(SCe5;T{fQ@E zhe?K>D>o!Mdx#Vqv+iyyc!g6wuyDIS8MN`1=BJdQBL2Q2`BUx1PYS%dz=LKE&%NZL zGjVp7$zRFcB>OLhdl{qaL9S~>fi}NDH z`5Dp5as8T2`kWn^u+1!|TU(Y?r#YE9wI8hHZgn@_?3)Vy;8EaNx$;ptCCdKw10uak z5f?Q*xKnifJ&5|in;&i5^s16L5Mmm4(m&4>M#Y2aMNA0mrQc+tDJh2+d?lDHm2C|9 zvo8$KTBN=&Q%DQ=6BXl>b#`CcMd-%xU@0PV zzW*Mf3>bx9{7Ucwo57t~V1Qjy6`e6px?v^A>p;TP?vAemg=fuSwV-JdnIcs2r5YUg zawV?4!>U+4*!JdIs3e3LZ8-4H=YBACWv~KH8I0*XAIVz8`riaArlV%LAE+|m z@`n4Zp+sDUSfamD7@l{3?MW9_uBFUQYXjFZL258-ISAGF4y$B!_$-DRze;Yomc?`9 zYS4x3o8sLSpthySrZR}})y`bYku?Hwg?71^wuktIgdyZEC4ozcS0EXa7mSBqWhPIU zHC<*?Mh%zf^@;qqB<@W>WL+q0@N?qMI3~FX9Tuf@nW&<^nQv1}v&VJ6Wv*6Mow!n{ z1nzWudzQK=WkJDioyo-@sOHZLNyMWdmv@U(@ly)Qx5A^DxuX+B#>w==YmBpOCahU1 z;WEPS1n14{4u)XDr@l~TwhT|26j3{ckp=2>&uHnVkQFAm^4AgzPC3S2Rg%nfo|Pj*Va@h{oR>zYxXW@#>o^j9a=i_jM$zE2|C$D+(Bu} z5*z}v6X7(aeJ)A^}h`Q=*vWf=Oul`4Zdt{Le zqra%eu9a>|FfA?{qUxjC(r^Y#H%DSybLT;;Hrh?_ncA^o3O#SRRI!`2#rJV%d09&Ur2rF zCEb9gm$9eGn}TYED&EzO%tF{|{l4_YB_?H1jco-_F->3tegR#@6N#q}e8toefzUX- zC+ZoQU5XBd>syE;D5M%f`DVt~sr%Ym)5j9pkvwru{~)JwD^wD1(}~US4(7!4rnIE6 zX}C6{Szl_GXU+F^ zFt!SeHwMK|JfloFq%2( z?f^y74Uo3Rd06<$-nu8#W1$YNU1P@SF>=voF+n5{8?nlUG<^c_wgpBEpc zB`C{6Fd1B-K3@qHkckGxmZrdzOi|%kk87XV>*n|$Rv~>KvzoRDCn?JZ$b)4GlD=v& zO!iE;2<#dWilT)s1q0D1vETPX`HTCAH;BxHANU2+HOs_<2V$3Yy4|Ek8-1&dRJ_fkfy==(H`swL9@9>ioqe`?qpSCL%E`?<|c4%i7*< zIAT?}tdgK#uphYT4NPl3NRM#=UY30*;#UavuCiGiyGR7ixEiN{w4D4)ZfsZ+5$01k z`yRG3&>P}rvc)0CEJ}NPf3oi0gVM<~ur5qvB(vCJC-hn9R1po<886IDxdL%U6{o1s zZ>}>Dt(nhH1R60}#K(yPFOD^DDXsruXS_CUTWm60=iBYve-)GTD(|?hYEA26RqIXr z?9TVO7JXw85h2tKE6#b7dr3qW87zXPERO4Wisjs?!gy~Ee8(&Gs4bmrggu0qnEEu% z$aaUG=+2x27>Px#F4i;G>ZZ-Hw(O9#MRAAxBk8M{m}U_dmB*;{6pQR4x)~Kp4D%*g z3f>4E(#w%d4fcipjhqWTzWUjj zcmgu8{8pcau&TZTUQ?bdD*VD(w~1ZUeAcGWyDuC<8xAr1`t9!=l-$god?mX0s}RHl zf?&EORv_^V#*B84Cy3%$Ak3(XUSAll%`zl(_Z2PrVM^IW1!}D{S`33@2 zN)H=&1?4Oj1535Y6NNu9$n$U%B-3aqUhZ}r83TdkOTh2r#0ck-sDHWpPE&JJ>v!KG zUn_q3FUv#mZn-%LF<_+3r|r?v`jjx>$&!R6?%8%HByImhM9Qp?)!^48=MGo1ti#_&QH9ldJh#4K0ih`pOK96koZ+LkIVS2rAB`k@?7y5Rxc_gg-EuxSxaA5Qe-(?MBV+lv-ENY2etvwIQ+;U5 zo%3|6k~hV0B=D`X?5Wej5h=#zC2>YnyWdL>=W{NHwC50O2}UbREf47V`mOXhYq6zY zbH%rkSJ9cJnfwmykAgp+nWe|wF{oqZT^d7t8QGA^{1agOOmh8RhbKhk16zUXyYKA< zD#Ah9FU=}v%UQ>=yUd?@Cz^PGg$C^gyFX4;zQb7NUaN>p(8d<3IU9SHS~Kz)$Xdt> z>AYxTnGoq~0g5a(=bmx*c@3ioX>5FvwQXZ&Pj3xwt*er~{Eq|@F=?o>P`!{GOp#iQ zTFd)6_^D^kDA0+~m%RTQPed~n{aL*u>q+9Z#cmZe2t2{}A4&SNsph41R0<(2JYKNk zmIlL{|Ff6vLSlAUWbm8ZzA##lF6~>J*PX1Y2wCKU{N@Ap{!o6hZ_~10AOdxTUP`pE z*O};f0zmTr*S)cCG!BC?-Y69hVXcRFS&UB7121L*-Kw(RTKCu{8A(yMNOQ-F$M1eL z@Q^(!q6I9lUf%JkXU32v`M8sWPN-60Pm)?#Wa?>fHXA#i(O}n0AVlVfQX5lPcr+uB z(ewT=D{H%7FwN?NBZEzJA0Txp8_!fsj7y@E1W?7qfmuY}2-Ywe{sO!~EFgds4+U<+ zl|s6AVE&v*MNr?bd*;%%`n)fF+OHpigsZQg1Z$>0XHwKHjKO?rlX=TJ1E9A#0YotnU zY1Go;Lj|E&fm;cs(c=Lc$mhZC8cDJP28G}s$g^8iO zPF*AWt^1$|hKQ+N6>>ZFo|i6p_7y<%PK{)q^Oh@Ja8>D2$=YT*8*dGeS1=Kr-d6Hk zz*)+yJ`6k~y1Q(jMgadj48sLw6`CT=(iE#!O}L+38jM z-%0;uI2-KK`lmnOd;1*eg9Wk{--^+y34Lyexz<%xfOS=eVx$=EN>IWc5T4CM2m_K& zSDcIqc1d7bE1-JSe)>b)03o;?9JF36xVH4i7f@iYy7`z+@Q;KCkd|?2bG^sJ$bq!^ zw4+`sG=#!G*vAp*DAUVGV%^h>$*07Mv=@Z7^tV&0h3jAW?+q^QHhi4r_HmEp zM@}n8di3%T!LAf$c{EA|H*v)vx?0!O{_`;RpxW0ba>h2~363>s9dt54$#Gv~23y)i z`LF3@aI;aA4Tq^3^qZ5hk{DaN7e`dUWZ$hMUu~}J$NC`yrvZObVtBE(!?ttXSTzz@ zRrE_n!j=Au{YIrtd`9_=TZ#v?9+9_|zbO{oCKd4#YdU-%MB$7))t}|? zvm|__*i_?@dA4_(YDMqdlN>;X*s&!SWEyEktO4vZUKiJ_UjnK))Pw600g08DUVqDM zbY;qStF?i#Sn<5KPD-BXDSY&lQ+>d%trG-f{gYkY*Tr{ei7mW*$HUJwSkrluu&+z! z4VX#WMdsIDC+E?;L73dZO%w|hXwDpGpL`-ugGF38axI({&12X8^4r+7wr3pP;#M#^ zcYd-W<9<0uiBsO$39ytKUZCB3M`cBYOY6>qE}_gb?|xKf zvj4ovz-zre_D2C4P9d$dQ~!f4VBr z#bnKzJA)fa@qI2Ugb`I9)3Ci=m)AFNGBoQmI|-T;P)@7gX>R&hWBFpxzSOd|Y9`7r zoV}&hXxYNLihTAfBtm*J@vHEHpwDN7nnE`0OWX0ej7ML`mskW9>2He3#_y7Knj;6E zrC;~2g(ZnR^SY)yrWfoG$+gn4`$quyd9mzx5R0RVgsJVsT}6^-edXr*9(_cRXG=~i z&v|Xsh%H~WvxqSa0{i#=Rde1h-%q2I4AHM?A;%to9GKG5Gzs)s%S@YKpHOf_AxVyJ z&e6c3FBfqoQTYzh>{r`a)j65WuGG2V*%$aTxzB|0qIObp*HBkdGK*z9t3CbaJ! z%&lqr%6zSH8BuqET6l$wSznM5tgjpsn>&&4bhnYUympl;vwZVS8OWT4ckAVoJi2SI zBS-=zG93Z$${l?@(ae%{0IwfT2;rb$ihHk16n`Fbc{=Ym;F2ilZd;tL&WCbR2# z!z8EoKF;7nmPV^x&8a%XMQhx#%k3u0IA*2C#O_q4qB3-4Vs4of5_@Q7ykOD8?Wc5n z#L5`O(Jm?SLPXoAEaC~z<-QV&XyE6MIxmj3IPWx3var?u!ubbvQn|<4Xj-Y>Zexgb zF6lBwX0W2d+PY=N_erwIroWvL2mO%eZsSJ&5q!2A)rU6koNvpf!0waR^U3>=DP;@Z z?Fi1s)+sS4|kNKJ_6$?cqm zek}$STYpn?c9Z9+eyUcx9e{l40JW(i##)wZWYjG}?W3(NkKh>oKQNKBIap*Y{le4- za(zr%Y~U!w^@5ADE7hFm!;?JD!^57L`o*!hZ>VbVHz!-X0iQVD52-gKZn}Fu>AHF_ zol>^45p4A!mB;;7-0^FH4NwY*?T}@@SpO_-H&8B?OGuHzIaCY`yDo`!lSI2aS`#YFWEpO~wv&qWJ6T@oS~RgI1AHJ%imVxTHAw#KRn&Yft`hh3m-=*?pF-z9%Ff1Eec`*!aIx{;%SzYmv~#Ij0m)th*KMKodB65~=0U-;^9wfT zhb%0olV2$AI_=}+5<%DLd{_@ToE!)#{yB19%D?j^z*ExTjs+HYF`2sUFmGkp>4RW+ z%3xm+{9Et+q6-oaq(doDr%v>5>2--Z-mY&xs$U+`qZsz=5?j-&Ni1U)`yl2}~_}gxLN&wp>eQi$$Ou|@%Kt|buU=FFe!@52e_q|YKdd5L* zoIT09Qk1v$uLVr$ZAa7l9KMgqze#szh#IznlIaDaTm@eI0|@&t&3mA4fKted#&-Pq zq^XXyAC*)K&GIBVcd!=>?? z1dfZSviwaE?jwN=7IVMfY7^1e z(}yT7Kz_V15i6uX@u#{Da@|GxBXpeb`+tF?+EJZEvjy*y7nH!ZWpXOSCs%%MOzUNE zd9{O+(?H`9XBTqgQBShAxXRFU75SYp^8HX&?M#X^r)1{iZg+{V2AM7XSvJKk?h}J< z{sosLtp=ag5UZyPyeEU2v)vfXhRl_w%PnPL573P*P^r?*$T`;)g9P#geF`TgH$l0N zW0^X?ZPeG-JM$bp%Cm#NKeb@i)PlxLt+Zoec|N3%%Iir_eeD=!&x;&vT!5_%_gnBf zAsL4faxnIBj%mt z`pBasvRpLE#BW6nqtXQ+U5HY0{M$Fc!y6CWh=m4_(=eI)-&$DE;UAr4DFAcT*Mt9Y z=Xot{uT_iPX>A^wDX7xP~WN!15)UKg_TN@vBQ(ZvHTDS{~r(N%B~~E zSyMlC8IpQBJ|n$)TrqG9e`K7^Gjul^ z;xZH+{>8t1?@k$=`xoUhC|-eqSm@y&LodMY$6{lLfdsN9h#iU-S3?`oK`jR^B^(y zac$XgTf#0ILW15Le8)YxUw^pq8IcfqxtEQqMB}1F4zgVO0du{sj3&2L`jNuDjL2gR z<@GKOo4qn^8XPYhDzE2$g}IULDX5FZKb2~kRQM&KGlqzY^s;y(RYNs6b~?joGjA7x z$gw5R5(w257a@mcfDuJzXqqITNtl0;Y4gZ#>ga#xObMdglV3%y?2;dXzB#9y2(F~P zT4JPTk`{yI=0-`8JNQ-C*m-;0C;B~PCh^S}VwK7Gp5j0+54kAC3-0Ikfm(ydrG4C7 zx&GI6CaUSa&e|n6sJ_C}_BBD4w`V3n!*srEUy>0huzqVty-v zYx=qCsnz_t;UnA)(wc8+k(gusItEEtU)tg}s$Wa-NWoSqH&@E5~g{n|jz@C#Y#W%a12?s`l#FnbJ`!&YNqO*EkBixWj7q8kUa2 zEn*^=ka9;Z)Zvx1WH16tpyYIw`Ebv=GSd7=DIs9WHENP&b5lE}TZK=hquNy2LFuwd z)%@HC6YqvB-Zvw$>X6m_v|tcJq?_CYYB5PC#*-SQoxZZnH0ll~jxO`T_R@2w5k1r$w;Sm%!s-S(C0=Yun4Zy)t-04f2dgd8a!RED)K8cWD-By1G)!Q3h#@Fu&>Xn)YQ(pHxhhtV~db zM%;AX1nb10<0uxp=U4htdj+0NRb(N9hTN$u3uXTK_x~3721J*D*65-{Mp^} zRIea-{nF+pu)sRK)CcV*#o@XgY76phN@5@vW_cJTglhn&9C0kP!K`IU2YXW zr-^gz8F!Xo)lV7xTU;Kt@Jx#sfACekIx2#Fngg#1;pc03@8K@}t@OC5TTZk)B;x5J zWJ2rhyQg`VAN$^V$o7dpE{m88T>=02k5sbd(G$4j5?rhQ{6B`2uG2Sqew6m zjh7kFYO&~C3+{el#Md;Kb`_X5fDb2FhF9K|;+5{AK!7tL-bL_@H~Ms@5U@cHH!{M{ z3w*PI^1;VTD<%ZeI?u+7be-gi4ynVxyt(CdN2ccQ>U7J=zugVrVORKws?qiJ4DJ^$ z87QbGwY{0~NE%P~d^hw=BswVN^~jt5YGSRulZ`4+(t>=?hyqZ%sUu>&H4`R-oIP8-s7F z->o#c&i(zZk+o@+^?R(!__1XiCh%8Bsrv6V9vAK|yDn|m>E#L#Q$kI1wv;ZX2vF2g)K=@qsX;5zTL6%vAuS3$Z+ls;k%M? zb9=J%q(0QO%DZ+3wq3aB-B9I{&CEBC|) zBJR$(%OjJ9>9=P@D7TlO;L9Z+&Q}8!Vy>w^`6NpfkE1y8+d1HMP!V7FgqlNF`{L*_ zQJ(=0ct;=zh=h%#`yqRPlq|Ck1OtsUa8d&X=3b6&2#m4- z(<1vus7CY0T6IHLIDfz%a$X<7OlSL0cn_FCv%U7OW=62)N^a+Ui5_A^u{p z$mVyugCCL~$v%tppE&*e(HeorPxRHK^?SoSO(?dBd$~7ZYwDl%qfD)ujoSF+7kH>D96b` zCWpY#LuQaPQM)Xj1P?5<0yWRgjSAMU#YAb=IH`j^^lF`zMO>jN&lY2~b*QC89cE;# z6a=!cD0}*NIjF+nXEj7>46*a|MWN30YJ1{t zuhceS{;0He>nMV+8$GKfPGQ8&i{(}=P{U>SyJhMi!^B0GS<~*KiBogZs@cqKN0EaD zy+K6-n=}mZt~tpI29NpOS;Bh(6d$d^JImcfj?aI^z^|;{yId^&z-HrEr#q zkau4Usng-x>BR%O;P8r&d-R}HZG5G)S8LWSAQ(F+JWI-4(%LfS(Fnr`v!%I0t4`s> z{K?io;J@~QHMudBX0$5DO4FwbN0x84FA07}7xOOayAxTsmbOAv=k4+(fyzdk5Be6u z0*5Og>?B?c*kvNx>0@tw2z-4wxSk{VN*YQmuQFA~>)qe&G{M1&vzEP83u@yB?T>8; zk18KICbXXqm$&^`if1~5_pGPX->{iJVGn(Qo{8<~c4(WFF1VfHzYtM?~qw@70! z+veF1c+4W`LC@6lk28n+TtBw$n})+Zs?GRazRj}pva*l2zcvfh20~eeHHw&(em7^(#uJp(`lKbMdbV!gei(Ns@M`$1;K88@}IW^xeO1nKek*QMj zTuyx0Gc=Zko#euVcU5UCBUg!OLxL7KRSFWJA|yiw4a%`oGafNlS3w+?8{XF< z#hqUNYMEYF86piprNuHH?YAwQxF$z>09{nk$i&Lx@gV;gd%w^%sx3K_xSWdqss$pR zSs`xxplaNEC|ka=%<02rREvZ?o{mW-U_VtXrGyH2z@&yiAUQfS zHSGvVK3v;v#E!AJPQE7e-qtGzGwG6GS>JOXcg}8@87pO*W;zZF$b(H|SHFrT+(1Q8 z!&mxP9+ZIHSETcpa#IfL^(+WM|2sDiahwWDWA!{8tUfCasA$9%D!`;5CW3bK1?ytd zrWp8OX+=r3dP3f(iKqzHX%A|b8$i@crcbzV%J#@Ie#26OEC;Mej*ftkNQ#PGQTe^j18s>TFpl0{D^xFF+E_RzzwNK)A#ttx? z9zw9n@;&q^pJT|Sp)AR#Y8q&Yb&2{@Q48_LJH~any;E7-8tYwsGG!R^g^0cFKJExf zno0-7_Bc9dg2h|sTEtak$ckAr)iJcxu*Mk{Ty)P&XaS6Ap*;L!)F7xkaA#^y#W0Wp{MkitT09?XuOh_Rj)863jZbauJ?dQ! zm$sk9quPSszBMF}ki{`C9IgdY{wY5X_L7#p7Ndn_(qmo%@ftTUBa`(ze1-)j|CG9X z9JF1_w_P)9fGDmvp_Fmd0#xmjKQ&0x2DNT8sK<{y%&zMtJDzyrZ}ACp2et1p#+JyJ zs7dq0!u=B3J8I(!_h&QJpN&AF^+SaR)Q{t={t?%`=$BYY%IeqYk8-!L%G28a0@eEEWA&CGRW} zC~6|e(fj0y-AL6$)PwLkmtkUGOoYO;mh#8Vc>q;kh`<4E;TQcC!_0ZwKiC|=Ua2HQ z{mWMgR$In8IBn69T*9vdhyIyzD~_#!ST^=Jv{`_$6jN<0I!gdd7(em?bVGi7JV9rb z5@F)z0WrqZ4&BnI=(>EIcFk-?L2$QAB`}mYHCdnrn4P_+i-``k^f9BGKh{+@cx#BX zvsC&>Rn1v=NrUZ@-;VjoEbiO@cb4jHg!X$BDU1GJFz|oc0+9oq)W%cw$|U8BXi7yp z5dkm)dMUa{<8WbnYC;_{V{hbNw>rsL9|Jow>0{YUyR?EwaBW=HKb4ufIxjhYR`$Ph zaF*C2A+mYO2Wq=Mf`_I|&0H}9yK>GgZx-DqyR^Dh%a(kEmKsfwW|ayRwvam&ee6j? ztzugTcXKo{uBJ}pqC{5_070z#dxRWxNtB|48|`vdHOJF#EOTfDtXi-_kmAM^x%h77 zQs*C=!F)f1q0mUbvSriQb@c{c{vEDOVNBC)i<+<0sPnl`?slk1Vw|*vwaX#gugaRH zy>_c-OCgL##@%^^JT+Nc#)0cK)>G`sHq(w|-gUF2Z;Dz5h`37g`s;~-P4DJ2afD>= znG(BLvAW)d55)K$zUF9gUR{^JAJ?7*XygL+P&1RkNX}9Urni~Qhb0xI6B*_BeS}yE z<&@#5`rQagCu$~yvJvCEO1U0f?G@VSa|HkoC4fIaB0TQ*SK5S^h|sD1Y9*dii(hLQRXZZ*m%+2o>3qnjK~^dd)v$5^OkoStu;LVj z?Y7SB!uZ2_F>D#QjiCY|OJ8Ao}xIVP~uL?tEC|wXvysTnV@?lzPgIGy;yY@yQUQ zQ*jB!OfllpO=9=+-^7*?o^HEvs|K-bX#=<;K&2bA>hTFE;%g~4(hZ!#R`npD3lYo1 zz-|pNdyy@UUY+G4P~xiq(^UH|HHosRC07BBU?cdV)3_Xf1n(45Bq!1u*VZfChR(bn zW!654GN}Y_E4un{;i1QTLGwl|qoDWcl~&5-JKuZIru8M8|Xua1D|nj3z*4NFQpAQF9_y|LUq-a>wK09e zrS8nkN$|1uNa6ME3l=Pfa^=xE+5kqFk=M$q^eeBGb!Oq64s|I_M}s5tc?X&>#Vc8h zp#cSmae-ueng5uWw}&2Y--W(FMh&$1BvgzwER5I&u2ZhRSeG)oKK0qta&1tuINzsz zf1)46_Ip_X2+~toAR5Mfq{fAkbx3j8G(KwOXYRb&=sgiiT3q0nu+5Y~@$)vmih7Tu zd?=iKkid0<3nsK|P4-t-2VBf#!S&d$aQ8d24^e&}EnlGXNgFy$!Ucz;(A8_n&WjHD zpIChZkJ}WpiXd9~PdN(vwFa47J0kznVlAOh6kidZ)@DQ^fVg|$Dwb5FNmX1Cv>rY& zj6$hC>*dFz9P5^TjMgj<J{=jJv(;Mbl3D^@K~atos9I zitKlb)UAz1vZ@Vws*H_4rm42~sN}EP-D4pYV=dzUcaD|LyGiG6I?Gul*COKvxq+<9 zz+MiDU1r6^3W8$+mKQ#rQiEKdBK_$9wN&1IGz2IMt{zQD`^}p?$1AlIPw!v*s<`VZ?HfB~9 zRhO`dk@GGwH{O%_-S}^Kxb!UcR8@ddjFxQrr5Y zk6f zf_ghSlRv>e^8$Rh>I;UK>P~j-GE6zmKfHbg`o6rg&$vLlOjW&@5xUoR9mO`J`(N%K zt$R^vP^$l_P=NFqrlLY4`q#tMneN~r9KedSK74x&W zu=XywOKiw0)xN;`W2-5%IE!(QfNo&6#HW$RK~VL{tPg9(kKt@<@PBcd1UBz zT?Jg?x)kU29%4$sz=`Q`Cr3IgqkNjOJn=l`a=srdRA$6kX7#?EGPg9ULlxA}=L`BF ze)NVA`3x8#+7Cps{N)GQ^X1DlkXXv9>t&>;Wk5J{eYND`Sl#B4|=LhuzU_mI)KbN16G9%15CUgVjD;orLlzo?LovHU=q&V?MAVs-`tMi z#`GbWe&<=lK(HFNsf|^e$9bkFIVGV14S<^v9ZcYEzdbUg=`3%x2jp%W;TSK3rP0{z zk1VLwrA{4DzMLRhTO)qFeoPE^*Ps2iR_l-;X^bY}>Tic{ZQw6Ds|i=bWzY z=?-{i+|3w*{S6yR+-IzINBf?8B0*OONTrItboY7P-`KBZP7zig{WC5?j1V9hzI*nL z_OSf@y0MzZ%%A6G;K0@Rf@ThHU5-tCaFzs-^Ny~3hOb#$#3r#gZqD2-uX zVcx4eg-ZsnR-><|1u^}6!HoQ=%{WC@p?_2DJE!Cde6>C7R+N+tETr(-wnJp}5*t29 zkbl_9r)4RBGvYRXm6lO$l-ETS7v~XusMn>R`@Y8tjk)5R#WXG~k>0vW)n;G#?K!!x zrCEv6rD(O~Dqek7G=M{TF73jNtc0GKl)t;|ap`Gf{)@+vdE8Ui`rbZW<}efarSHdj zaY$iPj3SV(E}B&EHfsOB7qEXODGC$yPZj>n20;fnnm#2mvl-b0&PtlqhlaM>LmYq7 zbBWy{&7~>|aMG#k5XDN6nqYzpgpz(N3WmW`qh~ z?gNydZz8YLtSLG}^LClUD)-c%KEX^<-J`+o=^iPh*B5=Bg^GDxtGo75YA<`>dhxy@ zouL(4_1m>oF6wWOQM#N`+6^ROh_)M6WXMRrWte8oaUcGSx zvmrepnL$6^^MfALYD&>HL`x1FfANv(KGp_T3N$L2If{?%-ZiH~A27*YF5v^Qk+#2RR6jPYW!155hkh*lv4|9sQU&~$m+uxS(-a34vz{di;Cm%LxQbk`*1{e6a;=gfdiUvzGK@t_Wyv=)CQ)g13cKwAi)^vUR> z3xh91Vj!k`n5AaoLXVwV17bJlWNUo{X0)`p2R8+$79zr{^zSv~UaDV;TnJ5L?l3Mg zu>fgo$vz&`N(JQ^R|q*6skg)MRonP_ zj#7^x{(C_?;q3q{;UX0fjd95XfEn%EKvs8~oqBtk8C{vGVSqn8T*!fM9|>3o#j$+-_F<7wD=`i zMEp_CtbN}F%>T{_qSSi;C3Xc8F#rxfj;Bevl^MZ6NoW=xmrX0=@S`Z>z8fiq*c0FK zvZNGQBjE&+_Z(>RQ-DJG-~orIpxY7oM3Cm+4b!&jRZx4MEG!3BAh5;m4+ zi$85Vz>Iko>j6$&!m(WZtm(EmKPJ?}H49eVngKPps-c1!$u_KIrIn<0G_-BeAgiO) z+^R*#qT7;EOS}?Y2ba^bri(x}9T$8(vd(uvW5jk;I)9@*}iNxzf zx~59{&YEN{1G_@hJaoRk4O9MOTSKKBS_kDz$?jRot%0@-hPqcdnD>U4&!nt%XDs}j zpAh&63yXi2E|!8V?Yyh}55xU=pA{T2woLx`w>a))P$m#QSDd6JFEh4SR2&M70L1~% zHV3lOs&5vhUojT!E8d>>XMj9fvDpGKIm(_63e$XJyCM=1kGz8Avv}PtQ%cpl|EF|P zNy?^qs=mQ9hgi4s@k?9t>t7(z>;ee9Zuh`$X|@mm0jDiNHgt&@#ZjsFB+bn%BNXxdQl1SxmHhgwhd!44s7r zs)+Q_uL6UYRa!s#*e?kYlzIN1!VMpXvrWy2btRI_g!XJo0!z{rWnZTY9g?KM? zMn5qUjZy~YuNTLs;WQo9m<3YYfMUf@hzt1VqTEggF=*DyJ`0&{2I4Q^ZZ++bFx z;V=Qh7p^Fhcv(F{W4&1szk!7 z7W*kVEIPYcKGlh6>G*v6shho-Qh{}_nKQg2fV7{WEqGQ88eC>kPC*z_`jXJa(eh&X zE2EKDHan9q4Dw~an<*iOFUNPQBZys0de)Fw{d^p|^B_#v!1hBcQ<+`rGO<*J>8dG7XzQCA{(resCuOhd75+5Cn$@&kpp0qQLo9`HuNENspQ#1cEGF zzi_;EqfXmP)abu4B7~_DWnOm{d zR@^>pPBp%Y)=re}=Mir7!DUYEJ2X>5P?ApKlJLyoZU7F*`4OdP8aJoe0n9Kt#!VHC zy?THZnDjCtdPN(f>u8p> z&feh5mDOgj4=_vQi|x+d!VtF#6V3UtDhm(Eh0xdw?JcPuCTbJS0VDpVrcn30SyjX5 zbHw?w%8kBf)?SnMPbO_yC5L*60by}mWf|%)kC_9fC`J?2@fS1VQG?TUl#WcR7>DT; zQVfStMVbnJDmwXp-{%!o^#{N&s*o?q+F+2b}vz2NB*PC)wJyP`wltpS$k9_9p9gkr!|g`?7^U3mYWZXYmtBnu$#wlUv5O5aU#3qL zNlYubu|acBEMgm_qwhR@*p~O1ABlT@c`%hl#?~*!xwLtB<)>v-v|8HTp$^HQZFfIO zB(J$uW3;WP*d}4!Xe97wsJK{1L&LOhMC-szxpd|ExTGMc_2;Rz!68W{KdqX)qpXjO zJOj`Uef_EfbjBmfnZfb^*~mlmL+U;}-^l;%vf`s1*Kt`3B}e3vR-z>m;g+OTNrPFOccREG;^ zXTNzuchWoRkA#bm^sRk}j9)LBa)Q~65B!8-WlW#Eq!$&{gNGk#P?i}Bc;414fw*fxx=vmBm0CKgln6DyD?g0Fw} zsOX`BWDnXmLHJ|*`%aP68g_LLt8P$^EG^{J#RZU@UQ7j)}+wLD=F0$18 zRlf#m;7gZ%OF0mY(KmuXgW!VmjQTtN9>^fnGl4@y3Gbw*`VX zl|iXXygg+hK!gd#njn~@?)6ZzQWp0%!c(glSIh~fj}gFWyRH;>7pe!@>JLdQi4qG7 z*X-|OQ_-)+yi_^;;s9NdrR#&t`k9jO*OE79IzuQ(ZaMIh%?tk8I2J zO;{7EEe+YF6#}btmBk85qX#=vRZ&@)Wot6R56lu zfzIrdOP-A@M?;`FtE5ZOc@uGaS`Uct#Vy}Jt6Hag@{mRe>M9cO5rslfY=XA4VvSx(+C zgu8a?v|VJVr+Tdv$IGDjDFvblN!D*HVmfJgO7shkf4hv>5FE$|8SO(YLpRUHBZffK zm-J4>@WhqtjUcD^N5d%f-{s4_1))>F%#*5 zPsG%BqiXc*ttr6n&F_)F6aU}85tb~HsH_oBN0mijUTkXJ@o}*mBsjgHQAP~Yd3ha~ zy8;?v6t*J8x|#Ba48 zaLyarirml(xbC;)?A%qOWszcJ8p6QQi~9He>HYWeEo+4XwQQfhY7yEwn&W%%_oiRV zzKwl5PWfnd(L5NP%zE6#aAT;ugz>GEkAhVosi9|$B9`BpdTih4{4#Lsp!#A*KC}xq zvcF)^c7Q>*h6$gX1KMj1ntnIA_)YJvxd*5BQ4k=*Ml_}H*HPbfKv`oVmwM>{1$o-J zNbMlY;Vznlg?d0drq-LLgxQrblo?yQbpm2jZv~FmeouZnVL|EJ<)sMvB6``iD-q%3 zm-x@UT$3cAp1nW37imAOeMMh{OU0hhT)$LUO09hqmM>^P^4^2P31+5|%8_J)vj7~Q zS9HYf|DAJ38J?BWc)exN`T0M3FHzZMhZs7SwucPvSy6ody55MJ&hf6_{m^pCTmWtkagt zflRp7n`kf$NlZ03#s>I-WqW-p`jHEW=hA5OlWy@i;;Tj z9k^Sp3e*G2`?&0Zo{_MLuw>0I&c{BVb8#}2%cE7$PE&AM2>8ur4gp-gHdeS;;L+Ez z*4_DOs&2itqtm(AHaS4 zGtX%P^Yk1o%aDptPsA=`_|>HpE7+|YQ0*DPTD`SeweXrp^ykmJS<08F_O4Ui2=eJ_ z@t`wU?u~|78usd5#D80zB09_{k1O%L3pG@qU9Ed7;d~o7MfFrBJw1vxCcJhSezj=I zXtnb)EG?X%WftBT@x$f9EKPg`l#=I){YO_rsZ!HPK$A+1I|?P3l3kFIL|v-F-hwFw z*MePj20iTPgSaxgAnmpX{5PBb&BxXSZNqQ&)Y3Z=$g8qZwbI(|30b#Z50UQGgV`z{ zOk=dbj`LT zPqKkzwh#VI&mDtg=v4It-yz(*rC{~SDduncP+{-_))mb%%))?DrZn!JFNO80wvZ8t z5pqaa|NqXl)S!H(g0~`=o5-6C8cyOmBHur*;#(4t{tC z;}G||vVV;IA=zudHI~jzUMxb`0ijS?qpF+ZQ?*wAq#bCD>tH_7YCsf+)@n*ilj`Z13k8s|ey94d5^FP1E zM{CH9`3cE#9wajhWxr%UDN~@%R+=|(RopJue;qBVF%rXPoAn~Ims8rk;I~Q@zToW7 zZ>ndSSjhXQUM6h49a_(;#_I*lq?IN82mcJ^2nE%cXD!Kc;r_V6`4Sas)dn%#|4e{a zmP1`6HnLDviFR=>@%<`Ms}9|cLBXAMU;&udMUdyiww_0g%9o1AzU1x%H<_ou{l4^& zrg~u&M3n^XbO6dJ-S6;TPMQ-Lgu7=8K=T@wATXDk6hnZ_X%?|z{{6WuN;49eO<}bq zW>$Nn`@^Jj?dF-wVZrc+$sZx|yt1dEg z?m87>NDU+H2Ix^@W>W)Q&m(>JhdXJ#ck;IWSdy2cf>P{vdqI6u%EHXqME(klw^y`< zKjC2EC;dBp+!cs}f8&Z-{(rok=RceO|Mt7>s=bP~_O9A9trkU5drMV~2x1FDTD50u zwr16cog%SE?GK9D6*EEA2uZEf`d;VnpSW)1eja(8Ip44M@j8y@(Vxn7u1>Kcd}@b= z01%Qyb1;)NCE`FkWz*1@nUec5A#8J6YPZ&~&Bg=wCWyVtdw{Mbkjv#c!*8m8r~P;& ztM$BSdJk@HAHba=s1^V3C*WW3y ztaPP&pXW;?VX^;i5f)6dbU&H*@dJ)VbJ~ix^&iez*~T+~;Z9P&Z`_Mw^1`HDGgWo9MX0V?c&A(5a_FTUT8O%4WR`vwh}I7+2tI{3M(jyTAkUZ4ez@P zq`8GNPPj3lH3dc0WwBC6Q5;Q<{BwdWb|K5z-{A-qlHGCS+__!_K&Hzo{;BXs0eDfr zpy-AXQkjN){Rt}7b7maesK`zZ2KJuqVFL(kDR6_u-XQp1Q>V~|$RBhvlI2LHodHeB zyyQZtw3BaTlG%?}3}@T5fkKH$K-!hyt6CeWLNhMRq~ zq0y;P8j@0fsC3ntE(MAwO=w<)=d8Rm)S_!Zoy(GzGIG4tl{6br+dkG?r`XAc{xI*^ zSfZgI2fjPmE9sd*|E@A$jL5tts?gw0Wl5<~EmOCW=x7aO$VRVCMM*Fp4aF6M6M*}C zh4~O0haq~|wEsXE9q47ER@x+vJpvhCiUNhv?73HF&V|Tp_9R6h`+fY1gzihd3P zjbWm%e-U3~uUGaNqg!A!_Zvv-1rH7mljR13gPG<#YsxzMQ(B@ru-r4l2HwKC$F%CO zk1n4rdFbw@vLyPWw35VM_TnR&xXg-mlI}|AWK?#y{T%HLG}TK# zgf>36l#EOm-HbVU`+-trd*^8|%CVtc#H7Q7p6FRuE*AGAMl<*tYxLbqz;o2i41=}b zKQo5@ZF-M@AS<`Q^w@Bjo~e-8J2E_)9=5c ziEiBf8v#?vopnlXDCtzkROi!cz}Wq@ESWK`owGo+sVPjQlZi6q>D+F%p6`V)z|T&; zaPe()X}9lAekRO*w7^U3G(t_bMe|1Ugj;GqA0HWrL>sJu=x>Bb zVRkOef4MBnC`fyK{U=aB!`k>KbZ#mDp3}eASc;kEd*jRiZ{Y?~f}VR?)S3p+kon^P7Es{n}_z;@n{KaMG;H zS#uMo!}S)ttcdBJO2R7%?dE2Plw=+n3I&Y!?_WdQC8rcizpKUdmh2SLNwzx+jB=8t zKi~of(r*kNuAUVL$+~AJwkkd)IoZ<*Rjh-PS zUJnd+J{*tfatb$oK`KSRJ6wrtjVLM}@GgFDdHI7Zb(|Uu3l0kw!HJN7>k6SxNme^> zWANCH;$^vg-|uIA>OJ_%0PwWOBOAH~!X;L-3Rm~9pFab5gJ4>C17R~U;vS{<#m{z) z@YR2v0ueufG`t?ckY8sOn-A)Bb%I@XBcU{IyTk{NEM3$RR-R-HHen8_vGH zzUXAYWXHrkKj0kM=QLeJEXh|r5>cQ)&eCxNN;am53g-i2ejLsSjo08C?6nFVt0Slct}xo@ zm5RInwbRU){SXqWn2LJhG3<@@vggU|R{E87y3C_oYvKCO#T&7I2X6g23!mMmY7@ol z75M4A3sa{5?6rBy1FiSRU;lPpiMdVa(n79&1*Bh*8K6E{hLa+qgP9G4v3O`ow2{5@ zSIZ@_24F_Vt=K0`O_*k5#x3@s*~+;S+hH5^YGSa97feEzMGSIz2LM0;a^iUWxvX&M zY8S^SVA{l4jL!UUu7ctIK~^1_Gf z!H%pC;f6;Y{mZHND%YkME`hxGn*E{_g?Is^>`3|n@MYZk`9P%o(D# z18Fz47?M+Z6kR&a0$(vpIKEu%4P>jy9fH6#GW(Buz9(OaP^94wvbDTnUTj36yv^$~XMDweq6aY)ajiEJBd}9HbEP1_C~NFrw|&hEcM84_=gK@cLIo zkVuVdJVkIvcf|$L+0n(zH#SYD_htKZtNSl5=v236WdBs?Z=m@kHPhE7qDNobr{a1c z_P+1r<>lD5zl`w_QZbWjgCJ^*Op>GUPlRq|Cw6r_#*dPJIL^ME<1&szV~uGY?APqy zTh0=NIf8P;nx=`h0uHJ;BKQWm)}Y_|T*oTYC)}GCaM8Q#G8)TSd)8)T!WCq^jJI2K zcv!>?rLDunNf`@z!nyHtze~1P;;%)rpR(jw_@hMaeod!{DD>f{ zovX4jz0*mitqpqUiDV@_M=v8IMRf(gm$)iJ11Y!}iNq{W^hdO&zL3t%a*M(?%Rb+| zHaB)=ZI>>V^q;HthdLkXLp{$2ncP$h5AZZM=-=Q!X5UK^yPD0_eI?Ji@H-eMFu$RO>8xg!VF&F&Et9Qqv~`yU-;HIUV;C%wIo zWWQ(=&X)YOTl9|Tcv`&23h$(z*x@^fzpGY3*S2#Kz`Ergj?AQ)qr=b==`?8D z69JPHP?{Q0lB3Jv`-L`}?{(4@*;6X!H`aM=GT+yBep|>Ef-4fzi)yIDSYE)$WiR9@Xa$mH$9pefuBhcL8x^)W^{4iCqWXh&?wE zbiM)2`6K8x1i~@@4SF}OzL|G4w0=tBq*%+`a2swHI&($v z0$I9ICBjOKcc6prlP*eP@%h7oZqFp!v5!C^uP>{ByY9V3U9gRm*LuO}aYsT--CC*elG^u_@XW#}CI`2LOY=P_sRo3lwtDra{Vf^;_;|A^A-ANCeS7ytk zf*DKuT&UrpU~JluWtZcsWL3<8=M8+GE91>L>%4kS{S*wuB#VEWQu*nZ(!$oqg=@hS%Q@KrZK`=HtYx|mTtBy;Udt5rRy?}(o=G6rycEX07#CH} zt&3wEhL8@9qY99>5f7Uvfdnr}iq+aCfX4y#4PhPB;T~WHN>Sj*IK%Q*byI5j;t0gQ z(rz%!_4p&5fai}$lg4^MipCm)!KzL)>G#~K5f+b*zvLws_H;b$zm#rO)fjC`j*ZoP z065}1s^=+j;GqhS|BkaxR2#~Q=$W_I%ZBO zMtd}N^3_eES${oOeZvTe+)fR|8WZJEH@Qa>!?qHCq8HwQ_z+R?ppHL(P?gbMvA z3BNE-Eor|}?s$KrubKLOxyKLlm505d%Lxdy)ZLWSWDMdF9b>qbt)s?(7 z78qi`A{3`qMdnkqDfKk6|Mm%JY7xb6C{HK&X5LEAxW9)D+7H9lV5f}dm7P|_Oa@dj z;WheL=-(kV<=J+?2T(YlGK32AOdfv^$iN5)2_WRfAfDo@CY;KDL0dx|Z0-9}-QabO z{dZ^QX1gE1GJh2FJxeY!iMsm|4|0OBJtcsDUH?jt}Wc^-z*WxH7u5=aLZItM*ScHbSif-iCU=6I?rvgqG@8^ioiSm5D ze5IEjw1@gKiu5fc8RgCc*r{K(gC>`wm(y)^v4jr7p97tf>t;C%W^=BFj|>7WLpm3? zrT7#qAva33(!TR|t#*aQHb_Ghg!10hCFhyx4YDuT&l!X*Rf%+E_xnDDYL2YAuKvy2 zXsb{NJd%*m8O3B?%oa2*59XbVklkX5h^J>Di0$u>tBkR3Js=iM4tuzo*`)f_3b^qa zRe!ih-`pcgaBt_mmg#*jVhy@ofJ%FK90ZseM4hp)u7ii4pu-w>G(|a6K7yA<0;UMt-`7|1arG8-j!%`{u zrU277`@+c6ADt@Xt{zxSghB_lj)d$fc)ur)zX8oqg;xnuyz~CYmuxT>pUqJ&}8uN?P(*_@O(vJ9f_R__r_*%+Wggfcd zg_!ruWO|sl_|o)PZ6>KWar=S$$};t!A}|~{ItWaU2wxjP-+(iLTsqwPLcQbN(96HN zcIS_2CI?R8P8g<(E(`7E9AiwcNal65YE!|nDjo@|U8Q(+i|TW+i)?hem7DVyUb}9` zYaLw;Q`iPu=zXk?o$f!aN`F)-z zfX-<1QQqJ}lgFGi*Ei+F(7&jvSmO90RsQ8$`x@Ws zT7bJ6^w;XgjEaAqYQh6#(4E&04=G<+A6knC7MZ4@sV7j5)#fT&Iwf}Y2eC?m4(aJ8 zMtg%Z1fS1*x<)lGVi%lcGu>M)N_G6IOq0cAf~uk}`-Icetsu~P_w_FqC{2}ZfQnyC z7UquwUkfng!T;_cw81s+?lfjwE{o1dwo6cdg8ba}-6s077uVKzbmow@OskCLX_+#z z_@5*6E~?P&_iNATNZC;cc_3(~c@I9mx(i~yxm%9~azZx{`sA2c{Bw~RE>7n@?y;h3 z9>Z(h3GE-Ow^cLhK1n&-bczCaJ=lEZz}!I222hX1c;{TVZ6-p9GGaE>ZUQ5{H=BLK zUR93mETo@Hx7$lKo$PPcyHBN9 zm8yy!sTeTnojvVP4am1yO^X&g;~uMdu2mHnUTVSB8n1nZ>U{+zOG}8QkI30tCk=Z` zcd$8@>JR6uyKGwW;Sx|r{w0~x&mD8#`%$V>Juhl6CR;q!I-&}g~} zgdu(u))&-t=a(Y|Y1nio-}>U`MT$=QoL5G8dDdrPw`48bF{{-jx8rOIvBX1eYYqgk zs5FOMRy7wq_HB`Yc^_(}<3uOONdS zZ7L9MOZL3hEbaYtx0ppMRl_#Zw;2J#z~Ra*dipibTMP#+3?1!CFu@m9GQ$)ki^0z4 zV~~8$Ol^@qD@md1Od&1}b8k(bF-uyn!W<$L)|k3QwTdP(uJJQ0z|;2EWa4(!pFo}X z5}olxmhP_G3LQ#)+?OqAhY)VBtYp^H=(X(w2Yi;A`vb!^N1MA3(!n}^y09F*48eWN zR3xY_VU)kWKn=#y3s{Jj*=7Q&F2vV*t^zmSn!tU{o3X|P!YSHKNyEQ4o#4U3G?XyB z;mmly%(Wr1fH^s}$2b~j*I?U^REGfDk)@p`rDfKHwdV!y0T(=dKeyRiEj`gh={IJ< z467X>f;usRqW(ux8K*{VGTp{;d}=`14FgnDU=rc7)?xgjb>c`ve599qV>4cUV^UIG z36E0EU0f_nR(s0Um(5~`^m#KcJiqkhLM`?i<;96mud7WNJM3X~9jh<@%cOGCV#j=1 zGy~_)Qms-Ipj=XWCMVBfosg9c0*%(S#2Dtj_Ti+r7kF2C6pD#x#oLzZo7HH)c2U>1 z*H#%QaTXuW1i1;Wakd>syd$BGQ%JD>eHM>p<_UQur#p8+;g?^Oo?#FN#qUH5c;%&b zpOzk7W}@Kf&o~4ES_4i~as%(kNt#t8)5KN3P0awLJ}dlSVwXFRTd{_(nbnb`vfh)z zzS|N&;2TeQB$ zGmUiVx<%>j;pd2uDU1hmM9?8#QlbfR$D?oH`eEhmzF)Rl!*_JQz+D}KdVE zAwTYu=%|OQh^DI_WdB&Avq_Celhv8vn2PL)BnhYOVgG2`52dE1w$fj}R%%;B72OWx z;P9y1sGu&+Nv21#zIkZ9^%7ng5^d8OSYECbP%&05W>&?i-z36L zveF5H-?UUjjcpCcdgn2lBst`6)a%*U*bb6<`MdX%#YznbTM@iFcm8Ctl%)%;H-3A< z$|3mz!lElk@E3MgD;&9xjL*0OJq*62ks+lIT7t04$z;ZUZU%Jhxd1*Dn39sUzIUj_Fj({3!CQ{in)@L@iwU$(}nBP}GTayS`tqA(`eO5jIcV? zP&!Vbyf3H796S7<@t@8E{T2RRn{t0G+`l)cv~qA0a$1(Xny+j6tpl6llBIE+_C0+- zNRLTh^wlOUQsi9WOb_7J=C35S2dvvuvIup`M1A^ z;lNB`^}e(id}6-U+R@P7qUD7OvZ2fT*n8`+x$WWTU&lKmJ8y<7(PnW1Q8lV8nc`@A zlKDTp_y>KXw1)Ju6&X9n&DdTWZ?hb-w`xqF<-^`7{7GUd?ayR=u&wocn2Jtb$BfC! zM?>j1X@(~kAfR?OF0d=%R4S{5V14dH$T#RgvJzjBHsjP4&~_A<6)7UO0wF`vY*734 zXJX#1&(siE;b_mRN|5?*&h-7?%7LytP~*-0_-wO_s+;IOMjTQCcXpIWxh}_*@ zn|{qSD9}$xEXPde>P^;mKLT^^d1i^?UJPv07B(pW2nPGe%VR^4$E}gD0)K`OzQ>Rdok;bH7 z!qKcq-!zAPty9{Kc~110oVQdg=cA&JO2M1Ny~+| zzD#IL{~h#VjlWy1U(<_8YZpa*DF31KT!&_ndeD}5#G~xByUd_@d?_m9ReWYqvYW<% zO@T-1wFNzRXdEc0?9lbFS%Z3<2EP+8xh#8!VC5Rn+?(YqzEA)yL^02N^E$5*?|x+CTUBRT(zH71+N_)=#SL;vhT! z_zk&42ZF(n?WWKg4gQfM7R&mnfU@UBF$99H4((t4`e&8tfTt99T@+q35i@jM^rLDb`)Gb)2<~K8bcvp>$g@+2G`m{oZXis9QO@Mm-k6qLGDn?iZ9lBiiLqb zzc1Yd;ckj2v@V&hEIP@osT&yCrZL7Fk2Zyy4Ry^r+8%aG+>d0Bgaa&Lfn)*m^ei0d z>l*CZBh+;P0e_p0NQMVq%B3a2G8&lS#(yT9SO2aOB^Ul)N1XrlfqrPbUm`usnL+!V z`T5W*EjNkCngOcqT89{CjsXsNF170~frvbP)(D z+NTKUd?xS!;TnWi%S6C9PR_gu^Q|FdgThn!Ypc$BhPE^_i@C?4V{!c{K#;1F>x#PuLkBw?QFg(~>nWWWvz> zbOuuO{Eb{CF$VX2uJ7`Xg3g)3dQ=A!FpP1HI8ZNRJW#Jj&u+QpFY>liyqC00$0^iC z_GFrm+sFt9aD-7Q#fI%~#Gsx{pI`M|zYsy(0X$jDd=w2}z4(?e$v$UGdBXr)m4(I$ zyvBypGJ)^ZWfKjc!UkQ;u8@enNzBV?5_N%LeN_tG&}In2xjJO6DkxO>&@jNRc^KzW z5EJNiBx%rUx}M)f;yYex>=>W6+li~0)N}jj6vGA)%F@eHE>3 zD(DP=N>Z|Xn-rWZAI@*kd{OQ~p;{Z53^bom2L%!m^Cfx<6ei1LwZmc6kVZG6siYD4 zs|WioAHxPGXa2jBuE^zUfZYK$@BElz=S04?IdI7^gHUq8C)@SQ!V3(w2s>6WlLJzw za|W}4)Hv+~iG?5oI@jp-PqZcOk2x>aczT;jRX;5xTcMll^A>)ed6q7LL#n`ainM#iAuG z`Htop>H4@9O=g5Pj0sG+c4E~*@%1OuGDi1|59T0yt43%J|5MLu9Q*wi7O`a+s<@qzWxE;=U->M1E1CBKt7Mhz(f*O^$+v{X>Wdbj_Ci_ zdRHkDzHI|K9kI0D<@LZq@tvrIQ|NjA?V(uUCc z{+}qLAbjamBWW)WE*BwPjJc zcg}0{e9<=H1`q&ZJ1g|vg8@8U2|~J^tT9toNRVL|4lPi1rBMJD z9g6xqC|?s_qho#dX~-qFwOe)%M+KdU;q+!`+c0~A+xtjVAB?8Q|A))F5MyZ@$=Vd= zO!!*4-GkaXx`+7&T2@sq#%Z&yrn7^aRK!etIB2aYRRJCE2uRAnhSPoJcBfeC{O12f z5V38AEbc3J0)?hm46_dUn4qof9ZrIlRMwsK&6hv86}CrEcHTgRjbKBB!dTV$B0KTzz93eC{3(y zmHkCkpK5Gu8MZ@@xWD(tqOJK`np-CRV)s?$bCzBIA86kG^Q(?3w+wO!4{a>&s{N3Y zsWP{I(P0v>p?Y_E$2?l!!*Q~`(oe_8!W_jZ+7IHF7<7U=C%f0)8>_EW{xOMl$zFAK zl;KLTxF~V5^~qQD&VSxJ|1x3I$0K*ct1--~4?G`xtWRn43lLLR!>2M)a5kGQGl%<( z9@#mbs*JJf8Yp;BZ|`jOajRg?UBcdm!d3X(YpD|seyBl{KSL|(Tf`4!9qK!PLA}>P z?s^-+|I1xdyloN|Ag1uK5*};ToN6%bifL}grf4`@cSS0+eQCr)GBqQAQ;@1reyURF5L@{QH#zs&UT&e4CAw7Y0;=Pi@76WG@DH=E4zy^9-L zm<+lT!Ge%)rI@WrIbU*YCJ&^O<_17i-hseB4f0i6BE4L@Nr2v$l)eER0 z<*La)w?hB1T)sQ&xcYT3_r-KTqP16Tz+?~3v~YQ3!(m*i$GndqTr8^Tv6mMD*)l45P|^A^CoLaR;V<)_Y##4GJu0DqCxJZH zVPo*C-`Q9G4}PnqLWtYLu%+tnXv<%HTE)mvP!Q#bi@!4o{oU5P6vi8 z*hqOQsO-s8yd4SM!tGrjzc`EbVmF3h?US;eDX=xSx94(Xk?)S8B#xv*d?f|ipQEvy zSiMyv`R$_0xHG<}Io|Evq;(!zLedD$BVPYOJ5;FuckU|i?uc&00#@82bD zBhp>sq`olx)P;H1>CoJN%q4h4vF$znN%18c>l+Z+{Y$n#LTvdeg7Ix))X<>3d%p?t1!zoGx~a#gTa8aMdFE0hWkvFic!?7VsAYm zc0w`KugWu`BDR$KW3LM~w~yfABxRb1He1ligG|+kwSaTv@+Pwt_6lPASdiUPAXniT z`oHk&X03oezQHhR&)viN&!K(oLwdcJy^NcXUUaz4e&a^0qr$$s&<6IfVl_Fd_?C13-y6 zD+%o?s6V*m(v_%lxm7TWgX1zMLt~NKT89;ZFS{%}NjIwxNkYSFOM*e_R>ujIHFvQG zRK%q~0`K+yE}9kXSp|m&YW$4w6KiYvg~U&nbH1n{{IBC7=#{{B+1_9YVj5R_Gveg_ z17_9ZHRbe&BjsT)ddlS3qN=o#^*`BKXKGm|X)0!j=o?i=KPxuPcQSYwE z2N{bF3oT&%86jZ5IJ5?ewB1i?S3k|%j9p&PX;2L+^11=kCpsUqL9)GX4^wpIE9d3kC-;i7L(si zCfM!ZW>TXGA(EIjYk}sJ2~Xik)WN#-Ip$F_zf=Suuy?Bh0zhHx3acis`&?*n0@#7P z6brCEWcpjZF42L3)e9?jQ3rdlUDU_+7NJa=q_wJsXGR+mjXo8lop&$Cy8yZ*dTXv#==i-$FtBW_)Dz5Z zBn?(9U3{<~QcwG_`;#+IPcmiG$Mtnz&MEiiK3Z;2(yyt}!p;VY@W3E*-gX*Ll!yM2cc1v}$6hV+m_q zbn14SR1JOQa|m(%^RiTj_0LqY>vSG#fTgAWkVNeQUl-ZMHz@{FdgKT) z>>iGSWTB`65ZQF=UEruz*hPSQt4qh`y!=0zz26@vg-jsq$6%SO7VuHJOPW#AQ^TMH z*|iR(7nu>`foxrUXx6Rc`e!Tmn?6bf(z*X|p?=CGAn`ZJGIbYO^OUfkz>n#~5&*lO zbQ01XNe3*zZb~hfPfI(^?CyEVKbs-8t4h)1yyjwNiaYG$pM=SU2u6a=0kH^P6!_?35kbn;3XBmLo zqoXR#O0B4(2h?A9j47~`m!DaWrRf*zTbdoG7-xa#-yDTq{ycv;>DkVN2h&oXNON0z zdEUw{Yxf1sclMVq4Dy!vwP$lkb4kupJBJ8o8B{Q>i}*i8%U=`$^@qrq70k0!jm=~f zS*UbBcDFWwsJYe~e9Z0DjcvAC-^6Zz{Ub4abgAG^#s z&A-N%8d3>Ad)Z8}A?)9QbTMyEUh*J#rx4CA74F$$kTS@L+!DO1?@Suwr8?I~Jqjxt zbD8F5O=j=EKXm6)Euhzv}wuHJsvm)mLrq^8Vnwc3bD_4J%Y1mpmn?k-Our zbDu@u2$Kv%RepE+O)=55o$xO=<4q~VUwc?=Dnm$`k8cd$_pKja`O1K%t;#=m|VlEVi=-(l2oW2S8GZXMKP>x_#$UbH*P@*j3oDCdZ`;)SMM_S^5|5O1!QKyH@e)6Z=5s1Sdcw(<&-8HB>Mu;oDL>^g2to& zks%MrUXPjQ?G)KydnV_zpS;pNZrp4No5?#4Mk5-(zQTns%-dsT4<6U33Ysc?nEXnE zzh(hel_JYgnLA@ufzynTQsy>zTWErH?i< zT?A^y_HI4j8c<$+mpY>PNu$nWDA@T;<7jvY#8rBa0K|aJ25DM5^5mXCs6Gw5wqyu= zBCah-zPnrbp(cfEI&WqJuo${#l&xbsW@~Xr;f`m#8CyMa_8*dfN`w2XyNyOeO5VAA zO{5p1qyW5~51#;;@zu3LqL|-%{-rI)4o5kX{3Ey`k&DY3cyhX%_)uq-p5HVMrk%^T z97n+nVZ+5(v}q`EVKl=1jEyvSe&>HzCSRIpv(k%xO}O&^>m#9L^YYZFB#N24hxnZL zIW&az-M`sPv+0m;9amO!ZN6*xyzr#j(FfCa@UJVh9_g;H03!lhGewCMv3E0h&zYi2 z+NMi$zUDK6-w`v;S%*o8f5X+ht>MXBZ`2rmlVU1(A8Z0n zRaf3eb~0~~H2BP<7+CBwYg-8QM$XCe#x{7ud*N=XoNxD6&VH5|OFs;nYY8uauR3Ah z1iI36tq-RKiQ;54IbZrbx}~?Mr+I0)dE}{{7h=9;78ELqWm`Z6H?*p^`x|vQcu%jV z&m7I3UOL)-^6!hvUT>y?45@!Gk5nU{$8!DtR{MyN*W7!JS7%j@IA}KTxHiV+Ujv3I zjrHom?Y>RrqoK{omYp^6;zB99fUBHubt{~g9`B_1{tQH$nocaOczI7+Zs8W7J7t5c z56~mwwkugn`K>{-3+@G*Y*oa2O81M;-pcY0gtF}n@+xoUag&hjg4A+@WWQd6l1lD=6A<9~-7Yr}b~&OZ zOebFVa((q1W0PQzNK(qhEB^OkasPq9`e1ohvRX^v^8jg68?8Iki}fM#kmi4*LcT4Trj$0$&I8b!4)HXWHH za09(pmgcp+&^c5n7cs6WK>|g03R0ZfU2cA#6q(s|$~mQT7ltZtsfRD1hudedb2hcPgERQCsBZE9XWXK#e;+0)|yg` ztgYUuaqMT)u}AiQll6CK3>fXC(W-lSl{)Ol zq9?CWmRXuf?y4WlHb##iYDSK`w#UIIIjtvN!RW4tc_hiKi~U^V;_IapLV~mse|aBl z4>um8+M4n!~k*cC1FQ;=t_b_k1fZPIZO9!zs?JBhH7PG03__6RQEZ=X1Hu$&D` z1Sⅇ?|y%=^rlPaKo*RWiC_La`pdY);_#=-JG6!fx1)~B99Y9;?#q^b7syt$fcR3 z*-7dy74XfzP=}J>V2;x9cyvvGS;T~)zo4;Cqh$jpBD)!rV;170siwGgDcrq@^{akV zY#?QlN#)4tDfb?3GmtOt7gav&mod$zE2b2pINKJk>Chc=OG&Ks(`yUJ+WJ~tvI;>~ zeT(p_(mcuyDy7o7bF2>)18qiKNouj0= zU}@6L}JTd;_w$To(Pkbha@< zy3F}B(zSO5vYwD>~x|01935KRU#wEe~V0^$6{ZUjYW#whtCe zV$qur$l8Xn|5*l245WKBT{>dO9)%1FYz-;XOkTbZ!$d_AW;ZS;{Am|$yYC)1cw9y1 z0lRQo_&aqCf||h&a1~$XofZUh{#v1+jVZ?D>^{whQ!wVuLA@{5kjYf~Wdqa`H$XND zV+b~$YIpwX9-5V3<)AT^%h}KzR_k~##==rH-0dlWl4ePlmO5>=#Qdv%fuw+Cg#6*{45>v zVCiRpniYkS4DMEJ0^L^VnjarT-ceX#fgkiSlI7OsqCGo#9TkgK8HxWL+0hxtYToT4 zTgB8MWGX0WYGHOj!`ANM=EP6?5qD`fcxeJS_VPBMJk*`UV0dq~KS5Cr?CL18U!kGi zXyh80&M?q7Ec^{Fvn#$f;Lk3?=4*GT!|1N%PhI%8=Tp49&>u&I+&GHdQ*aEDLsJC) z9*-JOi4cLFio8YeMM$6PVo6lry|{ZV8=Ge|@9#L?oAbVfB{=h98&Hw*3pHVOQ-M=~ z^d>;IIr#WJ`j9_rrcNfxXS#y$tMX=x)zzbqXyunRX_>pt%Qm&uxue~i!#rvRWJAp{Wf@;<*G`nachOU- zEH5fI$=*$8DhM5l>}uDoEk})?mwe-b{EQou?FLH8dzczn|D_Tovu4XtcKYZnA7(dw zm>34S?QWS9zL#IDeH@SKD6reiVVtaZy=Zscy?Y@tm~GJa-HN*ZJL32A9~6}}FfQ_c zSB?+J(uHK19@RyDdWEhi7G2VXr@HT|*VA6^;3#>ikXKWh_Z+uuVe!&fy9>7grQsdK z%KWC;w_J;+hC8*%DC}^=XOD()XB42?+8TuWLS6iQ8S-AR+f}Sa>L%b6o!=g)#{Eox z`$KL(8?nzbQ6V{Z{iYe6#q5ZW5y-sXfI~m8QcTIn!gaCO!aSn`W4CdfJgm8+J5SOM z1_UWd_{GM@>Q}YqDy4t*wzQ zhfn$~fA93G5~FgG%L>aNIZ8dfqEqT7?AQ{f@UYVDITH_ChnlgJY@{}2giuK2awazo z0*7}v>8u-kN0X1j(HlWMEu*gHU%diEJa1J56WpZk4H+0WDeI4h2pzzXja*f|*aMqf55jqFo>a}=kwh3rV5{P6wpGx#Q6GW7&zhKYz+s~3&zZEOD$~TMi&82D6Wx`U=J_a* zk-!m-cJy#ooAqfz;J3dh+F_HIH6y!uD}p84HUr|18vFnp+v4aF^c6WfQe6!oMB+AM z5Zap_ns>>t==P_02RmcTG%9Aq?B}`3Yk8uHUPC6cO>zOHMuzqCE@CGgDj0z%?bLjK zEJHDIE{Atc8BAd%G?WG&Ee@3r@}c0cYH0-xtpk(xmY*^|lKsD8vghg-^`tUB)<67z zyq)JioA2MoeLJXCt-ZCickLo*t9DU)OVx}NMG=IwYR}q5QM-1H*u5Wua=OmL9eSeJBLvl`wYvQVdHCA;*)%qr-)t`rytIK%94YZDt9o!iW)=G)t1GhDIzsE;*XW+!@Vw7YPkSoHnUXt~J zGw!1ZE)6%@1P9^12Dl&zy1K&N3o^y7BnuFS%PQ?j@qA4%+kt_=j+7{*9#Y)6VOQ2> z+wz$~5NP^wAn5mkp+FKiW2JR6YL&o}vd^=Y!a?F6nJgl;;?y&X7M8S#Vkcw2S1eoZ z+bw(*hqNkdf^DhhFlS>V`e^*uQ?@LXsAe`x zt7i>#P6f*@9%YG*i6xb$4<9^O+W@D4ugmkrE_0(nYLy->R#=Cn$XxT>*K<<_P=$2O z^{~X=F|)mX3E>P1hbrcq6zVtSg!j#(4dM?p9I86lnuau|cg{DF*N*DxcXtF8a}^d>+};n?gqzV` zDWwJ-N=8=kIoaIO6}WEmB)-=!yMI|KQ*->&N}*)0&yv`;B#~zgqu)-Yg&q%63qKDl z%J_(Q+H?ORrsoP=BK;(ikpGXOf1%cH5C9P|P?Kf`-uG1tPGf&%FN+Z6NO?oqGSJ*e zZ077-3~#D?+4doK!~D;$m3DSdpZbk(zAjL@$U(Wn7S`IPdl+}JJA!fuV2f$@7z@He zj{5DLhTRz`ALqR%5F3ykBG}mrTJEsDY#HOxBl)GZ9U0}`94#I5%@+nj@x=Cbd_Cv* z-S2Ox{|sIy3vnpNFUMn`jxlH_K|7Y15=Zk>`_-}s!mrCJWKH+Oq~~^~D` zk6|sgZyB)Ezh}Lz-1fey2Fj&QTUAG;X2&kf;(U3#o_lP)E-qZa#yRn&oxG3>;{FpE zSzR7*sQg2o(v3HpsLB-f@Nq;FOI;;Vd&Y#MR0Ek>fWIb%RvMf**!2a5WaSZ@O$~;= zklt0;F4+w!6EX3YJC9xwAIj?rqW7rgBj*tA@xJGBm*XveJBUPvJ_oBO$i|DR<_w|) zYwk$IYC5pRb{Vvh#m=4-JOvu*h&l=G9qH#z3U^P06H8z9`EUzhu1UWb95-lKOYd(;OIo+r`-z^C^DU4zv)c z{?B)#TI=g8{fwPHV@g#G3R2kz@2Sn9k(`FKU1O6E)`zbb{PrbYeV8v3NsMRCACoKG z`SbMRgND1L&_4=8)EwYh)M)@J!&Vr7lA@x!SHo1)M5UZ^`KU?akJ-+i5+4CaRdLWQ zSiC3}YKQ3#X!J;sh?{~bts3tUnP9Yrofp|;Wmn0SA-=d}=Jw8PD}qJk4B1#f{T`>r zK&_PSkzNDN?q^ro+-tWqv&!+x&&UqOJQ!<9{%ZFu=aiAr{rIMpCCh0=fNfn(JzY6I zF}9o?)Pm6~t2;rRdQ1`jl5g7$sPnWJ;@KkMj|eRbcvfUJNt?$&zhHOd3>7KCq}hT| z@M5w@ws`0ZTLfO+{{_cml_nC(0crDeTo?C@OX}5oH;QiTw1Fa4?tfo|muXKA^0cp}Q7t2?PwlH#8#3HuD{b?| z%rf=#9?RB>R2mNFTACm0gD{!tf%AO#{@4#2FzJ`6+^-NrI1KWQAD}eH0g|*_#qu&GW&6NoFs}AFo*OSp!C`JKw(5zukGH_;H_P{d4 zDM;UZ#G9%1z09+Cj4Mq45~~`#^&h0LJ0VVh3UjPxF8i~b~E zW<5$C|BWrUV_qxxX6S{dStf(C5ntD^Rapem-r?|pQ;BiGM|(5)P zGugNsPC;aNhwvzzH!vgm4A$Qwo1qmD%y8}LJs)JZ^gxJ;M~GB5A!Qgygml1dS+mP? zY8k^!k4F~hzm3xQ*2KTLN{}8n#71Lq49S@J5|nEyl4qtKe2Klau`Rj|J}mgC961c3LULdwGx0w(DJ759NdZdkGMow;K*=;I$R zUw$=MNGO9mkAU77n)Ya1gszeQFkK`hmOQSdJD*>3kFF_FHV_?B5Si#R^Q;Q7>8yA? zn;a6HMQP8G;Z*j~N!&6Do{H|%?xr%OQEs{I_g&1$cfHX|zUBzJY<2OXlaLa5PzTyY z-Gqf~zWN*o>d-C}=)042_YDUxL8A#V8acy=q^sS=ZF=OFY*tiM!X- z(uz!SPAUZ|(pz#(-pU zx3N`Mo3!BUK^X#+t(46qW9q0^k*4FuCuPh|VO38C0o5uhaLW#4Gs%~bf{#fQ=#q)8 zlb5E1{>_CYEt$Bsqo;czSy>CC3<1GG*PEZSrD<8XfsZR9ANWK*V2ZfkB^p1nA^)YB zAXkw)$&%PVW!l zT=%h^1Xgg$Egp!)wIW=(ICnL>lh=%LbtL6eZk{^)%+h$$`&NhQ)mqQPgZnbch>Ngl z;^8GV!?{HGv_|7rKZ*+=4I+oLOMVpyV&o5Rk>q+)JzLHW+Hs-tUT*IOWp{$k>>NB! zzU)LuiW!8-8KLX5xDrBl^J1byTa!^QR-e!&k+-PCMnH7WBQz$tkNGwVc{Xyi4To|L z?A~uafX@gQCD$I)d9ylBXFiqRm^8}$d?~Cgd*YWiZ6sN}e0agPYCkDI(PkzzvXv9g zFE!!0S}Ebp$Hd@ng`LsQs}#{&R-e~a2zJQzgOncm>F-}}{yiKW{305{AHzNND{=c4 zXtn*n|MqjqX@rp>h9u6dm;f-}!sTo@*AzK;Ef0}&5@OY-af^h|oRjPl4_#G8jvnQK z86ao=*1MLuburGRTER7wwGMg^xU@;`eLDS>y3wxm&O3?Ei?}cRf296`PQLy}@eW1v z8pXJKDL-+CSZC5)g zu?H0~W!egBmSSa|W`4CsADt{eeqP9}71z^NkT#m}$vV-vgYslZKryXf#Z(X>LggAUoX-8ecBbKX+P^4&@i*_ocn!F*AmZe zzbNk#u0`@5A3Cfe`8bmNo$+Dez>7u+9CxwZ1u-RHSn?mkcppm0)NpHHh-=wVZg9pU zfqxWT)|#xD>7pMIHjXMJYC_%+))jS9KT!W4*i)T%s_tloW+$XRx;c1dK<1*r$-Bc9 zJ!d*zwy^N6|GDH-C^e;)VXxKd3G$qWY(QeEvRe{L!1*xm^4=w^01iufTd*ArKQ^PC z1Xo+V5Z7%>F+$GDEBgp{6xyUb)8)Arfpt);Et5eGld8vwa%@p}V}`rwt7>%)No9qm zL;6TDScqIEO=>l;%HA23ihMn9tQHg*_LMQy-XJJavAy?Qm}r=(`0#wkW%mB^Sbz-6 zovP`~8^cIli!KPdmVTDKZOnXq{Q#>DOaLQZag-42hvhpu3U+Yel$YbJreQ5Q!FRI| zw=buEPx>f*80`1*p`WP9`ew2>C^S2*6#4mg3RZ0Vq=xh@4ZI8d8ZBHbrXTw^VUJ87 zuv%+3R2#O&cO9z8>IYF5aRBR(l04G3vCHXx4GBTW#36YrSI$u7+B)~M`V%RV$r>sK zx<(%~Jb^oh0)mMM$pZJG`9j<-&l(NXZ&Sj?*OsdT1otX*r}x(y^9)H*xZ^KrmS1~aTuIP{==>h*uYCA()SgT|Dw9;~5{v0g=2YjdcB zoF1k*jLj15@<9#RoiO3WkSDPM>F#Qu?@PwpgK1YAcRolo0U(Kyd!vNuK{sap1amPb z*^ewV-}6>aZEyS>0q3~*D2(bRA%NX`^HV^A z$iBBTk!`5<=B_bp{B+wd)nVHp2NP&9`!iEALN1+jc?6tiSMB%&Z`XVX+IrdML8IfQNUf8OTHqE;7QTU=p#cQyoPwTQG>EfSNz zZ~eMGY&JmQ#@Nl!@yzlTTY<^XWqrYJjLo8ELvHL9M)p&cc5F7gq4PuInZHYGN^?UG zTaRtlq)8Il?`Dh}S~^LBZ1FgBjZ=5p5As981u#c+YWpzaTd~p?jQeFNzTWbPKhLJl zYe0{Y+7-JB6GQYpyQGw=DJyQ7Dhe!>U&3<)`!05t+;$L&e?=9&bmtK z>UG=8mmqMNP-;~kRQZ5&WpC~;jbMN~tuLK_>Sh$B#lsDg9Fy2Sr`~ed&7%Qe@GHl` zHV#a$SbENaD?@1q>!>M8?mzoUMVtPv7i6qHWV!LV@_C+bARx$_prCc3r)my+M{3v8 zowi%4te9(oO(i8%jprz;dAlSKxzMOFm3P8I!Vxg|pkCwaRJ81z5Z!QXm%4-SV$7~*$+C0z}+wMn+vbc zlekV`dHqV+yzopue7-Z6r2K2WgoXX9p}x0F z_i1Ty3T^Bc(o59U_~9RwAO}ytY8=g5%6(8d<8P27EUGMDGJb7i-u_HZpENF|SO z$*AX-%Bv)1pOqEY=lOVOyjCrIvvLd2P%qKEd_<+UD0c+*FHSvwEhT|hz6Vg>7;YIL zs)3}tR8(zV%+vu>f5^lU&}!R}XB|KH*Sxdohy3^iYd??v56|2@Blm=p9D+7Ij+hQR zecZxD9apQLZ|`kqA(r91?@aj%FSO`66PXe0JRvq+anpiz9VHaQ<=kCIdB4}R(x^w8 zTD$od&Y#B1v|doZB%wYgezQzj^y}Bp=MTp8ex;sox2?I|)a|_rdN2Fm{$#!JmeIqp z&T!nHt1YYSELcrpBXzHeJL}HODO{6G;w3{}%omGwX;rc;QjLQqxC}}`ThXh-y|Q|3 zlsBpv1!LL#;+gy#f}T_Sm%o(rllVtfPL5Gepa3Bq5?--mp!Kb0cDm^gG8aSGF{