From f572b35040886cb0160d0a333ba713f69ee0cd98 Mon Sep 17 00:00:00 2001 From: xianting77 Date: Thu, 30 Sep 2021 12:03:13 +0800 Subject: [PATCH] add ch32v103 bsp support --- bsp/ch32v103/.config | 390 + bsp/ch32v103/.cproject | 204 + bsp/ch32v103/.gitignore | 25 + bsp/ch32v103/.project | 93 + bsp/ch32v103/.settings/language.settings.xml | 14 + .../org.eclipse.cdt.codan.core.prefs | 73 + .../.settings/org.eclipse.cdt.core.prefs | 6 + bsp/ch32v103/Kconfig | 27 + bsp/ch32v103/Makefile | 13 + bsp/ch32v103/README.md | 40 + bsp/ch32v103/SConscript | 18 + bsp/ch32v103/SConstruct | 31 + bsp/ch32v103/applications/SConscript | 11 + bsp/ch32v103/applications/main.c | 75 + bsp/ch32v103/board/Kconfig-bl | 35 + bsp/ch32v103/board/SConscript | 11 + bsp/ch32v103/board/board.c | 116 + bsp/ch32v103/board/board.h | 56 + bsp/ch32v103/drivers/Kconfig | 52 + bsp/ch32v103/drivers/SConscript | 29 + bsp/ch32v103/drivers/drv_gpio.c | 774 + bsp/ch32v103/drivers/drv_gpio.h | 29 + bsp/ch32v103/drivers/drv_usart.c | 259 + bsp/ch32v103/drivers/drv_usart.h | 18 + bsp/ch32v103/figures/compile.jpg | Bin 0 -> 54818 bytes bsp/ch32v103/figures/demo.jpg | Bin 0 -> 26774 bytes bsp/ch32v103/figures/shell run.jpg | Bin 0 -> 57007 bytes bsp/ch32v103/libraries/Core/core_riscv.c | 380 + bsp/ch32v103/libraries/Core/core_riscv.h | 303 + bsp/ch32v103/libraries/SConscript | 25 + .../libraries/Startup/startup_ch32v10x.S | 187 + .../WCH32V103_std_peripheral/ch32v10x_conf.h | 39 + .../WCH32V103_std_peripheral/ch32v10x_it.c | 50 + .../WCH32V103_std_peripheral/ch32v10x_it.h | 17 + .../WCH32V103_std_peripheral/debug.c | 162 + .../WCH32V103_std_peripheral/debug.h | 34 + .../WCH32V103_std_peripheral/inc/ch32v10x.h | 3244 ++ .../inc/ch32v10x_adc.h | 193 + .../inc/ch32v10x_bkp.h | 95 + .../inc/ch32v10x_crc.h | 35 + .../inc/ch32v10x_dbgmcu.h | 48 + .../inc/ch32v10x_dma.h | 216 + .../inc/ch32v10x_exti.h | 88 + .../inc/ch32v10x_flash.h | 157 + .../inc/ch32v10x_gpio.h | 165 + .../inc/ch32v10x_i2c.h | 208 + .../inc/ch32v10x_iwdg.h | 54 + .../inc/ch32v10x_misc.h | 44 + .../inc/ch32v10x_pwr.h | 57 + .../inc/ch32v10x_rcc.h | 232 + .../inc/ch32v10x_rtc.h | 52 + .../inc/ch32v10x_spi.h | 227 + .../inc/ch32v10x_tim.h | 513 + .../inc/ch32v10x_usart.h | 193 + .../inc/ch32v10x_usb.h | 707 + .../inc/ch32v10x_usb_host.h | 97 + .../inc/ch32v10x_wwdg.h | 40 + .../src/ch32v10x_adc.c | 1029 + .../src/ch32v10x_bkp.c | 221 + .../src/ch32v10x_crc.c | 92 + .../src/ch32v10x_dbgmcu.c | 60 + .../src/ch32v10x_dma.c | 528 + .../src/ch32v10x_exti.c | 157 + .../src/ch32v10x_flash.c | 900 + .../src/ch32v10x_gpio.c | 472 + .../src/ch32v10x_i2c.c | 883 + .../src/ch32v10x_iwdg.c | 109 + .../src/ch32v10x_misc.c | 102 + .../src/ch32v10x_pwr.c | 196 + .../src/ch32v10x_rcc.c | 837 + .../src/ch32v10x_rtc.c | 244 + .../src/ch32v10x_spi.c | 587 + .../src/ch32v10x_tim.c | 2079 ++ .../src/ch32v10x_usart.c | 731 + .../src/ch32v10x_usb.c | 149 + .../src/ch32v10x_usb_host.c | 708 + .../src/ch32v10x_wwdg.c | 123 + .../system_ch32v10x.c | 505 + .../system_ch32v10x.h | 28 + bsp/ch32v103/linkscripts/link.lds | 193 + bsp/ch32v103/rtconfig.h | 164 + bsp/ch32v103/rtconfig.py | 66 + libcpu/risc-v/SConscript | 2 + libcpu/risc-v/ch32v103/SConscript | 14 + libcpu/risc-v/ch32v103/context_gcc.S | 294 + libcpu/risc-v/ch32v103/cpuport.c | 166 + libcpu/risc-v/ch32v103/cpuport.h | 44 + libcpu/risc-v/ch32v103/cpuport.s | 27797 ++++++++++++++++ libcpu/risc-v/ch32v103/interrupt_gcc.S | 124 + 89 files changed, 49865 insertions(+) create mode 100644 bsp/ch32v103/.config create mode 100644 bsp/ch32v103/.cproject create mode 100644 bsp/ch32v103/.gitignore create mode 100644 bsp/ch32v103/.project create mode 100644 bsp/ch32v103/.settings/language.settings.xml create mode 100644 bsp/ch32v103/.settings/org.eclipse.cdt.codan.core.prefs create mode 100644 bsp/ch32v103/.settings/org.eclipse.cdt.core.prefs create mode 100644 bsp/ch32v103/Kconfig create mode 100644 bsp/ch32v103/Makefile create mode 100644 bsp/ch32v103/README.md create mode 100644 bsp/ch32v103/SConscript create mode 100644 bsp/ch32v103/SConstruct create mode 100644 bsp/ch32v103/applications/SConscript create mode 100644 bsp/ch32v103/applications/main.c create mode 100644 bsp/ch32v103/board/Kconfig-bl create mode 100644 bsp/ch32v103/board/SConscript create mode 100644 bsp/ch32v103/board/board.c create mode 100644 bsp/ch32v103/board/board.h create mode 100644 bsp/ch32v103/drivers/Kconfig create mode 100644 bsp/ch32v103/drivers/SConscript create mode 100644 bsp/ch32v103/drivers/drv_gpio.c create mode 100644 bsp/ch32v103/drivers/drv_gpio.h create mode 100644 bsp/ch32v103/drivers/drv_usart.c create mode 100644 bsp/ch32v103/drivers/drv_usart.h create mode 100644 bsp/ch32v103/figures/compile.jpg create mode 100644 bsp/ch32v103/figures/demo.jpg create mode 100644 bsp/ch32v103/figures/shell run.jpg create mode 100644 bsp/ch32v103/libraries/Core/core_riscv.c create mode 100644 bsp/ch32v103/libraries/Core/core_riscv.h create mode 100644 bsp/ch32v103/libraries/SConscript create mode 100644 bsp/ch32v103/libraries/Startup/startup_ch32v10x.S create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_conf.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/debug.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/debug.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_adc.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_bkp.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_crc.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dbgmcu.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dma.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_exti.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_flash.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_gpio.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_i2c.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_iwdg.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_misc.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_pwr.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rcc.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rtc.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_spi.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_tim.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usart.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb_host.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_wwdg.h create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_adc.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_bkp.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_crc.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dbgmcu.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dma.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_exti.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_flash.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_gpio.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_i2c.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_iwdg.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_misc.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_pwr.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rcc.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rtc.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_spi.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_tim.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usart.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb_host.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_wwdg.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.c create mode 100644 bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.h create mode 100644 bsp/ch32v103/linkscripts/link.lds create mode 100644 bsp/ch32v103/rtconfig.h create mode 100644 bsp/ch32v103/rtconfig.py create mode 100644 libcpu/risc-v/ch32v103/SConscript create mode 100644 libcpu/risc-v/ch32v103/context_gcc.S create mode 100644 libcpu/risc-v/ch32v103/cpuport.c create mode 100644 libcpu/risc-v/ch32v103/cpuport.h create mode 100644 libcpu/risc-v/ch32v103/cpuport.s create mode 100644 libcpu/risc-v/ch32v103/interrupt_gcc.S diff --git a/bsp/ch32v103/.config b/bsp/ch32v103/.config new file mode 100644 index 0000000000..64f136ff83 --- /dev/null +++ b/bsp/ch32v103/.config @@ -0,0 +1,390 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=7 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 +CONFIG_RT_DEBUG=y +# CONFIG_RT_DEBUG_COLOR is not set +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +# CONFIG_RT_USING_MEMPOOL is not set +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +CONFIG_RT_VER_NUM=0x40003 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=512 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +# CONFIG_FINSH_USING_DESCRIPTION is not set +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=1024 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +# CONFIG_FINSH_USING_MSH_DEFAULT is not set +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +# CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +CONFIG_RT_USING_LIBC=y +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTHUB is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_LCD_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_DM9051 is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_CH32V103R8T6=y + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_UART_CONSOLE=y +CONFIG_BSP_USING_PIN=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_UART=y +# CONFIG_RT_USING_UART0 is not set +CONFIG_RT_USING_UART1=y +# CONFIG_RT_USING_UART2 is not set +# CONFIG_RT_USING_UART3 is not set +# CONFIG_RT_USING_UART4 is not set + +# +# Board extended module Drivers +# diff --git a/bsp/ch32v103/.cproject b/bsp/ch32v103/.cproject new file mode 100644 index 0000000000..ab8a04ff5c --- /dev/null +++ b/bsp/ch32v103/.cproject @@ -0,0 +1,204 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/ch32v103/.gitignore b/bsp/ch32v103/.gitignore new file mode 100644 index 0000000000..1272c34c3d --- /dev/null +++ b/bsp/ch32v103/.gitignore @@ -0,0 +1,25 @@ +*.i +*.o +*.d +*.elf +*.diss +*.map +*.bin +*.log +.vscode + +*.dump +*.verilog + +*.swp +*.swo + + +tags +TAGS +TAG +CTAGS +Makefile.local +Makefile.global + +/makefile.targets diff --git a/bsp/ch32v103/.project b/bsp/ch32v103/.project new file mode 100644 index 0000000000..f8011d80fd --- /dev/null +++ b/bsp/ch32v103/.project @@ -0,0 +1,93 @@ + + + CH32V103R8T6 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + rt-thread + 2 + virtual:/virtual + + + rt-thread/components + 2 + virtual:/virtual + + + rt-thread/include + 2 + $%7BPARENT-2-PROJECT_LOC%7D/include + + + rt-thread/lipcpu + 2 + virtual:/virtual + + + rt-thread/src + 2 + $%7BPARENT-2-PROJECT_LOC%7D/src + + + rt-thread/components/drivers + 2 + virtual:/virtual + + + rt-thread/components/finsh + 2 + $%7BPARENT-2-PROJECT_LOC%7D/components/finsh + + + rt-thread/components/src + 2 + $%7BPARENT-2-PROJECT_LOC%7D/components/drivers/src + + + rt-thread/lipcpu/ch32v103 + 2 + $%7BPARENT-2-PROJECT_LOC%7D/libcpu/risc-v/ch32v103 + + + rt-thread/lipcpu/common + 2 + $%7BPARENT-2-PROJECT_LOC%7D/libcpu/risc-v/common + + + rt-thread/components/drivers/include + 2 + $%7BPARENT-2-PROJECT_LOC%7D/components/drivers/include + + + rt-thread/components/drivers/include/drivers + 2 + $%7BPARENT-2-PROJECT_LOC%7D/components/drivers/include/drivers + + + rt-thread/components/drivers/serial + 2 + $%7BPARENT-2-PROJECT_LOC%7D/components/drivers/serial + + + diff --git a/bsp/ch32v103/.settings/language.settings.xml b/bsp/ch32v103/.settings/language.settings.xml new file mode 100644 index 0000000000..898d353ed7 --- /dev/null +++ b/bsp/ch32v103/.settings/language.settings.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/bsp/ch32v103/.settings/org.eclipse.cdt.codan.core.prefs b/bsp/ch32v103/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000000..4ee3a60be2 --- /dev/null +++ b/bsp/ch32v103/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,73 @@ +eclipse.preferences.version=1 +org.eclipse.cdt.codan.checkers.errnoreturn=-Warning +org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false} +org.eclipse.cdt.codan.checkers.errreturnvalue=-Error +org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"} +org.eclipse.cdt.codan.checkers.nocommentinside=-Error +org.eclipse.cdt.codan.checkers.nocommentinside.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Nesting comments\\")"} +org.eclipse.cdt.codan.checkers.nolinecomment=-Error +org.eclipse.cdt.codan.checkers.nolinecomment.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Line comments\\")"} +org.eclipse.cdt.codan.checkers.noreturn=-Error +org.eclipse.cdt.codan.checkers.noreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return value\\")",implicit\=>false} +org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation=-Error +org.eclipse.cdt.codan.internal.checkers.AbstractClassCreation.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Abstract class cannot be instantiated\\")"} +org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem=-Error +org.eclipse.cdt.codan.internal.checkers.AmbiguousProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Ambiguous problem\\")"} +org.eclipse.cdt.codan.internal.checkers.AssignmentInConditionProblem=-Warning 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redefinition\\")"} +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"} +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"} +org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem=-Warning 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+org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"\u672A\u4F7F\u7528\u7684\u9759\u6001\u51FD\u6570\\")",macro\=>true} +org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")} +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=-Error +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"} diff --git a/bsp/ch32v103/.settings/org.eclipse.cdt.core.prefs b/bsp/ch32v103/.settings/org.eclipse.cdt.core.prefs new file mode 100644 index 0000000000..78348e33ab --- /dev/null +++ b/bsp/ch32v103/.settings/org.eclipse.cdt.core.prefs @@ -0,0 +1,6 @@ +eclipse.preferences.version=1 +environment/project/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1573373326/PATH/delimiter=; +environment/project/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1573373326/PATH/operation=replace +environment/project/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1573373326/PATH/value=E\:\\DevBoard\\ARTT\\rt-studio\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\WCH\\RISC-V-GCC-WCH\\8.2.0\\riscv-none-embed\\bin;E\:\\DevBoard\\ARTT\\rt-studio\\RT-ThreadStudio\\repo\\Extract\\ToolChain_Support_Packages\\WCH\\RISC-V-GCC-WCH\\8.2.0\\riscv-none-embed\\bin;E\:\\DevBoard\\ARTT\\rt-studio\\RT-ThreadStudio\\platform\\env_released\\env\\tools\\BuildTools\\2.12-20190422-1053\\bin;${studio_install_path}${project_gener_relative_path}/builder;${studio_install_path}${project_gener_relative_path}/mdk +environment/project/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1573373326/append=true +environment/project/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.1573373326/appendContributed=true diff --git a/bsp/ch32v103/Kconfig b/bsp/ch32v103/Kconfig new file mode 100644 index 0000000000..42f9544b2a --- /dev/null +++ b/bsp/ch32v103/Kconfig @@ -0,0 +1,27 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +#source "board/Kconfig" +source "drivers/Kconfig" + +config SOC_CH32V103R8T6 + bool + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y diff --git a/bsp/ch32v103/Makefile b/bsp/ch32v103/Makefile new file mode 100644 index 0000000000..f2efa4a561 --- /dev/null +++ b/bsp/ch32v103/Makefile @@ -0,0 +1,13 @@ +phony := all +all: + +include config.mk + +ifneq ($(MAKE_LIB),1) +TARGET := rtthread.elf +include src.mk +endif + +$(if $(strip $(RTT_ROOT)),,$(error RTT_ROOT not defined)) + +include $(RTT_ROOT)/tools/rtthread.mk diff --git a/bsp/ch32v103/README.md b/bsp/ch32v103/README.md new file mode 100644 index 0000000000..947d50900f --- /dev/null +++ b/bsp/ch32v103/README.md @@ -0,0 +1,40 @@ +# CH32V103R# + +## 简介 + +ch32v103R-R1-1V0 是由沁恒微电子公司（http://wch.cn）推出的基于开源指令集 RISC-V 架构的开发板。 + +### 板载资源： + +| 硬件 | 描述 | +| -- | -- | +| 内核 | 沁恒 | +| 架构 | 32-bit RV32IMAC | +| 主频 | 72 MHz | + +### + +下载程序之后，连接串口(115200-N-8-1)，可以看到 RT-Thread 的输出信息： + +``` + \ | / +- RT - Thread Operating System + / | \ 4.0.3 build Sep 29 2021 + 2006 - 2020 Copyright by rt-thread team + Rt-thread inside + MCU: CH32V103R8T6 + SysClk: 72000000Hz +msh > +``` + +## 驱动支持情况 + +| 驱动 | 支持情况 | 备注 | +| ------ | ---- | :------: | +| USART | 支持 | UART0_TX/RX：PA9/PA10 | + +## 5. 联系人信息 + +维护人： +- + diff --git a/bsp/ch32v103/SConscript b/bsp/ch32v103/SConscript new file mode 100644 index 0000000000..534ec8eb5a --- /dev/null +++ b/bsp/ch32v103/SConscript @@ -0,0 +1,18 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = str(Dir('#')) +src = Glob('*.c') +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +group = DefineGroup('', src, depend = [''], CPPPATH = []) +#objs += group +Return('objs') diff --git a/bsp/ch32v103/SConstruct b/bsp/ch32v103/SConstruct new file mode 100644 index 0000000000..33ab37287f --- /dev/null +++ b/bsp/ch32v103/SConstruct @@ -0,0 +1,31 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +from building import * + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] + +Export('RTT_ROOT') +Export('rtconfig') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/ch32v103/applications/SConscript b/bsp/ch32v103/applications/SConscript new file mode 100644 index 0000000000..ef1c39fd83 --- /dev/null +++ b/bsp/ch32v103/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd, ] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/ch32v103/applications/main.c b/bsp/ch32v103/applications/main.c new file mode 100644 index 0000000000..cff240f22a --- /dev/null +++ b/bsp/ch32v103/applications/main.c @@ -0,0 +1,75 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : main.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : Main program body. +*******************************************************************************/ +#include "ch32v10x.h" +#include +#include +#include "drivers/pin.h" + +/* Global typedef */ + +/* Global define */ + +/* LED0ͨrtpinӿ */ +#define LED0_PIN 15 //PA1 + +/* Global Variable */ + + +/* LED1ֱͨӵõײ */ +void LED1_BLINK_INIT(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); +} + + +/* mainֻһ֮߳һ֮⻹tshell,idle. + * mainֻһLED˸main̵߳עrtthread_startup + * + * */ +int main(void) +{ + rt_kprintf("RT-Thread inside \r\n"); + rt_kprintf("MCU: CH32V103R8T6\r\n"); + rt_kprintf("SysClk: %dHz\r\n",SystemCoreClock); + + LED1_BLINK_INIT(); + GPIO_ResetBits(GPIOA,GPIO_Pin_0); + while(1) + { + GPIO_SetBits(GPIOA,GPIO_Pin_0); + rt_thread_mdelay(500); + + GPIO_ResetBits(GPIOA,GPIO_Pin_0); + rt_thread_mdelay(500); + } +} + +/* ʹӿڲI/O */ +int led(void) +{ + rt_uint8_t count; + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + for(count = 0 ; count < 10 ;count++) + { + rt_pin_write(LED0_PIN, PIN_LOW); + rt_kprintf("led on, count : %d\r\n", count); + rt_thread_mdelay(500); + + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_kprintf("led off\r\n"); + rt_thread_mdelay(500); + } + return 0; +} +MSH_CMD_EXPORT(led, RT-Thread first led sample by using I/O driver); + diff --git a/bsp/ch32v103/board/Kconfig-bl b/bsp/ch32v103/board/Kconfig-bl new file mode 100644 index 0000000000..e9573713da --- /dev/null +++ b/bsp/ch32v103/board/Kconfig-bl @@ -0,0 +1,35 @@ +menu "Hardware Drivers Config" + + +config SOC_CH32V103R8T6 + bool + select SOC_SERIES_CH32V103R8T6 + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_USART + bool "Enable USART (usart0)" + select BSP_USING_UART + select BSP_USING_UART0 + default y +endmenu + +menu "On-chip Peripheral Drivers" + + menuconfig BSP_USING_UART + bool "Enable USART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART0 + bool "Enable USART0" + default y + endif +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/ch32v103/board/SConscript b/bsp/ch32v103/board/SConscript new file mode 100644 index 0000000000..148c99f42c --- /dev/null +++ b/bsp/ch32v103/board/SConscript @@ -0,0 +1,11 @@ +# RT-Thread building script for component + +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/ch32v103/board/board.c b/bsp/ch32v103/board/board.c new file mode 100644 index 0000000000..8003a94e91 --- /dev/null +++ b/bsp/ch32v103/board/board.c @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2017-07-24 Tanek the first version + * 2018-11-12 Ernest Chen modify copyright + */ + +#include "board.h" + +#include +#include "drv_usart.h" + +#include +#include + + +// Updates the variable SystemCoreClock and must be called +// whenever the core clock is changed during program execution. +extern void SystemCoreClockUpdate(void); + +// Holds the system core clock, which is the system clock +// frequency supplied to the SysTick timer and the processor +// core clock. +extern uint32_t SystemCoreClock; + +volatile rt_uint32_t g_ticks=0; + +static uint32_t _SysTick_Config(rt_uint32_t ticks) +{ + if ((ticks - 1) > 0xFFFFFF) + { + return 1; + } + g_ticks=ticks; + PFIC->CFGR=0xFA050003; /* رӲѹջǶ */ + NVIC_SetPriority(SysTicK_IRQn,0xf0); + NVIC_SetPriority(Software_IRQn,0xf0); + SysTick->CTLR=0; + SysTick->CNTL0=0;SysTick->CNTL1=0;SysTick->CNTL2=0;SysTick->CNTL3=0; + SysTick->CNTH0=0;SysTick->CNTH1=0;SysTick->CNTH2=0;SysTick->CNTH3=0; + SysTick->CMPLR0=(rt_uint8_t)(g_ticks-1); + SysTick->CMPLR1=(rt_uint8_t)((g_ticks-1)>>8); + SysTick->CMPLR2=(rt_uint8_t)((g_ticks-1)>>16); + SysTick->CMPLR3=(rt_uint8_t)((g_ticks-1)>>24); + SysTick->CMPHR0=0;SysTick->CMPHR1=0;SysTick->CMPHR2=0;SysTick->CMPHR3=0; + SysTick->CTLR=0x1; + NVIC_EnableIRQ(SysTicK_IRQn); + NVIC_EnableIRQ(Software_IRQn); + return 0; +} + +#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP) +#define RT_HEAP_SIZE (1024) +static uint32_t rt_heap[RT_HEAP_SIZE]; // heap default size: 4K(1024 * 4) +RT_WEAK void *rt_heap_begin_get(void) +{ + return rt_heap; +} + +RT_WEAK void *rt_heap_end_get(void) +{ + return rt_heap + RT_HEAP_SIZE; +} +#endif + +/** + * This function will initial your board. + */ +void rt_hw_board_init() +{ + /* System Clock Update */ + SystemCoreClockUpdate(); + + /* System Tick Configuration */ + _SysTick_Config(SystemCoreClock/ 8 / RT_TICK_PER_SECOND); + /* Call components board initial (use INIT_BOARD_EXPORT()) */ +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP) + rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get()); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif +} + + +void SysTick_Handler(void) __attribute__((interrupt())); +void SysTick_Handler(void) +{ + GET_INT_SP(); + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + SysTick->CTLR=0; + SysTick->CNTL0=0;SysTick->CNTL1=0;SysTick->CNTL2=0;SysTick->CNTL3=0; + SysTick->CNTH0=0;SysTick->CNTH1=0;SysTick->CNTH2=0;SysTick->CNTH3=0; + SysTick->CMPLR0=(rt_uint8_t)(g_ticks-1); + SysTick->CMPLR1=(rt_uint8_t)((g_ticks-1)>>8); + SysTick->CMPLR2=(rt_uint8_t)((g_ticks-1)>>16); + SysTick->CMPLR3=(rt_uint8_t)((g_ticks-1)>>24); + SysTick->CMPHR0=0;SysTick->CMPHR1=0;SysTick->CMPHR2=0;SysTick->CMPHR3=0; + SysTick->CTLR=0x1; + + /* leave interrupt */ + rt_interrupt_leave(); + FREE_INT_SP(); + +} diff --git a/bsp/ch32v103/board/board.h b/bsp/ch32v103/board/board.h new file mode 100644 index 0000000000..7e95c52cdf --- /dev/null +++ b/bsp/ch32v103/board/board.h @@ -0,0 +1,56 @@ +/* + * File : board.h + * + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * + * Change Logs: + * Date Author Notes + * 2009-09-22 Bernard add board.h to this bsp + * 2017-10-20 ZYH emmm...setup for HAL Libraries + * 2021-10-01 Walter modify copyright + */ + +// <<< Use Configuration Wizard in Context Menu >>> +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "ch32v10x.h" + +#define CH32V10X_PIN_NUMBERS 64 +/* board configuration */ +#define SRAM_SIZE 20 +/* whether use board external SRAM memory */ +// Use external SRAM memory on the board +// Enable External SRAM memory +#define EXT_SRAM 0 +// Begin Address of External SRAM +// Default: 0x68000000 +#define EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */ +// End Address of External SRAM +// Default: 0x68080000 +#define EXT_SRAM_END 0x68080000 /* the end address of external SRAM */ +// +// Internal SRAM memory size[Kbytes] <8-64> +// Default: 64 +#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int _ebss; +#define HEAP_BEGIN ((void *)&_ebss) +#endif +#define HEAP_END SRAM_END + + +//extern volatile unsigned long interrupter_sp_saver; +void rt_hw_board_init(void); + +#endif /* __BOARD_H__ */ diff --git a/bsp/ch32v103/drivers/Kconfig b/bsp/ch32v103/drivers/Kconfig new file mode 100644 index 0000000000..3d5d145194 --- /dev/null +++ b/bsp/ch32v103/drivers/Kconfig @@ -0,0 +1,52 @@ +menu "Hardware Drivers Config" + +config SOC_CH32V103R8T6 + bool + select SOC_SERIES_CH32V103 + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_UART_CONSOLE + bool "Enable UART CONSOLE" + select BSP_USING_UART + default y + + config BSP_USING_PIN + bool "Enable PIN" + select RT_USING_PIN + default y + +endmenu + +menu "On-chip Peripheral Drivers" + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config RT_USING_UART0 + bool "Enable UART0" + default n + config RT_USING_UART1 + bool "Enable UART1" + default n + config RT_USING_UART2 + bool "Enable UART2" + default n + config RT_USING_UART3 + bool "Enable UART3" + default n + config RT_USING_UART4 + bool "Enable UART4" + default n + endif + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/ch32v103/drivers/SConscript b/bsp/ch32v103/drivers/SConscript new file mode 100644 index 0000000000..148f402a14 --- /dev/null +++ b/bsp/ch32v103/drivers/SConscript @@ -0,0 +1,29 @@ +# RT-Thread building script for component + +Import('rtconfig') +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +src = Split(''' +drv_usart.c +''') +#CPPPATH = [cwd] + + +if GetDepend('RT_USING_PIN'): + src += ['drv_gpio.c'] + +#if GetDepend('RT_USING_I2C'): +# src += ['drv_i2c.c'] + +#if GetDepend('RT_USING_UART'): +# src += ['drv_uart.c'] + +CPPPATH = [RTT_ROOT+'/components/drivers/include/drivers' , + cwd ] + + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/ch32v103/drivers/drv_gpio.c b/bsp/ch32v103/drivers/drv_gpio.c new file mode 100644 index 0000000000..e98381d746 --- /dev/null +++ b/bsp/ch32v103/drivers/drv_gpio.c @@ -0,0 +1,774 @@ +/* + * File : drv_gpio.c + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2017-10-20 ZYH the first version + * 2017-11-15 ZYH update to 3.0.0 + * 2021-10-01 Walter modify License declare. + */ + +#include +#include +#include +#include +#include +#include "drivers/pin.h" + + +#ifdef RT_USING_PIN +#define __CH32_PIN(index, gpio, gpio_index) {index, GPIO##gpio##_CLK_ENABLE, GPIO##gpio, GPIO_Pin_##gpio_index} +#define __CH32_PIN_DEFAULT {-1, 0, 0, 0} + + +static void GPIOA_CLK_ENABLE(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); +} + +static void GPIOB_CLK_ENABLE(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); +} + +#if (CH32V10X_PIN_NUMBERS >36) +static void GPIOC_CLK_ENABLE(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); +} +#endif + +#if (CH32V10X_PIN_NUMBERS >48) +static void GPIOD_CLK_ENABLE(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE); +} +#endif + +#if (CH32V10X_PIN_NUMBERS >64) +static void GPIOE_CLK_ENABLE(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE); +} +#endif + + + + + +/* STM32 GPIO driver */ +struct pin_index +{ + int index; + void (*rcc)(void); + GPIO_TypeDef *gpio; + uint32_t pin; +}; + +static const struct pin_index pins[] = +{ +#if (CH32V10X_PIN_NUMBERS == 36) + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(7, A, 0), + __CH32_PIN(8, A, 1), + __CH32_PIN(9, A, 2), + __CH32_PIN(10, A, 3), + __CH32_PIN(11, A, 4), + __CH32_PIN(12, A, 5), + __CH32_PIN(13, A, 6), + __CH32_PIN(14, A, 7), + __CH32_PIN(15, B, 0), + __CH32_PIN(16, B, 1), + __CH32_PIN(17, B, 2), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(20, A, 8), + __CH32_PIN(21, A, 9), + __CH32_PIN(22, A, 10), + __CH32_PIN(23, A, 11), + __CH32_PIN(24, A, 12), + __CH32_PIN(25, A, 13), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(28, A, 14), + __CH32_PIN(29, A, 15), + __CH32_PIN(30, B, 3), + __CH32_PIN(31, B, 4), + __CH32_PIN(32, B, 5), + __CH32_PIN(33, B, 6), + __CH32_PIN(34, B, 7), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, +#endif +#if (CH32V10X_PIN_NUMBERS == 48) + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(2, C, 13), + __CH32_PIN(3, C, 14), + __CH32_PIN(4, C, 15), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(10, A, 0), + __CH32_PIN(11, A, 1), + __CH32_PIN(12, A, 2), + __CH32_PIN(13, A, 3), + __CH32_PIN(14, A, 4), + __CH32_PIN(15, A, 5), + __CH32_PIN(16, A, 6), + __CH32_PIN(17, A, 7), + __CH32_PIN(18, B, 0), + __CH32_PIN(19, B, 1), + __CH32_PIN(20, B, 2), + __CH32_PIN(21, B, 10), + __CH32_PIN(22, B, 11), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(25, B, 12), + __CH32_PIN(26, B, 13), + __CH32_PIN(27, B, 14), + __CH32_PIN(28, B, 15), + __CH32_PIN(29, A, 8), + __CH32_PIN(30, A, 9), + __CH32_PIN(31, A, 10), + __CH32_PIN(32, A, 11), + __CH32_PIN(33, A, 12), + __CH32_PIN(34, A, 13), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(37, A, 14), + __CH32_PIN(38, A, 15), + __CH32_PIN(39, B, 3), + __CH32_PIN(40, B, 4), + __CH32_PIN(41, B, 5), + __CH32_PIN(42, B, 6), + __CH32_PIN(43, B, 7), + __CH32_PIN_DEFAULT, + __CH32_PIN(45, B, 8), + __CH32_PIN(46, B, 9), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, +#endif + +#if (CH32V10X_PIN_NUMBERS == 64) + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(2, C, 13), + __CH32_PIN(3, C, 14), + __CH32_PIN(4, C, 15), + __CH32_PIN(5, D, 0), + __CH32_PIN(6, D, 1), + __CH32_PIN_DEFAULT, + __CH32_PIN(8, C, 0), + __CH32_PIN(9, C, 1), + __CH32_PIN(10, C, 2), + __CH32_PIN(11, C, 3), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(14, A, 0), + __CH32_PIN(15, A, 1), + __CH32_PIN(16, A, 2), + __CH32_PIN(17, A, 3), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(20, A, 4), + __CH32_PIN(21, A, 5), + __CH32_PIN(22, A, 6), + __CH32_PIN(23, A, 7), + __CH32_PIN(24, C, 4), + __CH32_PIN(25, C, 5), + __CH32_PIN(26, B, 0), + __CH32_PIN(27, B, 1), + __CH32_PIN(28, B, 2), + __CH32_PIN(29, B, 10), + __CH32_PIN(30, B, 11), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(33, B, 12), + __CH32_PIN(34, B, 13), + __CH32_PIN(35, B, 14), + __CH32_PIN(36, B, 15), + __CH32_PIN(37, C, 6), + __CH32_PIN(38, C, 7), + __CH32_PIN(39, C, 8), + __CH32_PIN(40, C, 9), + __CH32_PIN(41, A, 8), + __CH32_PIN(42, A, 9), + __CH32_PIN(43, A, 10), + __CH32_PIN(44, A, 11), + __CH32_PIN(45, A, 12), + __CH32_PIN(46, A, 13), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(49, A, 14), + __CH32_PIN(50, A, 15), + __CH32_PIN(51, C, 10), + __CH32_PIN(52, C, 11), + __CH32_PIN(53, C, 12), + __CH32_PIN(54, D, 2), + __CH32_PIN(55, B, 3), + __CH32_PIN(56, B, 4), + __CH32_PIN(57, B, 5), + __CH32_PIN(58, B, 6), + __CH32_PIN(59, B, 7), + __CH32_PIN_DEFAULT, + __CH32_PIN(61, B, 8), + __CH32_PIN(62, B, 9), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, +#endif +#if (CH32V10X_PIN_NUMBERS == 100) + __CH32_PIN_DEFAULT, + __CH32_PIN(1, E, 2), + __CH32_PIN(2, E, 3), + __CH32_PIN(3, E, 4), + __CH32_PIN(4, E, 5), + __CH32_PIN(5, E, 6), + __CH32_PIN_DEFAULT, + __CH32_PIN(7, C, 13), + __CH32_PIN(8, C, 14), + __CH32_PIN(9, C, 15), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(15, C, 0), + __CH32_PIN(16, C, 1), + __CH32_PIN(17, C, 2), + __CH32_PIN(18, C, 3), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(23, A, 0), + __CH32_PIN(24, A, 1), + __CH32_PIN(25, A, 2), + __CH32_PIN(26, A, 3), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(29, A, 4), + __CH32_PIN(30, A, 5), + __CH32_PIN(31, A, 6), + __CH32_PIN(32, A, 7), + __CH32_PIN(33, C, 4), + __CH32_PIN(34, C, 5), + __CH32_PIN(35, B, 0), + __CH32_PIN(36, B, 1), + __CH32_PIN(37, B, 2), + __CH32_PIN(38, E, 7), + __CH32_PIN(39, E, 8), + __CH32_PIN(40, E, 9), + __CH32_PIN(41, E, 10), + __CH32_PIN(42, E, 11), + __CH32_PIN(43, E, 12), + __CH32_PIN(44, E, 13), + __CH32_PIN(45, E, 14), + __CH32_PIN(46, E, 15), + __CH32_PIN(47, B, 10), + __CH32_PIN(48, B, 11), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(51, B, 12), + __CH32_PIN(52, B, 13), + __CH32_PIN(53, B, 14), + __CH32_PIN(54, B, 15), + __CH32_PIN(55, D, 8), + __CH32_PIN(56, D, 9), + __CH32_PIN(57, D, 10), + __CH32_PIN(58, D, 11), + __CH32_PIN(59, D, 12), + __CH32_PIN(60, D, 13), + __CH32_PIN(61, D, 14), + __CH32_PIN(62, D, 15), + __CH32_PIN(63, C, 6), + __CH32_PIN(64, C, 7), + __CH32_PIN(65, C, 8), + __CH32_PIN(66, C, 9), + __CH32_PIN(67, A, 8), + __CH32_PIN(68, A, 9), + __CH32_PIN(69, A, 10), + __CH32_PIN(70, A, 11), + __CH32_PIN(71, A, 12), + __CH32_PIN(72, A, 13), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, + __CH32_PIN(76, A, 14), + __CH32_PIN(77, A, 15), + __CH32_PIN(78, C, 10), + __CH32_PIN(79, C, 11), + __CH32_PIN(80, C, 12), + __CH32_PIN(81, D, 0), + __CH32_PIN(82, D, 1), + __CH32_PIN(83, D, 2), + __CH32_PIN(84, D, 3), + __CH32_PIN(85, D, 4), + __CH32_PIN(86, D, 5), + __CH32_PIN(87, D, 6), + __CH32_PIN(88, D, 7), + __CH32_PIN(89, B, 3), + __CH32_PIN(90, B, 4), + __CH32_PIN(91, B, 5), + __CH32_PIN(92, B, 6), + __CH32_PIN(93, B, 7), + __CH32_PIN_DEFAULT, + __CH32_PIN(95, B, 8), + __CH32_PIN(96, B, 9), + __CH32_PIN(97, E, 0), + __CH32_PIN(98, E, 1), + __CH32_PIN_DEFAULT, + __CH32_PIN_DEFAULT, +#endif +}; + +struct pin_irq_map +{ + rt_uint16_t pinbit; + IRQn_Type irqno; +}; +static const struct pin_irq_map pin_irq_map[] = +{ + {GPIO_Pin_0, EXTI0_IRQn}, + {GPIO_Pin_1, EXTI1_IRQn}, + {GPIO_Pin_2, EXTI2_IRQn}, + {GPIO_Pin_3, EXTI3_IRQn}, + {GPIO_Pin_4, EXTI4_IRQn}, + {GPIO_Pin_5, EXTI9_5_IRQn}, + {GPIO_Pin_6, EXTI9_5_IRQn}, + {GPIO_Pin_7, EXTI9_5_IRQn}, + {GPIO_Pin_8, EXTI9_5_IRQn}, + {GPIO_Pin_9, EXTI9_5_IRQn}, + {GPIO_Pin_10, EXTI15_10_IRQn}, + {GPIO_Pin_11, EXTI15_10_IRQn}, + {GPIO_Pin_12, EXTI15_10_IRQn}, + {GPIO_Pin_13, EXTI15_10_IRQn}, + {GPIO_Pin_14, EXTI15_10_IRQn}, + {GPIO_Pin_15, EXTI15_10_IRQn}, +}; +struct rt_pin_irq_hdr pin_irq_hdr_tab[] = +{ + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, + { -1, 0, RT_NULL, RT_NULL}, +}; + +#define ITEM_NUM(items) sizeof(items) / sizeof(items[0]) +const struct pin_index *get_pin(uint8_t pin) +{ + const struct pin_index *index; + if (pin < ITEM_NUM(pins)) + { + index = &pins[pin]; + if (index->index == -1) + index = RT_NULL; + } + else + { + index = RT_NULL; + } + return index; +}; + +void ch32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + const struct pin_index *index; + index = get_pin(pin); + if (index == RT_NULL) + { + return; + } + GPIO_WriteBit(index->gpio, index->pin, (BitAction)value); +} + +int ch32_pin_read(rt_device_t dev, rt_base_t pin) +{ + int value; + const struct pin_index *index; + value = PIN_LOW; + index = get_pin(pin); + if (index == RT_NULL) + { + return value; + } + value = GPIO_ReadInputDataBit(index->gpio, index->pin); + return value; +} + +void ch32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + const struct pin_index *index; + GPIO_InitTypeDef GPIO_InitStruct; + index = get_pin(pin); + if (index == RT_NULL) + { + return; + } + rt_kprintf("get pin index\r\n"); + /* GPIO Periph clock enable */ + index->rcc(); + /* Configure GPIO_InitStructure */ + GPIO_InitStruct.GPIO_Pin = index->pin; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + if (mode == PIN_MODE_OUTPUT) + { + /* output setting */ + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP; + } + else if (mode == PIN_MODE_INPUT_AIN) + { + /* input setting: not pull. */ + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN; + } + else if (mode == PIN_MODE_INPUT) + { + /* input setting: pull up. */ + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + } + else if (mode == PIN_MODE_INPUT_PULLDOWN) + { + /* input setting: pull down. */ + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD; + } + else if (mode == PIN_MODE_INPUT_PULLUP) + { + /* output setting: od. */ + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; + } + else if (mode == PIN_MODE_OUTPUT_OD) + { + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_OD; + } + else if (mode == PIN_MODE_OUTPUT_AF_OD) + { + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_OD; + } + else if (mode == PIN_MODE_OUTPUT_AF_PP) + { + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP; + } + + GPIO_Init(index->gpio, &GPIO_InitStruct); +} + + +rt_inline rt_int32_t bit2bitno(rt_uint32_t bit) +{ + int i; + for (i = 0; i < 32; i++) + { + if ((0x01 << i) == bit) + { + return i; + } + } + return -1; +} + +rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit) +{ + rt_int32_t mapindex = bit2bitno(pinbit); + if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map)) + { + return RT_NULL; + } + return &pin_irq_map[mapindex]; +}; +rt_err_t ch32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t mode, void (*hdr)(void *args), void *args) +{ + const struct pin_index *index; + rt_base_t level; + rt_int32_t irqindex = -1; + index = get_pin(pin); + if (index == RT_NULL) + { + return RT_ENOSYS; + } + irqindex = bit2bitno(index->pin); + if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) + { + return RT_ENOSYS; + } + level = rt_hw_interrupt_disable(); + if (pin_irq_hdr_tab[irqindex].pin == pin && + pin_irq_hdr_tab[irqindex].hdr == hdr && + pin_irq_hdr_tab[irqindex].mode == mode && + pin_irq_hdr_tab[irqindex].args == args) + { + rt_hw_interrupt_enable(level); + return RT_EOK; + } + if (pin_irq_hdr_tab[irqindex].pin != -1) + { + rt_hw_interrupt_enable(level); + return RT_EBUSY; + } + pin_irq_hdr_tab[irqindex].pin = pin; + pin_irq_hdr_tab[irqindex].hdr = hdr; + pin_irq_hdr_tab[irqindex].mode = mode; + pin_irq_hdr_tab[irqindex].args = args; + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +rt_err_t ch32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +{ + const struct pin_index *index; + rt_base_t level; + rt_int32_t irqindex = -1; + index = get_pin(pin); + if (index == RT_NULL) + { + return RT_ENOSYS; + } + irqindex = bit2bitno(index->pin); + if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) + { + return RT_ENOSYS; + } + level = rt_hw_interrupt_disable(); + if (pin_irq_hdr_tab[irqindex].pin == -1) + { + rt_hw_interrupt_enable(level); + return RT_EOK; + } + pin_irq_hdr_tab[irqindex].pin = -1; + pin_irq_hdr_tab[irqindex].hdr = RT_NULL; + pin_irq_hdr_tab[irqindex].mode = 0; + pin_irq_hdr_tab[irqindex].args = RT_NULL; + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +rt_err_t ch32_pin_irq_enable(struct rt_device *device, rt_base_t pin, + rt_uint32_t enabled) +{ + const struct pin_index *index; + const struct pin_irq_map *irqmap; + rt_base_t level; + rt_int32_t irqindex = -1; + GPIO_InitTypeDef GPIO_InitStruct; + EXTI_InitTypeDef EXTI_InitStructure; + + index = get_pin(pin); + if (index == RT_NULL) + { + return RT_ENOSYS; + } + if (enabled == PIN_IRQ_ENABLE) + { + irqindex = bit2bitno(index->pin); + if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) + { + return RT_ENOSYS; + } + level = rt_hw_interrupt_disable(); + if (pin_irq_hdr_tab[irqindex].pin == -1) + { + rt_hw_interrupt_enable(level); + return RT_ENOSYS; + } + irqmap = &pin_irq_map[irqindex]; + /* GPIO Periph clock enable */ + index->rcc(); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); + + /* Configure GPIO_InitStructure */ + GPIO_InitStruct.GPIO_Pin = index->pin; + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + + EXTI_InitStructure.EXTI_Line=index->pin;/* ⲿжߺźŶӦ */ + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + switch (pin_irq_hdr_tab[irqindex].mode) + { + case PIN_IRQ_MODE_RISING: + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + break; + case PIN_IRQ_MODE_FALLING: + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; + break; + case PIN_IRQ_MODE_RISING_FALLING: + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling; + break; + } + + GPIO_Init(index->gpio, &GPIO_InitStruct); + EXTI_Init(&EXTI_InitStructure); + NVIC_SetPriority(irqmap->irqno,5<<4); + NVIC_EnableIRQ( irqmap->irqno ); + + rt_hw_interrupt_enable(level); + } + else if (enabled == PIN_IRQ_DISABLE) + { + irqmap = get_pin_irq_map(index->pin); + if (irqmap == RT_NULL) + { + return RT_ENOSYS; + } + NVIC_DisableIRQ(irqmap->irqno); + } + else + { + return RT_ENOSYS; + } + return RT_EOK; +} + +const static struct rt_pin_ops _ch32_pin_ops = +{ + ch32_pin_mode, + ch32_pin_write, + ch32_pin_read, + ch32_pin_attach_irq, + ch32_pin_dettach_irq, + ch32_pin_irq_enable, +}; + +int rt_hw_pin_init(void) +{ + int result; + result = rt_device_pin_register("pin", &_ch32_pin_ops, RT_NULL); + return result; +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + +rt_inline void pin_irq_hdr(int irqno) +{ + if (pin_irq_hdr_tab[irqno].hdr) + { + pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args); + } +} + +void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) +{ + pin_irq_hdr(bit2bitno(GPIO_Pin)); +} + + +void EXTI0_IRQHandler(void) __attribute__((interrupt())); +void EXTI1_IRQHandler(void) __attribute__((interrupt())); +void EXTI3_IRQHandler(void) __attribute__((interrupt())); +void EXTI4_IRQHandler(void) __attribute__((interrupt())); +void EXTI9_5_IRQHandler(void) __attribute__((interrupt())); + +void EXTI0_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + + if(EXTI_GetITStatus(EXTI_Line0)!=RESET) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_0); + EXTI_ClearITPendingBit(EXTI_Line0); + } + + rt_interrupt_leave(); + FREE_INT_SP(); +} + +void EXTI1_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + if(EXTI_GetITStatus(EXTI_Line1)!=RESET) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_1); + EXTI_ClearITPendingBit(EXTI_Line1); + } + rt_interrupt_leave(); + FREE_INT_SP(); +} + +void EXTI2_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + if(EXTI_GetITStatus(EXTI_Line2)!=RESET) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_2); + EXTI_ClearITPendingBit(EXTI_Line2); + } + rt_interrupt_leave(); + FREE_INT_SP(); +} + +void EXTI3_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + if(EXTI_GetITStatus(EXTI_Line3)!=RESET) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_3); + EXTI_ClearITPendingBit(EXTI_Line3); + } + rt_interrupt_leave(); + FREE_INT_SP(); +} + +void EXTI4_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + if(EXTI_GetITStatus(EXTI_Line4)!=RESET) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_4); + EXTI_ClearITPendingBit(EXTI_Line4); + } + rt_interrupt_leave(); + FREE_INT_SP(); +} + +void EXTI9_5_IRQHandler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + if( (EXTI_GetITStatus(EXTI_Line5)!=RESET)|| \ + (EXTI_GetITStatus(EXTI_Line6)!=RESET)|| \ + (EXTI_GetITStatus(EXTI_Line7)!=RESET)|| \ + (EXTI_GetITStatus(EXTI_Line8)!=RESET)|| \ + (EXTI_GetITStatus(EXTI_Line9)!=RESET) ) + { + HAL_GPIO_EXTI_Callback(GPIO_Pin_5); + HAL_GPIO_EXTI_Callback(GPIO_Pin_6); + HAL_GPIO_EXTI_Callback(GPIO_Pin_7); + HAL_GPIO_EXTI_Callback(GPIO_Pin_8); + HAL_GPIO_EXTI_Callback(GPIO_Pin_9); + EXTI_ClearITPendingBit(EXTI_Line5|EXTI_Line6|EXTI_Line7|EXTI_Line8|EXTI_Line9); + } + rt_interrupt_leave(); + FREE_INT_SP(); +} + +#endif diff --git a/bsp/ch32v103/drivers/drv_gpio.h b/bsp/ch32v103/drivers/drv_gpio.h new file mode 100644 index 0000000000..40b3aa4513 --- /dev/null +++ b/bsp/ch32v103/drivers/drv_gpio.h @@ -0,0 +1,29 @@ +/* + * File : drv_gpio.h + * + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2015-01-05 Bernard the first version + * 2017-11-35 ZYH update to 3.0.0 + * 2021-10-01 Walter modify License declare. + */ +#ifndef GPIO_H__ +#define GPIO_H__ +struct stm32_hw_pin_userdata +{ + int pin; + uint32_t mode; +}; +#define PIN_USERDATA_END {-1,0} + +#define PIN_MODE_INPUT_AIN 0x05 +#define PIN_MODE_OUTPUT_AF_OD 0x06 +#define PIN_MODE_OUTPUT_AF_PP 0x07 + +extern struct stm32_hw_pin_userdata stm32_pins[]; +int rt_hw_pin_init(void); +#endif diff --git a/bsp/ch32v103/drivers/drv_usart.c b/bsp/ch32v103/drivers/drv_usart.c new file mode 100644 index 0000000000..191b59e341 --- /dev/null +++ b/bsp/ch32v103/drivers/drv_usart.c @@ -0,0 +1,259 @@ +/* + * File : drv_usart.c + * + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2009-01-05 Bernard the first version + * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode + * 2013-05-13 aozima update for kehong-lingtai. + * 2015-01-31 armink make sure the serial transmit complete in putc() + * 2016-05-13 armink add DMA Rx mode + * 2017-01-19 aubr.cool add interrupt Tx mode + * 2017-04-13 aubr.cool correct Rx parity err + * 2017-10-20 ZYH porting to HAL Libraries(with out DMA) + * 2017-11-15 ZYH update to 3.0.0 + * 2021-10-01 Walter modify modify License declare. + */ + +#include "board.h" +#include +#include + +/* uart driver */ +struct ch32_uart +{ + USART_InitTypeDef huart; + USART_TypeDef *USARTx; + IRQn_Type irq; +}; + +static rt_err_t ch32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct ch32_uart *uart; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + uart = (struct ch32_uart *)serial->parent.user_data; + uart->huart.USART_BaudRate = cfg->baud_rate; + uart->huart.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + uart->huart.USART_Mode = USART_Mode_Rx|USART_Mode_Tx; + + switch (cfg->data_bits) + { + case DATA_BITS_8: + uart->huart.USART_WordLength = USART_WordLength_8b; + break; + case DATA_BITS_9: + uart->huart.USART_WordLength = USART_WordLength_9b; + break; + default: + uart->huart.USART_WordLength = USART_WordLength_8b; + break; + } + switch (cfg->stop_bits) + { + case STOP_BITS_1: + uart->huart.USART_StopBits = USART_StopBits_1; + break; + case STOP_BITS_2: + uart->huart.USART_StopBits = USART_StopBits_2; + break; + default: + uart->huart.USART_StopBits = USART_StopBits_1; + break; + } + switch (cfg->parity) + { + case PARITY_NONE: + uart->huart.USART_Parity = USART_Parity_No; + break; + case PARITY_ODD: + uart->huart.USART_Parity = USART_Parity_Odd; + break; + case PARITY_EVEN: + uart->huart.USART_Parity = USART_Parity_Even; + break; + default: + uart->huart.USART_Parity = USART_Parity_No; + break; + } + + if(uart->USARTx == USART1) + { + GPIO_InitTypeDef GPIO_InitStructure; + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + USART_Init(uart->USARTx,&uart->huart); + USART_Cmd(uart->USARTx, ENABLE); + } + + return RT_EOK; +} + +static rt_err_t ch32_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + struct ch32_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct ch32_uart *)serial->parent.user_data; + switch (cmd) + { + /* disable interrupt */ + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + NVIC_DisableIRQ(uart->irq); + /* disable interrupt */ + USART_ITConfig(uart->USARTx,USART_IT_RXNE,DISABLE); + break; + /* enable interrupt */ + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + NVIC_EnableIRQ(uart->irq); + /* enable interrupt */ + USART_ITConfig(uart->USARTx, USART_IT_RXNE,ENABLE); + break; + } + return RT_EOK; +} + +static int ch32_putc(struct rt_serial_device *serial, char c) +{ + struct ch32_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct ch32_uart *)serial->parent.user_data; + while (USART_GetFlagStatus(uart->USARTx, USART_FLAG_TC) == RESET); + uart->USARTx->DATAR = c; + return 1; +} + +static int ch32_getc(struct rt_serial_device *serial) +{ + int ch; + struct ch32_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct ch32_uart *)serial->parent.user_data; + ch = -1; + if (USART_GetFlagStatus(uart->USARTx, USART_FLAG_RXNE) != RESET) + { + ch = uart->USARTx->DATAR & 0xff; + } + return ch; +} + + +rt_size_t ch32dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction) +{ + return RT_EOK; +} + + +/** + * Uart common interrupt process. This need add to uart ISR. + * + * @param serial serial device + */ +static void uart_isr(struct rt_serial_device *serial) +{ + struct ch32_uart *uart = (struct ch32_uart *) serial->parent.user_data; + RT_ASSERT(uart != RT_NULL); + if (USART_GetITStatus(uart->USARTx, USART_IT_RXNE) != RESET) + { + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + USART_ClearITPendingBit(uart->USARTx, USART_IT_RXNE); + } +} + +static const struct rt_uart_ops ch32_uart_ops = +{ + ch32_configure, + ch32_control, + ch32_putc, + ch32_getc, + ch32dma_transmit +}; + +#if defined(RT_USING_UART1) +/* UART1 device driver structure */ +struct ch32_uart uart1; +struct rt_serial_device serial1; + + + +void USART1_IRQHandler(void) __attribute__((interrupt())); +void USART1_IRQHandler(void) +{ + GET_INT_SP(); + /* enter interrupt */ + rt_interrupt_enter(); + + uart_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); + + FREE_INT_SP(); +} +#endif /* RT_USING_UART1 */ + + + + +int rt_hw_usart_init(void) +{ + struct ch32_uart *uart; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + +#if defined(RT_USING_UART1) + uart=&uart1; + uart->irq=USART1_IRQn; + uart->USARTx=USART1; + + config.baud_rate = BAUD_RATE_115200; + serial1.ops = &ch32_uart_ops; + serial1.config = config; + + + uart->huart.USART_BaudRate = 115200; + uart->huart.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + uart->huart.USART_Mode = USART_Mode_Rx|USART_Mode_Tx; + uart->huart.USART_WordLength = USART_WordLength_8b; + uart->huart.USART_StopBits = USART_StopBits_1; + uart->huart.USART_Parity = USART_Parity_No; + + if(uart->USARTx == USART1) + { + GPIO_InitTypeDef GPIO_InitStructure; + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + USART_Init(uart->USARTx,&uart->huart); + USART_Cmd(uart->USARTx, ENABLE); + } + + /* register UART1 device */ + rt_hw_serial_register(&serial1, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* RT_USING_UART1 */ + + return 0; +} +INIT_BOARD_EXPORT(rt_hw_usart_init); + diff --git a/bsp/ch32v103/drivers/drv_usart.h b/bsp/ch32v103/drivers/drv_usart.h new file mode 100644 index 0000000000..eb92cefe96 --- /dev/null +++ b/bsp/ch32v103/drivers/drv_usart.h @@ -0,0 +1,18 @@ +/* + * File : usart.h + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache- + * + * Change Logs: + * Date Author Notes + * 2009-01-05 Bernard the first version + * 2021-10-01 Walter modify modify License declare. + */ +#ifndef __USART_H__ +#define __USART_H__ +#include "rthw.h" +#include "rtthread.h" + +int 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+*******************************************************************************/ +#include + +/* define compiler specific symbols */ +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/** + * @brief Return the Floating-Point Accrued Exceptions + */ +uint32_t __get_FFLAGS(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "fflags" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Floating-Point Accrued Exceptions + */ +void __set_FFLAGS(uint32_t value) +{ + __ASM volatile ("csrw fflags, %0" : : "r" (value) ); +} + +/** + * @brief Return the Floating-Point Dynamic Rounding Mode + */ +uint32_t __get_FRM(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "frm" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Floating-Point Dynamic Rounding Mode + */ +void __set_FRM(uint32_t value) +{ + __ASM volatile ("csrw frm, %0" : : "r" (value) ); +} + +/** + * @brief Return the Floating-Point Control and Status Register + */ +uint32_t __get_FCSR(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "fcsr" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Floating-Point Control and Status Register + */ +void __set_FCSR(uint32_t value) +{ + __ASM volatile ("csrw fcsr, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Status Register + */ +uint32_t __get_MSTATUS(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mstatus" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Status Register + */ +void __set_MSTATUS(uint32_t value) +{ + __ASM volatile ("csrw mstatus, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine ISA Register + */ +uint32_t __get_MISA(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "misa" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine ISA Register + */ +void __set_MISA(uint32_t value) +{ + __ASM volatile ("csrw misa, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Interrupt Enable Register + */ +uint32_t __get_MIE(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mie" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine ISA Register + */ +void __set_MIE(uint32_t value) +{ + __ASM volatile ("csrw mie, %0" : : "r" (value) ); +} + + +/** + * @brief Return the Machine Trap-Vector Base-Address Register + */ +uint32_t __get_MTVEC(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mtvec" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Trap-Vector Base-Address Register + */ +void __set_MTVEC(uint32_t value) +{ + __ASM volatile ("csrw mtvec, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Seratch Register + */ +uint32_t __get_MSCRATCH(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mscratch" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Seratch Register + */ +void __set_MSCRATCH(uint32_t value) +{ + __ASM volatile ("csrw mscratch, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Exception Program Register + */ +uint32_t __get_MEPC(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mepc" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Exception Program Register + */ +void __set_MEPC(uint32_t value) +{ + __ASM volatile ("csrw mepc, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Cause Register + */ +uint32_t __get_MCAUSE(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mcause" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Cause Register + */ +void __set_MCAUSE(uint32_t value) +{ + __ASM volatile ("csrw mcause, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Trap Value Register + */ +uint32_t __get_MTVAL(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mtval" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Trap Value Register + */ +void __set_MTVAL(uint32_t value) +{ + __ASM volatile ("csrw mtval, %0" : : "r" (value) ); +} + +/** + * @brief Return the Machine Interrupt Pending Register + */ +uint32_t __get_MIP(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mip" : "=r" (result) ); + return (result); +} + +/** + * @brief Set the Machine Interrupt Pending Register + */ +void __set_MIP(uint32_t value) +{ + __ASM volatile ("csrw mip, %0" : : "r" (value) ); +} + +/** + * @brief Return Lower 32 bits of Cycle counter + */ +uint32_t __get_MCYCLE(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mcycle" : "=r" (result) ); + return (result); +} + +/** + * @brief Set Lower 32 bits of Cycle counter + */ +void __set_MCYCLE(uint32_t value) +{ + __ASM volatile ("csrw mcycle, %0" : : "r" (value) ); +} + +/** + * @brief Return Upper 32 bits of Cycle counter + */ +uint32_t __get_MCYCLEH(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mcycleh" : "=r" (result) ); + return (result); +} + +/** + * @brief Set Upper 32 bits of Cycle counter + */ +void __set_MCYCLEH(uint32_t value) +{ + __ASM volatile ("csrw mcycleh, %0" : : "r" (value) ); +} + +/** + * @brief Return Lower 32 bits of Instructions-retired counter + */ +uint32_t __get_MINSTRET(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "minstret" : "=r" (result) ); + return (result); +} + +/** + * @brief Set Lower 32 bits of Instructions-retired counter + */ +void __set_MINSTRET(uint32_t value) +{ + __ASM volatile ("csrw minstret, %0" : : "r" (value) ); +} + +/** + * @brief Return Upper 32 bits of Instructions-retired counter + */ +uint32_t __get_MINSTRETH(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "minstreth" : "=r" (result) ); + return (result); +} + +/** + * @brief Set Upper 32 bits of Instructions-retired counter + */ +void __set_MINSTRETH(uint32_t value) +{ + __ASM volatile ("csrw minstreth, %0" : : "r" (value) ); +} + +/** + * @brief Return Vendor ID Register + */ +uint32_t __get_MVENDORID(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mvendorid" : "=r" (result) ); + return (result); +} + +/** + * @brief Return Machine Architecture ID Register + */ +uint32_t __get_MARCHID(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "marchid" : "=r" (result) ); + return (result); +} + +/** + * @brief Return Machine Implementation ID Register + */ +uint32_t __get_MIMPID(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mimpid" : "=r" (result) ); + return (result); +} + +/** + * @brief Return Hart ID Register + */ +uint32_t __get_MHARTID(void) +{ + uint32_t result; + + __ASM volatile ( "csrr %0," "mhartid" : "=r" (result) ); + return (result); +} + + + diff --git a/bsp/ch32v103/libraries/Core/core_riscv.h b/bsp/ch32v103/libraries/Core/core_riscv.h new file mode 100644 index 0000000000..1b76b6e09f --- /dev/null +++ b/bsp/ch32v103/libraries/Core/core_riscv.h @@ -0,0 +1,303 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : core_riscv.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : RISC-V Core Peripheral Access Layer Header File +*******************************************************************************/ +#ifndef __CORE_RISCV_H__ +#define __CORE_RISCV_H__ + +/* IO definitions */ +#ifdef __cplusplus + #define __I volatile /*!< defines 'read only' permissions */ +#else + #define __I volatile const /*!< defines 'read only' permissions */ +#endif +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + +/* Standard Peripheral Library old types (maintained for legacy purpose) */ +typedef __I uint32_t vuc32; /* Read Only */ +typedef __I uint16_t vuc16; /* Read Only */ +typedef __I uint8_t vuc8; /* Read Only */ + +typedef const uint32_t uc32; /* Read Only */ +typedef const uint16_t uc16; /* Read Only */ +typedef const uint8_t uc8; /* Read Only */ + +typedef __I int32_t vsc32; /* Read Only */ +typedef __I int16_t vsc16; /* Read Only */ +typedef __I int8_t vsc8; /* Read Only */ + +typedef const int32_t sc32; /* Read Only */ +typedef const int16_t sc16; /* Read Only */ +typedef const int8_t sc8; /* Read Only */ + +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; + +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; + +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; + +#define RV_STATIC_INLINE static inline + +/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */ +typedef struct{ + __I uint32_t ISR[8]; + __I uint32_t IPR[8]; + __IO uint32_t ITHRESDR; + __IO uint32_t FIBADDRR; + __IO uint32_t CFGR; + __I uint32_t GISR; + uint8_t RESERVED0[0x10]; + __IO uint32_t FIOFADDRR[4]; + uint8_t RESERVED1[0x90]; + __O uint32_t IENR[8]; + uint8_t RESERVED2[0x60]; + __O uint32_t IRER[8]; + uint8_t RESERVED3[0x60]; + __O uint32_t IPSR[8]; + uint8_t RESERVED4[0x60]; + __O uint32_t IPRR[8]; + uint8_t RESERVED5[0x60]; + __IO uint32_t IACTR[8]; + uint8_t RESERVED6[0xE0]; + __IO uint8_t IPRIOR[256]; + uint8_t RESERVED7[0x810]; + __IO uint32_t SCTLR; +}PFIC_Type; + +/* memory mapped structure for SysTick */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint8_t CNTL0; + __IO uint8_t CNTL1; + __IO uint8_t CNTL2; + __IO uint8_t CNTL3; + __IO uint8_t CNTH0; + __IO uint8_t CNTH1; + __IO uint8_t CNTH2; + __IO uint8_t CNTH3; + __IO uint8_t CMPLR0; + __IO uint8_t CMPLR1; + __IO uint8_t CMPLR2; + __IO uint8_t CMPLR3; + __IO uint8_t CMPHR0; + __IO uint8_t CMPHR1; + __IO uint8_t CMPHR2; + __IO uint8_t CMPHR3; +}SysTick_Type; + + +#define PFIC ((PFIC_Type *) 0xE000E000 ) +#define NVIC PFIC +#define NVIC_KEY1 ((uint32_t)0xFA050000) +#define NVIC_KEY2 ((uint32_t)0xBCAF0000) +#define NVIC_KEY3 ((uint32_t)0xBEEF0000) + +#define SysTick ((SysTick_Type *) 0xE000F000) + +/* ########################## NVIC functions #################################### */ + +/******************************************************************************* +* Function Name : NVIC_EnableIRQ +* Description : Enable Interrupt +* Input : IRQn: Interrupt Numbers +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn){ + NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/******************************************************************************* +* Function Name : NVIC_DisableIRQ +* Description : Disable Interrupt +* Input : IRQn: Interrupt Numbers +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/******************************************************************************* +* Function Name : NVIC_GetStatusIRQ +* Description : Get Interrupt Enable State +* Input : IRQn: Interrupt Numbers +* Return : 1: Interrupt Enable +* 0: Interrupt Disable +*******************************************************************************/ +RV_STATIC_INLINE uint32_t NVIC_GetStatusIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/******************************************************************************* +* Function Name : NVIC_GetPendingIRQ +* Description : Get Interrupt Pending State +* Input : IRQn: Interrupt Numbers +* Return : 1: Interrupt Pending Enable +* 0: Interrupt Pending Disable +*******************************************************************************/ +RV_STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/******************************************************************************* +* Function Name : NVIC_SetPendingIRQ +* Description : Set Interrupt Pending +* Input : IRQn: Interrupt Numbers +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/******************************************************************************* +* Function Name : NVIC_ClearPendingIRQ +* Description : Clear Interrupt Pending +* Input : IRQn: Interrupt Numbers +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); +} + +/******************************************************************************* +* Function Name : NVIC_GetActive +* Description : Get Interrupt Active State +* Input : IRQn: Interrupt Numbers +* Return : 1: Interrupt Active +* 0: Interrupt No Active +*******************************************************************************/ +RV_STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)((NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); +} + +/******************************************************************************* +* Function Name : NVIC_SetPriority +* Description : Set Interrupt Priority +* Input : IRQn: Interrupt Numbers +* priority: bit7:pre-emption priority +* bit6-bit4: subpriority +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority) +{ + NVIC->IPRIOR[(uint32_t)(IRQn)] = priority; +} + +/******************************************************************************* +* Function Name : __WFI +* Description : Wait for Interrupt +* Input : None +* Return : None +*******************************************************************************/ +__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFI(void) +{ + NVIC->SCTLR &= ~(1<<3); // wfi + asm volatile ("wfi"); +} + +/******************************************************************************* +* Function Name : __WFE +* Description : Wait for Events +* Input : None +* Return : None +*******************************************************************************/ +__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __WFE(void) +{ + NVIC->SCTLR |= (1<<3)|(1<<5); // (wfi->wfe)+(__sev) + asm volatile ("wfi"); + NVIC->SCTLR |= (1<<3); + asm volatile ("wfi"); +} + +/******************************************************************************* +* Function Name : NVIC_SetFastIRQ +* Description : Set Fast Interrupt +* Input : addrFast interrupt service function base address. +* IRQnInterrupt Numbers +* numFast Interrupt Numbers +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_SetFastIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num){ + if(num > 3) return ; + NVIC->FIBADDRR = addr; + NVIC->FIOFADDRR[num] = ((uint32_t)IRQn<<24)|(addr&0xfffff); +} + +/******************************************************************************* +* Function Name : NVIC_SystemReset +* Description : Initiate a system reset request +* Input : None +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_SystemReset(void) +{ + NVIC->CFGR = NVIC_KEY3|(1<<7); +} + +/******************************************************************************* +* Function Name : NVIC_HaltPushCfg +* Description : Enable Hardware Stack +* Input : NewState: DISABLE or ENABLE +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_HaltPushCfg(FunctionalState NewState) +{ + if (NewState != DISABLE) + { + NVIC->CFGR = NVIC_KEY1; + } + else{ + NVIC->CFGR = NVIC_KEY1|(1<<0); + } +} + +/******************************************************************************* +* Function Name : NVIC_INTNestCfg +* Description : Enable Interrupt Nesting +* Input : NewState: DISABLE or ENABLE +* Return : None +*******************************************************************************/ +RV_STATIC_INLINE void NVIC_INTNestCfg(FunctionalState NewState) +{ + if (NewState != DISABLE) + { + NVIC->CFGR = NVIC_KEY1; + } + else + { + NVIC->CFGR = NVIC_KEY1|(1<<1); + } +} + +#endif/* __CORE_RISCV_H__ */ + + + + + diff --git a/bsp/ch32v103/libraries/SConscript b/bsp/ch32v103/libraries/SConscript new file mode 100644 index 0000000000..2a59d8e51f --- /dev/null +++ b/bsp/ch32v103/libraries/SConscript @@ -0,0 +1,25 @@ +# RT-Thread building script for component + +Import('rtconfig') +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() + +src = Glob('WCH32V103_std_peripheral/src/*.c') +#src += Glob('n22/stubs/*.c') +src += ['WCH32V103_std_peripheral/system_ch32v10x.c', + 'WCH32V103_std_peripheral/ch32v10x_it.c', + 'Core/core_riscv.c', + 'Startup/startup_ch32v10x.s'] + +CPPPATH = [ cwd + '/WCH32V103_std_peripheral/inc', + cwd + '/WCH32V103_std_peripheral', + cwd + '/Core'] + + +CPPDEFINES = [] + +group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES) + +Return('group') diff --git a/bsp/ch32v103/libraries/Startup/startup_ch32v10x.S b/bsp/ch32v103/libraries/Startup/startup_ch32v10x.S new file mode 100644 index 0000000000..bc436cbd82 --- /dev/null +++ b/bsp/ch32v103/libraries/Startup/startup_ch32v10x.S @@ -0,0 +1,187 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : startup_ch32v10x.s +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : CH32V10x vector table for eclipse toolchain. +*******************************************************************************/ + + .section .init,"ax",@progbits + .global _start + .align 1 +_start: + j handle_reset + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00000013 + .word 0x00100073 + .section .vector,"ax",@progbits + .align 1 +_vector_base: + .option norvc; + j _start + .word 0 + j NMI_Handler /* NMI Handler */ + j HardFault_Handler /* Hard Fault Handler */ + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + j SysTick_Handler /* SysTick Handler */ + .word 0 + j SW_handler /* SW Handler */ + .word 0 + /* External Interrupts */ + j WWDG_IRQHandler /* Window Watchdog */ + j PVD_IRQHandler /* PVD through EXTI Line detect */ + j TAMPER_IRQHandler /* TAMPER */ + j RTC_IRQHandler /* RTC */ + j FLASH_IRQHandler /* Flash */ + j RCC_IRQHandler /* RCC */ + j EXTI0_IRQHandler /* EXTI Line 0 */ + j EXTI1_IRQHandler /* EXTI Line 1 */ + j EXTI2_IRQHandler /* EXTI Line 2 */ + j EXTI3_IRQHandler /* EXTI Line 3 */ + j EXTI4_IRQHandler /* EXTI Line 4 */ + j DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + j DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ + j DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ + j DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ + j DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ + j DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ + j DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ + j ADC1_2_IRQHandler /* ADC1_2 */ + .word 0 + .word 0 + .word 0 + .word 0 + j EXTI9_5_IRQHandler /* EXTI Line 9..5 */ + j TIM1_BRK_IRQHandler /* TIM1 Break */ + j TIM1_UP_IRQHandler /* TIM1 Update */ + j TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ + j TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + j TIM2_IRQHandler /* TIM2 */ + j TIM3_IRQHandler /* TIM3 */ + j TIM4_IRQHandler /* TIM4 */ + j I2C1_EV_IRQHandler /* I2C1 Event */ + j I2C1_ER_IRQHandler /* I2C1 Error */ + j I2C2_EV_IRQHandler /* I2C2 Event */ + j I2C2_ER_IRQHandler /* I2C2 Error */ + j SPI1_IRQHandler /* SPI1 */ + j SPI2_IRQHandler /* SPI2 */ + j USART1_IRQHandler /* USART1 */ + j USART2_IRQHandler /* USART2 */ + j USART3_IRQHandler /* USART3 */ + j EXTI15_10_IRQHandler /* EXTI Line 15..10 */ + j RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */ + j USBWakeUp_IRQHandler /* USB Wakeup from suspend */ + j USBHD_IRQHandler /* USBHD */ + + .option rvc; + + .section .text.vector_handler, "ax", @progbits + .weak NMI_Handler + .weak HardFault_Handler + .weak SysTick_Handler + .weak SW_handler + .weak WWDG_IRQHandler + .weak PVD_IRQHandler + .weak TAMPER_IRQHandler + .weak RTC_IRQHandler + .weak FLASH_IRQHandler + .weak RCC_IRQHandler + .weak EXTI0_IRQHandler + .weak EXTI1_IRQHandler + .weak EXTI2_IRQHandler + .weak EXTI3_IRQHandler + .weak EXTI4_IRQHandler + .weak DMA1_Channel1_IRQHandler + .weak DMA1_Channel2_IRQHandler + .weak DMA1_Channel3_IRQHandler + .weak DMA1_Channel4_IRQHandler + .weak DMA1_Channel5_IRQHandler + .weak DMA1_Channel6_IRQHandler + .weak DMA1_Channel7_IRQHandler + .weak ADC1_2_IRQHandler + .weak EXTI9_5_IRQHandler + .weak TIM1_BRK_IRQHandler + .weak TIM1_UP_IRQHandler + .weak TIM1_TRG_COM_IRQHandler + .weak TIM1_CC_IRQHandler + .weak TIM2_IRQHandler + .weak TIM3_IRQHandler + .weak TIM4_IRQHandler + .weak I2C1_EV_IRQHandler + .weak I2C1_ER_IRQHandler + .weak I2C2_EV_IRQHandler + .weak I2C2_ER_IRQHandler + .weak SPI1_IRQHandler + .weak SPI2_IRQHandler + .weak USART1_IRQHandler + .weak USART2_IRQHandler + .weak USART3_IRQHandler + .weak EXTI15_10_IRQHandler + .weak RTCAlarm_IRQHandler + .weak USBWakeUp_IRQHandler + .weak USBHD_IRQHandler + + .section .text.handle_reset,"ax",@progbits + .weak handle_reset + .align 1 +handle_reset: +.option push +.option norelax + la gp, __global_pointer$ +.option pop +1: + la sp, _eusrstack +2: + /* Load data section from flash to RAM */ + la a0, _data_lma + la a1, _data_vma + la a2, _edata + bgeu a1, a2, 2f +1: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, 1b +2: + /* clear bss section */ + la a0, _sbss + la a1, _ebss + bgeu a0, a1, 2f +1: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, 1b +2: + /* enable all interrupt */ +# li t0, 0x88 + li t0, 0x1888 + csrs mstatus, t0 + la t0, _vector_base + ori t0, t0, 1 + csrw mtvec, t0 + + jal SystemInit /* ϵͳʱӳʼ */ + #la t0, main + la t0,entry /* rtt */ + csrw mepc, t0 + mret + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_conf.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_conf.h new file mode 100644 index 0000000000..c75bc99588 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_conf.h @@ -0,0 +1,39 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_conf.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : Library configuration file. +*******************************************************************************/ +#ifndef __CH32V10x_CONF_H +#define __CH32V10x_CONF_H + +#include "ch32v10x_adc.h" +#include "ch32v10x_bkp.h" +#include "ch32v10x_crc.h" +#include "ch32v10x_dbgmcu.h" +#include "ch32v10x_dma.h" +#include "ch32v10x_exti.h" +#include "ch32v10x_flash.h" +#include "ch32v10x_gpio.h" +#include "ch32v10x_i2c.h" +#include "ch32v10x_iwdg.h" +#include "ch32v10x_pwr.h" +#include "ch32v10x_rcc.h" +#include "ch32v10x_rtc.h" +#include "ch32v10x_spi.h" +#include "ch32v10x_tim.h" +#include "ch32v10x_usart.h" +#include "ch32v10x_wwdg.h" +#include "ch32v10x_usb.h" +#include "ch32v10x_usb_host.h" +#include "ch32v10x_it.h" +#include "ch32v10x_misc.h" + + +#endif /* __CH32V10x_CONF_H */ + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.c new file mode 100644 index 0000000000..07d0a304ab --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.c @@ -0,0 +1,50 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_it.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : Main Interrupt Service Routines. +*******************************************************************************/ +#include "ch32v10x_it.h" +#include "board.h" +#include + +void NMI_Handler(void) __attribute__((interrupt())); +void HardFault_Handler(void) __attribute__((interrupt())); + +/******************************************************************************* +* Function Name : NMI_Handler +* Description : This function handles NMI exception. +* Input : None +* Return : None +*******************************************************************************/ +void NMI_Handler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + + rt_kprintf(" NMI Handler\r\n"); + + rt_interrupt_leave(); + FREE_INT_SP(); +} + +/******************************************************************************* +* Function Name : HardFault_Handler +* Description : This function handles Hard Fault exception. +* Input : None +* Return : None +*******************************************************************************/ +void HardFault_Handler(void) +{ + GET_INT_SP(); + rt_interrupt_enter(); + + rt_kprintf(" hardfult\r\n"); + rt_interrupt_leave(); + FREE_INT_SP(); + + +} + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.h new file mode 100644 index 0000000000..0f65df7a81 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/ch32v10x_it.h @@ -0,0 +1,17 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_it.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains the headers of the interrupt handlers. +*******************************************************************************/ +#ifndef __CH32V10x_IT_H +#define __CH32V10x_IT_H + + +#define GET_INT_SP() asm("csrrw sp,mscratch,sp") +#define FREE_INT_SP() asm("csrrw sp,mscratch,sp") + +#endif /* __CH32V10x_IT_H */ + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/debug.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/debug.c new file mode 100644 index 0000000000..4ff40007d3 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/debug.c @@ -0,0 +1,162 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : debug.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for UART +* Printf , Delay functions. +*******************************************************************************/ +#include "debug.h" + +static uint8_t p_us=0; +static uint16_t p_ms=0; + +/******************************************************************************* +* Function Name : Delay_Init +* Description : Initializes Delay Funcation. +* Input : None +* Return : None +*******************************************************************************/ +void Delay_Init(void) +{ + p_us=SystemCoreClock/8000000; + p_ms=(uint16_t)p_us*1000; +} + +/******************************************************************************* +* Function Name : Delay_Us +* Description : Microsecond Delay Time. +* Input : nMicrosecond number. +* Return : None +*******************************************************************************/ +void Delay_Us(uint32_t n) +{ + uint32_t i; + + SysTick->CTLR = 0; + i = (uint32_t)n*p_us; + + SysTick->CNTL0 = 0; + SysTick->CNTL1 = 0; + SysTick->CNTL2 = 0; + SysTick->CNTL3 = 0; + SysTick->CTLR = 1; + + while((*(__IO uint32_t*)0xE000F004) <= i); + +} + +/******************************************************************************* +* Function Name : Delay_Ms +* Description : Millisecond Delay Time. +* Input : nMillisecond number. +* Return : None +*******************************************************************************/ +void Delay_Ms (uint32_t n) +{ + uint32_t i; + + SysTick->CTLR = 0; + i = (uint32_t)n*p_ms; + + SysTick->CNTL0 = 0; + SysTick->CNTL1 = 0; + SysTick->CNTL2 = 0; + SysTick->CNTL3 = 0; + SysTick->CTLR = 1; + + while((*(__IO uint32_t*)0xE000F004) <= i); +} + +/******************************************************************************* +* Function Name : USART_Printf_Init +* Description : Initializes the USARTx peripheral. +* Input : baudrate: USART communication baud rate. +* Return : None +*******************************************************************************/ +void USART_Printf_Init(uint32_t baudrate) +{ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + +#if (DEBUG == DEBUG_UART1) + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + +#elif (DEBUG == DEBUG_UART2) + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + +#elif (DEBUG == DEBUG_UART3) + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOB, &GPIO_InitStructure); + +#endif + + USART_InitStructure.USART_BaudRate = baudrate; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Tx; + +#if (DEBUG == DEBUG_UART1) + USART_Init(USART1, &USART_InitStructure); + USART_Cmd(USART1, ENABLE); + +#elif (DEBUG == DEBUG_UART2) + USART_Init(USART2, &USART_InitStructure); + USART_Cmd(USART2, ENABLE); + +#elif (DEBUG == DEBUG_UART3) + USART_Init(USART3, &USART_InitStructure); + USART_Cmd(USART3, ENABLE); + +#endif +} + +/******************************************************************************* +* Function Name : _write +* Description : Support Printf Function +* Input : *buf: UART send Data. +* size: Data length +* Return : size: Data length +*******************************************************************************/ +int _write(int fd, char *buf, int size) +{ + int i; + + for(i=0; i +#include "core_riscv.h" +#include "system_ch32v10x.h" + + +/* Standard Peripheral Library old definitions (maintained for legacy purpose) */ +#define HSI_Value HSI_VALUE +#define HSE_Value HSE_VALUE +#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT + +/* Analog to Digital Converter */ +typedef struct +{ + __IO uint32_t STATR; + __IO uint32_t CTLR1; + __IO uint32_t CTLR2; + __IO uint32_t SAMPTR1; + __IO uint32_t SAMPTR2; + __IO uint32_t IOFR1; + __IO uint32_t IOFR2; + __IO uint32_t IOFR3; + __IO uint32_t IOFR4; + __IO uint32_t WDHTR; + __IO uint32_t WDLTR; + __IO uint32_t RSQR1; + __IO uint32_t RSQR2; + __IO uint32_t RSQR3; + __IO uint32_t ISQR; + __IO uint32_t IDATAR1; + __IO uint32_t IDATAR2; + __IO uint32_t IDATAR3; + __IO uint32_t IDATAR4; + __IO uint32_t RDATAR; +} ADC_TypeDef; + +/* Backup Registers */ +typedef struct +{ + uint32_t RESERVED0; + __IO uint16_t DATAR1; + uint16_t RESERVED1; + __IO uint16_t DATAR2; + uint16_t RESERVED2; + __IO uint16_t DATAR3; + uint16_t RESERVED3; + __IO uint16_t DATAR4; + uint16_t RESERVED4; + __IO uint16_t DATAR5; + uint16_t RESERVED5; + __IO uint16_t DATAR6; + uint16_t RESERVED6; + __IO uint16_t DATAR7; + uint16_t RESERVED7; + __IO uint16_t DATAR8; + uint16_t RESERVED8; + __IO uint16_t DATAR9; + uint16_t RESERVED9; + __IO uint16_t DATAR10; + uint16_t RESERVED10; + __IO uint16_t OCTLR; + uint16_t RESERVED11; + __IO uint16_t TPCTLR; + uint16_t RESERVED12; + __IO uint16_t TPCSR; + uint16_t RESERVED13[5]; + __IO uint16_t DATAR11; + uint16_t RESERVED14; + __IO uint16_t DATAR12; + uint16_t RESERVED15; + __IO uint16_t DATAR13; + uint16_t RESERVED16; + __IO uint16_t DATAR14; + uint16_t RESERVED17; + __IO uint16_t DATAR15; + uint16_t RESERVED18; + __IO uint16_t DATAR16; + uint16_t RESERVED19; + __IO uint16_t DATAR17; + uint16_t RESERVED20; + __IO uint16_t DATAR18; + uint16_t RESERVED21; + __IO uint16_t DATAR19; + uint16_t RESERVED22; + __IO uint16_t DATAR20; + uint16_t RESERVED23; + __IO uint16_t DATAR21; + uint16_t RESERVED24; + __IO uint16_t DATAR22; + uint16_t RESERVED25; + __IO uint16_t DATAR23; + uint16_t RESERVED26; + __IO uint16_t DATAR24; + uint16_t RESERVED27; + __IO uint16_t DATAR25; + uint16_t RESERVED28; + __IO uint16_t DATAR26; + uint16_t RESERVED29; + __IO uint16_t DATAR27; + uint16_t RESERVED30; + __IO uint16_t DATAR28; + uint16_t RESERVED31; + __IO uint16_t DATAR29; + uint16_t RESERVED32; + __IO uint16_t DATAR30; + uint16_t RESERVED33; + __IO uint16_t DATAR31; + uint16_t RESERVED34; + __IO uint16_t DATAR32; + uint16_t RESERVED35; + __IO uint16_t DATAR33; + uint16_t RESERVED36; + __IO uint16_t DATAR34; + uint16_t RESERVED37; + __IO uint16_t DATAR35; + uint16_t RESERVED38; + __IO uint16_t DATAR36; + uint16_t RESERVED39; + __IO uint16_t DATAR37; + uint16_t RESERVED40; + __IO uint16_t DATAR38; + uint16_t RESERVED41; + __IO uint16_t DATAR39; + uint16_t RESERVED42; + __IO uint16_t DATAR40; + uint16_t RESERVED43; + __IO uint16_t DATAR41; + uint16_t RESERVED44; + __IO uint16_t DATAR42; + uint16_t RESERVED45; +} BKP_TypeDef; + +/* CRC Calculation Unit */ +typedef struct +{ + __IO uint32_t DATAR; + __IO uint8_t IDATAR; + uint8_t RESERVED0; + uint16_t RESERVED1; + __IO uint32_t CTLR; +} CRC_TypeDef; + +/* Digital to Analog Converter */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint32_t SWTR; + __IO uint32_t R12BDHR1; + __IO uint32_t L12BDHR1; + __IO uint32_t R8BDHR1; + __IO uint32_t R12BDHR2; + __IO uint32_t L12BDHR2; + __IO uint32_t R8BDHR2; + __IO uint32_t RD12BDHR; + __IO uint32_t LD12BDHR; + __IO uint32_t RD8BDHR; + __IO uint32_t DOR1; + __IO uint32_t DOR2; +} DAC_TypeDef; + +/* Debug MCU */ +typedef struct +{ + __IO uint32_t CFGR0; + __IO uint32_t CFGR1; +}DBGMCU_TypeDef; + +/* DMA Controller */ +typedef struct +{ + __IO uint32_t CFGR; + __IO uint32_t CNTR; + __IO uint32_t PADDR; + __IO uint32_t MADDR; +} DMA_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t INTFR; + __IO uint32_t INTFCR; +} DMA_TypeDef; + +/* External Interrupt/Event Controller */ +typedef struct +{ + __IO uint32_t INTENR; + __IO uint32_t EVENR; + __IO uint32_t RTENR; + __IO uint32_t FTENR; + __IO uint32_t SWIEVR; + __IO uint32_t INTFR; +} EXTI_TypeDef; + +/* FLASH Registers */ +typedef struct +{ + __IO uint32_t ACTLR; + __IO uint32_t KEYR; + __IO uint32_t OBKEYR; + __IO uint32_t STATR; + __IO uint32_t CTLR; + __IO uint32_t ADDR; + __IO uint32_t RESERVED; + __IO uint32_t OBR; + __IO uint32_t WPR; + __IO uint32_t MODEKEYR; +} FLASH_TypeDef; + +/* Option Bytes Registers */ +typedef struct +{ + __IO uint16_t RDPR; + __IO uint16_t USER; + __IO uint16_t Data0; + __IO uint16_t Data1; + __IO uint16_t WRPR0; + __IO uint16_t WRPR1; + __IO uint16_t WRPR2; + __IO uint16_t WRPR3; +} OB_TypeDef; + +/* General Purpose I/O */ +typedef struct +{ + __IO uint32_t CFGLR; + __IO uint32_t CFGHR; + __IO uint32_t INDR; + __IO uint32_t OUTDR; + __IO uint32_t BSHR; + __IO uint32_t BCR; + __IO uint32_t LCKR; +} GPIO_TypeDef; + +/* Alternate Function I/O */ +typedef struct +{ + __IO uint32_t ECR; + __IO uint32_t PCFR1; + __IO uint32_t EXTICR[4]; + uint32_t RESERVED0; + __IO uint32_t PCFR2; +} AFIO_TypeDef; + +/* Inter Integrated Circuit Interface */ +typedef struct +{ + __IO uint16_t CTLR1; + uint16_t RESERVED0; + __IO uint16_t CTLR2; + uint16_t RESERVED1; + __IO uint16_t OADDR1; + uint16_t RESERVED2; + __IO uint16_t OADDR2; + uint16_t RESERVED3; + __IO uint16_t DATAR; + uint16_t RESERVED4; + __IO uint16_t STAR1; + uint16_t RESERVED5; + __IO uint16_t STAR2; + uint16_t RESERVED6; + __IO uint16_t CKCFGR; + uint16_t RESERVED7; + __IO uint16_t RTR; + uint16_t RESERVED8; +} I2C_TypeDef; + +/* Independent WatchDog */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint32_t PSCR; + __IO uint32_t RLDR; + __IO uint32_t STATR; +} IWDG_TypeDef; + +/* Power Control */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint32_t CSR; +} PWR_TypeDef; + +/* Reset and Clock Control */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint32_t CFGR0; + __IO uint32_t INTR; + __IO uint32_t APB2PRSTR; + __IO uint32_t APB1PRSTR; + __IO uint32_t AHBPCENR; + __IO uint32_t APB2PCENR; + __IO uint32_t APB1PCENR; + __IO uint32_t BDCTLR; + __IO uint32_t RSTSCKR; +} RCC_TypeDef; + +/* Real-Time Clock */ +typedef struct +{ + __IO uint16_t CTLRH; + uint16_t RESERVED0; + __IO uint16_t CTLRL; + uint16_t RESERVED1; + __IO uint16_t PSCRH; + uint16_t RESERVED2; + __IO uint16_t PSCRL; + uint16_t RESERVED3; + __IO uint16_t DIVH; + uint16_t RESERVED4; + __IO uint16_t DIVL; + uint16_t RESERVED5; + __IO uint16_t CNTH; + uint16_t RESERVED6; + __IO uint16_t CNTL; + uint16_t RESERVED7; + __IO uint16_t ALRMH; + uint16_t RESERVED8; + __IO uint16_t ALRML; + uint16_t RESERVED9; +} RTC_TypeDef; + +/* Serial Peripheral Interface */ +typedef struct +{ + __IO uint16_t CTLR1; + uint16_t RESERVED0; + __IO uint16_t CTLR2; + uint16_t RESERVED1; + __IO uint16_t STATR; + uint16_t RESERVED2; + __IO uint16_t DATAR; + uint16_t RESERVED3; + __IO uint16_t CRCR; + uint16_t RESERVED4; + __IO uint16_t RCRCR; + uint16_t RESERVED5; + __IO uint16_t TCRCR; + uint16_t RESERVED6; + __IO uint16_t I2SCFGR; + uint16_t RESERVED7; + __IO uint16_t I2SPR; + uint16_t RESERVED8; +} SPI_TypeDef; + +/* TIM */ +typedef struct +{ + __IO uint16_t CTLR1; + uint16_t RESERVED0; + __IO uint16_t CTLR2; + uint16_t RESERVED1; + __IO uint16_t SMCFGR; + uint16_t RESERVED2; + __IO uint16_t DMAINTENR; + uint16_t RESERVED3; + __IO uint16_t INTFR; + uint16_t RESERVED4; + __IO uint16_t SWEVGR; + uint16_t RESERVED5; + __IO uint16_t CHCTLR1; + uint16_t RESERVED6; + __IO uint16_t CHCTLR2; + uint16_t RESERVED7; + __IO uint16_t CCER; + uint16_t RESERVED8; + __IO uint16_t CNT; + uint16_t RESERVED9; + __IO uint16_t PSC; + uint16_t RESERVED10; + __IO uint16_t ATRLR; + uint16_t RESERVED11; + __IO uint16_t RPTCR; + uint16_t RESERVED12; + __IO uint16_t CH1CVR; + uint16_t RESERVED13; + __IO uint16_t CH2CVR; + uint16_t RESERVED14; + __IO uint16_t CH3CVR; + uint16_t RESERVED15; + __IO uint16_t CH4CVR; + uint16_t RESERVED16; + __IO uint16_t BDTR; + uint16_t RESERVED17; + __IO uint16_t DMACFGR; + uint16_t RESERVED18; + __IO uint16_t DMAADR; + uint16_t RESERVED19; +} TIM_TypeDef; + +/* Universal Synchronous Asynchronous Receiver Transmitter */ +typedef struct +{ + __IO uint16_t STATR; + uint16_t RESERVED0; + __IO uint16_t DATAR; + uint16_t RESERVED1; + __IO uint16_t BRR; + uint16_t RESERVED2; + __IO uint16_t CTLR1; + uint16_t RESERVED3; + __IO uint16_t CTLR2; + uint16_t RESERVED4; + __IO uint16_t CTLR3; + uint16_t RESERVED5; + __IO uint16_t GPR; + uint16_t RESERVED6; +} USART_TypeDef; + +/* Window WatchDog */ +typedef struct +{ + __IO uint32_t CTLR; + __IO uint32_t CFGR; + __IO uint32_t STATR; +} WWDG_TypeDef; + +/* Enhanced Registers */ +typedef struct +{ + __IO uint32_t EXTEN_CTR; +} EXTEN_TypeDef; + + +/* Peripheral memory map */ +#define FLASH_BASE ((uint32_t)0x08000000) /* FLASH base address in the alias region */ +#define SRAM_BASE ((uint32_t)0x20000000) /* SRAM base address in the alias region */ +#define PERIPH_BASE ((uint32_t)0x40000000) /* Peripheral base address in the alias region */ + + +#define APB1PERIPH_BASE (PERIPH_BASE) +#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) +#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) + +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) +#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) +#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) +#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) +#define TIM12_BASE (APB1PERIPH_BASE + 0x1800) +#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00) +#define TIM14_BASE (APB1PERIPH_BASE + 0x2000) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) +#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800) +#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) +#define UART5_BASE (APB1PERIPH_BASE + 0x5000) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) +#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000) +#define DAC_BASE (APB1PERIPH_BASE + 0x7400) + +#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) +#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) +#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) +#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) +#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) +#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) +#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) +#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) +#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) +#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) +#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800) +#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) +#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) +#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) +#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) +#define TIM9_BASE (APB2PERIPH_BASE + 0x4C00) +#define TIM10_BASE (APB2PERIPH_BASE + 0x5000) +#define TIM11_BASE (APB2PERIPH_BASE + 0x5400) + +#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) +#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) +#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) +#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030) +#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044) +#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058) +#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C) +#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) +#define DMA2_BASE (AHBPERIPH_BASE + 0x0400) +#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408) +#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C) +#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430) +#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) +#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458) +#define RCC_BASE (AHBPERIPH_BASE + 0x1000) +#define CRC_BASE (AHBPERIPH_BASE + 0x3000) + +#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /* Flash registers base address */ +#define OB_BASE ((uint32_t)0x1FFFF800) /* Flash Option Bytes base address */ +#define DBGMCU_BASE ((uint32_t)0xE000D000) +#define EXTEN_BASE ((uint32_t)0x40023800) + +/* Peripheral declaration */ +#define TIM2 ((TIM_TypeDef *) TIM2_BASE) +#define TIM3 ((TIM_TypeDef *) TIM3_BASE) +#define TIM4 ((TIM_TypeDef *) TIM4_BASE) +#define TIM5 ((TIM_TypeDef *) TIM5_BASE) +#define TIM6 ((TIM_TypeDef *) TIM6_BASE) +#define TIM7 ((TIM_TypeDef *) TIM7_BASE) +#define TIM12 ((TIM_TypeDef *) TIM12_BASE) +#define TIM13 ((TIM_TypeDef *) TIM13_BASE) +#define TIM14 ((TIM_TypeDef *) TIM14_BASE) +#define RTC ((RTC_TypeDef *) RTC_BASE) +#define WWDG ((WWDG_TypeDef *) WWDG_BASE) +#define IWDG ((IWDG_TypeDef *) IWDG_BASE) +#define SPI2 ((SPI_TypeDef *) SPI2_BASE) +#define SPI3 ((SPI_TypeDef *) SPI3_BASE) +#define USART2 ((USART_TypeDef *) USART2_BASE) +#define USART3 ((USART_TypeDef *) USART3_BASE) +#define UART4 ((USART_TypeDef *) UART4_BASE) +#define UART5 ((USART_TypeDef *) UART5_BASE) +#define I2C1 ((I2C_TypeDef *) I2C1_BASE) +#define I2C2 ((I2C_TypeDef *) I2C2_BASE) +#define BKP ((BKP_TypeDef *) BKP_BASE) +#define PWR ((PWR_TypeDef *) PWR_BASE) +#define DAC ((DAC_TypeDef *) DAC_BASE) +#define AFIO ((AFIO_TypeDef *) AFIO_BASE) +#define EXTI ((EXTI_TypeDef *) EXTI_BASE) +#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) +#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) +#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) +#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) +#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) +#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) +#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) +#define ADC1 ((ADC_TypeDef *) ADC1_BASE) +#define ADC2 ((ADC_TypeDef *) ADC2_BASE) +#define TIM1 ((TIM_TypeDef *) TIM1_BASE) +#define SPI1 ((SPI_TypeDef *) SPI1_BASE) +#define TIM8 ((TIM_TypeDef *) TIM8_BASE) +#define USART1 ((USART_TypeDef *) USART1_BASE) +#define ADC3 ((ADC_TypeDef *) ADC3_BASE) +#define TIM15 ((TIM_TypeDef *) TIM15_BASE) +#define TIM16 ((TIM_TypeDef *) TIM16_BASE) +#define TIM17 ((TIM_TypeDef *) TIM17_BASE) +#define TIM9 ((TIM_TypeDef *) TIM9_BASE) +#define TIM10 ((TIM_TypeDef *) TIM10_BASE) +#define TIM11 ((TIM_TypeDef *) TIM11_BASE) +#define DMA1 ((DMA_TypeDef *) DMA1_BASE) +#define DMA2 ((DMA_TypeDef *) DMA2_BASE) +#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) +#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) +#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) +#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) +#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) +#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) +#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) +#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) +#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) +#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) +#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) +#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) +#define RCC ((RCC_TypeDef *) RCC_BASE) +#define CRC ((CRC_TypeDef *) CRC_BASE) +#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) +#define OB ((OB_TypeDef *) OB_BASE) +#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) +#define EXTEN ((EXTEN_TypeDef *) EXTEN_BASE) + + +/******************************************************************************/ +/* Peripheral Registers Bits Definition */ +/******************************************************************************/ + +/******************************************************************************/ +/* Analog to Digital Converter */ +/******************************************************************************/ + +/******************** Bit definition for ADC_STATR register ********************/ +#define ADC_AWD ((uint8_t)0x01) /* Analog watchdog flag */ +#define ADC_EOC ((uint8_t)0x02) /* End of conversion */ +#define ADC_JEOC ((uint8_t)0x04) /* Injected channel end of conversion */ +#define ADC_JSTRT ((uint8_t)0x08) /* Injected channel Start flag */ +#define ADC_STRT ((uint8_t)0x10) /* Regular channel Start flag */ + +/******************* Bit definition for ADC_CTLR1 register ********************/ +#define ADC_AWDCH ((uint32_t)0x0000001F) /* AWDCH[4:0] bits (Analog watchdog channel select bits) */ +#define ADC_AWDCH_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_AWDCH_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_AWDCH_2 ((uint32_t)0x00000004) /* Bit 2 */ +#define ADC_AWDCH_3 ((uint32_t)0x00000008) /* Bit 3 */ +#define ADC_AWDCH_4 ((uint32_t)0x00000010) /* Bit 4 */ + +#define ADC_EOCIE ((uint32_t)0x00000020) /* Interrupt enable for EOC */ +#define ADC_AWDIE ((uint32_t)0x00000040) /* Analog Watchdog interrupt enable */ +#define ADC_JEOCIE ((uint32_t)0x00000080) /* Interrupt enable for injected channels */ +#define ADC_SCAN ((uint32_t)0x00000100) /* Scan mode */ +#define ADC_AWDSGL ((uint32_t)0x00000200) /* Enable the watchdog on a single channel in scan mode */ +#define ADC_JAUTO ((uint32_t)0x00000400) /* Automatic injected group conversion */ +#define ADC_DISCEN ((uint32_t)0x00000800) /* Discontinuous mode on regular channels */ +#define ADC_JDISCEN ((uint32_t)0x00001000) /* Discontinuous mode on injected channels */ + +#define ADC_DISCNUM ((uint32_t)0x0000E000) /* DISCNUM[2:0] bits (Discontinuous mode channel count) */ +#define ADC_DISCNUM_0 ((uint32_t)0x00002000) /* Bit 0 */ +#define ADC_DISCNUM_1 ((uint32_t)0x00004000) /* Bit 1 */ +#define ADC_DISCNUM_2 ((uint32_t)0x00008000) /* Bit 2 */ + +#define ADC_DUALMOD ((uint32_t)0x000F0000) /* DUALMOD[3:0] bits (Dual mode selection) */ +#define ADC_DUALMOD_0 ((uint32_t)0x00010000) /* Bit 0 */ +#define ADC_DUALMOD_1 ((uint32_t)0x00020000) /* Bit 1 */ +#define ADC_DUALMOD_2 ((uint32_t)0x00040000) /* Bit 2 */ +#define ADC_DUALMOD_3 ((uint32_t)0x00080000) /* Bit 3 */ + +#define ADC_JAWDEN ((uint32_t)0x00400000) /* Analog watchdog enable on injected channels */ +#define ADC_AWDEN ((uint32_t)0x00800000) /* Analog watchdog enable on regular channels */ + +/******************* Bit definition for ADC_CTLR2 register ********************/ +#define ADC_ADON ((uint32_t)0x00000001) /* A/D Converter ON / OFF */ +#define ADC_CONT ((uint32_t)0x00000002) /* Continuous Conversion */ +#define ADC_CAL ((uint32_t)0x00000004) /* A/D Calibration */ +#define ADC_RSTCAL ((uint32_t)0x00000008) /* Reset Calibration */ +#define ADC_DMA ((uint32_t)0x00000100) /* Direct Memory access mode */ +#define ADC_ALIGN ((uint32_t)0x00000800) /* Data Alignment */ + +#define ADC_JEXTSEL ((uint32_t)0x00007000) /* JEXTSEL[2:0] bits (External event select for injected group) */ +#define ADC_JEXTSEL_0 ((uint32_t)0x00001000) /* Bit 0 */ +#define ADC_JEXTSEL_1 ((uint32_t)0x00002000) /* Bit 1 */ +#define ADC_JEXTSEL_2 ((uint32_t)0x00004000) /* Bit 2 */ + +#define ADC_JEXTTRIG ((uint32_t)0x00008000) /* External Trigger Conversion mode for injected channels */ + +#define ADC_EXTSEL ((uint32_t)0x000E0000) /* EXTSEL[2:0] bits (External Event Select for regular group) */ +#define ADC_EXTSEL_0 ((uint32_t)0x00020000) /* Bit 0 */ +#define ADC_EXTSEL_1 ((uint32_t)0x00040000) /* Bit 1 */ +#define ADC_EXTSEL_2 ((uint32_t)0x00080000) /* Bit 2 */ + +#define ADC_EXTTRIG ((uint32_t)0x00100000) /* External Trigger Conversion mode for regular channels */ +#define ADC_JSWSTART ((uint32_t)0x00200000) /* Start Conversion of injected channels */ +#define ADC_SWSTART ((uint32_t)0x00400000) /* Start Conversion of regular channels */ +#define ADC_TSVREFE ((uint32_t)0x00800000) /* Temperature Sensor and VREFINT Enable */ + +/****************** Bit definition for ADC_SAMPTR1 register *******************/ +#define ADC_SMP10 ((uint32_t)0x00000007) /* SMP10[2:0] bits (Channel 10 Sample time selection) */ +#define ADC_SMP10_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_SMP10_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_SMP10_2 ((uint32_t)0x00000004) /* Bit 2 */ + +#define ADC_SMP11 ((uint32_t)0x00000038) /* SMP11[2:0] bits (Channel 11 Sample time selection) */ +#define ADC_SMP11_0 ((uint32_t)0x00000008) /* Bit 0 */ +#define ADC_SMP11_1 ((uint32_t)0x00000010) /* Bit 1 */ +#define ADC_SMP11_2 ((uint32_t)0x00000020) /* Bit 2 */ + +#define ADC_SMP12 ((uint32_t)0x000001C0) /* SMP12[2:0] bits (Channel 12 Sample time selection) */ +#define ADC_SMP12_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define ADC_SMP12_1 ((uint32_t)0x00000080) /* Bit 1 */ +#define ADC_SMP12_2 ((uint32_t)0x00000100) /* Bit 2 */ + +#define ADC_SMP13 ((uint32_t)0x00000E00) /* SMP13[2:0] bits (Channel 13 Sample time selection) */ +#define ADC_SMP13_0 ((uint32_t)0x00000200) /* Bit 0 */ +#define ADC_SMP13_1 ((uint32_t)0x00000400) /* Bit 1 */ +#define ADC_SMP13_2 ((uint32_t)0x00000800) /* Bit 2 */ + +#define ADC_SMP14 ((uint32_t)0x00007000) /* SMP14[2:0] bits (Channel 14 Sample time selection) */ +#define ADC_SMP14_0 ((uint32_t)0x00001000) /* Bit 0 */ +#define ADC_SMP14_1 ((uint32_t)0x00002000) /* Bit 1 */ +#define ADC_SMP14_2 ((uint32_t)0x00004000) /* Bit 2 */ + +#define ADC_SMP15 ((uint32_t)0x00038000) /* SMP15[2:0] bits (Channel 15 Sample time selection) */ +#define ADC_SMP15_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_SMP15_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_SMP15_2 ((uint32_t)0x00020000) /* Bit 2 */ + +#define ADC_SMP16 ((uint32_t)0x001C0000) /* SMP16[2:0] bits (Channel 16 Sample time selection) */ +#define ADC_SMP16_0 ((uint32_t)0x00040000) /* Bit 0 */ +#define ADC_SMP16_1 ((uint32_t)0x00080000) /* Bit 1 */ +#define ADC_SMP16_2 ((uint32_t)0x00100000) /* Bit 2 */ + +#define ADC_SMP17 ((uint32_t)0x00E00000) /* SMP17[2:0] bits (Channel 17 Sample time selection) */ +#define ADC_SMP17_0 ((uint32_t)0x00200000) /* Bit 0 */ +#define ADC_SMP17_1 ((uint32_t)0x00400000) /* Bit 1 */ +#define ADC_SMP17_2 ((uint32_t)0x00800000) /* Bit 2 */ + +/****************** Bit definition for ADC_SAMPTR2 register *******************/ +#define ADC_SMP0 ((uint32_t)0x00000007) /* SMP0[2:0] bits (Channel 0 Sample time selection) */ +#define ADC_SMP0_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_SMP0_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_SMP0_2 ((uint32_t)0x00000004) /* Bit 2 */ + +#define ADC_SMP1 ((uint32_t)0x00000038) /* SMP1[2:0] bits (Channel 1 Sample time selection) */ +#define ADC_SMP1_0 ((uint32_t)0x00000008) /* Bit 0 */ +#define ADC_SMP1_1 ((uint32_t)0x00000010) /* Bit 1 */ +#define ADC_SMP1_2 ((uint32_t)0x00000020) /* Bit 2 */ + +#define ADC_SMP2 ((uint32_t)0x000001C0) /* SMP2[2:0] bits (Channel 2 Sample time selection) */ +#define ADC_SMP2_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define ADC_SMP2_1 ((uint32_t)0x00000080) /* Bit 1 */ +#define ADC_SMP2_2 ((uint32_t)0x00000100) /* Bit 2 */ + +#define ADC_SMP3 ((uint32_t)0x00000E00) /* SMP3[2:0] bits (Channel 3 Sample time selection) */ +#define ADC_SMP3_0 ((uint32_t)0x00000200) /* Bit 0 */ +#define ADC_SMP3_1 ((uint32_t)0x00000400) /* Bit 1 */ +#define ADC_SMP3_2 ((uint32_t)0x00000800) /* Bit 2 */ + +#define ADC_SMP4 ((uint32_t)0x00007000) /* SMP4[2:0] bits (Channel 4 Sample time selection) */ +#define ADC_SMP4_0 ((uint32_t)0x00001000) /* Bit 0 */ +#define ADC_SMP4_1 ((uint32_t)0x00002000) /* Bit 1 */ +#define ADC_SMP4_2 ((uint32_t)0x00004000) /* Bit 2 */ + +#define ADC_SMP5 ((uint32_t)0x00038000) /* SMP5[2:0] bits (Channel 5 Sample time selection) */ +#define ADC_SMP5_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_SMP5_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_SMP5_2 ((uint32_t)0x00020000) /* Bit 2 */ + +#define ADC_SMP6 ((uint32_t)0x001C0000) /* SMP6[2:0] bits (Channel 6 Sample time selection) */ +#define ADC_SMP6_0 ((uint32_t)0x00040000) /* Bit 0 */ +#define ADC_SMP6_1 ((uint32_t)0x00080000) /* Bit 1 */ +#define ADC_SMP6_2 ((uint32_t)0x00100000) /* Bit 2 */ + +#define ADC_SMP7 ((uint32_t)0x00E00000) /* SMP7[2:0] bits (Channel 7 Sample time selection) */ +#define ADC_SMP7_0 ((uint32_t)0x00200000) /* Bit 0 */ +#define ADC_SMP7_1 ((uint32_t)0x00400000) /* Bit 1 */ +#define ADC_SMP7_2 ((uint32_t)0x00800000) /* Bit 2 */ + +#define ADC_SMP8 ((uint32_t)0x07000000) /* SMP8[2:0] bits (Channel 8 Sample time selection) */ +#define ADC_SMP8_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define ADC_SMP8_1 ((uint32_t)0x02000000) /* Bit 1 */ +#define ADC_SMP8_2 ((uint32_t)0x04000000) /* Bit 2 */ + +#define ADC_SMP9 ((uint32_t)0x38000000) /* SMP9[2:0] bits (Channel 9 Sample time selection) */ +#define ADC_SMP9_0 ((uint32_t)0x08000000) /* Bit 0 */ +#define ADC_SMP9_1 ((uint32_t)0x10000000) /* Bit 1 */ +#define ADC_SMP9_2 ((uint32_t)0x20000000) /* Bit 2 */ + +/****************** Bit definition for ADC_IOFR1 register *******************/ +#define ADC_JOFFSET1 ((uint16_t)0x0FFF) /* Data offset for injected channel 1 */ + +/****************** Bit definition for ADC_IOFR2 register *******************/ +#define ADC_JOFFSET2 ((uint16_t)0x0FFF) /* Data offset for injected channel 2 */ + +/****************** Bit definition for ADC_IOFR3 register *******************/ +#define ADC_JOFFSET3 ((uint16_t)0x0FFF) /* Data offset for injected channel 3 */ + +/****************** Bit definition for ADC_IOFR4 register *******************/ +#define ADC_JOFFSET4 ((uint16_t)0x0FFF) /* Data offset for injected channel 4 */ + +/******************* Bit definition for ADC_WDHTR register ********************/ +#define ADC_HT ((uint16_t)0x0FFF) /* Analog watchdog high threshold */ + +/******************* Bit definition for ADC_WDLTR register ********************/ +#define ADC_LT ((uint16_t)0x0FFF) /* Analog watchdog low threshold */ + +/******************* Bit definition for ADC_RSQR1 register *******************/ +#define ADC_SQ13 ((uint32_t)0x0000001F) /* SQ13[4:0] bits (13th conversion in regular sequence) */ +#define ADC_SQ13_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_SQ13_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_SQ13_2 ((uint32_t)0x00000004) /* Bit 2 */ +#define ADC_SQ13_3 ((uint32_t)0x00000008) /* Bit 3 */ +#define ADC_SQ13_4 ((uint32_t)0x00000010) /* Bit 4 */ + +#define ADC_SQ14 ((uint32_t)0x000003E0) /* SQ14[4:0] bits (14th conversion in regular sequence) */ +#define ADC_SQ14_0 ((uint32_t)0x00000020) /* Bit 0 */ +#define ADC_SQ14_1 ((uint32_t)0x00000040) /* Bit 1 */ +#define ADC_SQ14_2 ((uint32_t)0x00000080) /* Bit 2 */ +#define ADC_SQ14_3 ((uint32_t)0x00000100) /* Bit 3 */ +#define ADC_SQ14_4 ((uint32_t)0x00000200) /* Bit 4 */ + +#define ADC_SQ15 ((uint32_t)0x00007C00) /* SQ15[4:0] bits (15th conversion in regular sequence) */ +#define ADC_SQ15_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define ADC_SQ15_1 ((uint32_t)0x00000800) /* Bit 1 */ +#define ADC_SQ15_2 ((uint32_t)0x00001000) /* Bit 2 */ +#define ADC_SQ15_3 ((uint32_t)0x00002000) /* Bit 3 */ +#define ADC_SQ15_4 ((uint32_t)0x00004000) /* Bit 4 */ + +#define ADC_SQ16 ((uint32_t)0x000F8000) /* SQ16[4:0] bits (16th conversion in regular sequence) */ +#define ADC_SQ16_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_SQ16_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_SQ16_2 ((uint32_t)0x00020000) /* Bit 2 */ +#define ADC_SQ16_3 ((uint32_t)0x00040000) /* Bit 3 */ +#define ADC_SQ16_4 ((uint32_t)0x00080000) /* Bit 4 */ + +#define ADC_L ((uint32_t)0x00F00000) /* L[3:0] bits (Regular channel sequence length) */ +#define ADC_L_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define ADC_L_1 ((uint32_t)0x00200000) /* Bit 1 */ +#define ADC_L_2 ((uint32_t)0x00400000) /* Bit 2 */ +#define ADC_L_3 ((uint32_t)0x00800000) /* Bit 3 */ + +/******************* Bit definition for ADC_RSQR2 register *******************/ +#define ADC_SQ7 ((uint32_t)0x0000001F) /* SQ7[4:0] bits (7th conversion in regular sequence) */ +#define ADC_SQ7_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_SQ7_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_SQ7_2 ((uint32_t)0x00000004) /* Bit 2 */ +#define ADC_SQ7_3 ((uint32_t)0x00000008) /* Bit 3 */ +#define ADC_SQ7_4 ((uint32_t)0x00000010) /* Bit 4 */ + +#define ADC_SQ8 ((uint32_t)0x000003E0) /* SQ8[4:0] bits (8th conversion in regular sequence) */ +#define ADC_SQ8_0 ((uint32_t)0x00000020) /* Bit 0 */ +#define ADC_SQ8_1 ((uint32_t)0x00000040) /* Bit 1 */ +#define ADC_SQ8_2 ((uint32_t)0x00000080) /* Bit 2 */ +#define ADC_SQ8_3 ((uint32_t)0x00000100) /* Bit 3 */ +#define ADC_SQ8_4 ((uint32_t)0x00000200) /* Bit 4 */ + +#define ADC_SQ9 ((uint32_t)0x00007C00) /* SQ9[4:0] bits (9th conversion in regular sequence) */ +#define ADC_SQ9_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define ADC_SQ9_1 ((uint32_t)0x00000800) /* Bit 1 */ +#define ADC_SQ9_2 ((uint32_t)0x00001000) /* Bit 2 */ +#define ADC_SQ9_3 ((uint32_t)0x00002000) /* Bit 3 */ +#define ADC_SQ9_4 ((uint32_t)0x00004000) /* Bit 4 */ + +#define ADC_SQ10 ((uint32_t)0x000F8000) /* SQ10[4:0] bits (10th conversion in regular sequence) */ +#define ADC_SQ10_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_SQ10_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_SQ10_2 ((uint32_t)0x00020000) /* Bit 2 */ +#define ADC_SQ10_3 ((uint32_t)0x00040000) /* Bit 3 */ +#define ADC_SQ10_4 ((uint32_t)0x00080000) /* Bit 4 */ + +#define ADC_SQ11 ((uint32_t)0x01F00000) /* SQ11[4:0] bits (11th conversion in regular sequence) */ +#define ADC_SQ11_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define ADC_SQ11_1 ((uint32_t)0x00200000) /* Bit 1 */ +#define ADC_SQ11_2 ((uint32_t)0x00400000) /* Bit 2 */ +#define ADC_SQ11_3 ((uint32_t)0x00800000) /* Bit 3 */ +#define ADC_SQ11_4 ((uint32_t)0x01000000) /* Bit 4 */ + +#define ADC_SQ12 ((uint32_t)0x3E000000) /* SQ12[4:0] bits (12th conversion in regular sequence) */ +#define ADC_SQ12_0 ((uint32_t)0x02000000) /* Bit 0 */ +#define ADC_SQ12_1 ((uint32_t)0x04000000) /* Bit 1 */ +#define ADC_SQ12_2 ((uint32_t)0x08000000) /* Bit 2 */ +#define ADC_SQ12_3 ((uint32_t)0x10000000) /* Bit 3 */ +#define ADC_SQ12_4 ((uint32_t)0x20000000) /* Bit 4 */ + +/******************* Bit definition for ADC_RSQR3 register *******************/ +#define ADC_SQ1 ((uint32_t)0x0000001F) /* SQ1[4:0] bits (1st conversion in regular sequence) */ +#define ADC_SQ1_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_SQ1_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_SQ1_2 ((uint32_t)0x00000004) /* Bit 2 */ +#define ADC_SQ1_3 ((uint32_t)0x00000008) /* Bit 3 */ +#define ADC_SQ1_4 ((uint32_t)0x00000010) /* Bit 4 */ + +#define ADC_SQ2 ((uint32_t)0x000003E0) /* SQ2[4:0] bits (2nd conversion in regular sequence) */ +#define ADC_SQ2_0 ((uint32_t)0x00000020) /* Bit 0 */ +#define ADC_SQ2_1 ((uint32_t)0x00000040) /* Bit 1 */ +#define ADC_SQ2_2 ((uint32_t)0x00000080) /* Bit 2 */ +#define ADC_SQ2_3 ((uint32_t)0x00000100) /* Bit 3 */ +#define ADC_SQ2_4 ((uint32_t)0x00000200) /* Bit 4 */ + +#define ADC_SQ3 ((uint32_t)0x00007C00) /* SQ3[4:0] bits (3rd conversion in regular sequence) */ +#define ADC_SQ3_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define ADC_SQ3_1 ((uint32_t)0x00000800) /* Bit 1 */ +#define ADC_SQ3_2 ((uint32_t)0x00001000) /* Bit 2 */ +#define ADC_SQ3_3 ((uint32_t)0x00002000) /* Bit 3 */ +#define ADC_SQ3_4 ((uint32_t)0x00004000) /* Bit 4 */ + +#define ADC_SQ4 ((uint32_t)0x000F8000) /* SQ4[4:0] bits (4th conversion in regular sequence) */ +#define ADC_SQ4_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_SQ4_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_SQ4_2 ((uint32_t)0x00020000) /* Bit 2 */ +#define ADC_SQ4_3 ((uint32_t)0x00040000) /* Bit 3 */ +#define ADC_SQ4_4 ((uint32_t)0x00080000) /* Bit 4 */ + +#define ADC_SQ5 ((uint32_t)0x01F00000) /* SQ5[4:0] bits (5th conversion in regular sequence) */ +#define ADC_SQ5_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define ADC_SQ5_1 ((uint32_t)0x00200000) /* Bit 1 */ +#define ADC_SQ5_2 ((uint32_t)0x00400000) /* Bit 2 */ +#define ADC_SQ5_3 ((uint32_t)0x00800000) /* Bit 3 */ +#define ADC_SQ5_4 ((uint32_t)0x01000000) /* Bit 4 */ + +#define ADC_SQ6 ((uint32_t)0x3E000000) /* SQ6[4:0] bits (6th conversion in regular sequence) */ +#define ADC_SQ6_0 ((uint32_t)0x02000000) /* Bit 0 */ +#define ADC_SQ6_1 ((uint32_t)0x04000000) /* Bit 1 */ +#define ADC_SQ6_2 ((uint32_t)0x08000000) /* Bit 2 */ +#define ADC_SQ6_3 ((uint32_t)0x10000000) /* Bit 3 */ +#define ADC_SQ6_4 ((uint32_t)0x20000000) /* Bit 4 */ + +/******************* Bit definition for ADC_ISQR register *******************/ +#define ADC_JSQ1 ((uint32_t)0x0000001F) /* JSQ1[4:0] bits (1st conversion in injected sequence) */ +#define ADC_JSQ1_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define ADC_JSQ1_1 ((uint32_t)0x00000002) /* Bit 1 */ +#define ADC_JSQ1_2 ((uint32_t)0x00000004) /* Bit 2 */ +#define ADC_JSQ1_3 ((uint32_t)0x00000008) /* Bit 3 */ +#define ADC_JSQ1_4 ((uint32_t)0x00000010) /* Bit 4 */ + +#define ADC_JSQ2 ((uint32_t)0x000003E0) /* JSQ2[4:0] bits (2nd conversion in injected sequence) */ +#define ADC_JSQ2_0 ((uint32_t)0x00000020) /* Bit 0 */ +#define ADC_JSQ2_1 ((uint32_t)0x00000040) /* Bit 1 */ +#define ADC_JSQ2_2 ((uint32_t)0x00000080) /* Bit 2 */ +#define ADC_JSQ2_3 ((uint32_t)0x00000100) /* Bit 3 */ +#define ADC_JSQ2_4 ((uint32_t)0x00000200) /* Bit 4 */ + +#define ADC_JSQ3 ((uint32_t)0x00007C00) /* JSQ3[4:0] bits (3rd conversion in injected sequence) */ +#define ADC_JSQ3_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define ADC_JSQ3_1 ((uint32_t)0x00000800) /* Bit 1 */ +#define ADC_JSQ3_2 ((uint32_t)0x00001000) /* Bit 2 */ +#define ADC_JSQ3_3 ((uint32_t)0x00002000) /* Bit 3 */ +#define ADC_JSQ3_4 ((uint32_t)0x00004000) /* Bit 4 */ + +#define ADC_JSQ4 ((uint32_t)0x000F8000) /* JSQ4[4:0] bits (4th conversion in injected sequence) */ +#define ADC_JSQ4_0 ((uint32_t)0x00008000) /* Bit 0 */ +#define ADC_JSQ4_1 ((uint32_t)0x00010000) /* Bit 1 */ +#define ADC_JSQ4_2 ((uint32_t)0x00020000) /* Bit 2 */ +#define ADC_JSQ4_3 ((uint32_t)0x00040000) /* Bit 3 */ +#define ADC_JSQ4_4 ((uint32_t)0x00080000) /* Bit 4 */ + +#define ADC_JL ((uint32_t)0x00300000) /* JL[1:0] bits (Injected Sequence length) */ +#define ADC_JL_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define ADC_JL_1 ((uint32_t)0x00200000) /* Bit 1 */ + +/******************* Bit definition for ADC_IDATAR1 register *******************/ +#define ADC_IDATAR1_JDATA ((uint16_t)0xFFFF) /* Injected data */ + +/******************* Bit definition for ADC_IDATAR2 register *******************/ +#define ADC_IDATAR2_JDATA ((uint16_t)0xFFFF) /* Injected data */ + +/******************* Bit definition for ADC_IDATAR3 register *******************/ +#define ADC_IDATAR3_JDATA ((uint16_t)0xFFFF) /* Injected data */ + +/******************* Bit definition for ADC_IDATAR4 register *******************/ +#define ADC_IDATAR4_JDATA ((uint16_t)0xFFFF) /* Injected data */ + +/******************** Bit definition for ADC_RDATAR register ********************/ +#define ADC_RDATAR_DATA ((uint32_t)0x0000FFFF) /* Regular data */ +#define ADC_RDATAR_ADC2DATA ((uint32_t)0xFFFF0000) /* ADC2 data */ + +/******************************************************************************/ +/* Backup registers */ +/******************************************************************************/ + +/******************* Bit definition for BKP_DATAR1 register ********************/ +#define BKP_DATAR1_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR2 register ********************/ +#define BKP_DATAR2_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR3 register ********************/ +#define BKP_DATAR3_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR4 register ********************/ +#define BKP_DATAR4_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR5 register ********************/ +#define BKP_DATAR5_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR6 register ********************/ +#define BKP_DATAR6_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR7 register ********************/ +#define BKP_DATAR7_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR8 register ********************/ +#define BKP_DATAR8_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR9 register ********************/ +#define BKP_DATAR9_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR10 register *******************/ +#define BKP_DATAR10_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR11 register *******************/ +#define BKP_DATAR11_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR12 register *******************/ +#define BKP_DATAR12_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR13 register *******************/ +#define BKP_DATAR13_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR14 register *******************/ +#define BKP_DATAR14_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR15 register *******************/ +#define BKP_DATAR15_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR16 register *******************/ +#define BKP_DATAR16_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR17 register *******************/ +#define BKP_DATAR17_D ((uint16_t)0xFFFF) /* Backup data */ + +/****************** Bit definition for BKP_DATAR18 register ********************/ +#define BKP_DATAR18_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR19 register *******************/ +#define BKP_DATAR19_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR20 register *******************/ +#define BKP_DATAR20_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR21 register *******************/ +#define BKP_DATAR21_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR22 register *******************/ +#define BKP_DATAR22_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR23 register *******************/ +#define BKP_DATAR23_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR24 register *******************/ +#define BKP_DATAR24_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR25 register *******************/ +#define BKP_DATAR25_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR26 register *******************/ +#define BKP_DATAR26_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR27 register *******************/ +#define BKP_DATAR27_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR28 register *******************/ +#define BKP_DATAR28_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR29 register *******************/ +#define BKP_DATAR29_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR30 register *******************/ +#define BKP_DATAR30_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR31 register *******************/ +#define BKP_DATAR31_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR32 register *******************/ +#define BKP_DATAR32_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR33 register *******************/ +#define BKP_DATAR33_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR34 register *******************/ +#define BKP_DATAR34_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR35 register *******************/ +#define BKP_DATAR35_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR36 register *******************/ +#define BKP_DATAR36_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR37 register *******************/ +#define BKP_DATAR37_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR38 register *******************/ +#define BKP_DATAR38_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR39 register *******************/ +#define BKP_DATAR39_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR40 register *******************/ +#define BKP_DATAR40_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR41 register *******************/ +#define BKP_DATAR41_D ((uint16_t)0xFFFF) /* Backup data */ + +/******************* Bit definition for BKP_DATAR42 register *******************/ +#define BKP_DATAR42_D ((uint16_t)0xFFFF) /* Backup data */ + +/****************** Bit definition for BKP_OCTLR register *******************/ +#define BKP_CAL ((uint16_t)0x007F) /* Calibration value */ +#define BKP_CCO ((uint16_t)0x0080) /* Calibration Clock Output */ +#define BKP_ASOE ((uint16_t)0x0100) /* Alarm or Second Output Enable */ +#define BKP_ASOS ((uint16_t)0x0200) /* Alarm or Second Output Selection */ + +/******************** Bit definition for BKP_TPCTLR register ********************/ +#define BKP_TPE ((uint8_t)0x01) /* TAMPER pin enable */ +#define BKP_TPAL ((uint8_t)0x02) /* TAMPER pin active level */ + +/******************* Bit definition for BKP_TPCSR register ********************/ +#define BKP_CTE ((uint16_t)0x0001) /* Clear Tamper event */ +#define BKP_CTI ((uint16_t)0x0002) /* Clear Tamper Interrupt */ +#define BKP_TPIE ((uint16_t)0x0004) /* TAMPER Pin interrupt enable */ +#define BKP_TEF ((uint16_t)0x0100) /* Tamper Event Flag */ +#define BKP_TIF ((uint16_t)0x0200) /* Tamper Interrupt Flag */ + +/******************************************************************************/ +/* CRC Calculation Unit */ +/******************************************************************************/ + +/******************* Bit definition for CRC_DATAR register *********************/ +#define CRC_DATAR_DR ((uint32_t)0xFFFFFFFF) /* Data register bits */ + + +/******************* Bit definition for CRC_IDATAR register ********************/ +#define CRC_IDR_IDATAR ((uint8_t)0xFF) /* General-purpose 8-bit data register bits */ + + +/******************** Bit definition for CRC_CTLR register ********************/ +#define CRC_CTLR_RESET ((uint8_t)0x01) /* RESET bit */ + +/******************************************************************************/ +/* Digital to Analog Converter */ +/******************************************************************************/ + +/******************** Bit definition for DAC_CTLR register ********************/ +#define DAC_EN1 ((uint32_t)0x00000001) /* DAC channel1 enable */ +#define DAC_BOFF1 ((uint32_t)0x00000002) /* DAC channel1 output buffer disable */ +#define DAC_TEN1 ((uint32_t)0x00000004) /* DAC channel1 Trigger enable */ + +#define DAC_TSEL1 ((uint32_t)0x00000038) /* TSEL1[2:0] (DAC channel1 Trigger selection) */ +#define DAC_TSEL1_0 ((uint32_t)0x00000008) /* Bit 0 */ +#define DAC_TSEL1_1 ((uint32_t)0x00000010) /* Bit 1 */ +#define DAC_TSEL1_2 ((uint32_t)0x00000020) /* Bit 2 */ + +#define DAC_WAVE1 ((uint32_t)0x000000C0) /* WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable) */ +#define DAC_WAVE1_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define DAC_WAVE1_1 ((uint32_t)0x00000080) /* Bit 1 */ + +#define DAC_MAMP1 ((uint32_t)0x00000F00) /* MAMP1[3:0] (DAC channel1 Mask/Amplitude selector) */ +#define DAC_MAMP1_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define DAC_MAMP1_1 ((uint32_t)0x00000200) /* Bit 1 */ +#define DAC_MAMP1_2 ((uint32_t)0x00000400) /* Bit 2 */ +#define DAC_MAMP1_3 ((uint32_t)0x00000800) /* Bit 3 */ + +#define DAC_DMAEN1 ((uint32_t)0x00001000) /* DAC channel1 DMA enable */ +#define DAC_EN2 ((uint32_t)0x00010000) /* DAC channel2 enable */ +#define DAC_BOFF2 ((uint32_t)0x00020000) /* DAC channel2 output buffer disable */ +#define DAC_TEN2 ((uint32_t)0x00040000) /* DAC channel2 Trigger enable */ + +#define DAC_TSEL2 ((uint32_t)0x00380000) /* TSEL2[2:0] (DAC channel2 Trigger selection) */ +#define DAC_TSEL2_0 ((uint32_t)0x00080000) /* Bit 0 */ +#define DAC_TSEL2_1 ((uint32_t)0x00100000) /* Bit 1 */ +#define DAC_TSEL2_2 ((uint32_t)0x00200000) /* Bit 2 */ + +#define DAC_WAVE2 ((uint32_t)0x00C00000) /* WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable) */ +#define DAC_WAVE2_0 ((uint32_t)0x00400000) /* Bit 0 */ +#define DAC_WAVE2_1 ((uint32_t)0x00800000) /* Bit 1 */ + +#define DAC_MAMP2 ((uint32_t)0x0F000000) /* MAMP2[3:0] (DAC channel2 Mask/Amplitude selector) */ +#define DAC_MAMP2_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define DAC_MAMP2_1 ((uint32_t)0x02000000) /* Bit 1 */ +#define DAC_MAMP2_2 ((uint32_t)0x04000000) /* Bit 2 */ +#define DAC_MAMP2_3 ((uint32_t)0x08000000) /* Bit 3 */ + +#define DAC_DMAEN2 ((uint32_t)0x10000000) /* DAC channel2 DMA enabled */ + +/***************** Bit definition for DAC_SWTR register ******************/ +#define DAC_SWTRIG1 ((uint8_t)0x01) /* DAC channel1 software trigger */ +#define DAC_SWTRIG2 ((uint8_t)0x02) /* DAC channel2 software trigger */ + +/***************** Bit definition for DAC_R12BDHR1 register ******************/ +#define DAC_DHR12R1 ((uint16_t)0x0FFF) /* DAC channel1 12-bit Right aligned data */ + +/***************** Bit definition for DAC_L12BDHR1 register ******************/ +#define DAC_DHR12L1 ((uint16_t)0xFFF0) /* DAC channel1 12-bit Left aligned data */ + +/****************** Bit definition for DAC_R8BDHR1 register ******************/ +#define DAC_DHR8R1 ((uint8_t)0xFF) /* DAC channel1 8-bit Right aligned data */ + +/***************** Bit definition for DAC_R12BDHR2 register ******************/ +#define DAC_DHR12R2 ((uint16_t)0x0FFF) /* DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_L12BDHR2 register ******************/ +#define DAC_DHR12L2 ((uint16_t)0xFFF0) /* DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_R8BDHR2 register ******************/ +#define DAC_DHR8R2 ((uint8_t)0xFF) /* DAC channel2 8-bit Right aligned data */ + +/***************** Bit definition for DAC_RD12BDHR register ******************/ +#define DAC_RD12BDHR_DACC1DHR ((uint32_t)0x00000FFF) /* DAC channel1 12-bit Right aligned data */ +#define DAC_RD12BDHR_DACC2DHR ((uint32_t)0x0FFF0000) /* DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_LD12BDHR register ******************/ +#define DAC_LD12BDHR_DACC1DHR ((uint32_t)0x0000FFF0) /* DAC channel1 12-bit Left aligned data */ +#define DAC_LD12BDHR_DACC2DHR ((uint32_t)0xFFF00000) /* DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_RD8BDHR register ******************/ +#define DAC_RD8BDHR_DACC1DHR ((uint16_t)0x00FF) /* DAC channel1 8-bit Right aligned data */ +#define DAC_RD8BDHR_DACC2DHR ((uint16_t)0xFF00) /* DAC channel2 8-bit Right aligned data */ + +/******************* Bit definition for DAC_DOR1 register *******************/ +#define DAC_DACC1DOR ((uint16_t)0x0FFF) /* DAC channel1 data output */ + +/******************* Bit definition for DAC_DOR2 register *******************/ +#define DAC_DACC2DOR ((uint16_t)0x0FFF) /* DAC channel2 data output */ + +/******************************************************************************/ +/* DMA Controller */ +/******************************************************************************/ + +/******************* Bit definition for DMA_INTFR register ********************/ +#define DMA_GIF1 ((uint32_t)0x00000001) /* Channel 1 Global interrupt flag */ +#define DMA_TCIF1 ((uint32_t)0x00000002) /* Channel 1 Transfer Complete flag */ +#define DMA_HTIF1 ((uint32_t)0x00000004) /* Channel 1 Half Transfer flag */ +#define DMA_TEIF1 ((uint32_t)0x00000008) /* Channel 1 Transfer Error flag */ +#define DMA_GIF2 ((uint32_t)0x00000010) /* Channel 2 Global interrupt flag */ +#define DMA_TCIF2 ((uint32_t)0x00000020) /* Channel 2 Transfer Complete flag */ +#define DMA_HTIF2 ((uint32_t)0x00000040) /* Channel 2 Half Transfer flag */ +#define DMA_TEIF2 ((uint32_t)0x00000080) /* Channel 2 Transfer Error flag */ +#define DMA_GIF3 ((uint32_t)0x00000100) /* Channel 3 Global interrupt flag */ +#define DMA_TCIF3 ((uint32_t)0x00000200) /* Channel 3 Transfer Complete flag */ +#define DMA_HTIF3 ((uint32_t)0x00000400) /* Channel 3 Half Transfer flag */ +#define DMA_TEIF3 ((uint32_t)0x00000800) /* Channel 3 Transfer Error flag */ +#define DMA_GIF4 ((uint32_t)0x00001000) /* Channel 4 Global interrupt flag */ +#define DMA_TCIF4 ((uint32_t)0x00002000) /* Channel 4 Transfer Complete flag */ +#define DMA_HTIF4 ((uint32_t)0x00004000) /* Channel 4 Half Transfer flag */ +#define DMA_TEIF4 ((uint32_t)0x00008000) /* Channel 4 Transfer Error flag */ +#define DMA_GIF5 ((uint32_t)0x00010000) /* Channel 5 Global interrupt flag */ +#define DMA_TCIF5 ((uint32_t)0x00020000) /* Channel 5 Transfer Complete flag */ +#define DMA_HTIF5 ((uint32_t)0x00040000) /* Channel 5 Half Transfer flag */ +#define DMA_TEIF5 ((uint32_t)0x00080000) /* Channel 5 Transfer Error flag */ +#define DMA_GIF6 ((uint32_t)0x00100000) /* Channel 6 Global interrupt flag */ +#define DMA_TCIF6 ((uint32_t)0x00200000) /* Channel 6 Transfer Complete flag */ +#define DMA_HTIF6 ((uint32_t)0x00400000) /* Channel 6 Half Transfer flag */ +#define DMA_TEIF6 ((uint32_t)0x00800000) /* Channel 6 Transfer Error flag */ +#define DMA_GIF7 ((uint32_t)0x01000000) /* Channel 7 Global interrupt flag */ +#define DMA_TCIF7 ((uint32_t)0x02000000) /* Channel 7 Transfer Complete flag */ +#define DMA_HTIF7 ((uint32_t)0x04000000) /* Channel 7 Half Transfer flag */ +#define DMA_TEIF7 ((uint32_t)0x08000000) /* Channel 7 Transfer Error flag */ + +/******************* Bit definition for DMA_INTFCR register *******************/ +#define DMA_CGIF1 ((uint32_t)0x00000001) /* Channel 1 Global interrupt clear */ +#define DMA_CTCIF1 ((uint32_t)0x00000002) /* Channel 1 Transfer Complete clear */ +#define DMA_CHTIF1 ((uint32_t)0x00000004) /* Channel 1 Half Transfer clear */ +#define DMA_CTEIF1 ((uint32_t)0x00000008) /* Channel 1 Transfer Error clear */ +#define DMA_CGIF2 ((uint32_t)0x00000010) /* Channel 2 Global interrupt clear */ +#define DMA_CTCIF2 ((uint32_t)0x00000020) /* Channel 2 Transfer Complete clear */ +#define DMA_CHTIF2 ((uint32_t)0x00000040) /* Channel 2 Half Transfer clear */ +#define DMA_CTEIF2 ((uint32_t)0x00000080) /* Channel 2 Transfer Error clear */ +#define DMA_CGIF3 ((uint32_t)0x00000100) /* Channel 3 Global interrupt clear */ +#define DMA_CTCIF3 ((uint32_t)0x00000200) /* Channel 3 Transfer Complete clear */ +#define DMA_CHTIF3 ((uint32_t)0x00000400) /* Channel 3 Half Transfer clear */ +#define DMA_CTEIF3 ((uint32_t)0x00000800) /* Channel 3 Transfer Error clear */ +#define DMA_CGIF4 ((uint32_t)0x00001000) /* Channel 4 Global interrupt clear */ +#define DMA_CTCIF4 ((uint32_t)0x00002000) /* Channel 4 Transfer Complete clear */ +#define DMA_CHTIF4 ((uint32_t)0x00004000) /* Channel 4 Half Transfer clear */ +#define DMA_CTEIF4 ((uint32_t)0x00008000) /* Channel 4 Transfer Error clear */ +#define DMA_CGIF5 ((uint32_t)0x00010000) /* Channel 5 Global interrupt clear */ +#define DMA_CTCIF5 ((uint32_t)0x00020000) /* Channel 5 Transfer Complete clear */ +#define DMA_CHTIF5 ((uint32_t)0x00040000) /* Channel 5 Half Transfer clear */ +#define DMA_CTEIF5 ((uint32_t)0x00080000) /* Channel 5 Transfer Error clear */ +#define DMA_CGIF6 ((uint32_t)0x00100000) /* Channel 6 Global interrupt clear */ +#define DMA_CTCIF6 ((uint32_t)0x00200000) /* Channel 6 Transfer Complete clear */ +#define DMA_CHTIF6 ((uint32_t)0x00400000) /* Channel 6 Half Transfer clear */ +#define DMA_CTEIF6 ((uint32_t)0x00800000) /* Channel 6 Transfer Error clear */ +#define DMA_CGIF7 ((uint32_t)0x01000000) /* Channel 7 Global interrupt clear */ +#define DMA_CTCIF7 ((uint32_t)0x02000000) /* Channel 7 Transfer Complete clear */ +#define DMA_CHTIF7 ((uint32_t)0x04000000) /* Channel 7 Half Transfer clear */ +#define DMA_CTEIF7 ((uint32_t)0x08000000) /* Channel 7 Transfer Error clear */ + +/******************* Bit definition for DMA_CFGR1 register *******************/ +#define DMA_CFGR1_EN ((uint16_t)0x0001) /* Channel enable*/ +#define DMA_CFGR1_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFGR1_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFGR1_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFGR1_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFGR1_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFGR1_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFGR1_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFGR1_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFGR1_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFGR1_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFGR1_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFGR1_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFGR1_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFGR1_PL ((uint16_t)0x3000) /* PL[1:0] bits(Channel Priority level) */ +#define DMA_CFGR1_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFGR1_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFGR1_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode */ + +/******************* Bit definition for DMA_CFGR2 register *******************/ +#define DMA_CFGR2_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFGR2_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFGR2_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFGR2_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFGR2_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFGR2_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFGR2_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFGR2_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFGR2_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFGR2_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFGR2_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFGR2_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFGR2_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFGR2_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFGR2_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFGR2_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFGR2_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFGR2_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode */ + +/******************* Bit definition for DMA_CFGR3 register *******************/ +#define DMA_CFGR3_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFGR3_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFGR3_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFGR3_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFGR3_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFGR3_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFGR3_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFGR3_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFGR3_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFGR3_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFGR3_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFGR3_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFGR3_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFGR3_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFGR3_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFGR3_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFGR3_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFGR3_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode */ + +/******************* Bit definition for DMA_CFG4 register *******************/ +#define DMA_CFG4_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFG4_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFG4_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFG4_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFG4_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFG4_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFG4_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFG4_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFG4_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFG4_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFG4_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFG4_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFG4_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFG4_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFG4_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFG4_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFG4_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFG4_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode */ + +/****************** Bit definition for DMA_CFG5 register *******************/ +#define DMA_CFG5_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFG5_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFG5_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFG5_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFG5_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFG5_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFG5_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFG5_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFG5_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFG5_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFG5_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFG5_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFG5_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFG5_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFG5_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFG5_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFG5_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFG5_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode enable */ + +/******************* Bit definition for DMA_CFG6 register *******************/ +#define DMA_CFG6_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFG6_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFG6_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFG6_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFG6_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFG6_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFG6_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFG6_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFG6_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFG6_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFG6_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFG6_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFG6_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFG6_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFG6_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFG6_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFG6_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFG6_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode */ + +/******************* Bit definition for DMA_CFG7 register *******************/ +#define DMA_CFG7_EN ((uint16_t)0x0001) /* Channel enable */ +#define DMA_CFG7_TCIE ((uint16_t)0x0002) /* Transfer complete interrupt enable */ +#define DMA_CFG7_HTIE ((uint16_t)0x0004) /* Half Transfer interrupt enable */ +#define DMA_CFG7_TEIE ((uint16_t)0x0008) /* Transfer error interrupt enable */ +#define DMA_CFG7_DIR ((uint16_t)0x0010) /* Data transfer direction */ +#define DMA_CFG7_CIRC ((uint16_t)0x0020) /* Circular mode */ +#define DMA_CFG7_PINC ((uint16_t)0x0040) /* Peripheral increment mode */ +#define DMA_CFG7_MINC ((uint16_t)0x0080) /* Memory increment mode */ + +#define DMA_CFG7_PSIZE ((uint16_t)0x0300) /* PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CFG7_PSIZE_0 ((uint16_t)0x0100) /* Bit 0 */ +#define DMA_CFG7_PSIZE_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define DMA_CFG7_MSIZE ((uint16_t)0x0C00) /* MSIZE[1:0] bits (Memory size) */ +#define DMA_CFG7_MSIZE_0 ((uint16_t)0x0400) /* Bit 0 */ +#define DMA_CFG7_MSIZE_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define DMA_CFG7_PL ((uint16_t)0x3000) /* PL[1:0] bits (Channel Priority level) */ +#define DMA_CFG7_PL_0 ((uint16_t)0x1000) /* Bit 0 */ +#define DMA_CFG7_PL_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define DMA_CFG7_MEM2MEM ((uint16_t)0x4000) /* Memory to memory mode enable */ + +/****************** Bit definition for DMA_CNTR1 register ******************/ +#define DMA_CNTR1_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR2 register ******************/ +#define DMA_CNTR2_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR3 register ******************/ +#define DMA_CNTR3_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR4 register ******************/ +#define DMA_CNTR4_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR5 register ******************/ +#define DMA_CNTR5_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR6 register ******************/ +#define DMA_CNTR6_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_CNTR7 register ******************/ +#define DMA_CNTR7_NDT ((uint16_t)0xFFFF) /* Number of data to Transfer */ + +/****************** Bit definition for DMA_PADDR1 register *******************/ +#define DMA_PADDR1_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR2 register *******************/ +#define DMA_PADDR2_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR3 register *******************/ +#define DMA_PADDR3_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR4 register *******************/ +#define DMA_PADDR4_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR5 register *******************/ +#define DMA_PADDR5_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR6 register *******************/ +#define DMA_PADDR6_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_PADDR7 register *******************/ +#define DMA_PADDR7_PA ((uint32_t)0xFFFFFFFF) /* Peripheral Address */ + +/****************** Bit definition for DMA_MADDR1 register *******************/ +#define DMA_MADDR1_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR2 register *******************/ +#define DMA_MADDR2_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR3 register *******************/ +#define DMA_MADDR3_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR4 register *******************/ +#define DMA_MADDR4_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR5 register *******************/ +#define DMA_MADDR5_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR6 register *******************/ +#define DMA_MADDR6_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + +/****************** Bit definition for DMA_MADDR7 register *******************/ +#define DMA_MADDR7_MA ((uint32_t)0xFFFFFFFF) /* Memory Address */ + + +/******************************************************************************/ +/* External Interrupt/Event Controller */ +/******************************************************************************/ + +/******************* Bit definition for EXTI_INTENR register *******************/ +#define EXTI_INTENR_MR0 ((uint32_t)0x00000001) /* Interrupt Mask on line 0 */ +#define EXTI_INTENR_MR1 ((uint32_t)0x00000002) /* Interrupt Mask on line 1 */ +#define EXTI_INTENR_MR2 ((uint32_t)0x00000004) /* Interrupt Mask on line 2 */ +#define EXTI_INTENR_MR3 ((uint32_t)0x00000008) /* Interrupt Mask on line 3 */ +#define EXTI_INTENR_MR4 ((uint32_t)0x00000010) /* Interrupt Mask on line 4 */ +#define EXTI_INTENR_MR5 ((uint32_t)0x00000020) /* Interrupt Mask on line 5 */ +#define EXTI_INTENR_MR6 ((uint32_t)0x00000040) /* Interrupt Mask on line 6 */ +#define EXTI_INTENR_MR7 ((uint32_t)0x00000080) /* Interrupt Mask on line 7 */ +#define EXTI_INTENR_MR8 ((uint32_t)0x00000100) /* Interrupt Mask on line 8 */ +#define EXTI_INTENR_MR9 ((uint32_t)0x00000200) /* Interrupt Mask on line 9 */ +#define EXTI_INTENR_MR10 ((uint32_t)0x00000400) /* Interrupt Mask on line 10 */ +#define EXTI_INTENR_MR11 ((uint32_t)0x00000800) /* Interrupt Mask on line 11 */ +#define EXTI_INTENR_MR12 ((uint32_t)0x00001000) /* Interrupt Mask on line 12 */ +#define EXTI_INTENR_MR13 ((uint32_t)0x00002000) /* Interrupt Mask on line 13 */ +#define EXTI_INTENR_MR14 ((uint32_t)0x00004000) /* Interrupt Mask on line 14 */ +#define EXTI_INTENR_MR15 ((uint32_t)0x00008000) /* Interrupt Mask on line 15 */ +#define EXTI_INTENR_MR16 ((uint32_t)0x00010000) /* Interrupt Mask on line 16 */ +#define EXTI_INTENR_MR17 ((uint32_t)0x00020000) /* Interrupt Mask on line 17 */ +#define EXTI_INTENR_MR18 ((uint32_t)0x00040000) /* Interrupt Mask on line 18 */ +#define EXTI_INTENR_MR19 ((uint32_t)0x00080000) /* Interrupt Mask on line 19 */ + +/******************* Bit definition for EXTI_EVENR register *******************/ +#define EXTI_EVENR_MR0 ((uint32_t)0x00000001) /* Event Mask on line 0 */ +#define EXTI_EVENR_MR1 ((uint32_t)0x00000002) /* Event Mask on line 1 */ +#define EXTI_EVENR_MR2 ((uint32_t)0x00000004) /* Event Mask on line 2 */ +#define EXTI_EVENR_MR3 ((uint32_t)0x00000008) /* Event Mask on line 3 */ +#define EXTI_EVENR_MR4 ((uint32_t)0x00000010) /* Event Mask on line 4 */ +#define EXTI_EVENR_MR5 ((uint32_t)0x00000020) /* Event Mask on line 5 */ +#define EXTI_EVENR_MR6 ((uint32_t)0x00000040) /* Event Mask on line 6 */ +#define EXTI_EVENR_MR7 ((uint32_t)0x00000080) /* Event Mask on line 7 */ +#define EXTI_EVENR_MR8 ((uint32_t)0x00000100) /* Event Mask on line 8 */ +#define EXTI_EVENR_MR9 ((uint32_t)0x00000200) /* Event Mask on line 9 */ +#define EXTI_EVENR_MR10 ((uint32_t)0x00000400) /* Event Mask on line 10 */ +#define EXTI_EVENR_MR11 ((uint32_t)0x00000800) /* Event Mask on line 11 */ +#define EXTI_EVENR_MR12 ((uint32_t)0x00001000) /* Event Mask on line 12 */ +#define EXTI_EVENR_MR13 ((uint32_t)0x00002000) /* Event Mask on line 13 */ +#define EXTI_EVENR_MR14 ((uint32_t)0x00004000) /* Event Mask on line 14 */ +#define EXTI_EVENR_MR15 ((uint32_t)0x00008000) /* Event Mask on line 15 */ +#define EXTI_EVENR_MR16 ((uint32_t)0x00010000) /* Event Mask on line 16 */ +#define EXTI_EVENR_MR17 ((uint32_t)0x00020000) /* Event Mask on line 17 */ +#define EXTI_EVENR_MR18 ((uint32_t)0x00040000) /* Event Mask on line 18 */ +#define EXTI_EVENR_MR19 ((uint32_t)0x00080000) /* Event Mask on line 19 */ + +/****************** Bit definition for EXTI_RTENR register *******************/ +#define EXTI_RTENR_TR0 ((uint32_t)0x00000001) /* Rising trigger event configuration bit of line 0 */ +#define EXTI_RTENR_TR1 ((uint32_t)0x00000002) /* Rising trigger event configuration bit of line 1 */ +#define EXTI_RTENR_TR2 ((uint32_t)0x00000004) /* Rising trigger event configuration bit of line 2 */ +#define EXTI_RTENR_TR3 ((uint32_t)0x00000008) /* Rising trigger event configuration bit of line 3 */ +#define EXTI_RTENR_TR4 ((uint32_t)0x00000010) /* Rising trigger event configuration bit of line 4 */ +#define EXTI_RTENR_TR5 ((uint32_t)0x00000020) /* Rising trigger event configuration bit of line 5 */ +#define EXTI_RTENR_TR6 ((uint32_t)0x00000040) /* Rising trigger event configuration bit of line 6 */ +#define EXTI_RTENR_TR7 ((uint32_t)0x00000080) /* Rising trigger event configuration bit of line 7 */ +#define EXTI_RTENR_TR8 ((uint32_t)0x00000100) /* Rising trigger event configuration bit of line 8 */ +#define EXTI_RTENR_TR9 ((uint32_t)0x00000200) /* Rising trigger event configuration bit of line 9 */ +#define EXTI_RTENR_TR10 ((uint32_t)0x00000400) /* Rising trigger event configuration bit of line 10 */ +#define EXTI_RTENR_TR11 ((uint32_t)0x00000800) /* Rising trigger event configuration bit of line 11 */ +#define EXTI_RTENR_TR12 ((uint32_t)0x00001000) /* Rising trigger event configuration bit of line 12 */ +#define EXTI_RTENR_TR13 ((uint32_t)0x00002000) /* Rising trigger event configuration bit of line 13 */ +#define EXTI_RTENR_TR14 ((uint32_t)0x00004000) /* Rising trigger event configuration bit of line 14 */ +#define EXTI_RTENR_TR15 ((uint32_t)0x00008000) /* Rising trigger event configuration bit of line 15 */ +#define EXTI_RTENR_TR16 ((uint32_t)0x00010000) /* Rising trigger event configuration bit of line 16 */ +#define EXTI_RTENR_TR17 ((uint32_t)0x00020000) /* Rising trigger event configuration bit of line 17 */ +#define EXTI_RTENR_TR18 ((uint32_t)0x00040000) /* Rising trigger event configuration bit of line 18 */ +#define EXTI_RTENR_TR19 ((uint32_t)0x00080000) /* Rising trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_FTENR register *******************/ +#define EXTI_FTENR_TR0 ((uint32_t)0x00000001) /* Falling trigger event configuration bit of line 0 */ +#define EXTI_FTENR_TR1 ((uint32_t)0x00000002) /* Falling trigger event configuration bit of line 1 */ +#define EXTI_FTENR_TR2 ((uint32_t)0x00000004) /* Falling trigger event configuration bit of line 2 */ +#define EXTI_FTENR_TR3 ((uint32_t)0x00000008) /* Falling trigger event configuration bit of line 3 */ +#define EXTI_FTENR_TR4 ((uint32_t)0x00000010) /* Falling trigger event configuration bit of line 4 */ +#define EXTI_FTENR_TR5 ((uint32_t)0x00000020) /* Falling trigger event configuration bit of line 5 */ +#define EXTI_FTENR_TR6 ((uint32_t)0x00000040) /* Falling trigger event configuration bit of line 6 */ +#define EXTI_FTENR_TR7 ((uint32_t)0x00000080) /* Falling trigger event configuration bit of line 7 */ +#define EXTI_FTENR_TR8 ((uint32_t)0x00000100) /* Falling trigger event configuration bit of line 8 */ +#define EXTI_FTENR_TR9 ((uint32_t)0x00000200) /* Falling trigger event configuration bit of line 9 */ +#define EXTI_FTENR_TR10 ((uint32_t)0x00000400) /* Falling trigger event configuration bit of line 10 */ +#define EXTI_FTENR_TR11 ((uint32_t)0x00000800) /* Falling trigger event configuration bit of line 11 */ +#define EXTI_FTENR_TR12 ((uint32_t)0x00001000) /* Falling trigger event configuration bit of line 12 */ +#define EXTI_FTENR_TR13 ((uint32_t)0x00002000) /* Falling trigger event configuration bit of line 13 */ +#define EXTI_FTENR_TR14 ((uint32_t)0x00004000) /* Falling trigger event configuration bit of line 14 */ +#define EXTI_FTENR_TR15 ((uint32_t)0x00008000) /* Falling trigger event configuration bit of line 15 */ +#define EXTI_FTENR_TR16 ((uint32_t)0x00010000) /* Falling trigger event configuration bit of line 16 */ +#define EXTI_FTENR_TR17 ((uint32_t)0x00020000) /* Falling trigger event configuration bit of line 17 */ +#define EXTI_FTENR_TR18 ((uint32_t)0x00040000) /* Falling trigger event configuration bit of line 18 */ +#define EXTI_FTENR_TR19 ((uint32_t)0x00080000) /* Falling trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_SWIEVR register ******************/ +#define EXTI_SWIEVR_SWIEVR0 ((uint32_t)0x00000001) /* Software Interrupt on line 0 */ +#define EXTI_SWIEVR_SWIEVR1 ((uint32_t)0x00000002) /* Software Interrupt on line 1 */ +#define EXTI_SWIEVR_SWIEVR2 ((uint32_t)0x00000004) /* Software Interrupt on line 2 */ +#define EXTI_SWIEVR_SWIEVR3 ((uint32_t)0x00000008) /* Software Interrupt on line 3 */ +#define EXTI_SWIEVR_SWIEVR4 ((uint32_t)0x00000010) /* Software Interrupt on line 4 */ +#define EXTI_SWIEVR_SWIEVR5 ((uint32_t)0x00000020) /* Software Interrupt on line 5 */ +#define EXTI_SWIEVR_SWIEVR6 ((uint32_t)0x00000040) /* Software Interrupt on line 6 */ +#define EXTI_SWIEVR_SWIEVR7 ((uint32_t)0x00000080) /* Software Interrupt on line 7 */ +#define EXTI_SWIEVR_SWIEVR8 ((uint32_t)0x00000100) /* Software Interrupt on line 8 */ +#define EXTI_SWIEVR_SWIEVR9 ((uint32_t)0x00000200) /* Software Interrupt on line 9 */ +#define EXTI_SWIEVR_SWIEVR10 ((uint32_t)0x00000400) /* Software Interrupt on line 10 */ +#define EXTI_SWIEVR_SWIEVR11 ((uint32_t)0x00000800) /* Software Interrupt on line 11 */ +#define EXTI_SWIEVR_SWIEVR12 ((uint32_t)0x00001000) /* Software Interrupt on line 12 */ +#define EXTI_SWIEVR_SWIEVR13 ((uint32_t)0x00002000) /* Software Interrupt on line 13 */ +#define EXTI_SWIEVR_SWIEVR14 ((uint32_t)0x00004000) /* Software Interrupt on line 14 */ +#define EXTI_SWIEVR_SWIEVR15 ((uint32_t)0x00008000) /* Software Interrupt on line 15 */ +#define EXTI_SWIEVR_SWIEVR16 ((uint32_t)0x00010000) /* Software Interrupt on line 16 */ +#define EXTI_SWIEVR_SWIEVR17 ((uint32_t)0x00020000) /* Software Interrupt on line 17 */ +#define EXTI_SWIEVR_SWIEVR18 ((uint32_t)0x00040000) /* Software Interrupt on line 18 */ +#define EXTI_SWIEVR_SWIEVR19 ((uint32_t)0x00080000) /* Software Interrupt on line 19 */ + +/******************* Bit definition for EXTI_INTFR register ********************/ +#define EXTI_INTF_INTF0 ((uint32_t)0x00000001) /* Pending bit for line 0 */ +#define EXTI_INTF_INTF1 ((uint32_t)0x00000002) /* Pending bit for line 1 */ +#define EXTI_INTF_INTF2 ((uint32_t)0x00000004) /* Pending bit for line 2 */ +#define EXTI_INTF_INTF3 ((uint32_t)0x00000008) /* Pending bit for line 3 */ +#define EXTI_INTF_INTF4 ((uint32_t)0x00000010) /* Pending bit for line 4 */ +#define EXTI_INTF_INTF5 ((uint32_t)0x00000020) /* Pending bit for line 5 */ +#define EXTI_INTF_INTF6 ((uint32_t)0x00000040) /* Pending bit for line 6 */ +#define EXTI_INTF_INTF7 ((uint32_t)0x00000080) /* Pending bit for line 7 */ +#define EXTI_INTF_INTF8 ((uint32_t)0x00000100) /* Pending bit for line 8 */ +#define EXTI_INTF_INTF9 ((uint32_t)0x00000200) /* Pending bit for line 9 */ +#define EXTI_INTF_INTF10 ((uint32_t)0x00000400) /* Pending bit for line 10 */ +#define EXTI_INTF_INTF11 ((uint32_t)0x00000800) /* Pending bit for line 11 */ +#define EXTI_INTF_INTF12 ((uint32_t)0x00001000) /* Pending bit for line 12 */ +#define EXTI_INTF_INTF13 ((uint32_t)0x00002000) /* Pending bit for line 13 */ +#define EXTI_INTF_INTF14 ((uint32_t)0x00004000) /* Pending bit for line 14 */ +#define EXTI_INTF_INTF15 ((uint32_t)0x00008000) /* Pending bit for line 15 */ +#define EXTI_INTF_INTF16 ((uint32_t)0x00010000) /* Pending bit for line 16 */ +#define EXTI_INTF_INTF17 ((uint32_t)0x00020000) /* Pending bit for line 17 */ +#define EXTI_INTF_INTF18 ((uint32_t)0x00040000) /* Pending bit for line 18 */ +#define EXTI_INTF_INTF19 ((uint32_t)0x00080000) /* Pending bit for line 19 */ + +/******************************************************************************/ +/* FLASH and Option Bytes Registers */ +/******************************************************************************/ + + +/******************* Bit definition for FLASH_ACTLR register ******************/ +#define FLASH_ACTLR_LATENCY ((uint8_t)0x03) /* LATENCY[2:0] bits (Latency) */ +#define FLASH_ACTLR_LATENCY_0 ((uint8_t)0x00) /* Bit 0 */ +#define FLASH_ACTLR_LATENCY_1 ((uint8_t)0x01) /* Bit 0 */ +#define FLASH_ACTLR_LATENCY_2 ((uint8_t)0x02) /* Bit 1 */ + +#define FLASH_ACTLR_HLFCYA ((uint8_t)0x08) /* Flash Half Cycle Access Enable */ +#define FLASH_ACTLR_PRFTBE ((uint8_t)0x10) /* Prefetch Buffer Enable */ +#define FLASH_ACTLR_PRFTBS ((uint8_t)0x20) /* Prefetch Buffer Status */ + +/****************** Bit definition for FLASH_KEYR register ******************/ +#define FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) /* FPEC Key */ + +/***************** Bit definition for FLASH_OBKEYR register ****************/ +#define FLASH_OBKEYR_OBKEYR ((uint32_t)0xFFFFFFFF) /* Option Byte Key */ + +/****************** Bit definition for FLASH_STATR register *******************/ +#define FLASH_STATR_BSY ((uint8_t)0x01) /* Busy */ +#define FLASH_STATR_PGERR ((uint8_t)0x04) /* Programming Error */ +#define FLASH_STATR_WRPRTERR ((uint8_t)0x10) /* Write Protection Error */ +#define FLASH_STATR_EOP ((uint8_t)0x20) /* End of operation */ + +/******************* Bit definition for FLASH_CTLR register *******************/ +#define FLASH_CTLR_PG ((uint16_t)0x0001) /* Programming */ +#define FLASH_CTLR_PER ((uint16_t)0x0002) /* Page Erase */ +#define FLASH_CTLR_MER ((uint16_t)0x0004) /* Mass Erase */ +#define FLASH_CTLR_OPTPG ((uint16_t)0x0010) /* Option Byte Programming */ +#define FLASH_CTLR_OPTER ((uint16_t)0x0020) /* Option Byte Erase */ +#define FLASH_CTLR_STRT ((uint16_t)0x0040) /* Start */ +#define FLASH_CTLR_LOCK ((uint16_t)0x0080) /* Lock */ +#define FLASH_CTLR_OPTWRE ((uint16_t)0x0200) /* Option Bytes Write Enable */ +#define FLASH_CTLR_ERRIE ((uint16_t)0x0400) /* Error Interrupt Enable */ +#define FLASH_CTLR_EOPIE ((uint16_t)0x1000) /* End of operation interrupt enable */ +#define FLASH_CTLR_PAGE_PG ((uint16_t)0x00010000) /* Page Programming 128Byte */ +#define FLASH_CTLR_PAGE_ER ((uint16_t)0x00020000) /* Page Erase 128Byte */ +#define FLASH_CTLR_BUF_LOAD ((uint16_t)0x00040000) /* Buffer Load */ +#define FLASH_CTLR_BUF_RST ((uint16_t)0x00080000) /* Buffer Reset */ + +/******************* Bit definition for FLASH_ADDR register *******************/ +#define FLASH_ADDR_FAR ((uint32_t)0xFFFFFFFF) /* Flash Address */ + +/****************** Bit definition for FLASH_OBR register *******************/ +#define FLASH_OBR_OPTERR ((uint16_t)0x0001) /* Option Byte Error */ +#define FLASH_OBR_RDPRT ((uint16_t)0x0002) /* Read protection */ + +#define FLASH_OBR_USER ((uint16_t)0x03FC) /* User Option Bytes */ +#define FLASH_OBR_WDG_SW ((uint16_t)0x0004) /* WDG_SW */ +#define FLASH_OBR_nRST_STOP ((uint16_t)0x0008) /* nRST_STOP */ +#define FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) /* nRST_STDBY */ +#define FLASH_OBR_BFB2 ((uint16_t)0x0020) /* BFB2 */ + +/****************** Bit definition for FLASH_WPR register ******************/ +#define FLASH_WPR_WRP ((uint32_t)0xFFFFFFFF) /* Write Protect */ + +/****************** Bit definition for FLASH_RDPR register *******************/ +#define FLASH_RDPR_RDPR ((uint32_t)0x000000FF) /* Read protection option byte */ +#define FLASH_RDPR_nRDPR ((uint32_t)0x0000FF00) /* Read protection complemented option byte */ + +/****************** Bit definition for FLASH_USER register ******************/ +#define FLASH_USER_USER ((uint32_t)0x00FF0000) /* User option byte */ +#define FLASH_USER_nUSER ((uint32_t)0xFF000000) /* User complemented option byte */ + +/****************** Bit definition for FLASH_Data0 register *****************/ +#define FLASH_Data0_Data0 ((uint32_t)0x000000FF) /* User data storage option byte */ +#define FLASH_Data0_nData0 ((uint32_t)0x0000FF00) /* User data storage complemented option byte */ + +/****************** Bit definition for FLASH_Data1 register *****************/ +#define FLASH_Data1_Data1 ((uint32_t)0x00FF0000) /* User data storage option byte */ +#define FLASH_Data1_nData1 ((uint32_t)0xFF000000) /* User data storage complemented option byte */ + +/****************** Bit definition for FLASH_WRPR0 register ******************/ +#define FLASH_WRPR0_WRPR0 ((uint32_t)0x000000FF) /* Flash memory write protection option bytes */ +#define FLASH_WRPR0_nWRPR0 ((uint32_t)0x0000FF00) /* Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRPR1 register ******************/ +#define FLASH_WRPR1_WRPR1 ((uint32_t)0x00FF0000) /* Flash memory write protection option bytes */ +#define FLASH_WRPR1_nWRPR1 ((uint32_t)0xFF000000) /* Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRPR2 register ******************/ +#define FLASH_WRPR2_WRPR2 ((uint32_t)0x000000FF) /* Flash memory write protection option bytes */ +#define FLASH_WRPR2_nWRPR2 ((uint32_t)0x0000FF00) /* Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRPR3 register ******************/ +#define FLASH_WRPR3_WRPR3 ((uint32_t)0x00FF0000) /* Flash memory write protection option bytes */ +#define FLASH_WRPR3_nWRPR3 ((uint32_t)0xFF000000) /* Flash memory write protection complemented option bytes */ + +/******************************************************************************/ +/* General Purpose and Alternate Function I/O */ +/******************************************************************************/ + +/******************* Bit definition for GPIO_CFGLR register *******************/ +#define GPIO_CFGLR_MODE ((uint32_t)0x33333333) /* Port x mode bits */ + +#define GPIO_CFGLR_MODE0 ((uint32_t)0x00000003) /* MODE0[1:0] bits (Port x mode bits, pin 0) */ +#define GPIO_CFGLR_MODE0_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define GPIO_CFGLR_MODE0_1 ((uint32_t)0x00000002) /* Bit 1 */ + +#define GPIO_CFGLR_MODE1 ((uint32_t)0x00000030) /* MODE1[1:0] bits (Port x mode bits, pin 1) */ +#define GPIO_CFGLR_MODE1_0 ((uint32_t)0x00000010) /* Bit 0 */ +#define GPIO_CFGLR_MODE1_1 ((uint32_t)0x00000020) /* Bit 1 */ + +#define GPIO_CFGLR_MODE2 ((uint32_t)0x00000300) /* MODE2[1:0] bits (Port x mode bits, pin 2) */ +#define GPIO_CFGLR_MODE2_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define GPIO_CFGLR_MODE2_1 ((uint32_t)0x00000200) /* Bit 1 */ + +#define GPIO_CFGLR_MODE3 ((uint32_t)0x00003000) /* MODE3[1:0] bits (Port x mode bits, pin 3) */ +#define GPIO_CFGLR_MODE3_0 ((uint32_t)0x00001000) /* Bit 0 */ +#define GPIO_CFGLR_MODE3_1 ((uint32_t)0x00002000) /* Bit 1 */ + +#define GPIO_CFGLR_MODE4 ((uint32_t)0x00030000) /* MODE4[1:0] bits (Port x mode bits, pin 4) */ +#define GPIO_CFGLR_MODE4_0 ((uint32_t)0x00010000) /* Bit 0 */ +#define GPIO_CFGLR_MODE4_1 ((uint32_t)0x00020000) /* Bit 1 */ + +#define GPIO_CFGLR_MODE5 ((uint32_t)0x00300000) /* MODE5[1:0] bits (Port x mode bits, pin 5) */ +#define GPIO_CFGLR_MODE5_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define GPIO_CFGLR_MODE5_1 ((uint32_t)0x00200000) /* Bit 1 */ + +#define GPIO_CFGLR_MODE6 ((uint32_t)0x03000000) /* MODE6[1:0] bits (Port x mode bits, pin 6) */ +#define GPIO_CFGLR_MODE6_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define GPIO_CFGLR_MODE6_1 ((uint32_t)0x02000000) /* Bit 1 */ + +#define GPIO_CFGLR_MODE7 ((uint32_t)0x30000000) /* MODE7[1:0] bits (Port x mode bits, pin 7) */ +#define GPIO_CFGLR_MODE7_0 ((uint32_t)0x10000000) /* Bit 0 */ +#define GPIO_CFGLR_MODE7_1 ((uint32_t)0x20000000) /* Bit 1 */ + +#define GPIO_CFGLR_CNF ((uint32_t)0xCCCCCCCC) /* Port x configuration bits */ + +#define GPIO_CFGLR_CNF0 ((uint32_t)0x0000000C) /* CNF0[1:0] bits (Port x configuration bits, pin 0) */ +#define GPIO_CFGLR_CNF0_0 ((uint32_t)0x00000004) /* Bit 0 */ +#define GPIO_CFGLR_CNF0_1 ((uint32_t)0x00000008) /* Bit 1 */ + +#define GPIO_CFGLR_CNF1 ((uint32_t)0x000000C0) /* CNF1[1:0] bits (Port x configuration bits, pin 1) */ +#define GPIO_CFGLR_CNF1_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define GPIO_CFGLR_CNF1_1 ((uint32_t)0x00000080) /* Bit 1 */ + +#define GPIO_CFGLR_CNF2 ((uint32_t)0x00000C00) /* CNF2[1:0] bits (Port x configuration bits, pin 2) */ +#define GPIO_CFGLR_CNF2_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define GPIO_CFGLR_CNF2_1 ((uint32_t)0x00000800) /* Bit 1 */ + +#define GPIO_CFGLR_CNF3 ((uint32_t)0x0000C000) /* CNF3[1:0] bits (Port x configuration bits, pin 3) */ +#define GPIO_CFGLR_CNF3_0 ((uint32_t)0x00004000) /* Bit 0 */ +#define GPIO_CFGLR_CNF3_1 ((uint32_t)0x00008000) /* Bit 1 */ + +#define GPIO_CFGLR_CNF4 ((uint32_t)0x000C0000) /* CNF4[1:0] bits (Port x configuration bits, pin 4) */ +#define GPIO_CFGLR_CNF4_0 ((uint32_t)0x00040000) /* Bit 0 */ +#define GPIO_CFGLR_CNF4_1 ((uint32_t)0x00080000) /* Bit 1 */ + +#define GPIO_CFGLR_CNF5 ((uint32_t)0x00C00000) /* CNF5[1:0] bits (Port x configuration bits, pin 5) */ +#define GPIO_CFGLR_CNF5_0 ((uint32_t)0x00400000) /* Bit 0 */ +#define GPIO_CFGLR_CNF5_1 ((uint32_t)0x00800000) /* Bit 1 */ + +#define GPIO_CFGLR_CNF6 ((uint32_t)0x0C000000) /* CNF6[1:0] bits (Port x configuration bits, pin 6) */ +#define GPIO_CFGLR_CNF6_0 ((uint32_t)0x04000000) /* Bit 0 */ +#define GPIO_CFGLR_CNF6_1 ((uint32_t)0x08000000) /* Bit 1 */ + +#define GPIO_CFGLR_CNF7 ((uint32_t)0xC0000000) /* CNF7[1:0] bits (Port x configuration bits, pin 7) */ +#define GPIO_CFGLR_CNF7_0 ((uint32_t)0x40000000) /* Bit 0 */ +#define GPIO_CFGLR_CNF7_1 ((uint32_t)0x80000000) /* Bit 1 */ + +/******************* Bit definition for GPIO_CFGHR register *******************/ +#define GPIO_CFGHR_MODE ((uint32_t)0x33333333) /* Port x mode bits */ + +#define GPIO_CFGHR_MODE8 ((uint32_t)0x00000003) /* MODE8[1:0] bits (Port x mode bits, pin 8) */ +#define GPIO_CFGHR_MODE8_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define GPIO_CFGHR_MODE8_1 ((uint32_t)0x00000002) /* Bit 1 */ + +#define GPIO_CFGHR_MODE9 ((uint32_t)0x00000030) /* MODE9[1:0] bits (Port x mode bits, pin 9) */ +#define GPIO_CFGHR_MODE9_0 ((uint32_t)0x00000010) /* Bit 0 */ +#define GPIO_CFGHR_MODE9_1 ((uint32_t)0x00000020) /* Bit 1 */ + +#define GPIO_CFGHR_MODE10 ((uint32_t)0x00000300) /* MODE10[1:0] bits (Port x mode bits, pin 10) */ +#define GPIO_CFGHR_MODE10_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define GPIO_CFGHR_MODE10_1 ((uint32_t)0x00000200) /* Bit 1 */ + +#define GPIO_CFGHR_MODE11 ((uint32_t)0x00003000) /* MODE11[1:0] bits (Port x mode bits, pin 11) */ +#define GPIO_CFGHR_MODE11_0 ((uint32_t)0x00001000) /* Bit 0 */ +#define GPIO_CFGHR_MODE11_1 ((uint32_t)0x00002000) /* Bit 1 */ + +#define GPIO_CFGHR_MODE12 ((uint32_t)0x00030000) /* MODE12[1:0] bits (Port x mode bits, pin 12) */ +#define GPIO_CFGHR_MODE12_0 ((uint32_t)0x00010000) /* Bit 0 */ +#define GPIO_CFGHR_MODE12_1 ((uint32_t)0x00020000) /* Bit 1 */ + +#define GPIO_CFGHR_MODE13 ((uint32_t)0x00300000) /* MODE13[1:0] bits (Port x mode bits, pin 13) */ +#define GPIO_CFGHR_MODE13_0 ((uint32_t)0x00100000) /* Bit 0 */ +#define GPIO_CFGHR_MODE13_1 ((uint32_t)0x00200000) /* Bit 1 */ + +#define GPIO_CFGHR_MODE14 ((uint32_t)0x03000000) /* MODE14[1:0] bits (Port x mode bits, pin 14) */ +#define GPIO_CFGHR_MODE14_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define GPIO_CFGHR_MODE14_1 ((uint32_t)0x02000000) /* Bit 1 */ + +#define GPIO_CFGHR_MODE15 ((uint32_t)0x30000000) /* MODE15[1:0] bits (Port x mode bits, pin 15) */ +#define GPIO_CFGHR_MODE15_0 ((uint32_t)0x10000000) /* Bit 0 */ +#define GPIO_CFGHR_MODE15_1 ((uint32_t)0x20000000) /* Bit 1 */ + +#define GPIO_CFGHR_CNF ((uint32_t)0xCCCCCCCC) /* Port x configuration bits */ + +#define GPIO_CFGHR_CNF8 ((uint32_t)0x0000000C) /* CNF8[1:0] bits (Port x configuration bits, pin 8) */ +#define GPIO_CFGHR_CNF8_0 ((uint32_t)0x00000004) /* Bit 0 */ +#define GPIO_CFGHR_CNF8_1 ((uint32_t)0x00000008) /* Bit 1 */ + +#define GPIO_CFGHR_CNF9 ((uint32_t)0x000000C0) /* CNF9[1:0] bits (Port x configuration bits, pin 9) */ +#define GPIO_CFGHR_CNF9_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define GPIO_CFGHR_CNF9_1 ((uint32_t)0x00000080) /* Bit 1 */ + +#define GPIO_CFGHR_CNF10 ((uint32_t)0x00000C00) /* CNF10[1:0] bits (Port x configuration bits, pin 10) */ +#define GPIO_CFGHR_CNF10_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define GPIO_CFGHR_CNF10_1 ((uint32_t)0x00000800) /* Bit 1 */ + +#define GPIO_CFGHR_CNF11 ((uint32_t)0x0000C000) /* CNF11[1:0] bits (Port x configuration bits, pin 11) */ +#define GPIO_CFGHR_CNF11_0 ((uint32_t)0x00004000) /* Bit 0 */ +#define GPIO_CFGHR_CNF11_1 ((uint32_t)0x00008000) /* Bit 1 */ + +#define GPIO_CFGHR_CNF12 ((uint32_t)0x000C0000) /* CNF12[1:0] bits (Port x configuration bits, pin 12) */ +#define GPIO_CFGHR_CNF12_0 ((uint32_t)0x00040000) /* Bit 0 */ +#define GPIO_CFGHR_CNF12_1 ((uint32_t)0x00080000) /* Bit 1 */ + +#define GPIO_CFGHR_CNF13 ((uint32_t)0x00C00000) /* CNF13[1:0] bits (Port x configuration bits, pin 13) */ +#define GPIO_CFGHR_CNF13_0 ((uint32_t)0x00400000) /* Bit 0 */ +#define GPIO_CFGHR_CNF13_1 ((uint32_t)0x00800000) /* Bit 1 */ + +#define GPIO_CFGHR_CNF14 ((uint32_t)0x0C000000) /* CNF14[1:0] bits (Port x configuration bits, pin 14) */ +#define GPIO_CFGHR_CNF14_0 ((uint32_t)0x04000000) /* Bit 0 */ +#define GPIO_CFGHR_CNF14_1 ((uint32_t)0x08000000) /* Bit 1 */ + +#define GPIO_CFGHR_CNF15 ((uint32_t)0xC0000000) /* CNF15[1:0] bits (Port x configuration bits, pin 15) */ +#define GPIO_CFGHR_CNF15_0 ((uint32_t)0x40000000) /* Bit 0 */ +#define GPIO_CFGHR_CNF15_1 ((uint32_t)0x80000000) /* Bit 1 */ + +/******************* Bit definition for GPIO_INDR register *******************/ +#define GPIO_INDR_IDR0 ((uint16_t)0x0001) /* Port input data, bit 0 */ +#define GPIO_INDR_IDR1 ((uint16_t)0x0002) /* Port input data, bit 1 */ +#define GPIO_INDR_IDR2 ((uint16_t)0x0004) /* Port input data, bit 2 */ +#define GPIO_INDR_IDR3 ((uint16_t)0x0008) /* Port input data, bit 3 */ +#define GPIO_INDR_IDR4 ((uint16_t)0x0010) /* Port input data, bit 4 */ +#define GPIO_INDR_IDR5 ((uint16_t)0x0020) /* Port input data, bit 5 */ +#define GPIO_INDR_IDR6 ((uint16_t)0x0040) /* Port input data, bit 6 */ +#define GPIO_INDR_IDR7 ((uint16_t)0x0080) /* Port input data, bit 7 */ +#define GPIO_INDR_IDR8 ((uint16_t)0x0100) /* Port input data, bit 8 */ +#define GPIO_INDR_IDR9 ((uint16_t)0x0200) /* Port input data, bit 9 */ +#define GPIO_INDR_IDR10 ((uint16_t)0x0400) /* Port input data, bit 10 */ +#define GPIO_INDR_IDR11 ((uint16_t)0x0800) /* Port input data, bit 11 */ +#define GPIO_INDR_IDR12 ((uint16_t)0x1000) /* Port input data, bit 12 */ +#define GPIO_INDR_IDR13 ((uint16_t)0x2000) /* Port input data, bit 13 */ +#define GPIO_INDR_IDR14 ((uint16_t)0x4000) /* Port input data, bit 14 */ +#define GPIO_INDR_IDR15 ((uint16_t)0x8000) /* Port input data, bit 15 */ + +/******************* Bit definition for GPIO_OUTDR register *******************/ +#define GPIO_OUTDR_ODR0 ((uint16_t)0x0001) /* Port output data, bit 0 */ +#define GPIO_OUTDR_ODR1 ((uint16_t)0x0002) /* Port output data, bit 1 */ +#define GPIO_OUTDR_ODR2 ((uint16_t)0x0004) /* Port output data, bit 2 */ +#define GPIO_OUTDR_ODR3 ((uint16_t)0x0008) /* Port output data, bit 3 */ +#define GPIO_OUTDR_ODR4 ((uint16_t)0x0010) /* Port output data, bit 4 */ +#define GPIO_OUTDR_ODR5 ((uint16_t)0x0020) /* Port output data, bit 5 */ +#define GPIO_OUTDR_ODR6 ((uint16_t)0x0040) /* Port output data, bit 6 */ +#define GPIO_OUTDR_ODR7 ((uint16_t)0x0080) /* Port output data, bit 7 */ +#define GPIO_OUTDR_ODR8 ((uint16_t)0x0100) /* Port output data, bit 8 */ +#define GPIO_OUTDR_ODR9 ((uint16_t)0x0200) /* Port output data, bit 9 */ +#define GPIO_OUTDR_ODR10 ((uint16_t)0x0400) /* Port output data, bit 10 */ +#define GPIO_OUTDR_ODR11 ((uint16_t)0x0800) /* Port output data, bit 11 */ +#define GPIO_OUTDR_ODR12 ((uint16_t)0x1000) /* Port output data, bit 12 */ +#define GPIO_OUTDR_ODR13 ((uint16_t)0x2000) /* Port output data, bit 13 */ +#define GPIO_OUTDR_ODR14 ((uint16_t)0x4000) /* Port output data, bit 14 */ +#define GPIO_OUTDR_ODR15 ((uint16_t)0x8000) /* Port output data, bit 15 */ + +/****************** Bit definition for GPIO_BSHR register *******************/ +#define GPIO_BSHR_BS0 ((uint32_t)0x00000001) /* Port x Set bit 0 */ +#define GPIO_BSHR_BS1 ((uint32_t)0x00000002) /* Port x Set bit 1 */ +#define GPIO_BSHR_BS2 ((uint32_t)0x00000004) /* Port x Set bit 2 */ +#define GPIO_BSHR_BS3 ((uint32_t)0x00000008) /* Port x Set bit 3 */ +#define GPIO_BSHR_BS4 ((uint32_t)0x00000010) /* Port x Set bit 4 */ +#define GPIO_BSHR_BS5 ((uint32_t)0x00000020) /* Port x Set bit 5 */ +#define GPIO_BSHR_BS6 ((uint32_t)0x00000040) /* Port x Set bit 6 */ +#define GPIO_BSHR_BS7 ((uint32_t)0x00000080) /* Port x Set bit 7 */ +#define GPIO_BSHR_BS8 ((uint32_t)0x00000100) /* Port x Set bit 8 */ +#define GPIO_BSHR_BS9 ((uint32_t)0x00000200) /* Port x Set bit 9 */ +#define GPIO_BSHR_BS10 ((uint32_t)0x00000400) /* Port x Set bit 10 */ +#define GPIO_BSHR_BS11 ((uint32_t)0x00000800) /* Port x Set bit 11 */ +#define GPIO_BSHR_BS12 ((uint32_t)0x00001000) /* Port x Set bit 12 */ +#define GPIO_BSHR_BS13 ((uint32_t)0x00002000) /* Port x Set bit 13 */ +#define GPIO_BSHR_BS14 ((uint32_t)0x00004000) /* Port x Set bit 14 */ +#define GPIO_BSHR_BS15 ((uint32_t)0x00008000) /* Port x Set bit 15 */ + +#define GPIO_BSHR_BR0 ((uint32_t)0x00010000) /* Port x Reset bit 0 */ +#define GPIO_BSHR_BR1 ((uint32_t)0x00020000) /* Port x Reset bit 1 */ +#define GPIO_BSHR_BR2 ((uint32_t)0x00040000) /* Port x Reset bit 2 */ +#define GPIO_BSHR_BR3 ((uint32_t)0x00080000) /* Port x Reset bit 3 */ +#define GPIO_BSHR_BR4 ((uint32_t)0x00100000) /* Port x Reset bit 4 */ +#define GPIO_BSHR_BR5 ((uint32_t)0x00200000) /* Port x Reset bit 5 */ +#define GPIO_BSHR_BR6 ((uint32_t)0x00400000) /* Port x Reset bit 6 */ +#define GPIO_BSHR_BR7 ((uint32_t)0x00800000) /* Port x Reset bit 7 */ +#define GPIO_BSHR_BR8 ((uint32_t)0x01000000) /* Port x Reset bit 8 */ +#define GPIO_BSHR_BR9 ((uint32_t)0x02000000) /* Port x Reset bit 9 */ +#define GPIO_BSHR_BR10 ((uint32_t)0x04000000) /* Port x Reset bit 10 */ +#define GPIO_BSHR_BR11 ((uint32_t)0x08000000) /* Port x Reset bit 11 */ +#define GPIO_BSHR_BR12 ((uint32_t)0x10000000) /* Port x Reset bit 12 */ +#define GPIO_BSHR_BR13 ((uint32_t)0x20000000) /* Port x Reset bit 13 */ +#define GPIO_BSHR_BR14 ((uint32_t)0x40000000) /* Port x Reset bit 14 */ +#define GPIO_BSHR_BR15 ((uint32_t)0x80000000) /* Port x Reset bit 15 */ + +/******************* Bit definition for GPIO_BCR register *******************/ +#define GPIO_BCR_BR0 ((uint16_t)0x0001) /* Port x Reset bit 0 */ +#define GPIO_BCR_BR1 ((uint16_t)0x0002) /* Port x Reset bit 1 */ +#define GPIO_BCR_BR2 ((uint16_t)0x0004) /* Port x Reset bit 2 */ +#define GPIO_BCR_BR3 ((uint16_t)0x0008) /* Port x Reset bit 3 */ +#define GPIO_BCR_BR4 ((uint16_t)0x0010) /* Port x Reset bit 4 */ +#define GPIO_BCR_BR5 ((uint16_t)0x0020) /* Port x Reset bit 5 */ +#define GPIO_BCR_BR6 ((uint16_t)0x0040) /* Port x Reset bit 6 */ +#define GPIO_BCR_BR7 ((uint16_t)0x0080) /* Port x Reset bit 7 */ +#define GPIO_BCR_BR8 ((uint16_t)0x0100) /* Port x Reset bit 8 */ +#define GPIO_BCR_BR9 ((uint16_t)0x0200) /* Port x Reset bit 9 */ +#define GPIO_BCR_BR10 ((uint16_t)0x0400) /* Port x Reset bit 10 */ +#define GPIO_BCR_BR11 ((uint16_t)0x0800) /* Port x Reset bit 11 */ +#define GPIO_BCR_BR12 ((uint16_t)0x1000) /* Port x Reset bit 12 */ +#define GPIO_BCR_BR13 ((uint16_t)0x2000) /* Port x Reset bit 13 */ +#define GPIO_BCR_BR14 ((uint16_t)0x4000) /* Port x Reset bit 14 */ +#define GPIO_BCR_BR15 ((uint16_t)0x8000) /* Port x Reset bit 15 */ + +/****************** Bit definition for GPIO_LCKR register *******************/ +#define GPIO_LCK0 ((uint32_t)0x00000001) /* Port x Lock bit 0 */ +#define GPIO_LCK1 ((uint32_t)0x00000002) /* Port x Lock bit 1 */ +#define GPIO_LCK2 ((uint32_t)0x00000004) /* Port x Lock bit 2 */ +#define GPIO_LCK3 ((uint32_t)0x00000008) /* Port x Lock bit 3 */ +#define GPIO_LCK4 ((uint32_t)0x00000010) /* Port x Lock bit 4 */ +#define GPIO_LCK5 ((uint32_t)0x00000020) /* Port x Lock bit 5 */ +#define GPIO_LCK6 ((uint32_t)0x00000040) /* Port x Lock bit 6 */ +#define GPIO_LCK7 ((uint32_t)0x00000080) /* Port x Lock bit 7 */ +#define GPIO_LCK8 ((uint32_t)0x00000100) /* Port x Lock bit 8 */ +#define GPIO_LCK9 ((uint32_t)0x00000200) /* Port x Lock bit 9 */ +#define GPIO_LCK10 ((uint32_t)0x00000400) /* Port x Lock bit 10 */ +#define GPIO_LCK11 ((uint32_t)0x00000800) /* Port x Lock bit 11 */ +#define GPIO_LCK12 ((uint32_t)0x00001000) /* Port x Lock bit 12 */ +#define GPIO_LCK13 ((uint32_t)0x00002000) /* Port x Lock bit 13 */ +#define GPIO_LCK14 ((uint32_t)0x00004000) /* Port x Lock bit 14 */ +#define GPIO_LCK15 ((uint32_t)0x00008000) /* Port x Lock bit 15 */ +#define GPIO_LCKK ((uint32_t)0x00010000) /* Lock key */ + + +/****************** Bit definition for AFIO_ECR register *******************/ +#define AFIO_ECR_PIN ((uint8_t)0x0F) /* PIN[3:0] bits (Pin selection) */ +#define AFIO_ECR_PIN_0 ((uint8_t)0x01) /* Bit 0 */ +#define AFIO_ECR_PIN_1 ((uint8_t)0x02) /* Bit 1 */ +#define AFIO_ECR_PIN_2 ((uint8_t)0x04) /* Bit 2 */ +#define AFIO_ECR_PIN_3 ((uint8_t)0x08) /* Bit 3 */ + +#define AFIO_ECR_PIN_PX0 ((uint8_t)0x00) /* Pin 0 selected */ +#define AFIO_ECR_PIN_PX1 ((uint8_t)0x01) /* Pin 1 selected */ +#define AFIO_ECR_PIN_PX2 ((uint8_t)0x02) /* Pin 2 selected */ +#define AFIO_ECR_PIN_PX3 ((uint8_t)0x03) /* Pin 3 selected */ +#define AFIO_ECR_PIN_PX4 ((uint8_t)0x04) /* Pin 4 selected */ +#define AFIO_ECR_PIN_PX5 ((uint8_t)0x05) /* Pin 5 selected */ +#define AFIO_ECR_PIN_PX6 ((uint8_t)0x06) /* Pin 6 selected */ +#define AFIO_ECR_PIN_PX7 ((uint8_t)0x07) /* Pin 7 selected */ +#define AFIO_ECR_PIN_PX8 ((uint8_t)0x08) /* Pin 8 selected */ +#define AFIO_ECR_PIN_PX9 ((uint8_t)0x09) /* Pin 9 selected */ +#define AFIO_ECR_PIN_PX10 ((uint8_t)0x0A) /* Pin 10 selected */ +#define AFIO_ECR_PIN_PX11 ((uint8_t)0x0B) /* Pin 11 selected */ +#define AFIO_ECR_PIN_PX12 ((uint8_t)0x0C) /* Pin 12 selected */ +#define AFIO_ECR_PIN_PX13 ((uint8_t)0x0D) /* Pin 13 selected */ +#define AFIO_ECR_PIN_PX14 ((uint8_t)0x0E) /* Pin 14 selected */ +#define AFIO_ECR_PIN_PX15 ((uint8_t)0x0F) /* Pin 15 selected */ + +#define AFIO_ECR_PORT ((uint8_t)0x70) /* PORT[2:0] bits (Port selection) */ +#define AFIO_ECR_PORT_0 ((uint8_t)0x10) /* Bit 0 */ +#define AFIO_ECR_PORT_1 ((uint8_t)0x20) /* Bit 1 */ +#define AFIO_ECR_PORT_2 ((uint8_t)0x40) /* Bit 2 */ + +#define AFIO_ECR_PORT_PA ((uint8_t)0x00) /* Port A selected */ +#define AFIO_ECR_PORT_PB ((uint8_t)0x10) /* Port B selected */ +#define AFIO_ECR_PORT_PC ((uint8_t)0x20) /* Port C selected */ +#define AFIO_ECR_PORT_PD ((uint8_t)0x30) /* Port D selected */ +#define AFIO_ECR_PORT_PE ((uint8_t)0x40) /* Port E selected */ + +#define AFIO_ECR_EVOE ((uint8_t)0x80) /* Event Output Enable */ + +/****************** Bit definition for AFIO_PCFR1register *******************/ +#define AFIO_PCFR1_SPI1_REMAP ((uint32_t)0x00000001) /* SPI1 remapping */ +#define AFIO_PCFR1_I2C1_REMAP ((uint32_t)0x00000002) /* I2C1 remapping */ +#define AFIO_PCFR1_USART1_REMAP ((uint32_t)0x00000004) /* USART1 remapping */ +#define AFIO_PCFR1_USART2_REMAP ((uint32_t)0x00000008) /* USART2 remapping */ + +#define AFIO_PCFR1_USART3_REMAP ((uint32_t)0x00000030) /* USART3_REMAP[1:0] bits (USART3 remapping) */ +#define AFIO_PCFR1_USART3_REMAP_0 ((uint32_t)0x00000010) /* Bit 0 */ +#define AFIO_PCFR1_USART3_REMAP_1 ((uint32_t)0x00000020) /* Bit 1 */ + +#define AFIO_PCFR1_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) /* No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */ +#define AFIO_PCFR1_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) /* Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */ +#define AFIO_PCFR1_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) /* Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */ + +#define AFIO_PCFR1_TIM1_REMAP ((uint32_t)0x000000C0) /* TIM1_REMAP[1:0] bits (TIM1 remapping) */ +#define AFIO_PCFR1_TIM1_REMAP_0 ((uint32_t)0x00000040) /* Bit 0 */ +#define AFIO_PCFR1_TIM1_REMAP_1 ((uint32_t)0x00000080) /* Bit 1 */ + +#define AFIO_PCFR1_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) /* No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15) */ +#define AFIO_PCFR1_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) /* Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1) */ +#define AFIO_PCFR1_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) /* Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12) */ + +#define AFIO_PCFR1_TIM2_REMAP ((uint32_t)0x00000300) /* TIM2_REMAP[1:0] bits (TIM2 remapping) */ +#define AFIO_PCFR1_TIM2_REMAP_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define AFIO_PCFR1_TIM2_REMAP_1 ((uint32_t)0x00000200) /* Bit 1 */ + +#define AFIO_PCFR1_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) /* No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3) */ +#define AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) /* Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3) */ +#define AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) /* Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11) */ +#define AFIO_PCFR1_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) /* Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11) */ + +#define AFIO_PCFR1_TIM3_REMAP ((uint32_t)0x00000C00) /* TIM3_REMAP[1:0] bits (TIM3 remapping) */ +#define AFIO_PCFR1_TIM3_REMAP_0 ((uint32_t)0x00000400) /* Bit 0 */ +#define AFIO_PCFR1_TIM3_REMAP_1 ((uint32_t)0x00000800) /* Bit 1 */ + +#define AFIO_PCFR1_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) /* No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */ +#define AFIO_PCFR1_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) /* Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */ +#define AFIO_PCFR1_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) /* Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ + +#define AFIO_PCFR1_TIM4_REMAP ((uint32_t)0x00001000) /* TIM4_REMAP bit (TIM4 remapping) */ + +#define AFIO_PCFR1_CAN_REMAP ((uint32_t)0x00006000) /* CAN_REMAP[1:0] bits (CAN Alternate function remapping) */ +#define AFIO_PCFR1_CAN_REMAP_0 ((uint32_t)0x00002000) /* Bit 0 */ +#define AFIO_PCFR1_CAN_REMAP_1 ((uint32_t)0x00004000) /* Bit 1 */ + +#define AFIO_PCFR1_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) /* CANRX mapped to PA11, CANTX mapped to PA12 */ +#define AFIO_PCFR1_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) /* CANRX mapped to PB8, CANTX mapped to PB9 */ +#define AFIO_PCFR1_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) /* CANRX mapped to PD0, CANTX mapped to PD1 */ + +#define AFIO_PCFR1_PD01_REMAP ((uint32_t)0x00008000) /* Port D0/Port D1 mapping on OSC_IN/OSC_OUT */ +#define AFIO_PCFR1_TIM5CH4_IREMAP ((uint32_t)0x00010000) /* TIM5 Channel4 Internal Remap */ +#define AFIO_PCFR1_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) /* ADC 1 External Trigger Injected Conversion remapping */ +#define AFIO_PCFR1_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) /* ADC 1 External Trigger Regular Conversion remapping */ +#define AFIO_PCFR1_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) /* ADC 2 External Trigger Injected Conversion remapping */ +#define AFIO_PCFR1_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) /* ADC 2 External Trigger Regular Conversion remapping */ + +#define AFIO_PCFR1_SWJ_CFG ((uint32_t)0x07000000) /* SWJ_CFG[2:0] bits (Serial Wire JTAG configuration) */ +#define AFIO_PCFR1_SWJ_CFG_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define AFIO_PCFR1_SWJ_CFG_1 ((uint32_t)0x02000000) /* Bit 1 */ +#define AFIO_PCFR1_SWJ_CFG_2 ((uint32_t)0x04000000) /* Bit 2 */ + +#define AFIO_PCFR1_SWJ_CFG_RESET ((uint32_t)0x00000000) /* Full SWJ (JTAG-DP + SW-DP) : Reset State */ +#define AFIO_PCFR1_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) /* Full SWJ (JTAG-DP + SW-DP) but without JNTRST */ +#define AFIO_PCFR1_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /* JTAG-DP Disabled and SW-DP Enabled */ +#define AFIO_PCFR1_SWJ_CFG_DISABLE ((uint32_t)0x04000000) /* JTAG-DP Disabled and SW-DP Disabled */ + +/***************** Bit definition for AFIO_EXTICR1 register *****************/ +#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) /* EXTI 0 configuration */ +#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) /* EXTI 1 configuration */ +#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) /* EXTI 2 configuration */ +#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) /* EXTI 3 configuration */ + +#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) /* PA[0] pin */ +#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) /* PB[0] pin */ +#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) /* PC[0] pin */ +#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) /* PD[0] pin */ +#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) /* PE[0] pin */ +#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) /* PF[0] pin */ +#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) /* PG[0] pin */ + +#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) /* PA[1] pin */ +#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) /* PB[1] pin */ +#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) /* PC[1] pin */ +#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) /* PD[1] pin */ +#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) /* PE[1] pin */ +#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) /* PF[1] pin */ +#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) /* PG[1] pin */ + +#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) /* PA[2] pin */ +#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) /* PB[2] pin */ +#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) /* PC[2] pin */ +#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) /* PD[2] pin */ +#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) /* PE[2] pin */ +#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) /* PF[2] pin */ +#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) /* PG[2] pin */ + +#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) /* PA[3] pin */ +#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) /* PB[3] pin */ +#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) /* PC[3] pin */ +#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) /* PD[3] pin */ +#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) /* PE[3] pin */ +#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) /* PF[3] pin */ +#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) /* PG[3] pin */ + +/***************** Bit definition for AFIO_EXTICR2 register *****************/ +#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) /* EXTI 4 configuration */ +#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) /* EXTI 5 configuration */ +#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) /* EXTI 6 configuration */ +#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) /* EXTI 7 configuration */ + +#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) /* PA[4] pin */ +#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) /* PB[4] pin */ +#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) /* PC[4] pin */ +#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) /* PD[4] pin */ +#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) /* PE[4] pin */ +#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) /* PF[4] pin */ +#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) /* PG[4] pin */ + +#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) /* PA[5] pin */ +#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) /* PB[5] pin */ +#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) /* PC[5] pin */ +#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) /* PD[5] pin */ +#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) /* PE[5] pin */ +#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) /* PF[5] pin */ +#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) /* PG[5] pin */ + +#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) /* PA[6] pin */ +#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) /* PB[6] pin */ +#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) /* PC[6] pin */ +#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) /* PD[6] pin */ +#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) /* PE[6] pin */ +#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) /* PF[6] pin */ +#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) /* PG[6] pin */ + +#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) /* PA[7] pin */ +#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) /* PB[7] pin */ +#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) /* PC[7] pin */ +#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) /* PD[7] pin */ +#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) /* PE[7] pin */ +#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) /* PF[7] pin */ +#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) /* PG[7] pin */ + +/***************** Bit definition for AFIO_EXTICR3 register *****************/ +#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) /* EXTI 8 configuration */ +#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) /* EXTI 9 configuration */ +#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) /* EXTI 10 configuration */ +#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) /* EXTI 11 configuration */ + +#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) /* PA[8] pin */ +#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) /* PB[8] pin */ +#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) /* PC[8] pin */ +#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) /* PD[8] pin */ +#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) /* PE[8] pin */ +#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) /* PF[8] pin */ +#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) /* PG[8] pin */ + +#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) /* PA[9] pin */ +#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) /* PB[9] pin */ +#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) /* PC[9] pin */ +#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) /* PD[9] pin */ +#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) /* PE[9] pin */ +#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) /* PF[9] pin */ +#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) /* PG[9] pin */ + +#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) /* PA[10] pin */ +#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) /* PB[10] pin */ +#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) /* PC[10] pin */ +#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) /* PD[10] pin */ +#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) /* PE[10] pin */ +#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) /* PF[10] pin */ +#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) /* PG[10] pin */ + +#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) /* PA[11] pin */ +#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) /* PB[11] pin */ +#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) /* PC[11] pin */ +#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) /* PD[11] pin */ +#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) /* PE[11] pin */ +#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) /* PF[11] pin */ +#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) /* PG[11] pin */ + +/***************** Bit definition for AFIO_EXTICR4 register *****************/ +#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) /* EXTI 12 configuration */ +#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) /* EXTI 13 configuration */ +#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) /* EXTI 14 configuration */ +#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) /* EXTI 15 configuration */ + +#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) /* PA[12] pin */ +#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) /* PB[12] pin */ +#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) /* PC[12] pin */ +#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) /* PD[12] pin */ +#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) /* PE[12] pin */ +#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) /* PF[12] pin */ +#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) /* PG[12] pin */ + +#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) /* PA[13] pin */ +#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) /* PB[13] pin */ +#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) /* PC[13] pin */ +#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) /* PD[13] pin */ +#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) /* PE[13] pin */ +#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) /* PF[13] pin */ +#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) /* PG[13] pin */ + +#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) /* PA[14] pin */ +#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) /* PB[14] pin */ +#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) /* PC[14] pin */ +#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) /* PD[14] pin */ +#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) /* PE[14] pin */ +#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) /* PF[14] pin */ +#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) /* PG[14] pin */ + +#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) /* PA[15] pin */ +#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) /* PB[15] pin */ +#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) /* PC[15] pin */ +#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) /* PD[15] pin */ +#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) /* PE[15] pin */ +#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) /* PF[15] pin */ +#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) /* PG[15] pin */ + +/******************************************************************************/ +/* Independent WATCHDOG */ +/******************************************************************************/ + +/******************* Bit definition for IWDG_CTLR register ********************/ +#define IWDG_KEY ((uint16_t)0xFFFF) /* Key value (write only, read 0000h) */ + +/******************* Bit definition for IWDG_PSCR register ********************/ +#define IWDG_PR ((uint8_t)0x07) /* PR[2:0] (Prescaler divider) */ +#define IWDG_PR_0 ((uint8_t)0x01) /* Bit 0 */ +#define IWDG_PR_1 ((uint8_t)0x02) /* Bit 1 */ +#define IWDG_PR_2 ((uint8_t)0x04) /* Bit 2 */ + +/******************* Bit definition for IWDG_RLDR register *******************/ +#define IWDG_RL ((uint16_t)0x0FFF) /* Watchdog counter reload value */ + +/******************* Bit definition for IWDG_STATR register ********************/ +#define IWDG_PVU ((uint8_t)0x01) /* Watchdog prescaler value update */ +#define IWDG_RVU ((uint8_t)0x02) /* Watchdog counter reload value update */ + +/******************************************************************************/ +/* Inter-integrated Circuit Interface */ +/******************************************************************************/ + +/******************* Bit definition for I2C_CTLR1 register ********************/ +#define I2C_CTLR1_PE ((uint16_t)0x0001) /* Peripheral Enable */ +#define I2C_CTLR1_SMBUS ((uint16_t)0x0002) /* SMBus Mode */ +#define I2C_CTLR1_SMBTYPE ((uint16_t)0x0008) /* SMBus Type */ +#define I2C_CTLR1_ENARP ((uint16_t)0x0010) /* ARP Enable */ +#define I2C_CTLR1_ENPEC ((uint16_t)0x0020) /* PEC Enable */ +#define I2C_CTLR1_ENGC ((uint16_t)0x0040) /* General Call Enable */ +#define I2C_CTLR1_NOSTRETCH ((uint16_t)0x0080) /* Clock Stretching Disable (Slave mode) */ +#define I2C_CTLR1_START ((uint16_t)0x0100) /* Start Generation */ +#define I2C_CTLR1_STOP ((uint16_t)0x0200) /* Stop Generation */ +#define I2C_CTLR1_ACK ((uint16_t)0x0400) /* Acknowledge Enable */ +#define I2C_CTLR1_POS ((uint16_t)0x0800) /* Acknowledge/PEC Position (for data reception) */ +#define I2C_CTLR1_PEC ((uint16_t)0x1000) /* Packet Error Checking */ +#define I2C_CTLR1_ALERT ((uint16_t)0x2000) /* SMBus Alert */ +#define I2C_CTLR1_SWRST ((uint16_t)0x8000) /* Software Reset */ + +/******************* Bit definition for I2C_CTLR2 register ********************/ +#define I2C_CTLR2_FREQ ((uint16_t)0x003F) /* FREQ[5:0] bits (Peripheral Clock Frequency) */ +#define I2C_CTLR2_FREQ_0 ((uint16_t)0x0001) /* Bit 0 */ +#define I2C_CTLR2_FREQ_1 ((uint16_t)0x0002) /* Bit 1 */ +#define I2C_CTLR2_FREQ_2 ((uint16_t)0x0004) /* Bit 2 */ +#define I2C_CTLR2_FREQ_3 ((uint16_t)0x0008) /* Bit 3 */ +#define I2C_CTLR2_FREQ_4 ((uint16_t)0x0010) /* Bit 4 */ +#define I2C_CTLR2_FREQ_5 ((uint16_t)0x0020) /* Bit 5 */ + +#define I2C_CTLR2_ITERREN ((uint16_t)0x0100) /* Error Interrupt Enable */ +#define I2C_CTLR2_ITEVTEN ((uint16_t)0x0200) /* Event Interrupt Enable */ +#define I2C_CTLR2_ITBUFEN ((uint16_t)0x0400) /* Buffer Interrupt Enable */ +#define I2C_CTLR2_DMAEN ((uint16_t)0x0800) /* DMA Requests Enable */ +#define I2C_CTLR2_LAST ((uint16_t)0x1000) /* DMA Last Transfer */ + +/******************* Bit definition for I2C_OADDR1 register *******************/ +#define I2C_OADDR1_ADD1_7 ((uint16_t)0x00FE) /* Interface Address */ +#define I2C_OADDR1_ADD8_9 ((uint16_t)0x0300) /* Interface Address */ + +#define I2C_OADDR1_ADD0 ((uint16_t)0x0001) /* Bit 0 */ +#define I2C_OADDR1_ADD1 ((uint16_t)0x0002) /* Bit 1 */ +#define I2C_OADDR1_ADD2 ((uint16_t)0x0004) /* Bit 2 */ +#define I2C_OADDR1_ADD3 ((uint16_t)0x0008) /* Bit 3 */ +#define I2C_OADDR1_ADD4 ((uint16_t)0x0010) /* Bit 4 */ +#define I2C_OADDR1_ADD5 ((uint16_t)0x0020) /* Bit 5 */ +#define I2C_OADDR1_ADD6 ((uint16_t)0x0040) /* Bit 6 */ +#define I2C_OADDR1_ADD7 ((uint16_t)0x0080) /* Bit 7 */ +#define I2C_OADDR1_ADD8 ((uint16_t)0x0100) /* Bit 8 */ +#define I2C_OADDR1_ADD9 ((uint16_t)0x0200) /* Bit 9 */ + +#define I2C_OADDR1_ADDMODE ((uint16_t)0x8000) /* Addressing Mode (Slave mode) */ + +/******************* Bit definition for I2C_OADDR2 register *******************/ +#define I2C_OADDR2_ENDUAL ((uint8_t)0x01) /* Dual addressing mode enable */ +#define I2C_OADDR2_ADD2 ((uint8_t)0xFE) /* Interface address */ + +/******************** Bit definition for I2C_DATAR register ********************/ +#define I2C_DR_DATAR ((uint8_t)0xFF) /* 8-bit Data Register */ + +/******************* Bit definition for I2C_STAR1 register ********************/ +#define I2C_STAR1_SB ((uint16_t)0x0001) /* Start Bit (Master mode) */ +#define I2C_STAR1_ADDR ((uint16_t)0x0002) /* Address sent (master mode)/matched (slave mode) */ +#define I2C_STAR1_BTF ((uint16_t)0x0004) /* Byte Transfer Finished */ +#define I2C_STAR1_ADD10 ((uint16_t)0x0008) /* 10-bit header sent (Master mode) */ +#define I2C_STAR1_STOPF ((uint16_t)0x0010) /* Stop detection (Slave mode) */ +#define I2C_STAR1_RXNE ((uint16_t)0x0040) /* Data Register not Empty (receivers) */ +#define I2C_STAR1_TXE ((uint16_t)0x0080) /* Data Register Empty (transmitters) */ +#define I2C_STAR1_BERR ((uint16_t)0x0100) /* Bus Error */ +#define I2C_STAR1_ARLO ((uint16_t)0x0200) /* Arbitration Lost (master mode) */ +#define I2C_STAR1_AF ((uint16_t)0x0400) /* Acknowledge Failure */ +#define I2C_STAR1_OVR ((uint16_t)0x0800) /* Overrun/Underrun */ +#define I2C_STAR1_PECERR ((uint16_t)0x1000) /* PEC Error in reception */ +#define I2C_STAR1_TIMEOUT ((uint16_t)0x4000) /* Timeout or Tlow Error */ +#define I2C_STAR1_SMBALERT ((uint16_t)0x8000) /* SMBus Alert */ + +/******************* Bit definition for I2C_STAR2 register ********************/ +#define I2C_STAR2_MSL ((uint16_t)0x0001) /* Master/Slave */ +#define I2C_STAR2_BUSY ((uint16_t)0x0002) /* Bus Busy */ +#define I2C_STAR2_TRA ((uint16_t)0x0004) /* Transmitter/Receiver */ +#define I2C_STAR2_GENCALL ((uint16_t)0x0010) /* General Call Address (Slave mode) */ +#define I2C_STAR2_SMBDEFAULT ((uint16_t)0x0020) /* SMBus Device Default Address (Slave mode) */ +#define I2C_STAR2_SMBHOST ((uint16_t)0x0040) /* SMBus Host Header (Slave mode) */ +#define I2C_STAR2_DUALF ((uint16_t)0x0080) /* Dual Flag (Slave mode) */ +#define I2C_STAR2_PEC ((uint16_t)0xFF00) /* Packet Error Checking Register */ + +/******************* Bit definition for I2C_CKCFGR register ********************/ +#define I2C_CKCFGR_CCR ((uint16_t)0x0FFF) /* Clock Control Register in Fast/Standard mode (Master mode) */ +#define I2C_CKCFGR_DUTY ((uint16_t)0x4000) /* Fast Mode Duty Cycle */ +#define I2C_CKCFGR_FS ((uint16_t)0x8000) /* I2C Master Mode Selection */ + +/****************** Bit definition for I2C_RTR register *******************/ +#define I2C_RTR_TRISE ((uint8_t)0x3F) /* Maximum Rise Time in Fast/Standard mode (Master mode) */ + + +/******************************************************************************/ +/* Power Control */ +/******************************************************************************/ + +/******************** Bit definition for PWR_CTLR register ********************/ +#define PWR_CTLR_LPDS ((uint16_t)0x0001) /* Low-Power Deepsleep */ +#define PWR_CTLR_PDDS ((uint16_t)0x0002) /* Power Down Deepsleep */ +#define PWR_CTLR_CWUF ((uint16_t)0x0004) /* Clear Wakeup Flag */ +#define PWR_CTLR_CSBF ((uint16_t)0x0008) /* Clear Standby Flag */ +#define PWR_CTLR_PVDE ((uint16_t)0x0010) /* Power Voltage Detector Enable */ + +#define PWR_CTLR_PLS ((uint16_t)0x00E0) /* PLS[2:0] bits (PVD Level Selection) */ +#define PWR_CTLR_PLS_0 ((uint16_t)0x0020) /* Bit 0 */ +#define PWR_CTLR_PLS_1 ((uint16_t)0x0040) /* Bit 1 */ +#define PWR_CTLR_PLS_2 ((uint16_t)0x0080) /* Bit 2 */ + +#define PWR_CTLR_PLS_2V2 ((uint16_t)0x0000) /* PVD level 2.2V */ +#define PWR_CTLR_PLS_2V3 ((uint16_t)0x0020) /* PVD level 2.3V */ +#define PWR_CTLR_PLS_2V4 ((uint16_t)0x0040) /* PVD level 2.4V */ +#define PWR_CTLR_PLS_2V5 ((uint16_t)0x0060) /* PVD level 2.5V */ +#define PWR_CTLR_PLS_2V6 ((uint16_t)0x0080) /* PVD level 2.6V */ +#define PWR_CTLR_PLS_2V7 ((uint16_t)0x00A0) /* PVD level 2.7V */ +#define PWR_CTLR_PLS_2V8 ((uint16_t)0x00C0) /* PVD level 2.8V */ +#define PWR_CTLR_PLS_2V9 ((uint16_t)0x00E0) /* PVD level 2.9V */ + +#define PWR_CTLR_DBP ((uint16_t)0x0100) /* Disable Backup Domain write protection */ + + +/******************* Bit definition for PWR_CSR register ********************/ +#define PWR_CSR_WUF ((uint16_t)0x0001) /* Wakeup Flag */ +#define PWR_CSR_SBF ((uint16_t)0x0002) /* Standby Flag */ +#define PWR_CSR_PVDO ((uint16_t)0x0004) /* PVD Output */ +#define PWR_CSR_EWUP ((uint16_t)0x0100) /* Enable WKUP pin */ + + + +/******************************************************************************/ +/* Reset and Clock Control */ +/******************************************************************************/ + +/******************** Bit definition for RCC_CTLR register ********************/ +#define RCC_HSION ((uint32_t)0x00000001) /* Internal High Speed clock enable */ +#define RCC_HSIRDY ((uint32_t)0x00000002) /* Internal High Speed clock ready flag */ +#define RCC_HSITRIM ((uint32_t)0x000000F8) /* Internal High Speed clock trimming */ +#define RCC_HSICAL ((uint32_t)0x0000FF00) /* Internal High Speed clock Calibration */ +#define RCC_HSEON ((uint32_t)0x00010000) /* External High Speed clock enable */ +#define RCC_HSERDY ((uint32_t)0x00020000) /* External High Speed clock ready flag */ +#define RCC_HSEBYP ((uint32_t)0x00040000) /* External High Speed clock Bypass */ +#define RCC_CSSON ((uint32_t)0x00080000) /* Clock Security System enable */ +#define RCC_PLLON ((uint32_t)0x01000000) /* PLL enable */ +#define RCC_PLLRDY ((uint32_t)0x02000000) /* PLL clock ready flag */ + + +/******************* Bit definition for RCC_CFGR0 register *******************/ +#define RCC_SW ((uint32_t)0x00000003) /* SW[1:0] bits (System clock Switch) */ +#define RCC_SW_0 ((uint32_t)0x00000001) /* Bit 0 */ +#define RCC_SW_1 ((uint32_t)0x00000002) /* Bit 1 */ + +#define RCC_SW_HSI ((uint32_t)0x00000000) /* HSI selected as system clock */ +#define RCC_SW_HSE ((uint32_t)0x00000001) /* HSE selected as system clock */ +#define RCC_SW_PLL ((uint32_t)0x00000002) /* PLL selected as system clock */ + +#define RCC_SWS ((uint32_t)0x0000000C) /* SWS[1:0] bits (System Clock Switch Status) */ +#define RCC_SWS_0 ((uint32_t)0x00000004) /* Bit 0 */ +#define RCC_SWS_1 ((uint32_t)0x00000008) /* Bit 1 */ + +#define RCC_SWS_HSI ((uint32_t)0x00000000) /* HSI oscillator used as system clock */ +#define RCC_SWS_HSE ((uint32_t)0x00000004) /* HSE oscillator used as system clock */ +#define RCC_SWS_PLL ((uint32_t)0x00000008) /* PLL used as system clock */ + +#define RCC_HPRE ((uint32_t)0x000000F0) /* HPRE[3:0] bits (AHB prescaler) */ +#define RCC_HPRE_0 ((uint32_t)0x00000010) /* Bit 0 */ +#define RCC_HPRE_1 ((uint32_t)0x00000020) /* Bit 1 */ +#define RCC_HPRE_2 ((uint32_t)0x00000040) /* Bit 2 */ +#define RCC_HPRE_3 ((uint32_t)0x00000080) /* Bit 3 */ + +#define RCC_HPRE_DIV1 ((uint32_t)0x00000000) /* SYSCLK not divided */ +#define RCC_HPRE_DIV2 ((uint32_t)0x00000080) /* SYSCLK divided by 2 */ +#define RCC_HPRE_DIV4 ((uint32_t)0x00000090) /* SYSCLK divided by 4 */ +#define RCC_HPRE_DIV8 ((uint32_t)0x000000A0) /* SYSCLK divided by 8 */ +#define RCC_HPRE_DIV16 ((uint32_t)0x000000B0) /* SYSCLK divided by 16 */ +#define RCC_HPRE_DIV64 ((uint32_t)0x000000C0) /* SYSCLK divided by 64 */ +#define RCC_HPRE_DIV128 ((uint32_t)0x000000D0) /* SYSCLK divided by 128 */ +#define RCC_HPRE_DIV256 ((uint32_t)0x000000E0) /* SYSCLK divided by 256 */ +#define RCC_HPRE_DIV512 ((uint32_t)0x000000F0) /* SYSCLK divided by 512 */ + +#define RCC_PPRE1 ((uint32_t)0x00000700) /* PRE1[2:0] bits (APB1 prescaler) */ +#define RCC_PPRE1_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define RCC_PPRE1_1 ((uint32_t)0x00000200) /* Bit 1 */ +#define RCC_PPRE1_2 ((uint32_t)0x00000400) /* Bit 2 */ + +#define RCC_PPRE1_DIV1 ((uint32_t)0x00000000) /* HCLK not divided */ +#define RCC_PPRE1_DIV2 ((uint32_t)0x00000400) /* HCLK divided by 2 */ +#define RCC_PPRE1_DIV4 ((uint32_t)0x00000500) /* HCLK divided by 4 */ +#define RCC_PPRE1_DIV8 ((uint32_t)0x00000600) /* HCLK divided by 8 */ +#define RCC_PPRE1_DIV16 ((uint32_t)0x00000700) /* HCLK divided by 16 */ + +#define RCC_PPRE2 ((uint32_t)0x00003800) /* PRE2[2:0] bits (APB2 prescaler) */ +#define RCC_PPRE2_0 ((uint32_t)0x00000800) /* Bit 0 */ +#define RCC_PPRE2_1 ((uint32_t)0x00001000) /* Bit 1 */ +#define RCC_PPRE2_2 ((uint32_t)0x00002000) /* Bit 2 */ + +#define RCC_PPRE2_DIV1 ((uint32_t)0x00000000) /* HCLK not divided */ +#define RCC_PPRE2_DIV2 ((uint32_t)0x00002000) /* HCLK divided by 2 */ +#define RCC_PPRE2_DIV4 ((uint32_t)0x00002800) /* HCLK divided by 4 */ +#define RCC_PPRE2_DIV8 ((uint32_t)0x00003000) /* HCLK divided by 8 */ +#define RCC_PPRE2_DIV16 ((uint32_t)0x00003800) /* HCLK divided by 16 */ + +#define RCC_ADCPRE ((uint32_t)0x0000C000) /* ADCPRE[1:0] bits (ADC prescaler) */ +#define RCC_ADCPRE_0 ((uint32_t)0x00004000) /* Bit 0 */ +#define RCC_ADCPRE_1 ((uint32_t)0x00008000) /* Bit 1 */ + +#define RCC_ADCPRE_DIV2 ((uint32_t)0x00000000) /* PCLK2 divided by 2 */ +#define RCC_ADCPRE_DIV4 ((uint32_t)0x00004000) /* PCLK2 divided by 4 */ +#define RCC_ADCPRE_DIV6 ((uint32_t)0x00008000) /* PCLK2 divided by 6 */ +#define RCC_ADCPRE_DIV8 ((uint32_t)0x0000C000) /* PCLK2 divided by 8 */ + +#define RCC_PLLSRC ((uint32_t)0x00010000) /* PLL entry clock source */ + +#define RCC_PLLXTPRE ((uint32_t)0x00020000) /* HSE divider for PLL entry */ + +#define RCC_PLLMULL ((uint32_t)0x003C0000) /* PLLMUL[3:0] bits (PLL multiplication factor) */ +#define RCC_PLLMULL_0 ((uint32_t)0x00040000) /* Bit 0 */ +#define RCC_PLLMULL_1 ((uint32_t)0x00080000) /* Bit 1 */ +#define RCC_PLLMULL_2 ((uint32_t)0x00100000) /* Bit 2 */ +#define RCC_PLLMULL_3 ((uint32_t)0x00200000) /* Bit 3 */ + +#define RCC_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /* HSI clock divided by 2 selected as PLL entry clock source */ +#define RCC_PLLSRC_HSE ((uint32_t)0x00010000) /* HSE clock selected as PLL entry clock source */ + +#define RCC_PLLXTPRE_HSE ((uint32_t)0x00000000) /* HSE clock not divided for PLL entry */ +#define RCC_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) /* HSE clock divided by 2 for PLL entry */ + +#define RCC_PLLMULL2 ((uint32_t)0x00000000) /* PLL input clock*2 */ +#define RCC_PLLMULL3 ((uint32_t)0x00040000) /* PLL input clock*3 */ +#define RCC_PLLMULL4 ((uint32_t)0x00080000) /* PLL input clock*4 */ +#define RCC_PLLMULL5 ((uint32_t)0x000C0000) /* PLL input clock*5 */ +#define RCC_PLLMULL6 ((uint32_t)0x00100000) /* PLL input clock*6 */ +#define RCC_PLLMULL7 ((uint32_t)0x00140000) /* PLL input clock*7 */ +#define RCC_PLLMULL8 ((uint32_t)0x00180000) /* PLL input clock*8 */ +#define RCC_PLLMULL9 ((uint32_t)0x001C0000) /* PLL input clock*9 */ +#define RCC_PLLMULL10 ((uint32_t)0x00200000) /* PLL input clock10 */ +#define RCC_PLLMULL11 ((uint32_t)0x00240000) /* PLL input clock*11 */ +#define RCC_PLLMULL12 ((uint32_t)0x00280000) /* PLL input clock*12 */ +#define RCC_PLLMULL13 ((uint32_t)0x002C0000) /* PLL input clock*13 */ +#define RCC_PLLMULL14 ((uint32_t)0x00300000) /* PLL input clock*14 */ +#define RCC_PLLMULL15 ((uint32_t)0x00340000) /* PLL input clock*15 */ +#define RCC_PLLMULL16 ((uint32_t)0x00380000) /* PLL input clock*16 */ +#define RCC_USBPRE ((uint32_t)0x00400000) /* USB Device prescaler */ + +#define RCC_CFGR0_MCO ((uint32_t)0x07000000) /* MCO[2:0] bits (Microcontroller Clock Output) */ +#define RCC_MCO_0 ((uint32_t)0x01000000) /* Bit 0 */ +#define RCC_MCO_1 ((uint32_t)0x02000000) /* Bit 1 */ +#define RCC_MCO_2 ((uint32_t)0x04000000) /* Bit 2 */ + +#define RCC_MCO_NOCLOCK ((uint32_t)0x00000000) /* No clock */ +#define RCC_CFGR0_MCO_SYSCLK ((uint32_t)0x04000000) /* System clock selected as MCO source */ +#define RCC_CFGR0_MCO_HSI ((uint32_t)0x05000000) /* HSI clock selected as MCO source */ +#define RCC_CFGR0_MCO_HSE ((uint32_t)0x06000000) /* HSE clock selected as MCO source */ +#define RCC_CFGR0_MCO_PLL ((uint32_t)0x07000000) /* PLL clock divided by 2 selected as MCO source */ + +/******************* Bit definition for RCC_INTR register ********************/ +#define RCC_LSIRDYF ((uint32_t)0x00000001) /* LSI Ready Interrupt flag */ +#define RCC_LSERDYF ((uint32_t)0x00000002) /* LSE Ready Interrupt flag */ +#define RCC_HSIRDYF ((uint32_t)0x00000004) /* HSI Ready Interrupt flag */ +#define RCC_HSERDYF ((uint32_t)0x00000008) /* HSE Ready Interrupt flag */ +#define RCC_PLLRDYF ((uint32_t)0x00000010) /* PLL Ready Interrupt flag */ +#define RCC_CSSF ((uint32_t)0x00000080) /* Clock Security System Interrupt flag */ +#define RCC_LSIRDYIE ((uint32_t)0x00000100) /* LSI Ready Interrupt Enable */ +#define RCC_LSERDYIE ((uint32_t)0x00000200) /* LSE Ready Interrupt Enable */ +#define RCC_HSIRDYIE ((uint32_t)0x00000400) /* HSI Ready Interrupt Enable */ +#define RCC_HSERDYIE ((uint32_t)0x00000800) /* HSE Ready Interrupt Enable */ +#define RCC_PLLRDYIE ((uint32_t)0x00001000) /* PLL Ready Interrupt Enable */ +#define RCC_LSIRDYC ((uint32_t)0x00010000) /* LSI Ready Interrupt Clear */ +#define RCC_LSERDYC ((uint32_t)0x00020000) /* LSE Ready Interrupt Clear */ +#define RCC_HSIRDYC ((uint32_t)0x00040000) /* HSI Ready Interrupt Clear */ +#define RCC_HSERDYC ((uint32_t)0x00080000) /* HSE Ready Interrupt Clear */ +#define RCC_PLLRDYC ((uint32_t)0x00100000) /* PLL Ready Interrupt Clear */ +#define RCC_CSSC ((uint32_t)0x00800000) /* Clock Security System Interrupt Clear */ + + +/***************** Bit definition for RCC_APB2PRSTR register *****************/ +#define RCC_AFIORST ((uint32_t)0x00000001) /* Alternate Function I/O reset */ +#define RCC_IOPARST ((uint32_t)0x00000004) /* I/O port A reset */ +#define RCC_IOPBRST ((uint32_t)0x00000008) /* I/O port B reset */ +#define RCC_IOPCRST ((uint32_t)0x00000010) /* I/O port C reset */ +#define RCC_IOPDRST ((uint32_t)0x00000020) /* I/O port D reset */ +#define RCC_ADC1RST ((uint32_t)0x00000200) /* ADC 1 interface reset */ + + +#define RCC_ADC2RST ((uint32_t)0x00000400) /* ADC 2 interface reset */ + + +#define RCC_TIM1RST ((uint32_t)0x00000800) /* TIM1 Timer reset */ +#define RCC_SPI1RST ((uint32_t)0x00001000) /* SPI 1 reset */ +#define RCC_USART1RST ((uint32_t)0x00004000) /* USART1 reset */ + +#define RCC_IOPERST ((uint32_t)0x00000040) /* I/O port E reset */ + +/***************** Bit definition for RCC_APB1PRSTR register *****************/ +#define RCC_TIM2RST ((uint32_t)0x00000001) /* Timer 2 reset */ +#define RCC_TIM3RST ((uint32_t)0x00000002) /* Timer 3 reset */ +#define RCC_WWDGRST ((uint32_t)0x00000800) /* Window Watchdog reset */ +#define RCC_USART2RST ((uint32_t)0x00020000) /* USART 2 reset */ +#define RCC_I2C1RST ((uint32_t)0x00200000) /* I2C 1 reset */ + +#define RCC_CAN1RST ((uint32_t)0x02000000) /* CAN1 reset */ + + +#define RCC_BKPRST ((uint32_t)0x08000000) /* Backup interface reset */ +#define RCC_PWRRST ((uint32_t)0x10000000) /* Power interface reset */ + + +#define RCC_TIM4RST ((uint32_t)0x00000004) /* Timer 4 reset */ +#define RCC_SPI2RST ((uint32_t)0x00004000) /* SPI 2 reset */ +#define RCC_USART3RST ((uint32_t)0x00040000) /* USART 3 reset */ +#define RCC_I2C2RST ((uint32_t)0x00400000) /* I2C 2 reset */ + +#define RCC_USBRST ((uint32_t)0x00800000) /* USB Device reset */ + +/****************** Bit definition for RCC_AHBPCENR register ******************/ +#define RCC_DMA1EN ((uint16_t)0x0001) /* DMA1 clock enable */ +#define RCC_SRAMEN ((uint16_t)0x0004) /* SRAM interface clock enable */ +#define RCC_FLITFEN ((uint16_t)0x0010) /* FLITF clock enable */ +#define RCC_CRCEN ((uint16_t)0x0040) /* CRC clock enable */ +#define RCC_USBHD ((uint16_t)0x1000) + +/****************** Bit definition for RCC_APB2PCENR register *****************/ +#define RCC_AFIOEN ((uint32_t)0x00000001) /* Alternate Function I/O clock enable */ +#define RCC_IOPAEN ((uint32_t)0x00000004) /* I/O port A clock enable */ +#define RCC_IOPBEN ((uint32_t)0x00000008) /* I/O port B clock enable */ +#define RCC_IOPCEN ((uint32_t)0x00000010) /* I/O port C clock enable */ +#define RCC_IOPDEN ((uint32_t)0x00000020) /* I/O port D clock enable */ +#define RCC_ADC1EN ((uint32_t)0x00000200) /* ADC 1 interface clock enable */ + +#define RCC_ADC2EN ((uint32_t)0x00000400) /* ADC 2 interface clock enable */ + + +#define RCC_TIM1EN ((uint32_t)0x00000800) /* TIM1 Timer clock enable */ +#define RCC_SPI1EN ((uint32_t)0x00001000) /* SPI 1 clock enable */ +#define RCC_USART1EN ((uint32_t)0x00004000) /* USART1 clock enable */ + +/***************** Bit definition for RCC_APB1PCENR register ******************/ +#define RCC_TIM2EN ((uint32_t)0x00000001) /* Timer 2 clock enabled*/ +#define RCC_TIM3EN ((uint32_t)0x00000002) /* Timer 3 clock enable */ +#define RCC_WWDGEN ((uint32_t)0x00000800) /* Window Watchdog clock enable */ +#define RCC_USART2EN ((uint32_t)0x00020000) /* USART 2 clock enable */ +#define RCC_I2C1EN ((uint32_t)0x00200000) /* I2C 1 clock enable */ + +#define RCC_BKPEN ((uint32_t)0x08000000) /* Backup interface clock enable */ +#define RCC_PWREN ((uint32_t)0x10000000) /* Power interface clock enable */ + + +#define RCC_USBEN ((uint32_t)0x00800000) /* USB Device clock enable */ + +/******************* Bit definition for RCC_BDCTLR register *******************/ +#define RCC_LSEON ((uint32_t)0x00000001) /* External Low Speed oscillator enable */ +#define RCC_LSERDY ((uint32_t)0x00000002) /* External Low Speed oscillator Ready */ +#define RCC_LSEBYP ((uint32_t)0x00000004) /* External Low Speed oscillator Bypass */ + +#define RCC_RTCSEL ((uint32_t)0x00000300) /* RTCSEL[1:0] bits (RTC clock source selection) */ +#define RCC_RTCSEL_0 ((uint32_t)0x00000100) /* Bit 0 */ +#define RCC_RTCSEL_1 ((uint32_t)0x00000200) /* Bit 1 */ + +#define RCC_RTCSEL_NOCLOCK ((uint32_t)0x00000000) /* No clock */ +#define RCC_RTCSEL_LSE ((uint32_t)0x00000100) /* LSE oscillator clock used as RTC clock */ +#define RCC_RTCSEL_LSI ((uint32_t)0x00000200) /* LSI oscillator clock used as RTC clock */ +#define RCC_RTCSEL_HSE ((uint32_t)0x00000300) /* HSE oscillator clock divided by 128 used as RTC clock */ + +#define RCC_RTCEN ((uint32_t)0x00008000) /* RTC clock enable */ +#define RCC_BDRST ((uint32_t)0x00010000) /* Backup domain software reset */ + +/******************* Bit definition for RCC_RSTSCKR register ********************/ +#define RCC_LSION ((uint32_t)0x00000001) /* Internal Low Speed oscillator enable */ +#define RCC_LSIRDY ((uint32_t)0x00000002) /* Internal Low Speed oscillator Ready */ +#define RCC_RMVF ((uint32_t)0x01000000) /* Remove reset flag */ +#define RCC_PINRSTF ((uint32_t)0x04000000) /* PIN reset flag */ +#define RCC_PORRSTF ((uint32_t)0x08000000) /* POR/PDR reset flag */ +#define RCC_SFTRSTF ((uint32_t)0x10000000) /* Software Reset flag */ +#define RCC_IWDGRSTF ((uint32_t)0x20000000) /* Independent Watchdog reset flag */ +#define RCC_WWDGRSTF ((uint32_t)0x40000000) /* Window watchdog reset flag */ +#define RCC_LPWRRSTF ((uint32_t)0x80000000) /* Low-Power reset flag */ + +/******************************************************************************/ +/* Real-Time Clock */ +/******************************************************************************/ + +/******************* Bit definition for RTC_CTLRH register ********************/ +#define RTC_CTLRH_SECIE ((uint8_t)0x01) /* Second Interrupt Enable */ +#define RTC_CTLRH_ALRIE ((uint8_t)0x02) /* Alarm Interrupt Enable */ +#define RTC_CTLRH_OWIE ((uint8_t)0x04) /* OverfloW Interrupt Enable */ + +/******************* Bit definition for RTC_CTLRL register ********************/ +#define RTC_CTLRL_SECF ((uint8_t)0x01) /* Second Flag */ +#define RTC_CTLRL_ALRF ((uint8_t)0x02) /* Alarm Flag */ +#define RTC_CTLRL_OWF ((uint8_t)0x04) /* OverfloW Flag */ +#define RTC_CTLRL_RSF ((uint8_t)0x08) /* Registers Synchronized Flag */ +#define RTC_CTLRL_CNF ((uint8_t)0x10) /* Configuration Flag */ +#define RTC_CTLRL_RTOFF ((uint8_t)0x20) /* RTC operation OFF */ + +/******************* Bit definition for RTC_PSCH register *******************/ +#define RTC_PSCH_PRL ((uint16_t)0x000F) /* RTC Prescaler Reload Value High */ + +/******************* Bit definition for RTC_PRLL register *******************/ +#define RTC_PSCL_PRL ((uint16_t)0xFFFF) /* RTC Prescaler Reload Value Low */ + +/******************* Bit definition for RTC_DIVH register *******************/ +#define RTC_DIVH_RTC_DIV ((uint16_t)0x000F) /* RTC Clock Divider High */ + +/******************* Bit definition for RTC_DIVL register *******************/ +#define RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) /* RTC Clock Divider Low */ + +/******************* Bit definition for RTC_CNTH register *******************/ +#define RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) /* RTC Counter High */ + +/******************* Bit definition for RTC_CNTL register *******************/ +#define RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) /* RTC Counter Low */ + +/******************* Bit definition for RTC_ALRMH register *******************/ +#define RTC_ALRMH_RTC_ALRM ((uint16_t)0xFFFF) /* RTC Alarm High */ + +/******************* Bit definition for RTC_ALRML register *******************/ +#define RTC_ALRML_RTC_ALRM ((uint16_t)0xFFFF) /* RTC Alarm Low */ + +/******************************************************************************/ +/* Serial Peripheral Interface */ +/******************************************************************************/ + +/******************* Bit definition for SPI_CTLR1 register ********************/ +#define SPI_CTLR1_CPHA ((uint16_t)0x0001) /* Clock Phase */ +#define SPI_CTLR1_CPOL ((uint16_t)0x0002) /* Clock Polarity */ +#define SPI_CTLR1_MSTR ((uint16_t)0x0004) /* Master Selection */ + +#define SPI_CTLR1_BR ((uint16_t)0x0038) /* BR[2:0] bits (Baud Rate Control) */ +#define SPI_CTLR1_BR_0 ((uint16_t)0x0008) /* Bit 0 */ +#define SPI_CTLR1_BR_1 ((uint16_t)0x0010) /* Bit 1 */ +#define SPI_CTLR1_BR_2 ((uint16_t)0x0020) /* Bit 2 */ + +#define SPI_CTLR1_SPE ((uint16_t)0x0040) /* SPI Enable */ +#define SPI_CTLR1_LSBFIRST ((uint16_t)0x0080) /* Frame Format */ +#define SPI_CTLR1_SSI ((uint16_t)0x0100) /* Internal slave select */ +#define SPI_CTLR1_SSM ((uint16_t)0x0200) /* Software slave management */ +#define SPI_CTLR1_RXONLY ((uint16_t)0x0400) /* Receive only */ +#define SPI_CTLR1_DFF ((uint16_t)0x0800) /* Data Frame Format */ +#define SPI_CTLR1_CRCNEXT ((uint16_t)0x1000) /* Transmit CRC next */ +#define SPI_CTLR1_CRCEN ((uint16_t)0x2000) /* Hardware CRC calculation enable */ +#define SPI_CTLR1_BIDIOE ((uint16_t)0x4000) /* Output enable in bidirectional mode */ +#define SPI_CTLR1_BIDIMODE ((uint16_t)0x8000) /* Bidirectional data mode enable */ + +/******************* Bit definition for SPI_CTLR2 register ********************/ +#define SPI_CTLR2_RXDMAEN ((uint8_t)0x01) /* Rx Buffer DMA Enable */ +#define SPI_CTLR2_TXDMAEN ((uint8_t)0x02) /* Tx Buffer DMA Enable */ +#define SPI_CTLR2_SSOE ((uint8_t)0x04) /* SS Output Enable */ +#define SPI_CTLR2_ERRIE ((uint8_t)0x20) /* Error Interrupt Enable */ +#define SPI_CTLR2_RXNEIE ((uint8_t)0x40) /* RX buffer Not Empty Interrupt Enable */ +#define SPI_CTLR2_TXEIE ((uint8_t)0x80) /* Tx buffer Empty Interrupt Enable */ + +/******************** Bit definition for SPI_STATR register ********************/ +#define SPI_STATR_RXNE ((uint8_t)0x01) /* Receive buffer Not Empty */ +#define SPI_STATR_TXE ((uint8_t)0x02) /* Transmit buffer Empty */ +#define SPI_STATR_CHSIDE ((uint8_t)0x04) /* Channel side */ +#define SPI_STATR_UDR ((uint8_t)0x08) /* Underrun flag */ +#define SPI_STATR_CRCERR ((uint8_t)0x10) /* CRC Error flag */ +#define SPI_STATR_MODF ((uint8_t)0x20) /* Mode fault */ +#define SPI_STATR_OVR ((uint8_t)0x40) /* Overrun flag */ +#define SPI_STATR_BSY ((uint8_t)0x80) /* Busy flag */ + +/******************** Bit definition for SPI_DATAR register ********************/ +#define SPI_DATAR_DR ((uint16_t)0xFFFF) /* Data Register */ + +/******************* Bit definition for SPI_CRCR register ******************/ +#define SPI_CRCR_CRCPOLY ((uint16_t)0xFFFF) /* CRC polynomial register */ + +/****************** Bit definition for SPI_RCRCR register ******************/ +#define SPI_RCRCR_RXCRC ((uint16_t)0xFFFF) /* Rx CRC Register */ + +/****************** Bit definition for SPI_TCRCR register ******************/ +#define SPI_TCRCR_TXCRC ((uint16_t)0xFFFF) /* Tx CRC Register */ + +/****************** Bit definition for SPI_I2SCFGR register *****************/ +#define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) /* Channel length (number of bits per audio channel) */ + +#define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) /* DATLEN[1:0] bits (Data length to be transferred) */ +#define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) /* Bit 0 */ +#define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) /* Bit 1 */ + +#define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) /* steady state clock polarity */ + +#define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) /* I2SSTD[1:0] bits (I2S standard selection) */ +#define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) /* Bit 0 */ +#define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) /* Bit 1 */ + +#define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) /* PCM frame synchronization */ + +#define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) /* I2SCFG[1:0] bits (I2S configuration mode) */ +#define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) /* Bit 0 */ +#define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) /* I2S Enable */ +#define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) /* I2S mode selection */ + +/****************** Bit definition for SPI_I2SPR register *******************/ +#define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) /* I2S Linear prescaler */ +#define SPI_I2SPR_ODD ((uint16_t)0x0100) /* Odd factor for the prescaler */ +#define SPI_I2SPR_MCKOE ((uint16_t)0x0200) /* Master Clock Output Enable */ + +/******************************************************************************/ +/* TIM */ +/******************************************************************************/ + +/******************* Bit definition for TIM_CTLR1 register ********************/ +#define TIM_CEN ((uint16_t)0x0001) /* Counter enable */ +#define TIM_UDIS ((uint16_t)0x0002) /* Update disable */ +#define TIM_URS ((uint16_t)0x0004) /* Update request source */ +#define TIM_OPM ((uint16_t)0x0008) /* One pulse mode */ +#define TIM_DIR ((uint16_t)0x0010) /* Direction */ + +#define TIM_CMS ((uint16_t)0x0060) /* CMS[1:0] bits (Center-aligned mode selection) */ +#define TIM_CMS_0 ((uint16_t)0x0020) /* Bit 0 */ +#define TIM_CMS_1 ((uint16_t)0x0040) /* Bit 1 */ + +#define TIM_ARPE ((uint16_t)0x0080) /* Auto-reload preload enable */ + +#define TIM_CTLR1_CKD ((uint16_t)0x0300) /* CKD[1:0] bits (clock division) */ +#define TIM_CKD_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_CKD_1 ((uint16_t)0x0200) /* Bit 1 */ + +/******************* Bit definition for TIM_CTLR2 register ********************/ +#define TIM_CCPC ((uint16_t)0x0001) /* Capture/Compare Preloaded Control */ +#define TIM_CCUS ((uint16_t)0x0004) /* Capture/Compare Control Update Selection */ +#define TIM_CCDS ((uint16_t)0x0008) /* Capture/Compare DMA Selection */ + +#define TIM_MMS ((uint16_t)0x0070) /* MMS[2:0] bits (Master Mode Selection) */ +#define TIM_MMS_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_MMS_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_MMS_2 ((uint16_t)0x0040) /* Bit 2 */ + +#define TIM_TI1S ((uint16_t)0x0080) /* TI1 Selection */ +#define TIM_OIS1 ((uint16_t)0x0100) /* Output Idle state 1 (OC1 output) */ +#define TIM_OIS1N ((uint16_t)0x0200) /* Output Idle state 1 (OC1N output) */ +#define TIM_OIS2 ((uint16_t)0x0400) /* Output Idle state 2 (OC2 output) */ +#define TIM_OIS2N ((uint16_t)0x0800) /* Output Idle state 2 (OC2N output) */ +#define TIM_OIS3 ((uint16_t)0x1000) /* Output Idle state 3 (OC3 output) */ +#define TIM_OIS3N ((uint16_t)0x2000) /* Output Idle state 3 (OC3N output) */ +#define TIM_OIS4 ((uint16_t)0x4000) /* Output Idle state 4 (OC4 output) */ + +/******************* Bit definition for TIM_SMCFGR register *******************/ +#define TIM_SMS ((uint16_t)0x0007) /* SMS[2:0] bits (Slave mode selection) */ +#define TIM_SMS_0 ((uint16_t)0x0001) /* Bit 0 */ +#define TIM_SMS_1 ((uint16_t)0x0002) /* Bit 1 */ +#define TIM_SMS_2 ((uint16_t)0x0004) /* Bit 2 */ + +#define TIM_TS ((uint16_t)0x0070) /* TS[2:0] bits (Trigger selection) */ +#define TIM_TS_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_TS_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_TS_2 ((uint16_t)0x0040) /* Bit 2 */ + +#define TIM_MSM ((uint16_t)0x0080) /* Master/slave mode */ + +#define TIM_ETF ((uint16_t)0x0F00) /* ETF[3:0] bits (External trigger filter) */ +#define TIM_ETF_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_ETF_1 ((uint16_t)0x0200) /* Bit 1 */ +#define TIM_ETF_2 ((uint16_t)0x0400) /* Bit 2 */ +#define TIM_ETF_3 ((uint16_t)0x0800) /* Bit 3 */ + +#define TIM_ETPS ((uint16_t)0x3000) /* ETPS[1:0] bits (External trigger prescaler) */ +#define TIM_ETPS_0 ((uint16_t)0x1000) /* Bit 0 */ +#define TIM_ETPS_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define TIM_ECE ((uint16_t)0x4000) /* External clock enable */ +#define TIM_ETP ((uint16_t)0x8000) /* External trigger polarity */ + +/******************* Bit definition for TIM_DMAINTENR register *******************/ +#define TIM_UIE ((uint16_t)0x0001) /* Update interrupt enable */ +#define TIM_CC1IE ((uint16_t)0x0002) /* Capture/Compare 1 interrupt enable */ +#define TIM_CC2IE ((uint16_t)0x0004) /* Capture/Compare 2 interrupt enable */ +#define TIM_CC3IE ((uint16_t)0x0008) /* Capture/Compare 3 interrupt enable */ +#define TIM_CC4IE ((uint16_t)0x0010) /* Capture/Compare 4 interrupt enable */ +#define TIM_COMIE ((uint16_t)0x0020) /* COM interrupt enable */ +#define TIM_TIE ((uint16_t)0x0040) /* Trigger interrupt enable */ +#define TIM_BIE ((uint16_t)0x0080) /* Break interrupt enable */ +#define TIM_UDE ((uint16_t)0x0100) /* Update DMA request enable */ +#define TIM_CC1DE ((uint16_t)0x0200) /* Capture/Compare 1 DMA request enable */ +#define TIM_CC2DE ((uint16_t)0x0400) /* Capture/Compare 2 DMA request enable */ +#define TIM_CC3DE ((uint16_t)0x0800) /* Capture/Compare 3 DMA request enable */ +#define TIM_CC4DE ((uint16_t)0x1000) /* Capture/Compare 4 DMA request enable */ +#define TIM_COMDE ((uint16_t)0x2000) /* COM DMA request enable */ +#define TIM_TDE ((uint16_t)0x4000) /* Trigger DMA request enable */ + +/******************** Bit definition for TIM_INTFR register ********************/ +#define TIM_UIF ((uint16_t)0x0001) /* Update interrupt Flag */ +#define TIM_CC1IF ((uint16_t)0x0002) /* Capture/Compare 1 interrupt Flag */ +#define TIM_CC2IF ((uint16_t)0x0004) /* Capture/Compare 2 interrupt Flag */ +#define TIM_CC3IF ((uint16_t)0x0008) /* Capture/Compare 3 interrupt Flag */ +#define TIM_CC4IF ((uint16_t)0x0010) /* Capture/Compare 4 interrupt Flag */ +#define TIM_COMIF ((uint16_t)0x0020) /* COM interrupt Flag */ +#define TIM_TIF ((uint16_t)0x0040) /* Trigger interrupt Flag */ +#define TIM_BIF ((uint16_t)0x0080) /* Break interrupt Flag */ +#define TIM_CC1OF ((uint16_t)0x0200) /* Capture/Compare 1 Overcapture Flag */ +#define TIM_CC2OF ((uint16_t)0x0400) /* Capture/Compare 2 Overcapture Flag */ +#define TIM_CC3OF ((uint16_t)0x0800) /* Capture/Compare 3 Overcapture Flag */ +#define TIM_CC4OF ((uint16_t)0x1000) /* Capture/Compare 4 Overcapture Flag */ + +/******************* Bit definition for TIM_SWEVGR register ********************/ +#define TIM_UG ((uint8_t)0x01) /* Update Generation */ +#define TIM_CC1G ((uint8_t)0x02) /* Capture/Compare 1 Generation */ +#define TIM_CC2G ((uint8_t)0x04) /* Capture/Compare 2 Generation */ +#define TIM_CC3G ((uint8_t)0x08) /* Capture/Compare 3 Generation */ +#define TIM_CC4G ((uint8_t)0x10) /* Capture/Compare 4 Generation */ +#define TIM_COMG ((uint8_t)0x20) /* Capture/Compare Control Update Generation */ +#define TIM_TG ((uint8_t)0x40) /* Trigger Generation */ +#define TIM_BG ((uint8_t)0x80) /* Break Generation */ + +/****************** Bit definition for TIM_CHCTLR1 register *******************/ +#define TIM_CC1S ((uint16_t)0x0003) /* CC1S[1:0] bits (Capture/Compare 1 Selection) */ +#define TIM_CC1S_0 ((uint16_t)0x0001) /* Bit 0 */ +#define TIM_CC1S_1 ((uint16_t)0x0002) /* Bit 1 */ + +#define TIM_OC1FE ((uint16_t)0x0004) /* Output Compare 1 Fast enable */ +#define TIM_OC1PE ((uint16_t)0x0008) /* Output Compare 1 Preload enable */ + +#define TIM_OC1M ((uint16_t)0x0070) /* OC1M[2:0] bits (Output Compare 1 Mode) */ +#define TIM_OC1M_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_OC1M_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_OC1M_2 ((uint16_t)0x0040) /* Bit 2 */ + +#define TIM_OC1CE ((uint16_t)0x0080) /* Output Compare 1Clear Enable */ + +#define TIM_CC2S ((uint16_t)0x0300) /* CC2S[1:0] bits (Capture/Compare 2 Selection) */ +#define TIM_CC2S_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_CC2S_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define TIM_OC2FE ((uint16_t)0x0400) /* Output Compare 2 Fast enable */ +#define TIM_OC2PE ((uint16_t)0x0800) /* Output Compare 2 Preload enable */ + +#define TIM_OC2M ((uint16_t)0x7000) /* OC2M[2:0] bits (Output Compare 2 Mode) */ +#define TIM_OC2M_0 ((uint16_t)0x1000) /* Bit 0 */ +#define TIM_OC2M_1 ((uint16_t)0x2000) /* Bit 1 */ +#define TIM_OC2M_2 ((uint16_t)0x4000) /* Bit 2 */ + +#define TIM_OC2CE ((uint16_t)0x8000) /* Output Compare 2 Clear Enable */ + + +#define TIM_IC1PSC ((uint16_t)0x000C) /* IC1PSC[1:0] bits (Input Capture 1 Prescaler) */ +#define TIM_IC1PSC_0 ((uint16_t)0x0004) /* Bit 0 */ +#define TIM_IC1PSC_1 ((uint16_t)0x0008) /* Bit 1 */ + +#define TIM_IC1F ((uint16_t)0x00F0) /* IC1F[3:0] bits (Input Capture 1 Filter) */ +#define TIM_IC1F_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_IC1F_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_IC1F_2 ((uint16_t)0x0040) /* Bit 2 */ +#define TIM_IC1F_3 ((uint16_t)0x0080) /* Bit 3 */ + +#define TIM_IC2PSC ((uint16_t)0x0C00) /* IC2PSC[1:0] bits (Input Capture 2 Prescaler) */ +#define TIM_IC2PSC_0 ((uint16_t)0x0400) /* Bit 0 */ +#define TIM_IC2PSC_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define TIM_IC2F ((uint16_t)0xF000) /* IC2F[3:0] bits (Input Capture 2 Filter) */ +#define TIM_IC2F_0 ((uint16_t)0x1000) /* Bit 0 */ +#define TIM_IC2F_1 ((uint16_t)0x2000) /* Bit 1 */ +#define TIM_IC2F_2 ((uint16_t)0x4000) /* Bit 2 */ +#define TIM_IC2F_3 ((uint16_t)0x8000) /* Bit 3 */ + +/****************** Bit definition for TIM_CHCTLR2 register *******************/ +#define TIM_CC3S ((uint16_t)0x0003) /* CC3S[1:0] bits (Capture/Compare 3 Selection) */ +#define TIM_CC3S_0 ((uint16_t)0x0001) /* Bit 0 */ +#define TIM_CC3S_1 ((uint16_t)0x0002) /* Bit 1 */ + +#define TIM_OC3FE ((uint16_t)0x0004) /* Output Compare 3 Fast enable */ +#define TIM_OC3PE ((uint16_t)0x0008) /* Output Compare 3 Preload enable */ + +#define TIM_OC3M ((uint16_t)0x0070) /* OC3M[2:0] bits (Output Compare 3 Mode) */ +#define TIM_OC3M_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_OC3M_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_OC3M_2 ((uint16_t)0x0040) /* Bit 2 */ + +#define TIM_OC3CE ((uint16_t)0x0080) /* Output Compare 3 Clear Enable */ + +#define TIM_CC4S ((uint16_t)0x0300) /* CC4S[1:0] bits (Capture/Compare 4 Selection) */ +#define TIM_CC4S_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_CC4S_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define TIM_OC4FE ((uint16_t)0x0400) /* Output Compare 4 Fast enable */ +#define TIM_OC4PE ((uint16_t)0x0800) /* Output Compare 4 Preload enable */ + +#define TIM_OC4M ((uint16_t)0x7000) /* OC4M[2:0] bits (Output Compare 4 Mode) */ +#define TIM_OC4M_0 ((uint16_t)0x1000) /* Bit 0 */ +#define TIM_OC4M_1 ((uint16_t)0x2000) /* Bit 1 */ +#define TIM_OC4M_2 ((uint16_t)0x4000) /* Bit 2 */ + +#define TIM_OC4CE ((uint16_t)0x8000) /* Output Compare 4 Clear Enable */ + + +#define TIM_IC3PSC ((uint16_t)0x000C) /* IC3PSC[1:0] bits (Input Capture 3 Prescaler) */ +#define TIM_IC3PSC_0 ((uint16_t)0x0004) /* Bit 0 */ +#define TIM_IC3PSC_1 ((uint16_t)0x0008) /* Bit 1 */ + +#define TIM_IC3F ((uint16_t)0x00F0) /* IC3F[3:0] bits (Input Capture 3 Filter) */ +#define TIM_IC3F_0 ((uint16_t)0x0010) /* Bit 0 */ +#define TIM_IC3F_1 ((uint16_t)0x0020) /* Bit 1 */ +#define TIM_IC3F_2 ((uint16_t)0x0040) /* Bit 2 */ +#define TIM_IC3F_3 ((uint16_t)0x0080) /* Bit 3 */ + +#define TIM_IC4PSC ((uint16_t)0x0C00) /* IC4PSC[1:0] bits (Input Capture 4 Prescaler) */ +#define TIM_IC4PSC_0 ((uint16_t)0x0400) /* Bit 0 */ +#define TIM_IC4PSC_1 ((uint16_t)0x0800) /* Bit 1 */ + +#define TIM_IC4F ((uint16_t)0xF000) /* IC4F[3:0] bits (Input Capture 4 Filter) */ +#define TIM_IC4F_0 ((uint16_t)0x1000) /* Bit 0 */ +#define TIM_IC4F_1 ((uint16_t)0x2000) /* Bit 1 */ +#define TIM_IC4F_2 ((uint16_t)0x4000) /* Bit 2 */ +#define TIM_IC4F_3 ((uint16_t)0x8000) /* Bit 3 */ + +/******************* Bit definition for TIM_CCER register *******************/ +#define TIM_CC1E ((uint16_t)0x0001) /* Capture/Compare 1 output enable */ +#define TIM_CC1P ((uint16_t)0x0002) /* Capture/Compare 1 output Polarity */ +#define TIM_CC1NE ((uint16_t)0x0004) /* Capture/Compare 1 Complementary output enable */ +#define TIM_CC1NP ((uint16_t)0x0008) /* Capture/Compare 1 Complementary output Polarity */ +#define TIM_CC2E ((uint16_t)0x0010) /* Capture/Compare 2 output enable */ +#define TIM_CC2P ((uint16_t)0x0020) /* Capture/Compare 2 output Polarity */ +#define TIM_CC2NE ((uint16_t)0x0040) /* Capture/Compare 2 Complementary output enable */ +#define TIM_CC2NP ((uint16_t)0x0080) /* Capture/Compare 2 Complementary output Polarity */ +#define TIM_CC3E ((uint16_t)0x0100) /* Capture/Compare 3 output enable */ +#define TIM_CC3P ((uint16_t)0x0200) /* Capture/Compare 3 output Polarity */ +#define TIM_CC3NE ((uint16_t)0x0400) /* Capture/Compare 3 Complementary output enable */ +#define TIM_CC3NP ((uint16_t)0x0800) /* Capture/Compare 3 Complementary output Polarity */ +#define TIM_CC4E ((uint16_t)0x1000) /* Capture/Compare 4 output enable */ +#define TIM_CC4P ((uint16_t)0x2000) /* Capture/Compare 4 output Polarity */ +#define TIM_CC4NP ((uint16_t)0x8000) /* Capture/Compare 4 Complementary output Polarity */ + +/******************* Bit definition for TIM_CNT register ********************/ +#define TIM_CNT ((uint16_t)0xFFFF) /* Counter Value */ + +/******************* Bit definition for TIM_PSC register ********************/ +#define TIM_PSC ((uint16_t)0xFFFF) /* Prescaler Value */ + +/******************* Bit definition for TIM_ATRLR register ********************/ +#define TIM_ARR ((uint16_t)0xFFFF) /* actual auto-reload Value */ + +/******************* Bit definition for TIM_RPTCR register ********************/ +#define TIM_REP ((uint8_t)0xFF) /* Repetition Counter Value */ + +/******************* Bit definition for TIM_CH1CVR register *******************/ +#define TIM_CCR1 ((uint16_t)0xFFFF) /* Capture/Compare 1 Value */ + +/******************* Bit definition for TIM_CH2CVR register *******************/ +#define TIM_CCR2 ((uint16_t)0xFFFF) /* Capture/Compare 2 Value */ + +/******************* Bit definition for TIM_CH3CVR register *******************/ +#define TIM_CCR3 ((uint16_t)0xFFFF) /* Capture/Compare 3 Value */ + +/******************* Bit definition for TIM_CH4CVR register *******************/ +#define TIM_CCR4 ((uint16_t)0xFFFF) /* Capture/Compare 4 Value */ + +/******************* Bit definition for TIM_BDTR register *******************/ +#define TIM_DTG ((uint16_t)0x00FF) /* DTG[0:7] bits (Dead-Time Generator set-up) */ +#define TIM_DTG_0 ((uint16_t)0x0001) /* Bit 0 */ +#define TIM_DTG_1 ((uint16_t)0x0002) /* Bit 1 */ +#define TIM_DTG_2 ((uint16_t)0x0004) /* Bit 2 */ +#define TIM_DTG_3 ((uint16_t)0x0008) /* Bit 3 */ +#define TIM_DTG_4 ((uint16_t)0x0010) /* Bit 4 */ +#define TIM_DTG_5 ((uint16_t)0x0020) /* Bit 5 */ +#define TIM_DTG_6 ((uint16_t)0x0040) /* Bit 6 */ +#define TIM_DTG_7 ((uint16_t)0x0080) /* Bit 7 */ + +#define TIM_LOCK ((uint16_t)0x0300) /* LOCK[1:0] bits (Lock Configuration) */ +#define TIM_LOCK_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_LOCK_1 ((uint16_t)0x0200) /* Bit 1 */ + +#define TIM_OSSI ((uint16_t)0x0400) /* Off-State Selection for Idle mode */ +#define TIM_OSSR ((uint16_t)0x0800) /* Off-State Selection for Run mode */ +#define TIM_BKE ((uint16_t)0x1000) /* Break enable */ +#define TIM_BKP ((uint16_t)0x2000) /* Break Polarity */ +#define TIM_AOE ((uint16_t)0x4000) /* Automatic Output enable */ +#define TIM_MOE ((uint16_t)0x8000) /* Main Output enable */ + +/******************* Bit definition for TIM_DMACFGR register ********************/ +#define TIM_DBA ((uint16_t)0x001F) /* DBA[4:0] bits (DMA Base Address) */ +#define TIM_DBA_0 ((uint16_t)0x0001) /* Bit 0 */ +#define TIM_DBA_1 ((uint16_t)0x0002) /* Bit 1 */ +#define TIM_DBA_2 ((uint16_t)0x0004) /* Bit 2 */ +#define TIM_DBA_3 ((uint16_t)0x0008) /* Bit 3 */ +#define TIM_DBA_4 ((uint16_t)0x0010) /* Bit 4 */ + +#define TIM_DBL ((uint16_t)0x1F00) /* DBL[4:0] bits (DMA Burst Length) */ +#define TIM_DBL_0 ((uint16_t)0x0100) /* Bit 0 */ +#define TIM_DBL_1 ((uint16_t)0x0200) /* Bit 1 */ +#define TIM_DBL_2 ((uint16_t)0x0400) /* Bit 2 */ +#define TIM_DBL_3 ((uint16_t)0x0800) /* Bit 3 */ +#define TIM_DBL_4 ((uint16_t)0x1000) /* Bit 4 */ + +/******************* Bit definition for TIM_DMAADR register *******************/ +#define TIM_DMAR_DMAB ((uint16_t)0xFFFF) /* DMA register for burst accesses */ + +/******************************************************************************/ +/* Universal Synchronous Asynchronous Receiver Transmitter */ +/******************************************************************************/ + +/******************* Bit definition for USART_STATR register *******************/ +#define USART_STATR_PE ((uint16_t)0x0001) /* Parity Error */ +#define USART_STATR_FE ((uint16_t)0x0002) /* Framing Error */ +#define USART_STATR_NE ((uint16_t)0x0004) /* Noise Error Flag */ +#define USART_STATR_ORE ((uint16_t)0x0008) /* OverRun Error */ +#define USART_STATR_IDLE ((uint16_t)0x0010) /* IDLE line detected */ +#define USART_STATR_RXNE ((uint16_t)0x0020) /* Read Data Register Not Empty */ +#define USART_STATR_TC ((uint16_t)0x0040) /* Transmission Complete */ +#define USART_STATR_TXE ((uint16_t)0x0080) /* Transmit Data Register Empty */ +#define USART_STATR_LBD ((uint16_t)0x0100) /* LIN Break Detection Flag */ +#define USART_STATR_CTS ((uint16_t)0x0200) /* CTS Flag */ + +/******************* Bit definition for USART_DATAR register *******************/ +#define USART_DATAR_DR ((uint16_t)0x01FF) /* Data value */ + +/****************** Bit definition for USART_BRR register *******************/ +#define USART_BRR_DIV_Fraction ((uint16_t)0x000F) /* Fraction of USARTDIV */ +#define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) /* Mantissa of USARTDIV */ + +/****************** Bit definition for USART_CTLR1 register *******************/ +#define USART_CTLR1_SBK ((uint16_t)0x0001) /* Send Break */ +#define USART_CTLR1_RWU ((uint16_t)0x0002) /* Receiver wakeup */ +#define USART_CTLR1_RE ((uint16_t)0x0004) /* Receiver Enable */ +#define USART_CTLR1_TE ((uint16_t)0x0008) /* Transmitter Enable */ +#define USART_CTLR1_IDLEIE ((uint16_t)0x0010) /* IDLE Interrupt Enable */ +#define USART_CTLR1_RXNEIE ((uint16_t)0x0020) /* RXNE Interrupt Enable */ +#define USART_CTLR1_TCIE ((uint16_t)0x0040) /* Transmission Complete Interrupt Enable */ +#define USART_CTLR1_TXEIE ((uint16_t)0x0080) /* PE Interrupt Enable */ +#define USART_CTLR1_PEIE ((uint16_t)0x0100) /* PE Interrupt Enable */ +#define USART_CTLR1_PS ((uint16_t)0x0200) /* Parity Selection */ +#define USART_CTLR1_PCE ((uint16_t)0x0400) /* Parity Control Enable */ +#define USART_CTLR1_WAKE ((uint16_t)0x0800) /* Wakeup method */ +#define USART_CTLR1_M ((uint16_t)0x1000) /* Word length */ +#define USART_CTLR1_UE ((uint16_t)0x2000) /* USART Enable */ +#define USART_CTLR1_OVER8 ((uint16_t)0x8000) /* USART Oversmapling 8-bits */ + +/****************** Bit definition for USART_CTLR2 register *******************/ +#define USART_CTLR2_ADD ((uint16_t)0x000F) /* Address of the USART node */ +#define USART_CTLR2_LBDL ((uint16_t)0x0020) /* LIN Break Detection Length */ +#define USART_CTLR2_LBDIE ((uint16_t)0x0040) /* LIN Break Detection Interrupt Enable */ +#define USART_CTLR2_LBCL ((uint16_t)0x0100) /* Last Bit Clock pulse */ +#define USART_CTLR2_CPHA ((uint16_t)0x0200) /* Clock Phase */ +#define USART_CTLR2_CPOL ((uint16_t)0x0400) /* Clock Polarity */ +#define USART_CTLR2_CLKEN ((uint16_t)0x0800) /* Clock Enable */ + +#define USART_CTLR2_STOP ((uint16_t)0x3000) /* STOP[1:0] bits (STOP bits) */ +#define USART_CTLR2_STOP_0 ((uint16_t)0x1000) /* Bit 0 */ +#define USART_CTLR2_STOP_1 ((uint16_t)0x2000) /* Bit 1 */ + +#define USART_CTLR2_LINEN ((uint16_t)0x4000) /* LIN mode enable */ + +/****************** Bit definition for USART_CTLR3 register *******************/ +#define USART_CTLR3_EIE ((uint16_t)0x0001) /* Error Interrupt Enable */ +#define USART_CTLR3_IREN ((uint16_t)0x0002) /* IrDA mode Enable */ +#define USART_CTLR3_IRLP ((uint16_t)0x0004) /* IrDA Low-Power */ +#define USART_CTLR3_HDSEL ((uint16_t)0x0008) /* Half-Duplex Selection */ +#define USART_CTLR3_NACK ((uint16_t)0x0010) /* Smartcard NACK enable */ +#define USART_CTLR3_SCEN ((uint16_t)0x0020) /* Smartcard mode enable */ +#define USART_CTLR3_DMAR ((uint16_t)0x0040) /* DMA Enable Receiver */ +#define USART_CTLR3_DMAT ((uint16_t)0x0080) /* DMA Enable Transmitter */ +#define USART_CTLR3_RTSE ((uint16_t)0x0100) /* RTS Enable */ +#define USART_CTLR3_CTSE ((uint16_t)0x0200) /* CTS Enable */ +#define USART_CTLR3_CTSIE ((uint16_t)0x0400) /* CTS Interrupt Enable */ +#define USART_CTLR3_ONEBIT ((uint16_t)0x0800) /* One Bit method */ + +/****************** Bit definition for USART_GPR register ******************/ +#define USART_GPR_PSC ((uint16_t)0x00FF) /* PSC[7:0] bits (Prescaler value) */ +#define USART_GPR_PSC_0 ((uint16_t)0x0001) /* Bit 0 */ +#define USART_GPR_PSC_1 ((uint16_t)0x0002) /* Bit 1 */ +#define USART_GPR_PSC_2 ((uint16_t)0x0004) /* Bit 2 */ +#define USART_GPR_PSC_3 ((uint16_t)0x0008) /* Bit 3 */ +#define USART_GPR_PSC_4 ((uint16_t)0x0010) /* Bit 4 */ +#define USART_GPR_PSC_5 ((uint16_t)0x0020) /* Bit 5 */ +#define USART_GPR_PSC_6 ((uint16_t)0x0040) /* Bit 6 */ +#define USART_GPR_PSC_7 ((uint16_t)0x0080) /* Bit 7 */ + +#define USART_GPR_GT ((uint16_t)0xFF00) /* Guard time value */ + +/******************************************************************************/ +/* Window WATCHDOG */ +/******************************************************************************/ + +/******************* Bit definition for WWDG_CTLR register ********************/ +#define WWDG_CTLR_T ((uint8_t)0x7F) /* T[6:0] bits (7-Bit counter (MSB to LSB)) */ +#define WWDG_CTLR_T0 ((uint8_t)0x01) /* Bit 0 */ +#define WWDG_CTLR_T1 ((uint8_t)0x02) /* Bit 1 */ +#define WWDG_CTLR_T2 ((uint8_t)0x04) /* Bit 2 */ +#define WWDG_CTLR_T3 ((uint8_t)0x08) /* Bit 3 */ +#define WWDG_CTLR_T4 ((uint8_t)0x10) /* Bit 4 */ +#define WWDG_CTLR_T5 ((uint8_t)0x20) /* Bit 5 */ +#define WWDG_CTLR_T6 ((uint8_t)0x40) /* Bit 6 */ + +#define WWDG_CTLR_WDGA ((uint8_t)0x80) /* Activation bit */ + +/******************* Bit definition for WWDG_CFGR register *******************/ +#define WWDG_CFGR_W ((uint16_t)0x007F) /* W[6:0] bits (7-bit window value) */ +#define WWDG_CFGR_W0 ((uint16_t)0x0001) /* Bit 0 */ +#define WWDG_CFGR_W1 ((uint16_t)0x0002) /* Bit 1 */ +#define WWDG_CFGR_W2 ((uint16_t)0x0004) /* Bit 2 */ +#define WWDG_CFGR_W3 ((uint16_t)0x0008) /* Bit 3 */ +#define WWDG_CFGR_W4 ((uint16_t)0x0010) /* Bit 4 */ +#define WWDG_CFGR_W5 ((uint16_t)0x0020) /* Bit 5 */ +#define WWDG_CFGR_W6 ((uint16_t)0x0040) /* Bit 6 */ + +#define WWDG_CFGR_WDGTB ((uint16_t)0x0180) /* WDGTB[1:0] bits (Timer Base) */ +#define WWDG_CFGR_WDGTB0 ((uint16_t)0x0080) /* Bit 0 */ +#define WWDG_CFGR_WDGTB1 ((uint16_t)0x0100) /* Bit 1 */ + +#define WWDG_CFGR_EWI ((uint16_t)0x0200) /* Early Wakeup Interrupt */ + +/******************* Bit definition for WWDG_STATR register ********************/ +#define WWDG_STATR_EWIF ((uint8_t)0x01) /* Early Wakeup Interrupt Flag */ + +/******************************************************************************/ +/* ENHANCED FUNNCTION */ +/******************************************************************************/ + +/**************************** Enhanced register *****************************/ +#define EXTEN_USBD_LS ((uint32_t)0x00000001) /* Bit 0 */ +#define EXTEN_USBD_PU_EN ((uint32_t)0x00000002) /* Bit 1 */ +#define EXTEN_USBHD_IO_EN ((uint32_t)0x00000004) /* Bit 2 */ +#define EXTEN_USB_5V_SEL ((uint32_t)0x00000008) /* Bit 3 */ +#define EXTEN_PLL_HSI_PRE ((uint32_t)0x00000010) /* Bit 4 */ +#define EXTEN_LOCKUP_EN ((uint32_t)0x00000040) /* Bit 5 */ +#define EXTEN_LOCKUP_RSTF ((uint32_t)0x00000080) /* Bit 7 */ + +#define EXTEN_ULLDO_TRIM ((uint32_t)0x00000300) /* ULLDO_TRIM[1:0] bits */ +#define EXTEN_ULLDO_TRIM0 ((uint32_t)0x00000100) /* Bit 0 */ +#define EXTEN_ULLDO_TRIM1 ((uint32_t)0x00000200) /* Bit 1 */ + +#define EXTEN_IDO_TRIM ((uint32_t)0x00000400) /* Bit 10 */ +#define EXTEN_WRITE_EN ((uint32_t)0x00004000) /* Bit 14 */ +#define EXTEN_SHORT_WAKE ((uint32_t)0x00008000) /* Bit 15 */ + +#define EXTEN_FLASH_CLK_TRIM ((uint32_t)0x00070000) /* FLASH_CLK_TRIM[2:0] bits */ +#define EXTEN_FLASH_CLK_TRIM0 ((uint32_t)0x00010000) /* Bit 0 */ +#define EXTEN_FLASH_CLK_TRIM1 ((uint32_t)0x00020000) /* Bit 1 */ +#define EXTEN_FLASH_CLK_TRIM2 ((uint32_t)0x00040000) /* Bit 2 */ + + + +#include "ch32v10x_conf.h" + + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_H */ + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_adc.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_adc.h new file mode 100644 index 0000000000..6599f129d9 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_adc.h @@ -0,0 +1,193 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_adc.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* ADC firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_ADC_H +#define __CH32V10x_ADC_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +/* ADC Init structure definition */ +typedef struct +{ + uint32_t ADC_Mode; /* Configures the ADC to operate in independent or + dual mode. + This parameter can be a value of @ref ADC_mode */ + + FunctionalState ADC_ScanConvMode; /* Specifies whether the conversion is performed in + Scan (multichannels) or Single (one channel) mode. + This parameter can be set to ENABLE or DISABLE */ + + FunctionalState ADC_ContinuousConvMode; /* Specifies whether the conversion is performed in + Continuous or Single mode. + This parameter can be set to ENABLE or DISABLE. */ + + uint32_t ADC_ExternalTrigConv; /* Defines the external trigger used to start the analog + to digital conversion of regular channels. This parameter + can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ + + uint32_t ADC_DataAlign; /* Specifies whether the ADC data alignment is left or right. + This parameter can be a value of @ref ADC_data_align */ + + uint8_t ADC_NbrOfChannel; /* Specifies the number of ADC channels that will be converted + using the sequencer for regular channel group. + This parameter must range from 1 to 16. */ +}ADC_InitTypeDef; + +/* ADC_mode */ +#define ADC_Mode_Independent ((uint32_t)0x00000000) +#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) +#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) +#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) +#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) +#define ADC_Mode_InjecSimult ((uint32_t)0x00050000) +#define ADC_Mode_RegSimult ((uint32_t)0x00060000) +#define ADC_Mode_FastInterl ((uint32_t)0x00070000) +#define ADC_Mode_SlowInterl ((uint32_t)0x00080000) +#define ADC_Mode_AlterTrig ((uint32_t)0x00090000) + +/* ADC_external_trigger_sources_for_regular_channels_conversion */ +#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) +#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) +#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) +#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) +#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) +#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) + +#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) +#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) + +/* ADC_data_align */ +#define ADC_DataAlign_Right ((uint32_t)0x00000000) +#define ADC_DataAlign_Left ((uint32_t)0x00000800) + +/* ADC_channels */ +#define ADC_Channel_0 ((uint8_t)0x00) +#define ADC_Channel_1 ((uint8_t)0x01) +#define ADC_Channel_2 ((uint8_t)0x02) +#define ADC_Channel_3 ((uint8_t)0x03) +#define ADC_Channel_4 ((uint8_t)0x04) +#define ADC_Channel_5 ((uint8_t)0x05) +#define ADC_Channel_6 ((uint8_t)0x06) +#define ADC_Channel_7 ((uint8_t)0x07) +#define ADC_Channel_8 ((uint8_t)0x08) +#define ADC_Channel_9 ((uint8_t)0x09) +#define ADC_Channel_10 ((uint8_t)0x0A) +#define ADC_Channel_11 ((uint8_t)0x0B) +#define ADC_Channel_12 ((uint8_t)0x0C) +#define ADC_Channel_13 ((uint8_t)0x0D) +#define ADC_Channel_14 ((uint8_t)0x0E) +#define ADC_Channel_15 ((uint8_t)0x0F) +#define ADC_Channel_16 ((uint8_t)0x10) +#define ADC_Channel_17 ((uint8_t)0x11) + +#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) +#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) + +/* ADC_sampling_time */ +#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) +#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) +#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) +#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) +#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) +#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) +#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) +#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) + +/* ADC_external_trigger_sources_for_injected_channels_conversion */ +#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) +#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) +#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) +#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) +#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) + +#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) +#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) +#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) + +/* ADC_injected_channel_selection */ +#define ADC_InjectedChannel_1 ((uint8_t)0x14) +#define ADC_InjectedChannel_2 ((uint8_t)0x18) +#define ADC_InjectedChannel_3 ((uint8_t)0x1C) +#define ADC_InjectedChannel_4 ((uint8_t)0x20) + +/* ADC_analog_watchdog_selection */ +#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) +#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) +#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) +#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) +#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) +#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) +#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) + +/* ADC_interrupts_definition */ +#define ADC_IT_EOC ((uint16_t)0x0220) +#define ADC_IT_AWD ((uint16_t)0x0140) +#define ADC_IT_JEOC ((uint16_t)0x0480) + +/* ADC_flags_definition */ +#define ADC_FLAG_AWD ((uint8_t)0x01) +#define ADC_FLAG_EOC ((uint8_t)0x02) +#define ADC_FLAG_JEOC ((uint8_t)0x04) +#define ADC_FLAG_JSTRT ((uint8_t)0x08) +#define ADC_FLAG_STRT ((uint8_t)0x10) + + +void ADC_DeInit(ADC_TypeDef* ADCx); +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); +void ADC_ResetCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_StartCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); +uint32_t ADC_GetDualModeConversionValue(void); +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); +void ADC_TempSensorVrefintCmd(FunctionalState NewState); +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); +s32 TempSensor_Volt_To_Temper(s32 Value); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_ADC_H */ + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_bkp.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_bkp.h new file mode 100644 index 0000000000..7024e68e42 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_bkp.h @@ -0,0 +1,95 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_bkp.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* BKP firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_BKP_H +#define __CH32V10x_BKP_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* Tamper_Pin_active_level */ +#define BKP_TamperPinLevel_High ((uint16_t)0x0000) +#define BKP_TamperPinLevel_Low ((uint16_t)0x0001) + +/* RTC_output_source_to_output_on_the_Tamper_pin */ +#define BKP_RTCOutputSource_None ((uint16_t)0x0000) +#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) +#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) +#define BKP_RTCOutputSource_Second ((uint16_t)0x0300) + +/* Data_Backup_Register */ +#define BKP_DR1 ((uint16_t)0x0004) +#define BKP_DR2 ((uint16_t)0x0008) +#define BKP_DR3 ((uint16_t)0x000C) +#define BKP_DR4 ((uint16_t)0x0010) +#define BKP_DR5 ((uint16_t)0x0014) +#define BKP_DR6 ((uint16_t)0x0018) +#define BKP_DR7 ((uint16_t)0x001C) +#define BKP_DR8 ((uint16_t)0x0020) +#define BKP_DR9 ((uint16_t)0x0024) +#define BKP_DR10 ((uint16_t)0x0028) +#define BKP_DR11 ((uint16_t)0x0040) +#define BKP_DR12 ((uint16_t)0x0044) +#define BKP_DR13 ((uint16_t)0x0048) +#define BKP_DR14 ((uint16_t)0x004C) +#define BKP_DR15 ((uint16_t)0x0050) +#define BKP_DR16 ((uint16_t)0x0054) +#define BKP_DR17 ((uint16_t)0x0058) +#define BKP_DR18 ((uint16_t)0x005C) +#define BKP_DR19 ((uint16_t)0x0060) +#define BKP_DR20 ((uint16_t)0x0064) +#define BKP_DR21 ((uint16_t)0x0068) +#define BKP_DR22 ((uint16_t)0x006C) +#define BKP_DR23 ((uint16_t)0x0070) +#define BKP_DR24 ((uint16_t)0x0074) +#define BKP_DR25 ((uint16_t)0x0078) +#define BKP_DR26 ((uint16_t)0x007C) +#define BKP_DR27 ((uint16_t)0x0080) +#define BKP_DR28 ((uint16_t)0x0084) +#define BKP_DR29 ((uint16_t)0x0088) +#define BKP_DR30 ((uint16_t)0x008C) +#define BKP_DR31 ((uint16_t)0x0090) +#define BKP_DR32 ((uint16_t)0x0094) +#define BKP_DR33 ((uint16_t)0x0098) +#define BKP_DR34 ((uint16_t)0x009C) +#define BKP_DR35 ((uint16_t)0x00A0) +#define BKP_DR36 ((uint16_t)0x00A4) +#define BKP_DR37 ((uint16_t)0x00A8) +#define BKP_DR38 ((uint16_t)0x00AC) +#define BKP_DR39 ((uint16_t)0x00B0) +#define BKP_DR40 ((uint16_t)0x00B4) +#define BKP_DR41 ((uint16_t)0x00B8) +#define BKP_DR42 ((uint16_t)0x00BC) + + +void BKP_DeInit(void); +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); +void BKP_TamperPinCmd(FunctionalState NewState); +void BKP_ITConfig(FunctionalState NewState); +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); +FlagStatus BKP_GetFlagStatus(void); +void BKP_ClearFlag(void); +ITStatus BKP_GetITStatus(void); +void BKP_ClearITPendingBit(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_BKP_H */ + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_crc.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_crc.h new file mode 100644 index 0000000000..b31768dee9 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_crc.h @@ -0,0 +1,35 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_crc.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* CRC firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_CRC_H +#define __CH32V10x_CRC_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +void CRC_ResetDR(void); +uint32_t CRC_CalcCRC(uint32_t Data); +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); +uint32_t CRC_GetCRC(void); +void CRC_SetIDRegister(uint8_t IDValue); +uint8_t CRC_GetIDRegister(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_CRC_H */ + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dbgmcu.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dbgmcu.h new file mode 100644 index 0000000000..4ae1a2bbc6 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dbgmcu.h @@ -0,0 +1,48 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_dbgmcu.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* DBGMCU firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_DBGMCU_H +#define __CH32V10x_DBGMCU_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +/* CFGR0 Register */ +#define DBGMCU_IWDG_STOP ((uint32_t)0x00000001) +#define DBGMCU_WWDG_STOP ((uint32_t)0x00000002) +#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00000004) +#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00000008) +#define DBGMCU_TIM1_STOP ((uint32_t)0x00000010) +#define DBGMCU_TIM2_STOP ((uint32_t)0x00000020) +#define DBGMCU_TIM3_STOP ((uint32_t)0x00000040) +#define DBGMCU_TIM4_STOP ((uint32_t)0x00000080) + +/* CFGR1 Register */ +#define DBGMCU_SLEEP ((uint32_t)0x00000001) +#define DBGMCU_STOP ((uint32_t)0x00000002) +#define DBGMCU_STANDBY ((uint32_t)0x00000004) + + +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_DBGMCU_H */ + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dma.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dma.h new file mode 100644 index 0000000000..f83ad86b81 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_dma.h @@ -0,0 +1,216 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_dma.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* DMA firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_DMA_H +#define __CH32V10x_DMA_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* DMA Init structure definition */ +typedef struct +{ + uint32_t DMA_PeripheralBaseAddr; /* Specifies the peripheral base address for DMAy Channelx. */ + + uint32_t DMA_MemoryBaseAddr; /* Specifies the memory base address for DMAy Channelx. */ + + uint32_t DMA_DIR; /* Specifies if the peripheral is the source or destination. + This parameter can be a value of @ref DMA_data_transfer_direction */ + + uint32_t DMA_BufferSize; /* Specifies the buffer size, in data unit, of the specified Channel. + The data unit is equal to the configuration set in DMA_PeripheralDataSize + or DMA_MemoryDataSize members depending in the transfer direction. */ + + uint32_t DMA_PeripheralInc; /* Specifies whether the Peripheral address register is incremented or not. + This parameter can be a value of @ref DMA_peripheral_incremented_mode */ + + uint32_t DMA_MemoryInc; /* Specifies whether the memory address register is incremented or not. + This parameter can be a value of @ref DMA_memory_incremented_mode */ + + uint32_t DMA_PeripheralDataSize; /* Specifies the Peripheral data width. + This parameter can be a value of @ref DMA_peripheral_data_size */ + + uint32_t DMA_MemoryDataSize; /* Specifies the Memory data width. + This parameter can be a value of @ref DMA_memory_data_size */ + + uint32_t DMA_Mode; /* Specifies the operation mode of the DMAy Channelx. + This parameter can be a value of @ref DMA_circular_normal_mode. + @note: The circular buffer mode cannot be used if the memory-to-memory + data transfer is configured on the selected Channel */ + + uint32_t DMA_Priority; /* Specifies the software priority for the DMAy Channelx. + This parameter can be a value of @ref DMA_priority_level */ + + uint32_t DMA_M2M; /* Specifies if the DMAy Channelx will be used in memory-to-memory transfer. + This parameter can be a value of @ref DMA_memory_to_memory */ +}DMA_InitTypeDef; + +/* DMA_data_transfer_direction */ +#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) +#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) + +/* DMA_peripheral_incremented_mode */ +#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) +#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) + +/* DMA_memory_incremented_mode */ +#define DMA_MemoryInc_Enable ((uint32_t)0x00000080) +#define DMA_MemoryInc_Disable ((uint32_t)0x00000000) + +/* DMA_peripheral_data_size */ +#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) +#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) +#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) + +/* DMA_memory_data_size */ +#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) +#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) +#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) + +/* DMA_circular_normal_mode */ +#define DMA_Mode_Circular ((uint32_t)0x00000020) +#define DMA_Mode_Normal ((uint32_t)0x00000000) + +/* DMA_priority_level */ +#define DMA_Priority_VeryHigh ((uint32_t)0x00003000) +#define DMA_Priority_High ((uint32_t)0x00002000) +#define DMA_Priority_Medium ((uint32_t)0x00001000) +#define DMA_Priority_Low ((uint32_t)0x00000000) + +/* DMA_memory_to_memory */ +#define DMA_M2M_Enable ((uint32_t)0x00004000) +#define DMA_M2M_Disable ((uint32_t)0x00000000) + +/* DMA_interrupts_definition */ +#define DMA_IT_TC ((uint32_t)0x00000002) +#define DMA_IT_HT ((uint32_t)0x00000004) +#define DMA_IT_TE ((uint32_t)0x00000008) + +#define DMA1_IT_GL1 ((uint32_t)0x00000001) +#define DMA1_IT_TC1 ((uint32_t)0x00000002) +#define DMA1_IT_HT1 ((uint32_t)0x00000004) +#define DMA1_IT_TE1 ((uint32_t)0x00000008) +#define DMA1_IT_GL2 ((uint32_t)0x00000010) +#define DMA1_IT_TC2 ((uint32_t)0x00000020) +#define DMA1_IT_HT2 ((uint32_t)0x00000040) +#define DMA1_IT_TE2 ((uint32_t)0x00000080) +#define DMA1_IT_GL3 ((uint32_t)0x00000100) +#define DMA1_IT_TC3 ((uint32_t)0x00000200) +#define DMA1_IT_HT3 ((uint32_t)0x00000400) +#define DMA1_IT_TE3 ((uint32_t)0x00000800) +#define DMA1_IT_GL4 ((uint32_t)0x00001000) +#define DMA1_IT_TC4 ((uint32_t)0x00002000) +#define DMA1_IT_HT4 ((uint32_t)0x00004000) +#define DMA1_IT_TE4 ((uint32_t)0x00008000) +#define DMA1_IT_GL5 ((uint32_t)0x00010000) +#define DMA1_IT_TC5 ((uint32_t)0x00020000) +#define DMA1_IT_HT5 ((uint32_t)0x00040000) +#define DMA1_IT_TE5 ((uint32_t)0x00080000) +#define DMA1_IT_GL6 ((uint32_t)0x00100000) +#define DMA1_IT_TC6 ((uint32_t)0x00200000) +#define DMA1_IT_HT6 ((uint32_t)0x00400000) +#define DMA1_IT_TE6 ((uint32_t)0x00800000) +#define DMA1_IT_GL7 ((uint32_t)0x01000000) +#define DMA1_IT_TC7 ((uint32_t)0x02000000) +#define DMA1_IT_HT7 ((uint32_t)0x04000000) +#define DMA1_IT_TE7 ((uint32_t)0x08000000) + +#define DMA2_IT_GL1 ((uint32_t)0x10000001) +#define DMA2_IT_TC1 ((uint32_t)0x10000002) +#define DMA2_IT_HT1 ((uint32_t)0x10000004) +#define DMA2_IT_TE1 ((uint32_t)0x10000008) +#define DMA2_IT_GL2 ((uint32_t)0x10000010) +#define DMA2_IT_TC2 ((uint32_t)0x10000020) +#define DMA2_IT_HT2 ((uint32_t)0x10000040) +#define DMA2_IT_TE2 ((uint32_t)0x10000080) +#define DMA2_IT_GL3 ((uint32_t)0x10000100) +#define DMA2_IT_TC3 ((uint32_t)0x10000200) +#define DMA2_IT_HT3 ((uint32_t)0x10000400) +#define DMA2_IT_TE3 ((uint32_t)0x10000800) +#define DMA2_IT_GL4 ((uint32_t)0x10001000) +#define DMA2_IT_TC4 ((uint32_t)0x10002000) +#define DMA2_IT_HT4 ((uint32_t)0x10004000) +#define DMA2_IT_TE4 ((uint32_t)0x10008000) +#define DMA2_IT_GL5 ((uint32_t)0x10010000) +#define DMA2_IT_TC5 ((uint32_t)0x10020000) +#define DMA2_IT_HT5 ((uint32_t)0x10040000) +#define DMA2_IT_TE5 ((uint32_t)0x10080000) + +/* DMA_flags_definition */ +#define DMA1_FLAG_GL1 ((uint32_t)0x00000001) +#define DMA1_FLAG_TC1 ((uint32_t)0x00000002) +#define DMA1_FLAG_HT1 ((uint32_t)0x00000004) +#define DMA1_FLAG_TE1 ((uint32_t)0x00000008) +#define DMA1_FLAG_GL2 ((uint32_t)0x00000010) +#define DMA1_FLAG_TC2 ((uint32_t)0x00000020) +#define DMA1_FLAG_HT2 ((uint32_t)0x00000040) +#define DMA1_FLAG_TE2 ((uint32_t)0x00000080) +#define DMA1_FLAG_GL3 ((uint32_t)0x00000100) +#define DMA1_FLAG_TC3 ((uint32_t)0x00000200) +#define DMA1_FLAG_HT3 ((uint32_t)0x00000400) +#define DMA1_FLAG_TE3 ((uint32_t)0x00000800) +#define DMA1_FLAG_GL4 ((uint32_t)0x00001000) +#define DMA1_FLAG_TC4 ((uint32_t)0x00002000) +#define DMA1_FLAG_HT4 ((uint32_t)0x00004000) +#define DMA1_FLAG_TE4 ((uint32_t)0x00008000) +#define DMA1_FLAG_GL5 ((uint32_t)0x00010000) +#define DMA1_FLAG_TC5 ((uint32_t)0x00020000) +#define DMA1_FLAG_HT5 ((uint32_t)0x00040000) +#define DMA1_FLAG_TE5 ((uint32_t)0x00080000) +#define DMA1_FLAG_GL6 ((uint32_t)0x00100000) +#define DMA1_FLAG_TC6 ((uint32_t)0x00200000) +#define DMA1_FLAG_HT6 ((uint32_t)0x00400000) +#define DMA1_FLAG_TE6 ((uint32_t)0x00800000) +#define DMA1_FLAG_GL7 ((uint32_t)0x01000000) +#define DMA1_FLAG_TC7 ((uint32_t)0x02000000) +#define DMA1_FLAG_HT7 ((uint32_t)0x04000000) +#define DMA1_FLAG_TE7 ((uint32_t)0x08000000) + +#define DMA2_FLAG_GL1 ((uint32_t)0x10000001) +#define DMA2_FLAG_TC1 ((uint32_t)0x10000002) +#define DMA2_FLAG_HT1 ((uint32_t)0x10000004) +#define DMA2_FLAG_TE1 ((uint32_t)0x10000008) +#define DMA2_FLAG_GL2 ((uint32_t)0x10000010) +#define DMA2_FLAG_TC2 ((uint32_t)0x10000020) +#define DMA2_FLAG_HT2 ((uint32_t)0x10000040) +#define DMA2_FLAG_TE2 ((uint32_t)0x10000080) +#define DMA2_FLAG_GL3 ((uint32_t)0x10000100) +#define DMA2_FLAG_TC3 ((uint32_t)0x10000200) +#define DMA2_FLAG_HT3 ((uint32_t)0x10000400) +#define DMA2_FLAG_TE3 ((uint32_t)0x10000800) +#define DMA2_FLAG_GL4 ((uint32_t)0x10001000) +#define DMA2_FLAG_TC4 ((uint32_t)0x10002000) +#define DMA2_FLAG_HT4 ((uint32_t)0x10004000) +#define DMA2_FLAG_TE4 ((uint32_t)0x10008000) +#define DMA2_FLAG_GL5 ((uint32_t)0x10010000) +#define DMA2_FLAG_TC5 ((uint32_t)0x10020000) +#define DMA2_FLAG_HT5 ((uint32_t)0x10040000) +#define DMA2_FLAG_TE5 ((uint32_t)0x10080000) + + +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); +void DMA_ClearFlag(uint32_t DMAy_FLAG); +ITStatus DMA_GetITStatus(uint32_t DMAy_IT); +void DMA_ClearITPendingBit(uint32_t DMAy_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_DMA_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_exti.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_exti.h new file mode 100644 index 0000000000..79c4d2ec62 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_exti.h @@ -0,0 +1,88 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_exti.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* EXTI firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_EXTI_H +#define __CH32V10x_EXTI_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* EXTI mode enumeration */ +typedef enum +{ + EXTI_Mode_Interrupt = 0x00, + EXTI_Mode_Event = 0x04 +}EXTIMode_TypeDef; + +/* EXTI Trigger enumeration */ +typedef enum +{ + EXTI_Trigger_Rising = 0x08, + EXTI_Trigger_Falling = 0x0C, + EXTI_Trigger_Rising_Falling = 0x10 +}EXTITrigger_TypeDef; + +/* EXTI Init Structure definition */ +typedef struct +{ + uint32_t EXTI_Line; /* Specifies the EXTI lines to be enabled or disabled. + This parameter can be any combination of @ref EXTI_Lines */ + + EXTIMode_TypeDef EXTI_Mode; /* Specifies the mode for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + EXTITrigger_TypeDef EXTI_Trigger; /* Specifies the trigger signal active edge for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + FunctionalState EXTI_LineCmd; /* Specifies the new state of the selected EXTI lines. + This parameter can be set either to ENABLE or DISABLE */ +}EXTI_InitTypeDef; + + +/* EXTI_Lines */ +#define EXTI_Line0 ((uint32_t)0x00001) /* External interrupt line 0 */ +#define EXTI_Line1 ((uint32_t)0x00002) /* External interrupt line 1 */ +#define EXTI_Line2 ((uint32_t)0x00004) /* External interrupt line 2 */ +#define EXTI_Line3 ((uint32_t)0x00008) /* External interrupt line 3 */ +#define EXTI_Line4 ((uint32_t)0x00010) /* External interrupt line 4 */ +#define EXTI_Line5 ((uint32_t)0x00020) /* External interrupt line 5 */ +#define EXTI_Line6 ((uint32_t)0x00040) /* External interrupt line 6 */ +#define EXTI_Line7 ((uint32_t)0x00080) /* External interrupt line 7 */ +#define EXTI_Line8 ((uint32_t)0x00100) /* External interrupt line 8 */ +#define EXTI_Line9 ((uint32_t)0x00200) /* External interrupt line 9 */ +#define EXTI_Line10 ((uint32_t)0x00400) /* External interrupt line 10 */ +#define EXTI_Line11 ((uint32_t)0x00800) /* External interrupt line 11 */ +#define EXTI_Line12 ((uint32_t)0x01000) /* External interrupt line 12 */ +#define EXTI_Line13 ((uint32_t)0x02000) /* External interrupt line 13 */ +#define EXTI_Line14 ((uint32_t)0x04000) /* External interrupt line 14 */ +#define EXTI_Line15 ((uint32_t)0x08000) /* External interrupt line 15 */ +#define EXTI_Line16 ((uint32_t)0x10000) /* External interrupt line 16 Connected to the PVD Output */ +#define EXTI_Line17 ((uint32_t)0x20000) /* External interrupt line 17 Connected to the RTC Alarm event */ +#define EXTI_Line18 ((uint32_t)0x40000) /* External interrupt line 18 Connected to the USB Device/USB OTG FS + Wakeup from suspend event */ +#define EXTI_Line19 ((uint32_t)0x80000) /* External interrupt line 19 Connected to the Ethernet Wakeup event */ + + +void EXTI_DeInit(void); +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); +void EXTI_ClearFlag(uint32_t EXTI_Line); +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); +void EXTI_ClearITPendingBit(uint32_t EXTI_Line); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_EXTI_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_flash.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_flash.h new file mode 100644 index 0000000000..31dd06ab84 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_flash.h @@ -0,0 +1,157 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_flash.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the FLASH +* firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_FLASH_H +#define __CH32V10x_FLASH_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* FLASH Status */ +typedef enum +{ + FLASH_BUSY = 1, + FLASH_ERROR_PG, + FLASH_ERROR_WRP, + FLASH_COMPLETE, + FLASH_TIMEOUT +}FLASH_Status; + + +/* Flash_Latency */ +#define FLASH_Latency_0 ((uint32_t)0x00000000) /* FLASH Zero Latency cycle */ +#define FLASH_Latency_1 ((uint32_t)0x00000001) /* FLASH One Latency cycle */ +#define FLASH_Latency_2 ((uint32_t)0x00000002) /* FLASH Two Latency cycles */ + +/* Half_Cycle_Enable_Disable */ +#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /* FLASH Half Cycle Enable */ +#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /* FLASH Half Cycle Disable */ + +/* Prefetch_Buffer_Enable_Disable */ +#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /* FLASH Prefetch Buffer Enable */ +#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /* FLASH Prefetch Buffer Disable */ + +/* Values to be used with CH32V10x Low and Medium density devices */ +#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /* CH32 Low and Medium density devices: Write protection of page 0 to 3 */ +#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /* CH32 Low and Medium density devices: Write protection of page 4 to 7 */ +#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /* CH32 Low and Medium density devices: Write protection of page 8 to 11 */ +#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /* CH32 Low and Medium density devices: Write protection of page 12 to 15 */ +#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /* CH32 Low and Medium density devices: Write protection of page 16 to 19 */ +#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /* CH32 Low and Medium density devices: Write protection of page 20 to 23 */ +#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /* CH32 Low and Medium density devices: Write protection of page 24 to 27 */ +#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /* CH32 Low and Medium density devices: Write protection of page 28 to 31 */ + +/* Values to be used with CH32V10x Medium-density devices */ +#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /* CH32 Medium-density devices: Write protection of page 32 to 35 */ +#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /* CH32 Medium-density devices: Write protection of page 36 to 39 */ +#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /* CH32 Medium-density devices: Write protection of page 40 to 43 */ +#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /* CH32 Medium-density devices: Write protection of page 44 to 47 */ +#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /* CH32 Medium-density devices: Write protection of page 48 to 51 */ +#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /* CH32 Medium-density devices: Write protection of page 52 to 55 */ +#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /* CH32 Medium-density devices: Write protection of page 56 to 59 */ +#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /* CH32 Medium-density devices: Write protection of page 60 to 63 */ +#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /* CH32 Medium-density devices: Write protection of page 64 to 67 */ +#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /* CH32 Medium-density devices: Write protection of page 68 to 71 */ +#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /* CH32 Medium-density devices: Write protection of page 72 to 75 */ +#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /* CH32 Medium-density devices: Write protection of page 76 to 79 */ +#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /* CH32 Medium-density devices: Write protection of page 80 to 83 */ +#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /* CH32 Medium-density devices: Write protection of page 84 to 87 */ +#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /* CH32 Medium-density devices: Write protection of page 88 to 91 */ +#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /* CH32 Medium-density devices: Write protection of page 92 to 95 */ +#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /* CH32 Medium-density devices: Write protection of page 96 to 99 */ +#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /* CH32 Medium-density devices: Write protection of page 100 to 103 */ +#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /* CH32 Medium-density devices: Write protection of page 104 to 107 */ +#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /* CH32 Medium-density devices: Write protection of page 108 to 111 */ +#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /* CH32 Medium-density devices: Write protection of page 112 to 115 */ +#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /* CH32 Medium-density devices: Write protection of page 115 to 119 */ +#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /* CH32 Medium-density devices: Write protection of page 120 to 123 */ +#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /* CH32 Medium-density devices: Write protection of page 124 to 127 */ + +#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /* CH32 Medium-density devices: Write protection of page 62 to 255 */ + +#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /* Write protection of all Pages */ + +/* Option_Bytes_IWatchdog */ +#define OB_IWDG_SW ((uint16_t)0x0001) /* Software IWDG selected */ +#define OB_IWDG_HW ((uint16_t)0x0000) /* Hardware IWDG selected */ + +/* Option_Bytes_nRST_STOP */ +#define OB_STOP_NoRST ((uint16_t)0x0002) /* No reset generated when entering in STOP */ +#define OB_STOP_RST ((uint16_t)0x0000) /* Reset generated when entering in STOP */ + +/* Option_Bytes_nRST_STDBY */ +#define OB_STDBY_NoRST ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */ +#define OB_STDBY_RST ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */ + +/* FLASH_Interrupts */ +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /* FPEC error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /* End of FLASH Operation Interrupt source */ +#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /* FPEC BANK1 error interrupt source */ +#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /* End of FLASH BANK1 Operation Interrupt source */ + +/* FLASH_Flags */ +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /* FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /* FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /* FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /* FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /* FLASH Option Byte error flag */ + +#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /* FLASH BANK1 Busy flag*/ +#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /* FLASH BANK1 End of Operation flag */ +#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /* FLASH BANK1 Program error flag */ +#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /* FLASH BANK1 Write protected error flag */ + + +/*Functions used for all CH32V10x devices*/ +void FLASH_SetLatency(uint32_t FLASH_Latency); +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess); +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer); +void FLASH_Unlock(void); +void FLASH_Lock(void); +FLASH_Status FLASH_ErasePage(uint32_t Page_Address); +FLASH_Status FLASH_EraseAllPages(void); +FLASH_Status FLASH_EraseOptionBytes(void); +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages); +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY); +uint32_t FLASH_GetUserOptionByte(void); +uint32_t FLASH_GetWriteProtectionOptionByte(void); +FlagStatus FLASH_GetReadOutProtectionStatus(void); +FlagStatus FLASH_GetPrefetchBufferStatus(void); +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); +void FLASH_ClearFlag(uint32_t FLASH_FLAG); +FLASH_Status FLASH_GetStatus(void); +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); +void FLASH_Unlock_Fast(void); +void FLASH_Lock_Fast(void); +void FLASH_BufReset(void); +void FLASH_BufLoad(uint32_t Address, uint32_t Data0, uint32_t Data1, uint32_t Data2, uint32_t Data3); +void FLASH_ErasePage_Fast(uint32_t Page_Address); +void FLASH_ProgramPage_Fast(uint32_t Page_Address); + +/* New function used for all CH32V10x devices */ +void FLASH_UnlockBank1(void); +void FLASH_LockBank1(void); +FLASH_Status FLASH_EraseAllBank1Pages(void); +FLASH_Status FLASH_GetBank1Status(void); +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout); + +#ifdef __cplusplus +} +#endif + + +#endif /* __CH32V10x_FLASH_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_gpio.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_gpio.h new file mode 100644 index 0000000000..4523fa337a --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_gpio.h @@ -0,0 +1,165 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_gpio.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* GPIO firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_GPIO_H +#define __CH32V10x_GPIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* Output Maximum frequency selection */ +typedef enum +{ + GPIO_Speed_10MHz = 1, + GPIO_Speed_2MHz, + GPIO_Speed_50MHz +}GPIOSpeed_TypeDef; + +/* Configuration Mode enumeration */ +typedef enum +{ GPIO_Mode_AIN = 0x0, + GPIO_Mode_IN_FLOATING = 0x04, + GPIO_Mode_IPD = 0x28, + GPIO_Mode_IPU = 0x48, + GPIO_Mode_Out_OD = 0x14, + GPIO_Mode_Out_PP = 0x10, + GPIO_Mode_AF_OD = 0x1C, + GPIO_Mode_AF_PP = 0x18 +}GPIOMode_TypeDef; + +/* GPIO Init structure definition */ +typedef struct +{ + uint16_t GPIO_Pin; /* Specifies the GPIO pins to be configured. + This parameter can be any value of @ref GPIO_pins_define */ + + GPIOSpeed_TypeDef GPIO_Speed; /* Specifies the speed for the selected pins. + This parameter can be a value of @ref GPIOSpeed_TypeDef */ + + GPIOMode_TypeDef GPIO_Mode; /* Specifies the operating mode for the selected pins. + This parameter can be a value of @ref GPIOMode_TypeDef */ +}GPIO_InitTypeDef; + +/* Bit_SET and Bit_RESET enumeration */ +typedef enum +{ + Bit_RESET = 0, + Bit_SET +}BitAction; + +/* GPIO_pins_define */ +#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */ +#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */ +#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */ +#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */ +#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */ +#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */ +#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */ +#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */ +#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */ +#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */ +#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */ +#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */ +#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */ +#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */ +#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */ +#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */ +#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */ + +/* GPIO_Remap_define */ +#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /* SPI1 Alternate Function mapping */ +#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /* I2C1 Alternate Function mapping */ +#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /* USART1 Alternate Function mapping */ +#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /* USART2 Alternate Function mapping */ +#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /* USART3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /* USART3 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /* TIM1 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /* TIM1 Full Alternate Function mapping */ +#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /* TIM2 Partial1 Alternate Function mapping */ +#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /* TIM2 Partial2 Alternate Function mapping */ +#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /* TIM2 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /* TIM3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /* TIM3 Full Alternate Function mapping */ +#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /* TIM4 Alternate Function mapping */ +#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /* CAN1 Alternate Function mapping */ +#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /* CAN1 Alternate Function mapping */ +#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /* PD01 Alternate Function mapping */ +#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /* ADC1 External Trigger Injected Conversion remapping */ +#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /* ADC1 External Trigger Regular Conversion remapping */ +#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /* Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ +#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /* JTAG-DP Disabled and SW-DP Enabled */ +#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /* Full SWJ Disabled (JTAG-DP + SW-DP) */ +#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /* Ethernet PTP output or USB OTG SOF (Start of Frame) connected + to TIM2 Internal Trigger 1 for calibration + (only for Connectivity line devices) */ +#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /* TIM1 DMA requests mapping (only for Value line devices) */ +#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /* TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */ +#define GPIO_Remap_MISC ((uint32_t)0x80002000) /* Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, + only for High density Value line devices) */ + +/* GPIO_Port_Sources */ +#define GPIO_PortSourceGPIOA ((uint8_t)0x00) +#define GPIO_PortSourceGPIOB ((uint8_t)0x01) +#define GPIO_PortSourceGPIOC ((uint8_t)0x02) +#define GPIO_PortSourceGPIOD ((uint8_t)0x03) +#define GPIO_PortSourceGPIOE ((uint8_t)0x04) +#define GPIO_PortSourceGPIOF ((uint8_t)0x05) +#define GPIO_PortSourceGPIOG ((uint8_t)0x06) + +/* GPIO_Pin_sources */ +#define GPIO_PinSource0 ((uint8_t)0x00) +#define GPIO_PinSource1 ((uint8_t)0x01) +#define GPIO_PinSource2 ((uint8_t)0x02) +#define GPIO_PinSource3 ((uint8_t)0x03) +#define GPIO_PinSource4 ((uint8_t)0x04) +#define GPIO_PinSource5 ((uint8_t)0x05) +#define GPIO_PinSource6 ((uint8_t)0x06) +#define GPIO_PinSource7 ((uint8_t)0x07) +#define GPIO_PinSource8 ((uint8_t)0x08) +#define GPIO_PinSource9 ((uint8_t)0x09) +#define GPIO_PinSource10 ((uint8_t)0x0A) +#define GPIO_PinSource11 ((uint8_t)0x0B) +#define GPIO_PinSource12 ((uint8_t)0x0C) +#define GPIO_PinSource13 ((uint8_t)0x0D) +#define GPIO_PinSource14 ((uint8_t)0x0E) +#define GPIO_PinSource15 ((uint8_t)0x0F) + + +void GPIO_DeInit(GPIO_TypeDef* GPIOx); +void GPIO_AFIODeInit(void); +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); +void GPIO_EventOutputCmd(FunctionalState NewState); +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_GPIO_H */ + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_i2c.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_i2c.h new file mode 100644 index 0000000000..84a36f415d --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_i2c.h @@ -0,0 +1,208 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_i2c.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* I2C firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_I2C_H +#define __CH32V10x_I2C_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* I2C Init structure definition */ +typedef struct +{ + uint32_t I2C_ClockSpeed; /* Specifies the clock frequency. + This parameter must be set to a value lower than 400kHz */ + + uint16_t I2C_Mode; /* Specifies the I2C mode. + This parameter can be a value of @ref I2C_mode */ + + uint16_t I2C_DutyCycle; /* Specifies the I2C fast mode duty cycle. + This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ + + uint16_t I2C_OwnAddress1; /* Specifies the first device own address. + This parameter can be a 7-bit or 10-bit address. */ + + uint16_t I2C_Ack; /* Enables or disables the acknowledgement. + This parameter can be a value of @ref I2C_acknowledgement */ + + uint16_t I2C_AcknowledgedAddress; /* Specifies if 7-bit or 10-bit address is acknowledged. + This parameter can be a value of @ref I2C_acknowledged_address */ +}I2C_InitTypeDef; + +/* I2C_mode */ +#define I2C_Mode_I2C ((uint16_t)0x0000) +#define I2C_Mode_SMBusDevice ((uint16_t)0x0002) +#define I2C_Mode_SMBusHost ((uint16_t)0x000A) + +/* I2C_duty_cycle_in_fast_mode */ +#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /* I2C fast mode Tlow/Thigh = 16/9 */ +#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /* I2C fast mode Tlow/Thigh = 2 */ + +/* I2C_acknowledgement */ +#define I2C_Ack_Enable ((uint16_t)0x0400) +#define I2C_Ack_Disable ((uint16_t)0x0000) + +/* I2C_transfer_direction */ +#define I2C_Direction_Transmitter ((uint8_t)0x00) +#define I2C_Direction_Receiver ((uint8_t)0x01) + +/* I2C_acknowledged_address */ +#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) +#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) + +/* I2C_registers */ +#define I2C_Register_CTLR1 ((uint8_t)0x00) +#define I2C_Register_CTLR2 ((uint8_t)0x04) +#define I2C_Register_OADDR1 ((uint8_t)0x08) +#define I2C_Register_OADDR2 ((uint8_t)0x0C) +#define I2C_Register_DATAR ((uint8_t)0x10) +#define I2C_Register_STAR1 ((uint8_t)0x14) +#define I2C_Register_STAR2 ((uint8_t)0x18) +#define I2C_Register_CKCFGR ((uint8_t)0x1C) +#define I2C_Register_RTR ((uint8_t)0x20) + +/* I2C_SMBus_alert_pin_level */ +#define I2C_SMBusAlert_Low ((uint16_t)0x2000) +#define I2C_SMBusAlert_High ((uint16_t)0xDFFF) + +/* I2C_PEC_position */ +#define I2C_PECPosition_Next ((uint16_t)0x0800) +#define I2C_PECPosition_Current ((uint16_t)0xF7FF) + +/* I2C_NACK_position */ +#define I2C_NACKPosition_Next ((uint16_t)0x0800) +#define I2C_NACKPosition_Current ((uint16_t)0xF7FF) + +/* I2C_interrupts_definition */ +#define I2C_IT_BUF ((uint16_t)0x0400) +#define I2C_IT_EVT ((uint16_t)0x0200) +#define I2C_IT_ERR ((uint16_t)0x0100) + +/* I2C_interrupts_definition */ +#define I2C_IT_SMBALERT ((uint32_t)0x01008000) +#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) +#define I2C_IT_PECERR ((uint32_t)0x01001000) +#define I2C_IT_OVR ((uint32_t)0x01000800) +#define I2C_IT_AF ((uint32_t)0x01000400) +#define I2C_IT_ARLO ((uint32_t)0x01000200) +#define I2C_IT_BERR ((uint32_t)0x01000100) +#define I2C_IT_TXE ((uint32_t)0x06000080) +#define I2C_IT_RXNE ((uint32_t)0x06000040) +#define I2C_IT_STOPF ((uint32_t)0x02000010) +#define I2C_IT_ADD10 ((uint32_t)0x02000008) +#define I2C_IT_BTF ((uint32_t)0x02000004) +#define I2C_IT_ADDR ((uint32_t)0x02000002) +#define I2C_IT_SB ((uint32_t)0x02000001) + +/* SR2 register flags */ +#define I2C_FLAG_DUALF ((uint32_t)0x00800000) +#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) +#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) +#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) +#define I2C_FLAG_TRA ((uint32_t)0x00040000) +#define I2C_FLAG_BUSY ((uint32_t)0x00020000) +#define I2C_FLAG_MSL ((uint32_t)0x00010000) + +/* SR1 register flags */ +#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) +#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) +#define I2C_FLAG_PECERR ((uint32_t)0x10001000) +#define I2C_FLAG_OVR ((uint32_t)0x10000800) +#define I2C_FLAG_AF ((uint32_t)0x10000400) +#define I2C_FLAG_ARLO ((uint32_t)0x10000200) +#define I2C_FLAG_BERR ((uint32_t)0x10000100) +#define I2C_FLAG_TXE ((uint32_t)0x10000080) +#define I2C_FLAG_RXNE ((uint32_t)0x10000040) +#define I2C_FLAG_STOPF ((uint32_t)0x10000010) +#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) +#define I2C_FLAG_BTF ((uint32_t)0x10000004) +#define I2C_FLAG_ADDR ((uint32_t)0x10000002) +#define I2C_FLAG_SB ((uint32_t)0x10000001) + + +/****************I2C Master Events (Events grouped in order of communication)********************/ + +#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ +#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ +#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ +#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ +#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ + + +/******************I2C Slave Events (Events grouped in order of communication)******************/ + +#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ +#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ +#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ +#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ +#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ +#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ + + +void I2C_DeInit(I2C_TypeDef* I2Cx); +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); + +/**************************************************************************************** +* I2C State Monitoring Functions +****************************************************************************************/ + +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); + +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_I2C_H */ + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_iwdg.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_iwdg.h new file mode 100644 index 0000000000..e99c0ac827 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_iwdg.h @@ -0,0 +1,54 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_iwdg.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* IWDG firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_IWDG_H +#define __CH32V10x_IWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* IWDG_WriteAccess */ +#define IWDG_WriteAccess_Enable ((uint16_t)0x5555) +#define IWDG_WriteAccess_Disable ((uint16_t)0x0000) + +/* IWDG_prescaler */ +#define IWDG_Prescaler_4 ((uint8_t)0x00) +#define IWDG_Prescaler_8 ((uint8_t)0x01) +#define IWDG_Prescaler_16 ((uint8_t)0x02) +#define IWDG_Prescaler_32 ((uint8_t)0x03) +#define IWDG_Prescaler_64 ((uint8_t)0x04) +#define IWDG_Prescaler_128 ((uint8_t)0x05) +#define IWDG_Prescaler_256 ((uint8_t)0x06) + +/* IWDG_Flag */ +#define IWDG_FLAG_PVU ((uint16_t)0x0001) +#define IWDG_FLAG_RVU ((uint16_t)0x0002) + + +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); +void IWDG_SetReload(uint16_t Reload); +void IWDG_ReloadCounter(void); +void IWDG_Enable(void); +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_IWDG_H */ + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_misc.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_misc.h new file mode 100644 index 0000000000..723472f6dd --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_misc.h @@ -0,0 +1,44 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_misc.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* miscellaneous firmware library functions. +*******************************************************************************/ +#ifndef __CH32V10X_MISC_H +#define __CH32V10X_MISC_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* NVIC Init Structure definition */ +typedef struct +{ + uint8_t NVIC_IRQChannel; + uint8_t NVIC_IRQChannelPreemptionPriority; + uint8_t NVIC_IRQChannelSubPriority; + FunctionalState NVIC_IRQChannelCmd; +} NVIC_InitTypeDef; + + +/* Preemption_Priority_Group */ +#define NVIC_PriorityGroup_0 ((uint32_t)0x00) +#define NVIC_PriorityGroup_1 ((uint32_t)0x01) +#define NVIC_PriorityGroup_2 ((uint32_t)0x02) +#define NVIC_PriorityGroup_3 ((uint32_t)0x03) +#define NVIC_PriorityGroup_4 ((uint32_t)0x04) + + +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_MISC_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_pwr.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_pwr.h new file mode 100644 index 0000000000..b37bdf07a0 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_pwr.h @@ -0,0 +1,57 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_pwr.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the PWR +* firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_PWR_H +#define __CH32V10x_PWR_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* PVD_detection_level */ +#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) +#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) +#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) +#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) +#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) +#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) +#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) +#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) + +/* Regulator_state_is_STOP_mode */ +#define PWR_Regulator_ON ((uint32_t)0x00000000) +#define PWR_Regulator_LowPower ((uint32_t)0x00000001) + +/* STOP_mode_entry */ +#define PWR_STOPEntry_WFI ((uint8_t)0x01) +#define PWR_STOPEntry_WFE ((uint8_t)0x02) + +/* PWR_Flag */ +#define PWR_FLAG_WU ((uint32_t)0x00000001) +#define PWR_FLAG_SB ((uint32_t)0x00000002) +#define PWR_FLAG_PVDO ((uint32_t)0x00000004) + + +void PWR_DeInit(void); +void PWR_BackupAccessCmd(FunctionalState NewState); +void PWR_PVDCmd(FunctionalState NewState); +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); +void PWR_WakeUpPinCmd(FunctionalState NewState); +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); +void PWR_EnterSTANDBYMode(void); +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); +void PWR_ClearFlag(uint32_t PWR_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_PWR_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rcc.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rcc.h new file mode 100644 index 0000000000..93512de341 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rcc.h @@ -0,0 +1,232 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_rcc.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the RCC firmware functions. +*******************************************************************************/ +#ifndef __CH32V10x_RCC_H +#define __CH32V10x_RCC_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* RCC_Exported_Types */ +typedef struct +{ + uint32_t SYSCLK_Frequency; /* returns SYSCLK clock frequency expressed in Hz */ + uint32_t HCLK_Frequency; /* returns HCLK clock frequency expressed in Hz */ + uint32_t PCLK1_Frequency; /* returns PCLK1 clock frequency expressed in Hz */ + uint32_t PCLK2_Frequency; /* returns PCLK2 clock frequency expressed in Hz */ + uint32_t ADCCLK_Frequency; /* returns ADCCLK clock frequency expressed in Hz */ +}RCC_ClocksTypeDef; + +/* HSE_configuration */ +#define RCC_HSE_OFF ((uint32_t)0x00000000) +#define RCC_HSE_ON ((uint32_t)0x00010000) +#define RCC_HSE_Bypass ((uint32_t)0x00040000) + +/* PLL_entry_clock_source */ +#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000) +#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000) +#define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000) + +/* PLL_multiplication_factor */ +#define RCC_PLLMul_2 ((uint32_t)0x00000000) +#define RCC_PLLMul_3 ((uint32_t)0x00040000) +#define RCC_PLLMul_4 ((uint32_t)0x00080000) +#define RCC_PLLMul_5 ((uint32_t)0x000C0000) +#define RCC_PLLMul_6 ((uint32_t)0x00100000) +#define RCC_PLLMul_7 ((uint32_t)0x00140000) +#define RCC_PLLMul_8 ((uint32_t)0x00180000) +#define RCC_PLLMul_9 ((uint32_t)0x001C0000) +#define RCC_PLLMul_10 ((uint32_t)0x00200000) +#define RCC_PLLMul_11 ((uint32_t)0x00240000) +#define RCC_PLLMul_12 ((uint32_t)0x00280000) +#define RCC_PLLMul_13 ((uint32_t)0x002C0000) +#define RCC_PLLMul_14 ((uint32_t)0x00300000) +#define RCC_PLLMul_15 ((uint32_t)0x00340000) +#define RCC_PLLMul_16 ((uint32_t)0x00380000) + +/* System_clock_source */ +#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000) +#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001) +#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002) + +/* AHB_clock_source */ +#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000) +#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080) +#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090) +#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0) +#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0) +#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0) +#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0) +#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0) +#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0) + +/* APB1_APB2_clock_source */ +#define RCC_HCLK_Div1 ((uint32_t)0x00000000) +#define RCC_HCLK_Div2 ((uint32_t)0x00000400) +#define RCC_HCLK_Div4 ((uint32_t)0x00000500) +#define RCC_HCLK_Div8 ((uint32_t)0x00000600) +#define RCC_HCLK_Div16 ((uint32_t)0x00000700) + +/* RCC_Interrupt_source */ +#define RCC_IT_LSIRDY ((uint8_t)0x01) +#define RCC_IT_LSERDY ((uint8_t)0x02) +#define RCC_IT_HSIRDY ((uint8_t)0x04) +#define RCC_IT_HSERDY ((uint8_t)0x08) +#define RCC_IT_PLLRDY ((uint8_t)0x10) +#define RCC_IT_CSS ((uint8_t)0x80) + +/* USB_Device_clock_source */ +#define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00) +#define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01) + +/* ADC_clock_source */ +#define RCC_PCLK2_Div2 ((uint32_t)0x00000000) +#define RCC_PCLK2_Div4 ((uint32_t)0x00004000) +#define RCC_PCLK2_Div6 ((uint32_t)0x00008000) +#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000) + +/* LSE_configuration */ +#define RCC_LSE_OFF ((uint8_t)0x00) +#define RCC_LSE_ON ((uint8_t)0x01) +#define RCC_LSE_Bypass ((uint8_t)0x04) + +/* RTC_clock_source */ +#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100) +#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200) +#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300) + +/* AHB_peripheral */ +#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001) +#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002) +#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004) +#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010) +#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040) +#define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100) +#define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400) +#define RCC_AHBPeriph_USBHD ((uint32_t)0x00001000) + +/* APB2_peripheral */ +#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001) +#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) +#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008) +#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010) +#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020) +#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040) +#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080) +#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100) +#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200) +#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400) +#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800) +#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000) +#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000) +#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000) +#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000) +#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000) +#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000) +#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000) +#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000) +#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000) +#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000) + +/* APB1_peripheral */ +#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001) +#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002) +#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004) +#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008) +#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010) +#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020) +#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040) +#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080) +#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100) +#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800) +#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000) +#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000) +#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000) +#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000) +#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000) +#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000) +#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000) +#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000) +#define RCC_APB1Periph_USB ((uint32_t)0x00800000) +#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000) +#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000) +#define RCC_APB1Periph_BKP ((uint32_t)0x08000000) +#define RCC_APB1Periph_PWR ((uint32_t)0x10000000) +#define RCC_APB1Periph_DAC ((uint32_t)0x20000000) +#define RCC_APB1Periph_CEC ((uint32_t)0x40000000) + +/* Clock_source_to_output_on_MCO_pin */ +#define RCC_MCO_NoClock ((uint8_t)0x00) +#define RCC_MCO_SYSCLK ((uint8_t)0x04) +#define RCC_MCO_HSI ((uint8_t)0x05) +#define RCC_MCO_HSE ((uint8_t)0x06) +#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07) + +/* RCC_Flag */ +#define RCC_FLAG_HSIRDY ((uint8_t)0x21) +#define RCC_FLAG_HSERDY ((uint8_t)0x31) +#define RCC_FLAG_PLLRDY ((uint8_t)0x39) +#define RCC_FLAG_LSERDY ((uint8_t)0x41) +#define RCC_FLAG_LSIRDY ((uint8_t)0x61) +#define RCC_FLAG_PINRST ((uint8_t)0x7A) +#define RCC_FLAG_PORRST ((uint8_t)0x7B) +#define RCC_FLAG_SFTRST ((uint8_t)0x7C) +#define RCC_FLAG_IWDGRST ((uint8_t)0x7D) +#define RCC_FLAG_WWDGRST ((uint8_t)0x7E) +#define RCC_FLAG_LPWRRST ((uint8_t)0x7F) + +/* SysTick_clock_source */ +#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) +#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) + + +void RCC_DeInit(void); +void RCC_HSEConfig(uint32_t RCC_HSE); +ErrorStatus RCC_WaitForHSEStartUp(void); +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); +void RCC_HSICmd(FunctionalState NewState); +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul); +void RCC_PLLCmd(FunctionalState NewState); +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); +uint8_t RCC_GetSYSCLKSource(void); +void RCC_HCLKConfig(uint32_t RCC_SYSCLK); +void RCC_PCLK1Config(uint32_t RCC_HCLK); +void RCC_PCLK2Config(uint32_t RCC_HCLK); +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); +void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource); +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2); +void RCC_LSEConfig(uint8_t RCC_LSE); +void RCC_LSICmd(FunctionalState NewState); +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); +void RCC_RTCCLKCmd(FunctionalState NewState); +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); +void RCC_BackupResetCmd(FunctionalState NewState); +void RCC_ClockSecuritySystemCmd(FunctionalState NewState); +void RCC_MCOConfig(uint8_t RCC_MCO); +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); +void RCC_ClearFlag(void); +ITStatus RCC_GetITStatus(uint8_t RCC_IT); +void RCC_ClearITPendingBit(uint8_t RCC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_RCC_H */ + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rtc.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rtc.h new file mode 100644 index 0000000000..d621340ad5 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_rtc.h @@ -0,0 +1,52 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_rtc.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the RTC +* firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_RTC_H +#define __CH32V10x_RTC_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +/* RTC_interrupts_define */ +#define RTC_IT_OW ((uint16_t)0x0004) /* Overflow interrupt */ +#define RTC_IT_ALR ((uint16_t)0x0002) /* Alarm interrupt */ +#define RTC_IT_SEC ((uint16_t)0x0001) /* Second interrupt */ + +/* RTC_interrupts_flags */ +#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /* RTC Operation OFF flag */ +#define RTC_FLAG_RSF ((uint16_t)0x0008) /* Registers Synchronized flag */ +#define RTC_FLAG_OW ((uint16_t)0x0004) /* Overflow flag */ +#define RTC_FLAG_ALR ((uint16_t)0x0002) /* Alarm flag */ +#define RTC_FLAG_SEC ((uint16_t)0x0001) /* Second flag */ + + +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); +void RTC_EnterConfigMode(void); +void RTC_ExitConfigMode(void); +uint32_t RTC_GetCounter(void); +void RTC_SetCounter(uint32_t CounterValue); +void RTC_SetPrescaler(uint32_t PrescalerValue); +void RTC_SetAlarm(uint32_t AlarmValue); +uint32_t RTC_GetDivider(void); +void RTC_WaitForLastTask(void); +void RTC_WaitForSynchro(void); +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); +void RTC_ClearFlag(uint16_t RTC_FLAG); +ITStatus RTC_GetITStatus(uint16_t RTC_IT); +void RTC_ClearITPendingBit(uint16_t RTC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_RTC_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_spi.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_spi.h new file mode 100644 index 0000000000..86a8fe000e --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_spi.h @@ -0,0 +1,227 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_spi.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* SPI firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_SPI_H +#define __CH32V10x_SPI_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* SPI Init structure definition */ +typedef struct +{ + uint16_t SPI_Direction; /* Specifies the SPI unidirectional or bidirectional data mode. + This parameter can be a value of @ref SPI_data_direction */ + + uint16_t SPI_Mode; /* Specifies the SPI operating mode. + This parameter can be a value of @ref SPI_mode */ + + uint16_t SPI_DataSize; /* Specifies the SPI data size. + This parameter can be a value of @ref SPI_data_size */ + + uint16_t SPI_CPOL; /* Specifies the serial clock steady state. + This parameter can be a value of @ref SPI_Clock_Polarity */ + + uint16_t SPI_CPHA; /* Specifies the clock active edge for the bit capture. + This parameter can be a value of @ref SPI_Clock_Phase */ + + uint16_t SPI_NSS; /* Specifies whether the NSS signal is managed by + hardware (NSS pin) or by software using the SSI bit. + This parameter can be a value of @ref SPI_Slave_Select_management */ + + uint16_t SPI_BaudRatePrescaler; /* Specifies the Baud Rate prescaler value which will be + used to configure the transmit and receive SCK clock. + This parameter can be a value of @ref SPI_BaudRate_Prescaler. + @note The communication clock is derived from the master + clock. The slave clock does not need to be set. */ + + uint16_t SPI_FirstBit; /* Specifies whether data transfers start from MSB or LSB bit. + This parameter can be a value of @ref SPI_MSB_LSB_transmission */ + + uint16_t SPI_CRCPolynomial; /* Specifies the polynomial used for the CRC calculation. */ +}SPI_InitTypeDef; + +/* I2S Init structure definition */ +typedef struct +{ + + uint16_t I2S_Mode; /* Specifies the I2S operating mode. + This parameter can be a value of @ref I2S_Mode */ + + uint16_t I2S_Standard; /* Specifies the standard used for the I2S communication. + This parameter can be a value of @ref I2S_Standard */ + + uint16_t I2S_DataFormat; /* Specifies the data format for the I2S communication. + This parameter can be a value of @ref I2S_Data_Format */ + + uint16_t I2S_MCLKOutput; /* Specifies whether the I2S MCLK output is enabled or not. + This parameter can be a value of @ref I2S_MCLK_Output */ + + uint32_t I2S_AudioFreq; /* Specifies the frequency selected for the I2S communication. + This parameter can be a value of @ref I2S_Audio_Frequency */ + + uint16_t I2S_CPOL; /* Specifies the idle state of the I2S clock. + This parameter can be a value of @ref I2S_Clock_Polarity */ +}I2S_InitTypeDef; + +/* SPI_data_direction */ +#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) +#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) +#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) +#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) + +/* SPI_mode */ +#define SPI_Mode_Master ((uint16_t)0x0104) +#define SPI_Mode_Slave ((uint16_t)0x0000) + +/* SPI_data_size */ +#define SPI_DataSize_16b ((uint16_t)0x0800) +#define SPI_DataSize_8b ((uint16_t)0x0000) + +/* SPI_Clock_Polarity */ +#define SPI_CPOL_Low ((uint16_t)0x0000) +#define SPI_CPOL_High ((uint16_t)0x0002) + +/* SPI_Clock_Phase */ +#define SPI_CPHA_1Edge ((uint16_t)0x0000) +#define SPI_CPHA_2Edge ((uint16_t)0x0001) + +/* SPI_Slave_Select_management */ +#define SPI_NSS_Soft ((uint16_t)0x0200) +#define SPI_NSS_Hard ((uint16_t)0x0000) + +/* SPI_BaudRate_Prescaler */ +#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) +#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) +#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) +#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) +#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) +#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) +#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) +#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) + +/* SPI_MSB_LSB_transmission */ +#define SPI_FirstBit_MSB ((uint16_t)0x0000) +#define SPI_FirstBit_LSB ((uint16_t)0x0080) + +/* I2S_Mode */ +#define I2S_Mode_SlaveTx ((uint16_t)0x0000) +#define I2S_Mode_SlaveRx ((uint16_t)0x0100) +#define I2S_Mode_MasterTx ((uint16_t)0x0200) +#define I2S_Mode_MasterRx ((uint16_t)0x0300) + +/* I2S_Standard */ +#define I2S_Standard_Phillips ((uint16_t)0x0000) +#define I2S_Standard_MSB ((uint16_t)0x0010) +#define I2S_Standard_LSB ((uint16_t)0x0020) +#define I2S_Standard_PCMShort ((uint16_t)0x0030) +#define I2S_Standard_PCMLong ((uint16_t)0x00B0) + +/* I2S_Data_Format */ +#define I2S_DataFormat_16b ((uint16_t)0x0000) +#define I2S_DataFormat_16bextended ((uint16_t)0x0001) +#define I2S_DataFormat_24b ((uint16_t)0x0003) +#define I2S_DataFormat_32b ((uint16_t)0x0005) + +/* I2S_MCLK_Output */ +#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) +#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) + +/* I2S_Audio_Frequency */ +#define I2S_AudioFreq_192k ((uint32_t)192000) +#define I2S_AudioFreq_96k ((uint32_t)96000) +#define I2S_AudioFreq_48k ((uint32_t)48000) +#define I2S_AudioFreq_44k ((uint32_t)44100) +#define I2S_AudioFreq_32k ((uint32_t)32000) +#define I2S_AudioFreq_22k ((uint32_t)22050) +#define I2S_AudioFreq_16k ((uint32_t)16000) +#define I2S_AudioFreq_11k ((uint32_t)11025) +#define I2S_AudioFreq_8k ((uint32_t)8000) +#define I2S_AudioFreq_Default ((uint32_t)2) + +/* I2S_Clock_Polarity */ +#define I2S_CPOL_Low ((uint16_t)0x0000) +#define I2S_CPOL_High ((uint16_t)0x0008) + +/* SPI_I2S_DMA_transfer_requests */ +#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) +#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) + +/* SPI_NSS_internal_software_management */ +#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) +#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) + +/* SPI_CRC_Transmit_Receive */ +#define SPI_CRC_Tx ((uint8_t)0x00) +#define SPI_CRC_Rx ((uint8_t)0x01) + +/* SPI_direction_transmit_receive */ +#define SPI_Direction_Rx ((uint16_t)0xBFFF) +#define SPI_Direction_Tx ((uint16_t)0x4000) + +/* SPI_I2S_interrupts_definition */ +#define SPI_I2S_IT_TXE ((uint8_t)0x71) +#define SPI_I2S_IT_RXNE ((uint8_t)0x60) +#define SPI_I2S_IT_ERR ((uint8_t)0x50) +#define SPI_I2S_IT_OVR ((uint8_t)0x56) +#define SPI_IT_MODF ((uint8_t)0x55) +#define SPI_IT_CRCERR ((uint8_t)0x54) +#define I2S_IT_UDR ((uint8_t)0x53) + +/* SPI_I2S_flags_definition */ +#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) +#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) +#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) +#define I2S_FLAG_UDR ((uint16_t)0x0008) +#define SPI_FLAG_CRCERR ((uint16_t)0x0010) +#define SPI_FLAG_MODF ((uint16_t)0x0020) +#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) +#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) + + +void SPI_I2S_DeInit(SPI_TypeDef* SPIx); +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); +void SPI_TransmitCRC(SPI_TypeDef* SPIx); +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_SPI_H */ + + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_tim.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_tim.h new file mode 100644 index 0000000000..bbc9fd6f9b --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_tim.h @@ -0,0 +1,513 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_tim.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* TIM firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_TIM_H +#define __CH32V10x_TIM_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + +/* TIM Time Base Init structure definition */ +typedef struct +{ + uint16_t TIM_Prescaler; /* Specifies the prescaler value used to divide the TIM clock. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_CounterMode; /* Specifies the counter mode. + This parameter can be a value of @ref TIM_Counter_Mode */ + + uint16_t TIM_Period; /* Specifies the period value to be loaded into the active + Auto-Reload Register at the next update event. + This parameter must be a number between 0x0000 and 0xFFFF. */ + + uint16_t TIM_ClockDivision; /* Specifies the clock division. + This parameter can be a value of @ref TIM_Clock_Division_CKD */ + + uint8_t TIM_RepetitionCounter; /* Specifies the repetition counter value. Each time the RCR downcounter + reaches zero, an update event is generated and counting restarts + from the RCR value (N). + This means in PWM mode that (N+1) corresponds to: + - the number of PWM periods in edge-aligned mode + - the number of half PWM period in center-aligned mode + This parameter must be a number between 0x00 and 0xFF. + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_TimeBaseInitTypeDef; + +/* TIM Output Compare Init structure definition */ +typedef struct +{ + uint16_t TIM_OCMode; /* Specifies the TIM mode. + This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ + + uint16_t TIM_OutputState; /* Specifies the TIM Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_state */ + + uint16_t TIM_OutputNState; /* Specifies the TIM complementary Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_N_state + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_Pulse; /* Specifies the pulse value to be loaded into the Capture Compare Register. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_OCPolarity; /* Specifies the output polarity. + This parameter can be a value of @ref TIM_Output_Compare_Polarity */ + + uint16_t TIM_OCNPolarity; /* Specifies the complementary output polarity. + This parameter can be a value of @ref TIM_Output_Compare_N_Polarity + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCIdleState; /* Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCNIdleState; /* Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_OCInitTypeDef; + +/* TIM Input Capture Init structure definition */ +typedef struct +{ + uint16_t TIM_Channel; /* Specifies the TIM channel. + This parameter can be a value of @ref TIM_Channel */ + + uint16_t TIM_ICPolarity; /* Specifies the active edge of the input signal. + This parameter can be a value of @ref TIM_Input_Capture_Polarity */ + + uint16_t TIM_ICSelection; /* Specifies the input. + This parameter can be a value of @ref TIM_Input_Capture_Selection */ + + uint16_t TIM_ICPrescaler; /* Specifies the Input Capture Prescaler. + This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ + + uint16_t TIM_ICFilter; /* Specifies the input capture filter. + This parameter can be a number between 0x0 and 0xF */ +} TIM_ICInitTypeDef; + +/* BDTR structure definition */ +typedef struct +{ + uint16_t TIM_OSSRState; /* Specifies the Off-State selection used in Run mode. + This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ + + uint16_t TIM_OSSIState; /* Specifies the Off-State used in Idle state. + This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ + + uint16_t TIM_LOCKLevel; /* Specifies the LOCK level parameters. + This parameter can be a value of @ref Lock_level */ + + uint16_t TIM_DeadTime; /* Specifies the delay time between the switching-off and the + switching-on of the outputs. + This parameter can be a number between 0x00 and 0xFF */ + + uint16_t TIM_Break; /* Specifies whether the TIM Break input is enabled or not. + This parameter can be a value of @ref Break_Input_enable_disable */ + + uint16_t TIM_BreakPolarity; /* Specifies the TIM Break Input pin polarity. + This parameter can be a value of @ref Break_Polarity */ + + uint16_t TIM_AutomaticOutput; /* Specifies whether the TIM Automatic Output feature is enabled or not. + This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ +} TIM_BDTRInitTypeDef; + +/* TIM_Output_Compare_and_PWM_modes */ +#define TIM_OCMode_Timing ((uint16_t)0x0000) +#define TIM_OCMode_Active ((uint16_t)0x0010) +#define TIM_OCMode_Inactive ((uint16_t)0x0020) +#define TIM_OCMode_Toggle ((uint16_t)0x0030) +#define TIM_OCMode_PWM1 ((uint16_t)0x0060) +#define TIM_OCMode_PWM2 ((uint16_t)0x0070) + +/* TIM_One_Pulse_Mode */ +#define TIM_OPMode_Single ((uint16_t)0x0008) +#define TIM_OPMode_Repetitive ((uint16_t)0x0000) + +/* TIM_Channel */ +#define TIM_Channel_1 ((uint16_t)0x0000) +#define TIM_Channel_2 ((uint16_t)0x0004) +#define TIM_Channel_3 ((uint16_t)0x0008) +#define TIM_Channel_4 ((uint16_t)0x000C) + +/* TIM_Clock_Division_CKD */ +#define TIM_CKD_DIV1 ((uint16_t)0x0000) +#define TIM_CKD_DIV2 ((uint16_t)0x0100) +#define TIM_CKD_DIV4 ((uint16_t)0x0200) + +/* TIM_Counter_Mode */ +#define TIM_CounterMode_Up ((uint16_t)0x0000) +#define TIM_CounterMode_Down ((uint16_t)0x0010) +#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) +#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) +#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) + +/* TIM_Output_Compare_Polarity */ +#define TIM_OCPolarity_High ((uint16_t)0x0000) +#define TIM_OCPolarity_Low ((uint16_t)0x0002) + +/* TIM_Output_Compare_N_Polarity */ +#define TIM_OCNPolarity_High ((uint16_t)0x0000) +#define TIM_OCNPolarity_Low ((uint16_t)0x0008) + +/* TIM_Output_Compare_state */ +#define TIM_OutputState_Disable ((uint16_t)0x0000) +#define TIM_OutputState_Enable ((uint16_t)0x0001) + +/* TIM_Output_Compare_N_state */ +#define TIM_OutputNState_Disable ((uint16_t)0x0000) +#define TIM_OutputNState_Enable ((uint16_t)0x0004) + +/* TIM_Capture_Compare_state */ +#define TIM_CCx_Enable ((uint16_t)0x0001) +#define TIM_CCx_Disable ((uint16_t)0x0000) + +/* TIM_Capture_Compare_N_state */ +#define TIM_CCxN_Enable ((uint16_t)0x0004) +#define TIM_CCxN_Disable ((uint16_t)0x0000) + +/* Break_Input_enable_disable */ +#define TIM_Break_Enable ((uint16_t)0x1000) +#define TIM_Break_Disable ((uint16_t)0x0000) + +/* Break_Polarity */ +#define TIM_BreakPolarity_Low ((uint16_t)0x0000) +#define TIM_BreakPolarity_High ((uint16_t)0x2000) + +/* TIM_AOE_Bit_Set_Reset */ +#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) +#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) + +/* Lock_level */ +#define TIM_LOCKLevel_OFF ((uint16_t)0x0000) +#define TIM_LOCKLevel_1 ((uint16_t)0x0100) +#define TIM_LOCKLevel_2 ((uint16_t)0x0200) +#define TIM_LOCKLevel_3 ((uint16_t)0x0300) + +/* OSSI_Off_State_Selection_for_Idle_mode_state */ +#define TIM_OSSIState_Enable ((uint16_t)0x0400) +#define TIM_OSSIState_Disable ((uint16_t)0x0000) + +/* OSSR_Off_State_Selection_for_Run_mode_state */ +#define TIM_OSSRState_Enable ((uint16_t)0x0800) +#define TIM_OSSRState_Disable ((uint16_t)0x0000) + +/* TIM_Output_Compare_Idle_State */ +#define TIM_OCIdleState_Set ((uint16_t)0x0100) +#define TIM_OCIdleState_Reset ((uint16_t)0x0000) + +/* TIM_Output_Compare_N_Idle_State */ +#define TIM_OCNIdleState_Set ((uint16_t)0x0200) +#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) + +/* TIM_Input_Capture_Polarity */ +#define TIM_ICPolarity_Rising ((uint16_t)0x0000) +#define TIM_ICPolarity_Falling ((uint16_t)0x0002) +#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) + +/* TIM_Input_Capture_Selection */ +#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /* TIM Input 1, 2, 3 or 4 is selected to be + connected to IC1, IC2, IC3 or IC4, respectively */ +#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /* TIM Input 1, 2, 3 or 4 is selected to be + connected to IC2, IC1, IC4 or IC3, respectively. */ +#define TIM_ICSelection_TRC ((uint16_t)0x0003) /* TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ + +/* TIM_Input_Capture_Prescaler */ +#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /* Capture performed each time an edge is detected on the capture input. */ +#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /* Capture performed once every 2 events. */ +#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /* Capture performed once every 4 events. */ +#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /* Capture performed once every 8 events. */ + +/* TIM_interrupt_sources */ +#define TIM_IT_Update ((uint16_t)0x0001) +#define TIM_IT_CC1 ((uint16_t)0x0002) +#define TIM_IT_CC2 ((uint16_t)0x0004) +#define TIM_IT_CC3 ((uint16_t)0x0008) +#define TIM_IT_CC4 ((uint16_t)0x0010) +#define TIM_IT_COM ((uint16_t)0x0020) +#define TIM_IT_Trigger ((uint16_t)0x0040) +#define TIM_IT_Break ((uint16_t)0x0080) + +/* TIM_DMA_Base_address */ +#define TIM_DMABase_CR1 ((uint16_t)0x0000) +#define TIM_DMABase_CR2 ((uint16_t)0x0001) +#define TIM_DMABase_SMCR ((uint16_t)0x0002) +#define TIM_DMABase_DIER ((uint16_t)0x0003) +#define TIM_DMABase_SR ((uint16_t)0x0004) +#define TIM_DMABase_EGR ((uint16_t)0x0005) +#define TIM_DMABase_CCMR1 ((uint16_t)0x0006) +#define TIM_DMABase_CCMR2 ((uint16_t)0x0007) +#define TIM_DMABase_CCER ((uint16_t)0x0008) +#define TIM_DMABase_CNT ((uint16_t)0x0009) +#define TIM_DMABase_PSC ((uint16_t)0x000A) +#define TIM_DMABase_ARR ((uint16_t)0x000B) +#define TIM_DMABase_RCR ((uint16_t)0x000C) +#define TIM_DMABase_CCR1 ((uint16_t)0x000D) +#define TIM_DMABase_CCR2 ((uint16_t)0x000E) +#define TIM_DMABase_CCR3 ((uint16_t)0x000F) +#define TIM_DMABase_CCR4 ((uint16_t)0x0010) +#define TIM_DMABase_BDTR ((uint16_t)0x0011) +#define TIM_DMABase_DCR ((uint16_t)0x0012) + +/* TIM_DMA_Burst_Length */ +#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) +#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) +#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) +#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) +#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) +#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) +#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) +#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) +#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) +#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) +#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) +#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) +#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) +#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) +#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) +#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) +#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) +#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) + +/* TIM_DMA_sources */ +#define TIM_DMA_Update ((uint16_t)0x0100) +#define TIM_DMA_CC1 ((uint16_t)0x0200) +#define TIM_DMA_CC2 ((uint16_t)0x0400) +#define TIM_DMA_CC3 ((uint16_t)0x0800) +#define TIM_DMA_CC4 ((uint16_t)0x1000) +#define TIM_DMA_COM ((uint16_t)0x2000) +#define TIM_DMA_Trigger ((uint16_t)0x4000) + +/* TIM_External_Trigger_Prescaler */ +#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) +#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) +#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) +#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) + +/* TIM_Internal_Trigger_Selection */ +#define TIM_TS_ITR0 ((uint16_t)0x0000) +#define TIM_TS_ITR1 ((uint16_t)0x0010) +#define TIM_TS_ITR2 ((uint16_t)0x0020) +#define TIM_TS_ITR3 ((uint16_t)0x0030) +#define TIM_TS_TI1F_ED ((uint16_t)0x0040) +#define TIM_TS_TI1FP1 ((uint16_t)0x0050) +#define TIM_TS_TI2FP2 ((uint16_t)0x0060) +#define TIM_TS_ETRF ((uint16_t)0x0070) + +/* TIM_TIx_External_Clock_Source */ +#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) +#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) +#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) + +/* TIM_External_Trigger_Polarity */ +#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) +#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) + +/* TIM_Prescaler_Reload_Mode */ +#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) +#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) + +/* TIM_Forced_Action */ +#define TIM_ForcedAction_Active ((uint16_t)0x0050) +#define TIM_ForcedAction_InActive ((uint16_t)0x0040) + +/* TIM_Encoder_Mode */ +#define TIM_EncoderMode_TI1 ((uint16_t)0x0001) +#define TIM_EncoderMode_TI2 ((uint16_t)0x0002) +#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) + +/* TIM_Event_Source */ +#define TIM_EventSource_Update ((uint16_t)0x0001) +#define TIM_EventSource_CC1 ((uint16_t)0x0002) +#define TIM_EventSource_CC2 ((uint16_t)0x0004) +#define TIM_EventSource_CC3 ((uint16_t)0x0008) +#define TIM_EventSource_CC4 ((uint16_t)0x0010) +#define TIM_EventSource_COM ((uint16_t)0x0020) +#define TIM_EventSource_Trigger ((uint16_t)0x0040) +#define TIM_EventSource_Break ((uint16_t)0x0080) + +/* TIM_Update_Source */ +#define TIM_UpdateSource_Global ((uint16_t)0x0000) /* Source of update is the counter overflow/underflow + or the setting of UG bit, or an update generation + through the slave mode controller. */ +#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /* Source of update is counter overflow/underflow. */ + +/* TIM_Output_Compare_Preload_State */ +#define TIM_OCPreload_Enable ((uint16_t)0x0008) +#define TIM_OCPreload_Disable ((uint16_t)0x0000) + +/* TIM_Output_Compare_Fast_State */ +#define TIM_OCFast_Enable ((uint16_t)0x0004) +#define TIM_OCFast_Disable ((uint16_t)0x0000) + +/* TIM_Output_Compare_Clear_State */ +#define TIM_OCClear_Enable ((uint16_t)0x0080) +#define TIM_OCClear_Disable ((uint16_t)0x0000) + +/* TIM_Trigger_Output_Source */ +#define TIM_TRGOSource_Reset ((uint16_t)0x0000) +#define TIM_TRGOSource_Enable ((uint16_t)0x0010) +#define TIM_TRGOSource_Update ((uint16_t)0x0020) +#define TIM_TRGOSource_OC1 ((uint16_t)0x0030) +#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) +#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) +#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) +#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) + +/* TIM_Slave_Mode */ +#define TIM_SlaveMode_Reset ((uint16_t)0x0004) +#define TIM_SlaveMode_Gated ((uint16_t)0x0005) +#define TIM_SlaveMode_Trigger ((uint16_t)0x0006) +#define TIM_SlaveMode_External1 ((uint16_t)0x0007) + +/* TIM_Master_Slave_Mode */ +#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) +#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) + +/* TIM_Flags */ +#define TIM_FLAG_Update ((uint16_t)0x0001) +#define TIM_FLAG_CC1 ((uint16_t)0x0002) +#define TIM_FLAG_CC2 ((uint16_t)0x0004) +#define TIM_FLAG_CC3 ((uint16_t)0x0008) +#define TIM_FLAG_CC4 ((uint16_t)0x0010) +#define TIM_FLAG_COM ((uint16_t)0x0020) +#define TIM_FLAG_Trigger ((uint16_t)0x0040) +#define TIM_FLAG_Break ((uint16_t)0x0080) +#define TIM_FLAG_CC1OF ((uint16_t)0x0200) +#define TIM_FLAG_CC2OF ((uint16_t)0x0400) +#define TIM_FLAG_CC3OF ((uint16_t)0x0800) +#define TIM_FLAG_CC4OF ((uint16_t)0x1000) + +/* TIM_Legacy */ +#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer +#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers +#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers +#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers +#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers +#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers +#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers +#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers +#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers +#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers +#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers +#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers +#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers +#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers +#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers +#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers +#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers +#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers + + +void TIM_DeInit(TIM_TypeDef* TIMx); +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); +void TIM_InternalClockConfig(TIM_TypeDef* TIMx); +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter); +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_TIM_H */ + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usart.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usart.h new file mode 100644 index 0000000000..f5592823de --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usart.h @@ -0,0 +1,193 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usart.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the +* USART firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_USART_H +#define __CH32V10x_USART_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +/* USART Init Structure definition */ +typedef struct +{ + uint32_t USART_BaudRate; /* This member configures the USART communication baud rate. + The baud rate is computed using the following formula: + - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) + - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ + + uint16_t USART_WordLength; /* Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_Word_Length */ + + uint16_t USART_StopBits; /* Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_Stop_Bits */ + + uint16_t USART_Parity; /* Specifies the parity mode. + This parameter can be a value of @ref USART_Parity + @note When parity is enabled, the computed parity is inserted + at the MSB position of the transmitted data (9th bit when + the word length is set to 9 data bits; 8th bit when the + word length is set to 8 data bits). */ + + uint16_t USART_Mode; /* Specifies wether the Receive or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_Mode */ + + uint16_t USART_HardwareFlowControl; /* Specifies wether the hardware flow control mode is enabled + or disabled. + This parameter can be a value of @ref USART_Hardware_Flow_Control */ +} USART_InitTypeDef; + +/* USART Clock Init Structure definition */ +typedef struct +{ + + uint16_t USART_Clock; /* Specifies whether the USART clock is enabled or disabled. + This parameter can be a value of @ref USART_Clock */ + + uint16_t USART_CPOL; /* Specifies the steady state value of the serial clock. + This parameter can be a value of @ref USART_Clock_Polarity */ + + uint16_t USART_CPHA; /* Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref USART_Clock_Phase */ + + uint16_t USART_LastBit; /* Specifies whether the clock pulse corresponding to the last transmitted + data bit (MSB) has to be output on the SCLK pin in synchronous mode. + This parameter can be a value of @ref USART_Last_Bit */ +} USART_ClockInitTypeDef; + +/* USART_Word_Length */ +#define USART_WordLength_8b ((uint16_t)0x0000) +#define USART_WordLength_9b ((uint16_t)0x1000) + +/* USART_Stop_Bits */ +#define USART_StopBits_1 ((uint16_t)0x0000) +#define USART_StopBits_0_5 ((uint16_t)0x1000) +#define USART_StopBits_2 ((uint16_t)0x2000) +#define USART_StopBits_1_5 ((uint16_t)0x3000) + +/* USART_Parity */ +#define USART_Parity_No ((uint16_t)0x0000) +#define USART_Parity_Even ((uint16_t)0x0400) +#define USART_Parity_Odd ((uint16_t)0x0600) + +/* USART_Mode */ +#define USART_Mode_Rx ((uint16_t)0x0004) +#define USART_Mode_Tx ((uint16_t)0x0008) + +/* USART_Hardware_Flow_Control */ +#define USART_HardwareFlowControl_None ((uint16_t)0x0000) +#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100) +#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200) +#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300) + +/* USART_Clock */ +#define USART_Clock_Disable ((uint16_t)0x0000) +#define USART_Clock_Enable ((uint16_t)0x0800) + +/* USART_Clock_Polarity */ +#define USART_CPOL_Low ((uint16_t)0x0000) +#define USART_CPOL_High ((uint16_t)0x0400) + +/* USART_Clock_Phase */ +#define USART_CPHA_1Edge ((uint16_t)0x0000) +#define USART_CPHA_2Edge ((uint16_t)0x0200) + +/* USART_Last_Bit */ +#define USART_LastBit_Disable ((uint16_t)0x0000) +#define USART_LastBit_Enable ((uint16_t)0x0100) + +/* USART_Interrupt_definition */ +#define USART_IT_PE ((uint16_t)0x0028) +#define USART_IT_TXE ((uint16_t)0x0727) +#define USART_IT_TC ((uint16_t)0x0626) +#define USART_IT_RXNE ((uint16_t)0x0525) +#define USART_IT_ORE_RX ((uint16_t)0x0325) +#define USART_IT_IDLE ((uint16_t)0x0424) +#define USART_IT_LBD ((uint16_t)0x0846) +#define USART_IT_CTS ((uint16_t)0x096A) +#define USART_IT_ERR ((uint16_t)0x0060) +#define USART_IT_ORE_ER ((uint16_t)0x0360) +#define USART_IT_NE ((uint16_t)0x0260) +#define USART_IT_FE ((uint16_t)0x0160) + +#define USART_IT_ORE USART_IT_ORE_ER + +/* USART_DMA_Requests */ +#define USART_DMAReq_Tx ((uint16_t)0x0080) +#define USART_DMAReq_Rx ((uint16_t)0x0040) + +/* USART_WakeUp_methods */ +#define USART_WakeUp_IdleLine ((uint16_t)0x0000) +#define USART_WakeUp_AddressMark ((uint16_t)0x0800) + +/* USART_LIN_Break_Detection_Length */ +#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000) +#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020) + +/* USART_IrDA_Low_Power */ +#define USART_IrDAMode_LowPower ((uint16_t)0x0004) +#define USART_IrDAMode_Normal ((uint16_t)0x0000) + +/* USART_Flags */ +#define USART_FLAG_CTS ((uint16_t)0x0200) +#define USART_FLAG_LBD ((uint16_t)0x0100) +#define USART_FLAG_TXE ((uint16_t)0x0080) +#define USART_FLAG_TC ((uint16_t)0x0040) +#define USART_FLAG_RXNE ((uint16_t)0x0020) +#define USART_FLAG_IDLE ((uint16_t)0x0010) +#define USART_FLAG_ORE ((uint16_t)0x0008) +#define USART_FLAG_NE ((uint16_t)0x0004) +#define USART_FLAG_FE ((uint16_t)0x0002) +#define USART_FLAG_PE ((uint16_t)0x0001) + + +void USART_DeInit(USART_TypeDef* USARTx); +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); +void USART_StructInit(USART_InitTypeDef* USART_InitStruct); +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState); +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState); +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp); +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength); +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); +uint16_t USART_ReceiveData(USART_TypeDef* USARTx); +void USART_SendBreak(USART_TypeDef* USARTx); +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode); +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG); +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG); +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT); +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_USART_H */ + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb.h new file mode 100644 index 0000000000..3bd1101630 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb.h @@ -0,0 +1,707 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usb.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the USB +* firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_USB_H +#define __CH32V10x_USB_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef VOID +#define VOID void +#endif +#ifndef CONST +#define CONST const +#endif +#ifndef BOOL +typedef unsigned char BOOL; +#endif +#ifndef BOOLEAN +typedef unsigned char BOOLEAN; +#endif +#ifndef CHAR +typedef char CHAR; +#endif +#ifndef INT8 +typedef char INT8; +#endif +#ifndef INT16 +typedef short INT16; +#endif +#ifndef INT32 +typedef long INT32; +#endif +#ifndef UINT8 +typedef unsigned char UINT8; +#endif +#ifndef UINT16 +typedef unsigned short UINT16; +#endif +#ifndef UINT32 +typedef unsigned long UINT32; +#endif +#ifndef UINT8V +typedef unsigned char volatile UINT8V; +#endif +#ifndef UINT16V +typedef unsigned short volatile UINT16V; +#endif +#ifndef UINT32V +typedef unsigned long volatile UINT32V; +#endif + +#ifndef PVOID +typedef void *PVOID; +#endif +#ifndef PCHAR +typedef char *PCHAR; +#endif +#ifndef PCHAR +typedef const char *PCCHAR; +#endif +#ifndef PINT8 +typedef char *PINT8; +#endif +#ifndef PINT16 +typedef short *PINT16; +#endif +#ifndef PINT32 +typedef long *PINT32; +#endif +#ifndef PUINT8 +typedef unsigned char *PUINT8; +#endif +#ifndef PUINT16 +typedef unsigned short *PUINT16; +#endif +#ifndef PUINT32 +typedef unsigned long *PUINT32; +#endif +#ifndef PUINT8V +typedef volatile unsigned char *PUINT8V; +#endif +#ifndef PUINT16V +typedef volatile unsigned short *PUINT16V; +#endif +#ifndef PUINT32V +typedef volatile unsigned long *PUINT32V; +#endif + +/******************************************************************************/ +/* Peripheral memory map */ +/******************************************************************************/ +/* USB */ +#define R32_USB_CONTROL (*((PUINT32V)(0x40023400))) // USB control & interrupt enable & device address +#define R8_USB_CTRL (*((PUINT8V)(0x40023400))) // USB base control +#define RB_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode +#define RB_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps +#define RB_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable +#define RB_UC_SYS_CTRL1 0x20 // USB system control high bit +#define RB_UC_SYS_CTRL0 0x10 // USB system control low bit +#define MASK_UC_SYS_CTRL 0x30 // bit mask of USB system control +// bUC_HOST_MODE & bUC_SYS_CTRL1 & bUC_SYS_CTRL0: USB system control +// 0 00: disable USB device and disable internal pullup resistance +// 0 01: enable USB device and disable internal pullup resistance, need external pullup resistance +// 0 1x: enable USB device and enable internal pullup resistance +// 1 00: enable USB host and normal status +// 1 01: enable USB host and force UDP/UDM output SE0 state +// 1 10: enable USB host and force UDP/UDM output J state +// 1 11: enable USB host and force UDP/UDM output resume or K state +#define RB_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid +#define RB_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear +#define RB_UC_CLR_ALL 0x02 // force clear FIFO and count of USB +#define RB_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB + +#define R8_UDEV_CTRL (*((PUINT8V)(0x40023401))) // USB device physical prot control +#define RB_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable +#define RB_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level +#define RB_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level +#define RB_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed +#define RB_UD_GP_BIT 0x02 // general purpose bit +#define RB_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable + +#define R8_UHOST_CTRL R8_UDEV_CTRL // USB host physical prot control +#define RB_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable +#define RB_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level +#define RB_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level +#define RB_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed +#define RB_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset +#define RB_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached + +#define R8_USB_INT_EN (*((PUINT8V)(0x40023402))) // USB interrupt enable +#define RB_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode +#define RB_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode +#define RB_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow +#define RB_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode +#define RB_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event +#define RB_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion +#define RB_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode +#define RB_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode + +#define R8_USB_DEV_AD (*((PUINT8V)(0x40023403))) // USB device address +#define RB_UDA_GP_BIT 0x80 // general purpose bit +#define MASK_USB_ADDR 0x7F // bit mask for USB device address + +#define R32_USB_STATUS (*((PUINT32V)(0x40023404))) // USB miscellaneous status & interrupt flag & interrupt status +#define R8_USB_MIS_ST (*((PUINT8V)(0x40023405))) // USB miscellaneous status +#define RB_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status +#define RB_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host +#define RB_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status +#define RB_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty) +#define RB_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status +#define RB_UMS_SUSPEND 0x04 // RO, indicate USB suspend status +#define RB_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host +#define RB_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host + +#define R8_USB_INT_FG (*((PUINT8V)(0x40023406))) // USB interrupt flag +#define RB_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received +#define RB_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK +#define RB_U_SIE_FREE 0x20 // RO, indicate USB SIE free status +#define RB_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear +#define RB_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear +#define RB_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear +#define RB_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear +#define RB_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear +#define RB_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear + +#define R8_USB_INT_ST (*((PUINT8V)(0x40023407))) // USB interrupt status +#define RB_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode +#define RB_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK +#define RB_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode +#define RB_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode +#define MASK_UIS_TOKEN 0x30 // RO, bit mask of current token PID code received for USB device mode +#define UIS_TOKEN_OUT 0x00 +#define UIS_TOKEN_SOF 0x10 +#define UIS_TOKEN_IN 0x20 +#define UIS_TOKEN_SETUP 0x30 +// bUIS_TOKEN1 & bUIS_TOKEN0: current token PID code received for USB device mode +// 00: OUT token PID received +// 01: SOF token PID received +// 10: IN token PID received +// 11: SETUP token PID received +#define MASK_UIS_ENDP 0x0F // RO, bit mask of current transfer endpoint number for USB device mode +#define MASK_UIS_H_RES 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received + +#define R8_USB_RX_LEN (*((PUINT8V)(0x40023408))) // USB receiving length +#define R32_USB_BUF_MODE (*((PUINT32V)(0x4002340c))) // USB endpoint buffer mode +#define R8_UEP4_1_MOD (*((PUINT8V)(0x4002340c))) // endpoint 4/1 mode +#define RB_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT) +#define RB_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN) +#define RB_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1 +// bUEPn_RX_EN & bUEPn_TX_EN & bUEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA +// 0 0 x: disable endpoint and disable buffer +// 1 0 0: 64 bytes buffer for receiving (OUT endpoint) +// 1 0 1: dual 64 bytes buffer by toggle bit bUEP_R_TOG selection for receiving (OUT endpoint), total=128bytes +// 0 1 0: 64 bytes buffer for transmittal (IN endpoint) +// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes +// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes +// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes +#define RB_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT) +#define RB_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN) +// bUEP4_RX_EN & bUEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA +// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) +// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes +// 0 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=128bytes +// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) +// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes + +#define R8_UEP2_3_MOD (*((PUINT8V)(0x4002340d))) // endpoint 2/3 mode +#define RB_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT) +#define RB_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN) +#define RB_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3 +#define RB_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT) +#define RB_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN) +#define RB_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2 + +#define R8_UH_EP_MOD R8_UEP2_3_MOD //host endpoint mode +#define RB_UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal +#define RB_UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint +// bUH_EP_TX_EN & bUH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA +// 0 x: disable endpoint and disable buffer +// 1 0: 64 bytes buffer for transmittal (OUT endpoint) +// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes +#define RB_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving +#define RB_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint +// bUH_EP_RX_EN & bUH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA +// 0 x: disable endpoint and disable buffer +// 1 0: 64 bytes buffer for receiving (IN endpoint) +// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes + +#define R8_UEP5_6_MOD (*((PUINT8V)(0x4002340e))) // endpoint 5/6 mode +#define RB_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT) +#define RB_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN) +#define RB_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6 +#define RB_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT) +#define RB_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN) +#define RB_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5 + +#define R8_UEP7_MOD (*((PUINT8V)(0x4002340f))) // endpoint 7 mode +#define RB_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT) +#define RB_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN) +#define RB_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7 + + +#define R16_UEP0_DMA (*((PUINT16V)(0x40023410))) // endpoint 0 DMA buffer address +#define R16_UEP1_DMA (*((PUINT16V)(0x40023414))) // endpoint 1 DMA buffer address +#define R16_UEP2_DMA (*((PUINT16V)(0x40023418))) // endpoint 2 DMA buffer address +#define R16_UH_RX_DMA R16_UEP2_DMA // host rx endpoint buffer high address +#define R16_UEP3_DMA (*((PUINT16V)(0x4002341c))) // endpoint 3 DMA buffer address + +#define R16_UEP4_DMA (*((PUINT16V)(0x40023420))) // endpoint 4 DMA buffer address +#define R16_UEP5_DMA (*((PUINT16V)(0x40023424))) // endpoint 5 DMA buffer address +#define R16_UEP6_DMA (*((PUINT16V)(0x40023428))) // endpoint 6 DMA buffer address +#define R16_UEP7_DMA (*((PUINT16V)(0x4002342c))) // endpoint 7 DMA buffer address + +#define R16_UH_TX_DMA R16_UEP3_DMA // host tx endpoint buffer high address +#define R32_USB_EP0_CTRL (*((PUINT32V)(0x40023430))) // endpoint 0 control & transmittal length +#define R8_UEP0_T_LEN (*((PUINT8V)(0x40023430))) // endpoint 0 transmittal length +#define R8_UEP0_CTRL (*((PUINT8V)(0x40023432))) // endpoint 0 control +#define R32_USB_EP1_CTRL (*((PUINT32V)(0x40023434))) // endpoint 1 control & transmittal length +#define R8_UEP1_T_LEN (*((PUINT8V)(0x40023434))) // endpoint 1 transmittal length +#define R8_UEP1_CTRL (*((PUINT8V)(0x40023436))) // endpoint 1 control +#define RB_UEP_R_TOG 0x80 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1 +#define RB_UEP_T_TOG 0x40 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1 +#define RB_UEP_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle +#define RB_UEP_R_RES1 0x08 // handshake response type high bit for USB endpoint X receiving (OUT) +#define RB_UEP_R_RES0 0x04 // handshake response type low bit for USB endpoint X receiving (OUT) +#define MASK_UEP_R_RES 0x0C // bit mask of handshake response type for USB endpoint X receiving (OUT) +#define UEP_R_RES_ACK 0x00 +#define UEP_R_RES_TOUT 0x04 +#define UEP_R_RES_NAK 0x08 +#define UEP_R_RES_STALL 0x0C +// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT) +// 00: ACK (ready) +// 01: no response, time out to host, for non-zero endpoint isochronous transactions +// 10: NAK (busy) +// 11: STALL (error) +#define RB_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN) +#define RB_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN) +#define MASK_UEP_T_RES 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN) +#define UEP_T_RES_ACK 0x00 +#define UEP_T_RES_TOUT 0x01 +#define UEP_T_RES_NAK 0x02 +#define UEP_T_RES_STALL 0x03 +// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN) +// 00: DATA0 or DATA1 then expecting ACK (ready) +// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions +// 10: NAK (busy) +// 11: STALL (error) + +#define R8_UH_SETUP R8_UEP1_CTRL // host aux setup +#define RB_UH_PRE_PID_EN 0x80 // USB host PRE PID enable for low speed device via hub +#define RB_UH_SOF_EN 0x40 // USB host automatic SOF enable + +#define R32_USB_EP2_CTRL (*((PUINT32V)(0x40023438))) // endpoint 2 control & transmittal length +#define R8_UEP2_T_LEN (*((PUINT8V)(0x40023438))) // endpoint 2 transmittal length +#define R8_UEP2_CTRL (*((PUINT8V)(0x4002343a))) // endpoint 2 control + +#define R8_UH_EP_PID R8_UEP2_T_LEN // host endpoint and PID +#define MASK_UH_TOKEN 0xF0 // bit mask of token PID for USB host transfer +#define MASK_UH_ENDP 0x0F // bit mask of endpoint number for USB host transfer + +#define R8_UH_RX_CTRL R8_UEP2_CTRL // host receiver endpoint control +#define RB_UH_R_TOG 0x80 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1 +#define RB_UH_R_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle +#define RB_UH_R_RES 0x04 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions + +#define R32_USB_EP3_CTRL (*((PUINT32V)(0x4002343c))) // endpoint 3 control & transmittal length +#define R8_UEP3_T_LEN (*((PUINT16V)(0x4002343c))) // endpoint 3 transmittal length +#define R8_UEP3_CTRL (*((PUINT8V)(0x4002343e))) // endpoint 3 control +#define R8_UH_TX_LEN (*((PUINT16V)(0x4002343c))) //R8_UEP3_T_LEN // host transmittal endpoint transmittal length + +#define R8_UH_TX_CTRL R8_UEP3_CTRL // host transmittal endpoint control +#define RB_UH_T_TOG 0x40 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1 +#define RB_UH_T_AUTO_TOG 0x10 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle +#define RB_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions + +#define R32_USB_EP4_CTRL (*((PUINT32V)(0x40023440))) // endpoint 4 control & transmittal length +#define R8_UEP4_T_LEN (*((PUINT8V)(0x40023440))) // endpoint 4 transmittal length +#define R8_UEP4_CTRL (*((PUINT8V)(0x40023442))) // endpoint 4 control + +#define R32_USB_EP5_CTRL (*((PUINT32V)(0x40023444))) // endpoint 5 control & transmittal length +#define R8_UEP5_T_LEN (*((PUINT8V)(0x40023444))) // endpoint 5 transmittal length +#define R8_UEP5_CTRL (*((PUINT8V)(0x40023446))) // endpoint 5 control + +#define R32_USB_EP6_CTRL (*((PUINT32V)(0x40023448))) // endpoint 6 control & transmittal length +#define R8_UEP6_T_LEN (*((PUINT8V)(0x40023448))) // endpoint 6 transmittal length +#define R8_UEP6_CTRL (*((PUINT8V)(0x4002344a))) // endpoint 6 control + +#define R32_USB_EP7_CTRL (*((PUINT32V)(0x4002344c))) // endpoint 7 control & transmittal length +#define R8_UEP7_T_LEN (*((PUINT8V)(0x4002344c))) // endpoint 7 transmittal length +#define R8_UEP7_CTRL (*((PUINT8V)(0x4002344e))) // endpoint 7 control + + +#ifdef __cplusplus +} +#endif + +#endif //__CH32V10x_USB_H + + +#ifndef __USB_TYPE__ +#define __USB_TYPE__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* USB constant and structure define */ + +/* USB PID */ +#ifndef USB_PID_SETUP +#define USB_PID_NULL 0x00 /* reserved PID */ +#define USB_PID_SOF 0x05 +#define USB_PID_SETUP 0x0D +#define USB_PID_IN 0x09 +#define USB_PID_OUT 0x01 +#define USB_PID_ACK 0x02 +#define USB_PID_NAK 0x0A +#define USB_PID_STALL 0x0E +#define USB_PID_DATA0 0x03 +#define USB_PID_DATA1 0x0B +#define USB_PID_PRE 0x0C +#endif + +/* USB standard device request code */ +#ifndef USB_GET_DESCRIPTOR +#define USB_GET_STATUS 0x00 +#define USB_CLEAR_FEATURE 0x01 +#define USB_SET_FEATURE 0x03 +#define USB_SET_ADDRESS 0x05 +#define USB_GET_DESCRIPTOR 0x06 +#define USB_SET_DESCRIPTOR 0x07 +#define USB_GET_CONFIGURATION 0x08 +#define USB_SET_CONFIGURATION 0x09 +#define USB_GET_INTERFACE 0x0A +#define USB_SET_INTERFACE 0x0B +#define USB_SYNCH_FRAME 0x0C +#endif + +/* USB hub class request code */ +#ifndef HUB_GET_DESCRIPTOR +#define HUB_GET_STATUS 0x00 +#define HUB_CLEAR_FEATURE 0x01 +#define HUB_GET_STATE 0x02 +#define HUB_SET_FEATURE 0x03 +#define HUB_GET_DESCRIPTOR 0x06 +#define HUB_SET_DESCRIPTOR 0x07 +#endif + +/* USB HID class request code */ +#ifndef HID_GET_REPORT +#define HID_GET_REPORT 0x01 +#define HID_GET_IDLE 0x02 +#define HID_GET_PROTOCOL 0x03 +#define HID_SET_REPORT 0x09 +#define HID_SET_IDLE 0x0A +#define HID_SET_PROTOCOL 0x0B +#endif + +/* Bit define for USB request type */ +#ifndef USB_REQ_TYP_MASK +#define USB_REQ_TYP_IN 0x80 /* control IN, device to host */ +#define USB_REQ_TYP_OUT 0x00 /* control OUT, host to device */ +#define USB_REQ_TYP_READ 0x80 /* control read, device to host */ +#define USB_REQ_TYP_WRITE 0x00 /* control write, host to device */ +#define USB_REQ_TYP_MASK 0x60 /* bit mask of request type */ +#define USB_REQ_TYP_STANDARD 0x00 +#define USB_REQ_TYP_CLASS 0x20 +#define USB_REQ_TYP_VENDOR 0x40 +#define USB_REQ_TYP_RESERVED 0x60 +#define USB_REQ_RECIP_MASK 0x1F /* bit mask of request recipient */ +#define USB_REQ_RECIP_DEVICE 0x00 +#define USB_REQ_RECIP_INTERF 0x01 +#define USB_REQ_RECIP_ENDP 0x02 +#define USB_REQ_RECIP_OTHER 0x03 +#endif + +/* USB request type for hub class request */ +#ifndef HUB_GET_HUB_DESCRIPTOR +#define HUB_CLEAR_HUB_FEATURE 0x20 +#define HUB_CLEAR_PORT_FEATURE 0x23 +#define HUB_GET_BUS_STATE 0xA3 +#define HUB_GET_HUB_DESCRIPTOR 0xA0 +#define HUB_GET_HUB_STATUS 0xA0 +#define HUB_GET_PORT_STATUS 0xA3 +#define HUB_SET_HUB_DESCRIPTOR 0x20 +#define HUB_SET_HUB_FEATURE 0x20 +#define HUB_SET_PORT_FEATURE 0x23 +#endif + +/* Hub class feature selectors */ +#ifndef HUB_PORT_RESET +#define HUB_C_HUB_LOCAL_POWER 0 +#define HUB_C_HUB_OVER_CURRENT 1 +#define HUB_PORT_CONNECTION 0 +#define HUB_PORT_ENABLE 1 +#define HUB_PORT_SUSPEND 2 +#define HUB_PORT_OVER_CURRENT 3 +#define HUB_PORT_RESET 4 +#define HUB_PORT_POWER 8 +#define HUB_PORT_LOW_SPEED 9 +#define HUB_C_PORT_CONNECTION 16 +#define HUB_C_PORT_ENABLE 17 +#define HUB_C_PORT_SUSPEND 18 +#define HUB_C_PORT_OVER_CURRENT 19 +#define HUB_C_PORT_RESET 20 +#endif + +/* USB descriptor type */ +#ifndef USB_DESCR_TYP_DEVICE +#define USB_DESCR_TYP_DEVICE 0x01 +#define USB_DESCR_TYP_CONFIG 0x02 +#define USB_DESCR_TYP_STRING 0x03 +#define USB_DESCR_TYP_INTERF 0x04 +#define USB_DESCR_TYP_ENDP 0x05 +#define USB_DESCR_TYP_QUALIF 0x06 +#define USB_DESCR_TYP_SPEED 0x07 +#define USB_DESCR_TYP_OTG 0x09 +#define USB_DESCR_TYP_HID 0x21 +#define USB_DESCR_TYP_REPORT 0x22 +#define USB_DESCR_TYP_PHYSIC 0x23 +#define USB_DESCR_TYP_CS_INTF 0x24 +#define USB_DESCR_TYP_CS_ENDP 0x25 +#define USB_DESCR_TYP_HUB 0x29 +#endif + +/* USB device class */ +#ifndef USB_DEV_CLASS_HUB +#define USB_DEV_CLASS_RESERVED 0x00 +#define USB_DEV_CLASS_AUDIO 0x01 +#define USB_DEV_CLASS_COMMUNIC 0x02 +#define USB_DEV_CLASS_HID 0x03 +#define USB_DEV_CLASS_MONITOR 0x04 +#define USB_DEV_CLASS_PHYSIC_IF 0x05 +#define USB_DEV_CLASS_POWER 0x06 +#define USB_DEV_CLASS_PRINTER 0x07 +#define USB_DEV_CLASS_STORAGE 0x08 +#define USB_DEV_CLASS_HUB 0x09 +#define USB_DEV_CLASS_VEN_SPEC 0xFF +#endif + +/* USB endpoint type and attributes */ +#ifndef USB_ENDP_TYPE_MASK +#define USB_ENDP_DIR_MASK 0x80 +#define USB_ENDP_ADDR_MASK 0x0F +#define USB_ENDP_TYPE_MASK 0x03 +#define USB_ENDP_TYPE_CTRL 0x00 +#define USB_ENDP_TYPE_ISOCH 0x01 +#define USB_ENDP_TYPE_BULK 0x02 +#define USB_ENDP_TYPE_INTER 0x03 +#endif + +#ifndef USB_DEVICE_ADDR +#define USB_DEVICE_ADDR 0x02 +#endif +#ifndef DEFAULT_ENDP0_SIZE +#define DEFAULT_ENDP0_SIZE 8 /* default maximum packet size for endpoint 0 */ +#endif +#ifndef MAX_PACKET_SIZE +#define MAX_PACKET_SIZE 64 /* maximum packet size */ +#endif +#ifndef USB_BO_CBW_SIZE +#define USB_BO_CBW_SIZE 0x1F +#define USB_BO_CSW_SIZE 0x0D +#endif +#ifndef USB_BO_CBW_SIG0 +#define USB_BO_CBW_SIG0 0x55 +#define USB_BO_CBW_SIG1 0x53 +#define USB_BO_CBW_SIG2 0x42 +#define USB_BO_CBW_SIG3 0x43 +#define USB_BO_CSW_SIG0 0x55 +#define USB_BO_CSW_SIG1 0x53 +#define USB_BO_CSW_SIG2 0x42 +#define USB_BO_CSW_SIG3 0x53 +#endif + +#ifndef __PACKED +#define __PACKED __attribute__((packed)) +#endif + +typedef struct __PACKED _USB_SETUP_REQ { + UINT8 bRequestType; + UINT8 bRequest; + UINT16 wValue; + UINT16 wIndex; + UINT16 wLength; +} USB_SETUP_REQ, *PUSB_SETUP_REQ; + + +typedef struct __PACKED _USB_DEVICE_DESCR { + UINT8 bLength; + UINT8 bDescriptorType; + UINT16 bcdUSB; + UINT8 bDeviceClass; + UINT8 bDeviceSubClass; + UINT8 bDeviceProtocol; + UINT8 bMaxPacketSize0; + UINT16 idVendor; + UINT16 idProduct; + UINT16 bcdDevice; + UINT8 iManufacturer; + UINT8 iProduct; + UINT8 iSerialNumber; + UINT8 bNumConfigurations; +} USB_DEV_DESCR, *PUSB_DEV_DESCR; + + +typedef struct __PACKED _USB_CONFIG_DESCR { + UINT8 bLength; + UINT8 bDescriptorType; + UINT16 wTotalLength; + UINT8 bNumInterfaces; + UINT8 bConfigurationValue; + UINT8 iConfiguration; + UINT8 bmAttributes; + UINT8 MaxPower; +} USB_CFG_DESCR, *PUSB_CFG_DESCR; + + +typedef struct __PACKED _USB_INTERF_DESCR { + UINT8 bLength; + UINT8 bDescriptorType; + UINT8 bInterfaceNumber; + UINT8 bAlternateSetting; + UINT8 bNumEndpoints; + UINT8 bInterfaceClass; + UINT8 bInterfaceSubClass; + UINT8 bInterfaceProtocol; + UINT8 iInterface; +} USB_ITF_DESCR, *PUSB_ITF_DESCR; + + +typedef struct __PACKED _USB_ENDPOINT_DESCR { + UINT8 bLength; + UINT8 bDescriptorType; + UINT8 bEndpointAddress; + UINT8 bmAttributes; + UINT16 wMaxPacketSize; + UINT8 bInterval; +} USB_ENDP_DESCR, *PUSB_ENDP_DESCR; + + +typedef struct __PACKED _USB_CONFIG_DESCR_LONG { + USB_CFG_DESCR cfg_descr; + USB_ITF_DESCR itf_descr; + USB_ENDP_DESCR endp_descr[1]; +} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG; + + +typedef struct __PACKED _USB_HUB_DESCR { + UINT8 bDescLength; + UINT8 bDescriptorType; + UINT8 bNbrPorts; + UINT8 wHubCharacteristicsL; + UINT8 wHubCharacteristicsH; + UINT8 bPwrOn2PwrGood; + UINT8 bHubContrCurrent; + UINT8 DeviceRemovable; + UINT8 PortPwrCtrlMask; +} USB_HUB_DESCR, *PUSB_HUB_DESCR; + + +typedef struct __PACKED _USB_HID_DESCR { + UINT8 bLength; + UINT8 bDescriptorType; + UINT16 bcdHID; + UINT8 bCountryCode; + UINT8 bNumDescriptors; + UINT8 bDescriptorTypeX; + UINT8 wDescriptorLengthL; + UINT8 wDescriptorLengthH; +} USB_HID_DESCR, *PUSB_HID_DESCR; + + +typedef struct __PACKED _UDISK_BOC_CBW {/* command of BulkOnly USB-FlashDisk */ + UINT32 mCBW_Sig; + UINT32 mCBW_Tag; + UINT32 mCBW_DataLen; /* uppest byte of data length, always is 0 */ + UINT8 mCBW_Flag; /* transfer direction and etc. */ + UINT8 mCBW_LUN; + UINT8 mCBW_CB_Len; /* length of command block */ + UINT8 mCBW_CB_Buf[16]; /* command block buffer */ +} UDISK_BOC_CBW, *PXUDISK_BOC_CBW; + + +typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */ + UINT32 mCBW_Sig; + UINT32 mCBW_Tag; + UINT32 mCSW_Residue; /* return: remainder bytes */ /* uppest byte of remainder length, always is 0 */ + UINT8 mCSW_Status; /* return: result status */ +} UDISK_BOC_CSW, *PXUDISK_BOC_CSW; + + +extern PUINT8 pEP0_RAM_Addr; //ep0(64) +extern PUINT8 pEP1_RAM_Addr; //ep1_out(64)+ep1_in(64) +extern PUINT8 pEP2_RAM_Addr; //ep2_out(64)+ep2_in(64) +extern PUINT8 pEP3_RAM_Addr; //ep3_out(64)+ep3_in(64) +extern PUINT8 pEP4_RAM_Addr; //ep4_out(64)+ep4_in(64) +extern PUINT8 pEP5_RAM_Addr; //ep5_out(64)+ep5_in(64) +extern PUINT8 pEP6_RAM_Addr; //ep6_out(64)+ep6_in(64) +extern PUINT8 pEP7_RAM_Addr; //ep7_out(64)+ep7_in(64) + +#define pSetupReqPak ((PUSB_SETUP_REQ)pEP0_RAM_Addr) +#define pEP0_DataBuf (pEP0_RAM_Addr) +#define pEP1_OUT_DataBuf (pEP1_RAM_Addr) +#define pEP1_IN_DataBuf (pEP1_RAM_Addr+64) +#define pEP2_OUT_DataBuf (pEP2_RAM_Addr) +#define pEP2_IN_DataBuf (pEP2_RAM_Addr+64) +#define pEP3_OUT_DataBuf (pEP3_RAM_Addr) +#define pEP3_IN_DataBuf (pEP3_RAM_Addr+64) +#define pEP4_OUT_DataBuf (pEP4_RAM_Addr) +#define pEP4_IN_DataBuf (pEP4_RAM_Addr+64) +#define pEP5_OUT_DataBuf (pEP5_RAM_Addr) +#define pEP5_IN_DataBuf (pEP5_RAM_Addr+64) +#define pEP6_OUT_DataBuf (pEP6_RAM_Addr) +#define pEP6_IN_DataBuf (pEP6_RAM_Addr+64) +#define pEP7_OUT_DataBuf (pEP7_RAM_Addr) +#define pEP7_IN_DataBuf (pEP7_RAM_Addr+64) + + + +void USB_DeviceInit( void ); +void USB_DevTransProcess( void ); + +void DevEP1_OUT_Deal( UINT8 l ); +void DevEP2_OUT_Deal( UINT8 l ); +void DevEP3_OUT_Deal( UINT8 l ); +void DevEP4_OUT_Deal( UINT8 l ); +void DevEP5_OUT_Deal( UINT8 l ); +void DevEP6_OUT_Deal( UINT8 l ); +void DevEP7_OUT_Deal( UINT8 l ); + +void DevEP1_IN_Deal( UINT8 l ); +void DevEP2_IN_Deal( UINT8 l ); +void DevEP3_IN_Deal( UINT8 l ); +void DevEP4_IN_Deal( UINT8 l ); +void DevEP5_IN_Deal( UINT8 l ); +void DevEP6_IN_Deal( UINT8 l ); +void DevEP7_IN_Deal( UINT8 l ); + +#define EP1_GetINSta() (R8_UEP1_CTRL&UEP_T_RES_NAK) +#define EP2_GetINSta() (R8_UEP2_CTRL&UEP_T_RES_NAK) +#define EP3_GetINSta() (R8_UEP3_CTRL&UEP_T_RES_NAK) +#define EP4_GetINSta() (R8_UEP4_CTRL&UEP_T_RES_NAK) +#define EP5_GetINSta() (R8_UEP5_CTRL&UEP_T_RES_NAK) +#define EP6_GetINSta() (R8_UEP6_CTRL&UEP_T_RES_NAK) +#define EP7_GetINSta() (R8_UEP7_CTRL&UEP_T_RES_NAK) + +#ifdef __cplusplus +} +#endif + +#endif // __USB_TYPE__ + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb_host.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb_host.h new file mode 100644 index 0000000000..3a5b7480c7 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_usb_host.h @@ -0,0 +1,97 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usb_host.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the USB +* Host firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_USBHOST_H +#define __CH32V10x_USBHOST_H + +#include "ch32v10x_usb.h" + +#ifdef __cplusplus + extern "C" { +#endif + +#define ERR_SUCCESS 0x00 +#define ERR_USB_CONNECT 0x15 +#define ERR_USB_DISCON 0x16 +#define ERR_USB_BUF_OVER 0x17 +#define ERR_USB_DISK_ERR 0x1F +#define ERR_USB_TRANSFER 0x20 +#define ERR_USB_UNSUPPORT 0xFB +#define ERR_USB_UNKNOWN 0xFE +#define ERR_AOA_PROTOCOL 0x41 + +#define ROOT_DEV_DISCONNECT 0 +#define ROOT_DEV_CONNECTED 1 +#define ROOT_DEV_FAILED 2 +#define ROOT_DEV_SUCCESS 3 +#define DEV_TYPE_KEYBOARD ( USB_DEV_CLASS_HID | 0x20 ) +#define DEV_TYPE_MOUSE ( USB_DEV_CLASS_HID | 0x30 ) +#define DEF_AOA_DEVICE 0xF0 +#define DEV_TYPE_UNKNOW 0xFF + +#define HUB_MAX_PORTS 4 +#define WAIT_USB_TOUT_200US 3000 + +typedef struct +{ + UINT8 DeviceStatus; + UINT8 DeviceAddress; + UINT8 DeviceSpeed; + UINT8 DeviceType; + UINT16 DeviceVID; + UINT16 DevicePID; + UINT8 GpVar[4]; + UINT8 GpHUBPortNum; +} _RootHubDev; + + +extern _RootHubDev ThisUsbDev; +extern UINT8 UsbDevEndp0Size; +extern UINT8 FoundNewDev; + +extern PUINT8 pHOST_RX_RAM_Addr; +extern PUINT8 pHOST_TX_RAM_Addr; +#define pSetupReq ((PUSB_SETUP_REQ)pHOST_TX_RAM_Addr) + +extern const UINT8 SetupGetDevDescr[]; +extern const UINT8 SetupGetCfgDescr[]; +extern const UINT8 SetupSetUsbAddr[]; +extern const UINT8 SetupSetUsbConfig[]; +extern const UINT8 SetupSetUsbInterface[]; +extern const UINT8 SetupClrEndpStall[]; + + +void DisableRootHubPort(void) ; +UINT8 AnalyzeRootHub( void ) ; +void SetHostUsbAddr( UINT8 addr ); +void SetUsbSpeed( UINT8 FullSpeed ); +void ResetRootHubPort(void); +UINT8 EnableRootHubPort(void); +void SelectHubPort( UINT8 HubPortIndex ); +UINT8 WaitUSB_Interrupt( void ); +UINT8 USBHostTransact( UINT8 endp_pid, UINT8 tog, UINT32 timeout ); +UINT8 HostCtrlTransfer( PUINT8 DataBuf, PUINT8 RetLen ); +void CopySetupReqPkg( const UINT8 *pReqPkt ); +UINT8 CtrlGetDeviceDescr( PUINT8 DataBuf ); +UINT8 CtrlGetConfigDescr( PUINT8 DataBuf ); +UINT8 CtrlSetUsbAddress( UINT8 addr ); +UINT8 CtrlSetUsbConfig( UINT8 cfg ); +UINT8 CtrlClearEndpStall( UINT8 endp ) ; +UINT8 CtrlSetUsbIntercace( UINT8 cfg ); + +void USB_HostInit( void ); +UINT8 InitRootDevice( PUINT8 DataBuf ); +UINT8 HubGetPortStatus( UINT8 HubPortIndex ); // ѯHUB˿״̬,TxBuffer +UINT8 HubSetPortFeature( UINT8 HubPortIndex, UINT8 FeatureSelt ); // HUB˿ +UINT8 HubClearPortFeature( UINT8 HubPortIndex, UINT8 FeatureSelt ); // HUB˿ +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_USBHOST_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_wwdg.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_wwdg.h new file mode 100644 index 0000000000..780eaeff75 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/inc/ch32v10x_wwdg.h @@ -0,0 +1,40 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_wwdg.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file contains all the functions prototypes for the WWDG +* firmware library. +*******************************************************************************/ +#ifndef __CH32V10x_WWDG_H +#define __CH32V10x_WWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "ch32v10x.h" + + +/* WWDG_Prescaler */ +#define WWDG_Prescaler_1 ((uint32_t)0x00000000) +#define WWDG_Prescaler_2 ((uint32_t)0x00000080) +#define WWDG_Prescaler_4 ((uint32_t)0x00000100) +#define WWDG_Prescaler_8 ((uint32_t)0x00000180) + + +void WWDG_DeInit(void); +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); +void WWDG_SetWindowValue(uint8_t WindowValue); +void WWDG_EnableIT(void); +void WWDG_SetCounter(uint8_t Counter); +void WWDG_Enable(uint8_t Counter); +FlagStatus WWDG_GetFlagStatus(void); +void WWDG_ClearFlag(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __CH32V10x_WWDG_H */ + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_adc.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_adc.c new file mode 100644 index 0000000000..ab125bf62e --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_adc.c @@ -0,0 +1,1029 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_adc.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the ADC firmware functions. +*******************************************************************************/ +#include "ch32v10x_adc.h" +#include "ch32v10x_rcc.h" + +/* ADC DISCNUM mask */ +#define CTLR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) + +/* ADC DISCEN mask */ +#define CTLR1_DISCEN_Set ((uint32_t)0x00000800) +#define CTLR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) + +/* ADC JAUTO mask */ +#define CTLR1_JAUTO_Set ((uint32_t)0x00000400) +#define CTLR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) + +/* ADC JDISCEN mask */ +#define CTLR1_JDISCEN_Set ((uint32_t)0x00001000) +#define CTLR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) + +/* ADC AWDCH mask */ +#define CTLR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) + +/* ADC Analog watchdog enable mode mask */ +#define CTLR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) + +/* CTLR1 register Mask */ +#define CTLR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) + +/* ADC ADON mask */ +#define CTLR2_ADON_Set ((uint32_t)0x00000001) +#define CTLR2_ADON_Reset ((uint32_t)0xFFFFFFFE) + +/* ADC DMA mask */ +#define CTLR2_DMA_Set ((uint32_t)0x00000100) +#define CTLR2_DMA_Reset ((uint32_t)0xFFFFFEFF) + +/* ADC RSTCAL mask */ +#define CTLR2_RSTCAL_Set ((uint32_t)0x00000008) + +/* ADC CAL mask */ +#define CTLR2_CAL_Set ((uint32_t)0x00000004) + +/* ADC SWSTART mask */ +#define CTLR2_SWSTART_Set ((uint32_t)0x00400000) + +/* ADC EXTTRIG mask */ +#define CTLR2_EXTTRIG_Set ((uint32_t)0x00100000) +#define CTLR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) + +/* ADC Software start mask */ +#define CTLR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) +#define CTLR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) + +/* ADC JEXTSEL mask */ +#define CTLR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) + +/* ADC JEXTTRIG mask */ +#define CTLR2_JEXTTRIG_Set ((uint32_t)0x00008000) +#define CTLR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) + +/* ADC JSWSTART mask */ +#define CTLR2_JSWSTART_Set ((uint32_t)0x00200000) + +/* ADC injected software start mask */ +#define CTLR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) +#define CTLR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) + +/* ADC TSPD mask */ +#define CTLR2_TSVREFE_Set ((uint32_t)0x00800000) +#define CTLR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) + +/* CTLR2 register Mask */ +#define CTLR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) + +/* ADC SQx mask */ +#define RSQR3_SQ_Set ((uint32_t)0x0000001F) +#define RSQR2_SQ_Set ((uint32_t)0x0000001F) +#define RSQR1_SQ_Set ((uint32_t)0x0000001F) + +/* RSQR1 register Mask */ +#define RSQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) + +/* ADC JSQx mask */ +#define ISQR_JSQ_Set ((uint32_t)0x0000001F) + +/* ADC JL mask */ +#define ISQR_JL_Set ((uint32_t)0x00300000) +#define ISQR_JL_Reset ((uint32_t)0xFFCFFFFF) + +/* ADC SMPx mask */ +#define SAMPTR1_SMP_Set ((uint32_t)0x00000007) +#define SAMPTR2_SMP_Set ((uint32_t)0x00000007) + +/* ADC IDATARx registers offset */ +#define IDATAR_Offset ((uint8_t)0x28) + +/* ADC1 RDATAR register base address */ +#define RDATAR_ADDRESS ((uint32_t)0x4001244C) + +/******************************************************************************* +* Function Name : ADC_DeInit +* Description : Deinitializes the ADCx peripheral registers to their default +* reset values. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : None +*******************************************************************************/ +void ADC_DeInit(ADC_TypeDef* ADCx) +{ + if (ADCx == ADC1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); + } +} + +/******************************************************************************* +* Function Name : ADC_Init +* Description : Initializes the ADCx peripheral according to the specified +* parameters in the ADC_InitStruct. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_InitStruct: pointer to an ADC_InitTypeDef structure that +* contains the configuration information for the specified ADC peripheral. +* Return : None +*******************************************************************************/ +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) +{ + uint32_t tmpreg1 = 0; + uint8_t tmpreg2 = 0; + + tmpreg1 = ADCx->CTLR1; + tmpreg1 &= CTLR1_CLEAR_Mask; + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8)); + ADCx->CTLR1 = tmpreg1; + + tmpreg1 = ADCx->CTLR2; + tmpreg1 &= CTLR2_CLEAR_Mask; + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | + ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); + ADCx->CTLR2 = tmpreg1; + + tmpreg1 = ADCx->RSQR1; + tmpreg1 &= RSQR1_CLEAR_Mask; + tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1); + tmpreg1 |= (uint32_t)tmpreg2 << 20; + ADCx->RSQR1 = tmpreg1; +} + +/******************************************************************************* +* Function Name : ADC_StructInit +* Description : Fills each ADC_InitStruct member with its default value. +* Input : ADC_InitStruct : pointer to an ADC_InitTypeDef structure that +* contains the configuration information for the specified ADC peripheral. +* Return : None +*******************************************************************************/ +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) +{ + ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; + ADC_InitStruct->ADC_ScanConvMode = DISABLE; + ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; + ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; + ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; + ADC_InitStruct->ADC_NbrOfChannel = 1; +} + +/******************************************************************************* +* Function Name : ADC_Cmd +* Description : Enables or disables the specified ADC peripheral. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_ADON_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_ADON_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_DMACmd +* Description : Enables or disables the specified ADC DMA request. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_DMA_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_DMA_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_ITConfig +* Description : Enables or disables the specified ADC interrupts. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. +* ADC_IT_EOC: End of conversion interrupt mask. +* ADC_IT_AWD: Analog watchdog interrupt mask. +* ADC_IT_JEOC: End of injected conversion interrupt mask. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState) +{ + uint8_t itmask = 0; + + itmask = (uint8_t)ADC_IT; + + if (NewState != DISABLE) + { + ADCx->CTLR1 |= itmask; + } + else + { + ADCx->CTLR1 &= (~(uint32_t)itmask); + } +} + +/******************************************************************************* +* Function Name : ADC_ResetCalibration +* Description : Resets the selected ADC calibration registers. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : None +*******************************************************************************/ +void ADC_ResetCalibration(ADC_TypeDef* ADCx) +{ + ADCx->CTLR2 |= CTLR2_RSTCAL_Set; +} + +/******************************************************************************* +* Function Name : ADC_GetResetCalibrationStatus +* Description : Gets the selected ADC reset calibration registers status. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + + if ((ADCx->CTLR2 & CTLR2_RSTCAL_Set) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_StartCalibration +* Description : Starts the selected ADC calibration process. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : None +*******************************************************************************/ +void ADC_StartCalibration(ADC_TypeDef* ADCx) +{ + ADCx->CTLR2 |= CTLR2_CAL_Set; +} + +/******************************************************************************* +* Function Name : ADC_GetCalibrationStatus +* Description : Starts the selected ADC calibration process. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + + if ((ADCx->CTLR2 & CTLR2_CAL_Set) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_SoftwareStartConvCmd +* Description : Enables or disables the selected ADC software start conversion. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_EXTTRIG_SWSTART_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_EXTTRIG_SWSTART_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_GetSoftwareStartConvStatus +* Description : Gets the selected ADC Software start conversion Status. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + + if ((ADCx->CTLR2 & CTLR2_SWSTART_Set) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_DiscModeChannelCountConfig +* Description : Configures the discontinuous mode for the selected ADC regular +* group channel. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Number: specifies the discontinuous mode regular channel +* count value. +* This number must be between 1 and 8. +* Return : None +*******************************************************************************/ +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + + tmpreg1 = ADCx->CTLR1; + tmpreg1 &= CTLR1_DISCNUM_Reset; + tmpreg2 = Number - 1; + tmpreg1 |= tmpreg2 << 13; + ADCx->CTLR1 = tmpreg1; +} + +/******************************************************************************* +* Function Name : ADC_DiscModeCmd +* Description : Enables or disables the discontinuous mode on regular group +* channel for the specified ADC. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR1 |= CTLR1_DISCEN_Set; + } + else + { + ADCx->CTLR1 &= CTLR1_DISCEN_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_RegularChannelConfig +* Description : Configures for the selected ADC regular channel its corresponding +* rank in the sequencer and its sample time. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_Channel: the ADC channel to configure. +* ADC_Channel_0: ADC Channel0 selected. +* ADC_Channel_1: ADC Channel1 selected. +* ADC_Channel_2: ADC Channel2 selected. +* ADC_Channel_3: ADC Channel3 selected. +* ADC_Channel_4: ADC Channel4 selected. +* ADC_Channel_5: ADC Channel5 selected. +* ADC_Channel_6: ADC Channel6 selected. +* ADC_Channel_7: ADC Channel7 selected. +* ADC_Channel_8: ADC Channel8 selected. +* ADC_Channel_9: ADC Channel9 selected. +* ADC_Channel_10: ADC Channel10 selected. +* ADC_Channel_11: ADC Channel11 selected. +* ADC_Channel_12: ADC Channel12 selected. +* ADC_Channel_13: ADC Channel13 selected. +* ADC_Channel_14: ADC Channel14 selected. +* ADC_Channel_15: ADC Channel15 selected. +* ADC_Channel_16: ADC Channel16 selected. +* ADC_Channel_17: ADC Channel17 selected. +* Rank: The rank in the regular group sequencer. +* This parameter must be between 1 to 16. +* ADC_SampleTime: The sample time value to be set for the selected channel. +* ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles. +* ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles. +* ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles. +* ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles. +* ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles. +* ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles. +* ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles. +* ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles. +* Return : None +*******************************************************************************/ +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0; + + if (ADC_Channel > ADC_Channel_9) + { + tmpreg1 = ADCx->SAMPTR1; + tmpreg2 = SAMPTR1_SMP_Set << (3 * (ADC_Channel - 10)); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); + tmpreg1 |= tmpreg2; + ADCx->SAMPTR1 = tmpreg1; + } + else + { + tmpreg1 = ADCx->SAMPTR2; + tmpreg2 = SAMPTR2_SMP_Set << (3 * ADC_Channel); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + tmpreg1 |= tmpreg2; + ADCx->SAMPTR2 = tmpreg1; + } + + if (Rank < 7) + { + tmpreg1 = ADCx->RSQR3; + tmpreg2 = RSQR3_SQ_Set << (5 * (Rank - 1)); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); + tmpreg1 |= tmpreg2; + ADCx->RSQR3 = tmpreg1; + } + else if (Rank < 13) + { + tmpreg1 = ADCx->RSQR2; + tmpreg2 = RSQR2_SQ_Set << (5 * (Rank - 7)); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); + tmpreg1 |= tmpreg2; + ADCx->RSQR2 = tmpreg1; + } + else + { + tmpreg1 = ADCx->RSQR1; + tmpreg2 = RSQR1_SQ_Set << (5 * (Rank - 13)); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); + tmpreg1 |= tmpreg2; + ADCx->RSQR1 = tmpreg1; + } +} + +/******************************************************************************* +* Function Name : ADC_ExternalTrigConvCmd +* Description : Enables or disables the ADCx conversion through external trigger. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_EXTTRIG_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_EXTTRIG_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_GetConversionValue +* Description : Returns the last ADCx conversion result data for regular channel. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : ADCx->RDATAR: +* The Data conversion value. +*******************************************************************************/ +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) +{ + return (uint16_t) ADCx->RDATAR; +} + +/******************************************************************************* +* Function Name : ADC_GetDualModeConversionValue +* Description : Returns the last ADC1 and ADC2 conversion result data in dual mode. +* Input : None +* Return : RDATAR_ADDRESS: +* The Data conversion value. +*******************************************************************************/ +uint32_t ADC_GetDualModeConversionValue(void) +{ + return (*(__IO uint32_t *) RDATAR_ADDRESS); +} + +/******************************************************************************* +* Function Name : ADC_AutoInjectedConvCmd +* Description : Enables or disables the selected ADC automatic injected group +* conversion after regular one. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR1 |= CTLR1_JAUTO_Set; + } + else + { + ADCx->CTLR1 &= CTLR1_JAUTO_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_InjectedDiscModeCmd +* Description : Enables or disables the discontinuous mode for injected group +* channel for the specified ADC. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR1 |= CTLR1_JDISCEN_Set; + } + else + { + ADCx->CTLR1 &= CTLR1_JDISCEN_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_ExternalTrigInjectedConvConfig +* Description : Configures the ADCx external trigger for injected channels conversion. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_ExternalTrigInjecConv: specifies the ADC trigger to start +* injected conversion. +* ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected. +* ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected. +* ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected. +* ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected. +* ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected. +* ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected. +* ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt +* line 15 event selected. +* ADC_ExternalTrigInjecConv_None: Injected conversion started +* by software and not by external trigger. +* Return : None +*******************************************************************************/ +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv) +{ + uint32_t tmpreg = 0; + + tmpreg = ADCx->CTLR2; + tmpreg &= CTLR2_JEXTSEL_Reset; + tmpreg |= ADC_ExternalTrigInjecConv; + ADCx->CTLR2 = tmpreg; +} + +/******************************************************************************* +* Function Name : ADC_ExternalTrigInjectedConvCmd +* Description : Enables or disables the ADCx injected channels conversion through +* external trigger. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_JEXTTRIG_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_JEXTTRIG_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_SoftwareStartInjectedConvCmd +* Description : Enables or disables the selected ADC start of the injected +* channels conversion. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADCx->CTLR2 |= CTLR2_JEXTTRIG_JSWSTART_Set; + } + else + { + ADCx->CTLR2 &= CTLR2_JEXTTRIG_JSWSTART_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_GetSoftwareStartInjectedConvCmdStatus +* Description : Gets the selected ADC Software start injected conversion Status. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + + if ((ADCx->CTLR2 & CTLR2_JSWSTART_Set) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_InjectedChannelConfig +* Description : Configures for the selected ADC injected channel its corresponding +* rank in the sequencer and its sample time. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_Channel: the ADC channel to configure. +* ADC_Channel_0: ADC Channel0 selected. +* ADC_Channel_1: ADC Channel1 selected. +* ADC_Channel_2: ADC Channel2 selected. +* ADC_Channel_3: ADC Channel3 selected. +* ADC_Channel_4: ADC Channel4 selected. +* ADC_Channel_5: ADC Channel5 selected. +* ADC_Channel_6: ADC Channel6 selected. +* ADC_Channel_7: ADC Channel7 selected. +* ADC_Channel_8: ADC Channel8 selected. +* ADC_Channel_9: ADC Channel9 selected. +* ADC_Channel_10: ADC Channel10 selected. +* ADC_Channel_11: ADC Channel11 selected. +* ADC_Channel_12: ADC Channel12 selected. +* ADC_Channel_13: ADC Channel13 selected. +* ADC_Channel_14: ADC Channel14 selected. +* ADC_Channel_15: ADC Channel15 selected. +* ADC_Channel_16: ADC Channel16 selected. +* ADC_Channel_17: ADC Channel17 selected. +* Rank: The rank in the injected group sequencer. +* This parameter must be between 1 to 4. +* ADC_SampleTime: The sample time value to be set for the selected channel. +* ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles. +* ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles. +* ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles. +* ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles. +* ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles. +* ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles. +* ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles. +* ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles. +* Return : None +*******************************************************************************/ +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; + + if (ADC_Channel > ADC_Channel_9) + { + tmpreg1 = ADCx->SAMPTR1; + tmpreg2 = SAMPTR1_SMP_Set << (3*(ADC_Channel - 10)); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); + tmpreg1 |= tmpreg2; + ADCx->SAMPTR1 = tmpreg1; + } + else + { + tmpreg1 = ADCx->SAMPTR2; + tmpreg2 = SAMPTR2_SMP_Set << (3 * ADC_Channel); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + tmpreg1 |= tmpreg2; + ADCx->SAMPTR2 = tmpreg1; + } + + tmpreg1 = ADCx->ISQR; + tmpreg3 = (tmpreg1 & ISQR_JL_Set)>> 20; + tmpreg2 = ISQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + tmpreg1 &= ~tmpreg2; + tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + tmpreg1 |= tmpreg2; + ADCx->ISQR = tmpreg1; +} + +/******************************************************************************* +* Function Name : ADC_InjectedSequencerLengthConfig +* Description : Configures the sequencer length for injected channels. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* Length: The sequencer length. +* This parameter must be a number between 1 to 4. +* Return : None +*******************************************************************************/ +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + + tmpreg1 = ADCx->ISQR; + tmpreg1 &= ISQR_JL_Reset; + tmpreg2 = Length - 1; + tmpreg1 |= tmpreg2 << 20; + ADCx->ISQR = tmpreg1; +} + +/******************************************************************************* +* Function Name : ADC_SetInjectedOffset +* Description : Set the injected channels conversion value offset. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_InjectedChannel: the ADC injected channel to set its offset. +* ADC_InjectedChannel_1: Injected Channel1 selected. +* ADC_InjectedChannel_2: Injected Channel2 selected. +* ADC_InjectedChannel_3: Injected Channel3 selected. +* ADC_InjectedChannel_4: Injected Channel4 selected. +* Offset: the offset value for the selected ADC injected channel. +* This parameter must be a 12bit value. +* Return : None +*******************************************************************************/ +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) +{ + __IO uint32_t tmp = 0; + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel; + + *(__IO uint32_t *) tmp = (uint32_t)Offset; +} + +/******************************************************************************* +* Function Name : ADC_GetInjectedConversionValue +* Description : Returns the ADC injected channel conversion result. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_InjectedChannel: the converted ADC injected channel. +* ADC_InjectedChannel_1: Injected Channel1 selected. +* ADC_InjectedChannel_2: Injected Channel2 selected. +* ADC_InjectedChannel_3: Injected Channel3 selected. +* ADC_InjectedChannel_4: Injected Channel4 selected. +* Return : tmp: The Data conversion value. +*******************************************************************************/ +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel) +{ + __IO uint32_t tmp = 0; + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel + IDATAR_Offset; + + return (uint16_t) (*(__IO uint32_t*) tmp); +} + +/******************************************************************************* +* Function Name : ADC_AnalogWatchdogCmd +* Description : Enables or disables the analog watchdog on single/all regular +* or injected channels. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_AnalogWatchdog: the ADC analog watchdog configuration. +* ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a +* single regular channel. +* ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a +* single injected channel. +* ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog +* on a single regular or injected channel. +* ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all +* regular channel. +* ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all +* injected channel. +* ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on +* all regular and injected channels. +* ADC_AnalogWatchdog_None: No channel guarded by the analog +* watchdog. +* Return : None +*******************************************************************************/ +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) +{ + uint32_t tmpreg = 0; + + tmpreg = ADCx->CTLR1; + tmpreg &= CTLR1_AWDMode_Reset; + tmpreg |= ADC_AnalogWatchdog; + ADCx->CTLR1 = tmpreg; +} + +/******************************************************************************* +* Function Name : ADC_AnalogWatchdogThresholdsConfig +* Description : Configures the high and low thresholds of the analog watchdog. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* HighThreshold: the ADC analog watchdog High threshold value. +* This parameter must be a 12bit value. +* LowThreshold: the ADC analog watchdog Low threshold value. +* This parameter must be a 12bit value. +* Return : None +*******************************************************************************/ +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, + uint16_t LowThreshold) +{ + ADCx->WDHTR = HighThreshold; + ADCx->WDLTR = LowThreshold; +} + +/******************************************************************************* +* Function Name : ADC_AnalogWatchdogSingleChannelConfig +* Description : Configures the analog watchdog guarded single channel. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_Channel: the ADC channel to configure for the analog watchdog. +* ADC_Channel_0: ADC Channel0 selected. +* ADC_Channel_1: ADC Channel1 selected. +* ADC_Channel_2: ADC Channel2 selected. +* ADC_Channel_3: ADC Channel3 selected. +* ADC_Channel_4: ADC Channel4 selected. +* ADC_Channel_5: ADC Channel5 selected. +* ADC_Channel_6: ADC Channel6 selected. +* ADC_Channel_7: ADC Channel7 selected. +* ADC_Channel_8: ADC Channel8 selected. +* ADC_Channel_9: ADC Channel9 selected. +* ADC_Channel_10: ADC Channel10 selected. +* ADC_Channel_11: ADC Channel11 selected. +* ADC_Channel_12: ADC Channel12 selected. +* ADC_Channel_13: ADC Channel13 selected. +* ADC_Channel_14: ADC Channel14 selected. +* ADC_Channel_15: ADC Channel15 selected. +* ADC_Channel_16: ADC Channel16 selected. +* ADC_Channel_17: ADC Channel17 selected. +* Return : None +*******************************************************************************/ +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) +{ + uint32_t tmpreg = 0; + + tmpreg = ADCx->CTLR1; + tmpreg &= CTLR1_AWDCH_Reset; + tmpreg |= ADC_Channel; + ADCx->CTLR1 = tmpreg; +} + +/******************************************************************************* +* Function Name : ADC_TempSensorVrefintCmd +* Description : Enables or disables the temperature sensor and Vrefint channel. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void ADC_TempSensorVrefintCmd(FunctionalState NewState) +{ + if (NewState != DISABLE) + { + ADC1->CTLR2 |= CTLR2_TSVREFE_Set; + } + else + { + ADC1->CTLR2 &= CTLR2_TSVREFE_Reset; + } +} + +/******************************************************************************* +* Function Name : ADC_GetFlagStatus +* Description : Checks whether the specified ADC flag is set or not. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_FLAG: specifies the flag to check. +* ADC_FLAG_AWD: Analog watchdog flag. +* ADC_FLAG_EOC: End of conversion flag. +* ADC_FLAG_JEOC: End of injected group conversion flag. +* ADC_FLAG_JSTRT: Start of injected group conversion flag. +* ADC_FLAG_STRT: Start of regular group conversion flag. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + FlagStatus bitstatus = RESET; + + if ((ADCx->STATR & ADC_FLAG) != (uint8_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_ClearFlag +* Description : Clears the ADCx's pending flags. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_FLAG: specifies the flag to clear. +* ADC_FLAG_AWD: Analog watchdog flag. +* ADC_FLAG_EOC: End of conversion flag. +* ADC_FLAG_JEOC: End of injected group conversion flag. +* ADC_FLAG_JSTRT: Start of injected group conversion flag. +* ADC_FLAG_STRT: Start of regular group conversion flag. +* Return : None +*******************************************************************************/ +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + ADCx->STATR = ~(uint32_t)ADC_FLAG; +} + +/******************************************************************************* +* Function Name : ADC_GetITStatus +* Description : Checks whether the specified ADC interrupt has occurred or not. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_IT: specifies the ADC interrupt source to check. +* ADC_IT_EOC: End of conversion interrupt mask. +* ADC_IT_AWD: Analog watchdog interrupt mask. +* ADC_IT_JEOC: End of injected conversion interrupt mask. +* Return : ITStatus: SET or RESET. +*******************************************************************************/ +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t itmask = 0, enablestatus = 0; + + itmask = ADC_IT >> 8; + enablestatus = (ADCx->CTLR1 & (uint8_t)ADC_IT) ; + + if (((ADCx->STATR & itmask) != (uint32_t)RESET) && enablestatus) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : ADC_ClearITPendingBit +* Description : Clears the ADCx's interrupt pending bits. +* Input : ADCx: +* where x can be 1 to select the ADC peripheral. +* ADC_IT: specifies the ADC interrupt pending bit to clear. +* ADC_IT_EOC: End of conversion interrupt mask. +* ADC_IT_AWD: Analog watchdog interrupt mask. +* ADC_IT_JEOC: End of injected conversion interrupt mask. +* Return : None +*******************************************************************************/ +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + uint8_t itmask = 0; + + itmask = (uint8_t)(ADC_IT >> 8); + ADCx->STATR = ~(uint32_t)itmask; +} + +/******************************************************************************* +* Function Name : TempSensor_Volt_To_Temper +* Description : Internal Temperature Sensor Voltage to temperature. +* Input : Value: Voltage Value. +* Return : Temper: Temperature Value. +*******************************************************************************/ +s32 TempSensor_Volt_To_Temper(s32 Value) +{ + s32 Temper, Refer_Volt, Refer_Temper; + s32 k=43; + + Refer_Volt = (s32)((*(u32*)0x1FFFF898)&0x0000FFFF); + Refer_Temper = (s32)(((*(u32*)0x1FFFF898)>>16) & 0x0000FFFF); + + Temper = Refer_Temper + ((Value-Refer_Volt)*10+(k>>1))/k; + + return Temper; +} + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_bkp.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_bkp.c new file mode 100644 index 0000000000..693101fe09 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_bkp.c @@ -0,0 +1,221 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_bkp.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the BKP firmware functions. +*******************************************************************************/ +#include "ch32v10x_bkp.h" +#include "ch32v10x_rcc.h" + +/* BKP registers bit mask */ + +/* OCTLR register bit mask */ +#define OCTLR_CAL_MASK ((uint16_t)0xFF80) +#define OCTLR_MASK ((uint16_t)0xFC7F) + +/******************************************************************************* +* Function Name : BKP_DeInit +* Description : Deinitializes the BKP peripheral registers to their default +* reset values. +* Input : None +* Return : None +*******************************************************************************/ +void BKP_DeInit(void) +{ + RCC_BackupResetCmd(ENABLE); + RCC_BackupResetCmd(DISABLE); +} + +/******************************************************************************* +* Function Name : BKP_TamperPinLevelConfig +* Description : Configures the Tamper Pin active level. +* Input : BKP_TamperPinLevel: specifies the Tamper Pin active level. +* BKP_TamperPinLevel_High: Tamper pin active on high level. +* BKP_TamperPinLevel_Low: Tamper pin active on low level. +* Return : None +*******************************************************************************/ +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) +{ + if(BKP_TamperPinLevel) + { + BKP->TPCTLR |= (1<<1); + } + else + { + BKP->TPCTLR &= ~(1<<1); + } +} + +/******************************************************************************* +* Function Name : BKP_TamperPinCmd +* Description : Configures the Tamper Pin active level. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void BKP_TamperPinCmd(FunctionalState NewState) +{ + if(NewState) + { + BKP->TPCTLR |= (1<<0); + } + else + { + BKP->TPCTLR &= ~(1<<0); + } +} + +/******************************************************************************* +* Function Name : BKP_ITConfig +* Description : Enables or disables the Tamper Pin Interrupt. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void BKP_ITConfig(FunctionalState NewState) +{ + if(NewState) + { + BKP->TPCSR |= (1<<2); + } + else + { + BKP->TPCSR &= ~(1<<2); + } +} + +/******************************************************************************* +* Function Name : BKP_RTCOutputConfig +* Description : Select the RTC output source to output on the Tamper pin. +* Input : BKP_RTCOutputSource: specifies the RTC output source. +* BKP_RTCOutputSource_None: no RTC output on the Tamper pin. +* BKP_RTCOutputSource_CalibClock: output the RTC clock with +* frequency divided by 64 on the Tamper pin. +* BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal +* on the Tamper pin. +* BKP_RTCOutputSource_Second: output the RTC Second pulse +* signal on the Tamper pin. +* Return : None +*******************************************************************************/ +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) +{ + uint16_t tmpreg = 0; + + tmpreg = BKP->OCTLR; + tmpreg &= OCTLR_MASK; + tmpreg |= BKP_RTCOutputSource; + BKP->OCTLR = tmpreg; +} + +/******************************************************************************* +* Function Name : BKP_SetRTCCalibrationValue +* Description : Sets RTC Clock Calibration value. +* Input : CalibrationValue: specifies the RTC Clock Calibration value. +* This parameter must be a number between 0 and 0x1F. +* Return : None +*******************************************************************************/ +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) +{ + uint16_t tmpreg = 0; + + tmpreg = BKP->OCTLR; + tmpreg &= OCTLR_CAL_MASK; + tmpreg |= CalibrationValue; + BKP->OCTLR = tmpreg; +} + +/******************************************************************************* +* Function Name : BKP_WriteBackupRegister +* Description : Writes user data to the specified Data Backup Register. +* Input : BKP_DR: specifies the Data Backup Register. +* Data: data to write. +* Return : None +*******************************************************************************/ +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + *(__IO uint32_t *) tmp = Data; +} + +/******************************************************************************* +* Function Name : BKP_ReadBackupRegister +* Description : Reads data from the specified Data Backup Register. +* Input : BKP_DR: specifies the Data Backup Register. +* This parameter can be BKP_DRx where x:[1, 42]. +* Return : None +*******************************************************************************/ +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) +{ + __IO uint32_t tmp = 0; + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + + return (*(__IO uint16_t *) tmp); +} + +/******************************************************************************* +* Function Name : BKP_GetFlagStatus +* Description : Checks whether the Tamper Pin Event flag is set or not. +* Input : None +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus BKP_GetFlagStatus(void) +{ + if(BKP->TPCSR & (1<<8)) + { + return SET; + } + else + { + return RESET; + } +} + +/******************************************************************************* +* Function Name : BKP_ClearFlag +* Description : Clears Tamper Pin Event pending flag. +* Input : None +* Return : None +*******************************************************************************/ +void BKP_ClearFlag(void) +{ + BKP->TPCSR |= BKP_CTE; +} + +/******************************************************************************* +* Function Name : BKP_GetITStatus +* Description : Checks whether the Tamper Pin Interrupt has occurred or not. +* Input : None +* Return : ITStatus: SET or RESET. +*******************************************************************************/ +ITStatus BKP_GetITStatus(void) +{ + if(BKP->TPCSR & (1<<9)) + { + return SET; + } + else + { + return RESET; + } +} + +/******************************************************************************* +* Function Name : BKP_ClearITPendingBit +* Description : Clears Tamper Pin Interrupt pending bit. +* Input : None +* Return : None +*******************************************************************************/ +void BKP_ClearITPendingBit(void) +{ + BKP->TPCSR |= BKP_CTI; +} + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_crc.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_crc.c new file mode 100644 index 0000000000..c5624cb51c --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_crc.c @@ -0,0 +1,92 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_crc.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the CRC firmware functions. +*******************************************************************************/ +#include "ch32v10x_crc.h" + +/******************************************************************************* +* Function Name : CRC_ResetDR +* Description : Resets the CRC Data register (DR). +* Input : None +* Return : None +*******************************************************************************/ +void CRC_ResetDR(void) +{ + CRC->CTLR = CRC_CTLR_RESET; +} + +/******************************************************************************* +* Function Name : CRC_CalcCRC +* Description : Computes the 32-bit CRC of a given data word(32-bit). +* Input : Data: data word(32-bit) to compute its CRC. +* Return : 32-bit CRC. +*******************************************************************************/ +uint32_t CRC_CalcCRC(uint32_t Data) +{ + CRC->DATAR = Data; + + return (CRC->DATAR); +} + +/******************************************************************************* +* Function Name : CRC_CalcBlockCRC +* Description : Computes the 32-bit CRC of a given buffer of data word(32-bit). +* Input : pBuffer: pointer to the buffer containing the data to be computed. +* BufferLength: length of the buffer to be computed. +* Return : 32-bit CRC. +*******************************************************************************/ +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) +{ + uint32_t index = 0; + + for(index = 0; index < BufferLength; index++) + { + CRC->DATAR = pBuffer[index]; + } + + return (CRC->DATAR); +} + +/******************************************************************************* +* Function Name : CRC_GetCRC +* Description : Returns the current CRC value. +* Input : None +* Return : 32-bit CRC. +*******************************************************************************/ +uint32_t CRC_GetCRC(void) +{ + return (CRC->IDATAR); +} + +/******************************************************************************* +* Function Name : CRC_SetIDRegister +* Description : Stores a 8-bit data in the Independent Data(ID) register. +* Input : IDValue: 8-bit value to be stored in the ID register. +* Return : None +*******************************************************************************/ +void CRC_SetIDRegister(uint8_t IDValue) +{ + CRC->IDATAR = IDValue; +} + +/******************************************************************************* +* Function Name : CRC_GetIDRegister +* Description : Returns the 8-bit data stored in the Independent Data(ID) register. +* Input : None +* Return : 8-bit value of the ID register. +*******************************************************************************/ +uint8_t CRC_GetIDRegister(void) +{ + return (CRC->IDATAR); +} + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dbgmcu.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dbgmcu.c new file mode 100644 index 0000000000..cb76368140 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dbgmcu.c @@ -0,0 +1,60 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_dbgmcu.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the DBGMCU firmware functions. +****************************************************************************************/ +#include "ch32v10x_dbgmcu.h" + +/******************************************************************************* +* Function Name : DBGMCU_Config +* Description : Configures the specified peripheral and low power mode behavior +* when the MCU under Debug mode. +* Input : DBGMCU_Periph: specifies the peripheral and low power mode. +* DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted +* DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted +* DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted +* DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted +* DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted +* DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted +* DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted +* DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted +* DBGMCU_SLEEP: Keep debugger connection during SLEEP mode +* DBGMCU_STOP: Keep debugger connection during STOP mode +* DBGMCU_STANDBY: Keep debugger connection during STANDBY mode +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) +{ + if((DBGMCU_Periph == DBGMCU_SLEEP) || (DBGMCU_Periph == DBGMCU_STOP) || (DBGMCU_Periph == DBGMCU_STANDBY)) + { + if (NewState != DISABLE) + { + DBGMCU->CFGR1 |= DBGMCU_Periph; + } + else + { + DBGMCU->CFGR1 &= ~DBGMCU_Periph; + } + } + else + { + if (NewState != DISABLE) + { + DBGMCU->CFGR0 |= DBGMCU_Periph; + } + else + { + DBGMCU->CFGR0 &= ~DBGMCU_Periph; + } + } +} + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dma.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dma.c new file mode 100644 index 0000000000..a7d8895333 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_dma.c @@ -0,0 +1,528 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_dma.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the DMA firmware functions. +*******************************************************************************/ +#include "ch32v10x_dma.h" +#include "ch32v10x_rcc.h" + +/* DMA1 Channelx interrupt pending bit masks */ +#define DMA1_Channel1_IT_Mask ((uint32_t)(DMA_GIF1 | DMA_TCIF1 | DMA_HTIF1 | DMA_TEIF1)) +#define DMA1_Channel2_IT_Mask ((uint32_t)(DMA_GIF2 | DMA_TCIF2 | DMA_HTIF2 | DMA_TEIF2)) +#define DMA1_Channel3_IT_Mask ((uint32_t)(DMA_GIF3 | DMA_TCIF3 | DMA_HTIF3 | DMA_TEIF3)) +#define DMA1_Channel4_IT_Mask ((uint32_t)(DMA_GIF4 | DMA_TCIF4 | DMA_HTIF4 | DMA_TEIF4)) +#define DMA1_Channel5_IT_Mask ((uint32_t)(DMA_GIF5 | DMA_TCIF5 | DMA_HTIF5 | DMA_TEIF5)) +#define DMA1_Channel6_IT_Mask ((uint32_t)(DMA_GIF6 | DMA_TCIF6 | DMA_HTIF6 | DMA_TEIF6)) +#define DMA1_Channel7_IT_Mask ((uint32_t)(DMA_GIF7 | DMA_TCIF7 | DMA_HTIF7 | DMA_TEIF7)) + +/* DMA2 Channelx interrupt pending bit masks */ +#define DMA2_Channel1_IT_Mask ((uint32_t)(DMA_GIF1 | DMA_TCIF1 | DMA_HTIF1 | DMA_TEIF1)) +#define DMA2_Channel2_IT_Mask ((uint32_t)(DMA_GIF2 | DMA_TCIF2 | DMA_HTIF2 | DMA_TEIF2)) +#define DMA2_Channel3_IT_Mask ((uint32_t)(DMA_GIF3 | DMA_TCIF3 | DMA_HTIF3 | DMA_TEIF3)) +#define DMA2_Channel4_IT_Mask ((uint32_t)(DMA_GIF4 | DMA_TCIF4 | DMA_HTIF4 | DMA_TEIF4)) +#define DMA2_Channel5_IT_Mask ((uint32_t)(DMA_GIF5 | DMA_TCIF5 | DMA_HTIF5 | DMA_TEIF5)) + +/* DMA2 FLAG mask */ +#define FLAG_Mask ((uint32_t)0x10000000) + +/* DMA registers Masks */ +#define CFGR_CLEAR_Mask ((uint32_t)0xFFFF800F) + + +/******************************************************************************** +* Function Name : DMA_DeInit +* Description : Deinitializes the DMAy Channelx registers to their default reset +* values. +* Input : DMAy_Channelx:here y can be 1 or 2 to select the DMA and x can be +* 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the +* DMA Channel. +* Return : None +*********************************************************************************/ +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx) +{ + DMAy_Channelx->CFGR &= (uint16_t)(~DMA_CFGR1_EN); + DMAy_Channelx->CFGR = 0; + DMAy_Channelx->CNTR = 0; + DMAy_Channelx->PADDR = 0; + DMAy_Channelx->MADDR = 0; + if (DMAy_Channelx == DMA1_Channel1) + { + DMA1->INTFCR |= DMA1_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel2) + { + DMA1->INTFCR |= DMA1_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel3) + { + DMA1->INTFCR |= DMA1_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel4) + { + DMA1->INTFCR |= DMA1_Channel4_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel5) + { + DMA1->INTFCR |= DMA1_Channel5_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel6) + { + DMA1->INTFCR |= DMA1_Channel6_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel7) + { + DMA1->INTFCR |= DMA1_Channel7_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel1) + { + DMA2->INTFCR |= DMA2_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel2) + { + DMA2->INTFCR |= DMA2_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel3) + { + DMA2->INTFCR |= DMA2_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel4) + { + DMA2->INTFCR |= DMA2_Channel4_IT_Mask; + } + else + { + if (DMAy_Channelx == DMA2_Channel5) + { + DMA2->INTFCR |= DMA2_Channel5_IT_Mask; + } + } +} + + +/******************************************************************************** +* Function Name : DMA_Init +* Description : Initializes the DMAy Channelx according to the specified +* parameters in the DMA_InitStruct. +* Input : DMAy_Channelx:here y can be 1 or 2 to select the DMA and x can be +* 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the +* DMA Channel. +* DMA_InitStruct:pointer to a DMA_InitTypeDef structure that +* contains the configuration information for the +* specified DMA Channel. +* Return : None +*********************************************************************************/ +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct) +{ + uint32_t tmpreg = 0; + + tmpreg = DMAy_Channelx->CFGR; + tmpreg &= CFGR_CLEAR_Mask; + tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode | + DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc | + DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize | + DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M; + + DMAy_Channelx->CFGR = tmpreg; + DMAy_Channelx->CNTR = DMA_InitStruct->DMA_BufferSize; + DMAy_Channelx->PADDR = DMA_InitStruct->DMA_PeripheralBaseAddr; + DMAy_Channelx->MADDR = DMA_InitStruct->DMA_MemoryBaseAddr; +} + + +/******************************************************************************** +* Function Name : DMA_StructInit +* Description : Fills each DMA_InitStruct member with its default value. +* Input : DMA_InitStruct : pointer to a DMA_InitTypeDef structure which will +* 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the +* be initialized. +* Return : None +*********************************************************************************/ +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct) +{ + DMA_InitStruct->DMA_PeripheralBaseAddr = 0; + DMA_InitStruct->DMA_MemoryBaseAddr = 0; + DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC; + DMA_InitStruct->DMA_BufferSize = 0; + DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable; + DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + DMA_InitStruct->DMA_Mode = DMA_Mode_Normal; + DMA_InitStruct->DMA_Priority = DMA_Priority_Low; + DMA_InitStruct->DMA_M2M = DMA_M2M_Disable; +} + + +/******************************************************************************** +* Function Name : DMA_Cmd +* Description : Enables or disables the specified DMAy Channelx. +* Input : DMAy_Channelx: where y can be 1 or 2 to select the DMA and x can +* be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select +* the DMA Channel. +* NewState : new state of the DMAy Channelx(ENABLE or DISABLE). +* Return : None +*********************************************************************************/ +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + DMAy_Channelx->CFGR |= DMA_CFGR1_EN; + } + else + { + DMAy_Channelx->CFGR &= (uint16_t)(~DMA_CFGR1_EN); + } +} + +/******************************************************************************** +* Function Name : DMA_ITConfig +* Description : Enables or disables the specified DMAy Channelx interrupts. +* Input : DMAy_Channelx: where y can be 1 or 2 to select the DMA and x can +* be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select +* the DMA Channel. +* DMA_IT : specifies the DMA interrupts sources to be enabled +* or disabled. +* DMA_IT_TC : Transfer complete interrupt mask +* DMA_IT_HT : Half transfer interrupt mask +* DMA_IT_TE : Transfer error interrupt mask +* NewState : new state of the DMAy Channelx(ENABLE or DISABLE). +* Return : None +*********************************************************************************/ +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + DMAy_Channelx->CFGR |= DMA_IT; + } + else + { + DMAy_Channelx->CFGR &= ~DMA_IT; + } +} + +/******************************************************************************** +* Function Name : DMA_SetCurrDataCounter +* Description : Sets the number of data units in the current DMAy Channelx transfer. +* Input : DMAy_Channelx: where y can be 1 or 2 to select the DMA and x can +* be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select +* the DMA Channel. +* DataNumber : The number of data units in the current DMAy Channelx +* transfer. +* Return : None +*********************************************************************************/ +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber) +{ + DMAy_Channelx->CNTR = DataNumber; +} + +/******************************************************************************** +* Function Name : DMA_SetCurrDataCounter +* Description : Sets the number of data units in the current DMAy Channelx transfer. +* Input : DMAy_Channelx: where y can be 1 or 2 to select the DMA and x can +* be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select +* the DMA Channel. +* Return : DataNumber : The number of remaining data units in the current +* DMAy Channelx transfer. +*********************************************************************************/ +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) +{ + return ((uint16_t)(DMAy_Channelx->CNTR)); +} + + +/******************************************************************************** +* Function Name : DMA_GetFlagStatus +* Description : Checks whether the specified DMAy Channelx flag is set or not. +* Input : DMAy_FLAG: specifies the flag to check. +* DMA1_FLAG_GL1: DMA1 Channel1 global flag. +* DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. +* DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. +* DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. +* DMA1_FLAG_GL2: DMA1 Channel2 global flag. +* DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. +* DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. +* DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. +* DMA1_FLAG_GL3: DMA1 Channel3 global flag. +* DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. +* DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. +* DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. +* DMA1_FLAG_GL4: DMA1 Channel4 global flag. +* DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. +* DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. +* DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. +* DMA1_FLAG_GL5: DMA1 Channel5 global flag. +* DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. +* DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. +* DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. +* DMA1_FLAG_GL6: DMA1 Channel6 global flag. +* DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. +* DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. +* DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. +* DMA1_FLAG_GL7: DMA1 Channel7 global flag. +* DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. +* DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. +* DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. +* DMA2_FLAG_GL1: DMA2 Channel1 global flag. +* DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. +* DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. +* DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. +* DMA2_FLAG_GL2: DMA2 Channel2 global flag. +* DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. +* DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. +* DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. +* DMA2_FLAG_GL3: DMA2 Channel3 global flag. +* DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. +* DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. +* DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. +* DMA2_FLAG_GL4: DMA2 Channel4 global flag. +* DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. +* DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. +* DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. +* DMA2_FLAG_GL5: DMA2 Channel5 global flag. +* DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. +* DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. +* DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. +* Return : The new state of DMAy_FLAG (SET or RESET). +*********************************************************************************/ +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + tmpreg = DMA2->INTFR ; + } + else + { + tmpreg = DMA1->INTFR ; + } + + if ((tmpreg & DMAy_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + + +/******************************************************************************** +* Function Name : DMA_ClearFlag +* Description : Clears the DMAy Channelx's pending flags. +* Input : DMAy_FLAG: specifies the flag to check. +* DMA1_FLAG_GL1: DMA1 Channel1 global flag. +* DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. +* DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. +* DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. +* DMA1_FLAG_GL2: DMA1 Channel2 global flag. +* DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. +* DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. +* DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. +* DMA1_FLAG_GL3: DMA1 Channel3 global flag. +* DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. +* DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. +* DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. +* DMA1_FLAG_GL4: DMA1 Channel4 global flag. +* DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. +* DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. +* DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. +* DMA1_FLAG_GL5: DMA1 Channel5 global flag. +* DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. +* DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. +* DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. +* DMA1_FLAG_GL6: DMA1 Channel6 global flag. +* DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. +* DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. +* DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. +* DMA1_FLAG_GL7: DMA1 Channel7 global flag. +* DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. +* DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. +* DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. +* DMA2_FLAG_GL1: DMA2 Channel1 global flag. +* DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. +* DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. +* DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. +* DMA2_FLAG_GL2: DMA2 Channel2 global flag. +* DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. +* DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. +* DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. +* DMA2_FLAG_GL3: DMA2 Channel3 global flag. +* DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. +* DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. +* DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. +* DMA2_FLAG_GL4: DMA2 Channel4 global flag. +* DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. +* DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. +* DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. +* DMA2_FLAG_GL5: DMA2 Channel5 global flag. +* DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. +* DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. +* DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. +* Return : None +*********************************************************************************/ +void DMA_ClearFlag(uint32_t DMAy_FLAG) +{ + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + DMA2->INTFCR = DMAy_FLAG; + } + else + { + DMA1->INTFCR = DMAy_FLAG; + } +} + +/******************************************************************************** +* Function Name : DMA_GetITStatus +* Description : Checks whether the specified DMAy Channelx interrupt has occurred +* or not. +* Input : DMAy_IT: specifies the DMAy interrupt source to check. +* DMA1_IT_GL1: DMA1 Channel1 global flag. +* DMA1_IT_TC1: DMA1 Channel1 transfer complete flag. +* DMA1_IT_HT1: DMA1 Channel1 half transfer flag. +* DMA1_IT_TE1: DMA1 Channel1 transfer error flag. +* DMA1_IT_GL2: DMA1 Channel2 global flag. +* DMA1_IT_TC2: DMA1 Channel2 transfer complete flag. +* DMA1_IT_HT2: DMA1 Channel2 half transfer flag. +* DMA1_IT_TE2: DMA1 Channel2 transfer error flag. +* DMA1_IT_GL3: DMA1 Channel3 global flag. +* DMA1_IT_TC3: DMA1 Channel3 transfer complete flag. +* DMA1_IT_HT3: DMA1 Channel3 half transfer flag. +* DMA1_IT_TE3: DMA1 Channel3 transfer error flag. +* DMA1_IT_GL4: DMA1 Channel4 global flag. +* DMA1_IT_TC4: DMA1 Channel4 transfer complete flag. +* DMA1_IT_HT4: DMA1 Channel4 half transfer flag. +* DMA1_IT_TE4: DMA1 Channel4 transfer error flag. +* DMA1_IT_GL5: DMA1 Channel5 global flag. +* DMA1_IT_TC5: DMA1 Channel5 transfer complete flag. +* DMA1_IT_HT5: DMA1 Channel5 half transfer flag. +* DMA1_IT_TE5: DMA1 Channel5 transfer error flag. +* DMA1_IT_GL6: DMA1 Channel6 global flag. +* DMA1_IT_TC6: DMA1 Channel6 transfer complete flag. +* DMA1_IT_HT6: DMA1 Channel6 half transfer flag. +* DMA1_IT_TE6: DMA1 Channel6 transfer error flag. +* DMA1_IT_GL7: DMA1 Channel7 global flag. +* DMA1_IT_TC7: DMA1 Channel7 transfer complete flag. +* DMA1_IT_HT7: DMA1 Channel7 half transfer flag. +* DMA1_IT_TE7: DMA1 Channel7 transfer error flag. +* DMA2_IT_GL1: DMA2 Channel1 global flag. +* DMA2_IT_TC1: DMA2 Channel1 transfer complete flag. +* DMA2_IT_HT1: DMA2 Channel1 half transfer flag. +* DMA2_IT_TE1: DMA2 Channel1 transfer error flag. +* DMA2_IT_GL2: DMA2 Channel2 global flag. +* DMA2_IT_TC2: DMA2 Channel2 transfer complete flag. +* DMA2_IT_HT2: DMA2 Channel2 half transfer flag. +* DMA2_IT_TE2: DMA2 Channel2 transfer error flag. +* DMA2_IT_GL3: DMA2 Channel3 global flag. +* DMA2_IT_TC3: DMA2 Channel3 transfer complete flag. +* DMA2_IT_HT3: DMA2 Channel3 half transfer flag. +* DMA2_IT_TE3: DMA2 Channel3 transfer error flag. +* DMA2_IT_GL4: DMA2 Channel4 global flag. +* DMA2_IT_TC4: DMA2 Channel4 transfer complete flag. +* DMA2_IT_HT4: DMA2 Channel4 half transfer flag. +* DMA2_IT_TE4: DMA2 Channel4 transfer error flag. +* DMA2_IT_GL5: DMA2 Channel5 global flag. +* DMA2_IT_TC5: DMA2 Channel5 transfer complete flag. +* DMA2_IT_HT5: DMA2 Channel5 half transfer flag. +* DMA2_IT_TE5: DMA2 Channel5 transfer error flag. +* Return : The new state of DMAy_IT (SET or RESET). +*********************************************************************************/ +ITStatus DMA_GetITStatus(uint32_t DMAy_IT) +{ + ITStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + tmpreg = DMA2->INTFR; + } + else + { + tmpreg = DMA1->INTFR; + } + + if ((tmpreg & DMAy_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + + +/******************************************************************************** +* Function Name : DMA_ClearITPendingBit +* Description : Clears the DMAy Channelx's interrupt pending bits. +* Input : DMAy_IT: specifies the DMAy interrupt source to check. +* DMA1_IT_GL1: DMA1 Channel1 global flag. +* DMA1_IT_TC1: DMA1 Channel1 transfer complete flag. +* DMA1_IT_HT1: DMA1 Channel1 half transfer flag. +* DMA1_IT_TE1: DMA1 Channel1 transfer error flag. +* DMA1_IT_GL2: DMA1 Channel2 global flag. +* DMA1_IT_TC2: DMA1 Channel2 transfer complete flag. +* DMA1_IT_HT2: DMA1 Channel2 half transfer flag. +* DMA1_IT_TE2: DMA1 Channel2 transfer error flag. +* DMA1_IT_GL3: DMA1 Channel3 global flag. +* DMA1_IT_TC3: DMA1 Channel3 transfer complete flag. +* DMA1_IT_HT3: DMA1 Channel3 half transfer flag. +* DMA1_IT_TE3: DMA1 Channel3 transfer error flag. +* DMA1_IT_GL4: DMA1 Channel4 global flag. +* DMA1_IT_TC4: DMA1 Channel4 transfer complete flag. +* DMA1_IT_HT4: DMA1 Channel4 half transfer flag. +* DMA1_IT_TE4: DMA1 Channel4 transfer error flag. +* DMA1_IT_GL5: DMA1 Channel5 global flag. +* DMA1_IT_TC5: DMA1 Channel5 transfer complete flag. +* DMA1_IT_HT5: DMA1 Channel5 half transfer flag. +* DMA1_IT_TE5: DMA1 Channel5 transfer error flag. +* DMA1_IT_GL6: DMA1 Channel6 global flag. +* DMA1_IT_TC6: DMA1 Channel6 transfer complete flag. +* DMA1_IT_HT6: DMA1 Channel6 half transfer flag. +* DMA1_IT_TE6: DMA1 Channel6 transfer error flag. +* DMA1_IT_GL7: DMA1 Channel7 global flag. +* DMA1_IT_TC7: DMA1 Channel7 transfer complete flag. +* DMA1_IT_HT7: DMA1 Channel7 half transfer flag. +* DMA1_IT_TE7: DMA1 Channel7 transfer error flag. +* DMA2_IT_GL1: DMA2 Channel1 global flag. +* DMA2_IT_TC1: DMA2 Channel1 transfer complete flag. +* DMA2_IT_HT1: DMA2 Channel1 half transfer flag. +* DMA2_IT_TE1: DMA2 Channel1 transfer error flag. +* DMA2_IT_GL2: DMA2 Channel2 global flag. +* DMA2_IT_TC2: DMA2 Channel2 transfer complete flag. +* DMA2_IT_HT2: DMA2 Channel2 half transfer flag. +* DMA2_IT_TE2: DMA2 Channel2 transfer error flag. +* DMA2_IT_GL3: DMA2 Channel3 global flag. +* DMA2_IT_TC3: DMA2 Channel3 transfer complete flag. +* DMA2_IT_HT3: DMA2 Channel3 half transfer flag. +* DMA2_IT_TE3: DMA2 Channel3 transfer error flag. +* DMA2_IT_GL4: DMA2 Channel4 global flag. +* DMA2_IT_TC4: DMA2 Channel4 transfer complete flag. +* DMA2_IT_HT4: DMA2 Channel4 half transfer flag. +* DMA2_IT_TE4: DMA2 Channel4 transfer error flag. +* DMA2_IT_GL5: DMA2 Channel5 global flag. +* DMA2_IT_TC5: DMA2 Channel5 transfer complete flag. +* DMA2_IT_HT5: DMA2 Channel5 half transfer flag. +* DMA2_IT_TE5: DMA2 Channel5 transfer error flag. +* Return : None +*********************************************************************************/ +void DMA_ClearITPendingBit(uint32_t DMAy_IT) +{ + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + DMA2->INTFCR = DMAy_IT; + } + else + { + DMA1->INTFCR = DMAy_IT; + } +} + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_exti.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_exti.c new file mode 100644 index 0000000000..7a0e0a0ad8 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_exti.c @@ -0,0 +1,157 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_exti.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the EXTI firmware functions. +***************************************************************************************/ +#include "ch32v10x_exti.h" + +/* No interrupt selected */ +#define EXTI_LINENONE ((uint32_t)0x00000) + +/******************************************************************************** +* Function Name : EXTI_DeInit +* Description : Deinitializes the EXTI peripheral registers to their default +* reset values. +* Input : None +* Return : None +*********************************************************************************/ +void EXTI_DeInit(void) +{ + EXTI->INTENR = 0x00000000; + EXTI->EVENR = 0x00000000; + EXTI->RTENR = 0x00000000; + EXTI->FTENR = 0x00000000; + EXTI->INTFR = 0x000FFFFF; +} + +/******************************************************************************** +* Function Name : EXTI_Init +* Description : Initializes the EXTI peripheral according to the specified +* parameters in the EXTI_InitStruct. +* Input : EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure +* Return : None +*********************************************************************************/ +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) +{ + uint32_t tmp = 0; + + tmp = (uint32_t)EXTI_BASE; + if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) + { + EXTI->INTENR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->EVENR &= ~EXTI_InitStruct->EXTI_Line; + tmp += EXTI_InitStruct->EXTI_Mode; + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + EXTI->RTENR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->FTENR &= ~EXTI_InitStruct->EXTI_Line; + if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) + { + EXTI->RTENR |= EXTI_InitStruct->EXTI_Line; + EXTI->FTENR |= EXTI_InitStruct->EXTI_Line; + } + else + { + tmp = (uint32_t)EXTI_BASE; + tmp += EXTI_InitStruct->EXTI_Trigger; + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + } + } + else + { + tmp += EXTI_InitStruct->EXTI_Mode; + *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; + } +} + +/******************************************************************************** +* Function Name : EXTI_StructInit +* Description : Fills each EXTI_InitStruct member with its reset value. +* Input : EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure +* Return : None +*********************************************************************************/ +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) +{ + EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; + EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; + EXTI_InitStruct->EXTI_LineCmd = DISABLE; +} + +/******************************************************************************** +* Function Name : EXTI_GenerateSWInterrupt +* Description : Generates a Software interrupt. +* Input : EXTI_Line: specifies the EXTI lines to be enabled or disabled. +* Return : None +*********************************************************************************/ +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) +{ + EXTI->SWIEVR |= EXTI_Line; +} + +/******************************************************************************** +* Function Name : EXTI_GetFlagStatus +* Description : Checks whether the specified EXTI line flag is set or not. +* Input : EXTI_Line: specifies the EXTI lines to be enabled or disabled. +* Return : The new state of EXTI_Line (SET or RESET). +*********************************************************************************/ +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) +{ + FlagStatus bitstatus = RESET; + if ((EXTI->INTFR & EXTI_Line) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : EXTI_ClearFlag +* Description : Clears the EXTI's line pending flags. +* Input : EXTI_Line: specifies the EXTI lines to be enabled or disabled. +* Return : None +*********************************************************************************/ +void EXTI_ClearFlag(uint32_t EXTI_Line) +{ + EXTI->INTFR = EXTI_Line; +} + +/******************************************************************************** +* Function Name : EXTI_GetITStatus +* Description : Checks whether the specified EXTI line is asserted or not. +* Input : EXTI_Line: specifies the EXTI lines to be enabled or disabled. +* Return : The new state of EXTI_Line (SET or RESET). +*********************************************************************************/ +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + enablestatus = EXTI->INTENR & EXTI_Line; + if (((EXTI->INTFR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : EXTI_ClearITPendingBit +* Description : Clears the EXTI's line pending bits. +* Input : EXTI_Line: specifies the EXTI lines to be enabled or disabled. +* Return : None +*********************************************************************************/ +void EXTI_ClearITPendingBit(uint32_t EXTI_Line) +{ + EXTI->INTFR = EXTI_Line; +} + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_flash.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_flash.c new file mode 100644 index 0000000000..cb9a21f986 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_flash.c @@ -0,0 +1,900 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_flash.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the FLASH firmware functions. +***************************************************************************************/ +#include "ch32v10x_flash.h" + +/* Flash Access Control Register bits */ +#define ACR_LATENCY_Mask ((uint32_t)0x00000038) +#define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7) +#define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF) + +/* Flash Access Control Register bits */ +#define ACR_PRFTBS_Mask ((uint32_t)0x00000020) + +/* Flash Control Register bits */ +#define CR_PG_Set ((uint32_t)0x00000001) +#define CR_PG_Reset ((uint32_t)0x00001FFE) +#define CR_PER_Set ((uint32_t)0x00000002) +#define CR_PER_Reset ((uint32_t)0x00001FFD) +#define CR_MER_Set ((uint32_t)0x00000004) +#define CR_MER_Reset ((uint32_t)0x00001FFB) +#define CR_OPTPG_Set ((uint32_t)0x00000010) +#define CR_OPTPG_Reset ((uint32_t)0x00001FEF) +#define CR_OPTER_Set ((uint32_t)0x00000020) +#define CR_OPTER_Reset ((uint32_t)0x00001FDF) +#define CR_STRT_Set ((uint32_t)0x00000040) +#define CR_LOCK_Set ((uint32_t)0x00000080) +#define CR_PAGE_PG ((uint32_t)0x00010000) +#define CR_PAGE_ER ((uint32_t)0x00020000) +#define CR_BUF_LOAD ((uint32_t)0x00040000) +#define CR_BUF_RST ((uint32_t)0x00080000) + +/* FLASH Status Register bits */ +#define SR_BSY ((uint32_t)0x00000001) +#define SR_PGERR ((uint32_t)0x00000004) +#define SR_WRPRTERR ((uint32_t)0x00000010) +#define SR_EOP ((uint32_t)0x00000020) + +/* FLASH Mask */ +#define RDPRT_Mask ((uint32_t)0x00000002) +#define WRP0_Mask ((uint32_t)0x000000FF) +#define WRP1_Mask ((uint32_t)0x0000FF00) +#define WRP2_Mask ((uint32_t)0x00FF0000) +#define WRP3_Mask ((uint32_t)0xFF000000) +#define OB_USER_BFB2 ((uint16_t)0x0008) + +/* FLASH Keys */ +#define RDP_Key ((uint16_t)0x00A5) +#define FLASH_KEY1 ((uint32_t)0x45670123) +#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) + +/* FLASH BANK address */ +#define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF) + +/* Delay definition */ +#define EraseTimeout ((uint32_t)0x000B0000) +#define ProgramTimeout ((uint32_t)0x00002000) + +/* Flash Program Vaild Address */ +#define ValidAddrStart (FLASH_BASE) +#define ValidAddrEnd (FLASH_BASE + 0x10000) + +/******************************************************************************** +* Function Name : FLASH_SetLatency +* Description : Sets the code latency value. +* Input : FLASH_Latency: specifies the FLASH Latency value. +* FLASH_Latency_0: FLASH Zero Latency cycle +* FLASH_Latency_1: FLASH One Latency cycle +* FLASH_Latency_2: FLASH Two Latency cycles +* Return : None +*********************************************************************************/ +void FLASH_SetLatency(uint32_t FLASH_Latency) +{ + uint32_t tmpreg = 0; + + tmpreg = FLASH->ACTLR; + tmpreg &= ACR_LATENCY_Mask; + tmpreg |= FLASH_Latency; + FLASH->ACTLR = tmpreg; +} + + +/******************************************************************************** +* Function Name : FLASH_HalfCycleAccessCmd +* Description : Enables or disables the Half cycle flash access. +* Input : FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode. +* FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable +* FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable +* Return : None +*********************************************************************************/ +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess) +{ + FLASH->ACTLR &= ACR_HLFCYA_Mask; + FLASH->ACTLR |= FLASH_HalfCycleAccess; +} + +/******************************************************************************** +* Function Name : FLASH_PrefetchBufferCmd +* Description : Enables or disables the Prefetch Buffer. +* Input : FLASH_PrefetchBuffer: specifies the Prefetch buffer status. +* FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable +* FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable +* Return : None +*********************************************************************************/ +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer) +{ + FLASH->ACTLR &= ACR_PRFTBE_Mask; + FLASH->ACTLR |= FLASH_PrefetchBuffer; +} + + +/******************************************************************************** +* Function Name : FLASH_Unlock +* Description : Unlocks the FLASH Program Erase Controller. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_Unlock(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; +} + + +/******************************************************************************** +* Function Name : FLASH_UnlockBank1 +* Description : Unlocks the FLASH Bank1 Program Erase Controller. +* equivalent to FLASH_Unlock function. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_UnlockBank1(void) +{ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; +} + +/******************************************************************************** +* Function Name : FLASH_Lock +* Description : Locks the FLASH Program Erase Controller. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_Lock(void) +{ + FLASH->CTLR |= CR_LOCK_Set; +} + +/******************************************************************************** +* Function Name : FLASH_LockBank1 +* Description : Locks the FLASH Bank1 Program Erase Controller. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_LockBank1(void) +{ + FLASH->CTLR |= CR_LOCK_Set; +} + + +/******************************************************************************** +* Function Name : FLASH_ErasePage +* Description : Erases a specified FLASH page. +* Input : Page_Address: The page address to be erased. +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_ErasePage(uint32_t Page_Address) +{ + FLASH_Status status = FLASH_COMPLETE; + + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->CTLR|= CR_PER_Set; + FLASH->ADDR = Page_Address; + FLASH->CTLR|= CR_STRT_Set; + + status = FLASH_WaitForLastOperation(EraseTimeout); + + FLASH->CTLR &= CR_PER_Reset; + } + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Page_Address & 0xFFFFFFFC) ^ 0x00001000); + + return status; +} + + +/******************************************************************************** +* Function Name : FLASH_EraseAllPages +* Description : Erases all FLASH pages. +* Input : None +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_EraseAllPages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->CTLR |= CR_MER_Set; + FLASH->CTLR |= CR_STRT_Set; + + status = FLASH_WaitForLastOperation(EraseTimeout); + + FLASH->CTLR &= CR_MER_Reset; + } + + return status; +} + +/******************************************************************************** +* Function Name : FLASH_EraseAllBank1Pages +* Description : Erases all Bank1 FLASH pages. +* Input : None +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_EraseAllBank1Pages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->CTLR |= CR_MER_Set; + FLASH->CTLR |= CR_STRT_Set; + + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + FLASH->CTLR &= CR_MER_Reset; + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_EraseOptionBytes +* Description : Erases the FLASH option bytes. +* Input : None +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_EraseOptionBytes(void) +{ + uint16_t rdptmp = RDP_Key; + + FLASH_Status status = FLASH_COMPLETE; + if(FLASH_GetReadOutProtectionStatus() != RESET) + { + rdptmp = 0x00; + } + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->OBKEYR = FLASH_KEY1; + FLASH->OBKEYR = FLASH_KEY2; + + FLASH->CTLR |= CR_OPTER_Set; + FLASH->CTLR |= CR_STRT_Set; + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->CTLR &= CR_OPTER_Reset; + FLASH->CTLR |= CR_OPTPG_Set; + OB->RDPR = (uint16_t)rdptmp; + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + else + { + if (status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_ProgramWord +* Description : Programs a word at a specified address. +* Input : Address: specifies the address to be programmed. +* Data: specifies the data to be programmed. +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + __IO uint32_t tmp = 0; + + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->CTLR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + tmp = Address + 2; + *(__IO uint16_t*) tmp = Data >> 16; + status = FLASH_WaitForLastOperation(ProgramTimeout); + FLASH->CTLR &= CR_PG_Reset; + } + else + { + FLASH->CTLR &= CR_PG_Reset; + } + } + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Address & 0xFFFFFFFC) ^ 0x00001000); + + return status; +} + +/******************************************************************************** +* Function Name : FLASH_ProgramHalfWord +* Description : Programs a half word at a specified address. +* Input : Address: specifies the address to be programmed. +* Data: specifies the data to be programmed. +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->CTLR |= CR_PG_Set; + *(__IO uint16_t*)Address = Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + FLASH->CTLR &= CR_PG_Reset; + } + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Address & 0xFFFFFFFC) ^ 0x00001000); + + return status; +} + +/******************************************************************************** +* Function Name : FLASH_ProgramOptionByteData +* Description : Programs a half word at a specified Option Byte Data address. +* Input : Address: specifies the address to be programmed. +* Data: specifies the data to be programmed. +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->OBKEYR = FLASH_KEY1; + FLASH->OBKEYR = FLASH_KEY2; + FLASH->CTLR |= CR_OPTPG_Set; + *(__IO uint16_t*)Address = Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Address & 0xFFFFFFFC) ^ 0x00001000); + + return status; +} + +/******************************************************************************** +* Function Name : FLASH_EnableWriteProtection +* Description : Write protects the desired pages +* Input : FLASH_Pages: specifies the address of the pages to be write protected. +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages) +{ + uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF; + + FLASH_Status status = FLASH_COMPLETE; + + FLASH_Pages = (uint32_t)(~FLASH_Pages); + WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask); + WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8); + WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16); + WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24); + + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->OBKEYR = FLASH_KEY1; + FLASH->OBKEYR = FLASH_KEY2; + FLASH->CTLR |= CR_OPTPG_Set; + if(WRP0_Data != 0xFF) + { + OB->WRPR0 = WRP0_Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF)) + { + OB->WRPR1 = WRP1_Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF)) + { + OB->WRPR2 = WRP2_Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF)) + { + OB->WRPR3 = WRP3_Data; + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_ReadOutProtection +* Description : Enables or disables the read out protection. +* Input : Newstate: new state of the ReadOut Protection(ENABLE or DISABLE). +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState) +{ + FLASH_Status status = FLASH_COMPLETE; + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->OBKEYR = FLASH_KEY1; + FLASH->OBKEYR = FLASH_KEY2; + FLASH->CTLR |= CR_OPTER_Set; + FLASH->CTLR |= CR_STRT_Set; + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + FLASH->CTLR &= CR_OPTER_Reset; + FLASH->CTLR |= CR_OPTPG_Set; + if(NewState != DISABLE) + { + OB->RDPR = 0x00; + } + else + { + OB->RDPR = RDP_Key; + } + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + else + { + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTER_Reset; + } + } + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_UserOptionByteConfig +* Description : Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. +* Input : OB_IWDG: Selects the IWDG mode +* OB_IWDG_SW: Software IWDG selected +* OB_IWDG_HW: Hardware IWDG selected +* OB_STOP: Reset event when entering STOP mode. +* OB_STOP_NoRST: No reset generated when entering in STOP +* OB_STOP_RST: Reset generated when entering in STOP +* OB_STDBY: Reset event when entering Standby mode. +* OB_STDBY_NoRST: No reset generated when entering in STANDBY +* OB_STDBY_RST: Reset generated when entering in STANDBY +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) +{ + FLASH_Status status = FLASH_COMPLETE; + + FLASH->OBKEYR = FLASH_KEY1; + FLASH->OBKEYR = FLASH_KEY2; + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + FLASH->CTLR |= CR_OPTPG_Set; + + OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); + + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + FLASH->CTLR &= CR_OPTPG_Reset; + } + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_GetUserOptionByte +* Description : Returns the FLASH User Option Bytes values. +* Input : None +* Return : The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1) +* and RST_STDBY(Bit2). +*********************************************************************************/ +uint32_t FLASH_GetUserOptionByte(void) +{ + return (uint32_t)(FLASH->OBR >> 2); +} + + +/******************************************************************************** +* Function Name : FLASH_GetWriteProtectionOptionByte +* Description : Returns the FLASH Write Protection Option Bytes Register value. +* Input : None +* Return : The FLASH Write Protection Option Bytes Register value +*********************************************************************************/ +uint32_t FLASH_GetWriteProtectionOptionByte(void) +{ + return (uint32_t)(FLASH->WPR); +} + + +/******************************************************************************** +* Function Name : FLASH_GetReadOutProtectionStatus +* Description : Checks whether the FLASH Read Out Protection Status is set or not. +* Input : None +* Return : FLASH ReadOut Protection Status(SET or RESET) +*********************************************************************************/ +FlagStatus FLASH_GetReadOutProtectionStatus(void) +{ + FlagStatus readoutstatus = RESET; + if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET) + { + readoutstatus = SET; + } + else + { + readoutstatus = RESET; + } + return readoutstatus; +} + +/******************************************************************************** +* Function Name : FLASH_GetPrefetchBufferStatus +* Description : Checks whether the FLASH Prefetch Buffer status is set or not. +* Input : None +* Return : FLASH Prefetch Buffer Status (SET or RESET). +*********************************************************************************/ +FlagStatus FLASH_GetPrefetchBufferStatus(void) +{ + FlagStatus bitstatus = RESET; + + if ((FLASH->ACTLR & ACR_PRFTBS_Mask) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : FLASH_ITConfig +* Description : Enables or disables the specified FLASH interrupts. +* Input : FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. +* FLASH_IT_ERROR: FLASH Error Interrupt +* FLASH_IT_EOP: FLASH end of operation Interrupt +* NewState: new state of the specified Flash interrupts(ENABLE or DISABLE). +* Return : FLASH Prefetch Buffer Status (SET or RESET). +*********************************************************************************/ +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) +{ + if(NewState != DISABLE) + { + FLASH->CTLR |= FLASH_IT; + } + else + { + FLASH->CTLR &= ~(uint32_t)FLASH_IT; + } +} + + +/******************************************************************************** +* Function Name : FLASH_GetFlagStatus +* Description : Checks whether the specified FLASH flag is set or not. +* Input : FLASH_FLAG: specifies the FLASH flag to check. +* FLASH_FLAG_BSY: FLASH Busy flag +* FLASH_FLAG_PGERR: FLASH Program error flag +* FLASH_FLAG_WRPRTERR: FLASH Write protected error flag +* FLASH_FLAG_EOP: FLASH End of Operation flag +* FLASH_FLAG_OPTERR: FLASH Option Byte error flag +* Return : The new state of FLASH_FLAG (SET or RESET). +*********************************************************************************/ +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) +{ + FlagStatus bitstatus = RESET; + + if(FLASH_FLAG == FLASH_FLAG_OPTERR) + { + if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH->STATR & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : FLASH_ClearFlag +* Description : Clears the FLASH's pending flags. +* Input : FLASH_FLAG: specifies the FLASH flags to clear. +* FLASH_FLAG_PGERR: FLASH Program error flag +* FLASH_FLAG_WRPRTERR: FLASH Write protected error flag +* FLASH_FLAG_EOP: FLASH End of Operation flag +* Return : None +*********************************************************************************/ +void FLASH_ClearFlag(uint32_t FLASH_FLAG) +{ + + FLASH->STATR = FLASH_FLAG; + +} + +/******************************************************************************** +* Function Name : FLASH_GetStatus +* Description : Returns the FLASH Status. +* Input : None +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP or FLASH_COMPLETE. +*********************************************************************************/ +FLASH_Status FLASH_GetStatus(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->STATR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->STATR & FLASH_FLAG_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->STATR & FLASH_FLAG_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + return flashstatus; +} + +/******************************************************************************** +* Function Name : FLASH_GetBank1Status +* Description : Returns the FLASH Bank1 Status. +* Input : None +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP or FLASH_COMPLETE. +*********************************************************************************/ +FLASH_Status FLASH_GetBank1Status(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->STATR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->STATR & FLASH_FLAG_BANK1_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->STATR & FLASH_FLAG_BANK1_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + return flashstatus; +} + + +/******************************************************************************** +* Function Name : FLASH_WaitForLastOperation +* Description : Waits for a Flash operation to complete or a TIMEOUT to occur. +* Input : Timeout: FLASH programming Timeout +* Return : FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, +* FLASH_ERROR_WRP or FLASH_COMPLETE. +*********************************************************************************/ +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + status = FLASH_GetBank1Status(); + while((status == FLASH_BUSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + return status; +} + + +/******************************************************************************** +* Function Name : FLASH_WaitForLastBank1Operation +* Description : Waits for a Flash operation on Bank1 to complete or a TIMEOUT to occur. +* Input : Timeout: FLASH programming Timeout +* Return : FLASH Status: The returned value can be: FLASH_ERROR_PG, +* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. +*********************************************************************************/ +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + status = FLASH_GetBank1Status(); + while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + return status; +} + +/******************************************************************************** +* Function Name : FLASH_Unlock_Fast +* Description : Unlocks the Fast Program Erase Mode. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_Unlock_Fast(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; + + /* Fast program mode unlock */ + FLASH->MODEKEYR = FLASH_KEY1; + FLASH->MODEKEYR = FLASH_KEY2; +} + +/******************************************************************************** +* Function Name : FLASH_Lock_Fast +* Description : Locks the Fast Program Erase Mode. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_Lock_Fast(void) +{ + FLASH->CTLR |= CR_LOCK_Set; +} + +/******************************************************************************** +* Function Name : FLASH_BufReset +* Description : Flash Buffer reset. +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_BufReset(void) +{ + FLASH->CTLR |= CR_PAGE_PG; + FLASH->CTLR |= CR_BUF_RST; + while(FLASH->STATR & SR_BSY); + FLASH->CTLR &= ~CR_PAGE_PG; +} + +/******************************************************************************** +* Function Name : FLASH_BufLoad +* Description : Flash Buffer load(128 bit). +* Input : None +* Return : None +*********************************************************************************/ +void FLASH_BufLoad(uint32_t Address, uint32_t Data0, uint32_t Data1, uint32_t Data2, uint32_t Data3) +{ + if((Address>=ValidAddrStart) && (AddressCTLR |= CR_PAGE_PG; + *(__IO uint32_t*)(Address+0x00) = Data0; + *(__IO uint32_t*)(Address+0x04) = Data1; + *(__IO uint32_t*)(Address+0x08) = Data2; + *(__IO uint32_t*)(Address+0x0C) = Data3; + FLASH->CTLR |= CR_BUF_LOAD; + while(FLASH->STATR & SR_BSY); + FLASH->CTLR &= ~CR_PAGE_PG; + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Address & 0xFFFFFFFC) ^ 0x00001000); + } +} + +/******************************************************************************** +* Function Name : FLASH_ErasePage_Fast +* Description : Erases a specified FLASH page (1page = 128Byte). +* Input : Page_Address: The page address to be erased. +* Return : None +*********************************************************************************/ +void FLASH_ErasePage_Fast(uint32_t Page_Address) +{ + if((Page_Address>=ValidAddrStart) && (Page_AddressCTLR |= CR_PAGE_ER; + FLASH->ADDR = Page_Address; + FLASH->CTLR |= CR_STRT_Set; + while(FLASH->STATR & SR_BSY); + FLASH->CTLR &= ~CR_PAGE_ER; + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Page_Address & 0xFFFFFFFC) ^ 0x00001000); + } +} + +/******************************************************************************** +* Function Name : FLASH_ProgramPage_Fast +* Description : Program a specified FLASH page (1page = 128Byte). +* Input : Page_Address: The page address to be programed. +* Return : None +*********************************************************************************/ +void FLASH_ProgramPage_Fast(uint32_t Page_Address) +{ + if((Page_Address>=ValidAddrStart) && (Page_AddressCTLR |= CR_PAGE_PG; + FLASH->ADDR = Page_Address; + FLASH->CTLR |= CR_STRT_Set; + while(FLASH->STATR & SR_BSY); + FLASH->CTLR &= ~CR_PAGE_PG; + + *(__IO uint32_t*)0x40022034 = *(__IO uint32_t*)((Page_Address & 0xFFFFFFFC) ^ 0x00001000); + } +} diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_gpio.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_gpio.c new file mode 100644 index 0000000000..e6e688ebbb --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_gpio.c @@ -0,0 +1,472 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_gpio.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the GPIO firmware functions. +*******************************************************************************/ +#include "ch32v10x_gpio.h" +#include "ch32v10x_rcc.h" + +/* MASK */ +#define ECR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) +#define LSB_MASK ((uint16_t)0xFFFF) +#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) +#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) +#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) +#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) + +/******************************************************************************* +* Function Name : GPIO_DeInit +* Description : Deinitializes the GPIOx peripheral registers to their default reset values. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* Return : None +*******************************************************************************/ +void GPIO_DeInit(GPIO_TypeDef* GPIOx) +{ + if (GPIOx == GPIOA) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); + } + else if (GPIOx == GPIOB) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); + } + else if (GPIOx == GPIOC) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); + } + else if (GPIOx == GPIOD) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); + } + else if (GPIOx == GPIOE) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); + } + else if (GPIOx == GPIOF) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); + } + else + { + if (GPIOx == GPIOG) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); + } + } +} + +/******************************************************************************* +* Function Name : GPIO_AFIODeInit +* Description : Deinitializes the Alternate Functions (remap, event control +* and EXTI configuration) registers to their default reset values. +* Input : None +* Return : None +*******************************************************************************/ +void GPIO_AFIODeInit(void) +{ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); +} + +/******************************************************************************* +* Function Name : GPIO_Init +* Description : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* Input : GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that +* contains the configuration information for the specified GPIO peripheral. +* Return : None +*******************************************************************************/ +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) +{ + uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; + uint32_t tmpreg = 0x00, pinmask = 0x00; + + currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); + + if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) + { + currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; + } + + if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) + { + tmpreg = GPIOx->CFGLR; + + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = ((uint32_t)0x01) << pinpos; + currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; + + if (currentpin == pos) + { + pos = pinpos << 2; + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + tmpreg |= (currentmode << pos); + + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BCR = (((uint32_t)0x01) << pinpos); + } + else + { + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSHR = (((uint32_t)0x01) << pinpos); + } + } + } + } + GPIOx->CFGLR = tmpreg; + } + + if (GPIO_InitStruct->GPIO_Pin > 0x00FF) + { + tmpreg = GPIOx->CFGHR; + + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = (((uint32_t)0x01) << (pinpos + 0x08)); + currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); + + if (currentpin == pos) + { + pos = pinpos << 2; + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + tmpreg |= (currentmode << pos); + + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BCR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSHR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + } + } + GPIOx->CFGHR = tmpreg; + } +} + +/******************************************************************************* +* Function Name : GPIO_StructInit +* Description : Fills each GPIO_InitStruct member with its default +* Input : GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure +* which will be initialized. +* Return : None +*******************************************************************************/ +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) +{ + GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; + GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; +} + +/******************************************************************************* +* Function Name : GPIO_ReadInputDataBit +* Description : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* Input : GPIO_Pin: specifies the port bit to read. +* This parameter can be GPIO_Pin_x where x can be (0..15). +* Return : The input port pin value. +*******************************************************************************/ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + + if ((GPIOx->INDR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : GPIO_ReadInputData +* Description : Reads the specified GPIO input data port. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* Return : The output port pin value. +*******************************************************************************/ +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) +{ + return ((uint16_t)GPIOx->INDR); +} + +/******************************************************************************* +* Function Name : GPIO_ReadOutputDataBit +* Description : Reads the specified output data port bit. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* GPIO_Pin: specifies the port bit to read. +* This parameter can be GPIO_Pin_x where x can be (0..15). +* Return : The output port pin value. +*******************************************************************************/ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + + if ((GPIOx->OUTDR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : GPIO_ReadOutputData +* Description : Reads the specified GPIO output data port. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* Return : GPIO output port pin value. +*******************************************************************************/ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) +{ + return ((uint16_t)GPIOx->OUTDR); +} + +/******************************************************************************* +* Function Name : GPIO_SetBits +* Description : Sets the selected data port bits. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* GPIO_Pin: specifies the port bits to be written. +* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* Return : None +*******************************************************************************/ +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + GPIOx->BSHR = GPIO_Pin; +} + +/******************************************************************************* +* Function Name : GPIO_ResetBits +* Description : Clears the selected data port bits. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* GPIO_Pin: specifies the port bits to be written. +* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* Return : None +*******************************************************************************/ +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + GPIOx->BCR = GPIO_Pin; +} + +/******************************************************************************* +* Function Name : GPIO_WriteBit +* Description : Sets or clears the selected data port bit. +* Input : GPIO_Pin: specifies the port bit to be written. +* This parameter can be one of GPIO_Pin_x where x can be (0..15). +* BitVal: specifies the value to be written to the selected bit. +* Bit_SetL: to clear the port pin. +* Bit_SetH: to set the port pin. +* Return : None +*******************************************************************************/ +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) +{ + if (BitVal != Bit_RESET) + { + GPIOx->BSHR = GPIO_Pin; + } + else + { + GPIOx->BCR = GPIO_Pin; + } +} + +/******************************************************************************* +* Function Name : GPIO_Write +* Description : Writes data to the specified GPIO data port. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* PortVal: specifies the value to be written to the port output data register. +* Return : None +*******************************************************************************/ +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) +{ + GPIOx->OUTDR = PortVal; +} + +/******************************************************************************* +* Function Name : GPIO_PinLockConfig +* Description : Locks GPIO Pins configuration registers. +* Input : GPIOx: where x can be (A..G) to select the GPIO peripheral. +* GPIO_Pin: specifies the port bit to be written. +* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* Return : None +*******************************************************************************/ +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint32_t tmp = 0x00010000; + + tmp |= GPIO_Pin; + GPIOx->LCKR = tmp; + GPIOx->LCKR = GPIO_Pin; + GPIOx->LCKR = tmp; + tmp = GPIOx->LCKR; + tmp = GPIOx->LCKR; +} + +/******************************************************************************* +* Function Name : GPIO_EventOutputConfig +* Description : Selects the GPIO pin used as Event output. +* Input : GPIO_PortSource: selects the GPIO port to be used as source +* for Event output. +* This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). +* GPIO_PinSource: specifies the pin for the Event output. +* This parameter can be GPIO_PinSourcex where x can be (0..15). +* Return : None +*******************************************************************************/ +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmpreg = 0x00; + + tmpreg = AFIO->ECR; + tmpreg &= ECR_PORTPINCONFIG_MASK; + tmpreg |= (uint32_t)GPIO_PortSource << 0x04; + tmpreg |= GPIO_PinSource; + AFIO->ECR = tmpreg; +} + +/******************************************************************************* +* Function Name : GPIO_EventOutputCmd +* Description : Enables or disables the Event Output. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void GPIO_EventOutputCmd(FunctionalState NewState) +{ + if(NewState) + { + AFIO->ECR |= (1<<7); + } + else + { + AFIO->ECR &= ~(1<<7); + } +} + +/******************************************************************************* +* Function Name : GPIO_PinRemapConfig +* Description : Changes the mapping of the specified pin. +* Input : GPIO_Remap: selects the pin to remap. +* GPIO_Remap_SPI1: SPI1 Alternate Function mapping +* GPIO_Remap_I2C1: I2C1 Alternate Function mapping +* GPIO_Remap_USART1: USART1 Alternate Function mapping +* GPIO_Remap_USART2: USART2 Alternate Function mapping +* GPIO_PartialRemap_USART3: USART3 Partial Alternate Function mapping +* GPIO_FullRemap_USART3: USART3 Full Alternate Function mapping +* GPIO_PartialRemap_TIM1: TIM1 Partial Alternate Function mapping +* GPIO_FullRemap_TIM1: TIM1 Full Alternate Function mapping +* GPIO_PartialRemap1_TIM2: TIM2 Partial1 Alternate Function mapping +* GPIO_PartialRemap2_TIM2: TIM2 Partial2 Alternate Function mapping +* GPIO_FullRemap_TIM2: TIM2 Full Alternate Function mapping +* GPIO_PartialRemap_TIM3: TIM3 Partial Alternate Function mapping +* GPIO_FullRemap_TIM3: TIM3 Full Alternate Function mapping +* GPIO_Remap_TIM4: TIM4 Alternate Function mapping +* GPIO_Remap1_CAN1: CAN1 Alternate Function mapping +* GPIO_Remap2_CAN1: CAN1 Alternate Function mapping +* GPIO_Remap_PD01: PD01 Alternate Function mapping +* GPIO_Remap_ADC1_ETRGINJ: ADC1 External Trigger Injected Conversion remapping +* GPIO_Remap_ADC1_ETRGREG: ADC1 External Trigger Regular Conversion remapping +* GPIO_Remap_SWJ_NoJTRST: Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST +* GPIO_Remap_SWJ_JTAGDisable: JTAG-DP Disabled and SW-DP Enabled +* GPIO_Remap_SWJ_Disable: Full SWJ Disabled (JTAG-DP + SW-DP) +* GPIO_Remap_TIM2ITR1_PTP_SOF: Ethernet PTP output or USB OTG SOF (Start of Frame) +* connected to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices).If the +* is enabled the TIM2 ITR1 is connected to Ethernet PTP output. When Reset TIM2 ITR1 is connected +* to USB OTG SOF output. +* GPIO_Remap_TIM1_DMA: TIM1 DMA requests mapping (only for Value line devices) +* GPIO_Remap_TIM67_DAC_DMA: TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) +* GPIO_Remap_MISC: Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, +* only for High density Value line devices) +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) +{ + uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + tmpreg = AFIO->PCFR2; + } + else + { + tmpreg = AFIO->PCFR1; + } + + tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; + tmp = GPIO_Remap & LSB_MASK; + + if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) + { + tmpreg &= DBGAFR_SWJCFG_MASK; + AFIO->PCFR1 &= DBGAFR_SWJCFG_MASK; + } + else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) + { + tmp1 = ((uint32_t)0x03) << tmpmask; + tmpreg &= ~tmp1; + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + else + { + tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + + if (NewState != DISABLE) + { + tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); + } + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + AFIO->PCFR2 = tmpreg; + } + else + { + AFIO->PCFR1 = tmpreg; + } +} + +/******************************************************************************* +* Function Name : GPIO_EXTILineConfig +* Description : Selects the GPIO pin used as EXTI Line. +* Input : GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. +* This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). +* GPIO_PinSource: specifies the EXTI line to be configured. +* This parameter can be GPIO_PinSourcex where x can be (0..15). +* Return : None +*******************************************************************************/ +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmp = 0x00; + + tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); + AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; + AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); +} + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_i2c.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_i2c.c new file mode 100644 index 0000000000..f5e801faa9 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_i2c.c @@ -0,0 +1,883 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_i2c.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the I2C firmware functions. +*******************************************************************************/ +#include "ch32v10x_i2c.h" +#include "ch32v10x_rcc.h" + +/* I2C SPE mask */ +#define CTLR1_PE_Set ((uint16_t)0x0001) +#define CTLR1_PE_Reset ((uint16_t)0xFFFE) + +/* I2C START mask */ +#define CTLR1_START_Set ((uint16_t)0x0100) +#define CTLR1_START_Reset ((uint16_t)0xFEFF) + +/* I2C STOP mask */ +#define CTLR1_STOP_Set ((uint16_t)0x0200) +#define CTLR1_STOP_Reset ((uint16_t)0xFDFF) + +/* I2C ACK mask */ +#define CTLR1_ACK_Set ((uint16_t)0x0400) +#define CTLR1_ACK_Reset ((uint16_t)0xFBFF) + +/* I2C ENGC mask */ +#define CTLR1_ENGC_Set ((uint16_t)0x0040) +#define CTLR1_ENGC_Reset ((uint16_t)0xFFBF) + +/* I2C SWRST mask */ +#define CTLR1_SWRST_Set ((uint16_t)0x8000) +#define CTLR1_SWRST_Reset ((uint16_t)0x7FFF) + +/* I2C PEC mask */ +#define CTLR1_PEC_Set ((uint16_t)0x1000) +#define CTLR1_PEC_Reset ((uint16_t)0xEFFF) + +/* I2C ENPEC mask */ +#define CTLR1_ENPEC_Set ((uint16_t)0x0020) +#define CTLR1_ENPEC_Reset ((uint16_t)0xFFDF) + +/* I2C ENARP mask */ +#define CTLR1_ENARP_Set ((uint16_t)0x0010) +#define CTLR1_ENARP_Reset ((uint16_t)0xFFEF) + +/* I2C NOSTRETCH mask */ +#define CTLR1_NOSTRETCH_Set ((uint16_t)0x0080) +#define CTLR1_NOSTRETCH_Reset ((uint16_t)0xFF7F) + +/* I2C registers Masks */ +#define CTLR1_CLEAR_Mask ((uint16_t)0xFBF5) + +/* I2C DMAEN mask */ +#define CTLR2_DMAEN_Set ((uint16_t)0x0800) +#define CTLR2_DMAEN_Reset ((uint16_t)0xF7FF) + +/* I2C LAST mask */ +#define CTLR2_LAST_Set ((uint16_t)0x1000) +#define CTLR2_LAST_Reset ((uint16_t)0xEFFF) + +/* I2C FREQ mask */ +#define CTLR2_FREQ_Reset ((uint16_t)0xFFC0) + +/* I2C ADD0 mask */ +#define OADDR1_ADD0_Set ((uint16_t)0x0001) +#define OADDR1_ADD0_Reset ((uint16_t)0xFFFE) + +/* I2C ENDUAL mask */ +#define OADDR2_ENDUAL_Set ((uint16_t)0x0001) +#define OADDR2_ENDUAL_Reset ((uint16_t)0xFFFE) + +/* I2C ADD2 mask */ +#define OADDR2_ADD2_Reset ((uint16_t)0xFF01) + +/* I2C F/S mask */ +#define CKCFGR_FS_Set ((uint16_t)0x8000) + +/* I2C CCR mask */ +#define CKCFGR_CCR_Set ((uint16_t)0x0FFF) + +/* I2C FLAG mask */ +#define FLAG_Mask ((uint32_t)0x00FFFFFF) + +/* I2C Interrupt Enable mask */ +#define ITEN_Mask ((uint32_t)0x07000000) + +/******************************************************************************* +* Function Name : I2C_DeInit +* Description : Deinitializes the I2Cx peripheral registers to their default +* reset values. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Return : None +*******************************************************************************/ +void I2C_DeInit(I2C_TypeDef* I2Cx) +{ + if (I2Cx == I2C1) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); + } + else + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); + } +} + +/******************************************************************************* +* Function Name : I2C_Init +* Description : Initializes the I2Cx peripheral according to the specified +* parameters in the I2C_InitStruct. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_InitStruct: pointer to a I2C_InitTypeDef structure that +* contains the configuration information for the specified I2C peripheral. +* Return : None +*******************************************************************************/ +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) +{ + uint16_t tmpreg = 0, freqrange = 0; + uint16_t result = 0x04; + uint32_t pclk1 = 8000000; + + RCC_ClocksTypeDef rcc_clocks; + + tmpreg = I2Cx->CTLR2; + tmpreg &= CTLR2_FREQ_Reset; + RCC_GetClocksFreq(&rcc_clocks); + pclk1 = rcc_clocks.PCLK1_Frequency; + freqrange = (uint16_t)(pclk1 / 1000000); + tmpreg |= freqrange; + I2Cx->CTLR2 = tmpreg; + + I2Cx->CTLR1 &= CTLR1_PE_Reset; + tmpreg = 0; + + if (I2C_InitStruct->I2C_ClockSpeed <= 100000) + { + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1)); + + if (result < 0x04) + { + result = 0x04; + } + + tmpreg |= result; + I2Cx->RTR = freqrange + 1; + } + else + { + if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2) + { + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3)); + } + else + { + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25)); + result |= I2C_DutyCycle_16_9; + } + + if ((result & CKCFGR_CCR_Set) == 0) + { + result |= (uint16_t)0x0001; + } + + tmpreg |= (uint16_t)(result | CKCFGR_FS_Set); + I2Cx->RTR = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1); + } + + I2Cx->CKCFGR = tmpreg; + I2Cx->CTLR1 |= CTLR1_PE_Set; + + + tmpreg = I2Cx->CTLR1; + tmpreg &= CTLR1_CLEAR_Mask; + tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack); + I2Cx->CTLR1 = tmpreg; + + I2Cx->OADDR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1); +} + +/******************************************************************************* +* Function Name : I2C_StructInit +* Description : Fills each I2C_InitStruct member with its default value. +* Input : I2C_InitStruct: pointer to an I2C_InitTypeDef structure which +* will be initialized. +* Return : None +*******************************************************************************/ +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) +{ + I2C_InitStruct->I2C_ClockSpeed = 5000; + I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; + I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2; + I2C_InitStruct->I2C_OwnAddress1 = 0; + I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; + I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; +} + +/******************************************************************************* +* Function Name : I2C_Cmd +* Description : Enables or disables the specified I2C peripheral. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_PE_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_PE_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_DMACmd +* Description : Enables or disables the specified I2C DMA requests. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR2 |= CTLR2_DMAEN_Set; + } + else + { + I2Cx->CTLR2 &= CTLR2_DMAEN_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_DMALastTransferCmd +* Description : Specifies if the next DMA transfer will be the last one. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR2 |= CTLR2_LAST_Set; + } + else + { + I2Cx->CTLR2 &= CTLR2_LAST_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_GenerateSTART +* Description : Generates I2Cx communication START condition. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_START_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_START_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_GenerateSTOP +* Description : Generates I2Cx communication STOP condition. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_STOP_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_STOP_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_AcknowledgeConfig +* Description : Enables or disables the specified I2C acknowledge feature. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_ACK_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_ACK_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_OwnAddress2Config +* Description : Configures the specified I2C own address2. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Address: specifies the 7bit I2C own address2. +* Return : None +*******************************************************************************/ +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) +{ + uint16_t tmpreg = 0; + + tmpreg = I2Cx->OADDR2; + tmpreg &= OADDR2_ADD2_Reset; + tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE); + I2Cx->OADDR2 = tmpreg; +} + +/******************************************************************************* +* Function Name : I2C_DualAddressCmd +* Description : Enables or disables the specified I2C dual addressing mode. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->OADDR2 |= OADDR2_ENDUAL_Set; + } + else + { + I2Cx->OADDR2 &= OADDR2_ENDUAL_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_GeneralCallCmd +* Description : Enables or disables the specified I2C general call feature. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_ENGC_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_ENGC_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_ITConfig +* Description : Enables or disables the specified I2C interrupts. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. +* I2C_IT_BUF: Buffer interrupt mask. +* I2C_IT_EVT: Event interrupt mask. +* I2C_IT_ERR: Error interrupt mask. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR2 |= I2C_IT; + } + else + { + I2Cx->CTLR2 &= (uint16_t)~I2C_IT; + } +} + +/******************************************************************************* +* Function Name : I2C_SendData +* Description : Sends a data byte through the I2Cx peripheral. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Data: Byte to be transmitted. +* Return : None +*******************************************************************************/ +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) +{ + I2Cx->DATAR = Data; +} + +/******************************************************************************* +* Function Name : I2C_ReceiveData +* Description : Returns the most recent received data by the I2Cx peripheral. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Return : The value of the received data. +*******************************************************************************/ +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) +{ + return (uint8_t)I2Cx->DATAR; +} + +/******************************************************************************* +* Function Name : I2C_Send7bitAddress +* Description : Transmits the address byte to select the slave device. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Address: specifies the slave address which will be transmitted. +* I2C_Direction: specifies whether the I2C device will be a +* Transmitter or a Receiver. +* I2C_Direction_Transmitter: Transmitter mode. +* I2C_Direction_Receiver: Receiver mode. +* Return : None +*******************************************************************************/ +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction) +{ + if (I2C_Direction != I2C_Direction_Transmitter) + { + Address |= OADDR1_ADD0_Set; + } + else + { + Address &= OADDR1_ADD0_Reset; + } + + I2Cx->DATAR = Address; +} + +/******************************************************************************* +* Function Name : I2C_ReadRegister +* Description : Reads the specified I2C register and returns its value. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_Register: specifies the register to read. +* I2C_Register_CTLR1. +* I2C_Register_CTLR2. +* I2C_Register_OADDR1. +* I2C_Register_OADDR2. +* I2C_Register_DATAR. +* I2C_Register_STAR1. +* I2C_Register_STAR2. +* I2C_Register_CKCFGR. +* I2C_Register_RTR. +* Return : The value of the received data. +*******************************************************************************/ +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) +{ + __IO uint32_t tmp = 0; + + tmp = (uint32_t) I2Cx; + tmp += I2C_Register; + + return (*(__IO uint16_t *) tmp); +} + +/******************************************************************************* +* Function Name : I2C_SoftwareResetCmd +* Description : Enables or disables the specified I2C software reset. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_SWRST_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_SWRST_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_NACKPositionConfig +* Description : Selects the specified I2C NACK position in master receiver mode. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_NACKPosition: specifies the NACK position. +* I2C_NACKPosition_Next: indicates that the next byte will be +* the last received byte. +* I2C_NACKPosition_Current: indicates that current byte is the +* last received byte. +* Return : None +*******************************************************************************/ +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition) +{ + if (I2C_NACKPosition == I2C_NACKPosition_Next) + { + I2Cx->CTLR1 |= I2C_NACKPosition_Next; + } + else + { + I2Cx->CTLR1 &= I2C_NACKPosition_Current; + } +} + +/******************************************************************************* +* Function Name : I2C_SMBusAlertConfig +* Description : Drives the SMBusAlert pin high or low for the specified I2C. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_SMBusAlert: specifies SMBAlert pin level. +* I2C_SMBusAlert_Low: SMBAlert pin driven low. +* I2C_SMBusAlert_High: SMBAlert pin driven high. +* Return : None +*******************************************************************************/ +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert) +{ + if (I2C_SMBusAlert == I2C_SMBusAlert_Low) + { + I2Cx->CTLR1 |= I2C_SMBusAlert_Low; + } + else + { + I2Cx->CTLR1 &= I2C_SMBusAlert_High; + } +} + +/******************************************************************************* +* Function Name : I2C_TransmitPEC +* Description : Enables or disables the specified I2C PEC transfer. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_PEC_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_PEC_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_PECPositionConfig +* Description : Selects the specified I2C PEC position. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_PECPosition: specifies the PEC position. +* I2C_PECPosition_Next: indicates that the next byte is PEC. +* I2C_PECPosition_Current: indicates that current byte is PEC. +* Return : None +*******************************************************************************/ +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition) +{ + if (I2C_PECPosition == I2C_PECPosition_Next) + { + I2Cx->CTLR1 |= I2C_PECPosition_Next; + } + else + { + I2Cx->CTLR1 &= I2C_PECPosition_Current; + } +} + +/******************************************************************************* +* Function Name : I2C_CalculatePEC +* Description : Enables or disables the PEC value calculation of the transferred bytes. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_ENPEC_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_ENPEC_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_GetPEC +* Description : Returns the PEC value for the specified I2C. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Return : The PEC value. +*******************************************************************************/ +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) +{ + return ((I2Cx->STAR2) >> 8); +} + +/******************************************************************************* +* Function Name : I2C_ARPCmd +* Description : Enables or disables the specified I2C ARP. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : The PEC value. +*******************************************************************************/ +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + I2Cx->CTLR1 |= CTLR1_ENARP_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_ENARP_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_StretchClockCmd +* Description : Enables or disables the specified I2C Clock stretching. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + if (NewState == DISABLE) + { + I2Cx->CTLR1 |= CTLR1_NOSTRETCH_Set; + } + else + { + I2Cx->CTLR1 &= CTLR1_NOSTRETCH_Reset; + } +} + +/******************************************************************************* +* Function Name : I2C_FastModeDutyCycleConfig +* Description : Selects the specified I2C fast mode duty cycle. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_DutyCycle: specifies the fast mode duty cycle. +* I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2. +* I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9. +* Return : None +*******************************************************************************/ +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle) +{ + if (I2C_DutyCycle != I2C_DutyCycle_16_9) + { + I2Cx->CKCFGR &= I2C_DutyCycle_2; + } + else + { + I2Cx->CKCFGR |= I2C_DutyCycle_16_9; + } +} + + +/******************************************************************************* +* Function Name : I2C_CheckEvent +* Description : Checks whether the last I2Cx Event is equal to the one passed +* as parameter. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_EVENT: specifies the event to be checked. +* I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1. +* I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1. +* I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1. +* I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1. +* I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1. +* I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2. +* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2. +* (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2. +* I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3. +* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3. +* (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3. +* I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2. +* I2C_EVENT_SLAVE_STOP_DETECTED : EV4. +* I2C_EVENT_MASTER_MODE_SELECT : EV5. +* I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6. +* I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6. +* I2C_EVENT_MASTER_BYTE_RECEIVED : EV7. +* I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8. +* I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2. +* I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9. +* Return : ErrorStatus: SUCCESS or ERROR. +*******************************************************************************/ +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + ErrorStatus status = ERROR; + + flag1 = I2Cx->STAR1; + flag2 = I2Cx->STAR2; + flag2 = flag2 << 16; + + lastevent = (flag1 | flag2) & FLAG_Mask; + + if ((lastevent & I2C_EVENT) == I2C_EVENT) + { + status = SUCCESS; + } + else + { + status = ERROR; + } + + return status; +} + + +/******************************************************************************* +* Function Name : I2C_GetLastEvent +* Description : Returns the last I2Cx Event. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* Return : The last event. +*******************************************************************************/ +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + + flag1 = I2Cx->STAR1; + flag2 = I2Cx->STAR2; + flag2 = flag2 << 16; + lastevent = (flag1 | flag2) & FLAG_Mask; + + return lastevent; +} + + +/******************************************************************************* +* Function Name : I2C_GetFlagStatus +* Description : Checks whether the last I2Cx Event is equal to the one passed +* as parameter. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_FLAG: specifies the flag to check. +* I2C_FLAG_DUALF: Dual flag (Slave mode). +* I2C_FLAG_SMBHOST: SMBus host header (Slave mode). +* I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode). +* I2C_FLAG_GENCALL: General call header flag (Slave mode). +* I2C_FLAG_TRA: Transmitter/Receiver flag. +* I2C_FLAG_BUSY: Bus busy flag. +* I2C_FLAG_MSL: Master/Slave flag. +* I2C_FLAG_SMBALERT: SMBus Alert flag. +* I2C_FLAG_TIMEOUT: Timeout or Tlow error flag. +* I2C_FLAG_PECERR: PEC error in reception flag. +* I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode). +* I2C_FLAG_AF: Acknowledge failure flag. +* I2C_FLAG_ARLO: Arbitration lost flag (Master mode). +* I2C_FLAG_BERR: Bus error flag. +* I2C_FLAG_TXE: Data register empty flag (Transmitter). +* I2C_FLAG_RXNE: Data register not empty (Receiver) flag. +* I2C_FLAG_STOPF: Stop detection flag (Slave mode). +* I2C_FLAG_ADD10: 10-bit header sent flag (Master mode). +* I2C_FLAG_BTF: Byte transfer finished flag. +* I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL" +* Address matched flag (Slave mode)"ENDA". +* I2C_FLAG_SB: Start bit flag (Master mode). +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + FlagStatus bitstatus = RESET; + __IO uint32_t i2creg = 0, i2cxbase = 0; + + i2cxbase = (uint32_t)I2Cx; + i2creg = I2C_FLAG >> 28; + I2C_FLAG &= FLAG_Mask; + + if(i2creg != 0) + { + i2cxbase += 0x14; + } + else + { + I2C_FLAG = (uint32_t)(I2C_FLAG >> 16); + i2cxbase += 0x18; + } + + if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : I2C_ClearFlag +* Description : Clears the I2Cx's pending flags. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_FLAG: specifies the flag to clear. +* I2C_FLAG_SMBALERT: SMBus Alert flag. +* I2C_FLAG_TIMEOUT: Timeout or Tlow error flag. +* I2C_FLAG_PECERR: PEC error in reception flag. +* I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode). +* I2C_FLAG_AF: Acknowledge failure flag. +* I2C_FLAG_ARLO: Arbitration lost flag (Master mode). +* I2C_FLAG_BERR: Bus error flag. +* Return : None +*******************************************************************************/ +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + uint32_t flagpos = 0; + + flagpos = I2C_FLAG & FLAG_Mask; + I2Cx->STAR1 = (uint16_t)~flagpos; +} + +/******************************************************************************* +* Function Name : I2C_GetITStatus +* Description : Checks whether the specified I2C interrupt has occurred or not. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* II2C_IT: specifies the interrupt source to check. +* I2C_IT_SMBALERT: SMBus Alert flag. +* I2C_IT_TIMEOUT: Timeout or Tlow error flag. +* I2C_IT_PECERR: PEC error in reception flag. +* I2C_IT_OVR: Overrun/Underrun flag (Slave mode). +* I2C_IT_AF: Acknowledge failure flag. +* I2C_IT_ARLO: Arbitration lost flag (Master mode). +* I2C_IT_BERR: Bus error flag. +* I2C_IT_TXE: Data register empty flag (Transmitter). +* I2C_IT_RXNE: Data register not empty (Receiver) flag. +* I2C_IT_STOPF: Stop detection flag (Slave mode). +* I2C_IT_ADD10: 10-bit header sent flag (Master mode). +* I2C_IT_BTF: Byte transfer finished flag. +* I2C_IT_ADDR: Address sent flag (Master mode) "ADSL" Address matched +* flag (Slave mode)"ENDAD". +* I2C_IT_SB: Start bit flag (Master mode). +* Return : None +*******************************************************************************/ +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CTLR2)) ; + I2C_IT &= FLAG_Mask; + + if (((I2Cx->STAR1 & I2C_IT) != (uint32_t)RESET) && enablestatus) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : I2C_ClearITPendingBit +* Description : Clears the I2Cx interrupt pending bits. +* Input : I2Cx: where x can be 1 or 2 to select the I2C peripheral. +* I2C_IT: specifies the interrupt pending bit to clear. +* I2C_IT_SMBALERT: SMBus Alert interrupt. +* I2C_IT_TIMEOUT: Timeout or Tlow error interrupt. +* I2C_IT_PECERR: PEC error in reception interrupt. +* I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode). +* I2C_IT_AF: Acknowledge failure interrupt. +* I2C_IT_ARLO: Arbitration lost interrupt (Master mode). +* I2C_IT_BERR: Bus error interrupt. +* Return : None +*******************************************************************************/ +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + uint32_t flagpos = 0; + + flagpos = I2C_IT & FLAG_Mask; + I2Cx->STAR1 = (uint16_t)~flagpos; +} + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_iwdg.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_iwdg.c new file mode 100644 index 0000000000..0408c7c518 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_iwdg.c @@ -0,0 +1,109 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_iwdg.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the IWDG firmware functions. +*******************************************************************************/ +#include "ch32v10x_iwdg.h" + +/* CTLR register bit mask */ +#define CTLR_KEY_Reload ((uint16_t)0xAAAA) +#define CTLR_KEY_Enable ((uint16_t)0xCCCC) + +/******************************************************************************* +* Function Name : IWDG_WriteAccessCmd +* Description : Enables or disables write access to IWDG_PSCR and IWDG_RLDR registers. +* Input : WDG_WriteAccess: new state of write access to IWDG_PSCR and +* IWDG_RLDR registers. +* IWDG_WriteAccess_Enable: Enable write access to IWDG_PSCR and +* IWDG_RLDR registers. +* IWDG_WriteAccess_Disable: Disable write access to IWDG_PSCR +* and IWDG_RLDR registers. +* Return : None +*******************************************************************************/ +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) +{ + IWDG->CTLR = IWDG_WriteAccess; +} + +/******************************************************************************* +* Function Name : IWDG_SetPrescaler +* Description : Sets IWDG Prescaler value. +* Input : IWDG_Prescaler: specifies the IWDG Prescaler value. +* IWDG_Prescaler_4: IWDG prescaler set to 4. +* IWDG_Prescaler_8: IWDG prescaler set to 8. +* IWDG_Prescaler_16: IWDG prescaler set to 16. +* IWDG_Prescaler_32: IWDG prescaler set to 32. +* IWDG_Prescaler_64: IWDG prescaler set to 64. +* IWDG_Prescaler_128: IWDG prescaler set to 128. +* IWDG_Prescaler_256: IWDG prescaler set to 256. +* Return : None +*******************************************************************************/ +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) +{ + IWDG->PSCR = IWDG_Prescaler; +} + +/******************************************************************************* +* Function Name : IWDG_SetReload +* Description : Sets IWDG Reload value. +* Input : Reload: specifies the IWDG Reload value. +* This parameter must be a number between 0 and 0x0FFF. +* Return : None +*******************************************************************************/ +void IWDG_SetReload(uint16_t Reload) +{ + IWDG->RLDR = Reload; +} + +/******************************************************************************* +* Function Name : IWDG_ReloadCounter +* Description : Reloads IWDG counter with value defined in the reload register. +* Input : None +* Return : None +*******************************************************************************/ +void IWDG_ReloadCounter(void) +{ + IWDG->CTLR = CTLR_KEY_Reload; +} + +/******************************************************************************* +* Function Name : IWDG_Enable +* Description : Enables IWDG (write access to IWDG_PSCR and IWDG_RLDR registers disabled). +* Input : None +* Return : None +*******************************************************************************/ +void IWDG_Enable(void) +{ + IWDG->CTLR = CTLR_KEY_Enable; +} + +/******************************************************************************* +* Function Name : IWDG_GetFlagStatus +* Description : Checks whether the specified IWDG flag is set or not. +* Input : IWDG_FLAG: specifies the flag to check. +* IWDG_FLAG_PVU: Prescaler Value Update on going. +* IWDG_FLAG_RVU: Reload Value Update on going. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) +{ + FlagStatus bitstatus = RESET; + + if ((IWDG->STATR & IWDG_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_misc.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_misc.c new file mode 100644 index 0000000000..96baf5ed95 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_misc.c @@ -0,0 +1,102 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_misc.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the miscellaneous firmware functions . +*********************************************************************************/ +#include "ch32v10x_misc.h" + +__IO uint32_t NVIC_Priority_Group = 0; + +/****************************************************************************************** +* Function Name : NVIC_PriorityGroupConfig +* Description : Configures the priority grouping: pre-emption priority and subpriority. +* Input : NVIC_PriorityGroup: specifies the priority grouping bits length. +* NVIC_PriorityGroup_0: 0 bits for pre-emption priority +* 4 bits for subpriority +* NVIC_PriorityGroup_1: 1 bits for pre-emption priority +* 3 bits for subpriority +* NVIC_PriorityGroup_2: 2 bits for pre-emption priority +* 2 bits for subpriority +* NVIC_PriorityGroup_3: 3 bits for pre-emption priority +* 1 bits for subpriority +* NVIC_PriorityGroup_4: 4 bits for pre-emption priority +* 0 bits for subpriority +* Return : None +*******************************************************************************************/ +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) +{ + NVIC_Priority_Group = NVIC_PriorityGroup; +} + +/****************************************************************************************** +* Function Name : NVIC_Init +* Description : Initializes the NVIC peripheral according to the specified parameters in +* the NVIC_InitStruct. +* Input : NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains the +* configuration information for the specified NVIC peripheral. +* Return : None +*******************************************************************************************/ +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) +{ + uint8_t tmppre = 0; + + if(NVIC_Priority_Group == NVIC_PriorityGroup_0) + { + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, NVIC_InitStruct->NVIC_IRQChannelSubPriority<<4); + } + else if(NVIC_Priority_Group == NVIC_PriorityGroup_1) + { + if(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority == 1) + { + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (1<<7)|(NVIC_InitStruct->NVIC_IRQChannelSubPriority<<4)); + } + else + { + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (0<<7)|(NVIC_InitStruct->NVIC_IRQChannelSubPriority<<4)); + } + } + else if(NVIC_Priority_Group == NVIC_PriorityGroup_2) + { + if(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority <= 1) + { + tmppre = NVIC_InitStruct->NVIC_IRQChannelSubPriority + (4*NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority); + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (0<<7)|(tmppre<<4)); + } + else + { + tmppre = NVIC_InitStruct->NVIC_IRQChannelSubPriority + (4*(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority-2)); + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (1<<7)|(tmppre<<4)); + } + } + else if(NVIC_Priority_Group == NVIC_PriorityGroup_3) + { + if(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority <= 3) + { + tmppre = NVIC_InitStruct->NVIC_IRQChannelSubPriority + (2*NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority); + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (0<<7)|(tmppre<<4)); + } + else + { + tmppre = NVIC_InitStruct->NVIC_IRQChannelSubPriority + (2*(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority-4)); + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, (1<<7)|(tmppre<<4)); + } + } + else if(NVIC_Priority_Group == NVIC_PriorityGroup_4) + { + NVIC_SetPriority( NVIC_InitStruct->NVIC_IRQChannel, NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority<<4); + } + + if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) + { + NVIC_EnableIRQ(NVIC_InitStruct->NVIC_IRQChannel); + } + else + { + NVIC_DisableIRQ(NVIC_InitStruct->NVIC_IRQChannel); + } +} + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_pwr.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_pwr.c new file mode 100644 index 0000000000..ebdd8cf97e --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_pwr.c @@ -0,0 +1,196 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_pwr.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the PWR firmware functions. +********************************************************************************/ +#include "ch32v10x_pwr.h" +#include "ch32v10x_rcc.h" + +/* PWR registers bit mask */ +/* CTLR register bit mask */ +#define CTLR_DS_MASK ((uint32_t)0xFFFFFFFC) +#define CTLR_PLS_MASK ((uint32_t)0xFFFFFF1F) + +/******************************************************************************** +* Function Name : PWR_DeInit +* Description : Deinitializes the PWR peripheral registers to their default +* reset values. +* Input : None +* Return : None +*********************************************************************************/ +void PWR_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); +} + + +/******************************************************************************** +* Function Name : PWR_BackupAccessCmd +* Description : Enables or disables access to the RTC and backup registers. +* Input : NewState: new state of the access to the RTC and backup registers, +* This parameter can be: ENABLE or DISABLE. +* Return : None +*********************************************************************************/ +void PWR_BackupAccessCmd(FunctionalState NewState) +{ + if(NewState) + { + PWR->CTLR |= (1<<8); + } + else{ + PWR->CTLR &= ~(1<<8); + } +} + + +/******************************************************************************** +* Function Name : PWR_PVDCmd +* Description : Enables or disables the Power Voltage Detector(PVD). +* Input : NewState: new state of the PVD(ENABLE or DISABLE). +* Return : None +*********************************************************************************/ +void PWR_PVDCmd(FunctionalState NewState) +{ + if(NewState) + { + PWR->CTLR |= (1<<4); + } + else{ + PWR->CTLR &= ~(1<<4); + } +} + + +/******************************************************************************** +* Function Name : PWR_PVDLevelConfig +* Description : Configures the voltage threshold detected by the Power Voltage +* Detector(PVD). +* Input : PWR_PVDLevel: specifies the PVD detection level +* PWR_PVDLevel_2V2: PVD detection level set to 2.2V +* PWR_PVDLevel_2V3: PVD detection level set to 2.3V +* PWR_PVDLevel_2V4: PVD detection level set to 2.4V +* PWR_PVDLevel_2V5: PVD detection level set to 2.5V +* PWR_PVDLevel_2V6: PVD detection level set to 2.6V +* PWR_PVDLevel_2V7: PVD detection level set to 2.7V +* PWR_PVDLevel_2V8: PVD detection level set to 2.8V +* PWR_PVDLevel_2V9: PVD detection level set to 2.9V +* Return : None +*********************************************************************************/ +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) +{ + uint32_t tmpreg = 0; + tmpreg = PWR->CTLR; + tmpreg &= CTLR_PLS_MASK; + tmpreg |= PWR_PVDLevel; + PWR->CTLR = tmpreg; +} + + +/******************************************************************************** +* Function Name : PWR_WakeUpPinCmd +* Description : Enables or disables the WakeUp Pin functionality. +* Input : NewState: new state of the WakeUp Pin functionality(ENABLE or DISABLE). +* Return : None +*********************************************************************************/ +void PWR_WakeUpPinCmd(FunctionalState NewState) +{ + if(NewState) + { + PWR->CSR |= (1<<8); + } + else{ + PWR->CSR &= ~(1<<8); + } +} + + +/******************************************************************************** +* Function Name : PWR_EnterSTOPMode +* Description : Enters STOP mode. +* Input : PWR_Regulator: specifies the regulator state in STOP mode. +* PWR_Regulator_ON: STOP mode with regulator ON +* PWR_Regulator_LowPower: STOP mode with regulator in low power mode +* PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. +* PWR_STOPEntry_WFI: enter STOP mode with WFI instruction +* PWR_STOPEntry_WFE: enter STOP mode with WFE instruction +* Return : None +*********************************************************************************/ +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) +{ + uint32_t tmpreg = 0; + tmpreg = PWR->CTLR; + tmpreg &= CTLR_DS_MASK; + tmpreg |= PWR_Regulator; + PWR->CTLR = tmpreg; + + NVIC->SCTLR |= (1<<2); + + if(PWR_STOPEntry == PWR_STOPEntry_WFI) + { + __WFI(); + } + else + { + __WFE(); + } + + NVIC->SCTLR &=~ (1<<2); +} + +/******************************************************************************** +* Function Name : PWR_EnterSTANDBYMode +* Description : Enters STANDBY mode. +* Input : None +* Return : None +*********************************************************************************/ +void PWR_EnterSTANDBYMode(void) +{ + PWR->CTLR |= PWR_CTLR_CWUF; + PWR->CTLR |= PWR_CTLR_PDDS; + NVIC->SCTLR |= (1<<2); + + __WFI(); +} + + +/******************************************************************************** +* Function Name : PWR_GetFlagStatus +* Description : Checks whether the specified PWR flag is set or not. +* Input : PWR_FLAG: specifies the flag to check. +* PWR_FLAG_WU: Wake Up flag +* PWR_FLAG_SB: StandBy flag +* PWR_FLAG_PVDO: PVD Output +* Return : The new state of PWR_FLAG (SET or RESET). +*********************************************************************************/ +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) +{ + FlagStatus bitstatus = RESET; + + if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + + +/******************************************************************************** +* Function Name : PWR_ClearFlag +* Description : Clears the PWR's pending flags. +* Input : PWR_FLAG: specifies the flag to clear. +* PWR_FLAG_WU: Wake Up flag +* PWR_FLAG_SB: StandBy flag +* Return : None +*********************************************************************************/ +void PWR_ClearFlag(uint32_t PWR_FLAG) +{ + PWR->CTLR |= PWR_FLAG << 2; +} + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rcc.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rcc.c new file mode 100644 index 0000000000..1a468df030 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rcc.c @@ -0,0 +1,837 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_rcc.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the RCC firmware functions. +*******************************************************************************/ +#include "ch32v10x_rcc.h" + +/* RCC registers bit address in the alias region */ +#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) + +/* BDCTLR Register */ +#define BDCTLR_OFFSET (RCC_OFFSET + 0x20) + +/* RCC registers bit mask */ + +/* CTLR register bit mask */ +#define CTLR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF) +#define CTLR_HSEBYP_Set ((uint32_t)0x00040000) +#define CTLR_HSEON_Reset ((uint32_t)0xFFFEFFFF) +#define CTLR_HSEON_Set ((uint32_t)0x00010000) +#define CTLR_HSITRIM_Mask ((uint32_t)0xFFFFFF07) + +#define CFGR0_PLL_Mask ((uint32_t)0xFFC0FFFF) +#define CFGR0_PLLMull_Mask ((uint32_t)0x003C0000) +#define CFGR0_PLLSRC_Mask ((uint32_t)0x00010000) +#define CFGR0_PLLXTPRE_Mask ((uint32_t)0x00020000) +#define CFGR0_SWS_Mask ((uint32_t)0x0000000C) +#define CFGR0_SW_Mask ((uint32_t)0xFFFFFFFC) +#define CFGR0_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F) +#define CFGR0_HPRE_Set_Mask ((uint32_t)0x000000F0) +#define CFGR0_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF) +#define CFGR0_PPRE1_Set_Mask ((uint32_t)0x00000700) +#define CFGR0_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF) +#define CFGR0_PPRE2_Set_Mask ((uint32_t)0x00003800) +#define CFGR0_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF) +#define CFGR0_ADCPRE_Set_Mask ((uint32_t)0x0000C000) + +/* RSTSCKR register bit mask */ +#define RSTSCKR_RMVF_Set ((uint32_t)0x01000000) + +/* RCC Flag Mask */ +#define FLAG_Mask ((uint8_t)0x1F) + +/* INTR register byte 2 (Bits[15:8]) base address */ +#define INTR_BYTE2_ADDRESS ((uint32_t)0x40021009) + +/* INTR register byte 3 (Bits[23:16]) base address */ +#define INTR_BYTE3_ADDRESS ((uint32_t)0x4002100A) + +/* CFGR0 register byte 4 (Bits[31:24]) base address */ +#define CFGR0_BYTE4_ADDRESS ((uint32_t)0x40021007) + +/* BDCTLR register base address */ +#define BDCTLR_ADDRESS (PERIPH_BASE + BDCTLR_OFFSET) + + +static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; +static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8}; + +/******************************************************************************* +* Function Name : RCC_DeInit +* Description : Resets the RCC clock configuration to the default reset state. +* Input : None +* Return : None +*******************************************************************************/ +void RCC_DeInit(void) +{ + RCC->CTLR |= (uint32_t)0x00000001; + RCC->CFGR0 &= (uint32_t)0xF8FF0000; + RCC->CTLR &= (uint32_t)0xFEF6FFFF; + RCC->CTLR &= (uint32_t)0xFFFBFFFF; + RCC->CFGR0 &= (uint32_t)0xFF80FFFF; + RCC->INTR = 0x009F0000; +} + +/******************************************************************************* +* Function Name : RCC_HSEConfig +* Description : Configures the External High Speed oscillator (HSE). +* Input : RCC_HSE: +* RCC_HSE_OFF: HSE oscillator OFF. +* RCC_HSE_ON: HSE oscillator ON. +* RCC_HSE_Bypass: HSE oscillator bypassed with external clock. +* Return : None +*******************************************************************************/ +void RCC_HSEConfig(uint32_t RCC_HSE) +{ + RCC->CTLR &= CTLR_HSEON_Reset; + RCC->CTLR &= CTLR_HSEBYP_Reset; + + switch(RCC_HSE) + { + case RCC_HSE_ON: + RCC->CTLR |= CTLR_HSEON_Set; + break; + + case RCC_HSE_Bypass: + RCC->CTLR |= CTLR_HSEBYP_Set | CTLR_HSEON_Set; + break; + + default: + break; + } +} + +/******************************************************************************* +* Function Name : RCC_WaitForHSEStartUp +* Description : Configures the External High Speed oscillator (HSE). +* Input : None +* Return : SUCCESS: HSE oscillator is stable and ready to use. +* ERROR: HSE oscillator not yet ready. +*******************************************************************************/ +ErrorStatus RCC_WaitForHSEStartUp(void) +{ + __IO uint32_t StartUpCounter = 0; + + ErrorStatus status = ERROR; + FlagStatus HSEStatus = RESET; + + do + { + HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY); + StartUpCounter++; + } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET)); + + if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) + { + status = SUCCESS; + } + else + { + status = ERROR; + } + + return (status); +} + +/******************************************************************************* +* Function Name : RCC_AdjustHSICalibrationValue +* Description : Adjusts the Internal High Speed oscillator (HSI) calibration value. +* Input : HSICalibrationValue: specifies the calibration trimming value. +* This parameter must be a number between 0 and 0x1F. +* Return : None +*******************************************************************************/ +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CTLR; + tmpreg &= CTLR_HSITRIM_Mask; + tmpreg |= (uint32_t)HSICalibrationValue << 3; + RCC->CTLR = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_HSICmd +* Description : Enables or disables the Internal High Speed oscillator (HSI). +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_HSICmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->CTLR |= (1<<0); + } + else{ + RCC->CTLR &= ~(1<<0); + } +} + +/******************************************************************************* +* Function Name : RCC_PLLConfig +* Description : Configures the PLL clock source and multiplication factor. +* Input : RCC_PLLSource: specifies the PLL entry clock source. +* RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 +* selected as PLL clock entry. +* RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL +* clock entry. +* RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 +* selected as PLL clock entry. +* RCC_PLLMul: specifies the PLL multiplication factor. +* This parameter can be RCC_PLLMul_x where x:[2,16]. +* Return : None +*******************************************************************************/ +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_PLL_Mask; + tmpreg |= RCC_PLLSource | RCC_PLLMul; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_PLLCmd +* Description : Enables or disables the PLL. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_PLLCmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->CTLR |= (1<<24); + } + else{ + RCC->CTLR &= ~(1<<24); + } +} + +/******************************************************************************* +* Function Name : RCC_SYSCLKConfig +* Description : Configures the system clock (SYSCLK). +* Input : RCC_SYSCLKSource: specifies the clock source used as system clock. +* RCC_SYSCLKSource_HSI: HSI selected as system clock. +* RCC_SYSCLKSource_HSE: HSE selected as system clock. +* RCC_SYSCLKSource_PLLCLK: PLL selected as system clock. +* Return : None +*******************************************************************************/ +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_SW_Mask; + tmpreg |= RCC_SYSCLKSource; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_GetSYSCLKSource +* Description : Configures the system clock (SYSCLK). +* Input : None +* Return : 0x00: HSI used as system clock. +* 0x04: HSE used as system clock. +* 0x08: PLL used as system clock. +*******************************************************************************/ +uint8_t RCC_GetSYSCLKSource(void) +{ + return ((uint8_t)(RCC->CFGR0 & CFGR0_SWS_Mask)); +} + +/******************************************************************************* +* Function Name : RCC_HCLKConfig +* Description : Configures the AHB clock (HCLK). +* Input : RCC_SYSCLK: defines the AHB clock divider. This clock is derived from +* the system clock (SYSCLK). +* RCC_SYSCLK_Div1: AHB clock = SYSCLK. +* RCC_SYSCLK_Div2: AHB clock = SYSCLK/2. +* RCC_SYSCLK_Div4: AHB clock = SYSCLK/4. +* RCC_SYSCLK_Div8: AHB clock = SYSCLK/8. +* RCC_SYSCLK_Div16: AHB clock = SYSCLK/16. +* RCC_SYSCLK_Div64: AHB clock = SYSCLK/64. +* RCC_SYSCLK_Div128: AHB clock = SYSCLK/128. +* RCC_SYSCLK_Div256: AHB clock = SYSCLK/256. +* RCC_SYSCLK_Div512: AHB clock = SYSCLK/512. +* Return : None +*******************************************************************************/ +void RCC_HCLKConfig(uint32_t RCC_SYSCLK) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_HPRE_Reset_Mask; + tmpreg |= RCC_SYSCLK; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_PCLK1Config +* Description : Configures the Low Speed APB clock (PCLK1). +* Input : RCC_HCLK: defines the APB1 clock divider. This clock is derived from +* the AHB clock (HCLK). +* RCC_HCLK_Div1: APB1 clock = HCLK. +* RCC_HCLK_Div2: APB1 clock = HCLK/2. +* RCC_HCLK_Div4: APB1 clock = HCLK/4. +* RCC_HCLK_Div8: APB1 clock = HCLK/8. +* RCC_HCLK_Div16: APB1 clock = HCLK/16. +* Return : None +*******************************************************************************/ +void RCC_PCLK1Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_PPRE1_Reset_Mask; + tmpreg |= RCC_HCLK; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_PCLK2Config +* Description : Configures the High Speed APB clock (PCLK2). +* Input : RCC_HCLK: defines the APB2 clock divider. This clock is derived from +* the AHB clock (HCLK). +* RCC_HCLK_Div1: APB2 clock = HCLK. +* RCC_HCLK_Div2: APB2 clock = HCLK/2. +* RCC_HCLK_Div4: APB2 clock = HCLK/4. +* RCC_HCLK_Div8: APB2 clock = HCLK/8. +* RCC_HCLK_Div16: APB2 clock = HCLK/16. +* Return : None +*******************************************************************************/ +void RCC_PCLK2Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_PPRE2_Reset_Mask; + tmpreg |= RCC_HCLK << 3; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_ITConfig +* Description : Enables or disables the specified RCC interrupts. +* Input : RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. +* RCC_IT_LSIRDY: LSI ready interrupt. +* RCC_IT_LSERDY: LSE ready interrupt. +* RCC_IT_HSIRDY: HSI ready interrupt. +* RCC_IT_HSERDY: HSE ready interrupt. +* RCC_IT_PLLRDY: PLL ready interrupt. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + *(__IO uint8_t *) INTR_BYTE2_ADDRESS |= RCC_IT; + } + else + { + *(__IO uint8_t *) INTR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT; + } +} + +/******************************************************************************* +* Function Name : RCC_USBCLKConfig +* Description : Configures the USB clock (USBCLK). +* Input : RCC_USBCLKSource: specifies the USB clock source. This clock is +* derived from the PLL output. +* RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB +* clock source. +* RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source. +* Return : None +*******************************************************************************/ +void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource) +{ + if(RCC_USBCLKSource) + { + RCC->CFGR0 |= (1<<22); + } + else{ + RCC->CFGR0 &= ~(1<<22); + } +} + +/******************************************************************************* +* Function Name : RCC_ADCCLKConfig +* Description : Configures the ADC clock (ADCCLK). +* Input : RCC_PCLK2: defines the ADC clock divider. This clock is derived from +* the APB2 clock (PCLK2). +* RCC_PCLK2_Div2: ADC clock = PCLK2/2. +* RCC_PCLK2_Div4: ADC clock = PCLK2/4. +* RCC_PCLK2_Div6: ADC clock = PCLK2/6. +* RCC_PCLK2_Div8: ADC clock = PCLK2/8. +* Return : None +********************************************************************************/ +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) +{ + uint32_t tmpreg = 0; + + tmpreg = RCC->CFGR0; + tmpreg &= CFGR0_ADCPRE_Reset_Mask; + tmpreg |= RCC_PCLK2; + RCC->CFGR0 = tmpreg; +} + +/******************************************************************************* +* Function Name : RCC_LSEConfig +* Description : Configures the External Low Speed oscillator (LSE). +* Input : RCC_LSE: specifies the new state of the LSE. +* RCC_LSE_OFF: LSE oscillator OFF. +* RCC_LSE_ON: LSE oscillator ON. +* RCC_LSE_Bypass: LSE oscillator bypassed with external clock. +* Return : None +********************************************************************************/ +void RCC_LSEConfig(uint8_t RCC_LSE) +{ + *(__IO uint8_t *) BDCTLR_ADDRESS = RCC_LSE_OFF; + *(__IO uint8_t *) BDCTLR_ADDRESS = RCC_LSE_OFF; + + switch(RCC_LSE) + { + case RCC_LSE_ON: + *(__IO uint8_t *) BDCTLR_ADDRESS = RCC_LSE_ON; + break; + + case RCC_LSE_Bypass: + *(__IO uint8_t *) BDCTLR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON; + break; + + default: + break; + } +} + +/******************************************************************************* +* Function Name : RCC_LSICmd +* Description : Enables or disables the Internal Low Speed oscillator (LSI). +* Input : NewState: ENABLE or DISABLE. +* Return : None +********************************************************************************/ +void RCC_LSICmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->RSTSCKR |= (1<<0); + } + else{ + RCC->RSTSCKR &= ~(1<<0); + } +} + +/******************************************************************************* +* Function Name : RCC_RTCCLKConfig +* Description : Once the RTC clock is selected it can't be changed unless the Backup domain is reset. +* Input : RCC_RTCCLKSource: specifies the RTC clock source. +* RCC_RTCCLKSource_LSE: LSE selected as RTC clock. +* RCC_RTCCLKSource_LSI: LSI selected as RTC clock. +* RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock. +* Return : None +********************************************************************************/ +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) +{ + RCC->BDCTLR |= RCC_RTCCLKSource; +} + +/******************************************************************************* +* Function Name : RCC_RTCCLKCmd +* Description : This function must be used only after the RTC clock was selected +* using the RCC_RTCCLKConfig function. +* Input : NewState: ENABLE or DISABLE. +* Return : None +********************************************************************************/ +void RCC_RTCCLKCmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->BDCTLR |= (1<<15); + } + else{ + RCC->BDCTLR &= ~(1<<15); + } +} + +/******************************************************************************* +* Function Name : RCC_GetClocksFreq +* Description : RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold +* the clocks frequencies. +* Input : The result of this function could be not correct when using +* fractional value for HSE crystal. +* Return : None +********************************************************************************/ +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0; + + tmp = RCC->CFGR0 & CFGR0_SWS_Mask; + + switch (tmp) + { + case 0x00: + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + + case 0x04: + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE; + break; + + case 0x08: + pllmull = RCC->CFGR0 & CFGR0_PLLMull_Mask; + pllsource = RCC->CFGR0 & CFGR0_PLLSRC_Mask; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; + } + else + { + if ((RCC->CFGR0 & CFGR0_PLLXTPRE_Mask) != (uint32_t)RESET) + { + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull; + } + else + { + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull; + } + } + break; + + default: + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + } + + tmp = RCC->CFGR0 & CFGR0_HPRE_Set_Mask; + tmp = tmp >> 4; + presc = APBAHBPrescTable[tmp]; + RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc; + tmp = RCC->CFGR0 & CFGR0_PPRE1_Set_Mask; + tmp = tmp >> 8; + presc = APBAHBPrescTable[tmp]; + RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + tmp = RCC->CFGR0 & CFGR0_PPRE2_Set_Mask; + tmp = tmp >> 11; + presc = APBAHBPrescTable[tmp]; + RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + tmp = RCC->CFGR0 & CFGR0_ADCPRE_Set_Mask; + tmp = tmp >> 14; + presc = ADCPrescTable[tmp]; + RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc; +} + +/******************************************************************************* +* Function Name : RCC_AHBPeriphClockCmd +* Description : Enables or disables the AHB peripheral clock. +* Input : RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. +* RCC_AHBPeriph_DMA1. +* RCC_AHBPeriph_DMA2. +* RCC_AHBPeriph_SRAM. +* RCC_AHBPeriph_FLITF. +* RCC_AHBPeriph_CRC. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RCC->AHBPCENR |= RCC_AHBPeriph; + } + else + { + RCC->AHBPCENR &= ~RCC_AHBPeriph; + } +} + +/******************************************************************************* +* Function Name : RCC_APB2PeriphClockCmd +* Description : Enables or disables the High Speed APB (APB2) peripheral clock. +* Input : RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. +* RCC_APB2Periph_AFIO. +* RCC_APB2Periph_GPIOA. +* RCC_APB2Periph_GPIOB. +* RCC_APB2Periph_GPIOC. +* RCC_APB2Periph_GPIOD. +* RCC_APB2Periph_ADC1. +* RCC_APB2Periph_TIM1. +* RCC_APB2Periph_SPI1. +* RCC_APB2Periph_USART1. +* NewState: ENABLE or DISABLE +* Return : None +*******************************************************************************/ +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RCC->APB2PCENR |= RCC_APB2Periph; + } + else + { + RCC->APB2PCENR &= ~RCC_APB2Periph; + } +} + +/******************************************************************************* +* Function Name : RCC_APB1PeriphClockCmd +* Description : Enables or disables the Low Speed APB (APB1) peripheral clock. +* Input : RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. +* RCC_APB1Periph_TIM2. +* RCC_APB1Periph_TIM3. +* RCC_APB1Periph_TIM4. +* RCC_APB1Periph_WWDG. +* RCC_APB1Periph_SPI2. +* RCC_APB1Periph_USART2. +* RCC_APB1Periph_USART3. +* RCC_APB1Periph_I2C1. +* RCC_APB1Periph_I2C2. +* RCC_APB1Periph_USB. +* RCC_APB1Periph_CAN1. +* RCC_APB1Periph_BKP. +* RCC_APB1Periph_PWR. +* RCC_APB1Periph_DAC. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RCC->APB1PCENR |= RCC_APB1Periph; + } + else + { + RCC->APB1PCENR &= ~RCC_APB1Periph; + } +} + +/******************************************************************************* +* Function Name : RCC_APB2PeriphResetCmd +* Description : Forces or releases High Speed APB (APB2) peripheral reset. +* Input : RCC_APB2Periph: specifies the APB2 peripheral to reset. +* RCC_APB2Periph_AFIO. +* RCC_APB2Periph_GPIOA. +* RCC_APB2Periph_GPIOB. +* RCC_APB2Periph_GPIOC. +* RCC_APB2Periph_GPIOD. +* RCC_APB2Periph_ADC1. +* RCC_APB2Periph_TIM1. +* RCC_APB2Periph_SPI1. +* RCC_APB2Periph_USART1. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RCC->APB2PRSTR |= RCC_APB2Periph; + } + else + { + RCC->APB2PRSTR &= ~RCC_APB2Periph; + } +} + +/******************************************************************************* +* Function Name : RCC_APB1PeriphResetCmd +* Description : Forces or releases Low Speed APB (APB1) peripheral reset. +* Input : RCC_APB1Periph: specifies the APB1 peripheral to reset. +* RCC_APB1Periph_TIM2. +* RCC_APB1Periph_TIM3. +* RCC_APB1Periph_TIM4. +* RCC_APB1Periph_WWDG. +* RCC_APB1Periph_SPI2. +* RCC_APB1Periph_USART2. +* RCC_APB1Periph_USART3. +* RCC_APB1Periph_I2C1. +* RCC_APB1Periph_I2C2. +* RCC_APB1Periph_USB. +* RCC_APB1Periph_CAN1. +* RCC_APB1Periph_BKP. +* RCC_APB1Periph_PWR. +* RCC_APB1Periph_DAC. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RCC->APB1PRSTR |= RCC_APB1Periph; + } + else + { + RCC->APB1PRSTR &= ~RCC_APB1Periph; + } +} + +/******************************************************************************* +* Function Name : RCC_BackupResetCmd +* Description : Forces or releases the Backup domain reset. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_BackupResetCmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->BDCTLR |= (1<<16); + } + else{ + RCC->BDCTLR &= ~(1<<16); + } +} + +/******************************************************************************* +* Function Name : RCC_ClockSecuritySystemCmd +* Description : Enables or disables the Clock Security System. +* Input : NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void RCC_ClockSecuritySystemCmd(FunctionalState NewState) +{ + if(NewState) + { + RCC->CTLR |= (1<<19); + } + else{ + RCC->CTLR &= ~(1<<19); + } +} + +/******************************************************************************* +* Function Name : RCC_MCOConfig +* Description : Selects the clock source to output on MCO pin. +* Input : RCC_MCO: specifies the clock source to output. +* RCC_MCO_NoClock: No clock selected. +* RCC_MCO_SYSCLK: System clock selected. +* RCC_MCO_HSI: HSI oscillator clock selected. +* RCC_MCO_HSE: HSE oscillator clock selected. +* RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected. +* Return : None +*******************************************************************************/ +void RCC_MCOConfig(uint8_t RCC_MCO) +{ + *(__IO uint8_t *) CFGR0_BYTE4_ADDRESS = RCC_MCO; +} + +/******************************************************************************* +* Function Name : RCC_GetFlagStatus +* Description : Checks whether the specified RCC flag is set or not. +* Input : RCC_FLAG: specifies the flag to check. +* RCC_FLAG_HSIRDY: HSI oscillator clock ready. +* RCC_FLAG_HSERDY: HSE oscillator clock ready. +* RCC_FLAG_PLLRDY: PLL clock ready. +* RCC_FLAG_LSERDY: LSE oscillator clock ready. +* RCC_FLAG_LSIRDY: LSI oscillator clock ready. +* RCC_FLAG_PINRST: Pin reset. +* RCC_FLAG_PORRST: POR/PDR reset. +* RCC_FLAG_SFTRST: Software reset. +* RCC_FLAG_IWDGRST: Independent Watchdog reset. +* RCC_FLAG_WWDGRST: Window Watchdog reset. +* RCC_FLAG_LPWRRST: Low Power reset. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) +{ + uint32_t tmp = 0; + uint32_t statusreg = 0; + + FlagStatus bitstatus = RESET; + tmp = RCC_FLAG >> 5; + + if (tmp == 1) + { + statusreg = RCC->CTLR; + } + else if (tmp == 2) + { + statusreg = RCC->BDCTLR; + } + else + { + statusreg = RCC->RSTSCKR; + } + + tmp = RCC_FLAG & FLAG_Mask; + + if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : RCC_ClearFlag +* Description : Clears the RCC reset flags. +* Input : None +* Return : None +*******************************************************************************/ +void RCC_ClearFlag(void) +{ + RCC->RSTSCKR |= RSTSCKR_RMVF_Set; +} + +/******************************************************************************* +* Function Name : RCC_GetITStatus +* Description : Checks whether the specified RCC interrupt has occurred or not. +* Input : RCC_IT: specifies the RCC interrupt source to check. +* RCC_IT_LSIRDY: LSI ready interrupt. +* RCC_IT_LSERDY: LSE ready interrupt. +* RCC_IT_HSIRDY: HSI ready interrupt. +* RCC_IT_HSERDY: HSE ready interrupt. +* RCC_IT_PLLRDY: PLL ready interrupt. +* RCC_IT_CSS: Clock Security System interruptt. +* Return : ITStatus: SET or RESET. +*******************************************************************************/ +ITStatus RCC_GetITStatus(uint8_t RCC_IT) +{ + ITStatus bitstatus = RESET; + + if ((RCC->INTR & RCC_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : RCC_ClearITPendingBit +* Description : Clears the RCC's interrupt pending bits. +* Input : RCC_IT: specifies the interrupt pending bit to clear. +* RCC_IT_LSIRDY: LSI ready interrupt. +* RCC_IT_LSERDY: LSE ready interrupt. +* RCC_IT_HSIRDY: HSI ready interrupt. +* RCC_IT_HSERDY: HSE ready interrupt. +* RCC_IT_PLLRDY: PLL ready interrupt. +* RCC_IT_CSS: Clock Security System interruptt. +* Return : None +*******************************************************************************/ +void RCC_ClearITPendingBit(uint8_t RCC_IT) +{ + *(__IO uint8_t *) INTR_BYTE3_ADDRESS = RCC_IT; +} + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rtc.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rtc.c new file mode 100644 index 0000000000..78ca436ebb --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_rtc.c @@ -0,0 +1,244 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_rtc.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the RTC firmware functions. +********************************************************************************/ +#include "ch32v10x_rtc.h" + +/* RTC_Private_Defines */ +#define RTC_LSB_MASK ((uint32_t)0x0000FFFF) /* RTC LSB Mask */ +#define PRLH_MSB_MASK ((uint32_t)0x000F0000) /* RTC Prescaler MSB Mask */ + +/******************************************************************************** +* Function Name : RTC_ITConfig +* Description : Enables or disables the specified RTC interrupts. +* Input : RTC_IT: specifies the RTC interrupts sources to be enabled or disabled. +* RTC_IT_OW: Overflow interrupt +* RTC_IT_ALR: Alarm interrupt +* RTC_IT_SEC: Second interrupt +* Return : NewState: new state of the specified RTC interrupts(ENABLE or DISABLE). +*********************************************************************************/ +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + RTC->CTLRH |= RTC_IT; + } + else + { + RTC->CTLRH &= (uint16_t)~RTC_IT; + } +} + +/******************************************************************************** +* Function Name : RTC_EnterConfigMode +* Description : Enters the RTC configuration mode. +* Input : None +* Return : None +*********************************************************************************/ +void RTC_EnterConfigMode(void) +{ + RTC->CTLRL |= RTC_CTLRL_CNF; +} + +/******************************************************************************** +* Function Name : RTC_ExitConfigMode +* Description : Exits from the RTC configuration mode. +* Input : None +* Return : None +*********************************************************************************/ +void RTC_ExitConfigMode(void) +{ + RTC->CTLRL &= (uint16_t)~((uint16_t)RTC_CTLRL_CNF); +} + +/******************************************************************************** +* Function Name : RTC_GetCounter +* Description : Gets the RTC counter value +* Input : None +* Return : RTC counter value +*********************************************************************************/ +uint32_t RTC_GetCounter(void) +{ + uint16_t high1 = 0, high2 = 0, low = 0; + + high1 = RTC->CNTH; + low = RTC->CNTL; + high2 = RTC->CNTH; + + if (high1 != high2) + { + return (((uint32_t) high2 << 16 ) | RTC->CNTL); + } + else + { + return (((uint32_t) high1 << 16 ) | low); + } +} + +/******************************************************************************** +* Function Name : RTC_SetCounter +* Description : Sets the RTC counter value. +* Input : CounterValue: RTC counter new value. +* Return : None +*********************************************************************************/ +void RTC_SetCounter(uint32_t CounterValue) +{ + RTC_EnterConfigMode(); + RTC->CNTH = CounterValue >> 16; + RTC->CNTL = (CounterValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/******************************************************************************** +* Function Name : RTC_SetPrescaler +* Description : Sets the RTC prescaler value +* Input : PrescalerValue: RTC prescaler new value +* Return : None +*********************************************************************************/ +void RTC_SetPrescaler(uint32_t PrescalerValue) +{ + RTC_EnterConfigMode(); + RTC->PSCRH = (PrescalerValue & PRLH_MSB_MASK) >> 16; + RTC->PSCRL = (PrescalerValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/******************************************************************************** +* Function Name : RTC_SetAlarm +* Description : Sets the RTC alarm value +* Input : AlarmValue: RTC alarm new value +* Return : None +*********************************************************************************/ +void RTC_SetAlarm(uint32_t AlarmValue) +{ + RTC_EnterConfigMode(); + RTC->ALRMH = AlarmValue >> 16; + RTC->ALRML = (AlarmValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/******************************************************************************** +* Function Name : RTC_GetDivider +* Description : Gets the RTC divider value +* Input : None +* Return : RTC Divider value +*********************************************************************************/ +uint32_t RTC_GetDivider(void) +{ + uint32_t tmp = 0x00; + tmp = ((uint32_t)RTC->DIVH & (uint32_t)0x000F) << 16; + tmp |= RTC->DIVL; + return tmp; +} + +/******************************************************************************** +* Function Name : RTC_WaitForLastTask +* Description : Waits until last write operation on RTC registers has finished +* Input : None +* Return : None +*********************************************************************************/ +void RTC_WaitForLastTask(void) +{ + while ((RTC->CTLRL & RTC_FLAG_RTOFF) == (uint16_t)RESET) + { + } +} + +/******************************************************************************** +* Function Name : RTC_WaitForSynchro +* Description : Waits until the RTC registers +* are synchronized with RTC APB clock +* Input : None +* Return : None +*********************************************************************************/ +void RTC_WaitForSynchro(void) +{ + RTC->CTLRL &= (uint16_t)~RTC_FLAG_RSF; + while ((RTC->CTLRL & RTC_FLAG_RSF) == (uint16_t)RESET) + { + } +} + +/******************************************************************************** +* Function Name : RTC_GetFlagStatus +* Description : Checks whether the specified RTC flag is set or not +* Input : RTC_FLAG: specifies the flag to check +* RTC_FLAG_RTOFF: RTC Operation OFF flag +* RTC_FLAG_RSF: Registers Synchronized flag +* RTC_FLAG_OW: Overflow flag +* RTC_FLAG_ALR: Alarm flag +* RTC_FLAG_SEC: Second flag +* Return : The new state of RTC_FLAG (SET or RESET) +*********************************************************************************/ +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG) +{ + FlagStatus bitstatus = RESET; + if ((RTC->CTLRL & RTC_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : RTC_ClearFlag +* Description : Clears the RTC's pending flags +* Input : RTC_FLAG: specifies the flag to clear +* RTC_FLAG_RSF: Registers Synchronized flag +* RTC_FLAG_OW: Overflow flag +* RTC_FLAG_ALR: Alarm flag +* RTC_FLAG_SEC: Second flag +* Return : None +*********************************************************************************/ +void RTC_ClearFlag(uint16_t RTC_FLAG) +{ + RTC->CTLRL &= (uint16_t)~RTC_FLAG; +} + + +/******************************************************************************** +* Function Name : RTC_GetITStatus +* Description : Checks whether the specified RTC interrupt has occurred or not +* Input : RTC_IT: specifies the RTC interrupts sources to check +* RTC_FLAG_OW: Overflow interrupt +* RTC_FLAG_ALR: Alarm interrupt +* RTC_FLAG_SEC: Second interrupt +* Return : The new state of the RTC_IT (SET or RESET) +*********************************************************************************/ +ITStatus RTC_GetITStatus(uint16_t RTC_IT) +{ + ITStatus bitstatus = RESET; + + bitstatus = (ITStatus)(RTC->CTLRL & RTC_IT); + if (((RTC->CTLRH & RTC_IT) != (uint16_t)RESET) && (bitstatus != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************** +* Function Name : RTC_ClearITPendingBit +* Description : Clears the RTC's interrupt pending bits +* Input : RTC_IT: specifies the interrupt pending bit to clear +* RTC_FLAG_OW: Overflow interrupt +* RTC_FLAG_ALR: Alarm interrupt +* RTC_FLAG_SEC: Second interrupt +* Return : None +*********************************************************************************/ +void RTC_ClearITPendingBit(uint16_t RTC_IT) +{ + RTC->CTLRL &= (uint16_t)~RTC_IT; +} + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_spi.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_spi.c new file mode 100644 index 0000000000..81d9252ef1 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_spi.c @@ -0,0 +1,587 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_spi.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the SPI firmware functions. +*********************************************************************************/ +#include "ch32v10x_spi.h" +#include "ch32v10x_rcc.h" + +/* SPI SPE mask */ +#define CTLR1_SPE_Set ((uint16_t)0x0040) +#define CTLR1_SPE_Reset ((uint16_t)0xFFBF) + +/* I2S I2SE mask */ +#define I2SCFGR_I2SE_Set ((uint16_t)0x0400) +#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) + +/* SPI CRCNext mask */ +#define CTLR1_CRCNext_Set ((uint16_t)0x1000) + +/* SPI CRCEN mask */ +#define CTLR1_CRCEN_Set ((uint16_t)0x2000) +#define CTLR1_CRCEN_Reset ((uint16_t)0xDFFF) + +/* SPI SSOE mask */ +#define CTLR2_SSOE_Set ((uint16_t)0x0004) +#define CTLR2_SSOE_Reset ((uint16_t)0xFFFB) + +/* SPI registers Masks */ +#define CTLR1_CLEAR_Mask ((uint16_t)0x3040) +#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) + +/* SPI or I2S mode selection masks */ +#define SPI_Mode_Select ((uint16_t)0xF7FF) +#define I2S_Mode_Select ((uint16_t)0x0800) + +/* I2S clock source selection masks */ +#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) +#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) +#define I2S_MUL_MASK ((uint32_t)(0x0000F000)) +#define I2S_DIV_MASK ((uint32_t)(0x000000F0)) + +/******************************************************************************* +* Function Name : SPI_I2S_DeInit +* Description : Deinitializes the SPIx peripheral registers to their default +* reset values (Affects also the I2Ss). +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* Return : None +*******************************************************************************/ +void SPI_I2S_DeInit(SPI_TypeDef* SPIx) +{ + if (SPIx == SPI1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); + } + else if (SPIx == SPI2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); + } + else + { + if (SPIx == SPI3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); + } + } +} + +/******************************************************************************* +* Function Name : SPI_Init +* Description : Initializes the SPIx peripheral according to the specified +* parameters in the SPI_InitStruct. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* SPI_InitStruct: pointer to a SPI_InitTypeDef structure that +* contains the configuration information for the specified SPI peripheral. +* Return : None +*******************************************************************************/ +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) +{ + uint16_t tmpreg = 0; + + tmpreg = SPIx->CTLR1; + tmpreg &= CTLR1_CLEAR_Mask; + tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | + SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | + SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | + SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); + + SPIx->CTLR1 = tmpreg; + SPIx->I2SCFGR &= SPI_Mode_Select; + SPIx->CRCR = SPI_InitStruct->SPI_CRCPolynomial; +} + +/******************************************************************************* +* Function Name : I2S_Init +* Description : Initializes the SPIx peripheral according to the specified +* parameters in the I2S_InitStruct. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* (configured in I2S mode). +* I2S_InitStruct: pointer to an I2S_InitTypeDef structure that +* contains the configuration information for the specified SPI peripheral +* configured in I2S mode. +* Return : None +*******************************************************************************/ +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) +{ + uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; + uint32_t tmp = 0; + RCC_ClocksTypeDef RCC_Clocks; + uint32_t sourceclock = 0; + + SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; + SPIx->I2SPR = 0x0002; + tmpreg = SPIx->I2SCFGR; + + if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) + { + i2sodd = (uint16_t)0; + i2sdiv = (uint16_t)2; + } + else + { + if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) + { + packetlength = 1; + } + else + { + packetlength = 2; + } + + if(((uint32_t)SPIx) == SPI2_BASE) + { + tmp = I2S2_CLOCK_SRC; + } + else + { + tmp = I2S3_CLOCK_SRC; + } + + RCC_GetClocksFreq(&RCC_Clocks); + + sourceclock = RCC_Clocks.SYSCLK_Frequency; + + if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) + { + tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + else + { + tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + + tmp = tmp / 10; + i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); + i2sdiv = (uint16_t)((tmp - i2sodd) / 2); + i2sodd = (uint16_t) (i2sodd << 8); + } + + if ((i2sdiv < 2) || (i2sdiv > 0xFF)) + { + i2sdiv = 2; + i2sodd = 0; + } + + SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); + tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ + (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ + (uint16_t)I2S_InitStruct->I2S_CPOL)))); + SPIx->I2SCFGR = tmpreg; +} + +/******************************************************************************* +* Function Name : SPI_StructInit +* Description : Fills each SPI_InitStruct member with its default value. +* Input : SPI_InitStruct : pointer to a SPI_InitTypeDef structure which +* will be initialized. +* Return : None +*******************************************************************************/ +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) +{ + SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; + SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; + SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; + SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; + SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; + SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; + SPI_InitStruct->SPI_CRCPolynomial = 7; +} + +/******************************************************************************* +* Function Name : I2S_StructInit +* Description : Fills each I2S_InitStruct member with its default value. +* Input : I2S_InitStruct : pointer to a I2S_InitTypeDef structure which +* will be initialized. +* Return : None +*******************************************************************************/ +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) +{ + I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; + I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; + I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; + I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; + I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; + I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; +} + +/******************************************************************************* +* Function Name : SPI_Cmd +* Description : Enables or disables the specified SPI peripheral. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + SPIx->CTLR1 |= CTLR1_SPE_Set; + } + else + { + SPIx->CTLR1 &= CTLR1_SPE_Reset; + } +} + +/******************************************************************************* +* Function Name : I2S_Cmd +* Description : Enables or disables the specified SPI peripheral (in I2S mode). +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; + } + else + { + SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; + } +} + +/******************************************************************************* +* Function Name : SPI_I2S_ITConfig +* Description : Enables or disables the specified SPI/I2S interrupts. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* SPI_I2S_IT: specifies the SPI/I2S interrupt source to be +* enabled or disabled. +* SPI_I2S_IT_TXE: Tx buffer empty interrupt mask. +* SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask. +* SPI_I2S_IT_ERR: Error interrupt mask. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) +{ + uint16_t itpos = 0, itmask = 0 ; + + itpos = SPI_I2S_IT >> 4; + itmask = (uint16_t)1 << (uint16_t)itpos; + + if (NewState != DISABLE) + { + SPIx->CTLR2 |= itmask; + } + else + { + SPIx->CTLR2 &= (uint16_t)~itmask; + } +} + +/******************************************************************************* +* Function Name : SPI_I2S_DMACmd +* Description : Enables or disables the SPIx/I2Sx DMA interface. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to +* be enabled or disabled. +* SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request. +* SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + SPIx->CTLR2 |= SPI_I2S_DMAReq; + } + else + { + SPIx->CTLR2 &= (uint16_t)~SPI_I2S_DMAReq; + } +} + +/******************************************************************************* +* Function Name : SPI_I2S_SendData +* Description : Transmits a Data through the SPIx/I2Sx peripheral. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* Data : Data to be transmitted. +* Return : None +*******************************************************************************/ +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) +{ + SPIx->DATAR = Data; +} + +/******************************************************************************* +* Function Name : SPI_I2S_ReceiveData +* Description : Returns the most recent received data by the SPIx/I2Sx peripheral. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* Data : Data to be transmitted. +* Return : SPIx->DATAR: The value of the received data. +*******************************************************************************/ +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) +{ + return SPIx->DATAR; +} + +/******************************************************************************* +* Function Name : SPI_NSSInternalSoftwareConfig +* Description : Configures internally by software the NSS pin for the selected SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* SPI_NSSInternalSoft: +* SPI_NSSInternalSoft_Set: Set NSS pin internally. +* SPI_NSSInternalSoft_Reset: Reset NSS pin internally. +* Return : None +*******************************************************************************/ +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) +{ + if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) + { + SPIx->CTLR1 |= SPI_NSSInternalSoft_Set; + } + else + { + SPIx->CTLR1 &= SPI_NSSInternalSoft_Reset; + } +} + +/******************************************************************************* +* Function Name : SPI_SSOutputCmd +* Description : Enables or disables the SS output for the selected SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* NewState: new state of the SPIx SS output. +* Return : None +*******************************************************************************/ +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + SPIx->CTLR2 |= CTLR2_SSOE_Set; + } + else + { + SPIx->CTLR2 &= CTLR2_SSOE_Reset; + } +} + +/******************************************************************************* +* Function Name : SPI_DataSizeConfig +* Description : Configures the data size for the selected SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* SPI_DataSize: specifies the SPI data size. +* SPI_DataSize_16b: Set data frame format to 16bit. +* SPI_DataSize_8b: Set data frame format to 8bit. +* Return : None +*******************************************************************************/ +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) +{ + SPIx->CTLR1 &= (uint16_t)~SPI_DataSize_16b; + SPIx->CTLR1 |= SPI_DataSize; +} + +/******************************************************************************* +* Function Name : SPI_TransmitCRC +* Description : Transmit the SPIx CRC value. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* Return : None +*******************************************************************************/ +void SPI_TransmitCRC(SPI_TypeDef* SPIx) +{ + SPIx->CTLR1 |= CTLR1_CRCNext_Set; +} + +/******************************************************************************* +* Function Name : SPI_CalculateCRC +* Description : Enables or disables the CRC value calculation of the transferred bytes. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* NewState: new state of the SPIx CRC value calculation. +* Return : None +*******************************************************************************/ +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + SPIx->CTLR1 |= CTLR1_CRCEN_Set; + } + else + { + SPIx->CTLR1 &= CTLR1_CRCEN_Reset; + } +} + +/******************************************************************************* +* Function Name : SPI_GetCRC +* Description : Returns the transmit or the receive CRC register value for the specified SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* SPI_CRC: specifies the CRC register to be read. +* SPI_CRC_Tx: Selects Tx CRC register. +* SPI_CRC_Rx: Selects Rx CRC register. +* Return : crcreg: The selected CRC register value. +*******************************************************************************/ +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) +{ + uint16_t crcreg = 0; + + if (SPI_CRC != SPI_CRC_Rx) + { + crcreg = SPIx->TCRCR; + } + else + { + crcreg = SPIx->RCRCR; + } + + return crcreg; +} + +/******************************************************************************* +* Function Name : SPI_GetCRCPolynomial +* Description : Returns the CRC Polynomial register value for the specified SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* Return : SPIx->CRCR: The CRC Polynomial register value. +*******************************************************************************/ +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) +{ + return SPIx->CRCR; +} + +/******************************************************************************* +* Function Name : SPI_BiDirectionalLineConfig +* Description : Selects the data transfer direction in bi-directional mode +* for the specified SPI. +* Input : SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. +* SPI_Direction: specifies the data transfer direction in +* bi-directional mode. +* SPI_Direction_Tx: Selects Tx transmission direction. +* SPI_Direction_Rx: Selects Rx receive direction. +* Return : None +*******************************************************************************/ +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) +{ + if (SPI_Direction == SPI_Direction_Tx) + { + SPIx->CTLR1 |= SPI_Direction_Tx; + } + else + { + SPIx->CTLR1 &= SPI_Direction_Rx; + } +} + +/******************************************************************************* +* Function Name : SPI_I2S_GetFlagStatus +* Description : Checks whether the specified SPI/I2S flag is set or not. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* SPI_I2S_FLAG: specifies the SPI/I2S flag to check. +* SPI_I2S_FLAG_TXE: Transmit buffer empty flag. +* SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. +* SPI_I2S_FLAG_BSY: Busy flag. +* SPI_I2S_FLAG_OVR: Overrun flag. +* SPI_FLAG_MODF: Mode Fault flag. +* SPI_FLAG_CRCERR: CRC Error flag. +* I2S_FLAG_UDR: Underrun Error flag. +* I2S_FLAG_CHSIDE: Channel Side flag. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + FlagStatus bitstatus = RESET; + + if ((SPIx->STATR & SPI_I2S_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : SPI_I2S_ClearFlag +* Description : Clears the SPIx CRC Error (CRCERR) flag. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* SPI_I2S_FLAG: specifies the SPI flag to clear. +* SPI_FLAG_CRCERR: CRC Error flag. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + SPIx->STATR = (uint16_t)~SPI_I2S_FLAG; +} + +/******************************************************************************* +* Function Name : SPI_I2S_GetITStatus +* Description : Clears the SPIx CRC Error (CRCERR) flag. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* - 2 or 3 in I2S mode. +* SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.. +* SPI_I2S_IT_TXE: Transmit buffer empty interrupt. +* SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. +* SPI_I2S_IT_OVR: Overrun interrupt. +* SPI_IT_MODF: Mode Fault interrupt. +* SPI_IT_CRCERR: CRC Error interrupt. +* I2S_IT_UDR: Underrun Error interrupt. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itpos = 0, itmask = 0, enablestatus = 0; + + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + itmask = SPI_I2S_IT >> 4; + itmask = 0x01 << itmask; + enablestatus = (SPIx->CTLR2 & itmask) ; + + if (((SPIx->STATR & itpos) != (uint16_t)RESET) && enablestatus) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : SPI_I2S_ClearITPendingBit +* Description : Clears the SPIx CRC Error (CRCERR) interrupt pending bit. +* Input : SPIx: where x can be +* - 1, 2 or 3 in SPI mode. +* SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. +* SPI_IT_CRCERR: CRC Error interrupt. +* Return : FlagStatus: SET or RESET. +*******************************************************************************/ +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + uint16_t itpos = 0; + + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + SPIx->STATR = (uint16_t)~itpos; +} + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_tim.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_tim.c new file mode 100644 index 0000000000..80c4a50a09 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_tim.c @@ -0,0 +1,2079 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_tim.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the TIM firmware functions. +*******************************************************************************/ +#include "ch32v10x_tim.h" +#include "ch32v10x_rcc.h" + +/* TIM registers bit mask */ +#define SMCFGR_ETR_Mask ((uint16_t)0x00FF) +#define CHCTLR_Offset ((uint16_t)0x0018) +#define CCER_CCE_Set ((uint16_t)0x0001) +#define CCER_CCNE_Set ((uint16_t)0x0004) + +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); + +/******************************************************************************* +* Function Name : TIM_DeInit +* Description : Deinitializes the TIMx peripheral registers to their default +* reset values. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* Return : None +*******************************************************************************/ +void TIM_DeInit(TIM_TypeDef* TIMx) +{ + if (TIMx == TIM1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); + } + else if (TIMx == TIM2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); + } + else if (TIMx == TIM3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); + } + else if (TIMx == TIM4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); + } +} + +/******************************************************************************* +* Function Name : TIM_TimeBaseInit +* Description : Initializes the TIMx Time Base Unit peripheral according to +* the specified parameters in the TIM_TimeBaseInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef +* structure. +* Return : None +*******************************************************************************/ +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + uint16_t tmpcr1 = 0; + + tmpcr1 = TIMx->CTLR1; + + if((TIMx == TIM1) || (TIMx == TIM2) || (TIMx == TIM3)|| (TIMx == TIM4)) + { + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_DIR | TIM_CMS))); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; + } + + tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CTLR1_CKD)); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; + + TIMx->CTLR1 = tmpcr1; + TIMx->ATRLR = TIM_TimeBaseInitStruct->TIM_Period ; + TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; + + if (TIMx == TIM1) + { + TIMx->RPTCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; + } + + TIMx->SWEVGR = TIM_PSCReloadMode_Immediate; +} + +/******************************************************************************* +* Function Name : TIM_OC1Init +* Description : Initializes the TIMx Channel1 according to the specified +* parameters in the TIM_OCInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CC1E); + tmpccer = TIMx->CCER; + tmpcr2 = TIMx->CTLR2; + tmpccmrx = TIMx->CHCTLR1; + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_OC1M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CC1S)); + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC1P)); + tmpccer |= TIM_OCInitStruct->TIM_OCPolarity; + tmpccer |= TIM_OCInitStruct->TIM_OutputState; + + if(TIMx == TIM1) + { + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC1NP)); + tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity; + + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC1NE)); + tmpccer |= TIM_OCInitStruct->TIM_OutputNState; + + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS1)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS1N)); + + tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState; + tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState; + } + + TIMx->CTLR2 = tmpcr2; + TIMx->CHCTLR1 = tmpccmrx; + TIMx->CH1CVR = TIM_OCInitStruct->TIM_Pulse; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC2Init +* Description : Initializes the TIMx Channel2 according to the specified +* parameters in the TIM_OCInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CC2E)); + tmpccer = TIMx->CCER; + tmpcr2 = TIMx->CTLR2; + tmpccmrx = TIMx->CHCTLR1; + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_OC2M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CC2S)); + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC2P)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4); + + if(TIMx == TIM1) + { + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC2NP)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4); + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC2NE)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4); + + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS2)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS2N)); + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2); + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2); + } + + TIMx->CTLR2 = tmpcr2; + TIMx->CHCTLR1 = tmpccmrx; + TIMx->CH2CVR = TIM_OCInitStruct->TIM_Pulse; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC3Init +* Description : Initializes the TIMx Channel3 according to the specified +* parameters in the TIM_OCInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CC3E)); + tmpccer = TIMx->CCER; + tmpcr2 = TIMx->CTLR2; + tmpccmrx = TIMx->CHCTLR2; + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_OC3M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CC3S)); + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC3P)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8); + + if(TIMx == TIM1) + { + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC3NP)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8); + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC3NE)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS3)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS3N)); + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4); + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4); + } + + TIMx->CTLR2 = tmpcr2; + TIMx->CHCTLR2 = tmpccmrx; + TIMx->CH3CVR = TIM_OCInitStruct->TIM_Pulse; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC4Init +* Description : Initializes the TIMx Channel4 according to the specified +* parameters in the TIM_OCInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CC4E)); + tmpccer = TIMx->CCER; + tmpcr2 = TIMx->CTLR2; + tmpccmrx = TIMx->CHCTLR2; + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_OC4M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CC4S)); + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + tmpccer &= (uint16_t)(~((uint16_t)TIM_CC4P)); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12); + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12); + + if(TIMx == TIM1) + { + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_OIS4)); + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6); + } + + TIMx->CTLR2 = tmpcr2; + TIMx->CHCTLR2 = tmpccmrx; + TIMx->CH4CVR = TIM_OCInitStruct->TIM_Pulse; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_ICInit +* Description : IInitializes the TIM peripheral according to the specified +* parameters in the TIM_ICInitStruct. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2) + { + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3) + { + TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/******************************************************************************* +* Function Name : TIM_PWMIConfig +* Description : Configures the TIM peripheral according to the specified +* parameters in the TIM_ICInitStruct to measure an external PWM signal. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + uint16_t icoppositepolarity = TIM_ICPolarity_Rising; + uint16_t icoppositeselection = TIM_ICSelection_DirectTI; + + if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising) + { + icoppositepolarity = TIM_ICPolarity_Falling; + } + else + { + icoppositepolarity = TIM_ICPolarity_Rising; + } + + if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI) + { + icoppositeselection = TIM_ICSelection_IndirectTI; + } + else + { + icoppositeselection = TIM_ICSelection_DirectTI; + } + + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/******************************************************************************* +* Function Name : TIM_BDTRConfig +* Description : Configures the: Break feature, dead time, Lock level, the OSSI, +* the OSSR State and the AOE(automatic output enable). +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) +{ + TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState | + TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime | + TIM_BDTRInitStruct->TIM_Break | TIM_BDTRInitStruct->TIM_BreakPolarity | + TIM_BDTRInitStruct->TIM_AutomaticOutput; +} + +/******************************************************************************* +* Function Name : TIM_TimeBaseStructInit +* Description : Fills each TIM_TimeBaseInitStruct member with its default value. +* Input : TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + TIM_TimeBaseInitStruct->TIM_Period = 0xFFFF; + TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000; + TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000; +} + +/******************************************************************************* +* Function Name : TIM_OCStructInit +* Description : Fills each TIM_OCInitStruct member with its default value. +* Input : TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing; + TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable; + TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable; + TIM_OCInitStruct->TIM_Pulse = 0x0000; + TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset; + TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset; +} + +/******************************************************************************* +* Function Name : TIM_ICStructInit +* Description : Fills each TIM_ICInitStruct member with its default value. +* Input : TIM_ICInitStruct : pointer to a TIM_ICInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + TIM_ICInitStruct->TIM_Channel = TIM_Channel_1; + TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising; + TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI; + TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1; + TIM_ICInitStruct->TIM_ICFilter = 0x00; +} + +/******************************************************************************* +* Function Name : TIM_BDTRStructInit +* Description : Fills each TIM_BDTRInitStruct member with its default value. +* Input : TIM_BDTRInitStruct : pointer to a TIM_BDTRInitTypeDef structure. +* Return : None +*******************************************************************************/ +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) +{ + TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable; + TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable; + TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF; + TIM_BDTRInitStruct->TIM_DeadTime = 0x00; + TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable; + TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low; + TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; +} + +/******************************************************************************* +* Function Name : TIM_Cmd +* Description : Fills each TIM_BDTRInitStruct member with its default value. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR1 |= TIM_CEN; + } + else + { + TIMx->CTLR1 &= (uint16_t)(~((uint16_t)TIM_CEN)); + } +} + +/******************************************************************************* +* Function Name : TIM_CtrlPWMOutputs +* Description : Enables or disables the TIM peripheral Main Outputs. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->BDTR |= TIM_MOE; + } + else + { + TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_MOE)); + } +} + +/******************************************************************************* +* Function Name : TIM_ITConfig +* Description : Enables or disables the specified TIM interrupts. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. +* TIM_IT_Update: TIM update Interrupt source. +* TIM_IT_CC1: TIM Capture Compare 1 Interrupt source. +* TIM_IT_CC2: TIM Capture Compare 2 Interrupt source +* TIM_IT_CC3: TIM Capture Compare 3 Interrupt source. +* TIM_IT_CC4: TIM Capture Compare 4 Interrupt source. +* TIM_IT_COM: TIM Commutation Interrupt source. +* TIM_IT_Trigger: TIM Trigger Interrupt source. +* TIM_IT_Break: TIM Break Interrupt source. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->DMAINTENR |= TIM_IT; + } + else + { + TIMx->DMAINTENR &= (uint16_t)~TIM_IT; + } +} + +/******************************************************************************* +* Function Name : TIM_GenerateEvent +* Description : Configures the TIMx event to be generate by software. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_EventSource: specifies the event source. +* TIM_EventSource_Update: Timer update Event source. +* TIM_EventSource_CC1: Timer Capture Compare 1 Event source. +* TIM_EventSource_CC2: Timer Capture Compare 2 Event source. +* TIM_EventSource_CC3: Timer Capture Compare 3 Event source. +* TIM_EventSource_CC4: Timer Capture Compare 4 Event source. +* TIM_EventSource_COM: Timer COM event source. +* TIM_EventSource_Trigger: Timer Trigger Event source. +* TIM_EventSource_Break: Timer Break event source. +* Return : None +*******************************************************************************/ +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) +{ + TIMx->SWEVGR = TIM_EventSource; +} + +/******************************************************************************* +* Function Name : TIM_DMAConfig +* Description : Configures the TIMx's DMA interface. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_DMABase: DMA Base address. +* TIM_DMABase_CR. +* TIM_DMABase_CR2. +* TIM_DMABase_SMCR. +* TIM_DMABase_DIER. +* TIM1_DMABase_SR. +* TIM_DMABase_EGR. +* TIM_DMABase_CCMR1. +* TIM_DMABase_CCMR2. +* TIM_DMABase_CCER. +* TIM_DMABase_CNT. +* TIM_DMABase_PSC. +* TIM_DMABase_CCR1. +* TIM_DMABase_CCR2. +* TIM_DMABase_CCR3. +* TIM_DMABase_CCR4. +* TIM_DMABase_BDTR. +* TIM_DMABase_DCR. +* TIM_DMABurstLength: DMA Burst length. +* TIM_DMABurstLength_1Transfer. +* TIM_DMABurstLength_18Transfers. +* Return : None +*******************************************************************************/ +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) +{ + TIMx->DMACFGR = TIM_DMABase | TIM_DMABurstLength; +} + +/******************************************************************************* +* Function Name : TIM_DMACmd +* Description : Enables or disables the TIMx's DMA Requests. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_DMASource: specifies the DMA Request sources. +* TIM_DMA_Update: TIM update Interrupt source. +* TIM_DMA_CC1: TIM Capture Compare 1 DMA source. +* TIM_DMA_CC2: TIM Capture Compare 2 DMA source. +* TIM_DMA_CC3: TIM Capture Compare 3 DMA source. +* TIM_DMA_CC4: TIM Capture Compare 4 DMA source. +* TIM_DMA_COM: TIM Commutation DMA source. +* TIM_DMA_Trigger: TIM Trigger DMA source. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->DMAINTENR |= TIM_DMASource; + } + else + { + TIMx->DMAINTENR &= (uint16_t)~TIM_DMASource; + } +} + +/******************************************************************************* +* Function Name : TIM_InternalClockConfig +* Description : Configures the TIMx internal Clock. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* Return : None +*******************************************************************************/ +void TIM_InternalClockConfig(TIM_TypeDef* TIMx) +{ + TIMx->SMCFGR &= (uint16_t)(~((uint16_t)TIM_SMS)); +} + +/******************************************************************************* +* Function Name : TIM_ITRxExternalClockConfig +* Description : Configures the TIMx Internal Trigger as External Clock. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_InputTriggerSource: Trigger source. +* TIM_TS_ITR0: Internal Trigger 0. +* TIM_TS_ITR1: Internal Trigger 1. +* TIM_TS_ITR2: Internal Trigger 2. +* TIM_TS_ITR3: Internal Trigger 3. +* Return : None +*******************************************************************************/ +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource); + TIMx->SMCFGR |= TIM_SlaveMode_External1; +} + +/******************************************************************************* +* Function Name : TIM_TIxExternalClockConfig +* Description : Configures the TIMx Trigger as External Clock. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_TIxExternalCLKSource: Trigger source. +* TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector. +* TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1. +* TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2. +* TIM_ICPolarity: specifies the TIx Polarity. +* TIM_ICPolarity_Rising. +* TIM_ICPolarity_Falling. +* TIM_DMA_COM: TIM Commutation DMA source. +* TIM_DMA_Trigger: TIM Trigger DMA source. +* ICFilter : specifies the filter value. +* This parameter must be a value between 0x0 and 0xF. +* Return : None +*******************************************************************************/ +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter) +{ + if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2) + { + TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + else + { + TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + + TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource); + TIMx->SMCFGR |= TIM_SlaveMode_External1; +} + +/******************************************************************************* +* Function Name : TIM_ETRClockMode1Config +* Description : Configures the External clock Mode1. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ExtTRGPrescaler: The external Trigger Prescaler. +* TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. +* TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. +* TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. +* TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. +* TIM_ExtTRGPolarity: The external Trigger Polarity. +* TIM_ExtTRGPolarity_Inverted: active low or falling edge active. +* TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. +* ExtTRGFilter: External Trigger Filter. +* This parameter must be a value between 0x0 and 0xF. +* Return : None +*******************************************************************************/ +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + tmpsmcr = TIMx->SMCFGR; + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMS)); + tmpsmcr |= TIM_SlaveMode_External1; + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_TS)); + tmpsmcr |= TIM_TS_ETRF; + TIMx->SMCFGR = tmpsmcr; +} + +/******************************************************************************* +* Function Name : TIM_ETRClockMode2Config +* Description : Configures the External clock Mode2. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ExtTRGPrescaler: The external Trigger Prescaler. +* TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. +* TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. +* TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. +* TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. +* TIM_ExtTRGPolarity: The external Trigger Polarity. +* TIM_ExtTRGPolarity_Inverted: active low or falling edge active. +* TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. +* ExtTRGFilter: External Trigger Filter. +* This parameter must be a value between 0x0 and 0xF. +* Return : None +*******************************************************************************/ +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter) +{ + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + TIMx->SMCFGR |= TIM_ECE; +} + +/******************************************************************************* +* Function Name : TIM_ETRConfig +* Description : Configures the TIMx External Trigger (ETR). +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ExtTRGPrescaler: The external Trigger Prescaler. +* TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. +* TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. +* TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. +* TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. +* TIM_ExtTRGPolarity: The external Trigger Polarity. +* TIM_ExtTRGPolarity_Inverted: active low or falling edge active. +* TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. +* ExtTRGFilter: External Trigger Filter. +* This parameter must be a value between 0x0 and 0xF. +* Return : None +*******************************************************************************/ +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + + tmpsmcr = TIMx->SMCFGR; + tmpsmcr &= SMCFGR_ETR_Mask; + tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8))); + TIMx->SMCFGR = tmpsmcr; +} + +/******************************************************************************* +* Function Name : TIM_PrescalerConfig +* Description : Configures the TIMx Prescaler. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* Prescaler: specifies the Prescaler Register value. +* TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode. +* TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode. +* TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. +* TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediately. +* Return : None +*******************************************************************************/ +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) +{ + TIMx->PSC = Prescaler; + TIMx->SWEVGR = TIM_PSCReloadMode; +} + +/******************************************************************************* +* Function Name : TIM_CounterModeConfig +* Description : Specifies the TIMx Counter Mode to be used. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_CounterMode: specifies the Counter Mode to be used. +* TIM_CounterMode_Up: TIM Up Counting Mode. +* TIM_CounterMode_Down: TIM Down Counting Mode. +* TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1. +* TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2. +* TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3. +* Return : None +*******************************************************************************/ +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) +{ + uint16_t tmpcr1 = 0; + + tmpcr1 = TIMx->CTLR1; + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_DIR | TIM_CMS))); + tmpcr1 |= TIM_CounterMode; + TIMx->CTLR1 = tmpcr1; +} + +/******************************************************************************* +* Function Name : TIM_SelectInputTrigger +* Description : Selects the Input Trigger source. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_InputTriggerSource: The Input Trigger source. +* TIM_TS_ITR0: Internal Trigger 0. +* TIM_TS_ITR1: Internal Trigger 1. +* TIM_TS_ITR2: Internal Trigger 2. +* TIM_TS_ITR3: Internal Trigger 3. +* TIM_TS_TI1F_ED: TI1 Edge Detector. +* TIM_TS_TI1FP1: Filtered Timer Input 1. +* TIM_TS_TI2FP2: Filtered Timer Input 2. +* TIM_TS_ETRF: External Trigger input. +* Return : None +*******************************************************************************/ +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + uint16_t tmpsmcr = 0; + + tmpsmcr = TIMx->SMCFGR; + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_TS)); + tmpsmcr |= TIM_InputTriggerSource; + TIMx->SMCFGR = tmpsmcr; +} + +/******************************************************************************* +* Function Name : TIM_EncoderInterfaceConfig +* Description : Configures the TIMx Encoder Interface. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_EncoderMode: specifies the TIMx Encoder Mode. +* TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending +* on TI2FP2 level. +* TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending +* on TI1FP1 level. +* TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and +* TI2FP2 edges depending. +* TIM_IC1Polarity: specifies the IC1 Polarity. +* TIM_ICPolarity_Falling: IC Falling edge. +* TTIM_ICPolarity_Rising: IC Rising edge. +* TIM_IC2Polarity: specifies the IC2 Polarity. +* TIM_ICPolarity_Falling: IC Falling edge. +* TIM_ICPolarity_Rising: IC Rising edge. +* Return : None +*******************************************************************************/ +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity) +{ + uint16_t tmpsmcr = 0; + uint16_t tmpccmr1 = 0; + uint16_t tmpccer = 0; + + tmpsmcr = TIMx->SMCFGR; + tmpccmr1 = TIMx->CHCTLR1; + tmpccer = TIMx->CCER; + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMS)); + tmpsmcr |= TIM_EncoderMode; + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CC1S)) & (uint16_t)(~((uint16_t)TIM_CC2S))); + tmpccmr1 |= TIM_CC1S_0 | TIM_CC2S_0; + tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CC1P)) & ((uint16_t)~((uint16_t)TIM_CC2P))); + tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); + TIMx->SMCFGR = tmpsmcr; + TIMx->CHCTLR1 = tmpccmr1; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_ForcedOC1Config +* Description : Forces the TIMx output 1 waveform to active or inactive level. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ForcedAction: specifies the forced Action to be set to the +* output waveform. +* TIM_ForcedAction_Active: Force active level on OC1REF. +* TIM_ForcedAction_InActive: Force inactive level on OC1REF. +* Return : None +*******************************************************************************/ +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC1M); + tmpccmr1 |= TIM_ForcedAction; + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_ForcedOC2Config +* Description : Forces the TIMx output 2 waveform to active or inactive level. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ForcedAction: specifies the forced Action to be set to the +* output waveform. +* TIM_ForcedAction_Active: Force active level on OC2REF. +* TIM_ForcedAction_InActive: Force inactive level on OC2REF. +* Return : None +*******************************************************************************/ +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC2M); + tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8); + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_ForcedOC3Config +* Description : Forces the TIMx output 3 waveform to active or inactive level. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ForcedAction: specifies the forced Action to be set to the +* output waveform. +* TIM_ForcedAction_Active: Force active level on OC3REF. +* TIM_ForcedAction_InActive: Force inactive level on OC3REF. +* Return : None +*******************************************************************************/ +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC3M); + tmpccmr2 |= TIM_ForcedAction; + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_ForcedOC4Config +* Description : Forces the TIMx output 4 waveform to active or inactive level. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_ForcedAction: specifies the forced Action to be set to the +* output waveform. +* TIM_ForcedAction_Active: Force active level on OC4REF. +* TIM_ForcedAction_InActive: Force inactive level on OC4REF. +* Return : None +*******************************************************************************/ +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC4M); + tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8); + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_ARRPreloadConfig +* Description : Enables or disables TIMx peripheral Preload register on ARR. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR1 |= TIM_ARPE; + } + else + { + TIMx->CTLR1 &= (uint16_t)~((uint16_t)TIM_ARPE); + } +} + +/******************************************************************************* +* Function Name : TIM_SelectCOM +* Description : Selects the TIM peripheral Commutation event. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR2 |= TIM_CCUS; + } + else + { + TIMx->CTLR2 &= (uint16_t)~((uint16_t)TIM_CCUS); + } +} + +/******************************************************************************* +* Function Name : TIM_SelectCCDMA +* Description : Selects the TIMx peripheral Capture Compare DMA source. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR2 |= TIM_CCDS; + } + else + { + TIMx->CTLR2 &= (uint16_t)~((uint16_t)TIM_CCDS); + } +} + +/******************************************************************************* +* Function Name : TIM_CCPreloadControl +* Description : Sets or Resets the TIM peripheral Capture Compare Preload Control bit. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR2 |= TIM_CCPC; + } + else + { + TIMx->CTLR2 &= (uint16_t)~((uint16_t)TIM_CCPC); + } +} + +/******************************************************************************* +* Function Name : TIM_OC1PreloadConfig +* Description : Enables or disables the TIMx peripheral Preload register on CCR1. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPreload: new state of the TIMx peripheral Preload register. +* TIM_OCPreload_Enable. +* TIM_OCPreload_Disable. +* Return : None +*******************************************************************************/ +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC1PE); + tmpccmr1 |= TIM_OCPreload; + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_OC2PreloadConfig +* Description : Enables or disables the TIMx peripheral Preload register on CCR1. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPreload: new state of the TIMx peripheral Preload register. +* TIM_OCPreload_Enable. +* TIM_OCPreload_Disable. +* Return : None +*******************************************************************************/ +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC2PE); + tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8); + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_OC3PreloadConfig +* Description : Enables or disables the TIMx peripheral Preload register on CCR3. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPreload: new state of the TIMx peripheral Preload register. +* TIM_OCPreload_Enable. +* TIM_OCPreload_Disable. +* Return : None +*******************************************************************************/ +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC3PE); + tmpccmr2 |= TIM_OCPreload; + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_OC4PreloadConfig +* Description : Enables or disables the TIMx peripheral Preload register on CCR4. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPreload: new state of the TIMx peripheral Preload register. +* TIM_OCPreload_Enable. +* TIM_OCPreload_Disable. +* Return : None +*******************************************************************************/ +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC4PE); + tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8); + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_OC1FastConfig +* Description : Configures the TIMx Output Compare 1 Fast feature. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCFast: new state of the Output Compare Fast Enable Bit. +* TIM_OCFast_Enable: TIM output compare fast enable. +* TIM_OCFast_Disable: TIM output compare fast disable. +* Return : None +*******************************************************************************/ +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC1FE); + tmpccmr1 |= TIM_OCFast; + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_OC2FastConfig +* Description : Configures the TIMx Output Compare 2 Fast feature. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCFast: new state of the Output Compare Fast Enable Bit. +* TIM_OCFast_Enable: TIM output compare fast enable. +* TIM_OCFast_Disable: TIM output compare fast disable. +* Return : None +*******************************************************************************/ +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC2FE); + tmpccmr1 |= (uint16_t)(TIM_OCFast << 8); + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_OC3FastConfig +* Description : Configures the TIMx Output Compare 3 Fast feature. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCFast: new state of the Output Compare Fast Enable Bit. +* TIM_OCFast_Enable: TIM output compare fast enable. +* TIM_OCFast_Disable: TIM output compare fast disable. +* Return : None +*******************************************************************************/ +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC3FE); + tmpccmr2 |= TIM_OCFast; + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_OC4FastConfig +* Description : Configures the TIMx Output Compare 4 Fast feature. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCFast: new state of the Output Compare Fast Enable Bit. +* TIM_OCFast_Enable: TIM output compare fast enable. +* TIM_OCFast_Disable: TIM output compare fast disable. +* Return : None +*******************************************************************************/ +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC4FE); + tmpccmr2 |= (uint16_t)(TIM_OCFast << 8); + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_ClearOC1Ref +* Description : Clears or safeguards the OCREF1 signal on an external event. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCClear: new state of the Output Compare Clear Enable Bit. +* TIM_OCClear_Enable: TIM Output clear enable. +* TIM_OCClear_Disable: TIM Output clear disable. +* Return : None +*******************************************************************************/ +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC1CE); + tmpccmr1 |= TIM_OCClear; + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_ClearOC2Ref +* Description : Clears or safeguards the OCREF2 signal on an external event. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCClear: new state of the Output Compare Clear Enable Bit. +* TIM_OCClear_Enable: TIM Output clear enable. +* TIM_OCClear_Disable: TIM Output clear disable. +* Return : None +*******************************************************************************/ +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + + tmpccmr1 = TIMx->CHCTLR1; + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_OC2CE); + tmpccmr1 |= (uint16_t)(TIM_OCClear << 8); + TIMx->CHCTLR1 = tmpccmr1; +} + +/******************************************************************************* +* Function Name : TIM_ClearOC3Ref +* Description : Clears or safeguards the OCREF3 signal on an external event. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCClear: new state of the Output Compare Clear Enable Bit. +* TIM_OCClear_Enable: TIM Output clear enable. +* TIM_OCClear_Disable: TIM Output clear disable. +* Return : None +*******************************************************************************/ +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC3CE); + tmpccmr2 |= TIM_OCClear; + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_ClearOC4Ref +* Description : Clears or safeguards the OCREF4 signal on an external event. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCClear: new state of the Output Compare Clear Enable Bit. +* TIM_OCClear_Enable: TIM Output clear enable. +* TIM_OCClear_Disable: TIM Output clear disable. +* Return : None +*******************************************************************************/ +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + + tmpccmr2 = TIMx->CHCTLR2; + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_OC4CE); + tmpccmr2 |= (uint16_t)(TIM_OCClear << 8); + TIMx->CHCTLR2 = tmpccmr2; +} + +/******************************************************************************* +* Function Name : TIM_OC1PolarityConfig +* Description : Configures the TIMx channel 1 polarity. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPolarity: specifies the OC1 Polarity. +* TIM_OCPolarity_High: Output Compare active high. +* TIM_OCPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC1P); + tmpccer |= TIM_OCPolarity; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC1NPolarityConfig +* Description : Configures the TIMx channel 1 polarity. +* Input : TIMx: where x can be 1 to select the TIM peripheral. +* TIM_OCNPolarity: specifies the OC1N Polarity. +* TIM_OCNPolarity_High: Output Compare active high. +* TIM_OCNPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC1NP); + tmpccer |= TIM_OCNPolarity; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC2PolarityConfig +* Description : Configures the TIMx channel 2 polarity. +* Input : TIMx: where x can be 1 to 4 to select the TIM peripheral. +* TIM_OCPolarity: specifies the OC2 Polarity. +* TIM_OCPolarity_High: Output Compare active high. +* TIM_OCPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC2P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 4); + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC2NPolarityConfig +* Description : Configures the TIMx Channel 2N polarity. +* Input : TIMx: where x can be 1 to select the TIM peripheral. +* TIM_OCNPolarity: specifies the OC2N Polarity. +* TIM_OCNPolarity_High: Output Compare active high. +* TIM_OCNPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC2NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 4); + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC3PolarityConfig +* Description : Configures the TIMx Channel 3 polarity. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_OCPolarity: specifies the OC3 Polarity. +* TIM_OCPolarity_High: Output Compare active high. +* TIM_OCPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC3P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 8); + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC3NPolarityConfig +* Description : Configures the TIMx Channel 3N polarity. +* Input : TIMx: where x can be 1 to select the TIM peripheral. +* TIM_OCNPolarity: specifies the OC2N Polarity. +* TIM_OCNPolarity_High: Output Compare active high. +* TIM_OCNPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC3NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 8); + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_OC4PolarityConfig +* Description : Configures the TIMx channel 4 polarity. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_OCPolarity: specifies the OC4 Polarity. +* TIM_OCPolarity_High: Output Compare active high. +* TIM_OCPolarity_Low: Output Compare active low. +* Return : None +*******************************************************************************/ +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + + tmpccer = TIMx->CCER; + tmpccer &= (uint16_t)~((uint16_t)TIM_CC4P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 12); + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TIM_CCxCmd +* Description : Enables or disables the TIM Capture Compare Channel x. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_Channel: specifies the TIM Channel. +* TIM_Channel_1: TIM Channel 1. +* TIM_Channel_2: TIM Channel 2. +* TIM_Channel_3: TIM Channel 3. +* TIM_Channel_4: TIM Channel 4. +* TIM_CCx: specifies the TIM Channel CCxE bit new state. +* TIM_CCx_Enable. +* TIM_CCx_Disable. +* Return : None +*******************************************************************************/ +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) +{ + uint16_t tmp = 0; + + tmp = CCER_CCE_Set << TIM_Channel; + TIMx->CCER &= (uint16_t)~ tmp; + TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel); +} + +/******************************************************************************* +* Function Name : TIM_CCxNCmd +* Description : Enables or disables the TIM Capture Compare Channel xN. +* Input : TIMx: where x can be 1 select the TIM peripheral. +* TIM_Channel: specifies the TIM Channel. +* TIM_Channel_1: TIM Channel 1. +* TIM_Channel_2: TIM Channel 2. +* TIM_Channel_3: TIM Channel 3. +* TIM_CCxN: specifies the TIM Channel CCxNE bit new state. +* TIM_CCxN_Enable. +* TIM_CCxN_Disable. +* Return : None +*******************************************************************************/ +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) +{ + uint16_t tmp = 0; + + tmp = CCER_CCNE_Set << TIM_Channel; + TIMx->CCER &= (uint16_t) ~tmp; + TIMx->CCER |= (uint16_t)(TIM_CCxN << TIM_Channel); +} + +/******************************************************************************* +* Function Name : TIM_SelectOCxM +* Description : Selects the TIM Output Compare Mode. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_Channel: specifies the TIM Channel. +* TIM_Channel_1: TIM Channel 1. +* TIM_Channel_2: TIM Channel 2. +* TIM_Channel_3: TIM Channel 3. +* TIM_Channel_4: TIM Channel 4. +* TIM_OCMode: specifies the TIM Output Compare Mode. +* TIM_OCMode_Timing. +* TIM_OCMode_Active. +* TIM_OCMode_Toggle. +* TIM_OCMode_PWM1. +* TIM_OCMode_PWM2. +* TIM_ForcedAction_Active. +* TIM_ForcedAction_InActive. +* Return : None +*******************************************************************************/ +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) +{ + uint32_t tmp = 0; + uint16_t tmp1 = 0; + + tmp = (uint32_t) TIMx; + tmp += CHCTLR_Offset; + tmp1 = CCER_CCE_Set << (uint16_t)TIM_Channel; + TIMx->CCER &= (uint16_t) ~tmp1; + + if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3)) + { + tmp += (TIM_Channel>>1); + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_OC1M); + *(__IO uint32_t *) tmp |= TIM_OCMode; + } + else + { + tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1; + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_OC2M); + *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8); + } +} + +/******************************************************************************* +* Function Name : TIM_UpdateDisableConfig +* Description : Enables or Disables the TIMx Update event. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR1 |= TIM_UDIS; + } + else + { + TIMx->CTLR1 &= (uint16_t)~((uint16_t)TIM_UDIS); + } +} + +/******************************************************************************* +* Function Name : TIM_UpdateRequestConfig +* Description : Configures the TIMx Update Request Interrupt source. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_UpdateSource: specifies the Update source. +* TIM_UpdateSource_Regular. +* TIM_UpdateSource_Global. +* Return : None +*******************************************************************************/ +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) +{ + if (TIM_UpdateSource != TIM_UpdateSource_Global) + { + TIMx->CTLR1 |= TIM_URS; + } + else + { + TIMx->CTLR1 &= (uint16_t)~((uint16_t)TIM_URS); + } +} + +/******************************************************************************* +* Function Name : TIM_SelectHallSensor +* Description : Enables or disables the TIMx's Hall sensor interface. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + TIMx->CTLR2 |= TIM_TI1S; + } + else + { + TIMx->CTLR2 &= (uint16_t)~((uint16_t)TIM_TI1S); + } +} + +/******************************************************************************* +* Function Name : TIM_SelectOnePulseMode +* Description : Selects the TIMx's One Pulse Mode. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_OPMode: specifies the OPM Mode to be used. +* TIM_OPMode_Single. +* TIM_OPMode_Repetitive. +* Return : None +*******************************************************************************/ +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) +{ + TIMx->CTLR1 &= (uint16_t)~((uint16_t)TIM_OPM); + TIMx->CTLR1 |= TIM_OPMode; +} + +/******************************************************************************* +* Function Name : TIM_SelectOutputTrigger +* Description : Selects the TIMx Trigger Output Mode. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_TRGOSource: specifies the Trigger Output source. +* TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is +* used as the trigger output (TRGO). +* TIM_TRGOSource_Enable: The Counter Enable CEN is used as the +* trigger output (TRGO). +* TIM_TRGOSource_Update: The update event is selected as the +* trigger output (TRGO). +* TIM_TRGOSource_OC1: The trigger output sends a positive pulse +* when the CC1IF flag is to be set, as soon as a capture or compare match occurs (TRGO). +* TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). +* TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). +* TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). +* TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). +* Return : None +*******************************************************************************/ +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) +{ + TIMx->CTLR2 &= (uint16_t)~((uint16_t)TIM_MMS); + TIMx->CTLR2 |= TIM_TRGOSource; +} + +/******************************************************************************* +* Function Name : TIM_SelectSlaveMode +* Description : Selects the TIMx Slave Mode. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_SlaveMode: specifies the Timer Slave Mode. +* TIM_SlaveMode_Reset: Rising edge of the selected trigger +* signal (TRGI) re-initializes. +* TIM_SlaveMode_Gated: The counter clock is enabled when the +* trigger signal (TRGI) is high. +* TIM_SlaveMode_Trigger: The counter starts at a rising edge +* of the trigger TRGI. +* TIM_SlaveMode_External1: Rising edges of the selected trigger +* (TRGI) clock the counter. +* Return : None +*******************************************************************************/ +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) +{ + TIMx->SMCFGR &= (uint16_t)~((uint16_t)TIM_SMS); + TIMx->SMCFGR |= TIM_SlaveMode; +} + +/******************************************************************************* +* Function Name : TIM_SelectMasterSlaveMode +* Description : Sets or Resets the TIMx Master/Slave Mode. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. +* TIM_MasterSlaveMode_Enable: synchronization between the current +* timer and its slaves (through TRGO). +* TIM_MasterSlaveMode_Disable: No action. +* Return : None +*******************************************************************************/ +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) +{ + TIMx->SMCFGR &= (uint16_t)~((uint16_t)TIM_MSM); + TIMx->SMCFGR |= TIM_MasterSlaveMode; +} + +/******************************************************************************* +* Function Name : TIM_SetCounter +* Description : Sets the TIMx Counter Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Counter: specifies the Counter register new value. +* Return : None +*******************************************************************************/ +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter) +{ + TIMx->CNT = Counter; +} + +/******************************************************************************* +* Function Name : TIM_SetAutoreload +* Description : Sets the TIMx Autoreload Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Autoreload: specifies the Autoreload register new value. +* Return : None +*******************************************************************************/ +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload) +{ + TIMx->ATRLR = Autoreload; +} + +/******************************************************************************* +* Function Name : TIM_SetCompare1 +* Description : Sets the TIMx Capture Compare1 Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Compare1: specifies the Capture Compare1 register new value. +* Return : None +*******************************************************************************/ +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1) +{ + TIMx->CH1CVR = Compare1; +} + +/******************************************************************************* +* Function Name : TIM_SetCompare2 +* Description : Sets the TIMx Capture Compare2 Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Compare2: specifies the Capture Compare2 register new value. +* Return : None +*******************************************************************************/ +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2) +{ + TIMx->CH2CVR = Compare2; +} + +/******************************************************************************* +* Function Name : TIM_SetCompare3 +* Description : Sets the TIMx Capture Compare3 Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Compare3: specifies the Capture Compare3 register new value. +* Return : None +*******************************************************************************/ +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3) +{ + TIMx->CH3CVR = Compare3; +} + +/******************************************************************************* +* Function Name : TIM_SetCompare4 +* Description : Sets the TIMx Capture Compare4 Register value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Compare4: specifies the Capture Compare4 register new value. +* Return : None +*******************************************************************************/ +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4) +{ + TIMx->CH4CVR = Compare4; +} + +/******************************************************************************* +* Function Name : TIM_SetIC1Prescaler +* Description : Sets the TIMx Input Capture 1 prescaler. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_ICPSC: specifies the Input Capture1 prescaler new value. +* TIM_ICPSC_DIV1: no prescaler. +* TIM_ICPSC_DIV2: capture is done once every 2 events. +* TIM_ICPSC_DIV4: capture is done once every 4 events. +* TIM_ICPSC_DIV8: capture is done once every 8 events. +* Return : None +*******************************************************************************/ +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + TIMx->CHCTLR1 &= (uint16_t)~((uint16_t)TIM_IC1PSC); + TIMx->CHCTLR1 |= TIM_ICPSC; +} + +/******************************************************************************* +* Function Name : TIM_SetIC2Prescaler +* Description : Sets the TIMx Input Capture 2 prescaler. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_ICPSC: specifies the Input Capture1 prescaler new value. +* TIM_ICPSC_DIV1: no prescaler. +* TIM_ICPSC_DIV2: capture is done once every 2 events. +* TIM_ICPSC_DIV4: capture is done once every 4 events. +* TIM_ICPSC_DIV8: capture is done once every 8 events. +* Return : None +*******************************************************************************/ +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + TIMx->CHCTLR1 &= (uint16_t)~((uint16_t)TIM_IC2PSC); + TIMx->CHCTLR1 |= (uint16_t)(TIM_ICPSC << 8); +} + +/******************************************************************************* +* Function Name : TIM_SetIC3Prescaler +* Description : Sets the TIMx Input Capture 3 prescaler. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_ICPSC: specifies the Input Capture1 prescaler new value. +* TIM_ICPSC_DIV1: no prescaler. +* TIM_ICPSC_DIV2: capture is done once every 2 events. +* TIM_ICPSC_DIV4: capture is done once every 4 events. +* TIM_ICPSC_DIV8: capture is done once every 8 events. +* Return : None +*******************************************************************************/ +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + TIMx->CHCTLR2 &= (uint16_t)~((uint16_t)TIM_IC3PSC); + TIMx->CHCTLR2 |= TIM_ICPSC; +} + +/******************************************************************************* +* Function Name : TIM_SetIC4Prescaler +* Description : Sets the TIMx Input Capture 4 prescaler. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_ICPSC: specifies the Input Capture1 prescaler new value. +* TIM_ICPSC_DIV1: no prescaler. +* TIM_ICPSC_DIV2: capture is done once every 2 events. +* TIM_ICPSC_DIV4: capture is done once every 4 events. +* TIM_ICPSC_DIV8: capture is done once every 8 events. +* Return : None +*******************************************************************************/ +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + TIMx->CHCTLR2 &= (uint16_t)~((uint16_t)TIM_IC4PSC); + TIMx->CHCTLR2 |= (uint16_t)(TIM_ICPSC << 8); +} + +/******************************************************************************* +* Function Name : TIM_SetClockDivision +* Description : Sets the TIMx Clock Division value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_CKD: specifies the clock division value. +* TIM_CKD_DIV1: TDTS = Tck_tim. +* TIM_CKD_DIV2: TDTS = 2*Tck_tim. +* TIM_CKD_DIV4: TDTS = 4*Tck_tim. +* Return : None +*******************************************************************************/ +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) +{ + TIMx->CTLR1 &= (uint16_t)~((uint16_t)TIM_CTLR1_CKD); + TIMx->CTLR1 |= TIM_CKD; +} + +/******************************************************************************* +* Function Name : TIM_GetCapture1 +* Description : Gets the TIMx Input Capture 1 value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->CH1CVR: Capture Compare 1 Register value. +*******************************************************************************/ +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx) +{ + return TIMx->CH1CVR; +} + +/******************************************************************************* +* Function Name : TIM_GetCapture2 +* Description : Gets the TIMx Input Capture 1 value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->CH2CVR: Capture Compare 2 Register value. +*******************************************************************************/ +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx) +{ + return TIMx->CH2CVR; +} + +/******************************************************************************* +* Function Name : TIM_GetCapture3 +* Description : Gets the TIMx Input Capture 1 value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->CH3CVR: Capture Compare 3 Register value. +*******************************************************************************/ +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx) +{ + return TIMx->CH3CVR; +} + +/******************************************************************************* +* Function Name : TIM_GetCapture4 +* Description : Gets the TIMx Input Capture 1 value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->CH4CVR: Capture Compare 4 Register value. +*******************************************************************************/ +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx) +{ + return TIMx->CH4CVR; +} + +/******************************************************************************* +* Function Name : TIM_GetCounter +* Description : Gets the TIMx Counter value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->CNT: Counter Register value. +*******************************************************************************/ +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx) +{ + return TIMx->CNT; +} + +/******************************************************************************* +* Function Name : TIM_GetPrescaler +* Description : Gets the TIMx Prescaler value. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* Return : TIMx->PSC: Prescaler Register value. +*******************************************************************************/ +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) +{ + return TIMx->PSC; +} + +/******************************************************************************* +* Function Name : TIM_GetFlagStatus +* Description : Checks whether the specified TIM flag is set or not. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_FLAG: specifies the flag to check. +* TIM_FLAG_Update: TIM update Flag. +* TIM_FLAG_CC1: TIM Capture Compare 1 Flag. +* TIM_FLAG_CC2: TIM Capture Compare 2 Flag. +* TIM_FLAG_CC3: TIM Capture Compare 3 Flag. +* TIM_FLAG_CC4: TIM Capture Compare 4 Flag. +* TIM_FLAG_COM: TIM Commutation Flag. +* TIM_FLAG_Trigger: TIM Trigger Flag. +* TIM_FLAG_Break: TIM Break Flag. +* TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag. +* TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag. +* TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag. +* TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag. +* Return : bitstatus: SET or RESET. +*******************************************************************************/ +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + ITStatus bitstatus = RESET; + + if ((TIMx->INTFR & TIM_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : TIM_ClearFlag +* Description : Clears the TIMx's pending flags. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_FLAG: specifies the flag bit to clear. +* TIM_FLAG_Update: TIM update Flag. +* TIM_FLAG_CC1: TIM Capture Compare 1 Flag. +* TIM_FLAG_CC2: TIM Capture Compare 2 Flag. +* TIM_FLAG_CC3: TIM Capture Compare 3 Flag. +* TIM_FLAG_CC4: TIM Capture Compare 4 Flag. +* TIM_FLAG_COM: TIM Commutation Flag. +* TIM_FLAG_Trigger: TIM Trigger Flag. +* TIM_FLAG_Break: TIM Break Flag. +* TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag. +* TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag. +* TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag. +* TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag. +* Return : None +*******************************************************************************/ +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + TIMx->INTFR = (uint16_t)~TIM_FLAG; +} + +/******************************************************************************* +* Function Name : TIM_GetITStatus +* Description : Checks whether the TIM interrupt has occurred or not. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_IT: specifies the TIM interrupt source to check. +* TIM_IT_Update: TIM update Interrupt source. +* TIM_IT_CC1: TIM Capture Compare 1 Interrupt source. +* TIM_IT_CC2: TIM Capture Compare 2 Interrupt source. +* TIM_IT_CC3: TIM Capture Compare 3 Interrupt source. +* TIM_IT_CC4: TIM Capture Compare 4 Interrupt source. +* TIM_IT_COM: TIM Commutation Interrupt source. +* TIM_IT_Trigger: TIM Trigger Interrupt source. +* TIM_IT_Break: TIM Break Interrupt source. +* Return : bitstatus: SET or RESET. +*******************************************************************************/ +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itstatus = 0x0, itenable = 0x0; + + itstatus = TIMx->INTFR & TIM_IT; + + itenable = TIMx->DMAINTENR & TIM_IT; + if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : TIM_ClearITPendingBit +* Description : Clears the TIMx's interrupt pending bits. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* TIM_IT: specifies the pending bit to clear. +* TIM_IT_Update: TIM update Interrupt source. +* TIM_IT_CC1: TIM Capture Compare 1 Interrupt source. +* TIM_IT_CC2: TIM Capture Compare 2 Interrupt source. +* TIM_IT_CC3: TIM Capture Compare 3 Interrupt source. +* TIM_IT_CC4: TIM Capture Compare 4 Interrupt source. +* TIM_IT_COM: TIM Commutation Interrupt source. +* TIM_IT_Trigger: TIM Trigger Interrupt source. +* TIM_IT_Break: TIM Break Interrupt source. +* Return : None +*******************************************************************************/ +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + TIMx->INTFR = (uint16_t)~TIM_IT; +} + +/******************************************************************************* +* Function Name : TI1_Config +* Description : Configure the TI1 as Input. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* IM_ICPolarity : The Input Polarity. +* TIM_ICPolarity_Rising. +* TIM_ICPolarity_Falling. +* TIM_ICSelection: specifies the input to be used. +* TIM_ICSelection_DirectTI: TIM Input 1 is selected to be +* connected to IC1. +* TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be +* connected to IC2. +* TIM_ICSelection_TRC: TIM Input 1 is selected to be connected +* to TRC. +* TIM_ICFilter: Specifies the Input Capture Filter. +* This parameter must be a value between 0x00 and 0x0F. +* Return : None +*******************************************************************************/ +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0; + + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CC1E); + tmpccmr1 = TIMx->CHCTLR1; + tmpccer = TIMx->CCER; + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CC1S)) & ((uint16_t)~((uint16_t)TIM_IC1F))); + tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM2) || (TIMx == TIM3) || (TIMx == TIM4) ) + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC1P)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CC1E); + } + else + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC1P | TIM_CC1NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CC1E); + } + + TIMx->CHCTLR1 = tmpccmr1; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TI2_Config +* Description : Configure the TI2 as Input. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* IM_ICPolarity : The Input Polarity. +* TIM_ICPolarity_Rising. +* TIM_ICPolarity_Falling. +* TIM_ICSelection: specifies the input to be used. +* TIM_ICSelection_DirectTI: TIM Input 2 is selected to be +* connected to IC2. +* TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be +* connected to IC1. +* TIM_ICSelection_TRC: TIM Input 2 is selected to be connected +* to TRC. +* TIM_ICFilter: Specifies the Input Capture Filter. +* This parameter must be a value between 0x00 and 0x0F. +* Return : None +*******************************************************************************/ +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; + + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CC2E); + tmpccmr1 = TIMx->CHCTLR1; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 4); + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CC2S)) & ((uint16_t)~((uint16_t)TIM_IC2F))); + tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); + tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); + + if((TIMx == TIM1) || (TIMx == TIM2) || (TIMx == TIM3) || (TIMx == TIM4)) + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC2P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CC2E); + } + else + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC2P | TIM_CC2NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CC2E); + } + + TIMx->CHCTLR1 = tmpccmr1 ; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TI3_Config +* Description : Configure the TI3 as Input. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* IM_ICPolarity : The Input Polarity. +* TIM_ICPolarity_Rising. +* TIM_ICPolarity_Falling. +* TIM_ICSelection: specifies the input to be used. +* TIM_ICSelection_DirectTI: TIM Input 3 is selected to be +* connected to IC3. +* TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be +* connected to IC4. +* TIM_ICSelection_TRC: TIM Input 3 is selected to be connected +* to TRC. +* TIM_ICFilter: Specifies the Input Capture Filter. +* This parameter must be a value between 0x00 and 0x0F. +* Return : None +*******************************************************************************/ +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CC3E); + tmpccmr2 = TIMx->CHCTLR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 8); + tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CC3S)) & ((uint16_t)~((uint16_t)TIM_IC3F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM2) || (TIMx == TIM3) || (TIMx == TIM4)) + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC3P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CC3E); + } + else + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC3P | TIM_CC3NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CC3E); + } + + TIMx->CHCTLR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + +/******************************************************************************* +* Function Name : TI4_Config +* Description : Configure the TI4 as Input. +* Input : TIMx: where x can be 1 to 4 select the TIM peripheral. +* IM_ICPolarity : The Input Polarity. +* TIM_ICPolarity_Rising. +* TIM_ICPolarity_Falling. +* TIM_ICSelection: specifies the input to be used. +* TIM_ICSelection_DirectTI: TIM Input 4 is selected to be +* connected to IC4. +* TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be +* connected to IC3. +* TIM_ICSelection_TRC: TIM Input 4 is selected to be connected +* to TRC. +* TIM_ICFilter: Specifies the Input Capture Filter. +* This parameter must be a value between 0x00 and 0x0F. +* Return : None +*******************************************************************************/ +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CC4E); + tmpccmr2 = TIMx->CHCTLR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 12); + tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CC4S) & ((uint16_t)~((uint16_t)TIM_IC4F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8); + tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12); + + if((TIMx == TIM1) || (TIMx == TIM2) || (TIMx == TIM3) || (TIMx == TIM4) ) + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC4P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CC4E); + } + else + { + tmpccer &= (uint16_t)~((uint16_t)(TIM_CC3P | TIM_CC4NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CC4E); + } + + TIMx->CHCTLR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usart.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usart.c new file mode 100644 index 0000000000..365d6c3e7a --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usart.c @@ -0,0 +1,731 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usart.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the USART firmware functions. +*******************************************************************************/ +#include "ch32v10x_usart.h" +#include "ch32v10x_rcc.h" + +/* USART_Private_Defines */ +#define CTLR1_UE_Set ((uint16_t)0x2000) /* USART Enable Mask */ +#define CTLR1_UE_Reset ((uint16_t)0xDFFF) /* USART Disable Mask */ + +#define CTLR1_WAKE_Mask ((uint16_t)0xF7FF) /* USART WakeUp Method Mask */ + +#define CTLR1_RWU_Set ((uint16_t)0x0002) /* USART mute mode Enable Mask */ +#define CTLR1_RWU_Reset ((uint16_t)0xFFFD) /* USART mute mode Enable Mask */ +#define CTLR1_SBK_Set ((uint16_t)0x0001) /* USART Break Character send Mask */ +#define CTLR1_CLEAR_Mask ((uint16_t)0xE9F3) /* USART CR1 Mask */ +#define CTLR2_Address_Mask ((uint16_t)0xFFF0) /* USART address Mask */ + +#define CTLR2_LINEN_Set ((uint16_t)0x4000) /* USART LIN Enable Mask */ +#define CTLR2_LINEN_Reset ((uint16_t)0xBFFF) /* USART LIN Disable Mask */ + +#define CTLR2_LBDL_Mask ((uint16_t)0xFFDF) /* USART LIN Break detection Mask */ +#define CTLR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /* USART CR2 STOP Bits Mask */ +#define CTLR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /* USART CR2 Clock Mask */ + +#define CTLR3_SCEN_Set ((uint16_t)0x0020) /* USART SC Enable Mask */ +#define CTLR3_SCEN_Reset ((uint16_t)0xFFDF) /* USART SC Disable Mask */ + +#define CTLR3_NACK_Set ((uint16_t)0x0010) /* USART SC NACK Enable Mask */ +#define CTLR3_NACK_Reset ((uint16_t)0xFFEF) /* USART SC NACK Disable Mask */ + +#define CTLR3_HDSEL_Set ((uint16_t)0x0008) /* USART Half-Duplex Enable Mask */ +#define CTLR3_HDSEL_Reset ((uint16_t)0xFFF7) /* USART Half-Duplex Disable Mask */ + +#define CTLR3_IRLP_Mask ((uint16_t)0xFFFB) /* USART IrDA LowPower mode Mask */ +#define CTLR3_CLEAR_Mask ((uint16_t)0xFCFF) /* USART CR3 Mask */ + +#define CTLR3_IREN_Set ((uint16_t)0x0002) /* USART IrDA Enable Mask */ +#define CTLR3_IREN_Reset ((uint16_t)0xFFFD) /* USART IrDA Disable Mask */ +#define GPR_LSB_Mask ((uint16_t)0x00FF) /* Guard Time Register LSB Mask */ +#define GPR_MSB_Mask ((uint16_t)0xFF00) /* Guard Time Register MSB Mask */ +#define IT_Mask ((uint16_t)0x001F) /* USART Interrupt Mask */ + +/* USART OverSampling-8 Mask */ +#define CTLR1_OVER8_Set ((uint16_t)0x8000) /* USART OVER8 mode Enable Mask */ +#define CTLR1_OVER8_Reset ((uint16_t)0x7FFF) /* USART OVER8 mode Disable Mask */ + +/* USART One Bit Sampling Mask */ +#define CTLR3_ONEBITE_Set ((uint16_t)0x0800) /* USART ONEBITE mode Enable Mask */ +#define CTLR3_ONEBITE_Reset ((uint16_t)0xF7FF) /* USART ONEBITE mode Disable Mask */ + +/******************************************************************************* +* Function Name : USART_DeInit +* Description : Deinitializes the USARTx peripheral registers to their default +* reset values. +* Input : USARTx: where x can be 1, 2 or 3 to select the UART peripheral. +* Return : None +*******************************************************************************/ +void USART_DeInit(USART_TypeDef* USARTx) +{ + if (USARTx == USART1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE); + } + else if (USARTx == USART2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); + } + else if (USARTx == USART3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); + } + else if (USARTx == UART4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); + } + else + { + if (USARTx == UART5) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); + } + } +} + +/******************************************************************************* +* Function Name : USART_Init +* Description : Initializes the USARTx peripheral according to the specified +* parameters in the USART_InitStruct. +* Input : USARTx: where x can be 1, 2 or 3 to select the UART peripheral. +* USART_InitStruct: pointer to a USART_InitTypeDef structure +* that contains the configuration information for the specified USART peripheral. +* Return : None +*******************************************************************************/ +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) +{ + uint32_t tmpreg = 0x00, apbclock = 0x00; + uint32_t integerdivider = 0x00; + uint32_t fractionaldivider = 0x00; + uint32_t usartxbase = 0; + RCC_ClocksTypeDef RCC_ClocksStatus; + + if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None) + { + } + + usartxbase = (uint32_t)USARTx; + tmpreg = USARTx->CTLR2; + tmpreg &= CTLR2_STOP_CLEAR_Mask; + tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; + + USARTx->CTLR2 = (uint16_t)tmpreg; + tmpreg = USARTx->CTLR1; + tmpreg &= CTLR1_CLEAR_Mask; + tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | + USART_InitStruct->USART_Mode; + USARTx->CTLR1 = (uint16_t)tmpreg; + + tmpreg = USARTx->CTLR3; + tmpreg &= CTLR3_CLEAR_Mask; + tmpreg |= USART_InitStruct->USART_HardwareFlowControl; + USARTx->CTLR3 = (uint16_t)tmpreg; + + RCC_GetClocksFreq(&RCC_ClocksStatus); + + if (usartxbase == USART1_BASE) + { + apbclock = RCC_ClocksStatus.PCLK2_Frequency; + } + else + { + apbclock = RCC_ClocksStatus.PCLK1_Frequency; + } + + if ((USARTx->CTLR1 & CTLR1_OVER8_Set) != 0) + { + integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); + } + else + { + integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); + } + tmpreg = (integerdivider / 100) << 4; + + fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); + + if ((USARTx->CTLR1 & CTLR1_OVER8_Set) != 0) + { + tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); + } + else + { + tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); + } + + USARTx->BRR = (uint16_t)tmpreg; +} + +/******************************************************************************* +* Function Name : USART_StructInit +* Description : Fills each USART_InitStruct member with its default value. +* Input : USART_InitStruct: pointer to a USART_InitTypeDef structure +* which will be initialized. +* Return : None +*******************************************************************************/ +void USART_StructInit(USART_InitTypeDef* USART_InitStruct) +{ + USART_InitStruct->USART_BaudRate = 9600; + USART_InitStruct->USART_WordLength = USART_WordLength_8b; + USART_InitStruct->USART_StopBits = USART_StopBits_1; + USART_InitStruct->USART_Parity = USART_Parity_No ; + USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None; +} + +/******************************************************************************* +* Function Name : USART_ClockInit +* Description : Initializes the USARTx peripheral Clock according to the +* specified parameters in the USART_ClockInitStruct . +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef +* structure that contains the configuration information for the specified +* USART peripheral. +* Return : None +*******************************************************************************/ +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + uint32_t tmpreg = 0x00; + + tmpreg = USARTx->CTLR2; + tmpreg &= CTLR2_CLOCK_CLEAR_Mask; + tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | + USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit; + USARTx->CTLR2 = (uint16_t)tmpreg; +} + +/******************************************************************************* +* Function Name : USART_ClockStructInit +* Description : Fills each USART_InitStruct member with its default value. +* Input : USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef +* structure which will be initialized. +* Return : None +*******************************************************************************/ +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + USART_ClockInitStruct->USART_Clock = USART_Clock_Disable; + USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low; + USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge; + USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable; +} + +/******************************************************************************* +* Function Name : USART_Cmd +* Description : Enables or disables the specified USART peripheral. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR1 |= CTLR1_UE_Set; + } + else + { + USARTx->CTLR1 &= CTLR1_UE_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_ITConfig +* Description : Enables or disables the specified USART interrupts. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_IT: specifies the USART interrupt sources to be enabled or disabled. +* USART_IT_CTS: CTS change interrupt. +* USART_IT_LBD: LIN Break detection interrupt. +* USART_IT_TXE: Transmit Data Register empty interrupt. +* USART_IT_TC: Transmission complete interrupt. +* USART_IT_RXNE: Receive Data register not empty interrupt. +* USART_IT_IDLE: Idle line detection interrupt. +* USART_IT_PE: Parity Error interrupt. +* USART_IT_ERR: Error interrupt. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState) +{ + uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00; + uint32_t usartxbase = 0x00; + + if (USART_IT == USART_IT_CTS) + { + } + + usartxbase = (uint32_t)USARTx; + usartreg = (((uint8_t)USART_IT) >> 0x05); + itpos = USART_IT & IT_Mask; + itmask = (((uint32_t)0x01) << itpos); + + if (usartreg == 0x01) + { + usartxbase += 0x0C; + } + else if (usartreg == 0x02) + { + usartxbase += 0x10; + } + else + { + usartxbase += 0x14; + } + + if (NewState != DISABLE) + { + *(__IO uint32_t*)usartxbase |= itmask; + } + else + { + *(__IO uint32_t*)usartxbase &= ~itmask; + } +} + +/******************************************************************************* +* Function Name : USART_DMACmd +* Description : Enables or disables the USART DMA interface. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_DMAReq: specifies the DMA request. +* USART_DMAReq_Tx: USART DMA transmit request. +* USART_DMAReq_Rx: USART DMA receive request. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= USART_DMAReq; + } + else + { + USARTx->CTLR3 &= (uint16_t)~USART_DMAReq; + } +} + +/******************************************************************************* +* Function Name : USART_SetAddress +* Description : Sets the address of the USART node. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_Address: Indicates the address of the USART node. +* Return : None +*******************************************************************************/ +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) +{ + USARTx->CTLR2 &= CTLR2_Address_Mask; + USARTx->CTLR2 |= USART_Address; +} + +/******************************************************************************* +* Function Name : USART_WakeUpConfig +* Description : Selects the USART WakeUp method. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_WakeUp: specifies the USART wakeup method. +* USART_WakeUp_IdleLine: WakeUp by an idle line detection. +* USART_WakeUp_AddressMark: WakeUp by an address mark. +* Return : None +*******************************************************************************/ +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp) +{ + USARTx->CTLR1 &= CTLR1_WAKE_Mask; + USARTx->CTLR1 |= USART_WakeUp; +} + +/******************************************************************************* +* Function Name : USART_ReceiverWakeUpCmd +* Description : Determines if the USART is in mute mode or not. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR1 |= CTLR1_RWU_Set; + } + else + { + USARTx->CTLR1 &= CTLR1_RWU_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_LINBreakDetectLengthConfig +* Description : Sets the USART LIN Break detection length. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_LINBreakDetectLength: specifies the LIN break detection length. +* USART_LINBreakDetectLength_10b: 10-bit break detection. +* USART_LINBreakDetectLength_11b: 11-bit break detection. +* Return : None +*******************************************************************************/ +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength) +{ + USARTx->CTLR2 &= CTLR2_LBDL_Mask; + USARTx->CTLR2 |= USART_LINBreakDetectLength; +} + +/******************************************************************************* +* Function Name : USART_LINCmd +* Description : Enables or disables the USART LIN mode. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR2 |= CTLR2_LINEN_Set; + } + else + { + USARTx->CTLR2 &= CTLR2_LINEN_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_SendData +* Description : Transmits single data through the USARTx peripheral. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* Data: the data to transmit.. +* Return : None +*******************************************************************************/ +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data) +{ + USARTx->DATAR = (Data & (uint16_t)0x01FF); +} + +/******************************************************************************* +* Function Name : USART_ReceiveData +* Description : Returns the most recent received data by the USARTx peripheral. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* Return : The received data. +*******************************************************************************/ +uint16_t USART_ReceiveData(USART_TypeDef* USARTx) +{ + return (uint16_t)(USARTx->DATAR & (uint16_t)0x01FF); +} + +/******************************************************************************* +* Function Name : USART_SendBreak +* Description : Transmits break characters. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* Return : None +*******************************************************************************/ +void USART_SendBreak(USART_TypeDef* USARTx) +{ + USARTx->CTLR1 |= CTLR1_SBK_Set; +} + +/******************************************************************************* +* Function Name : USART_SetGuardTime +* Description : Sets the specified USART guard time. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_GuardTime: specifies the guard time. +* Return : None +*******************************************************************************/ +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) +{ + USARTx->GPR &= GPR_LSB_Mask; + USARTx->GPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08); +} + +/******************************************************************************* +* Function Name : USART_SetPrescaler +* Description : Sets the system clock prescaler. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_Prescaler: specifies the prescaler clock. +* Return : None +*******************************************************************************/ +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) +{ + USARTx->GPR &= GPR_MSB_Mask; + USARTx->GPR |= USART_Prescaler; +} + +/******************************************************************************* +* Function Name : USART_SmartCardCmd +* Description : Enables or disables the USART Smart Card mode. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= CTLR3_SCEN_Set; + } + else + { + USARTx->CTLR3 &= CTLR3_SCEN_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_SmartCardNACKCmd +* Description : Enables or disables NACK transmission. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= CTLR3_NACK_Set; + } + else + { + USARTx->CTLR3 &= CTLR3_NACK_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_HalfDuplexCmd +* Description : Enables or disables the USART Half Duplex communication. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= CTLR3_HDSEL_Set; + } + else + { + USARTx->CTLR3 &= CTLR3_HDSEL_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_OverSampling8Cmd +* Description : Enables or disables the USART's 8x oversampling mode. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR1 |= CTLR1_OVER8_Set; + } + else + { + USARTx->CTLR1 &= CTLR1_OVER8_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_OneBitMethodCmd +* Description : Enables or disables the USART's one bit sampling method. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= CTLR3_ONEBITE_Set; + } + else + { + USARTx->CTLR3 &= CTLR3_ONEBITE_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_IrDAConfig +* Description : Configures the USART's IrDA interface. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_IrDAMode: specifies the IrDA mode. +* USART_IrDAMode_LowPower. +* USART_IrDAMode_Normal. +* Return : None +*******************************************************************************/ +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode) +{ + USARTx->CTLR3 &= CTLR3_IRLP_Mask; + USARTx->CTLR3 |= USART_IrDAMode; +} + +/******************************************************************************* +* Function Name : USART_IrDACmd +* Description : Enables or disables the USART's IrDA interface. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* NewState: ENABLE or DISABLE. +* Return : None +*******************************************************************************/ +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + if (NewState != DISABLE) + { + USARTx->CTLR3 |= CTLR3_IREN_Set; + } + else + { + USARTx->CTLR3 &= CTLR3_IREN_Reset; + } +} + +/******************************************************************************* +* Function Name : USART_GetFlagStatus +* Description : Checks whether the specified USART flag is set or not. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_FLAG: specifies the flag to check. +* USART_FLAG_CTS: CTS Change flag. +* USART_FLAG_LBD: LIN Break detection flag. +* USART_FLAG_TXE: Transmit data register empty flag. +* USART_FLAG_TC: Transmission Complete flag. +* USART_FLAG_RXNE: Receive data register not empty flag. +* USART_FLAG_IDLE: Idle Line detection flag. +* USART_FLAG_ORE: OverRun Error flag. +* USART_FLAG_NE: Noise Error flag. +* USART_FLAG_FE: Framing Error flag. +* USART_FLAG_PE: Parity Error flag. +* Return : bitstatus: SET or RESET. +*******************************************************************************/ +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + FlagStatus bitstatus = RESET; + + if (USART_FLAG == USART_FLAG_CTS) + { + } + + if ((USARTx->STATR & USART_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/******************************************************************************* +* Function Name : USART_ClearFlag +* Description : Clears the USARTx's pending flags. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_FLAG: specifies the flag to clear. +* USART_FLAG_CTS: CTS Change flag. +* USART_FLAG_LBD: LIN Break detection flag. +* USART_FLAG_TC: Transmission Complete flag. +* USART_FLAG_RXNE: Receive data register not empty flag. +* Return : None +*******************************************************************************/ +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS) + { + } + + USARTx->STATR = (uint16_t)~USART_FLAG; +} + +/******************************************************************************* +* Function Name : USART_GetITStatus +* Description : Checks whether the specified USART interrupt has occurred or not. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_IT: specifies the USART interrupt source to check. +* USART_IT_CTS: CTS change interrupt. +* USART_IT_LBD: LIN Break detection interrupt. +* USART_IT_TXE: Tansmit Data Register empty interrupt. +* USART_IT_TC: Transmission complete interrupt. +* USART_IT_RXNE: Receive Data register not empty interrupt. +* USART_IT_IDLE: Idle line detection interrupt. +* USART_IT_ORE_RX : OverRun Error interrupt if the RXNEIE bit is set. +* USART_IT_ORE_ER : OverRun Error interrupt if the EIE bit is set. +* USART_IT_NE: Noise Error interrupt. +* USART_IT_FE: Framing Error interrupt. +* USART_IT_PE: Parity Error interrupt. +* Return : bitstatus: SET or RESET. +*******************************************************************************/ +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00; + ITStatus bitstatus = RESET; + + if (USART_IT == USART_IT_CTS) + { + } + + usartreg = (((uint8_t)USART_IT) >> 0x05); + itmask = USART_IT & IT_Mask; + itmask = (uint32_t)0x01 << itmask; + + if (usartreg == 0x01) + { + itmask &= USARTx->CTLR1; + } + else if (usartreg == 0x02) + { + itmask &= USARTx->CTLR2; + } + else + { + itmask &= USARTx->CTLR3; + } + + bitpos = USART_IT >> 0x08; + bitpos = (uint32_t)0x01 << bitpos; + bitpos &= USARTx->STATR; + + if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/******************************************************************************* +* Function Name : USART_ClearITPendingBit +* Description : Clears the USARTx's interrupt pending bits. +* Input : USARTx: where x can be 1, 2, 3 to select the USART peripheral. +* USART_IT: specifies the interrupt pending bit to clear. +* USART_IT_CTS: CTS change interrupt. +* USART_IT_LBD: LIN Break detection interrupt. +* USART_IT_TC: Transmission complete interrupt. +* USART_IT_RXNE: Receive Data register not empty interrupt. +* Return : None +*******************************************************************************/ +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint16_t bitpos = 0x00, itmask = 0x00; + + if (USART_IT == USART_IT_CTS) + { + } + + bitpos = USART_IT >> 0x08; + itmask = ((uint16_t)0x01 << (uint16_t)bitpos); + USARTx->STATR = (uint16_t)~itmask; +} + + + + + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb.c new file mode 100644 index 0000000000..39b0ca5d04 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb.c @@ -0,0 +1,149 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usb.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the USB firmware functions. +*******************************************************************************/ +#include "ch32v10x_usb.h" +#include "ch32v10x_rcc.h" + +/******************************** USB DEVICE **********************************/ + +/* Endpoint address */ +PUINT8 pEP0_RAM_Addr; +PUINT8 pEP1_RAM_Addr; +PUINT8 pEP2_RAM_Addr; +PUINT8 pEP3_RAM_Addr; +PUINT8 pEP4_RAM_Addr; +PUINT8 pEP5_RAM_Addr; +PUINT8 pEP6_RAM_Addr; +PUINT8 pEP7_RAM_Addr; + +/******************************************************************************* +* Function Name : USB_DeviceInit +* Description : Initializes USB device. +* Input : None +* Return : None +*******************************************************************************/ +void USB_DeviceInit( void ) +{ + R8_USB_CTRL = 0x00; + + R8_UEP4_1_MOD = RB_UEP4_RX_EN|RB_UEP4_TX_EN|RB_UEP1_RX_EN|RB_UEP1_TX_EN; + R8_UEP2_3_MOD = RB_UEP2_RX_EN|RB_UEP2_TX_EN|RB_UEP3_RX_EN|RB_UEP3_TX_EN; + R8_UEP5_6_MOD = RB_UEP5_RX_EN|RB_UEP5_TX_EN|RB_UEP6_RX_EN|RB_UEP6_TX_EN; + R8_UEP7_MOD = RB_UEP7_RX_EN|RB_UEP7_TX_EN; + + R16_UEP0_DMA = (UINT16)(UINT32)pEP0_RAM_Addr; + R16_UEP1_DMA = (UINT16)(UINT32)pEP1_RAM_Addr; + R16_UEP2_DMA = (UINT16)(UINT32)pEP2_RAM_Addr; + R16_UEP3_DMA = (UINT16)(UINT32)pEP3_RAM_Addr; + R16_UEP4_DMA = (UINT16)(UINT32)pEP4_RAM_Addr; + R16_UEP5_DMA = (UINT16)(UINT32)pEP5_RAM_Addr; + R16_UEP6_DMA = (UINT16)(UINT32)pEP6_RAM_Addr; + R16_UEP7_DMA = (UINT16)(UINT32)pEP7_RAM_Addr; + + R8_UEP0_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP1_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP2_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP3_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP4_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP5_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP6_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + R8_UEP7_CTRL = UEP_R_RES_ACK | UEP_T_RES_NAK; + + R8_USB_INT_FG = 0xFF; + R8_USB_INT_EN = RB_UIE_SUSPEND | RB_UIE_BUS_RST | RB_UIE_TRANSFER; + + R8_USB_DEV_AD = 0x00; + R8_USB_CTRL = RB_UC_DEV_PU_EN | RB_UC_INT_BUSY | RB_UC_DMA_EN; + R8_UDEV_CTRL = RB_UD_PD_DIS|RB_UD_PORT_EN; +} + +/******************************************************************************* +* Function Name : DevEP1_IN_Deal +* Description : Device endpoint1 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP1_IN_Deal( UINT8 l ) +{ + R8_UEP1_T_LEN = l; + R8_UEP1_CTRL = (R8_UEP1_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP2_IN_Deal +* Description : Device endpoint2 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP2_IN_Deal( UINT8 l ) +{ + R8_UEP2_T_LEN = l; + R8_UEP2_CTRL = (R8_UEP2_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP3_IN_Deal +* Description : Device endpoint3 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP3_IN_Deal( UINT8 l ) +{ + R8_UEP3_T_LEN = l; + R8_UEP3_CTRL = (R8_UEP3_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP4_IN_Deal +* Description : Device endpoint4 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP4_IN_Deal( UINT8 l ) +{ + R8_UEP4_T_LEN = l; + R8_UEP4_CTRL = (R8_UEP4_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP5_IN_Deal +* Description : Device endpoint5 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP5_IN_Deal( UINT8 l ) +{ + R8_UEP5_T_LEN = l; + R8_UEP5_CTRL = (R8_UEP5_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP6_IN_Deal +* Description : Device endpoint6 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP6_IN_Deal( UINT8 l ) +{ + R8_UEP6_T_LEN = l; + R8_UEP6_CTRL = (R8_UEP6_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + +/******************************************************************************* +* Function Name : DevEP7_IN_Deal +* Description : Device endpoint7 IN. +* Input : l: IN length(<64B) +* Return : None +*******************************************************************************/ +void DevEP7_IN_Deal( UINT8 l ) +{ + R8_UEP7_T_LEN = l; + R8_UEP7_CTRL = (R8_UEP7_CTRL & ~MASK_UEP_T_RES)| UEP_T_RES_ACK; +} + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb_host.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb_host.c new file mode 100644 index 0000000000..9776eaa546 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_usb_host.c @@ -0,0 +1,708 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_usb_host.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the USB firmware functions. +*******************************************************************************/ +#include "ch32v10x_usb_host.h" +#include "debug.h" + +/******************************** HOST DEVICE **********************************/ +UINT8 UsbDevEndp0Size; +UINT8 FoundNewDev; +_RootHubDev ThisUsbDev; + +PUINT8 pHOST_RX_RAM_Addr; +PUINT8 pHOST_TX_RAM_Addr; +extern UINT8 Com_Buffer[128]; + +__attribute__ ((aligned(4))) const UINT8 SetupGetDevDescr[] = { USB_REQ_TYP_IN, USB_GET_DESCRIPTOR, 0x00, USB_DESCR_TYP_DEVICE, 0x00, 0x00, sizeof( USB_DEV_DESCR ), 0x00 }; + +__attribute__ ((aligned(4))) const UINT8 SetupGetCfgDescr[] = { USB_REQ_TYP_IN, USB_GET_DESCRIPTOR, 0x00, USB_DESCR_TYP_CONFIG, 0x00, 0x00, 0x04, 0x00 }; + +__attribute__ ((aligned(4))) const UINT8 SetupSetUsbAddr[] = { USB_REQ_TYP_OUT, USB_SET_ADDRESS, USB_DEVICE_ADDR, 0x00, 0x00, 0x00, 0x00, 0x00 }; + +__attribute__ ((aligned(4))) const UINT8 SetupSetUsbConfig[] = { USB_REQ_TYP_OUT, USB_SET_CONFIGURATION, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + +__attribute__ ((aligned(4))) const UINT8 SetupSetUsbInterface[] = { USB_REQ_RECIP_INTERF, USB_SET_INTERFACE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + +__attribute__ ((aligned(4))) const UINT8 SetupClrEndpStall[] = { USB_REQ_TYP_OUT | USB_REQ_RECIP_ENDP, USB_CLEAR_FEATURE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + + +/******************************************************************************* +* Function Name : DisableRootHubPort( ) +* Description : Disable root hub. +* Input : None +* Return : None +*******************************************************************************/ +void DisableRootHubPort(void) +{ +#ifdef FOR_ROOT_UDISK_ONLY + CH103DiskStatus = DISK_DISCONNECT; + +#endif + +#ifndef DISK_BASE_BUF_LEN + ThisUsbDev.DeviceStatus = ROOT_DEV_DISCONNECT; + ThisUsbDev.DeviceAddress = 0x00; + +#endif +} + +/******************************************************************************* +* Function Name : AnalyzeRootHub +* Description : Analyze root hub state. +* Input : None +* Return : Error +*******************************************************************************/ +UINT8 AnalyzeRootHub( void ) +{ + UINT8 s; + + s = ERR_SUCCESS; + + if ( R8_USB_MIS_ST & RB_UMS_DEV_ATTACH ) { + +#ifdef DISK_BASE_BUF_LEN + if ( CH103DiskStatus == DISK_DISCONNECT + +#else + if ( ThisUsbDev.DeviceStatus == ROOT_DEV_DISCONNECT + +#endif + || ( R8_UHOST_CTRL & RB_UH_PORT_EN ) == 0x00 ) { + DisableRootHubPort( ); + +#ifdef DISK_BASE_BUF_LEN + CH103DiskStatus = DISK_CONNECT; + +#else + ThisUsbDev.DeviceSpeed = R8_USB_MIS_ST & RB_UMS_DM_LEVEL ? 0 : 1; + ThisUsbDev.DeviceStatus = ROOT_DEV_CONNECTED; + +#endif + s = ERR_USB_CONNECT; + } + } + +#ifdef DISK_BASE_BUF_LEN + else if ( CH103DiskStatus >= DISK_CONNECT ) { + +#else + else if ( ThisUsbDev.DeviceStatus >= ROOT_DEV_CONNECTED ) { + +#endif + DisableRootHubPort( ); + if ( s == ERR_SUCCESS ) s = ERR_USB_DISCON; + } + + return( s ); +} + +/******************************************************************************* +* Function Name : SetHostUsbAddr +* Description : Set USB host address. +* Input : addr; host address. +* Return : None +*******************************************************************************/ +void SetHostUsbAddr( UINT8 addr ) +{ + R8_USB_DEV_AD = (R8_USB_DEV_AD&RB_UDA_GP_BIT) | (addr&MASK_USB_ADDR); +} + +#ifndef FOR_ROOT_UDISK_ONLY +/******************************************************************************* +* Function Name : SetUsbSpeed +* Description : Set USB speed. +* Input : FullSpeed: USB speed. +* Return : None +*******************************************************************************/ +void SetUsbSpeed( UINT8 FullSpeed ) +{ + if ( FullSpeed ) + { + R8_USB_CTRL &= ~ RB_UC_LOW_SPEED; + R8_UH_SETUP &= ~ RB_UH_PRE_PID_EN; + } + else + { + R8_USB_CTRL |= RB_UC_LOW_SPEED; + } +} +#endif + +/******************************************************************************* +* Function Name : ResetRootHubPort( ) +* Description : Reset root hub. +* Input : None +* Return : None +*******************************************************************************/ +void ResetRootHubPort( void ) +{ + UsbDevEndp0Size = DEFAULT_ENDP0_SIZE; + SetHostUsbAddr( 0x00 ); + R8_UHOST_CTRL &= ~RB_UH_PORT_EN; + SetUsbSpeed( 1 ); + R8_UHOST_CTRL = (R8_UHOST_CTRL & ~RB_UH_LOW_SPEED) | RB_UH_BUS_RESET; + Delay_Ms( 15 ); + R8_UHOST_CTRL = R8_UHOST_CTRL & ~ RB_UH_BUS_RESET; + Delay_Us( 250 ); + R8_USB_INT_FG = RB_UIF_DETECT; +} + +/******************************************************************************* +* Function Name : EnableRootHubPort( ) +* Description : Enable root hub. +* Input : None +* Return : ERROR +*******************************************************************************/ +UINT8 EnableRootHubPort(void) +{ +#ifdef DISK_BASE_BUF_LEN + if ( CH103DiskStatus < DISK_CONNECT ) CH103DiskStatus = DISK_CONNECT; + +#else + if ( ThisUsbDev.DeviceStatus < ROOT_DEV_CONNECTED ) ThisUsbDev.DeviceStatus = ROOT_DEV_CONNECTED; + +#endif + if ( R8_USB_MIS_ST & RB_UMS_DEV_ATTACH ) { +#ifndef DISK_BASE_BUF_LEN + if ( ( R8_UHOST_CTRL & RB_UH_PORT_EN ) == 0x00 ) { + ThisUsbDev.DeviceSpeed = (R8_USB_MIS_ST & RB_UMS_DM_LEVEL) ? 0 : 1; + if ( ThisUsbDev.DeviceSpeed == 0 ) R8_UHOST_CTRL |= RB_UH_LOW_SPEED; + } + +#endif + R8_UHOST_CTRL |= RB_UH_PORT_EN; + return( ERR_SUCCESS ); + } + + return( ERR_USB_DISCON ); +} + +/******************************************************************************* +* Function Name : WaitUSB_Interrupt +* Description : Wait USB Interrput. +* Input : None +* Return : EEROR +*******************************************************************************/ +UINT8 WaitUSB_Interrupt( void ) +{ + UINT16 i; + + for ( i = WAIT_USB_TOUT_200US; i != 0 && (R8_USB_INT_FG&RB_UIF_TRANSFER) == 0; i -- ){;} + return( (R8_USB_INT_FG&RB_UIF_TRANSFER) ? ERR_SUCCESS : ERR_USB_UNKNOWN ); +} + +/******************************************************************************* +* Function Name : USBHostTransact +* Description : USB host transport transaction. +* Input : endp_pid: endpoint and PID. +* tog: Synchronization flag. +* timeout: timeout times. +* Return : EEROR: +* ERR_USB_UNKNOWN +* ERR_USB_DISCON +* ERR_USB_CONNECT +* ERR_SUCCESS +*******************************************************************************/ +UINT8 USBHostTransact( UINT8 endp_pid, UINT8 tog, UINT32 timeout ) +{ + UINT8 TransRetry; + UINT8 s, r; + UINT16 i; + + R8_UH_RX_CTRL = R8_UH_TX_CTRL = tog; + TransRetry = 0; + + do { + R8_UH_EP_PID = endp_pid; + R8_USB_INT_FG = RB_UIF_TRANSFER; + for ( i = WAIT_USB_TOUT_200US; i != 0 && (R8_USB_INT_FG&RB_UIF_TRANSFER) == 0; i -- ); + R8_UH_EP_PID = 0x00; + if ( (R8_USB_INT_FG&RB_UIF_TRANSFER) == 0 ) {return( ERR_USB_UNKNOWN );} + + if ( R8_USB_INT_FG & RB_UIF_DETECT ) { + R8_USB_INT_FG = RB_UIF_DETECT; + s = AnalyzeRootHub( ); + + if ( s == ERR_USB_CONNECT ) FoundNewDev = 1; + +#ifdef DISK_BASE_BUF_LEN + + if ( CH103DiskStatus == DISK_DISCONNECT ) return( ERR_USB_DISCON ); + if ( CH103DiskStatus == DISK_CONNECT ) return( ERR_USB_CONNECT ); + +#else + if ( ThisUsbDev.DeviceStatus == ROOT_DEV_DISCONNECT ) return( ERR_USB_DISCON ); + if ( ThisUsbDev.DeviceStatus == ROOT_DEV_CONNECTED ) return( ERR_USB_CONNECT ); + +#endif + Delay_Us( 200 ); + } + + if ( R8_USB_INT_FG & RB_UIF_TRANSFER ) + { + if ( R8_USB_INT_ST & RB_UIS_TOG_OK ) return( ERR_SUCCESS ); + r = R8_USB_INT_ST & MASK_UIS_H_RES; + if ( r == USB_PID_STALL ) return( r | ERR_USB_TRANSFER ); + + if ( r == USB_PID_NAK ) + { + if ( timeout == 0 ) return( r | ERR_USB_TRANSFER ); + if ( timeout < 0xFFFF ) timeout --; + -- TransRetry; + } + else switch ( endp_pid >> 4 ) { + case USB_PID_SETUP: + + case USB_PID_OUT: + if ( r ) return( r | ERR_USB_TRANSFER ); + break; + + case USB_PID_IN: + if ( r == USB_PID_DATA0 && r == USB_PID_DATA1 ) { + } + else if ( r ) return( r | ERR_USB_TRANSFER ); + break; + + default: + return( ERR_USB_UNKNOWN ); + } + } + else { + R8_USB_INT_FG = 0xFF; + } + Delay_Us( 15 ); + } while ( ++ TransRetry < 3 ); + + return( ERR_USB_TRANSFER ); +} + +/******************************************************************************* +* Function Name : HostCtrlTransfer +* Description : Host control transport. +* Input : DataBuf : Receive or send data buffer. +* RetLen : Data length. +* Return : ERR_USB_BUF_OVER IN +* ERR_SUCCESS +*******************************************************************************/ +UINT8 HostCtrlTransfer( PUINT8 DataBuf, PUINT8 RetLen ) +{ + UINT16 RemLen = 0; + UINT8 s, RxLen, RxCnt, TxCnt; + PUINT8 pBuf; + PUINT8 pLen; + + pBuf = DataBuf; + pLen = RetLen; + Delay_Us( 200 ); + if ( pLen ) *pLen = 0; + + R8_UH_TX_LEN = sizeof( USB_SETUP_REQ ); + s = USBHostTransact( USB_PID_SETUP << 4 | 0x00, 0x00, 200000/20 ); + if ( s != ERR_SUCCESS ) return( s ); + R8_UH_RX_CTRL = R8_UH_TX_CTRL = RB_UH_R_TOG | RB_UH_R_AUTO_TOG | RB_UH_T_TOG | RB_UH_T_AUTO_TOG; + R8_UH_TX_LEN = 0x01; + RemLen = pSetupReq -> wLength; + + if ( RemLen && pBuf ) + { + if ( pSetupReq -> bRequestType & USB_REQ_TYP_IN ) + { + while ( RemLen ) + { + Delay_Us( 200 ); + s = USBHostTransact( USB_PID_IN << 4 | 0x00, R8_UH_RX_CTRL, 200000/20 ); + if ( s != ERR_SUCCESS ) return( s ); + RxLen = R8_USB_RX_LEN < RemLen ? R8_USB_RX_LEN : RemLen; + RemLen -= RxLen; + if ( pLen ) *pLen += RxLen; + + for ( RxCnt = 0; RxCnt != RxLen; RxCnt ++ ) + { + *pBuf = pHOST_RX_RAM_Addr[ RxCnt ]; + pBuf ++; + } + + if ( R8_USB_RX_LEN == 0 || ( R8_USB_RX_LEN & ( UsbDevEndp0Size - 1 ) ) ) break; + } + R8_UH_TX_LEN = 0x00; + } + else + { + while ( RemLen ) + { + Delay_Us( 200 ); + R8_UH_TX_LEN = RemLen >= UsbDevEndp0Size ? UsbDevEndp0Size : RemLen; + + for ( TxCnt = 0; TxCnt != R8_UH_TX_LEN; TxCnt ++ ) + { + pHOST_TX_RAM_Addr[ TxCnt ] = *pBuf; + pBuf ++; + } + + s = USBHostTransact( USB_PID_OUT << 4 | 0x00, R8_UH_TX_CTRL, 200000/20 ); + if ( s != ERR_SUCCESS ) return( s ); + RemLen -= R8_UH_TX_LEN; + if ( pLen ) *pLen += R8_UH_TX_LEN; + } + } + } + + Delay_Us( 200 ); + s = USBHostTransact( ( R8_UH_TX_LEN ? USB_PID_IN << 4 | 0x00: USB_PID_OUT << 4 | 0x00 ), RB_UH_R_TOG | RB_UH_T_TOG, 200000/20 ); + if ( s != ERR_SUCCESS ) return( s ); + if ( R8_UH_TX_LEN == 0 ) return( ERR_SUCCESS ); + if ( R8_USB_RX_LEN == 0 ) return( ERR_SUCCESS ); + + return( ERR_USB_BUF_OVER ); +} + +/******************************************************************************* +* Function Name : CopySetupReqPkg +* Description : Copy setup request package. +* Input : pReqPkt: setup request package address. +* Return : None +*******************************************************************************/ +void CopySetupReqPkg( const UINT8 *pReqPkt ) +{ + UINT8 i; + + for ( i = 0; i != sizeof( USB_SETUP_REQ ); i ++ ) + { + ((PUINT8)pSetupReq)[ i ] = *pReqPkt; + pReqPkt++; + } +} + +/******************************************************************************* +* Function Name : CtrlGetDeviceDescr +* Description : Get device descrptor +* Input : DataBuf: Data buffer. +* Return : ERR_USB_BUF_OVER +* ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlGetDeviceDescr( PUINT8 DataBuf ) +{ + UINT8 s; + UINT8 len; + + UsbDevEndp0Size = DEFAULT_ENDP0_SIZE; + CopySetupReqPkg( SetupGetDevDescr ); + s = HostCtrlTransfer( DataBuf, &len ); + + if ( s != ERR_SUCCESS ) return( s ); + UsbDevEndp0Size = ( (PUSB_DEV_DESCR)DataBuf ) -> bMaxPacketSize0; + if ( len < ((PUSB_SETUP_REQ)SetupGetDevDescr)->wLength ) return( ERR_USB_BUF_OVER ); + + return( ERR_SUCCESS ); +} + +/******************************************************************************* +* Function Name : CtrlGetConfigDescr +* Description : Get configration descrptor. +* Input : DataBuf: Data buffer. +* Return : ERR_USB_BUF_OVER +* ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlGetConfigDescr( PUINT8 DataBuf ) +{ + UINT8 s; + UINT8 len; + + CopySetupReqPkg( SetupGetCfgDescr ); + s = HostCtrlTransfer( DataBuf, &len ); + if ( s != ERR_SUCCESS ) return( s ); + if ( len < ( (PUSB_SETUP_REQ)SetupGetCfgDescr ) -> wLength ) return( ERR_USB_BUF_OVER ); + + len = ( (PUSB_CFG_DESCR)DataBuf ) -> wTotalLength; + CopySetupReqPkg( SetupGetCfgDescr ); + pSetupReq ->wLength = len; + s = HostCtrlTransfer( DataBuf, &len ); + if ( s != ERR_SUCCESS ) return( s ); + + return( ERR_SUCCESS ); +} + +/******************************************************************************* +* Function Name : CtrlSetUsbAddress +* Description : Set USB device address. +* Input : addr: Device address. +* Return : ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlSetUsbAddress( UINT8 addr ) +{ + UINT8 s; + + CopySetupReqPkg( SetupSetUsbAddr ); + pSetupReq -> wValue = addr; + s = HostCtrlTransfer( NULL, NULL ); + if ( s != ERR_SUCCESS ) return( s ); + SetHostUsbAddr( addr ); + Delay_Ms( 10 ); + + return( ERR_SUCCESS ); +} + +/******************************************************************************* +* Function Name : CtrlSetUsbConfig +* Description : Set usb configration. +* Input : cfg: Configration Value. +* Return : ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlSetUsbConfig( UINT8 cfg ) +{ + CopySetupReqPkg( SetupSetUsbConfig ); + pSetupReq -> wValue = cfg; + return( HostCtrlTransfer( NULL, NULL ) ); +} + +/******************************************************************************* +* Function Name : CtrlClearEndpStall +* Description : Clear endpoint STALL. +* Input : endp: Endpoint address. +* Return : ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlClearEndpStall( UINT8 endp ) +{ + CopySetupReqPkg( SetupClrEndpStall ); + pSetupReq -> wIndex = endp; + return( HostCtrlTransfer( NULL, NULL ) ); +} + +/******************************************************************************* +* Function Name : CtrlSetUsbIntercace +* Description : Set USB Interface configration. +* Input : cfg: Configration value. +* Return : ERR_SUCCESS +*******************************************************************************/ +UINT8 CtrlSetUsbIntercace( UINT8 cfg ) +{ + CopySetupReqPkg( SetupSetUsbInterface ); + pSetupReq -> wValue = cfg; + return( HostCtrlTransfer( NULL, NULL ) ); +} + +/******************************************************************************* +* Function Name : USB_HostInit +* Description : Initializes USB host mode. +* Input : None +* Return : None +*******************************************************************************/ +void USB_HostInit( void ) +{ + R8_USB_CTRL = RB_UC_HOST_MODE; + R8_UHOST_CTRL = 0; + R8_USB_DEV_AD = 0x00; + R8_UH_EP_MOD = RB_UH_EP_TX_EN | RB_UH_EP_RX_EN; + R16_UH_RX_DMA = (UINT16)(UINT32)pHOST_RX_RAM_Addr; + R16_UH_TX_DMA = (UINT16)(UINT32)pHOST_TX_RAM_Addr; + + R8_UH_RX_CTRL = 0x00; + R8_UH_TX_CTRL = 0x00; + R8_USB_CTRL = RB_UC_HOST_MODE | RB_UC_INT_BUSY | RB_UC_DMA_EN; + R8_UH_SETUP = RB_UH_SOF_EN; + R8_USB_INT_FG = 0xFF; + DisableRootHubPort( ); + R8_USB_INT_EN = RB_UIE_TRANSFER|RB_UIE_DETECT; + + FoundNewDev = 0; +} + +/***************************************************************************** +* Function Name : InitRootDevice +* Description : Initializes USB root hub. +* Input : DataBuf: Data buffer. +* Return : ERROR +*******************************************************************************/ +UINT8 InitRootDevice( PUINT8 DataBuf ) +{ + UINT8 i, s; + UINT8 cfg, dv_cls, if_cls; + + ResetRootHubPort( ); + + for ( i = 0, s = 0; i < 100; i ++ ) + { + Delay_Ms( 1 ); + if ( EnableRootHubPort( ) == ERR_SUCCESS ) { + i = 0; + s ++; + if ( s > 100 ) break; + } + } + + if ( i ) + { + DisableRootHubPort( ); + return( ERR_USB_DISCON ); + } + + SetUsbSpeed( ThisUsbDev.DeviceSpeed ); + + s = CtrlGetDeviceDescr( DataBuf ); + + if ( s == ERR_SUCCESS ) + { + + ThisUsbDev.DeviceVID = ((PUSB_DEV_DESCR)DataBuf)->idVendor; + ThisUsbDev.DevicePID = ((PUSB_DEV_DESCR)DataBuf)->idProduct; + dv_cls = ( (PUSB_DEV_DESCR)DataBuf ) -> bDeviceClass; + + s = CtrlSetUsbAddress( ((PUSB_SETUP_REQ)SetupSetUsbAddr)->wValue ); + + if ( s == ERR_SUCCESS ) + { + ThisUsbDev.DeviceAddress = ( (PUSB_SETUP_REQ)SetupSetUsbAddr )->wValue; + + s = CtrlGetConfigDescr( DataBuf ); + + if ( s == ERR_SUCCESS ) + { + cfg = ( (PUSB_CFG_DESCR)DataBuf )->bConfigurationValue; + if_cls = ( (PUSB_CFG_DESCR_LONG)DataBuf )->itf_descr.bInterfaceClass; + + if ( (dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_STORAGE)) { + + #ifdef FOR_ROOT_UDISK_ONLY + CH103DiskStatus = DISK_USB_ADDR; + return( ERR_SUCCESS ); + } + else return( ERR_USB_UNSUPPORT ); + + #else + s = CtrlSetUsbConfig( cfg ); + + if ( s == ERR_SUCCESS ) + { + ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS; + ThisUsbDev.DeviceType = USB_DEV_CLASS_STORAGE; + SetUsbSpeed( 1 ); + return( ERR_SUCCESS ); + } + } + else if ( (dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_PRINTER) && ((PUSB_CFG_DESCR_LONG)DataBuf)->itf_descr.bInterfaceSubClass == 0x01 ) { + s = CtrlSetUsbConfig( cfg ); + if ( s == ERR_SUCCESS ) { + ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS; + ThisUsbDev.DeviceType = USB_DEV_CLASS_PRINTER; + SetUsbSpeed( 1 ); + return( ERR_SUCCESS ); + } + } + else if ( (dv_cls == 0x00) && (if_cls == USB_DEV_CLASS_HID) && ((PUSB_CFG_DESCR_LONG)DataBuf)->itf_descr.bInterfaceSubClass <= 0x01 ) { + if_cls = ( (PUSB_CFG_DESCR_LONG)DataBuf ) -> itf_descr.bInterfaceProtocol; + s = CtrlSetUsbConfig( cfg ); + if ( s == ERR_SUCCESS ) { + ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS; + if ( if_cls == 1 ) { + ThisUsbDev.DeviceType = DEV_TYPE_KEYBOARD; + SetUsbSpeed( 1 ); + return( ERR_SUCCESS ); + } + else if ( if_cls == 2 ) { + ThisUsbDev.DeviceType = DEV_TYPE_MOUSE; + SetUsbSpeed( 1 ); + return( ERR_SUCCESS ); + } + s = ERR_USB_UNSUPPORT; + } + } + else { + s = CtrlSetUsbConfig( cfg ); + if ( s == ERR_SUCCESS ) { + ThisUsbDev.DeviceStatus = ROOT_DEV_SUCCESS; + ThisUsbDev.DeviceType = DEV_TYPE_UNKNOW; + SetUsbSpeed( 1 ); + return( ERR_SUCCESS ); + } + } + + #endif + } + } + } + +#ifdef FOR_ROOT_UDISK_ONLY + CH103DiskStatus = DISK_CONNECT; + +#else + ThisUsbDev.DeviceStatus = ROOT_DEV_FAILED; + +#endif + + SetUsbSpeed( 1 ); + + return( s ); +} +/******************************************************************************* +* Function Name : HubGetPortStatus +* Description : ѯHUB˿״̬,Com_Buffer +* Input : UINT8 HubPortIndex +* Output : None +* Return : ERR_SUCCESS ɹ + ERR_USB_BUF_OVER ȴ +*******************************************************************************/ +UINT8 HubGetPortStatus( UINT8 HubPortIndex ) +{ + UINT8 s; + UINT8 len; + + pSetupReq -> bRequestType = HUB_GET_PORT_STATUS; + pSetupReq -> bRequest = HUB_GET_STATUS; + pSetupReq -> wValue = 0x0000; + pSetupReq -> wIndex = 0x0000|HubPortIndex; + pSetupReq -> wLength = 0x0004; + s = HostCtrlTransfer( Com_Buffer, &len ); // ִпƴ + if ( s != ERR_SUCCESS ) + { + return( s ); + } + if ( len < 4 ) + { + return( ERR_USB_BUF_OVER ); // ȴ + } + + return( ERR_SUCCESS ); +} + +/******************************************************************************* +* Function Name : HubSetPortFeature +* Description : HUB˿ +* Input : UINT8 HubPortIndex //HUB˿ + UINT8 FeatureSelt //HUB˿ +* Output : None +* Return : ERR_SUCCESS ɹ +* +*******************************************************************************/ +UINT8 HubSetPortFeature( UINT8 HubPortIndex, UINT8 FeatureSelt ) +{ + pSetupReq -> bRequestType = HUB_SET_PORT_FEATURE; + pSetupReq -> bRequest = HUB_SET_FEATURE; + pSetupReq -> wValue = 0x0000|FeatureSelt; + pSetupReq -> wIndex = 0x0000|HubPortIndex; + pSetupReq -> wLength = 0x0000; + return( HostCtrlTransfer( NULL, NULL ) ); // ִпƴ +} + +/******************************************************************************* +* Function Name : HubClearPortFeature +* Description : HUB˿ +* Input : UINT8 HubPortIndex + UINT8 FeatureSelt +* Output : None +* Return : ERR_SUCCESS ɹ +* +*******************************************************************************/ +UINT8 HubClearPortFeature( UINT8 HubPortIndex, UINT8 FeatureSelt ) +{ + pSetupReq -> bRequestType = HUB_CLEAR_PORT_FEATURE; + pSetupReq -> bRequest = HUB_CLEAR_FEATURE; + pSetupReq -> wValue = 0x0000|FeatureSelt; + pSetupReq -> wIndex = 0x0000|HubPortIndex; + pSetupReq -> wLength = 0x0000; + return( HostCtrlTransfer( NULL, NULL ) ); // ִпƴ +} + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_wwdg.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_wwdg.c new file mode 100644 index 0000000000..c5d925dbdb --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/src/ch32v10x_wwdg.c @@ -0,0 +1,123 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : ch32v10x_wwdg.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : This file provides all the WWDG firmware functions. +**********************************************************************************/ +#include "ch32v10x_wwdg.h" +#include "ch32v10x_rcc.h" + +/* CTLR register bit mask */ +#define CTLR_WDGA_Set ((uint32_t)0x00000080) + +/* CFGR register bit mask */ +#define CFGR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) +#define CFGR_W_Mask ((uint32_t)0xFFFFFF80) +#define BIT_Mask ((uint8_t)0x7F) + +/******************************************************************************** +* Function Name : WWDG_DeInit +* Description : Deinitializes the WWDG peripheral registers to their default reset values +* Input : None +* Return : None +*********************************************************************************/ +void WWDG_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); +} + +/******************************************************************************** +* Function Name : WWDG_SetPrescaler +* Description : Sets the WWDG Prescaler +* Input : WWDG_Prescaler: specifies the WWDG Prescaler +* WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 +* WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 +* WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 +* WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 +* Return : None +*********************************************************************************/ +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) +{ + uint32_t tmpreg = 0; + tmpreg = WWDG->CFGR & CFGR_WDGTB_Mask; + tmpreg |= WWDG_Prescaler; + WWDG->CFGR = tmpreg; +} + +/******************************************************************************** +* Function Name : WWDG_SetWindowValue +* Description : Sets the WWDG window value +* Input : WindowValue: specifies the window value to be compared to the +* downcounter,which must be lower than 0x80 +* Return : None +*********************************************************************************/ +void WWDG_SetWindowValue(uint8_t WindowValue) +{ + __IO uint32_t tmpreg = 0; + + tmpreg = WWDG->CFGR & CFGR_W_Mask; + + tmpreg |= WindowValue & (uint32_t) BIT_Mask; + + WWDG->CFGR = tmpreg; +} + +/******************************************************************************** +* Function Name : WWDG_EnableIT +* Description : Enables the WWDG Early Wakeup interrupt(EWI) +* Input : None +* Return : None +*********************************************************************************/ +void WWDG_EnableIT(void) +{ + WWDG->CFGR |= (1<<9); +} + +/******************************************************************************** +* Function Name : WWDG_SetCounter +* Description : Sets the WWDG counter value +* Input : Counter: specifies the watchdog counter value,which must be a +* number between 0x40 and 0x7F +* Return : None +*********************************************************************************/ +void WWDG_SetCounter(uint8_t Counter) +{ + WWDG->CTLR = Counter & BIT_Mask; +} + + +/******************************************************************************** +* Function Name : WWDG_Enable +* Description : Enables WWDG and load the counter value +* Input : Counter: specifies the watchdog counter value,which must be a +* number between 0x40 and 0x7F +* Return : None +*********************************************************************************/ +void WWDG_Enable(uint8_t Counter) +{ + WWDG->CTLR = CTLR_WDGA_Set | Counter; +} + +/******************************************************************************** +* Function Name : WWDG_GetFlagStatus +* Description : Checks whether the Early Wakeup interrupt flag is set or not +* Input : None +* Return : The new state of the Early Wakeup interrupt flag (SET or RESET) +*********************************************************************************/ +FlagStatus WWDG_GetFlagStatus(void) +{ + return (FlagStatus)(WWDG->STATR); +} + +/******************************************************************************** +* Function Name : WWDG_ClearFlag +* Description : Clears Early Wakeup interrupt flag +* Input : None +* Return : None +*********************************************************************************/ +void WWDG_ClearFlag(void) +{ + WWDG->STATR = (uint32_t)RESET; +} diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.c b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.c new file mode 100644 index 0000000000..c11e93a9b6 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.c @@ -0,0 +1,505 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32v10x.c +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : CH32V10x Device Peripheral Access Layer System Source File. +*********************************************************************************/ +#include "ch32v10x.h" + +/* +* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after +* reset the HSI is used as SYSCLK source). +* If none of the define below is enabled, the HSI is used as System clock source. +*/ +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 + +/* Clock Definitions */ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /* System Clock Frequency (Core Clock) */ +#else /* HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /* System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + + +/* ch32v10x_system_private_function_proto_types */ +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + + +/****************************************************************************************** +* Function Name : SystemInit +* Description : Setup the microcontroller system Initialize the Embedded Flash Interface, +* the PLL and update the SystemCoreClock variable. +* Input : None +* Return : None +*******************************************************************************************/ +void SystemInit (void) +{ + RCC->CTLR |= (uint32_t)0x00000001; + RCC->CFGR0 &= (uint32_t)0xF8FF0000; + RCC->CTLR &= (uint32_t)0xFEF6FFFF; + RCC->CTLR &= (uint32_t)0xFFFBFFFF; + RCC->CFGR0 &= (uint32_t)0xFF80FFFF; + RCC->INTR = 0x009F0000; + SetSysClock(); +} + + +/****************************************************************************************** +* Function Name : SystemCoreClockUpdate +* Description : Update SystemCoreClock variable according to Clock Register Values. +* Input : None +* Return : None +*******************************************************************************************/ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + + tmp = RCC->CFGR0 & RCC_SWS; + + switch (tmp) + { + case 0x00: + SystemCoreClock = HSI_VALUE; + break; + case 0x04: + SystemCoreClock = HSE_VALUE; + break; + case 0x08: + pllmull = RCC->CFGR0 & RCC_PLLMULL; + pllsource = RCC->CFGR0 & RCC_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + if (pllsource == 0x00) + { + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET) + { + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + } + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + + tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; + SystemCoreClock >>= tmp; +} + + +/****************************************************************************************** +* Function Name : SetSysClock +* Description : Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + * source (default after reset) + */ +} + + +#ifdef SYSCLK_FREQ_HSE + +/****************************************************************************************** +* Function Name : SetSysClockToHSE +* Description : Sets HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_24MHz + +/****************************************************************************************** +* Function Name : SetSysClockTo24 +* Description : Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1; + + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLXTPRE_HSE | RCC_PLLMULL3); + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + + +#elif defined SYSCLK_FREQ_48MHz + +/****************************************************************************************** +* Function Name : SetSysClockTo48 +* Description : Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLMULL6); + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_56MHz + +/****************************************************************************************** +* Function Name : SetSysClockTo56 +* Description : Sets System clock frequency to 56MHz and configure HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLMULL7); + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_72MHz + +/****************************************************************************************** +* Function Name : SetSysClockTo72 +* Description : Sets System clock frequency to 72MHz and configure HCLK, PCLK2 and PCLK1 prescalers. +* Input : None +* Return : None +*******************************************************************************************/ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACTLR |= FLASH_ACTLR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + /* PCLK2 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; + /* PCLK1 = HCLK */ + RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | + RCC_PLLMULL)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE | RCC_PLLMULL9); + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while((RCC->CTLR & RCC_PLLRDY) == 0) + { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) + { + } + } + else + { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} +#endif + + + + diff --git a/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.h b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.h new file mode 100644 index 0000000000..df208db059 --- /dev/null +++ b/bsp/ch32v103/libraries/WCH32V103_std_peripheral/system_ch32v10x.h @@ -0,0 +1,28 @@ +/********************************** (C) COPYRIGHT ******************************* +* File Name : system_ch32v10x.h +* Author : WCH +* Version : V1.0.0 +* Date : 2020/04/30 +* Description : CH32V10x Device Peripheral Access Layer System Header File. +*******************************************************************************/ +#ifndef __SYSTEM_CH32V10x_H +#define __SYSTEM_CH32V10x_H + +#ifdef __cplusplus + extern "C" { +#endif + +extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ + +/* System_Exported_Functions */ +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__CH32V10x_SYSTEM_H */ + + + diff --git a/bsp/ch32v103/linkscripts/link.lds b/bsp/ch32v103/linkscripts/link.lds new file mode 100644 index 0000000000..df36c9cf80 --- /dev/null +++ b/bsp/ch32v103/linkscripts/link.lds @@ -0,0 +1,193 @@ +ENTRY( _start ) + +__stack_size = 2048; + +PROVIDE( _stack_size = __stack_size ); + + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K +} + + +SECTIONS +{ + + .init : + { + _sinit = .; + . = ALIGN(4); + KEEP(*(SORT_NONE(.init))) + . = ALIGN(4); + _einit = .; + } >FLASH AT>FLASH + + .vector : + { + *(.vector); + . = ALIGN(64); + } >FLASH AT>FLASH + + .text : + { + . = ALIGN(4); + *(.text) + *(.text.*) + *(.rodata) + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t.*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + /* section information for modules */ + . = ALIGN(4); + __rtmsymtab_start = .; + KEEP(*(RTMSymTab)) + __rtmsymtab_end = .; + . = ALIGN(4); + + } >FLASH AT>FLASH + + .fini : + { + KEEP(*(SORT_NONE(.fini))) + . = ALIGN(4); + } >FLASH AT>FLASH + + PROVIDE( _etext = . ); + PROVIDE( _eitcm = . ); + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH AT>FLASH + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH AT>FLASH + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH AT>FLASH + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >FLASH AT>FLASH + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >FLASH AT>FLASH + + .dalign : + { + . = ALIGN(4); + PROVIDE(_data_vma = .); + } >RAM AT>FLASH + + .dlalign : + { + . = ALIGN(4); + PROVIDE(_data_lma = .); + } >FLASH AT>FLASH + + .data : + { + *(.gnu.linkonce.r.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.*) + *(.sdata2.*) + *(.gnu.linkonce.s.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + . = ALIGN(4); + PROVIDE( _edata = .); + } >RAM AT>FLASH + + .bss : + { + . = ALIGN(4); + PROVIDE( _sbss = .); + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss*) + *(.gnu.linkonce.b.*) + *(COMMON*) + . = ALIGN(4); + PROVIDE( _ebss = .); + } >RAM AT>FLASH + + PROVIDE( _end = _ebss); + PROVIDE( end = . ); + + .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size : + { + . = ALIGN(4); + PROVIDE(_susrstack = . ); + . = . + __stack_size; + PROVIDE( _eusrstack = .); + } >RAM + +} + + + diff --git a/bsp/ch32v103/rtconfig.h b/bsp/ch32v103/rtconfig.h new file mode 100644 index 0000000000..07750eaed7 --- /dev/null +++ b/bsp/ch32v103/rtconfig.h @@ -0,0 +1,164 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 7 +#define RT_TIMER_THREAD_STACK_SIZE 512 +#define RT_DEBUG + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40003 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 512 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 1024 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_USING_LIBC + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + + +/* Hardware Drivers Config */ + +#define SOC_CH32V103R8T6 + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_UART_CONSOLE +#define BSP_USING_PIN + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_UART +#define RT_USING_UART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/ch32v103/rtconfig.py b/bsp/ch32v103/rtconfig.py new file mode 100644 index 0000000000..b0755df0d2 --- /dev/null +++ b/bsp/ch32v103/rtconfig.py @@ -0,0 +1,66 @@ +import os +ARCH = 'risc-v' +CPU = 'ch32v103' +# toolchains options +CROSS_TOOL = 'gcc' + +#------- toolchains path ------------------------------------------------------- +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') + +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'E:/DevBoard/ARTT/rt-studio/RT-ThreadStudio/repo/Extract/ToolChain_Support_Packages/WCH/RISC-V-GCC-WCH/8.2.0/bin' + #EXEC_PATH = r'/opt/unknown-gcc/bin' +else: + print('Please make sure your toolchains is GNU GCC!') + exit(0) + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' +#BUILD = 'release' + +CORE = 'risc-v' +MAP_FILE = 'rtthread.map' +LINK_FILE = './linkscripts/link.lds' +TARGET_NAME = 'rtthread.bin' +TARGET_HEX = 'rtthread.hex' + +#------- GCC settings ---------------------------------------------------------- +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'riscv-none-embed-' + CC = PREFIX + 'gcc' + CXX= PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + #DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -DNO_INIT -mcmodel=medany -msmall-data-limit=8 -L. -nostartfiles -lc ' + DEVICE = ' -march=rv32imac -mabi=ilp32 -msmall-data-limit=8 -mno-save-restore -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -Wunused -Wuninitialized -L. -nostartfiles -lc ' + CFLAGS = DEVICE + CFLAGS += ' -save-temps=obj' + AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp' + AFLAGS += ' -IIlibraries/Core -Ilibraries/WCH32V103_std_peripheral -Ilibraries/WCH32V103_std_peripheral/inc' + LFLAGS = DEVICE + LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE + LFLAGS += ' -T ' + LINK_FILE + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O -g3' + AFLAGS += ' -g3' + else: + CFLAGS += ' -O2' + + #POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n' + POST_ACTION = OBJCPY + ' -O ihex $TARGET ' + TARGET_HEX + '\n' + POST_ACTION += SIZE + ' $TARGET\n' diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript index 2447aee65a..adde94b4c9 100644 --- a/libcpu/risc-v/SConscript +++ b/libcpu/risc-v/SConscript @@ -16,6 +16,8 @@ elif rtconfig.CPU == "nuclei" : group = group elif rtconfig.CPU == "virt64" : group = group +elif rtconfig.CPU == "ch32v103" : + group = group else : group = group + SConscript(os.path.join(cwd, 'common', 'SConscript')) diff --git a/libcpu/risc-v/ch32v103/SConscript b/libcpu/risc-v/ch32v103/SConscript new file mode 100644 index 0000000000..b0ae20ba02 --- /dev/null +++ b/libcpu/risc-v/ch32v103/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S') +CPPPATH = [cwd] +ASFLAGS = '' + +group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS) + +Return('group') diff --git a/libcpu/risc-v/ch32v103/context_gcc.S b/libcpu/risc-v/ch32v103/context_gcc.S new file mode 100644 index 0000000000..641837f3f4 --- /dev/null +++ b/libcpu/risc-v/ch32v103/context_gcc.S @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018/10/28 Bernard The unify RISC-V porting implementation + * 2018/12/27 Jesven Add SMP support + */ + +#include "cpuport.h" + +#ifdef RT_USING_SMP +#define rt_hw_interrupt_disable rt_hw_local_irq_disable +#define rt_hw_interrupt_enable rt_hw_local_irq_enable +#endif + +/* + * rt_base_t rt_hw_interrupt_disable(void); + */ + .globl rt_hw_interrupt_disable +rt_hw_interrupt_disable: + csrrci a0, mstatus, 8 + ret + +/* + * void rt_hw_interrupt_enable(rt_base_t level); + */ + .globl rt_hw_interrupt_enable +rt_hw_interrupt_enable: + csrw mstatus, a0 + ret + +/* + * #ifdef RT_USING_SMP + * void rt_hw_context_switch_to(rt_ubase_t to, stuct rt_thread *to_thread); + * #else + * void rt_hw_context_switch_to(rt_ubase_t to); + * #endif + * a0 --> to + * a1 --> to_thread + */ + .globl rt_hw_context_switch_to +rt_hw_context_switch_to: /* ֱл'from',Ҫڿʼʱ */ + la t0, _eusrstack /* ״лǰmainspĴԺжջ */ + csrw mscratch,t0 + + LOAD sp, (a0) /* 'to'̵߳spֵָmcusp */ + +#ifdef RT_USING_SMP /* ˵ģƬ */ + mv a0, a1 + jal rt_cpus_lock_status_restore +#endif + LOAD a0, 2 * REGBYTES(sp) + csrw mstatus, a0 /* ָ'to'̵߳mstatusֵ */ + j rt_hw_context_switch_exit + +/* + * #ifdef RT_USING_SMP + * void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread); + * #else + * void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to); + * #endif + * + * a0 --> from + * a1 --> to + * a2 --> to_thread + */ + .globl rt_hw_context_switch +rt_hw_context_switch: + /* saved from thread context + * x1/ra -> sp(0) + * x1/ra -> sp(1) + * mstatus.mie -> sp(2) + * x(i) -> sp(i-4) + * ﱣ'from'߳ + * ӸĴͨüĴǰ + */ + +#ifdef ARCH_RISCV_FPU + addi sp, sp, -32 * FREGBYTES + + FSTORE f0, 0 * FREGBYTES(sp) + FSTORE f1, 1 * FREGBYTES(sp) + FSTORE f2, 2 * FREGBYTES(sp) + FSTORE f3, 3 * FREGBYTES(sp) + FSTORE f4, 4 * FREGBYTES(sp) + FSTORE f5, 5 * FREGBYTES(sp) + FSTORE f6, 6 * FREGBYTES(sp) + FSTORE f7, 7 * FREGBYTES(sp) + FSTORE f8, 8 * FREGBYTES(sp) + FSTORE f9, 9 * FREGBYTES(sp) + FSTORE f10, 10 * FREGBYTES(sp) + FSTORE f11, 11 * FREGBYTES(sp) + FSTORE f12, 12 * FREGBYTES(sp) + FSTORE f13, 13 * FREGBYTES(sp) + FSTORE f14, 14 * FREGBYTES(sp) + FSTORE f15, 15 * FREGBYTES(sp) + FSTORE f16, 16 * FREGBYTES(sp) + FSTORE f17, 17 * FREGBYTES(sp) + FSTORE f18, 18 * FREGBYTES(sp) + FSTORE f19, 19 * FREGBYTES(sp) + FSTORE f20, 20 * FREGBYTES(sp) + FSTORE f21, 21 * FREGBYTES(sp) + FSTORE f22, 22 * FREGBYTES(sp) + FSTORE f23, 23 * FREGBYTES(sp) + FSTORE f24, 24 * FREGBYTES(sp) + FSTORE f25, 25 * FREGBYTES(sp) + FSTORE f26, 26 * FREGBYTES(sp) + FSTORE f27, 27 * FREGBYTES(sp) + FSTORE f28, 28 * FREGBYTES(sp) + FSTORE f29, 29 * FREGBYTES(sp) + FSTORE f30, 30 * FREGBYTES(sp) + FSTORE f31, 31 * FREGBYTES(sp) +#endif + + addi sp, sp, -32 * REGBYTES /* л߳ǰfromsp32ڴ洢Ĵֵ */ + STORE sp, (a0) /* fromspֵҪʱram´лʱ */ + + STORE x1, 0 * REGBYTES(sp) /* ߳fromtoлra浽ṹepcλ */ + STORE x1, 1 * REGBYTES(sp) /* ra浽raλ */ + + csrr a0, mstatus /* ޸Ϊֱӱmstatus */ + andi a0, a0, 8 + beqz a0, save_mpie + li a0, 0x80 +save_mpie: + STORE a0, 2 * REGBYTES(sp) + + STORE x4, 4 * REGBYTES(sp) + STORE x5, 5 * REGBYTES(sp) + STORE x6, 6 * REGBYTES(sp) + STORE x7, 7 * REGBYTES(sp) + STORE x8, 8 * REGBYTES(sp) + STORE x9, 9 * REGBYTES(sp) + STORE x10, 10 * REGBYTES(sp) + STORE x11, 11 * REGBYTES(sp) + STORE x12, 12 * REGBYTES(sp) + STORE x13, 13 * REGBYTES(sp) + STORE x14, 14 * REGBYTES(sp) + STORE x15, 15 * REGBYTES(sp) + STORE x16, 16 * REGBYTES(sp) + STORE x17, 17 * REGBYTES(sp) + STORE x18, 18 * REGBYTES(sp) + STORE x19, 19 * REGBYTES(sp) + STORE x20, 20 * REGBYTES(sp) + STORE x21, 21 * REGBYTES(sp) + STORE x22, 22 * REGBYTES(sp) + STORE x23, 23 * REGBYTES(sp) + STORE x24, 24 * REGBYTES(sp) + STORE x25, 25 * REGBYTES(sp) + STORE x26, 26 * REGBYTES(sp) + STORE x27, 27 * REGBYTES(sp) + STORE x28, 28 * REGBYTES(sp) + STORE x29, 29 * REGBYTES(sp) + STORE x30, 30 * REGBYTES(sp) + STORE x31, 31 * REGBYTES(sp) + + /* restore to thread context + * sp(0) -> epc; + * sp(1) -> ra; + * sp(i) -> x(i+2) + */ + LOAD sp, (a1) /* ȡ'to'߳spֵ */ + +#ifdef RT_USING_SMP + mv a0, a2 + jal rt_cpus_lock_status_restore +#endif /*RT_USING_SMP*/ + + j rt_hw_context_switch_exit + +#ifdef RT_USING_SMP +/* + * void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread); + * + * a0 --> context + * a1 --> from + * a2 --> to + * a3 --> to_thread + */ + .globl rt_hw_context_switch_interrupt +rt_hw_context_switch_interrupt: + + STORE a0, 0(a1) + + LOAD sp, 0(a2) + move a0, a3 + call rt_cpus_lock_status_restore + + j rt_hw_context_switch_exit + +#endif + +.global rt_hw_context_switch_exit +rt_hw_context_switch_exit: +#ifdef RT_USING_SMP +#ifdef RT_USING_SIGNALS + mv a0, sp + + csrr t0, mhartid + /* switch interrupt stack of current cpu */ + la sp, __stack_start__ + addi t1, t0, 1 + li t2, __STACKSIZE__ + mul t1, t1, t2 + add sp, sp, t1 /* sp = (cpuid + 1) * __STACKSIZE__ + __stack_start__ */ + + call rt_signal_check + mv sp, a0 +#endif +#endif + /* resw ra to mepc */ + LOAD a0, 0 * REGBYTES(sp) /* ൱ڰraֵmepc */ + csrw mepc, a0 + + LOAD x1, 1 * REGBYTES(sp) /* ָra */ + + li t0, 0x00001800 + csrs mstatus, t0 + LOAD a0, 2 * REGBYTES(sp) + # csrw mstatus ,a0 /* ָmstatus */ + csrs mstatus, a0 + + LOAD x4, 4 * REGBYTES(sp) + LOAD x5, 5 * REGBYTES(sp) + LOAD x6, 6 * REGBYTES(sp) + LOAD x7, 7 * REGBYTES(sp) + LOAD x8, 8 * REGBYTES(sp) + LOAD x9, 9 * REGBYTES(sp) + LOAD x10, 10 * REGBYTES(sp) + LOAD x11, 11 * REGBYTES(sp) + LOAD x12, 12 * REGBYTES(sp) + LOAD x13, 13 * REGBYTES(sp) + LOAD x14, 14 * REGBYTES(sp) + LOAD x15, 15 * REGBYTES(sp) + LOAD x16, 16 * REGBYTES(sp) + LOAD x17, 17 * REGBYTES(sp) + LOAD x18, 18 * REGBYTES(sp) + LOAD x19, 19 * REGBYTES(sp) + LOAD x20, 20 * REGBYTES(sp) + LOAD x21, 21 * REGBYTES(sp) + LOAD x22, 22 * REGBYTES(sp) + LOAD x23, 23 * REGBYTES(sp) + LOAD x24, 24 * REGBYTES(sp) + LOAD x25, 25 * REGBYTES(sp) + LOAD x26, 26 * REGBYTES(sp) + LOAD x27, 27 * REGBYTES(sp) + LOAD x28, 28 * REGBYTES(sp) + LOAD x29, 29 * REGBYTES(sp) + LOAD x30, 30 * REGBYTES(sp) + LOAD x31, 31 * REGBYTES(sp) + + addi sp, sp, 32 * REGBYTES /* ָsp */ + +#ifdef ARCH_RISCV_FPU /* Ĵ帡Ĵע߳ջĴС */ + FLOAD f0, 0 * FREGBYTES(sp) + FLOAD f1, 1 * FREGBYTES(sp) + FLOAD f2, 2 * FREGBYTES(sp) + FLOAD f3, 3 * FREGBYTES(sp) + FLOAD f4, 4 * FREGBYTES(sp) + FLOAD f5, 5 * FREGBYTES(sp) + FLOAD f6, 6 * FREGBYTES(sp) + FLOAD f7, 7 * FREGBYTES(sp) + FLOAD f8, 8 * FREGBYTES(sp) + FLOAD f9, 9 * FREGBYTES(sp) + FLOAD f10, 10 * FREGBYTES(sp) + FLOAD f11, 11 * FREGBYTES(sp) + FLOAD f12, 12 * FREGBYTES(sp) + FLOAD f13, 13 * FREGBYTES(sp) + FLOAD f14, 14 * FREGBYTES(sp) + FLOAD f15, 15 * FREGBYTES(sp) + FLOAD f16, 16 * FREGBYTES(sp) + FLOAD f17, 17 * FREGBYTES(sp) + FLOAD f18, 18 * FREGBYTES(sp) + FLOAD f19, 19 * FREGBYTES(sp) + FLOAD f20, 20 * FREGBYTES(sp) + FLOAD f21, 21 * FREGBYTES(sp) + FLOAD f22, 22 * FREGBYTES(sp) + FLOAD f23, 23 * FREGBYTES(sp) + FLOAD f24, 24 * FREGBYTES(sp) + FLOAD f25, 25 * FREGBYTES(sp) + FLOAD f26, 26 * FREGBYTES(sp) + FLOAD f27, 27 * FREGBYTES(sp) + FLOAD f28, 28 * FREGBYTES(sp) + FLOAD f29, 29 * FREGBYTES(sp) + FLOAD f30, 30 * FREGBYTES(sp) + FLOAD f31, 31 * FREGBYTES(sp) + + addi sp, sp, 32 * FREGBYTES +#endif + + mret /* ʱ򷵻صmepc,raֵ */ diff --git a/libcpu/risc-v/ch32v103/cpuport.c b/libcpu/risc-v/ch32v103/cpuport.c new file mode 100644 index 0000000000..89ad71533a --- /dev/null +++ b/libcpu/risc-v/ch32v103/cpuport.c @@ -0,0 +1,166 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018/10/28 Bernard The unify RISC-V porting code. + * 2021/10/08 Walter init mstatus as 0x00001888, calll Software_IRQn + * in rt_hw_context_switch_interrupt() + */ + +#include +#include + +#include "cpuport.h" +#include "ch32v10x.h" +#ifndef RT_USING_SMP +volatile rt_ubase_t rt_interrupt_from_thread = 0; +volatile rt_ubase_t rt_interrupt_to_thread = 0; +volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0; +#endif + +struct rt_hw_stack_frame +{ + rt_ubase_t epc; /* epc - epc - program counter */ + rt_ubase_t ra; /* x1 - ra - return address for jumps */ + rt_ubase_t mstatus; /* - machine status register */ + rt_ubase_t gp; /* x3 - gp - global pointer */ + rt_ubase_t tp; /* x4 - tp - thread pointer */ + rt_ubase_t t0; /* x5 - t0 - temporary register 0 */ + rt_ubase_t t1; /* x6 - t1 - temporary register 1 */ + rt_ubase_t t2; /* x7 - t2 - temporary register 2 */ + rt_ubase_t s0_fp; /* x8 - s0/fp - saved register 0 or frame pointer */ + rt_ubase_t s1; /* x9 - s1 - saved register 1 */ + rt_ubase_t a0; /* x10 - a0 - return value or function argument 0 */ + rt_ubase_t a1; /* x11 - a1 - return value or function argument 1 */ + rt_ubase_t a2; /* x12 - a2 - function argument 2 */ + rt_ubase_t a3; /* x13 - a3 - function argument 3 */ + rt_ubase_t a4; /* x14 - a4 - function argument 4 */ + rt_ubase_t a5; /* x15 - a5 - function argument 5 */ + rt_ubase_t a6; /* x16 - a6 - function argument 6 */ + rt_ubase_t a7; /* x17 - s7 - function argument 7 */ + rt_ubase_t s2; /* x18 - s2 - saved register 2 */ + rt_ubase_t s3; /* x19 - s3 - saved register 3 */ + rt_ubase_t s4; /* x20 - s4 - saved register 4 */ + rt_ubase_t s5; /* x21 - s5 - saved register 5 */ + rt_ubase_t s6; /* x22 - s6 - saved register 6 */ + rt_ubase_t s7; /* x23 - s7 - saved register 7 */ + rt_ubase_t s8; /* x24 - s8 - saved register 8 */ + rt_ubase_t s9; /* x25 - s9 - saved register 9 */ + rt_ubase_t s10; /* x26 - s10 - saved register 10 */ + rt_ubase_t s11; /* x27 - s11 - saved register 11 */ + rt_ubase_t t3; /* x28 - t3 - temporary register 3 */ + rt_ubase_t t4; /* x29 - t4 - temporary register 4 */ + rt_ubase_t t5; /* x30 - t5 - temporary register 5 */ + rt_ubase_t t6; /* x31 - t6 - temporary register 6 */ + +/* ӸĴ */ +#ifdef ARCH_RISCV_FPU + rv_floatreg_t f0; /* f0 */ + rv_floatreg_t f1; /* f1 */ + rv_floatreg_t f2; /* f2 */ + rv_floatreg_t f3; /* f3 */ + rv_floatreg_t f4; /* f4 */ + rv_floatreg_t f5; /* f5 */ + rv_floatreg_t f6; /* f6 */ + rv_floatreg_t f7; /* f7 */ + rv_floatreg_t f8; /* f8 */ + rv_floatreg_t f9; /* f9 */ + rv_floatreg_t f10; /* f10 */ + rv_floatreg_t f11; /* f11 */ + rv_floatreg_t f12; /* f12 */ + rv_floatreg_t f13; /* f13 */ + rv_floatreg_t f14; /* f14 */ + rv_floatreg_t f15; /* f15 */ + rv_floatreg_t f16; /* f16 */ + rv_floatreg_t f17; /* f17 */ + rv_floatreg_t f18; /* f18 */ + rv_floatreg_t f19; /* f19 */ + rv_floatreg_t f20; /* f20 */ + rv_floatreg_t f21; /* f21 */ + rv_floatreg_t f22; /* f22 */ + rv_floatreg_t f23; /* f23 */ + rv_floatreg_t f24; /* f24 */ + rv_floatreg_t f25; /* f25 */ + rv_floatreg_t f26; /* f26 */ + rv_floatreg_t f27; /* f27 */ + rv_floatreg_t f28; /* f28 */ + rv_floatreg_t f29; /* f29 */ + rv_floatreg_t f30; /* f30 */ + rv_floatreg_t f31; /* f31 */ +#endif +}; + +/** + * This function will initialize thread stack + * + * @param tentry the entry of thread + * @param parameter the parameter of entry + * @param stack_addr the beginning stack address + * @param texit the function will be called when thread exit + * + * @return stack address + */ +rt_uint8_t *rt_hw_stack_init(void *tentry, + void *parameter, + rt_uint8_t *stack_addr, + void *texit) +{ + struct rt_hw_stack_frame *frame; + rt_uint8_t *stk; + int i; + + stk = stack_addr + sizeof(rt_ubase_t); + stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_ubase_t)stk, REGBYTES); + stk -= sizeof(struct rt_hw_stack_frame); + + frame = (struct rt_hw_stack_frame *)stk; + + for (i = 0; i < sizeof(struct rt_hw_stack_frame) / sizeof(rt_ubase_t); i++) + { + ((rt_ubase_t *)frame)[i] = 0xdeadbeef; + } + + frame->ra = (rt_ubase_t)texit; + frame->a0 = (rt_ubase_t)parameter; + frame->epc = (rt_ubase_t)tentry; /* ʼΪڣmret֮һлӦеִ */ + + /* force to machine mode(MPP=11) and set MPIE to 1 */ + frame->mstatus = 0x00001888; //mstatus ʼ + return stk; +} + +/* + * #ifdef RT_USING_SMP + * void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread); + * #else + * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to); + * #endif + */ +#ifndef RT_USING_SMP +void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to) +{ + if (rt_thread_switch_interrupt_flag == 0) + rt_interrupt_from_thread = from; + + rt_interrupt_to_thread = to; + rt_thread_switch_interrupt_flag = 1; + NVIC_SetPendingIRQ(Software_IRQn); /* жл߳ */ + return ; +} +#endif /* end of RT_USING_SMP */ + +/** shutdown CPU */ +RT_WEAK void rt_hw_cpu_shutdown() +{ + rt_uint32_t level; + rt_kprintf("shutdown...\n"); + + level = rt_hw_interrupt_disable(); + while (level) + { + RT_ASSERT(0); + } +} diff --git a/libcpu/risc-v/ch32v103/cpuport.h b/libcpu/risc-v/ch32v103/cpuport.h new file mode 100644 index 0000000000..b59746756e --- /dev/null +++ b/libcpu/risc-v/ch32v103/cpuport.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-10-03 Bernard The first version + * 2020/11/20 BalanceTWK Add FPU support + */ + +#ifndef CPUPORT_H__ +#define CPUPORT_H__ + +#include + +/* bytes of register width */ +#ifdef ARCH_CPU_64BIT +#define STORE sd +#define LOAD ld +#define REGBYTES 8 +#else +#define STORE sw +#define LOAD lw +#define REGBYTES 4 +#endif + +/* ӸĴ */ +#ifdef ARCH_RISCV_FPU +#ifdef ARCH_RISCV_FPU_D +#define FSTORE fsd +#define FLOAD fld +#define FREGBYTES 8 +#define rv_floatreg_t rt_int64_t +#endif +#ifdef ARCH_RISCV_FPU_S +#define FSTORE fsw +#define FLOAD flw +#define FREGBYTES 4 +#define rv_floatreg_t rt_int32_t +#endif +#endif + +#endif diff --git a/libcpu/risc-v/ch32v103/cpuport.s b/libcpu/risc-v/ch32v103/cpuport.s new file mode 100644 index 0000000000..915d59ea6f --- /dev/null +++ b/libcpu/risc-v/ch32v103/cpuport.s @@ -0,0 +1,27797 @@ + .file "cpuport.c" + .option nopic + .text +.Ltext0: + .cfi_sections .debug_frame + .section .text.rt_hw_stack_init,"ax",@progbits + .align 1 + .globl rt_hw_stack_init + .type rt_hw_stack_init, @function +rt_hw_stack_init: +.LFB29: + .file 1 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\libcpu\\risc-v\\ch32v103\\cpuport.c" + .loc 1 108 1 + .cfi_startproc +.LVL0: + mv a6,a0 + .loc 1 109 5 + .loc 1 110 5 + .loc 1 111 5 + .loc 1 113 5 +.LVL1: + .loc 1 114 5 + .loc 1 113 9 is_stmt 0 + addi a2,a2,4 +.LVL2: + .loc 1 114 44 + andi a2,a2,-4 +.LVL3: + .loc 1 115 5 is_stmt 1 + .loc 1 115 9 is_stmt 0 + addi a0,a2,-128 +.LVL4: + .loc 1 117 5 is_stmt 1 + .loc 1 119 5 + mv a5,a0 + .loc 1 121 34 is_stmt 0 + li a4,-559038464 + addi a4,a4,-273 +.LVL5: +.L2: + .loc 1 121 9 is_stmt 1 discriminator 3 + .loc 1 121 34 is_stmt 0 discriminator 3 + sw a4,0(a5) + addi a5,a5,4 + .loc 1 119 5 discriminator 3 + bne a2,a5,.L2 + .loc 1 124 5 is_stmt 1 + .loc 1 124 15 is_stmt 0 + sw a3,-124(a2) + .loc 1 125 5 is_stmt 1 + .loc 1 125 15 is_stmt 0 + sw a1,-88(a2) + .loc 1 126 5 is_stmt 1 + .loc 1 126 16 is_stmt 0 + sw a6,-128(a2) + .loc 1 130 6 is_stmt 1 + .loc 1 130 21 is_stmt 0 + li a5,8192 + addi a5,a5,-1912 + sw a5,-120(a2) + .loc 1 131 5 is_stmt 1 + .loc 1 132 1 is_stmt 0 + ret + .cfi_endproc +.LFE29: + .size rt_hw_stack_init, .-rt_hw_stack_init + .section .text.rt_hw_context_switch_interrupt,"ax",@progbits + .align 1 + .globl rt_hw_context_switch_interrupt + .type rt_hw_context_switch_interrupt, @function +rt_hw_context_switch_interrupt: +.LFB30: + .loc 1 143 1 is_stmt 1 + .cfi_startproc +.LVL6: + .loc 1 144 5 + .loc 1 144 41 is_stmt 0 + lui a5,%hi(.LANCHOR0) + lw a5,%lo(.LANCHOR0)(a5) + .loc 1 144 8 + bnez a5,.L5 + .loc 1 145 9 is_stmt 1 + .loc 1 145 34 is_stmt 0 + lui a5,%hi(.LANCHOR1) + sw a0,%lo(.LANCHOR1)(a5) +.L5: + .loc 1 147 5 is_stmt 1 + .loc 1 147 28 is_stmt 0 + lui a5,%hi(.LANCHOR2) + sw a1,%lo(.LANCHOR2)(a5) + .loc 1 148 5 is_stmt 1 + .loc 1 148 37 is_stmt 0 + lui a5,%hi(.LANCHOR0) + li a4,1 + sw a4,%lo(.LANCHOR0)(a5) + .loc 1 149 5 is_stmt 1 +.LVL7: +.LBB4: +.LBB5: + .file 2 "libraries\\Core/core_riscv.h" + .loc 2 173 3 + .loc 2 173 62 is_stmt 0 + li a5,-536813568 + li a4,16384 + sw a4,512(a5) +.LVL8: +.LBE5: +.LBE4: + .loc 1 151 5 is_stmt 1 + .loc 1 152 1 is_stmt 0 + ret + .cfi_endproc +.LFE30: + .size rt_hw_context_switch_interrupt, .-rt_hw_context_switch_interrupt + .section .text.rt_hw_cpu_shutdown,"ax",@progbits + .align 1 + .globl rt_hw_cpu_shutdown + .type rt_hw_cpu_shutdown, @function +rt_hw_cpu_shutdown: +.LFB31: + .loc 1 157 1 is_stmt 1 + .cfi_startproc + addi sp,sp,-16 + .cfi_def_cfa_offset 16 + sw ra,12(sp) + sw s0,8(sp) + sw s1,4(sp) + .cfi_offset 1, -4 + .cfi_offset 8, -8 + .cfi_offset 9, -12 + .loc 1 158 5 + .loc 1 159 5 + lui a0,%hi(.LC0) + addi a0,a0,%lo(.LC0) + call rt_kprintf +.LVL9: + .loc 1 161 5 + .loc 1 161 13 is_stmt 0 + call rt_hw_interrupt_disable +.LVL10: + .loc 1 162 5 is_stmt 1 + .loc 1 164 65 + .loc 1 162 11 is_stmt 0 + beqz a0,.L6 + .loc 1 164 21 + lui s1,%hi(.LANCHOR3) + lui s0,%hi(.LC1) +.LVL11: +.L8: + .loc 1 164 9 is_stmt 1 discriminator 1 + .loc 1 164 21 discriminator 1 + li a2,164 + addi a1,s1,%lo(.LANCHOR3) + addi a0,s0,%lo(.LC1) + call rt_assert_handler +.LVL12: + .loc 1 164 65 discriminator 1 + j .L8 +.LVL13: +.L6: + .loc 1 166 1 is_stmt 0 + lw ra,12(sp) + .cfi_restore 1 + lw s0,8(sp) + .cfi_restore 8 + lw s1,4(sp) + .cfi_restore 9 + addi sp,sp,16 + .cfi_def_cfa_offset 0 + jr ra + .cfi_endproc +.LFE31: + .size rt_hw_cpu_shutdown, .-rt_hw_cpu_shutdown + .globl rt_thread_switch_interrupt_flag + .globl rt_interrupt_to_thread + .globl rt_interrupt_from_thread + .section .rodata.__FUNCTION__.4865,"a" + .align 2 + .set .LANCHOR3,. + 0 + .type __FUNCTION__.4865, @object + .size __FUNCTION__.4865, 19 +__FUNCTION__.4865: + .string "rt_hw_cpu_shutdown" + .section .rodata.rt_hw_cpu_shutdown.str1.4,"aMS",@progbits,1 + .align 2 +.LC0: + .string "shutdown...\n" + .zero 3 +.LC1: + .string "0" + .section .sbss.rt_interrupt_from_thread,"aw",@nobits + .align 2 + .set .LANCHOR1,. + 0 + .type rt_interrupt_from_thread, @object + .size rt_interrupt_from_thread, 4 +rt_interrupt_from_thread: + .zero 4 + .section .sbss.rt_interrupt_to_thread,"aw",@nobits + .align 2 + .set .LANCHOR2,. + 0 + .type rt_interrupt_to_thread, @object + .size rt_interrupt_to_thread, 4 +rt_interrupt_to_thread: + .zero 4 + .section .sbss.rt_thread_switch_interrupt_flag,"aw",@nobits + .align 2 + .set .LANCHOR0,. + 0 + .type rt_thread_switch_interrupt_flag, @object + .size rt_thread_switch_interrupt_flag, 4 +rt_thread_switch_interrupt_flag: + .zero 4 + .text +.Letext0: + .file 3 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\include/rtdef.h" + .file 4 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\machine\\_default_types.h" + .file 5 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\sys\\lock.h" + .file 6 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\sys\\_types.h" + .file 7 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\lib\\gcc\\riscv-none-embed\\8.2.0\\include\\stddef.h" + .file 8 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\sys\\reent.h" + .file 9 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\sys\\_stdint.h" + .file 10 "e:\\devboard\\artt\\env_riscv_1.1.3\\tools\\gnu_gcc\\risc-v\\riscv-none-embed\\include\\time.h" + .file 11 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\include/rtthread.h" + .file 12 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\components\\finsh/finsh_api.h" + .file 13 "libraries\\WCH32V103_std_peripheral\\inc/ch32v10x.h" + .file 14 "libraries\\WCH32V103_std_peripheral/system_ch32v10x.h" + .file 15 "libraries\\WCH32V103_std_peripheral\\inc/ch32v10x_usb.h" + .file 16 "libraries\\WCH32V103_std_peripheral\\inc/ch32v10x_usb_host.h" + .file 17 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\include/rthw.h" + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0x12a0 + .2byte 0x4 + .4byte .Ldebug_abbrev0 + .byte 0x4 + .byte 0x1 + .4byte .LASF4805 + .byte 0xc + .4byte .LASF4806 + .4byte .LASF4807 + .4byte .Ldebug_ranges0+0 + .4byte 0 + .4byte .Ldebug_line0 + .4byte .Ldebug_macro0 + .byte 0x2 + .byte 0x1 + .byte 0x6 + .4byte .LASF4550 + .byte 0x2 + .byte 0x2 + .byte 0x5 + .4byte .LASF4551 + .byte 0x3 + .byte 0x4 + .byte 0x5 + .string "int" + .byte 0x4 + .4byte .LASF4554 + .byte 0x3 + .byte 0x47 + .byte 0x17 + .4byte 0x4a + .byte 0x2 + .byte 0x1 + .byte 0x8 + .4byte .LASF4552 + .byte 0x2 + .byte 0x2 + .byte 0x7 + .4byte .LASF4553 + .byte 0x4 + .4byte .LASF4555 + .byte 0x3 + .byte 0x49 + .byte 0x16 + .4byte 0x69 + .byte 0x5 + .4byte 0x58 + .byte 0x2 + .byte 0x4 + .byte 0x7 + .4byte .LASF4556 + .byte 0x2 + .byte 0x8 + .byte 0x5 + .4byte .LASF4557 + .byte 0x2 + .byte 0x8 + .byte 0x7 + .4byte .LASF4558 + .byte 0x2 + .byte 0x4 + .byte 0x5 + .4byte .LASF4559 + .byte 0x4 + .4byte .LASF4560 + .byte 0x3 + .byte 0x56 + .byte 0x17 + .4byte 0x96 + .byte 0x5 + .4byte 0x85 + .byte 0x2 + .byte 0x4 + .byte 0x7 + .4byte .LASF4561 + .byte 0x4 + .4byte .LASF4562 + .byte 0x3 + .byte 0x5c + .byte 0x14 + .4byte 0x85 + .byte 0x6 + .4byte 0xb9 + .4byte 0xb9 + .byte 0x7 + .4byte 0x69 + .byte 0x7 + .byte 0 + .byte 0x2 + .byte 0x1 + .byte 0x6 + .4byte .LASF1174 + .byte 0x8 + .4byte 0xb9 + .byte 0x9 + .byte 0x4 + .byte 0xa + .byte 0x4 + .4byte 0x3e + .byte 0xa + .byte 0x4 + .4byte 0xc0 + .byte 0xa + .byte 0x4 + .4byte 0xb9 + .byte 0x4 + .4byte .LASF4563 + .byte 0x4 + .byte 0x2b + .byte 0x17 + .4byte 0x4a + .byte 0x4 + .4byte .LASF4564 + .byte 0x4 + .byte 0x4f + .byte 0x1b + .4byte 0x96 + .byte 0x2 + .byte 0x10 + .byte 0x4 + .4byte .LASF4565 + .byte 0x4 + .4byte .LASF4566 + .byte 0x5 + .byte 0x22 + .byte 0x19 + .4byte 0x104 + .byte 0xa + .byte 0x4 + .4byte 0x10a + .byte 0xb + .4byte .LASF4673 + .byte 0x4 + .4byte .LASF4567 + .byte 0x6 + .byte 0x2c + .byte 0xe + .4byte 0x7e + .byte 0x4 + .4byte .LASF4568 + .byte 0x6 + .byte 0x72 + .byte 0xe + .4byte 0x7e + .byte 0x4 + .4byte .LASF4569 + .byte 0x6 + .byte 0x91 + .byte 0x14 + .4byte 0x37 + .byte 0xc + .4byte .LASF4570 + .byte 0x7 + .2byte 0x165 + .byte 0x16 + .4byte 0x69 + .byte 0xd + .byte 0x4 + .byte 0x6 + .byte 0xa6 + .byte 0x3 + .4byte 0x162 + .byte 0xe + .4byte .LASF4571 + .byte 0x6 + .byte 0xa8 + .byte 0xc + .4byte 0x133 + .byte 0xe + .4byte .LASF4572 + .byte 0x6 + .byte 0xa9 + .byte 0x13 + .4byte 0x162 + .byte 0 + .byte 0x6 + .4byte 0x4a + .4byte 0x172 + .byte 0x7 + .4byte 0x69 + .byte 0x3 + .byte 0 + .byte 0xf + .byte 0x8 + .byte 0x6 + .byte 0xa3 + .byte 0x9 + .4byte 0x196 + .byte 0x10 + .4byte .LASF4573 + .byte 0x6 + .byte 0xa5 + .byte 0x7 + .4byte 0x37 + .byte 0 + .byte 0x10 + .4byte .LASF4574 + .byte 0x6 + .byte 0xaa + .byte 0x5 + .4byte 0x140 + .byte 0x4 + .byte 0 + .byte 0x4 + .4byte .LASF4575 + .byte 0x6 + .byte 0xab + .byte 0x3 + .4byte 0x172 + .byte 0x4 + .4byte .LASF4576 + .byte 0x6 + .byte 0xaf + .byte 0x11 + .4byte 0xf8 + .byte 0x4 + .4byte .LASF4577 + .byte 0x8 + .byte 0x16 + .byte 0x17 + .4byte 0x96 + .byte 0x11 + .4byte .LASF4582 + .byte 0x18 + .byte 0x8 + .byte 0x2f + .byte 0x8 + .4byte 0x214 + .byte 0x10 + .4byte .LASF4578 + .byte 0x8 + .byte 0x31 + .byte 0x13 + .4byte 0x214 + .byte 0 + .byte 0x12 + .string "_k" + .byte 0x8 + .byte 0x32 + .byte 0x7 + .4byte 0x37 + .byte 0x4 + .byte 0x10 + .4byte .LASF4579 + .byte 0x8 + .byte 0x32 + .byte 0xb + .4byte 0x37 + .byte 0x8 + .byte 0x10 + .4byte .LASF4580 + .byte 0x8 + .byte 0x32 + .byte 0x14 + .4byte 0x37 + .byte 0xc + .byte 0x10 + .4byte .LASF4581 + .byte 0x8 + .byte 0x32 + .byte 0x1b + .4byte 0x37 + .byte 0x10 + .byte 0x12 + .string "_x" + .byte 0x8 + .byte 0x33 + .byte 0xb + .4byte 0x21a + .byte 0x14 + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0x1ba + .byte 0x6 + .4byte 0x1ae + .4byte 0x22a + .byte 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.LASF4593 + .byte 0x8 + .byte 0x62 + .byte 0x1e + .4byte 0x2ad + .byte 0x88 + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0x302 + .byte 0x6 + .4byte 0x35b + .4byte 0x35b + .byte 0x7 + .4byte 0x69 + .byte 0x1f + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0x361 + .byte 0x15 + .byte 0x11 + .4byte .LASF4601 + .byte 0x8 + .byte 0x8 + .byte 0x75 + .byte 0x8 + .4byte 0x38a + .byte 0x10 + .4byte .LASF4602 + .byte 0x8 + .byte 0x76 + .byte 0x11 + .4byte 0x38a + .byte 0 + .byte 0x10 + .4byte .LASF4603 + .byte 0x8 + .byte 0x77 + .byte 0x6 + .4byte 0x37 + .byte 0x4 + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0x4a + .byte 0x11 + .4byte .LASF4604 + .byte 0x68 + .byte 0x8 + .byte 0xb5 + .byte 0x8 + .4byte 0x4d3 + .byte 0x12 + .string "_p" + .byte 0x8 + .byte 0xb6 + .byte 0x12 + .4byte 0x38a + .byte 0 + .byte 0x12 + .string "_r" + .byte 0x8 + .byte 0xb7 + .byte 0x7 + .4byte 0x37 + .byte 0x4 + .byte 0x12 + .string "_w" + .byte 0x8 + .byte 0xb8 + .byte 0x7 + .4byte 0x37 + .byte 0x8 + .byte 0x10 + .4byte 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.byte 0 + .byte 0x16 + .4byte 0x127 + .4byte 0x4f1 + .byte 0x17 + .4byte 0x4f1 + .byte 0x17 + .4byte 0xc5 + .byte 0x17 + .4byte 0xd3 + .byte 0x17 + .4byte 0x37 + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0x4fc + .byte 0x8 + .4byte 0x4f1 + .byte 0x18 + .4byte .LASF4621 + .2byte 0x428 + .byte 0x8 + .2byte 0x239 + .byte 0x8 + .4byte 0x645 + .byte 0x19 + .4byte .LASF4622 + .byte 0x8 + .2byte 0x23b + .byte 0x7 + .4byte 0x37 + .byte 0 + .byte 0x19 + .4byte .LASF4623 + .byte 0x8 + .2byte 0x240 + .byte 0xb + .4byte 0x719 + .byte 0x4 + .byte 0x19 + .4byte .LASF4624 + .byte 0x8 + .2byte 0x240 + .byte 0x14 + .4byte 0x719 + .byte 0x8 + .byte 0x19 + .4byte .LASF4625 + .byte 0x8 + .2byte 0x240 + .byte 0x1e + .4byte 0x719 + .byte 0xc + .byte 0x19 + .4byte .LASF4626 + .byte 0x8 + .2byte 0x242 + .byte 0x7 + .4byte 0x37 + .byte 0x10 + .byte 0x19 + .4byte .LASF4627 + .byte 0x8 + .2byte 0x243 + .byte 0x8 + .4byte 0x909 + .byte 0x14 + .byte 0x19 + .4byte .LASF4628 + .byte 0x8 + .2byte 0x246 + .byte 0x7 + .4byte 0x37 + .byte 0x30 + .byte 0x19 + .4byte .LASF4629 + .byte 0x8 + .2byte 0x247 + .byte 0x16 + .4byte 0x91e + .byte 0x34 + .byte 0x19 + .4byte .LASF4630 + .byte 0x8 + .2byte 0x249 + .byte 0x7 + .4byte 0x37 + .byte 0x38 + .byte 0x19 + .4byte .LASF4631 + .byte 0x8 + .2byte 0x24b + .byte 0xa + .4byte 0x92f + .byte 0x3c + .byte 0x19 + .4byte .LASF4632 + .byte 0x8 + .2byte 0x24e + .byte 0x13 + .4byte 0x214 + .byte 0x40 + .byte 0x19 + .4byte .LASF4633 + .byte 0x8 + .2byte 0x24f + .byte 0x7 + .4byte 0x37 + .byte 0x44 + .byte 0x19 + .4byte .LASF4634 + .byte 0x8 + .2byte 0x250 + .byte 0x13 + .4byte 0x214 + .byte 0x48 + .byte 0x19 + .4byte .LASF4635 + .byte 0x8 + .2byte 0x251 + .byte 0x14 + .4byte 0x935 + .byte 0x4c + .byte 0x19 + .4byte .LASF4636 + .byte 0x8 + .2byte 0x254 + .byte 0x7 + .4byte 0x37 + .byte 0x50 + .byte 0x19 + .4byte .LASF4637 + .byte 0x8 + .2byte 0x255 + .byte 0x9 + .4byte 0xd3 + .byte 0x54 + .byte 0x19 + .4byte .LASF4638 + .byte 0x8 + .2byte 0x278 + .byte 0x7 + .4byte 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.byte 0x10 + .4byte 0x85 + .byte 0x38 + .byte 0x12 + .string "a5" + .byte 0x1 + .byte 0x27 + .byte 0x10 + .4byte 0x85 + .byte 0x3c + .byte 0x12 + .string "a6" + .byte 0x1 + .byte 0x28 + .byte 0x10 + .4byte 0x85 + .byte 0x40 + .byte 0x12 + .string "a7" + .byte 0x1 + .byte 0x29 + .byte 0x10 + .4byte 0x85 + .byte 0x44 + .byte 0x12 + .string "s2" + .byte 0x1 + .byte 0x2a + .byte 0x10 + .4byte 0x85 + .byte 0x48 + .byte 0x12 + .string "s3" + .byte 0x1 + .byte 0x2b + .byte 0x10 + .4byte 0x85 + .byte 0x4c + .byte 0x12 + .string "s4" + .byte 0x1 + .byte 0x2c + .byte 0x10 + .4byte 0x85 + .byte 0x50 + .byte 0x12 + .string "s5" + .byte 0x1 + .byte 0x2d + .byte 0x10 + .4byte 0x85 + .byte 0x54 + .byte 0x12 + .string "s6" + .byte 0x1 + .byte 0x2e + .byte 0x10 + .4byte 0x85 + .byte 0x58 + .byte 0x12 + .string "s7" + .byte 0x1 + .byte 0x2f + .byte 0x10 + .4byte 0x85 + .byte 0x5c + .byte 0x12 + .string "s8" + .byte 0x1 + .byte 0x30 + .byte 0x10 + .4byte 0x85 + .byte 0x60 + .byte 0x12 + .string "s9" + .byte 0x1 + .byte 0x31 + .byte 0x10 + .4byte 0x85 + .byte 0x64 + .byte 0x12 + .string "s10" + .byte 0x1 + .byte 0x32 + .byte 0x10 + .4byte 0x85 + .byte 0x68 + .byte 0x12 + .string "s11" + .byte 0x1 + .byte 0x33 + .byte 0x10 + .4byte 0x85 + .byte 0x6c + .byte 0x12 + .string "t3" + .byte 0x1 + .byte 0x34 + .byte 0x10 + .4byte 0x85 + .byte 0x70 + .byte 0x12 + .string "t4" + .byte 0x1 + .byte 0x35 + .byte 0x10 + .4byte 0x85 + .byte 0x74 + .byte 0x12 + .string "t5" + .byte 0x1 + .byte 0x36 + .byte 0x10 + .4byte 0x85 + .byte 0x78 + .byte 0x12 + .string "t6" + .byte 0x1 + .byte 0x37 + .byte 0x10 + .4byte 0x85 + .byte 0x7c + .byte 0 + .byte 0x29 + .4byte .LASF4793 + .byte 0x1 + .byte 0x9c + .byte 0x6 + .4byte .LFB31 + .4byte .LFE31-.LFB31 + .byte 0x1 + .byte 0x9c + .4byte 0x1179 + .byte 0x2a + .4byte .LASF4800 + .byte 0x1 + .byte 0x9e + .byte 0x11 + .4byte 0x58 + .4byte .LLST5 + .byte 0x2b + .4byte .LASF4809 + .4byte 0x1189 + .byte 0x5 + .byte 0x3 + .4byte __FUNCTION__.4865 + .byte 0x2c + .4byte .LVL9 + .4byte 0x127d + .4byte 0x114d + .byte 0x2d + .byte 0x1 + .byte 0x5a + .byte 0x5 + .byte 0x3 + .4byte .LC0 + .byte 0 + .byte 0x2e + .4byte .LVL10 + .4byte 0x128a + .byte 0x2f + .4byte .LVL12 + .4byte 0x1296 + .byte 0x2d + .byte 0x1 + .byte 0x5a + .byte 0x5 + .byte 0x3 + .4byte .LC1 + .byte 0x2d + .byte 0x1 + .byte 0x5b + .byte 0x5 + .byte 0x3 + .4byte .LANCHOR3 + .byte 0x2d + .byte 0x1 + .byte 0x5c + .byte 0x2 + .byte 0x8 + .byte 0xa4 + .byte 0 + .byte 0 + .byte 0x6 + .4byte 0xc0 + .4byte 0x1189 + .byte 0x7 + .4byte 0x69 + .byte 0x12 + .byte 0 + .byte 0x8 + .4byte 0x1179 + .byte 0x29 + .4byte .LASF4794 + .byte 0x1 + .byte 0x8e + .byte 0x6 + .4byte .LFB30 + .4byte .LFE30-.LFB30 + .byte 0x1 + .byte 0x9c + .4byte 0x11da + .byte 0x30 + .4byte .LASF4795 + .byte 0x1 + .byte 0x8e + .byte 0x30 + .4byte 0x85 + .byte 0x1 + .byte 0x5a + .byte 0x31 + .string "to" + .byte 0x1 + .byte 0x8e + .byte 0x41 + .4byte 0x85 + .byte 0x1 + .byte 0x5b + .byte 0x32 + .4byte 0x1263 + .4byte .LBB4 + .4byte .LBE4-.LBB4 + .byte 0x1 + .byte 0x95 + .byte 0x5 + .byte 0x33 + .4byte 0x1270 + .4byte .LLST4 + .byte 0 + .byte 0 + .byte 0x34 + .4byte .LASF4810 + .byte 0x1 + .byte 0x68 + .byte 0xd + .4byte 0xc7 + .4byte .LFB29 + .4byte .LFE29-.LFB29 + .byte 0x1 + .byte 0x9c + .4byte 0x125d + .byte 0x35 + .4byte .LASF4796 + .byte 0x1 + .byte 0x68 + .byte 0x24 + .4byte 0xc5 + .4byte .LLST0 + .byte 0x30 + .4byte .LASF4797 + .byte 0x1 + .byte 0x69 + .byte 0x24 + .4byte 0xc5 + .byte 0x1 + .byte 0x5b + .byte 0x35 + .4byte .LASF4798 + .byte 0x1 + .byte 0x6a + .byte 0x2a + .4byte 0xc7 + .4byte .LLST1 + .byte 0x30 + .4byte .LASF4799 + .byte 0x1 + .byte 0x6b + .byte 0x24 + .4byte 0xc5 + .byte 0x1 + .byte 0x5d + .byte 0x36 + .4byte .LASF4801 + .byte 0x1 + .byte 0x6d + .byte 0x1f + .4byte 0x125d + .byte 0x1 + .byte 0x5a + .byte 0x37 + .string "stk" + .byte 0x1 + .byte 0x6e + .byte 0x11 + .4byte 0xc7 + .4byte .LLST2 + .byte 0x37 + .string "i" + .byte 0x1 + .byte 0x6f + .byte 0x9 + .4byte 0x37 + .4byte .LLST3 + .byte 0 + .byte 0xa + .byte 0x4 + .4byte 0xf6e + .byte 0x38 + .4byte .LASF4811 + .byte 0x2 + .byte 0xab + .byte 0x14 + .byte 0x3 + .4byte 0x127d + .byte 0x39 + .4byte .LASF4808 + .byte 0x2 + .byte 0xab + .byte 0x31 + .4byte 0xb7c + .byte 0 + .byte 0x3a + .4byte .LASF4802 + .4byte .LASF4802 + .byte 0xb + .2byte 0x209 + .byte 0x6 + .byte 0x3b + .4byte .LASF4803 + .4byte .LASF4803 + .byte 0x11 + .byte 0x69 + .byte 0xb + .byte 0x3a + .4byte .LASF4804 + .4byte .LASF4804 + .byte 0xb + .2byte 0x248 + .byte 0x6 + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .byte 0x1 + .byte 0x11 + .byte 0x1 + .byte 0x25 + .byte 0xe + .byte 0x13 + .byte 0xb + .byte 0x3 + .byte 0xe + .byte 0x1b + .byte 0xe + .byte 0x55 + .byte 0x17 + .byte 0x11 + .byte 0x1 + .byte 0x10 + .byte 0x17 + .byte 0x99,0x42 + .byte 0x17 + .byte 0 + .byte 0 + .byte 0x2 + .byte 0x24 + .byte 0 + .byte 0xb + .byte 0xb + .byte 0x3e + .byte 0xb + .byte 0x3 + .byte 0xe + .byte 0 + .byte 0 + .byte 0x3 + .byte 0x24 + .byte 0 + .byte 0xb + .byte 0xb + .byte 0x3e + .byte 0xb + .byte 0x3 + .byte 0x8 + .byte 0 + .byte 0 + .byte 0x4 + .byte 0x16 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x5 + .byte 0x35 + .byte 0 + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x6 + .byte 0x1 + .byte 0x1 + .byte 0x49 + .byte 0x13 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x7 + .byte 0x21 + .byte 0 + .byte 0x49 + .byte 0x13 + .byte 0x2f + .byte 0xb + .byte 0 + .byte 0 + .byte 0x8 + .byte 0x26 + .byte 0 + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x9 + .byte 0xf + .byte 0 + .byte 0xb + .byte 0xb + .byte 0 + .byte 0 + .byte 0xa + .byte 0xf + .byte 0 + .byte 0xb + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0xb + .byte 0x13 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3c + .byte 0x19 + .byte 0 + .byte 0 + .byte 0xc + .byte 0x16 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0xd + .byte 0x17 + .byte 0x1 + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0xe + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0xf + .byte 0x13 + .byte 0x1 + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x10 + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x38 + .byte 0xb + .byte 0 + .byte 0 + .byte 0x11 + .byte 0x13 + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x12 + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0x8 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x38 + .byte 0xb + .byte 0 + .byte 0 + .byte 0x13 + .byte 0x13 + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0xb + .byte 0x5 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x14 + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x38 + .byte 0x5 + .byte 0 + .byte 0 + .byte 0x15 + .byte 0x15 + .byte 0 + .byte 0x27 + .byte 0x19 + .byte 0 + .byte 0 + .byte 0x16 + .byte 0x15 + .byte 0x1 + .byte 0x27 + .byte 0x19 + .byte 0x49 + .byte 0x13 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x17 + .byte 0x5 + .byte 0 + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x18 + .byte 0x13 + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0xb + .byte 0x5 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x19 + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x38 + .byte 0xb + .byte 0 + .byte 0 + .byte 0x1a + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x38 + .byte 0x5 + .byte 0 + .byte 0 + .byte 0x1b + .byte 0x13 + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x1c + .byte 0x13 + .byte 0x1 + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x1d + .byte 0x17 + .byte 0x1 + .byte 0xb + .byte 0xb + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x1e + .byte 0xd + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x1f + .byte 0x15 + .byte 0x1 + .byte 0x27 + .byte 0x19 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x20 + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x3f + .byte 0x19 + .byte 0x3c + .byte 0x19 + .byte 0 + .byte 0 + .byte 0x21 + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x3f + .byte 0x19 + .byte 0x3c + .byte 0x19 + .byte 0 + .byte 0 + .byte 0x22 + .byte 0x15 + .byte 0 + .byte 0x27 + .byte 0x19 + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x23 + .byte 0x4 + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0x3e + .byte 0xb + .byte 0xb + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x24 + .byte 0x28 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x1c + .byte 0xb + .byte 0 + .byte 0 + .byte 0x25 + .byte 0x13 + .byte 0x1 + .byte 0xb + .byte 0x5 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x26 + .byte 0x21 + .byte 0 + .byte 0x49 + .byte 0x13 + .byte 0x2f + .byte 0x5 + .byte 0 + .byte 0 + .byte 0x27 + .byte 0x21 + .byte 0 + .byte 0 + .byte 0 + .byte 0x28 + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x3f + .byte 0x19 + .byte 0x2 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x29 + .byte 0x2e + .byte 0x1 + .byte 0x3f + .byte 0x19 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x27 + .byte 0x19 + .byte 0x11 + .byte 0x1 + .byte 0x12 + .byte 0x6 + .byte 0x40 + .byte 0x18 + .byte 0x97,0x42 + .byte 0x19 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x2a + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x17 + .byte 0 + .byte 0 + .byte 0x2b + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x49 + .byte 0x13 + .byte 0x34 + .byte 0x19 + .byte 0x2 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x2c + .byte 0x89,0x82,0x1 + .byte 0x1 + .byte 0x11 + .byte 0x1 + .byte 0x31 + .byte 0x13 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x2d + .byte 0x8a,0x82,0x1 + .byte 0 + .byte 0x2 + .byte 0x18 + .byte 0x91,0x42 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x2e + .byte 0x89,0x82,0x1 + .byte 0 + .byte 0x11 + .byte 0x1 + .byte 0x31 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x2f + .byte 0x89,0x82,0x1 + .byte 0x1 + .byte 0x11 + .byte 0x1 + .byte 0x31 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x30 + .byte 0x5 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x31 + .byte 0x5 + .byte 0 + .byte 0x3 + .byte 0x8 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x32 + .byte 0x1d + .byte 0x1 + .byte 0x31 + .byte 0x13 + .byte 0x11 + .byte 0x1 + .byte 0x12 + .byte 0x6 + .byte 0x58 + .byte 0xb + .byte 0x59 + .byte 0xb + .byte 0x57 + .byte 0xb + .byte 0 + .byte 0 + .byte 0x33 + .byte 0x5 + .byte 0 + .byte 0x31 + .byte 0x13 + .byte 0x2 + .byte 0x17 + .byte 0 + .byte 0 + .byte 0x34 + .byte 0x2e + .byte 0x1 + .byte 0x3f + .byte 0x19 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x27 + .byte 0x19 + .byte 0x49 + .byte 0x13 + .byte 0x11 + .byte 0x1 + .byte 0x12 + .byte 0x6 + .byte 0x40 + .byte 0x18 + .byte 0x97,0x42 + .byte 0x19 + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x35 + .byte 0x5 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x17 + .byte 0 + .byte 0 + .byte 0x36 + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x18 + .byte 0 + .byte 0 + .byte 0x37 + .byte 0x34 + .byte 0 + .byte 0x3 + .byte 0x8 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0x17 + .byte 0 + .byte 0 + .byte 0x38 + .byte 0x2e + .byte 0x1 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x27 + .byte 0x19 + .byte 0x20 + .byte 0xb + .byte 0x1 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x39 + .byte 0x5 + .byte 0 + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0 + .byte 0 + .byte 0x3a + .byte 0x2e + .byte 0 + .byte 0x3f + .byte 0x19 + .byte 0x3c + .byte 0x19 + .byte 0x6e + .byte 0xe + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0x5 + .byte 0x39 + .byte 0xb + .byte 0 + .byte 0 + .byte 0x3b + .byte 0x2e + .byte 0 + .byte 0x3f + .byte 0x19 + .byte 0x3c + .byte 0x19 + .byte 0x6e + .byte 0xe + .byte 0x3 + .byte 0xe + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x39 + .byte 0xb + .byte 0 + .byte 0 + .byte 0 + .section .debug_loc,"",@progbits +.Ldebug_loc0: +.LLST5: + .4byte .LVL10 + .4byte .LVL11 + .2byte 0x1 + .byte 0x5a + .4byte .LVL13 + .4byte .LFE31 + .2byte 0x1 + .byte 0x5a + .4byte 0 + .4byte 0 +.LLST4: + .4byte .LVL7 + .4byte .LVL8 + .2byte 0x2 + .byte 0x3e + .byte 0x9f + .4byte 0 + .4byte 0 +.LLST0: + .4byte .LVL0 + .4byte .LVL4 + .2byte 0x1 + .byte 0x5a + .4byte .LVL4 + .4byte .LFE29 + .2byte 0x1 + .byte 0x60 + .4byte 0 + .4byte 0 +.LLST1: + .4byte .LVL0 + .4byte .LVL2 + .2byte 0x1 + .byte 0x5c + .4byte .LVL2 + .4byte .LVL3 + .2byte 0x3 + .byte 0x7c + .byte 0x7c + .byte 0x9f + .4byte .LVL3 + .4byte .LFE29 + .2byte 0x4 + .byte 0xf3 + .byte 0x1 + .byte 0x5c + .byte 0x9f + .4byte 0 + .4byte 0 +.LLST2: + .4byte .LVL1 + .4byte .LVL2 + .2byte 0x3 + .byte 0x7c + .byte 0x4 + .byte 0x9f + .4byte .LVL2 + .4byte .LVL4 + .2byte 0x1 + .byte 0x5c + .4byte .LVL4 + .4byte .LFE29 + .2byte 0x1 + .byte 0x5a + .4byte 0 + .4byte 0 +.LLST3: + .4byte .LVL4 + .4byte .LVL5 + .2byte 0x2 + .byte 0x30 + .byte 0x9f + .4byte 0 + .4byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x2c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x4 + .byte 0 + .2byte 0 + .2byte 0 + .4byte .LFB29 + .4byte .LFE29-.LFB29 + .4byte .LFB30 + .4byte .LFE30-.LFB30 + .4byte .LFB31 + .4byte .LFE31-.LFB31 + .4byte 0 + .4byte 0 + .section .debug_ranges,"",@progbits +.Ldebug_ranges0: + .4byte .LFB29 + .4byte .LFE29 + .4byte .LFB30 + .4byte .LFE30 + .4byte .LFB31 + .4byte .LFE31 + .4byte 0 + .4byte 0 + .section .debug_macro,"",@progbits +.Ldebug_macro0: + .2byte 0x4 + .byte 0x2 + .4byte .Ldebug_line0 + .byte 0x3 + .byte 0 + .byte 0x1 + .byte 0x5 + .byte 0x1 + .4byte .LASF0 + .byte 0x5 + .byte 0x2 + .4byte .LASF1 + .byte 0x5 + .byte 0x3 + .4byte .LASF2 + .byte 0x5 + .byte 0x4 + .4byte .LASF3 + .byte 0x5 + .byte 0x5 + .4byte .LASF4 + .byte 0x5 + .byte 0x6 + .4byte .LASF5 + .byte 0x5 + .byte 0x7 + .4byte .LASF6 + .byte 0x5 + .byte 0x8 + .4byte .LASF7 + .byte 0x5 + .byte 0x9 + .4byte .LASF8 + .byte 0x5 + .byte 0xa + .4byte .LASF9 + .byte 0x5 + .byte 0xb + .4byte .LASF10 + .byte 0x5 + .byte 0xc + .4byte .LASF11 + .byte 0x5 + .byte 0xd + .4byte .LASF12 + .byte 0x5 + .byte 0xe + .4byte .LASF13 + .byte 0x5 + .byte 0xf + .4byte .LASF14 + .byte 0x5 + .byte 0x10 + .4byte .LASF15 + .byte 0x5 + .byte 0x11 + .4byte .LASF16 + .byte 0x5 + .byte 0x12 + .4byte .LASF17 + .byte 0x5 + .byte 0x13 + .4byte .LASF18 + .byte 0x5 + .byte 0x14 + .4byte .LASF19 + .byte 0x5 + .byte 0x15 + .4byte .LASF20 + .byte 0x5 + .byte 0x16 + .4byte .LASF21 + .byte 0x5 + .byte 0x17 + .4byte .LASF22 + .byte 0x5 + .byte 0x18 + .4byte .LASF23 + .byte 0x5 + .byte 0x19 + .4byte .LASF24 + .byte 0x5 + .byte 0x1a + .4byte .LASF25 + .byte 0x5 + .byte 0x1b + .4byte .LASF26 + .byte 0x5 + .byte 0x1c + .4byte .LASF27 + .byte 0x5 + .byte 0x1d + .4byte .LASF28 + .byte 0x5 + .byte 0x1e + .4byte .LASF29 + .byte 0x5 + .byte 0x1f + .4byte .LASF30 + .byte 0x5 + .byte 0x20 + .4byte .LASF31 + .byte 0x5 + .byte 0x21 + .4byte .LASF32 + .byte 0x5 + .byte 0x22 + .4byte .LASF33 + .byte 0x5 + .byte 0x23 + .4byte .LASF34 + .byte 0x5 + .byte 0x24 + .4byte .LASF35 + .byte 0x5 + .byte 0x25 + .4byte .LASF36 + .byte 0x5 + .byte 0x26 + .4byte .LASF37 + .byte 0x5 + .byte 0x27 + .4byte .LASF38 + .byte 0x5 + .byte 0x28 + .4byte .LASF39 + .byte 0x5 + .byte 0x29 + .4byte .LASF40 + .byte 0x5 + .byte 0x2a + .4byte .LASF41 + .byte 0x5 + .byte 0x2b + .4byte .LASF42 + .byte 0x5 + .byte 0x2c + .4byte .LASF43 + .byte 0x5 + .byte 0x2d + .4byte .LASF44 + .byte 0x5 + .byte 0x2e + .4byte .LASF45 + .byte 0x5 + .byte 0x2f + .4byte .LASF46 + .byte 0x5 + .byte 0x30 + .4byte .LASF47 + .byte 0x5 + .byte 0x31 + .4byte .LASF48 + .byte 0x5 + .byte 0x32 + .4byte .LASF49 + .byte 0x5 + .byte 0x33 + .4byte .LASF50 + .byte 0x5 + .byte 0x34 + .4byte .LASF51 + .byte 0x5 + .byte 0x35 + .4byte .LASF52 + .byte 0x5 + .byte 0x36 + .4byte .LASF53 + .byte 0x5 + .byte 0x37 + .4byte .LASF54 + .byte 0x5 + .byte 0x38 + .4byte .LASF55 + .byte 0x5 + .byte 0x39 + .4byte .LASF56 + .byte 0x5 + .byte 0x3a + .4byte .LASF57 + .byte 0x5 + .byte 0x3b + .4byte .LASF58 + .byte 0x5 + .byte 0x3c + .4byte .LASF59 + .byte 0x5 + .byte 0x3d + .4byte .LASF60 + .byte 0x5 + .byte 0x3e + .4byte .LASF61 + .byte 0x5 + .byte 0x3f + .4byte .LASF62 + .byte 0x5 + .byte 0x40 + .4byte .LASF63 + .byte 0x5 + .byte 0x41 + .4byte .LASF64 + .byte 0x5 + .byte 0x42 + .4byte .LASF65 + .byte 0x5 + .byte 0x43 + .4byte .LASF66 + .byte 0x5 + .byte 0x44 + .4byte .LASF67 + .byte 0x5 + .byte 0x45 + .4byte .LASF68 + .byte 0x5 + .byte 0x46 + .4byte .LASF69 + .byte 0x5 + .byte 0x47 + .4byte .LASF70 + .byte 0x5 + .byte 0x48 + .4byte .LASF71 + .byte 0x5 + .byte 0x49 + .4byte .LASF72 + .byte 0x5 + .byte 0x4a + .4byte .LASF73 + .byte 0x5 + .byte 0x4b + .4byte .LASF74 + .byte 0x5 + .byte 0x4c + .4byte .LASF75 + .byte 0x5 + .byte 0x4d + .4byte .LASF76 + .byte 0x5 + .byte 0x4e + .4byte .LASF77 + .byte 0x5 + .byte 0x4f + .4byte .LASF78 + .byte 0x5 + .byte 0x50 + .4byte .LASF79 + .byte 0x5 + .byte 0x51 + .4byte .LASF80 + .byte 0x5 + .byte 0x52 + .4byte .LASF81 + .byte 0x5 + .byte 0x53 + .4byte .LASF82 + .byte 0x5 + .byte 0x54 + .4byte .LASF83 + .byte 0x5 + .byte 0x55 + .4byte .LASF84 + .byte 0x5 + .byte 0x56 + .4byte .LASF85 + .byte 0x5 + .byte 0x57 + .4byte .LASF86 + .byte 0x5 + .byte 0x58 + .4byte .LASF87 + .byte 0x5 + .byte 0x59 + .4byte .LASF88 + .byte 0x5 + .byte 0x5a + .4byte .LASF89 + .byte 0x5 + .byte 0x5b + .4byte .LASF90 + .byte 0x5 + .byte 0x5c + .4byte .LASF91 + .byte 0x5 + .byte 0x5d + .4byte .LASF92 + .byte 0x5 + .byte 0x5e + .4byte .LASF93 + .byte 0x5 + .byte 0x5f + .4byte .LASF94 + .byte 0x5 + .byte 0x60 + .4byte .LASF95 + .byte 0x5 + .byte 0x61 + .4byte .LASF96 + .byte 0x5 + .byte 0x62 + .4byte .LASF97 + .byte 0x5 + .byte 0x63 + .4byte .LASF98 + .byte 0x5 + .byte 0x64 + .4byte .LASF99 + .byte 0x5 + .byte 0x65 + .4byte .LASF100 + .byte 0x5 + .byte 0x66 + .4byte .LASF101 + .byte 0x5 + .byte 0x67 + .4byte .LASF102 + .byte 0x5 + .byte 0x68 + .4byte .LASF103 + .byte 0x5 + .byte 0x69 + .4byte .LASF104 + .byte 0x5 + .byte 0x6a + .4byte .LASF105 + .byte 0x5 + .byte 0x6b + .4byte .LASF106 + .byte 0x5 + .byte 0x6c + .4byte .LASF107 + .byte 0x5 + .byte 0x6d + .4byte .LASF108 + .byte 0x5 + .byte 0x6e + .4byte .LASF109 + .byte 0x5 + .byte 0x6f + .4byte .LASF110 + .byte 0x5 + .byte 0x70 + .4byte .LASF111 + .byte 0x5 + .byte 0x71 + .4byte .LASF112 + .byte 0x5 + .byte 0x72 + .4byte .LASF113 + .byte 0x5 + .byte 0x73 + .4byte .LASF114 + .byte 0x5 + .byte 0x74 + .4byte .LASF115 + .byte 0x5 + .byte 0x75 + .4byte .LASF116 + .byte 0x5 + .byte 0x76 + .4byte .LASF117 + .byte 0x5 + .byte 0x77 + .4byte .LASF118 + .byte 0x5 + .byte 0x78 + .4byte .LASF119 + .byte 0x5 + .byte 0x79 + .4byte .LASF120 + .byte 0x5 + .byte 0x7a + .4byte .LASF121 + .byte 0x5 + .byte 0x7b + .4byte .LASF122 + .byte 0x5 + .byte 0x7c + .4byte .LASF123 + .byte 0x5 + .byte 0x7d + .4byte .LASF124 + .byte 0x5 + .byte 0x7e + .4byte .LASF125 + .byte 0x5 + .byte 0x7f + .4byte .LASF126 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF127 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF128 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF129 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF130 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF131 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF132 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF133 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF134 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF135 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF136 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF137 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF138 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF139 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF140 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF141 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF142 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF143 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF144 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF145 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF146 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF147 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF148 + .byte 0x5 + .byte 0x96,0x1 + .4byte .LASF149 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF150 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF151 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF152 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF153 + .byte 0x5 + .byte 0x9b,0x1 + .4byte .LASF154 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF155 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF156 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF157 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF158 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF159 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF160 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF161 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF162 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF163 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF164 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF165 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF166 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF167 + .byte 0x5 + .byte 0xa9,0x1 + .4byte .LASF168 + .byte 0x5 + .byte 0xaa,0x1 + .4byte .LASF169 + .byte 0x5 + .byte 0xab,0x1 + .4byte .LASF170 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF171 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF172 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF173 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF174 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF175 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF176 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF177 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF178 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF179 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF180 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF181 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF182 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF183 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF184 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF185 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF186 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF187 + .byte 0x5 + .byte 0xbd,0x1 + .4byte .LASF188 + .byte 0x5 + .byte 0xbe,0x1 + .4byte .LASF189 + .byte 0x5 + .byte 0xbf,0x1 + .4byte .LASF190 + .byte 0x5 + .byte 0xc0,0x1 + .4byte .LASF191 + .byte 0x5 + .byte 0xc1,0x1 + .4byte .LASF192 + .byte 0x5 + .byte 0xc2,0x1 + .4byte .LASF193 + .byte 0x5 + .byte 0xc3,0x1 + .4byte .LASF194 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF195 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF196 + .byte 0x5 + .byte 0xc6,0x1 + .4byte .LASF197 + .byte 0x5 + .byte 0xc7,0x1 + .4byte .LASF198 + .byte 0x5 + .byte 0xc8,0x1 + .4byte .LASF199 + .byte 0x5 + .byte 0xc9,0x1 + .4byte .LASF200 + .byte 0x5 + .byte 0xca,0x1 + .4byte .LASF201 + .byte 0x5 + .byte 0xcb,0x1 + .4byte .LASF202 + .byte 0x5 + .byte 0xcc,0x1 + .4byte .LASF203 + .byte 0x5 + .byte 0xcd,0x1 + .4byte .LASF204 + .byte 0x5 + .byte 0xce,0x1 + .4byte .LASF205 + .byte 0x5 + .byte 0xcf,0x1 + .4byte .LASF206 + .byte 0x5 + .byte 0xd0,0x1 + .4byte .LASF207 + .byte 0x5 + .byte 0xd1,0x1 + .4byte .LASF208 + .byte 0x5 + .byte 0xd2,0x1 + .4byte .LASF209 + .byte 0x5 + .byte 0xd3,0x1 + .4byte .LASF210 + .byte 0x5 + .byte 0xd4,0x1 + .4byte .LASF211 + .byte 0x5 + .byte 0xd5,0x1 + .4byte .LASF212 + .byte 0x5 + .byte 0xd6,0x1 + .4byte .LASF213 + .byte 0x5 + .byte 0xd7,0x1 + .4byte .LASF214 + .byte 0x5 + .byte 0xd8,0x1 + .4byte .LASF215 + .byte 0x5 + .byte 0xd9,0x1 + .4byte .LASF216 + .byte 0x5 + .byte 0xda,0x1 + .4byte .LASF217 + .byte 0x5 + .byte 0xdb,0x1 + .4byte .LASF218 + .byte 0x5 + .byte 0xdc,0x1 + .4byte .LASF219 + .byte 0x5 + .byte 0xdd,0x1 + .4byte .LASF220 + .byte 0x5 + .byte 0xde,0x1 + .4byte .LASF221 + .byte 0x5 + .byte 0xdf,0x1 + .4byte .LASF222 + .byte 0x5 + .byte 0xe0,0x1 + .4byte .LASF223 + .byte 0x5 + .byte 0xe1,0x1 + .4byte .LASF224 + .byte 0x5 + .byte 0xe2,0x1 + .4byte .LASF225 + .byte 0x5 + .byte 0xe3,0x1 + .4byte .LASF226 + .byte 0x5 + .byte 0xe4,0x1 + .4byte .LASF227 + .byte 0x5 + .byte 0xe5,0x1 + .4byte .LASF228 + .byte 0x5 + .byte 0xe6,0x1 + .4byte .LASF229 + .byte 0x5 + .byte 0xe7,0x1 + .4byte .LASF230 + .byte 0x5 + .byte 0xe8,0x1 + .4byte .LASF231 + .byte 0x5 + .byte 0xe9,0x1 + .4byte .LASF232 + .byte 0x5 + .byte 0xea,0x1 + .4byte .LASF233 + .byte 0x5 + .byte 0xeb,0x1 + .4byte .LASF234 + .byte 0x5 + .byte 0xec,0x1 + .4byte .LASF235 + .byte 0x5 + .byte 0xed,0x1 + .4byte .LASF236 + .byte 0x5 + .byte 0xee,0x1 + .4byte .LASF237 + .byte 0x5 + .byte 0xef,0x1 + .4byte .LASF238 + .byte 0x5 + .byte 0xf0,0x1 + .4byte .LASF239 + .byte 0x5 + .byte 0xf1,0x1 + .4byte .LASF240 + .byte 0x5 + .byte 0xf2,0x1 + .4byte .LASF241 + .byte 0x5 + .byte 0xf3,0x1 + .4byte .LASF242 + .byte 0x5 + .byte 0xf4,0x1 + .4byte .LASF243 + .byte 0x5 + .byte 0xf5,0x1 + .4byte .LASF244 + .byte 0x5 + .byte 0xf6,0x1 + .4byte .LASF245 + .byte 0x5 + .byte 0xf7,0x1 + .4byte .LASF246 + .byte 0x5 + .byte 0xf8,0x1 + .4byte .LASF247 + .byte 0x5 + .byte 0xf9,0x1 + .4byte .LASF248 + .byte 0x5 + .byte 0xfa,0x1 + .4byte .LASF249 + .byte 0x5 + .byte 0xfb,0x1 + .4byte .LASF250 + .byte 0x5 + .byte 0xfc,0x1 + .4byte .LASF251 + .byte 0x5 + .byte 0xfd,0x1 + .4byte .LASF252 + .byte 0x5 + .byte 0xfe,0x1 + .4byte .LASF253 + .byte 0x5 + .byte 0xff,0x1 + .4byte .LASF254 + .byte 0x5 + .byte 0x80,0x2 + .4byte .LASF255 + .byte 0x5 + .byte 0x81,0x2 + .4byte .LASF256 + .byte 0x5 + .byte 0x82,0x2 + .4byte .LASF257 + .byte 0x5 + .byte 0x83,0x2 + .4byte .LASF258 + .byte 0x5 + .byte 0x84,0x2 + .4byte .LASF259 + .byte 0x5 + .byte 0x85,0x2 + .4byte .LASF260 + .byte 0x5 + .byte 0x86,0x2 + .4byte .LASF261 + .byte 0x5 + .byte 0x87,0x2 + .4byte .LASF262 + .byte 0x5 + .byte 0x88,0x2 + .4byte .LASF263 + .byte 0x5 + .byte 0x89,0x2 + .4byte .LASF264 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF265 + .byte 0x5 + .byte 0x8b,0x2 + .4byte .LASF266 + .byte 0x5 + .byte 0x8c,0x2 + .4byte .LASF267 + .byte 0x5 + .byte 0x8d,0x2 + .4byte .LASF268 + .byte 0x5 + .byte 0x8e,0x2 + .4byte .LASF269 + .byte 0x5 + .byte 0x8f,0x2 + .4byte .LASF270 + .byte 0x5 + .byte 0x90,0x2 + .4byte .LASF271 + .byte 0x5 + .byte 0x91,0x2 + .4byte .LASF272 + .byte 0x5 + .byte 0x92,0x2 + .4byte .LASF273 + .byte 0x5 + .byte 0x93,0x2 + .4byte .LASF274 + .byte 0x5 + .byte 0x94,0x2 + .4byte .LASF275 + .byte 0x5 + .byte 0x95,0x2 + .4byte .LASF276 + .byte 0x5 + .byte 0x96,0x2 + .4byte .LASF277 + .byte 0x5 + .byte 0x97,0x2 + .4byte .LASF278 + .byte 0x5 + .byte 0x98,0x2 + .4byte .LASF279 + .byte 0x5 + .byte 0x99,0x2 + .4byte .LASF280 + .byte 0x5 + .byte 0x9a,0x2 + .4byte .LASF281 + .byte 0x5 + .byte 0x9b,0x2 + .4byte .LASF282 + .byte 0x5 + .byte 0x9c,0x2 + .4byte .LASF283 + .byte 0x5 + .byte 0x9d,0x2 + .4byte .LASF284 + .byte 0x5 + .byte 0x9e,0x2 + .4byte .LASF285 + .byte 0x5 + .byte 0x9f,0x2 + .4byte .LASF286 + .byte 0x5 + .byte 0xa0,0x2 + .4byte .LASF287 + .byte 0x5 + .byte 0xa1,0x2 + .4byte .LASF288 + .byte 0x5 + .byte 0xa2,0x2 + .4byte .LASF289 + .byte 0x5 + .byte 0xa3,0x2 + .4byte .LASF290 + .byte 0x5 + .byte 0xa4,0x2 + .4byte .LASF291 + .byte 0x5 + .byte 0xa5,0x2 + .4byte .LASF292 + .byte 0x5 + .byte 0xa6,0x2 + .4byte .LASF293 + .byte 0x5 + .byte 0xa7,0x2 + .4byte .LASF294 + .byte 0x5 + .byte 0xa8,0x2 + .4byte .LASF295 + .byte 0x5 + .byte 0xa9,0x2 + .4byte .LASF296 + .byte 0x5 + .byte 0xaa,0x2 + .4byte .LASF297 + .byte 0x5 + .byte 0xab,0x2 + .4byte .LASF298 + .byte 0x5 + .byte 0xac,0x2 + .4byte .LASF299 + .byte 0x5 + .byte 0xad,0x2 + .4byte .LASF300 + .byte 0x5 + .byte 0xae,0x2 + .4byte .LASF301 + .byte 0x5 + .byte 0xaf,0x2 + .4byte .LASF302 + .byte 0x5 + .byte 0xb0,0x2 + .4byte .LASF303 + .byte 0x5 + .byte 0xb1,0x2 + .4byte .LASF304 + .byte 0x5 + .byte 0xb2,0x2 + .4byte .LASF305 + .byte 0x5 + .byte 0xb3,0x2 + .4byte .LASF306 + .byte 0x5 + .byte 0xb4,0x2 + .4byte .LASF307 + .byte 0x5 + .byte 0xb5,0x2 + .4byte .LASF308 + .byte 0x5 + .byte 0xb6,0x2 + .4byte .LASF309 + .byte 0x5 + .byte 0xb7,0x2 + .4byte .LASF310 + .byte 0x5 + .byte 0xb8,0x2 + .4byte .LASF311 + .byte 0x5 + .byte 0x1 + .4byte .LASF312 + .byte 0x5 + .byte 0x2 + .4byte .LASF313 + .byte 0x5 + .byte 0x3 + .4byte .LASF314 + .byte 0x3 + .byte 0xb + .byte 0x11 + .byte 0x5 + .byte 0x12 + .4byte .LASF315 + .byte 0x3 + .byte 0x14 + .byte 0xb + .byte 0x5 + .byte 0x15 + .4byte .LASF316 + .file 18 "./rtconfig.h" + .byte 0x3 + .byte 0x17 + .byte 0x12 + .byte 0x7 + .4byte .Ldebug_macro2 + .byte 0x4 + .file 19 "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\include/rtdebug.h" + .byte 0x3 + .byte 0x18 + .byte 0x13 + .byte 0x7 + .4byte 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0x5 + .byte 0xd + .4byte .LASF322 + .byte 0x5 + .byte 0xe + .4byte .LASF323 + .byte 0x5 + .byte 0xf + .4byte .LASF324 + .byte 0x5 + .byte 0x10 + .4byte .LASF325 + .byte 0x5 + .byte 0x11 + .4byte .LASF326 + .byte 0x5 + .byte 0x12 + .4byte .LASF327 + .byte 0x5 + .byte 0x13 + .4byte .LASF328 + .byte 0x5 + .byte 0x14 + .4byte .LASF329 + .byte 0x5 + .byte 0x15 + .4byte .LASF330 + .byte 0x5 + .byte 0x16 + .4byte .LASF331 + .byte 0x5 + .byte 0x1a + .4byte .LASF332 + .byte 0x5 + .byte 0x1b + .4byte .LASF333 + .byte 0x5 + .byte 0x1c + .4byte .LASF334 + .byte 0x5 + .byte 0x1d + .4byte .LASF335 + .byte 0x5 + .byte 0x1e + .4byte .LASF336 + .byte 0x5 + .byte 0x22 + .4byte .LASF337 + .byte 0x5 + .byte 0x23 + .4byte .LASF338 + .byte 0x5 + .byte 0x27 + .4byte .LASF339 + .byte 0x5 + .byte 0x28 + .4byte .LASF340 + .byte 0x5 + .byte 0x29 + .4byte .LASF341 + .byte 0x5 + .byte 0x2a + .4byte .LASF342 + .byte 0x5 + .byte 0x2b + .4byte .LASF343 + .byte 0x5 + .byte 0x2f + .4byte .LASF344 + .byte 0x5 + .byte 0x30 + .4byte .LASF345 + .byte 0x5 + .byte 0x31 + .4byte .LASF346 + .byte 0x5 + .byte 0x32 + .4byte .LASF347 + .byte 0x5 + .byte 0x39 + .4byte .LASF348 + .byte 0x5 + .byte 0x3a + .4byte .LASF349 + .byte 0x5 + .byte 0x3b + .4byte .LASF350 + .byte 0x5 + .byte 0x3c + .4byte .LASF351 + .byte 0x5 + .byte 0x3d + .4byte .LASF352 + .byte 0x5 + .byte 0x3e + .4byte .LASF353 + .byte 0x5 + .byte 0x3f + .4byte .LASF354 + .byte 0x5 + .byte 0x40 + .4byte .LASF355 + .byte 0x5 + .byte 0x41 + .4byte .LASF356 + .byte 0x5 + .byte 0x42 + .4byte .LASF357 + .byte 0x5 + .byte 0x43 + .4byte .LASF358 + .byte 0x5 + .byte 0x4a + .4byte .LASF359 + .byte 0x5 + .byte 0x4b + .4byte .LASF360 + .byte 0x5 + .byte 0x4c + .4byte .LASF361 + .byte 0x5 + .byte 0x4d + .4byte .LASF362 + .byte 0x5 + .byte 0x4e + .4byte .LASF363 + .byte 0x5 + .byte 0x55 + .4byte .LASF364 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF365 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF366 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF367 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF368 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF369 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rtdebug.h.11.eda4ed7ed0fca3d47eddaca4760c7c57,comdat +.Ldebug_macro3: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xb + .4byte .LASF370 + .byte 0x5 + .byte 0x26 + .4byte .LASF371 + .byte 0x5 + .byte 0x2a + .4byte .LASF372 + .byte 0x5 + .byte 0x2e + .4byte .LASF373 + .byte 0x5 + .byte 0x32 + .4byte .LASF374 + .byte 0x5 + .byte 0x36 + .4byte .LASF375 + .byte 0x5 + .byte 0x3a + .4byte .LASF376 + .byte 0x5 + .byte 0x3e + .4byte .LASF377 + .byte 0x5 + .byte 0x42 + .4byte .LASF378 + .byte 0x5 + .byte 0x46 + .4byte .LASF379 + .byte 0x5 + .byte 0x4a + .4byte .LASF380 + .byte 0x5 + .byte 0x4f + .4byte .LASF381 + .byte 0x5 + .byte 0x52 + .4byte .LASF382 + .byte 0x5 + .byte 0x5a + .4byte .LASF383 + .byte 0x5 + .byte 0x62 + .4byte .LASF384 + .byte 0x5 + .byte 0x74 + .4byte .LASF385 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rtdef.h.42.9080d5a95ebc9db19cb2eac5d667578a,comdat +.Ldebug_macro4: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x2a + .4byte .LASF386 + .byte 0x5 + .byte 0x3a + .4byte .LASF387 + .byte 0x5 + .byte 0x3b + .4byte .LASF388 + .byte 0x5 + .byte 0x3c + .4byte .LASF389 + .byte 0x5 + .byte 0x3f + .4byte .LASF390 + .byte 0x5 + .byte 0x61 + .4byte .LASF391 + .byte 0x5 + .byte 0x62 + .4byte .LASF392 + .byte 0x5 + .byte 0x67 + .4byte .LASF393 + .byte 0x5 + .byte 0x68 + .4byte .LASF394 + .byte 0x5 + .byte 0x69 + .4byte .LASF395 + .byte 0x5 + .byte 0x6a + .4byte .LASF396 + .byte 0x5 + .byte 0x6d + .4byte .LASF397 + .byte 0x5 + .byte 0x6e + .4byte .LASF398 + .byte 0x5 + .byte 0x6f + .4byte .LASF399 + .byte 0x5 + .byte 0x70 + .4byte .LASF400 + .byte 0x5 + .byte 0x71 + .4byte .LASF401 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stdarg.h.31.b55da1089056868966f25de5dbfc7d3c,comdat +.Ldebug_macro5: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x1f + .4byte .LASF402 + .byte 0x5 + .byte 0x20 + .4byte .LASF403 + .byte 0x6 + .byte 0x22 + .4byte .LASF404 + .byte 0x5 + .byte 0x27 + .4byte .LASF405 + .byte 0x5 + .byte 0x2f + .4byte .LASF406 + .byte 0x5 + .byte 0x30 + .4byte .LASF407 + .byte 0x5 + .byte 0x31 + .4byte .LASF408 + .byte 0x5 + .byte 0x34 + .4byte .LASF409 + .byte 0x5 + .byte 0x36 + .4byte .LASF410 + .byte 0x5 + .byte 0x69 + .4byte .LASF411 + .byte 0x5 + .byte 0x6c + .4byte .LASF412 + .byte 0x5 + .byte 0x6f + .4byte .LASF413 + .byte 0x5 + .byte 0x72 + .4byte .LASF414 + .byte 0x5 + .byte 0x75 + .4byte .LASF415 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rtdef.h.159.56f17c2ac63a4b6b24946aab4c0029d1,comdat +.Ldebug_macro6: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF416 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF417 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF418 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF419 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF420 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF421 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF422 + .byte 0x5 + .byte 0xfd,0x1 + .4byte .LASF423 + .byte 0x5 + .byte 0x86,0x2 + .4byte .LASF424 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF425 + .byte 0x5 + .byte 0x8c,0x2 + .4byte .LASF426 + .byte 0x5 + .byte 0x8e,0x2 + .4byte .LASF427 + .byte 0x5 + .byte 0x90,0x2 + .4byte .LASF428 + .byte 0x5 + .byte 0x92,0x2 + .4byte .LASF429 + .byte 0x5 + .byte 0xa1,0x2 + .4byte .LASF430 + .byte 0x5 + .byte 0xa4,0x2 + .4byte .LASF431 + .byte 0x5 + .byte 0xa5,0x2 + .4byte .LASF432 + .byte 0x5 + .byte 0xa6,0x2 + .4byte .LASF433 + .byte 0x5 + .byte 0xaa,0x2 + .4byte .LASF434 + .byte 0x5 + .byte 0xae,0x2 + .4byte .LASF435 + .byte 0x5 + .byte 0xb2,0x2 + .4byte .LASF436 + .byte 0x5 + .byte 0xbc,0x2 + .4byte .LASF437 + .byte 0x5 + .byte 0xbd,0x2 + .4byte .LASF438 + .byte 0x5 + .byte 0xbe,0x2 + .4byte .LASF439 + .byte 0x5 + .byte 0xbf,0x2 + .4byte .LASF440 + .byte 0x5 + .byte 0xc0,0x2 + .4byte .LASF441 + .byte 0x5 + .byte 0xc1,0x2 + .4byte .LASF442 + .byte 0x5 + .byte 0xc2,0x2 + .4byte .LASF443 + .byte 0x5 + .byte 0xc3,0x2 + .4byte .LASF444 + .byte 0x5 + .byte 0xc4,0x2 + .4byte .LASF445 + .byte 0x5 + .byte 0xc5,0x2 + .4byte .LASF446 + .byte 0x5 + .byte 0xc6,0x2 + .4byte .LASF447 + .byte 0x5 + .byte 0xd1,0x2 + .4byte .LASF448 + .byte 0x5 + .byte 0xda,0x2 + .4byte .LASF449 + .byte 0x5 + .byte 0xe2,0x2 + .4byte .LASF450 + .byte 0x5 + .byte 0x80,0x3 + .4byte .LASF451 + .byte 0x5 + .byte 0xc3,0x3 + .4byte .LASF452 + .byte 0x5 + .byte 0xd4,0x3 + .4byte .LASF453 + .byte 0x5 + .byte 0xd5,0x3 + .4byte .LASF454 + .byte 0x5 + .byte 0xd6,0x3 + .4byte .LASF455 + .byte 0x5 + .byte 0xd7,0x3 + .4byte .LASF456 + .byte 0x5 + .byte 0xd9,0x3 + .4byte .LASF457 + .byte 0x5 + .byte 0xda,0x3 + .4byte .LASF458 + .byte 0x5 + .byte 0xdc,0x3 + .4byte .LASF459 + .byte 0x5 + .byte 0xdd,0x3 + .4byte .LASF460 + .byte 0x5 + .byte 0xde,0x3 + .4byte .LASF461 + .byte 0x5 + .byte 0xdf,0x3 + .4byte .LASF462 + .byte 0x5 + .byte 0xe0,0x3 + .4byte .LASF463 + .byte 0x5 + .byte 0xe3,0x3 + .4byte .LASF464 + .byte 0x5 + .byte 0xe8,0x3 + .4byte .LASF465 + .byte 0x5 + .byte 0x98,0x4 + .4byte .LASF466 + .byte 0x5 + .byte 0x99,0x4 + .4byte .LASF467 + .byte 0x5 + .byte 0x9a,0x4 + .4byte .LASF468 + .byte 0x5 + .byte 0x9b,0x4 + .4byte .LASF469 + .byte 0x5 + .byte 0x9c,0x4 + .4byte .LASF470 + .byte 0x5 + .byte 0x9d,0x4 + .4byte .LASF471 + .byte 0x5 + .byte 0x9e,0x4 + .4byte .LASF472 + .byte 0x5 + .byte 0xa0,0x4 + .4byte .LASF473 + .byte 0x5 + .byte 0xa1,0x4 + .4byte .LASF474 + .byte 0x5 + .byte 0xa3,0x4 + .4byte .LASF475 + .byte 0x5 + .byte 0xa4,0x4 + .4byte .LASF476 + .byte 0x5 + .byte 0xa5,0x4 + .4byte .LASF477 + .byte 0x5 + .byte 0xa6,0x4 + .4byte .LASF478 + .byte 0x5 + .byte 0xa7,0x4 + .4byte .LASF479 + .byte 0x5 + .byte 0xac,0x4 + .4byte .LASF480 + .byte 0x5 + .byte 0xad,0x4 + .4byte .LASF481 + .byte 0x5 + .byte 0xae,0x4 + .4byte .LASF482 + .byte 0x5 + .byte 0xaf,0x4 + .4byte .LASF483 + .byte 0x5 + .byte 0xb0,0x4 + .4byte .LASF484 + .byte 0x5 + .byte 0xb7,0x5 + .4byte .LASF485 + .byte 0x5 + .byte 0xb8,0x5 + .4byte .LASF486 + .byte 0x5 + .byte 0xba,0x5 + .4byte .LASF487 + .byte 0x5 + .byte 0xbb,0x5 + .4byte .LASF488 + .byte 0x5 + .byte 0xbd,0x5 + .4byte .LASF489 + .byte 0x5 + .byte 0xbe,0x5 + .4byte .LASF490 + .byte 0x5 + .byte 0xee,0x5 + .4byte .LASF491 + .byte 0x5 + .byte 0xef,0x5 + .4byte .LASF492 + .byte 0x5 + .byte 0xf0,0x5 + .4byte .LASF493 + .byte 0x5 + .byte 0xa3,0x7 + .4byte .LASF494 + .byte 0x5 + .byte 0xa5,0x7 + .4byte .LASF495 + .byte 0x5 + .byte 0xa6,0x7 + .4byte .LASF496 + .byte 0x5 + .byte 0xa7,0x7 + .4byte .LASF497 + .byte 0x5 + .byte 0xa9,0x7 + .4byte .LASF498 + .byte 0x5 + .byte 0xaa,0x7 + .4byte .LASF499 + .byte 0x5 + .byte 0xab,0x7 + .4byte .LASF500 + .byte 0x5 + .byte 0xac,0x7 + .4byte .LASF501 + .byte 0x5 + .byte 0xad,0x7 + .4byte .LASF502 + .byte 0x5 + .byte 0xaf,0x7 + .4byte .LASF503 + .byte 0x5 + .byte 0xb0,0x7 + .4byte .LASF504 + .byte 0x5 + .byte 0xb1,0x7 + .4byte .LASF505 + .byte 0x5 + .byte 0xb2,0x7 + .4byte .LASF506 + .byte 0x5 + .byte 0xb4,0x7 + .4byte .LASF507 + .byte 0x5 + .byte 0xb5,0x7 + .4byte .LASF508 + .byte 0x5 + .byte 0xb6,0x7 + .4byte .LASF509 + .byte 0x5 + .byte 0xb7,0x7 + .4byte .LASF510 + .byte 0x5 + .byte 0xb8,0x7 + .4byte .LASF511 + .byte 0x5 + .byte 0xb9,0x7 + .4byte .LASF512 + .byte 0x5 + .byte 0xbe,0x7 + .4byte .LASF513 + .byte 0x5 + .byte 0xbf,0x7 + .4byte .LASF514 + .byte 0x5 + .byte 0xc0,0x7 + .4byte .LASF515 + .byte 0x5 + .byte 0xc1,0x7 + .4byte .LASF516 + .byte 0x5 + .byte 0xc3,0x7 + .4byte .LASF517 + .byte 0x5 + .byte 0xc4,0x7 + .4byte .LASF518 + .byte 0x5 + .byte 0xc5,0x7 + .4byte .LASF519 + .byte 0x5 + .byte 0xca,0x7 + .4byte .LASF520 + .byte 0x5 + .byte 0xcb,0x7 + .4byte .LASF521 + .byte 0x5 + .byte 0xcc,0x7 + .4byte .LASF522 + .byte 0x5 + .byte 0xcd,0x7 + .4byte .LASF523 + .byte 0x5 + .byte 0xce,0x7 + .4byte .LASF524 + .byte 0x5 + .byte 0xcf,0x7 + .4byte .LASF525 + .byte 0x5 + .byte 0xd0,0x7 + .4byte .LASF526 + .byte 0x5 + .byte 0xaa,0x8 + .4byte .LASF527 + .byte 0x5 + .byte 0xab,0x8 + .4byte .LASF528 + .byte 0x5 + .byte 0xb0,0x8 + .4byte .LASF529 + .byte 0x5 + .byte 0xb1,0x8 + .4byte .LASF530 + .byte 0x5 + .byte 0xb2,0x8 + .4byte .LASF531 + .byte 0x5 + .byte 0xb3,0x8 + .4byte .LASF532 + .byte 0x5 + .byte 0xb4,0x8 + .4byte .LASF533 + .byte 0x5 + .byte 0xb5,0x8 + .4byte .LASF534 + .byte 0x5 + .byte 0xb6,0x8 + .4byte .LASF535 + .byte 0x5 + .byte 0xb7,0x8 + .4byte .LASF536 + .byte 0x5 + .byte 0xb8,0x8 + .4byte .LASF537 + .byte 0x5 + .byte 0xb9,0x8 + .4byte .LASF538 + .byte 0x5 + .byte 0xd0,0x8 + .4byte .LASF539 + .byte 0x5 + .byte 0xf9,0x8 + .4byte .LASF540 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._newlib_version.h.4.875b979a44719054cd750d0952ad3fd6,comdat +.Ldebug_macro7: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x4 + .4byte .LASF546 + .byte 0x5 + .byte 0x6 + .4byte .LASF547 + .byte 0x5 + .byte 0x7 + .4byte .LASF548 + .byte 0x5 + .byte 0x8 + .4byte .LASF549 + .byte 0x5 + .byte 0x9 + .4byte .LASF550 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.newlib.h.18.cf6bb52154a7abac63b0afb962204a67,comdat +.Ldebug_macro8: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x12 + .4byte .LASF551 + .byte 0x5 + .byte 0x15 + .4byte .LASF552 + .byte 0x5 + .byte 0x18 + .4byte .LASF553 + .byte 0x5 + .byte 0x1b + .4byte .LASF554 + .byte 0x5 + .byte 0x28 + .4byte .LASF555 + .byte 0x5 + .byte 0x32 + .4byte .LASF556 + .byte 0x5 + .byte 0x39 + .4byte .LASF557 + .byte 0x5 + .byte 0x3c + .4byte .LASF558 + .byte 0x5 + .byte 0x42 + .4byte .LASF559 + .byte 0x5 + .byte 0x45 + .4byte .LASF560 + .byte 0x5 + .byte 0x48 + .4byte .LASF561 + .byte 0x5 + .byte 0x4b + .4byte .LASF562 + .byte 0x5 + .byte 0x5c + .4byte .LASF563 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ieeefp.h.193.a04996ad6548b0579a40a1f708027f95,comdat +.Ldebug_macro9: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xc1,0x1 + .4byte .LASF565 + .byte 0x5 + .byte 0xc3,0x3 + .4byte .LASF566 + .byte 0x5 + .byte 0xc6,0x3 + .4byte .LASF567 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.features.h.22.fad1cec3bc7ff06488171438dbdcfd02,comdat +.Ldebug_macro10: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x16 + .4byte .LASF568 + .byte 0x5 + .byte 0x21 + .4byte .LASF569 + .byte 0x5 + .byte 0x28 + .4byte .LASF570 + .byte 0x6 + .byte 0x83,0x1 + .4byte .LASF571 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF572 + .byte 0x6 + .byte 0x88,0x1 + .4byte .LASF573 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF574 + .byte 0x6 + .byte 0x8a,0x1 + .4byte .LASF575 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF576 + .byte 0x6 + .byte 0x9e,0x1 + .4byte .LASF577 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF578 + .byte 0x5 + .byte 0xf7,0x1 + .4byte .LASF579 + .byte 0x5 + .byte 0xfd,0x1 + .4byte .LASF580 + .byte 0x5 + .byte 0x85,0x2 + .4byte .LASF581 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF582 + .byte 0x5 + .byte 0x95,0x2 + .4byte .LASF583 + .byte 0x5 + .byte 0x99,0x2 + .4byte .LASF584 + .byte 0x5 + .byte 0x9f,0x2 + .4byte .LASF585 + .byte 0x5 + .byte 0xaf,0x2 + .4byte .LASF586 + .byte 0x5 + .byte 0xbf,0x2 + .4byte .LASF587 + .byte 0x5 + .byte 0xca,0x2 + .4byte .LASF588 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.config.h.79.b548f69d9f69fceadec535dc005f68c6,comdat +.Ldebug_macro11: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x4f + .4byte .LASF589 + .byte 0x5 + .byte 0xdc,0x1 + .4byte .LASF590 + .byte 0x6 + .byte 0xe2,0x1 + .4byte .LASF591 + .byte 0x5 + .byte 0xe6,0x1 + .4byte .LASF592 + .byte 0x5 + .byte 0xf6,0x1 + .4byte .LASF593 + .byte 0x5 + .byte 0xfa,0x1 + .4byte .LASF594 + .byte 0x5 + .byte 0x87,0x2 + .4byte .LASF595 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._ansi.h.31.de524f58584151836e90d8620a16f8e8,comdat +.Ldebug_macro12: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x1f + .4byte .LASF596 + .byte 0x5 + .byte 0x20 + .4byte .LASF597 + .byte 0x5 + .byte 0x21 + .4byte .LASF598 + .byte 0x5 + .byte 0x25 + .4byte .LASF599 + .byte 0x5 + .byte 0x2b + .4byte .LASF600 + .byte 0x5 + .byte 0x45 + .4byte .LASF601 + .byte 0x5 + .byte 0x49 + .4byte .LASF602 + .byte 0x5 + .byte 0x4a + .4byte .LASF603 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._default_types.h.6.959254cf5f09734ea7516c89e8bb21bd,comdat +.Ldebug_macro13: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x6 + .4byte .LASF606 + .byte 0x5 + .byte 0xf + .4byte .LASF607 + .byte 0x5 + .byte 0x1a + .4byte .LASF608 + .byte 0x5 + .byte 0x21 + .4byte .LASF609 + .byte 0x5 + .byte 0x2f + .4byte .LASF610 + .byte 0x5 + .byte 0x3d + .4byte .LASF611 + .byte 0x5 + .byte 0x53 + .4byte .LASF612 + .byte 0x5 + .byte 0x6d + .4byte .LASF613 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF614 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF615 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF616 + .byte 0x5 + .byte 0xce,0x1 + .4byte .LASF617 + .byte 0x6 + .byte 0xf4,0x1 + .4byte .LASF618 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stddef.h.39.a38874c8f8a57e66301090908ec2a69f,comdat +.Ldebug_macro14: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x27 + .4byte .LASF619 + .byte 0x5 + .byte 0x28 + .4byte .LASF620 + .byte 0x5 + .byte 0x2a + .4byte .LASF621 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF622 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF623 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF624 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF625 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF626 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF627 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF628 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF629 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF630 + .byte 0x6 + .byte 0xa1,0x1 + .4byte .LASF631 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF632 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF633 + .byte 0x5 + .byte 0xbd,0x1 + .4byte .LASF634 + .byte 0x5 + .byte 0xbe,0x1 + .4byte .LASF635 + .byte 0x5 + .byte 0xbf,0x1 + .4byte .LASF636 + .byte 0x5 + .byte 0xc0,0x1 + .4byte .LASF637 + .byte 0x5 + .byte 0xc1,0x1 + .4byte .LASF638 + .byte 0x5 + .byte 0xc2,0x1 + .4byte .LASF639 + .byte 0x5 + .byte 0xc3,0x1 + .4byte .LASF640 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF641 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF642 + .byte 0x5 + .byte 0xc6,0x1 + .4byte .LASF643 + .byte 0x5 + .byte 0xc7,0x1 + .4byte .LASF644 + .byte 0x5 + .byte 0xc8,0x1 + .4byte .LASF645 + .byte 0x5 + .byte 0xc9,0x1 + .4byte .LASF646 + .byte 0x5 + .byte 0xca,0x1 + .4byte .LASF647 + .byte 0x5 + .byte 0xd2,0x1 + .4byte .LASF648 + .byte 0x6 + .byte 0xee,0x1 + .4byte .LASF649 + .byte 0x5 + .byte 0x8b,0x2 + .4byte .LASF650 + .byte 0x5 + .byte 0x8c,0x2 + .4byte .LASF651 + .byte 0x5 + .byte 0x8d,0x2 + .4byte .LASF652 + .byte 0x5 + .byte 0x8e,0x2 + .4byte .LASF653 + .byte 0x5 + .byte 0x8f,0x2 + .4byte .LASF654 + .byte 0x5 + .byte 0x90,0x2 + .4byte .LASF655 + .byte 0x5 + .byte 0x91,0x2 + .4byte .LASF656 + .byte 0x5 + .byte 0x92,0x2 + .4byte .LASF657 + .byte 0x5 + .byte 0x93,0x2 + .4byte .LASF658 + .byte 0x5 + .byte 0x94,0x2 + .4byte .LASF659 + .byte 0x5 + .byte 0x95,0x2 + .4byte .LASF660 + .byte 0x5 + .byte 0x96,0x2 + .4byte .LASF661 + .byte 0x5 + .byte 0x97,0x2 + .4byte .LASF662 + .byte 0x5 + .byte 0x98,0x2 + .4byte .LASF663 + .byte 0x5 + .byte 0x99,0x2 + .4byte .LASF664 + .byte 0x6 + .byte 0xa6,0x2 + .4byte .LASF665 + .byte 0x6 + .byte 0xdb,0x2 + .4byte .LASF666 + .byte 0x6 + .byte 0x91,0x3 + .4byte .LASF667 + .byte 0x5 + .byte 0x96,0x3 + .4byte .LASF668 + .byte 0x6 + .byte 0x9c,0x3 + .4byte .LASF669 + .byte 0x5 + .byte 0xa1,0x3 + .4byte .LASF670 + .byte 0x5 + .byte 0xa6,0x3 + .4byte .LASF671 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.cdefs.h.47.9b1aff81ebf9fd459c1248694f70fc96,comdat +.Ldebug_macro15: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x2f + .4byte .LASF672 + .byte 0x5 + .byte 0x30 + .4byte .LASF673 + .byte 0x5 + .byte 0x31 + .4byte .LASF674 + .byte 0x5 + .byte 0x34 + .4byte .LASF675 + .byte 0x5 + .byte 0x37 + .4byte .LASF676 + .byte 0x5 + .byte 0x38 + .4byte .LASF677 + .byte 0x5 + .byte 0x3a + .4byte .LASF678 + .byte 0x5 + .byte 0x3b + .4byte .LASF679 + .byte 0x5 + .byte 0x3c + .4byte .LASF680 + .byte 0x5 + .byte 0x3d + .4byte .LASF681 + .byte 0x5 + .byte 0x40 + .4byte .LASF682 + .byte 0x5 + .byte 0x41 + .4byte .LASF683 + .byte 0x5 + .byte 0x42 + .4byte .LASF684 + .byte 0x5 + .byte 0x4c + .4byte .LASF685 + .byte 0x5 + .byte 0x4f + .4byte .LASF686 + .byte 0x5 + .byte 0x55 + .4byte .LASF687 + .byte 0x5 + .byte 0x5c + .4byte .LASF688 + .byte 0x5 + .byte 0x5d + .4byte .LASF689 + .byte 0x5 + .byte 0x69 + .4byte .LASF690 + .byte 0x5 + .byte 0x6a + .4byte .LASF691 + .byte 0x5 + .byte 0x6e + .4byte .LASF692 + .byte 0x5 + .byte 0x6f + .4byte .LASF693 + .byte 0x5 + .byte 0x70 + .4byte .LASF694 + .byte 0x5 + .byte 0x73 + .4byte .LASF695 + .byte 0x5 + .byte 0x76 + .4byte .LASF696 + .byte 0x5 + .byte 0x7d + .4byte .LASF697 + .byte 0x5 + .byte 0x7e + .4byte .LASF698 + .byte 0x5 + .byte 0x7f + .4byte .LASF699 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF700 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF701 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF702 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF703 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF704 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF705 + .byte 0x5 + .byte 0x96,0x1 + .4byte .LASF706 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF707 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF708 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF709 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF710 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF711 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF712 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF713 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF714 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF715 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF716 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF717 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF718 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF719 + .byte 0x5 + .byte 0xef,0x1 + .4byte .LASF720 + .byte 0x5 + .byte 0xfc,0x1 + .4byte .LASF721 + .byte 0x5 + .byte 0xfd,0x1 + .4byte .LASF722 + .byte 0x5 + .byte 0xfe,0x1 + .4byte .LASF723 + .byte 0x5 + .byte 0xff,0x1 + .4byte .LASF724 + .byte 0x5 + .byte 0x80,0x2 + .4byte .LASF725 + .byte 0x5 + .byte 0x81,0x2 + .4byte .LASF726 + .byte 0x5 + .byte 0x82,0x2 + .4byte .LASF727 + .byte 0x5 + .byte 0x85,0x2 + .4byte .LASF728 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF729 + .byte 0x5 + .byte 0xe4,0x2 + .4byte .LASF730 + .byte 0x5 + .byte 0xf6,0x2 + .4byte .LASF731 + .byte 0x5 + .byte 0xfc,0x2 + .4byte .LASF732 + .byte 0x5 + .byte 0xfd,0x2 + .4byte .LASF733 + .byte 0x5 + .byte 0x84,0x3 + .4byte .LASF734 + .byte 0x5 + .byte 0x8a,0x3 + .4byte .LASF735 + .byte 0x5 + .byte 0x90,0x3 + .4byte .LASF736 + .byte 0x5 + .byte 0x91,0x3 + .4byte .LASF737 + .byte 0x5 + .byte 0x98,0x3 + .4byte .LASF738 + .byte 0x5 + .byte 0x99,0x3 + .4byte .LASF739 + .byte 0x5 + .byte 0xa0,0x3 + .4byte .LASF740 + .byte 0x5 + .byte 0xa6,0x3 + .4byte .LASF741 + .byte 0x5 + .byte 0xba,0x3 + .4byte .LASF742 + .byte 0x5 + .byte 0xdb,0x3 + .4byte .LASF743 + .byte 0x5 + .byte 0xdc,0x3 + .4byte .LASF744 + .byte 0x5 + .byte 0xe3,0x3 + .4byte .LASF745 + .byte 0x5 + .byte 0xe4,0x3 + .4byte .LASF746 + .byte 0x5 + .byte 0xe7,0x3 + .4byte .LASF747 + .byte 0x5 + .byte 0xf1,0x3 + .4byte .LASF748 + .byte 0x5 + .byte 0xf2,0x3 + .4byte .LASF749 + .byte 0x5 + .byte 0xfc,0x3 + .4byte .LASF750 + .byte 0x5 + .byte 0x92,0x4 + .4byte .LASF751 + .byte 0x5 + .byte 0x94,0x4 + .4byte .LASF752 + .byte 0x5 + .byte 0x96,0x4 + .4byte .LASF753 + .byte 0x5 + .byte 0x97,0x4 + .4byte .LASF754 + .byte 0x5 + .byte 0x99,0x4 + .4byte .LASF755 + .byte 0x5 + .byte 0xa3,0x4 + .4byte .LASF756 + .byte 0x5 + .byte 0xa8,0x4 + .4byte .LASF757 + .byte 0x5 + .byte 0xad,0x4 + .4byte .LASF758 + .byte 0x5 + .byte 0xb0,0x4 + .4byte .LASF759 + .byte 0x5 + .byte 0xb4,0x4 + .4byte .LASF760 + .byte 0x5 + .byte 0xb6,0x4 + .4byte .LASF761 + .byte 0x5 + .byte 0xd9,0x4 + .4byte .LASF762 + .byte 0x5 + .byte 0xdd,0x4 + .4byte .LASF763 + .byte 0x5 + .byte 0xe1,0x4 + .4byte .LASF764 + .byte 0x5 + .byte 0xe5,0x4 + .4byte .LASF765 + .byte 0x5 + .byte 0xe9,0x4 + .4byte .LASF766 + .byte 0x5 + .byte 0xed,0x4 + .4byte .LASF767 + .byte 0x5 + .byte 0xf1,0x4 + .4byte .LASF768 + .byte 0x5 + .byte 0xf5,0x4 + .4byte .LASF769 + .byte 0x5 + .byte 0xfc,0x4 + .4byte .LASF770 + .byte 0x5 + .byte 0xfd,0x4 + .4byte .LASF771 + .byte 0x5 + .byte 0xfe,0x4 + .4byte .LASF772 + .byte 0x5 + .byte 0xff,0x4 + .4byte .LASF773 + .byte 0x5 + .byte 0x80,0x5 + .4byte .LASF774 + .byte 0x5 + .byte 0x95,0x5 + .4byte .LASF775 + .byte 0x5 + .byte 0x96,0x5 + .4byte .LASF776 + .byte 0x5 + .byte 0xa8,0x5 + .4byte .LASF777 + .byte 0x5 + .byte 0xae,0x5 + .4byte .LASF778 + .byte 0x5 + .byte 0xb1,0x5 + .4byte .LASF779 + .byte 0x5 + .byte 0xb3,0x5 + .4byte .LASF780 + .byte 0x5 + .byte 0xb7,0x5 + .4byte .LASF781 + .byte 0x5 + .byte 0xb9,0x5 + .4byte .LASF782 + .byte 0x5 + .byte 0xbd,0x5 + .4byte .LASF783 + .byte 0x5 + .byte 0xc0,0x5 + .4byte .LASF784 + .byte 0x5 + .byte 0xc2,0x5 + .4byte .LASF785 + .byte 0x5 + .byte 0xc6,0x5 + .4byte .LASF786 + .byte 0x5 + .byte 0xc8,0x5 + .4byte .LASF787 + .byte 0x5 + .byte 0xca,0x5 + .4byte .LASF788 + .byte 0x5 + .byte 0xce,0x5 + .4byte .LASF789 + .byte 0x5 + .byte 0xd1,0x5 + .4byte .LASF790 + .byte 0x5 + .byte 0xd2,0x5 + .4byte .LASF791 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.lock.h.2.1461d1fff82dffe8bfddc23307f6484f,comdat +.Ldebug_macro16: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x2 + .4byte .LASF795 + .byte 0x5 + .byte 0x23 + .4byte .LASF796 + .byte 0x5 + .byte 0x25 + .4byte .LASF797 + .byte 0x5 + .byte 0x27 + .4byte .LASF798 + .byte 0x5 + .byte 0x2a + .4byte .LASF799 + .byte 0x5 + .byte 0x2c + .4byte .LASF800 + .byte 0x5 + .byte 0x2e + .4byte .LASF801 + .byte 0x5 + .byte 0x30 + .4byte .LASF802 + .byte 0x5 + .byte 0x32 + .4byte .LASF803 + .byte 0x5 + .byte 0x34 + .4byte .LASF804 + .byte 0x5 + .byte 0x36 + .4byte .LASF805 + .byte 0x5 + .byte 0x38 + .4byte .LASF806 + .byte 0x5 + .byte 0x3b + .4byte .LASF807 + .byte 0x5 + .byte 0x3d + .4byte .LASF808 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._types.h.125.5cf8a495f1f7ef36777ad868a1e32068,comdat +.Ldebug_macro17: + .2byte 0x4 + .byte 0 + .byte 0x6 + .byte 0x7d + .4byte .LASF809 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF810 + .byte 0x6 + .byte 0x92,0x1 + .4byte .LASF811 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF812 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stddef.h.161.5349cb105733e8777bfb0cf53c4e3f34,comdat +.Ldebug_macro18: + .2byte 0x4 + .byte 0 + .byte 0x6 + .byte 0xa1,0x1 + .4byte .LASF631 + .byte 0x6 + .byte 0xee,0x1 + .4byte .LASF649 + .byte 0x6 + .byte 0xdb,0x2 + .4byte .LASF666 + .byte 0x5 + .byte 0xe0,0x2 + .4byte .LASF813 + .byte 0x6 + .byte 0xe7,0x2 + .4byte .LASF814 + .byte 0x6 + .byte 0x91,0x3 + .4byte .LASF667 + .byte 0x5 + .byte 0x96,0x3 + .4byte .LASF668 + .byte 0x6 + .byte 0x9c,0x3 + .4byte .LASF669 + .byte 0x5 + .byte 0xa1,0x3 + .4byte .LASF670 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._types.h.184.7120b8bb2e0149e2359704f4e2251b68,comdat +.Ldebug_macro19: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF815 + .byte 0x5 + .byte 0xc0,0x1 + .4byte .LASF816 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF817 + .byte 0x5 + .byte 0xc7,0x1 + .4byte .LASF818 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.reent.h.17.87376802c2b370b32a762f0a30482d9e,comdat +.Ldebug_macro20: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x11 + .4byte .LASF819 + .byte 0x5 + .byte 0x15 + .4byte .LASF820 + .byte 0x5 + .byte 0x48 + .4byte .LASF821 + .byte 0x5 + .byte 0x64 + .4byte .LASF822 + .byte 0x5 + .byte 0x6a + .4byte .LASF823 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF824 + .byte 0x5 + .byte 0xb8,0x2 + .4byte .LASF825 + .byte 0x5 + .byte 0xb9,0x2 + .4byte .LASF826 + .byte 0x5 + .byte 0xba,0x2 + .4byte .LASF827 + .byte 0x5 + .byte 0xbb,0x2 + .4byte .LASF828 + .byte 0x5 + .byte 0xbc,0x2 + .4byte .LASF829 + .byte 0x5 + .byte 0xbd,0x2 + .4byte .LASF830 + .byte 0x5 + .byte 0xbe,0x2 + .4byte .LASF831 + .byte 0x5 + .byte 0xca,0x2 + .4byte .LASF832 + .byte 0x5 + .byte 0xcb,0x2 + .4byte .LASF833 + .byte 0x5 + .byte 0xcc,0x2 + .4byte .LASF834 + .byte 0x5 + .byte 0xf4,0x4 + .4byte .LASF835 + .byte 0x5 + .byte 0x90,0x5 + .4byte .LASF836 + .byte 0x5 + .byte 0x93,0x5 + .4byte .LASF837 + .byte 0x5 + .byte 0xc3,0x5 + .4byte .LASF838 + .byte 0x5 + .byte 0xd1,0x5 + .4byte .LASF839 + .byte 0x5 + .byte 0xd2,0x5 + .4byte .LASF840 + .byte 0x5 + .byte 0xd3,0x5 + .4byte .LASF841 + .byte 0x5 + .byte 0xd4,0x5 + .4byte .LASF842 + .byte 0x5 + .byte 0xd5,0x5 + .4byte .LASF843 + .byte 0x5 + .byte 0xd6,0x5 + .4byte .LASF844 + .byte 0x5 + .byte 0xd7,0x5 + .4byte .LASF845 + .byte 0x5 + .byte 0xd9,0x5 + .4byte .LASF846 + .byte 0x5 + .byte 0xda,0x5 + .4byte .LASF847 + .byte 0x5 + .byte 0xdb,0x5 + .4byte .LASF848 + .byte 0x5 + .byte 0xdc,0x5 + .4byte .LASF849 + .byte 0x5 + .byte 0xdd,0x5 + .4byte .LASF850 + .byte 0x5 + .byte 0xde,0x5 + .4byte .LASF851 + .byte 0x5 + .byte 0xdf,0x5 + .4byte .LASF852 + .byte 0x5 + .byte 0xe0,0x5 + .4byte .LASF853 + .byte 0x5 + .byte 0xe1,0x5 + .4byte .LASF854 + .byte 0x5 + .byte 0xe2,0x5 + .4byte .LASF855 + .byte 0x5 + .byte 0xe3,0x5 + .4byte .LASF856 + .byte 0x5 + .byte 0xe4,0x5 + .4byte .LASF857 + .byte 0x5 + .byte 0xe5,0x5 + .4byte .LASF858 + .byte 0x5 + .byte 0xe6,0x5 + .4byte .LASF859 + .byte 0x5 + .byte 0xe7,0x5 + .4byte .LASF860 + .byte 0x5 + .byte 0xe8,0x5 + .4byte .LASF861 + .byte 0x5 + .byte 0xe9,0x5 + .4byte .LASF862 + .byte 0x5 + .byte 0xea,0x5 + .4byte .LASF863 + .byte 0x5 + .byte 0xeb,0x5 + .4byte .LASF864 + .byte 0x5 + .byte 0xec,0x5 + .4byte .LASF865 + .byte 0x5 + .byte 0xed,0x5 + .4byte .LASF866 + .byte 0x5 + .byte 0xee,0x5 + .4byte .LASF867 + .byte 0x5 + .byte 0xef,0x5 + .4byte .LASF868 + .byte 0x5 + .byte 0xf0,0x5 + .4byte .LASF869 + .byte 0x5 + .byte 0xf4,0x5 + .4byte .LASF870 + .byte 0x5 + .byte 0xfc,0x5 + .4byte .LASF871 + .byte 0x5 + .byte 0x84,0x6 + .4byte .LASF872 + .byte 0x5 + .byte 0x94,0x6 + .4byte .LASF873 + .byte 0x5 + .byte 0x97,0x6 + .4byte .LASF874 + .byte 0x5 + .byte 0x9d,0x6 + .4byte .LASF875 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.time.h.14.849270cc7997ccc4e05edd146e568a9f,comdat +.Ldebug_macro21: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xe + .4byte .LASF876 + .byte 0x5 + .byte 0xf + .4byte .LASF877 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stddef.h.161.19e15733342b50ead2919490b095303e,comdat +.Ldebug_macro22: + .2byte 0x4 + .byte 0 + .byte 0x6 + .byte 0xa1,0x1 + .4byte .LASF631 + .byte 0x6 + .byte 0xee,0x1 + .4byte .LASF649 + .byte 0x6 + .byte 0xdb,0x2 + .4byte .LASF666 + .byte 0x6 + .byte 0x91,0x3 + .4byte .LASF667 + .byte 0x5 + .byte 0x96,0x3 + .4byte .LASF668 + .byte 0x6 + .byte 0x9c,0x3 + .4byte .LASF669 + .byte 0x5 + .byte 0xa1,0x3 + .4byte .LASF670 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.time.h.2.9d540cbcaa36ddf778595c54454700d0,comdat +.Ldebug_macro23: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x2 + .4byte .LASF878 + .byte 0x5 + .byte 0x5 + .4byte .LASF879 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.time.h.25.0e6a0fdbc9955f5707ed54246ed2e089,comdat +.Ldebug_macro24: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x19 + .4byte .LASF880 + .byte 0x5 + .byte 0x1a + .4byte .LASF881 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.types.h.40.e8c16e7ec36ba55f133d0616070e25fc,comdat +.Ldebug_macro25: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x28 + .4byte .LASF882 + .byte 0x5 + .byte 0x3c + .4byte .LASF883 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._stdint.h.10.c24fa3af3bc1706662bb5593a907e841,comdat +.Ldebug_macro26: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF884 + .byte 0x5 + .byte 0x15 + .4byte .LASF885 + .byte 0x5 + .byte 0x19 + .4byte .LASF886 + .byte 0x5 + .byte 0x1b + .4byte .LASF887 + .byte 0x5 + .byte 0x21 + .4byte .LASF888 + .byte 0x5 + .byte 0x25 + .4byte .LASF889 + .byte 0x5 + .byte 0x27 + .4byte .LASF890 + .byte 0x5 + .byte 0x2d + .4byte .LASF891 + .byte 0x5 + .byte 0x31 + .4byte .LASF892 + .byte 0x5 + .byte 0x33 + .4byte .LASF893 + .byte 0x5 + .byte 0x39 + .4byte .LASF894 + .byte 0x5 + .byte 0x3d + .4byte .LASF895 + .byte 0x5 + .byte 0x3f + .4byte .LASF896 + .byte 0x5 + .byte 0x44 + .4byte .LASF897 + .byte 0x5 + .byte 0x49 + .4byte .LASF898 + .byte 0x5 + .byte 0x4e + .4byte .LASF899 + .byte 0x5 + .byte 0x53 + .4byte .LASF900 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._endian.h.18.1bf9649e8e5bbc91042012680270b9ed,comdat +.Ldebug_macro27: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x12 + .4byte .LASF902 + .byte 0x5 + .byte 0x16 + .4byte .LASF903 + .byte 0x5 + .byte 0x1a + .4byte .LASF904 + .byte 0x5 + .byte 0x1f + .4byte .LASF905 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.endian.h.9.49f3a4695c1b61e8a0808de3c4a106cb,comdat +.Ldebug_macro28: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9 + .4byte .LASF906 + .byte 0x5 + .byte 0xa + .4byte .LASF907 + .byte 0x5 + .byte 0x11 + .4byte .LASF908 + .byte 0x5 + .byte 0x12 + .4byte .LASF909 + .byte 0x5 + .byte 0x13 + .4byte .LASF910 + .byte 0x5 + .byte 0x14 + .4byte .LASF911 + .byte 0x5 + .byte 0x18 + .4byte .LASF912 + .byte 0x5 + .byte 0x19 + .4byte .LASF913 + .byte 0x5 + .byte 0x1a + .4byte .LASF914 + .byte 0x5 + .byte 0x39 + .4byte .LASF915 + .byte 0x5 + .byte 0x3a + .4byte .LASF916 + .byte 0x5 + .byte 0x3b + .4byte .LASF917 + .byte 0x5 + .byte 0x3c + .4byte .LASF918 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.select.h.18.89b21a74807f312d67c258937864b65e,comdat +.Ldebug_macro29: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x12 + .4byte .LASF920 + .byte 0x5 + .byte 0x1c + .4byte .LASF921 + .byte 0x5 + .byte 0x20 + .4byte .LASF922 + .byte 0x5 + .byte 0x22 + .4byte .LASF923 + .byte 0x5 + .byte 0x29 + .4byte .LASF924 + .byte 0x5 + .byte 0x2b + .4byte .LASF925 + .byte 0x5 + .byte 0x2c + .4byte .LASF926 + .byte 0x5 + .byte 0x2d + .4byte .LASF927 + .byte 0x5 + .byte 0x2e + .4byte .LASF928 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.types.h.69.d3b0cd6975c34dc3e23d2962530677c9,comdat +.Ldebug_macro30: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x45 + .4byte .LASF929 + .byte 0x5 + .byte 0x46 + .4byte .LASF930 + .byte 0x5 + .byte 0x4a + .4byte .LASF931 + .byte 0x5 + .byte 0x4f + .4byte .LASF932 + .byte 0x5 + .byte 0x58 + .4byte .LASF933 + .byte 0x5 + .byte 0x5c + .4byte .LASF934 + .byte 0x5 + .byte 0x60 + .4byte .LASF935 + .byte 0x5 + .byte 0x64 + .4byte .LASF936 + .byte 0x5 + .byte 0x66 + .4byte .LASF937 + .byte 0x5 + .byte 0x72 + .4byte .LASF938 + .byte 0x5 + .byte 0x77 + .4byte .LASF939 + .byte 0x5 + .byte 0x7c + .4byte .LASF940 + .byte 0x5 + .byte 0x7d + .4byte .LASF941 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF942 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF943 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF944 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF945 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF946 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF947 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF948 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF949 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF950 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF951 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF952 + .byte 0x5 + .byte 0xbf,0x1 + .4byte .LASF953 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF954 + .byte 0x5 + .byte 0xc9,0x1 + .4byte .LASF955 + .byte 0x5 + .byte 0xce,0x1 + .4byte .LASF956 + .byte 0x5 + .byte 0xd3,0x1 + .4byte .LASF957 + .byte 0x5 + .byte 0xd8,0x1 + .4byte .LASF958 + .byte 0x5 + .byte 0xd9,0x1 + .4byte .LASF959 + .byte 0x5 + .byte 0xde,0x1 + .4byte .LASF960 + .byte 0x5 + .byte 0xdf,0x1 + .4byte .LASF961 + .byte 0x5 + .byte 0xe4,0x1 + .4byte .LASF962 + .byte 0x5 + .byte 0xe9,0x1 + .4byte .LASF963 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.sched.h.35.8f42b8357f4bf2835afd7fed4664ad96,comdat +.Ldebug_macro31: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x23 + .4byte .LASF967 + .byte 0x5 + .byte 0x26 + .4byte .LASF968 + .byte 0x5 + .byte 0x27 + .4byte .LASF969 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._pthreadtypes.h.36.fcee9961c35163dde6267ef772ad1972,comdat +.Ldebug_macro32: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x24 + .4byte .LASF970 + .byte 0x5 + .byte 0x25 + .4byte .LASF971 + .byte 0x5 + .byte 0x28 + .4byte .LASF972 + .byte 0x5 + .byte 0x2b + .4byte .LASF973 + .byte 0x5 + .byte 0x2e + .4byte .LASF974 + .byte 0x5 + .byte 0x2f + .4byte .LASF975 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF976 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF977 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF978 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.timespec.h.35.9908f77afd502918e33d6f1534fa5ba4,comdat +.Ldebug_macro33: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x23 + .4byte .LASF980 + .byte 0x5 + .byte 0x29 + .4byte .LASF981 + .byte 0x5 + .byte 0x2e + .4byte .LASF982 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.time.h.162.117026b75cfaa0f83901a5f301a8b4f7,comdat +.Ldebug_macro34: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF984 + .byte 0x5 + .byte 0xf0,0x1 + .4byte .LASF985 + .byte 0x5 + .byte 0xf1,0x1 + .4byte .LASF986 + .byte 0x5 + .byte 0xf5,0x1 + .4byte .LASF987 + .byte 0x5 + .byte 0xf8,0x1 + .4byte .LASF988 + .byte 0x5 + .byte 0xfe,0x1 + .4byte .LASF989 + .byte 0x5 + .byte 0x83,0x2 + .4byte .LASF990 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stat.h.71.d65ac61ff88c651e198008cfb38bda9c,comdat +.Ldebug_macro35: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x47 + .4byte .LASF991 + .byte 0x5 + .byte 0x48 + .4byte .LASF992 + .byte 0x5 + .byte 0x49 + .4byte .LASF993 + .byte 0x5 + .byte 0x4a + .4byte .LASF994 + .byte 0x5 + .byte 0x4b + .4byte .LASF995 + .byte 0x5 + .byte 0x4c + .4byte .LASF996 + .byte 0x5 + .byte 0x4d + .4byte .LASF997 + .byte 0x5 + .byte 0x4e + .4byte .LASF998 + .byte 0x5 + .byte 0x50 + .4byte .LASF999 + .byte 0x5 + .byte 0x52 + .4byte .LASF1000 + .byte 0x5 + .byte 0x53 + .4byte .LASF1001 + .byte 0x5 + .byte 0x54 + .4byte .LASF1002 + .byte 0x5 + .byte 0x56 + .4byte .LASF1003 + .byte 0x5 + .byte 0x57 + .4byte .LASF1004 + .byte 0x5 + .byte 0x58 + .4byte .LASF1005 + .byte 0x5 + .byte 0x59 + .4byte .LASF1006 + .byte 0x5 + .byte 0x5c + .4byte .LASF1007 + .byte 0x5 + .byte 0x5d + .4byte .LASF1008 + .byte 0x5 + .byte 0x5e + .4byte .LASF1009 + .byte 0x5 + .byte 0x5f + .4byte .LASF1010 + .byte 0x5 + .byte 0x60 + .4byte .LASF1011 + .byte 0x5 + .byte 0x61 + .4byte .LASF1012 + .byte 0x5 + .byte 0x62 + .4byte .LASF1013 + .byte 0x5 + .byte 0x63 + .4byte .LASF1014 + .byte 0x5 + .byte 0x72 + .4byte .LASF1015 + .byte 0x5 + .byte 0x73 + .4byte .LASF1016 + .byte 0x5 + .byte 0x74 + .4byte .LASF1017 + .byte 0x5 + .byte 0x75 + .4byte .LASF1018 + .byte 0x5 + .byte 0x76 + .4byte .LASF1019 + .byte 0x5 + .byte 0x77 + .4byte .LASF1020 + .byte 0x5 + .byte 0x78 + .4byte .LASF1021 + .byte 0x5 + .byte 0x79 + .4byte .LASF1022 + .byte 0x5 + .byte 0x7a + .4byte .LASF1023 + .byte 0x5 + .byte 0x7b + .4byte .LASF1024 + .byte 0x5 + .byte 0x7c + .4byte .LASF1025 + .byte 0x5 + .byte 0x7d + .4byte .LASF1026 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF1027 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF1028 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF1029 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF1030 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF1031 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF1032 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF1033 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF1034 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF1035 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF1036 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._default_fcntl.h.6.6460bee906b14bf62388713178ece422,comdat +.Ldebug_macro36: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x6 + .4byte .LASF1039 + .byte 0x5 + .byte 0x9 + .4byte .LASF1040 + .byte 0x5 + .byte 0xa + .4byte .LASF1041 + .byte 0x5 + .byte 0xb + .4byte .LASF1042 + .byte 0x5 + .byte 0xc + .4byte .LASF1043 + .byte 0x5 + .byte 0xd + .4byte .LASF1044 + .byte 0x5 + .byte 0xe + .4byte .LASF1045 + .byte 0x5 + .byte 0xf + .4byte .LASF1046 + .byte 0x5 + .byte 0x10 + .4byte .LASF1047 + .byte 0x5 + .byte 0x11 + .4byte .LASF1048 + .byte 0x5 + .byte 0x12 + .4byte .LASF1049 + .byte 0x5 + .byte 0x13 + .4byte .LASF1050 + .byte 0x5 + .byte 0x14 + .4byte .LASF1051 + .byte 0x5 + .byte 0x15 + .4byte .LASF1052 + .byte 0x5 + .byte 0x16 + .4byte .LASF1053 + .byte 0x5 + .byte 0x17 + .4byte .LASF1054 + .byte 0x5 + .byte 0x18 + .4byte .LASF1055 + .byte 0x5 + .byte 0x19 + .4byte .LASF1056 + .byte 0x5 + .byte 0x1b + .4byte .LASF1057 + .byte 0x5 + .byte 0x22 + .4byte .LASF1058 + .byte 0x5 + .byte 0x23 + .4byte .LASF1059 + .byte 0x5 + .byte 0x24 + .4byte .LASF1060 + .byte 0x5 + .byte 0x25 + .4byte .LASF1061 + .byte 0x5 + .byte 0x26 + .4byte .LASF1062 + .byte 0x5 + .byte 0x27 + .4byte .LASF1063 + .byte 0x5 + .byte 0x28 + .4byte .LASF1064 + .byte 0x5 + .byte 0x29 + .4byte .LASF1065 + .byte 0x5 + .byte 0x2c + .4byte .LASF1066 + .byte 0x5 + .byte 0x2d + .4byte .LASF1067 + .byte 0x5 + .byte 0x55 + .4byte .LASF1068 + .byte 0x5 + .byte 0x56 + .4byte .LASF1069 + .byte 0x5 + .byte 0x57 + .4byte .LASF1070 + .byte 0x5 + .byte 0x58 + .4byte .LASF1071 + .byte 0x5 + .byte 0x59 + .4byte .LASF1072 + .byte 0x5 + .byte 0x5a + .4byte .LASF1073 + .byte 0x5 + .byte 0x60 + .4byte .LASF1074 + .byte 0x5 + .byte 0x61 + .4byte .LASF1075 + .byte 0x5 + .byte 0x62 + .4byte .LASF1076 + .byte 0x5 + .byte 0x63 + .4byte .LASF1077 + .byte 0x5 + .byte 0x64 + .4byte .LASF1078 + .byte 0x5 + .byte 0x65 + .4byte .LASF1079 + .byte 0x5 + .byte 0x6a + .4byte .LASF1080 + .byte 0x5 + .byte 0x6b + .4byte .LASF1081 + .byte 0x5 + .byte 0x6c + .4byte .LASF1082 + .byte 0x5 + .byte 0x6d + .4byte .LASF1083 + .byte 0x5 + .byte 0x6e + .4byte .LASF1084 + .byte 0x5 + .byte 0x73 + .4byte .LASF1085 + .byte 0x5 + .byte 0x77 + .4byte .LASF1086 + .byte 0x5 + .byte 0x7a + .4byte .LASF1087 + .byte 0x5 + .byte 0x7b + .4byte .LASF1088 + .byte 0x5 + .byte 0x7c + .4byte .LASF1089 + .byte 0x5 + .byte 0x7d + .4byte .LASF1090 + .byte 0x5 + .byte 0x7e + .4byte .LASF1091 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF1092 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF1093 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF1094 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF1095 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF1096 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF1097 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF1098 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF1099 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF1100 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF1101 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF1102 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF1103 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF1104 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF1105 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF1106 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF1107 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF1108 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF1109 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF1110 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF1111 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF1112 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF1113 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF1114 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.libc_fcntl.h.34.18223a593be305562b8722909621075c,comdat +.Ldebug_macro37: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x22 + .4byte .LASF1115 + .byte 0x5 + .byte 0x29 + .4byte .LASF1116 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.libc_dirent.h.11.9dbc08f41ca19a04da2a314311f8cc8a,comdat +.Ldebug_macro38: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xb + .4byte .LASF1117 + .byte 0x5 + .byte 0xd + .4byte .LASF1118 + .byte 0x5 + .byte 0xe + .4byte .LASF1119 + .byte 0x5 + .byte 0xf + .4byte .LASF1120 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rtservice.h.17.23d37154bec68b3e84c125ac41e02a68,comdat +.Ldebug_macro39: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x11 + .4byte .LASF1121 + .byte 0x5 + .byte 0x21 + .4byte .LASF1122 + .byte 0x5 + .byte 0x28 + .4byte .LASF1123 + .byte 0x5 + .byte 0x7e + .4byte .LASF1124 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF1125 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF1126 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF1127 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF1128 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF1129 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF1130 + .byte 0x5 + .byte 0x89,0x2 + .4byte .LASF1131 + .byte 0x5 + .byte 0x91,0x2 + .4byte .LASF1132 + .byte 0x5 + .byte 0x9a,0x2 + .4byte .LASF1133 + .byte 0x5 + .byte 0xa7,0x2 + .4byte .LASF1134 + .byte 0x5 + .byte 0xb2,0x2 + .4byte .LASF1135 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rtthread.h.416.d9a3aab12b6e209a996b297b6e4d6368,comdat +.Ldebug_macro40: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa0,0x3 + .4byte .LASF1138 + .byte 0x5 + .byte 0xa1,0x3 + .4byte .LASF1139 + .byte 0x5 + .byte 0xa2,0x3 + .4byte .LASF1140 + .byte 0x5 + .byte 0xa3,0x3 + .4byte .LASF1141 + .byte 0x5 + .byte 0xa4,0x3 + .4byte .LASF1142 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.finsh_api.h.11.dc04b4bb03a761b5358c3ecbeeaae9d0,comdat +.Ldebug_macro41: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xb + .4byte .LASF1143 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF1144 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF1145 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF1146 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF1147 + .byte 0x5 + .byte 0xd1,0x1 + .4byte .LASF1148 + .byte 0x5 + .byte 0xd3,0x1 + .4byte .LASF1149 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.rthw.h.30.3bd28c3a13f5a1ac35b73066b4b0fe68,comdat +.Ldebug_macro42: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x1e + .4byte .LASF1150 + .byte 0x5 + .byte 0x21 + .4byte .LASF1151 + .byte 0x5 + .byte 0x24 + .4byte .LASF1152 + .byte 0x5 + .byte 0x28 + .4byte .LASF1153 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF1154 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF1155 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF1156 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF1157 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.cpuport.h.12.4bb6d4411103d12353a8a8463a3af165,comdat +.Ldebug_macro43: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xc + .4byte .LASF1158 + .byte 0x5 + .byte 0x16 + .4byte .LASF1159 + .byte 0x5 + .byte 0x17 + .4byte .LASF1160 + .byte 0x5 + .byte 0x18 + .4byte .LASF1161 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x.h.9.f3610063a5ae00580679f03c4273d096,comdat +.Ldebug_macro44: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9 + .4byte .LASF1162 + .byte 0x5 + .byte 0xf + .4byte .LASF1163 + .byte 0x5 + .byte 0x10 + .4byte .LASF1164 + .byte 0x5 + .byte 0x12 + .4byte .LASF1165 + .byte 0x5 + .byte 0x15 + .4byte .LASF1166 + .byte 0x5 + .byte 0x17 + .4byte .LASF1167 + .byte 0x5 + .byte 0x4e + .4byte .LASF1168 + .byte 0x5 + .byte 0x4f + .4byte .LASF1169 + .byte 0 + .section .debug_macro,"G",@progbits,wm4._intsup.h.10.cce27fed8484c08a33f522034c30d2b5,comdat +.Ldebug_macro45: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF1171 + .byte 0x5 + .byte 0x10 + .4byte .LASF1172 + .byte 0x6 + .byte 0x2a + .4byte .LASF1173 + .byte 0x6 + .byte 0x2b + .4byte .LASF811 + .byte 0x6 + .byte 0x2c + .4byte .LASF1174 + .byte 0x6 + .byte 0x2d + .4byte .LASF1175 + .byte 0x2 + .byte 0x2e + .string "int" + .byte 0x6 + .byte 0x2f + .4byte .LASF1176 + .byte 0x6 + .byte 0x30 + .4byte .LASF1177 + .byte 0x5 + .byte 0x31 + .4byte .LASF1178 + .byte 0x5 + .byte 0x32 + .4byte .LASF1179 + .byte 0x5 + .byte 0x33 + .4byte .LASF1180 + .byte 0x5 + .byte 0x34 + .4byte .LASF1181 + .byte 0x5 + .byte 0x35 + .4byte .LASF1182 + .byte 0x5 + .byte 0x36 + .4byte .LASF1183 + .byte 0x5 + .byte 0x37 + .4byte .LASF1184 + .byte 0x5 + .byte 0x40 + .4byte .LASF1185 + .byte 0x5 + .byte 0x47 + .4byte .LASF1186 + .byte 0x5 + .byte 0x4f + .4byte .LASF1187 + .byte 0x5 + .byte 0x5a + .4byte .LASF1188 + .byte 0x5 + .byte 0x65 + .4byte .LASF1189 + .byte 0x5 + .byte 0x6e + .4byte .LASF1190 + .byte 0x5 + .byte 0x75 + .4byte .LASF1191 + .byte 0x5 + .byte 0x7e + .4byte .LASF1192 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF1193 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF1194 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF1195 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF1196 + .byte 0x5 + .byte 0xaa,0x1 + .4byte .LASF1197 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF1198 + .byte 0x6 + .byte 0xb5,0x1 + .4byte .LASF1173 + .byte 0x6 + .byte 0xb6,0x1 + .4byte .LASF811 + .byte 0x6 + .byte 0xb7,0x1 + .4byte .LASF1174 + .byte 0x6 + .byte 0xb8,0x1 + .4byte .LASF1175 + .byte 0x2 + .byte 0xb9,0x1 + .string "int" + .byte 0x6 + .byte 0xba,0x1 + .4byte .LASF1177 + .byte 0x6 + .byte 0xbf,0x1 + .4byte .LASF1176 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.stdint.h.23.d53047a68f4a85177f80b422d52785ed,comdat +.Ldebug_macro46: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x17 + .4byte .LASF1199 + .byte 0x5 + .byte 0x1d + .4byte .LASF1200 + .byte 0x5 + .byte 0x23 + .4byte .LASF1201 + .byte 0x5 + .byte 0x29 + .4byte .LASF1202 + .byte 0x5 + .byte 0x35 + .4byte .LASF1203 + .byte 0x5 + .byte 0x3f + .4byte .LASF1204 + .byte 0x5 + .byte 0x49 + .4byte .LASF1205 + .byte 0x5 + .byte 0x53 + .4byte .LASF1206 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF1207 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF1208 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF1209 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF1210 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF1211 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF1212 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF1213 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF1214 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF1215 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF1216 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF1217 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF1218 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF1219 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF1220 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF1221 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF1222 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF1223 + .byte 0x5 + .byte 0xc6,0x1 + .4byte .LASF1224 + .byte 0x5 + .byte 0xd4,0x1 + .4byte .LASF1225 + .byte 0x5 + .byte 0xd5,0x1 + .4byte .LASF1226 + .byte 0x5 + .byte 0xd6,0x1 + .4byte .LASF1227 + .byte 0x5 + .byte 0xe6,0x1 + .4byte .LASF1228 + .byte 0x5 + .byte 0xe7,0x1 + .4byte .LASF1229 + .byte 0x5 + .byte 0xe8,0x1 + .4byte .LASF1230 + .byte 0x5 + .byte 0xf6,0x1 + .4byte .LASF1231 + .byte 0x5 + .byte 0xf7,0x1 + .4byte .LASF1232 + .byte 0x5 + .byte 0xf8,0x1 + .4byte .LASF1233 + .byte 0x5 + .byte 0x86,0x2 + .4byte .LASF1234 + .byte 0x5 + .byte 0x87,0x2 + .4byte .LASF1235 + .byte 0x5 + .byte 0x88,0x2 + .4byte .LASF1236 + .byte 0x5 + .byte 0x96,0x2 + .4byte .LASF1237 + .byte 0x5 + .byte 0x97,0x2 + .4byte .LASF1238 + .byte 0x5 + .byte 0x98,0x2 + .4byte .LASF1239 + .byte 0x5 + .byte 0xa6,0x2 + .4byte .LASF1240 + .byte 0x5 + .byte 0xa7,0x2 + .4byte .LASF1241 + .byte 0x5 + .byte 0xa8,0x2 + .4byte .LASF1242 + .byte 0x5 + .byte 0xb6,0x2 + .4byte .LASF1243 + .byte 0x5 + .byte 0xb7,0x2 + .4byte .LASF1244 + .byte 0x5 + .byte 0xb8,0x2 + .4byte .LASF1245 + .byte 0x5 + .byte 0xc6,0x2 + .4byte .LASF1246 + .byte 0x5 + .byte 0xc7,0x2 + .4byte .LASF1247 + .byte 0x5 + .byte 0xcf,0x2 + .4byte .LASF1248 + .byte 0x5 + .byte 0xd7,0x2 + .4byte .LASF1249 + .byte 0x5 + .byte 0xdd,0x2 + .4byte .LASF1250 + .byte 0x5 + .byte 0xde,0x2 + .4byte .LASF1251 + .byte 0x5 + .byte 0xe2,0x2 + .4byte .LASF1252 + .byte 0x5 + .byte 0xe6,0x2 + .4byte .LASF1253 + .byte 0x5 + .byte 0xeb,0x2 + .4byte .LASF1254 + .byte 0x5 + .byte 0xf6,0x2 + .4byte .LASF1255 + .byte 0x5 + .byte 0x80,0x3 + .4byte .LASF1256 + .byte 0x5 + .byte 0x85,0x3 + .4byte .LASF1257 + .byte 0x5 + .byte 0x8c,0x3 + .4byte .LASF1258 + .byte 0x5 + .byte 0x8d,0x3 + .4byte .LASF1259 + .byte 0x5 + .byte 0x98,0x3 + .4byte .LASF1260 + .byte 0x5 + .byte 0x99,0x3 + .4byte .LASF1261 + .byte 0x5 + .byte 0xa4,0x3 + .4byte .LASF1262 + .byte 0x5 + .byte 0xa5,0x3 + .4byte .LASF1263 + .byte 0x5 + .byte 0xb1,0x3 + .4byte .LASF1264 + .byte 0x5 + .byte 0xb2,0x3 + .4byte .LASF1265 + .byte 0x5 + .byte 0xc1,0x3 + .4byte .LASF1266 + .byte 0x5 + .byte 0xc2,0x3 + .4byte .LASF1267 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.core_riscv.h.9.05dc68763b7326cae146147fbd4ce6a8,comdat +.Ldebug_macro47: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9 + .4byte .LASF1268 + .byte 0x5 + .byte 0xf + .4byte .LASF1269 + .byte 0x5 + .byte 0x11 + .4byte .LASF1270 + .byte 0x5 + .byte 0x12 + .4byte .LASF1271 + .byte 0x5 + .byte 0x3b + .4byte .LASF1272 + .byte 0x5 + .byte 0x6e + .4byte .LASF1273 + .byte 0x5 + .byte 0x6f + .4byte .LASF1274 + .byte 0x5 + .byte 0x70 + .4byte .LASF1275 + .byte 0x5 + .byte 0x71 + .4byte .LASF1276 + .byte 0x5 + .byte 0x72 + .4byte .LASF1277 + .byte 0x5 + .byte 0x74 + .4byte .LASF1278 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x.h.88.ab40d4a513beb5e14ede771b5e661d32,comdat +.Ldebug_macro48: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x58 + .4byte .LASF1280 + .byte 0x5 + .byte 0x59 + .4byte .LASF1281 + .byte 0x5 + .byte 0x5a + .4byte .LASF1282 + .byte 0x5 + .byte 0xfa,0x3 + .4byte .LASF1283 + .byte 0x5 + .byte 0xfb,0x3 + .4byte .LASF1284 + .byte 0x5 + .byte 0xfc,0x3 + .4byte .LASF1285 + .byte 0x5 + .byte 0xff,0x3 + .4byte .LASF1286 + .byte 0x5 + .byte 0x80,0x4 + .4byte .LASF1287 + .byte 0x5 + .byte 0x81,0x4 + .4byte .LASF1288 + .byte 0x5 + .byte 0x83,0x4 + .4byte .LASF1289 + .byte 0x5 + .byte 0x84,0x4 + .4byte .LASF1290 + .byte 0x5 + .byte 0x85,0x4 + .4byte .LASF1291 + .byte 0x5 + .byte 0x86,0x4 + .4byte .LASF1292 + .byte 0x5 + .byte 0x87,0x4 + .4byte .LASF1293 + .byte 0x5 + .byte 0x88,0x4 + .4byte .LASF1294 + .byte 0x5 + .byte 0x89,0x4 + .4byte .LASF1295 + .byte 0x5 + .byte 0x8a,0x4 + .4byte .LASF1296 + .byte 0x5 + .byte 0x8b,0x4 + .4byte .LASF1297 + .byte 0x5 + .byte 0x8c,0x4 + .4byte .LASF1298 + .byte 0x5 + .byte 0x8d,0x4 + .4byte .LASF1299 + .byte 0x5 + .byte 0x8e,0x4 + .4byte .LASF1300 + .byte 0x5 + .byte 0x8f,0x4 + .4byte .LASF1301 + .byte 0x5 + .byte 0x90,0x4 + .4byte .LASF1302 + .byte 0x5 + .byte 0x91,0x4 + .4byte .LASF1303 + .byte 0x5 + .byte 0x92,0x4 + .4byte .LASF1304 + .byte 0x5 + .byte 0x93,0x4 + .4byte .LASF1305 + .byte 0x5 + .byte 0x94,0x4 + .4byte .LASF1306 + .byte 0x5 + .byte 0x95,0x4 + .4byte .LASF1307 + .byte 0x5 + .byte 0x96,0x4 + .4byte .LASF1308 + .byte 0x5 + .byte 0x97,0x4 + .4byte .LASF1309 + .byte 0x5 + .byte 0x98,0x4 + .4byte .LASF1310 + .byte 0x5 + .byte 0x99,0x4 + .4byte .LASF1311 + .byte 0x5 + .byte 0x9b,0x4 + .4byte .LASF1312 + .byte 0x5 + .byte 0x9c,0x4 + .4byte .LASF1313 + .byte 0x5 + .byte 0x9d,0x4 + .4byte .LASF1314 + .byte 0x5 + .byte 0x9e,0x4 + .4byte .LASF1315 + .byte 0x5 + .byte 0x9f,0x4 + .4byte .LASF1316 + .byte 0x5 + .byte 0xa0,0x4 + .4byte .LASF1317 + .byte 0x5 + .byte 0xa1,0x4 + .4byte .LASF1318 + .byte 0x5 + .byte 0xa2,0x4 + .4byte .LASF1319 + .byte 0x5 + .byte 0xa3,0x4 + .4byte .LASF1320 + .byte 0x5 + .byte 0xa4,0x4 + .4byte .LASF1321 + .byte 0x5 + .byte 0xa5,0x4 + .4byte .LASF1322 + .byte 0x5 + .byte 0xa6,0x4 + .4byte .LASF1323 + .byte 0x5 + .byte 0xa7,0x4 + .4byte .LASF1324 + .byte 0x5 + .byte 0xa8,0x4 + .4byte .LASF1325 + .byte 0x5 + .byte 0xa9,0x4 + .4byte .LASF1326 + .byte 0x5 + .byte 0xaa,0x4 + .4byte .LASF1327 + .byte 0x5 + .byte 0xab,0x4 + .4byte .LASF1328 + .byte 0x5 + .byte 0xac,0x4 + .4byte .LASF1329 + .byte 0x5 + .byte 0xad,0x4 + .4byte .LASF1330 + .byte 0x5 + .byte 0xae,0x4 + .4byte .LASF1331 + .byte 0x5 + .byte 0xaf,0x4 + .4byte .LASF1332 + .byte 0x5 + .byte 0xb0,0x4 + .4byte .LASF1333 + .byte 0x5 + .byte 0xb2,0x4 + .4byte .LASF1334 + .byte 0x5 + .byte 0xb3,0x4 + .4byte .LASF1335 + .byte 0x5 + .byte 0xb4,0x4 + .4byte .LASF1336 + .byte 0x5 + .byte 0xb5,0x4 + .4byte .LASF1337 + .byte 0x5 + .byte 0xb6,0x4 + .4byte .LASF1338 + .byte 0x5 + .byte 0xb7,0x4 + .4byte .LASF1339 + .byte 0x5 + .byte 0xb8,0x4 + .4byte .LASF1340 + .byte 0x5 + .byte 0xb9,0x4 + .4byte .LASF1341 + .byte 0x5 + .byte 0xba,0x4 + .4byte .LASF1342 + .byte 0x5 + .byte 0xbb,0x4 + .4byte .LASF1343 + .byte 0x5 + .byte 0xbc,0x4 + .4byte .LASF1344 + .byte 0x5 + .byte 0xbd,0x4 + .4byte .LASF1345 + .byte 0x5 + .byte 0xbe,0x4 + .4byte .LASF1346 + .byte 0x5 + .byte 0xbf,0x4 + .4byte .LASF1347 + .byte 0x5 + .byte 0xc0,0x4 + .4byte .LASF1348 + .byte 0x5 + .byte 0xc1,0x4 + .4byte .LASF1349 + .byte 0x5 + .byte 0xc3,0x4 + .4byte .LASF1350 + .byte 0x5 + .byte 0xc4,0x4 + .4byte .LASF1351 + .byte 0x5 + .byte 0xc5,0x4 + .4byte .LASF1352 + .byte 0x5 + .byte 0xc6,0x4 + .4byte .LASF1353 + .byte 0x5 + .byte 0xc9,0x4 + .4byte .LASF1354 + .byte 0x5 + .byte 0xca,0x4 + .4byte .LASF1355 + .byte 0x5 + .byte 0xcb,0x4 + .4byte .LASF1356 + .byte 0x5 + .byte 0xcc,0x4 + .4byte .LASF1357 + .byte 0x5 + .byte 0xcd,0x4 + .4byte .LASF1358 + .byte 0x5 + .byte 0xce,0x4 + .4byte .LASF1359 + .byte 0x5 + .byte 0xcf,0x4 + .4byte .LASF1360 + .byte 0x5 + .byte 0xd0,0x4 + .4byte .LASF1361 + .byte 0x5 + .byte 0xd1,0x4 + .4byte .LASF1362 + .byte 0x5 + .byte 0xd2,0x4 + .4byte .LASF1363 + .byte 0x5 + .byte 0xd3,0x4 + .4byte .LASF1364 + .byte 0x5 + .byte 0xd4,0x4 + .4byte .LASF1365 + .byte 0x5 + .byte 0xd5,0x4 + .4byte .LASF1366 + .byte 0x5 + .byte 0xd6,0x4 + .4byte .LASF1367 + .byte 0x5 + .byte 0xd7,0x4 + .4byte .LASF1368 + .byte 0x5 + .byte 0xd8,0x4 + .4byte .LASF1369 + .byte 0x5 + .byte 0xd9,0x4 + .4byte .LASF1370 + .byte 0x5 + .byte 0xda,0x4 + .4byte .LASF1371 + .byte 0x5 + .byte 0xdb,0x4 + .4byte .LASF1372 + .byte 0x5 + .byte 0xdc,0x4 + .4byte .LASF1373 + .byte 0x5 + .byte 0xdd,0x4 + .4byte .LASF1374 + .byte 0x5 + .byte 0xde,0x4 + .4byte .LASF1375 + .byte 0x5 + .byte 0xdf,0x4 + .4byte .LASF1376 + .byte 0x5 + .byte 0xe0,0x4 + .4byte .LASF1377 + .byte 0x5 + .byte 0xe1,0x4 + .4byte .LASF1378 + .byte 0x5 + .byte 0xe2,0x4 + .4byte .LASF1379 + .byte 0x5 + .byte 0xe3,0x4 + .4byte .LASF1380 + .byte 0x5 + .byte 0xe4,0x4 + .4byte .LASF1381 + .byte 0x5 + .byte 0xe5,0x4 + .4byte .LASF1382 + .byte 0x5 + .byte 0xe6,0x4 + .4byte .LASF1383 + .byte 0x5 + .byte 0xe7,0x4 + .4byte .LASF1384 + .byte 0x5 + .byte 0xe8,0x4 + .4byte .LASF1385 + .byte 0x5 + .byte 0xe9,0x4 + .4byte .LASF1386 + .byte 0x5 + .byte 0xea,0x4 + .4byte .LASF1387 + .byte 0x5 + .byte 0xeb,0x4 + .4byte .LASF1388 + .byte 0x5 + .byte 0xec,0x4 + .4byte .LASF1389 + .byte 0x5 + .byte 0xed,0x4 + .4byte .LASF1390 + .byte 0x5 + .byte 0xee,0x4 + .4byte .LASF1391 + .byte 0x5 + .byte 0xef,0x4 + .4byte .LASF1392 + .byte 0x5 + .byte 0xf0,0x4 + .4byte .LASF1393 + .byte 0x5 + .byte 0xf1,0x4 + .4byte .LASF1394 + .byte 0x5 + .byte 0xf2,0x4 + .4byte .LASF1395 + .byte 0x5 + .byte 0xf3,0x4 + .4byte .LASF1396 + .byte 0x5 + .byte 0xf4,0x4 + .4byte .LASF1397 + .byte 0x5 + .byte 0xf5,0x4 + .4byte .LASF1398 + .byte 0x5 + .byte 0xf6,0x4 + .4byte .LASF1399 + .byte 0x5 + .byte 0xf7,0x4 + .4byte .LASF1400 + .byte 0x5 + .byte 0xf8,0x4 + .4byte .LASF1401 + .byte 0x5 + .byte 0xf9,0x4 + .4byte .LASF1402 + .byte 0x5 + .byte 0xfa,0x4 + .4byte .LASF1403 + .byte 0x5 + .byte 0xfb,0x4 + .4byte .LASF1404 + .byte 0x5 + .byte 0xfc,0x4 + .4byte .LASF1405 + .byte 0x5 + .byte 0xfd,0x4 + .4byte .LASF1406 + .byte 0x5 + .byte 0xfe,0x4 + .4byte .LASF1407 + .byte 0x5 + .byte 0xff,0x4 + .4byte .LASF1408 + .byte 0x5 + .byte 0x80,0x5 + .4byte .LASF1409 + .byte 0x5 + .byte 0x81,0x5 + .4byte .LASF1410 + .byte 0x5 + .byte 0x82,0x5 + .4byte .LASF1411 + .byte 0x5 + .byte 0x83,0x5 + .4byte .LASF1412 + .byte 0x5 + .byte 0x84,0x5 + .4byte .LASF1413 + .byte 0x5 + .byte 0x85,0x5 + .4byte .LASF1414 + .byte 0x5 + .byte 0x86,0x5 + .4byte .LASF1415 + .byte 0x5 + .byte 0x87,0x5 + .4byte .LASF1416 + .byte 0x5 + .byte 0x88,0x5 + .4byte .LASF1417 + .byte 0x5 + .byte 0x89,0x5 + .4byte .LASF1418 + .byte 0x5 + .byte 0x95,0x5 + .4byte .LASF1419 + .byte 0x5 + .byte 0x96,0x5 + .4byte .LASF1420 + .byte 0x5 + .byte 0x97,0x5 + .4byte .LASF1421 + .byte 0x5 + .byte 0x98,0x5 + .4byte .LASF1422 + .byte 0x5 + .byte 0x99,0x5 + .4byte .LASF1423 + .byte 0x5 + .byte 0x9c,0x5 + .4byte .LASF1424 + .byte 0x5 + .byte 0x9d,0x5 + .4byte .LASF1425 + .byte 0x5 + .byte 0x9e,0x5 + .4byte .LASF1426 + .byte 0x5 + .byte 0x9f,0x5 + .4byte .LASF1427 + .byte 0x5 + .byte 0xa0,0x5 + .4byte .LASF1428 + .byte 0x5 + .byte 0xa1,0x5 + .4byte .LASF1429 + .byte 0x5 + .byte 0xa3,0x5 + .4byte .LASF1430 + .byte 0x5 + .byte 0xa4,0x5 + .4byte .LASF1431 + .byte 0x5 + .byte 0xa5,0x5 + .4byte .LASF1432 + .byte 0x5 + .byte 0xa6,0x5 + .4byte .LASF1433 + .byte 0x5 + .byte 0xa7,0x5 + .4byte .LASF1434 + .byte 0x5 + .byte 0xa8,0x5 + .4byte .LASF1435 + .byte 0x5 + .byte 0xa9,0x5 + .4byte .LASF1436 + .byte 0x5 + .byte 0xaa,0x5 + .4byte .LASF1437 + .byte 0x5 + .byte 0xac,0x5 + .4byte .LASF1438 + .byte 0x5 + .byte 0xad,0x5 + .4byte .LASF1439 + .byte 0x5 + .byte 0xae,0x5 + .4byte .LASF1440 + .byte 0x5 + .byte 0xaf,0x5 + .4byte .LASF1441 + .byte 0x5 + .byte 0xb1,0x5 + .4byte .LASF1442 + .byte 0x5 + .byte 0xb2,0x5 + .4byte .LASF1443 + .byte 0x5 + .byte 0xb3,0x5 + .4byte .LASF1444 + .byte 0x5 + .byte 0xb4,0x5 + .4byte .LASF1445 + .byte 0x5 + .byte 0xb5,0x5 + .4byte .LASF1446 + .byte 0x5 + .byte 0xb7,0x5 + .4byte .LASF1447 + .byte 0x5 + .byte 0xb8,0x5 + .4byte .LASF1448 + .byte 0x5 + .byte 0xbb,0x5 + .4byte .LASF1449 + .byte 0x5 + .byte 0xbc,0x5 + .4byte .LASF1450 + .byte 0x5 + .byte 0xbd,0x5 + .4byte .LASF1451 + .byte 0x5 + .byte 0xbe,0x5 + .4byte .LASF1452 + .byte 0x5 + .byte 0xbf,0x5 + .4byte .LASF1453 + .byte 0x5 + .byte 0xc0,0x5 + .4byte .LASF1454 + .byte 0x5 + .byte 0xc2,0x5 + .4byte .LASF1455 + .byte 0x5 + .byte 0xc3,0x5 + .4byte .LASF1456 + .byte 0x5 + .byte 0xc4,0x5 + .4byte .LASF1457 + .byte 0x5 + .byte 0xc5,0x5 + .4byte .LASF1458 + .byte 0x5 + .byte 0xc7,0x5 + .4byte .LASF1459 + .byte 0x5 + .byte 0xc9,0x5 + .4byte .LASF1460 + .byte 0x5 + .byte 0xca,0x5 + .4byte .LASF1461 + .byte 0x5 + .byte 0xcb,0x5 + .4byte .LASF1462 + .byte 0x5 + .byte 0xcc,0x5 + .4byte .LASF1463 + .byte 0x5 + .byte 0xce,0x5 + .4byte .LASF1464 + .byte 0x5 + .byte 0xcf,0x5 + .4byte .LASF1465 + .byte 0x5 + .byte 0xd0,0x5 + .4byte .LASF1466 + .byte 0x5 + .byte 0xd1,0x5 + .4byte .LASF1467 + .byte 0x5 + .byte 0xd4,0x5 + .4byte .LASF1468 + .byte 0x5 + .byte 0xd5,0x5 + .4byte .LASF1469 + .byte 0x5 + .byte 0xd6,0x5 + .4byte .LASF1470 + .byte 0x5 + .byte 0xd7,0x5 + .4byte .LASF1471 + .byte 0x5 + .byte 0xd9,0x5 + .4byte .LASF1472 + .byte 0x5 + .byte 0xda,0x5 + .4byte .LASF1473 + .byte 0x5 + .byte 0xdb,0x5 + .4byte .LASF1474 + .byte 0x5 + .byte 0xdc,0x5 + .4byte .LASF1475 + .byte 0x5 + .byte 0xde,0x5 + .4byte .LASF1476 + .byte 0x5 + .byte 0xdf,0x5 + .4byte .LASF1477 + .byte 0x5 + .byte 0xe0,0x5 + .4byte .LASF1478 + .byte 0x5 + .byte 0xe1,0x5 + .4byte .LASF1479 + .byte 0x5 + .byte 0xe3,0x5 + .4byte .LASF1480 + .byte 0x5 + .byte 0xe4,0x5 + .4byte .LASF1481 + .byte 0x5 + .byte 0xe5,0x5 + .4byte .LASF1482 + .byte 0x5 + .byte 0xe6,0x5 + .4byte .LASF1483 + .byte 0x5 + .byte 0xe8,0x5 + .4byte .LASF1484 + .byte 0x5 + .byte 0xe9,0x5 + .4byte .LASF1485 + .byte 0x5 + .byte 0xea,0x5 + .4byte .LASF1486 + .byte 0x5 + .byte 0xeb,0x5 + .4byte .LASF1487 + .byte 0x5 + .byte 0xed,0x5 + .4byte .LASF1488 + .byte 0x5 + .byte 0xee,0x5 + .4byte .LASF1489 + .byte 0x5 + .byte 0xef,0x5 + .4byte .LASF1490 + .byte 0x5 + .byte 0xf0,0x5 + .4byte .LASF1491 + .byte 0x5 + .byte 0xf2,0x5 + .4byte .LASF1492 + .byte 0x5 + .byte 0xf3,0x5 + .4byte .LASF1493 + .byte 0x5 + .byte 0xf4,0x5 + .4byte .LASF1494 + .byte 0x5 + .byte 0xf5,0x5 + .4byte .LASF1495 + .byte 0x5 + .byte 0xf7,0x5 + .4byte .LASF1496 + .byte 0x5 + .byte 0xf8,0x5 + .4byte .LASF1497 + .byte 0x5 + .byte 0xf9,0x5 + .4byte .LASF1498 + .byte 0x5 + .byte 0xfa,0x5 + .4byte .LASF1499 + .byte 0x5 + .byte 0xfd,0x5 + .4byte .LASF1500 + .byte 0x5 + .byte 0xfe,0x5 + .4byte .LASF1501 + .byte 0x5 + .byte 0xff,0x5 + .4byte .LASF1502 + .byte 0x5 + .byte 0x80,0x6 + .4byte .LASF1503 + .byte 0x5 + .byte 0x82,0x6 + .4byte .LASF1504 + .byte 0x5 + .byte 0x83,0x6 + .4byte .LASF1505 + .byte 0x5 + .byte 0x84,0x6 + .4byte .LASF1506 + .byte 0x5 + .byte 0x85,0x6 + .4byte .LASF1507 + .byte 0x5 + .byte 0x87,0x6 + .4byte .LASF1508 + .byte 0x5 + .byte 0x88,0x6 + .4byte .LASF1509 + .byte 0x5 + .byte 0x89,0x6 + .4byte .LASF1510 + .byte 0x5 + .byte 0x8a,0x6 + .4byte .LASF1511 + .byte 0x5 + .byte 0x8c,0x6 + .4byte .LASF1512 + .byte 0x5 + .byte 0x8d,0x6 + .4byte .LASF1513 + .byte 0x5 + .byte 0x8e,0x6 + .4byte .LASF1514 + .byte 0x5 + .byte 0x8f,0x6 + .4byte .LASF1515 + .byte 0x5 + .byte 0x91,0x6 + .4byte .LASF1516 + .byte 0x5 + .byte 0x92,0x6 + .4byte .LASF1517 + .byte 0x5 + .byte 0x93,0x6 + .4byte .LASF1518 + .byte 0x5 + .byte 0x94,0x6 + .4byte .LASF1519 + .byte 0x5 + .byte 0x96,0x6 + .4byte .LASF1520 + .byte 0x5 + .byte 0x97,0x6 + .4byte .LASF1521 + .byte 0x5 + .byte 0x98,0x6 + .4byte .LASF1522 + .byte 0x5 + .byte 0x99,0x6 + .4byte .LASF1523 + .byte 0x5 + .byte 0x9b,0x6 + .4byte .LASF1524 + .byte 0x5 + .byte 0x9c,0x6 + .4byte .LASF1525 + .byte 0x5 + .byte 0x9d,0x6 + .4byte .LASF1526 + .byte 0x5 + .byte 0x9e,0x6 + .4byte .LASF1527 + .byte 0x5 + .byte 0xa0,0x6 + .4byte .LASF1528 + .byte 0x5 + .byte 0xa1,0x6 + .4byte .LASF1529 + .byte 0x5 + .byte 0xa2,0x6 + .4byte .LASF1530 + .byte 0x5 + .byte 0xa3,0x6 + .4byte .LASF1531 + .byte 0x5 + .byte 0xa5,0x6 + .4byte .LASF1532 + .byte 0x5 + .byte 0xa6,0x6 + .4byte .LASF1533 + .byte 0x5 + .byte 0xa7,0x6 + .4byte .LASF1534 + .byte 0x5 + .byte 0xa8,0x6 + .4byte .LASF1535 + .byte 0x5 + .byte 0xaa,0x6 + .4byte .LASF1536 + .byte 0x5 + .byte 0xab,0x6 + .4byte .LASF1537 + .byte 0x5 + .byte 0xac,0x6 + .4byte .LASF1538 + .byte 0x5 + .byte 0xad,0x6 + .4byte .LASF1539 + .byte 0x5 + .byte 0xb0,0x6 + .4byte .LASF1540 + .byte 0x5 + .byte 0xb3,0x6 + .4byte .LASF1541 + .byte 0x5 + .byte 0xb6,0x6 + .4byte .LASF1542 + .byte 0x5 + .byte 0xb9,0x6 + .4byte .LASF1543 + .byte 0x5 + .byte 0xbc,0x6 + .4byte .LASF1544 + .byte 0x5 + .byte 0xbf,0x6 + .4byte .LASF1545 + .byte 0x5 + .byte 0xc2,0x6 + .4byte .LASF1546 + .byte 0x5 + .byte 0xc3,0x6 + .4byte .LASF1547 + .byte 0x5 + .byte 0xc4,0x6 + .4byte .LASF1548 + .byte 0x5 + .byte 0xc5,0x6 + .4byte .LASF1549 + .byte 0x5 + .byte 0xc6,0x6 + .4byte .LASF1550 + .byte 0x5 + .byte 0xc7,0x6 + .4byte .LASF1551 + .byte 0x5 + .byte 0xc9,0x6 + .4byte .LASF1552 + .byte 0x5 + .byte 0xca,0x6 + .4byte .LASF1553 + .byte 0x5 + .byte 0xcb,0x6 + .4byte .LASF1554 + .byte 0x5 + .byte 0xcc,0x6 + .4byte .LASF1555 + .byte 0x5 + .byte 0xcd,0x6 + .4byte .LASF1556 + .byte 0x5 + .byte 0xce,0x6 + .4byte .LASF1557 + .byte 0x5 + .byte 0xd0,0x6 + .4byte .LASF1558 + .byte 0x5 + .byte 0xd1,0x6 + .4byte .LASF1559 + .byte 0x5 + .byte 0xd2,0x6 + .4byte .LASF1560 + .byte 0x5 + .byte 0xd3,0x6 + .4byte .LASF1561 + .byte 0x5 + .byte 0xd4,0x6 + .4byte .LASF1562 + .byte 0x5 + .byte 0xd5,0x6 + .4byte .LASF1563 + .byte 0x5 + .byte 0xd7,0x6 + .4byte .LASF1564 + .byte 0x5 + .byte 0xd8,0x6 + .4byte .LASF1565 + .byte 0x5 + .byte 0xd9,0x6 + .4byte .LASF1566 + .byte 0x5 + .byte 0xda,0x6 + .4byte .LASF1567 + .byte 0x5 + .byte 0xdb,0x6 + .4byte .LASF1568 + .byte 0x5 + .byte 0xdc,0x6 + .4byte .LASF1569 + .byte 0x5 + .byte 0xde,0x6 + .4byte .LASF1570 + .byte 0x5 + .byte 0xdf,0x6 + .4byte .LASF1571 + .byte 0x5 + .byte 0xe0,0x6 + .4byte .LASF1572 + .byte 0x5 + .byte 0xe1,0x6 + .4byte .LASF1573 + .byte 0x5 + .byte 0xe2,0x6 + .4byte .LASF1574 + .byte 0x5 + .byte 0xe5,0x6 + .4byte .LASF1575 + .byte 0x5 + .byte 0xe6,0x6 + .4byte .LASF1576 + .byte 0x5 + .byte 0xe7,0x6 + .4byte .LASF1577 + .byte 0x5 + .byte 0xe8,0x6 + .4byte .LASF1578 + .byte 0x5 + .byte 0xe9,0x6 + .4byte .LASF1579 + .byte 0x5 + .byte 0xea,0x6 + .4byte .LASF1580 + .byte 0x5 + .byte 0xec,0x6 + .4byte .LASF1581 + .byte 0x5 + .byte 0xed,0x6 + .4byte .LASF1582 + .byte 0x5 + .byte 0xee,0x6 + .4byte .LASF1583 + .byte 0x5 + .byte 0xef,0x6 + .4byte .LASF1584 + .byte 0x5 + .byte 0xf0,0x6 + .4byte .LASF1585 + .byte 0x5 + .byte 0xf1,0x6 + .4byte .LASF1586 + .byte 0x5 + .byte 0xf3,0x6 + .4byte .LASF1587 + .byte 0x5 + .byte 0xf4,0x6 + .4byte .LASF1588 + .byte 0x5 + .byte 0xf5,0x6 + .4byte .LASF1589 + .byte 0x5 + .byte 0xf6,0x6 + .4byte .LASF1590 + .byte 0x5 + .byte 0xf7,0x6 + .4byte .LASF1591 + .byte 0x5 + .byte 0xf8,0x6 + .4byte .LASF1592 + .byte 0x5 + .byte 0xfa,0x6 + .4byte .LASF1593 + .byte 0x5 + .byte 0xfb,0x6 + .4byte .LASF1594 + .byte 0x5 + .byte 0xfc,0x6 + .4byte .LASF1595 + .byte 0x5 + .byte 0xfd,0x6 + .4byte .LASF1596 + .byte 0x5 + .byte 0xfe,0x6 + .4byte .LASF1597 + .byte 0x5 + .byte 0xff,0x6 + .4byte .LASF1598 + .byte 0x5 + .byte 0x81,0x7 + .4byte .LASF1599 + .byte 0x5 + .byte 0x82,0x7 + .4byte .LASF1600 + .byte 0x5 + .byte 0x83,0x7 + .4byte .LASF1601 + .byte 0x5 + .byte 0x84,0x7 + .4byte .LASF1602 + .byte 0x5 + .byte 0x85,0x7 + .4byte .LASF1603 + .byte 0x5 + .byte 0x86,0x7 + .4byte .LASF1604 + .byte 0x5 + .byte 0x88,0x7 + .4byte .LASF1605 + .byte 0x5 + .byte 0x89,0x7 + .4byte .LASF1606 + .byte 0x5 + .byte 0x8a,0x7 + .4byte .LASF1607 + .byte 0x5 + .byte 0x8b,0x7 + .4byte .LASF1608 + .byte 0x5 + .byte 0x8c,0x7 + .4byte .LASF1609 + .byte 0x5 + .byte 0x8d,0x7 + .4byte .LASF1610 + .byte 0x5 + .byte 0x90,0x7 + .4byte .LASF1611 + .byte 0x5 + .byte 0x91,0x7 + .4byte .LASF1612 + .byte 0x5 + .byte 0x92,0x7 + .4byte .LASF1613 + .byte 0x5 + .byte 0x93,0x7 + .4byte .LASF1614 + .byte 0x5 + .byte 0x94,0x7 + .4byte .LASF1615 + .byte 0x5 + .byte 0x95,0x7 + .4byte .LASF1616 + .byte 0x5 + .byte 0x97,0x7 + .4byte .LASF1617 + .byte 0x5 + .byte 0x98,0x7 + .4byte .LASF1618 + .byte 0x5 + .byte 0x99,0x7 + .4byte .LASF1619 + .byte 0x5 + .byte 0x9a,0x7 + .4byte .LASF1620 + .byte 0x5 + .byte 0x9b,0x7 + .4byte .LASF1621 + .byte 0x5 + .byte 0x9c,0x7 + .4byte .LASF1622 + .byte 0x5 + .byte 0x9e,0x7 + .4byte .LASF1623 + .byte 0x5 + .byte 0x9f,0x7 + .4byte .LASF1624 + .byte 0x5 + .byte 0xa0,0x7 + .4byte .LASF1625 + .byte 0x5 + .byte 0xa1,0x7 + .4byte .LASF1626 + .byte 0x5 + .byte 0xa2,0x7 + .4byte .LASF1627 + .byte 0x5 + .byte 0xa3,0x7 + .4byte .LASF1628 + .byte 0x5 + .byte 0xa5,0x7 + .4byte .LASF1629 + .byte 0x5 + .byte 0xa6,0x7 + .4byte .LASF1630 + .byte 0x5 + .byte 0xa7,0x7 + .4byte .LASF1631 + .byte 0x5 + .byte 0xa8,0x7 + .4byte .LASF1632 + .byte 0x5 + .byte 0xa9,0x7 + .4byte .LASF1633 + .byte 0x5 + .byte 0xaa,0x7 + .4byte .LASF1634 + .byte 0x5 + .byte 0xac,0x7 + .4byte .LASF1635 + .byte 0x5 + .byte 0xad,0x7 + .4byte .LASF1636 + .byte 0x5 + .byte 0xae,0x7 + .4byte .LASF1637 + .byte 0x5 + .byte 0xaf,0x7 + .4byte .LASF1638 + .byte 0x5 + .byte 0xb0,0x7 + .4byte .LASF1639 + .byte 0x5 + .byte 0xb1,0x7 + .4byte .LASF1640 + .byte 0x5 + .byte 0xb3,0x7 + .4byte .LASF1641 + .byte 0x5 + .byte 0xb4,0x7 + .4byte .LASF1642 + .byte 0x5 + .byte 0xb5,0x7 + .4byte .LASF1643 + .byte 0x5 + .byte 0xb6,0x7 + .4byte .LASF1644 + .byte 0x5 + .byte 0xb7,0x7 + .4byte .LASF1645 + .byte 0x5 + .byte 0xb8,0x7 + .4byte .LASF1646 + .byte 0x5 + .byte 0xbb,0x7 + .4byte .LASF1647 + .byte 0x5 + .byte 0xbc,0x7 + .4byte .LASF1648 + .byte 0x5 + .byte 0xbd,0x7 + .4byte .LASF1649 + .byte 0x5 + .byte 0xbe,0x7 + .4byte .LASF1650 + .byte 0x5 + .byte 0xbf,0x7 + .4byte .LASF1651 + .byte 0x5 + .byte 0xc0,0x7 + .4byte .LASF1652 + .byte 0x5 + .byte 0xc2,0x7 + .4byte .LASF1653 + .byte 0x5 + .byte 0xc3,0x7 + .4byte .LASF1654 + .byte 0x5 + .byte 0xc4,0x7 + .4byte .LASF1655 + .byte 0x5 + .byte 0xc5,0x7 + .4byte .LASF1656 + .byte 0x5 + .byte 0xc6,0x7 + .4byte .LASF1657 + .byte 0x5 + .byte 0xc7,0x7 + .4byte .LASF1658 + .byte 0x5 + .byte 0xc9,0x7 + .4byte .LASF1659 + .byte 0x5 + .byte 0xca,0x7 + .4byte .LASF1660 + .byte 0x5 + .byte 0xcb,0x7 + .4byte .LASF1661 + .byte 0x5 + .byte 0xcc,0x7 + .4byte .LASF1662 + .byte 0x5 + .byte 0xcd,0x7 + .4byte .LASF1663 + .byte 0x5 + .byte 0xce,0x7 + .4byte .LASF1664 + .byte 0x5 + .byte 0xd0,0x7 + .4byte .LASF1665 + .byte 0x5 + .byte 0xd1,0x7 + .4byte .LASF1666 + .byte 0x5 + .byte 0xd2,0x7 + .4byte .LASF1667 + .byte 0x5 + .byte 0xd3,0x7 + .4byte .LASF1668 + .byte 0x5 + .byte 0xd4,0x7 + .4byte .LASF1669 + .byte 0x5 + .byte 0xd5,0x7 + .4byte .LASF1670 + .byte 0x5 + .byte 0xd7,0x7 + .4byte .LASF1671 + .byte 0x5 + .byte 0xd8,0x7 + .4byte .LASF1672 + .byte 0x5 + .byte 0xd9,0x7 + .4byte .LASF1673 + .byte 0x5 + .byte 0xdc,0x7 + .4byte .LASF1674 + .byte 0x5 + .byte 0xdf,0x7 + .4byte .LASF1675 + .byte 0x5 + .byte 0xe2,0x7 + .4byte .LASF1676 + .byte 0x5 + .byte 0xe5,0x7 + .4byte .LASF1677 + .byte 0x5 + .byte 0xe8,0x7 + .4byte .LASF1678 + .byte 0x5 + .byte 0xe9,0x7 + .4byte .LASF1679 + .byte 0x5 + .byte 0xf0,0x7 + .4byte .LASF1680 + .byte 0x5 + .byte 0xf3,0x7 + .4byte .LASF1681 + .byte 0x5 + .byte 0xf6,0x7 + .4byte .LASF1682 + .byte 0x5 + .byte 0xf9,0x7 + .4byte .LASF1683 + .byte 0x5 + .byte 0xfc,0x7 + .4byte .LASF1684 + .byte 0x5 + .byte 0xff,0x7 + .4byte .LASF1685 + .byte 0x5 + .byte 0x82,0x8 + .4byte .LASF1686 + .byte 0x5 + .byte 0x85,0x8 + .4byte .LASF1687 + .byte 0x5 + .byte 0x88,0x8 + .4byte .LASF1688 + .byte 0x5 + .byte 0x8b,0x8 + .4byte .LASF1689 + .byte 0x5 + .byte 0x8e,0x8 + .4byte .LASF1690 + .byte 0x5 + .byte 0x91,0x8 + .4byte .LASF1691 + .byte 0x5 + .byte 0x94,0x8 + .4byte .LASF1692 + .byte 0x5 + .byte 0x97,0x8 + .4byte .LASF1693 + .byte 0x5 + .byte 0x9a,0x8 + .4byte .LASF1694 + .byte 0x5 + .byte 0x9d,0x8 + .4byte .LASF1695 + .byte 0x5 + .byte 0xa0,0x8 + .4byte .LASF1696 + .byte 0x5 + .byte 0xa3,0x8 + .4byte .LASF1697 + .byte 0x5 + .byte 0xa6,0x8 + .4byte .LASF1698 + .byte 0x5 + .byte 0xa9,0x8 + .4byte .LASF1699 + .byte 0x5 + .byte 0xac,0x8 + .4byte .LASF1700 + .byte 0x5 + .byte 0xaf,0x8 + .4byte .LASF1701 + .byte 0x5 + .byte 0xb2,0x8 + .4byte .LASF1702 + .byte 0x5 + .byte 0xb5,0x8 + .4byte .LASF1703 + .byte 0x5 + .byte 0xb8,0x8 + .4byte .LASF1704 + .byte 0x5 + .byte 0xbb,0x8 + .4byte .LASF1705 + .byte 0x5 + .byte 0xbe,0x8 + .4byte .LASF1706 + .byte 0x5 + .byte 0xc1,0x8 + .4byte .LASF1707 + .byte 0x5 + .byte 0xc4,0x8 + .4byte .LASF1708 + .byte 0x5 + .byte 0xc7,0x8 + .4byte .LASF1709 + .byte 0x5 + .byte 0xca,0x8 + .4byte .LASF1710 + .byte 0x5 + .byte 0xcd,0x8 + .4byte .LASF1711 + .byte 0x5 + .byte 0xd0,0x8 + .4byte .LASF1712 + .byte 0x5 + .byte 0xd3,0x8 + .4byte .LASF1713 + .byte 0x5 + .byte 0xd6,0x8 + .4byte .LASF1714 + .byte 0x5 + .byte 0xd9,0x8 + .4byte .LASF1715 + .byte 0x5 + .byte 0xdc,0x8 + .4byte .LASF1716 + .byte 0x5 + .byte 0xdf,0x8 + .4byte .LASF1717 + .byte 0x5 + .byte 0xe2,0x8 + .4byte .LASF1718 + .byte 0x5 + .byte 0xe5,0x8 + .4byte .LASF1719 + .byte 0x5 + .byte 0xe8,0x8 + .4byte .LASF1720 + .byte 0x5 + .byte 0xeb,0x8 + .4byte .LASF1721 + .byte 0x5 + .byte 0xee,0x8 + .4byte .LASF1722 + .byte 0x5 + .byte 0xef,0x8 + .4byte .LASF1723 + .byte 0x5 + .byte 0xf0,0x8 + .4byte .LASF1724 + .byte 0x5 + .byte 0xf1,0x8 + .4byte .LASF1725 + .byte 0x5 + .byte 0xf4,0x8 + .4byte .LASF1726 + .byte 0x5 + .byte 0xf5,0x8 + .4byte .LASF1727 + .byte 0x5 + .byte 0xf8,0x8 + .4byte .LASF1728 + .byte 0x5 + .byte 0xf9,0x8 + .4byte .LASF1729 + .byte 0x5 + .byte 0xfa,0x8 + .4byte .LASF1730 + .byte 0x5 + .byte 0xfb,0x8 + .4byte .LASF1731 + .byte 0x5 + .byte 0xfc,0x8 + .4byte .LASF1732 + .byte 0x5 + .byte 0x83,0x9 + .4byte .LASF1733 + .byte 0x5 + .byte 0x87,0x9 + .4byte .LASF1734 + .byte 0x5 + .byte 0x8b,0x9 + .4byte .LASF1735 + .byte 0x5 + .byte 0x92,0x9 + .4byte .LASF1736 + .byte 0x5 + .byte 0x93,0x9 + .4byte .LASF1737 + .byte 0x5 + .byte 0x94,0x9 + .4byte .LASF1738 + .byte 0x5 + .byte 0x96,0x9 + .4byte .LASF1739 + .byte 0x5 + .byte 0x97,0x9 + .4byte .LASF1740 + .byte 0x5 + .byte 0x98,0x9 + .4byte .LASF1741 + .byte 0x5 + .byte 0x99,0x9 + .4byte .LASF1742 + .byte 0x5 + .byte 0x9b,0x9 + .4byte .LASF1743 + .byte 0x5 + .byte 0x9c,0x9 + .4byte .LASF1744 + .byte 0x5 + .byte 0x9d,0x9 + .4byte .LASF1745 + .byte 0x5 + .byte 0x9f,0x9 + .4byte .LASF1746 + .byte 0x5 + .byte 0xa0,0x9 + .4byte .LASF1747 + .byte 0x5 + .byte 0xa1,0x9 + .4byte .LASF1748 + .byte 0x5 + .byte 0xa2,0x9 + .4byte .LASF1749 + .byte 0x5 + .byte 0xa3,0x9 + .4byte .LASF1750 + .byte 0x5 + .byte 0xa5,0x9 + .4byte .LASF1751 + .byte 0x5 + .byte 0xa6,0x9 + .4byte .LASF1752 + .byte 0x5 + .byte 0xa7,0x9 + .4byte .LASF1753 + .byte 0x5 + .byte 0xa8,0x9 + .4byte .LASF1754 + .byte 0x5 + .byte 0xaa,0x9 + .4byte .LASF1755 + .byte 0x5 + .byte 0xab,0x9 + .4byte .LASF1756 + .byte 0x5 + .byte 0xac,0x9 + .4byte .LASF1757 + .byte 0x5 + .byte 0xad,0x9 + .4byte .LASF1758 + .byte 0x5 + .byte 0xaf,0x9 + .4byte .LASF1759 + .byte 0x5 + .byte 0xb0,0x9 + .4byte .LASF1760 + .byte 0x5 + .byte 0xb1,0x9 + .4byte .LASF1761 + .byte 0x5 + .byte 0xb3,0x9 + .4byte .LASF1762 + .byte 0x5 + .byte 0xb4,0x9 + .4byte .LASF1763 + .byte 0x5 + .byte 0xb5,0x9 + .4byte .LASF1764 + .byte 0x5 + .byte 0xb6,0x9 + .4byte .LASF1765 + .byte 0x5 + .byte 0xb7,0x9 + .4byte .LASF1766 + .byte 0x5 + .byte 0xb9,0x9 + .4byte .LASF1767 + .byte 0x5 + .byte 0xbc,0x9 + .4byte .LASF1768 + .byte 0x5 + .byte 0xbd,0x9 + .4byte .LASF1769 + .byte 0x5 + .byte 0xc0,0x9 + .4byte .LASF1770 + .byte 0x5 + .byte 0xc3,0x9 + .4byte .LASF1771 + .byte 0x5 + .byte 0xc6,0x9 + .4byte .LASF1772 + .byte 0x5 + .byte 0xc9,0x9 + .4byte .LASF1773 + .byte 0x5 + .byte 0xcc,0x9 + .4byte .LASF1774 + .byte 0x5 + .byte 0xcf,0x9 + .4byte .LASF1775 + .byte 0x5 + .byte 0xd2,0x9 + .4byte .LASF1776 + .byte 0x5 + .byte 0xd3,0x9 + .4byte .LASF1777 + .byte 0x5 + .byte 0xd6,0x9 + .4byte .LASF1778 + .byte 0x5 + .byte 0xd7,0x9 + .4byte .LASF1779 + .byte 0x5 + .byte 0xda,0x9 + .4byte .LASF1780 + .byte 0x5 + .byte 0xdb,0x9 + .4byte .LASF1781 + .byte 0x5 + .byte 0xde,0x9 + .4byte .LASF1782 + .byte 0x5 + .byte 0xe1,0x9 + .4byte .LASF1783 + .byte 0x5 + .byte 0xe8,0x9 + .4byte .LASF1784 + .byte 0x5 + .byte 0xe9,0x9 + .4byte .LASF1785 + .byte 0x5 + .byte 0xea,0x9 + .4byte .LASF1786 + .byte 0x5 + .byte 0xeb,0x9 + .4byte .LASF1787 + .byte 0x5 + .byte 0xec,0x9 + .4byte .LASF1788 + .byte 0x5 + .byte 0xed,0x9 + .4byte .LASF1789 + .byte 0x5 + .byte 0xee,0x9 + .4byte .LASF1790 + .byte 0x5 + .byte 0xef,0x9 + .4byte .LASF1791 + .byte 0x5 + .byte 0xf0,0x9 + .4byte .LASF1792 + .byte 0x5 + .byte 0xf1,0x9 + .4byte .LASF1793 + .byte 0x5 + .byte 0xf2,0x9 + .4byte .LASF1794 + .byte 0x5 + .byte 0xf3,0x9 + .4byte .LASF1795 + .byte 0x5 + .byte 0xf4,0x9 + .4byte .LASF1796 + .byte 0x5 + .byte 0xf5,0x9 + .4byte .LASF1797 + .byte 0x5 + .byte 0xf6,0x9 + .4byte .LASF1798 + .byte 0x5 + .byte 0xf7,0x9 + .4byte .LASF1799 + .byte 0x5 + .byte 0xf8,0x9 + .4byte .LASF1800 + .byte 0x5 + .byte 0xf9,0x9 + .4byte .LASF1801 + .byte 0x5 + .byte 0xfa,0x9 + .4byte .LASF1802 + .byte 0x5 + .byte 0xfb,0x9 + .4byte .LASF1803 + .byte 0x5 + .byte 0xfc,0x9 + .4byte .LASF1804 + .byte 0x5 + .byte 0xfd,0x9 + .4byte .LASF1805 + .byte 0x5 + .byte 0xfe,0x9 + .4byte .LASF1806 + .byte 0x5 + .byte 0xff,0x9 + .4byte .LASF1807 + .byte 0x5 + .byte 0x80,0xa + .4byte .LASF1808 + .byte 0x5 + .byte 0x81,0xa + .4byte .LASF1809 + .byte 0x5 + .byte 0x82,0xa + .4byte .LASF1810 + .byte 0x5 + .byte 0x83,0xa + .4byte .LASF1811 + .byte 0x5 + .byte 0x86,0xa + .4byte .LASF1812 + .byte 0x5 + .byte 0x87,0xa + .4byte .LASF1813 + .byte 0x5 + .byte 0x88,0xa + .4byte .LASF1814 + .byte 0x5 + .byte 0x89,0xa + .4byte .LASF1815 + .byte 0x5 + .byte 0x8a,0xa + .4byte .LASF1816 + .byte 0x5 + .byte 0x8b,0xa + .4byte .LASF1817 + .byte 0x5 + .byte 0x8c,0xa + .4byte .LASF1818 + .byte 0x5 + .byte 0x8d,0xa + .4byte .LASF1819 + .byte 0x5 + .byte 0x8e,0xa + .4byte .LASF1820 + .byte 0x5 + .byte 0x8f,0xa + .4byte .LASF1821 + .byte 0x5 + .byte 0x90,0xa + .4byte .LASF1822 + .byte 0x5 + .byte 0x91,0xa + .4byte .LASF1823 + .byte 0x5 + .byte 0x92,0xa + .4byte .LASF1824 + .byte 0x5 + .byte 0x93,0xa + .4byte .LASF1825 + .byte 0x5 + .byte 0x94,0xa + .4byte .LASF1826 + .byte 0x5 + .byte 0x95,0xa + .4byte .LASF1827 + .byte 0x5 + .byte 0x96,0xa + .4byte .LASF1828 + .byte 0x5 + .byte 0x97,0xa + .4byte .LASF1829 + .byte 0x5 + .byte 0x98,0xa + .4byte .LASF1830 + .byte 0x5 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.byte 0x5 + .byte 0xb2,0xa + .4byte .LASF1852 + .byte 0x5 + .byte 0xb3,0xa + .4byte .LASF1853 + .byte 0x5 + .byte 0xb5,0xa + .4byte .LASF1854 + .byte 0x5 + .byte 0xb6,0xa + .4byte .LASF1855 + .byte 0x5 + .byte 0xb7,0xa + .4byte .LASF1856 + .byte 0x5 + .byte 0xb9,0xa + .4byte .LASF1857 + .byte 0x5 + .byte 0xbc,0xa + .4byte .LASF1858 + .byte 0x5 + .byte 0xbd,0xa + .4byte .LASF1859 + .byte 0x5 + .byte 0xbe,0xa + .4byte .LASF1860 + .byte 0x5 + .byte 0xbf,0xa + .4byte .LASF1861 + .byte 0x5 + .byte 0xc0,0xa + .4byte .LASF1862 + .byte 0x5 + .byte 0xc1,0xa + .4byte .LASF1863 + .byte 0x5 + .byte 0xc2,0xa + .4byte .LASF1864 + .byte 0x5 + .byte 0xc3,0xa + .4byte .LASF1865 + .byte 0x5 + .byte 0xc5,0xa + .4byte .LASF1866 + .byte 0x5 + .byte 0xc6,0xa + .4byte .LASF1867 + .byte 0x5 + .byte 0xc7,0xa + .4byte .LASF1868 + .byte 0x5 + .byte 0xc9,0xa + .4byte .LASF1869 + .byte 0x5 + .byte 0xca,0xa + .4byte .LASF1870 + .byte 0x5 + .byte 0xcb,0xa + .4byte .LASF1871 + .byte 0x5 + .byte 0xcd,0xa + .4byte .LASF1872 + .byte 0x5 + .byte 0xce,0xa + .4byte .LASF1873 + .byte 0x5 + .byte 0xcf,0xa + .4byte .LASF1874 + .byte 0x5 + .byte 0xd1,0xa + .4byte .LASF1875 + .byte 0x5 + .byte 0xd4,0xa + .4byte .LASF1876 + .byte 0x5 + .byte 0xd5,0xa + .4byte .LASF1877 + .byte 0x5 + .byte 0xd6,0xa + .4byte .LASF1878 + .byte 0x5 + .byte 0xd7,0xa + .4byte .LASF1879 + .byte 0x5 + .byte 0xd8,0xa + .4byte .LASF1880 + .byte 0x5 + .byte 0xd9,0xa + .4byte .LASF1881 + .byte 0x5 + .byte 0xda,0xa + .4byte .LASF1882 + .byte 0x5 + .byte 0xdb,0xa + .4byte .LASF1883 + .byte 0x5 + .byte 0xdd,0xa + .4byte .LASF1884 + .byte 0x5 + .byte 0xde,0xa + .4byte .LASF1885 + .byte 0x5 + .byte 0xdf,0xa + .4byte .LASF1886 + .byte 0x5 + .byte 0xe1,0xa + .4byte .LASF1887 + .byte 0x5 + .byte 0xe2,0xa + .4byte .LASF1888 + .byte 0x5 + .byte 0xe3,0xa + .4byte .LASF1889 + .byte 0x5 + .byte 0xe5,0xa + .4byte .LASF1890 + .byte 0x5 + .byte 0xe6,0xa + .4byte .LASF1891 + .byte 0x5 + .byte 0xe7,0xa + .4byte .LASF1892 + .byte 0x5 + .byte 0xe9,0xa + .4byte .LASF1893 + .byte 0x5 + .byte 0xec,0xa + .4byte .LASF1894 + .byte 0x5 + .byte 0xed,0xa + .4byte .LASF1895 + .byte 0x5 + .byte 0xee,0xa + .4byte .LASF1896 + .byte 0x5 + .byte 0xef,0xa + .4byte .LASF1897 + .byte 0x5 + .byte 0xf0,0xa + .4byte .LASF1898 + .byte 0x5 + .byte 0xf1,0xa + .4byte .LASF1899 + .byte 0x5 + .byte 0xf2,0xa + .4byte .LASF1900 + .byte 0x5 + .byte 0xf3,0xa + .4byte .LASF1901 + .byte 0x5 + .byte 0xf5,0xa + .4byte .LASF1902 + .byte 0x5 + .byte 0xf6,0xa + .4byte .LASF1903 + .byte 0x5 + .byte 0xf7,0xa + .4byte .LASF1904 + .byte 0x5 + .byte 0xf9,0xa + .4byte .LASF1905 + .byte 0x5 + .byte 0xfa,0xa + .4byte .LASF1906 + .byte 0x5 + .byte 0xfb,0xa + .4byte .LASF1907 + .byte 0x5 + .byte 0xfd,0xa + .4byte .LASF1908 + .byte 0x5 + .byte 0xfe,0xa + .4byte .LASF1909 + .byte 0x5 + .byte 0xff,0xa + .4byte .LASF1910 + .byte 0x5 + .byte 0x81,0xb + .4byte .LASF1911 + .byte 0x5 + .byte 0x84,0xb + .4byte .LASF1912 + .byte 0x5 + .byte 0x85,0xb + .4byte .LASF1913 + .byte 0x5 + .byte 0x86,0xb + .4byte .LASF1914 + .byte 0x5 + .byte 0x87,0xb + .4byte .LASF1915 + .byte 0x5 + .byte 0x88,0xb + .4byte .LASF1916 + .byte 0x5 + .byte 0x89,0xb + .4byte .LASF1917 + .byte 0x5 + .byte 0x8a,0xb + .4byte .LASF1918 + .byte 0x5 + .byte 0x8b,0xb + .4byte .LASF1919 + .byte 0x5 + .byte 0x8d,0xb + .4byte .LASF1920 + .byte 0x5 + .byte 0x8e,0xb + .4byte .LASF1921 + .byte 0x5 + .byte 0x8f,0xb + .4byte .LASF1922 + .byte 0x5 + .byte 0x91,0xb + .4byte .LASF1923 + .byte 0x5 + .byte 0x92,0xb + .4byte .LASF1924 + .byte 0x5 + .byte 0x93,0xb + .4byte .LASF1925 + .byte 0x5 + .byte 0x95,0xb + .4byte .LASF1926 + .byte 0x5 + .byte 0x96,0xb + .4byte .LASF1927 + .byte 0x5 + .byte 0x97,0xb + .4byte .LASF1928 + .byte 0x5 + .byte 0x99,0xb + .4byte .LASF1929 + .byte 0x5 + .byte 0x9c,0xb + .4byte .LASF1930 + .byte 0x5 + .byte 0x9d,0xb + .4byte .LASF1931 + .byte 0x5 + .byte 0x9e,0xb + .4byte .LASF1932 + .byte 0x5 + .byte 0x9f,0xb + .4byte .LASF1933 + .byte 0x5 + .byte 0xa0,0xb + .4byte .LASF1934 + .byte 0x5 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.byte 0x5 + .byte 0xbd,0xb + .4byte .LASF1956 + .byte 0x5 + .byte 0xbe,0xb + .4byte .LASF1957 + .byte 0x5 + .byte 0xbf,0xb + .4byte .LASF1958 + .byte 0x5 + .byte 0xc1,0xb + .4byte .LASF1959 + .byte 0x5 + .byte 0xc2,0xb + .4byte .LASF1960 + .byte 0x5 + .byte 0xc3,0xb + .4byte .LASF1961 + .byte 0x5 + .byte 0xc5,0xb + .4byte .LASF1962 + .byte 0x5 + .byte 0xc6,0xb + .4byte .LASF1963 + .byte 0x5 + .byte 0xc7,0xb + .4byte .LASF1964 + .byte 0x5 + .byte 0xc9,0xb + .4byte .LASF1965 + .byte 0x5 + .byte 0xcc,0xb + .4byte .LASF1966 + .byte 0x5 + .byte 0xcf,0xb + .4byte .LASF1967 + .byte 0x5 + .byte 0xd2,0xb + .4byte .LASF1968 + .byte 0x5 + .byte 0xd5,0xb + .4byte .LASF1969 + .byte 0x5 + .byte 0xd8,0xb + .4byte .LASF1970 + .byte 0x5 + .byte 0xdb,0xb + .4byte .LASF1971 + .byte 0x5 + .byte 0xde,0xb + .4byte .LASF1972 + .byte 0x5 + .byte 0xe1,0xb + .4byte .LASF1973 + .byte 0x5 + .byte 0xe4,0xb + .4byte .LASF1974 + .byte 0x5 + .byte 0xe7,0xb + .4byte .LASF1975 + .byte 0x5 + .byte 0xea,0xb + .4byte .LASF1976 + .byte 0x5 + .byte 0xed,0xb + .4byte .LASF1977 + .byte 0x5 + .byte 0xf0,0xb + .4byte .LASF1978 + .byte 0x5 + .byte 0xf3,0xb + .4byte .LASF1979 + .byte 0x5 + .byte 0xf6,0xb + .4byte .LASF1980 + .byte 0x5 + .byte 0xf9,0xb + .4byte .LASF1981 + .byte 0x5 + .byte 0xfc,0xb + .4byte .LASF1982 + .byte 0x5 + .byte 0xff,0xb + .4byte .LASF1983 + .byte 0x5 + .byte 0x82,0xc + .4byte .LASF1984 + .byte 0x5 + .byte 0x85,0xc + .4byte .LASF1985 + .byte 0x5 + .byte 0x88,0xc + .4byte .LASF1986 + .byte 0x5 + .byte 0x90,0xc + .4byte .LASF1987 + .byte 0x5 + .byte 0x91,0xc + .4byte .LASF1988 + .byte 0x5 + .byte 0x92,0xc + .4byte .LASF1989 + .byte 0x5 + .byte 0x93,0xc + .4byte .LASF1990 + .byte 0x5 + .byte 0x94,0xc + .4byte .LASF1991 + .byte 0x5 + .byte 0x95,0xc + .4byte .LASF1992 + .byte 0x5 + .byte 0x96,0xc + .4byte .LASF1993 + .byte 0x5 + .byte 0x97,0xc + .4byte .LASF1994 + .byte 0x5 + .byte 0x98,0xc + .4byte .LASF1995 + .byte 0x5 + .byte 0x99,0xc + .4byte .LASF1996 + .byte 0x5 + .byte 0x9a,0xc + .4byte .LASF1997 + .byte 0x5 + .byte 0x9b,0xc + .4byte .LASF1998 + .byte 0x5 + .byte 0x9c,0xc + .4byte .LASF1999 + .byte 0x5 + .byte 0x9d,0xc + .4byte .LASF2000 + .byte 0x5 + .byte 0x9e,0xc + .4byte .LASF2001 + .byte 0x5 + .byte 0x9f,0xc + .4byte .LASF2002 + .byte 0x5 + .byte 0xa0,0xc + .4byte .LASF2003 + .byte 0x5 + .byte 0xa1,0xc + .4byte .LASF2004 + .byte 0x5 + .byte 0xa2,0xc + .4byte .LASF2005 + .byte 0x5 + .byte 0xa3,0xc + .4byte .LASF2006 + .byte 0x5 + .byte 0xa6,0xc + .4byte .LASF2007 + .byte 0x5 + .byte 0xa7,0xc + .4byte .LASF2008 + .byte 0x5 + .byte 0xa8,0xc + .4byte .LASF2009 + .byte 0x5 + .byte 0xa9,0xc + .4byte .LASF2010 + .byte 0x5 + .byte 0xaa,0xc + .4byte .LASF2011 + .byte 0x5 + .byte 0xab,0xc + .4byte .LASF2012 + .byte 0x5 + .byte 0xac,0xc + .4byte .LASF2013 + .byte 0x5 + .byte 0xad,0xc + .4byte .LASF2014 + .byte 0x5 + .byte 0xae,0xc + .4byte .LASF2015 + .byte 0x5 + .byte 0xaf,0xc + .4byte .LASF2016 + .byte 0x5 + .byte 0xb0,0xc + .4byte .LASF2017 + .byte 0x5 + .byte 0xb1,0xc + .4byte .LASF2018 + .byte 0x5 + .byte 0xb2,0xc + .4byte .LASF2019 + .byte 0x5 + .byte 0xb3,0xc + .4byte .LASF2020 + .byte 0x5 + .byte 0xb4,0xc + .4byte .LASF2021 + .byte 0x5 + .byte 0xb5,0xc + .4byte .LASF2022 + .byte 0x5 + .byte 0xb6,0xc + .4byte .LASF2023 + .byte 0x5 + .byte 0xb7,0xc + .4byte .LASF2024 + .byte 0x5 + .byte 0xb8,0xc + .4byte .LASF2025 + .byte 0x5 + .byte 0xb9,0xc + .4byte .LASF2026 + .byte 0x5 + .byte 0xbc,0xc + .4byte .LASF2027 + .byte 0x5 + .byte 0xbd,0xc + .4byte .LASF2028 + .byte 0x5 + .byte 0xbe,0xc + .4byte .LASF2029 + .byte 0x5 + .byte 0xbf,0xc + .4byte .LASF2030 + .byte 0x5 + .byte 0xc0,0xc + .4byte .LASF2031 + .byte 0x5 + .byte 0xc1,0xc + .4byte .LASF2032 + .byte 0x5 + .byte 0xc2,0xc + .4byte .LASF2033 + .byte 0x5 + .byte 0xc3,0xc + .4byte .LASF2034 + .byte 0x5 + .byte 0xc4,0xc + .4byte .LASF2035 + .byte 0x5 + .byte 0xc5,0xc + .4byte .LASF2036 + .byte 0x5 + .byte 0xc6,0xc + .4byte .LASF2037 + .byte 0x5 + .byte 0xc7,0xc + .4byte .LASF2038 + .byte 0x5 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.byte 0x5 + .byte 0xdf,0xc + .4byte .LASF2060 + .byte 0x5 + .byte 0xe0,0xc + .4byte .LASF2061 + .byte 0x5 + .byte 0xe1,0xc + .4byte .LASF2062 + .byte 0x5 + .byte 0xe2,0xc + .4byte .LASF2063 + .byte 0x5 + .byte 0xe3,0xc + .4byte .LASF2064 + .byte 0x5 + .byte 0xe4,0xc + .4byte .LASF2065 + .byte 0x5 + .byte 0xe5,0xc + .4byte .LASF2066 + .byte 0x5 + .byte 0xe8,0xc + .4byte .LASF2067 + .byte 0x5 + .byte 0xe9,0xc + .4byte .LASF2068 + .byte 0x5 + .byte 0xea,0xc + .4byte .LASF2069 + .byte 0x5 + .byte 0xeb,0xc + .4byte .LASF2070 + .byte 0x5 + .byte 0xec,0xc + .4byte .LASF2071 + .byte 0x5 + .byte 0xed,0xc + .4byte .LASF2072 + .byte 0x5 + .byte 0xee,0xc + .4byte .LASF2073 + .byte 0x5 + .byte 0xef,0xc + .4byte .LASF2074 + .byte 0x5 + .byte 0xf0,0xc + .4byte .LASF2075 + .byte 0x5 + .byte 0xf1,0xc + .4byte .LASF2076 + .byte 0x5 + .byte 0xf2,0xc + .4byte .LASF2077 + .byte 0x5 + .byte 0xf3,0xc + .4byte .LASF2078 + .byte 0x5 + .byte 0xf4,0xc + .4byte .LASF2079 + .byte 0x5 + .byte 0xf5,0xc + .4byte .LASF2080 + .byte 0x5 + .byte 0xf6,0xc + .4byte .LASF2081 + .byte 0x5 + .byte 0xf7,0xc + .4byte .LASF2082 + .byte 0x5 + .byte 0xf8,0xc + .4byte .LASF2083 + .byte 0x5 + .byte 0xf9,0xc + .4byte .LASF2084 + .byte 0x5 + .byte 0xfa,0xc + .4byte .LASF2085 + .byte 0x5 + .byte 0xfb,0xc + .4byte .LASF2086 + .byte 0x5 + .byte 0xfe,0xc + .4byte .LASF2087 + .byte 0x5 + .byte 0xff,0xc + .4byte .LASF2088 + .byte 0x5 + .byte 0x80,0xd + .4byte .LASF2089 + .byte 0x5 + .byte 0x81,0xd + .4byte .LASF2090 + .byte 0x5 + .byte 0x82,0xd + .4byte .LASF2091 + .byte 0x5 + .byte 0x83,0xd + .4byte .LASF2092 + .byte 0x5 + .byte 0x84,0xd + .4byte .LASF2093 + .byte 0x5 + .byte 0x85,0xd + .4byte .LASF2094 + .byte 0x5 + .byte 0x86,0xd + .4byte .LASF2095 + .byte 0x5 + .byte 0x87,0xd + .4byte .LASF2096 + .byte 0x5 + .byte 0x88,0xd + .4byte .LASF2097 + .byte 0x5 + .byte 0x89,0xd + .4byte .LASF2098 + .byte 0x5 + .byte 0x8a,0xd + .4byte .LASF2099 + .byte 0x5 + .byte 0x8b,0xd + .4byte .LASF2100 + .byte 0x5 + .byte 0x8c,0xd + .4byte .LASF2101 + .byte 0x5 + .byte 0x8d,0xd + .4byte .LASF2102 + .byte 0x5 + .byte 0x8e,0xd + .4byte .LASF2103 + .byte 0x5 + .byte 0x8f,0xd + .4byte .LASF2104 + .byte 0x5 + .byte 0x90,0xd + .4byte .LASF2105 + .byte 0x5 + .byte 0x91,0xd + .4byte .LASF2106 + .byte 0x5 + .byte 0x99,0xd + .4byte .LASF2107 + .byte 0x5 + .byte 0x9a,0xd + .4byte .LASF2108 + .byte 0x5 + .byte 0x9b,0xd + .4byte .LASF2109 + .byte 0x5 + .byte 0x9c,0xd + .4byte .LASF2110 + .byte 0x5 + .byte 0x9e,0xd + .4byte .LASF2111 + .byte 0x5 + .byte 0x9f,0xd + .4byte .LASF2112 + .byte 0x5 + .byte 0xa0,0xd + .4byte .LASF2113 + .byte 0x5 + .byte 0xa3,0xd + .4byte .LASF2114 + .byte 0x5 + .byte 0xa6,0xd + .4byte .LASF2115 + .byte 0x5 + .byte 0xa9,0xd + .4byte .LASF2116 + .byte 0x5 + .byte 0xaa,0xd + .4byte .LASF2117 + .byte 0x5 + .byte 0xab,0xd + .4byte .LASF2118 + .byte 0x5 + .byte 0xac,0xd + .4byte .LASF2119 + .byte 0x5 + .byte 0xaf,0xd + .4byte .LASF2120 + .byte 0x5 + .byte 0xb0,0xd + .4byte .LASF2121 + .byte 0x5 + .byte 0xb1,0xd + .4byte .LASF2122 + .byte 0x5 + .byte 0xb2,0xd + .4byte .LASF2123 + .byte 0x5 + .byte 0xb3,0xd + .4byte .LASF2124 + .byte 0x5 + .byte 0xb4,0xd + .4byte .LASF2125 + .byte 0x5 + .byte 0xb5,0xd + .4byte .LASF2126 + .byte 0x5 + .byte 0xb6,0xd + .4byte .LASF2127 + .byte 0x5 + .byte 0xb7,0xd + .4byte .LASF2128 + .byte 0x5 + .byte 0xb8,0xd + .4byte .LASF2129 + .byte 0x5 + .byte 0xb9,0xd + .4byte .LASF2130 + .byte 0x5 + .byte 0xba,0xd + .4byte .LASF2131 + .byte 0x5 + .byte 0xbb,0xd + .4byte .LASF2132 + .byte 0x5 + .byte 0xbc,0xd + .4byte .LASF2133 + .byte 0x5 + .byte 0xbf,0xd + .4byte .LASF2134 + .byte 0x5 + .byte 0xc2,0xd + .4byte .LASF2135 + .byte 0x5 + .byte 0xc3,0xd + .4byte .LASF2136 + .byte 0x5 + .byte 0xc5,0xd + .4byte .LASF2137 + .byte 0x5 + .byte 0xc6,0xd + .4byte .LASF2138 + .byte 0x5 + .byte 0xc7,0xd + .4byte .LASF2139 + .byte 0x5 + .byte 0xc8,0xd + .4byte .LASF2140 + .byte 0x5 + .byte 0xc9,0xd + .4byte .LASF2141 + .byte 0x5 + .byte 0xcc,0xd + .4byte .LASF2142 + .byte 0x5 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.byte 0x5 + .byte 0xfa,0xd + .4byte .LASF2164 + .byte 0x5 + .byte 0xfb,0xd + .4byte .LASF2165 + .byte 0x5 + .byte 0xfd,0xd + .4byte .LASF2166 + .byte 0x5 + .byte 0xfe,0xd + .4byte .LASF2167 + .byte 0x5 + .byte 0xff,0xd + .4byte .LASF2168 + .byte 0x5 + .byte 0x81,0xe + .4byte .LASF2169 + .byte 0x5 + .byte 0x82,0xe + .4byte .LASF2170 + .byte 0x5 + .byte 0x83,0xe + .4byte .LASF2171 + .byte 0x5 + .byte 0x85,0xe + .4byte .LASF2172 + .byte 0x5 + .byte 0x86,0xe + .4byte .LASF2173 + .byte 0x5 + .byte 0x87,0xe + .4byte .LASF2174 + .byte 0x5 + .byte 0x89,0xe + .4byte .LASF2175 + .byte 0x5 + .byte 0x8a,0xe + .4byte .LASF2176 + .byte 0x5 + .byte 0x8b,0xe + .4byte .LASF2177 + .byte 0x5 + .byte 0x8d,0xe + .4byte .LASF2178 + .byte 0x5 + .byte 0x8e,0xe + .4byte .LASF2179 + .byte 0x5 + .byte 0x8f,0xe + .4byte .LASF2180 + .byte 0x5 + .byte 0x91,0xe + .4byte .LASF2181 + .byte 0x5 + .byte 0x92,0xe + .4byte .LASF2182 + .byte 0x5 + .byte 0x93,0xe + .4byte .LASF2183 + .byte 0x5 + .byte 0x95,0xe + .4byte .LASF2184 + .byte 0x5 + .byte 0x97,0xe + .4byte .LASF2185 + .byte 0x5 + .byte 0x98,0xe + .4byte .LASF2186 + .byte 0x5 + .byte 0x99,0xe + .4byte .LASF2187 + .byte 0x5 + .byte 0x9b,0xe + .4byte .LASF2188 + .byte 0x5 + .byte 0x9c,0xe + .4byte .LASF2189 + .byte 0x5 + .byte 0x9d,0xe + .4byte .LASF2190 + .byte 0x5 + .byte 0x9f,0xe + .4byte .LASF2191 + .byte 0x5 + .byte 0xa0,0xe + .4byte .LASF2192 + .byte 0x5 + .byte 0xa1,0xe + .4byte .LASF2193 + .byte 0x5 + .byte 0xa3,0xe + .4byte .LASF2194 + .byte 0x5 + .byte 0xa4,0xe + .4byte .LASF2195 + .byte 0x5 + .byte 0xa5,0xe + .4byte .LASF2196 + .byte 0x5 + .byte 0xa7,0xe + .4byte .LASF2197 + .byte 0x5 + .byte 0xa8,0xe + .4byte .LASF2198 + .byte 0x5 + .byte 0xa9,0xe + .4byte .LASF2199 + .byte 0x5 + .byte 0xab,0xe + .4byte .LASF2200 + .byte 0x5 + .byte 0xac,0xe + .4byte .LASF2201 + .byte 0x5 + .byte 0xad,0xe + .4byte .LASF2202 + .byte 0x5 + .byte 0xaf,0xe + .4byte .LASF2203 + .byte 0x5 + .byte 0xb0,0xe + .4byte .LASF2204 + .byte 0x5 + .byte 0xb1,0xe + .4byte .LASF2205 + .byte 0x5 + .byte 0xb3,0xe + .4byte .LASF2206 + .byte 0x5 + .byte 0xb4,0xe + .4byte .LASF2207 + .byte 0x5 + .byte 0xb5,0xe + .4byte .LASF2208 + .byte 0x5 + .byte 0xb8,0xe + .4byte .LASF2209 + .byte 0x5 + .byte 0xba,0xe + .4byte .LASF2210 + .byte 0x5 + .byte 0xbb,0xe + .4byte .LASF2211 + .byte 0x5 + .byte 0xbc,0xe + .4byte .LASF2212 + .byte 0x5 + .byte 0xbe,0xe + .4byte .LASF2213 + .byte 0x5 + .byte 0xbf,0xe + .4byte .LASF2214 + .byte 0x5 + .byte 0xc0,0xe + .4byte .LASF2215 + .byte 0x5 + .byte 0xc2,0xe + .4byte .LASF2216 + .byte 0x5 + .byte 0xc3,0xe + .4byte .LASF2217 + .byte 0x5 + .byte 0xc4,0xe + .4byte .LASF2218 + .byte 0x5 + .byte 0xc6,0xe + .4byte .LASF2219 + .byte 0x5 + .byte 0xc7,0xe + .4byte .LASF2220 + .byte 0x5 + .byte 0xc8,0xe + .4byte .LASF2221 + .byte 0x5 + .byte 0xca,0xe + .4byte .LASF2222 + .byte 0x5 + .byte 0xcb,0xe + .4byte .LASF2223 + .byte 0x5 + .byte 0xcc,0xe + .4byte .LASF2224 + .byte 0x5 + .byte 0xce,0xe + .4byte .LASF2225 + .byte 0x5 + .byte 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.byte 0x5 + .byte 0x86,0xf + .4byte .LASF2268 + .byte 0x5 + .byte 0x87,0xf + .4byte .LASF2269 + .byte 0x5 + .byte 0x88,0xf + .4byte .LASF2270 + .byte 0x5 + .byte 0x89,0xf + .4byte .LASF2271 + .byte 0x5 + .byte 0x8a,0xf + .4byte .LASF2272 + .byte 0x5 + .byte 0x8b,0xf + .4byte .LASF2273 + .byte 0x5 + .byte 0x8c,0xf + .4byte .LASF2274 + .byte 0x5 + .byte 0x8f,0xf + .4byte .LASF2275 + .byte 0x5 + .byte 0x90,0xf + .4byte .LASF2276 + .byte 0x5 + .byte 0x91,0xf + .4byte .LASF2277 + .byte 0x5 + .byte 0x92,0xf + .4byte .LASF2278 + .byte 0x5 + .byte 0x93,0xf + .4byte .LASF2279 + .byte 0x5 + .byte 0x94,0xf + .4byte .LASF2280 + .byte 0x5 + .byte 0x95,0xf + .4byte .LASF2281 + .byte 0x5 + .byte 0x96,0xf + .4byte .LASF2282 + .byte 0x5 + .byte 0x97,0xf + .4byte .LASF2283 + .byte 0x5 + .byte 0x98,0xf + .4byte .LASF2284 + .byte 0x5 + .byte 0x99,0xf + .4byte .LASF2285 + .byte 0x5 + .byte 0x9a,0xf + .4byte .LASF2286 + .byte 0x5 + .byte 0x9b,0xf + .4byte .LASF2287 + .byte 0x5 + .byte 0x9c,0xf + .4byte .LASF2288 + .byte 0x5 + .byte 0x9d,0xf + .4byte .LASF2289 + .byte 0x5 + .byte 0x9e,0xf + .4byte .LASF2290 + .byte 0x5 + .byte 0xa1,0xf + .4byte .LASF2291 + .byte 0x5 + .byte 0xa2,0xf + .4byte .LASF2292 + .byte 0x5 + .byte 0xa3,0xf + .4byte .LASF2293 + .byte 0x5 + .byte 0xa4,0xf + .4byte .LASF2294 + .byte 0x5 + .byte 0xa5,0xf + .4byte .LASF2295 + .byte 0x5 + .byte 0xa6,0xf + .4byte .LASF2296 + .byte 0x5 + .byte 0xa7,0xf + .4byte .LASF2297 + .byte 0x5 + .byte 0xa8,0xf + .4byte .LASF2298 + .byte 0x5 + .byte 0xa9,0xf + .4byte .LASF2299 + .byte 0x5 + .byte 0xaa,0xf + .4byte .LASF2300 + .byte 0x5 + .byte 0xab,0xf + .4byte .LASF2301 + .byte 0x5 + .byte 0xac,0xf + .4byte .LASF2302 + .byte 0x5 + .byte 0xad,0xf + .4byte .LASF2303 + .byte 0x5 + .byte 0xae,0xf + .4byte .LASF2304 + .byte 0x5 + .byte 0xaf,0xf + .4byte .LASF2305 + .byte 0x5 + .byte 0xb0,0xf + .4byte .LASF2306 + .byte 0x5 + .byte 0xb2,0xf + .4byte .LASF2307 + .byte 0x5 + .byte 0xb3,0xf + .4byte .LASF2308 + .byte 0x5 + .byte 0xb4,0xf + .4byte .LASF2309 + .byte 0x5 + .byte 0xb5,0xf + .4byte .LASF2310 + .byte 0x5 + .byte 0xb6,0xf + .4byte .LASF2311 + .byte 0x5 + .byte 0xb7,0xf + .4byte .LASF2312 + .byte 0x5 + .byte 0xb8,0xf + .4byte .LASF2313 + .byte 0x5 + .byte 0xb9,0xf + .4byte .LASF2314 + .byte 0x5 + .byte 0xba,0xf + .4byte .LASF2315 + .byte 0x5 + .byte 0xbb,0xf + .4byte .LASF2316 + .byte 0x5 + .byte 0xbc,0xf + .4byte .LASF2317 + .byte 0x5 + .byte 0xbd,0xf + .4byte .LASF2318 + .byte 0x5 + .byte 0xbe,0xf + .4byte .LASF2319 + .byte 0x5 + .byte 0xbf,0xf + .4byte .LASF2320 + .byte 0x5 + .byte 0xc0,0xf + .4byte .LASF2321 + .byte 0x5 + .byte 0xc1,0xf + .4byte .LASF2322 + .byte 0x5 + .byte 0xc4,0xf + .4byte .LASF2323 + .byte 0x5 + .byte 0xc5,0xf + .4byte .LASF2324 + .byte 0x5 + .byte 0xc6,0xf + .4byte .LASF2325 + .byte 0x5 + .byte 0xc7,0xf + .4byte .LASF2326 + .byte 0x5 + .byte 0xc8,0xf + .4byte .LASF2327 + .byte 0x5 + .byte 0xc9,0xf + .4byte .LASF2328 + .byte 0x5 + .byte 0xca,0xf + .4byte .LASF2329 + .byte 0x5 + .byte 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.byte 0x5 + .byte 0xfb,0xf + .4byte .LASF2372 + .byte 0x5 + .byte 0xfc,0xf + .4byte .LASF2373 + .byte 0x5 + .byte 0xfd,0xf + .4byte .LASF2374 + .byte 0x5 + .byte 0xfe,0xf + .4byte .LASF2375 + .byte 0x5 + .byte 0xff,0xf + .4byte .LASF2376 + .byte 0x5 + .byte 0x81,0x10 + .4byte .LASF2377 + .byte 0x5 + .byte 0x82,0x10 + .4byte .LASF2378 + .byte 0x5 + .byte 0x83,0x10 + .4byte .LASF2379 + .byte 0x5 + .byte 0x84,0x10 + .4byte .LASF2380 + .byte 0x5 + .byte 0x86,0x10 + .4byte .LASF2381 + .byte 0x5 + .byte 0x87,0x10 + .4byte .LASF2382 + .byte 0x5 + .byte 0x88,0x10 + .4byte .LASF2383 + .byte 0x5 + .byte 0x89,0x10 + .4byte .LASF2384 + .byte 0x5 + .byte 0x8a,0x10 + .4byte .LASF2385 + .byte 0x5 + .byte 0x8c,0x10 + .4byte .LASF2386 + .byte 0x5 + .byte 0x8f,0x10 + .4byte .LASF2387 + .byte 0x5 + .byte 0x90,0x10 + .4byte .LASF2388 + .byte 0x5 + .byte 0x91,0x10 + .4byte .LASF2389 + .byte 0x5 + .byte 0x92,0x10 + .4byte .LASF2390 + .byte 0x5 + .byte 0x94,0x10 + .4byte .LASF2391 + .byte 0x5 + .byte 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0x5 + .byte 0x99,0x15 + .4byte .LASF2860 + .byte 0x5 + .byte 0x9c,0x15 + .4byte .LASF2861 + .byte 0x5 + .byte 0xa3,0x15 + .4byte .LASF2862 + .byte 0x5 + .byte 0xa4,0x15 + .4byte .LASF2863 + .byte 0x5 + .byte 0xa5,0x15 + .4byte .LASF2864 + .byte 0x5 + .byte 0xa7,0x15 + .4byte .LASF2865 + .byte 0x5 + .byte 0xa8,0x15 + .4byte .LASF2866 + .byte 0x5 + .byte 0xa9,0x15 + .4byte .LASF2867 + .byte 0x5 + .byte 0xaa,0x15 + .4byte .LASF2868 + .byte 0x5 + .byte 0xac,0x15 + .4byte .LASF2869 + .byte 0x5 + .byte 0xad,0x15 + .4byte .LASF2870 + .byte 0x5 + .byte 0xae,0x15 + .4byte .LASF2871 + .byte 0x5 + .byte 0xaf,0x15 + .4byte .LASF2872 + .byte 0x5 + .byte 0xb0,0x15 + .4byte .LASF2873 + .byte 0x5 + .byte 0xb1,0x15 + .4byte .LASF2874 + .byte 0x5 + .byte 0xb2,0x15 + .4byte .LASF2875 + .byte 0x5 + .byte 0xb3,0x15 + .4byte .LASF2876 + .byte 0x5 + .byte 0xb4,0x15 + .4byte .LASF2877 + .byte 0x5 + .byte 0xb5,0x15 + .4byte .LASF2878 + .byte 0x5 + .byte 0xb8,0x15 + .4byte .LASF2879 + .byte 0x5 + .byte 0xb9,0x15 + .4byte .LASF2880 + .byte 0x5 + .byte 0xba,0x15 + .4byte .LASF2881 + .byte 0x5 + .byte 0xbb,0x15 + .4byte .LASF2882 + .byte 0x5 + .byte 0xbc,0x15 + .4byte .LASF2883 + .byte 0x5 + .byte 0xbd,0x15 + .4byte .LASF2884 + .byte 0x5 + .byte 0xc0,0x15 + .4byte .LASF2885 + .byte 0x5 + .byte 0xc1,0x15 + .4byte .LASF2886 + .byte 0x5 + .byte 0xc2,0x15 + .4byte .LASF2887 + .byte 0x5 + .byte 0xc3,0x15 + .4byte .LASF2888 + .byte 0x5 + .byte 0xc4,0x15 + .4byte .LASF2889 + .byte 0x5 + .byte 0xc5,0x15 + .4byte .LASF2890 + .byte 0x5 + .byte 0xc6,0x15 + .4byte .LASF2891 + .byte 0x5 + .byte 0xc7,0x15 + .4byte .LASF2892 + .byte 0x5 + .byte 0xca,0x15 + .4byte .LASF2893 + .byte 0x5 + .byte 0xcd,0x15 + .4byte .LASF2894 + .byte 0x5 + .byte 0xd0,0x15 + .4byte .LASF2895 + .byte 0x5 + .byte 0xd3,0x15 + .4byte .LASF2896 + .byte 0x5 + .byte 0xd6,0x15 + .4byte .LASF2897 + .byte 0x5 + .byte 0xd8,0x15 + .4byte .LASF2898 + .byte 0x5 + .byte 0xd9,0x15 + .4byte .LASF2899 + .byte 0x5 + .byte 0xda,0x15 + .4byte .LASF2900 + .byte 0x5 + .byte 0xdc,0x15 + .4byte .LASF2901 + .byte 0x5 + .byte 0xde,0x15 + .4byte .LASF2902 + .byte 0x5 + .byte 0xdf,0x15 + .4byte .LASF2903 + .byte 0x5 + .byte 0xe0,0x15 + .4byte .LASF2904 + .byte 0x5 + .byte 0xe2,0x15 + .4byte .LASF2905 + .byte 0x5 + .byte 0xe4,0x15 + .4byte .LASF2906 + .byte 0x5 + .byte 0xe5,0x15 + .4byte .LASF2907 + .byte 0x5 + .byte 0xe6,0x15 + .4byte .LASF2908 + .byte 0x5 + .byte 0xe8,0x15 + .4byte .LASF2909 + .byte 0x5 + .byte 0xe9,0x15 + .4byte .LASF2910 + .byte 0x5 + .byte 0xec,0x15 + .4byte .LASF2911 + .byte 0x5 + .byte 0xed,0x15 + .4byte .LASF2912 + .byte 0x5 + .byte 0xee,0x15 + .4byte .LASF2913 + .byte 0x5 + .byte 0xf5,0x15 + .4byte .LASF2914 + .byte 0x5 + .byte 0xf6,0x15 + .4byte .LASF2915 + .byte 0x5 + .byte 0xf7,0x15 + .4byte .LASF2916 + .byte 0x5 + .byte 0xf8,0x15 + .4byte .LASF2917 + .byte 0x5 + .byte 0xf9,0x15 + .4byte .LASF2918 + .byte 0x5 + .byte 0xfb,0x15 + .4byte .LASF2919 + .byte 0x5 + .byte 0xfc,0x15 + .4byte .LASF2920 + .byte 0x5 + .byte 0xfd,0x15 + .4byte .LASF2921 + .byte 0x5 + .byte 0xff,0x15 + .4byte .LASF2922 + .byte 0x5 + .byte 0x81,0x16 + .4byte .LASF2923 + .byte 0x5 + .byte 0x82,0x16 + .4byte .LASF2924 + .byte 0x5 + .byte 0x83,0x16 + .4byte .LASF2925 + .byte 0x5 + .byte 0x86,0x16 + .4byte .LASF2926 + .byte 0x5 + .byte 0x87,0x16 + .4byte .LASF2927 + .byte 0x5 + .byte 0x88,0x16 + .4byte .LASF2928 + .byte 0x5 + .byte 0x8a,0x16 + .4byte .LASF2929 + .byte 0x5 + .byte 0x8b,0x16 + .4byte .LASF2930 + .byte 0x5 + .byte 0x8c,0x16 + .4byte .LASF2931 + .byte 0x5 + .byte 0x8d,0x16 + .4byte .LASF2932 + .byte 0x5 + .byte 0x8f,0x16 + .4byte .LASF2933 + .byte 0x5 + .byte 0x90,0x16 + .4byte .LASF2934 + .byte 0x5 + .byte 0x91,0x16 + .4byte .LASF2935 + .byte 0x5 + .byte 0x92,0x16 + .4byte .LASF2936 + .byte 0x5 + .byte 0x93,0x16 + .4byte .LASF2937 + .byte 0x5 + .byte 0x94,0x16 + .4byte .LASF2938 + .byte 0x5 + .byte 0x95,0x16 + .4byte .LASF2939 + .byte 0x5 + .byte 0x96,0x16 + .4byte .LASF2940 + .byte 0x5 + .byte 0x99,0x16 + .4byte .LASF2941 + .byte 0x5 + .byte 0x9a,0x16 + .4byte .LASF2942 + .byte 0x5 + .byte 0x9b,0x16 + .4byte .LASF2943 + .byte 0x5 + .byte 0x9c,0x16 + .4byte .LASF2944 + .byte 0x5 + .byte 0x9e,0x16 + .4byte .LASF2945 + .byte 0x5 + .byte 0x9f,0x16 + .4byte .LASF2946 + .byte 0x5 + .byte 0xa0,0x16 + .4byte .LASF2947 + .byte 0x5 + .byte 0xa1,0x16 + .4byte .LASF2948 + .byte 0x5 + .byte 0xa3,0x16 + .4byte .LASF2949 + .byte 0x5 + .byte 0xa5,0x16 + .4byte .LASF2950 + .byte 0x5 + .byte 0xa6,0x16 + .4byte .LASF2951 + .byte 0x5 + .byte 0xa7,0x16 + .4byte .LASF2952 + .byte 0x5 + .byte 0xa8,0x16 + .4byte .LASF2953 + .byte 0x5 + .byte 0xa9,0x16 + .4byte .LASF2954 + .byte 0x5 + .byte 0xab,0x16 + .4byte .LASF2955 + .byte 0x5 + .byte 0xac,0x16 + .4byte .LASF2956 + .byte 0x5 + .byte 0xad,0x16 + .4byte .LASF2957 + .byte 0x5 + .byte 0xaf,0x16 + .4byte .LASF2958 + .byte 0x5 + .byte 0xb0,0x16 + .4byte .LASF2959 + .byte 0x5 + .byte 0xb3,0x16 + .4byte .LASF2960 + .byte 0x5 + .byte 0xb4,0x16 + .4byte .LASF2961 + .byte 0x5 + .byte 0xb5,0x16 + .4byte .LASF2962 + .byte 0x5 + .byte 0xb6,0x16 + .4byte .LASF2963 + .byte 0x5 + .byte 0xb7,0x16 + .4byte .LASF2964 + .byte 0x5 + .byte 0xb8,0x16 + .4byte .LASF2965 + .byte 0x5 + .byte 0xb9,0x16 + .4byte .LASF2966 + .byte 0x5 + .byte 0xba,0x16 + .4byte .LASF2967 + .byte 0x5 + .byte 0xbb,0x16 + .4byte .LASF2968 + .byte 0x5 + .byte 0xbc,0x16 + .4byte .LASF2969 + .byte 0x5 + .byte 0xbd,0x16 + .4byte .LASF2970 + .byte 0x5 + .byte 0xbe,0x16 + .4byte .LASF2971 + .byte 0x5 + .byte 0xbf,0x16 + .4byte .LASF2972 + .byte 0x5 + .byte 0xc0,0x16 + .4byte .LASF2973 + .byte 0x5 + .byte 0xc1,0x16 + .4byte .LASF2974 + .byte 0x5 + .byte 0xc4,0x16 + .4byte .LASF2975 + .byte 0x5 + .byte 0xc5,0x16 + .4byte .LASF2976 + .byte 0x5 + .byte 0xc6,0x16 + .4byte .LASF2977 + .byte 0x5 + .byte 0xc7,0x16 + .4byte .LASF2978 + .byte 0x5 + .byte 0xc8,0x16 + .4byte .LASF2979 + .byte 0x5 + .byte 0xc9,0x16 + .4byte .LASF2980 + .byte 0x5 + .byte 0xca,0x16 + .4byte .LASF2981 + .byte 0x5 + .byte 0xcb,0x16 + .4byte .LASF2982 + .byte 0x5 + .byte 0xcc,0x16 + .4byte .LASF2983 + .byte 0x5 + .byte 0xcd,0x16 + .4byte .LASF2984 + .byte 0x5 + .byte 0xce,0x16 + .4byte .LASF2985 + .byte 0x5 + .byte 0xcf,0x16 + .4byte .LASF2986 + .byte 0x5 + .byte 0xd2,0x16 + .4byte .LASF2987 + .byte 0x5 + .byte 0xd3,0x16 + .4byte .LASF2988 + .byte 0x5 + .byte 0xd4,0x16 + .4byte .LASF2989 + .byte 0x5 + .byte 0xd5,0x16 + .4byte .LASF2990 + .byte 0x5 + .byte 0xd6,0x16 + .4byte .LASF2991 + .byte 0x5 + .byte 0xd7,0x16 + .4byte .LASF2992 + .byte 0x5 + .byte 0xd8,0x16 + .4byte .LASF2993 + .byte 0x5 + .byte 0xd9,0x16 + .4byte .LASF2994 + .byte 0x5 + .byte 0xdc,0x16 + .4byte .LASF2995 + .byte 0x5 + .byte 0xdd,0x16 + .4byte .LASF2996 + .byte 0x5 + .byte 0xde,0x16 + .4byte .LASF2997 + .byte 0x5 + .byte 0xe0,0x16 + .4byte .LASF2998 + .byte 0x5 + .byte 0xe1,0x16 + .4byte .LASF2999 + .byte 0x5 + .byte 0xe3,0x16 + .4byte .LASF3000 + .byte 0x5 + .byte 0xe4,0x16 + .4byte .LASF3001 + .byte 0x5 + .byte 0xe5,0x16 + .4byte .LASF3002 + .byte 0x5 + .byte 0xe6,0x16 + .4byte .LASF3003 + .byte 0x5 + .byte 0xe8,0x16 + .4byte .LASF3004 + .byte 0x5 + .byte 0xea,0x16 + .4byte .LASF3005 + .byte 0x5 + .byte 0xeb,0x16 + .4byte .LASF3006 + .byte 0x5 + .byte 0xec,0x16 + .4byte .LASF3007 + .byte 0x5 + .byte 0xee,0x16 + .4byte .LASF3008 + .byte 0x5 + .byte 0xef,0x16 + .4byte .LASF3009 + .byte 0x5 + .byte 0xf1,0x16 + .4byte .LASF3010 + .byte 0x5 + .byte 0xf2,0x16 + .4byte .LASF3011 + .byte 0x5 + .byte 0xf3,0x16 + .4byte .LASF3012 + .byte 0x5 + .byte 0xf4,0x16 + .4byte .LASF3013 + .byte 0x5 + .byte 0xf6,0x16 + .4byte .LASF3014 + .byte 0x5 + .byte 0xf9,0x16 + .4byte .LASF3015 + .byte 0x5 + .byte 0xfa,0x16 + .4byte .LASF3016 + .byte 0x5 + .byte 0xfb,0x16 + .4byte .LASF3017 + .byte 0x5 + .byte 0xfd,0x16 + .4byte .LASF3018 + .byte 0x5 + .byte 0xfe,0x16 + .4byte .LASF3019 + .byte 0x5 + .byte 0xff,0x16 + .4byte .LASF3020 + .byte 0x5 + .byte 0x80,0x17 + .4byte .LASF3021 + .byte 0x5 + .byte 0x81,0x17 + .4byte .LASF3022 + .byte 0x5 + .byte 0x83,0x17 + .4byte .LASF3023 + .byte 0x5 + .byte 0x84,0x17 + .4byte .LASF3024 + .byte 0x5 + .byte 0x85,0x17 + .4byte .LASF3025 + .byte 0x5 + .byte 0x87,0x17 + .4byte .LASF3026 + .byte 0x5 + .byte 0x88,0x17 + .4byte .LASF3027 + .byte 0x5 + .byte 0x89,0x17 + .4byte .LASF3028 + .byte 0x5 + .byte 0x8a,0x17 + .4byte .LASF3029 + .byte 0x5 + .byte 0x8b,0x17 + .4byte .LASF3030 + .byte 0x5 + .byte 0x8e,0x17 + .4byte .LASF3031 + .byte 0x5 + .byte 0x8f,0x17 + .4byte .LASF3032 + .byte 0x5 + .byte 0x90,0x17 + .4byte .LASF3033 + .byte 0x5 + .byte 0x92,0x17 + .4byte .LASF3034 + .byte 0x5 + .byte 0x93,0x17 + .4byte .LASF3035 + .byte 0x5 + .byte 0x95,0x17 + .4byte .LASF3036 + .byte 0x5 + .byte 0x96,0x17 + .4byte .LASF3037 + .byte 0x5 + .byte 0x97,0x17 + .4byte .LASF3038 + .byte 0x5 + .byte 0x98,0x17 + .4byte .LASF3039 + .byte 0x5 + .byte 0x9a,0x17 + .4byte .LASF3040 + .byte 0x5 + .byte 0x9c,0x17 + .4byte .LASF3041 + .byte 0x5 + .byte 0x9d,0x17 + .4byte .LASF3042 + .byte 0x5 + .byte 0x9e,0x17 + .4byte .LASF3043 + .byte 0x5 + .byte 0xa0,0x17 + .4byte .LASF3044 + .byte 0x5 + .byte 0xa1,0x17 + .4byte .LASF3045 + .byte 0x5 + .byte 0xa3,0x17 + .4byte .LASF3046 + .byte 0x5 + .byte 0xa4,0x17 + .4byte .LASF3047 + .byte 0x5 + .byte 0xa5,0x17 + .4byte .LASF3048 + .byte 0x5 + .byte 0xa6,0x17 + .4byte .LASF3049 + .byte 0x5 + .byte 0xa8,0x17 + .4byte .LASF3050 + .byte 0x5 + .byte 0xab,0x17 + .4byte .LASF3051 + .byte 0x5 + .byte 0xac,0x17 + .4byte .LASF3052 + .byte 0x5 + .byte 0xad,0x17 + .4byte .LASF3053 + .byte 0x5 + .byte 0xaf,0x17 + .4byte .LASF3054 + .byte 0x5 + .byte 0xb0,0x17 + .4byte .LASF3055 + .byte 0x5 + .byte 0xb1,0x17 + .4byte .LASF3056 + .byte 0x5 + .byte 0xb2,0x17 + .4byte .LASF3057 + .byte 0x5 + .byte 0xb3,0x17 + .4byte .LASF3058 + .byte 0x5 + .byte 0xb5,0x17 + .4byte .LASF3059 + .byte 0x5 + .byte 0xb6,0x17 + .4byte .LASF3060 + .byte 0x5 + .byte 0xb7,0x17 + .4byte .LASF3061 + .byte 0x5 + .byte 0xb9,0x17 + .4byte .LASF3062 + .byte 0x5 + .byte 0xba,0x17 + .4byte .LASF3063 + .byte 0x5 + .byte 0xbb,0x17 + .4byte .LASF3064 + .byte 0x5 + .byte 0xbc,0x17 + .4byte .LASF3065 + .byte 0x5 + .byte 0xbd,0x17 + .4byte .LASF3066 + .byte 0x5 + .byte 0xc0,0x17 + .4byte .LASF3067 + .byte 0x5 + .byte 0xc1,0x17 + .4byte .LASF3068 + .byte 0x5 + .byte 0xc2,0x17 + .4byte .LASF3069 + .byte 0x5 + .byte 0xc3,0x17 + .4byte .LASF3070 + .byte 0x5 + .byte 0xc4,0x17 + .4byte .LASF3071 + .byte 0x5 + .byte 0xc5,0x17 + .4byte .LASF3072 + .byte 0x5 + .byte 0xc6,0x17 + .4byte .LASF3073 + .byte 0x5 + .byte 0xc7,0x17 + .4byte .LASF3074 + .byte 0x5 + .byte 0xc8,0x17 + .4byte .LASF3075 + .byte 0x5 + .byte 0xc9,0x17 + .4byte .LASF3076 + .byte 0x5 + .byte 0xca,0x17 + .4byte .LASF3077 + .byte 0x5 + .byte 0xcb,0x17 + .4byte .LASF3078 + .byte 0x5 + .byte 0xcc,0x17 + .4byte .LASF3079 + .byte 0x5 + .byte 0xcd,0x17 + .4byte .LASF3080 + .byte 0x5 + .byte 0xce,0x17 + .4byte .LASF3081 + .byte 0x5 + .byte 0xd1,0x17 + .4byte .LASF3082 + .byte 0x5 + .byte 0xd4,0x17 + .4byte .LASF3083 + .byte 0x5 + .byte 0xd7,0x17 + .4byte .LASF3084 + .byte 0x5 + .byte 0xda,0x17 + .4byte .LASF3085 + .byte 0x5 + .byte 0xdd,0x17 + .4byte .LASF3086 + .byte 0x5 + .byte 0xe0,0x17 + .4byte .LASF3087 + .byte 0x5 + .byte 0xe3,0x17 + .4byte .LASF3088 + .byte 0x5 + .byte 0xe6,0x17 + .4byte .LASF3089 + .byte 0x5 + .byte 0xe9,0x17 + .4byte .LASF3090 + .byte 0x5 + .byte 0xea,0x17 + .4byte .LASF3091 + .byte 0x5 + .byte 0xeb,0x17 + .4byte .LASF3092 + .byte 0x5 + .byte 0xec,0x17 + .4byte .LASF3093 + .byte 0x5 + .byte 0xed,0x17 + .4byte .LASF3094 + .byte 0x5 + .byte 0xee,0x17 + .4byte .LASF3095 + .byte 0x5 + .byte 0xef,0x17 + .4byte .LASF3096 + .byte 0x5 + .byte 0xf0,0x17 + .4byte .LASF3097 + .byte 0x5 + .byte 0xf1,0x17 + .4byte .LASF3098 + .byte 0x5 + .byte 0xf3,0x17 + .4byte .LASF3099 + .byte 0x5 + .byte 0xf4,0x17 + .4byte .LASF3100 + .byte 0x5 + .byte 0xf5,0x17 + .4byte .LASF3101 + .byte 0x5 + .byte 0xf7,0x17 + .4byte .LASF3102 + .byte 0x5 + .byte 0xf8,0x17 + .4byte .LASF3103 + .byte 0x5 + .byte 0xf9,0x17 + .4byte .LASF3104 + .byte 0x5 + .byte 0xfa,0x17 + .4byte .LASF3105 + .byte 0x5 + .byte 0xfb,0x17 + .4byte .LASF3106 + .byte 0x5 + .byte 0xfc,0x17 + .4byte .LASF3107 + .byte 0x5 + .byte 0xff,0x17 + .4byte .LASF3108 + .byte 0x5 + .byte 0x80,0x18 + .4byte .LASF3109 + .byte 0x5 + .byte 0x81,0x18 + .4byte .LASF3110 + .byte 0x5 + .byte 0x82,0x18 + .4byte .LASF3111 + .byte 0x5 + .byte 0x83,0x18 + .4byte .LASF3112 + .byte 0x5 + .byte 0x84,0x18 + .4byte .LASF3113 + .byte 0x5 + .byte 0x86,0x18 + .4byte .LASF3114 + .byte 0x5 + .byte 0x87,0x18 + .4byte .LASF3115 + .byte 0x5 + .byte 0x88,0x18 + .4byte .LASF3116 + .byte 0x5 + .byte 0x89,0x18 + .4byte .LASF3117 + .byte 0x5 + .byte 0x8a,0x18 + .4byte .LASF3118 + .byte 0x5 + .byte 0x8b,0x18 + .4byte .LASF3119 + .byte 0x5 + .byte 0x8e,0x18 + .4byte .LASF3120 + .byte 0x5 + .byte 0x95,0x18 + .4byte .LASF3121 + .byte 0x5 + .byte 0x96,0x18 + .4byte .LASF3122 + .byte 0x5 + .byte 0x97,0x18 + .4byte .LASF3123 + .byte 0x5 + .byte 0x98,0x18 + .4byte .LASF3124 + .byte 0x5 + .byte 0x99,0x18 + .4byte .LASF3125 + .byte 0x5 + .byte 0x9a,0x18 + .4byte .LASF3126 + .byte 0x5 + .byte 0x9b,0x18 + .4byte .LASF3127 + .byte 0x5 + .byte 0x9c,0x18 + .4byte .LASF3128 + .byte 0x5 + .byte 0x9d,0x18 + .4byte .LASF3129 + .byte 0x5 + .byte 0x9e,0x18 + .4byte .LASF3130 + .byte 0x5 + .byte 0xa1,0x18 + .4byte .LASF3131 + .byte 0x5 + .byte 0xa4,0x18 + .4byte .LASF3132 + .byte 0x5 + .byte 0xa5,0x18 + .4byte .LASF3133 + .byte 0x5 + .byte 0xa8,0x18 + .4byte .LASF3134 + .byte 0x5 + .byte 0xa9,0x18 + .4byte .LASF3135 + .byte 0x5 + .byte 0xaa,0x18 + .4byte .LASF3136 + .byte 0x5 + .byte 0xab,0x18 + .4byte .LASF3137 + .byte 0x5 + .byte 0xac,0x18 + .4byte .LASF3138 + .byte 0x5 + .byte 0xad,0x18 + .4byte .LASF3139 + .byte 0x5 + .byte 0xae,0x18 + .4byte .LASF3140 + .byte 0x5 + .byte 0xaf,0x18 + .4byte .LASF3141 + .byte 0x5 + .byte 0xb0,0x18 + .4byte .LASF3142 + .byte 0x5 + .byte 0xb1,0x18 + .4byte .LASF3143 + .byte 0x5 + .byte 0xb2,0x18 + .4byte .LASF3144 + .byte 0x5 + .byte 0xb3,0x18 + .4byte .LASF3145 + .byte 0x5 + .byte 0xb4,0x18 + .4byte .LASF3146 + .byte 0x5 + .byte 0xb5,0x18 + .4byte .LASF3147 + .byte 0x5 + .byte 0xb6,0x18 + .4byte .LASF3148 + .byte 0x5 + .byte 0xb9,0x18 + .4byte .LASF3149 + .byte 0x5 + .byte 0xba,0x18 + .4byte .LASF3150 + .byte 0x5 + .byte 0xbb,0x18 + .4byte .LASF3151 + .byte 0x5 + .byte 0xbc,0x18 + .4byte .LASF3152 + .byte 0x5 + .byte 0xbd,0x18 + .4byte .LASF3153 + .byte 0x5 + .byte 0xbe,0x18 + .4byte .LASF3154 + .byte 0x5 + .byte 0xbf,0x18 + .4byte .LASF3155 + .byte 0x5 + .byte 0xc1,0x18 + .4byte .LASF3156 + .byte 0x5 + .byte 0xc2,0x18 + .4byte .LASF3157 + .byte 0x5 + .byte 0xc3,0x18 + .4byte .LASF3158 + .byte 0x5 + .byte 0xc5,0x18 + .4byte .LASF3159 + .byte 0x5 + .byte 0xc8,0x18 + .4byte .LASF3160 + .byte 0x5 + .byte 0xc9,0x18 + .4byte .LASF3161 + .byte 0x5 + .byte 0xca,0x18 + .4byte .LASF3162 + .byte 0x5 + .byte 0xcb,0x18 + .4byte .LASF3163 + .byte 0x5 + .byte 0xcc,0x18 + .4byte .LASF3164 + .byte 0x5 + .byte 0xcd,0x18 + .4byte .LASF3165 + .byte 0x5 + .byte 0xce,0x18 + .4byte .LASF3166 + .byte 0x5 + .byte 0xcf,0x18 + .4byte .LASF3167 + .byte 0x5 + .byte 0xd0,0x18 + .4byte .LASF3168 + .byte 0x5 + .byte 0xd1,0x18 + .4byte .LASF3169 + .byte 0x5 + .byte 0xd2,0x18 + .4byte .LASF3170 + .byte 0x5 + .byte 0xd3,0x18 + .4byte .LASF3171 + .byte 0x5 + .byte 0xd6,0x18 + .4byte .LASF3172 + .byte 0x5 + .byte 0xd7,0x18 + .4byte .LASF3173 + .byte 0x5 + .byte 0xd8,0x18 + .4byte .LASF3174 + .byte 0x5 + .byte 0xd9,0x18 + .4byte .LASF3175 + .byte 0x5 + .byte 0xda,0x18 + .4byte .LASF3176 + .byte 0x5 + .byte 0xdb,0x18 + .4byte .LASF3177 + .byte 0x5 + .byte 0xdc,0x18 + .4byte .LASF3178 + .byte 0x5 + .byte 0xdd,0x18 + .4byte .LASF3179 + .byte 0x5 + .byte 0xde,0x18 + .4byte .LASF3180 + .byte 0x5 + .byte 0xe0,0x18 + .4byte .LASF3181 + .byte 0x5 + .byte 0xe7,0x18 + .4byte .LASF3182 + .byte 0x5 + .byte 0xe8,0x18 + .4byte .LASF3183 + .byte 0x5 + .byte 0xe9,0x18 + .4byte .LASF3184 + .byte 0x5 + .byte 0xea,0x18 + .4byte .LASF3185 + .byte 0x5 + .byte 0xeb,0x18 + .4byte .LASF3186 + .byte 0x5 + .byte 0xec,0x18 + .4byte .LASF3187 + .byte 0x5 + .byte 0xed,0x18 + .4byte .LASF3188 + .byte 0x5 + .byte 0xee,0x18 + .4byte .LASF3189 + .byte 0x5 + .byte 0xf0,0x18 + .4byte .LASF3190 + .byte 0x5 + .byte 0xf3,0x18 + .4byte .LASF3191 + .byte 0x5 + .byte 0xf4,0x18 + .4byte .LASF3192 + .byte 0x5 + .byte 0xf5,0x18 + .4byte .LASF3193 + .byte 0x5 + .byte 0xf6,0x18 + .4byte .LASF3194 + .byte 0x5 + .byte 0xf7,0x18 + .4byte .LASF3195 + .byte 0x5 + .byte 0xf8,0x18 + .4byte .LASF3196 + .byte 0x5 + .byte 0xf9,0x18 + .4byte .LASF3197 + .byte 0x5 + .byte 0xfa,0x18 + .4byte .LASF3198 + .byte 0x5 + .byte 0xfc,0x18 + .4byte .LASF3199 + .byte 0x5 + .byte 0xfd,0x18 + .4byte .LASF3200 + .byte 0x5 + .byte 0xfe,0x18 + .4byte .LASF3201 + .byte 0x5 + .byte 0x80,0x19 + .4byte .LASF3202 + .byte 0x5 + .byte 0x83,0x19 + .4byte .LASF3203 + .byte 0x5 + .byte 0x8a,0x19 + .4byte .LASF3204 + .byte 0x5 + .byte 0x8b,0x19 + .4byte .LASF3205 + .byte 0x5 + .byte 0x8c,0x19 + .4byte .LASF3206 + .byte 0x5 + .byte 0x8d,0x19 + .4byte .LASF3207 + .byte 0x5 + .byte 0x8e,0x19 + .4byte .LASF3208 + .byte 0x5 + .byte 0x8f,0x19 + .4byte .LASF3209 + .byte 0x5 + .byte 0x90,0x19 + .4byte .LASF3210 + .byte 0x5 + .byte 0x92,0x19 + .4byte .LASF3211 + .byte 0x5 + .byte 0x93,0x19 + .4byte .LASF3212 + .byte 0x5 + .byte 0x94,0x19 + .4byte .LASF3213 + .byte 0x5 + .byte 0x96,0x19 + .4byte .LASF3214 + .byte 0x5 + .byte 0x97,0x19 + .4byte .LASF3215 + .byte 0x5 + .byte 0x98,0x19 + .4byte .LASF3216 + .byte 0x5 + .byte 0x9a,0x19 + .4byte .LASF3217 + .byte 0x5 + .byte 0x9b,0x19 + .4byte .LASF3218 + .byte 0x5 + .byte 0x9c,0x19 + .4byte .LASF3219 + .byte 0x5 + .byte 0x9d,0x19 + .4byte .LASF3220 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_adc.h.47.2f8f94c42a26d78297424757abdcfc70,comdat +.Ldebug_macro49: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x2f + .4byte .LASF3223 + .byte 0x5 + .byte 0x30 + .4byte .LASF3224 + .byte 0x5 + .byte 0x31 + .4byte .LASF3225 + .byte 0x5 + .byte 0x32 + .4byte .LASF3226 + .byte 0x5 + .byte 0x33 + .4byte .LASF3227 + .byte 0x5 + .byte 0x34 + .4byte .LASF3228 + .byte 0x5 + .byte 0x35 + .4byte .LASF3229 + .byte 0x5 + .byte 0x36 + .4byte .LASF3230 + .byte 0x5 + .byte 0x37 + .4byte .LASF3231 + .byte 0x5 + .byte 0x38 + .4byte .LASF3232 + .byte 0x5 + .byte 0x3b + .4byte .LASF3233 + .byte 0x5 + .byte 0x3c + .4byte .LASF3234 + .byte 0x5 + .byte 0x3d + .4byte .LASF3235 + .byte 0x5 + .byte 0x3e + .4byte .LASF3236 + .byte 0x5 + .byte 0x3f + .4byte .LASF3237 + .byte 0x5 + .byte 0x40 + .4byte .LASF3238 + .byte 0x5 + .byte 0x42 + .4byte .LASF3239 + .byte 0x5 + .byte 0x43 + .4byte .LASF3240 + .byte 0x5 + .byte 0x46 + .4byte .LASF3241 + .byte 0x5 + .byte 0x47 + .4byte .LASF3242 + .byte 0x5 + .byte 0x4a + .4byte .LASF3243 + .byte 0x5 + .byte 0x4b + .4byte .LASF3244 + .byte 0x5 + .byte 0x4c + .4byte .LASF3245 + .byte 0x5 + .byte 0x4d + .4byte .LASF3246 + .byte 0x5 + .byte 0x4e + .4byte .LASF3247 + .byte 0x5 + .byte 0x4f + .4byte .LASF3248 + .byte 0x5 + .byte 0x50 + .4byte .LASF3249 + .byte 0x5 + .byte 0x51 + .4byte .LASF3250 + .byte 0x5 + .byte 0x52 + .4byte .LASF3251 + .byte 0x5 + .byte 0x53 + .4byte .LASF3252 + .byte 0x5 + .byte 0x54 + .4byte .LASF3253 + .byte 0x5 + .byte 0x55 + .4byte .LASF3254 + .byte 0x5 + .byte 0x56 + .4byte .LASF3255 + .byte 0x5 + .byte 0x57 + .4byte .LASF3256 + .byte 0x5 + .byte 0x58 + .4byte .LASF3257 + .byte 0x5 + .byte 0x59 + .4byte .LASF3258 + .byte 0x5 + .byte 0x5a + .4byte .LASF3259 + .byte 0x5 + .byte 0x5b + .4byte .LASF3260 + .byte 0x5 + .byte 0x5d + .4byte .LASF3261 + .byte 0x5 + .byte 0x5e + .4byte .LASF3262 + .byte 0x5 + .byte 0x61 + .4byte .LASF3263 + .byte 0x5 + .byte 0x62 + .4byte .LASF3264 + .byte 0x5 + .byte 0x63 + .4byte .LASF3265 + .byte 0x5 + .byte 0x64 + .4byte .LASF3266 + .byte 0x5 + .byte 0x65 + .4byte .LASF3267 + .byte 0x5 + .byte 0x66 + .4byte .LASF3268 + .byte 0x5 + .byte 0x67 + .4byte .LASF3269 + .byte 0x5 + .byte 0x68 + .4byte .LASF3270 + .byte 0x5 + .byte 0x6b + .4byte .LASF3271 + .byte 0x5 + .byte 0x6c + .4byte .LASF3272 + .byte 0x5 + .byte 0x6d + .4byte .LASF3273 + .byte 0x5 + .byte 0x6e + .4byte .LASF3274 + .byte 0x5 + .byte 0x6f + .4byte .LASF3275 + .byte 0x5 + .byte 0x71 + .4byte .LASF3276 + .byte 0x5 + .byte 0x72 + .4byte .LASF3277 + .byte 0x5 + .byte 0x73 + .4byte .LASF3278 + .byte 0x5 + .byte 0x76 + .4byte .LASF3279 + .byte 0x5 + .byte 0x77 + .4byte .LASF3280 + .byte 0x5 + .byte 0x78 + .4byte .LASF3281 + .byte 0x5 + .byte 0x79 + .4byte .LASF3282 + .byte 0x5 + .byte 0x7c + .4byte .LASF3283 + .byte 0x5 + .byte 0x7d + .4byte .LASF3284 + .byte 0x5 + .byte 0x7e + .4byte .LASF3285 + .byte 0x5 + .byte 0x7f + .4byte .LASF3286 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF3287 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF3288 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3289 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF3290 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF3291 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3292 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF3293 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF3294 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF3295 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF3296 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF3297 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_bkp.h.10.9889f5ee278f2650a4705ae2619c1961,comdat +.Ldebug_macro50: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3298 + .byte 0x5 + .byte 0x13 + .4byte .LASF3299 + .byte 0x5 + .byte 0x14 + .4byte .LASF3300 + .byte 0x5 + .byte 0x17 + .4byte .LASF3301 + .byte 0x5 + .byte 0x18 + .4byte .LASF3302 + .byte 0x5 + .byte 0x19 + .4byte .LASF3303 + .byte 0x5 + .byte 0x1a + .4byte .LASF3304 + .byte 0x5 + .byte 0x1d + .4byte .LASF3305 + .byte 0x5 + .byte 0x1e + .4byte .LASF3306 + .byte 0x5 + .byte 0x1f + .4byte .LASF3307 + .byte 0x5 + .byte 0x20 + .4byte .LASF3308 + .byte 0x5 + .byte 0x21 + .4byte .LASF3309 + .byte 0x5 + .byte 0x22 + .4byte .LASF3310 + .byte 0x5 + .byte 0x23 + .4byte .LASF3311 + .byte 0x5 + .byte 0x24 + .4byte .LASF3312 + .byte 0x5 + .byte 0x25 + .4byte .LASF3313 + .byte 0x5 + .byte 0x26 + .4byte .LASF3314 + .byte 0x5 + .byte 0x27 + .4byte .LASF3315 + .byte 0x5 + .byte 0x28 + .4byte .LASF3316 + .byte 0x5 + .byte 0x29 + .4byte .LASF3317 + .byte 0x5 + .byte 0x2a + .4byte .LASF3318 + .byte 0x5 + .byte 0x2b + .4byte .LASF3319 + .byte 0x5 + .byte 0x2c + .4byte .LASF3320 + .byte 0x5 + .byte 0x2d + .4byte .LASF3321 + .byte 0x5 + .byte 0x2e + .4byte .LASF3322 + .byte 0x5 + .byte 0x2f + .4byte .LASF3323 + .byte 0x5 + .byte 0x30 + .4byte .LASF3324 + .byte 0x5 + .byte 0x31 + .4byte .LASF3325 + .byte 0x5 + .byte 0x32 + .4byte .LASF3326 + .byte 0x5 + .byte 0x33 + .4byte .LASF3327 + .byte 0x5 + .byte 0x34 + .4byte .LASF3328 + .byte 0x5 + .byte 0x35 + .4byte .LASF3329 + .byte 0x5 + .byte 0x36 + .4byte .LASF3330 + .byte 0x5 + .byte 0x37 + .4byte .LASF3331 + .byte 0x5 + .byte 0x38 + .4byte .LASF3332 + .byte 0x5 + .byte 0x39 + .4byte .LASF3333 + .byte 0x5 + .byte 0x3a + .4byte .LASF3334 + .byte 0x5 + .byte 0x3b + .4byte .LASF3335 + .byte 0x5 + .byte 0x3c + .4byte .LASF3336 + .byte 0x5 + .byte 0x3d + .4byte .LASF3337 + .byte 0x5 + .byte 0x3e + .4byte .LASF3338 + .byte 0x5 + .byte 0x3f + .4byte .LASF3339 + .byte 0x5 + .byte 0x40 + .4byte .LASF3340 + .byte 0x5 + .byte 0x41 + .4byte .LASF3341 + .byte 0x5 + .byte 0x42 + .4byte .LASF3342 + .byte 0x5 + .byte 0x43 + .4byte .LASF3343 + .byte 0x5 + .byte 0x44 + .4byte .LASF3344 + .byte 0x5 + .byte 0x45 + .4byte .LASF3345 + .byte 0x5 + .byte 0x46 + .4byte .LASF3346 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_dbgmcu.h.10.42ff0b2d3382aa6311bcca75be7270ad,comdat +.Ldebug_macro51: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3348 + .byte 0x5 + .byte 0x14 + .4byte .LASF3349 + .byte 0x5 + .byte 0x15 + .4byte .LASF3350 + .byte 0x5 + .byte 0x16 + .4byte .LASF3351 + .byte 0x5 + .byte 0x17 + .4byte .LASF3352 + .byte 0x5 + .byte 0x18 + .4byte .LASF3353 + .byte 0x5 + .byte 0x19 + .4byte .LASF3354 + .byte 0x5 + .byte 0x1a + .4byte .LASF3355 + .byte 0x5 + .byte 0x1b + .4byte .LASF3356 + .byte 0x5 + .byte 0x1e + .4byte .LASF3357 + .byte 0x5 + .byte 0x1f + .4byte .LASF3358 + .byte 0x5 + .byte 0x20 + .4byte .LASF3359 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_dma.h.10.b875f1cdd6f1a6d6455d6ca5ef52cb6d,comdat +.Ldebug_macro52: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3360 + .byte 0x5 + .byte 0x39 + .4byte .LASF3361 + .byte 0x5 + .byte 0x3a + .4byte .LASF3362 + .byte 0x5 + .byte 0x3d + .4byte .LASF3363 + .byte 0x5 + .byte 0x3e + .4byte .LASF3364 + .byte 0x5 + .byte 0x41 + .4byte .LASF3365 + .byte 0x5 + .byte 0x42 + .4byte .LASF3366 + .byte 0x5 + .byte 0x45 + .4byte .LASF3367 + .byte 0x5 + .byte 0x46 + .4byte .LASF3368 + .byte 0x5 + .byte 0x47 + .4byte .LASF3369 + .byte 0x5 + .byte 0x4a + .4byte .LASF3370 + .byte 0x5 + .byte 0x4b + .4byte .LASF3371 + .byte 0x5 + .byte 0x4c + .4byte .LASF3372 + .byte 0x5 + .byte 0x4f + .4byte .LASF3373 + .byte 0x5 + .byte 0x50 + .4byte .LASF3374 + .byte 0x5 + .byte 0x53 + .4byte .LASF3375 + .byte 0x5 + .byte 0x54 + .4byte .LASF3376 + .byte 0x5 + .byte 0x55 + .4byte .LASF3377 + .byte 0x5 + .byte 0x56 + .4byte .LASF3378 + .byte 0x5 + .byte 0x59 + .4byte .LASF3379 + .byte 0x5 + .byte 0x5a + .4byte .LASF3380 + .byte 0x5 + .byte 0x5d + .4byte .LASF3381 + .byte 0x5 + .byte 0x5e + .4byte .LASF3382 + .byte 0x5 + .byte 0x5f + .4byte .LASF3383 + .byte 0x5 + .byte 0x61 + .4byte .LASF3384 + .byte 0x5 + .byte 0x62 + .4byte .LASF3385 + .byte 0x5 + .byte 0x63 + .4byte .LASF3386 + .byte 0x5 + .byte 0x64 + .4byte .LASF3387 + .byte 0x5 + .byte 0x65 + .4byte .LASF3388 + .byte 0x5 + .byte 0x66 + .4byte .LASF3389 + .byte 0x5 + .byte 0x67 + .4byte .LASF3390 + .byte 0x5 + .byte 0x68 + .4byte .LASF3391 + .byte 0x5 + .byte 0x69 + .4byte .LASF3392 + .byte 0x5 + .byte 0x6a + .4byte .LASF3393 + .byte 0x5 + .byte 0x6b + .4byte .LASF3394 + .byte 0x5 + .byte 0x6c + .4byte .LASF3395 + .byte 0x5 + .byte 0x6d + .4byte .LASF3396 + .byte 0x5 + .byte 0x6e + .4byte .LASF3397 + .byte 0x5 + .byte 0x6f + .4byte .LASF3398 + .byte 0x5 + .byte 0x70 + .4byte .LASF3399 + .byte 0x5 + .byte 0x71 + .4byte .LASF3400 + .byte 0x5 + .byte 0x72 + .4byte .LASF3401 + .byte 0x5 + .byte 0x73 + .4byte .LASF3402 + .byte 0x5 + .byte 0x74 + .4byte .LASF3403 + .byte 0x5 + .byte 0x75 + .4byte .LASF3404 + .byte 0x5 + .byte 0x76 + .4byte .LASF3405 + .byte 0x5 + .byte 0x77 + .4byte .LASF3406 + .byte 0x5 + .byte 0x78 + .4byte .LASF3407 + .byte 0x5 + .byte 0x79 + .4byte .LASF3408 + .byte 0x5 + .byte 0x7a + .4byte .LASF3409 + .byte 0x5 + .byte 0x7b + .4byte .LASF3410 + .byte 0x5 + .byte 0x7c + .4byte .LASF3411 + .byte 0x5 + .byte 0x7e + .4byte .LASF3412 + .byte 0x5 + .byte 0x7f + .4byte .LASF3413 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF3414 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF3415 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3416 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF3417 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF3418 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF3419 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF3420 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3421 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF3422 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF3423 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF3424 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF3425 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF3426 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF3427 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF3428 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF3429 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF3430 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF3431 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF3432 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF3433 + .byte 0x5 + .byte 0x96,0x1 + .4byte .LASF3434 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF3435 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF3436 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF3437 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF3438 + .byte 0x5 + .byte 0x9b,0x1 + .4byte .LASF3439 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF3440 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF3441 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF3442 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF3443 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF3444 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF3445 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF3446 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF3447 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF3448 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF3449 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF3450 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF3451 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF3452 + .byte 0x5 + .byte 0xa9,0x1 + .4byte .LASF3453 + .byte 0x5 + .byte 0xaa,0x1 + .4byte .LASF3454 + .byte 0x5 + .byte 0xab,0x1 + .4byte .LASF3455 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF3456 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF3457 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF3458 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF3459 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF3460 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF3461 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF3462 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF3463 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF3464 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF3465 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF3466 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF3467 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF3468 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF3469 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF3470 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF3471 + .byte 0x5 + .byte 0xbd,0x1 + .4byte .LASF3472 + .byte 0x5 + .byte 0xbe,0x1 + .4byte .LASF3473 + .byte 0x5 + .byte 0xbf,0x1 + .4byte .LASF3474 + .byte 0x5 + .byte 0xc0,0x1 + .4byte .LASF3475 + .byte 0x5 + .byte 0xc1,0x1 + .4byte .LASF3476 + .byte 0x5 + .byte 0xc2,0x1 + .4byte .LASF3477 + .byte 0x5 + .byte 0xc3,0x1 + .4byte .LASF3478 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF3479 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_exti.h.10.d7d49d1427a0092ae3c2f3e9aee285cb,comdat +.Ldebug_macro53: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3480 + .byte 0x5 + .byte 0x33 + .4byte .LASF3481 + .byte 0x5 + .byte 0x34 + .4byte .LASF3482 + .byte 0x5 + .byte 0x35 + .4byte .LASF3483 + .byte 0x5 + .byte 0x36 + .4byte .LASF3484 + .byte 0x5 + .byte 0x37 + .4byte .LASF3485 + .byte 0x5 + .byte 0x38 + .4byte .LASF3486 + .byte 0x5 + .byte 0x39 + .4byte .LASF3487 + .byte 0x5 + .byte 0x3a + .4byte .LASF3488 + .byte 0x5 + .byte 0x3b + .4byte .LASF3489 + .byte 0x5 + .byte 0x3c + .4byte .LASF3490 + .byte 0x5 + .byte 0x3d + .4byte .LASF3491 + .byte 0x5 + .byte 0x3e + .4byte .LASF3492 + .byte 0x5 + .byte 0x3f + .4byte .LASF3493 + .byte 0x5 + .byte 0x40 + .4byte .LASF3494 + .byte 0x5 + .byte 0x41 + .4byte .LASF3495 + .byte 0x5 + .byte 0x42 + .4byte .LASF3496 + .byte 0x5 + .byte 0x43 + .4byte .LASF3497 + .byte 0x5 + .byte 0x44 + .4byte .LASF3498 + .byte 0x5 + .byte 0x45 + .4byte .LASF3499 + .byte 0x5 + .byte 0x47 + .4byte .LASF3500 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_flash.h.10.20b49c415d0743c84cf2968780b18069,comdat +.Ldebug_macro54: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3501 + .byte 0x5 + .byte 0x1e + .4byte .LASF3502 + .byte 0x5 + .byte 0x1f + .4byte .LASF3503 + .byte 0x5 + .byte 0x20 + .4byte .LASF3504 + .byte 0x5 + .byte 0x23 + .4byte .LASF3505 + .byte 0x5 + .byte 0x24 + .4byte .LASF3506 + .byte 0x5 + .byte 0x27 + .4byte .LASF3507 + .byte 0x5 + .byte 0x28 + .4byte .LASF3508 + .byte 0x5 + .byte 0x2b + .4byte .LASF3509 + .byte 0x5 + .byte 0x2c + .4byte .LASF3510 + .byte 0x5 + .byte 0x2d + .4byte .LASF3511 + .byte 0x5 + .byte 0x2e + .4byte .LASF3512 + .byte 0x5 + .byte 0x2f + .4byte .LASF3513 + .byte 0x5 + .byte 0x30 + .4byte .LASF3514 + .byte 0x5 + .byte 0x31 + .4byte .LASF3515 + .byte 0x5 + .byte 0x32 + .4byte .LASF3516 + .byte 0x5 + .byte 0x35 + .4byte .LASF3517 + .byte 0x5 + .byte 0x36 + .4byte .LASF3518 + .byte 0x5 + .byte 0x37 + .4byte .LASF3519 + .byte 0x5 + .byte 0x38 + .4byte .LASF3520 + .byte 0x5 + .byte 0x39 + .4byte .LASF3521 + .byte 0x5 + .byte 0x3a + .4byte .LASF3522 + .byte 0x5 + .byte 0x3b + .4byte .LASF3523 + .byte 0x5 + .byte 0x3c + .4byte .LASF3524 + .byte 0x5 + .byte 0x3d + .4byte .LASF3525 + .byte 0x5 + .byte 0x3e + .4byte .LASF3526 + .byte 0x5 + .byte 0x3f + .4byte .LASF3527 + .byte 0x5 + .byte 0x40 + .4byte .LASF3528 + .byte 0x5 + .byte 0x41 + .4byte .LASF3529 + .byte 0x5 + .byte 0x42 + .4byte .LASF3530 + .byte 0x5 + .byte 0x43 + .4byte .LASF3531 + .byte 0x5 + .byte 0x44 + .4byte .LASF3532 + .byte 0x5 + .byte 0x45 + .4byte .LASF3533 + .byte 0x5 + .byte 0x46 + .4byte .LASF3534 + .byte 0x5 + .byte 0x47 + .4byte .LASF3535 + .byte 0x5 + .byte 0x48 + .4byte .LASF3536 + .byte 0x5 + .byte 0x49 + .4byte .LASF3537 + .byte 0x5 + .byte 0x4a + .4byte .LASF3538 + .byte 0x5 + .byte 0x4b + .4byte .LASF3539 + .byte 0x5 + .byte 0x4c + .4byte .LASF3540 + .byte 0x5 + .byte 0x4e + .4byte .LASF3541 + .byte 0x5 + .byte 0x50 + .4byte .LASF3542 + .byte 0x5 + .byte 0x53 + .4byte .LASF3543 + .byte 0x5 + .byte 0x54 + .4byte .LASF3544 + .byte 0x5 + .byte 0x57 + .4byte .LASF3545 + .byte 0x5 + .byte 0x58 + .4byte .LASF3546 + .byte 0x5 + .byte 0x5b + .4byte .LASF3547 + .byte 0x5 + .byte 0x5c + .4byte .LASF3548 + .byte 0x5 + .byte 0x5f + .4byte .LASF3549 + .byte 0x5 + .byte 0x60 + .4byte .LASF3550 + .byte 0x5 + .byte 0x61 + .4byte .LASF3551 + .byte 0x5 + .byte 0x62 + .4byte .LASF3552 + .byte 0x5 + .byte 0x65 + .4byte .LASF3553 + .byte 0x5 + .byte 0x66 + .4byte .LASF3554 + .byte 0x5 + .byte 0x67 + .4byte .LASF3555 + .byte 0x5 + .byte 0x68 + .4byte .LASF3556 + .byte 0x5 + .byte 0x69 + .4byte .LASF3557 + .byte 0x5 + .byte 0x6b + .4byte .LASF3558 + .byte 0x5 + .byte 0x6c + .4byte .LASF3559 + .byte 0x5 + .byte 0x6d + .4byte .LASF3560 + .byte 0x5 + .byte 0x6e + .4byte .LASF3561 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_gpio.h.10.159337fac61b3860aa706ef4c0d5fcaf,comdat +.Ldebug_macro55: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3562 + .byte 0x5 + .byte 0x3b + .4byte .LASF3563 + .byte 0x5 + .byte 0x3c + .4byte .LASF3564 + .byte 0x5 + .byte 0x3d + .4byte .LASF3565 + .byte 0x5 + .byte 0x3e + .4byte .LASF3566 + .byte 0x5 + .byte 0x3f + .4byte .LASF3567 + .byte 0x5 + .byte 0x40 + .4byte .LASF3568 + .byte 0x5 + .byte 0x41 + .4byte .LASF3569 + .byte 0x5 + .byte 0x42 + .4byte .LASF3570 + .byte 0x5 + .byte 0x43 + .4byte .LASF3571 + .byte 0x5 + .byte 0x44 + .4byte .LASF3572 + .byte 0x5 + .byte 0x45 + .4byte .LASF3573 + .byte 0x5 + .byte 0x46 + .4byte .LASF3574 + .byte 0x5 + .byte 0x47 + .4byte .LASF3575 + .byte 0x5 + .byte 0x48 + .4byte .LASF3576 + .byte 0x5 + .byte 0x49 + .4byte .LASF3577 + .byte 0x5 + .byte 0x4a + .4byte .LASF3578 + .byte 0x5 + .byte 0x4b + .4byte .LASF3579 + .byte 0x5 + .byte 0x4e + .4byte .LASF3580 + .byte 0x5 + .byte 0x4f + .4byte .LASF3581 + .byte 0x5 + .byte 0x50 + .4byte .LASF3582 + .byte 0x5 + .byte 0x51 + .4byte .LASF3583 + .byte 0x5 + .byte 0x52 + .4byte .LASF3584 + .byte 0x5 + .byte 0x53 + .4byte .LASF3585 + .byte 0x5 + .byte 0x54 + .4byte .LASF3586 + .byte 0x5 + .byte 0x55 + .4byte .LASF3587 + .byte 0x5 + .byte 0x56 + .4byte .LASF3588 + .byte 0x5 + .byte 0x57 + .4byte .LASF3589 + .byte 0x5 + .byte 0x58 + .4byte .LASF3590 + .byte 0x5 + .byte 0x59 + .4byte .LASF3591 + .byte 0x5 + .byte 0x5a + .4byte .LASF3592 + .byte 0x5 + .byte 0x5b + .4byte .LASF3593 + .byte 0x5 + .byte 0x5c + .4byte .LASF3594 + .byte 0x5 + .byte 0x5d + .4byte .LASF3595 + .byte 0x5 + .byte 0x5e + .4byte .LASF3596 + .byte 0x5 + .byte 0x5f + .4byte .LASF3597 + .byte 0x5 + .byte 0x60 + .4byte .LASF3598 + .byte 0x5 + .byte 0x61 + .4byte .LASF3599 + .byte 0x5 + .byte 0x62 + .4byte .LASF3600 + .byte 0x5 + .byte 0x63 + .4byte .LASF3601 + .byte 0x5 + .byte 0x64 + .4byte .LASF3602 + .byte 0x5 + .byte 0x67 + .4byte .LASF3603 + .byte 0x5 + .byte 0x68 + .4byte .LASF3604 + .byte 0x5 + .byte 0x69 + .4byte .LASF3605 + .byte 0x5 + .byte 0x6d + .4byte .LASF3606 + .byte 0x5 + .byte 0x6e + .4byte .LASF3607 + .byte 0x5 + .byte 0x6f + .4byte .LASF3608 + .byte 0x5 + .byte 0x70 + .4byte .LASF3609 + .byte 0x5 + .byte 0x71 + .4byte .LASF3610 + .byte 0x5 + .byte 0x72 + .4byte .LASF3611 + .byte 0x5 + .byte 0x73 + .4byte .LASF3612 + .byte 0x5 + .byte 0x76 + .4byte .LASF3613 + .byte 0x5 + .byte 0x77 + .4byte .LASF3614 + .byte 0x5 + .byte 0x78 + .4byte .LASF3615 + .byte 0x5 + .byte 0x79 + .4byte .LASF3616 + .byte 0x5 + .byte 0x7a + .4byte .LASF3617 + .byte 0x5 + .byte 0x7b + .4byte .LASF3618 + .byte 0x5 + .byte 0x7c + .4byte .LASF3619 + .byte 0x5 + .byte 0x7d + .4byte .LASF3620 + .byte 0x5 + .byte 0x7e + .4byte .LASF3621 + .byte 0x5 + .byte 0x7f + .4byte .LASF3622 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF3623 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF3624 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3625 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF3626 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF3627 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF3628 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_i2c.h.10.bfad8e35c8f588ca6d137ff8d1e84da3,comdat +.Ldebug_macro56: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3629 + .byte 0x5 + .byte 0x29 + .4byte .LASF3630 + .byte 0x5 + .byte 0x2a + .4byte .LASF3631 + .byte 0x5 + .byte 0x2b + .4byte .LASF3632 + .byte 0x5 + .byte 0x2e + .4byte .LASF3633 + .byte 0x5 + .byte 0x2f + .4byte .LASF3634 + .byte 0x5 + .byte 0x32 + .4byte .LASF3635 + .byte 0x5 + .byte 0x33 + .4byte .LASF3636 + .byte 0x5 + .byte 0x36 + .4byte .LASF3637 + .byte 0x5 + .byte 0x37 + .4byte .LASF3638 + .byte 0x5 + .byte 0x3a + .4byte .LASF3639 + .byte 0x5 + .byte 0x3b + .4byte .LASF3640 + .byte 0x5 + .byte 0x3e + .4byte .LASF3641 + .byte 0x5 + .byte 0x3f + .4byte .LASF3642 + .byte 0x5 + .byte 0x40 + .4byte .LASF3643 + .byte 0x5 + .byte 0x41 + .4byte .LASF3644 + .byte 0x5 + .byte 0x42 + .4byte .LASF3645 + .byte 0x5 + .byte 0x43 + .4byte .LASF3646 + .byte 0x5 + .byte 0x44 + .4byte .LASF3647 + .byte 0x5 + .byte 0x45 + .4byte .LASF3648 + .byte 0x5 + .byte 0x46 + .4byte .LASF3649 + .byte 0x5 + .byte 0x49 + .4byte .LASF3650 + .byte 0x5 + .byte 0x4a + .4byte .LASF3651 + .byte 0x5 + .byte 0x4d + .4byte .LASF3652 + .byte 0x5 + .byte 0x4e + .4byte .LASF3653 + .byte 0x5 + .byte 0x51 + .4byte .LASF3654 + .byte 0x5 + .byte 0x52 + .4byte .LASF3655 + .byte 0x5 + .byte 0x55 + .4byte .LASF3656 + .byte 0x5 + .byte 0x56 + .4byte .LASF3657 + .byte 0x5 + .byte 0x57 + .4byte .LASF3658 + .byte 0x5 + .byte 0x5a + .4byte .LASF3659 + .byte 0x5 + .byte 0x5b + .4byte .LASF3660 + .byte 0x5 + .byte 0x5c + .4byte .LASF3661 + .byte 0x5 + .byte 0x5d + .4byte .LASF3662 + .byte 0x5 + .byte 0x5e + .4byte .LASF3663 + .byte 0x5 + .byte 0x5f + .4byte .LASF3664 + .byte 0x5 + .byte 0x60 + .4byte .LASF3665 + .byte 0x5 + .byte 0x61 + .4byte .LASF3666 + .byte 0x5 + .byte 0x62 + .4byte .LASF3667 + .byte 0x5 + .byte 0x63 + .4byte .LASF3668 + .byte 0x5 + .byte 0x64 + .4byte .LASF3669 + .byte 0x5 + .byte 0x65 + .4byte .LASF3670 + .byte 0x5 + .byte 0x66 + .4byte .LASF3671 + .byte 0x5 + .byte 0x67 + .4byte .LASF3672 + .byte 0x5 + .byte 0x6a + .4byte .LASF3673 + .byte 0x5 + .byte 0x6b + .4byte .LASF3674 + .byte 0x5 + .byte 0x6c + .4byte .LASF3675 + .byte 0x5 + .byte 0x6d + .4byte .LASF3676 + .byte 0x5 + .byte 0x6e + .4byte .LASF3677 + .byte 0x5 + .byte 0x6f + .4byte .LASF3678 + .byte 0x5 + .byte 0x70 + .4byte .LASF3679 + .byte 0x5 + .byte 0x73 + .4byte .LASF3680 + .byte 0x5 + .byte 0x74 + .4byte .LASF3681 + .byte 0x5 + .byte 0x75 + .4byte .LASF3682 + .byte 0x5 + .byte 0x76 + .4byte .LASF3683 + .byte 0x5 + .byte 0x77 + .4byte .LASF3684 + .byte 0x5 + .byte 0x78 + .4byte .LASF3685 + .byte 0x5 + .byte 0x79 + .4byte .LASF3686 + .byte 0x5 + .byte 0x7a + .4byte .LASF3687 + .byte 0x5 + .byte 0x7b + .4byte .LASF3688 + .byte 0x5 + .byte 0x7c + .4byte .LASF3689 + .byte 0x5 + .byte 0x7d + .4byte .LASF3690 + .byte 0x5 + .byte 0x7e + .4byte .LASF3691 + .byte 0x5 + .byte 0x7f + .4byte .LASF3692 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF3693 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF3694 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF3695 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3696 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF3697 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF3698 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF3699 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF3700 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF3701 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF3702 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF3703 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF3704 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF3705 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF3706 + .byte 0x5 + .byte 0x96,0x1 + .4byte .LASF3707 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF3708 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF3709 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF3710 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_iwdg.h.10.8e7e9eba38fd42c5acff6b60f609fffe,comdat +.Ldebug_macro57: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3711 + .byte 0x5 + .byte 0x13 + .4byte .LASF3712 + .byte 0x5 + .byte 0x14 + .4byte .LASF3713 + .byte 0x5 + .byte 0x17 + .4byte .LASF3714 + .byte 0x5 + .byte 0x18 + .4byte .LASF3715 + .byte 0x5 + .byte 0x19 + .4byte .LASF3716 + .byte 0x5 + .byte 0x1a + .4byte .LASF3717 + .byte 0x5 + .byte 0x1b + .4byte .LASF3718 + .byte 0x5 + .byte 0x1c + .4byte .LASF3719 + .byte 0x5 + .byte 0x1d + .4byte .LASF3720 + .byte 0x5 + .byte 0x20 + .4byte .LASF3721 + .byte 0x5 + .byte 0x21 + .4byte .LASF3722 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_pwr.h.10.098398f8f71941e8039df6c53291be7b,comdat +.Ldebug_macro58: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3723 + .byte 0x5 + .byte 0x13 + .4byte .LASF3724 + .byte 0x5 + .byte 0x14 + .4byte .LASF3725 + .byte 0x5 + .byte 0x15 + .4byte .LASF3726 + .byte 0x5 + .byte 0x16 + .4byte .LASF3727 + .byte 0x5 + .byte 0x17 + .4byte .LASF3728 + .byte 0x5 + .byte 0x18 + .4byte .LASF3729 + .byte 0x5 + .byte 0x19 + .4byte .LASF3730 + .byte 0x5 + .byte 0x1a + .4byte .LASF3731 + .byte 0x5 + .byte 0x1d + .4byte .LASF3732 + .byte 0x5 + .byte 0x1e + .4byte .LASF3733 + .byte 0x5 + .byte 0x21 + .4byte .LASF3734 + .byte 0x5 + .byte 0x22 + .4byte .LASF3735 + .byte 0x5 + .byte 0x25 + .4byte .LASF3736 + .byte 0x5 + .byte 0x26 + .4byte .LASF3737 + .byte 0x5 + .byte 0x27 + .4byte .LASF3738 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_rcc.h.9.4f83391d39a5012c6dcb1e1bd283fc2c,comdat +.Ldebug_macro59: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9 + .4byte .LASF3739 + .byte 0x5 + .byte 0x1c + .4byte .LASF3740 + .byte 0x5 + .byte 0x1d + .4byte .LASF3741 + .byte 0x5 + .byte 0x1e + .4byte .LASF3742 + .byte 0x5 + .byte 0x21 + .4byte .LASF3743 + .byte 0x5 + .byte 0x22 + .4byte .LASF3744 + .byte 0x5 + .byte 0x23 + .4byte .LASF3745 + .byte 0x5 + .byte 0x26 + .4byte .LASF3746 + .byte 0x5 + .byte 0x27 + .4byte .LASF3747 + .byte 0x5 + .byte 0x28 + .4byte .LASF3748 + .byte 0x5 + .byte 0x29 + .4byte .LASF3749 + .byte 0x5 + .byte 0x2a + .4byte .LASF3750 + .byte 0x5 + .byte 0x2b + .4byte .LASF3751 + .byte 0x5 + .byte 0x2c + .4byte .LASF3752 + .byte 0x5 + .byte 0x2d + .4byte .LASF3753 + .byte 0x5 + .byte 0x2e + .4byte .LASF3754 + .byte 0x5 + .byte 0x2f + .4byte .LASF3755 + .byte 0x5 + .byte 0x30 + .4byte .LASF3756 + .byte 0x5 + .byte 0x31 + .4byte .LASF3757 + .byte 0x5 + .byte 0x32 + .4byte .LASF3758 + .byte 0x5 + .byte 0x33 + .4byte .LASF3759 + .byte 0x5 + .byte 0x34 + .4byte .LASF3760 + .byte 0x5 + .byte 0x37 + .4byte .LASF3761 + .byte 0x5 + .byte 0x38 + .4byte .LASF3762 + .byte 0x5 + .byte 0x39 + .4byte .LASF3763 + .byte 0x5 + .byte 0x3c + .4byte .LASF3764 + .byte 0x5 + .byte 0x3d + .4byte .LASF3765 + .byte 0x5 + .byte 0x3e + .4byte .LASF3766 + .byte 0x5 + .byte 0x3f + .4byte .LASF3767 + .byte 0x5 + .byte 0x40 + .4byte .LASF3768 + .byte 0x5 + .byte 0x41 + .4byte .LASF3769 + .byte 0x5 + .byte 0x42 + .4byte .LASF3770 + .byte 0x5 + .byte 0x43 + .4byte .LASF3771 + .byte 0x5 + .byte 0x44 + .4byte .LASF3772 + .byte 0x5 + .byte 0x47 + .4byte .LASF3773 + .byte 0x5 + .byte 0x48 + .4byte .LASF3774 + .byte 0x5 + .byte 0x49 + .4byte .LASF3775 + .byte 0x5 + .byte 0x4a + .4byte .LASF3776 + .byte 0x5 + .byte 0x4b + .4byte .LASF3777 + .byte 0x5 + .byte 0x4e + .4byte .LASF3778 + .byte 0x5 + .byte 0x4f + .4byte .LASF3779 + .byte 0x5 + .byte 0x50 + .4byte .LASF3780 + .byte 0x5 + .byte 0x51 + .4byte .LASF3781 + .byte 0x5 + .byte 0x52 + .4byte .LASF3782 + .byte 0x5 + .byte 0x53 + .4byte .LASF3783 + .byte 0x5 + .byte 0x56 + .4byte .LASF3784 + .byte 0x5 + .byte 0x57 + .4byte .LASF3785 + .byte 0x5 + .byte 0x5a + .4byte .LASF3786 + .byte 0x5 + .byte 0x5b + .4byte .LASF3787 + .byte 0x5 + .byte 0x5c + .4byte .LASF3788 + .byte 0x5 + .byte 0x5d + .4byte .LASF3789 + .byte 0x5 + .byte 0x60 + .4byte .LASF3790 + .byte 0x5 + .byte 0x61 + .4byte .LASF3791 + .byte 0x5 + .byte 0x62 + .4byte .LASF3792 + .byte 0x5 + .byte 0x65 + .4byte .LASF3793 + .byte 0x5 + .byte 0x66 + .4byte .LASF3794 + .byte 0x5 + .byte 0x67 + .4byte .LASF3795 + .byte 0x5 + .byte 0x6a + .4byte .LASF3796 + .byte 0x5 + .byte 0x6b + .4byte .LASF3797 + .byte 0x5 + .byte 0x6c + .4byte .LASF3798 + .byte 0x5 + .byte 0x6d + .4byte .LASF3799 + .byte 0x5 + .byte 0x6e + .4byte .LASF3800 + .byte 0x5 + .byte 0x6f + .4byte .LASF3801 + .byte 0x5 + .byte 0x70 + .4byte .LASF3802 + .byte 0x5 + .byte 0x71 + .4byte .LASF3803 + .byte 0x5 + .byte 0x74 + .4byte .LASF3804 + .byte 0x5 + .byte 0x75 + .4byte .LASF3805 + .byte 0x5 + .byte 0x76 + .4byte .LASF3806 + .byte 0x5 + .byte 0x77 + .4byte .LASF3807 + .byte 0x5 + .byte 0x78 + .4byte .LASF3808 + .byte 0x5 + .byte 0x79 + .4byte .LASF3809 + .byte 0x5 + .byte 0x7a + .4byte .LASF3810 + .byte 0x5 + .byte 0x7b + .4byte .LASF3811 + .byte 0x5 + .byte 0x7c + .4byte .LASF3812 + .byte 0x5 + .byte 0x7d + .4byte .LASF3813 + .byte 0x5 + .byte 0x7e + .4byte .LASF3814 + .byte 0x5 + .byte 0x7f + .4byte .LASF3815 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF3816 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF3817 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3818 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF3819 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF3820 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF3821 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF3822 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3823 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF3824 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF3825 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF3826 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF3827 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF3828 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF3829 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF3830 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF3831 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF3832 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF3833 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF3834 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF3835 + .byte 0x5 + .byte 0x96,0x1 + .4byte .LASF3836 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF3837 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF3838 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF3839 + .byte 0x5 + .byte 0x9a,0x1 + .4byte .LASF3840 + .byte 0x5 + .byte 0x9b,0x1 + .4byte .LASF3841 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF3842 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF3843 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF3844 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF3845 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF3846 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF3847 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF3848 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF3849 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF3850 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF3851 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF3852 + .byte 0x5 + .byte 0xa9,0x1 + .4byte .LASF3853 + .byte 0x5 + .byte 0xaa,0x1 + .4byte .LASF3854 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF3855 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF3856 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF3857 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF3858 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF3859 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF3860 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF3861 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF3862 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF3863 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF3864 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF3865 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF3866 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF3867 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_rtc.h.10.95faa0db92efd9563f894a8928872668,comdat +.Ldebug_macro60: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3868 + .byte 0x5 + .byte 0x14 + .4byte .LASF3869 + .byte 0x5 + .byte 0x15 + .4byte .LASF3870 + .byte 0x5 + .byte 0x16 + .4byte .LASF3871 + .byte 0x5 + .byte 0x19 + .4byte .LASF3872 + .byte 0x5 + .byte 0x1a + .4byte .LASF3873 + .byte 0x5 + .byte 0x1b + .4byte .LASF3874 + .byte 0x5 + .byte 0x1c + .4byte .LASF3875 + .byte 0x5 + .byte 0x1d + .4byte .LASF3876 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_spi.h.10.2057d37d657d92f6312526c6aee1bc60,comdat +.Ldebug_macro61: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3877 + .byte 0x5 + .byte 0x4c + .4byte .LASF3878 + .byte 0x5 + .byte 0x4d + .4byte .LASF3879 + .byte 0x5 + .byte 0x4e + .4byte .LASF3880 + .byte 0x5 + .byte 0x4f + .4byte .LASF3881 + .byte 0x5 + .byte 0x52 + .4byte .LASF3882 + .byte 0x5 + .byte 0x53 + .4byte .LASF3883 + .byte 0x5 + .byte 0x56 + .4byte .LASF3884 + .byte 0x5 + .byte 0x57 + .4byte .LASF3885 + .byte 0x5 + .byte 0x5a + .4byte .LASF3886 + .byte 0x5 + .byte 0x5b + .4byte .LASF3887 + .byte 0x5 + .byte 0x5e + .4byte .LASF3888 + .byte 0x5 + .byte 0x5f + .4byte .LASF3889 + .byte 0x5 + .byte 0x62 + .4byte .LASF3890 + .byte 0x5 + .byte 0x63 + .4byte .LASF3891 + .byte 0x5 + .byte 0x66 + .4byte .LASF3892 + .byte 0x5 + .byte 0x67 + .4byte .LASF3893 + .byte 0x5 + .byte 0x68 + .4byte .LASF3894 + .byte 0x5 + .byte 0x69 + .4byte .LASF3895 + .byte 0x5 + .byte 0x6a + .4byte .LASF3896 + .byte 0x5 + .byte 0x6b + .4byte .LASF3897 + .byte 0x5 + .byte 0x6c + .4byte .LASF3898 + .byte 0x5 + .byte 0x6d + .4byte .LASF3899 + .byte 0x5 + .byte 0x70 + .4byte .LASF3900 + .byte 0x5 + .byte 0x71 + .4byte .LASF3901 + .byte 0x5 + .byte 0x74 + .4byte .LASF3902 + .byte 0x5 + .byte 0x75 + .4byte .LASF3903 + .byte 0x5 + .byte 0x76 + .4byte .LASF3904 + .byte 0x5 + .byte 0x77 + .4byte .LASF3905 + .byte 0x5 + .byte 0x7a + .4byte .LASF3906 + .byte 0x5 + .byte 0x7b + .4byte .LASF3907 + .byte 0x5 + .byte 0x7c + .4byte .LASF3908 + .byte 0x5 + .byte 0x7d + .4byte .LASF3909 + .byte 0x5 + .byte 0x7e + .4byte .LASF3910 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF3911 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3912 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF3913 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF3914 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3915 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF3916 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF3917 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF3918 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF3919 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF3920 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF3921 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF3922 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF3923 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF3924 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF3925 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF3926 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF3927 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF3928 + .byte 0x5 + .byte 0x9b,0x1 + .4byte .LASF3929 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF3930 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF3931 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF3932 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF3933 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF3934 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF3935 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF3936 + .byte 0x5 + .byte 0xab,0x1 + .4byte .LASF3937 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF3938 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF3939 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF3940 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF3941 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF3942 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF3943 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF3944 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF3945 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF3946 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF3947 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF3948 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF3949 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF3950 + .byte 0x5 + .byte 0xbb,0x1 + .4byte .LASF3951 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_tim.h.10.afe1fcd8d5d8da8e8a70ae4e8fbb3eff,comdat +.Ldebug_macro62: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF3952 + .byte 0x5 + .byte 0x7a + .4byte .LASF3953 + .byte 0x5 + .byte 0x7b + .4byte .LASF3954 + .byte 0x5 + .byte 0x7c + .4byte .LASF3955 + .byte 0x5 + .byte 0x7d + .4byte .LASF3956 + .byte 0x5 + .byte 0x7e + .4byte .LASF3957 + .byte 0x5 + .byte 0x7f + .4byte .LASF3958 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF3959 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF3960 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF3961 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF3962 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF3963 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF3964 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF3965 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF3966 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF3967 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF3968 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF3969 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF3970 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF3971 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF3972 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF3973 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF3974 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF3975 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF3976 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF3977 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF3978 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF3979 + .byte 0x5 + .byte 0xa5,0x1 + .4byte .LASF3980 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF3981 + .byte 0x5 + .byte 0xa9,0x1 + .4byte .LASF3982 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF3983 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF3984 + .byte 0x5 + .byte 0xb0,0x1 + .4byte .LASF3985 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF3986 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF3987 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF3988 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF3989 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF3990 + .byte 0x5 + .byte 0xbc,0x1 + .4byte .LASF3991 + .byte 0x5 + .byte 0xbd,0x1 + .4byte .LASF3992 + .byte 0x5 + .byte 0xbe,0x1 + .4byte .LASF3993 + .byte 0x5 + .byte 0xbf,0x1 + .4byte .LASF3994 + .byte 0x5 + .byte 0xc2,0x1 + .4byte .LASF3995 + .byte 0x5 + .byte 0xc3,0x1 + .4byte .LASF3996 + .byte 0x5 + .byte 0xc6,0x1 + .4byte .LASF3997 + .byte 0x5 + .byte 0xc7,0x1 + .4byte .LASF3998 + .byte 0x5 + .byte 0xca,0x1 + .4byte .LASF3999 + .byte 0x5 + .byte 0xcb,0x1 + .4byte .LASF4000 + .byte 0x5 + .byte 0xce,0x1 + .4byte .LASF4001 + .byte 0x5 + .byte 0xcf,0x1 + .4byte .LASF4002 + .byte 0x5 + .byte 0xd2,0x1 + .4byte .LASF4003 + .byte 0x5 + .byte 0xd3,0x1 + .4byte .LASF4004 + .byte 0x5 + .byte 0xd4,0x1 + .4byte .LASF4005 + .byte 0x5 + .byte 0xd7,0x1 + .4byte .LASF4006 + .byte 0x5 + .byte 0xd9,0x1 + .4byte .LASF4007 + .byte 0x5 + .byte 0xdb,0x1 + .4byte .LASF4008 + .byte 0x5 + .byte 0xde,0x1 + .4byte .LASF4009 + .byte 0x5 + .byte 0xdf,0x1 + .4byte .LASF4010 + .byte 0x5 + .byte 0xe0,0x1 + .4byte .LASF4011 + .byte 0x5 + .byte 0xe1,0x1 + .4byte .LASF4012 + .byte 0x5 + .byte 0xe4,0x1 + .4byte .LASF4013 + .byte 0x5 + .byte 0xe5,0x1 + .4byte .LASF4014 + .byte 0x5 + .byte 0xe6,0x1 + .4byte .LASF4015 + .byte 0x5 + .byte 0xe7,0x1 + .4byte .LASF4016 + .byte 0x5 + .byte 0xe8,0x1 + .4byte .LASF4017 + .byte 0x5 + .byte 0xe9,0x1 + .4byte .LASF4018 + .byte 0x5 + .byte 0xea,0x1 + .4byte .LASF4019 + .byte 0x5 + .byte 0xeb,0x1 + .4byte .LASF4020 + .byte 0x5 + .byte 0xee,0x1 + .4byte .LASF4021 + .byte 0x5 + .byte 0xef,0x1 + .4byte .LASF4022 + .byte 0x5 + .byte 0xf0,0x1 + .4byte .LASF4023 + .byte 0x5 + .byte 0xf1,0x1 + .4byte .LASF4024 + .byte 0x5 + .byte 0xf2,0x1 + .4byte .LASF4025 + .byte 0x5 + .byte 0xf3,0x1 + .4byte .LASF4026 + .byte 0x5 + .byte 0xf4,0x1 + .4byte .LASF4027 + .byte 0x5 + .byte 0xf5,0x1 + .4byte .LASF4028 + .byte 0x5 + .byte 0xf6,0x1 + .4byte .LASF4029 + .byte 0x5 + .byte 0xf7,0x1 + .4byte .LASF4030 + .byte 0x5 + .byte 0xf8,0x1 + .4byte .LASF4031 + .byte 0x5 + .byte 0xf9,0x1 + .4byte .LASF4032 + .byte 0x5 + .byte 0xfa,0x1 + .4byte .LASF4033 + .byte 0x5 + .byte 0xfb,0x1 + .4byte .LASF4034 + .byte 0x5 + .byte 0xfc,0x1 + .4byte .LASF4035 + .byte 0x5 + .byte 0xfd,0x1 + .4byte .LASF4036 + .byte 0x5 + .byte 0xfe,0x1 + .4byte .LASF4037 + .byte 0x5 + .byte 0xff,0x1 + .4byte .LASF4038 + .byte 0x5 + .byte 0x80,0x2 + .4byte .LASF4039 + .byte 0x5 + .byte 0x83,0x2 + .4byte .LASF4040 + .byte 0x5 + .byte 0x84,0x2 + .4byte .LASF4041 + .byte 0x5 + .byte 0x85,0x2 + .4byte .LASF4042 + .byte 0x5 + .byte 0x86,0x2 + .4byte .LASF4043 + .byte 0x5 + .byte 0x87,0x2 + .4byte .LASF4044 + .byte 0x5 + .byte 0x88,0x2 + .4byte .LASF4045 + .byte 0x5 + .byte 0x89,0x2 + .4byte .LASF4046 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF4047 + .byte 0x5 + .byte 0x8b,0x2 + .4byte .LASF4048 + .byte 0x5 + .byte 0x8c,0x2 + .4byte .LASF4049 + .byte 0x5 + .byte 0x8d,0x2 + .4byte .LASF4050 + .byte 0x5 + .byte 0x8e,0x2 + .4byte .LASF4051 + .byte 0x5 + .byte 0x8f,0x2 + .4byte .LASF4052 + .byte 0x5 + .byte 0x90,0x2 + .4byte .LASF4053 + .byte 0x5 + .byte 0x91,0x2 + .4byte .LASF4054 + .byte 0x5 + .byte 0x92,0x2 + .4byte .LASF4055 + .byte 0x5 + .byte 0x93,0x2 + .4byte .LASF4056 + .byte 0x5 + .byte 0x94,0x2 + .4byte .LASF4057 + .byte 0x5 + .byte 0x97,0x2 + .4byte .LASF4058 + .byte 0x5 + .byte 0x98,0x2 + .4byte .LASF4059 + .byte 0x5 + .byte 0x99,0x2 + .4byte .LASF4060 + .byte 0x5 + .byte 0x9a,0x2 + .4byte .LASF4061 + .byte 0x5 + .byte 0x9b,0x2 + .4byte .LASF4062 + .byte 0x5 + .byte 0x9c,0x2 + .4byte .LASF4063 + .byte 0x5 + .byte 0x9d,0x2 + .4byte .LASF4064 + .byte 0x5 + .byte 0xa0,0x2 + .4byte .LASF4065 + .byte 0x5 + .byte 0xa1,0x2 + .4byte .LASF4066 + .byte 0x5 + .byte 0xa2,0x2 + .4byte .LASF4067 + .byte 0x5 + .byte 0xa3,0x2 + .4byte .LASF4068 + .byte 0x5 + .byte 0xa6,0x2 + .4byte .LASF4069 + .byte 0x5 + .byte 0xa7,0x2 + .4byte .LASF4070 + .byte 0x5 + .byte 0xa8,0x2 + .4byte .LASF4071 + .byte 0x5 + .byte 0xa9,0x2 + .4byte .LASF4072 + .byte 0x5 + .byte 0xaa,0x2 + .4byte .LASF4073 + .byte 0x5 + .byte 0xab,0x2 + .4byte .LASF4074 + .byte 0x5 + .byte 0xac,0x2 + .4byte .LASF4075 + .byte 0x5 + .byte 0xad,0x2 + .4byte .LASF4076 + .byte 0x5 + .byte 0xb0,0x2 + .4byte .LASF4077 + .byte 0x5 + .byte 0xb1,0x2 + .4byte .LASF4078 + .byte 0x5 + .byte 0xb2,0x2 + .4byte .LASF4079 + .byte 0x5 + .byte 0xb5,0x2 + .4byte .LASF4080 + .byte 0x5 + .byte 0xb6,0x2 + .4byte .LASF4081 + .byte 0x5 + .byte 0xb9,0x2 + .4byte .LASF4082 + .byte 0x5 + .byte 0xba,0x2 + .4byte .LASF4083 + .byte 0x5 + .byte 0xbd,0x2 + .4byte .LASF4084 + .byte 0x5 + .byte 0xbe,0x2 + .4byte .LASF4085 + .byte 0x5 + .byte 0xc1,0x2 + .4byte .LASF4086 + .byte 0x5 + .byte 0xc2,0x2 + .4byte .LASF4087 + .byte 0x5 + .byte 0xc3,0x2 + .4byte .LASF4088 + .byte 0x5 + .byte 0xc6,0x2 + .4byte .LASF4089 + .byte 0x5 + .byte 0xc7,0x2 + .4byte .LASF4090 + .byte 0x5 + .byte 0xc8,0x2 + .4byte .LASF4091 + .byte 0x5 + .byte 0xc9,0x2 + .4byte .LASF4092 + .byte 0x5 + .byte 0xca,0x2 + .4byte .LASF4093 + .byte 0x5 + .byte 0xcb,0x2 + .4byte .LASF4094 + .byte 0x5 + .byte 0xcc,0x2 + .4byte .LASF4095 + .byte 0x5 + .byte 0xcd,0x2 + .4byte .LASF4096 + .byte 0x5 + .byte 0xd0,0x2 + .4byte .LASF4097 + .byte 0x5 + .byte 0xd3,0x2 + .4byte .LASF4098 + .byte 0x5 + .byte 0xd6,0x2 + .4byte .LASF4099 + .byte 0x5 + .byte 0xd7,0x2 + .4byte .LASF4100 + .byte 0x5 + .byte 0xda,0x2 + .4byte .LASF4101 + .byte 0x5 + .byte 0xdb,0x2 + .4byte .LASF4102 + .byte 0x5 + .byte 0xde,0x2 + .4byte .LASF4103 + .byte 0x5 + .byte 0xdf,0x2 + .4byte .LASF4104 + .byte 0x5 + .byte 0xe2,0x2 + .4byte .LASF4105 + .byte 0x5 + .byte 0xe3,0x2 + .4byte .LASF4106 + .byte 0x5 + .byte 0xe4,0x2 + .4byte .LASF4107 + .byte 0x5 + .byte 0xe5,0x2 + .4byte .LASF4108 + .byte 0x5 + .byte 0xe6,0x2 + .4byte .LASF4109 + .byte 0x5 + .byte 0xe7,0x2 + .4byte .LASF4110 + .byte 0x5 + .byte 0xe8,0x2 + .4byte .LASF4111 + .byte 0x5 + .byte 0xe9,0x2 + .4byte .LASF4112 + .byte 0x5 + .byte 0xec,0x2 + .4byte .LASF4113 + .byte 0x5 + .byte 0xed,0x2 + .4byte .LASF4114 + .byte 0x5 + .byte 0xee,0x2 + .4byte .LASF4115 + .byte 0x5 + .byte 0xef,0x2 + .4byte .LASF4116 + .byte 0x5 + .byte 0xf2,0x2 + .4byte .LASF4117 + .byte 0x5 + .byte 0xf3,0x2 + .4byte .LASF4118 + .byte 0x5 + .byte 0xf6,0x2 + .4byte .LASF4119 + .byte 0x5 + .byte 0xf7,0x2 + .4byte .LASF4120 + .byte 0x5 + .byte 0xf8,0x2 + .4byte .LASF4121 + .byte 0x5 + .byte 0xf9,0x2 + .4byte .LASF4122 + .byte 0x5 + .byte 0xfa,0x2 + .4byte .LASF4123 + .byte 0x5 + .byte 0xfb,0x2 + .4byte .LASF4124 + .byte 0x5 + .byte 0xfc,0x2 + .4byte .LASF4125 + .byte 0x5 + .byte 0xfd,0x2 + .4byte .LASF4126 + .byte 0x5 + .byte 0xfe,0x2 + .4byte .LASF4127 + .byte 0x5 + .byte 0xff,0x2 + .4byte .LASF4128 + .byte 0x5 + .byte 0x80,0x3 + .4byte .LASF4129 + .byte 0x5 + .byte 0x81,0x3 + .4byte .LASF4130 + .byte 0x5 + .byte 0x84,0x3 + .4byte .LASF4131 + .byte 0x5 + .byte 0x85,0x3 + .4byte .LASF4132 + .byte 0x5 + .byte 0x86,0x3 + .4byte .LASF4133 + .byte 0x5 + .byte 0x87,0x3 + .4byte .LASF4134 + .byte 0x5 + .byte 0x88,0x3 + .4byte .LASF4135 + .byte 0x5 + .byte 0x89,0x3 + .4byte .LASF4136 + .byte 0x5 + .byte 0x8a,0x3 + .4byte .LASF4137 + .byte 0x5 + .byte 0x8b,0x3 + .4byte .LASF4138 + .byte 0x5 + .byte 0x8c,0x3 + .4byte .LASF4139 + .byte 0x5 + .byte 0x8d,0x3 + .4byte .LASF4140 + .byte 0x5 + .byte 0x8e,0x3 + .4byte .LASF4141 + .byte 0x5 + .byte 0x8f,0x3 + .4byte .LASF4142 + .byte 0x5 + .byte 0x90,0x3 + .4byte .LASF4143 + .byte 0x5 + .byte 0x91,0x3 + .4byte .LASF4144 + .byte 0x5 + .byte 0x92,0x3 + .4byte .LASF4145 + .byte 0x5 + .byte 0x93,0x3 + .4byte .LASF4146 + .byte 0x5 + .byte 0x94,0x3 + .4byte .LASF4147 + .byte 0x5 + .byte 0x95,0x3 + .4byte .LASF4148 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_usart.h.10.6fecf26248bd6b94d5cfd7e6fbba5fa9,comdat +.Ldebug_macro63: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF4149 + .byte 0x5 + .byte 0x43 + .4byte .LASF4150 + .byte 0x5 + .byte 0x44 + .4byte .LASF4151 + .byte 0x5 + .byte 0x47 + .4byte .LASF4152 + .byte 0x5 + .byte 0x48 + .4byte .LASF4153 + .byte 0x5 + .byte 0x49 + .4byte .LASF4154 + .byte 0x5 + .byte 0x4a + .4byte .LASF4155 + .byte 0x5 + .byte 0x4d + .4byte .LASF4156 + .byte 0x5 + .byte 0x4e + .4byte .LASF4157 + .byte 0x5 + .byte 0x4f + .4byte .LASF4158 + .byte 0x5 + .byte 0x52 + .4byte .LASF4159 + .byte 0x5 + .byte 0x53 + .4byte .LASF4160 + .byte 0x5 + .byte 0x56 + .4byte .LASF4161 + .byte 0x5 + .byte 0x57 + .4byte .LASF4162 + .byte 0x5 + .byte 0x58 + .4byte .LASF4163 + .byte 0x5 + .byte 0x59 + .4byte .LASF4164 + .byte 0x5 + .byte 0x5c + .4byte .LASF4165 + .byte 0x5 + .byte 0x5d + .4byte .LASF4166 + .byte 0x5 + .byte 0x60 + .4byte .LASF4167 + .byte 0x5 + .byte 0x61 + .4byte .LASF4168 + .byte 0x5 + .byte 0x64 + .4byte .LASF4169 + .byte 0x5 + .byte 0x65 + .4byte .LASF4170 + .byte 0x5 + .byte 0x68 + .4byte .LASF4171 + .byte 0x5 + .byte 0x69 + .4byte .LASF4172 + .byte 0x5 + .byte 0x6c + .4byte .LASF4173 + .byte 0x5 + .byte 0x6d + .4byte .LASF4174 + .byte 0x5 + .byte 0x6e + .4byte .LASF4175 + .byte 0x5 + .byte 0x6f + .4byte .LASF4176 + .byte 0x5 + .byte 0x70 + .4byte .LASF4177 + .byte 0x5 + .byte 0x71 + .4byte .LASF4178 + .byte 0x5 + .byte 0x72 + .4byte .LASF4179 + .byte 0x5 + .byte 0x73 + .4byte .LASF4180 + .byte 0x5 + .byte 0x74 + .4byte .LASF4181 + .byte 0x5 + .byte 0x75 + .4byte .LASF4182 + .byte 0x5 + .byte 0x76 + .4byte .LASF4183 + .byte 0x5 + .byte 0x77 + .4byte .LASF4184 + .byte 0x5 + .byte 0x79 + .4byte .LASF4185 + .byte 0x5 + .byte 0x7c + .4byte .LASF4186 + .byte 0x5 + .byte 0x7d + .4byte .LASF4187 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF4188 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF4189 + .byte 0x5 + .byte 0x84,0x1 + .4byte .LASF4190 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF4191 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF4192 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF4193 + .byte 0x5 + .byte 0x8c,0x1 + .4byte .LASF4194 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF4195 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF4196 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF4197 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF4198 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF4199 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF4200 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF4201 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF4202 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF4203 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_wwdg.h.10.d5b5d650e1e4f0a6b6068507c13ba0b0,comdat +.Ldebug_macro64: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF4204 + .byte 0x5 + .byte 0x14 + .4byte .LASF4205 + .byte 0x5 + .byte 0x15 + .4byte .LASF4206 + .byte 0x5 + .byte 0x16 + .4byte .LASF4207 + .byte 0x5 + .byte 0x17 + .4byte .LASF4208 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_usb.h.10.19956e380e4dc786429f4d592491b5fe,comdat +.Ldebug_macro65: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF4209 + .byte 0x5 + .byte 0x15 + .4byte .LASF4210 + .byte 0x5 + .byte 0x18 + .4byte .LASF4211 + .byte 0x5 + .byte 0x68 + .4byte .LASF4212 + .byte 0x5 + .byte 0x69 + .4byte .LASF4213 + .byte 0x5 + .byte 0x6a + .4byte .LASF4214 + .byte 0x5 + .byte 0x6b + .4byte .LASF4215 + .byte 0x5 + .byte 0x6c + .4byte .LASF4216 + .byte 0x5 + .byte 0x6d + .4byte .LASF4217 + .byte 0x5 + .byte 0x6e + .4byte .LASF4218 + .byte 0x5 + .byte 0x6f + .4byte .LASF4219 + .byte 0x5 + .byte 0x78 + .4byte .LASF4220 + .byte 0x5 + .byte 0x79 + .4byte .LASF4221 + .byte 0x5 + .byte 0x7a + .4byte .LASF4222 + .byte 0x5 + .byte 0x7b + .4byte .LASF4223 + .byte 0x5 + .byte 0x7d + .4byte .LASF4224 + .byte 0x5 + .byte 0x7e + .4byte .LASF4225 + .byte 0x5 + .byte 0x7f + .4byte .LASF4226 + .byte 0x5 + .byte 0x80,0x1 + .4byte .LASF4227 + .byte 0x5 + .byte 0x81,0x1 + .4byte .LASF4228 + .byte 0x5 + .byte 0x82,0x1 + .4byte .LASF4229 + .byte 0x5 + .byte 0x83,0x1 + .4byte .LASF4230 + .byte 0x5 + .byte 0x85,0x1 + .4byte .LASF4231 + .byte 0x5 + .byte 0x86,0x1 + .4byte .LASF4232 + .byte 0x5 + .byte 0x87,0x1 + .4byte .LASF4233 + .byte 0x5 + .byte 0x88,0x1 + .4byte .LASF4234 + .byte 0x5 + .byte 0x89,0x1 + .4byte .LASF4235 + .byte 0x5 + .byte 0x8a,0x1 + .4byte .LASF4236 + .byte 0x5 + .byte 0x8b,0x1 + .4byte .LASF4237 + .byte 0x5 + .byte 0x8d,0x1 + .4byte .LASF4238 + .byte 0x5 + .byte 0x8e,0x1 + .4byte .LASF4239 + .byte 0x5 + .byte 0x8f,0x1 + .4byte .LASF4240 + .byte 0x5 + .byte 0x90,0x1 + .4byte .LASF4241 + .byte 0x5 + .byte 0x91,0x1 + .4byte .LASF4242 + .byte 0x5 + .byte 0x92,0x1 + .4byte .LASF4243 + .byte 0x5 + .byte 0x93,0x1 + .4byte .LASF4244 + .byte 0x5 + .byte 0x94,0x1 + .4byte .LASF4245 + .byte 0x5 + .byte 0x95,0x1 + .4byte .LASF4246 + .byte 0x5 + .byte 0x97,0x1 + .4byte .LASF4247 + .byte 0x5 + .byte 0x98,0x1 + .4byte .LASF4248 + .byte 0x5 + .byte 0x99,0x1 + .4byte .LASF4249 + .byte 0x5 + .byte 0x9b,0x1 + .4byte .LASF4250 + .byte 0x5 + .byte 0x9c,0x1 + .4byte .LASF4251 + .byte 0x5 + .byte 0x9d,0x1 + .4byte .LASF4252 + .byte 0x5 + .byte 0x9e,0x1 + .4byte .LASF4253 + .byte 0x5 + .byte 0x9f,0x1 + .4byte .LASF4254 + .byte 0x5 + .byte 0xa0,0x1 + .4byte .LASF4255 + .byte 0x5 + .byte 0xa1,0x1 + .4byte .LASF4256 + .byte 0x5 + .byte 0xa2,0x1 + .4byte .LASF4257 + .byte 0x5 + .byte 0xa3,0x1 + .4byte .LASF4258 + .byte 0x5 + .byte 0xa4,0x1 + .4byte .LASF4259 + .byte 0x5 + .byte 0xa6,0x1 + .4byte .LASF4260 + .byte 0x5 + .byte 0xa7,0x1 + .4byte .LASF4261 + .byte 0x5 + .byte 0xa8,0x1 + .4byte .LASF4262 + .byte 0x5 + .byte 0xa9,0x1 + .4byte .LASF4263 + .byte 0x5 + .byte 0xaa,0x1 + .4byte .LASF4264 + .byte 0x5 + .byte 0xab,0x1 + .4byte .LASF4265 + .byte 0x5 + .byte 0xac,0x1 + .4byte .LASF4266 + .byte 0x5 + .byte 0xad,0x1 + .4byte .LASF4267 + .byte 0x5 + .byte 0xae,0x1 + .4byte .LASF4268 + .byte 0x5 + .byte 0xaf,0x1 + .4byte .LASF4269 + .byte 0x5 + .byte 0xb1,0x1 + .4byte .LASF4270 + .byte 0x5 + .byte 0xb2,0x1 + .4byte .LASF4271 + .byte 0x5 + .byte 0xb3,0x1 + .4byte .LASF4272 + .byte 0x5 + .byte 0xb4,0x1 + .4byte .LASF4273 + .byte 0x5 + .byte 0xb5,0x1 + .4byte .LASF4274 + .byte 0x5 + .byte 0xb6,0x1 + .4byte .LASF4275 + .byte 0x5 + .byte 0xb7,0x1 + .4byte .LASF4276 + .byte 0x5 + .byte 0xb8,0x1 + .4byte .LASF4277 + .byte 0x5 + .byte 0xb9,0x1 + .4byte .LASF4278 + .byte 0x5 + .byte 0xba,0x1 + .4byte .LASF4279 + .byte 0x5 + .byte 0xc0,0x1 + .4byte .LASF4280 + .byte 0x5 + .byte 0xc1,0x1 + .4byte .LASF4281 + .byte 0x5 + .byte 0xc3,0x1 + .4byte .LASF4282 + .byte 0x5 + .byte 0xc4,0x1 + .4byte .LASF4283 + .byte 0x5 + .byte 0xc5,0x1 + .4byte .LASF4284 + .byte 0x5 + .byte 0xc6,0x1 + .4byte .LASF4285 + .byte 0x5 + .byte 0xc7,0x1 + .4byte .LASF4286 + .byte 0x5 + .byte 0xc8,0x1 + .4byte .LASF4287 + .byte 0x5 + .byte 0xd1,0x1 + .4byte .LASF4288 + .byte 0x5 + .byte 0xd2,0x1 + .4byte .LASF4289 + .byte 0x5 + .byte 0xda,0x1 + .4byte .LASF4290 + .byte 0x5 + .byte 0xdb,0x1 + .4byte .LASF4291 + .byte 0x5 + .byte 0xdc,0x1 + .4byte .LASF4292 + .byte 0x5 + .byte 0xdd,0x1 + .4byte .LASF4293 + .byte 0x5 + .byte 0xde,0x1 + .4byte .LASF4294 + .byte 0x5 + .byte 0xdf,0x1 + .4byte .LASF4295 + .byte 0x5 + .byte 0xe0,0x1 + .4byte .LASF4296 + .byte 0x5 + .byte 0xe2,0x1 + .4byte .LASF4297 + .byte 0x5 + .byte 0xe3,0x1 + .4byte .LASF4298 + .byte 0x5 + .byte 0xe4,0x1 + .4byte .LASF4299 + .byte 0x5 + .byte 0xe9,0x1 + .4byte .LASF4300 + .byte 0x5 + .byte 0xea,0x1 + .4byte .LASF4301 + .byte 0x5 + .byte 0xf0,0x1 + .4byte .LASF4302 + .byte 0x5 + .byte 0xf1,0x1 + .4byte .LASF4303 + .byte 0x5 + .byte 0xf2,0x1 + .4byte .LASF4304 + .byte 0x5 + .byte 0xf3,0x1 + .4byte .LASF4305 + .byte 0x5 + .byte 0xf4,0x1 + .4byte .LASF4306 + .byte 0x5 + .byte 0xf5,0x1 + .4byte .LASF4307 + .byte 0x5 + .byte 0xf6,0x1 + .4byte .LASF4308 + .byte 0x5 + .byte 0xf8,0x1 + .4byte .LASF4309 + .byte 0x5 + .byte 0xf9,0x1 + .4byte .LASF4310 + .byte 0x5 + .byte 0xfa,0x1 + .4byte .LASF4311 + .byte 0x5 + .byte 0xfb,0x1 + .4byte .LASF4312 + .byte 0x5 + .byte 0xfe,0x1 + .4byte .LASF4313 + .byte 0x5 + .byte 0xff,0x1 + .4byte .LASF4314 + .byte 0x5 + .byte 0x80,0x2 + .4byte .LASF4315 + .byte 0x5 + .byte 0x81,0x2 + .4byte .LASF4316 + .byte 0x5 + .byte 0x82,0x2 + .4byte .LASF4317 + .byte 0x5 + .byte 0x84,0x2 + .4byte .LASF4318 + .byte 0x5 + .byte 0x85,0x2 + .4byte .LASF4319 + .byte 0x5 + .byte 0x86,0x2 + .4byte .LASF4320 + .byte 0x5 + .byte 0x87,0x2 + .4byte .LASF4321 + .byte 0x5 + .byte 0x89,0x2 + .4byte .LASF4322 + .byte 0x5 + .byte 0x8a,0x2 + .4byte .LASF4323 + .byte 0x5 + .byte 0x8b,0x2 + .4byte .LASF4324 + .byte 0x5 + .byte 0x8c,0x2 + .4byte .LASF4325 + .byte 0x5 + .byte 0x8d,0x2 + .4byte .LASF4326 + .byte 0x5 + .byte 0x8e,0x2 + .4byte .LASF4327 + .byte 0x5 + .byte 0x8f,0x2 + .4byte .LASF4328 + .byte 0x5 + .byte 0x90,0x2 + .4byte .LASF4329 + .byte 0x5 + .byte 0x91,0x2 + .4byte .LASF4330 + .byte 0x5 + .byte 0x92,0x2 + .4byte .LASF4331 + .byte 0x5 + .byte 0x93,0x2 + .4byte .LASF4332 + .byte 0x5 + .byte 0x94,0x2 + .4byte .LASF4333 + .byte 0x5 + .byte 0x95,0x2 + .4byte .LASF4334 + .byte 0x5 + .byte 0x96,0x2 + .4byte .LASF4335 + .byte 0x5 + .byte 0x97,0x2 + .4byte .LASF4336 + .byte 0x5 + .byte 0x98,0x2 + .4byte .LASF4337 + .byte 0x5 + .byte 0x99,0x2 + .4byte .LASF4338 + .byte 0x5 + .byte 0x9f,0x2 + .4byte .LASF4339 + .byte 0x5 + .byte 0xa0,0x2 + .4byte .LASF4340 + .byte 0x5 + .byte 0xa1,0x2 + .4byte .LASF4341 + .byte 0x5 + .byte 0xa2,0x2 + .4byte .LASF4342 + .byte 0x5 + .byte 0xa3,0x2 + .4byte .LASF4343 + .byte 0x5 + .byte 0xa4,0x2 + .4byte .LASF4344 + .byte 0x5 + .byte 0xa5,0x2 + .4byte .LASF4345 + .byte 0x5 + .byte 0xac,0x2 + .4byte .LASF4346 + .byte 0x5 + .byte 0xad,0x2 + .4byte .LASF4347 + .byte 0x5 + .byte 0xae,0x2 + .4byte .LASF4348 + .byte 0x5 + .byte 0xb0,0x2 + .4byte .LASF4349 + .byte 0x5 + .byte 0xb1,0x2 + .4byte .LASF4350 + .byte 0x5 + .byte 0xb2,0x2 + .4byte .LASF4351 + .byte 0x5 + .byte 0xb4,0x2 + .4byte .LASF4352 + .byte 0x5 + .byte 0xb5,0x2 + .4byte .LASF4353 + .byte 0x5 + .byte 0xb6,0x2 + .4byte .LASF4354 + .byte 0x5 + .byte 0xb8,0x2 + .4byte .LASF4355 + .byte 0x5 + .byte 0xb9,0x2 + .4byte .LASF4356 + .byte 0x5 + .byte 0xba,0x2 + .4byte .LASF4357 + .byte 0x5 + .byte 0xbb,0x2 + .4byte .LASF4358 + .byte 0x5 + .byte 0xbd,0x2 + .4byte .LASF4359 + .byte 0x5 + .byte 0xbe,0x2 + .4byte .LASF4360 + .byte 0x5 + .byte 0xbf,0x2 + .4byte .LASF4361 + .byte 0x5 + .byte 0xc0,0x2 + .4byte .LASF4362 + .byte 0x5 + .byte 0xc2,0x2 + .4byte .LASF4363 + .byte 0x5 + .byte 0xc3,0x2 + .4byte .LASF4364 + .byte 0x5 + .byte 0xc4,0x2 + .4byte .LASF4365 + .byte 0x5 + .byte 0xc5,0x2 + .4byte .LASF4366 + .byte 0x5 + .byte 0xc7,0x2 + .4byte .LASF4367 + .byte 0x5 + .byte 0xc8,0x2 + .4byte .LASF4368 + .byte 0x5 + .byte 0xc9,0x2 + .4byte .LASF4369 + .byte 0x5 + .byte 0xcb,0x2 + .4byte .LASF4370 + .byte 0x5 + .byte 0xcc,0x2 + .4byte .LASF4371 + .byte 0x5 + .byte 0xcd,0x2 + .4byte .LASF4372 + .byte 0x5 + .byte 0xcf,0x2 + .4byte .LASF4373 + .byte 0x5 + .byte 0xd0,0x2 + .4byte .LASF4374 + .byte 0x5 + .byte 0xd1,0x2 + .4byte .LASF4375 + .byte 0x5 + .byte 0xd3,0x2 + .4byte .LASF4376 + .byte 0x5 + .byte 0xd4,0x2 + .4byte .LASF4377 + .byte 0x5 + .byte 0xd5,0x2 + .4byte .LASF4378 + .byte 0x5 + .byte 0xe0,0x2 + .4byte .LASF4379 + .byte 0x5 + .byte 0xea,0x2 + .4byte .LASF4380 + .byte 0x5 + .byte 0xeb,0x2 + .4byte .LASF4381 + .byte 0x5 + .byte 0xec,0x2 + .4byte .LASF4382 + .byte 0x5 + .byte 0xed,0x2 + .4byte .LASF4383 + .byte 0x5 + .byte 0xee,0x2 + .4byte .LASF4384 + .byte 0x5 + .byte 0xef,0x2 + .4byte .LASF4385 + .byte 0x5 + .byte 0xf0,0x2 + .4byte .LASF4386 + .byte 0x5 + .byte 0xf1,0x2 + .4byte .LASF4387 + .byte 0x5 + .byte 0xf2,0x2 + .4byte .LASF4388 + .byte 0x5 + .byte 0xf3,0x2 + .4byte .LASF4389 + .byte 0x5 + .byte 0xf4,0x2 + .4byte .LASF4390 + .byte 0x5 + .byte 0xf9,0x2 + .4byte .LASF4391 + .byte 0x5 + .byte 0xfa,0x2 + .4byte .LASF4392 + .byte 0x5 + .byte 0xfb,0x2 + .4byte .LASF4393 + .byte 0x5 + .byte 0xfc,0x2 + .4byte .LASF4394 + .byte 0x5 + .byte 0xfd,0x2 + .4byte .LASF4395 + .byte 0x5 + .byte 0xfe,0x2 + .4byte .LASF4396 + .byte 0x5 + .byte 0xff,0x2 + .4byte .LASF4397 + .byte 0x5 + .byte 0x80,0x3 + .4byte .LASF4398 + .byte 0x5 + .byte 0x81,0x3 + .4byte .LASF4399 + .byte 0x5 + .byte 0x82,0x3 + .4byte .LASF4400 + .byte 0x5 + .byte 0x83,0x3 + .4byte .LASF4401 + .byte 0x5 + .byte 0x88,0x3 + .4byte .LASF4402 + .byte 0x5 + .byte 0x89,0x3 + .4byte .LASF4403 + .byte 0x5 + .byte 0x8a,0x3 + .4byte .LASF4404 + .byte 0x5 + .byte 0x8b,0x3 + .4byte .LASF4405 + .byte 0x5 + .byte 0x8c,0x3 + .4byte .LASF4406 + .byte 0x5 + .byte 0x8d,0x3 + .4byte .LASF4407 + .byte 0x5 + .byte 0x92,0x3 + .4byte .LASF4408 + .byte 0x5 + .byte 0x93,0x3 + .4byte .LASF4409 + .byte 0x5 + .byte 0x94,0x3 + .4byte .LASF4410 + .byte 0x5 + .byte 0x95,0x3 + .4byte .LASF4411 + .byte 0x5 + .byte 0x96,0x3 + .4byte .LASF4412 + .byte 0x5 + .byte 0x97,0x3 + .4byte .LASF4413 + .byte 0x5 + .byte 0x9c,0x3 + .4byte .LASF4414 + .byte 0x5 + .byte 0x9d,0x3 + .4byte .LASF4415 + .byte 0x5 + .byte 0x9e,0x3 + .4byte .LASF4416 + .byte 0x5 + .byte 0x9f,0x3 + .4byte .LASF4417 + .byte 0x5 + .byte 0xa0,0x3 + .4byte .LASF4418 + .byte 0x5 + .byte 0xa1,0x3 + .4byte .LASF4419 + .byte 0x5 + .byte 0xa2,0x3 + .4byte .LASF4420 + .byte 0x5 + .byte 0xa3,0x3 + .4byte .LASF4421 + .byte 0x5 + .byte 0xa4,0x3 + .4byte .LASF4422 + .byte 0x5 + .byte 0xa5,0x3 + .4byte .LASF4423 + .byte 0x5 + .byte 0xa6,0x3 + .4byte .LASF4424 + .byte 0x5 + .byte 0xa7,0x3 + .4byte .LASF4425 + .byte 0x5 + .byte 0xa8,0x3 + .4byte .LASF4426 + .byte 0x5 + .byte 0xa9,0x3 + .4byte .LASF4427 + .byte 0x5 + .byte 0xae,0x3 + .4byte .LASF4428 + .byte 0x5 + .byte 0xaf,0x3 + .4byte .LASF4429 + .byte 0x5 + .byte 0xb0,0x3 + .4byte .LASF4430 + .byte 0x5 + .byte 0xb1,0x3 + .4byte .LASF4431 + .byte 0x5 + .byte 0xb2,0x3 + .4byte .LASF4432 + .byte 0x5 + .byte 0xb3,0x3 + .4byte .LASF4433 + .byte 0x5 + .byte 0xb4,0x3 + .4byte .LASF4434 + .byte 0x5 + .byte 0xb5,0x3 + .4byte .LASF4435 + .byte 0x5 + .byte 0xb6,0x3 + .4byte .LASF4436 + .byte 0x5 + .byte 0xbb,0x3 + .4byte .LASF4437 + .byte 0x5 + .byte 0xbc,0x3 + .4byte .LASF4438 + .byte 0x5 + .byte 0xbd,0x3 + .4byte .LASF4439 + .byte 0x5 + .byte 0xbe,0x3 + .4byte .LASF4440 + .byte 0x5 + .byte 0xbf,0x3 + .4byte .LASF4441 + .byte 0x5 + .byte 0xc0,0x3 + .4byte .LASF4442 + .byte 0x5 + .byte 0xc1,0x3 + .4byte .LASF4443 + .byte 0x5 + .byte 0xc2,0x3 + .4byte .LASF4444 + .byte 0x5 + .byte 0xc3,0x3 + .4byte .LASF4445 + .byte 0x5 + .byte 0xc4,0x3 + .4byte .LASF4446 + .byte 0x5 + .byte 0xc5,0x3 + .4byte .LASF4447 + .byte 0x5 + .byte 0xc6,0x3 + .4byte .LASF4448 + .byte 0x5 + .byte 0xc7,0x3 + .4byte .LASF4449 + .byte 0x5 + .byte 0xc8,0x3 + .4byte .LASF4450 + .byte 0x5 + .byte 0xcd,0x3 + .4byte .LASF4451 + .byte 0x5 + .byte 0xce,0x3 + .4byte .LASF4452 + .byte 0x5 + .byte 0xcf,0x3 + .4byte .LASF4453 + .byte 0x5 + .byte 0xd0,0x3 + .4byte .LASF4454 + .byte 0x5 + .byte 0xd1,0x3 + .4byte .LASF4455 + .byte 0x5 + .byte 0xd2,0x3 + .4byte .LASF4456 + .byte 0x5 + .byte 0xd3,0x3 + .4byte .LASF4457 + .byte 0x5 + .byte 0xd4,0x3 + .4byte .LASF4458 + .byte 0x5 + .byte 0xd5,0x3 + .4byte .LASF4459 + .byte 0x5 + .byte 0xd6,0x3 + .4byte .LASF4460 + .byte 0x5 + .byte 0xd7,0x3 + .4byte .LASF4461 + .byte 0x5 + .byte 0xd8,0x3 + .4byte .LASF4462 + .byte 0x5 + .byte 0xd9,0x3 + .4byte .LASF4463 + .byte 0x5 + .byte 0xda,0x3 + .4byte .LASF4464 + .byte 0x5 + .byte 0xdf,0x3 + .4byte .LASF4465 + .byte 0x5 + .byte 0xe0,0x3 + .4byte .LASF4466 + .byte 0x5 + .byte 0xe1,0x3 + .4byte .LASF4467 + .byte 0x5 + .byte 0xe2,0x3 + .4byte .LASF4468 + .byte 0x5 + .byte 0xe3,0x3 + .4byte .LASF4469 + .byte 0x5 + .byte 0xe4,0x3 + .4byte .LASF4470 + .byte 0x5 + .byte 0xe5,0x3 + .4byte .LASF4471 + .byte 0x5 + .byte 0xe6,0x3 + .4byte .LASF4472 + .byte 0x5 + .byte 0xe7,0x3 + .4byte .LASF4473 + .byte 0x5 + .byte 0xe8,0x3 + .4byte .LASF4474 + .byte 0x5 + .byte 0xe9,0x3 + .4byte .LASF4475 + .byte 0x5 + .byte 0xee,0x3 + .4byte .LASF4476 + .byte 0x5 + .byte 0xef,0x3 + .4byte .LASF4477 + .byte 0x5 + .byte 0xf0,0x3 + .4byte .LASF4478 + .byte 0x5 + .byte 0xf1,0x3 + .4byte .LASF4479 + .byte 0x5 + .byte 0xf2,0x3 + .4byte .LASF4480 + .byte 0x5 + .byte 0xf3,0x3 + .4byte .LASF4481 + .byte 0x5 + .byte 0xf4,0x3 + .4byte .LASF4482 + .byte 0x5 + .byte 0xf8,0x3 + .4byte .LASF4483 + .byte 0x5 + .byte 0xfb,0x3 + .4byte .LASF4484 + .byte 0x5 + .byte 0xfe,0x3 + .4byte .LASF4485 + .byte 0x5 + .byte 0x81,0x4 + .4byte .LASF4486 + .byte 0x5 + .byte 0x82,0x4 + .4byte .LASF4487 + .byte 0x5 + .byte 0x85,0x4 + .4byte .LASF4488 + .byte 0x5 + .byte 0x86,0x4 + .4byte .LASF4489 + .byte 0x5 + .byte 0x87,0x4 + .4byte .LASF4490 + .byte 0x5 + .byte 0x88,0x4 + .4byte .LASF4491 + .byte 0x5 + .byte 0x89,0x4 + .4byte .LASF4492 + .byte 0x5 + .byte 0x8a,0x4 + .4byte .LASF4493 + .byte 0x5 + .byte 0x8b,0x4 + .4byte .LASF4494 + .byte 0x5 + .byte 0x8c,0x4 + .4byte .LASF4495 + .byte 0x5 + .byte 0x90,0x4 + .4byte .LASF4496 + .byte 0x5 + .byte 0x8d,0x5 + .4byte .LASF4497 + .byte 0x5 + .byte 0x8e,0x5 + .4byte .LASF4498 + .byte 0x5 + .byte 0x8f,0x5 + .4byte .LASF4499 + .byte 0x5 + .byte 0x90,0x5 + .4byte .LASF4500 + .byte 0x5 + .byte 0x91,0x5 + .4byte .LASF4501 + .byte 0x5 + .byte 0x92,0x5 + .4byte .LASF4502 + .byte 0x5 + .byte 0x93,0x5 + .4byte .LASF4503 + .byte 0x5 + .byte 0x94,0x5 + .4byte .LASF4504 + .byte 0x5 + .byte 0x95,0x5 + .4byte .LASF4505 + .byte 0x5 + .byte 0x96,0x5 + .4byte .LASF4506 + .byte 0x5 + .byte 0x97,0x5 + .4byte .LASF4507 + .byte 0x5 + .byte 0x98,0x5 + .4byte .LASF4508 + .byte 0x5 + .byte 0x99,0x5 + .4byte .LASF4509 + .byte 0x5 + .byte 0x9a,0x5 + .4byte .LASF4510 + .byte 0x5 + .byte 0x9b,0x5 + .4byte .LASF4511 + .byte 0x5 + .byte 0x9c,0x5 + .4byte .LASF4512 + .byte 0x5 + .byte 0xb3,0x5 + .4byte .LASF4513 + .byte 0x5 + .byte 0xb4,0x5 + .4byte .LASF4514 + .byte 0x5 + .byte 0xb5,0x5 + .4byte .LASF4515 + .byte 0x5 + .byte 0xb6,0x5 + .4byte .LASF4516 + .byte 0x5 + .byte 0xb7,0x5 + .4byte .LASF4517 + .byte 0x5 + .byte 0xb8,0x5 + .4byte .LASF4518 + .byte 0x5 + .byte 0xb9,0x5 + .4byte .LASF4519 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_usb_host.h.18.152d454dfbf9a10d59a1400b13dc245a,comdat +.Ldebug_macro66: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x12 + .4byte .LASF4521 + .byte 0x5 + .byte 0x13 + .4byte .LASF4522 + .byte 0x5 + .byte 0x14 + .4byte .LASF4523 + .byte 0x5 + .byte 0x15 + .4byte .LASF4524 + .byte 0x5 + .byte 0x16 + .4byte .LASF4525 + .byte 0x5 + .byte 0x17 + .4byte .LASF4526 + .byte 0x5 + .byte 0x18 + .4byte .LASF4527 + .byte 0x5 + .byte 0x19 + .4byte .LASF4528 + .byte 0x5 + .byte 0x1a + .4byte .LASF4529 + .byte 0x5 + .byte 0x1c + .4byte .LASF4530 + .byte 0x5 + .byte 0x1d + .4byte .LASF4531 + .byte 0x5 + .byte 0x1e + .4byte .LASF4532 + .byte 0x5 + .byte 0x1f + .4byte .LASF4533 + .byte 0x5 + .byte 0x20 + .4byte .LASF4534 + .byte 0x5 + .byte 0x21 + .4byte .LASF4535 + .byte 0x5 + .byte 0x22 + .4byte .LASF4536 + .byte 0x5 + .byte 0x23 + .4byte .LASF4537 + .byte 0x5 + .byte 0x25 + .4byte .LASF4538 + .byte 0x5 + .byte 0x26 + .4byte .LASF4539 + .byte 0x5 + .byte 0x3b + .4byte .LASF4540 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_it.h.9.3809d2677889c3a62e70b7c1c5fa015c,comdat +.Ldebug_macro67: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0x9 + .4byte .LASF4541 + .byte 0x5 + .byte 0xd + .4byte .LASF4542 + .byte 0x5 + .byte 0xe + .4byte .LASF4543 + .byte 0 + .section .debug_macro,"G",@progbits,wm4.ch32v10x_misc.h.10.a85c1f95d6e7504d418a6039677b4e05,comdat +.Ldebug_macro68: + .2byte 0x4 + .byte 0 + .byte 0x5 + .byte 0xa + .4byte .LASF4544 + .byte 0x5 + .byte 0x1d + .4byte .LASF4545 + .byte 0x5 + .byte 0x1e + .4byte .LASF4546 + .byte 0x5 + .byte 0x1f + .4byte .LASF4547 + .byte 0x5 + .byte 0x20 + .4byte .LASF4548 + .byte 0x5 + .byte 0x21 + .4byte .LASF4549 + .byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF2361: + .string "AFIO_ECR_PIN_PX0 ((uint8_t)0x00)" +.LASF3668: + .string "I2C_IT_STOPF ((uint32_t)0x02000010)" +.LASF4090: + .string "TIM_EventSource_CC1 ((uint16_t)0x0002)" +.LASF1042: + .string "_FWRITE 0x0002" +.LASF2207: + .string "GPIO_CFGLR_CNF7_0 ((uint32_t)0x40000000)" +.LASF4112: + .string "TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)" +.LASF611: + .string "___int16_t_defined 1" +.LASF4557: + .string "long long int" +.LASF1773: + .string "DAC_DHR12R2 ((uint16_t)0x0FFF)" +.LASF1280: + .string "HSI_Value HSI_VALUE" +.LASF52: + .string "__INT_LEAST32_TYPE__ long int" +.LASF4236: + .string "RB_UH_BUS_RESET 0x02" +.LASF1467: + .string "ADC_TSVREFE ((uint32_t)0x00800000)" +.LASF3671: + .string "I2C_IT_ADDR ((uint32_t)0x02000002)" +.LASF4145: + .string "TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers" +.LASF3473: + .string "DMA2_FLAG_TC4 ((uint32_t)0x10002000)" +.LASF4500: + .string "pEP1_IN_DataBuf (pEP1_RAM_Addr+64)" +.LASF627: + .string "_BSD_PTRDIFF_T_ " +.LASF3779: + .string "RCC_IT_LSERDY ((uint8_t)0x02)" +.LASF3750: + .string "RCC_PLLMul_6 ((uint32_t)0x00100000)" +.LASF1139: + .string "rt_spin_lock(lock) rt_enter_critical()" +.LASF401: + .string "RT_MQ_ENTRY_MAX RT_UINT16_MAX" +.LASF2437: + .string "AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F)" +.LASF4210: + .string "VOID void" +.LASF2686: + .string "RCC_HPRE_0 ((uint32_t)0x00000010)" +.LASF4343: + .string "UEP_T_RES_TOUT 0x01" +.LASF600: + .string "_ATTRIBUTE(attrs) __attribute__ (attrs)" +.LASF3457: + .string "DMA1_FLAG_TC7 ((uint32_t)0x02000000)" +.LASF3887: + .string "SPI_CPOL_High ((uint16_t)0x0002)" +.LASF3258: + .string "ADC_Channel_15 ((uint8_t)0x0F)" +.LASF2553: + .string "AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200)" +.LASF2926: + .string "TIM_CCPC ((uint16_t)0x0001)" +.LASF337: + .string "RT_USING_SMALL_MEM " +.LASF979: + .string "__need_inttypes" +.LASF2584: + .string "I2C_CTLR1_PEC ((uint16_t)0x1000)" +.LASF4180: + .string "USART_IT_CTS ((uint16_t)0x096A)" +.LASF2453: + .string "AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050)" +.LASF654: + .string "_T_WCHAR " +.LASF3949: + .string "SPI_FLAG_MODF ((uint16_t)0x0020)" +.LASF873: + .string "_REENT _impure_ptr" +.LASF4808: + .string "IRQn" +.LASF3079: + .string "TIM_CC4E ((uint16_t)0x1000)" +.LASF4125: + .string "TIM_FLAG_Trigger ((uint16_t)0x0040)" +.LASF153: + .string "__FLT_MAX_10_EXP__ 38" +.LASF320: + .string "RT_THREAD_PRIORITY_32 " +.LASF4296: + .string "RB_UEP2_BUF_MOD 0x01" +.LASF2321: + .string "GPIO_BSHR_BR14 ((uint32_t)0x40000000)" +.LASF1386: + .string "ADC1 ((ADC_TypeDef *) ADC1_BASE)" +.LASF1718: + .string "BKP_DATAR39_D ((uint16_t)0xFFFF)" +.LASF1820: + .string "DMA_CGIF3 ((uint32_t)0x00000100)" +.LASF3663: + .string "I2C_IT_AF ((uint32_t)0x01000400)" +.LASF3593: + .string "GPIO_Remap_TIM4 ((uint32_t)0x00001000)" +.LASF2802: + .string "RCC_SRAMEN ((uint16_t)0x0004)" +.LASF3395: + .string "DMA1_IT_TE3 ((uint32_t)0x00000800)" +.LASF4459: + .string "USB_DESCR_TYP_HID 0x21" +.LASF2798: + .string "RCC_USART3RST ((uint32_t)0x00040000)" +.LASF4341: + .string "MASK_UEP_T_RES 0x03" +.LASF883: + .string "_SYS_TYPES_H " +.LASF3987: + .string "TIM_BreakPolarity_Low ((uint16_t)0x0000)" +.LASF2054: + .string "EXTI_FTENR_TR7 ((uint32_t)0x00000080)" +.LASF2864: + .string "SPI_CTLR1_MSTR ((uint16_t)0x0004)" +.LASF710: + .string "__CC_SUPPORTS_VARADIC_XXX 1" +.LASF650: + .string "__wchar_t__ " +.LASF2273: + .string "GPIO_INDR_IDR14 ((uint16_t)0x4000)" +.LASF2495: + .string "AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000)" +.LASF1664: + .string "ADC_JSQ3_4 ((uint32_t)0x00004000)" +.LASF2059: + .string "EXTI_FTENR_TR12 ((uint32_t)0x00001000)" +.LASF4031: + .string "TIM_DMABase_PSC ((uint16_t)0x000A)" +.LASF3404: + .string "DMA1_IT_GL6 ((uint32_t)0x00100000)" +.LASF2747: + .string "RCC_PLLMULL14 ((uint32_t)0x00300000)" +.LASF3579: + .string "GPIO_Pin_All ((uint16_t)0xFFFF)" +.LASF3334: + .string "BKP_DR30 ((uint16_t)0x008C)" +.LASF2353: + .string "GPIO_LCK14 ((uint32_t)0x00004000)" +.LASF701: + .string "__compiler_membar() __asm __volatile(\" \" : : : \"memory\")" +.LASF3578: + .string "GPIO_Pin_15 ((uint16_t)0x8000)" +.LASF2617: + .string "I2C_STAR1_BTF ((uint16_t)0x0004)" +.LASF1044: + .string "_FMARK 0x0010" +.LASF2687: + .string "RCC_HPRE_1 ((uint32_t)0x00000020)" +.LASF2934: + .string "TIM_OIS1 ((uint16_t)0x0100)" +.LASF3244: + .string "ADC_Channel_1 ((uint8_t)0x01)" +.LASF1255: + .string "WCHAR_MAX (__WCHAR_MAX__)" +.LASF4600: + .string "_fns" +.LASF2822: + .string "RCC_PWREN ((uint32_t)0x10000000)" +.LASF1018: + .string "S_IXUSR 0000100" +.LASF4029: + .string "TIM_DMABase_CCER ((uint16_t)0x0008)" +.LASF1763: + .string "DAC_MAMP2_0 ((uint32_t)0x01000000)" +.LASF404: + .string "__need___va_list" +.LASF387: + .string "RT_VERSION 4L" +.LASF3099: + .string "TIM_LOCK ((uint16_t)0x0300)" +.LASF4810: + .string "rt_hw_stack_init" +.LASF2949: + .string "TIM_MSM ((uint16_t)0x0080)" +.LASF4072: + .string "TIM_TS_ITR3 ((uint16_t)0x0030)" +.LASF2439: + .string "AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00)" +.LASF1150: + .string "HWREG32(x) (*((volatile rt_uint32_t *)(x)))" +.LASF4052: + .string "TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)" +.LASF4257: + .string "RB_UMS_SUSPEND 0x04" +.LASF1665: + .string "ADC_JSQ4 ((uint32_t)0x000F8000)" +.LASF240: + .string "__FLT32X_MAX__ 1.79769313486231570814527423731704357e+308F32x" +.LASF699: + .string "__GNUCLIKE_BUILTIN_VAALIST 1" +.LASF1524: + .string "ADC_SMP6 ((uint32_t)0x001C0000)" +.LASF4078: + .string "TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)" +.LASF2346: + .string "GPIO_LCK7 ((uint32_t)0x00000080)" +.LASF2034: + .string "EXTI_RTENR_TR7 ((uint32_t)0x00000080)" +.LASF4663: + .string "_getdate_err" +.LASF3303: + .string "BKP_RTCOutputSource_Alarm ((uint16_t)0x0100)" +.LASF1156: + .string "rt_hw_spin_lock(lock) *(lock) = rt_hw_interrupt_disable()" +.LASF3107: + .string "TIM_MOE ((uint16_t)0x8000)" +.LASF4320: + .string "R16_UEP6_DMA (*((PUINT16V)(0x40023428)))" +.LASF59: + .string "__INT_FAST16_TYPE__ int" +.LASF1239: + .string "UINT_FAST16_MAX (__UINT_FAST16_MAX__)" +.LASF2514: + .string "AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020)" +.LASF4469: + .string "USB_DEV_CLASS_MONITOR 0x04" +.LASF558: + .string "_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1" +.LASF539: + .string "RTGRAPHIC_PIXEL_POSITION(x,y) ((x << 16) | y)" +.LASF3542: + .string "FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF)" +.LASF3495: + .string "EXTI_Line14 ((uint32_t)0x04000)" +.LASF4569: + .string "_ssize_t" +.LASF1236: + .string "UINT_FAST8_MAX (__UINT_FAST8_MAX__)" +.LASF463: + .string "RT_TIMER_CTRL_GET_STATE 0x4" +.LASF2091: + .string "EXTI_INTF_INTF4 ((uint32_t)0x00000010)" +.LASF1994: + .string "EXTI_INTENR_MR7 ((uint32_t)0x00000080)" +.LASF3648: + .string "I2C_Register_CKCFGR ((uint8_t)0x1C)" +.LASF183: + .string "__LDBL_DECIMAL_DIG__ 36" +.LASF1111: + .string "LOCK_SH 0x01" +.LASF1229: + .string "INT64_MAX (__INT64_MAX__)" +.LASF1046: + .string "_FASYNC 0x0040" +.LASF2986: + .string "TIM_CC4OF ((uint16_t)0x1000)" +.LASF32: + .string "__SIZEOF_POINTER__ 4" +.LASF3236: + .string "ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000)" +.LASF961: + .string "_TIMER_T_DECLARED " +.LASF691: + .string "__GNUCLIKE_MATH_BUILTIN_CONSTANTS " +.LASF258: + .string "__FLT64X_HAS_DENORM__ 1" +.LASF1066: + .string "O_NONBLOCK _FNONBLOCK" +.LASF3481: + .string "EXTI_Line0 ((uint32_t)0x00001)" +.LASF2090: + .string "EXTI_INTF_INTF3 ((uint32_t)0x00000008)" +.LASF1349: + .string "CRC_BASE (AHBPERIPH_BASE + 0x3000)" +.LASF4066: + .string "TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)" +.LASF1965: + .string "DMA_CFG7_MEM2MEM ((uint16_t)0x4000)" +.LASF4244: + .string "RB_UIE_TRANSFER 0x02" +.LASF407: + .string "va_end(v) __builtin_va_end(v)" +.LASF4634: + .string "_p5s" +.LASF3693: + .string "I2C_FLAG_SB ((uint32_t)0x10000001)" +.LASF3354: + .string "DBGMCU_TIM2_STOP ((uint32_t)0x00000020)" +.LASF353: + .string "FINSH_THREAD_PRIORITY 20" +.LASF3014: + .string "TIM_OC2CE ((uint16_t)0x8000)" +.LASF1181: + .string "short +1" +.LASF1122: + .string "rt_container_of(ptr,type,member) ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member)))" +.LASF3308: + .string "BKP_DR4 ((uint16_t)0x0010)" +.LASF734: + .string "__always_inline __inline__ __attribute__((__always_inline__))" +.LASF3611: + .string "GPIO_PortSourceGPIOF ((uint8_t)0x05)" +.LASF4736: + .string "CFGR" +.LASF266: + .string "__DEC32_EPSILON__ 1E-6DF" +.LASF1941: + .string "DMA_CFG6_MSIZE ((uint16_t)0x0C00)" +.LASF3772: + .string "RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)" +.LASF4136: + .string "TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers" +.LASF2241: + .string "GPIO_CFGHR_CNF10 ((uint32_t)0x00000C00)" +.LASF3066: + .string "TIM_IC4F_3 ((uint16_t)0x8000)" +.LASF1713: + .string "BKP_DATAR34_D ((uint16_t)0xFFFF)" +.LASF1656: + .string "ADC_JSQ2_2 ((uint32_t)0x00000080)" +.LASF3862: + .string "RCC_FLAG_SFTRST ((uint8_t)0x7C)" +.LASF4508: + .string "pEP5_IN_DataBuf (pEP5_RAM_Addr+64)" +.LASF1967: + .string "DMA_CNTR2_NDT ((uint16_t)0xFFFF)" +.LASF2115: + .string "FLASH_OBKEYR_OBKEYR ((uint32_t)0xFFFFFFFF)" +.LASF2270: + .string "GPIO_INDR_IDR11 ((uint16_t)0x0800)" +.LASF3534: + .string "FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000)" +.LASF1019: + .string "S_IRWXG (S_IRGRP | S_IWGRP | S_IXGRP)" +.LASF1541: + .string "ADC_JOFFSET2 ((uint16_t)0x0FFF)" +.LASF1057: + .string "O_ACCMODE (O_RDONLY|O_WRONLY|O_RDWR)" +.LASF1188: + .string "__INT16 \"h\"" +.LASF1244: + .string "INT_FAST64_MAX (__INT_FAST64_MAX__)" +.LASF4095: + .string "TIM_EventSource_Trigger ((uint16_t)0x0040)" +.LASF3739: + .string "__CH32V10x_RCC_H " +.LASF1998: + .string "EXTI_INTENR_MR11 ((uint32_t)0x00000800)" +.LASF4033: + .string "TIM_DMABase_RCR ((uint16_t)0x000C)" +.LASF703: + .string "__GNUCLIKE_MATH_BUILTIN_RELOPS " +.LASF1654: + .string "ADC_JSQ2_0 ((uint32_t)0x00000020)" +.LASF3283: + .string "ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)" +.LASF956: + .string "_MODE_T_DECLARED " +.LASF1822: + .string "DMA_CHTIF3 ((uint32_t)0x00000400)" +.LASF4554: + .string "rt_uint8_t" +.LASF1351: + .string "OB_BASE ((uint32_t)0x1FFFF800)" +.LASF563: + .string "_RETARGETABLE_LOCKING 1" +.LASF4729: + .string "EXTI15_10_IRQn" +.LASF1132: + .string "rt_slist_for_each(pos,head) for (pos = (head)->next; pos != RT_NULL; pos = pos->next)" +.LASF4582: + .string "_Bigint" +.LASF2123: + .string "FLASH_CTLR_OPTPG ((uint16_t)0x0010)" +.LASF954: + .string "_KEY_T_DECLARED " +.LASF2897: + .string "SPI_I2SCFGR_CHLEN ((uint16_t)0x0001)" +.LASF2228: + .string "GPIO_CFGHR_MODE14 ((uint32_t)0x03000000)" +.LASF4325: + .string "R8_UEP0_CTRL (*((PUINT8V)(0x40023432)))" +.LASF4514: + .string "EP2_GetINSta() (R8_UEP2_CTRL&UEP_T_RES_NAK)" +.LASF2142: + .string "FLASH_WPR_WRP ((uint32_t)0xFFFFFFFF)" +.LASF4386: + .string "USB_PID_NAK 0x0A" +.LASF3775: + .string "RCC_HCLK_Div4 ((uint32_t)0x00000500)" +.LASF4188: + .string "USART_WakeUp_IdleLine ((uint16_t)0x0000)" +.LASF3356: + .string "DBGMCU_TIM4_STOP ((uint32_t)0x00000080)" +.LASF4338: + .string "UEP_R_RES_STALL 0x0C" +.LASF3826: + .string "RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)" +.LASF2235: + .string "GPIO_CFGHR_CNF8 ((uint32_t)0x0000000C)" +.LASF4507: + .string "pEP5_OUT_DataBuf (pEP5_RAM_Addr)" +.LASF900: + .string "_UINTPTR_T_DECLARED " +.LASF2318: + .string "GPIO_BSHR_BR11 ((uint32_t)0x08000000)" +.LASF2743: + .string "RCC_PLLMULL10 ((uint32_t)0x00200000)" +.LASF4579: + .string "_maxwds" +.LASF4028: + .string "TIM_DMABase_CCMR2 ((uint16_t)0x0007)" +.LASF1201: + .string "__int_least32_t_defined 1" +.LASF1781: + .string "DAC_RD8BDHR_DACC2DHR ((uint16_t)0xFF00)" +.LASF2104: + .string "EXTI_INTF_INTF17 ((uint32_t)0x00020000)" +.LASF4807: + .string "E:\\\\DevBoard\\\\ARTT\\\\00_gitee_rtt\\\\rt-thread\\\\bsp\\\\ch32v103" +.LASF3446: + .string "DMA1_FLAG_HT4 ((uint32_t)0x00004000)" +.LASF2047: + .string "EXTI_FTENR_TR0 ((uint32_t)0x00000001)" +.LASF3948: + .string "SPI_FLAG_CRCERR ((uint16_t)0x0010)" +.LASF1305: + .string "UART4_BASE (APB1PERIPH_BASE + 0x4C00)" +.LASF1507: + .string "ADC_SMP1_2 ((uint32_t)0x00000020)" +.LASF2326: + .string "GPIO_BCR_BR3 ((uint16_t)0x0008)" +.LASF2449: + .string "AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010)" +.LASF1909: + .string "DMA_CFG4_PL_0 ((uint16_t)0x1000)" +.LASF2625: + .string "I2C_STAR1_OVR ((uint16_t)0x0800)" +.LASF3088: + .string "TIM_CCR3 ((uint16_t)0xFFFF)" +.LASF2192: + .string "GPIO_CFGLR_CNF2_0 ((uint32_t)0x00000400)" +.LASF4255: + .string "RB_UMS_R_FIFO_RDY 0x10" +.LASF51: + .string "__INT_LEAST16_TYPE__ short int" +.LASF678: + .string "__attribute_malloc__ " +.LASF4685: + .string "name" +.LASF2928: + .string "TIM_CCDS ((uint16_t)0x0008)" +.LASF1521: + .string "ADC_SMP5_0 ((uint32_t)0x00008000)" +.LASF1116: + .string "O_BINARY 0" +.LASF4474: + .string "USB_DEV_CLASS_HUB 0x09" +.LASF2740: + .string "RCC_PLLMULL7 ((uint32_t)0x00140000)" +.LASF1906: + .string "DMA_CFG4_MSIZE_0 ((uint16_t)0x0400)" +.LASF1796: + .string "DMA_GIF4 ((uint32_t)0x00001000)" +.LASF3703: + .string "I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000)" +.LASF3023: + .string "TIM_IC2PSC ((uint16_t)0x0C00)" +.LASF1534: + .string "ADC_SMP8_1 ((uint32_t)0x02000000)" +.LASF304: + .string "__riscv_atomic 1" +.LASF4551: + .string "short int" +.LASF2328: + .string "GPIO_BCR_BR5 ((uint16_t)0x0020)" +.LASF3848: + .string "RCC_APB1Periph_DAC ((uint32_t)0x20000000)" +.LASF4432: + .string "HUB_GET_HUB_STATUS 0xA0" +.LASF389: + .string "RT_REVISION 4L" +.LASF4313: + .string "R16_UEP0_DMA (*((PUINT16V)(0x40023410)))" +.LASF3364: + .string "DMA_PeripheralInc_Disable ((uint32_t)0x00000000)" +.LASF1345: + .string "DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430)" +.LASF1411: + .string "DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)" +.LASF2264: + .string "GPIO_INDR_IDR5 ((uint16_t)0x0020)" +.LASF3208: + .string "EXTEN_PLL_HSI_PRE ((uint32_t)0x00000010)" +.LASF1319: + .string "GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)" +.LASF560: + .string "_FSEEK_OPTIMIZATION 1" +.LASF2455: + .string "AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000)" +.LASF4014: + .string "TIM_IT_CC1 ((uint16_t)0x0002)" +.LASF3005: + .string "TIM_CC2S ((uint16_t)0x0300)" +.LASF3516: + .string "FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080)" +.LASF3752: + .string "RCC_PLLMul_8 ((uint32_t)0x00180000)" +.LASF1868: + .string "DMA_CFGR2_PSIZE_1 ((uint16_t)0x0200)" +.LASF1091: + .string "F_SETFL 4" +.LASF2339: + .string "GPIO_LCK0 ((uint32_t)0x00000001)" +.LASF1557: + .string "ADC_SQ14_4 ((uint32_t)0x00000200)" +.LASF2027: + .string "EXTI_RTENR_TR0 ((uint32_t)0x00000001)" +.LASF802: + .string "__lock_close_recursive(lock) __retarget_lock_close_recursive(lock)" +.LASF2629: + .string "I2C_STAR2_MSL ((uint16_t)0x0001)" +.LASF3147: + .string "USART_CTLR1_UE ((uint16_t)0x2000)" +.LASF211: + .string "__FLT64_DECIMAL_DIG__ 17" +.LASF854: + .string "_REENT_MP_FREELIST(ptr) ((ptr)->_freelist)" +.LASF1584: + .string "ADC_SQ8_2 ((uint32_t)0x00000080)" +.LASF3742: + .string "RCC_HSE_Bypass ((uint32_t)0x00040000)" +.LASF3232: + .string "ADC_Mode_AlterTrig ((uint32_t)0x00090000)" +.LASF3498: + .string "EXTI_Line17 ((uint32_t)0x20000)" +.LASF2567: + .string "IWDG_PR_0 ((uint8_t)0x01)" +.LASF3586: + .string "GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040)" +.LASF1604: + .string "ADC_SQ11_4 ((uint32_t)0x01000000)" +.LASF1883: + .string "DMA_CFGR3_MINC ((uint16_t)0x0080)" +.LASF2014: + .string "EXTI_EVENR_MR7 ((uint32_t)0x00000080)" +.LASF1750: + .string "DAC_MAMP1_3 ((uint32_t)0x00000800)" +.LASF2615: + .string "I2C_STAR1_SB ((uint16_t)0x0001)" +.LASF1953: + .string "DMA_CFG7_CIRC ((uint16_t)0x0020)" +.LASF3841: + .string "RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)" +.LASF2184: + .string "GPIO_CFGLR_CNF ((uint32_t)0xCCCCCCCC)" +.LASF420: + .string "RT_WEAK __attribute__((weak))" +.LASF3996: + .string "TIM_OSSIState_Disable ((uint16_t)0x0000)" +.LASF3241: + .string "ADC_DataAlign_Right ((uint32_t)0x00000000)" +.LASF1987: + .string "EXTI_INTENR_MR0 ((uint32_t)0x00000001)" +.LASF2127: + .string "FLASH_CTLR_OPTWRE ((uint16_t)0x0200)" +.LASF2522: + .string "AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300)" +.LASF2470: + .string "AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0)" +.LASF2690: + .string "RCC_HPRE_DIV1 ((uint32_t)0x00000000)" +.LASF2109: + .string "FLASH_ACTLR_LATENCY_1 ((uint8_t)0x01)" +.LASF3001: + .string "TIM_OC1M_0 ((uint16_t)0x0010)" +.LASF41: + .string "__SIG_ATOMIC_TYPE__ int" +.LASF4785: + .string "SetupSetUsbInterface" +.LASF3156: + .string "USART_CTLR2_STOP ((uint16_t)0x3000)" +.LASF4231: + .string "R8_UHOST_CTRL R8_UDEV_CTRL" +.LASF3782: + .string "RCC_IT_PLLRDY ((uint8_t)0x10)" +.LASF817: + .string "_CLOCKID_T_ unsigned long" +.LASF3018: + .string "TIM_IC1F ((uint16_t)0x00F0)" +.LASF4761: + .string "pEP2_RAM_Addr" +.LASF4056: + .string "TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)" +.LASF2411: + .string "AFIO_PCFR1_TIM3_REMAP_0 ((uint32_t)0x00000400)" +.LASF1969: + .string "DMA_CNTR4_NDT ((uint16_t)0xFFFF)" +.LASF3301: + .string "BKP_RTCOutputSource_None ((uint16_t)0x0000)" +.LASF2702: + .string "RCC_PPRE1_2 ((uint32_t)0x00000400)" +.LASF3040: + .string "TIM_OC3CE ((uint16_t)0x0080)" +.LASF1228: + .string "INT64_MIN (-__INT64_MAX__ - 1)" +.LASF3946: + .string "I2S_FLAG_CHSIDE ((uint16_t)0x0004)" +.LASF4161: + .string "USART_HardwareFlowControl_None ((uint16_t)0x0000)" +.LASF4524: + .string "ERR_USB_BUF_OVER 0x17" +.LASF1027: + .string "ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO)" +.LASF509: + .string "RT_DEVICE_OFLAG_WRONLY 0x002" +.LASF1022: + .string "S_IXGRP 0000010" +.LASF2212: + .string "GPIO_CFGHR_MODE8_1 ((uint32_t)0x00000002)" +.LASF2073: + .string "EXTI_SWIEVR_SWIEVR6 ((uint32_t)0x00000040)" +.LASF521: + .string "RT_DEVICE_CTRL_BLK_GETGEOME 0x10" +.LASF1620: + .string "ADC_SQ2_2 ((uint32_t)0x00000080)" +.LASF1874: + .string "DMA_CFGR2_PL_1 ((uint16_t)0x2000)" +.LASF3995: + .string "TIM_OSSIState_Enable ((uint16_t)0x0400)" +.LASF2431: + .string "AFIO_PCFR1_SWJ_CFG_1 ((uint32_t)0x02000000)" +.LASF997: + .string "_IFSOCK 0140000" +.LASF3230: + .string "ADC_Mode_FastInterl ((uint32_t)0x00070000)" +.LASF2282: + .string "GPIO_OUTDR_ODR7 ((uint16_t)0x0080)" +.LASF63: + .string "__UINT_FAST16_TYPE__ unsigned int" +.LASF3556: + .string "FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010)" +.LASF1938: + .string "DMA_CFG6_PSIZE ((uint16_t)0x0300)" +.LASF2809: + .string "RCC_IOPCEN ((uint32_t)0x00000010)" +.LASF2167: + .string "GPIO_CFGLR_MODE2_0 ((uint32_t)0x00000100)" +.LASF3912: + .string "I2S_DataFormat_16bextended ((uint16_t)0x0001)" +.LASF1980: + .string "DMA_MADDR1_MA ((uint32_t)0xFFFFFFFF)" +.LASF3789: + .string "RCC_PCLK2_Div8 ((uint32_t)0x0000C000)" +.LASF4159: + .string "USART_Mode_Rx ((uint16_t)0x0004)" +.LASF1609: + .string "ADC_SQ12_3 ((uint32_t)0x10000000)" +.LASF2646: + .string "PWR_CTLR_PLS ((uint16_t)0x00E0)" +.LASF2893: + .string "SPI_DATAR_DR ((uint16_t)0xFFFF)" +.LASF4185: + .string "USART_IT_ORE USART_IT_ORE_ER" +.LASF1426: + .string "ADC_AWDCH_1 ((uint32_t)0x00000002)" +.LASF1363: + .string "RTC ((RTC_TypeDef *) RTC_BASE)" +.LASF3831: + .string "RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)" +.LASF3475: + .string "DMA2_FLAG_TE4 ((uint32_t)0x10008000)" +.LASF3614: + .string "GPIO_PinSource1 ((uint8_t)0x01)" +.LASF2093: + .string "EXTI_INTF_INTF6 ((uint32_t)0x00000040)" +.LASF3207: + .string "EXTEN_USB_5V_SEL ((uint32_t)0x00000008)" +.LASF268: + .string "__DEC64_MANT_DIG__ 16" +.LASF4678: + .string "uint32_t" +.LASF1483: + .string "ADC_SMP13_2 ((uint32_t)0x00000800)" +.LASF2749: + .string "RCC_PLLMULL16 ((uint32_t)0x00380000)" +.LASF2526: + .string "AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000)" +.LASF3857: + .string "RCC_FLAG_PLLRDY ((uint8_t)0x39)" +.LASF867: + .string "_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)" +.LASF2140: + .string "FLASH_OBR_nRST_STDBY ((uint16_t)0x0010)" +.LASF3855: + .string "RCC_FLAG_HSIRDY ((uint8_t)0x21)" +.LASF1346: + .string "DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444)" +.LASF774: + .string "__NULLABILITY_PRAGMA_POP " +.LASF436: + .string "RT_KERNEL_REALLOC(ptr,size) rt_realloc(ptr, size)" +.LASF361: + .string "RT_USING_SERIAL " +.LASF3496: + .string "EXTI_Line15 ((uint32_t)0x08000)" +.LASF127: + .string "__INT_FAST8_MAX__ 0x7fffffff" +.LASF7: + .string "__GNUC_PATCHLEVEL__ 0" +.LASF3958: + .string "TIM_OCMode_PWM2 ((uint16_t)0x0070)" +.LASF2843: + .string "RCC_WWDGRSTF ((uint32_t)0x40000000)" +.LASF1871: + .string "DMA_CFGR2_MSIZE_1 ((uint16_t)0x0800)" +.LASF695: + .string "__GNUCLIKE_CTOR_SECTION_HANDLING 1" +.LASF1458: + .string "ADC_JEXTSEL_2 ((uint32_t)0x00004000)" +.LASF2683: + .string "RCC_SWS_HSE ((uint32_t)0x00000004)" +.LASF396: + .string "RT_TICK_MAX RT_UINT32_MAX" +.LASF3613: + .string "GPIO_PinSource0 ((uint8_t)0x00)" +.LASF2071: + .string "EXTI_SWIEVR_SWIEVR4 ((uint32_t)0x00000010)" +.LASF1134: + .string "rt_slist_first_entry(ptr,type,member) rt_slist_entry((ptr)->next, type, member)" +.LASF1623: + .string "ADC_SQ3 ((uint32_t)0x00007C00)" +.LASF40: + .string "__CHAR32_TYPE__ long unsigned int" +.LASF1117: + .string "LIBC_DIRENT_H__ " +.LASF3741: + .string "RCC_HSE_ON ((uint32_t)0x00010000)" +.LASF915: + .string "__htonl(_x) __bswap32(_x)" +.LASF3809: + .string "RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)" +.LASF1387: + .string "ADC2 ((ADC_TypeDef *) ADC2_BASE)" +.LASF4155: + .string "USART_StopBits_1_5 ((uint16_t)0x3000)" +.LASF1421: + .string "ADC_JEOC ((uint8_t)0x04)" +.LASF518: + .string "RT_DEVICE_CTRL_CLR_INT 0x11" +.LASF1725: + .string "BKP_ASOS ((uint16_t)0x0200)" +.LASF1770: + .string "DAC_DHR12R1 ((uint16_t)0x0FFF)" +.LASF1602: + .string "ADC_SQ11_2 ((uint32_t)0x00400000)" +.LASF1090: + .string "F_GETFL 3" +.LASF4706: + .string "DMA1_Channel3_IRQn" +.LASF4452: + .string "USB_DESCR_TYP_CONFIG 0x02" +.LASF571: + .string "_DEFAULT_SOURCE" +.LASF4220: + .string "RB_UC_INT_BUSY 0x08" +.LASF26: + .string "__BIGGEST_ALIGNMENT__ 16" +.LASF4401: + .string "USB_SYNCH_FRAME 0x0C" +.LASF3562: + .string "__CH32V10x_GPIO_H " +.LASF2042: + .string "EXTI_RTENR_TR15 ((uint32_t)0x00008000)" +.LASF1971: + .string "DMA_CNTR6_NDT ((uint16_t)0xFFFF)" +.LASF2237: + .string "GPIO_CFGHR_CNF8_1 ((uint32_t)0x00000008)" +.LASF3449: + .string "DMA1_FLAG_TC5 ((uint32_t)0x00020000)" +.LASF2378: + .string "AFIO_ECR_PORT_0 ((uint8_t)0x10)" +.LASF2987: + .string "TIM_UG ((uint8_t)0x01)" +.LASF1582: + .string "ADC_SQ8_0 ((uint32_t)0x00000020)" +.LASF3339: + .string "BKP_DR35 ((uint16_t)0x00A0)" +.LASF4283: + .string "R32_USB_BUF_MODE (*((PUINT32V)(0x4002340c)))" +.LASF4565: + .string "long double" +.LASF2921: + .string "TIM_CMS_1 ((uint16_t)0x0040)" +.LASF2856: + .string "RTC_DIVH_RTC_DIV ((uint16_t)0x000F)" +.LASF2853: + .string "RTC_CTLRL_RTOFF ((uint8_t)0x20)" +.LASF1146: + .string "FINSH_FUNCTION_EXPORT(name,desc) FINSH_FUNCTION_EXPORT_CMD(name, name, desc)" +.LASF426: + .string "INIT_DEVICE_EXPORT(fn) INIT_EXPORT(fn, \"3\")" +.LASF3840: + .string "RCC_APB1Periph_UART5 ((uint32_t)0x00100000)" +.LASF1529: + .string "ADC_SMP7_0 ((uint32_t)0x00200000)" +.LASF2611: + .string "I2C_OADDR1_ADDMODE ((uint16_t)0x8000)" +.LASF629: + .string "_GCC_PTRDIFF_T " +.LASF3711: + .string "__CH32V10x_IWDG_H " +.LASF2106: + .string "EXTI_INTF_INTF19 ((uint32_t)0x00080000)" +.LASF1942: + .string "DMA_CFG6_MSIZE_0 ((uint16_t)0x0400)" +.LASF2784: + .string "RCC_TIM1RST ((uint32_t)0x00000800)" +.LASF2092: + .string "EXTI_INTF_INTF5 ((uint32_t)0x00000020)" +.LASF1687: + .string "BKP_DATAR8_D ((uint16_t)0xFFFF)" +.LASF3859: + .string "RCC_FLAG_LSIRDY ((uint8_t)0x61)" +.LASF1125: + .string "rt_list_for_each(pos,head) for (pos = (head)->next; pos != (head); pos = pos->next)" +.LASF178: + .string "__LDBL_MIN_EXP__ (-16381)" +.LASF2007: + .string "EXTI_EVENR_MR0 ((uint32_t)0x00000001)" +.LASF729: + .string "__alloc_align(x) __attribute__((__alloc_align__ x))" +.LASF1164: + .string "__Vendor_SysTickConfig 0" +.LASF909: + .string "BIG_ENDIAN _BIG_ENDIAN" +.LASF3806: + .string "RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)" +.LASF277: + .string "__DEC128_MAX_EXP__ 6145" +.LASF3575: + .string "GPIO_Pin_12 ((uint16_t)0x1000)" +.LASF2539: + .string "AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002)" +.LASF3115: + .string "TIM_DBL_0 ((uint16_t)0x0100)" +.LASF1182: + .string "__int20 +2" +.LASF4002: + .string "TIM_OCNIdleState_Reset ((uint16_t)0x0000)" +.LASF2829: + .string "RCC_RTCSEL_1 ((uint32_t)0x00000200)" +.LASF3132: + .string "USART_BRR_DIV_Fraction ((uint16_t)0x000F)" +.LASF606: + .string "_MACHINE__DEFAULT_TYPES_H " +.LASF4604: + .string "__sFILE" +.LASF1642: + .string "ADC_SQ6_0 ((uint32_t)0x02000000)" +.LASF2637: + .string "I2C_CKCFGR_CCR ((uint16_t)0x0FFF)" +.LASF1158: + .string "CPUPORT_H__ " +.LASF3162: + .string "USART_CTLR3_IRLP ((uint16_t)0x0004)" +.LASF4189: + .string "USART_WakeUp_AddressMark ((uint16_t)0x0800)" +.LASF2283: + .string "GPIO_OUTDR_ODR8 ((uint16_t)0x0100)" +.LASF1165: + .string "HSE_VALUE ((uint32_t)8000000)" +.LASF3202: + .string "WWDG_CFGR_EWI ((uint16_t)0x0200)" +.LASF2136: + .string "FLASH_OBR_RDPRT ((uint16_t)0x0002)" +.LASF2435: + .string "AFIO_PCFR1_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000)" +.LASF3222: + .string "__CH32V10x_ADC_H " +.LASF1928: + .string "DMA_CFG5_PL_1 ((uint16_t)0x2000)" +.LASF3365: + .string "DMA_MemoryInc_Enable ((uint32_t)0x00000080)" +.LASF3058: + .string "TIM_IC3F_3 ((uint16_t)0x0080)" +.LASF532: + .string "RTGRAPHIC_CTRL_GET_INFO 3" +.LASF1274: + .string "NVIC PFIC" +.LASF2058: + .string "EXTI_FTENR_TR11 ((uint32_t)0x00000800)" +.LASF429: + .string "INIT_APP_EXPORT(fn) INIT_EXPORT(fn, \"6\")" +.LASF2875: + .string "SPI_CTLR1_CRCNEXT ((uint16_t)0x1000)" +.LASF674: + .string "__THROW " +.LASF4148: + .string "TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers" +.LASF991: + .string "_IFMT 0170000" +.LASF4247: + .string "R8_USB_DEV_AD (*((PUINT8V)(0x40023403)))" +.LASF806: + .string "__lock_try_acquire_recursive(lock) __retarget_lock_try_acquire_recursive(lock)" +.LASF3052: + .string "TIM_IC3PSC_0 ((uint16_t)0x0004)" +.LASF1321: + .string "ADC1_BASE (APB2PERIPH_BASE + 0x2400)" +.LASF908: + .string "LITTLE_ENDIAN _LITTLE_ENDIAN" +.LASF2049: + .string "EXTI_FTENR_TR2 ((uint32_t)0x00000004)" +.LASF1652: + .string "ADC_JSQ1_4 ((uint32_t)0x00000010)" +.LASF2509: + .string "AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004)" +.LASF2147: + .string "FLASH_Data0_Data0 ((uint32_t)0x000000FF)" +.LASF2989: + .string "TIM_CC2G ((uint8_t)0x04)" +.LASF1556: + .string "ADC_SQ14_3 ((uint32_t)0x00000100)" +.LASF3425: + .string "DMA2_IT_TC4 ((uint32_t)0x10002000)" +.LASF1792: + .string "DMA_GIF3 ((uint32_t)0x00000100)" +.LASF4615: + .string "_blksize" +.LASF812: + .string "__need_wint_t " +.LASF4268: + .string "RB_UIF_DETECT 0x01" +.LASF138: + .string "__UINT_FAST64_MAX__ 0xffffffffffffffffULL" +.LASF995: + .string "_IFREG 0100000" +.LASF3880: + .string "SPI_Direction_1Line_Rx ((uint16_t)0x8000)" +.LASF2203: + .string "GPIO_CFGLR_CNF6 ((uint32_t)0x0C000000)" +.LASF128: + .string "__INT_FAST8_WIDTH__ 32" +.LASF3945: + .string "SPI_I2S_FLAG_TXE ((uint16_t)0x0002)" +.LASF1893: + .string "DMA_CFGR3_MEM2MEM ((uint16_t)0x4000)" +.LASF2795: + .string "RCC_PWRRST ((uint32_t)0x10000000)" +.LASF2036: + .string "EXTI_RTENR_TR9 ((uint32_t)0x00000200)" +.LASF2978: + .string "TIM_CC3IF ((uint16_t)0x0008)" +.LASF3908: + .string "I2S_Standard_LSB ((uint16_t)0x0020)" +.LASF4212: + .string "R32_USB_CONTROL (*((PUINT32V)(0x40023400)))" +.LASF1638: + .string "ADC_SQ5_2 ((uint32_t)0x00400000)" +.LASF768: + .string "__DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))" +.LASF1577: + .string "ADC_SQ7_1 ((uint32_t)0x00000002)" +.LASF928: + .string "FD_ZERO(p) memset((void*)(p), 0, sizeof(*(p)))" +.LASF4491: + .string "USB_BO_CBW_SIG3 0x43" +.LASF280: + .string "__DEC128_EPSILON__ 1E-33DL" +.LASF312: + .string "HAVE_CCONFIG_H 1" +.LASF47: + .string "__UINT16_TYPE__ short unsigned int" +.LASF1966: + .string "DMA_CNTR1_NDT ((uint16_t)0xFFFF)" +.LASF1208: + .string "INTPTR_MAX (__INTPTR_MAX__)" +.LASF1451: + .string "ADC_CAL ((uint32_t)0x00000004)" +.LASF2807: + .string "RCC_IOPAEN ((uint32_t)0x00000004)" +.LASF4103: + .string "TIM_OCClear_Enable ((uint16_t)0x0080)" +.LASF150: + .string "__FLT_MIN_EXP__ (-125)" +.LASF74: + .string "__LONG_MAX__ 0x7fffffffL" +.LASF2460: + .string "AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500)" +.LASF2262: + .string "GPIO_INDR_IDR3 ((uint16_t)0x0008)" +.LASF271: + .string "__DEC64_MIN__ 1E-383DD" +.LASF1403: + .string "DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)" +.LASF2402: + .string "AFIO_PCFR1_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0)" +.LASF3038: + .string "TIM_OC3M_1 ((uint16_t)0x0020)" +.LASF2341: + .string "GPIO_LCK2 ((uint32_t)0x00000004)" +.LASF2029: + .string "EXTI_RTENR_TR2 ((uint32_t)0x00000004)" +.LASF4357: + .string "RB_UH_R_AUTO_TOG 0x10" +.LASF1535: + .string "ADC_SMP8_2 ((uint32_t)0x04000000)" +.LASF2701: + .string "RCC_PPRE1_1 ((uint32_t)0x00000200)" +.LASF1658: + .string "ADC_JSQ2_4 ((uint32_t)0x00000200)" +.LASF295: + .string "__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1" +.LASF335: + .string "RT_USING_MAILBOX " +.LASF2622: + .string "I2C_STAR1_BERR ((uint16_t)0x0100)" +.LASF868: + .string "_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)" +.LASF485: + .string "RT_IPC_FLAG_FIFO 0x00" +.LASF1407: + .string "DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)" +.LASF109: + .string "__INT_LEAST8_WIDTH__ 8" +.LASF3238: + .string "ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000)" +.LASF1277: + .string "NVIC_KEY3 ((uint32_t)0xBEEF0000)" +.LASF980: + .string "_SYS_TIMESPEC_H_ " +.LASF3187: + .string "WWDG_CTLR_T4 ((uint8_t)0x10)" +.LASF529: + .string "RTGRAPHIC_CTRL_RECT_UPDATE 0" +.LASF1753: + .string "DAC_BOFF2 ((uint32_t)0x00020000)" +.LASF4314: + .string "R16_UEP1_DMA (*((PUINT16V)(0x40023414)))" +.LASF3351: + .string "DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00000004)" +.LASF4633: + .string "_result_k" +.LASF1744: + .string "DAC_WAVE1_0 ((uint32_t)0x00000040)" +.LASF2677: + .string "RCC_SW_HSE ((uint32_t)0x00000001)" +.LASF800: + .string "__lock_init_recursive(lock) __retarget_lock_init_recursive(&lock)" +.LASF2173: + .string "GPIO_CFGLR_MODE4_0 ((uint32_t)0x00010000)" +.LASF607: + .string "__EXP(x) __ ##x ##__" +.LASF1214: + .string "INT_LEAST8_MAX (__INT_LEAST8_MAX__)" +.LASF4622: + .string "_errno" +.LASF4525: + .string "ERR_USB_DISK_ERR 0x1F" +.LASF4509: + .string "pEP6_OUT_DataBuf (pEP6_RAM_Addr)" +.LASF4006: + .string "TIM_ICSelection_DirectTI ((uint16_t)0x0001)" +.LASF1978: + .string "DMA_PADDR6_PA ((uint32_t)0xFFFFFFFF)" +.LASF712: + .string "__P(protos) protos" +.LASF3815: + .string "RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)" +.LASF2774: + .string "RCC_HSERDYC ((uint32_t)0x00080000)" +.LASF1595: + .string "ADC_SQ10_1 ((uint32_t)0x00010000)" +.LASF3129: + .string "USART_STATR_LBD ((uint16_t)0x0100)" +.LASF4527: + .string "ERR_USB_UNSUPPORT 0xFB" +.LASF4201: + .string "USART_FLAG_NE ((uint16_t)0x0004)" +.LASF1647: + .string "ADC_JSQ1 ((uint32_t)0x0000001F)" +.LASF2931: + .string "TIM_MMS_1 ((uint16_t)0x0020)" +.LASF2486: + .string "AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060)" +.LASF3081: + .string "TIM_CC4NP ((uint16_t)0x8000)" +.LASF1943: + .string "DMA_CFG6_MSIZE_1 ((uint16_t)0x0800)" +.LASF1844: + .string "DMA_CFGR1_DIR ((uint16_t)0x0010)" +.LASF3124: + .string "USART_STATR_ORE ((uint16_t)0x0008)" +.LASF2139: + .string "FLASH_OBR_nRST_STOP ((uint16_t)0x0008)" +.LASF2338: + .string "GPIO_BCR_BR15 ((uint16_t)0x8000)" +.LASF1836: + .string "DMA_CGIF7 ((uint32_t)0x01000000)" +.LASF3420: + .string "DMA2_IT_GL3 ((uint32_t)0x10000100)" +.LASF3008: + .string "TIM_OC2FE ((uint16_t)0x0400)" +.LASF3866: + .string "SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)" +.LASF3764: + .string "RCC_SYSCLK_Div1 ((uint32_t)0x00000000)" +.LASF3540: + .string "FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000)" +.LASF4326: + .string "R32_USB_EP1_CTRL (*((PUINT32V)(0x40023434)))" +.LASF4517: + .string "EP5_GetINSta() (R8_UEP5_CTRL&UEP_T_RES_NAK)" +.LASF816: + .string "_TIME_T_ __int_least64_t" +.LASF2574: + .string "I2C_CTLR1_SMBUS ((uint16_t)0x0002)" +.LASF3929: + .string "SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)" +.LASF513: + .string "RT_DEVICE_CTRL_RESUME 0x01" +.LASF4169: + .string "USART_CPHA_1Edge ((uint16_t)0x0000)" +.LASF2297: + .string "GPIO_BSHR_BS6 ((uint32_t)0x00000040)" +.LASF30: + .string "__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__" +.LASF2427: + .string "AFIO_PCFR1_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000)" +.LASF2220: + .string "GPIO_CFGHR_MODE11_0 ((uint32_t)0x00001000)" +.LASF2005: + .string "EXTI_INTENR_MR18 ((uint32_t)0x00040000)" +.LASF2960: + .string "TIM_UIE ((uint16_t)0x0001)" +.LASF3592: + .string "GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00)" +.LASF2560: + .string "AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000)" +.LASF3845: + .string "RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)" +.LASF2766: + .string "RCC_LSIRDYIE ((uint32_t)0x00000100)" +.LASF3273: + .string "ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000)" +.LASF2762: + .string "RCC_HSIRDYF ((uint32_t)0x00000004)" +.LASF354: + .string "FINSH_THREAD_STACK_SIZE 1024" +.LASF1080: + .string "FOPEN _FOPEN" +.LASF2725: + .string "RCC_PLLXTPRE ((uint32_t)0x00020000)" +.LASF876: + .string "__need_size_t " +.LASF3631: + .string "I2C_Mode_SMBusDevice ((uint16_t)0x0002)" +.LASF2325: + .string "GPIO_BCR_BR2 ((uint16_t)0x0004)" +.LASF2706: + .string "RCC_PPRE1_DIV8 ((uint32_t)0x00000600)" +.LASF1162: + .string "__CH32V10x_H " +.LASF0: + .string "__STDC__ 1" +.LASF2781: + .string "RCC_IOPDRST ((uint32_t)0x00000020)" +.LASF782: + .string "__trylocks_shared(...) __lock_annotate(shared_trylock_function(__VA_ARGS__))" +.LASF3834: + .string "RCC_APB1Periph_WWDG ((uint32_t)0x00000800)" +.LASF2163: + .string "GPIO_CFGLR_MODE1 ((uint32_t)0x00000030)" +.LASF3649: + .string "I2C_Register_RTR ((uint8_t)0x20)" +.LASF1388: + .string "TIM1 ((TIM_TypeDef *) TIM1_BASE)" +.LASF4657: + .string "_r48" +.LASF1295: + .string "TIM12_BASE (APB1PERIPH_BASE + 0x1800)" +.LASF3043: + .string "TIM_CC4S_1 ((uint16_t)0x0200)" +.LASF4484: + .string "DEFAULT_ENDP0_SIZE 8" +.LASF2968: + .string "TIM_UDE ((uint16_t)0x0100)" +.LASF2491: + .string "AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400)" +.LASF4753: + .string "SCTLR" +.LASF4143: + .string "TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers" +.LASF2699: + .string "RCC_PPRE1 ((uint32_t)0x00000700)" +.LASF2474: + .string "AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001)" +.LASF437: + .string "RT_EOK 0" +.LASF965: + .string "_SYS_SCHED_H_ " +.LASF3098: + .string "TIM_DTG_7 ((uint16_t)0x0080)" +.LASF1358: + .string "TIM6 ((TIM_TypeDef *) TIM6_BASE)" +.LASF452: + .string "RT_OBJECT_HOOK_CALL(func,argv) do { if ((func) != RT_NULL) func argv; } while (0)" +.LASF3696: + .string "I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002)" +.LASF2016: + .string "EXTI_EVENR_MR9 ((uint32_t)0x00000200)" +.LASF2729: + .string "RCC_PLLMULL_2 ((uint32_t)0x00100000)" +.LASF4674: + .string "__locale_t" +.LASF3747: + .string "RCC_PLLMul_3 ((uint32_t)0x00040000)" +.LASF2271: + .string "GPIO_INDR_IDR12 ((uint16_t)0x1000)" +.LASF1005: + .string "S_IEXEC 0000100" +.LASF1378: + .string "EXTI ((EXTI_TypeDef *) EXTI_BASE)" +.LASF435: + .string "RT_KERNEL_FREE(ptr) rt_free(ptr)" +.LASF2839: + .string "RCC_PINRSTF ((uint32_t)0x04000000)" +.LASF4384: + .string "USB_PID_OUT 0x01" +.LASF4267: + .string "RB_UIF_TRANSFER 0x02" +.LASF3371: + .string "DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)" +.LASF4774: + .string "GpHUBPortNum" +.LASF2966: + .string "TIM_TIE ((uint16_t)0x0040)" +.LASF4347: + .string "RB_UH_PRE_PID_EN 0x80" +.LASF3304: + .string "BKP_RTCOutputSource_Second ((uint16_t)0x0300)" +.LASF2698: + .string "RCC_HPRE_DIV512 ((uint32_t)0x000000F0)" +.LASF1833: + .string "DMA_CTCIF6 ((uint32_t)0x00200000)" +.LASF1398: + .string "TIM11 ((TIM_TypeDef *) TIM11_BASE)" +.LASF2590: + .string "I2C_CTLR2_FREQ_2 ((uint16_t)0x0004)" +.LASF1674: + .string "ADC_IDATAR1_JDATA ((uint16_t)0xFFFF)" +.LASF2009: + .string "EXTI_EVENR_MR2 ((uint32_t)0x00000004)" +.LASF3713: + .string "IWDG_WriteAccess_Disable ((uint16_t)0x0000)" +.LASF344: + .string "RT_USING_COMPONENTS_INIT " +.LASF1155: + .string "RT_DECLARE_SPINLOCK(x) rt_ubase_t x" +.LASF3863: + .string "RCC_FLAG_IWDGRST ((uint8_t)0x7D)" +.LASF284: + .string "__GNUC_STDC_INLINE__ 1" +.LASF2290: + .string "GPIO_OUTDR_ODR15 ((uint16_t)0x8000)" +.LASF815: + .string "_CLOCK_T_ unsigned long" +.LASF207: + .string "__FLT64_MIN_EXP__ (-1021)" +.LASF2619: + .string "I2C_STAR1_STOPF ((uint16_t)0x0010)" +.LASF1375: + .string "PWR ((PWR_TypeDef *) PWR_BASE)" +.LASF1695: + .string "BKP_DATAR16_D ((uint16_t)0xFFFF)" +.LASF2227: + .string "GPIO_CFGHR_MODE13_1 ((uint32_t)0x00200000)" +.LASF3939: + .string "SPI_I2S_IT_ERR ((uint8_t)0x50)" +.LASF2549: + .string "AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050)" +.LASF2354: + .string "GPIO_LCK15 ((uint32_t)0x00008000)" +.LASF4124: + .string "TIM_FLAG_COM ((uint16_t)0x0020)" +.LASF19: + .string "__SIZEOF_LONG_LONG__ 8" +.LASF4273: + .string "RB_UIS_TOKEN1 0x20" +.LASF1412: + .string "DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)" +.LASF3041: + .string "TIM_CC4S ((uint16_t)0x0300)" +.LASF1562: + .string "ADC_SQ15_3 ((uint32_t)0x00002000)" +.LASF3793: + .string "RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)" +.LASF2454: + .string "AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060)" +.LASF3363: + .string "DMA_PeripheralInc_Enable ((uint32_t)0x00000040)" +.LASF777: + .string "__lock_annotate(x) " +.LASF3281: + .string "ADC_InjectedChannel_3 ((uint8_t)0x1C)" +.LASF215: + .string "__FLT64_DENORM_MIN__ 4.94065645841246544176568792868221372e-324F64" +.LASF3294: + .string "ADC_FLAG_EOC ((uint8_t)0x02)" +.LASF1073: + .string "FNDELAY _FNDELAY" +.LASF356: + .string "FINSH_USING_MSH " +.LASF2130: + .string "FLASH_CTLR_PAGE_PG ((uint16_t)0x00010000)" +.LASF1659: + .string "ADC_JSQ3 ((uint32_t)0x00007C00)" +.LASF1635: + .string "ADC_SQ5 ((uint32_t)0x01F00000)" +.LASF2219: + .string "GPIO_CFGHR_MODE11 ((uint32_t)0x00003000)" +.LASF964: + .string "_SYS__PTHREADTYPES_H_ " +.LASF683: + .string "__unbounded " +.LASF1453: + .string "ADC_DMA ((uint32_t)0x00000100)" +.LASF4499: + .string "pEP1_OUT_DataBuf (pEP1_RAM_Addr)" +.LASF2918: + .string "TIM_DIR ((uint16_t)0x0010)" +.LASF3000: + .string "TIM_OC1M ((uint16_t)0x0070)" +.LASF3913: + .string "I2S_DataFormat_24b ((uint16_t)0x0003)" +.LASF283: + .string "__USER_LABEL_PREFIX__ " +.LASF4163: + .string "USART_HardwareFlowControl_CTS ((uint16_t)0x0200)" +.LASF3620: + .string "GPIO_PinSource7 ((uint8_t)0x07)" +.LASF6: + .string "__GNUC_MINOR__ 2" +.LASF1747: + .string "DAC_MAMP1_0 ((uint32_t)0x00000100)" +.LASF1880: + .string "DMA_CFGR3_DIR ((uint16_t)0x0010)" +.LASF2890: + .string "SPI_STATR_MODF ((uint8_t)0x20)" +.LASF2463: + .string "AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000)" +.LASF1128: + .string "rt_list_for_each_entry_safe(pos,n,head,member) for (pos = rt_list_entry((head)->next, typeof(*pos), member), n = rt_list_entry(pos->member.next, typeof(*pos), member); &pos->member != (head); pos = n, n = rt_list_entry(n->member.next, typeof(*n), member))" +.LASF1383: + .string "GPIOE ((GPIO_TypeDef *) GPIOE_BASE)" +.LASF4708: + .string "DMA1_Channel5_IRQn" +.LASF1429: + .string "ADC_AWDCH_4 ((uint32_t)0x00000010)" +.LASF4171: + .string "USART_LastBit_Disable ((uint16_t)0x0000)" +.LASF709: + .string "__CC_SUPPORTS_WARNING 1" +.LASF537: + .string "RTGRAPHIC_CTRL_GET_MODE 8" +.LASF4113: + .string "TIM_SlaveMode_Reset ((uint16_t)0x0004)" +.LASF3374: + .string "DMA_Mode_Normal ((uint32_t)0x00000000)" +.LASF4446: + .string "HUB_C_PORT_CONNECTION 16" +.LASF2913: + .string "SPI_I2SPR_MCKOE ((uint16_t)0x0200)" +.LASF4617: + .string "_data" +.LASF259: + .string "__FLT64X_HAS_INFINITY__ 1" +.LASF1515: + .string "ADC_SMP3_2 ((uint32_t)0x00000800)" +.LASF1247: + .string "INTMAX_MIN (-INTMAX_MAX - 1)" +.LASF1622: + .string "ADC_SQ2_4 ((uint32_t)0x00000200)" +.LASF801: + .string "__lock_close(lock) __retarget_lock_close(lock)" +.LASF2763: + .string "RCC_HSERDYF ((uint32_t)0x00000008)" +.LASF1279: + .string "__SYSTEM_CH32V10x_H " +.LASF3240: + .string "ADC_ExternalTrigConv_None ((uint32_t)0x000E0000)" +.LASF1428: + .string "ADC_AWDCH_3 ((uint32_t)0x00000008)" +.LASF3970: + .string "TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)" +.LASF181: + .string "__LDBL_MAX_10_EXP__ 4932" +.LASF657: + .string "_BSD_WCHAR_T_ " +.LASF88: + .string "__WINT_WIDTH__ 32" +.LASF781: + .string "__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))" +.LASF669: + .string "__need_NULL" +.LASF4032: + .string "TIM_DMABase_ARR ((uint16_t)0x000B)" +.LASF1024: + .string "S_IROTH 0000004" +.LASF2099: + .string "EXTI_INTF_INTF12 ((uint32_t)0x00001000)" +.LASF4725: + .string "SPI2_IRQn" +.LASF1420: + .string "ADC_EOC ((uint8_t)0x02)" +.LASF1542: + .string "ADC_JOFFSET3 ((uint16_t)0x0FFF)" +.LASF4248: + .string "RB_UDA_GP_BIT 0x80" +.LASF68: + .string "__has_include(STR) __has_include__(STR)" +.LASF4167: + .string "USART_CPOL_Low ((uint16_t)0x0000)" +.LASF2166: + .string "GPIO_CFGLR_MODE2 ((uint32_t)0x00000300)" +.LASF2593: + .string "I2C_CTLR2_FREQ_5 ((uint16_t)0x0020)" +.LASF587: + .string "__XSI_VISIBLE 0" +.LASF1082: + .string "FTRUNC _FTRUNC" +.LASF3877: + .string "__CH32V10x_SPI_H " +.LASF2322: + .string "GPIO_BSHR_BR15 ((uint32_t)0x80000000)" +.LASF1212: + .string "UINT8_MAX (__UINT8_MAX__)" +.LASF254: + .string "__FLT64X_MAX__ 1.18973149535723176508575932662800702e+4932F64x" +.LASF3388: + .string "DMA1_IT_GL2 ((uint32_t)0x00000010)" +.LASF1640: + .string "ADC_SQ5_4 ((uint32_t)0x01000000)" +.LASF3850: + .string "RCC_MCO_NoClock ((uint8_t)0x00)" +.LASF2490: + .string "AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300)" +.LASF2984: + .string "TIM_CC2OF ((uint16_t)0x0400)" +.LASF692: + .string "__GNUCLIKE___TYPEOF 1" +.LASF4718: + .string "TIM3_IRQn" +.LASF556: + .string "HAVE_INITFINI_ARRAY 1" +.LASF1405: + .string "DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)" +.LASF1415: + .string "FLASH ((FLASH_TypeDef *) FLASH_R_BASE)" +.LASF1500: + .string "ADC_SMP0 ((uint32_t)0x00000007)" +.LASF795: + .string "__SYS_LOCK_H__ " +.LASF2371: + .string "AFIO_ECR_PIN_PX10 ((uint8_t)0x0A)" +.LASF1876: + .string "DMA_CFGR3_EN ((uint16_t)0x0001)" +.LASF4670: + .string "_nextf" +.LASF1035: + .string "S_ISLNK(m) (((m)&_IFMT) == _IFLNK)" +.LASF2051: + .string "EXTI_FTENR_TR4 ((uint32_t)0x00000010)" +.LASF3687: + .string "I2C_FLAG_TXE ((uint32_t)0x10000080)" +.LASF544: + .string "_ANSIDECL_H_ " +.LASF3429: + .string "DMA2_IT_TC5 ((uint32_t)0x10020000)" +.LASF916: + .string "__htons(_x) __bswap16(_x)" +.LASF591: + .string "__RAND_MAX" +.LASF2497: + .string "AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000)" +.LASF1842: + .string "DMA_CFGR1_HTIE ((uint16_t)0x0004)" +.LASF4598: + .string "_atexit" +.LASF4081: + .string "TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)" +.LASF594: + .string "__IMPORT " +.LASF3012: + .string "TIM_OC2M_1 ((uint16_t)0x2000)" +.LASF1056: + .string "_FNOCTTY 0x8000" +.LASF1855: + .string "DMA_CFGR1_PL_0 ((uint16_t)0x1000)" +.LASF4701: + .string "EXTI2_IRQn" +.LASF4127: + .string "TIM_FLAG_CC1OF ((uint16_t)0x0200)" +.LASF4478: + .string "USB_ENDP_TYPE_MASK 0x03" +.LASF2332: + .string "GPIO_BCR_BR9 ((uint16_t)0x0200)" +.LASF3783: + .string "RCC_IT_CSS ((uint8_t)0x80)" +.LASF1002: + .string "S_ISVTX 0001000" +.LASF2596: + .string "I2C_CTLR2_ITBUFEN ((uint16_t)0x0400)" +.LASF2676: + .string "RCC_SW_HSI ((uint32_t)0x00000000)" +.LASF4264: + .string "RB_UIF_FIFO_OV 0x10" +.LASF1312: + .string "AFIO_BASE (APB2PERIPH_BASE + 0x0000)" +.LASF2816: + .string "RCC_TIM2EN ((uint32_t)0x00000001)" +.LASF4345: + .string "UEP_T_RES_STALL 0x03" +.LASF2268: + .string "GPIO_INDR_IDR9 ((uint16_t)0x0200)" +.LASF1287: + .string "APB2PERIPH_BASE (PERIPH_BASE + 0x10000)" +.LASF255: + .string "__FLT64X_MIN__ 3.36210314311209350626267781732175260e-4932F64x" +.LASF675: + .string "__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname" +.LASF2204: + .string "GPIO_CFGLR_CNF6_0 ((uint32_t)0x04000000)" +.LASF3310: + .string "BKP_DR6 ((uint16_t)0x0018)" +.LASF3445: + .string "DMA1_FLAG_TC4 ((uint32_t)0x00002000)" +.LASF187: + .string "__LDBL_DENORM_MIN__ 6.47517511943802511092443895822764655e-4966L" +.LASF1779: + .string "DAC_LD12BDHR_DACC2DHR ((uint32_t)0xFFF00000)" +.LASF4433: + .string "HUB_GET_PORT_STATUS 0xA3" +.LASF1559: + .string "ADC_SQ15_0 ((uint32_t)0x00000400)" +.LASF1694: + .string "BKP_DATAR15_D ((uint16_t)0xFFFF)" +.LASF167: + .string "__DBL_MAX_10_EXP__ 308" +.LASF2003: + .string "EXTI_INTENR_MR16 ((uint32_t)0x00010000)" +.LASF1078: + .string "FSHLOCK _FSHLOCK" +.LASF38: + .string "__UINTMAX_TYPE__ long long unsigned int" +.LASF3138: + .string "USART_CTLR1_IDLEIE ((uint16_t)0x0010)" +.LASF1774: + .string "DAC_DHR12L2 ((uint16_t)0xFFF0)" +.LASF2533: + .string "AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F)" +.LASF1637: + .string "ADC_SQ5_1 ((uint32_t)0x00200000)" +.LASF895: + .string "_UINT64_T_DECLARED " +.LASF2202: + .string "GPIO_CFGLR_CNF5_1 ((uint32_t)0x00800000)" +.LASF2396: + .string "AFIO_PCFR1_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030)" +.LASF4019: + .string "TIM_IT_Trigger ((uint16_t)0x0040)" +.LASF3676: + .string "I2C_FLAG_GENCALL ((uint32_t)0x00100000)" +.LASF1447: + .string "ADC_JAWDEN ((uint32_t)0x00400000)" +.LASF103: + .string "__UINT8_MAX__ 0xff" +.LASF1418: + .string "EXTEN ((EXTEN_TypeDef *) EXTEN_BASE)" +.LASF798: + .string "__LOCK_INIT_RECURSIVE(class,lock) __LOCK_INIT(class,lock)" +.LASF2494: + .string "AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000)" +.LASF3585: + .string "GPIO_FullRemap_USART3 ((uint32_t)0x00140030)" +.LASF1464: + .string "ADC_EXTTRIG ((uint32_t)0x00100000)" +.LASF3143: + .string "USART_CTLR1_PS ((uint16_t)0x0200)" +.LASF866: + .string "_REENT_WCSRTOMBS_STATE(ptr) ((ptr)->_new._reent._wcsrtombs_state)" +.LASF1916: + .string "DMA_CFG5_DIR ((uint16_t)0x0010)" +.LASF4593: + .string "_on_exit_args" +.LASF2900: + .string "SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004)" +.LASF1485: + .string "ADC_SMP14_0 ((uint32_t)0x00001000)" +.LASF1113: + .string "LOCK_NB 0x04" +.LASF1948: + .string "DMA_CFG7_EN ((uint16_t)0x0001)" +.LASF1776: + .string "DAC_RD12BDHR_DACC1DHR ((uint32_t)0x00000FFF)" +.LASF4301: + .string "RB_UH_EP_RBUF_MOD 0x01" +.LASF794: + .string "_MACHINE__TYPES_H " +.LASF3045: + .string "TIM_OC4PE ((uint16_t)0x0800)" +.LASF3915: + .string "I2S_MCLKOutput_Enable ((uint16_t)0x0200)" +.LASF3290: + .string "ADC_IT_EOC ((uint16_t)0x0220)" +.LASF269: + .string "__DEC64_MIN_EXP__ (-382)" +.LASF3032: + .string "TIM_CC3S_0 ((uint16_t)0x0001)" +.LASF57: + .string "__UINT_LEAST64_TYPE__ long long unsigned int" +.LASF3390: + .string "DMA1_IT_HT2 ((uint32_t)0x00000040)" +.LASF828: + .string "_RAND48_MULT_0 (0xe66d)" +.LASF3802: + .string "RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)" +.LASF3679: + .string "I2C_FLAG_MSL ((uint32_t)0x00010000)" +.LASF224: + .string "__FLT128_MAX_10_EXP__ 4932" +.LASF2581: + .string "I2C_CTLR1_STOP ((uint16_t)0x0200)" +.LASF1455: + .string "ADC_JEXTSEL ((uint32_t)0x00007000)" +.LASF671: + .string "_GCC_MAX_ALIGN_T " +.LASF3735: + .string "PWR_STOPEntry_WFE ((uint8_t)0x02)" +.LASF1937: + .string "DMA_CFG6_MINC ((uint16_t)0x0080)" +.LASF4535: + .string "DEV_TYPE_MOUSE ( USB_DEV_CLASS_HID | 0x30 )" +.LASF4214: + .string "RB_UC_HOST_MODE 0x80" +.LASF4332: + .string "RB_UEP_R_RES1 0x08" +.LASF2600: + .string "I2C_OADDR1_ADD8_9 ((uint16_t)0x0300)" +.LASF3272: + .string "ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000)" +.LASF4572: + .string "__wchb" +.LASF775: + .string "__arg_type_tag(arg_kind,arg_idx,type_tag_idx) " +.LASF2868: + .string "SPI_CTLR1_BR_2 ((uint16_t)0x0020)" +.LASF1171: + .string "_SYS__INTSUP_H " +.LASF4542: + .string "GET_INT_SP() asm(\"csrrw sp,mscratch,sp\")" +.LASF1054: + .string "_FNONBLOCK 0x4000" +.LASF4691: + .string "SysTicK_IRQn" +.LASF365: + .string "SOC_CH32V103R8T6 " +.LASF3677: + .string "I2C_FLAG_TRA ((uint32_t)0x00040000)" +.LASF3667: + .string "I2C_IT_RXNE ((uint32_t)0x06000040)" +.LASF451: + .string "RT_OBJECT_FLAG_MODULE 0x80" +.LASF2164: + .string "GPIO_CFGLR_MODE1_0 ((uint32_t)0x00000010)" +.LASF1540: + .string "ADC_JOFFSET1 ((uint16_t)0x0FFF)" +.LASF905: + .string "_BYTE_ORDER _LITTLE_ENDIAN" +.LASF860: + .string "_REENT_MBTOWC_STATE(ptr) ((ptr)->_new._reent._mbtowc_state)" +.LASF4174: + .string "USART_IT_TXE ((uint16_t)0x0727)" +.LASF4284: + .string "R8_UEP4_1_MOD (*((PUINT8V)(0x4002340c)))" +.LASF2826: + .string "RCC_LSEBYP ((uint32_t)0x00000004)" +.LASF1678: + .string "ADC_RDATAR_DATA ((uint32_t)0x0000FFFF)" +.LASF3535: + .string "FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000)" +.LASF1700: + .string "BKP_DATAR21_D ((uint16_t)0xFFFF)" +.LASF2206: + .string "GPIO_CFGLR_CNF7 ((uint32_t)0xC0000000)" +.LASF3063: + .string "TIM_IC4F_0 ((uint16_t)0x1000)" +.LASF2105: + .string "EXTI_INTF_INTF18 ((uint32_t)0x00040000)" +.LASF2965: + .string "TIM_COMIE ((uint16_t)0x0020)" +.LASF2805: + .string "RCC_USBHD ((uint16_t)0x1000)" +.LASF2573: + .string "I2C_CTLR1_PE ((uint16_t)0x0001)" +.LASF4119: + .string "TIM_FLAG_Update ((uint16_t)0x0001)" +.LASF4323: + .string "R32_USB_EP0_CTRL (*((PUINT32V)(0x40023430)))" +.LASF2736: + .string "RCC_PLLMULL3 ((uint32_t)0x00040000)" +.LASF3433: + .string "DMA1_FLAG_TC1 ((uint32_t)0x00000002)" +.LASF461: + .string "RT_TIMER_CTRL_SET_ONESHOT 0x2" +.LASF3827: + .string "RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)" +.LASF907: + .string "_QUAD_LOWWORD 0" +.LASF505: + .string "RT_DEVICE_FLAG_INT_TX 0x400" +.LASF1184: + .string "long +4" +.LASF1886: + .string "DMA_CFGR3_PSIZE_1 ((uint16_t)0x0200)" +.LASF2369: + .string "AFIO_ECR_PIN_PX8 ((uint8_t)0x08)" +.LASF1226: + .string "INT_LEAST32_MAX (__INT_LEAST32_MAX__)" +.LASF3055: + .string "TIM_IC3F_0 ((uint16_t)0x0010)" +.LASF2281: + .string "GPIO_OUTDR_ODR6 ((uint16_t)0x0040)" +.LASF2551: + .string "AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000)" +.LASF4383: + .string "USB_PID_IN 0x09" +.LASF3130: + .string "USART_STATR_CTS ((uint16_t)0x0200)" +.LASF814: + .string "__need_wint_t" +.LASF161: + .string "__FLT_HAS_QUIET_NAN__ 1" +.LASF359: + .string "RT_USING_DEVICE_IPC " +.LASF3734: + .string "PWR_STOPEntry_WFI ((uint8_t)0x01)" +.LASF4775: + .string "_RootHubDev" +.LASF3884: + .string "SPI_DataSize_16b ((uint16_t)0x0800)" +.LASF4653: + .string "_asctime_buf" +.LASF3632: + .string "I2C_Mode_SMBusHost ((uint16_t)0x000A)" +.LASF3926: + .string "I2S_AudioFreq_Default ((uint32_t)2)" +.LASF3560: + .string "FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR" +.LASF4505: + .string "pEP4_OUT_DataBuf (pEP4_RAM_Addr)" +.LASF1223: + .string "INT32_MAX (__INT32_MAX__)" +.LASF1198: + .string "__LEAST64 \"ll\"" +.LASF4630: + .string "__sdidinit" +.LASF2065: + .string "EXTI_FTENR_TR18 ((uint32_t)0x00040000)" +.LASF3975: + .string "TIM_OCNPolarity_High ((uint16_t)0x0000)" +.LASF3231: + .string "ADC_Mode_SlowInterl ((uint32_t)0x00080000)" +.LASF332: + .string "RT_USING_SEMAPHORE " +.LASF1: + .string "__STDC_VERSION__ 201710L" +.LASF4207: + .string "WWDG_Prescaler_4 ((uint32_t)0x00000100)" +.LASF216: + .string "__FLT64_HAS_DENORM__ 1" +.LASF3914: + .string "I2S_DataFormat_32b ((uint16_t)0x0005)" +.LASF3418: + .string "DMA2_IT_HT2 ((uint32_t)0x10000040)" +.LASF1746: + .string "DAC_MAMP1 ((uint32_t)0x00000F00)" +.LASF1471: + .string "ADC_SMP10_2 ((uint32_t)0x00000004)" +.LASF3513: + .string "FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010)" +.LASF1952: + .string "DMA_CFG7_DIR ((uint16_t)0x0010)" +.LASF717: + .string "__const const" +.LASF592: + .string "__RAND_MAX 0x7fffffff" +.LASF3385: + .string "DMA1_IT_TC1 ((uint32_t)0x00000002)" +.LASF3171: + .string "USART_CTLR3_ONEBIT ((uint16_t)0x0800)" +.LASF3865: + .string "RCC_FLAG_LPWRRST ((uint8_t)0x7F)" +.LASF719: + .string "__volatile volatile" +.LASF139: + .string "__INTPTR_MAX__ 0x7fffffff" +.LASF2404: + .string "AFIO_PCFR1_TIM2_REMAP_0 ((uint32_t)0x00000100)" +.LASF3653: + .string "I2C_PECPosition_Current ((uint16_t)0xF7FF)" +.LASF2922: + .string "TIM_ARPE ((uint16_t)0x0080)" +.LASF1331: + .string "TIM9_BASE (APB2PERIPH_BASE + 0x4C00)" +.LASF2542: + .string "AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005)" +.LASF1663: + .string "ADC_JSQ3_3 ((uint32_t)0x00002000)" +.LASF1310: + .string "PWR_BASE (APB1PERIPH_BASE + 0x7000)" +.LASF208: + .string "__FLT64_MIN_10_EXP__ (-307)" +.LASF2638: + .string "I2C_CKCFGR_DUTY ((uint16_t)0x4000)" +.LASF3299: + .string "BKP_TamperPinLevel_High ((uint16_t)0x0000)" +.LASF2813: + .string "RCC_TIM1EN ((uint32_t)0x00000800)" +.LASF2352: + .string "GPIO_LCK13 ((uint32_t)0x00002000)" +.LASF4060: + .string "TIM_DMA_CC2 ((uint16_t)0x0400)" +.LASF4650: + .string "_add" +.LASF3706: + .string "I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040)" +.LASF4534: + .string "DEV_TYPE_KEYBOARD ( USB_DEV_CLASS_HID | 0x20 )" +.LASF3478: + .string "DMA2_FLAG_HT5 ((uint32_t)0x10040000)" +.LASF2424: + .string "AFIO_PCFR1_TIM5CH4_IREMAP ((uint32_t)0x00010000)" +.LASF1587: + .string "ADC_SQ9 ((uint32_t)0x00007C00)" +.LASF515: + .string "RT_DEVICE_CTRL_CONFIG 0x03" +.LASF2981: + .string "TIM_TIF ((uint16_t)0x0040)" +.LASF210: + .string "__FLT64_MAX_10_EXP__ 308" +.LASF1101: + .string "F_DUPFD_CLOEXEC 14" +.LASF1138: + .string "rt_spin_lock_init(lock) " +.LASF2803: + .string "RCC_FLITFEN ((uint16_t)0x0010)" +.LASF4531: + .string "ROOT_DEV_CONNECTED 1" +.LASF1145: + .string "FINSH_VAR_EXPORT(name,type,desc) const char __vsym_ ##name ##_name[] = #name; RT_USED const struct finsh_sysvar __vsym_ ##name RT_SECTION(\"VSymTab\")= { __vsym_ ##name ##_name, type, (void*)&name };" +.LASF4672: + .string "_unused" +.LASF562: + .string "_UNBUF_STREAM_OPT 1" +.LASF4131: + .string "TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer" +.LASF4139: + .string "TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers" +.LASF4563: + .string "__uint8_t" +.LASF1097: + .string "F_RGETLK 10" +.LASF3642: + .string "I2C_Register_CTLR2 ((uint8_t)0x04)" +.LASF3662: + .string "I2C_IT_OVR ((uint32_t)0x01000800)" +.LASF3705: + .string "I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000)" +.LASF3971: + .string "TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)" +.LASF875: + .string "_GLOBAL_ATEXIT (_GLOBAL_REENT->_atexit)" +.LASF799: + .string "__lock_init(lock) __retarget_lock_init(&lock)" +.LASF3336: + .string "BKP_DR32 ((uint16_t)0x0094)" +.LASF8: + .string "__VERSION__ \"8.2.0\"" +.LASF3160: + .string "USART_CTLR3_EIE ((uint16_t)0x0001)" +.LASF2230: + .string "GPIO_CFGHR_MODE14_1 ((uint32_t)0x02000000)" +.LASF959: + .string "_CLOCKID_T_DECLARED " +.LASF667: + .string "NULL" +.LASF3980: + .string "TIM_OutputNState_Enable ((uint16_t)0x0004)" +.LASF4300: + .string "RB_UH_EP_RX_EN 0x08" +.LASF3252: + .string "ADC_Channel_9 ((uint8_t)0x09)" +.LASF120: + .string "__UINT8_C(c) c" +.LASF805: + .string "__lock_try_acquire(lock) __retarget_lock_try_acquire(lock)" +.LASF1805: + .string "DMA_TCIF6 ((uint32_t)0x00200000)" +.LASF2257: + .string "GPIO_CFGHR_CNF15_0 ((uint32_t)0x40000000)" +.LASF1269: + .string "__I volatile const" +.LASF2406: + .string "AFIO_PCFR1_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000)" +.LASF3408: + .string "DMA1_IT_GL7 ((uint32_t)0x01000000)" +.LASF2879: + .string "SPI_CTLR2_RXDMAEN ((uint8_t)0x01)" +.LASF2907: + .string "SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100)" +.LASF2324: + .string "GPIO_BCR_BR1 ((uint16_t)0x0002)" +.LASF2728: + .string "RCC_PLLMULL_1 ((uint32_t)0x00080000)" +.LASF4342: + .string "UEP_T_RES_ACK 0x00" +.LASF3832: + .string "RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)" +.LASF2979: + .string "TIM_CC4IF ((uint16_t)0x0010)" +.LASF4288: + .string "RB_UEP4_RX_EN 0x08" +.LASF2287: + .string "GPIO_OUTDR_ODR12 ((uint16_t)0x1000)" +.LASF1571: + .string "ADC_L_0 ((uint32_t)0x00100000)" +.LASF212: + .string "__FLT64_MAX__ 1.79769313486231570814527423731704357e+308F64" +.LASF2260: + .string "GPIO_INDR_IDR1 ((uint16_t)0x0002)" +.LASF4417: + .string "USB_REQ_TYP_WRITE 0x00" +.LASF177: + .string "__LDBL_DIG__ 33" +.LASF2695: + .string "RCC_HPRE_DIV64 ((uint32_t)0x000000C0)" +.LASF966: + .string "_SYS__TIMESPEC_H_ " +.LASF4111: + .string "TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)" +.LASF1204: + .string "__int_fast16_t_defined 1" +.LASF2870: + .string "SPI_CTLR1_LSBFIRST ((uint16_t)0x0080)" +.LASF1722: + .string "BKP_CAL ((uint16_t)0x007F)" +.LASF4293: + .string "RB_UEP3_BUF_MOD 0x10" +.LASF35: + .string "__WCHAR_TYPE__ int" +.LASF2653: + .string "PWR_CTLR_PLS_2V5 ((uint16_t)0x0060)" +.LASF1932: + .string "DMA_CFG6_HTIE ((uint16_t)0x0004)" +.LASF1821: + .string "DMA_CTCIF3 ((uint32_t)0x00000200)" +.LASF4217: + .string "RB_UC_SYS_CTRL1 0x20" +.LASF1964: + .string "DMA_CFG7_PL_1 ((uint16_t)0x2000)" +.LASF1795: + .string "DMA_TEIF3 ((uint32_t)0x00000800)" +.LASF750: + .string "__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})" +.LASF3533: + .string "FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000)" +.LASF974: + .string "PTHREAD_CREATE_DETACHED 0" +.LASF2205: + .string "GPIO_CFGLR_CNF6_1 ((uint32_t)0x08000000)" +.LASF3483: + .string "EXTI_Line2 ((uint32_t)0x00004)" +.LASF4470: + .string "USB_DEV_CLASS_PHYSIC_IF 0x05" +.LASF4377: + .string "R8_UEP7_T_LEN (*((PUINT8V)(0x4002344c)))" +.LASF1754: + .string "DAC_TEN2 ((uint32_t)0x00040000)" +.LASF496: + .string "RT_DEVICE_FLAG_WRONLY 0x002" +.LASF1501: + .string "ADC_SMP0_0 ((uint32_t)0x00000001)" +.LASF3982: + .string "TIM_CCx_Disable ((uint16_t)0x0000)" +.LASF3962: + .string "TIM_Channel_2 ((uint16_t)0x0004)" +.LASF910: + .string "PDP_ENDIAN _PDP_ENDIAN" +.LASF2355: + .string "GPIO_LCKK ((uint32_t)0x00010000)" +.LASF973: + .string "PTHREAD_EXPLICIT_SCHED 2" +.LASF4793: + .string "rt_hw_cpu_shutdown" +.LASF1332: + .string "TIM10_BASE (APB2PERIPH_BASE + 0x5000)" +.LASF982: + .string "TIMESPEC_TO_TIMEVAL(tv,ts) do { (tv)->tv_sec = (ts)->tv_sec; (tv)->tv_usec = (ts)->tv_nsec / 1000; } while (0)" +.LASF4765: + .string "pEP6_RAM_Addr" +.LASF4123: + .string "TIM_FLAG_CC4 ((uint16_t)0x0010)" +.LASF4241: + .string "RB_UIE_FIFO_OV 0x10" +.LASF2797: + .string "RCC_SPI2RST ((uint32_t)0x00004000)" +.LASF676: + .string "__ptr_t void *" +.LASF2313: + .string "GPIO_BSHR_BR6 ((uint32_t)0x00400000)" +.LASF688: + .string "__BEGIN_DECLS " +.LASF3942: + .string "SPI_IT_CRCERR ((uint8_t)0x54)" +.LASF391: + .string "RT_TRUE 1" +.LASF827: + .string "_RAND48_SEED_2 (0x1234)" +.LASF2815: + .string "RCC_USART1EN ((uint32_t)0x00004000)" +.LASF4213: + .string "R8_USB_CTRL (*((PUINT8V)(0x40023400)))" +.LASF4012: + .string "TIM_ICPSC_DIV8 ((uint16_t)0x000C)" +.LASF84: + .string "__INT_WIDTH__ 32" +.LASF2792: + .string "RCC_I2C1RST ((uint32_t)0x00200000)" +.LASF2177: + .string "GPIO_CFGLR_MODE5_1 ((uint32_t)0x00200000)" +.LASF3581: + .string "GPIO_Remap_I2C1 ((uint32_t)0x00000002)" +.LASF2103: + .string "EXTI_INTF_INTF16 ((uint32_t)0x00010000)" +.LASF1717: + .string "BKP_DATAR38_D ((uint16_t)0xFFFF)" +.LASF2711: + .string "RCC_PPRE2_2 ((uint32_t)0x00002000)" +.LASF1660: + .string "ADC_JSQ3_0 ((uint32_t)0x00000400)" +.LASF1003: + .string "S_IREAD 0000400" +.LASF3095: + .string "TIM_DTG_4 ((uint16_t)0x0010)" +.LASF1194: + .string "__FAST64 \"ll\"" +.LASF2349: + .string "GPIO_LCK10 ((uint32_t)0x00000400)" +.LASF4758: + .string "PUINT8" +.LASF174: + .string "__DBL_HAS_INFINITY__ 1" +.LASF4540: + .string "pSetupReq ((PUSB_SETUP_REQ)pHOST_TX_RAM_Addr)" +.LASF145: + .string "__FLT_EVAL_METHOD_TS_18661_3__ 0" +.LASF422: + .string "RTT_API " +.LASF1112: + .string "LOCK_EX 0x02" +.LASF3443: + .string "DMA1_FLAG_TE3 ((uint32_t)0x00000800)" +.LASF3557: + .string "FLASH_FLAG_OPTERR ((uint32_t)0x00000001)" +.LASF3609: + .string "GPIO_PortSourceGPIOD ((uint8_t)0x03)" +.LASF34: + .string "__PTRDIFF_TYPE__ int" +.LASF4642: + .string "__sf" +.LASF1873: + .string "DMA_CFGR2_PL_0 ((uint16_t)0x1000)" +.LASF2642: + .string "PWR_CTLR_PDDS ((uint16_t)0x0002)" +.LASF2243: + .string "GPIO_CFGHR_CNF10_1 ((uint32_t)0x00000800)" +.LASF497: + .string "RT_DEVICE_FLAG_RDWR 0x003" +.LASF4286: + .string "RB_UEP1_TX_EN 0x40" +.LASF3366: + .string "DMA_MemoryInc_Disable ((uint32_t)0x00000000)" +.LASF3763: + .string "RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)" +.LASF4493: + .string "USB_BO_CSW_SIG1 0x53" +.LASF116: + .string "__INT_LEAST64_MAX__ 0x7fffffffffffffffLL" +.LASF96: + .string "__SIG_ATOMIC_MAX__ 0x7fffffff" +.LASF3702: + .string "I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082)" +.LASF522: + .string "RT_DEVICE_CTRL_BLK_SYNC 0x11" +.LASF1598: + .string "ADC_SQ10_4 ((uint32_t)0x00080000)" +.LASF4304: + .string "RB_UEP6_TX_EN 0x40" +.LASF2063: + .string "EXTI_FTENR_TR16 ((uint32_t)0x00010000)" +.LASF2832: + .string "RCC_RTCSEL_LSI ((uint32_t)0x00000200)" +.LASF1627: + .string "ADC_SQ3_3 ((uint32_t)0x00002000)" +.LASF3006: + .string "TIM_CC2S_0 ((uint16_t)0x0100)" +.LASF3383: + .string "DMA_IT_TE ((uint32_t)0x00000008)" +.LASF1516: + .string "ADC_SMP4 ((uint32_t)0x00007000)" +.LASF949: + .string "_OFF_T_DECLARED " +.LASF2789: + .string "RCC_TIM3RST ((uint32_t)0x00000002)" +.LASF4798: + .string "stack_addr" +.LASF3818: + .string "RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)" +.LASF4054: + .string "TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)" +.LASF4093: + .string "TIM_EventSource_CC4 ((uint16_t)0x0010)" +.LASF4221: + .string "RB_UC_RESET_SIE 0x04" +.LASF2831: + .string "RCC_RTCSEL_LSE ((uint32_t)0x00000100)" +.LASF3297: + .string "ADC_FLAG_STRT ((uint8_t)0x10)" +.LASF3031: + .string "TIM_CC3S ((uint16_t)0x0003)" +.LASF1055: + .string "_FNDELAY _FNONBLOCK" +.LASF1843: + .string "DMA_CFGR1_TEIE ((uint16_t)0x0008)" +.LASF3921: + .string "I2S_AudioFreq_32k ((uint32_t)32000)" +.LASF2910: + .string "SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800)" +.LASF1931: + .string "DMA_CFG6_TCIE ((uint16_t)0x0002)" +.LASF1025: + .string "S_IWOTH 0000002" +.LASF3626: + .string "GPIO_PinSource13 ((uint8_t)0x0D)" +.LASF3596: + .string "GPIO_Remap_PD01 ((uint32_t)0x00008000)" +.LASF3056: + .string "TIM_IC3F_1 ((uint16_t)0x0020)" +.LASF3753: + .string "RCC_PLLMul_9 ((uint32_t)0x001C0000)" +.LASF1183: + .string "int +2" +.LASF1803: + .string "DMA_TEIF5 ((uint32_t)0x00080000)" +.LASF1958: + .string "DMA_CFG7_PSIZE_1 ((uint16_t)0x0200)" +.LASF3776: + .string "RCC_HCLK_Div8 ((uint32_t)0x00000600)" +.LASF2757: + .string "RCC_CFGR0_MCO_HSI ((uint32_t)0x05000000)" +.LASF4583: + .string "__tm" +.LASF3083: + .string "TIM_PSC ((uint16_t)0xFFFF)" +.LASF821: + .string "_ATEXIT_SIZE 32" +.LASF2477: + .string "AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004)" +.LASF4460: + .string "USB_DESCR_TYP_REPORT 0x22" +.LASF642: + .string "_SIZE_T_DEFINED " +.LASF3024: + .string "TIM_IC2PSC_0 ((uint16_t)0x0400)" +.LASF341: + .string "RT_CONSOLEBUF_SIZE 128" +.LASF925: + .string "FD_SET(n,p) ((p)->fds_bits[(n)/NFDBITS] |= (1L << ((n) % NFDBITS)))" +.LASF2974: + .string "TIM_TDE ((uint16_t)0x4000)" +.LASF3672: + .string "I2C_IT_SB ((uint32_t)0x02000001)" +.LASF4689: + .string "NonMaskableInt_IRQn" +.LASF2170: + .string "GPIO_CFGLR_MODE3_0 ((uint32_t)0x00001000)" +.LASF4419: + .string "USB_REQ_TYP_STANDARD 0x00" +.LASF4126: + .string "TIM_FLAG_Break ((uint16_t)0x0080)" +.LASF985: + .string "CLOCK_ENABLED 1" +.LASF2452: + .string "AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040)" +.LASF939: + .string "_BLKSIZE_T_DECLARED " +.LASF85: + .string "__LONG_WIDTH__ 32" +.LASF789: + .string "__no_lock_analysis __lock_annotate(no_thread_safety_analysis)" +.LASF18: + .string "__SIZEOF_LONG__ 4" +.LASF2303: + .string "GPIO_BSHR_BS12 ((uint32_t)0x00001000)" +.LASF4545: + .string "NVIC_PriorityGroup_0 ((uint32_t)0x00)" +.LASF3651: + .string "I2C_SMBusAlert_High ((uint16_t)0xDFFF)" +.LASF4336: + .string "UEP_R_RES_TOUT 0x04" +.LASF3164: + .string "USART_CTLR3_NACK ((uint16_t)0x0010)" +.LASF1189: + .string "__INT32 \"l\"" +.LASF190: + .string "__LDBL_HAS_QUIET_NAN__ 1" +.LASF578: + .string "_ATFILE_SOURCE 1" +.LASF4058: + .string "TIM_DMA_Update ((uint16_t)0x0100)" +.LASF2865: + .string "SPI_CTLR1_BR ((uint16_t)0x0038)" +.LASF372: + .string "RT_DEBUG_MEMHEAP 0" +.LASF1976: + .string "DMA_PADDR4_PA ((uint32_t)0xFFFFFFFF)" +.LASF1290: + .string "TIM3_BASE (APB1PERIPH_BASE + 0x0400)" +.LASF2845: + .string "RTC_CTLRH_SECIE ((uint8_t)0x01)" +.LASF3416: + .string "DMA2_IT_GL2 ((uint32_t)0x10000010)" +.LASF490: + .string "RT_WAITING_NO 0" +.LASF1038: + .string "_SYS_FCNTL_H_ " +.LASF4607: + .string "_lbfsize" +.LASF689: + .string "__END_DECLS " +.LASF1759: + .string "DAC_WAVE2 ((uint32_t)0x00C00000)" +.LASF3591: + .string "GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800)" +.LASF4693: + .string "WWDG_IRQn" +.LASF3989: + .string "TIM_AutomaticOutput_Enable ((uint16_t)0x4000)" +.LASF3242: + .string "ADC_DataAlign_Left ((uint32_t)0x00000800)" +.LASF3145: + .string "USART_CTLR1_WAKE ((uint16_t)0x0800)" +.LASF2520: + .string "AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100)" +.LASF1069: + .string "FSYNC _FSYNC" +.LASF663: + .string "_GCC_WCHAR_T " +.LASF829: + .string "_RAND48_MULT_1 (0xdeec)" +.LASF4096: + .string "TIM_EventSource_Break ((uint16_t)0x0080)" +.LASF4045: + .string "TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)" +.LASF1565: + .string "ADC_SQ16_0 ((uint32_t)0x00008000)" +.LASF2165: + .string "GPIO_CFGLR_MODE1_1 ((uint32_t)0x00000020)" +.LASF1908: + .string "DMA_CFG4_PL ((uint16_t)0x3000)" +.LASF4190: + .string "USART_LINBreakDetectLength_10b ((uint16_t)0x0000)" +.LASF1712: + .string "BKP_DATAR33_D ((uint16_t)0xFFFF)" +.LASF1470: + .string "ADC_SMP10_1 ((uint32_t)0x00000002)" +.LASF570: + .string "__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)" +.LASF2373: + .string "AFIO_ECR_PIN_PX12 ((uint8_t)0x0C)" +.LASF1409: + .string "DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)" +.LASF4275: + .string "MASK_UIS_TOKEN 0x30" +.LASF4438: + .string "HUB_C_HUB_OVER_CURRENT 1" +.LASF610: + .string "___int8_t_defined 1" +.LASF4100: + .string "TIM_OCPreload_Disable ((uint16_t)0x0000)" +.LASF1517: + .string "ADC_SMP4_0 ((uint32_t)0x00001000)" +.LASF2500: + .string "AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000)" +.LASF1237: + .string "INT_FAST16_MIN (-__INT_FAST16_MAX__ - 1)" +.LASF921: + .string "NBBY 8" +.LASF69: + .string "__has_include_next(STR) __has_include_next__(STR)" +.LASF3074: + .string "TIM_CC2NP ((uint16_t)0x0080)" +.LASF3320: + .string "BKP_DR16 ((uint16_t)0x0054)" +.LASF1291: + .string "TIM4_BASE (APB1PERIPH_BASE + 0x0800)" +.LASF3185: + .string "WWDG_CTLR_T2 ((uint8_t)0x04)" +.LASF1217: + .string "INT16_MAX (__INT16_MAX__)" +.LASF115: + .string "__INT_LEAST32_WIDTH__ 32" +.LASF4628: + .string "_unspecified_locale_info" +.LASF3411: + .string "DMA1_IT_TE7 ((uint32_t)0x08000000)" +.LASF2095: + .string "EXTI_INTF_INTF8 ((uint32_t)0x00000100)" +.LASF4609: + .string "_read" +.LASF4605: + .string "_flags" +.LASF3991: + .string "TIM_LOCKLevel_OFF ((uint16_t)0x0000)" +.LASF4324: + .string "R8_UEP0_T_LEN (*((PUINT8V)(0x40023430)))" +.LASF319: + .string "RT_ALIGN_SIZE 4" +.LASF3361: + .string "DMA_DIR_PeripheralDST ((uint32_t)0x00000010)" +.LASF4746: + .string "RESERVED4" +.LASF1118: + .string "DT_UNKNOWN 0x00" +.LASF4748: + .string "RESERVED5" +.LASF1326: + .string "USART1_BASE (APB2PERIPH_BASE + 0x3800)" +.LASF3899: + .string "SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)" +.LASF2375: + .string "AFIO_ECR_PIN_PX14 ((uint8_t)0x0E)" +.LASF1897: + .string "DMA_CFG4_TEIE ((uint16_t)0x0008)" +.LASF3622: + .string "GPIO_PinSource9 ((uint8_t)0x09)" +.LASF2820: + .string "RCC_I2C1EN ((uint32_t)0x00200000)" +.LASF978: + .string "_PTHREAD_ONCE_INIT { 1, 0 }" +.LASF4387: + .string "USB_PID_STALL 0x0E" +.LASF2943: + .string "TIM_SMS_1 ((uint16_t)0x0002)" +.LASF1782: + .string "DAC_DACC1DOR ((uint16_t)0x0FFF)" +.LASF2953: + .string "TIM_ETF_2 ((uint16_t)0x0400)" +.LASF4671: + .string "_nmalloc" +.LASF1585: + .string "ADC_SQ8_3 ((uint32_t)0x00000100)" +.LASF3799: + .string "RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)" +.LASF2380: + .string "AFIO_ECR_PORT_2 ((uint8_t)0x40)" +.LASF242: + .string "__FLT32X_EPSILON__ 2.22044604925031308084726333618164062e-16F32x" +.LASF2724: + .string "RCC_PLLSRC ((uint32_t)0x00010000)" +.LASF4436: + .string "HUB_SET_PORT_FEATURE 0x23" +.LASF4418: + .string "USB_REQ_TYP_MASK 0x60" +.LASF609: + .string "__have_long32 1" +.LASF1480: + .string "ADC_SMP13 ((uint32_t)0x00000E00)" +.LASF830: + .string "_RAND48_MULT_2 (0x0005)" +.LASF1730: + .string "BKP_TPIE ((uint16_t)0x0004)" +.LASF1641: + .string "ADC_SQ6 ((uint32_t)0x3E000000)" +.LASF2098: + .string "EXTI_INTF_INTF11 ((uint32_t)0x00000800)" +.LASF623: + .string "_T_PTRDIFF_ " +.LASF862: + .string "_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)" +.LASF4385: + .string "USB_PID_ACK 0x02" +.LASF3004: + .string "TIM_OC1CE ((uint16_t)0x0080)" +.LASF705: + .string "__CC_SUPPORTS_INLINE 1" +.LASF4800: + .string "level" +.LASF3833: + .string "RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)" +.LASF3736: + .string "PWR_FLAG_WU ((uint32_t)0x00000001)" +.LASF818: + .string "_TIMER_T_ unsigned long" +.LASF4154: + .string "USART_StopBits_2 ((uint16_t)0x2000)" +.LASF971: + .string "PTHREAD_SCOPE_SYSTEM 1" +.LASF3247: + .string "ADC_Channel_4 ((uint8_t)0x04)" +.LASF4772: + .string "DevicePID" +.LASF1245: + .string "UINT_FAST64_MAX (__UINT_FAST64_MAX__)" +.LASF1603: + .string "ADC_SQ11_3 ((uint32_t)0x00800000)" +.LASF1985: + .string "DMA_MADDR6_MA ((uint32_t)0xFFFFFFFF)" +.LASF1457: + .string "ADC_JEXTSEL_1 ((uint32_t)0x00002000)" +.LASF2277: + .string "GPIO_OUTDR_ODR2 ((uint16_t)0x0004)" +.LASF4302: + .string "R8_UEP5_6_MOD (*((PUINT8V)(0x4002340e)))" +.LASF1624: + .string "ADC_SQ3_0 ((uint32_t)0x00000400)" +.LASF514: + .string "RT_DEVICE_CTRL_SUSPEND 0x02" +.LASF3463: + .string "DMA2_FLAG_TE1 ((uint32_t)0x10000008)" +.LASF3502: + .string "FLASH_Latency_0 ((uint32_t)0x00000000)" +.LASF1918: + .string "DMA_CFG5_PINC ((uint16_t)0x0040)" +.LASF54: + .string "__UINT_LEAST8_TYPE__ unsigned char" +.LASF645: + .string "___int_size_t_h " +.LASF4636: + .string "_cvtlen" +.LASF2837: + .string "RCC_LSIRDY ((uint32_t)0x00000002)" +.LASF1040: + .string "_FOPEN (-1)" +.LASF2146: + .string "FLASH_USER_nUSER ((uint32_t)0xFF000000)" +.LASF2858: + .string "RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF)" +.LASF4114: + .string "TIM_SlaveMode_Gated ((uint16_t)0x0005)" +.LASF3847: + .string "RCC_APB1Periph_PWR ((uint32_t)0x10000000)" +.LASF214: + .string "__FLT64_EPSILON__ 2.22044604925031308084726333618164062e-16F64" +.LASF2385: + .string "AFIO_ECR_PORT_PE ((uint8_t)0x40)" +.LASF3606: + .string "GPIO_PortSourceGPIOA ((uint8_t)0x00)" +.LASF779: + .string "__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))" +.LASF1533: + .string "ADC_SMP8_0 ((uint32_t)0x01000000)" +.LASF1369: + .string "USART3 ((USART_TypeDef *) USART3_BASE)" +.LASF1852: + .string "DMA_CFGR1_MSIZE_0 ((uint16_t)0x0400)" +.LASF4755: + .string "SystemCoreClock" +.LASF4156: + .string "USART_Parity_No ((uint16_t)0x0000)" +.LASF2232: + .string "GPIO_CFGHR_MODE15_0 ((uint32_t)0x10000000)" +.LASF737: + .string "__nonnull_all __attribute__((__nonnull__))" +.LASF2422: + .string "AFIO_PCFR1_CAN_REMAP_REMAP3 ((uint32_t)0x00006000)" +.LASF840: + .string "_REENT_CHECK_MP(ptr) " +.LASF4130: + .string "TIM_FLAG_CC4OF ((uint16_t)0x1000)" +.LASF2554: + .string "AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300)" +.LASF4412: + .string "HID_SET_IDLE 0x0A" +.LASF1313: + .string "EXTI_BASE (APB2PERIPH_BASE + 0x0400)" +.LASF4473: + .string "USB_DEV_CLASS_STORAGE 0x08" +.LASF2982: + .string "TIM_BIF ((uint16_t)0x0080)" +.LASF1552: + .string "ADC_SQ14 ((uint32_t)0x000003E0)" +.LASF2752: + .string "RCC_MCO_0 ((uint32_t)0x01000000)" +.LASF1130: + .string "RT_SLIST_OBJECT_INIT(object) { RT_NULL }" +.LASF3610: + .string "GPIO_PortSourceGPIOE ((uint8_t)0x04)" +.LASF2854: + .string "RTC_PSCH_PRL ((uint16_t)0x000F)" +.LASF3810: + .string "RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)" +.LASF2515: + .string "AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030)" +.LASF596: + .string "_BEGIN_STD_C " +.LASF4660: + .string "_wctomb_state" +.LASF2152: + .string "FLASH_WRPR0_nWRPR0 ((uint32_t)0x0000FF00)" +.LASF1990: + .string "EXTI_INTENR_MR3 ((uint32_t)0x00000008)" +.LASF160: + .string "__FLT_HAS_INFINITY__ 1" +.LASF619: + .string "_STDDEF_H " +.LASF4199: + .string "USART_FLAG_IDLE ((uint16_t)0x0010)" +.LASF2859: + .string "RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF)" +.LASF4407: + .string "HUB_SET_DESCRIPTOR 0x07" +.LASF1793: + .string "DMA_TCIF3 ((uint32_t)0x00000200)" +.LASF2658: + .string "PWR_CTLR_DBP ((uint16_t)0x0100)" +.LASF4686: + .string "func" +.LASF2817: + .string "RCC_TIM3EN ((uint32_t)0x00000002)" +.LASF3919: + .string "I2S_AudioFreq_48k ((uint32_t)48000)" +.LASF76: + .string "__WCHAR_MAX__ 0x7fffffff" +.LASF4646: + .string "_iobs" +.LASF1393: + .string "TIM15 ((TIM_TypeDef *) TIM15_BASE)" +.LASF3548: + .string "OB_STDBY_RST ((uint16_t)0x0000)" +.LASF983: + .string "_XLOCALE_H " +.LASF4024: + .string "TIM_DMABase_DIER ((uint16_t)0x0003)" +.LASF2137: + .string "FLASH_OBR_USER ((uint16_t)0x03FC)" +.LASF3623: + .string "GPIO_PinSource10 ((uint8_t)0x0A)" +.LASF4490: + .string "USB_BO_CBW_SIG2 0x42" +.LASF3694: + .string "I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001)" +.LASF3176: + .string "USART_GPR_PSC_3 ((uint16_t)0x0008)" +.LASF3784: + .string "RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)" +.LASF3389: + .string "DMA1_IT_TC2 ((uint32_t)0x00000020)" +.LASF2620: + .string "I2C_STAR1_RXNE ((uint16_t)0x0040)" +.LASF1921: + .string "DMA_CFG5_PSIZE_0 ((uint16_t)0x0100)" +.LASF194: + .string "__FLT32_MIN_10_EXP__ (-37)" +.LASF557: + .string "_HAVE_LONG_DOUBLE 1" +.LASF1812: + .string "DMA_CGIF1 ((uint32_t)0x00000001)" +.LASF125: + .string "__UINT_LEAST64_MAX__ 0xffffffffffffffffULL" +.LASF853: + .string "_REENT_MP_P5S(ptr) ((ptr)->_p5s)" +.LASF3276: + .string "ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000)" +.LASF4420: + .string "USB_REQ_TYP_CLASS 0x20" +.LASF1849: + .string "DMA_CFGR1_PSIZE_0 ((uint16_t)0x0100)" +.LASF1651: + .string "ADC_JSQ1_3 ((uint32_t)0x00000008)" +.LASF3172: + .string "USART_GPR_PSC ((uint16_t)0x00FF)" +.LASF250: + .string "__FLT64X_MIN_10_EXP__ (-4931)" +.LASF4640: + .string "_sig_func" +.LASF3413: + .string "DMA2_IT_TC1 ((uint32_t)0x10000002)" +.LASF305: + .string "__riscv_mul 1" +.LASF4272: + .string "RB_UIS_TOG_OK 0x40" +.LASF3266: + .string "ADC_SampleTime_28Cycles5 ((uint8_t)0x03)" +.LASF65: + .string "__UINT_FAST64_TYPE__ long long unsigned int" +.LASF1554: + .string "ADC_SQ14_1 ((uint32_t)0x00000040)" +.LASF3109: + .string "TIM_DBA_0 ((uint16_t)0x0001)" +.LASF2175: + .string "GPIO_CFGLR_MODE5 ((uint32_t)0x00300000)" +.LASF2559: + .string "AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000)" +.LASF3981: + .string "TIM_CCx_Enable ((uint16_t)0x0001)" +.LASF780: + .string "__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))" +.LASF3189: + .string "WWDG_CTLR_T6 ((uint8_t)0x40)" +.LASF1316: + .string "GPIOC_BASE (APB2PERIPH_BASE + 0x1000)" +.LASF955: + .string "_SSIZE_T_DECLARED " +.LASF1135: + .string "rt_slist_tail_entry(ptr,type,member) rt_slist_entry(rt_slist_tail(ptr), type, member)" +.LASF149: + .string "__FLT_DIG__ 6" +.LASF3268: + .string "ADC_SampleTime_55Cycles5 ((uint8_t)0x05)" +.LASF2430: + .string "AFIO_PCFR1_SWJ_CFG_0 ((uint32_t)0x01000000)" +.LASF1576: + .string "ADC_SQ7_0 ((uint32_t)0x00000001)" +.LASF1232: + .string "INT_LEAST64_MAX (__INT_LEAST64_MAX__)" +.LASF4000: + .string "TIM_OCIdleState_Reset ((uint16_t)0x0000)" +.LASF256: + .string "__FLT64X_EPSILON__ 1.92592994438723585305597794258492732e-34F64x" +.LASF716: + .string "__XSTRING(x) __STRING(x)" +.LASF4321: + .string "R16_UEP7_DMA (*((PUINT16V)(0x4002342c)))" +.LASF2739: + .string "RCC_PLLMULL6 ((uint32_t)0x00100000)" +.LASF2850: + .string "RTC_CTLRL_OWF ((uint8_t)0x04)" +.LASF2996: + .string "TIM_CC1S_0 ((uint16_t)0x0001)" +.LASF126: + .string "__UINT64_C(c) c ## ULL" +.LASF3184: + .string "WWDG_CTLR_T1 ((uint8_t)0x02)" +.LASF597: + .string "_END_STD_C " +.LASF2787: + .string "RCC_IOPERST ((uint32_t)0x00000040)" +.LASF951: + .string "_UID_T_DECLARED " +.LASF2001: + .string "EXTI_INTENR_MR14 ((uint32_t)0x00004000)" +.LASF4424: + .string "USB_REQ_RECIP_DEVICE 0x00" +.LASF2666: + .string "RCC_HSICAL ((uint32_t)0x0000FF00)" +.LASF1267: + .string "UINTMAX_C(x) __UINTMAX_C(x)" +.LASF1137: + .string "RTM_EXPORT(symbol) " +.LASF2388: + .string "AFIO_PCFR1_I2C1_REMAP ((uint32_t)0x00000002)" +.LASF3737: + .string "PWR_FLAG_SB ((uint32_t)0x00000002)" +.LASF4243: + .string "RB_UIE_SUSPEND 0x04" +.LASF2022: + .string "EXTI_EVENR_MR15 ((uint32_t)0x00008000)" +.LASF2750: + .string "RCC_USBPRE ((uint32_t)0x00400000)" +.LASF2458: + .string "AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300)" +.LASF2274: + .string "GPIO_INDR_IDR15 ((uint16_t)0x8000)" +.LASF864: + .string "_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)" +.LASF180: + .string "__LDBL_MAX_EXP__ 16384" +.LASF383: + .string "RT_ASSERT(EX) if (!(EX)) { rt_assert_handler(#EX, __FUNCTION__, __LINE__); }" +.LASF4355: + .string "R8_UH_RX_CTRL R8_UEP2_CTRL" +.LASF4735: + .string "FIBADDRR" +.LASF2450: + .string "AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020)" +.LASF2440: + .string "AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000)" +.LASF2633: + .string "I2C_STAR2_SMBDEFAULT ((uint16_t)0x0020)" +.LASF306: + .string "__riscv_div 1" +.LASF3121: + .string "USART_STATR_PE ((uint16_t)0x0001)" +.LASF1374: + .string "BKP ((BKP_TypeDef *) BKP_BASE)" +.LASF880: + .string "CLOCKS_PER_SEC _CLOCKS_PER_SEC_" +.LASF3895: + .string "SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)" +.LASF942: + .string "__time_t_defined " +.LASF3757: + .string "RCC_PLLMul_13 ((uint32_t)0x002C0000)" +.LASF869: + .string "_REENT_GETDATE_ERR_P(ptr) (&((ptr)->_new._reent._getdate_err))" +.LASF3175: + .string "USART_GPR_PSC_2 ((uint16_t)0x0004)" +.LASF3263: + .string "ADC_SampleTime_1Cycles5 ((uint8_t)0x00)" +.LASF682: + .string "__bounded " +.LASF1376: + .string "DAC ((DAC_TypeDef *) DAC_BASE)" +.LASF3280: + .string "ADC_InjectedChannel_2 ((uint8_t)0x18)" +.LASF237: + .string "__FLT32X_MAX_EXP__ 1024" +.LASF758: + .string "__weak_reference(sym,alias) __asm__(\".weak \" #alias); __asm__(\".equ \" #alias \", \" #sym)" +.LASF4309: + .string "R8_UEP7_MOD (*((PUINT8V)(0x4002340f)))" +.LASF3139: + .string "USART_CTLR1_RXNEIE ((uint16_t)0x0020)" +.LASF1281: + .string "HSE_Value HSE_VALUE" +.LASF2751: + .string "RCC_CFGR0_MCO ((uint32_t)0x07000000)" +.LASF4349: + .string "R32_USB_EP2_CTRL (*((PUINT32V)(0x40023438)))" +.LASF366: + .string "BSP_USING_UART_CONSOLE " +.LASF111: + .string "__INT16_C(c) c" +.LASF1446: + .string "ADC_DUALMOD_3 ((uint32_t)0x00080000)" +.LASF4698: + .string "RCC_IRQn" +.LASF107: + .string "__INT_LEAST8_MAX__ 0x7f" +.LASF659: + .string "_WCHAR_T_DEFINED " +.LASF2681: + .string "RCC_SWS_1 ((uint32_t)0x00000008)" +.LASF1177: + .string "long" +.LASF835: + .string "_N_LISTS 30" +.LASF2108: + .string "FLASH_ACTLR_LATENCY_0 ((uint8_t)0x00)" +.LASF2525: + .string "AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600)" +.LASF4204: + .string "__CH32V10x_WWDG_H " +.LASF3386: + .string "DMA1_IT_HT1 ((uint32_t)0x00000004)" +.LASF1826: + .string "DMA_CHTIF4 ((uint32_t)0x00004000)" +.LASF2113: + .string "FLASH_ACTLR_PRFTBS ((uint8_t)0x20)" +.LASF2245: + .string "GPIO_CFGHR_CNF11_0 ((uint32_t)0x00004000)" +.LASF2407: + .string "AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100)" +.LASF4453: + .string "USB_DESCR_TYP_STRING 0x03" +.LASF2183: + .string "GPIO_CFGLR_MODE7_1 ((uint32_t)0x20000000)" +.LASF186: + .string "__LDBL_EPSILON__ 1.92592994438723585305597794258492732e-34L" +.LASF4790: + .string "rt_hw_stack_frame" +.LASF3874: + .string "RTC_FLAG_OW ((uint16_t)0x0004)" +.LASF1308: + .string "I2C2_BASE (APB1PERIPH_BASE + 0x5800)" +.LASF2823: + .string "RCC_USBEN ((uint32_t)0x00800000)" +.LASF4451: + .string "USB_DESCR_TYP_DEVICE 0x01" +.LASF3856: + .string "RCC_FLAG_HSERDY ((uint8_t)0x31)" +.LASF4378: + .string "R8_UEP7_CTRL (*((PUINT8V)(0x4002344e)))" +.LASF1686: + .string "BKP_DATAR7_D ((uint16_t)0xFFFF)" +.LASF1863: + .string "DMA_CFGR2_CIRC ((uint16_t)0x0020)" +.LASF2767: + .string "RCC_LSERDYIE ((uint32_t)0x00000200)" +.LASF2240: + .string "GPIO_CFGHR_CNF9_1 ((uint32_t)0x00000080)" +.LASF4115: + .string "TIM_SlaveMode_Trigger ((uint16_t)0x0006)" +.LASF1314: + .string "GPIOA_BASE (APB2PERIPH_BASE + 0x0800)" +.LASF4447: + .string "HUB_C_PORT_ENABLE 17" +.LASF1430: + .string "ADC_EOCIE ((uint32_t)0x00000020)" +.LASF3127: + .string "USART_STATR_TC ((uint16_t)0x0040)" +.LASF766: + .string "__COPYRIGHT(s) struct __hack" +.LASF2863: + .string "SPI_CTLR1_CPOL ((uint16_t)0x0002)" +.LASF64: + .string "__UINT_FAST32_TYPE__ unsigned int" +.LASF1309: + .string "BKP_BASE (APB1PERIPH_BASE + 0x6C00)" +.LASF1450: + .string "ADC_CONT ((uint32_t)0x00000002)" +.LASF1124: + .string "rt_list_entry(node,type,member) rt_container_of(node, type, member)" +.LASF2462: + .string "AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000)" +.LASF50: + .string "__INT_LEAST8_TYPE__ signed char" +.LASF1924: + .string "DMA_CFG5_MSIZE_0 ((uint16_t)0x0400)" +.LASF3590: + .string "GPIO_FullRemap_TIM2 ((uint32_t)0x00180300)" +.LASF1760: + .string "DAC_WAVE2_0 ((uint32_t)0x00400000)" +.LASF1586: + .string "ADC_SQ8_4 ((uint32_t)0x00000200)" +.LASF2333: + .string "GPIO_BCR_BR10 ((uint16_t)0x0400)" +.LASF327: + .string "IDLE_THREAD_STACK_SIZE 256" +.LASF1258: + .string "INT8_C(x) __INT8_C(x)" +.LASF2905: + .string "SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080)" +.LASF2903: + .string "SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010)" +.LASF723: + .string "__unused __attribute__((__unused__))" +.LASF1666: + .string "ADC_JSQ4_0 ((uint32_t)0x00008000)" +.LASF625: + .string "__PTRDIFF_T " +.LASF235: + .string "__FLT32X_MIN_EXP__ (-1021)" +.LASF2168: + .string "GPIO_CFGLR_MODE2_1 ((uint32_t)0x00000200)" +.LASF3504: + .string "FLASH_Latency_2 ((uint32_t)0x00000002)" +.LASF498: + .string "RT_DEVICE_FLAG_REMOVABLE 0x004" +.LASF2599: + .string "I2C_OADDR1_ADD1_7 ((uint16_t)0x00FE)" +.LASF3353: + .string "DBGMCU_TIM1_STOP ((uint32_t)0x00000010)" +.LASF2513: + .string "AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010)" +.LASF613: + .string "___int64_t_defined 1" +.LASF1677: + .string "ADC_IDATAR4_JDATA ((uint16_t)0xFFFF)" +.LASF3860: + .string "RCC_FLAG_PINRST ((uint8_t)0x7A)" +.LASF2612: + .string "I2C_OADDR2_ENDUAL ((uint8_t)0x01)" +.LASF4716: + .string "TIM1_CC_IRQn" +.LASF299: + .string "__SIZEOF_WCHAR_T__ 4" +.LASF3016: + .string "TIM_IC1PSC_0 ((uint16_t)0x0004)" +.LASF2187: + .string "GPIO_CFGLR_CNF0_1 ((uint32_t)0x00000008)" +.LASF2531: + .string "AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000)" +.LASF2589: + .string "I2C_CTLR2_FREQ_1 ((uint16_t)0x0002)" +.LASF4266: + .string "RB_UIF_SUSPEND 0x04" +.LASF2279: + .string "GPIO_OUTDR_ODR4 ((uint16_t)0x0010)" +.LASF4712: + .string "EXTI9_5_IRQn" +.LASF1854: + .string "DMA_CFGR1_PL ((uint16_t)0x3000)" +.LASF1995: + .string "EXTI_INTENR_MR8 ((uint32_t)0x00000100)" +.LASF1923: + .string "DMA_CFG5_MSIZE ((uint16_t)0x0C00)" +.LASF4227: + .string "RB_UD_DM_PIN 0x10" +.LASF1233: + .string "UINT_LEAST64_MAX (__UINT_LEAST64_MAX__)" +.LASF4117: + .string "TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)" +.LASF1067: + .string "O_NOCTTY _FNOCTTY" +.LASF2053: + .string "EXTI_FTENR_TR6 ((uint32_t)0x00000040)" +.LASF3665: + .string "I2C_IT_BERR ((uint32_t)0x01000100)" +.LASF3125: + .string "USART_STATR_IDLE ((uint16_t)0x0010)" +.LASF2735: + .string "RCC_PLLMULL2 ((uint32_t)0x00000000)" +.LASF362: + .string "RT_SERIAL_RB_BUFSZ 64" +.LASF3503: + .string "FLASH_Latency_1 ((uint32_t)0x00000001)" +.LASF3658: + .string "I2C_IT_ERR ((uint16_t)0x0100)" +.LASF4511: + .string "pEP7_OUT_DataBuf (pEP7_RAM_Addr)" +.LASF1085: + .string "FNONBLOCK _FNONBLOCK" +.LASF3760: + .string "RCC_PLLMul_16 ((uint32_t)0x00380000)" +.LASF2844: + .string "RCC_LPWRRSTF ((uint32_t)0x80000000)" +.LASF952: + .string "_GID_T_DECLARED " +.LASF4344: + .string "UEP_T_RES_NAK 0x02" +.LASF1399: + .string "DMA1 ((DMA_TypeDef *) DMA1_BASE)" +.LASF3573: + .string "GPIO_Pin_10 ((uint16_t)0x0400)" +.LASF2714: + .string "RCC_PPRE2_DIV4 ((uint32_t)0x00002800)" +.LASF3994: + .string "TIM_LOCKLevel_3 ((uint16_t)0x0300)" +.LASF1440: + .string "ADC_DISCNUM_1 ((uint32_t)0x00004000)" +.LASF3526: + .string "FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000)" +.LASF4082: + .string "TIM_PSCReloadMode_Update ((uint16_t)0x0000)" +.LASF2420: + .string "AFIO_PCFR1_CAN_REMAP_REMAP1 ((uint32_t)0x00000000)" +.LASF2194: + .string "GPIO_CFGLR_CNF3 ((uint32_t)0x0000C000)" +.LASF225: + .string "__FLT128_DECIMAL_DIG__ 36" +.LASF2990: + .string "TIM_CC3G ((uint8_t)0x08)" +.LASF769: + .string "__DEQUALIFY(type,var) ((type)(__uintptr_t)(const volatile void *)(var))" +.LASF4381: + .string "USB_PID_SOF 0x05" +.LASF3094: + .string "TIM_DTG_3 ((uint16_t)0x0008)" +.LASF4621: + .string "_reent" +.LASF397: + .string "RT_SEM_VALUE_MAX RT_UINT16_MAX" +.LASF3608: + .string "GPIO_PortSourceGPIOC ((uint8_t)0x02)" +.LASF73: + .string "__INT_MAX__ 0x7fffffff" +.LASF3506: + .string "FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000)" +.LASF4339: + .string "RB_UEP_T_RES1 0x02" +.LASF3011: + .string "TIM_OC2M_0 ((uint16_t)0x1000)" +.LASF4121: + .string "TIM_FLAG_CC2 ((uint16_t)0x0004)" +.LASF3128: + .string "USART_STATR_TXE ((uint16_t)0x0080)" +.LASF465: + .string "RT_TIMER_SKIP_LIST_MASK 0x3" +.LASF2644: + .string "PWR_CTLR_CSBF ((uint16_t)0x0008)" +.LASF3690: + .string "I2C_FLAG_ADD10 ((uint32_t)0x10000008)" +.LASF4616: + .string "_offset" +.LASF1838: + .string "DMA_CHTIF7 ((uint32_t)0x04000000)" +.LASF4721: + .string "I2C1_ER_IRQn" +.LASF136: + .string "__UINT_FAST16_MAX__ 0xffffffffU" +.LASF698: + .string "__GNUCLIKE_BUILTIN_STDARG 1" +.LASF2345: + .string "GPIO_LCK6 ((uint32_t)0x00000040)" +.LASF1479: + .string "ADC_SMP12_2 ((uint32_t)0x00000100)" +.LASF2302: + .string "GPIO_BSHR_BS11 ((uint32_t)0x00000800)" +.LASF1847: + .string "DMA_CFGR1_MINC ((uint16_t)0x0080)" +.LASF1600: + .string "ADC_SQ11_0 ((uint32_t)0x00100000)" +.LASF3082: + .string "TIM_CNT ((uint16_t)0xFFFF)" +.LASF4767: + .string "DeviceStatus" +.LASF4016: + .string "TIM_IT_CC3 ((uint16_t)0x0008)" +.LASF1917: + .string "DMA_CFG5_CIRC ((uint16_t)0x0020)" +.LASF468: + .string "RT_THREAD_SUSPEND 0x02" +.LASF1767: + .string "DAC_DMAEN2 ((uint32_t)0x10000000)" +.LASF3601: + .string "GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400)" +.LASF4676: + .string "_global_impure_ptr" +.LASF680: + .string "__attribute_format_strfmon__(a,b) " +.LASF2382: + .string "AFIO_ECR_PORT_PB ((uint8_t)0x10)" +.LASF379: + .string "RT_DEBUG_IPC 0" +.LASF3293: + .string "ADC_FLAG_AWD ((uint8_t)0x01)" +.LASF3155: + .string "USART_CTLR2_CLKEN ((uint16_t)0x0800)" +.LASF3093: + .string "TIM_DTG_2 ((uint16_t)0x0004)" +.LASF1673: + .string "ADC_JL_1 ((uint32_t)0x00200000)" +.LASF4182: + .string "USART_IT_ORE_ER ((uint16_t)0x0360)" +.LASF1225: + .string "INT_LEAST32_MIN (-__INT_LEAST32_MAX__ - 1)" +.LASF189: + .string "__LDBL_HAS_INFINITY__ 1" +.LASF4666: + .string "_mbsrtowcs_state" +.LASF1209: + .string "UINTPTR_MAX (__UINTPTR_MAX__)" +.LASF2873: + .string "SPI_CTLR1_RXONLY ((uint16_t)0x0400)" +.LASF20: + .string "__SIZEOF_SHORT__ 2" +.LASF2785: + .string "RCC_SPI1RST ((uint32_t)0x00001000)" +.LASF1681: + .string "BKP_DATAR2_D ((uint16_t)0xFFFF)" +.LASF1993: + .string "EXTI_INTENR_MR6 ((uint32_t)0x00000040)" +.LASF4064: + .string "TIM_DMA_Trigger ((uint16_t)0x4000)" +.LASF3699: + .string "I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080)" +.LASF887: + .string "__int8_t_defined 1" +.LASF402: + .string "_STDARG_H " +.LASF2216: + .string "GPIO_CFGHR_MODE10 ((uint32_t)0x00000300)" +.LASF1504: + .string "ADC_SMP1 ((uint32_t)0x00000038)" +.LASF36: + .string "__WINT_TYPE__ unsigned int" +.LASF3861: + .string "RCC_FLAG_PORRST ((uint8_t)0x7B)" +.LASF2364: + .string "AFIO_ECR_PIN_PX3 ((uint8_t)0x03)" +.LASF1596: + .string "ADC_SQ10_2 ((uint32_t)0x00020000)" +.LASF4164: + .string "USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)" +.LASF3723: + .string "__CH32V10x_PWR_H " +.LASF4532: + .string "ROOT_DEV_FAILED 2" +.LASF1330: + .string "TIM17_BASE (APB2PERIPH_BASE + 0x4800)" +.LASF1877: + .string "DMA_CFGR3_TCIE ((uint16_t)0x0002)" +.LASF113: + .string "__INT_LEAST32_MAX__ 0x7fffffffL" +.LASF561: + .string "_WIDE_ORIENT 1" +.LASF989: + .string "CLOCK_REALTIME (clockid_t)1" +.LASF4356: + .string "RB_UH_R_TOG 0x80" +.LASF2185: + .string "GPIO_CFGLR_CNF0 ((uint32_t)0x0000000C)" +.LASF1816: + .string "DMA_CGIF2 ((uint32_t)0x00000010)" +.LASF1926: + .string "DMA_CFG5_PL ((uint16_t)0x3000)" +.LASF3341: + .string "BKP_DR37 ((uint16_t)0x00A8)" +.LASF2156: + .string "FLASH_WRPR2_nWRPR2 ((uint32_t)0x0000FF00)" +.LASF3883: + .string "SPI_Mode_Slave ((uint16_t)0x0000)" +.LASF2129: + .string "FLASH_CTLR_EOPIE ((uint16_t)0x1000)" +.LASF2158: + .string "FLASH_WRPR3_nWRPR3 ((uint32_t)0xFF000000)" +.LASF151: + .string "__FLT_MIN_10_EXP__ (-37)" +.LASF511: + .string "RT_DEVICE_OFLAG_OPEN 0x008" +.LASF42: + .string "__INT8_TYPE__ signed char" +.LASF1385: + .string "GPIOG ((GPIO_TypeDef *) GPIOG_BASE)" +.LASF1306: + .string "UART5_BASE (APB1PERIPH_BASE + 0x5000)" +.LASF3973: + .string "TIM_OCPolarity_High ((uint16_t)0x0000)" +.LASF3182: + .string "WWDG_CTLR_T ((uint8_t)0x7F)" +.LASF1655: + .string "ADC_JSQ2_1 ((uint32_t)0x00000040)" +.LASF3448: + .string "DMA1_FLAG_GL5 ((uint32_t)0x00010000)" +.LASF1723: + .string "BKP_CCO ((uint16_t)0x0080)" +.LASF4638: + .string "_new" +.LASF1413: + .string "RCC ((RCC_TypeDef *) RCC_BASE)" +.LASF2226: + .string "GPIO_CFGHR_MODE13_0 ((uint32_t)0x00100000)" +.LASF933: + .string "__u_char_defined " +.LASF3233: + .string "ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)" +.LASF1578: + .string "ADC_SQ7_2 ((uint32_t)0x00000004)" +.LASF517: + .string "RT_DEVICE_CTRL_SET_INT 0x10" +.LASF3744: + .string "RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)" +.LASF1357: + .string "TIM5 ((TIM_TypeDef *) TIM5_BASE)" +.LASF4047: + .string "TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)" +.LASF3451: + .string "DMA1_FLAG_TE5 ((uint32_t)0x00080000)" +.LASF3979: + .string "TIM_OutputNState_Disable ((uint16_t)0x0000)" +.LASF2731: + .string "RCC_PLLSRC_HSI_Div2 ((uint32_t)0x00000000)" +.LASF3460: + .string "DMA2_FLAG_GL1 ((uint32_t)0x10000001)" +.LASF3885: + .string "SPI_DataSize_8b ((uint16_t)0x0000)" +.LASF2977: + .string "TIM_CC2IF ((uint16_t)0x0004)" +.LASF527: + .string "RT_DEVICE_CTRL_CURSOR_SET_POSITION 0x10" +.LASF2488: + .string "AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100)" +.LASF3521: + .string "FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000)" +.LASF2707: + .string "RCC_PPRE1_DIV16 ((uint32_t)0x00000700)" +.LASF3289: + .string "ADC_AnalogWatchdog_None ((uint32_t)0x00000000)" +.LASF1630: + .string "ADC_SQ4_0 ((uint32_t)0x00008000)" +.LASF2689: + .string "RCC_HPRE_3 ((uint32_t)0x00000080)" +.LASF4739: + .string "FIOFADDRR" +.LASF4048: + .string "TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)" +.LASF2157: + .string "FLASH_WRPR3_WRPR3 ((uint32_t)0x00FF0000)" +.LASF760: + .string "__sym_compat(sym,impl,verid) __asm__(\".symver \" #impl \", \" #sym \"@\" #verid)" +.LASF718: + .string "__signed signed" +.LASF1278: + .string "SysTick ((SysTick_Type *) 0xE000F000)" +.LASF3274: + .string "ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000)" +.LASF1629: + .string "ADC_SQ4 ((uint32_t)0x000F8000)" +.LASF1807: + .string "DMA_TEIF6 ((uint32_t)0x00800000)" +.LASF2892: + .string "SPI_STATR_BSY ((uint8_t)0x80)" +.LASF2771: + .string "RCC_LSIRDYC ((uint32_t)0x00010000)" +.LASF2896: + .string "SPI_TCRCR_TXCRC ((uint16_t)0xFFFF)" +.LASF1334: + .string "DMA1_BASE (AHBPERIPH_BASE + 0x0000)" +.LASF3391: + .string "DMA1_IT_TE2 ((uint32_t)0x00000080)" +.LASF2661: + .string "PWR_CSR_PVDO ((uint16_t)0x0004)" +.LASF2846: + .string "RTC_CTLRH_ALRIE ((uint8_t)0x02)" +.LASF2810: + .string "RCC_IOPDEN ((uint32_t)0x00000020)" +.LASF2334: + .string "GPIO_BCR_BR11 ((uint16_t)0x0800)" +.LASF3954: + .string "TIM_OCMode_Active ((uint16_t)0x0010)" +.LASF3265: + .string "ADC_SampleTime_13Cycles5 ((uint8_t)0x02)" +.LASF3180: + .string "USART_GPR_PSC_7 ((uint16_t)0x0080)" +.LASF3984: + .string "TIM_CCxN_Disable ((uint16_t)0x0000)" +.LASF2247: + .string "GPIO_CFGHR_CNF12 ((uint32_t)0x000C0000)" +.LASF2818: + .string "RCC_WWDGEN ((uint32_t)0x00000800)" +.LASF649: + .string "__need_size_t" +.LASF589: + .string "_READ_WRITE_RETURN_TYPE _ssize_t" +.LASF724: + .string "__used __attribute__((__used__))" +.LASF2942: + .string "TIM_SMS_0 ((uint16_t)0x0001)" +.LASF218: + .string "__FLT64_HAS_QUIET_NAN__ 1" +.LASF3135: + .string "USART_CTLR1_RWU ((uint16_t)0x0002)" +.LASF2765: + .string "RCC_CSSF ((uint32_t)0x00000080)" +.LASF2898: + .string "SPI_I2SCFGR_DATLEN ((uint16_t)0x0006)" +.LASF124: + .string "__UINT32_C(c) c ## UL" +.LASF2621: + .string "I2C_STAR1_TXE ((uint16_t)0x0080)" +.LASF1263: + .string "UINT32_C(x) __UINT32_C(x)" +.LASF2020: + .string "EXTI_EVENR_MR13 ((uint32_t)0x00002000)" +.LASF2068: + .string "EXTI_SWIEVR_SWIEVR1 ((uint32_t)0x00000002)" +.LASF4644: + .string "_glue" +.LASF220: + .string "__FLT128_DIG__ 33" +.LASF363: + .string "RT_USING_PIN " +.LASF3459: + .string "DMA1_FLAG_TE7 ((uint32_t)0x08000000)" +.LASF3551: + .string "FLASH_IT_BANK1_ERROR FLASH_IT_ERROR" +.LASF2951: + .string "TIM_ETF_0 ((uint16_t)0x0100)" +.LASF4779: + .string "pHOST_RX_RAM_Addr" +.LASF3781: + .string "RCC_IT_HSERDY ((uint8_t)0x08)" +.LASF4578: + .string "_next" +.LASF430: + .string "RT_EVENT_LENGTH 32" +.LASF4172: + .string "USART_LastBit_Enable ((uint16_t)0x0100)" +.LASF466: + .string "RT_THREAD_INIT 0x00" +.LASF3625: + .string "GPIO_PinSource12 ((uint8_t)0x0C)" +.LASF1416: + .string "OB ((OB_TypeDef *) OB_BASE)" +.LASF4017: + .string "TIM_IT_CC4 ((uint16_t)0x0010)" +.LASF4348: + .string "RB_UH_SOF_EN 0x40" +.LASF2190: + .string "GPIO_CFGLR_CNF1_1 ((uint32_t)0x00000080)" +.LASF2436: + .string "AFIO_PCFR1_SWJ_CFG_DISABLE ((uint32_t)0x04000000)" +.LASF3603: + .string "GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010)" +.LASF987: + .string "CLOCK_ALLOWED 1" +.LASF3482: + .string "EXTI_Line1 ((uint32_t)0x00002)" +.LASF4027: + .string "TIM_DMABase_CCMR1 ((uint16_t)0x0006)" +.LASF3396: + .string "DMA1_IT_GL4 ((uint32_t)0x00001000)" +.LASF345: + .string "RT_USING_USER_MAIN " +.LASF588: + .string "__SSP_FORTIFY_LEVEL 0" +.LASF3440: + .string "DMA1_FLAG_GL3 ((uint32_t)0x00000100)" +.LASF313: + .string "__RTTHREAD__ 1" +.LASF380: + .string "RT_DEBUG_INIT 0" +.LASF434: + .string "RT_KERNEL_MALLOC(sz) rt_malloc(sz)" +.LASF999: + .string "S_BLKSIZE 1024" +.LASF1075: + .string "FWRITE _FWRITE" +.LASF4441: + .string "HUB_PORT_SUSPEND 2" +.LASF4392: + .string "USB_CLEAR_FEATURE 0x01" +.LASF1373: + .string "I2C2 ((I2C_TypeDef *) I2C2_BASE)" +.LASF3950: + .string "SPI_I2S_FLAG_OVR ((uint16_t)0x0040)" +.LASF1608: + .string "ADC_SQ12_2 ((uint32_t)0x08000000)" +.LASF4697: + .string "FLASH_IRQn" +.LASF300: + .string "__SIZEOF_WINT_T__ 4" +.LASF787: + .string "__requires_shared(...) __lock_annotate(shared_locks_required(__VA_ARGS__))" +.LASF4468: + .string "USB_DEV_CLASS_HID 0x03" +.LASF239: + .string "__FLT32X_DECIMAL_DIG__ 17" +.LASF3438: + .string "DMA1_FLAG_HT2 ((uint32_t)0x00000040)" +.LASF4308: + .string "RB_UEP5_BUF_MOD 0x01" +.LASF4620: + .string "_flags2" +.LASF1920: + .string "DMA_CFG5_PSIZE ((uint16_t)0x0300)" +.LASF340: + .string "RT_USING_CONSOLE " +.LASF4269: + .string "RB_UIF_BUS_RST 0x01" +.LASF307: + .string "__riscv_muldiv 1" +.LASF3907: + .string "I2S_Standard_MSB ((uint16_t)0x0010)" +.LASF524: + .string "RT_DEVICE_CTRL_BLK_AUTOREFRESH 0x13" +.LASF1899: + .string "DMA_CFG4_CIRC ((uint16_t)0x0020)" +.LASF512: + .string "RT_DEVICE_OFLAG_MASK 0xf0f" +.LASF4146: + .string "TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers" +.LASF4762: + .string "pEP3_RAM_Addr" +.LASF3073: + .string "TIM_CC2NE ((uint16_t)0x0040)" +.LASF3937: + .string "SPI_I2S_IT_TXE ((uint8_t)0x71)" +.LASF4537: + .string "DEV_TYPE_UNKNOW 0xFF" +.LASF459: + .string "RT_TIMER_CTRL_SET_TIME 0x0" +.LASF3203: + .string "WWDG_STATR_EWIF ((uint8_t)0x01)" +.LASF2013: + .string "EXTI_EVENR_MR6 ((uint32_t)0x00000040)" +.LASF3340: + .string "BKP_DR36 ((uint16_t)0x00A4)" +.LASF2734: + .string "RCC_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000)" +.LASF1817: + .string "DMA_CTCIF2 ((uint32_t)0x00000020)" +.LASF697: + .string "__GNUCLIKE_BUILTIN_VARARGS 1" +.LASF3643: + .string "I2C_Register_OADDR1 ((uint8_t)0x08)" +.LASF4720: + .string "I2C1_EV_IRQn" +.LASF720: + .string "__weak_symbol __attribute__((__weak__))" +.LASF449: + .string "RT_ALIGN_DOWN(size,align) ((size) & ~((align) - 1))" +.LASF39: + .string "__CHAR16_TYPE__ short unsigned int" +.LASF1798: + .string "DMA_HTIF4 ((uint32_t)0x00004000)" +.LASF2285: + .string "GPIO_OUTDR_ODR10 ((uint16_t)0x0400)" +.LASF3165: + .string "USART_CTLR3_SCEN ((uint16_t)0x0020)" +.LASF3938: + .string "SPI_I2S_IT_RXNE ((uint8_t)0x60)" +.LASF4101: + .string "TIM_OCFast_Enable ((uint16_t)0x0004)" +.LASF104: + .string "__UINT16_MAX__ 0xffff" +.LASF1628: + .string "ADC_SQ3_4 ((uint32_t)0x00004000)" +.LASF1488: + .string "ADC_SMP15 ((uint32_t)0x00038000)" +.LASF483: + .string "RT_THREAD_CTRL_INFO 0x03" +.LASF4513: + .string "EP1_GetINSta() (R8_UEP1_CTRL&UEP_T_RES_NAK)" +.LASF3087: + .string "TIM_CCR2 ((uint16_t)0xFFFF)" +.LASF1951: + .string "DMA_CFG7_TEIE ((uint16_t)0x0008)" +.LASF251: + .string "__FLT64X_MAX_EXP__ 16384" +.LASF3933: + .string "SPI_CRC_Tx ((uint8_t)0x00)" +.LASF1497: + .string "ADC_SMP17_0 ((uint32_t)0x00200000)" +.LASF2721: + .string "RCC_ADCPRE_DIV4 ((uint32_t)0x00004000)" +.LASF3326: + .string "BKP_DR22 ((uint16_t)0x006C)" +.LASF850: + .string "_REENT_RAND48_ADD(ptr) ((ptr)->_new._reent._r48._add)" +.LASF4276: + .string "UIS_TOKEN_OUT 0x00" +.LASF2119: + .string "FLASH_STATR_EOP ((uint8_t)0x20)" +.LASF2957: + .string "TIM_ETPS_1 ((uint16_t)0x2000)" +.LASF1498: + .string "ADC_SMP17_1 ((uint32_t)0x00400000)" +.LASF3: + .string "__STDC_UTF_32__ 1" +.LASF1406: + .string "DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)" +.LASF559: + .string "_FVWRITE_IN_STREAMIO 1" +.LASF3119: + .string "TIM_DBL_4 ((uint16_t)0x1000)" +.LASF2545: + .string "AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010)" +.LASF566: + .string "__OBSOLETE_MATH_DEFAULT 1" +.LASF2999: + .string "TIM_OC1PE ((uint16_t)0x0008)" +.LASF4226: + .string "RB_UD_DP_PIN 0x20" +.LASF3708: + .string "I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084)" +.LASF1619: + .string "ADC_SQ2_1 ((uint32_t)0x00000040)" +.LASF3380: + .string "DMA_M2M_Disable ((uint32_t)0x00000000)" +.LASF3417: + .string "DMA2_IT_TC2 ((uint32_t)0x10000020)" +.LASF474: + .string "RT_THREAD_STAT_YIELD_MASK RT_THREAD_STAT_YIELD" +.LASF2445: + .string "AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004)" +.LASF458: + .string "RT_TIMER_FLAG_SOFT_TIMER 0x4" +.LASF3568: + .string "GPIO_Pin_5 ((uint16_t)0x0020)" +.LASF4603: + .string "_size" +.LASF1784: + .string "DMA_GIF1 ((uint32_t)0x00000001)" +.LASF410: + .string "__va_copy(d,s) __builtin_va_copy(d,s)" +.LASF2432: + .string "AFIO_PCFR1_SWJ_CFG_2 ((uint32_t)0x04000000)" +.LASF696: + .string "__GNUCLIKE_BUILTIN_CONSTANT_P 1" +.LASF3808: + .string "RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)" +.LASF969: + .string "SCHED_RR 2" +.LASF217: + .string "__FLT64_HAS_INFINITY__ 1" +.LASF946: + .string "_FSBLKCNT_T_DECLARED " +.LASF157: + .string "__FLT_EPSILON__ 1.19209289550781250000000000000000000e-7F" +.LASF1199: + .string "__int_least8_t_defined 1" +.LASF232: + .string "__FLT128_HAS_QUIET_NAN__ 1" +.LASF1484: + .string "ADC_SMP14 ((uint32_t)0x00007000)" +.LASF3527: + .string "FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000)" +.LASF714: + .string "__CONCAT(x,y) __CONCAT1(x,y)" +.LASF3216: + .string "EXTEN_SHORT_WAKE ((uint32_t)0x00008000)" +.LASF1353: + .string "EXTEN_BASE ((uint32_t)0x40023800)" +.LASF1961: + .string "DMA_CFG7_MSIZE_1 ((uint16_t)0x0800)" +.LASF1974: + .string "DMA_PADDR2_PA ((uint32_t)0xFFFFFFFF)" +.LASF616: + .string "___int_least32_t_defined 1" +.LASF1074: + .string "FREAD _FREAD" +.LASF3010: + .string "TIM_OC2M ((uint16_t)0x7000)" +.LASF3888: + .string "SPI_CPHA_1Edge ((uint16_t)0x0000)" +.LASF4587: + .string "__tm_mday" +.LASF2218: + .string "GPIO_CFGHR_MODE10_1 ((uint32_t)0x00000200)" +.LASF325: + .string "RT_USING_IDLE_HOOK " +.LASF1689: + .string "BKP_DATAR10_D ((uint16_t)0xFFFF)" +.LASF3403: + .string "DMA1_IT_TE5 ((uint32_t)0x00080000)" +.LASF3198: + .string "WWDG_CFGR_W6 ((uint16_t)0x0040)" +.LASF4149: + .string "__CH32V10x_USART_H " +.LASF2395: + .string "AFIO_PCFR1_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010)" +.LASF3657: + .string "I2C_IT_EVT ((uint16_t)0x0200)" +.LASF4294: + .string "RB_UEP2_RX_EN 0x08" +.LASF4528: + .string "ERR_USB_UNKNOWN 0xFE" +.LASF2529: + .string "AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000)" +.LASF413: + .string "_VA_LIST_DEFINED " +.LASF967: + .string "SCHED_OTHER 0" +.LASF1837: + .string "DMA_CTCIF7 ((uint32_t)0x02000000)" +.LASF4009: + .string "TIM_ICPSC_DIV1 ((uint16_t)0x0000)" +.LASF4228: + .string "RB_UD_LOW_SPEED 0x04" +.LASF4654: + .string "_localtime_buf" +.LASF1365: + .string "IWDG ((IWDG_TypeDef *) IWDG_BASE)" +.LASF4230: + .string "RB_UD_PORT_EN 0x01" +.LASF1266: + .string "INTMAX_C(x) __INTMAX_C(x)" +.LASF1872: + .string "DMA_CFGR2_PL ((uint16_t)0x3000)" +.LASF1548: + .string "ADC_SQ13_1 ((uint32_t)0x00000002)" +.LASF3319: + .string "BKP_DR15 ((uint16_t)0x0050)" +.LASF684: + .string "__ptrvalue " +.LASF4013: + .string "TIM_IT_Update ((uint16_t)0x0001)" +.LASF2645: + .string "PWR_CTLR_PVDE ((uint16_t)0x0010)" +.LASF2654: + .string "PWR_CTLR_PLS_2V6 ((uint16_t)0x0080)" +.LASF2182: + .string "GPIO_CFGLR_MODE7_0 ((uint32_t)0x10000000)" +.LASF3501: + .string "__CH32V10x_FLASH_H " +.LASF488: + .string "RT_IPC_CMD_RESET 0x01" +.LASF2128: + .string "FLASH_CTLR_ERRIE ((uint16_t)0x0400)" +.LASF3338: + .string "BKP_DR34 ((uint16_t)0x009C)" +.LASF4805: + .string "GNU C17 8.2.0 -march=rv32imac -mabi=ilp32 -msmall-data-limit= 8 -mno-save-restore -g3 -Os -O -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections" +.LASF2535: + .string "AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00)" +.LASF2468: + .string "AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000)" +.LASF914: + .string "__bswap64(_x) __builtin_bswap64(_x)" +.LASF4298: + .string "RB_UH_EP_TX_EN 0x40" +.LASF2719: + .string "RCC_ADCPRE_1 ((uint32_t)0x00008000)" +.LASF2571: + .string "IWDG_PVU ((uint8_t)0x01)" +.LASF1178: + .string "signed +0" +.LASF538: + .string "RTGRAPHIC_CTRL_GET_STATUS 9" +.LASF3541: + .string "FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000)" +.LASF1913: + .string "DMA_CFG5_TCIE ((uint16_t)0x0002)" +.LASF2604: + .string "I2C_OADDR1_ADD3 ((uint16_t)0x0008)" +.LASF1887: + .string "DMA_CFGR3_MSIZE ((uint16_t)0x0C00)" +.LASF2550: + .string "AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060)" +.LASF4202: + .string "USART_FLAG_FE ((uint16_t)0x0002)" +.LASF1983: + .string "DMA_MADDR4_MA ((uint32_t)0xFFFFFFFF)" +.LASF4292: + .string "RB_UEP3_TX_EN 0x40" +.LASF3494: + .string "EXTI_Line13 ((uint32_t)0x02000)" +.LASF110: + .string "__INT_LEAST16_MAX__ 0x7fff" +.LASF3636: + .string "I2C_Ack_Disable ((uint16_t)0x0000)" +.LASF106: + .string "__UINT64_MAX__ 0xffffffffffffffffULL" +.LASF3943: + .string "I2S_IT_UDR ((uint8_t)0x53)" +.LASF4144: + .string "TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers" +.LASF275: + .string "__DEC128_MANT_DIG__ 34" +.LASF948: + .string "_INO_T_DECLARED " +.LASF2131: + .string "FLASH_CTLR_PAGE_ER ((uint16_t)0x00020000)" +.LASF525: + .string "RT_DEVICE_CTRL_NETIF_GETMAC 0x10" +.LASF615: + .string "___int_least16_t_defined 1" +.LASF1053: + .string "_FSYNC 0x2000" +.LASF4480: + .string "USB_ENDP_TYPE_ISOCH 0x01" +.LASF1566: + .string "ADC_SQ16_1 ((uint32_t)0x00010000)" +.LASF891: + .string "_INT32_T_DECLARED " +.LASF3604: + .string "GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800)" +.LASF1727: + .string "BKP_TPAL ((uint8_t)0x02)" +.LASF1592: + .string "ADC_SQ9_4 ((uint32_t)0x00004000)" +.LASF4592: + .string "__tm_isdst" +.LASF4010: + .string "TIM_ICPSC_DIV2 ((uint16_t)0x0004)" +.LASF890: + .string "__int16_t_defined 1" +.LASF1810: + .string "DMA_HTIF7 ((uint32_t)0x04000000)" +.LASF3879: + .string "SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)" +.LASF351: + .string "FINSH_HISTORY_LINES 5" +.LASF3212: + .string "EXTEN_ULLDO_TRIM0 ((uint32_t)0x00000100)" +.LASF3275: + .string "ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000)" +.LASF3852: + .string "RCC_MCO_HSI ((uint8_t)0x05)" +.LASF1705: + .string "BKP_DATAR26_D ((uint16_t)0xFFFF)" +.LASF1364: + .string "WWDG ((WWDG_TypeDef *) WWDG_BASE)" +.LASF3430: + .string "DMA2_IT_HT5 ((uint32_t)0x10040000)" +.LASF1845: + .string "DMA_CFGR1_CIRC ((uint16_t)0x0020)" +.LASF1911: + .string "DMA_CFG4_MEM2MEM ((uint16_t)0x4000)" +.LASF3674: + .string "I2C_FLAG_SMBHOST ((uint32_t)0x00400000)" +.LASF870: + .string "_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }" +.LASF4092: + .string "TIM_EventSource_CC3 ((uint16_t)0x0008)" +.LASF694: + .string "__GNUCLIKE___SECTION 1" +.LASF1276: + .string "NVIC_KEY2 ((uint32_t)0xBCAF0000)" +.LASF1827: + .string "DMA_CTEIF4 ((uint32_t)0x00008000)" +.LASF3770: + .string "RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)" +.LASF1536: + .string "ADC_SMP9 ((uint32_t)0x38000000)" +.LASF462: + .string "RT_TIMER_CTRL_SET_PERIODIC 0x3" +.LASF1215: + .string "UINT_LEAST8_MAX (__UINT_LEAST8_MAX__)" +.LASF4494: + .string "USB_BO_CSW_SIG2 0x42" +.LASF2145: + .string "FLASH_USER_USER ((uint32_t)0x00FF0000)" +.LASF763: + .string "__RCSID(s) struct __hack" +.LASF2733: + .string "RCC_PLLXTPRE_HSE ((uint32_t)0x00000000)" +.LASF3804: + .string "RCC_APB2Periph_AFIO ((uint32_t)0x00000001)" +.LASF3873: + .string "RTC_FLAG_RSF ((uint16_t)0x0008)" +.LASF3617: + .string "GPIO_PinSource4 ((uint8_t)0x04)" +.LASF3564: + .string "GPIO_Pin_1 ((uint16_t)0x0002)" +.LASF665: + .string "_BSD_WCHAR_T_" +.LASF4724: + .string "SPI1_IRQn" +.LASF2356: + .string "AFIO_ECR_PIN ((uint8_t)0x0F)" +.LASF3324: + .string "BKP_DR20 ((uint16_t)0x0064)" +.LASF4088: + .string "TIM_EncoderMode_TI12 ((uint16_t)0x0003)" +.LASF1802: + .string "DMA_HTIF5 ((uint32_t)0x00040000)" +.LASF1511: + .string "ADC_SMP2_2 ((uint32_t)0x00000100)" +.LASF3029: + .string "TIM_IC2F_2 ((uint16_t)0x4000)" +.LASF3028: + .string "TIM_IC2F_1 ((uint16_t)0x2000)" +.LASF3213: + .string "EXTEN_ULLDO_TRIM1 ((uint32_t)0x00000200)" +.LASF1823: + .string "DMA_CTEIF3 ((uint32_t)0x00000800)" +.LASF2293: + .string "GPIO_BSHR_BS2 ((uint32_t)0x00000004)" +.LASF72: + .string "__SHRT_MAX__ 0x7fff" +.LASF4071: + .string "TIM_TS_ITR2 ((uint16_t)0x0020)" +.LASF1972: + .string "DMA_CNTR7_NDT ((uint16_t)0xFFFF)" +.LASF3307: + .string "BKP_DR3 ((uint16_t)0x000C)" +.LASF3689: + .string "I2C_FLAG_STOPF ((uint32_t)0x10000010)" +.LASF1444: + .string "ADC_DUALMOD_1 ((uint32_t)0x00020000)" +.LASF4421: + .string "USB_REQ_TYP_VENDOR 0x40" +.LASF4206: + .string "WWDG_Prescaler_2 ((uint32_t)0x00000080)" +.LASF2081: + .string "EXTI_SWIEVR_SWIEVR14 ((uint32_t)0x00004000)" +.LASF1344: + .string "DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C)" +.LASF2538: + .string "AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001)" +.LASF3767: + .string "RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)" +.LASF3288: + .string "ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)" +.LASF3158: + .string "USART_CTLR2_STOP_1 ((uint16_t)0x2000)" +.LASF2971: + .string "TIM_CC3DE ((uint16_t)0x0800)" +.LASF859: + .string "_REENT_MBLEN_STATE(ptr) ((ptr)->_new._reent._mblen_state)" +.LASF3335: + .string "BKP_DR31 ((uint16_t)0x0090)" +.LASF2919: + .string "TIM_CMS ((uint16_t)0x0060)" +.LASF1160: + .string "LOAD lw" +.LASF4749: + .string "IACTR" +.LASF75: + .string "__LONG_LONG_MAX__ 0x7fffffffffffffffLL" +.LASF3824: + .string "RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)" +.LASF86: + .string "__LONG_LONG_WIDTH__ 64" +.LASF4195: + .string "USART_FLAG_LBD ((uint16_t)0x0100)" +.LASF2379: + .string "AFIO_ECR_PORT_1 ((uint8_t)0x20)" +.LASF46: + .string "__UINT8_TYPE__ unsigned char" +.LASF1491: + .string "ADC_SMP15_2 ((uint32_t)0x00020000)" +.LASF3685: + .string "I2C_FLAG_ARLO ((uint32_t)0x10000200)" +.LASF108: + .string "__INT8_C(c) c" +.LASF1192: + .string "__FAST16 " +.LASF1643: + .string "ADC_SQ6_1 ((uint32_t)0x04000000)" +.LASF4423: + .string "USB_REQ_RECIP_MASK 0x1F" +.LASF130: + .string "__INT_FAST16_WIDTH__ 32" +.LASF1352: + .string "DBGMCU_BASE ((uint32_t)0xE000D000)" +.LASF1324: + .string "SPI1_BASE (APB2PERIPH_BASE + 0x3000)" +.LASF2280: + .string "GPIO_OUTDR_ODR5 ((uint16_t)0x0020)" +.LASF132: + .string "__INT_FAST32_WIDTH__ 32" +.LASF2483: + .string "AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030)" +.LASF4128: + .string "TIM_FLAG_CC2OF ((uint16_t)0x0400)" +.LASF783: + .string "__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))" +.LASF2967: + .string "TIM_BIE ((uint16_t)0x0080)" +.LASF4707: + .string "DMA1_Channel4_IRQn" +.LASF290: + .string "__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2" +.LASF2985: + .string "TIM_CC3OF ((uint16_t)0x0800)" +.LASF1794: + .string "DMA_HTIF3 ((uint32_t)0x00000400)" +.LASF4358: + .string "RB_UH_R_RES 0x04" +.LASF3359: + .string "DBGMCU_STANDBY ((uint32_t)0x00000004)" +.LASF4083: + .string "TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)" +.LASF2499: + .string "AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000)" +.LASF1220: + .string "INT_LEAST16_MAX (__INT_LEAST16_MAX__)" +.LASF241: + .string "__FLT32X_MIN__ 2.22507385850720138309023271733240406e-308F32x" +.LASF226: + .string "__FLT128_MAX__ 1.18973149535723176508575932662800702e+4932F128" +.LASF4086: + .string "TIM_EncoderMode_TI1 ((uint16_t)0x0001)" +.LASF2508: + .string "AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003)" +.LASF78: + .string "__WINT_MAX__ 0xffffffffU" +.LASF503: + .string "RT_DEVICE_FLAG_INT_RX 0x100" +.LASF924: + .string "fd_set _types_fd_set" +.LASF2210: + .string "GPIO_CFGHR_MODE8 ((uint32_t)0x00000003)" +.LASF4191: + .string "USART_LINBreakDetectLength_11b ((uint16_t)0x0020)" +.LASF101: + .string "__INT32_MAX__ 0x7fffffffL" +.LASF1070: + .string "FASYNC _FASYNC" +.LASF1463: + .string "ADC_EXTSEL_2 ((uint32_t)0x00080000)" +.LASF4049: + .string "TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)" +.LASF756: + .string "__printf0like(fmtarg,firstvararg) " +.LASF4147: + .string "TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers" +.LASF584: + .string "__MISC_VISIBLE 1" +.LASF2238: + .string "GPIO_CFGHR_CNF9 ((uint32_t)0x000000C0)" +.LASF2046: + .string "EXTI_RTENR_TR19 ((uint32_t)0x00080000)" +.LASF4370: + .string "R32_USB_EP5_CTRL (*((PUINT32V)(0x40023444)))" +.LASF1340: + .string "DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C)" +.LASF3497: + .string "EXTI_Line16 ((uint32_t)0x10000)" +.LASF3485: + .string "EXTI_Line4 ((uint32_t)0x00010)" +.LASF3078: + .string "TIM_CC3NP ((uint16_t)0x0800)" +.LASF1064: + .string "O_EXCL _FEXCL" +.LASF3235: + .string "ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000)" +.LASF4631: + .string "__cleanup" +.LASF640: + .string "_BSD_SIZE_T_ " +.LASF3956: + .string "TIM_OCMode_Toggle ((uint16_t)0x0030)" +.LASF482: + .string "RT_THREAD_CTRL_CHANGE_PRIORITY 0x02" +.LASF4726: + .string "USART1_IRQn" +.LASF2434: + .string "AFIO_PCFR1_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000)" +.LASF1690: + .string "BKP_DATAR11_D ((uint16_t)0xFFFF)" +.LASF4662: + .string "_signal_buf" +.LASF2070: + .string "EXTI_SWIEVR_SWIEVR3 ((uint32_t)0x00000008)" +.LASF2094: + .string "EXTI_INTF_INTF7 ((uint32_t)0x00000080)" +.LASF3514: + .string "FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020)" +.LASF43: + .string "__INT16_TYPE__ short int" +.LASF917: + .string "__ntohl(_x) __bswap32(_x)" +.LASF1023: + .string "S_IRWXO (S_IROTH | S_IWOTH | S_IXOTH)" +.LASF2368: + .string "AFIO_ECR_PIN_PX7 ((uint8_t)0x07)" +.LASF3552: + .string "FLASH_IT_BANK1_EOP FLASH_IT_EOP" +.LASF3493: + .string "EXTI_Line12 ((uint32_t)0x01000)" +.LASF4237: + .string "RB_UH_PORT_EN 0x01" +.LASF4337: + .string "UEP_R_RES_NAK 0x08" +.LASF4250: + .string "R32_USB_STATUS (*((PUINT32V)(0x40023404)))" +.LASF1495: + .string "ADC_SMP16_2 ((uint32_t)0x00100000)" +.LASF753: + .string "__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))" +.LASF4581: + .string "_wds" +.LASF3567: + .string "GPIO_Pin_4 ((uint16_t)0x0010)" +.LASF2587: + .string "I2C_CTLR2_FREQ ((uint16_t)0x003F)" +.LASF531: + .string "RTGRAPHIC_CTRL_POWEROFF 2" +.LASF1206: + .string "__int_fast64_t_defined 1" +.LASF3822: + .string "RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)" +.LASF1333: + .string "TIM11_BASE (APB2PERIPH_BASE + 0x5400)" +.LASF3461: + .string "DMA2_FLAG_TC1 ((uint32_t)0x10000002)" +.LASF622: + .string "_PTRDIFF_T " +.LASF3582: + .string "GPIO_Remap_USART1 ((uint32_t)0x00000004)" +.LASF2148: + .string "FLASH_Data0_nData0 ((uint32_t)0x0000FF00)" +.LASF662: + .string "__INT_WCHAR_T_H " +.LASF3062: + .string "TIM_IC4F ((uint16_t)0xF000)" +.LASF2229: + .string "GPIO_CFGHR_MODE14_0 ((uint32_t)0x01000000)" +.LASF1304: + .string "USART3_BASE (APB1PERIPH_BASE + 0x4800)" +.LASF4025: + .string "TIM_DMABase_SR ((uint16_t)0x0004)" +.LASF2150: + .string "FLASH_Data1_nData1 ((uint32_t)0xFF000000)" +.LASF861: + .string "_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)" +.LASF303: + .string "__riscv_compressed 1" +.LASF631: + .string "__need_ptrdiff_t" +.LASF564: + .string "__SYS_CONFIG_H__ " +.LASF3262: + .string "ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)" +.LASF1789: + .string "DMA_TCIF2 ((uint32_t)0x00000020)" +.LASF2048: + .string "EXTI_FTENR_TR1 ((uint32_t)0x00000002)" +.LASF3572: + .string "GPIO_Pin_9 ((uint16_t)0x0200)" +.LASF569: + .string "__GNUC_PREREQ(maj,min) ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min))" +.LASF4363: + .string "R8_UH_TX_CTRL R8_UEP3_CTRL" +.LASF1884: + .string "DMA_CFGR3_PSIZE ((uint16_t)0x0300)" +.LASF1646: + .string "ADC_SQ6_4 ((uint32_t)0x20000000)" +.LASF77: + .string "__WCHAR_MIN__ (-__WCHAR_MAX__ - 1)" +.LASF3260: + .string "ADC_Channel_17 ((uint8_t)0x11)" +.LASF2249: + .string "GPIO_CFGHR_CNF12_1 ((uint32_t)0x00080000)" +.LASF4359: + .string "R32_USB_EP3_CTRL (*((PUINT32V)(0x4002343c)))" +.LASF1047: + .string "_FSHLOCK 0x0080" +.LASF3716: + .string "IWDG_Prescaler_16 ((uint8_t)0x02)" +.LASF2946: + .string "TIM_TS_0 ((uint16_t)0x0010)" +.LASF227: + .string "__FLT128_MIN__ 3.36210314311209350626267781732175260e-4932F128" +.LASF715: + .string "__STRING(x) #x" +.LASF1788: + .string "DMA_GIF2 ((uint32_t)0x00000010)" +.LASF1284: + .string "SRAM_BASE ((uint32_t)0x20000000)" +.LASF4129: + .string "TIM_FLAG_CC3OF ((uint16_t)0x0800)" +.LASF155: + .string "__FLT_MAX__ 3.40282346638528859811704183484516925e+38F" +.LASF540: + .string "rt_graphix_ops(device) ((struct rt_device_graphic_ops *)(device->user_data))" +.LASF3271: + .string "ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000)" +.LASF2239: + .string "GPIO_CFGHR_CNF9_0 ((uint32_t)0x00000040)" +.LASF897: + .string "_INTMAX_T_DECLARED " +.LASF3645: + .string "I2C_Register_DATAR ((uint8_t)0x10)" +.LASF112: + .string "__INT_LEAST16_WIDTH__ 16" +.LASF4051: + .string "TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)" +.LASF2546: + .string "AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020)" +.LASF742: + .string "__restrict restrict" +.LASF1030: + .string "S_ISBLK(m) (((m)&_IFMT) == _IFBLK)" +.LASF4379: + .string "__USB_TYPE__ " +.LASF3959: + .string "TIM_OPMode_Single ((uint16_t)0x0008)" +.LASF4398: + .string "USB_SET_CONFIGURATION 0x09" +.LASF885: + .string "_INT8_T_DECLARED " +.LASF1829: + .string "DMA_CTCIF5 ((uint32_t)0x00020000)" +.LASF3188: + .string "WWDG_CTLR_T5 ((uint8_t)0x20)" +.LASF2448: + .string "AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000)" +.LASF748: + .string "__offsetof(type,field) offsetof(type, field)" +.LASF1360: + .string "TIM12 ((TIM_TypeDef *) TIM12_BASE)" +.LASF1131: + .string "rt_slist_entry(node,type,member) rt_container_of(node, type, member)" +.LASF3710: + .string "I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400)" +.LASF4658: + .string "_mblen_state" +.LASF3466: + .string "DMA2_FLAG_HT2 ((uint32_t)0x10000040)" +.LASF3113: + .string "TIM_DBA_4 ((uint16_t)0x0010)" +.LASF3046: + .string "TIM_OC4M ((uint16_t)0x7000)" +.LASF1611: + .string "ADC_SQ1 ((uint32_t)0x0000001F)" +.LASF825: + .string "_RAND48_SEED_0 (0x330e)" +.LASF2423: + .string "AFIO_PCFR1_PD01_REMAP ((uint32_t)0x00008000)" +.LASF670: + .string "offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)" +.LASF1496: + .string "ADC_SMP17 ((uint32_t)0x00E00000)" +.LASF1716: + .string "BKP_DATAR37_D ((uint16_t)0xFFFF)" +.LASF4797: + .string "parameter" +.LASF643: + .string "_BSD_SIZE_T_DEFINED_ " +.LASF2246: + .string "GPIO_CFGHR_CNF11_1 ((uint32_t)0x00008000)" +.LASF4516: + .string "EP4_GetINSta() (R8_UEP4_CTRL&UEP_T_RES_NAK)" +.LASF4258: + .string "RB_UMS_DM_LEVEL 0x02" +.LASF4042: + .string "TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)" +.LASF3251: + .string "ADC_Channel_8 ((uint8_t)0x08)" +.LASF4694: + .string "PVD_IRQn" +.LASF3204: + .string "EXTEN_USBD_LS ((uint32_t)0x00000001)" +.LASF1894: + .string "DMA_CFG4_EN ((uint16_t)0x0001)" +.LASF1004: + .string "S_IWRITE 0000200" +.LASF1649: + .string "ADC_JSQ1_1 ((uint32_t)0x00000002)" +.LASF3192: + .string "WWDG_CFGR_W0 ((uint16_t)0x0001)" +.LASF1020: + .string "S_IRGRP 0000040" +.LASF1806: + .string "DMA_HTIF6 ((uint32_t)0x00400000)" +.LASF4684: + .string "finsh_syscall" +.LASF2580: + .string "I2C_CTLR1_START ((uint16_t)0x0100)" +.LASF746: + .string "__exported __attribute__((__visibility__(\"default\")))" +.LASF2869: + .string "SPI_CTLR1_SPE ((uint16_t)0x0040)" +.LASF2317: + .string "GPIO_BSHR_BR10 ((uint32_t)0x04000000)" +.LASF1370: + .string "UART4 ((USART_TypeDef *) UART4_BASE)" +.LASF184: + .string "__LDBL_MAX__ 1.18973149535723176508575932662800702e+4932L" +.LASF3618: + .string "GPIO_PinSource5 ((uint8_t)0x05)" +.LASF282: + .string "__REGISTER_PREFIX__ " +.LASF3178: + .string "USART_GPR_PSC_5 ((uint16_t)0x0020)" +.LASF938: + .string "_BLKCNT_T_DECLARED " +.LASF1671: + .string "ADC_JL ((uint32_t)0x00300000)" +.LASF378: + .string "RT_DEBUG_IRQ 0" +.LASF1063: + .string "O_TRUNC _FTRUNC" +.LASF2193: + .string "GPIO_CFGLR_CNF2_1 ((uint32_t)0x00000800)" +.LASF4153: + .string "USART_StopBits_0_5 ((uint16_t)0x1000)" +.LASF134: + .string "__INT_FAST64_WIDTH__ 64" +.LASF1809: + .string "DMA_TCIF7 ((uint32_t)0x02000000)" +.LASF2473: + .string "AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000)" +.LASF3075: + .string "TIM_CC3E ((uint16_t)0x0100)" +.LASF2558: + .string "AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000)" +.LASF3790: + .string "RCC_LSE_OFF ((uint8_t)0x00)" +.LASF61: + .string "__INT_FAST64_TYPE__ long long int" +.LASF740: + .string "__returns_twice __attribute__((__returns_twice__))" +.LASF2755: + .string "RCC_MCO_NOCLOCK ((uint32_t)0x00000000)" +.LASF4444: + .string "HUB_PORT_POWER 8" +.LASF4618: + .string "_lock" +.LASF4679: + .string "_timezone" +.LASF99: + .string "__INT8_MAX__ 0x7f" +.LASF771: + .string "_Nullable " +.LASF4089: + .string "TIM_EventSource_Update ((uint16_t)0x0001)" +.LASF3930: + .string "SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)" +.LASF1367: + .string "SPI3 ((SPI_TypeDef *) SPI3_BASE)" +.LASF2176: + .string "GPIO_CFGLR_MODE5_0 ((uint32_t)0x00100000)" +.LASF2162: + .string "GPIO_CFGLR_MODE0_1 ((uint32_t)0x00000002)" +.LASF3267: + .string "ADC_SampleTime_41Cycles5 ((uint8_t)0x04)" +.LASF3453: + .string "DMA1_FLAG_TC6 ((uint32_t)0x00200000)" +.LASF2442: + .string "AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001)" +.LASF901: + .string "__MACHINE_ENDIAN_H__ " +.LASF2503: + .string "AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00)" +.LASF790: + .string "__guarded_by(x) __lock_annotate(guarded_by(x))" +.LASF2021: + .string "EXTI_EVENR_MR14 ((uint32_t)0x00004000)" +.LASF2760: + .string "RCC_LSIRDYF ((uint32_t)0x00000001)" +.LASF728: + .string "__alloc_size(x) __attribute__((__alloc_size__ x))" +.LASF3126: + .string "USART_STATR_RXNE ((uint16_t)0x0020)" +.LASF1049: + .string "_FCREAT 0x0200" +.LASF1864: + .string "DMA_CFGR2_PINC ((uint16_t)0x0040)" +.LASF2409: + .string "AFIO_PCFR1_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300)" +.LASF3332: + .string "BKP_DR28 ((uint16_t)0x0084)" +.LASF55: + .string "__UINT_LEAST16_TYPE__ short unsigned int" +.LASF3909: + .string "I2S_Standard_PCMShort ((uint16_t)0x0030)" +.LASF3955: + .string "TIM_OCMode_Inactive ((uint16_t)0x0020)" +.LASF713: + .string "__CONCAT1(x,y) x ## y" +.LASF3309: + .string "BKP_DR5 ((uint16_t)0x0014)" +.LASF2087: + .string "EXTI_INTF_INTF0 ((uint32_t)0x00000001)" +.LASF2727: + .string "RCC_PLLMULL_0 ((uint32_t)0x00040000)" +.LASF3167: + .string "USART_CTLR3_DMAT ((uint16_t)0x0080)" +.LASF841: + .string "_REENT_CHECK_TM(ptr) " +.LASF3477: + .string "DMA2_FLAG_TC5 ((uint32_t)0x10020000)" +.LASF4329: + .string "RB_UEP_R_TOG 0x80" +.LASF4619: + .string "_mbstate" +.LASF3292: + .string "ADC_IT_JEOC ((uint16_t)0x0480)" +.LASF1441: + .string "ADC_DISCNUM_2 ((uint32_t)0x00008000)" +.LASF1433: + .string "ADC_SCAN ((uint32_t)0x00000100)" +.LASF2421: + .string "AFIO_PCFR1_CAN_REMAP_REMAP2 ((uint32_t)0x00004000)" +.LASF3934: + .string "SPI_CRC_Rx ((uint8_t)0x01)" +.LASF4194: + .string "USART_FLAG_CTS ((uint16_t)0x0200)" +.LASF4788: + .string "rt_interrupt_to_thread" +.LASF2416: + .string "AFIO_PCFR1_TIM4_REMAP ((uint32_t)0x00001000)" +.LASF3595: + .string "GPIO_Remap2_CAN1 ((uint32_t)0x001D6000)" +.LASF3692: + .string "I2C_FLAG_ADDR ((uint32_t)0x10000002)" +.LASF1889: + .string "DMA_CFGR3_MSIZE_1 ((uint16_t)0x0800)" +.LASF3328: + .string "BKP_DR24 ((uint16_t)0x0074)" +.LASF2601: + .string "I2C_OADDR1_ADD0 ((uint16_t)0x0001)" +.LASF4510: + .string "pEP6_IN_DataBuf (pEP6_RAM_Addr+64)" +.LASF1830: + .string "DMA_CHTIF5 ((uint32_t)0x00040000)" +.LASF423: + .string "INIT_EXPORT(fn,level) RT_USED const init_fn_t __rt_init_ ##fn RT_SECTION(\".rti_fn.\" level) = fn" +.LASF2504: + .string "AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000)" +.LASF2948: + .string "TIM_TS_2 ((uint16_t)0x0040)" +.LASF1286: + .string "APB1PERIPH_BASE (PERIPH_BASE)" +.LASF3452: + .string "DMA1_FLAG_GL6 ((uint32_t)0x00100000)" +.LASF2932: + .string "TIM_MMS_2 ((uint16_t)0x0040)" +.LASF4371: + .string "R8_UEP5_T_LEN (*((PUINT8V)(0x40023444)))" +.LASF630: + .string "_PTRDIFF_T_DECLARED " +.LASF403: + .string "_ANSI_STDARG_H_ " +.LASF846: + .string "_REENT_SIGNGAM(ptr) ((ptr)->_new._reent._gamma_signgam)" +.LASF1213: + .string "INT_LEAST8_MIN (-__INT_LEAST8_MAX__ - 1)" +.LASF244: + .string "__FLT32X_HAS_DENORM__ 1" +.LASF3357: + .string "DBGMCU_SLEEP ((uint32_t)0x00000001)" +.LASF4402: + .string "HUB_GET_STATUS 0x00" +.LASF4567: + .string "_off_t" +.LASF1799: + .string "DMA_TEIF4 ((uint32_t)0x00008000)" +.LASF1551: + .string "ADC_SQ13_4 ((uint32_t)0x00000010)" +.LASF523: + .string "RT_DEVICE_CTRL_BLK_ERASE 0x12" +.LASF2085: + .string "EXTI_SWIEVR_SWIEVR18 ((uint32_t)0x00040000)" +.LASF3257: + .string "ADC_Channel_14 ((uint8_t)0x0E)" +.LASF196: + .string "__FLT32_MAX_10_EXP__ 38" +.LASF481: + .string "RT_THREAD_CTRL_CLOSE 0x01" +.LASF992: + .string "_IFDIR 0040000" +.LASF1711: + .string "BKP_DATAR32_D ((uint16_t)0xFFFF)" +.LASF2295: + .string "GPIO_BSHR_BS4 ((uint32_t)0x00000010)" +.LASF3015: + .string "TIM_IC1PSC ((uint16_t)0x000C)" +.LASF2311: + .string "GPIO_BSHR_BR4 ((uint32_t)0x00100000)" +.LASF199: + .string "__FLT32_MIN__ 1.17549435082228750796873653722224568e-38F32" +.LASF541: + .string "RTLIBC_H__ " +.LASF3654: + .string "I2C_NACKPosition_Next ((uint16_t)0x0800)" +.LASF3218: + .string "EXTEN_FLASH_CLK_TRIM0 ((uint32_t)0x00010000)" +.LASF1550: + .string "ADC_SQ13_3 ((uint32_t)0x00000008)" +.LASF192: + .string "__FLT32_DIG__ 6" +.LASF1769: + .string "DAC_SWTRIG2 ((uint8_t)0x02)" +.LASF3399: + .string "DMA1_IT_TE4 ((uint32_t)0x00008000)" +.LASF291: + .string "__GCC_ATOMIC_SHORT_LOCK_FREE 1" +.LASF4546: + .string "NVIC_PriorityGroup_1 ((uint32_t)0x01)" +.LASF382: + .string "RT_DEBUG_LOG(type,message) do { if (type) rt_kprintf message; } while (0)" +.LASF1051: + .string "_FEXCL 0x0800" +.LASF2294: + .string "GPIO_BSHR_BS3 ((uint32_t)0x00000008)" +.LASF536: + .string "RTGRAPHIC_CTRL_GET_BRIGHTNESS 7" +.LASF1133: + .string "rt_slist_for_each_entry(pos,head,member) for (pos = rt_slist_entry((head)->next, typeof(*pos), member); &pos->member != (RT_NULL); pos = rt_slist_entry(pos->member.next, typeof(*pos), member))" +.LASF2023: + .string "EXTI_EVENR_MR16 ((uint32_t)0x00010000)" +.LASF2412: + .string "AFIO_PCFR1_TIM3_REMAP_1 ((uint32_t)0x00000800)" +.LASF1955: + .string "DMA_CFG7_MINC ((uint16_t)0x0080)" +.LASF2874: + .string "SPI_CTLR1_DFF ((uint16_t)0x0800)" +.LASF4179: + .string "USART_IT_LBD ((uint16_t)0x0846)" +.LASF176: + .string "__LDBL_MANT_DIG__ 113" +.LASF2225: + .string "GPIO_CFGHR_MODE13 ((uint32_t)0x00300000)" +.LASF3021: + .string "TIM_IC1F_2 ((uint16_t)0x0040)" +.LASF2472: + .string "AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000)" +.LASF3576: + .string "GPIO_Pin_13 ((uint16_t)0x2000)" +.LASF3546: + .string "OB_STOP_RST ((uint16_t)0x0000)" +.LASF3362: + .string "DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)" +.LASF2124: + .string "FLASH_CTLR_OPTER ((uint16_t)0x0020)" +.LASF838: + .ascii "_REENT_INIT_PTR_ZEROED(var) { (var)->_stdin = _REENT_STDIO_S" + .ascii "TREAM(var, 0); (var)->_stdout = _REENT_STDIO_STREAM(var, 1);" + .ascii " (var)->_stderr = _REENT_STDIO_STREAM(var, 2); (var)->_new._" + .ascii "reent._rand_next = 1; (var)->_new._reent._r48._seed[0] = _RA" + .ascii "ND48_SEED_0; (var)->_new._reent._r48._seed[1] = _RAND48_S" + .string "EED_1; (var)->_new._reent._r48._seed[2] = _RAND48_SEED_2; (var)->_new._reent._r48._mult[0] = _RAND48_MULT_0; (var)->_new._reent._r48._mult[1] = _RAND48_MULT_1; (var)->_new._reent._r48._mult[2] = _RAND48_MULT_2; (var)->_new._reent._r48._add = _RAND48_ADD; }" +.LASF1010: + .string "S_IFBLK _IFBLK" +.LASF2800: + .string "RCC_USBRST ((uint32_t)0x00800000)" +.LASF3426: + .string "DMA2_IT_HT4 ((uint32_t)0x10004000)" +.LASF4738: + .string "RESERVED0" +.LASF4740: + .string "RESERVED1" +.LASF4742: + .string "RESERVED2" +.LASF4744: + .string "RESERVED3" +.LASF1739: + .string "DAC_TSEL1 ((uint32_t)0x00000038)" +.LASF328: + .string "RT_USING_TIMER_SOFT " +.LASF4750: + .string "RESERVED6" +.LASF4752: + .string "RESERVED7" +.LASF2072: + .string "EXTI_SWIEVR_SWIEVR5 ((uint32_t)0x00000020)" +.LASF1885: + .string "DMA_CFGR3_PSIZE_0 ((uint16_t)0x0100)" +.LASF2758: + .string "RCC_CFGR0_MCO_HSE ((uint32_t)0x06000000)" +.LASF374: + .string "RT_DEBUG_SCHEDULER 0" +.LASF4723: + .string "I2C2_ER_IRQn" +.LASF2387: + .string "AFIO_PCFR1_SPI1_REMAP ((uint32_t)0x00000001)" +.LASF2111: + .string "FLASH_ACTLR_HLFCYA ((uint8_t)0x08)" +.LASF2663: + .string "RCC_HSION ((uint32_t)0x00000001)" +.LASF2685: + .string "RCC_HPRE ((uint32_t)0x000000F0)" +.LASF3096: + .string "TIM_DTG_5 ((uint16_t)0x0020)" +.LASF1193: + .string "__FAST32 " +.LASF2530: + .string "AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000)" +.LASF927: + .string "FD_ISSET(n,p) ((p)->fds_bits[(n)/NFDBITS] & (1L << ((n) % NFDBITS)))" +.LASF67: + .string "__UINTPTR_TYPE__ unsigned int" +.LASF3563: + .string "GPIO_Pin_0 ((uint16_t)0x0001)" +.LASF852: + .string "_REENT_MP_RESULT_K(ptr) ((ptr)->_result_k)" +.LASF4730: + .string "RTCAlarm_IRQn" +.LASF302: + .string "__riscv 1" +.LASF500: + .string "RT_DEVICE_FLAG_ACTIVATED 0x010" +.LASF981: + .string "TIMEVAL_TO_TIMESPEC(tv,ts) do { (ts)->tv_sec = (tv)->tv_sec; (ts)->tv_nsec = (tv)->tv_usec * 1000; } while (0)" +.LASF148: + .string "__FLT_MANT_DIG__ 24" +.LASF677: + .string "__long_double_t long double" +.LASF2626: + .string "I2C_STAR1_PECERR ((uint16_t)0x1000)" +.LASF1029: + .string "DEFFILEMODE (S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH)" +.LASF3768: + .string "RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)" +.LASF3013: + .string "TIM_OC2M_2 ((uint16_t)0x4000)" +.LASF2939: + .string "TIM_OIS3N ((uint16_t)0x2000)" +.LASF4704: + .string "DMA1_Channel1_IRQn" +.LASF433: + .string "RT_MM_PAGE_BITS 12" +.LASF894: + .string "_INT64_T_DECLARED " +.LASF1021: + .string "S_IWGRP 0000020" +.LASF2899: + .string "SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002)" +.LASF1946: + .string "DMA_CFG6_PL_1 ((uint16_t)0x2000)" +.LASF881: + .string "CLK_TCK CLOCKS_PER_SEC" +.LASF3400: + .string "DMA1_IT_GL5 ((uint32_t)0x00010000)" +.LASF598: + .string "_NOTHROW " +.LASF3951: + .string "SPI_I2S_FLAG_BSY ((uint16_t)0x0080)" +.LASF4406: + .string "HUB_GET_DESCRIPTOR 0x06" +.LASF3952: + .string "__CH32V10x_TIM_H " +.LASF2389: + .string "AFIO_PCFR1_USART1_REMAP ((uint32_t)0x00000004)" +.LASF4208: + .string "WWDG_Prescaler_8 ((uint32_t)0x00000180)" +.LASF2456: + .string "AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100)" +.LASF3318: + .string "BKP_DR14 ((uint16_t)0x004C)" +.LASF2039: + .string "EXTI_RTENR_TR12 ((uint32_t)0x00001000)" +.LASF2608: + .string "I2C_OADDR1_ADD7 ((uint16_t)0x0080)" +.LASF2348: + .string "GPIO_LCK9 ((uint32_t)0x00000200)" +.LASF3480: + .string "__CH32V10x_EXTI_H " +.LASF1613: + .string "ADC_SQ1_1 ((uint32_t)0x00000002)" +.LASF4166: + .string "USART_Clock_Enable ((uint16_t)0x0800)" +.LASF920: + .string "FD_SETSIZE 32" +.LASF4568: + .string "_fpos_t" +.LASF4702: + .string "EXTI3_IRQn" +.LASF3828: + .string "RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)" +.LASF744: + .string "__predict_false(exp) __builtin_expect((exp), 0)" +.LASF441: + .string "RT_EEMPTY 4" +.LASF1173: + .string "signed" +.LASF1597: + .string "ADC_SQ10_3 ((uint32_t)0x00040000)" +.LASF1523: + .string "ADC_SMP5_2 ((uint32_t)0x00020000)" +.LASF1478: + .string "ADC_SMP12_1 ((uint32_t)0x00000080)" +.LASF4176: + .string "USART_IT_RXNE ((uint16_t)0x0525)" +.LASF4200: + .string "USART_FLAG_ORE ((uint16_t)0x0008)" +.LASF581: + .string "__GNU_VISIBLE 0" +.LASF4448: + .string "HUB_C_PORT_SUSPEND 18" +.LASF3731: + .string "PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)" +.LASF690: + .string "__GNUCLIKE_ASM 3" +.LASF2269: + .string "GPIO_INDR_IDR10 ((uint16_t)0x0400)" +.LASF3511: + .string "FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004)" +.LASF4719: + .string "TIM4_IRQn" +.LASF1892: + .string "DMA_CFGR3_PL_1 ((uint16_t)0x2000)" +.LASF3286: + .string "ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)" +.LASF2834: + .string "RCC_RTCEN ((uint32_t)0x00008000)" +.LASF3844: + .string "RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)" +.LASF2901: + .string "SPI_I2SCFGR_CKPOL ((uint16_t)0x0008)" +.LASF1561: + .string "ADC_SQ15_2 ((uint32_t)0x00001000)" +.LASF3621: + .string "GPIO_PinSource8 ((uint8_t)0x08)" +.LASF3484: + .string "EXTI_Line3 ((uint32_t)0x00008)" +.LASF2523: + .string "AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400)" +.LASF3684: + .string "I2C_FLAG_AF ((uint32_t)0x10000400)" +.LASF1494: + .string "ADC_SMP16_1 ((uint32_t)0x00080000)" +.LASF1904: + .string "DMA_CFG4_PSIZE_1 ((uint16_t)0x0200)" +.LASF4571: + .string "__wch" +.LASF3673: + .string "I2C_FLAG_DUALF ((uint32_t)0x00800000)" +.LASF2836: + .string "RCC_LSION ((uint32_t)0x00000001)" +.LASF206: + .string "__FLT64_DIG__ 15" +.LASF1033: + .string "S_ISFIFO(m) (((m)&_IFMT) == _IFIFO)" +.LASF3183: + .string "WWDG_CTLR_T0 ((uint8_t)0x01)" +.LASF3444: + .string "DMA1_FLAG_GL4 ((uint32_t)0x00001000)" +.LASF2120: + .string "FLASH_CTLR_PG ((uint16_t)0x0001)" +.LASF1771: + .string "DAC_DHR12L1 ((uint16_t)0xFFF0)" +.LASF4232: + .string "RB_UH_PD_DIS 0x80" +.LASF3795: + .string "RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)" +.LASF3137: + .string "USART_CTLR1_TE ((uint16_t)0x0008)" +.LASF1761: + .string "DAC_WAVE2_1 ((uint32_t)0x00800000)" +.LASF3215: + .string "EXTEN_WRITE_EN ((uint32_t)0x00004000)" +.LASF4: + .string "__STDC_HOSTED__ 1" +.LASF3282: + .string "ADC_InjectedChannel_4 ((uint8_t)0x20)" +.LASF573: + .string "_POSIX_SOURCE" +.LASF4526: + .string "ERR_USB_TRANSFER 0x20" +.LASF4074: + .string "TIM_TS_TI1FP1 ((uint16_t)0x0050)" +.LASF1196: + .string "__LEAST16 \"h\"" +.LASF4422: + .string "USB_REQ_TYP_RESERVED 0x60" +.LASF3196: + .string "WWDG_CFGR_W4 ((uint16_t)0x0010)" +.LASF4277: + .string "UIS_TOKEN_SOF 0x10" +.LASF2628: + .string "I2C_STAR1_SMBALERT ((uint16_t)0x8000)" +.LASF4305: + .string "RB_UEP6_BUF_MOD 0x10" +.LASF2799: + .string "RCC_I2C2RST ((uint32_t)0x00400000)" +.LASF4239: + .string "RB_UIE_DEV_SOF 0x80" +.LASF2357: + .string "AFIO_ECR_PIN_0 ((uint8_t)0x01)" +.LASF796: + .string "_LOCK_RECURSIVE_T _LOCK_T" +.LASF2980: + .string "TIM_COMIF ((uint16_t)0x0020)" +.LASF471: + .string "RT_THREAD_CLOSE 0x04" +.LASF3720: + .string "IWDG_Prescaler_256 ((uint8_t)0x06)" +.LASF455: + .string "RT_TIMER_FLAG_ONE_SHOT 0x0" +.LASF1532: + .string "ADC_SMP8 ((uint32_t)0x07000000)" +.LASF2374: + .string "AFIO_ECR_PIN_PX13 ((uint8_t)0x0D)" +.LASF2096: + .string "EXTI_INTF_INTF9 ((uint32_t)0x00000200)" +.LASF4242: + .string "RB_UIE_HST_SOF 0x08" +.LASF1801: + .string "DMA_TCIF5 ((uint32_t)0x00020000)" +.LASF105: + .string "__UINT32_MAX__ 0xffffffffUL" +.LASF4659: + .string "_mbtowc_state" +.LASF1071: + .string "FNBIO _FNBIO" +.LASF1954: + .string "DMA_CFG7_PINC ((uint16_t)0x0040)" +.LASF2717: + .string "RCC_ADCPRE ((uint32_t)0x0000C000)" +.LASF1253: + .string "PTRDIFF_MIN (-PTRDIFF_MAX - 1)" +.LASF1527: + .string "ADC_SMP6_2 ((uint32_t)0x00100000)" +.LASF848: + .string "_REENT_RAND48_SEED(ptr) ((ptr)->_new._reent._r48._seed)" +.LASF492: + .string "RT_EVENT_FLAG_OR 0x02" +.LASF4574: + .string "__value" +.LASF3161: + .string "USART_CTLR3_IREN ((uint16_t)0x0002)" +.LASF2278: + .string "GPIO_OUTDR_ODR3 ((uint16_t)0x0008)" +.LASF2089: + .string "EXTI_INTF_INTF2 ((uint32_t)0x00000004)" +.LASF918: + .string "__ntohs(_x) __bswap16(_x)" +.LASF3151: + .string "USART_CTLR2_LBDIE ((uint16_t)0x0040)" +.LASF469: + .string "RT_THREAD_RUNNING 0x03" +.LASF819: + .string "_NULL 0" +.LASF4218: + .string "RB_UC_SYS_CTRL0 0x10" +.LASF4450: + .string "HUB_C_PORT_RESET 20" +.LASF585: + .string "__POSIX_VISIBLE 200809" +.LASF3634: + .string "I2C_DutyCycle_2 ((uint16_t)0xBFFF)" +.LASF4369: + .string "R8_UEP4_CTRL (*((PUINT8V)(0x40023442)))" +.LASF4734: + .string "ITHRESDR" +.LASF3800: + .string "RCC_AHBPeriph_CRC ((uint32_t)0x00000040)" +.LASF754: + .string "__strfmonlike(fmtarg,firstvararg) __attribute__((__format__ (__strfmon__, fmtarg, firstvararg)))" +.LASF3961: + .string "TIM_Channel_1 ((uint16_t)0x0000)" +.LASF4732: + .string "USBHD_IRQn" +.LASF27: + .string "__ORDER_LITTLE_ENDIAN__ 1234" +.LASF704: + .string "__GNUCLIKE_BUILTIN_MEMCPY 1" +.LASF3545: + .string "OB_STOP_NoRST ((uint16_t)0x0002)" +.LASF3069: + .string "TIM_CC1NE ((uint16_t)0x0004)" +.LASF1439: + .string "ADC_DISCNUM_0 ((uint32_t)0x00002000)" +.LASF4367: + .string "R32_USB_EP4_CTRL (*((PUINT32V)(0x40023440)))" +.LASF3992: + .string "TIM_LOCKLevel_1 ((uint16_t)0x0100)" +.LASF755: + .string "__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))" +.LASF3499: + .string "EXTI_Line18 ((uint32_t)0x40000)" +.LASF317: + .string "RT_CONFIG_H__ " +.LASF438: + .string "RT_ERROR 1" +.LASF2575: + .string "I2C_CTLR1_SMBTYPE ((uint16_t)0x0008)" +.LASF3003: + .string "TIM_OC1M_2 ((uint16_t)0x0040)" +.LASF2673: + .string "RCC_SW ((uint32_t)0x00000003)" +.LASF2768: + .string "RCC_HSIRDYIE ((uint32_t)0x00000400)" +.LASF464: + .string "RT_TIMER_SKIP_LIST_LEVEL 1" +.LASF3587: + .string "GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0)" +.LASF4211: + .string "CONST const" +.LASF1144: + .string "FINSH_FUNCTION_EXPORT_CMD(name,cmd,desc) const char __fsym_ ##cmd ##_name[] = #cmd; RT_USED const struct finsh_syscall __fsym_ ##cmd RT_SECTION(\"FSymTab\")= { __fsym_ ##cmd ##_name, (syscall_func)&name };" +.LASF2609: + .string "I2C_OADDR1_ADD8 ((uint16_t)0x0100)" +.LASF3259: + .string "ADC_Channel_16 ((uint8_t)0x10)" +.LASF1436: + .string "ADC_DISCEN ((uint32_t)0x00000800)" +.LASF1645: + .string "ADC_SQ6_3 ((uint32_t)0x10000000)" +.LASF2469: + .string "AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F)" +.LASF2541: + .string "AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004)" +.LASF4787: + .string "rt_interrupt_from_thread" +.LASF1086: + .string "FD_CLOEXEC 1" +.LASF602: + .string "_NOINLINE __attribute__ ((__noinline__))" +.LASF3798: + .string "RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)" +.LASF2969: + .string "TIM_CC1DE ((uint16_t)0x0200)" +.LASF3376: + .string "DMA_Priority_High ((uint32_t)0x00002000)" +.LASF4665: + .string "_mbrtowc_state" +.LASF4134: + .string "TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers" +.LASF1679: + .string "ADC_RDATAR_ADC2DATA ((uint32_t)0xFFFF0000)" +.LASF4263: + .string "RB_U_SIE_FREE 0x20" +.LASF1285: + .string "PERIPH_BASE ((uint32_t)0x40000000)" +.LASF836: + .string "_REENT_STDIO_STREAM(var,index) &(var)->__sf[index]" +.LASF2064: + .string "EXTI_FTENR_TR17 ((uint32_t)0x00020000)" +.LASF1835: + .string "DMA_CTEIF6 ((uint32_t)0x00800000)" +.LASF1503: + .string "ADC_SMP0_2 ((uint32_t)0x00000004)" +.LASF3254: + .string "ADC_Channel_11 ((uint8_t)0x0B)" +.LASF4715: + .string "TIM1_TRG_COM_IRQn" +.LASF3960: + .string "TIM_OPMode_Repetitive ((uint16_t)0x0000)" +.LASF3279: + .string "ADC_InjectedChannel_1 ((uint8_t)0x14)" +.LASF1783: + .string "DAC_DACC2DOR ((uint16_t)0x0FFF)" +.LASF4589: + .string "__tm_year" +.LASF4573: + .string "__count" +.LASF4552: + .string "unsigned char" +.LASF3780: + .string "RCC_IT_HSIRDY ((uint8_t)0x04)" +.LASF2061: + .string "EXTI_FTENR_TR14 ((uint32_t)0x00004000)" +.LASF3520: + .string "FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800)" +.LASF230: + .string "__FLT128_HAS_DENORM__ 1" +.LASF2101: + .string "EXTI_INTF_INTF14 ((uint32_t)0x00004000)" +.LASF1840: + .string "DMA_CFGR1_EN ((uint16_t)0x0001)" +.LASF4254: + .string "RB_UMS_SIE_FREE 0x20" +.LASF419: + .string "ALIGN(n) __attribute__((aligned(n)))" +.LASF1270: + .string "__O volatile" +.LASF1098: + .string "F_RSETLK 11" +.LASF3150: + .string "USART_CTLR2_LBDL ((uint16_t)0x0020)" +.LASF1755: + .string "DAC_TSEL2 ((uint32_t)0x00380000)" +.LASF856: + .string "_REENT_TM(ptr) (&(ptr)->_new._reent._localtime_buf)" +.LASF1714: + .string "BKP_DATAR35_D ((uint16_t)0xFFFF)" +.LASF2511: + .string "AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006)" +.LASF334: + .string "RT_USING_EVENT " +.LASF4150: + .string "USART_WordLength_8b ((uint16_t)0x0000)" +.LASF2675: + .string "RCC_SW_1 ((uint32_t)0x00000002)" +.LASF4766: + .string "pEP7_RAM_Addr" +.LASF1461: + .string "ADC_EXTSEL_0 ((uint32_t)0x00020000)" +.LASF3510: + .string "FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002)" +.LASF1766: + .string "DAC_MAMP2_3 ((uint32_t)0x08000000)" +.LASF3801: + .string "RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)" +.LASF3153: + .string "USART_CTLR2_CPHA ((uint16_t)0x0200)" +.LASF2044: + .string "EXTI_RTENR_TR17 ((uint32_t)0x00020000)" +.LASF119: + .string "__UINT_LEAST8_MAX__ 0xff" +.LASF535: + .string "RTGRAPHIC_CTRL_SET_BRIGHTNESS 6" +.LASF700: + .string "__GNUC_VA_LIST_COMPATIBILITY 1" +.LASF1685: + .string "BKP_DATAR6_D ((uint16_t)0xFFFF)" +.LASF2909: + .string "SPI_I2SCFGR_I2SE ((uint16_t)0x0400)" +.LASF2323: + .string "GPIO_BCR_BR0 ((uint16_t)0x0001)" +.LASF3337: + .string "BKP_DR33 ((uint16_t)0x0098)" +.LASF813: + .string "_WINT_T " +.LASF2956: + .string "TIM_ETPS_0 ((uint16_t)0x1000)" +.LASF442: + .string "RT_ENOMEM 5" +.LASF913: + .string "__bswap32(_x) __builtin_bswap32(_x)" +.LASF4157: + .string "USART_Parity_Even ((uint16_t)0x0400)" +.LASF2259: + .string "GPIO_INDR_IDR0 ((uint16_t)0x0001)" +.LASF2284: + .string "GPIO_OUTDR_ODR9 ((uint16_t)0x0200)" +.LASF2516: + .string "AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040)" +.LASF988: + .string "CLOCK_DISALLOWED 0" +.LASF3490: + .string "EXTI_Line9 ((uint32_t)0x00200)" +.LASF3317: + .string "BKP_DR13 ((uint16_t)0x0048)" +.LASF2564: + .string "AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000)" +.LASF4393: + .string "USB_SET_FEATURE 0x03" +.LASF3441: + .string "DMA1_FLAG_TC3 ((uint32_t)0x00000200)" +.LASF879: + .string "_CLOCKS_PER_SEC_ RT_TICK_PER_SECOND" +.LASF1241: + .string "INT_FAST32_MAX (__INT_FAST32_MAX__)" +.LASF264: + .string "__DEC32_MIN__ 1E-95DF" +.LASF1472: + .string "ADC_SMP11 ((uint32_t)0x00000038)" +.LASF1575: + .string "ADC_SQ7 ((uint32_t)0x0000001F)" +.LASF4561: + .string "long unsigned int" +.LASF3985: + .string "TIM_Break_Enable ((uint16_t)0x1000)" +.LASF2786: + .string "RCC_USART1RST ((uint32_t)0x00004000)" +.LASF2471: + .string "AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00)" +.LASF4643: + .string "__FILE" +.LASF2195: + .string "GPIO_CFGLR_CNF3_0 ((uint32_t)0x00004000)" +.LASF1981: + .string "DMA_MADDR2_MA ((uint32_t)0xFFFFFFFF)" +.LASF1733: + .string "CRC_DATAR_DR ((uint32_t)0xFFFFFFFF)" +.LASF371: + .string "RT_DEBUG_MEM 0" +.LASF3442: + .string "DMA1_FLAG_HT3 ((uint32_t)0x00000400)" +.LASF4197: + .string "USART_FLAG_TC ((uint16_t)0x0040)" +.LASF834: + .string "_REENT_SIGNAL_SIZE 24" +.LASF2296: + .string "GPIO_BSHR_BS5 ((uint32_t)0x00000020)" +.LASF1819: + .string "DMA_CTEIF2 ((uint32_t)0x00000080)" +.LASF4084: + .string "TIM_ForcedAction_Active ((uint16_t)0x0050)" +.LASF2963: + .string "TIM_CC3IE ((uint16_t)0x0008)" +.LASF4445: + .string "HUB_PORT_LOW_SPEED 9" +.LASF1870: + .string "DMA_CFGR2_MSIZE_0 ((uint16_t)0x0400)" +.LASF4590: + .string "__tm_wday" +.LASF2209: + .string "GPIO_CFGHR_MODE ((uint32_t)0x33333333)" +.LASF246: + .string "__FLT32X_HAS_QUIET_NAN__ 1" +.LASF1339: + .string "DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058)" +.LASF549: + .string "__NEWLIB_MINOR__ 0" +.LASF377: + .string "RT_DEBUG_TIMER 0" +.LASF3219: + .string "EXTEN_FLASH_CLK_TRIM1 ((uint32_t)0x00020000)" +.LASF2310: + .string "GPIO_BSHR_BR3 ((uint32_t)0x00080000)" +.LASF3635: + .string "I2C_Ack_Enable ((uint16_t)0x0400)" +.LASF347: + .string "RT_MAIN_THREAD_PRIORITY 10" +.LASF398: + .string "RT_MUTEX_VALUE_MAX RT_UINT16_MAX" +.LASF4649: + .string "_mult" +.LASF826: + .string "_RAND48_SEED_1 (0xabcd)" +.LASF2847: + .string "RTC_CTLRH_OWIE ((uint8_t)0x04)" +.LASF1197: + .string "__LEAST32 \"l\"" +.LASF2705: + .string "RCC_PPRE1_DIV4 ((uint32_t)0x00000500)" +.LASF4008: + .string "TIM_ICSelection_TRC ((uint16_t)0x0003)" +.LASF252: + .string "__FLT64X_MAX_10_EXP__ 4932" +.LASF2234: + .string "GPIO_CFGHR_CNF ((uint32_t)0xCCCCCCCC)" +.LASF3034: + .string "TIM_OC3FE ((uint16_t)0x0004)" +.LASF4520: + .string "__CH32V10x_USBHOST_H " +.LASF4488: + .string "USB_BO_CBW_SIG0 0x55" +.LASF2201: + .string "GPIO_CFGLR_CNF5_0 ((uint32_t)0x00400000)" +.LASF3905: + .string "I2S_Mode_MasterRx ((uint16_t)0x0300)" +.LASF1311: + .string "DAC_BASE (APB1PERIPH_BASE + 0x7400)" +.LASF4140: + .string "TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers" +.LASF3820: + .string "RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)" +.LASF4374: + .string "R8_UEP6_T_LEN (*((PUINT8V)(0x40023448)))" +.LASF416: + .string "RT_SECTION(x) __attribute__((section(x)))" +.LASF664: + .string "_WCHAR_T_DECLARED " +.LASF1996: + .string "EXTI_INTENR_MR9 ((uint32_t)0x00000200)" +.LASF2461: + .string "AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600)" +.LASF3728: + .string "PWR_PVDLevel_2V6 ((uint32_t)0x00000080)" +.LASF3698: + .string "I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040)" +.LASF576: + .string "_POSIX_C_SOURCE 200809L" +.LASF809: + .string "__size_t" +.LASF1698: + .string "BKP_DATAR19_D ((uint16_t)0xFFFF)" +.LASF342: + .string "RT_CONSOLE_DEVICE_NAME \"uart1\"" +.LASF963: + .string "_SUSECONDS_T_DECLARED " +.LASF405: + .string "__GNUC_VA_LIST " +.LASF1735: + .string "CRC_CTLR_RESET ((uint8_t)0x01)" +.LASF2408: + .string "AFIO_PCFR1_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200)" +.LASF4389: + .string "USB_PID_DATA1 0x0B" +.LASF3571: + .string "GPIO_Pin_8 ((uint16_t)0x0100)" +.LASF3476: + .string "DMA2_FLAG_GL5 ((uint32_t)0x10010000)" +.LASF2912: + .string "SPI_I2SPR_ODD ((uint16_t)0x0100)" +.LASF4770: + .string "DeviceType" +.LASF4411: + .string "HID_SET_REPORT 0x09" +.LASF4811: + .string "NVIC_SetPendingIRQ" +.LASF2082: + .string "EXTI_SWIEVR_SWIEVR15 ((uint32_t)0x00008000)" +.LASF1264: + .string "INT64_C(x) __INT64_C(x)" +.LASF2179: + .string "GPIO_CFGLR_MODE6_0 ((uint32_t)0x01000000)" +.LASF3988: + .string "TIM_BreakPolarity_High ((uint16_t)0x2000)" +.LASF2852: + .string "RTC_CTLRL_CNF ((uint8_t)0x10)" +.LASF170: + .string "__DBL_MIN__ ((double)2.22507385850720138309023271733240406e-308L)" +.LASF2122: + .string "FLASH_CTLR_MER ((uint16_t)0x0004)" +.LASF3688: + .string "I2C_FLAG_RXNE ((uint32_t)0x10000040)" +.LASF3479: + .string "DMA2_FLAG_TE5 ((uint32_t)0x10080000)" +.LASF1867: + .string "DMA_CFGR2_PSIZE_0 ((uint16_t)0x0100)" +.LASF2586: + .string "I2C_CTLR1_SWRST ((uint16_t)0x8000)" +.LASF298: + .string "__PRAGMA_REDEFINE_EXTNAME 1" +.LASF445: + .string "RT_EIO 8" +.LASF4757: + .string "UINT16" +.LASF4683: + .string "syscall_func" +.LASF2759: + .string "RCC_CFGR0_MCO_PLL ((uint32_t)0x07000000)" +.LASF1662: + .string "ADC_JSQ3_2 ((uint32_t)0x00001000)" +.LASF3830: + .string "RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)" +.LASF1860: + .string "DMA_CFGR2_HTIE ((uint16_t)0x0004)" +.LASF4094: + .string "TIM_EventSource_COM ((uint16_t)0x0020)" +.LASF608: + .string "__have_longlong64 1" +.LASF4116: + .string "TIM_SlaveMode_External1 ((uint16_t)0x0007)" +.LASF2351: + .string "GPIO_LCK12 ((uint32_t)0x00001000)" +.LASF2213: + .string "GPIO_CFGHR_MODE9 ((uint32_t)0x00000030)" +.LASF1445: + .string "ADC_DUALMOD_2 ((uint32_t)0x00040000)" +.LASF3421: + .string "DMA2_IT_TC3 ((uint32_t)0x10000200)" +.LASF2451: + .string "AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030)" +.LASF1680: + .string "BKP_DATAR1_D ((uint16_t)0xFFFF)" +.LASF2191: + .string "GPIO_CFGLR_CNF2 ((uint32_t)0x00000C00)" +.LASF4018: + .string "TIM_IT_COM ((uint16_t)0x0020)" +.LASF425: + .string "INIT_PREV_EXPORT(fn) INIT_EXPORT(fn, \"2\")" +.LASF638: + .string "__SIZE_T " +.LASF3350: + .string "DBGMCU_WWDG_STOP ((uint32_t)0x00000002)" +.LASF3811: + .string "RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)" +.LASF3732: + .string "PWR_Regulator_ON ((uint32_t)0x00000000)" +.LASF1028: + .string "ALLPERMS (S_ISUID | S_ISGID | S_ISVTX | S_IRWXU | S_IRWXG | S_IRWXO)" +.LASF2467: + .string "AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000)" +.LASF390: + .string "RTTHREAD_VERSION ((RT_VERSION * 10000) + (RT_SUBVERSION * 100) + RT_REVISION)" +.LASF2566: + .string "IWDG_PR ((uint8_t)0x07)" +.LASF2955: + .string "TIM_ETPS ((uint16_t)0x3000)" +.LASF4335: + .string "UEP_R_RES_ACK 0x00" +.LASF736: + .string "__nonnull(x) __attribute__((__nonnull__ x))" +.LASF1570: + .string "ADC_L ((uint32_t)0x00F00000)" +.LASF2476: + .string "AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003)" +.LASF3181: + .string "USART_GPR_GT ((uint16_t)0xFF00)" +.LASF4699: + .string "EXTI0_IRQn" +.LASF550: + .string "__NEWLIB_PATCHLEVEL__ 0" +.LASF3333: + .string "BKP_DR29 ((uint16_t)0x0088)" +.LASF1616: + .string "ADC_SQ1_4 ((uint32_t)0x00000010)" +.LASF3100: + .string "TIM_LOCK_0 ((uint16_t)0x0100)" +.LASF3061: + .string "TIM_IC4PSC_1 ((uint16_t)0x0800)" +.LASF4222: + .string "RB_UC_CLR_ALL 0x02" +.LASF2713: + .string "RCC_PPRE2_DIV2 ((uint32_t)0x00002000)" +.LASF546: + .string "_NEWLIB_VERSION_H__ 1" +.LASF3168: + .string "USART_CTLR3_RTSE ((uint16_t)0x0100)" +.LASF1356: + .string "TIM4 ((TIM_TypeDef *) TIM4_BASE)" +.LASF2857: + .string "RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF)" +.LASF545: + .string "__NEWLIB_H__ 1" +.LASF1499: + .string "ADC_SMP17_2 ((uint32_t)0x00800000)" +.LASF4783: + .string "SetupSetUsbAddr" +.LASF4229: + .string "RB_UD_GP_BIT 0x02" +.LASF3965: + .string "TIM_CKD_DIV1 ((uint16_t)0x0000)" +.LASF1615: + .string "ADC_SQ1_3 ((uint32_t)0x00000008)" +.LASF1110: + .string "AT_REMOVEDIR 8" +.LASF4059: + .string "TIM_DMA_CC1 ((uint16_t)0x0200)" +.LASF3163: + .string "USART_CTLR3_HDSEL ((uint16_t)0x0008)" +.LASF3730: + .string "PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)" +.LASF4711: + .string "ADC_IRQn" +.LASF4425: + .string "USB_REQ_RECIP_INTERF 0x01" +.LASF2692: + .string "RCC_HPRE_DIV4 ((uint32_t)0x00000090)" +.LASF409: + .string "va_copy(d,s) __builtin_va_copy(d,s)" +.LASF330: + .string "RT_TIMER_THREAD_STACK_SIZE 512" +.LASF4428: + .string "HUB_CLEAR_HUB_FEATURE 0x20" +.LASF1377: + .string "AFIO ((AFIO_TypeDef *) AFIO_BASE)" +.LASF2236: + .string "GPIO_CFGHR_CNF8_0 ((uint32_t)0x00000004)" +.LASF1530: + .string "ADC_SMP7_1 ((uint32_t)0x00400000)" +.LASF3428: + .string "DMA2_IT_GL5 ((uint32_t)0x10010000)" +.LASF3315: + .string "BKP_DR11 ((uint16_t)0x0040)" +.LASF3144: + .string "USART_CTLR1_PCE ((uint16_t)0x0400)" +.LASF932: + .string "_IN_PORT_T_DECLARED " +.LASF3890: + .string "SPI_NSS_Soft ((uint16_t)0x0200)" +.LASF4085: + .string "TIM_ForcedAction_InActive ((uint16_t)0x0040)" +.LASF439: + .string "RT_ETIMEOUT 2" +.LASF4530: + .string "ROOT_DEV_DISCONNECT 0" +.LASF4070: + .string "TIM_TS_ITR1 ((uint16_t)0x0010)" +.LASF3917: + .string "I2S_AudioFreq_192k ((uint32_t)192000)" +.LASF23: + .string "__SIZEOF_LONG_DOUBLE__ 16" +.LASF22: + .string "__SIZEOF_DOUBLE__ 8" +.LASF1292: + .string "TIM5_BASE (APB1PERIPH_BASE + 0x0C00)" +.LASF152: + .string "__FLT_MAX_EXP__ 128" +.LASF2995: + .string "TIM_CC1S ((uint16_t)0x0003)" +.LASF3431: + .string "DMA2_IT_TE5 ((uint32_t)0x10080000)" +.LASF2904: + .string "SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020)" +.LASF3190: + .string "WWDG_CTLR_WDGA ((uint8_t)0x80)" +.LASF147: + .string "__FLT_RADIX__ 2" +.LASF1693: + .string "BKP_DATAR14_D ((uint16_t)0xFFFF)" +.LASF1400: + .string "DMA2 ((DMA_TypeDef *) DMA2_BASE)" +.LASF133: + .string "__INT_FAST64_MAX__ 0x7fffffffffffffffLL" +.LASF3059: + .string "TIM_IC4PSC ((uint16_t)0x0C00)" +.LASF3211: + .string "EXTEN_ULLDO_TRIM ((uint32_t)0x00000300)" +.LASF3027: + .string "TIM_IC2F_0 ((uint16_t)0x1000)" +.LASF4504: + .string "pEP3_IN_DataBuf (pEP3_RAM_Addr+64)" +.LASF3352: + .string "DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00000008)" +.LASF3759: + .string "RCC_PLLMul_15 ((uint32_t)0x00340000)" +.LASF450: + .string "RT_NULL (0)" +.LASF2211: + .string "GPIO_CFGHR_MODE8_0 ((uint32_t)0x00000001)" +.LASF114: + .string "__INT32_C(c) c ## L" +.LASF3149: + .string "USART_CTLR2_ADD ((uint16_t)0x000F)" +.LASF4235: + .string "RB_UH_LOW_SPEED 0x04" +.LASF1169: + .string "ADC1_2_IRQn ADC_IRQn" +.LASF428: + .string "INIT_ENV_EXPORT(fn) INIT_EXPORT(fn, \"5\")" +.LASF1979: + .string "DMA_PADDR7_PA ((uint32_t)0xFFFFFFFF)" +.LASF375: + .string "RT_DEBUG_SLAB 0" +.LASF2363: + .string "AFIO_ECR_PIN_PX2 ((uint8_t)0x02)" +.LASF3547: + .string "OB_STDBY_NoRST ((uint16_t)0x0004)" +.LASF3157: + .string "USART_CTLR2_STOP_0 ((uint16_t)0x1000)" +.LASF4352: + .string "R8_UH_EP_PID R8_UEP2_T_LEN" +.LASF1432: + .string "ADC_JEOCIE ((uint32_t)0x00000080)" +.LASF408: + .string "va_arg(v,l) __builtin_va_arg(v,l)" +.LASF1492: + .string "ADC_SMP16 ((uint32_t)0x001C0000)" +.LASF1372: + .string "I2C1 ((I2C_TypeDef *) I2C1_BASE)" +.LASF1392: + .string "ADC3 ((ADC_TypeDef *) ADC3_BASE)" +.LASF733: + .string "__pure __attribute__((__pure__))" +.LASF431: + .string "RT_MM_PAGE_SIZE 4096" +.LASF2426: + .string "AFIO_PCFR1_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000)" +.LASF3447: + .string "DMA1_FLAG_TE4 ((uint32_t)0x00008000)" +.LASF3159: + .string "USART_CTLR2_LINEN ((uint16_t)0x4000)" +.LASF2276: + .string "GPIO_OUTDR_ODR1 ((uint16_t)0x0002)" +.LASF1510: + .string "ADC_SMP2_1 ((uint32_t)0x00000080)" +.LASF565: + .string "__IEEE_LITTLE_ENDIAN " +.LASF2502: + .string "AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0)" +.LASF4802: + .string "rt_kprintf" +.LASF3042: + .string "TIM_CC4S_0 ((uint16_t)0x0100)" +.LASF2598: + .string "I2C_CTLR2_LAST ((uint16_t)0x1000)" +.LASF784: + .string "__asserts_exclusive(...) __lock_annotate(assert_exclusive_lock(__VA_ARGS__))" +.LASF1968: + .string "DMA_CNTR3_NDT ((uint16_t)0xFFFF)" +.LASF4408: + .string "HID_GET_REPORT 0x01" +.LASF3555: + .string "FLASH_FLAG_PGERR ((uint32_t)0x00000004)" +.LASF1751: + .string "DAC_DMAEN1 ((uint32_t)0x00001000)" +.LASF604: + .string "_TIME_H_ " +.LASF892: + .string "_UINT32_T_DECLARED " +.LASF1772: + .string "DAC_DHR8R1 ((uint8_t)0xFF)" +.LASF2761: + .string "RCC_LSERDYF ((uint32_t)0x00000002)" +.LASF336: + .string "RT_USING_MESSAGEQUEUE " +.LASF3882: + .string "SPI_Mode_Master ((uint16_t)0x0104)" +.LASF1834: + .string "DMA_CHTIF6 ((uint32_t)0x00400000)" +.LASF582: + .string "__ISO_C_VISIBLE 2011" +.LASF2605: + .string "I2C_OADDR1_ADD4 ((uint16_t)0x0010)" +.LASF2498: + .string "AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000)" +.LASF2208: + .string "GPIO_CFGLR_CNF7_1 ((uint32_t)0x80000000)" +.LASF1560: + .string "ADC_SQ15_1 ((uint32_t)0x00000800)" +.LASF994: + .string "_IFBLK 0060000" +.LASF3870: + .string "RTC_IT_ALR ((uint16_t)0x0002)" +.LASF4612: + .string "_close" +.LASF1914: + .string "DMA_CFG5_HTIE ((uint16_t)0x0004)" +.LASF1394: + .string "TIM16 ((TIM_TypeDef *) TIM16_BASE)" +.LASF4479: + .string "USB_ENDP_TYPE_CTRL 0x00" +.LASF721: + .string "__dead2 __attribute__((__noreturn__))" +.LASF1382: + .string "GPIOD ((GPIO_TypeDef *) GPIOD_BASE)" +.LASF599: + .string "_LONG_DOUBLE long double" +.LASF11: + .string "__ATOMIC_ACQUIRE 2" +.LASF2770: + .string "RCC_PLLRDYIE ((uint32_t)0x00001000)" +.LASF4245: + .string "RB_UIE_DETECT 0x01" +.LASF2937: + .string "TIM_OIS2N ((uint16_t)0x0800)" +.LASF4541: + .string "__CH32V10x_IT_H " +.LASF179: + .string "__LDBL_MIN_10_EXP__ (-4931)" +.LASF1626: + .string "ADC_SQ3_2 ((uint32_t)0x00001000)" +.LASF13: + .string "__ATOMIC_ACQ_REL 4" +.LASF2710: + .string "RCC_PPRE2_1 ((uint32_t)0x00001000)" +.LASF3325: + .string "BKP_DR21 ((uint16_t)0x0068)" +.LASF3169: + .string "USART_CTLR3_CTSE ((uint16_t)0x0200)" +.LASF3515: + .string "FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040)" +.LASF3269: + .string "ADC_SampleTime_71Cycles5 ((uint8_t)0x06)" +.LASF3312: + .string "BKP_DR8 ((uint16_t)0x0020)" +.LASF198: + .string "__FLT32_MAX__ 3.40282346638528859811704183484516925e+38F32" +.LASF1300: + .string "IWDG_BASE (APB1PERIPH_BASE + 0x3000)" +.LASF2417: + .string "AFIO_PCFR1_CAN_REMAP ((uint32_t)0x00006000)" +.LASF1569: + .string "ADC_SQ16_4 ((uint32_t)0x00080000)" +.LASF1764: + .string "DAC_MAMP2_1 ((uint32_t)0x02000000)" +.LASF3243: + .string "ADC_Channel_0 ((uint8_t)0x00)" +.LASF1591: + .string "ADC_SQ9_3 ((uint32_t)0x00002000)" +.LASF3524: + .string "FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000)" +.LASF2659: + .string "PWR_CSR_WUF ((uint16_t)0x0001)" +.LASF4564: + .string "__uint32_t" +.LASF2730: + .string "RCC_PLLMULL_3 ((uint32_t)0x00200000)" +.LASF526: + .string "RT_DEVICE_CTRL_MTD_FORMAT 0x10" +.LASF2441: + .string "AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000)" +.LASF3814: + .string "RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)" +.LASF1939: + .string "DMA_CFG6_PSIZE_0 ((uint16_t)0x0100)" +.LASF2632: + .string "I2C_STAR2_GENCALL ((uint16_t)0x0010)" +.LASF1252: + .string "PTRDIFF_MAX (__PTRDIFF_MAX__)" +.LASF1443: + .string "ADC_DUALMOD_0 ((uint32_t)0x00010000)" +.LASF1368: + .string "USART2 ((USART_TypeDef *) USART2_BASE)" +.LASF4682: + .string "rt_assert_hook" +.LASF4430: + .string "HUB_GET_BUS_STATE 0xA3" +.LASF3224: + .string "ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)" +.LASF3538: + .string "FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000)" +.LASF3246: + .string "ADC_Channel_3 ((uint8_t)0x03)" +.LASF3076: + .string "TIM_CC3P ((uint16_t)0x0200)" +.LASF2624: + .string "I2C_STAR1_AF ((uint16_t)0x0400)" +.LASF238: + .string "__FLT32X_MAX_10_EXP__ 308" +.LASF788: + .string "__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))" +.LASF262: + .string "__DEC32_MIN_EXP__ (-94)" +.LASF2255: + .string "GPIO_CFGHR_CNF14_1 ((uint32_t)0x08000000)" +.LASF3491: + .string "EXTI_Line10 ((uint32_t)0x00400)" +.LASF1490: + .string "ADC_SMP15_1 ((uint32_t)0x00010000)" +.LASF2040: + .string "EXTI_RTENR_TR13 ((uint32_t)0x00002000)" +.LASF1903: + .string "DMA_CFG4_PSIZE_0 ((uint16_t)0x0100)" +.LASF1605: + .string "ADC_SQ12 ((uint32_t)0x3E000000)" +.LASF506: + .string "RT_DEVICE_FLAG_DMA_TX 0x800" +.LASF324: + .string "RT_USING_HOOK " +.LASF3116: + .string "TIM_DBL_1 ((uint16_t)0x0200)" +.LASF1653: + .string "ADC_JSQ2 ((uint32_t)0x000003E0)" +.LASF3405: + .string "DMA1_IT_TC6 ((uint32_t)0x00200000)" +.LASF2002: + .string "EXTI_INTENR_MR15 ((uint32_t)0x00008000)" +.LASF757: + .string "__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))" +.LASF164: + .string "__DBL_MIN_EXP__ (-1021)" +.LASF368: + .string "BSP_USING_UART " +.LASF1260: + .string "INT16_C(x) __INT16_C(x)" +.LASF972: + .string "PTHREAD_INHERIT_SCHED 1" +.LASF10: + .string "__ATOMIC_SEQ_CST 5" +.LASF1072: + .string "FNONBIO _FNONBLOCK" +.LASF2973: + .string "TIM_COMDE ((uint16_t)0x2000)" +.LASF4538: + .string "HUB_MAX_PORTS 4" +.LASF2080: + .string "EXTI_SWIEVR_SWIEVR13 ((uint32_t)0x00002000)" +.LASF4192: + .string "USART_IrDAMode_LowPower ((uint16_t)0x0004)" +.LASF4196: + .string "USART_FLAG_TXE ((uint16_t)0x0080)" +.LASF855: + .string "_REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)" +.LASF1325: + .string "TIM8_BASE (APB2PERIPH_BASE + 0x3400)" +.LASF2222: + .string "GPIO_CFGHR_MODE12 ((uint32_t)0x00030000)" +.LASF3704: + .string "I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080)" +.LASF4004: + .string "TIM_ICPolarity_Falling ((uint16_t)0x0002)" +.LASF4327: + .string "R8_UEP1_T_LEN (*((PUINT8V)(0x40023434)))" +.LASF4307: + .string "RB_UEP5_TX_EN 0x04" +.LASF660: + .string "_WCHAR_T_H " +.LASF904: + .string "_PDP_ENDIAN 3412" +.LASF4215: + .string "RB_UC_LOW_SPEED 0x40" +.LASF3492: + .string "EXTI_Line11 ((uint32_t)0x00800)" +.LASF2135: + .string "FLASH_OBR_OPTERR ((uint16_t)0x0001)" +.LASF195: + .string "__FLT32_MAX_EXP__ 128" +.LASF2410: + .string "AFIO_PCFR1_TIM3_REMAP ((uint32_t)0x00000C00)" +.LASF4132: + .string "TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers" +.LASF804: + .string "__lock_acquire_recursive(lock) __retarget_lock_acquire_recursive(lock)" +.LASF1780: + .string "DAC_RD8BDHR_DACC1DHR ((uint16_t)0x00FF)" +.LASF4754: + .string "PFIC_Type" +.LASF2153: + .string "FLASH_WRPR1_WRPR1 ((uint32_t)0x00FF0000)" +.LASF2772: + .string "RCC_LSERDYC ((uint32_t)0x00020000)" +.LASF2657: + .string "PWR_CTLR_PLS_2V9 ((uint16_t)0x00E0)" +.LASF2745: + .string "RCC_PLLMULL12 ((uint32_t)0x00280000)" +.LASF3953: + .string "TIM_OCMode_Timing ((uint16_t)0x0000)" +.LASF2917: + .string "TIM_OPM ((uint16_t)0x0008)" +.LASF727: + .string "__section(x) __attribute__((__section__(x)))" +.LASF637: + .string "_T_SIZE " +.LASF1259: + .string "UINT8_C(x) __UINT8_C(x)" +.LASF66: + .string "__INTPTR_TYPE__ int" +.LASF4548: + .string "NVIC_PriorityGroup_3 ((uint32_t)0x03)" +.LASF3194: + .string "WWDG_CFGR_W2 ((uint16_t)0x0004)" +.LASF45: + .string "__INT64_TYPE__ long long int" +.LASF620: + .string "_STDDEF_H_ " +.LASF4434: + .string "HUB_SET_HUB_DESCRIPTOR 0x20" +.LASF2340: + .string "GPIO_LCK1 ((uint32_t)0x00000002)" +.LASF2028: + .string "EXTI_RTENR_TR1 ((uint32_t)0x00000002)" +.LASF37: + .string "__INTMAX_TYPE__ long long int" +.LASF1791: + .string "DMA_TEIF2 ((uint32_t)0x00000080)" +.LASF1970: + .string "DMA_CNTR5_NDT ((uint16_t)0xFFFF)" +.LASF3686: + .string "I2C_FLAG_BERR ((uint32_t)0x10000100)" +.LASF837: + .ascii "_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT" + .ascii "_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0," + .ascii " \"\", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL," + .ascii " { { 0, _NULL, \"\", {0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, {" + .string " {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD }, {0, {0}}, {0, {0}}, {0, {0}}, \"\", \"\", 0, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}} } }, _REENT_INIT_ATEXIT _NULL, {_NULL, 0, _NULL} }" +.LASF87: + .string "__WCHAR_WIDTH__ 32" +.LASF4186: + .string "USART_DMAReq_Tx ((uint16_t)0x0080)" +.LASF3382: + .string "DMA_IT_HT ((uint32_t)0x00000004)" +.LASF4656: + .string "_rand_next" +.LASF2668: + .string "RCC_HSERDY ((uint32_t)0x00020000)" +.LASF2607: + .string "I2C_OADDR1_ADD6 ((uint16_t)0x0040)" +.LASF3174: + .string "USART_GPR_PSC_1 ((uint16_t)0x0002)" +.LASF1320: + .string "GPIOG_BASE (APB2PERIPH_BASE + 0x2000)" +.LASF2662: + .string "PWR_CSR_EWUP ((uint16_t)0x0100)" +.LASF1294: + .string "TIM7_BASE (APB1PERIPH_BASE + 0x1400)" +.LASF1272: + .string "RV_STATIC_INLINE static inline" +.LASF2399: + .string "AFIO_PCFR1_TIM1_REMAP_1 ((uint32_t)0x00000080)" +.LASF4312: + .string "RB_UEP7_BUF_MOD 0x01" +.LASF3721: + .string "IWDG_FLAG_PVU ((uint16_t)0x0001)" +.LASF4270: + .string "R8_USB_INT_ST (*((PUINT8V)(0x40023407)))" +.LASF1988: + .string "EXTI_INTENR_MR1 ((uint32_t)0x00000002)" +.LASF4497: + .string "pSetupReqPak ((PUSB_SETUP_REQ)pEP0_RAM_Addr)" +.LASF3681: + .string "I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)" +.LASF1676: + .string "ADC_IDATAR3_JDATA ((uint16_t)0xFFFF)" +.LASF3936: + .string "SPI_Direction_Tx ((uint16_t)0x4000)" +.LASF257: + .string "__FLT64X_DENORM_MIN__ 6.47517511943802511092443895822764655e-4966F64x" +.LASF1108: + .string "AT_SYMLINK_NOFOLLOW 2" +.LASF1031: + .string "S_ISCHR(m) (((m)&_IFMT) == _IFCHR)" +.LASF4216: + .string "RB_UC_DEV_PU_EN 0x20" +.LASF92: + .string "__INTMAX_C(c) c ## LL" +.LASF1419: + .string "ADC_AWD ((uint8_t)0x01)" +.LASF1323: + .string "TIM1_BASE (APB2PERIPH_BASE + 0x2C00)" +.LASF3766: + .string "RCC_SYSCLK_Div4 ((uint32_t)0x00000090)" +.LASF2651: + .string "PWR_CTLR_PLS_2V3 ((uint16_t)0x0020)" +.LASF4353: + .string "MASK_UH_TOKEN 0xF0" +.LASF2962: + .string "TIM_CC2IE ((uint16_t)0x0004)" +.LASF2358: + .string "AFIO_ECR_PIN_1 ((uint8_t)0x02)" +.LASF3669: + .string "I2C_IT_ADD10 ((uint32_t)0x02000008)" +.LASF1905: + .string "DMA_CFG4_MSIZE ((uint16_t)0x0C00)" +.LASF301: + .string "__SIZEOF_PTRDIFF_T__ 4" +.LASF3136: + .string "USART_CTLR1_RE ((uint16_t)0x0004)" +.LASF2125: + .string "FLASH_CTLR_STRT ((uint16_t)0x0040)" +.LASF2902: + .string "SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030)" +.LASF489: + .string "RT_WAITING_FOREVER -1" +.LASF4632: + .string "_result" +.LASF3539: + .string "FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000)" +.LASF229: + .string "__FLT128_DENORM_MIN__ 6.47517511943802511092443895822764655e-4966F128" +.LASF3053: + .string "TIM_IC3PSC_1 ((uint16_t)0x0008)" +.LASF2891: + .string "SPI_STATR_OVR ((uint8_t)0x40)" +.LASF1341: + .string "DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080)" +.LASF1508: + .string "ADC_SMP2 ((uint32_t)0x000001C0)" +.LASF2579: + .string "I2C_CTLR1_NOSTRETCH ((uint16_t)0x0080)" +.LASF2648: + .string "PWR_CTLR_PLS_1 ((uint16_t)0x0040)" +.LASF624: + .string "_T_PTRDIFF " +.LASF3726: + .string "PWR_PVDLevel_2V4 ((uint32_t)0x00000040)" +.LASF3875: + .string "RTC_FLAG_ALR ((uint16_t)0x0002)" +.LASF1273: + .string "PFIC ((PFIC_Type *) 0xE000E000 )" +.LASF1704: + .string "BKP_DATAR25_D ((uint16_t)0xFFFF)" +.LASF3264: + .string "ADC_SampleTime_7Cycles5 ((uint8_t)0x01)" +.LASF2972: + .string "TIM_CC4DE ((uint16_t)0x1000)" +.LASF444: + .string "RT_EBUSY 7" +.LASF1841: + .string "DMA_CFGR1_TCIE ((uint16_t)0x0002)" +.LASF644: + .string "_SIZE_T_DECLARED " +.LASF3748: + .string "RCC_PLLMul_4 ((uint32_t)0x00080000)" +.LASF1825: + .string "DMA_CTCIF4 ((uint32_t)0x00002000)" +.LASF1588: + .string "ADC_SQ9_0 ((uint32_t)0x00000400)" +.LASF4061: + .string "TIM_DMA_CC3 ((uint16_t)0x0800)" +.LASF3566: + .string "GPIO_Pin_3 ((uint16_t)0x0008)" +.LASF1777: + .string "DAC_RD12BDHR_DACC2DHR ((uint32_t)0x0FFF0000)" +.LASF4796: + .string "tentry" +.LASF2794: + .string "RCC_BKPRST ((uint32_t)0x08000000)" +.LASF702: + .string "__GNUCLIKE_BUILTIN_NEXT_ARG 1" +.LASF1861: + .string "DMA_CFGR2_TEIE ((uint16_t)0x0008)" +.LASF4322: + .string "R16_UH_TX_DMA R16_UEP3_DMA" +.LASF2077: + .string "EXTI_SWIEVR_SWIEVR10 ((uint32_t)0x00000400)" +.LASF2429: + .string "AFIO_PCFR1_SWJ_CFG ((uint32_t)0x07000000)" +.LASF9: + .string "__ATOMIC_RELAXED 0" +.LASF1431: + .string "ADC_AWDIE ((uint32_t)0x00000040)" +.LASF4020: + .string "TIM_IT_Break ((uint16_t)0x0080)" +.LASF3813: + .string "RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)" +.LASF1371: + .string "UART5 ((USART_TypeDef *) UART5_BASE)" +.LASF3022: + .string "TIM_IC1F_3 ((uint16_t)0x0080)" +.LASF4330: + .string "RB_UEP_T_TOG 0x40" +.LASF1857: + .string "DMA_CFGR1_MEM2MEM ((uint16_t)0x4000)" +.LASF4318: + .string "R16_UEP4_DMA (*((PUINT16V)(0x40023420)))" +.LASF1741: + .string "DAC_TSEL1_1 ((uint32_t)0x00000010)" +.LASF1738: + .string "DAC_TEN1 ((uint32_t)0x00000004)" +.LASF2397: + .string "AFIO_PCFR1_TIM1_REMAP ((uint32_t)0x000000C0)" +.LASF2894: + .string "SPI_CRCR_CRCPOLY ((uint16_t)0xFFFF)" +.LASF3712: + .string "IWDG_WriteAccess_Enable ((uint16_t)0x5555)" +.LASF1115: + .string "O_DIRECTORY 0x200000" +.LASF1729: + .string "BKP_CTI ((uint16_t)0x0002)" +.LASF432: + .string "RT_MM_PAGE_MASK (RT_MM_PAGE_SIZE - 1)" +.LASF141: + .string "__UINTPTR_MAX__ 0xffffffffU" +.LASF3902: + .string "I2S_Mode_SlaveTx ((uint16_t)0x0000)" +.LASF1740: + .string "DAC_TSEL1_0 ((uint32_t)0x00000008)" +.LASF3112: + .string "TIM_DBA_3 ((uint16_t)0x0008)" +.LASF448: + .string "RT_ALIGN(size,align) (((size) + (align) - 1) & ~((align) - 1))" +.LASF98: + .string "__SIG_ATOMIC_WIDTH__ 32" +.LASF4193: + .string "USART_IrDAMode_Normal ((uint16_t)0x0000)" +.LASF1734: + .string "CRC_IDR_IDATAR ((uint8_t)0xFF)" +.LASF2033: + .string "EXTI_RTENR_TR6 ((uint32_t)0x00000040)" +.LASF1243: + .string "INT_FAST64_MIN (-__INT_FAST64_MAX__ - 1)" +.LASF1318: + .string "GPIOE_BASE (APB2PERIPH_BASE + 0x1800)" +.LASF1251: + .string "SIG_ATOMIC_MAX (__STDINT_EXP(INT_MAX))" +.LASF412: + .string "_VA_LIST " +.LASF1427: + .string "ADC_AWDCH_2 ((uint32_t)0x00000004)" +.LASF2026: + .string "EXTI_EVENR_MR19 ((uint32_t)0x00080000)" +.LASF172: + .string "__DBL_DENORM_MIN__ ((double)4.94065645841246544176568792868221372e-324L)" +.LASF4410: + .string "HID_GET_PROTOCOL 0x03" +.LASF3920: + .string "I2S_AudioFreq_44k ((uint32_t)44100)" +.LASF162: + .string "__DBL_MANT_DIG__ 53" +.LASF2616: + .string "I2C_STAR1_ADDR ((uint16_t)0x0002)" +.LASF1087: + .string "F_DUPFD 0" +.LASF3322: + .string "BKP_DR18 ((uint16_t)0x005C)" +.LASF533: + .string "RTGRAPHIC_CTRL_SET_MODE 4" +.LASF1882: + .string "DMA_CFGR3_PINC ((uint16_t)0x0040)" +.LASF1437: + .string "ADC_JDISCEN ((uint32_t)0x00001000)" +.LASF4669: + .string "_h_errno" +.LASF358: + .string "FINSH_ARG_MAX 10" +.LASF2588: + .string "I2C_CTLR2_FREQ_0 ((uint16_t)0x0001)" +.LASF1195: + .string "__LEAST8 \"hh\"" +.LASF3598: + .string "GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004)" +.LASF2079: + .string "EXTI_SWIEVR_SWIEVR12 ((uint32_t)0x00001000)" +.LASF3633: + .string "I2C_DutyCycle_16_9 ((uint16_t)0x4000)" +.LASF4120: + .string "TIM_FLAG_CC1 ((uint16_t)0x0002)" +.LASF1203: + .string "__int_fast8_t_defined 1" +.LASF1081: + .string "FCREAT _FCREAT" +.LASF1531: + .string "ADC_SMP7_2 ((uint32_t)0x00800000)" +.LASF1401: + .string "DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)" +.LASF1661: + .string "ADC_JSQ3_1 ((uint32_t)0x00000800)" +.LASF2394: + .string "AFIO_PCFR1_USART3_REMAP_NOREMAP ((uint32_t)0x00000000)" +.LASF2848: + .string "RTC_CTLRL_SECF ((uint8_t)0x01)" +.LASF878: + .string "_MACHTIME_H_ " +.LASF369: + .string "RT_USING_UART1 " +.LASF3500: + .string "EXTI_Line19 ((uint32_t)0x80000)" +.LASF3925: + .string "I2S_AudioFreq_8k ((uint32_t)8000)" +.LASF2350: + .string "GPIO_LCK11 ((uint32_t)0x00000800)" +.LASF3935: + .string "SPI_Direction_Rx ((uint16_t)0xBFFF)" +.LASF121: + .string "__UINT_LEAST16_MAX__ 0xffff" +.LASF1327: + .string "ADC3_BASE (APB2PERIPH_BASE + 0x3C00)" +.LASF820: + .string "__Long long" +.LASF4791: + .string "mstatus" +.LASF621: + .string "_ANSI_STDDEF_H " +.LASF447: + .string "RT_EINVAL 10" +.LASF1907: + .string "DMA_CFG4_MSIZE_1 ((uint16_t)0x0800)" +.LASF943: + .string "_TIME_T_DECLARED " +.LASF555: + .string "_MB_LEN_MAX 1" +.LASF1218: + .string "UINT16_MAX (__UINT16_MAX__)" +.LASF62: + .string "__UINT_FAST8_TYPE__ unsigned int" +.LASF3105: + .string "TIM_BKP ((uint16_t)0x2000)" +.LASF3092: + .string "TIM_DTG_1 ((uint16_t)0x0002)" +.LASF4801: + .string "frame" +.LASF2709: + .string "RCC_PPRE2_0 ((uint32_t)0x00000800)" +.LASF3719: + .string "IWDG_Prescaler_128 ((uint8_t)0x05)" +.LASF2569: + .string "IWDG_PR_2 ((uint8_t)0x04)" +.LASF1289: + .string "TIM2_BASE (APB1PERIPH_BASE + 0x0000)" +.LASF3278: + .string "ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000)" +.LASF2428: + .string "AFIO_PCFR1_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000)" +.LASF1895: + .string "DMA_CFG4_TCIE ((uint16_t)0x0002)" +.LASF911: + .string "BYTE_ORDER _BYTE_ORDER" +.LASF1574: + .string "ADC_L_3 ((uint32_t)0x00800000)" +.LASF4594: + .string "_fnargs" +.LASF3947: + .string "I2S_FLAG_UDR ((uint16_t)0x0008)" +.LASF4351: + .string "R8_UEP2_CTRL (*((PUINT8V)(0x4002343a)))" +.LASF2908: + .string "SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200)" +.LASF3978: + .string "TIM_OutputState_Enable ((uint16_t)0x0001)" +.LASF1699: + .string "BKP_DATAR20_D ((uint16_t)0xFFFF)" +.LASF2114: + .string "FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF)" +.LASF858: + .string "_REENT_STRTOK_LAST(ptr) ((ptr)->_new._reent._strtok_last)" +.LASF443: + .string "RT_ENOSYS 6" +.LASF2000: + .string "EXTI_INTENR_MR13 ((uint32_t)0x00002000)" +.LASF4223: + .string "RB_UC_DMA_EN 0x01" +.LASF575: + .string "_POSIX_C_SOURCE" +.LASF4137: + .string "TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers" +.LASF3756: + .string "RCC_PLLMul_12 ((uint32_t)0x00280000)" +.LASF1945: + .string "DMA_CFG6_PL_0 ((uint16_t)0x1000)" +.LASF3762: + .string "RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)" +.LASF1765: + .string "DAC_MAMP2_2 ((uint32_t)0x04000000)" +.LASF144: + .string "__FLT_EVAL_METHOD__ 0" +.LASF3580: + .string "GPIO_Remap_SPI1 ((uint32_t)0x00000001)" +.LASF4315: + .string "R16_UEP2_DMA (*((PUINT16V)(0x40023418)))" +.LASF3298: + .string "__CH32V10x_BKP_H " +.LASF2811: + .string "RCC_ADC1EN ((uint32_t)0x00000200)" +.LASF3807: + .string "RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)" +.LASF3655: + .string "I2C_NACKPosition_Current ((uint16_t)0xF7FF)" +.LASF4651: + .string "_unused_rand" +.LASF3436: + .string "DMA1_FLAG_GL2 ((uint32_t)0x00000010)" +.LASF4285: + .string "RB_UEP1_RX_EN 0x80" +.LASF4803: + .string "rt_hw_interrupt_disable" +.LASF4443: + .string "HUB_PORT_RESET 4" +.LASF3191: + .string "WWDG_CFGR_W ((uint16_t)0x007F)" +.LASF1262: + .string "INT32_C(x) __INT32_C(x)" +.LASF245: + .string "__FLT32X_HAS_INFINITY__ 1" +.LASF793: + .string "_SYS__TYPES_H " +.LASF3544: + .string "OB_IWDG_HW ((uint16_t)0x0000)" +.LASF1106: + .string "AT_FDCWD -2" +.LASF2941: + .string "TIM_SMS ((uint16_t)0x0007)" +.LASF2100: + .string "EXTI_INTF_INTF13 ((uint32_t)0x00002000)" +.LASF4692: + .string "Software_IRQn" +.LASF2308: + .string "GPIO_BSHR_BR1 ((uint32_t)0x00020000)" +.LASF3210: + .string "EXTEN_LOCKUP_RSTF ((uint32_t)0x00000080)" +.LASF4806: + .string "E:\\DevBoard\\ARTT\\00_gitee_rtt\\rt-thread\\libcpu\\risc-v\\ch32v103\\cpuport.c" +.LASF4376: + .string "R32_USB_EP7_CTRL (*((PUINT32V)(0x4002344c)))" +.LASF200: + .string "__FLT32_EPSILON__ 1.19209289550781250000000000000000000e-7F32" +.LASF3065: + .string "TIM_IC4F_2 ((uint16_t)0x4000)" +.LASF81: + .string "__SIZE_MAX__ 0xffffffffU" +.LASF4050: + .string "TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)" +.LASF3214: + .string "EXTEN_IDO_TRIM ((uint32_t)0x00000400)" +.LASF2075: + .string "EXTI_SWIEVR_SWIEVR8 ((uint32_t)0x00000100)" +.LASF923: + .string "howmany(x,y) (((x)+((y)-1))/(y))" +.LASF1061: + .string "O_APPEND _FAPPEND" +.LASF641: + .string "_SIZE_T_DEFINED_ " +.LASF1915: + .string "DMA_CFG5_TEIE ((uint16_t)0x0008)" +.LASF3923: + .string "I2S_AudioFreq_16k ((uint32_t)16000)" +.LASF4784: + .string "SetupSetUsbConfig" +.LASF4053: + .string "TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)" +.LASF25: + .string "__CHAR_BIT__ 8" +.LASF233: + .string "__FLT32X_MANT_DIG__ 53" +.LASF3835: + .string "RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)" +.LASF2639: + .string "I2C_CKCFGR_FS ((uint16_t)0x8000)" +.LASF288: + .string "__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1" +.LASF808: + .string "__lock_release_recursive(lock) __retarget_lock_release_recursive(lock)" +.LASF1936: + .string "DMA_CFG6_PINC ((uint16_t)0x0040)" +.LASF3903: + .string "I2S_Mode_SlaveRx ((uint16_t)0x0100)" +.LASF2360: + .string "AFIO_ECR_PIN_3 ((uint8_t)0x08)" +.LASF4596: + .string "_fntypes" +.LASF310: + .string "__riscv_cmodel_medlow 1" +.LASF323: + .string "RT_USING_OVERFLOW_CHECK " +.LASF3223: + .string "ADC_Mode_Independent ((uint32_t)0x00000000)" +.LASF1538: + .string "ADC_SMP9_1 ((uint32_t)0x10000000)" +.LASF3170: + .string "USART_CTLR3_CTSIE ((uint16_t)0x0400)" +.LASF580: + .string "__BSD_VISIBLE 1" +.LASF2062: + .string "EXTI_FTENR_TR15 ((uint32_t)0x00008000)" +.LASF935: + .string "__u_int_defined " +.LASF1828: + .string "DMA_CGIF5 ((uint32_t)0x00010000)" +.LASF2102: + .string "EXTI_INTF_INTF15 ((uint32_t)0x00008000)" +.LASF2688: + .string "RCC_HPRE_2 ((uint32_t)0x00000040)" +.LASF173: + .string "__DBL_HAS_DENORM__ 1" +.LASF1731: + .string "BKP_TEF ((uint16_t)0x0100)" +.LASF2199: + .string "GPIO_CFGLR_CNF4_1 ((uint32_t)0x00080000)" +.LASF1275: + .string "NVIC_KEY1 ((uint32_t)0xFA050000)" +.LASF231: + .string "__FLT128_HAS_INFINITY__ 1" +.LASF1902: + .string "DMA_CFG4_PSIZE ((uint16_t)0x0300)" +.LASF1140: + .string "rt_spin_unlock(lock) rt_exit_critical()" +.LASF2250: + .string "GPIO_CFGHR_CNF13 ((uint32_t)0x00C00000)" +.LASF1715: + .string "BKP_DATAR36_D ((uint16_t)0xFFFF)" +.LASF4547: + .string "NVIC_PriorityGroup_2 ((uint32_t)0x02)" +.LASF4375: + .string "R8_UEP6_CTRL (*((PUINT8V)(0x4002344a)))" +.LASF4328: + .string "R8_UEP1_CTRL (*((PUINT8V)(0x40023436)))" +.LASF4219: + .string "MASK_UC_SYS_CTRL 0x30" +.LASF851: + .string "_REENT_MP_RESULT(ptr) ((ptr)->_result)" +.LASF1862: + .string "DMA_CFGR2_DIR ((uint16_t)0x0010)" +.LASF2479: + .string "AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006)" +.LASF3255: + .string "ADC_Channel_12 ((uint8_t)0x0C)" +.LASF3508: + .string "FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000)" +.LASF1901: + .string "DMA_CFG4_MINC ((uint16_t)0x0080)" +.LASF467: + .string "RT_THREAD_READY 0x01" +.LASF1190: + .string "__INT64 \"ll\"" +.LASF3401: + .string "DMA1_IT_TC5 ((uint32_t)0x00020000)" +.LASF3033: + .string "TIM_CC3S_1 ((uint16_t)0x0002)" +.LASF3393: + .string "DMA1_IT_TC3 ((uint32_t)0x00000200)" +.LASF4360: + .string "R8_UEP3_T_LEN (*((PUINT16V)(0x4002343c)))" +.LASF3922: + .string "I2S_AudioFreq_22k ((uint32_t)22050)" +.LASF4795: + .string "from" +.LASF1099: + .string "F_CNVT 12" +.LASF4576: + .string "_flock_t" +.LASF3858: + .string "RCC_FLAG_LSERDY ((uint8_t)0x41)" +.LASF1366: + .string "SPI2 ((SPI_TypeDef *) SPI2_BASE)" +.LASF886: + .string "_UINT8_T_DECLARED " +.LASF1929: + .string "DMA_CFG5_MEM2MEM ((uint16_t)0x4000)" +.LASF552: + .string "_WANT_IO_LONG_LONG 1" +.LASF156: + .string "__FLT_MIN__ 1.17549435082228750796873653722224568e-38F" +.LASF2383: + .string "AFIO_ECR_PORT_PC ((uint8_t)0x20)" +.LASF3261: + .string "ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)" +.LASF3007: + .string "TIM_CC2S_1 ((uint16_t)0x0200)" +.LASF4346: + .string "R8_UH_SETUP R8_UEP1_CTRL" +.LASF2484: + .string "AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040)" +.LASF158: + .string "__FLT_DENORM_MIN__ 1.40129846432481707092372958328991613e-45F" +.LASF1462: + .string "ADC_EXTSEL_1 ((uint32_t)0x00040000)" +.LASF2512: + .string "AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000)" +.LASF4118: + .string "TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)" +.LASF3969: + .string "TIM_CounterMode_Down ((uint16_t)0x0010)" +.LASF2365: + .string "AFIO_ECR_PIN_PX4 ((uint8_t)0x04)" +.LASF2595: + .string "I2C_CTLR2_ITEVTEN ((uint16_t)0x0200)" +.LASF1307: + .string "I2C1_BASE (APB1PERIPH_BASE + 0x5400)" +.LASF3057: + .string "TIM_IC3F_2 ((uint16_t)0x0040)" +.LASF2367: + .string "AFIO_ECR_PIN_PX6 ((uint8_t)0x06)" +.LASF2045: + .string "EXTI_RTENR_TR18 ((uint32_t)0x00040000)" +.LASF4763: + .string "pEP4_RAM_Addr" +.LASF1625: + .string "ADC_SQ3_1 ((uint32_t)0x00000800)" +.LASF3691: + .string "I2C_FLAG_BTF ((uint32_t)0x10000004)" +.LASF2196: + .string "GPIO_CFGLR_CNF3_1 ((uint32_t)0x00008000)" +.LASF1522: + .string "ADC_SMP5_1 ((uint32_t)0x00010000)" +.LASF2613: + .string "I2C_OADDR2_ADD2 ((uint8_t)0xFE)" +.LASF687: + .string "__has_builtin(x) 0" +.LASF957: + .string "_NLINK_T_DECLARED " +.LASF3349: + .string "DBGMCU_IWDG_STOP ((uint32_t)0x00000001)" +.LASF480: + .string "RT_THREAD_CTRL_STARTUP 0x00" +.LASF3287: + .string "ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)" +.LASF1544: + .string "ADC_HT ((uint16_t)0x0FFF)" +.LASF1670: + .string "ADC_JSQ4_4 ((uint32_t)0x00080000)" +.LASF3729: + .string "PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)" +.LASF2924: + .string "TIM_CKD_0 ((uint16_t)0x0100)" +.LASF1224: + .string "UINT32_MAX (__UINT32_MAX__)" +.LASF1989: + .string "EXTI_INTENR_MR2 ((uint32_t)0x00000004)" +.LASF857: + .string "_REENT_EMERGENCY(ptr) ((ptr)->_emergency)" +.LASF1271: + .string "__IO volatile" +.LASF1423: + .string "ADC_STRT ((uint8_t)0x10)" +.LASF343: + .string "RT_VER_NUM 0x40003" +.LASF579: + .string "__ATFILE_VISIBLE 1" +.LASF202: + .string "__FLT32_HAS_DENORM__ 1" +.LASF2732: + .string "RCC_PLLSRC_HSE ((uint32_t)0x00010000)" +.LASF457: + .string "RT_TIMER_FLAG_HARD_TIMER 0x0" +.LASF2536: + .string "AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000)" +.LASF4291: + .string "RB_UEP3_RX_EN 0x80" +.LASF367: + .string "BSP_USING_PIN " +.LASF2636: + .string "I2C_STAR2_PEC ((uint16_t)0xFF00)" +.LASF3825: + .string "RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)" +.LASF1166: + .string "HSE_STARTUP_TIMEOUT ((uint16_t)0x500)" +.LASF131: + .string "__INT_FAST32_MAX__ 0x7fffffff" +.LASF2343: + .string "GPIO_LCK4 ((uint32_t)0x00000010)" +.LASF4786: + .string "SetupClrEndpStall" +.LASF2031: + .string "EXTI_RTENR_TR4 ((uint32_t)0x00000010)" +.LASF1466: + .string "ADC_SWSTART ((uint32_t)0x00400000)" +.LASF4782: + .string "SetupGetCfgDescr" +.LASF3785: + .string "RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)" +.LASF3512: + .string "FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008)" +.LASF3794: + .string "RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)" +.LASF5: + .string "__GNUC__ 8" +.LASF2753: + .string "RCC_MCO_1 ((uint32_t)0x02000000)" +.LASF2501: + .string "AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F)" +.LASF2050: + .string "EXTI_FTENR_TR3 ((uint32_t)0x00000008)" +.LASF4225: + .string "RB_UD_PD_DIS 0x80" +.LASF97: + .string "__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)" +.LASF4036: + .string "TIM_DMABase_CCR3 ((uint16_t)0x000F)" +.LASF4067: + .string "TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)" +.LASF159: + .string "__FLT_HAS_DENORM__ 1" +.LASF3522: + .string "FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000)" +.LASF3253: + .string "ADC_Channel_10 ((uint8_t)0x0A)" +.LASF3817: + .string "RCC_APB2Periph_USART1 ((uint32_t)0x00004000)" +.LASF2030: + .string "EXTI_RTENR_TR3 ((uint32_t)0x00000008)" +.LASF1185: + .string "_INTPTR_EQ_INT " +.LASF2316: + .string "GPIO_BSHR_BR9 ((uint32_t)0x02000000)" +.LASF1107: + .string "AT_EACCESS 1" +.LASF1410: + .string "DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)" +.LASF1997: + .string "EXTI_INTENR_MR10 ((uint32_t)0x00000400)" +.LASF331: + .string "RT_DEBUG " +.LASF2505: + .string "AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000)" +.LASF318: + .string "RT_NAME_MAX 8" +.LASF1012: + .string "S_IFLNK _IFLNK" +.LASF1593: + .string "ADC_SQ10 ((uint32_t)0x000F8000)" +.LASF4282: + .string "R8_USB_RX_LEN (*((PUINT8V)(0x40023408)))" +.LASF658: + .string "_WCHAR_T_DEFINED_ " +.LASF1348: + .string "RCC_BASE (AHBPERIPH_BASE + 0x1000)" +.LASF2253: + .string "GPIO_CFGHR_CNF14 ((uint32_t)0x0C000000)" +.LASF1869: + .string "DMA_CFGR2_MSIZE ((uint16_t)0x0C00)" +.LASF2521: + .string "AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200)" +.LASF3797: + .string "RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)" +.LASF4224: + .string "R8_UDEV_CTRL (*((PUINT8V)(0x40023401)))" +.LASF4737: + .string "GISR" +.LASF3437: + .string "DMA1_FLAG_TC2 ((uint32_t)0x00000020)" +.LASF394: + .string "RT_UINT16_MAX 0xffff" +.LASF4065: + .string "TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)" +.LASF2726: + .string "RCC_PLLMULL ((uint32_t)0x003C0000)" +.LASF1797: + .string "DMA_TCIF4 ((uint32_t)0x00002000)" +.LASF1634: + .string "ADC_SQ4_4 ((uint32_t)0x00080000)" +.LASF2083: + .string "EXTI_SWIEVR_SWIEVR16 ((uint32_t)0x00010000)" +.LASF3986: + .string "TIM_Break_Disable ((uint16_t)0x0000)" +.LASF4256: + .string "RB_UMS_BUS_RESET 0x08" +.LASF767: + .string "__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))" +.LASF2603: + .string "I2C_OADDR1_ADD2 ((uint16_t)0x0004)" +.LASF2819: + .string "RCC_USART2EN ((uint32_t)0x00020000)" +.LASF3904: + .string "I2S_Mode_MasterTx ((uint16_t)0x0200)" +.LASF2138: + .string "FLASH_OBR_WDG_SW ((uint16_t)0x0004)" +.LASF3605: + .string "GPIO_Remap_MISC ((uint32_t)0x80002000)" +.LASF1176: + .string "__int20" +.LASF1710: + .string "BKP_DATAR31_D ((uint16_t)0xFFFF)" +.LASF3778: + .string "RCC_IT_LSIRDY ((uint8_t)0x01)" +.LASF267: + .string "__DEC32_SUBNORMAL_MIN__ 0.000001E-95DF" +.LASF2342: + .string "GPIO_LCK3 ((uint32_t)0x00000008)" +.LASF3330: + .string "BKP_DR26 ((uint16_t)0x007C)" +.LASF414: + .string "_VA_LIST_T_H " +.LASF1032: + .string "S_ISDIR(m) (((m)&_IFMT) == _IFDIR)" +.LASF3678: + .string "I2C_FLAG_BUSY ((uint32_t)0x00020000)" +.LASF3250: + .string "ADC_Channel_7 ((uint8_t)0x07)" +.LASF4519: + .string "EP7_GetINSta() (R8_UEP7_CTRL&UEP_T_RES_NAK)" +.LASF1898: + .string "DMA_CFG4_DIR ((uint16_t)0x0010)" +.LASF2552: + .string "AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100)" +.LASF278: + .string "__DEC128_MIN__ 1E-6143DL" +.LASF2248: + .string "GPIO_CFGHR_CNF12_0 ((uint32_t)0x00040000)" +.LASF3761: + .string "RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)" +.LASF3455: + .string "DMA1_FLAG_TE6 ((uint32_t)0x00800000)" +.LASF4394: + .string "USB_SET_ADDRESS 0x05" +.LASF4623: + .string "_stdin" +.LASF4099: + .string "TIM_OCPreload_Enable ((uint16_t)0x0008)" +.LASF1599: + .string "ADC_SQ11 ((uint32_t)0x01F00000)" +.LASF2547: + .string "AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030)" +.LASF82: + .string "__SCHAR_WIDTH__ 8" +.LASF3347: + .string "__CH32V10x_CRC_H " +.LASF1742: + .string "DAC_TSEL1_2 ((uint32_t)0x00000020)" +.LASF2582: + .string "I2C_CTLR1_ACK ((uint16_t)0x0400)" +.LASF4262: + .string "RB_U_TOG_OK 0x40" +.LASF1336: + .string "DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C)" +.LASF831: + .string "_RAND48_ADD (0x000b)" +.LASF2563: + .string "AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000)" +.LASF4626: + .string "_inc" +.LASF4599: + .string "_ind" +.LASF4780: + .string "pHOST_TX_RAM_Addr" +.LASF31: + .string "__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__" +.LASF1487: + .string "ADC_SMP14_2 ((uint32_t)0x00004000)" +.LASF48: + .string "__UINT32_TYPE__ long unsigned int" +.LASF2444: + .string "AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003)" +.LASF2413: + .string "AFIO_PCFR1_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000)" +.LASF1297: + .string "TIM14_BASE (APB1PERIPH_BASE + 0x2000)" +.LASF3377: + .string "DMA_Priority_Medium ((uint32_t)0x00001000)" +.LASF3507: + .string "FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010)" +.LASF3588: + .string "GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100)" +.LASF603: + .string "_NOINLINE_STATIC _NOINLINE static" +.LASF1465: + .string "ADC_JSWSTART ((uint32_t)0x00200000)" +.LASF2887: + .string "SPI_STATR_CHSIDE ((uint8_t)0x04)" +.LASF1170: + .string "_STDINT_H " +.LASF2116: + .string "FLASH_STATR_BSY ((uint8_t)0x01)" +.LASF2144: + .string "FLASH_RDPR_nRDPR ((uint32_t)0x0000FF00)" +.LASF1881: + .string "DMA_CFGR3_CIRC ((uint16_t)0x0020)" +.LASF3086: + .string "TIM_CCR1 ((uint16_t)0xFFFF)" +.LASF4063: + .string "TIM_DMA_COM ((uint16_t)0x2000)" +.LASF810: + .string "unsigned signed" +.LASF3786: + .string "RCC_PCLK2_Div2 ((uint32_t)0x00000000)" +.LASF902: + .string "_LITTLE_ENDIAN 1234" +.LASF1721: + .string "BKP_DATAR42_D ((uint16_t)0xFFFF)" +.LASF1469: + .string "ADC_SMP10_0 ((uint32_t)0x00000001)" +.LASF4610: + .string "_write" +.LASF1553: + .string "ADC_SQ14_0 ((uint32_t)0x00000020)" +.LASF1329: + .string "TIM16_BASE (APB2PERIPH_BASE + 0x4400)" +.LASF4461: + .string "USB_DESCR_TYP_PHYSIC 0x23" +.LASF1452: + .string "ADC_RSTCAL ((uint32_t)0x00000008)" +.LASF4057: + .string "TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)" +.LASF1567: + .string "ADC_SQ16_2 ((uint32_t)0x00020000)" +.LASF872: + .string "__ATTRIBUTE_IMPURE_PTR__ " +.LASF4087: + .string "TIM_EncoderMode_TI2 ((uint16_t)0x0002)" +.LASF2532: + .string "AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000)" +.LASF2764: + .string "RCC_PLLRDYF ((uint32_t)0x00000010)" +.LASF3120: + .string "TIM_DMAR_DMAB ((uint16_t)0xFFFF)" +.LASF193: + .string "__FLT32_MIN_EXP__ (-125)" +.LASF3629: + .string "__CH32V10x_I2C_H " +.LASF3285: + .string "ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)" +.LASF3561: + .string "FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR" +.LASF2655: + .string "PWR_CTLR_PLS_2V7 ((uint16_t)0x00A0)" +.LASF633: + .string "__SIZE_T__ " +.LASF2630: + .string "I2C_STAR2_BUSY ((uint16_t)0x0002)" +.LASF4240: + .string "RB_UIE_DEV_NAK 0x40" +.LASF632: + .string "__size_t__ " +.LASF3791: + .string "RCC_LSE_ON ((uint8_t)0x01)" +.LASF2885: + .string "SPI_STATR_RXNE ((uint8_t)0x01)" +.LASF3146: + .string "USART_CTLR1_M ((uint16_t)0x1000)" +.LASF1089: + .string "F_SETFD 2" +.LASF3394: + .string "DMA1_IT_HT3 ((uint32_t)0x00000400)" +.LASF3570: + .string "GPIO_Pin_7 ((uint16_t)0x0080)" +.LASF3528: + .string "FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000)" +.LASF400: + .string "RT_MB_ENTRY_MAX RT_UINT16_MAX" +.LASF2019: + .string "EXTI_EVENR_MR12 ((uint32_t)0x00001000)" +.LASF2861: + .string "RTC_ALRML_RTC_ALRM ((uint16_t)0xFFFF)" +.LASF1768: + .string "DAC_SWTRIG1 ((uint8_t)0x01)" +.LASF1606: + .string "ADC_SQ12_0 ((uint32_t)0x02000000)" +.LASF1180: + .string "char +0" +.LASF3867: + .string "SysTick_CLKSource_HCLK ((uint32_t)0x00000004)" +.LASF2043: + .string "EXTI_RTENR_TR16 ((uint32_t)0x00010000)" +.LASF4303: + .string "RB_UEP6_RX_EN 0x80" +.LASF4021: + .string "TIM_DMABase_CR1 ((uint16_t)0x0000)" +.LASF247: + .string "__FLT64X_MANT_DIG__ 113" +.LASF357: + .string "FINSH_USING_MSH_ONLY " +.LASF4287: + .string "RB_UEP1_BUF_MOD 0x10" +.LASF339: + .string "RT_USING_DEVICE " +.LASF906: + .string "_QUAD_HIGHWORD 1" +.LASF1222: + .string "INT32_MIN (-__INT32_MAX__ - 1)" +.LASF2299: + .string "GPIO_BSHR_BS8 ((uint32_t)0x00000100)" +.LASF3680: + .string "I2C_FLAG_SMBALERT ((uint32_t)0x10008000)" +.LASF1724: + .string "BKP_ASOE ((uint16_t)0x0100)" +.LASF1977: + .string "DMA_PADDR5_PA ((uint32_t)0xFFFFFFFF)" +.LASF2830: + .string "RCC_RTCSEL_NOCLOCK ((uint32_t)0x00000000)" +.LASF807: + .string "__lock_release(lock) __retarget_lock_release(lock)" +.LASF2480: + .string "AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000)" +.LASF1934: + .string "DMA_CFG6_DIR ((uint16_t)0x0010)" +.LASF1639: + .string "ADC_SQ5_3 ((uint32_t)0x00800000)" +.LASF554: + .string "_WANT_IO_LONG_DOUBLE 1" +.LASF3111: + .string "TIM_DBA_2 ((uint16_t)0x0004)" +.LASF1815: + .string "DMA_CTEIF1 ((uint32_t)0x00000008)" +.LASF4030: + .string "TIM_DMABase_CNT ((uint16_t)0x0009)" +.LASF1396: + .string "TIM9 ((TIM_TypeDef *) TIM9_BASE)" +.LASF2056: + .string "EXTI_FTENR_TR9 ((uint32_t)0x00000200)" +.LASF3186: + .string "WWDG_CTLR_T3 ((uint8_t)0x08)" +.LASF1477: + .string "ADC_SMP12_0 ((uint32_t)0x00000040)" +.LASF1338: + .string "DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044)" +.LASF2704: + .string "RCC_PPRE1_DIV2 ((uint32_t)0x00000400)" +.LASF1912: + .string "DMA_CFG5_EN ((uint16_t)0x0001)" +.LASF2011: + .string "EXTI_EVENR_MR4 ((uint32_t)0x00000010)" +.LASF1148: + .string "MSH_CMD_EXPORT(command,desc) FINSH_FUNCTION_EXPORT_CMD(command, __cmd_ ##command, desc)" +.LASF4580: + .string "_sign" +.LASF223: + .string "__FLT128_MAX_EXP__ 16384" +.LASF936: + .string "__u_long_defined " +.LASF1092: + .string "F_GETOWN 5" +.LASF3664: + .string "I2C_IT_ARLO ((uint32_t)0x01000200)" +.LASF364: + .string "RT_USING_LIBC " +.LASF3439: + .string "DMA1_FLAG_TE2 ((uint32_t)0x00000080)" +.LASF2256: + .string "GPIO_CFGHR_CNF15 ((uint32_t)0xC0000000)" +.LASF418: + .string "RT_USED __attribute__((used))" +.LASF2796: + .string "RCC_TIM4RST ((uint32_t)0x00000004)" +.LASF16: + .string "__FINITE_MATH_ONLY__ 0" +.LASF3896: + .string "SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)" +.LASF1157: + .string "rt_hw_spin_unlock(lock) rt_hw_interrupt_enable(*(lock))" +.LASF2320: + .string "GPIO_BSHR_BR13 ((uint32_t)0x20000000)" +.LASF1468: + .string "ADC_SMP10 ((uint32_t)0x00000007)" +.LASF487: + .string "RT_IPC_CMD_UNKNOWN 0x00" +.LASF4399: + .string "USB_GET_INTERFACE 0x0A" +.LASF3624: + .string "GPIO_PinSource11 ((uint8_t)0x0B)" +.LASF3373: + .string "DMA_Mode_Circular ((uint32_t)0x00000020)" +.LASF2010: + .string "EXTI_EVENR_MR3 ((uint32_t)0x00000008)" +.LASF4007: + .string "TIM_ICSelection_IndirectTI ((uint16_t)0x0002)" +.LASF2060: + .string "EXTI_FTENR_TR13 ((uint32_t)0x00002000)" +.LASF1865: + .string "DMA_CFGR2_MINC ((uint16_t)0x0080)" +.LASF2466: + .string "AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000)" +.LASF1210: + .string "INT8_MIN (-__INT8_MAX__ - 1)" +.LASF1850: + .string "DMA_CFGR1_PSIZE_1 ((uint16_t)0x0200)" +.LASF1831: + .string "DMA_CTEIF5 ((uint32_t)0x00080000)" +.LASF4426: + .string "USB_REQ_RECIP_ENDP 0x02" +.LASF4781: + .string "SetupGetDevDescr" +.LASF197: + .string "__FLT32_DECIMAL_DIG__ 9" +.LASF4503: + .string "pEP3_OUT_DataBuf (pEP3_RAM_Addr)" +.LASF470: + .string "RT_THREAD_BLOCK RT_THREAD_SUSPEND" +.LASF1482: + .string "ADC_SMP13_1 ((uint32_t)0x00000400)" +.LASF612: + .string "___int32_t_defined 1" +.LASF2118: + .string "FLASH_STATR_WRPRTERR ((uint8_t)0x10)" +.LASF1986: + .string "DMA_MADDR7_MA ((uint32_t)0xFFFFFFFF)" +.LASF4498: + .string "pEP0_DataBuf (pEP0_RAM_Addr)" +.LASF2964: + .string "TIM_CC4IE ((uint16_t)0x0010)" +.LASF4733: + .string "IRQn_Type" +.LASF3323: + .string "BKP_DR19 ((uint16_t)0x0060)" +.LASF4789: + .string "rt_thread_switch_interrupt_flag" +.LASF213: + .string "__FLT64_MIN__ 2.22507385850720138309023271733240406e-308F64" +.LASF708: + .string "__CC_SUPPORTS___FUNC__ 1" +.LASF3412: + .string "DMA2_IT_GL1 ((uint32_t)0x10000001)" +.LASF3509: + .string "FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001)" +.LASF3030: + .string "TIM_IC2F_3 ((uint16_t)0x8000)" +.LASF4011: + .string "TIM_ICPSC_DIV4 ((uint16_t)0x0008)" +.LASF228: + .string "__FLT128_EPSILON__ 1.92592994438723585305597794258492732e-34F128" +.LASF1006: + .string "S_ENFMT 0002000" +.LASF4635: + .string "_freelist" +.LASF1000: + .string "S_ISUID 0004000" +.LASF1757: + .string "DAC_TSEL2_1 ((uint32_t)0x00100000)" +.LASF3019: + .string "TIM_IC1F_0 ((uint16_t)0x0010)" +.LASF1249: + .string "SIZE_MAX (__SIZE_MAX__)" +.LASF2537: + .string "AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000)" +.LASF4794: + .string "rt_hw_context_switch_interrupt" +.LASF1935: + .string "DMA_CFG6_CIRC ((uint16_t)0x0020)" +.LASF3537: + .string "FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000)" +.LASF574: + .string "_POSIX_SOURCE 1" +.LASF4403: + .string "HUB_CLEAR_FEATURE 0x01" +.LASF1866: + .string "DMA_CFGR2_PSIZE ((uint16_t)0x0300)" +.LASF3089: + .string "TIM_CCR4 ((uint16_t)0xFFFF)" +.LASF4075: + .string "TIM_TS_TI2FP2 ((uint16_t)0x0060)" +.LASF4627: + .string "_emergency" +.LASF2570: + .string "IWDG_RL ((uint16_t)0x0FFF)" +.LASF3519: + .string "FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400)" +.LASF508: + .string "RT_DEVICE_OFLAG_RDONLY 0x001" +.LASF1200: + .string "__int_least16_t_defined 1" +.LASF2775: + .string "RCC_PLLRDYC ((uint32_t)0x00100000)" +.LASF188: + .string "__LDBL_HAS_DENORM__ 1" +.LASF655: + .string "__WCHAR_T " +.LASF888: + .string "_INT16_T_DECLARED " +.LASF3740: + .string "RCC_HSE_OFF ((uint32_t)0x00000000)" +.LASF446: + .string "RT_EINTR 9" +.LASF1583: + .string "ADC_SQ8_1 ((uint32_t)0x00000040)" +.LASF2459: + .string "AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400)" +.LASF3117: + .string "TIM_DBL_2 ((uint16_t)0x0400)" +.LASF3941: + .string "SPI_IT_MODF ((uint8_t)0x55)" +.LASF2052: + .string "EXTI_FTENR_TR5 ((uint32_t)0x00000020)" +.LASF91: + .string "__INTMAX_MAX__ 0x7fffffffffffffffLL" +.LASF3469: + .string "DMA2_FLAG_TC3 ((uint32_t)0x10000200)" +.LASF2591: + .string "I2C_CTLR2_FREQ_3 ((uint16_t)0x0008)" +.LASF1288: + .string "AHBPERIPH_BASE (PERIPH_BASE + 0x20000)" +.LASF1088: + .string "F_GETFD 1" +.LASF276: + .string "__DEC128_MIN_EXP__ (-6142)" +.LASF1168: + .string "HardFault_IRQn EXC_IRQn" +.LASF3738: + .string "PWR_FLAG_PVDO ((uint32_t)0x00000004)" +.LASF2557: + .string "AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600)" +.LASF2884: + .string "SPI_CTLR2_TXEIE ((uint8_t)0x80)" +.LASF2906: + .string "SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300)" +.LASF93: + .string "__UINTMAX_MAX__ 0xffffffffffffffffULL" +.LASF2783: + .string "RCC_ADC2RST ((uint32_t)0x00000400)" +.LASF2507: + .string "AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002)" +.LASF1246: + .string "INTMAX_MAX (__INTMAX_MAX__)" +.LASF4512: + .string "pEP7_IN_DataBuf (pEP7_RAM_Addr+64)" +.LASF898: + .string "_UINTMAX_T_DECLARED " +.LASF3999: + .string "TIM_OCIdleState_Set ((uint16_t)0x0100)" +.LASF941: + .string "_CLOCK_T_DECLARED " +.LASF4141: + .string "TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers" +.LASF1856: + .string "DMA_CFGR1_PL_1 ((uint16_t)0x2000)" +.LASF4515: + .string "EP3_GetINSta() (R8_UEP3_CTRL&UEP_T_RES_NAK)" +.LASF479: + .string "RT_THREAD_STAT_SIGNAL_MASK 0xf0" +.LASF3228: + .string "ADC_Mode_InjecSimult ((uint32_t)0x00050000)" +.LASF33: + .string "__SIZE_TYPE__ unsigned int" +.LASF3002: + .string "TIM_OC1M_1 ((uint16_t)0x0020)" +.LASF502: + .string "RT_DEVICE_FLAG_STREAM 0x040" +.LASF4602: + .string "_base" +.LASF3084: + .string "TIM_ARR ((uint16_t)0xFFFF)" +.LASF2024: + .string "EXTI_EVENR_MR17 ((uint32_t)0x00020000)" +.LASF2754: + .string "RCC_MCO_2 ((uint32_t)0x04000000)" +.LASF4278: + .string "UIS_TOKEN_IN 0x20" +.LASF4015: + .string "TIM_IT_CC2 ((uint16_t)0x0004)" +.LASF1186: + .string "_INT32_EQ_LONG " +.LASF4521: + .string "ERR_SUCCESS 0x00" +.LASF2880: + .string "SPI_CTLR2_TXDMAEN ((uint8_t)0x02)" +.LASF118: + .string "__INT_LEAST64_WIDTH__ 64" +.LASF2189: + .string "GPIO_CFGLR_CNF1_0 ((uint32_t)0x00000040)" +.LASF1891: + .string "DMA_CFGR3_PL_0 ((uint16_t)0x1000)" +.LASF4175: + .string "USART_IT_TC ((uint16_t)0x0626)" +.LASF2155: + .string "FLASH_WRPR2_WRPR2 ((uint32_t)0x000000FF)" +.LASF1787: + .string "DMA_TEIF1 ((uint32_t)0x00000008)" +.LASF2344: + .string "GPIO_LCK5 ((uint32_t)0x00000020)" +.LASF1361: + .string "TIM13 ((TIM_TypeDef *) TIM13_BASE)" +.LASF2032: + .string "EXTI_RTENR_TR5 ((uint32_t)0x00000020)" +.LASF274: + .string "__DEC64_SUBNORMAL_MIN__ 0.000000000000001E-383DD" +.LASF4647: + .string "_rand48" +.LASF3048: + .string "TIM_OC4M_1 ((uint16_t)0x2000)" +.LASF1808: + .string "DMA_GIF7 ((uint32_t)0x01000000)" +.LASF201: + .string "__FLT32_DENORM_MIN__ 1.40129846432481707092372958328991613e-45F32" +.LASF3523: + .string "FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000)" +.LASF4687: + .string "_syscall_table_begin" +.LASF4319: + .string "R16_UEP5_DMA (*((PUINT16V)(0x40023424)))" +.LASF2143: + .string "FLASH_RDPR_RDPR ((uint32_t)0x000000FF)" +.LASF2855: + .string "RTC_PSCL_PRL ((uint16_t)0xFFFF)" +.LASF2057: + .string "EXTI_FTENR_TR10 ((uint32_t)0x00000400)" +.LASF843: + .string "_REENT_CHECK_EMERGENCY(ptr) " +.LASF2097: + .string "EXTI_INTF_INTF10 ((uint32_t)0x00000400)" +.LASF4187: + .string "USART_DMAReq_Rx ((uint16_t)0x0040)" +.LASF3577: + .string "GPIO_Pin_14 ((uint16_t)0x4000)" +.LASF3530: + .string "FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000)" +.LASF4091: + .string "TIM_EventSource_CC2 ((uint16_t)0x0004)" +.LASF929: + .string "physadr physadr_t" +.LASF1684: + .string "BKP_DATAR5_D ((uint16_t)0xFFFF)" +.LASF543: + .string "_SYS_STAT_H " +.LASF2712: + .string "RCC_PPRE2_DIV1 ((uint32_t)0x00000000)" +.LASF3816: + .string "RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)" +.LASF3367: + .string "DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)" +.LASF2403: + .string "AFIO_PCFR1_TIM2_REMAP ((uint32_t)0x00000300)" +.LASF4661: + .string "_l64a_buf" +.LASF1992: + .string "EXTI_INTENR_MR5 ((uint32_t)0x00000020)" +.LASF1732: + .string "BKP_TIF ((uint16_t)0x0200)" +.LASF453: + .string "RT_TIMER_FLAG_DEACTIVATED 0x0" +.LASF1919: + .string "DMA_CFG5_MINC ((uint16_t)0x0080)" +.LASF3229: + .string "ADC_Mode_RegSimult ((uint32_t)0x00060000)" +.LASF454: + .string "RT_TIMER_FLAG_ACTIVATED 0x1" +.LASF3787: + .string "RCC_PCLK2_Div4 ((uint32_t)0x00004000)" +.LASF4481: + .string "USB_ENDP_TYPE_BULK 0x02" +.LASF3589: + .string "GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200)" +.LASF2883: + .string "SPI_CTLR2_RXNEIE ((uint8_t)0x40)" +.LASF2720: + .string "RCC_ADCPRE_DIV2 ((uint32_t)0x00000000)" +.LASF4333: + .string "RB_UEP_R_RES0 0x04" +.LASF651: + .string "__WCHAR_T__ " +.LASF2037: + .string "EXTI_RTENR_TR10 ((uint32_t)0x00000400)" +.LASF3666: + .string "I2C_IT_TXE ((uint32_t)0x06000080)" +.LASF2133: + .string "FLASH_CTLR_BUF_RST ((uint16_t)0x00080000)" +.LASF2664: + .string "RCC_HSIRDY ((uint32_t)0x00000002)" +.LASF3714: + .string "IWDG_Prescaler_4 ((uint8_t)0x00)" +.LASF1493: + .string "ADC_SMP16_0 ((uint32_t)0x00040000)" +.LASF3774: + .string "RCC_HCLK_Div2 ((uint32_t)0x00000400)" +.LASF123: + .string "__UINT_LEAST32_MAX__ 0xffffffffUL" +.LASF3148: + .string "USART_CTLR1_OVER8 ((uint16_t)0x8000)" +.LASF3197: + .string "WWDG_CFGR_W5 ((uint16_t)0x0020)" +.LASF1119: + .string "DT_REG 0x01" +.LASF4625: + .string "_stderr" +.LASF3102: + .string "TIM_OSSI ((uint16_t)0x0400)" +.LASF484: + .string "RT_THREAD_CTRL_BIND_CPU 0x04" +.LASF945: + .string "__caddr_t_defined " +.LASF3964: + .string "TIM_Channel_4 ((uint16_t)0x000C)" +.LASF4209: + .string "__CH32V10x_USB_H " +.LASF4396: + .string "USB_SET_DESCRIPTOR 0x07" +.LASF685: + .string "__has_extension __has_feature" +.LASF934: + .string "__u_short_defined " +.LASF4265: + .string "RB_UIF_HST_SOF 0x08" +.LASF3227: + .string "ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)" +.LASF797: + .string "__LOCK_INIT(class,lock) extern struct __lock __lock_ ## lock; class _LOCK_T lock = &__lock_ ## lock" +.LASF4566: + .string "_LOCK_T" +.LASF4467: + .string "USB_DEV_CLASS_COMMUNIC 0x02" +.LASF2778: + .string "RCC_IOPARST ((uint32_t)0x00000004)" +.LASF4181: + .string "USART_IT_ERR ((uint16_t)0x0060)" +.LASF4727: + .string "USART2_IRQn" +.LASF2814: + .string "RCC_SPI1EN ((uint32_t)0x00001000)" +.LASF1949: + .string "DMA_CFG7_TCIE ((uint16_t)0x0002)" +.LASF4543: + .string "FREE_INT_SP() asm(\"csrrw sp,mscratch,sp\")" +.LASF1668: + .string "ADC_JSQ4_2 ((uint32_t)0x00020000)" +.LASF3553: + .string "FLASH_FLAG_BSY ((uint32_t)0x00000001)" +.LASF1242: + .string "UINT_FAST32_MAX (__UINT_FAST32_MAX__)" +.LASF1043: + .string "_FAPPEND 0x0008" +.LASF3558: + .string "FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY" +.LASF333: + .string "RT_USING_MUTEX " +.LASF4107: + .string "TIM_TRGOSource_Update ((uint16_t)0x0020)" +.LASF1910: + .string "DMA_CFG4_PL_1 ((uint16_t)0x2000)" +.LASF1256: + .string "WINT_MAX (__WINT_MAX__)" +.LASF567: + .string "__OBSOLETE_MATH __OBSOLETE_MATH_DEFAULT" +.LASF1922: + .string "DMA_CFG5_PSIZE_1 ((uint16_t)0x0200)" +.LASF4279: + .string "UIS_TOKEN_SETUP 0x30" +.LASF3355: + .string "DBGMCU_TIM3_STOP ((uint32_t)0x00000040)" +.LASF2330: + .string "GPIO_BCR_BR7 ((uint16_t)0x0080)" +.LASF3639: + .string "I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)" +.LASF3071: + .string "TIM_CC2E ((uint16_t)0x0010)" +.LASF4184: + .string "USART_IT_FE ((uint16_t)0x0160)" +.LASF1151: + .string "HWREG16(x) (*((volatile rt_uint16_t *)(x)))" +.LASF4585: + .string "__tm_min" +.LASF2970: + .string "TIM_CC2DE ((uint16_t)0x0400)" +.LASF406: + .string "va_start(v,l) __builtin_va_start(v,l)" +.LASF1697: + .string "BKP_DATAR18_D ((uint16_t)0xFFFF)" +.LASF4233: + .string "RB_UH_DP_PIN 0x20" +.LASF2266: + .string "GPIO_INDR_IDR7 ((uint16_t)0x0080)" +.LASF1748: + .string "DAC_MAMP1_1 ((uint32_t)0x00000200)" +.LASF2112: + .string "FLASH_ACTLR_PRFTBE ((uint8_t)0x10)" +.LASF3957: + .string "TIM_OCMode_PWM1 ((uint16_t)0x0060)" +.LASF1539: + .string "ADC_SMP9_2 ((uint32_t)0x20000000)" +.LASF1564: + .string "ADC_SQ16 ((uint32_t)0x000F8000)" +.LASF1512: + .string "ADC_SMP3 ((uint32_t)0x00000E00)" +.LASF4368: + .string "R8_UEP4_T_LEN (*((PUINT8V)(0x40023440)))" +.LASF3464: + .string "DMA2_FLAG_GL2 ((uint32_t)0x10000010)" +.LASF2400: + .string "AFIO_PCFR1_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000)" +.LASF504: + .string "RT_DEVICE_FLAG_DMA_RX 0x200" +.LASF4668: + .string "_wcsrtombs_state" +.LASF4400: + .string "USB_SET_INTERFACE 0x0B" +.LASF3839: + .string "RCC_APB1Periph_UART4 ((uint32_t)0x00080000)" +.LASF4077: + .string "TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)" +.LASF1775: + .string "DAC_DHR8R2 ((uint8_t)0xFF)" +.LASF1390: + .string "TIM8 ((TIM_TypeDef *) TIM8_BASE)" +.LASF3193: + .string "WWDG_CFGR_W1 ((uint16_t)0x0002)" +.LASF279: + .string "__DEC128_MAX__ 9.999999999999999999999999999999999E6144DL" +.LASF2994: + .string "TIM_BG ((uint8_t)0x80)" +.LASF4260: + .string "R8_USB_INT_FG (*((PUINT8V)(0x40023406)))" +.LASF1034: + .string "S_ISREG(m) (((m)&_IFMT) == _IFREG)" +.LASF1607: + .string "ADC_SQ12_1 ((uint32_t)0x04000000)" +.LASF4435: + .string "HUB_SET_HUB_FEATURE 0x20" +.LASF1114: + .string "LOCK_UN 0x08" +.LASF163: + .string "__DBL_DIG__ 15" +.LASF58: + .string "__INT_FAST8_TYPE__ int" +.LASF3026: + .string "TIM_IC2F ((uint16_t)0xF000)" +.LASF3851: + .string "RCC_MCO_SYSCLK ((uint8_t)0x04)" +.LASF3277: + .string "ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000)" +.LASF4249: + .string "MASK_USB_ADDR 0x7F" +.LASF1502: + .string "ADC_SMP0_1 ((uint32_t)0x00000002)" +.LASF3397: + .string "DMA1_IT_TC4 ((uint32_t)0x00002000)" +.LASF2776: + .string "RCC_CSSC ((uint32_t)0x00800000)" +.LASF1355: + .string "TIM3 ((TIM_TypeDef *) TIM3_BASE)" +.LASF1944: + .string "DMA_CFG6_PL ((uint16_t)0x3000)" +.LASF3849: + .string "RCC_APB1Periph_CEC ((uint32_t)0x40000000)" +.LASF1519: + .string "ADC_SMP4_2 ((uint32_t)0x00004000)" +.LASF501: + .string "RT_DEVICE_FLAG_SUSPENDED 0x020" +.LASF1481: + .string "ADC_SMP13_0 ((uint32_t)0x00000200)" +.LASF3773: + .string "RCC_HCLK_Div1 ((uint32_t)0x00000000)" +.LASF1347: + .string "DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458)" +.LASF3616: + .string "GPIO_PinSource3 ((uint8_t)0x03)" +.LASF3296: + .string "ADC_FLAG_JSTRT ((uint8_t)0x08)" +.LASF3295: + .string "ADC_FLAG_JEOC ((uint8_t)0x04)" +.LASF2493: + .string "AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600)" +.LASF3470: + .string "DMA2_FLAG_HT3 ((uint32_t)0x10000400)" +.LASF4533: + .string "ROOT_DEV_SUCCESS 3" +.LASF1384: + .string "GPIOF ((GPIO_TypeDef *) GPIOF_BASE)" +.LASF1636: + .string "ADC_SQ5_0 ((uint32_t)0x00100000)" +.LASF542: + .string "LIBC_STAT_H__ " +.LASF2828: + .string "RCC_RTCSEL_0 ((uint32_t)0x00000100)" +.LASF1601: + .string "ADC_SQ11_1 ((uint32_t)0x00200000)" +.LASF1758: + .string "DAC_TSEL2_2 ((uint32_t)0x00200000)" +.LASF3342: + .string "BKP_DR38 ((uint16_t)0x00AC)" +.LASF4162: + .string "USART_HardwareFlowControl_RTS ((uint16_t)0x0100)" +.LASF912: + .string "__bswap16(_x) __builtin_bswap16(_x)" +.LASF1230: + .string "UINT64_MAX (__UINT64_MAX__)" +.LASF3878: + .string "SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)" +.LASF3017: + .string "TIM_IC1PSC_1 ((uint16_t)0x0008)" +.LASF3331: + .string "BKP_DR27 ((uint16_t)0x0080)" +.LASF2674: + .string "RCC_SW_0 ((uint32_t)0x00000001)" +.LASF3409: + .string "DMA1_IT_TC7 ((uint32_t)0x02000000)" +.LASF3305: + .string "BKP_DR1 ((uint16_t)0x0004)" +.LASF2833: + .string "RCC_RTCSEL_HSE ((uint32_t)0x00000300)" +.LASF478: + .string "RT_THREAD_STAT_SIGNAL_PENDING 0x40" +.LASF1752: + .string "DAC_EN2 ((uint32_t)0x00010000)" +.LASF1084: + .string "FNOCTTY _FNOCTTY" +.LASF4440: + .string "HUB_PORT_ENABLE 1" +.LASF3054: + .string "TIM_IC3F ((uint16_t)0x00F0)" +.LASF2012: + .string "EXTI_EVENR_MR5 ((uint32_t)0x00000020)" +.LASF1060: + .string "O_RDWR 2" +.LASF2414: + .string "AFIO_PCFR1_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800)" +.LASF4073: + .string "TIM_TS_TI1F_ED ((uint16_t)0x0040)" +.LASF263: + .string "__DEC32_MAX_EXP__ 97" +.LASF4097: + .string "TIM_UpdateSource_Global ((uint16_t)0x0000)" +.LASF2489: + .string "AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200)" +.LASF1858: + .string "DMA_CFGR2_EN ((uint16_t)0x0001)" +.LASF2742: + .string "RCC_PLLMULL9 ((uint32_t)0x001C0000)" +.LASF3924: + .string "I2S_AudioFreq_11k ((uint32_t)11025)" +.LASF791: + .string "__pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))" +.LASF4431: + .string "HUB_GET_HUB_DESCRIPTOR 0xA0" +.LASF2680: + .string "RCC_SWS_0 ((uint32_t)0x00000004)" +.LASF2517: + .string "AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050)" +.LASF17: + .string "__SIZEOF_INT__ 4" +.LASF1179: + .string "unsigned +0" +.LASF346: + .string "RT_MAIN_THREAD_STACK_SIZE 512" +.LASF29: + .string "__ORDER_PDP_ENDIAN__ 3412" +.LASF154: + .string "__FLT_DECIMAL_DIG__ 9" +.LASF3221: + .string "__CH32V10x_CONF_H " +.LASF3659: + .string "I2C_IT_SMBALERT ((uint32_t)0x01008000)" +.LASF2723: + .string "RCC_ADCPRE_DIV8 ((uint32_t)0x0000C000)" +.LASF4373: + .string "R32_USB_EP6_CTRL (*((PUINT32V)(0x40023448)))" +.LASF102: + .string "__INT64_MAX__ 0x7fffffffffffffffLL" +.LASF2650: + .string "PWR_CTLR_PLS_2V2 ((uint16_t)0x0000)" +.LASF4768: + .string "DeviceAddress" +.LASF338: + .string "RT_USING_HEAP " +.LASF1268: + .string "__CORE_RISCV_H__ " +.LASF583: + .string "__LARGEFILE_VISIBLE 0" +.LASF1692: + .string "BKP_DATAR13_D ((uint16_t)0xFFFF)" +.LASF79: + .string "__WINT_MIN__ 0U" +.LASF1832: + .string "DMA_CGIF6 ((uint32_t)0x00100000)" +.LASF2331: + .string "GPIO_BCR_BR8 ((uint16_t)0x0100)" +.LASF4416: + .string "USB_REQ_TYP_READ 0x80" +.LASF4728: + .string "USART3_IRQn" +.LASF1618: + .string "ADC_SQ2_0 ((uint32_t)0x00000020)" +.LASF1404: + .string "DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE)" +.LASF896: + .string "__int64_t_defined 1" +.LASF2267: + .string "GPIO_INDR_IDR8 ((uint16_t)0x0100)" +.LASF1126: + .string "rt_list_for_each_safe(pos,n,head) for (pos = (head)->next, n = pos->next; pos != (head); pos = n, n = pos->next)" +.LASF1632: + .string "ADC_SQ4_2 ((uint32_t)0x00020000)" +.LASF1175: + .string "short" +.LASF2233: + .string "GPIO_CFGHR_MODE15_1 ((uint32_t)0x20000000)" +.LASF1303: + .string "USART2_BASE (APB1PERIPH_BASE + 0x4400)" +.LASF2952: + .string "TIM_ETF_1 ((uint16_t)0x0200)" +.LASF693: + .string "__GNUCLIKE___OFFSETOF 1" +.LASF3529: + .string "FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000)" +.LASF551: + .string "_WANT_IO_C99_FORMATS 1" +.LASF4034: + .string "TIM_DMABase_CCR1 ((uint16_t)0x000D)" +.LASF4023: + .string "TIM_DMABase_SMCR ((uint16_t)0x0002)" +.LASF3630: + .string "I2C_Mode_I2C ((uint16_t)0x0000)" +.LASF3836: + .string "RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)" +.LASF3270: + .string "ADC_SampleTime_239Cycles5 ((uint8_t)0x07)" +.LASF2018: + .string "EXTI_EVENR_MR11 ((uint32_t)0x00000800)" +.LASF4713: + .string "TIM1_BRK_IRQn" +.LASF3313: + .string "BKP_DR9 ((uint16_t)0x0024)" +.LASF3422: + .string "DMA2_IT_HT3 ((uint32_t)0x10000400)" +.LASF4502: + .string "pEP2_IN_DataBuf (pEP2_RAM_Addr+64)" +.LASF1052: + .string "_FNBIO 0x1000" +.LASF2825: + .string "RCC_LSERDY ((uint32_t)0x00000002)" +.LASF3898: + .string "SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)" +.LASF1756: + .string "DAC_TSEL2_0 ((uint32_t)0x00080000)" +.LASF2390: + .string "AFIO_PCFR1_USART2_REMAP ((uint32_t)0x00000008)" +.LASF2309: + .string "GPIO_BSHR_BR2 ((uint32_t)0x00040000)" +.LASF4138: + .string "TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers" +.LASF3644: + .string "I2C_Register_OADDR2 ((uint8_t)0x0C)" +.LASF1149: + .string "MSH_CMD_EXPORT_ALIAS(command,alias,desc) FINSH_FUNCTION_EXPORT_ALIAS(command, __cmd_ ##alias, desc)" +.LASF3122: + .string "USART_STATR_FE ((uint16_t)0x0002)" +.LASF4463: + .string "USB_DESCR_TYP_CS_ENDP 0x25" +.LASF3049: + .string "TIM_OC4M_2 ((uint16_t)0x4000)" +.LASF1322: + .string "ADC2_BASE (APB2PERIPH_BASE + 0x2800)" +.LASF1104: + .string "F_UNLCK 3" +.LASF3344: + .string "BKP_DR40 ((uint16_t)0x00B4)" +.LASF2186: + .string "GPIO_CFGLR_CNF0_0 ((uint32_t)0x00000004)" +.LASF1813: + .string "DMA_CTCIF1 ((uint32_t)0x00000002)" +.LASF3837: + .string "RCC_APB1Periph_USART2 ((uint32_t)0x00020000)" +.LASF707: + .string "__CC_SUPPORTS___INLINE__ 1" +.LASF3897: + .string "SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)" +.LASF1514: + .string "ADC_SMP3_1 ((uint32_t)0x00000400)" +.LASF1743: + .string "DAC_WAVE1 ((uint32_t)0x000000C0)" +.LASF586: + .string "__SVID_VISIBLE 1" +.LASF4496: + .string "__PACKED __attribute__((packed))" +.LASF984: + .string "tzname _tzname" +.LASF937: + .string "_BSDTYPES_DEFINED " +.LASF1682: + .string "BKP_DATAR3_D ((uint16_t)0xFFFF)" +.LASF4722: + .string "I2C2_EV_IRQn" +.LASF2319: + .string "GPIO_BSHR_BR12 ((uint32_t)0x10000000)" +.LASF1449: + .string "ADC_ADON ((uint32_t)0x00000001)" +.LASF960: + .string "__timer_t_defined " +.LASF832: + .string "_REENT_EMERGENCY_SIZE 25" +.LASF1888: + .string "DMA_CFGR3_MSIZE_0 ((uint16_t)0x0400)" +.LASF899: + .string "_INTPTR_T_DECLARED " +.LASF2635: + .string "I2C_STAR2_DUALF ((uint16_t)0x0080)" +.LASF2447: + .string "AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006)" +.LASF4039: + .string "TIM_DMABase_DCR ((uint16_t)0x0012)" +.LASF2715: + .string "RCC_PPRE2_DIV8 ((uint32_t)0x00003000)" +.LASF2821: + .string "RCC_BKPEN ((uint32_t)0x08000000)" +.LASF2866: + .string "SPI_CTLR1_BR_0 ((uint16_t)0x0008)" +.LASF4259: + .string "RB_UMS_DEV_ATTACH 0x01" +.LASF772: + .string "_Null_unspecified " +.LASF3892: + .string "SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)" +.LASF4477: + .string "USB_ENDP_ADDR_MASK 0x0F" +.LASF4261: + .string "RB_U_IS_NAK 0x80" +.LASF990: + .string "TIMER_ABSTIME 4" +.LASF1123: + .string "RT_LIST_OBJECT_INIT(object) { &(object), &(object) }" +.LASF28: + .string "__ORDER_BIG_ENDIAN__ 4321" +.LASF370: + .string "__RTDEBUG_H__ " +.LASF3239: + .string "ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000)" +.LASF3206: + .string "EXTEN_USBHD_IO_EN ((uint32_t)0x00000004)" +.LASF3427: + .string "DMA2_IT_TE4 ((uint32_t)0x10008000)" +.LASF4251: + .string "R8_USB_MIS_ST (*((PUINT8V)(0x40023405)))" +.LASF3876: + .string "RTC_FLAG_SEC ((uint16_t)0x0001)" +.LASF3360: + .string "__CH32V10x_DMA_H " +.LASF3628: + .string "GPIO_PinSource15 ((uint8_t)0x0F)" +.LASF3574: + .string "GPIO_Pin_11 ((uint16_t)0x0800)" +.LASF2641: + .string "PWR_CTLR_LPDS ((uint16_t)0x0001)" +.LASF4183: + .string "USART_IT_NE ((uint16_t)0x0260)" +.LASF2528: + .string "AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000)" +.LASF415: + .string "__va_list__ " +.LASF3406: + .string "DMA1_IT_HT6 ((uint32_t)0x00400000)" +.LASF2835: + .string "RCC_BDRST ((uint32_t)0x00010000)" +.LASF4501: + .string "pEP2_OUT_DataBuf (pEP2_RAM_Addr)" +.LASF1644: + .string "ADC_SQ6_2 ((uint32_t)0x08000000)" +.LASF2961: + .string "TIM_CC1IE ((uint16_t)0x0002)" +.LASF4429: + .string "HUB_CLEAR_PORT_FEATURE 0x23" +.LASF4295: + .string "RB_UEP2_TX_EN 0x04" +.LASF605: + .string "_SYS_CDEFS_H_ " +.LASF2696: + .string "RCC_HPRE_DIV128 ((uint32_t)0x000000D0)" +.LASF2780: + .string "RCC_IOPCRST ((uint32_t)0x00000010)" +.LASF475: + .string "RT_THREAD_STAT_SIGNAL 0x10" +.LASF3725: + .string "PWR_PVDLevel_2V3 ((uint32_t)0x00000020)" +.LASF1335: + .string "DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008)" +.LASF839: + .string "_REENT_CHECK_RAND48(ptr) " +.LASF205: + .string "__FLT64_MANT_DIG__ 53" +.LASF3998: + .string "TIM_OSSRState_Disable ((uint16_t)0x0000)" +.LASF3675: + .string "I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)" +.LASF4205: + .string "WWDG_Prescaler_1 ((uint32_t)0x00000000)" +.LASF2669: + .string "RCC_HSEBYP ((uint32_t)0x00040000)" +.LASF3976: + .string "TIM_OCNPolarity_Low ((uint16_t)0x0008)" +.LASF3543: + .string "OB_IWDG_SW ((uint16_t)0x0001)" +.LASF2929: + .string "TIM_MMS ((uint16_t)0x0070)" +.LASF4471: + .string "USB_DEV_CLASS_POWER 0x06" +.LASF1701: + .string "BKP_DATAR22_D ((uint16_t)0xFFFF)" +.LASF2008: + .string "EXTI_EVENR_MR1 ((uint32_t)0x00000002)" +.LASF117: + .string "__INT64_C(c) c ## LL" +.LASF24: + .string "__SIZEOF_SIZE_T__ 4" +.LASF3381: + .string "DMA_IT_TC ((uint32_t)0x00000002)" +.LASF2748: + .string "RCC_PLLMULL15 ((uint32_t)0x00340000)" +.LASF4037: + .string "TIM_DMABase_CCR4 ((uint16_t)0x0010)" +.LASF4700: + .string "EXTI1_IRQn" +.LASF4588: + .string "__tm_mon" +.LASF673: + .string "__DOTS , ..." +.LASF249: + .string "__FLT64X_MIN_EXP__ (-16381)" +.LASF265: + .string "__DEC32_MAX__ 9.999999E96DF" +.LASF3080: + .string "TIM_CC4P ((uint16_t)0x2000)" +.LASF4413: + .string "HID_SET_PROTOCOL 0x0B" +.LASF4080: + .string "TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)" +.LASF3715: + .string "IWDG_Prescaler_8 ((uint8_t)0x01)" +.LASF316: + .string "__RT_THREAD_H__ " +.LASF3602: + .string "GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000)" +.LASF1572: + .string "ADC_L_1 ((uint32_t)0x00200000)" +.LASF4455: + .string "USB_DESCR_TYP_ENDP 0x05" +.LASF2401: + .string "AFIO_PCFR1_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040)" +.LASF4760: + .string "pEP1_RAM_Addr" +.LASF614: + .string "___int_least8_t_defined 1" +.LASF4705: + .string "DMA1_Channel2_IRQn" +.LASF1015: + .string "S_IRWXU (S_IRUSR | S_IWUSR | S_IXUSR)" +.LASF2362: + .string "AFIO_ECR_PIN_PX1 ((uint8_t)0x01)" +.LASF1438: + .string "ADC_DISCNUM ((uint32_t)0x0000E000)" +.LASF175: + .string "__DBL_HAS_QUIET_NAN__ 1" +.LASF2827: + .string "RCC_RTCSEL ((uint32_t)0x00000300)" +.LASF1191: + .string "__FAST8 " +.LASF3893: + .string "SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)" +.LASF2188: + .string "GPIO_CFGLR_CNF1 ((uint32_t)0x000000C0)" +.LASF2788: + .string "RCC_TIM2RST ((uint32_t)0x00000001)" +.LASF3683: + .string "I2C_FLAG_OVR ((uint32_t)0x10000800)" +.LASF1749: + .string "DAC_MAMP1_2 ((uint32_t)0x00000400)" +.LASF3901: + .string "SPI_FirstBit_LSB ((uint16_t)0x0080)" +.LASF3944: + .string "SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)" +.LASF4442: + .string "HUB_PORT_OVER_CURRENT 3" +.LASF321: + .string "RT_THREAD_PRIORITY_MAX 32" +.LASF922: + .string "NFDBITS (sizeof (fd_mask) * NBBY)" +.LASF219: + .string "__FLT128_MANT_DIG__ 113" +.LASF2738: + .string "RCC_PLLMULL5 ((uint32_t)0x000C0000)" +.LASF2777: + .string "RCC_AFIORST ((uint32_t)0x00000001)" +.LASF3291: + .string "ADC_IT_AWD ((uint16_t)0x0140)" +.LASF2181: + .string "GPIO_CFGLR_MODE7 ((uint32_t)0x30000000)" +.LASF3316: + .string "BKP_DR12 ((uint16_t)0x0044)" +.LASF3101: + .string "TIM_LOCK_1 ((uint16_t)0x0200)" +.LASF1434: + .string "ADC_AWDSGL ((uint32_t)0x00000200)" +.LASF4703: + .string "EXTI4_IRQn" +.LASF2017: + .string "EXTI_EVENR_MR10 ((uint32_t)0x00000400)" +.LASF1417: + .string "DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)" +.LASF3152: + .string "USART_CTLR2_LBCL ((uint16_t)0x0100)" +.LASF3594: + .string "GPIO_Remap1_CAN1 ((uint32_t)0x001D4000)" +.LASF3637: + .string "I2C_Direction_Transmitter ((uint8_t)0x00)" +.LASF3108: + .string "TIM_DBA ((uint16_t)0x001F)" +.LASF309: + .string "__riscv_float_abi_soft 1" +.LASF2419: + .string "AFIO_PCFR1_CAN_REMAP_1 ((uint32_t)0x00004000)" +.LASF1476: + .string "ADC_SMP12 ((uint32_t)0x000001C0)" +.LASF3838: + .string "RCC_APB1Periph_USART3 ((uint32_t)0x00040000)" +.LASF3237: + .string "ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000)" +.LASF3200: + .string "WWDG_CFGR_WDGTB0 ((uint16_t)0x0080)" +.LASF2860: + .string "RTC_ALRMH_RTC_ALRM ((uint16_t)0xFFFF)" +.LASF732: + .string "__malloc_like __attribute__((__malloc__))" +.LASF2656: + .string "PWR_CTLR_PLS_2V8 ((uint16_t)0x00C0)" +.LASF1079: + .string "FEXLOCK _FEXLOCK" +.LASF2251: + .string "GPIO_CFGHR_CNF13_0 ((uint32_t)0x00400000)" +.LASF222: + .string "__FLT128_MIN_10_EXP__ (-4931)" +.LASF1207: + .string "INTPTR_MIN (-__INTPTR_MAX__ - 1)" +.LASF2381: + .string "AFIO_ECR_PORT_PA ((uint8_t)0x00)" +.LASF3758: + .string "RCC_PLLMul_14 ((uint32_t)0x00300000)" +.LASF3569: + .string "GPIO_Pin_6 ((uint16_t)0x0040)" +.LASF3110: + .string "TIM_DBA_1 ((uint16_t)0x0002)" +.LASF1058: + .string "O_RDONLY 0" +.LASF94: + .string "__UINTMAX_C(c) c ## ULL" +.LASF2793: + .string "RCC_CAN1RST ((uint32_t)0x02000000)" +.LASF1525: + .string "ADC_SMP6_0 ((uint32_t)0x00040000)" +.LASF3599: + .string "GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100)" +.LASF1379: + .string "GPIOA ((GPIO_TypeDef *) GPIOA_BASE)" +.LASF1425: + .string "ADC_AWDCH_0 ((uint32_t)0x00000001)" +.LASF1703: + .string "BKP_DATAR24_D ((uint16_t)0xFFFF)" +.LASF4489: + .string "USB_BO_CBW_SIG1 0x53" +.LASF2221: + .string "GPIO_CFGHR_MODE11_1 ((uint32_t)0x00002000)" +.LASF4160: + .string "USART_Mode_Tx ((uint16_t)0x0008)" +.LASF4110: + .string "TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)" +.LASF3843: + .string "RCC_APB1Periph_USB ((uint32_t)0x00800000)" +.LASF4465: + .string "USB_DEV_CLASS_RESERVED 0x00" +.LASF4544: + .string "__CH32V10X_MISC_H " +.LASF749: + .string "__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))" +.LASF2438: + .string "AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0)" +.LASF2806: + .string "RCC_AFIOEN ((uint32_t)0x00000001)" +.LASF3407: + .string "DMA1_IT_TE6 ((uint32_t)0x00800000)" +.LASF3489: + .string "EXTI_Line8 ((uint32_t)0x00100)" +.LASF3133: + .string "USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0)" +.LASF2307: + .string "GPIO_BSHR_BR0 ((uint32_t)0x00010000)" +.LASF326: + .string "RT_IDLE_HOOK_LIST_SIZE 4" +.LASF2200: + .string "GPIO_CFGLR_CNF5 ((uint32_t)0x00C00000)" +.LASF1991: + .string "EXTI_INTENR_MR4 ((uint32_t)0x00000010)" +.LASF2540: + .string "AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003)" +.LASF2606: + .string "I2C_OADDR1_ADD5 ((uint16_t)0x0020)" +.LASF3154: + .string "USART_CTLR2_CPOL ((uint16_t)0x0400)" +.LASF1708: + .string "BKP_DATAR29_D ((uint16_t)0xFFFF)" +.LASF1205: + .string "__int_fast32_t_defined 1" +.LASF3584: + .string "GPIO_PartialRemap_USART3 ((uint32_t)0x00140010)" +.LASF1526: + .string "ADC_SMP6_1 ((uint32_t)0x00080000)" +.LASF1814: + .string "DMA_CHTIF1 ((uint32_t)0x00000004)" +.LASF4560: + .string "rt_ubase_t" +.LASF4550: + .string "signed char" +.LASF165: + .string "__DBL_MIN_10_EXP__ (-307)" +.LASF4664: + .string "_mbrlen_state" +.LASF3245: + .string "ADC_Channel_2 ((uint8_t)0x02)" +.LASF137: + .string "__UINT_FAST32_MAX__ 0xffffffffU" +.LASF2623: + .string "I2C_STAR1_ARLO ((uint16_t)0x0200)" +.LASF2180: + .string "GPIO_CFGLR_MODE6_1 ((uint32_t)0x02000000)" +.LASF3311: + .string "BKP_DR7 ((uint16_t)0x001C)" +.LASF1301: + .string "SPI2_BASE (APB1PERIPH_BASE + 0x3800)" +.LASF4038: + .string "TIM_DMABase_BDTR ((uint16_t)0x0011)" +.LASF44: + .string "__INT32_TYPE__ long int" +.LASF421: + .string "rt_inline static __inline" +.LASF4252: + .string "RB_UMS_SOF_PRES 0x80" +.LASF3051: + .string "TIM_IC3PSC ((uint16_t)0x000C)" +.LASF1956: + .string "DMA_CFG7_PSIZE ((uint16_t)0x0300)" +.LASF1077: + .string "FDEFER _FDEFER" +.LASF3638: + .string "I2C_Direction_Receiver ((uint8_t)0x01)" +.LASF1187: + .string "__INT8 \"hh\"" +.LASF3656: + .string "I2C_IT_BUF ((uint16_t)0x0400)" +.LASF4597: + .string "_is_cxa" +.LASF2927: + .string "TIM_CCUS ((uint16_t)0x0004)" +.LASF811: + .string "unsigned" +.LASF730: + .string "__generic(expr,t,yes,no) _Generic(expr, t: yes, default: no)" +.LASF3025: + .string "TIM_IC2PSC_1 ((uint16_t)0x0800)" +.LASF2841: + .string "RCC_SFTRSTF ((uint32_t)0x10000000)" +.LASF1890: + .string "DMA_CFGR3_PL ((uint16_t)0x3000)" +.LASF4677: + .string "uint8_t" +.LASF2773: + .string "RCC_HSIRDYC ((uint32_t)0x00040000)" +.LASF440: + .string "RT_EFULL 3" +.LASF4629: + .string "_locale" +.LASF3983: + .string "TIM_CCxN_Enable ((uint16_t)0x0004)" +.LASF903: + .string "_BIG_ENDIAN 4321" +.LASF3724: + .string "PWR_PVDLevel_2V2 ((uint32_t)0x00000000)" +.LASF1960: + .string "DMA_CFG7_MSIZE_0 ((uint16_t)0x0400)" +.LASF3788: + .string "RCC_PCLK2_Div6 ((uint32_t)0x00008000)" +.LASF2510: + .string "AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005)" +.LASF3114: + .string "TIM_DBL ((uint16_t)0x1F00)" +.LASF1221: + .string "UINT_LEAST16_MAX (__UINT_LEAST16_MAX__)" +.LASF3886: + .string "SPI_CPOL_Low ((uint16_t)0x0000)" +.LASF2741: + .string "RCC_PLLMULL8 ((uint32_t)0x00180000)" +.LASF792: + .string "_SYS_REENT_H_ " +.LASF1211: + .string "INT8_MAX (__INT8_MAX__)" +.LASF2647: + .string "PWR_CTLR_PLS_0 ((uint16_t)0x0020)" +.LASF2976: + .string "TIM_CC1IF ((uint16_t)0x0002)" +.LASF493: + .string "RT_EVENT_FLAG_CLEAR 0x04" +.LASF4372: + .string "R8_UEP5_CTRL (*((PUINT8V)(0x40023446)))" +.LASF1568: + .string "ADC_SQ16_3 ((uint32_t)0x00040000)" +.LASF3612: + .string "GPIO_PortSourceGPIOG ((uint8_t)0x06)" +.LASF424: + .string "INIT_BOARD_EXPORT(fn) INIT_EXPORT(fn, \"1\")" +.LASF2640: + .string "I2C_RTR_TRISE ((uint8_t)0x3F)" +.LASF80: + .string "__PTRDIFF_MAX__ 0x7fffffff" +.LASF4553: + .string "short unsigned int" +.LASF4575: + .string "_mbstate_t" +.LASF1153: + .string "RT_CPU_CACHE_LINE_SZ 32" +.LASF2882: + .string "SPI_CTLR2_ERRIE ((uint8_t)0x20)" +.LASF3302: + .string "BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)" +.LASF3647: + .string "I2C_Register_STAR2 ((uint8_t)0x18)" +.LASF1975: + .string "DMA_PADDR3_PA ((uint32_t)0xFFFFFFFF)" +.LASF4454: + .string "USB_DESCR_TYP_INTERF 0x04" +.LASF2067: + .string "EXTI_SWIEVR_SWIEVR0 ((uint32_t)0x00000001)" +.LASF4457: + .string "USB_DESCR_TYP_SPEED 0x07" +.LASF761: + .string "__sym_default(sym,impl,verid) __asm__(\".symver \" #impl \", \" #sym \"@@\" #verid)" +.LASF1299: + .string "WWDG_BASE (APB1PERIPH_BASE + 0x2C00)" +.LASF4391: + .string "USB_GET_STATUS 0x00" +.LASF2305: + .string "GPIO_BSHR_BS14 ((uint32_t)0x00004000)" +.LASF4487: + .string "USB_BO_CSW_SIZE 0x0D" +.LASF1513: + .string "ADC_SMP3_0 ((uint32_t)0x00000200)" +.LASF4390: + .string "USB_PID_PRE 0x0C" +.LASF2391: + .string "AFIO_PCFR1_USART3_REMAP ((uint32_t)0x00000030)" +.LASF4673: + .string "__lock" +.LASF3803: + .string "RCC_AHBPeriph_USBHD ((uint32_t)0x00001000)" +.LASF3044: + .string "TIM_OC4FE ((uint16_t)0x0400)" +.LASF3166: + .string "USART_CTLR3_DMAR ((uint16_t)0x0040)" +.LASF4170: + .string "USART_CPHA_2Edge ((uint16_t)0x0200)" +.LASF2744: + .string "RCC_PLLMULL11 ((uint32_t)0x00240000)" +.LASF3536: + .string "FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000)" +.LASF2337: + .string "GPIO_BCR_BR14 ((uint16_t)0x4000)" +.LASF2336: + .string "GPIO_BCR_BR13 ((uint16_t)0x2000)" +.LASF473: + .string "RT_THREAD_STAT_YIELD 0x08" +.LASF1008: + .string "S_IFDIR _IFDIR" +.LASF1050: + .string "_FTRUNC 0x0400" +.LASF204: + .string "__FLT32_HAS_QUIET_NAN__ 1" +.LASF4055: + .string "TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)" +.LASF3894: + .string "SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)" +.LASF2327: + .string "GPIO_BCR_BR4 ((uint16_t)0x0010)" +.LASF3201: + .string "WWDG_CFGR_WDGTB1 ((uint16_t)0x0100)" +.LASF3615: + .string "GPIO_PinSource2 ((uint8_t)0x02)" +.LASF49: + .string "__UINT64_TYPE__ long long unsigned int" +.LASF2842: + .string "RCC_IWDGRSTF ((uint32_t)0x20000000)" +.LASF2214: + .string "GPIO_CFGHR_MODE9_0 ((uint32_t)0x00000010)" +.LASF931: + .string "_IN_ADDR_T_DECLARED " +.LASF2263: + .string "GPIO_INDR_IDR4 ((uint16_t)0x0010)" +.LASF1238: + .string "INT_FAST16_MAX (__INT_FAST16_MAX__)" +.LASF1007: + .string "S_IFMT _IFMT" +.LASF1546: + .string "ADC_SQ13 ((uint32_t)0x0000001F)" +.LASF2975: + .string "TIM_UIF ((uint16_t)0x0001)" +.LASF3458: + .string "DMA1_FLAG_HT7 ((uint32_t)0x04000000)" +.LASF1048: + .string "_FEXLOCK 0x0100" +.LASF3047: + .string "TIM_OC4M_0 ((uint16_t)0x1000)" +.LASF2562: + .string "AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000)" +.LASF3517: + .string "FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100)" +.LASF261: + .string "__DEC32_MANT_DIG__ 7" +.LASF3707: + .string "I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010)" +.LASF2881: + .string "SPI_CTLR2_SSOE ((uint8_t)0x04)" +.LASF3754: + .string "RCC_PLLMul_10 ((uint32_t)0x00200000)" +.LASF2132: + .string "FLASH_CTLR_BUF_LOAD ((uint16_t)0x00040000)" +.LASF3518: + .string "FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200)" +.LASF4476: + .string "USB_ENDP_DIR_MASK 0x80" +.LASF2392: + .string "AFIO_PCFR1_USART3_REMAP_0 ((uint32_t)0x00000010)" +.LASF2911: + .string "SPI_I2SPR_I2SDIV ((uint16_t)0x00FF)" +.LASF530: + .string "RTGRAPHIC_CTRL_POWERON 1" +.LASF285: + .string "__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1" +.LASF1141: + .string "rt_spin_lock_irqsave(lock) rt_hw_interrupt_disable()" +.LASF399: + .string "RT_MUTEX_HOLD_MAX RT_UINT8_MAX" +.LASF209: + .string "__FLT64_MAX_EXP__ 1024" +.LASF4079: + .string "TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)" +.LASF1984: + .string "DMA_MADDR5_MA ((uint32_t)0xFFFFFFFF)" +.LASF3434: + .string "DMA1_FLAG_HT1 ((uint32_t)0x00000004)" +.LASF1785: + .string "DMA_TCIF1 ((uint32_t)0x00000002)" +.LASF2244: + .string "GPIO_CFGHR_CNF11 ((uint32_t)0x0000C000)" +.LASF308: + .string "__riscv_xlen 32" +.LASF2920: + .string "TIM_CMS_0 ((uint16_t)0x0020)" +.LASF1745: + .string "DAC_WAVE1_1 ((uint32_t)0x00000080)" +.LASF1957: + .string "DMA_CFG7_PSIZE_0 ((uint16_t)0x0100)" +.LASF1096: + .string "F_SETLKW 9" +.LASF686: + .string "__has_feature(x) 0" +.LASF874: + .string "_GLOBAL_REENT _global_impure_ptr" +.LASF350: + .string "FINSH_USING_HISTORY " +.LASF21: + .string "__SIZEOF_FLOAT__ 4" +.LASF3103: + .string "TIM_OSSR ((uint16_t)0x0800)" +.LASF1095: + .string "F_SETLK 8" +.LASF2950: + .string "TIM_ETF ((uint16_t)0x0F00)" +.LASF15: + .string "__OPTIMIZE__ 1" +.LASF4365: + .string "RB_UH_T_AUTO_TOG 0x10" +.LASF4731: + .string "USBWakeUp_IRQn" +.LASF4041: + .string "TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)" +.LASF4536: + .string "DEF_AOA_DEVICE 0xF0" +.LASF2944: + .string "TIM_SMS_2 ((uint16_t)0x0004)" +.LASF3321: + .string "BKP_DR17 ((uint16_t)0x0058)" +.LASF3379: + .string "DMA_M2M_Enable ((uint32_t)0x00004000)" +.LASF1728: + .string "BKP_CTE ((uint16_t)0x0001)" +.LASF764: + .string "__RCSID_SOURCE(s) struct __hack" +.LASF2224: + .string "GPIO_CFGHR_MODE12_1 ((uint32_t)0x00020000)" +.LASF2782: + .string "RCC_ADC1RST ((uint32_t)0x00000200)" +.LASF2923: + .string "TIM_CTLR1_CKD ((uint16_t)0x0300)" +.LASF329: + .string "RT_TIMER_THREAD_PRIO 7" +.LASF4271: + .string "RB_UIS_IS_NAK 0x80" +.LASF1719: + .string "BKP_DATAR40_D ((uint16_t)0xFFFF)" +.LASF2359: + .string "AFIO_ECR_PIN_2 ((uint8_t)0x04)" +.LASF2708: + .string "RCC_PPRE2 ((uint32_t)0x00003800)" +.LASF4759: + .string "pEP0_RAM_Addr" +.LASF1254: + .string "WCHAR_MIN (__WCHAR_MIN__)" +.LASF548: + .string "__NEWLIB__ 3" +.LASF1296: + .string "TIM13_BASE (APB1PERIPH_BASE + 0x1C00)" +.LASF4456: + .string "USB_DESCR_TYP_QUALIF 0x06" +.LASF3997: + .string "TIM_OSSRState_Enable ((uint16_t)0x0800)" +.LASF4714: + .string "TIM1_UP_IRQn" +.LASF2703: + .string "RCC_PPRE1_DIV1 ((uint32_t)0x00000000)" +.LASF2568: + .string "IWDG_PR_1 ((uint8_t)0x02)" +.LASF2298: + .string "GPIO_BSHR_BS7 ((uint32_t)0x00000080)" +.LASF4238: + .string "R8_USB_INT_EN (*((PUINT8V)(0x40023402)))" +.LASF2117: + .string "FLASH_STATR_PGERR ((uint8_t)0x04)" +.LASF2555: + .string "AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400)" +.LASF143: + .string "__GCC_IEC_559_COMPLEX 0" +.LASF203: + .string "__FLT32_HAS_INFINITY__ 1" +.LASF1100: + .string "F_RSETLKW 13" +.LASF1011: + .string "S_IFREG _IFREG" +.LASF4559: + .string "long int" +.LASF3990: + .string "TIM_AutomaticOutput_Disable ((uint16_t)0x0000)" +.LASF2576: + .string "I2C_CTLR1_ENARP ((uint16_t)0x0010)" +.LASF1853: + .string "DMA_CFGR1_MSIZE_1 ((uint16_t)0x0800)" +.LASF4109: + .string "TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)" +.LASF2519: + .string "AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000)" +.LASF547: + .string "_NEWLIB_VERSION \"3.0.0\"" +.LASF2938: + .string "TIM_OIS3 ((uint16_t)0x1000)" +.LASF4354: + .string "MASK_UH_ENDP 0x0F" +.LASF3600: + .string "GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200)" +.LASF3769: + .string "RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)" +.LASF747: + .string "__hidden __attribute__((__visibility__(\"hidden\")))" +.LASF2475: + .string "AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002)" +.LASF495: + .string "RT_DEVICE_FLAG_RDONLY 0x001" +.LASF2197: + .string "GPIO_CFGLR_CNF4 ((uint32_t)0x000C0000)" +.LASF4290: + .string "R8_UEP2_3_MOD (*((PUINT8V)(0x4002340d)))" +.LASF3661: + .string "I2C_IT_PECERR ((uint32_t)0x01001000)" +.LASF1395: + .string "TIM17 ((TIM_TypeDef *) TIM17_BASE)" +.LASF3369: + .string "DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)" +.LASF2086: + .string "EXTI_SWIEVR_SWIEVR19 ((uint32_t)0x00080000)" +.LASF930: + .string "quad quad_t" +.LASF1257: + .string "WINT_MIN (__WINT_MIN__)" +.LASF1302: + .string "SPI3_BASE (APB1PERIPH_BASE + 0x3C00)" +.LASF2242: + .string "GPIO_CFGHR_CNF10_0 ((uint32_t)0x00000400)" +.LASF4076: + .string "TIM_TS_ETRF ((uint16_t)0x0070)" +.LASF4518: + .string "EP6_GetINSta() (R8_UEP6_CTRL&UEP_T_RES_NAK)" +.LASF3549: + .string "FLASH_IT_ERROR ((uint32_t)0x00000400)" +.LASF4001: + .string "TIM_OCNIdleState_Set ((uint16_t)0x0200)" +.LASF2141: + .string "FLASH_OBR_BFB2 ((uint16_t)0x0020)" +.LASF4297: + .string "R8_UH_EP_MOD R8_UEP2_3_MOD" +.LASF4695: + .string "TAMPER_IRQn" +.LASF2779: + .string "RCC_IOPBRST ((uint32_t)0x00000008)" +.LASF236: + .string "__FLT32X_MIN_10_EXP__ (-307)" +.LASF998: + .string "_IFIFO 0010000" +.LASF4253: + .string "RB_UMS_SOF_ACT 0x40" +.LASF3700: + .string "I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084)" +.LASF4558: + .string "long long unsigned int" +.LASF1036: + .string "S_ISSOCK(m) (((m)&_IFMT) == _IFSOCK)" +.LASF786: + .string "__requires_exclusive(...) __lock_annotate(exclusive_locks_required(__VA_ARGS__))" +.LASF2376: + .string "AFIO_ECR_PIN_PX15 ((uint8_t)0x0F)" +.LASF4317: + .string "R16_UEP3_DMA (*((PUINT16V)(0x4002341c)))" +.LASF3640: + .string "I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)" +.LASF2572: + .string "IWDG_RVU ((uint8_t)0x02)" +.LASF60: + .string "__INT_FAST32_TYPE__ int" +.LASF3871: + .string "RTC_IT_SEC ((uint16_t)0x0001)" +.LASF2737: + .string "RCC_PLLMULL4 ((uint32_t)0x00080000)" +.LASF2694: + .string "RCC_HPRE_DIV16 ((uint32_t)0x000000B0)" +.LASF3918: + .string "I2S_AudioFreq_96k ((uint32_t)96000)" +.LASF2465: + .string "AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000)" +.LASF95: + .string "__INTMAX_WIDTH__ 64" +.LASF1103: + .string "F_WRLCK 2" +.LASF1408: + .string "DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)" +.LASF1959: + .string "DMA_CFG7_MSIZE ((uint16_t)0x0C00)" +.LASF286: + .string "__GCC_ATOMIC_BOOL_LOCK_FREE 1" +.LASF2110: + .string "FLASH_ACTLR_LATENCY_2 ((uint8_t)0x02)" +.LASF3392: + .string "DMA1_IT_GL3 ((uint32_t)0x00000100)" +.LASF822: + .string "_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}" +.LASF1486: + .string "ADC_SMP14_1 ((uint32_t)0x00002000)" +.LASF4696: + .string "RTC_IRQn" +.LASF2862: + .string "SPI_CTLR1_CPHA ((uint16_t)0x0001)" +.LASF1804: + .string "DMA_GIF6 ((uint32_t)0x00100000)" +.LASF3646: + .string "I2C_Register_STAR1 ((uint8_t)0x14)" +.LASF4382: + .string "USB_PID_SETUP 0x0D" +.LASF349: + .string "FINSH_THREAD_NAME \"tshell\"" +.LASF1026: + .string "S_IXOTH 0000001" +.LASF4717: + .string "TIM2_IRQn" +.LASF4274: + .string "RB_UIS_TOKEN0 0x10" +.LASF2265: + .string "GPIO_INDR_IDR6 ((uint16_t)0x0040)" +.LASF2446: + .string "AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005)" +.LASF2871: + .string "SPI_CTLR1_SSI ((uint16_t)0x0100)" +.LASF292: + .string "__GCC_ATOMIC_INT_LOCK_FREE 2" +.LASF656: + .string "_WCHAR_T_ " +.LASF1800: + .string "DMA_GIF5 ((uint32_t)0x00010000)" +.LASF1818: + .string "DMA_CHTIF2 ((uint32_t)0x00000040)" +.LASF3036: + .string "TIM_OC3M ((uint16_t)0x0070)" +.LASF3465: + .string "DMA2_FLAG_TC2 ((uint32_t)0x10000020)" +.LASF626: + .string "_PTRDIFF_T_ " +.LASF1509: + .string "ADC_SMP2_0 ((uint32_t)0x00000040)" +.LASF3853: + .string "RCC_MCO_HSE ((uint8_t)0x06)" +.LASF1167: + .string "HSI_VALUE ((uint32_t)8000000)" +.LASF1261: + .string "UINT16_C(x) __UINT16_C(x)" +.LASF3727: + .string "PWR_PVDLevel_2V5 ((uint32_t)0x00000060)" +.LASF1380: + .string "GPIOB ((GPIO_TypeDef *) GPIOB_BASE)" +.LASF940: + .string "__clock_t_defined " +.LASF4046: + .string "TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)" +.LASF499: + .string "RT_DEVICE_FLAG_STANDALONE 0x008" +.LASF1543: + .string "ADC_JOFFSET4 ((uint16_t)0x0FFF)" +.LASF3906: + .string "I2S_Standard_Phillips ((uint16_t)0x0000)" +.LASF4652: + .string "_strtok_last" +.LASF1422: + .string "ADC_JSTRT ((uint8_t)0x08)" +.LASF3104: + .string "TIM_BKE ((uint16_t)0x1000)" +.LASF3067: + .string "TIM_CC1E ((uint16_t)0x0001)" +.LASF1520: + .string "ADC_SMP5 ((uint32_t)0x00038000)" +.LASF3345: + .string "BKP_DR41 ((uint16_t)0x00B8)" +.LASF803: + .string "__lock_acquire(lock) __retarget_lock_acquire(lock)" +.LASF2025: + .string "EXTI_EVENR_MR18 ((uint32_t)0x00040000)" +.LASF1875: + .string "DMA_CFGR2_MEM2MEM ((uint16_t)0x4000)" +.LASF311: + .string "__ELF__ 1" +.LASF4234: + .string "RB_UH_DM_PIN 0x10" +.LASF3746: + .string "RCC_PLLMul_2 ((uint32_t)0x00000000)" +.LASF221: + .string "__FLT128_MIN_EXP__ (-16381)" +.LASF1558: + .string "ADC_SQ15 ((uint32_t)0x00007C00)" +.LASF2306: + .string "GPIO_BSHR_BS15 ((uint32_t)0x00008000)" +.LASF4485: + .string "MAX_PACKET_SIZE 64" +.LASF3368: + .string "DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)" +.LASF1094: + .string "F_GETLK 7" +.LASF3306: + .string "BKP_DR2 ((uint16_t)0x0008)" +.LASF1009: + .string "S_IFCHR _IFCHR" +.LASF3435: + .string "DMA1_FLAG_TE1 ((uint32_t)0x00000008)" +.LASF2275: + .string "GPIO_OUTDR_ODR0 ((uint16_t)0x0001)" +.LASF4529: + .string "ERR_AOA_PROTOCOL 0x41" +.LASF2425: + .string "AFIO_PCFR1_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000)" +.LASF1142: + .string "rt_spin_unlock_irqrestore(lock,level) rt_hw_interrupt_enable(level)" +.LASF1454: + .string "ADC_ALIGN ((uint32_t)0x00000800)" +.LASF3771: + .string "RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)" +.LASF1547: + .string "ADC_SQ13_0 ((uint32_t)0x00000001)" +.LASF395: + .string "RT_UINT32_MAX 0xffffffff" +.LASF1459: + .string "ADC_JEXTTRIG ((uint32_t)0x00008000)" +.LASF4108: + .string "TIM_TRGOSource_OC1 ((uint16_t)0x0030)" +.LASF4710: + .string "DMA1_Channel7_IRQn" +.LASF3842: + .string "RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)" +.LASF3226: + .string "ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)" +.LASF3650: + .string "I2C_SMBusAlert_Low ((uint16_t)0x2000)" +.LASF3140: + .string "USART_CTLR1_TCIE ((uint16_t)0x0040)" +.LASF3225: + .string "ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)" +.LASF776: + .string "__datatype_type_tag(kind,type) " +.LASF4495: + .string "USB_BO_CSW_SIG3 0x53" +.LASF2565: + .string "IWDG_KEY ((uint16_t)0xFFFF)" +.LASF3472: + .string "DMA2_FLAG_GL4 ((uint32_t)0x10001000)" +.LASF1337: + .string "DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030)" +.LASF3199: + .string "WWDG_CFGR_WDGTB ((uint16_t)0x0180)" +.LASF4395: + .string "USB_GET_DESCRIPTOR 0x06" +.LASF4414: + .string "USB_REQ_TYP_IN 0x80" +.LASF2076: + .string "EXTI_SWIEVR_SWIEVR9 ((uint32_t)0x00000200)" +.LASF3456: + .string "DMA1_FLAG_GL7 ((uint32_t)0x01000000)" +.LASF315: + .string "__RT_HW_H__ " +.LASF2433: + .string "AFIO_PCFR1_SWJ_CFG_RESET ((uint32_t)0x00000000)" +.LASF2878: + .string "SPI_CTLR1_BIDIMODE ((uint16_t)0x8000)" +.LASF4741: + .string "IENR" +.LASF1669: + .string "ADC_JSQ4_3 ((uint32_t)0x00040000)" +.LASF1675: + .string "ADC_IDATAR2_JDATA ((uint16_t)0xFFFF)" +.LASF411: + .string "_VA_LIST_ " +.LASF4539: + .string "WAIT_USB_TOUT_200US 3000" +.LASF1391: + .string "USART1 ((USART_TypeDef *) USART1_BASE)" +.LASF1778: + .string "DAC_LD12BDHR_DACC1DHR ((uint32_t)0x0000FFF0)" +.LASF2888: + .string "SPI_STATR_UDR ((uint8_t)0x08)" +.LASF1041: + .string "_FREAD 0x0001" +.LASF3402: + .string "DMA1_IT_HT5 ((uint32_t)0x00040000)" +.LASF3927: + .string "I2S_CPOL_Low ((uint16_t)0x0000)" +.LASF135: + .string "__UINT_FAST8_MAX__ 0xffffffffU" +.LASF4062: + .string "TIM_DMA_CC4 ((uint16_t)0x1000)" +.LASF1240: + .string "INT_FAST32_MIN (-__INT_FAST32_MAX__ - 1)" +.LASF2315: + .string "GPIO_BSHR_BR8 ((uint32_t)0x01000000)" +.LASF1397: + .string "TIM10 ((TIM_TypeDef *) TIM10_BASE)" +.LASF4388: + .string "USB_PID_DATA0 0x03" +.LASF2876: + .string "SPI_CTLR1_CRCEN ((uint16_t)0x2000)" +.LASF3531: + .string "FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000)" +.LASF2671: + .string "RCC_PLLON ((uint32_t)0x01000000)" +.LASF2945: + .string "TIM_TS ((uint16_t)0x0070)" +.LASF2069: + .string "EXTI_SWIEVR_SWIEVR2 ((uint32_t)0x00000004)" +.LASF2808: + .string "RCC_IOPBEN ((uint32_t)0x00000008)" +.LASF4311: + .string "RB_UEP7_TX_EN 0x04" +.LASF476: + .string "RT_THREAD_STAT_SIGNAL_READY (RT_THREAD_STAT_SIGNAL | RT_THREAD_READY)" +.LASF486: + .string "RT_IPC_FLAG_PRIO 0x01" +.LASF2291: + .string "GPIO_BSHR_BS0 ((uint32_t)0x00000001)" +.LASF1159: + .string "STORE sw" +.LASF1448: + .string "ADC_AWDEN ((uint32_t)0x00800000)" +.LASF360: + .string "RT_PIPE_BUFSZ 512" +.LASF2366: + .string "AFIO_ECR_PIN_PX5 ((uint8_t)0x05)" +.LASF4601: + .string "__sbuf" +.LASF2055: + .string "EXTI_FTENR_TR8 ((uint32_t)0x00000100)" +.LASF171: + .string "__DBL_EPSILON__ ((double)2.22044604925031308084726333618164062e-16L)" +.LASF2289: + .string "GPIO_OUTDR_ODR14 ((uint16_t)0x4000)" +.LASF2288: + .string "GPIO_OUTDR_ODR13 ((uint16_t)0x2000)" +.LASF417: + .string "RT_UNUSED __attribute__((unused))" +.LASF3070: + .string "TIM_CC1NP ((uint16_t)0x0008)" +.LASF1846: + .string "DMA_CFGR1_PINC ((uint16_t)0x0040)" +.LASF3972: + .string "TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)" +.LASF2198: + .string "GPIO_CFGLR_CNF4_0 ((uint32_t)0x00040000)" +.LASF3695: + .string "I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082)" +.LASF4133: + .string "TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers" +.LASF2933: + .string "TIM_TI1S ((uint16_t)0x0080)" +.LASF384: + .string "RT_DEBUG_NOT_IN_INTERRUPT do { rt_base_t level; level = rt_hw_interrupt_disable(); if (rt_interrupt_get_nest() != 0) { rt_kprintf(\"Function[%s] shall not be used in ISR\\n\", __FUNCTION__); RT_ASSERT(0) } rt_hw_interrupt_enable(level); } while (0)" +.LASF3652: + .string "I2C_PECPosition_Next ((uint16_t)0x0800)" +.LASF4310: + .string "RB_UEP7_RX_EN 0x08" +.LASF889: + .string "_UINT16_T_DECLARED " +.LASF3454: + .string "DMA1_FLAG_HT6 ((uint32_t)0x00400000)" +.LASF456: + .string "RT_TIMER_FLAG_PERIODIC 0x2" +.LASF2886: + .string "SPI_STATR_TXE ((uint8_t)0x02)" +.LASF3462: + .string "DMA2_FLAG_HT1 ((uint32_t)0x10000004)" +.LASF1154: + .string "RT_DEFINE_SPINLOCK(x) " +.LASF1925: + .string "DMA_CFG5_MSIZE_1 ((uint16_t)0x0800)" +.LASF765: + .string "__SCCSID(s) struct __hack" +.LASF590: + .string "_POINTER_INT long" +.LASF388: + .string "RT_SUBVERSION 0L" +.LASF3565: + .string "GPIO_Pin_2 ((uint16_t)0x0004)" +.LASF4364: + .string "RB_UH_T_TOG 0x40" +.LASF3968: + .string "TIM_CounterMode_Up ((uint16_t)0x0000)" +.LASF752: + .string "__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))" +.LASF314: + .string "RT_USING_NEWLIB 1" +.LASF2665: + .string "RCC_HSITRIM ((uint32_t)0x000000F8)" +.LASF2556: + .string "AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500)" +.LASF1234: + .string "INT_FAST8_MIN (-__INT_FAST8_MAX__ - 1)" +.LASF3733: + .string "PWR_Regulator_LowPower ((uint32_t)0x00000001)" +.LASF2347: + .string "GPIO_LCK8 ((uint32_t)0x00000100)" +.LASF2035: + .string "EXTI_RTENR_TR8 ((uint32_t)0x00000100)" +.LASF3467: + .string "DMA2_FLAG_TE2 ((uint32_t)0x10000080)" +.LASF3424: + .string "DMA2_IT_GL4 ((uint32_t)0x10001000)" +.LASF2178: + .string "GPIO_CFGLR_MODE6 ((uint32_t)0x03000000)" +.LASF56: + .string "__UINT_LEAST32_TYPE__ long unsigned int" +.LASF4522: + .string "ERR_USB_CONNECT 0x15" +.LASF3792: + .string "RCC_LSE_Bypass ((uint8_t)0x04)" +.LASF738: + .string "__fastcall __attribute__((__fastcall__))" +.LASF3410: + .string "DMA1_IT_HT7 ((uint32_t)0x04000000)" +.LASF2258: + .string "GPIO_CFGHR_CNF15_1 ((uint32_t)0x80000000)" +.LASF3329: + .string "BKP_DR25 ((uint16_t)0x0078)" +.LASF4362: + .string "R8_UH_TX_LEN (*((PUINT16V)(0x4002343c)))" +.LASF1039: + .string "_SYS__DEFAULT_FCNTL_H_ " +.LASF3050: + .string "TIM_OC4CE ((uint16_t)0x8000)" +.LASF958: + .string "__clockid_t_defined " +.LASF1617: + .string "ADC_SQ2 ((uint32_t)0x000003E0)" +.LASF1076: + .string "FMARK _FMARK" +.LASF2215: + .string "GPIO_CFGHR_MODE9_1 ((uint32_t)0x00000020)" +.LASF1580: + .string "ADC_SQ7_4 ((uint32_t)0x00000010)" +.LASF731: + .string "__min_size(x) static (x)" +.LASF2457: + .string "AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200)" +.LASF568: + .string "_SYS_FEATURES_H " +.LASF2482: + .string "AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020)" +.LASF3864: + .string "RCC_FLAG_WWDGRST ((uint8_t)0x7E)" +.LASF3660: + .string "I2C_IT_TIMEOUT ((uint32_t)0x01004000)" +.LASF2398: + .string "AFIO_PCFR1_TIM1_REMAP_0 ((uint32_t)0x00000040)" +.LASF1657: + .string "ADC_JSQ2_3 ((uint32_t)0x00000100)" +.LASF2930: + .string "TIM_MMS_0 ((uint16_t)0x0010)" +.LASF2485: + .string "AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050)" +.LASF2716: + .string "RCC_PPRE2_DIV16 ((uint32_t)0x00003800)" +.LASF4361: + .string "R8_UEP3_CTRL (*((PUINT8V)(0x4002343e)))" +.LASF2667: + .string "RCC_HSEON ((uint32_t)0x00010000)" +.LASF4106: + .string "TIM_TRGOSource_Enable ((uint16_t)0x0010)" +.LASF4482: + .string "USB_ENDP_TYPE_INTER 0x03" +.LASF1709: + .string "BKP_DATAR30_D ((uint16_t)0xFFFF)" +.LASF1579: + .string "ADC_SQ7_3 ((uint32_t)0x00000008)" +.LASF1424: + .string "ADC_AWDCH ((uint32_t)0x0000001F)" +.LASF3805: + .string "RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)" +.LASF661: + .string "___int_wchar_t_h " +.LASF2393: + .string "AFIO_PCFR1_USART3_REMAP_1 ((uint32_t)0x00000020)" +.LASF3249: + .string "ADC_Channel_6 ((uint8_t)0x06)" +.LASF4040: + .string "TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)" +.LASF491: + .string "RT_EVENT_FLAG_AND 0x01" +.LASF4404: + .string "HUB_GET_STATE 0x02" +.LASF2746: + .string "RCC_PLLMULL13 ((uint32_t)0x002C0000)" +.LASF4486: + .string "USB_BO_CBW_SIZE 0x1F" +.LASF2700: + .string "RCC_PPRE1_0 ((uint32_t)0x00000100)" +.LASF1216: + .string "INT16_MIN (-__INT16_MAX__ - 1)" +.LASF4397: + .string "USB_GET_CONFIGURATION 0x08" +.LASF3173: + .string "USART_GPR_PSC_0 ((uint16_t)0x0001)" +.LASF681: + .string "__flexarr [0]" +.LASF1612: + .string "ADC_SQ1_0 ((uint32_t)0x00000001)" +.LASF1062: + .string "O_CREAT _FCREAT" +.LASF427: + .string "INIT_COMPONENT_EXPORT(fn) INIT_EXPORT(fn, \"4\")" +.LASF833: + .string "_REENT_ASCTIME_SIZE 26" +.LASF3064: + .string "TIM_IC4F_1 ((uint16_t)0x2000)" +.LASF3346: + .string "BKP_DR42 ((uint16_t)0x00BC)" +.LASF2524: + .string "AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500)" +.LASF2292: + .string "GPIO_BSHR_BS1 ((uint32_t)0x00000002)" +.LASF1174: + .string "char" +.LASF2577: + .string "I2C_CTLR1_ENPEC ((uint16_t)0x0020)" +.LASF2672: + .string "RCC_PLLRDY ((uint32_t)0x02000000)" +.LASF1121: + .string "__RT_SERVICE_H__ " +.LASF3072: + .string "TIM_CC2P ((uint16_t)0x0020)" +.LASF1688: + .string "BKP_DATAR9_D ((uint16_t)0xFFFF)" +.LASF882: + .string "__BIT_TYPES_DEFINED__ 1" +.LASF129: + .string "__INT_FAST16_MAX__ 0x7fffffff" +.LASF3414: + .string "DMA2_IT_HT1 ((uint32_t)0x10000004)" +.LASF3559: + .string "FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP" +.LASF3220: + .string "EXTEN_FLASH_CLK_TRIM2 ((uint32_t)0x00040000)" +.LASF507: + .string "RT_DEVICE_OFLAG_CLOSE 0x000" +.LASF243: + .string "__FLT32X_DENORM_MIN__ 4.94065645841246544176568792868221372e-324F32x" +.LASF2679: + .string "RCC_SWS ((uint32_t)0x0000000C)" +.LASF4366: + .string "RB_UH_T_RES 0x01" +.LASF652: + .string "_WCHAR_T " +.LASF2006: + .string "EXTI_INTENR_MR19 ((uint32_t)0x00080000)" +.LASF2916: + .string "TIM_URS ((uint16_t)0x0004)" +.LASF4777: + .string "UsbDevEndp0Size" +.LASF2993: + .string "TIM_TG ((uint8_t)0x40)" +.LASF3846: + .string "RCC_APB1Periph_BKP ((uint32_t)0x08000000)" +.LASF3829: + .string "RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)" +.LASF3881: + .string "SPI_Direction_1Line_Tx ((uint16_t)0xC000)" +.LASF1633: + .string "ADC_SQ4_3 ((uint32_t)0x00040000)" +.LASF1265: + .string "UINT64_C(x) __UINT64_C(x)" +.LASF2405: + .string "AFIO_PCFR1_TIM2_REMAP_1 ((uint32_t)0x00000200)" +.LASF3722: + .string "IWDG_FLAG_RVU ((uint16_t)0x0002)" +.LASF4098: + .string "TIM_UpdateSource_Regular ((uint16_t)0x0001)" +.LASF2682: + .string "RCC_SWS_HSI ((uint32_t)0x00000000)" +.LASF3370: + .string "DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)" +.LASF944: + .string "__daddr_t_defined " +.LASF1442: + .string "ADC_DUALMOD ((uint32_t)0x000F0000)" +.LASF385: + .ascii "RT_DEBUG_IN_THREAD_CONTEXT do { " + .string "rt_base_t level; level = rt_hw_interrupt_disable(); if (rt_thread_self() == RT_NULL) { rt_kprintf(\"Function[%s] shall not be used before scheduler start\\n\", __FUNCTION__); RT_ASSERT(0) } RT_DEBUG_NOT_IN_INTERRUPT; rt_hw_interrupt_enable(level); } while (0)" +.LASF4792: + .string "s0_fp" +.LASF1528: + .string "ADC_SMP7 ((uint32_t)0x00E00000)" +.LASF3419: + .string "DMA2_IT_TE2 ((uint32_t)0x10000080)" +.LASF1672: + .string "ADC_JL_0 ((uint32_t)0x00100000)" +.LASF824: + .string "_REENT_SMALL_CHECK_INIT(ptr) " +.LASF3743: + .string "RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)" +.LASF1283: + .string "FLASH_BASE ((uint32_t)0x08000000)" +.LASF1105: + .string "F_UNLKSYS 4" +.LASF4043: + .string "TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)" +.LASF3205: + .string "EXTEN_USBD_PU_EN ((uint32_t)0x00000002)" +.LASF3821: + .string "RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)" +.LASF1667: + .string "ADC_JSQ4_1 ((uint32_t)0x00010000)" +.LASF4614: + .string "_nbuf" +.LASF976: + .string "_PTHREAD_MUTEX_INITIALIZER ((pthread_mutex_t) 0xFFFFFFFF)" +.LASF1900: + .string "DMA_CFG4_PINC ((uint16_t)0x0040)" +.LASF1947: + .string "DMA_CFG6_MEM2MEM ((uint16_t)0x4000)" +.LASF4035: + .string "TIM_DMABase_CCR2 ((uint16_t)0x000E)" +.LASF668: + .string "NULL ((void *)0)" +.LASF2543: + .string "AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006)" +.LASF2954: + .string "TIM_ETF_3 ((uint16_t)0x0800)" +.LASF3891: + .string "SPI_NSS_Hard ((uint16_t)0x0000)" +.LASF735: + .string "__noinline __attribute__ ((__noinline__))" +.LASF3234: + .string "ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000)" +.LASF1839: + .string "DMA_CTEIF7 ((uint32_t)0x08000000)" +.LASF3372: + .string "DMA_MemoryDataSize_Word ((uint32_t)0x00000800)" +.LASF2121: + .string "FLASH_CTLR_PER ((uint16_t)0x0002)" +.LASF2812: + .string "RCC_ADC2EN ((uint32_t)0x00000400)" +.LASF4778: + .string "FoundNewDev" +.LASF743: + .string "__predict_true(exp) __builtin_expect((exp), 1)" +.LASF4773: + .string "GpVar" +.LASF169: + .string "__DBL_MAX__ ((double)1.79769313486231570814527423731704357e+308L)" +.LASF4462: + .string "USB_DESCR_TYP_CS_INTF 0x24" +.LASF4331: + .string "RB_UEP_AUTO_TOG 0x10" +.LASF4577: + .string "__ULong" +.LASF185: + .string "__LDBL_MIN__ 3.36210314311209350626267781732175260e-4932L" +.LASF4680: + .string "_daylight" +.LASF4483: + .string "USB_DEVICE_ADDR 0x02" +.LASF2377: + .string "AFIO_ECR_PORT ((uint8_t)0x70)" +.LASF3869: + .string "RTC_IT_OW ((uint16_t)0x0004)" +.LASF1102: + .string "F_RDLCK 1" +.LASF1927: + .string "DMA_CFG5_PL_0 ((uint16_t)0x1000)" +.LASF634: + .string "_SIZE_T " +.LASF2756: + .string "RCC_CFGR0_MCO_SYSCLK ((uint32_t)0x04000000)" +.LASF2548: + .string "AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040)" +.LASF294: + .string "__GCC_ATOMIC_LLONG_LOCK_FREE 1" +.LASF2015: + .string "EXTI_EVENR_MR8 ((uint32_t)0x00000100)" +.LASF785: + .string "__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))" +.LASF2312: + .string "GPIO_BSHR_BR5 ((uint32_t)0x00200000)" +.LASF646: + .string "_GCC_SIZE_T " +.LASF3993: + .string "TIM_LOCKLevel_2 ((uint16_t)0x0200)" +.LASF3749: + .string "RCC_PLLMul_5 ((uint32_t)0x000C0000)" +.LASF741: + .string "__unreachable() __builtin_unreachable()" +.LASF1590: + .string "ADC_SQ9_2 ((uint32_t)0x00001000)" +.LASF1878: + .string "DMA_CFGR3_HTIE ((uint16_t)0x0004)" +.LASF823: + .string "_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT," +.LASF4809: + .string "__FUNCTION__" +.LASF2300: + .string "GPIO_BSHR_BS9 ((uint32_t)0x00000200)" +.LASF2134: + .string "FLASH_ADDR_FAR ((uint32_t)0xFFFFFFFF)" +.LASF1720: + .string "BKP_DATAR41_D ((uint16_t)0xFFFF)" +.LASF1172: + .string "__STDINT_EXP(x) __ ##x ##__" +.LASF666: + .string "__need_wchar_t" +.LASF2610: + .string "I2C_OADDR1_ADD9 ((uint16_t)0x0200)" +.LASF3974: + .string "TIM_OCPolarity_Low ((uint16_t)0x0002)" +.LASF601: + .string "_ELIDABLE_INLINE static __inline__" +.LASF142: + .string "__GCC_IEC_559 0" +.LASF1549: + .string "ADC_SQ13_2 ((uint32_t)0x00000004)" +.LASF3177: + .string "USART_GPR_PSC_4 ((uint16_t)0x0010)" +.LASF322: + .string "RT_TICK_PER_SECOND 1000" +.LASF1537: + .string "ADC_SMP9_0 ((uint32_t)0x08000000)" +.LASF4637: + .string "_cvtbuf" +.LASF1648: + .string "ADC_JSQ1_0 ((uint32_t)0x00000001)" +.LASF191: + .string "__FLT32_MANT_DIG__ 24" +.LASF2684: + .string "RCC_SWS_PLL ((uint32_t)0x00000008)" +.LASF3468: + .string "DMA2_FLAG_GL3 ((uint32_t)0x10000100)" +.LASF3751: + .string "RCC_PLLMul_7 ((uint32_t)0x00140000)" +.LASF4606: + .string "_file" +.LASF2769: + .string "RCC_HSERDYIE ((uint32_t)0x00000800)" +.LASF996: + .string "_IFLNK 0120000" +.LASF2935: + .string "TIM_OIS1N ((uint16_t)0x0200)" +.LASF4466: + .string "USB_DEV_CLASS_AUDIO 0x01" +.LASF2329: + .string "GPIO_BCR_BR6 ((uint16_t)0x0040)" +.LASF472: + .string "RT_THREAD_STAT_MASK 0x07" +.LASF1594: + .string "ADC_SQ10_0 ((uint32_t)0x00008000)" +.LASF4743: + .string "IRER" +.LASF520: + .string "RT_DEVICE_CTRL_CHAR_STREAM 0x10" +.LASF635: + .string "_SYS_SIZE_T_H " +.LASF83: + .string "__SHRT_WIDTH__ 16" +.LASF1013: + .string "S_IFSOCK _IFSOCK" +.LASF4681: + .string "_tzname" +.LASF3248: + .string "ADC_Channel_5 ((uint8_t)0x05)" +.LASF70: + .string "__GXX_ABI_VERSION 1013" +.LASF393: + .string "RT_UINT8_MAX 0xff" +.LASF849: + .string "_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)" +.LASF510: + .string "RT_DEVICE_OFLAG_RDWR 0x003" +.LASF1790: + .string "DMA_HTIF2 ((uint32_t)0x00000040)" +.LASF1127: + .string "rt_list_for_each_entry(pos,head,member) for (pos = rt_list_entry((head)->next, typeof(*pos), member); &pos->member != (head); pos = rt_list_entry(pos->member.next, typeof(*pos), member))" +.LASF3358: + .string "DBGMCU_STOP ((uint32_t)0x00000002)" +.LASF739: + .string "__result_use_check __attribute__((__warn_unused_result__))" +.LASF639: + .string "_SIZE_T_ " +.LASF3091: + .string "TIM_DTG_0 ((uint16_t)0x0001)" +.LASF1786: + .string "DMA_HTIF1 ((uint32_t)0x00000004)" +.LASF3872: + .string "RTC_FLAG_RTOFF ((uint16_t)0x0020)" +.LASF168: + .string "__DBL_DECIMAL_DIG__ 17" +.LASF4068: + .string "TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)" +.LASF1474: + .string "ADC_SMP11_1 ((uint32_t)0x00000010)" +.LASF287: + .string "__GCC_ATOMIC_CHAR_LOCK_FREE 1" +.LASF14: + .string "__ATOMIC_CONSUME 1" +.LASF962: + .string "_USECONDS_T_DECLARED " +.LASF1518: + .string "ADC_SMP4_1 ((uint32_t)0x00002000)" +.LASF2872: + .string "SPI_CTLR1_SSM ((uint16_t)0x0200)" +.LASF4458: + .string "USB_DESCR_TYP_OTG 0x09" +.LASF2988: + .string "TIM_CC1G ((uint8_t)0x02)" +.LASF2592: + .string "I2C_CTLR2_FREQ_4 ((uint16_t)0x0010)" +.LASF2678: + .string "RCC_SW_PLL ((uint32_t)0x00000002)" +.LASF4799: + .string "texit" +.LASF2925: + .string "TIM_CKD_1 ((uint16_t)0x0200)" +.LASF1231: + .string "INT_LEAST64_MIN (-__INT_LEAST64_MAX__ - 1)" +.LASF2261: + .string "GPIO_INDR_IDR2 ((uint16_t)0x0004)" +.LASF260: + .string "__FLT64X_HAS_QUIET_NAN__ 1" +.LASF3505: + .string "FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008)" +.LASF3916: + .string "I2S_MCLKOutput_Disable ((uint16_t)0x0000)" +.LASF1014: + .string "S_IFIFO _IFIFO" +.LASF4562: + .string "rt_size_t" +.LASF4475: + .string "USB_DEV_CLASS_VEN_SPEC 0xFF" +.LASF1473: + .string "ADC_SMP11_0 ((uint32_t)0x00000008)" +.LASF1293: + .string "TIM6_BASE (APB1PERIPH_BASE + 0x1000)" +.LASF968: + .string "SCHED_FIFO 1" +.LASF986: + .string "CLOCK_DISABLED 0" +.LASF1621: + .string "ADC_SQ2_3 ((uint32_t)0x00000100)" +.LASF770: + .string "_Nonnull " +.LASF4142: + .string "TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers" +.LASF1683: + .string "BKP_DATAR4_D ((uint16_t)0xFFFF)" +.LASF4555: + .string "rt_uint32_t" +.LASF2481: + .string "AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010)" +.LASF4492: + .string "USB_BO_CSW_SIG0 0x55" +.LASF4747: + .string "IPRR" +.LASF4506: + .string "pEP4_IN_DataBuf (pEP4_RAM_Addr+64)" +.LASF3077: + .string "TIM_CC3NE ((uint16_t)0x0400)" +.LASF2670: + .string "RCC_CSSON ((uint32_t)0x00080000)" +.LASF2718: + .string "RCC_ADCPRE_0 ((uint32_t)0x00004000)" +.LASF926: + .string "FD_CLR(n,p) ((p)->fds_bits[(n)/NFDBITS] &= ~(1L << ((n) % NFDBITS)))" +.LASF2161: + .string "GPIO_CFGLR_MODE0_0 ((uint32_t)0x00000001)" +.LASF2824: + .string "RCC_LSEON ((uint32_t)0x00000001)" +.LASF281: + .string "__DEC128_SUBNORMAL_MIN__ 0.000000000000000000000000000000001E-6143DL" +.LASF4675: + .string "_impure_ptr" +.LASF3097: + .string "TIM_DTG_6 ((uint16_t)0x0040)" +.LASF4380: + .string "USB_PID_NULL 0x00" +.LASF2998: + .string "TIM_OC1FE ((uint16_t)0x0004)" +.LASF2286: + .string "GPIO_OUTDR_ODR11 ((uint16_t)0x0800)" +.LASF3195: + .string "WWDG_CFGR_W3 ((uint16_t)0x0008)" +.LASF647: + .string "_SIZET_ " +.LASF3550: + .string "FLASH_IT_EOP ((uint32_t)0x00001000)" +.LASF726: + .string "__aligned(x) __attribute__((__aligned__(x)))" +.LASF2527: + .string "AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000)" +.LASF90: + .string "__SIZE_WIDTH__ 32" +.LASF4756: + .string "UINT8" +.LASF2649: + .string "PWR_CTLR_PLS_2 ((uint16_t)0x0080)" +.LASF3765: + .string "RCC_SYSCLK_Div2 ((uint32_t)0x00000080)" +.LASF4586: + .string "__tm_hour" +.LASF4613: + .string "_ubuf" +.LASF2487: + .string "AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000)" +.LASF4158: + .string "USART_Parity_Odd ((uint16_t)0x0600)" +.LASF3423: + .string "DMA2_IT_TE3 ((uint32_t)0x10000800)" +.LASF1631: + .string "ADC_SQ4_1 ((uint32_t)0x00010000)" +.LASF4044: + .string "TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)" +.LASF3910: + .string "I2S_Standard_PCMLong ((uint16_t)0x00B0)" +.LASF4690: + .string "EXC_IRQn" +.LASF636: + .string "_T_SIZE_ " +.LASF2983: + .string "TIM_CC1OF ((uint16_t)0x0200)" +.LASF348: + .string "RT_USING_FINSH " +.LASF3931: + .string "SPI_NSSInternalSoft_Set ((uint16_t)0x0100)" +.LASF1999: + .string "EXTI_INTENR_MR12 ((uint32_t)0x00001000)" +.LASF1298: + .string "RTC_BASE (APB1PERIPH_BASE + 0x2800)" +.LASF2: + .string "__STDC_UTF_16__ 1" +.LASF4745: + .string "IPSR" +.LASF3488: + .string "EXTI_Line7 ((uint32_t)0x00080)" +.LASF2496: + .string "AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000)" +.LASF3796: + .string "RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)" +.LASF1389: + .string "SPI1 ((SPI_TypeDef *) SPI1_BASE)" +.LASF1250: + .string "SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)" +.LASF1930: + .string "DMA_CFG6_EN ((uint16_t)0x0001)" +.LASF4764: + .string "pEP5_RAM_Addr" +.LASF4595: + .string "_dso_handle" +.LASF865: + .string "_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)" +.LASF3398: + .string "DMA1_IT_HT4 ((uint32_t)0x00004000)" +.LASF1354: + .string "TIM2 ((TIM_TypeDef *) TIM2_BASE)" +.LASF3819: + .string "RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)" +.LASF352: + .string "FINSH_USING_SYMTAB " +.LASF1219: + .string "INT_LEAST16_MIN (-__INT_LEAST16_MAX__ - 1)" +.LASF2301: + .string "GPIO_BSHR_BS10 ((uint32_t)0x00000400)" +.LASF1736: + .string "DAC_EN1 ((uint32_t)0x00000001)" +.LASF1973: + .string "DMA_PADDR1_PA ((uint32_t)0xFFFFFFFF)" +.LASF2534: + .string "AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0)" +.LASF1065: + .string "O_SYNC _FSYNC" +.LASF53: + .string "__INT_LEAST64_TYPE__ long long int" +.LASF593: + .string "__EXPORT " +.LASF919: + .string "__SYS_SELECT_H__ " +.LASF2915: + .string "TIM_UDIS ((uint16_t)0x0002)" +.LASF4122: + .string "TIM_FLAG_CC3 ((uint16_t)0x0008)" +.LASF1359: + .string "TIM7 ((TIM_TypeDef *) TIM7_BASE)" +.LASF3755: + .string "RCC_PLLMul_11 ((uint32_t)0x00240000)" +.LASF1851: + .string "DMA_CFGR1_MSIZE ((uint16_t)0x0C00)" +.LASF2478: + .string "AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005)" +.LASF2790: + .string "RCC_WWDGRST ((uint32_t)0x00000800)" +.LASF1696: + .string "BKP_DATAR17_D ((uint16_t)0xFFFF)" +.LASF2643: + .string "PWR_CTLR_CWUF ((uint16_t)0x0004)" +.LASF3020: + .string "TIM_IC1F_1 ((uint16_t)0x0020)" +.LASF3300: + .string "BKP_TamperPinLevel_Low ((uint16_t)0x0001)" +.LASF1414: + .string "CRC ((CRC_TypeDef *) CRC_BASE)" +.LASF3745: + .string "RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)" +.LASF725: + .string "__packed __attribute__((__packed__))" +.LASF2838: + .string "RCC_RMVF ((uint32_t)0x01000000)" +.LASF1147: + .string "FINSH_FUNCTION_EXPORT_ALIAS(name,alias,desc) FINSH_FUNCTION_EXPORT_CMD(name, alias, desc)" +.LASF845: + .string "_REENT_CHECK_SIGNAL_BUF(ptr) " +.LASF3940: + .string "SPI_I2S_IT_OVR ((uint8_t)0x56)" +.LASF2372: + .string "AFIO_ECR_PIN_PX11 ((uint8_t)0x0B)" +.LASF3619: + .string "GPIO_PinSource6 ((uint8_t)0x06)" +.LASF1435: + .string "ADC_JAUTO ((uint32_t)0x00000400)" +.LASF2174: + .string "GPIO_CFGLR_MODE4_1 ((uint32_t)0x00020000)" +.LASF871: + .string "_Kmax (sizeof (size_t) << 3)" +.LASF1161: + .string "REGBYTES 4" +.LASF4069: + .string "TIM_TS_ITR0 ((uint16_t)0x0000)" +.LASF2594: + .string "I2C_CTLR2_ITERREN ((uint16_t)0x0100)" +.LASF762: + .string "__FBSDID(s) struct __hack" +.LASF248: + .string "__FLT64X_DIG__ 33" +.LASF3118: + .string "TIM_DBL_3 ((uint16_t)0x0800)" +.LASF2386: + .string "AFIO_ECR_EVOE ((uint8_t)0x80)" +.LASF1317: + .string "GPIOD_BASE (APB2PERIPH_BASE + 0x1400)" +.LASF3963: + .string "TIM_Channel_3 ((uint16_t)0x0008)" +.LASF2171: + .string "GPIO_CFGLR_MODE3_1 ((uint32_t)0x00002000)" +.LASF877: + .string "__need_NULL " +.LASF4022: + .string "TIM_DMABase_CR2 ((uint16_t)0x0001)" +.LASF778: + .string "__lockable __lock_annotate(lockable)" +.LASF1083: + .string "FEXCL _FEXCL" +.LASF3532: + .string "FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000)" +.LASF4289: + .string "RB_UEP4_TX_EN 0x04" +.LASF4437: + .string "HUB_C_HUB_LOCAL_POWER 0" +.LASF2867: + .string "SPI_CTLR1_BR_1 ((uint16_t)0x0010)" +.LASF3035: + .string "TIM_OC3PE ((uint16_t)0x0008)" +.LASF2544: + .string "AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000)" +.LASF494: + .string "RT_DEVICE_FLAG_DEACTIVATE 0x000" +.LASF4776: + .string "ThisUsbDev" +.LASF355: + .string "FINSH_CMD_SIZE 80" +.LASF884: + .string "_SYS__STDINT_H " +.LASF166: + .string "__DBL_MAX_EXP__ 1024" +.LASF2074: + .string "EXTI_SWIEVR_SWIEVR7 ((uint32_t)0x00000080)" +.LASF2084: + .string "EXTI_SWIEVR_SWIEVR17 ((uint32_t)0x00020000)" +.LASF2314: + .string "GPIO_BSHR_BR7 ((uint32_t)0x00800000)" +.LASF2631: + .string "I2C_STAR2_TRA ((uint16_t)0x0004)" +.LASF1460: + .string "ADC_EXTSEL ((uint32_t)0x000E0000)" +.LASF993: + .string "_IFCHR 0020000" +.LASF2804: + .string "RCC_CRCEN ((uint16_t)0x0040)" +.LASF1402: + .string "DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)" +.LASF4409: + .string "HID_GET_IDLE 0x02" +.LASF3554: + .string "FLASH_FLAG_EOP ((uint32_t)0x00000020)" +.LASF3450: + .string "DMA1_FLAG_HT5 ((uint32_t)0x00040000)" +.LASF1762: + .string "DAC_MAMP2 ((uint32_t)0x0F000000)" +.LASF4105: + .string "TIM_TRGOSource_Reset ((uint16_t)0x0000)" +.LASF2801: + .string "RCC_DMA1EN ((uint16_t)0x0001)" +.LASF4464: + .string "USB_DESCR_TYP_HUB 0x29" +.LASF1037: + .string "LIBC_FCNTL_H__ " +.LASF572: + .string "_DEFAULT_SOURCE 1" +.LASF296: + .string "__GCC_ATOMIC_POINTER_LOCK_FREE 2" +.LASF3343: + .string "BKP_DR39 ((uint16_t)0x00B0)" +.LASF1001: + .string "S_ISGID 0002000" +.LASF4655: + .string "_gamma_signgam" +.LASF3284: + .string "ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)" +.LASF1152: + .string "HWREG8(x) (*((volatile rt_uint8_t *)(x)))" +.LASF2384: + .string "AFIO_ECR_PORT_PD ((uint8_t)0x30)" +.LASF2151: + .string "FLASH_WRPR0_WRPR0 ((uint32_t)0x000000FF)" +.LASF3375: + .string "DMA_Priority_VeryHigh ((uint32_t)0x00003000)" +.LASF628: + .string "___int_ptrdiff_t_h " +.LASF2602: + .string "I2C_OADDR1_ADD1 ((uint16_t)0x0002)" +.LASF672: + .string "__PMT(args) args" +.LASF2660: + .string "PWR_CSR_SBF ((uint16_t)0x0002)" +.LASF2066: + .string "EXTI_FTENR_TR19 ((uint32_t)0x00080000)" +.LASF2634: + .string "I2C_STAR2_SMBHOST ((uint16_t)0x0040)" +.LASF706: + .string "__CC_SUPPORTS___INLINE 1" +.LASF595: + .string "_READ_WRITE_BUFSIZE_TYPE int" +.LASF2652: + .string "PWR_CTLR_PLS_2V4 ((uint16_t)0x0040)" +.LASF4641: + .string "__sglue" +.LASF4026: + .string "TIM_DMABase_EGR ((uint16_t)0x0005)" +.LASF1045: + .string "_FDEFER 0x0020" +.LASF2154: + .string "FLASH_WRPR1_nWRPR1 ((uint32_t)0xFF000000)" +.LASF2614: + .string "I2C_DR_DATAR ((uint8_t)0xFF)" +.LASF140: + .string "__INTPTR_WIDTH__ 32" +.LASF89: + .string "__PTRDIFF_WIDTH__ 32" +.LASF1982: + .string "DMA_MADDR3_MA ((uint32_t)0xFFFFFFFF)" +.LASF12: + .string "__ATOMIC_RELEASE 3" +.LASF71: + .string "__SCHAR_MAX__ 0x7f" +.LASF1235: + .string "INT_FAST8_MAX (__INT_FAST8_MAX__)" +.LASF3141: + .string "USART_CTLR1_TXEIE ((uint16_t)0x0080)" +.LASF2254: + .string "GPIO_CFGHR_CNF14_0 ((uint32_t)0x04000000)" +.LASF844: + .string "_REENT_CHECK_MISC(ptr) " +.LASF4591: + .string "__tm_yday" +.LASF3597: + .string "GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002)" +.LASF3777: + .string "RCC_HCLK_Div16 ((uint32_t)0x00000700)" +.LASF2697: + .string "RCC_HPRE_DIV256 ((uint32_t)0x000000E0)" +.LASF3607: + .string "GPIO_PortSourceGPIOB ((uint8_t)0x01)" +.LASF2914: + .string "TIM_CEN ((uint16_t)0x0001)" +.LASF3868: + .string "__CH32V10x_RTC_H " +.LASF4281: + .string "MASK_UIS_H_RES 0x0F" +.LASF1581: + .string "ADC_SQ8 ((uint32_t)0x000003E0)" +.LASF3384: + .string "DMA1_IT_GL1 ((uint32_t)0x00000001)" +.LASF1136: + .string "__RTM_H__ " +.LASF3977: + .string "TIM_OutputState_Disable ((uint16_t)0x0000)" +.LASF1706: + .string "BKP_DATAR27_D ((uint16_t)0xFFFF)" +.LASF4178: + .string "USART_IT_IDLE ((uint16_t)0x0424)" +.LASF2627: + .string "I2C_STAR1_TIMEOUT ((uint16_t)0x4000)" +.LASF2791: + .string "RCC_USART2RST ((uint32_t)0x00020000)" +.LASF2370: + .string "AFIO_ECR_PIN_PX9 ((uint8_t)0x09)" +.LASF4751: + .string "IPRIOR" +.LASF2088: + .string "EXTI_INTF_INTF1 ((uint32_t)0x00000002)" +.LASF4165: + .string "USART_Clock_Disable ((uint16_t)0x0000)" +.LASF4709: + .string "DMA1_Channel6_IRQn" +.LASF146: + .string "__DEC_EVAL_METHOD__ 2" +.LASF3812: + .string "RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)" +.LASF4645: + .string "_niobs" +.LASF1811: + .string "DMA_TEIF7 ((uint32_t)0x08000000)" +.LASF1342: + .string "DMA2_BASE (AHBPERIPH_BASE + 0x0400)" +.LASF1017: + .string "S_IWUSR 0000200" +.LASF2041: + .string "EXTI_RTENR_TR14 ((uint32_t)0x00004000)" +.LASF847: + .string "_REENT_RAND_NEXT(ptr) ((ptr)->_new._reent._rand_next)" +.LASF2940: + .string "TIM_OIS4 ((uint16_t)0x4000)" +.LASF1691: + .string "BKP_DATAR12_D ((uint16_t)0xFFFF)" +.LASF3471: + .string "DMA2_FLAG_TE3 ((uint32_t)0x10000800)" +.LASF1650: + .string "ADC_JSQ1_2 ((uint32_t)0x00000004)" +.LASF2107: + .string "FLASH_ACTLR_LATENCY ((uint8_t)0x03)" +.LASF3900: + .string "SPI_FirstBit_MSB ((uint16_t)0x0000)" +.LASF4667: + .string "_wcrtomb_state" +.LASF253: + .string "__FLT64X_DECIMAL_DIG__ 36" +.LASF4168: + .string "USART_CPOL_High ((uint16_t)0x0400)" +.LASF3123: + .string "USART_STATR_NE ((uint16_t)0x0004)" +.LASF773: + .string "__NULLABILITY_PRAGMA_PUSH " +.LASF553: + .string "_WANT_REGISTER_FINI 1" +.LASF1859: + .string "DMA_CFGR2_TCIE ((uint16_t)0x0002)" +.LASF3009: + .string "TIM_OC2PE ((uint16_t)0x0800)" +.LASF2217: + .string "GPIO_CFGHR_MODE10_0 ((uint32_t)0x00000100)" +.LASF297: + .string "__GCC_HAVE_DWARF2_CFI_ASM 1" +.LASF273: + .string "__DEC64_EPSILON__ 1E-15DD" +.LASF2231: + .string "GPIO_CFGHR_MODE15 ((uint32_t)0x30000000)" +.LASF4152: + .string "USART_StopBits_1 ((uint16_t)0x0000)" +.LASF3932: + .string "SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)" +.LASF2840: + .string "RCC_PORRSTF ((uint32_t)0x08000000)" +.LASF519: + .string "RT_DEVICE_CTRL_GET_INT 0x12" +.LASF970: + .string "PTHREAD_SCOPE_PROCESS 0" +.LASF2691: + .string "RCC_HPRE_DIV2 ((uint32_t)0x00000080)" +.LASF2126: + .string "FLASH_CTLR_LOCK ((uint16_t)0x0080)" +.LASF2252: + .string "GPIO_CFGHR_CNF13_1 ((uint32_t)0x00800000)" +.LASF1824: + .string "DMA_CGIF4 ((uint32_t)0x00001000)" +.LASF3525: + .string "FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000)" +.LASF2172: + .string "GPIO_CFGLR_MODE4 ((uint32_t)0x00030000)" +.LASF1129: + .string "rt_list_first_entry(ptr,type,member) rt_list_entry((ptr)->next, type, member)" +.LASF4102: + .string "TIM_OCFast_Disable ((uint16_t)0x0000)" +.LASF2849: + .string "RTC_CTLRL_ALRF ((uint8_t)0x02)" +.LASF1059: + .string "O_WRONLY 1" +.LASF2443: + .string "AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002)" +.LASF953: + .string "_PID_T_DECLARED " +.LASF1563: + .string "ADC_SQ15_4 ((uint32_t)0x00004000)" +.LASF2418: + .string "AFIO_PCFR1_CAN_REMAP_0 ((uint32_t)0x00002000)" +.LASF4280: + .string "MASK_UIS_ENDP 0x0F" +.LASF3256: + .string "ADC_Channel_13 ((uint8_t)0x0D)" +.LASF3037: + .string "TIM_OC3M_0 ((uint16_t)0x0010)" +.LASF2304: + .string "GPIO_BSHR_BS13 ((uint32_t)0x00002000)" +.LASF1120: + .string "DT_DIR 0x02" +.LASF4405: + .string "HUB_SET_FEATURE 0x03" +.LASF3911: + .string "I2S_DataFormat_16b ((uint16_t)0x0000)" +.LASF1381: + .string "GPIOC ((GPIO_TypeDef *) GPIOC_BASE)" +.LASF759: + .string "__warn_references(sym,msg) __asm__(\".section .gnu.warning.\" #sym); __asm__(\".asciz \\\"\" msg \"\\\"\"); __asm__(\".previous\")" +.LASF2335: + .string "GPIO_BCR_BR12 ((uint16_t)0x1000)" +.LASF182: + .string "__DECIMAL_DIG__ 36" +.LASF100: + .string "__INT16_MAX__ 0x7fff" +.LASF3060: + .string "TIM_IC4PSC_0 ((uint16_t)0x0400)" +.LASF653: + .string "_T_WCHAR_ " +.LASF1848: + .string "DMA_CFGR1_PSIZE ((uint16_t)0x0300)" +.LASF1143: + .string "FINSH_API_H__ " +.LASF2991: + .string "TIM_CC4G ((uint8_t)0x10)" +.LASF477: + .string "RT_THREAD_STAT_SIGNAL_WAIT 0x20" +.LASF3966: + .string "TIM_CKD_DIV2 ((uint16_t)0x0100)" +.LASF2958: + .string "TIM_ECE ((uint16_t)0x4000)" +.LASF3090: + .string "TIM_DTG ((uint16_t)0x00FF)" +.LASF1109: + .string "AT_SYMLINK_FOLLOW 4" +.LASF3670: + .string "I2C_IT_BTF ((uint32_t)0x02000004)" +.LASF4203: + .string "USART_FLAG_PE ((uint16_t)0x0001)" +.LASF3486: + .string "EXTI_Line5 ((uint32_t)0x00020)" +.LASF2997: + .string "TIM_CC1S_1 ((uint16_t)0x0002)" +.LASF2561: + .string "AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000)" +.LASF1879: + .string "DMA_CFGR3_TEIE ((uint16_t)0x0008)" +.LASF2693: + .string "RCC_HPRE_DIV8 ((uint32_t)0x000000A0)" +.LASF2895: + .string "SPI_RCRCR_RXCRC ((uint16_t)0xFFFF)" +.LASF2877: + .string "SPI_CTLR1_BIDIOE ((uint16_t)0x4000)" +.LASF3314: + .string "BKP_DR10 ((uint16_t)0x0028)" +.LASF977: + .string "_PTHREAD_COND_INITIALIZER ((pthread_cond_t) 0xFFFFFFFF)" +.LASF648: + .string "__size_t " +.LASF376: + .string "RT_DEBUG_THREAD 0" +.LASF3415: + .string "DMA2_IT_TE1 ((uint32_t)0x10000008)" +.LASF1707: + .string "BKP_DATAR28_D ((uint16_t)0xFFFF)" +.LASF2618: + .string "I2C_STAR1_ADD10 ((uint16_t)0x0008)" +.LASF577: + .string "_ATFILE_SOURCE" +.LASF3348: + .string "__CH32V10x_DBGMCU_H " +.LASF534: + .string "RTGRAPHIC_CTRL_GET_EXT 5" +.LASF1163: + .string "__MPU_PRESENT 0" +.LASF1940: + .string "DMA_CFG6_PSIZE_1 ((uint16_t)0x0200)" +.LASF2169: + .string "GPIO_CFGLR_MODE3 ((uint32_t)0x00003000)" +.LASF3209: + .string "EXTEN_LOCKUP_EN ((uint32_t)0x00000040)" +.LASF1093: + .string "F_SETOWN 6" +.LASF4771: + .string "DeviceVID" +.LASF2851: + .string "RTC_CTLRL_RSF ((uint8_t)0x08)" +.LASF3387: + .string "DMA1_IT_TE1 ((uint32_t)0x00000008)" +.LASF1475: + .string "ADC_SMP11_2 ((uint32_t)0x00000020)" +.LASF842: + .string "_REENT_CHECK_ASCTIME_BUF(ptr) " +.LASF1555: + .string "ADC_SQ14_2 ((uint32_t)0x00000080)" +.LASF3131: + .string "USART_DATAR_DR ((uint16_t)0x01FF)" +.LASF3487: + .string "EXTI_Line6 ((uint32_t)0x00040)" +.LASF3928: + .string "I2S_CPOL_High ((uint16_t)0x0008)" +.LASF3709: + .string "I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080)" +.LASF2959: + .string "TIM_ETP ((uint16_t)0x8000)" +.LASF1282: + .string "HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT" +.LASF4135: + .string "TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers" +.LASF122: + .string "__UINT16_C(c) c" +.LASF3179: + .string "USART_GPR_PSC_6 ((uint16_t)0x0040)" +.LASF3717: + .string "IWDG_Prescaler_32 ((uint8_t)0x03)" +.LASF4769: + .string "DeviceSpeed" +.LASF2492: + .string "AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500)" +.LASF528: + .string "RT_DEVICE_CTRL_CURSOR_SET_TYPE 0x11" +.LASF1489: + .string "ADC_SMP15_0 ((uint32_t)0x00008000)" +.LASF4198: + .string "USART_FLAG_RXNE ((uint16_t)0x0020)" +.LASF4449: + .string "HUB_C_PORT_OVER_CURRENT 19" +.LASF745: + .string "__null_sentinel __attribute__((__sentinel__))" +.LASF4427: + .string "USB_REQ_RECIP_OTHER 0x03" +.LASF618: + .string "__EXP" +.LASF289: + .string "__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2" +.LASF1573: + .string "ADC_L_2 ((uint32_t)0x00400000)" +.LASF679: + .string "__attribute_pure__ " +.LASF1726: + .string "BKP_TPE ((uint8_t)0x01)" +.LASF2272: + .string "GPIO_INDR_IDR13 ((uint16_t)0x2000)" +.LASF4584: + .string "__tm_sec" +.LASF4624: + .string "_stdout" +.LASF751: + .string "__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))" +.LASF516: + .string "RT_DEVICE_CTRL_CLOSE 0x04" +.LASF4608: + .string "_cookie" +.LASF4334: + .string "MASK_UEP_R_RES 0x0C" +.LASF460: + .string "RT_TIMER_CTRL_GET_TIME 0x1" +.LASF1950: + .string "DMA_CFG7_HTIE ((uint16_t)0x0004)" +.LASF4688: + .string "_syscall_table_end" +.LASF1962: + .string "DMA_CFG7_PL ((uint16_t)0x3000)" +.LASF2578: + .string "I2C_CTLR1_ENGC ((uint16_t)0x0040)" +.LASF3142: + .string "USART_CTLR1_PEIE ((uint16_t)0x0100)" +.LASF1016: + .string "S_IRUSR 0000400" +.LASF3583: + .string "GPIO_Remap_USART2 ((uint32_t)0x00000008)" +.LASF2223: + .string "GPIO_CFGHR_MODE12_0 ((uint32_t)0x00010000)" +.LASF4104: + .string "TIM_OCClear_Disable ((uint16_t)0x0000)" +.LASF2947: + .string "TIM_TS_1 ((uint16_t)0x0020)" +.LASF1589: + .string "ADC_SQ9_1 ((uint32_t)0x00000800)" +.LASF2585: + .string "I2C_CTLR1_ALERT ((uint16_t)0x2000)" +.LASF3718: + .string "IWDG_Prescaler_64 ((uint8_t)0x04)" +.LASF2038: + .string "EXTI_RTENR_TR11 ((uint32_t)0x00000800)" +.LASF392: + .string "RT_FALSE 0" +.LASF4350: + .string "R8_UEP2_T_LEN (*((PUINT8V)(0x40023438)))" +.LASF3039: + .string "TIM_OC3M_2 ((uint16_t)0x0040)" +.LASF3432: + .string "DMA1_FLAG_GL1 ((uint32_t)0x00000001)" +.LASF3682: + .string "I2C_FLAG_PECERR ((uint32_t)0x10001000)" +.LASF617: + .string "___int_least64_t_defined 1" +.LASF1350: + .string "FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)" +.LASF1963: + .string "DMA_CFG7_PL_0 ((uint16_t)0x1000)" +.LASF2078: + .string "EXTI_SWIEVR_SWIEVR11 ((uint32_t)0x00000800)" +.LASF1362: + .string "TIM14 ((TIM_TypeDef *) TIM14_BASE)" +.LASF4415: + .string "USB_REQ_TYP_OUT 0x00" +.LASF3134: + .string "USART_CTLR1_SBK ((uint16_t)0x0001)" +.LASF950: + .string "_DEV_T_DECLARED " +.LASF2936: + .string "TIM_OIS2 ((uint16_t)0x0400)" +.LASF3217: + .string "EXTEN_FLASH_CLK_TRIM ((uint32_t)0x00070000)" +.LASF4177: + .string "USART_IT_ORE_RX ((uint16_t)0x0325)" +.LASF1737: + .string "DAC_BOFF1 ((uint32_t)0x00000002)" +.LASF1506: + .string "ADC_SMP1_1 ((uint32_t)0x00000010)" +.LASF1610: + .string "ADC_SQ12_4 ((uint32_t)0x20000000)" +.LASF2583: + .string "I2C_CTLR1_POS ((uint16_t)0x0800)" +.LASF4005: + .string "TIM_ICPolarity_BothEdge ((uint16_t)0x000A)" +.LASF2159: + .string "GPIO_CFGLR_MODE ((uint32_t)0x33333333)" +.LASF722: + .string "__pure2 __attribute__((__const__))" +.LASF2518: + .string "AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060)" +.LASF893: + .string "__int32_t_defined 1" +.LASF2004: + .string "EXTI_INTENR_MR17 ((uint32_t)0x00020000)" +.LASF3085: + .string "TIM_REP ((uint8_t)0xFF)" +.LASF2992: + .string "TIM_COMG ((uint8_t)0x20)" +.LASF3068: + .string "TIM_CC1P ((uint16_t)0x0002)" +.LASF4439: + .string "HUB_PORT_CONNECTION 0" +.LASF1315: + .string "GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)" +.LASF1505: + .string "ADC_SMP1_0 ((uint32_t)0x00000008)" +.LASF4316: + .string "R16_UH_RX_DMA R16_UEP2_DMA" +.LASF2149: + .string "FLASH_Data1_Data1 ((uint32_t)0x00FF0000)" +.LASF1933: + .string "DMA_CFG6_TEIE ((uint16_t)0x0008)" +.LASF4570: + .string "wint_t" +.LASF270: + .string "__DEC64_MAX_EXP__ 385" +.LASF3697: + .string "I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008)" +.LASF1896: + .string "DMA_CFG4_HTIE ((uint16_t)0x0004)" +.LASF3823: + .string "RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)" +.LASF1068: + .string "FAPPEND _FAPPEND" +.LASF3327: + .string "BKP_DR23 ((uint16_t)0x0070)" +.LASF2415: + .string "AFIO_PCFR1_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00)" +.LASF3106: + .string "TIM_AOE ((uint16_t)0x4000)" +.LASF1248: + .string "UINTMAX_MAX (__UINTMAX_MAX__)" +.LASF947: + .string "_ID_T_DECLARED " +.LASF3474: + .string "DMA2_FLAG_HT4 ((uint32_t)0x10004000)" +.LASF4523: + .string "ERR_USB_DISCON 0x16" +.LASF2464: + .string "AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000)" +.LASF2889: + .string "SPI_STATR_CRCERR ((uint8_t)0x10)" +.LASF1343: + .string "DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408)" +.LASF386: + .string "__RT_DEF_H__ " +.LASF4299: + .string "RB_UH_EP_TBUF_MOD 0x10" +.LASF2597: + .string "I2C_CTLR2_DMAEN ((uint16_t)0x0800)" +.LASF3378: + .string "DMA_Priority_Low ((uint32_t)0x00000000)" +.LASF2160: + .string "GPIO_CFGLR_MODE0 ((uint32_t)0x00000003)" +.LASF2722: + .string "RCC_ADCPRE_DIV6 ((uint32_t)0x00008000)" +.LASF272: + .string "__DEC64_MAX__ 9.999999999999999E384DD" +.LASF4151: + .string "USART_WordLength_9b ((uint16_t)0x1000)" +.LASF1227: + .string "UINT_LEAST32_MAX (__UINT_LEAST32_MAX__)" +.LASF975: + .string "PTHREAD_CREATE_JOINABLE 1" +.LASF863: + .string "_REENT_MBRTOWC_STATE(ptr) ((ptr)->_new._reent._mbrtowc_state)" +.LASF1456: + .string "ADC_JEXTSEL_0 ((uint32_t)0x00001000)" +.LASF1702: + .string "BKP_DATAR23_D ((uint16_t)0xFFFF)" +.LASF4639: + .string "_atexit0" +.LASF1614: + .string "ADC_SQ1_2 ((uint32_t)0x00000004)" +.LASF4556: + .string "unsigned int" +.LASF4003: + .string "TIM_ICPolarity_Rising ((uint16_t)0x0000)" +.LASF381: + .string "RT_DEBUG_CONTEXT_CHECK 1" +.LASF1545: + .string "ADC_LT ((uint16_t)0x0FFF)" +.LASF3641: + .string "I2C_Register_CTLR1 ((uint8_t)0x00)" +.LASF1202: + .string "__int_least64_t_defined 1" +.LASF4472: + .string "USB_DEV_CLASS_PRINTER 0x07" +.LASF4549: + .string "NVIC_PriorityGroup_4 ((uint32_t)0x04)" +.LASF4306: + .string "RB_UEP5_RX_EN 0x08" +.LASF3701: + .string "I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002)" +.LASF3627: + .string "GPIO_PinSource14 ((uint8_t)0x0E)" +.LASF3854: + .string "RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)" +.LASF4246: + .string "RB_UIE_BUS_RST 0x01" +.LASF373: + .string "RT_DEBUG_MODULE 0" +.LASF4804: + .string "rt_assert_handler" +.LASF4648: + .string "_seed" +.LASF293: + .string "__GCC_ATOMIC_LONG_LOCK_FREE 2" +.LASF3967: + .string "TIM_CKD_DIV4 ((uint16_t)0x0200)" +.LASF234: + .string "__FLT32X_DIG__ 15" +.LASF4611: + .string "_seek" +.LASF4340: + .string "RB_UEP_T_RES0 0x01" +.LASF3889: + .string "SPI_CPHA_2Edge ((uint16_t)0x0001)" +.LASF2506: + .string "AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001)" +.LASF1328: + .string "TIM15_BASE (APB2PERIPH_BASE + 0x4000)" +.LASF711: + .string "__CC_SUPPORTS_DYNAMIC_ARRAY_INIT 1" +.LASF4173: + .string "USART_IT_PE ((uint16_t)0x0028)" + .ident "GCC: (GNU MCU Eclipse RISC-V Embedded GCC, 64-bit) 8.2.0" diff --git a/libcpu/risc-v/ch32v103/interrupt_gcc.S b/libcpu/risc-v/ch32v103/interrupt_gcc.S new file mode 100644 index 0000000000..eb9b0d06cd --- /dev/null +++ b/libcpu/risc-v/ch32v103/interrupt_gcc.S @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + */ + +#include "cpuport.h" + +.global SW_handler +.align 6 +SW_handler: + /* save all from thread context */ + addi sp, sp, -32 * REGBYTES + /* жmepcֵᱻӲ */ + + STORE x1, 1 * REGBYTES(sp) + li t0, 0x80 /* ൱жmie=0 */ + + STORE t0, 2 * REGBYTES(sp) + + STORE x4, 4 * REGBYTES(sp) + STORE x5, 5 * REGBYTES(sp) + STORE x6, 6 * REGBYTES(sp) + STORE x7, 7 * REGBYTES(sp) + STORE x8, 8 * REGBYTES(sp) + STORE x9, 9 * REGBYTES(sp) + STORE x10, 10 * REGBYTES(sp) + STORE x11, 11 * REGBYTES(sp) + STORE x12, 12 * REGBYTES(sp) + STORE x13, 13 * REGBYTES(sp) + STORE x14, 14 * REGBYTES(sp) + STORE x15, 15 * REGBYTES(sp) + STORE x16, 16 * REGBYTES(sp) + STORE x17, 17 * REGBYTES(sp) + STORE x18, 18 * REGBYTES(sp) + STORE x19, 19 * REGBYTES(sp) + STORE x20, 20 * REGBYTES(sp) + STORE x21, 21 * REGBYTES(sp) + STORE x22, 22 * REGBYTES(sp) + STORE x23, 23 * REGBYTES(sp) + STORE x24, 24 * REGBYTES(sp) + STORE x25, 25 * REGBYTES(sp) + STORE x26, 26 * REGBYTES(sp) + STORE x27, 27 * REGBYTES(sp) + STORE x28, 28 * REGBYTES(sp) + STORE x29, 29 * REGBYTES(sp) + STORE x30, 30 * REGBYTES(sp) + STORE x31, 31 * REGBYTES(sp) + + /* switch to interrupt stack */ + csrrw sp,mscratch,sp + /* interrupt handle */ + call rt_interrupt_enter + + + /* ӸжҪ,Ҫ,ջԲл */ + call rt_interrupt_leave + /* switch to from thread stack */ + csrrw sp,mscratch,sp + + /* need to switch new thread */ + la s0, rt_thread_switch_interrupt_flag + lw s2, 0(s0) + beqz s2, spurious_interrupt /* if rt_thread_switch_interrupt_flag ==0 Ҫл߳תspurious_interrupt˳ */ + /* clear switch interrupt flag */ + sw zero, 0(s0) /* if rt_thread_switch_interrupt_flag ==1,㣬л߳ */ + + csrr a0, mepc + STORE a0, 0 * REGBYTES(sp) /* 浱ǰ̵߳Ľжʱһpc̵ֵ߳Ķջ */ + + la s0, rt_interrupt_from_thread + LOAD s1, 0(s0) + STORE sp, 0(s1) /* 浱ǰ̵߳spram */ + + la s0, rt_interrupt_to_thread + LOAD s1, 0(s0) + LOAD sp, 0(s1) /* ȡҪл̵߳spָ */ + + LOAD a0, 0 * REGBYTES(sp) + csrw mepc, a0 + +spurious_interrupt: + LOAD x1, 1 * REGBYTES(sp) + + /* Remain in M-mode after mret */ + li t0, 0x00001800 + csrs mstatus, t0 + LOAD t0, 2 * REGBYTES(sp) + csrs mstatus, t0 + + LOAD x4, 4 * REGBYTES(sp) /* ָĴ */ + LOAD x5, 5 * REGBYTES(sp) + LOAD x6, 6 * REGBYTES(sp) + LOAD x7, 7 * REGBYTES(sp) + LOAD x8, 8 * REGBYTES(sp) + LOAD x9, 9 * REGBYTES(sp) + LOAD x10, 10 * REGBYTES(sp) + LOAD x11, 11 * REGBYTES(sp) + LOAD x12, 12 * REGBYTES(sp) + LOAD x13, 13 * REGBYTES(sp) + LOAD x14, 14 * REGBYTES(sp) + LOAD x15, 15 * REGBYTES(sp) + LOAD x16, 16 * REGBYTES(sp) + LOAD x17, 17 * REGBYTES(sp) + LOAD x18, 18 * REGBYTES(sp) + LOAD x19, 19 * REGBYTES(sp) + LOAD x20, 20 * REGBYTES(sp) + LOAD x21, 21 * REGBYTES(sp) + LOAD x22, 22 * REGBYTES(sp) + LOAD x23, 23 * REGBYTES(sp) + LOAD x24, 24 * REGBYTES(sp) + LOAD x25, 25 * REGBYTES(sp) + LOAD x26, 26 * REGBYTES(sp) + LOAD x27, 27 * REGBYTES(sp) + LOAD x28, 28 * REGBYTES(sp) + LOAD x29, 29 * REGBYTES(sp) + LOAD x30, 30 * REGBYTES(sp) + LOAD x31, 31 * REGBYTES(sp) + + addi sp, sp, 32 * REGBYTES /* ָspֵ */ + mret -- Gitee