diff --git a/0001-crash-add-loongarch-support.patch b/0001-crash-add-loongarch-support.patch index 3f17826c2869d1c7dc102917c65bf69c0b979669..7e47b3fb5cacfa7b1e271dad2f0c7630ce951852 100644 --- a/0001-crash-add-loongarch-support.patch +++ b/0001-crash-add-loongarch-support.patch @@ -1,61 +1,271 @@ -From 228fe82c7d0c253097a882efe0043afa3d83c806 Mon Sep 17 00:00:00 2001 +From 4806388e840a8f3de9e93afe0bf3fca7c15265b8 Mon Sep 17 00:00:00 2001 From: Ming Wang -Date: Mon, 10 Jul 2023 14:04:37 +0800 -Subject: [PATCH] crash: add loongarch support. +Date: Thu, 28 Dec 2023 19:46:25 +0800 +Subject: [PATCH] Add LoongArch64 framework code support +Mainly added some environment configurations, macro definitions, specific +architecture structures and some function declarations supported by the +LoongArch64 architecture. + +LoongArch64: Make the crash tool successfully enter the crash command line + +1. Add loongarch64_init() implementation, do all necessary machine-specific setup, +which will be called multiple times during initialization. + +2. Add the implementation of the vtop command, which is used to convert a +virtual address to a physical address. When entering the crash command line, +the corresponding symbols in the kernel will be read, and at the same time, +the conversion of virtual and real addresses will also be used, so the vtop +command is a prerequisite for entering the crash command line. + +3. Add loongarch64_get_smp_cpus() implementation, get the number of online cpus. + +4. Add loongarch64_get_page_size() implementation, get page size. + +5. Add to get processor speed. Obtain the processor speed from the kernel +symbol "cpu_clock_freq". + +6. Add loongarch64_verify_symbol() implementation, accept or reject a symbol from +the kernel namelist. + +With this patch, we can enter crash command line. Tested on Loongson-3C5000 platform. + +For help, type "help". +Type "apropos word" to search for commands related to "word"... + + KERNEL: /usr/lib/debug/lib/modules/5.10.0-60.103.0.130.oe2203.loongarch64/vmlinux + DUMPFILE: /proc/kcore + CPUS: 16 + DATE: Mon Aug 21 14:33:19 CST 2023 + UPTIME: 05:01:34 +LOAD AVERAGE: 0.43, 0.11, 0.17 + TASKS: 265 + NODENAME: localhost.localdomain + RELEASE: 5.10.0-60.103.0.130.oe2203.loongarch64 + VERSION: #1 SMP Fri Jul 21 12:48:08 UTC 2023 + MACHINE: loongarch64 (2200 Mhz) + MEMORY: 64 GB + PID: 114499 + COMMAND: "crash" + TASK: 900000009676ff00 [THREAD_INFO: 90000000981a8000] + CPU: 12 + STATE: TASK_RUNNING (ACTIVE) + +LoongArch64: Add 'pte' command support + +The pte command converts the pte table entry into a physical address and +displays the page flags. Also fixed the pte part in the vtop command. + +E.g. With this patch: +... +crash> vtop fffb8bf772 +VIRTUAL PHYSICAL +fffb8bf772 40000001231bf772 + +SEGMENT: xuvrange +PAGE DIRECTORY: 9000000096d10000 + PGD: 9000000096d10078 => 900000009665c000 + PMD: 000000009665ffe8 => 9000000098894000 + PTE: 0000000098897178 => 40000001231bc39f + PAGE: 40000001231bc000 + + PTE PHYSICAL FLAGS +40000001231bc39f 40000001231bc000 (VALID|DIRTY|PLV|PRESENT|WRITE|PROTNONE|NO_EXEC) + + VMA START END FLAGS FILE +90000000a4927660 fffb89c000 fffb8c0000 100173 + +LoongArch64: Add 'mach' command support + +The 'mach' command can only get some basic machine state information, such +as machine type, processor speed, etc. + +E.g. With this patch: +crash> mach + MACHINE TYPE: loongarch64 + MEMORY SIZE: 64 GB + CPUS: 16 + PROCESSOR SPEED: 2200 Mhz + HZ: 250 + PAGE SIZE: 16384 + KERNEL STACK SIZE: 16384 + +LoongArch64: Add 'bt' command support + +- Add basic support for the 'bt' command. +- LooongArch64: Add 'bt -f' command support +- LoongArch64: Add 'bt -l' command support + +E.g. With this patch: +crash> bt +PID: 1832 TASK: 900000009a552100 CPU: 11 COMMAND: "bash" + #0 [900000009beffb60] __cpu_possible_mask at 90000000014168f0 + #1 [900000009beffb60] __crash_kexec at 90000000002e7660 + #2 [900000009beffcd0] panic at 9000000000f0ec28 + #3 [900000009beffd60] sysrq_handle_crash at 9000000000a2c188 + #4 [900000009beffd70] __handle_sysrq at 9000000000a2c85c + #5 [900000009beffdc0] write_sysrq_trigger at 9000000000a2ce10 + #6 [900000009beffde0] proc_reg_write at 90000000004ce454 + #7 [900000009beffe00] vfs_write at 900000000043e838 + #8 [900000009beffe40] ksys_write at 900000000043eb58 + #9 [900000009beffe80] do_syscall at 9000000000f2da54 + #10 [900000009beffea0] handle_syscall at 9000000000221440 +crash> +... + +LoongArch64: Add 'help -m/M' command support + +Add loongarch64_dump_machdep_table() implementation, +display machdep_table. + +E.g. With this patch: +crash> help -m + flags: 1 (KSYMS_START) + kvbase: 8000000000000000 + identity_map_base: 8000000000000000 + pagesize: 16384 + pageshift: 14 + pagemask: ffffffffffffc000 + pageoffset: 3fff + pgdir_shift: 36 + ptrs_per_pgd: 2048 + ptrs_per_pte: 2048 + stacksize: 16384 + hz: 250 + memsize: 68689920000 (0xffe3d0000) + bits: 64 + back_trace: loongarch64_back_trace_cmd() + processor_speed: loongarch64_processor_speed() +... + +LoongArch64: Add 'help -r' command support + +Add support form printing out the registers from the dump file. We don't +take the registers directly from the ELF notes but instead use the version +we've saved into the machine_specific structure. If we don't do this, +we'd get misleading output when the number of ELF notes don't match the +number of online CPUs. + +E.g. Without this patch: +crash> help -r +CPU 0: + R0: 0000000000000000 R1: 900000000026cd2c R2: 90000000013e8000 + R3: 90000000013ebdf0 R4: 9000000005923878 R5: 0000000000000000 + R6: 0000000000000001 R7: 7fffffffffffffff R8: 0000000000000003 + R9: 9000000094f644a8 R10: ffffffffa9059289 R11: 0000000001167617 + R12: 0000000000000000 R13: 0000000000000002 R14: 0000000000168d9a + R15: 90000000017fd358 R16: 90000000013fe000 R17: 000001383a11ae73 + R18: fffffffffffffff7 R19: 0000000000000000 R20: 0000000000000954 + R21: 90000000002c65cc R22: 0000000000000000 R23: 90000000014168d0 + R24: 0000000000000000 R25: 0000000000000004 R26: 90000000014169a8 + R27: 0000000000000004 R28: 900000000150f596 R29: 9000000001257f18 + R30: 0000000000000000 R31: 0000000000000000 + CSR epc : 9000000005923878 CSR badv: 9000000000221620 + CSR crmd: 000000b0 CSR prmd: 90000000014169a8 + CSR ecfg: 00000000 CSR estat: 90000000014168d0 + CSR eneu: 00000004 +... + +Co-developed-by: Youling Tang +Signed-off-by: Youling Tang +Signed-off-by: Ming Wang + +LoongArch64: Add 'irq' command support + +Added support for the 'irq' series of commands in the LoongArch64 +architecture, except for the 'irq -d' command, others can be used. + +The result of using the 'irq' command without this patch is as follows: +crash> irq + IRQ IRQ_DESC/_DATA IRQACTION NAME + ... + 16 9000000090423c00 9000000000f4c500 + 17 9000000090423e00 9000000000f4c500 + 18 9000000090495c00 9000000000f4c500 + 19 9000000090494a00 9000000000f4c500 + 20 9000000090496400 9000000090418480 "IPI" + 21 9000000090496200 9000000090418500 "timer" + 22 9000000090cb2600 9000000090d9c780 "acpi" + 23 9000000090cb3c00 (unused) + 24 9000000090cb1800 (unused) + 25 9000000090cb0800 900000009117f580 "loongson_i2c" + 900000009117ee80 "loongson_i2c" + 900000009117cc00 "loongson_i2c" + 900000009117e800 "loongson_i2c" + 900000009117c780 "loongson_i2c" + 900000009117df00 "loongson_i2c" +... + +Co-developed-by: Youling Tang +Signed-off-by: Youling Tang +Signed-off-by: Ming Wang + +LoongArch64: Add "--kaslr" command line option support + +Apply initial changes to support kernel address space layout +randomization (KASLR) for loongarch64. This is the minimal patch +required to process loongarch64 dumps for the kernels configured +with CONFIG_RANDOMIZE_BASE(CONFIG_RELOCATABLE), and to accept the +"--kaslr" command line option. Only dumpfiles whose headers contain +kernel VMCOREINFO data are supported. + +Example: +crash vmcore vmlinux --kaslr auto + +Co-developed-by: Youling Tang +Signed-off-by: Youling Tang +Signed-off-by: Ming Wang + +LoongArch64: Add LoongArch64 architecture support information + +Add LoongArch64 architecture support information to the README and +help.c files. + +Co-developed-by: Youling Tang +Signed-off-by: Youling Tang Signed-off-by: Ming Wang --- - Makefile | 9 +- - README | 4 +- - configure.c | 27 +- - crash.8 | 2 +- - defs.h | 160 +- - diskdump.c | 26 +- - gdb-10.2-loongarch.patch | 15206 +++++++++++++++++++++++++++++++++++++ - help.c | 9 +- - lkcd_vmdump_v1.h | 2 + - lkcd_vmdump_v2_v3.h | 4 +- - loongarch64.c | 1347 ++++ - main.c | 3 +- - netdump.c | 28 +- - ramdump.c | 2 + - symbols.c | 31 +- - 15 files changed, 16840 insertions(+), 20 deletions(-) - create mode 100644 gdb-10.2-loongarch.patch + Makefile | 7 +- + README | 6 +- + configure.c | 43 +- + crash.8 | 2 +- + defs.h | 164 +- + diskdump.c | 24 +- + gdb-10.2.patch | 12855 +++++++++++++++++++++++++++++++++++++++++- + help.c | 15 +- + lkcd_vmdump_v1.h | 2 +- + lkcd_vmdump_v2_v3.h | 5 +- + loongarch64.c | 1368 +++++ + main.c | 3 +- + netdump.c | 27 +- + ramdump.c | 2 + + symbols.c | 33 +- + 15 files changed, 14530 insertions(+), 26 deletions(-) create mode 100644 loongarch64.c diff --git a/Makefile b/Makefile -index 79aef17..d26d2e2 100644 +index a94a243..9e97313 100644 --- a/Makefile +++ b/Makefile -@@ -64,7 +64,7 @@ CFILES=main.c tools.c global_data.c memory.c filesys.c help.c task.c \ +@@ -65,7 +65,7 @@ CFILES=main.c tools.c global_data.c memory.c filesys.c help.c task.c \ kernel.c test.c gdb_interface.c configure.c net.c dev.c bpf.c \ printk.c \ alpha.c x86.c ppc.c ia64.c s390.c s390x.c s390dbf.c ppc64.c x86_64.c \ -- arm.c arm64.c mips.c mips64.c sparc64.c \ -+ arm.c arm64.c mips.c mips64.c sparc64.c loongarch64.c\ +- arm.c arm64.c mips.c mips64.c riscv64.c sparc64.c \ ++ arm.c arm64.c mips.c mips64.c riscv64.c loongarch64.c sparc64.c \ extensions.c remote.c va_server.c va_server_v1.c symbols.c cmdline.c \ lkcd_common.c lkcd_v1.c lkcd_v2_v3.c lkcd_v5.c lkcd_v7.c lkcd_v8.c\ lkcd_fix_mem.c s390_dump.c lkcd_x86_trace.c \ -@@ -84,7 +84,7 @@ OBJECT_FILES=main.o tools.o global_data.o memory.o filesys.o help.o task.o \ +@@ -85,7 +85,7 @@ OBJECT_FILES=main.o tools.o global_data.o memory.o filesys.o help.o task.o \ build_data.o kernel.o test.o gdb_interface.o net.o dev.o bpf.o \ printk.o \ alpha.o x86.o ppc.o ia64.o s390.o s390x.o s390dbf.o ppc64.o x86_64.o \ -- arm.o arm64.o mips.o mips64.o sparc64.o \ -+ arm.o arm64.o mips.o mips64.o sparc64.o loongarch64.o\ +- arm.o arm64.o mips.o mips64.o riscv64.o sparc64.o \ ++ arm.o arm64.o mips.o mips64.o riscv64.o loongarch64.o sparc64.o \ extensions.o remote.o va_server.o va_server_v1.o symbols.o cmdline.o \ lkcd_common.o lkcd_v1.o lkcd_v2_v3.o lkcd_v5.o lkcd_v7.o lkcd_v8.o \ lkcd_fix_mem.o s390_dump.o netdump.o diskdump.o makedumpfile.o xendump.o \ -@@ -292,6 +292,8 @@ gdb_unzip: - gdb_patch: - if [ -f ${GDB}.patch ] && [ -s ${GDB}.patch ]; then \ - patch -p0 < ${GDB}.patch; cp ${GDB}.patch ${GDB}; fi -+ if [ -f ${GDB}-loongarch.patch ] && [ -s ${GDB}-loongarch.patch ]; then \ -+ patch -p0 < ${GDB}-loongarch.patch; cp ${GDB}-loongarch.patch ${GDB}; fi - - library: ${OBJECT_FILES} - ar -rs ${PROGRAM}lib.a ${OBJECT_FILES} -@@ -441,6 +443,9 @@ mips64.o: ${GENERIC_HFILES} ${REDHAT_HFILES} mips64.c +@@ -445,6 +445,9 @@ riscv64.o: ${GENERIC_HFILES} ${REDHAT_HFILES} riscv64.c sparc64.o: ${GENERIC_HFILES} ${REDHAT_HFILES} sparc64.c ${CC} -c ${CRASH_CFLAGS} sparc64.c ${WARNING_OPTIONS} ${WARNING_ERROR} @@ -66,59 +276,77 @@ index 79aef17..d26d2e2 100644 ${CC} -c ${CRASH_CFLAGS} s390.c ${WARNING_OPTIONS} ${WARNING_ERROR} diff --git a/README b/README -index 1f98fbf..de3bdf9 100644 +index 6ecdd10..80cc7b1 100644 --- a/README +++ b/README @@ -37,8 +37,8 @@ These are the current prerequisites: o At this point, x86, ia64, x86_64, ppc64, ppc, arm, arm64, alpha, mips, -- mips64, s390 and s390x-based kernels are supported. Other architectures -- may be addressed in the future. -+ mips64, loongarch64, s390 and s390x-based kernels are supported. Other -+ architectures may be addressed in the future. +- mips64, riscv64, s390 and s390x-based kernels are supported. Other +- architectures may be addressed in the future. ++ mips64, loongarch64, riscv64, s390 and s390x-based kernels are supported. ++ Other architectures may be addressed in the future. o One size fits all -- the utility can be run on any Linux kernel version version dating back to 2.2.5-15. A primary design goal is to always +@@ -100,6 +100,8 @@ + ppc64le dumpfiles may be built by typing "make target=PPC64". + o On an x86_64 host, an x86_64 binary that can be used to analyze + riscv64 dumpfiles may be built by typing "make target=RISCV64". ++ o On an x86_64 host, an x86_64 binary that can be used to analyze ++ loongarch64 dumpfiles may be built by typing "make target=LOONGARCH64". + + Traditionally when vmcores are compressed via the makedumpfile(8) facility + the libz compression library is used, and by default the crash utility diff --git a/configure.c b/configure.c -index 5188851..9d038f5 100644 +index 08b52be..4668c9a 100644 --- a/configure.c +++ b/configure.c -@@ -107,6 +107,7 @@ void add_extra_lib(char *); - #undef MIPS +@@ -108,6 +108,7 @@ void add_extra_lib(char *); #undef SPARC64 #undef MIPS64 + #undef RISCV64 +#undef LOONGARCH64 #define UNKNOWN 0 #define X86 1 -@@ -122,6 +123,7 @@ void add_extra_lib(char *); - #define MIPS 11 +@@ -124,6 +125,7 @@ void add_extra_lib(char *); #define SPARC64 12 #define MIPS64 13 -+#define LOONGARCH64 14 + #define RISCV64 14 ++#define LOONGARCH64 15 #define TARGET_X86 "TARGET=X86" #define TARGET_ALPHA "TARGET=ALPHA" -@@ -136,6 +138,7 @@ void add_extra_lib(char *); - #define TARGET_MIPS "TARGET=MIPS" +@@ -139,6 +141,7 @@ void add_extra_lib(char *); #define TARGET_MIPS64 "TARGET=MIPS64" #define TARGET_SPARC64 "TARGET=SPARC64" + #define TARGET_RISCV64 "TARGET=RISCV64" +#define TARGET_LOONGARCH64 "TARGET=LOONGARCH64" #define TARGET_CFLAGS_X86 "TARGET_CFLAGS=-D_FILE_OFFSET_BITS=64" #define TARGET_CFLAGS_ALPHA "TARGET_CFLAGS=" -@@ -158,6 +161,7 @@ void add_extra_lib(char *); - #define TARGET_CFLAGS_MIPS_ON_X86_64 "TARGET_CFLAGS=-m32 -D_FILE_OFFSET_BITS=64" - #define TARGET_CFLAGS_MIPS64 "TARGET_CFLAGS=" +@@ -163,6 +166,8 @@ void add_extra_lib(char *); #define TARGET_CFLAGS_SPARC64 "TARGET_CFLAGS=" + #define TARGET_CFLAGS_RISCV64 "TARGET_CFLAGS=" + #define TARGET_CFLAGS_RISCV64_ON_X86_64 "TARGET_CFLAGS=" +#define TARGET_CFLAGS_LOONGARCH64 "TARGET_CFLAGS=" ++#define TARGET_CFLAGS_LOONGARCH64_ON_X86_64 "TARGET_CFLAGS=" #define GDB_TARGET_DEFAULT "GDB_CONF_FLAGS=" #define GDB_TARGET_ARM_ON_X86 "GDB_CONF_FLAGS=--target=arm-elf-linux" -@@ -404,6 +408,9 @@ get_current_configuration(struct supported_gdb_version *sp) - #ifdef __sparc_v9__ - target_data.target = SPARC64; +@@ -174,6 +179,7 @@ void add_extra_lib(char *); + #define GDB_TARGET_MIPS_ON_X86 "GDB_CONF_FLAGS=--target=mipsel-elf-linux" + #define GDB_TARGET_MIPS_ON_X86_64 "GDB_CONF_FLAGS=--target=mipsel-elf-linux CFLAGS=-m32 CXXFLAGS=-m32" + #define GDB_TARGET_RISCV64_ON_X86_64 "GDB_CONF_FLAGS=--target=riscv64-unknown-linux-gnu" ++#define GDB_TARGET_LOONGARCH64_ON_X86_64 "GDB_CONF_FLAGS=--target=loongarch64-unknown-linux-gnu" + + /* + * The original plan was to allow the use of a particular version +@@ -413,6 +419,9 @@ get_current_configuration(struct supported_gdb_version *sp) + #if defined(__riscv) && (__riscv_xlen == 64) + target_data.target = RISCV64; #endif +#ifdef __loongarch64 + target_data.target = LOONGARCH64; @@ -126,20 +354,37 @@ index 5188851..9d038f5 100644 set_initial_target(sp); -@@ -497,6 +504,10 @@ get_current_configuration(struct supported_gdb_version *sp) +@@ -472,6 +481,12 @@ get_current_configuration(struct supported_gdb_version *sp) + * Build an RISCV64 crash binary on an X86_64 host. + */ + target_data.target = RISCV64; ++ } else if ((target_data.target == X86_64) && ++ (name_to_target((char *)target_data.target_as_param) == LOONGARCH64)) { ++ /* ++ * Build an LOONGARCH64 crash binary on an X86_64 host. ++ */ ++ target_data.target = LOONGARCH64; + } else { + fprintf(stderr, + "\ntarget=%s is not supported on the %s host architecture\n\n", +@@ -512,6 +527,14 @@ get_current_configuration(struct supported_gdb_version *sp) (target_data.target != MIPS64)) arch_mismatch(sp); + if ((target_data.initial_gdb_target == LOONGARCH64) && -+ (target_data.target != LOONGARCH64)) -+ arch_mismatch(sp); ++ (target_data.target != LOONGARCH64)) { ++ if (target_data.target == X86_64) ++ target_data.target = LOONGARCH64; ++ else ++ arch_mismatch(sp); ++ } + - if ((target_data.initial_gdb_target == X86) && - (target_data.target != X86)) { - if (target_data.target == X86_64) -@@ -660,6 +671,9 @@ show_configuration(void) - case SPARC64: - printf("TARGET: SPARC64\n"); + if ((target_data.initial_gdb_target == RISCV64) && + (target_data.target != RISCV64)) { + if (target_data.target == X86_64) +@@ -686,6 +709,9 @@ show_configuration(void) + case RISCV64: + printf("TARGET: RISCV64\n"); break; + case LOONGARCH64: + printf("TARGET: LOONGARCH64\n"); @@ -147,47 +392,51 @@ index 5188851..9d038f5 100644 } if (strlen(target_data.program)) { -@@ -777,6 +791,10 @@ build_configure(struct supported_gdb_version *sp) - target = TARGET_SPARC64; - target_CFLAGS = TARGET_CFLAGS_SPARC64; +@@ -811,6 +837,14 @@ build_configure(struct supported_gdb_version *sp) + } else + target_CFLAGS = TARGET_CFLAGS_RISCV64; break; + case LOONGARCH64: + target = TARGET_LOONGARCH64; -+ target_CFLAGS = TARGET_CFLAGS_LOONGARCH64; ++ if (target_data.host == X86_64) { ++ target_CFLAGS = TARGET_CFLAGS_LOONGARCH64_ON_X86_64; ++ gdb_conf_flags = GDB_TARGET_LOONGARCH64_ON_X86_64; ++ } else ++ target_CFLAGS = TARGET_CFLAGS_LOONGARCH64; + break; } ldflags = get_extra_flags("LDFLAGS.extra", NULL); -@@ -1374,7 +1392,7 @@ make_spec_file(struct supported_gdb_version *sp) +@@ -1408,7 +1442,7 @@ make_spec_file(struct supported_gdb_version *sp) printf("Vendor: Red Hat, Inc.\n"); printf("Packager: Dave Anderson \n"); printf("ExclusiveOS: Linux\n"); -- printf("ExclusiveArch: %%{ix86} alpha ia64 ppc ppc64 ppc64pseries ppc64iseries x86_64 s390 s390x arm aarch64 ppc64le mips mipsel mips64el sparc64\n"); -+ printf("ExclusiveArch: %%{ix86} alpha ia64 ppc ppc64 ppc64pseries ppc64iseries x86_64 s390 s390x arm aarch64 ppc64le mips mipsel mips64el sparc64 loongarch64\n"); +- printf("ExclusiveArch: %%{ix86} alpha ia64 ppc ppc64 ppc64pseries ppc64iseries x86_64 s390 s390x arm aarch64 ppc64le mips mipsel mips64el sparc64 riscv64\n"); ++ printf("ExclusiveArch: %%{ix86} alpha ia64 ppc ppc64 ppc64pseries ppc64iseries x86_64 s390 s390x arm aarch64 ppc64le mips mipsel mips64el sparc64 riscv64 loongarch64\n"); printf("Buildroot: %%{_tmppath}/%%{name}-root\n"); printf("BuildRequires: ncurses-devel zlib-devel bison\n"); printf("Requires: binutils\n"); -@@ -1613,6 +1631,8 @@ set_initial_target(struct supported_gdb_version *sp) - target_data.initial_gdb_target = MIPS; - else if (strncmp(buf, "SPARC64", strlen("SPARC64")) == 0) +@@ -1649,6 +1683,8 @@ set_initial_target(struct supported_gdb_version *sp) target_data.initial_gdb_target = SPARC64; + else if (strncmp(buf, "RISCV64", strlen("RISCV64")) == 0) + target_data.initial_gdb_target = RISCV64; + else if (strncmp(buf, "LOONGARCH64", strlen("LOONGARCH64")) == 0) + target_data.initial_gdb_target = LOONGARCH64; } char * -@@ -1633,6 +1653,7 @@ target_to_name(int target) - case MIPS: return("MIPS"); +@@ -1670,6 +1706,7 @@ target_to_name(int target) case MIPS64: return("MIPS64"); case SPARC64: return("SPARC64"); + case RISCV64: return("RISCV64"); + case LOONGARCH64: return("LOONGARCH64"); } return "UNKNOWN"; -@@ -1697,6 +1718,10 @@ name_to_target(char *name) - return MIPS64; - else if (strncmp(name, "sparc64", strlen("sparc64")) == 0) - return SPARC64; +@@ -1738,6 +1775,10 @@ name_to_target(char *name) + return RISCV64; + else if (strncmp(name, "riscv64", strlen("riscv64")) == 0) + return RISCV64; + else if (strncmp(name, "loongarch64", strlen("loongarch64")) == 0) + return LOONGARCH64; + else if (strncmp(name, "LOONGARCH64", strlen("LOONGARCH64")) == 0) @@ -209,21 +458,21 @@ index e553a0b..0662f92 100644 the offset value is equal to the difference between the symbol values compiled into the vmlinux file and their relocated KASLR values. If set to diff --git a/defs.h b/defs.h -index afdcf6c..dc8f2e0 100644 +index 788f63a..3c17b4c 100644 --- a/defs.h +++ b/defs.h @@ -76,7 +76,7 @@ #if !defined(X86) && !defined(X86_64) && !defined(ALPHA) && !defined(PPC) && \ !defined(IA64) && !defined(PPC64) && !defined(S390) && !defined(S390X) && \ !defined(ARM) && !defined(ARM64) && !defined(MIPS) && !defined(MIPS64) && \ -- !defined(SPARC64) -+ !defined(SPARC64) && !defined(LOONGARCH64) +- !defined(RISCV64) && !defined(SPARC64) ++ !defined(RISCV64) && !defined(LOONGARCH64) && !defined(SPARC64) #ifdef __alpha__ #define ALPHA #endif -@@ -118,6 +118,9 @@ - #ifdef __sparc_v9__ - #define SPARC64 +@@ -121,6 +121,9 @@ + #if defined(__riscv) && (__riscv_xlen == 64) + #define RISCV64 #endif +#ifdef __loongarch64 +#define LOONGARCH64 @@ -231,9 +480,9 @@ index afdcf6c..dc8f2e0 100644 #endif #ifdef X86 -@@ -159,6 +162,9 @@ - #ifdef SPARC64 - #define NR_CPUS (4096) +@@ -165,6 +168,9 @@ + #ifdef RISCV64 + #define NR_CPUS (256) #endif +#ifdef LOONGARCH64 +#define NR_CPUS (256) @@ -241,19 +490,24 @@ index afdcf6c..dc8f2e0 100644 #define NR_DEVICE_DUMPS (64) -@@ -2005,6 +2011,8 @@ struct offset_table { /* stash of commonly-used offsets */ - long atomic_t_counter; - long percpu_counter_count; - long mm_struct_mm_count; +@@ -2227,6 +2233,8 @@ struct offset_table { /* stash of commonly-used offsets */ + long module_memory_size; + long irq_data_irq; + long zspage_huge; + long task_struct_thread_reg01; + long task_struct_thread_reg03; - long task_struct_thread_reg29; - long task_struct_thread_reg31; - long pt_regs_regs; -@@ -3484,6 +3492,43 @@ struct arm64_stackframe { - #define _MAX_PHYSMEM_BITS 48 - #endif /* MIPS64 */ + }; + + struct size_table { /* stash of commonly-used sizes */ +@@ -3715,6 +3723,48 @@ typedef signed int s32; + + #endif /* RISCV64 */ ++/* fix compilation errors due to elf.h version. */ ++#ifndef EM_LOONGARCH ++#define EM_LOONGARCH 258 ++#endif ++ +#ifdef LOONGARCH64 +#define _64BIT_ +#define MACHINE_TYPE "LOONGARCH64" @@ -294,9 +548,9 @@ index afdcf6c..dc8f2e0 100644 #ifdef X86 #define _32BIT_ #define MACHINE_TYPE "X86" -@@ -4532,6 +4577,10 @@ struct machine_specific { +@@ -4767,6 +4817,10 @@ struct machine_specific { #define MAX_HEXADDR_STRLEN (16) - #define UVADDR_PRLEN (16) + #define UVADDR_PRLEN (16) #endif +#ifdef LOONGARCH64 +#define MAX_HEXADDR_STRLEN (16) @@ -305,7 +559,7 @@ index afdcf6c..dc8f2e0 100644 #define BADADDR ((ulong)(-1)) #define BADVAL ((ulong)(-1)) -@@ -5130,6 +5179,9 @@ void dump_build_data(void); +@@ -5388,6 +5442,9 @@ void dump_build_data(void); #ifdef SPARC64 #define machdep_init(X) sparc64_init(X) #endif @@ -315,17 +569,18 @@ index afdcf6c..dc8f2e0 100644 int clean_exit(int); int untrusted_file(FILE *, char *); char *readmem_function_name(void); -@@ -5607,6 +5659,9 @@ void display_help_screen(char *); - #ifdef SPARC64 - #define dump_machdep_table(X) sparc64_dump_machdep_table(X) +@@ -5879,6 +5936,10 @@ void display_help_screen(char *); + #ifdef RISCV64 + #define dump_machdep_table(X) riscv64_dump_machdep_table(X) #endif +#ifdef LOONGARCH64 +#define dump_machdep_table(X) loongarch64_dump_machdep_table(X) +#endif ++ extern char *help_pointer[]; extern char *help_alias[]; extern char *help_ascii[]; -@@ -6695,6 +6750,109 @@ int sparc64_vmalloc_addr(ulong); +@@ -7083,6 +7144,107 @@ int sparc64_vmalloc_addr(ulong); error(FATAL, "The -d option is not applicable to sparc64.\n") #endif @@ -333,7 +588,6 @@ index afdcf6c..dc8f2e0 100644 + * loongarch64.c + */ +void loongarch64_display_regs_from_elf_notes(int, FILE *); -+ +#ifdef LOONGARCH64 +void loongarch64_init(int); +void loongarch64_dump_machdep_table(ulong); @@ -341,27 +595,6 @@ index afdcf6c..dc8f2e0 100644 +#define display_idt_table() \ + error(FATAL, "-d option is not applicable to LOONGARCH64 architecture\n") + -+/* from arch/loongarch/include/asm/ptrace.h */ -+struct loongarch64_pt_regs { -+ /* Saved main processor registers. */ -+ unsigned long regs[32]; -+ -+ /* Saved special registers. */ -+ unsigned long csr_crmd; -+ unsigned long csr_prmd; -+ unsigned long csr_euen; -+ unsigned long csr_ecfg; -+ unsigned long csr_estat; -+ unsigned long csr_epc; -+ unsigned long csr_badvaddr; -+ unsigned long orig_a0; -+}; -+ -+struct loongarch64_unwind_frame { -+ unsigned long sp; -+ unsigned long pc; -+ unsigned long ra; -+}; + +#define KSYMS_START (0x1) + @@ -394,71 +627,91 @@ index afdcf6c..dc8f2e0 100644 +/* from arch/loongarch/include/asm/pgtable-bits.h */ + +/* Page table bits */ -+#define _PAGE_VALID_SHIFT 0 -+#define _PAGE_DIRTY_SHIFT 1 -+#define _PAGE_PLV_SHIFT 2 /* 2~3, two bits */ -+#define _CACHE_SHIFT 4 /* 4~5, two bits */ -+#define _PAGE_GLOBAL_SHIFT 6 -+#define _PAGE_HUGE_SHIFT 6 /* HUGE is a PMD bit */ -+#define _PAGE_PRESENT_SHIFT 7 -+#define _PAGE_WRITE_SHIFT 8 -+#define _PAGE_PROTNONE_SHIFT 9 -+#define _PAGE_SPECIAL_SHIFT 10 -+#define _PAGE_HGLOBAL_SHIFT 12 /* HGlobal is a PMD bit */ -+#define _PAGE_PFN_SHIFT 12 -+#define _PAGE_PFN_END_SHIFT 48 -+#define _PAGE_NO_READ_SHIFT 61 -+#define _PAGE_NO_EXEC_SHIFT 62 -+#define _PAGE_RPLV_SHIFT 63 ++#define _PAGE_VALID_SHIFT 0 ++#define _PAGE_ACCESSED_SHIFT 0 /* Reuse Valid for Accessed */ ++#define _PAGE_DIRTY_SHIFT 1 ++#define _PAGE_PLV_SHIFT 2 /* 2~3, two bits */ ++#define _CACHE_SHIFT 4 /* 4~5, two bits */ ++#define _PAGE_GLOBAL_SHIFT 6 ++#define _PAGE_HUGE_SHIFT 6 /* HUGE is a PMD bit */ ++#define _PAGE_PRESENT_SHIFT 7 ++#define _PAGE_WRITE_SHIFT 8 ++#define _PAGE_MODIFIED_SHIFT 9 ++#define _PAGE_PROTNONE_SHIFT 10 ++#define _PAGE_SPECIAL_SHIFT 11 ++#define _PAGE_HGLOBAL_SHIFT 12 /* HGlobal is a PMD bit */ ++#define _PAGE_PFN_SHIFT 12 ++#define _PAGE_SWP_EXCLUSIVE_SHIFT 23 ++#define _PAGE_PFN_END_SHIFT 48 ++#define _PAGE_PRESENT_INVALID_SHIFT 60 ++#define _PAGE_NO_READ_SHIFT 61 ++#define _PAGE_NO_EXEC_SHIFT 62 ++#define _PAGE_RPLV_SHIFT 63 ++ ++#ifndef _ULCAST_ ++#define _ULCAST_ (unsigned long) ++#endif ++ ++/* Used by software */ ++#define _PAGE_PRESENT (_ULCAST_(1) << _PAGE_PRESENT_SHIFT) ++#define _PAGE_PRESENT_INVALID (_ULCAST_(1) << _PAGE_PRESENT_INVALID_SHIFT) ++#define _PAGE_WRITE (_ULCAST_(1) << _PAGE_WRITE_SHIFT) ++#define _PAGE_ACCESSED (_ULCAST_(1) << _PAGE_ACCESSED_SHIFT) ++#define _PAGE_MODIFIED (_ULCAST_(1) << _PAGE_MODIFIED_SHIFT) ++#define _PAGE_PROTNONE (_ULCAST_(1) << _PAGE_PROTNONE_SHIFT) ++#define _PAGE_SPECIAL (_ULCAST_(1) << _PAGE_SPECIAL_SHIFT) + -+/* Used only by software */ -+#define _PAGE_PRESENT (1UL << _PAGE_PRESENT_SHIFT) -+#define _PAGE_WRITE (1UL << _PAGE_WRITE_SHIFT) -+#define _PAGE_PROTNONE (1UL << _PAGE_PROTNONE_SHIFT) -+#define _PAGE_SPECIAL (1UL << _PAGE_SPECIAL_SHIFT) ++/* We borrow bit 23 to store the exclusive marker in swap PTEs. */ ++#define _PAGE_SWP_EXCLUSIVE (_ULCAST_(1) << _PAGE_SWP_EXCLUSIVE_SHIFT) + +/* Used by TLB hardware (placed in EntryLo*) */ -+#define _PAGE_VALID (1UL << _PAGE_VALID_SHIFT) -+#define _PAGE_DIRTY (1UL << _PAGE_DIRTY_SHIFT) -+#define _PAGE_PLV (3UL << _PAGE_PLV_SHIFT) -+#define _PAGE_GLOBAL (1UL << _PAGE_GLOBAL_SHIFT) -+#define _PAGE_HUGE (1UL << _PAGE_HUGE_SHIFT) -+#define _PAGE_HGLOBAL (1UL << _PAGE_HGLOBAL_SHIFT) -+#define _PAGE_NO_READ (1UL << _PAGE_NO_READ_SHIFT) -+#define _PAGE_NO_EXEC (1UL << _PAGE_NO_EXEC_SHIFT) -+#define _PAGE_RPLV (1UL << _PAGE_RPLV_SHIFT) -+#define _CACHE_MASK (3UL << _CACHE_SHIFT) ++#define _PAGE_VALID (_ULCAST_(1) << _PAGE_VALID_SHIFT) ++#define _PAGE_DIRTY (_ULCAST_(1) << _PAGE_DIRTY_SHIFT) ++#define _PAGE_PLV (_ULCAST_(3) << _PAGE_PLV_SHIFT) ++#define _PAGE_GLOBAL (_ULCAST_(1) << _PAGE_GLOBAL_SHIFT) ++#define _PAGE_HUGE (_ULCAST_(1) << _PAGE_HUGE_SHIFT) ++#define _PAGE_HGLOBAL (_ULCAST_(1) << _PAGE_HGLOBAL_SHIFT) ++#define _PAGE_NO_READ (_ULCAST_(1) << _PAGE_NO_READ_SHIFT) ++#define _PAGE_NO_EXEC (_ULCAST_(1) << _PAGE_NO_EXEC_SHIFT) ++#define _PAGE_RPLV (_ULCAST_(1) << _PAGE_RPLV_SHIFT) ++#define _CACHE_MASK (_ULCAST_(3) << _CACHE_SHIFT) +#define _PFN_SHIFT (PAGESHIFT() - 12 + _PAGE_PFN_SHIFT) + ++#define _PAGE_USER (PLV_USER << _PAGE_PLV_SHIFT) ++#define _PAGE_KERN (PLV_KERN << _PAGE_PLV_SHIFT) ++ ++#define _PFN_MASK (~((_ULCAST_(1) << (_PFN_SHIFT)) - 1) & \ ++ ((_ULCAST_(1) << (_PAGE_PFN_END_SHIFT)) - 1)) ++ +#endif /* LOONGARCH64 */ + /* * netdump.c */ diff --git a/diskdump.c b/diskdump.c -index 2c1f9be..b3fbe8f 100644 +index 0fe46f4..3ccc5c6 100644 --- a/diskdump.c +++ b/diskdump.c -@@ -622,6 +622,9 @@ restart: - else if (STRNEQ(header->utsname.machine, "aarch64") && - machine_type_mismatch(file, "ARM64", NULL, 0)) +@@ -683,6 +683,9 @@ restart: + else if (STRNEQ(header->utsname.machine, "riscv64") && + machine_type_mismatch(file, "RISCV64", NULL, 0)) goto err; + else if (STRNEQ(header->utsname.machine, "loongarch64") && -+ machine_type_mismatch(file, "LOONGARCH64", NULL, 0)) ++ machine_type_mismatch(file, "LOONGARCH64", NULL, 0)) + goto err; if (header->block_size != block_size) { block_size = header->block_size; -@@ -780,6 +783,8 @@ restart: - dd->machine_type = EM_AARCH64; - else if (machine_type("SPARC64")) +@@ -843,6 +846,8 @@ restart: dd->machine_type = EM_SPARCV9; + else if (machine_type("RISCV64")) + dd->machine_type = EM_RISCV; + else if (machine_type("LOONGARCH64")) + dd->machine_type = EM_LOONGARCH; else { error(INFO, "%s: unsupported machine type: %s\n", DISKDUMP_VALID() ? "diskdump" : "compressed kdump", -@@ -1526,6 +1531,12 @@ get_diskdump_regs_mips(struct bt_info *bt, ulong *eip, ulong *esp) +@@ -1603,6 +1608,12 @@ get_diskdump_regs_riscv64(struct bt_info *bt, ulong *eip, ulong *esp) machdep->get_stack_frame(bt, eip, esp); } @@ -471,8 +724,8 @@ index 2c1f9be..b3fbe8f 100644 static void get_diskdump_regs_sparc64(struct bt_info *bt, ulong *eip, ulong *esp) { -@@ -1605,6 +1616,10 @@ get_diskdump_regs(struct bt_info *bt, ulong *eip, ulong *esp) - get_diskdump_regs_sparc64(bt, eip, esp); +@@ -1686,6 +1697,10 @@ get_diskdump_regs(struct bt_info *bt, ulong *eip, ulong *esp) + get_diskdump_regs_riscv64(bt, eip, esp); break; + case EM_LOONGARCH: @@ -482,17 +735,16 @@ index 2c1f9be..b3fbe8f 100644 default: error(FATAL, "%s: unsupported machine type: %s\n", DISKDUMP_VALID() ? "diskdump" : "compressed kdump", -@@ -1751,7 +1766,8 @@ dump_note_offsets(FILE *fp) - qemu = FALSE; +@@ -1833,7 +1848,7 @@ dump_note_offsets(FILE *fp) if (machine_type("X86_64") || machine_type("S390X") || machine_type("ARM64") || machine_type("PPC64") || -- machine_type("SPARC64") || machine_type("MIPS64")) { -+ machine_type("SPARC64") || machine_type("MIPS64") || -+ machine_type("LOONGARCH64")) { + machine_type("SPARC64") || machine_type("MIPS64") || +- machine_type("RISCV64")) { ++ machine_type("RISCV64") || machine_type("LOONGARCH64")) { note64 = (void *)dd->notes_buf + tot; len = sizeof(Elf64_Nhdr); if (STRNEQ((char *)note64 + len, "QEMU")) -@@ -1862,6 +1878,8 @@ __diskdump_memory_dump(FILE *fp) +@@ -1944,6 +1959,8 @@ __diskdump_memory_dump(FILE *fp) fprintf(fp, "(EM_AARCH64)\n"); break; case EM_SPARCV9: fprintf(fp, "(EM_SPARCV9)\n"); break; @@ -501,7 +753,7 @@ index 2c1f9be..b3fbe8f 100644 default: fprintf(fp, "(unknown)\n"); break; } -@@ -2548,6 +2566,9 @@ diskdump_display_regs(int cpu, FILE *ofp) +@@ -2630,6 +2647,9 @@ diskdump_display_regs(int cpu, FILE *ofp) if (machine_type("MIPS64")) mips64_display_regs_from_elf_notes(cpu, ofp); @@ -511,203 +763,91 @@ index 2c1f9be..b3fbe8f 100644 } void -@@ -2558,7 +2579,8 @@ dump_registers_for_compressed_kdump(void) - if (!KDUMP_CMPRS_VALID() || (dd->header->header_version < 4) || +@@ -2641,7 +2661,7 @@ dump_registers_for_compressed_kdump(void) !(machine_type("X86") || machine_type("X86_64") || machine_type("ARM64") || machine_type("PPC64") || -- machine_type("MIPS") || machine_type("MIPS64"))) -+ machine_type("MIPS") || machine_type("MIPS64") || -+ machine_type("LOONGARCH64"))) + machine_type("MIPS") || machine_type("MIPS64") || +- machine_type("RISCV64"))) ++ machine_type("RISCV64") || machine_type("LOONGARCH64"))) error(FATAL, "-r option not supported for this dumpfile\n"); if (machine_type("ARM64") && (kt->cpus != dd->num_prstatus_notes)) -diff --git a/gdb-10.2-loongarch.patch b/gdb-10.2-loongarch.patch -new file mode 100644 -index 0000000..036833e ---- /dev/null -+++ b/gdb-10.2-loongarch.patch -@@ -0,0 +1,15206 @@ -+From d967326f6820d563d54cc0f0879c5e59afebe517 Mon Sep 17 00:00:00 2001 -+From: Ming Wang -+Date: Mon, 7 Aug 2023 20:48:21 +0800 -+Subject: [PATCH] add loongarch64 support -+ -+Signed-off-by: Ming Wang -+--- -+ bfd/Makefile.am | 17 +- -+ bfd/Makefile.in | 21 +- -+ bfd/archures.c | 5 + -+ bfd/bfd-in2.h | 85 + -+ bfd/config.bfd | 15 + -+ bfd/configure | 2 + -+ bfd/configure.ac | 2 + -+ bfd/cpu-loongarch.c | 61 + -+ bfd/elf-bfd.h | 9 + -+ bfd/elf.c | 114 +- -+ bfd/elfnn-loongarch.c | 4128 ++++++++++++++++++++++ -+ bfd/elfxx-loongarch.c | 1618 +++++++++ -+ bfd/elfxx-loongarch.h | 45 + -+ bfd/libbfd.h | 80 + -+ bfd/po/BLD-POTFILES.in | 2 + -+ bfd/po/SRC-POTFILES.in | 1 + -+ bfd/reloc.c | 171 + -+ bfd/targets.c | 8 + -+ config.guess | 3 + -+ config.sub | 1 + -+ gdb/Makefile.in | 13 + -+ gdb/arch/loongarch-linux-nat.c | 93 + -+ gdb/arch/loongarch-linux-nat.h | 35 + -+ gdb/arch/loongarch.c | 75 + -+ gdb/arch/loongarch.h | 35 + -+ gdb/configure.host | 3 + -+ gdb/configure.nat | 4 + -+ gdb/configure.tgt | 8 + -+ gdb/doc/gdb.texinfo | 10 + -+ gdb/features/Makefile | 10 + -+ gdb/features/loongarch/base32.c | 48 + -+ gdb/features/loongarch/base32.xml | 46 + -+ gdb/features/loongarch/base64.c | 48 + -+ gdb/features/loongarch/base64.xml | 46 + -+ gdb/features/loongarch/fpu32.c | 54 + -+ gdb/features/loongarch/fpu32.xml | 53 + -+ gdb/features/loongarch/fpu64.c | 62 + -+ gdb/features/loongarch/fpu64.xml | 58 + -+ gdb/features/loongarch/lasx.c | 80 + -+ gdb/features/loongarch/lasx.xml | 59 + -+ gdb/features/loongarch/lbt32.c | 19 + -+ gdb/features/loongarch/lbt32.xml | 17 + -+ gdb/features/loongarch/lbt64.c | 19 + -+ gdb/features/loongarch/lbt64.xml | 17 + -+ gdb/features/loongarch/lsx.c | 80 + -+ gdb/features/loongarch/lsx.xml | 59 + -+ gdb/loongarch-linux-nat.c | 878 +++++ -+ gdb/loongarch-linux-tdep.c | 709 ++++ -+ gdb/loongarch-linux-tdep.h | 48 + -+ gdb/loongarch-tdep.c | 1926 ++++++++++ -+ gdb/loongarch-tdep.h | 61 + -+ gdb/nat/loongarch-linux-watch.c | 330 ++ -+ gdb/nat/loongarch-linux-watch.h | 132 + -+ gdb/remote.c | 25 + -+ gdb/target.h | 3 + -+ gdb/testsuite/gdb.base/dump.exp | 4 + -+ gdb/testsuite/gdb.base/float.exp | 2 + -+ gdb/testsuite/gdb.trace/entry-values.exp | 2 + -+ gdb/testsuite/gdb.xml/tdesc-regs.exp | 5 + -+ gdbserver/Makefile.in | 2 + -+ gdbserver/configure.srv | 7 + -+ gdbserver/linux-loongarch-low.cc | 284 ++ -+ include/dis-asm.h | 1 + -+ include/elf/common.h | 14 + -+ include/elf/loongarch.h | 267 ++ -+ include/opcode/loongarch.h | 239 ++ -+ opcodes/Makefile.am | 3 + -+ opcodes/Makefile.in | 6 + -+ opcodes/configure | 1 + -+ opcodes/configure.ac | 1 + -+ opcodes/disassemble.c | 9 + -+ opcodes/disassemble.h | 1 + -+ opcodes/loongarch-coder.c | 481 +++ -+ opcodes/loongarch-dis.c | 342 ++ -+ opcodes/loongarch-opc.c | 870 +++++ -+ opcodes/po/POTFILES.in | 3 + -+ 76 files changed, 14091 insertions(+), 4 deletions(-) -+ create mode 100644 bfd/cpu-loongarch.c -+ create mode 100644 bfd/elfnn-loongarch.c -+ create mode 100644 bfd/elfxx-loongarch.c -+ create mode 100644 bfd/elfxx-loongarch.h -+ create mode 100644 gdb/arch/loongarch-linux-nat.c -+ create mode 100644 gdb/arch/loongarch-linux-nat.h -+ create mode 100644 gdb/arch/loongarch.c -+ create mode 100644 gdb/arch/loongarch.h -+ create mode 100644 gdb/features/loongarch/base32.c -+ create mode 100644 gdb/features/loongarch/base32.xml -+ create mode 100644 gdb/features/loongarch/base64.c -+ create mode 100644 gdb/features/loongarch/base64.xml -+ create mode 100644 gdb/features/loongarch/fpu32.c -+ create mode 100644 gdb/features/loongarch/fpu32.xml -+ create mode 100644 gdb/features/loongarch/fpu64.c -+ create mode 100644 gdb/features/loongarch/fpu64.xml -+ create mode 100644 gdb/features/loongarch/lasx.c -+ create mode 100644 gdb/features/loongarch/lasx.xml -+ create mode 100644 gdb/features/loongarch/lbt32.c -+ create mode 100644 gdb/features/loongarch/lbt32.xml -+ create mode 100644 gdb/features/loongarch/lbt64.c -+ create mode 100644 gdb/features/loongarch/lbt64.xml -+ create mode 100644 gdb/features/loongarch/lsx.c -+ create mode 100644 gdb/features/loongarch/lsx.xml -+ create mode 100644 gdb/loongarch-linux-nat.c -+ create mode 100644 gdb/loongarch-linux-tdep.c -+ create mode 100644 gdb/loongarch-linux-tdep.h -+ create mode 100644 gdb/loongarch-tdep.c -+ create mode 100644 gdb/loongarch-tdep.h -+ create mode 100644 gdb/nat/loongarch-linux-watch.c -+ create mode 100644 gdb/nat/loongarch-linux-watch.h -+ create mode 100644 gdbserver/linux-loongarch-low.cc -+ create mode 100644 include/elf/loongarch.h -+ create mode 100644 include/opcode/loongarch.h -+ create mode 100644 opcodes/loongarch-coder.c -+ create mode 100644 opcodes/loongarch-dis.c -+ create mode 100644 opcodes/loongarch-opc.c -+ -+diff --git gdb-10.2/bfd/Makefile.am gdb-10.2/bfd/Makefile.am -+index d07c960..d494ebf 100644 -+--- gdb-10.2/bfd/Makefile.am +diff --git a/gdb-10.2.patch b/gdb-10.2.patch +index d81030d..f6cdfde 100644 +--- a/gdb-10.2.patch ++++ b/gdb-10.2.patch +@@ -14,7 +14,9 @@ tar xvzmf gdb-10.2.tar.gz \ + gdb-10.2/gdb/symfile.c \ + gdb-10.2/gdb/Makefile.in \ + gdb-10.2/gdb/dwarf2/read.c \ +- gdb-10.2/gdb/ada-lang.c ++ gdb-10.2/gdb/ada-lang.c \ ++ gdb-10.2/gdb/objfiles.h \ ++ gdb-10.2/bfd/elf-bfd.h + + exit 0 + +@@ -3187,3 +3189,12854 @@ exit 0 + result = stringtab + symbol_entry->_n._n_n._n_offset; + } + else ++--- gdb-10.2/bfd/Makefile.am.orig ++++ gdb-10.2/bfd/Makefile.am +@@ -118,6 +118,7 @@ ALL_MACHINES = \ -+ cpu-ip2k.lo \ -+ cpu-iq2000.lo \ -+ cpu-lm32.lo \ ++ cpu-ip2k.lo \ ++ cpu-iq2000.lo \ ++ cpu-lm32.lo \ ++ cpu-loongarch.lo \ -+ cpu-m10200.lo \ -+ cpu-m10300.lo \ -+ cpu-m32c.lo \ ++ cpu-m10200.lo \ ++ cpu-m10300.lo \ ++ cpu-m32c.lo \ +@@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \ -+ cpu-ip2k.c \ -+ cpu-iq2000.c \ -+ cpu-lm32.c \ ++ cpu-ip2k.c \ ++ cpu-iq2000.c \ ++ cpu-lm32.c \ ++ cpu-loongarch.c \ -+ cpu-m10200.c \ -+ cpu-m10300.c \ -+ cpu-m32c.c \ ++ cpu-m10200.c \ ++ cpu-m10300.c \ ++ cpu-m32c.c \ +@@ -548,6 +550,9 @@ BFD64_BACKENDS = \ -+ elf64-ia64.lo \ -+ elf64-ia64-vms.lo \ -+ elfxx-ia64.lo \ ++ elf64-ia64.lo \ ++ elf64-ia64-vms.lo \ ++ elfxx-ia64.lo \ ++ elf32-loongarch.lo \ ++ elf64-loongarch.lo \ ++ elfxx-loongarch.lo \ -+ elfn32-mips.lo \ -+ elf64-mips.lo \ -+ elfxx-mips.lo \ ++ elfn32-mips.lo \ ++ elf64-mips.lo \ ++ elfxx-mips.lo \ +@@ -601,6 +606,7 @@ BFD64_BACKENDS_CFILES = \ -+ elfn32-mips.c \ -+ elfxx-aarch64.c \ -+ elfxx-ia64.c \ ++ elfn32-mips.c \ ++ elfxx-aarch64.c \ ++ elfxx-ia64.c \ ++ elfxx-loongarch.c \ -+ elfxx-mips.c \ -+ elfxx-riscv.c \ -+ mach-o-aarch64.c \ ++ elfxx-mips.c \ ++ elfxx-riscv.c \ ++ mach-o-aarch64.c \ +@@ -665,6 +671,7 @@ SOURCE_CFILES = \ + BUILD_CFILES = \ -+ elf32-aarch64.c elf64-aarch64.c \ -+ elf32-ia64.c elf64-ia64.c \ ++ elf32-aarch64.c elf64-aarch64.c \ ++ elf32-ia64.c elf64-ia64.c \ ++ elf32-loongarch.c elf64-loongarch.c \ -+ elf32-riscv.c elf64-riscv.c \ -+ peigen.c pepigen.c pex64igen.c -+ ++ elf32-riscv.c elf64-riscv.c \ ++ peigen.c pepigen.c pex64igen.c ++ +@@ -686,7 +693,7 @@ SOURCE_HFILES = \ -+ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ -+ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ -+ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ ++ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ ++ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ ++ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ +- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ ++ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ -+ genlink.h go32stub.h \ -+ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ -+ libpei.h libxcoff.h \ ++ genlink.h go32stub.h \ ++ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ ++ libpei.h libxcoff.h \ +@@ -842,6 +849,14 @@ elf64-ia64.c : elfnn-ia64.c -+ echo "#line 1 \"elfnn-ia64.c\"" > $@ -+ $(SED) -e s/NN/64/g < $< >> $@ -+ ++ echo "#line 1 \"elfnn-ia64.c\"" > $@ ++ $(SED) -e s/NN/64/g < $< >> $@ ++ ++elf32-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ @@ -717,63 +857,61 @@ index 0000000..036833e ++ $(SED) -e s/NN/64/g < $< >> $@ ++ + elf32-riscv.c : elfnn-riscv.c -+ echo "#line 1 \"elfnn-riscv.c\"" > $@ -+ $(SED) -e s/NN/32/g < $< >> $@ -+diff --git gdb-10.2/bfd/Makefile.in gdb-10.2/bfd/Makefile.in -+index 9cad4da..ecf2c20 100644 -+--- gdb-10.2/bfd/Makefile.in ++ echo "#line 1 \"elfnn-riscv.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ ++--- gdb-10.2/bfd/Makefile.in.orig ++++ gdb-10.2/bfd/Makefile.in +@@ -543,6 +543,7 @@ ALL_MACHINES = \ -+ cpu-ip2k.lo \ -+ cpu-iq2000.lo \ -+ cpu-lm32.lo \ ++ cpu-ip2k.lo \ ++ cpu-iq2000.lo \ ++ cpu-lm32.lo \ ++ cpu-loongarch.lo \ -+ cpu-m10200.lo \ -+ cpu-m10300.lo \ -+ cpu-m32c.lo \ ++ cpu-m10200.lo \ ++ cpu-m10300.lo \ ++ cpu-m32c.lo \ +@@ -627,6 +628,7 @@ ALL_MACHINES_CFILES = \ -+ cpu-ip2k.c \ -+ cpu-iq2000.c \ -+ cpu-lm32.c \ ++ cpu-ip2k.c \ ++ cpu-iq2000.c \ ++ cpu-lm32.c \ ++ cpu-loongarch.c \ -+ cpu-m10200.c \ -+ cpu-m10300.c \ -+ cpu-m32c.c \ ++ cpu-m10200.c \ ++ cpu-m10300.c \ ++ cpu-m32c.c \ +@@ -975,6 +977,9 @@ BFD64_BACKENDS = \ -+ elf64-ia64.lo \ -+ elf64-ia64-vms.lo \ -+ elfxx-ia64.lo \ ++ elf64-ia64.lo \ ++ elf64-ia64-vms.lo \ ++ elfxx-ia64.lo \ ++ elf32-loongarch.lo \ ++ elf64-loongarch.lo \ ++ elfxx-loongarch.lo \ -+ elfn32-mips.lo \ -+ elf64-mips.lo \ -+ elfxx-mips.lo \ ++ elfn32-mips.lo \ ++ elf64-mips.lo \ ++ elfxx-mips.lo \ +@@ -1028,6 +1033,7 @@ BFD64_BACKENDS_CFILES = \ -+ elfn32-mips.c \ -+ elfxx-aarch64.c \ -+ elfxx-ia64.c \ ++ elfn32-mips.c \ ++ elfxx-aarch64.c \ ++ elfxx-ia64.c \ ++ elfxx-loongarch.c \ -+ elfxx-mips.c \ -+ elfxx-riscv.c \ -+ mach-o-aarch64.c \ ++ elfxx-mips.c \ ++ elfxx-riscv.c \ ++ mach-o-aarch64.c \ +@@ -1091,6 +1097,7 @@ SOURCE_CFILES = \ + BUILD_CFILES = \ -+ elf32-aarch64.c elf64-aarch64.c \ -+ elf32-ia64.c elf64-ia64.c \ ++ elf32-aarch64.c elf64-aarch64.c \ ++ elf32-ia64.c elf64-ia64.c \ ++ elf32-loongarch.c elf64-loongarch.c \ -+ elf32-riscv.c elf64-riscv.c \ -+ peigen.c pepigen.c pex64igen.c -+ ++ elf32-riscv.c elf64-riscv.c \ ++ peigen.c pepigen.c pex64igen.c ++ +@@ -1109,7 +1116,7 @@ SOURCE_HFILES = \ -+ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ -+ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ -+ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ ++ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ ++ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ ++ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ +- elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ ++ elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ -+ genlink.h go32stub.h \ -+ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ -+ libpei.h libxcoff.h \ ++ genlink.h go32stub.h \ ++ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ ++ libpei.h libxcoff.h \ +@@ -1349,6 +1356,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-k1om.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-l1om.Plo@am__quote@ @@ -807,9 +945,9 @@ index 0000000..036833e + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-riscv.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ +@@ -1972,6 +1983,14 @@ elf64-ia64.c : elfnn-ia64.c -+ echo "#line 1 \"elfnn-ia64.c\"" > $@ -+ $(SED) -e s/NN/64/g < $< >> $@ -+ ++ echo "#line 1 \"elfnn-ia64.c\"" > $@ ++ $(SED) -e s/NN/64/g < $< >> $@ ++ ++elf32-loongarch.c : elfnn-loongarch.c ++ echo "#line 1 \"elfnn-loongarch.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ @@ -819,11 +957,9 @@ index 0000000..036833e ++ $(SED) -e s/NN/64/g < $< >> $@ ++ + elf32-riscv.c : elfnn-riscv.c -+ echo "#line 1 \"elfnn-riscv.c\"" > $@ -+ $(SED) -e s/NN/32/g < $< >> $@ -+diff --git gdb-10.2/bfd/archures.c gdb-10.2/bfd/archures.c -+index 5069864..36ccb1c 100644 -+--- gdb-10.2/bfd/archures.c ++ echo "#line 1 \"elfnn-riscv.c\"" > $@ ++ $(SED) -e s/NN/32/g < $< >> $@ ++--- gdb-10.2/bfd/archures.c.orig ++++ gdb-10.2/bfd/archures.c +@@ -555,6 +555,9 @@ DESCRIPTION + .#define bfd_mach_ck807 6 @@ -851,9 +987,7 @@ index 0000000..036833e + &bfd_m32c_arch, + &bfd_m32r_arch, + &bfd_m68hc11_arch, -+diff --git gdb-10.2/bfd/bfd-in2.h gdb-10.2/bfd/bfd-in2.h -+index 935ba53..e8a38b8 100644 -+--- gdb-10.2/bfd/bfd-in2.h ++--- gdb-10.2/bfd/bfd-in2.h.orig ++++ gdb-10.2/bfd/bfd-in2.h +@@ -1955,6 +1955,9 @@ enum bfd_architecture + #define bfd_mach_ck807 6 @@ -864,9 +998,9 @@ index 0000000..036833e ++#define bfd_mach_loongarch64 2 + bfd_arch_last + }; -+ ++ +@@ -6273,6 +6276,88 @@ assembler and not (currently) written to any object files. */ -+ ++ + /* S12Z relocations. */ + BFD_RELOC_S12Z_OPR, ++ @@ -952,11 +1086,9 @@ index 0000000..036833e ++ BFD_RELOC_LARCH_32_PCREL, ++ BFD_RELOC_LARCH_RELAX, + BFD_RELOC_UNUSED }; -+ ++ + typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; -+diff --git gdb-10.2/bfd/config.bfd gdb-10.2/bfd/config.bfd -+index 6c2919e..417bdb0 100644 -+--- gdb-10.2/bfd/config.bfd ++--- gdb-10.2/bfd/config.bfd.orig ++++ gdb-10.2/bfd/config.bfd +@@ -183,6 +183,7 @@ hppa*) targ_archs=bfd_hppa_arch ;; + i[3-7]86) targ_archs=bfd_i386_arch ;; @@ -969,7 +1101,7 @@ index 0000000..036833e +@@ -1401,6 +1402,20 @@ case "${targ}" in + targ_underscore=yes + ;; -+ ++ ++#ifdef BFD64 ++ loongarch32-*) ++ targ_defvec=loongarch_elf32_vec @@ -987,9 +1119,7 @@ index 0000000..036833e + # END OF targmatch.h + bpf-*-*) + echo "*** Configuration $targ is not fully supported." >&2 -+diff --git gdb-10.2/bfd/configure gdb-10.2/bfd/configure -+index a9c4fd9..251439e 100755 -+--- gdb-10.2/bfd/configure ++--- gdb-10.2/bfd/configure.orig ++++ gdb-10.2/bfd/configure +@@ -14836,6 +14836,8 @@ do + l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; @@ -1000,9 +1130,7 @@ index 0000000..036833e + m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; + m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; -+diff --git gdb-10.2/bfd/configure.ac gdb-10.2/bfd/configure.ac -+index f62659a..e97c9fc 100644 -+--- gdb-10.2/bfd/configure.ac ++--- gdb-10.2/bfd/configure.ac.orig ++++ gdb-10.2/bfd/configure.ac +@@ -542,6 +542,8 @@ do + l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; @@ -1013,10 +1141,7 @@ index 0000000..036833e + m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; + m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; + m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; -+diff --git gdb-10.2/bfd/cpu-loongarch.c gdb-10.2/bfd/cpu-loongarch.c -+new file mode 100644 -+index 0000000..01d6c70 -+--- /dev/null ++--- gdb-10.2/bfd/cpu-loongarch.c.orig ++++ gdb-10.2/bfd/cpu-loongarch.c +@@ -0,0 +1,61 @@ ++/* BFD support for LoongArch. @@ -1080,11 +1205,9 @@ index 0000000..036833e ++ &bfd_loongarch32_arch, /* Next in list. */ ++ 0, ++}; -+diff --git gdb-10.2/bfd/elf-bfd.h gdb-10.2/bfd/elf-bfd.h -+index eebdf9a..148c08c 100644 -+--- gdb-10.2/bfd/elf-bfd.h ++--- gdb-10.2/bfd/elf-bfd.h.orig ++++ gdb-10.2/bfd/elf-bfd.h -+@@ -500,6 +500,7 @@ enum elf_target_id ++@@ -502,6 +502,7 @@ enum elf_target_id + I386_ELF_DATA, + IA64_ELF_DATA, + LM32_ELF_DATA, @@ -1092,7 +1215,7 @@ index 0000000..036833e + M32R_ELF_DATA, + M68HC11_ELF_DATA, + M68K_ELF_DATA, -+@@ -2799,6 +2800,14 @@ extern char *elfcore_write_lwpstatus ++@@ -2801,6 +2802,14 @@ extern char *elfcore_write_lwpstatus + (bfd *, char *, int *, long, int, const void *); + extern char *elfcore_write_register_note + (bfd *, char *, int *, const char *, const void *, int); @@ -1104,26 +1227,24 @@ index 0000000..036833e ++ (bfd *, char *, int *, const void*, int); ++extern char *elfcore_write_loongarch_lasx ++ (bfd *, char *, int *, const void*, int); -+ ++ + /* Internal structure which holds information to be included in the + PRPSINFO section of Linux core files. -+diff --git gdb-10.2/bfd/elf.c gdb-10.2/bfd/elf.c -+index 5a02f8d..580d7c5 100644 -+--- gdb-10.2/bfd/elf.c ++--- gdb-10.2/bfd/elf.c.orig ++++ gdb-10.2/bfd/elf.c +@@ -4391,7 +4391,7 @@ get_program_header_size (bfd *abfd, struct bfd_link_info *info) + { + /* If we have a loadable interpreter section, we need a -+ PT_INTERP segment. In this case, assume we also need a ++ PT_INTERP segment. In this case, assume we also need a +- PT_PHDR segment, although that may not be true for all ++ PT_PHDR segment, although that may not be TRUE for all -+ targets. */ ++ targets. */ + segs += 2; + } +@@ -9903,6 +9903,30 @@ elfcore_grok_arc_v2 (bfd *abfd, Elf_Internal_Note *note) + return elfcore_make_note_pseudosection (abfd, ".reg-arc-v2", note); + } -+ ++ ++static bfd_boolean ++elfcore_grok_loongarch_cpucfg (bfd *abfd, Elf_Internal_Note *note) ++{ @@ -1153,8 +1274,8 @@ index 0000000..036833e + #if defined (HAVE_PRPSINFO32_T) /* Sparc64 cross Sparc32 */ +@@ -10560,6 +10584,34 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note) + else -+ return TRUE; -+ ++ return TRUE; ++ ++ case NT_LARCH_CPUCFG: ++ if (note->namesz == 6 ++ && strcmp (note->namedata, "LINUX") == 0) @@ -1187,9 +1308,9 @@ index 0000000..036833e + case NT_PSINFO: + if (bed->elf_backend_grok_psinfo) +@@ -11941,6 +11993,55 @@ elfcore_write_arc_v2 (bfd *abfd, -+ note_name, NT_ARC_V2, arc_v2, size); ++ note_name, NT_ARC_V2, arc_v2, size); + } -+ ++ ++char * ++elfcore_write_loongarch_cpucfg (bfd *abfd, ++ char *buf, @@ -1241,7 +1362,7 @@ index 0000000..036833e ++ + char * + elfcore_write_register_note (bfd *abfd, -+ char *buf, ++ char *buf, +@@ -12025,6 +12126,15 @@ elfcore_write_register_note (bfd *abfd, + return elfcore_write_aarch_pauth (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-arc-v2") == 0) @@ -1257,20 +1378,17 @@ index 0000000..036833e ++ + return NULL; + } -+ ++ +@@ -12491,7 +12601,7 @@ _bfd_elf_final_write_processing (bfd *abfd) -+ ++ + /* Return TRUE for ELF symbol types that represent functions. + This is the default version of this function, which is sufficient for +- most targets. It returns true if TYPE is STT_FUNC or STT_GNU_IFUNC. */ ++ most targets. It returns TRUE if TYPE is STT_FUNC or STT_GNU_IFUNC. */ -+ ++ + bfd_boolean + _bfd_elf_is_function_type (unsigned int type) -+diff --git gdb-10.2/bfd/elfnn-loongarch.c gdb-10.2/bfd/elfnn-loongarch.c -+new file mode 100644 -+index 0000000..226cd59 -+--- /dev/null ++--- gdb-10.2/bfd/elfnn-loongarch.c.orig ++++ gdb-10.2/bfd/elfnn-loongarch.c +@@ -0,0 +1,4128 @@ ++/* LoongArch-specific support for NN-bit ELF. @@ -5401,10 +5519,7 @@ index 0000000..036833e ++#define elf_backend_hash_symbol elf_loongarch64_hash_symbol ++ ++#include "elfNN-target.h" -+diff --git gdb-10.2/bfd/elfxx-loongarch.c gdb-10.2/bfd/elfxx-loongarch.c -+new file mode 100644 -+index 0000000..9f54b00 -+--- /dev/null ++--- gdb-10.2/bfd/elfxx-loongarch.c.orig ++++ gdb-10.2/bfd/elfxx-loongarch.c +@@ -0,0 +1,1618 @@ ++/* LoongArch-specific support for ELF. @@ -7025,10 +7140,7 @@ index 0000000..036833e ++ return ((loongarch_reloc_howto_type *) ++ howto)->adjust_reloc_bits(howto, fix_val); ++} -+diff --git gdb-10.2/bfd/elfxx-loongarch.h gdb-10.2/bfd/elfxx-loongarch.h -+new file mode 100644 -+index 0000000..49c1515 -+--- /dev/null ++--- gdb-10.2/bfd/elfxx-loongarch.h.orig ++++ gdb-10.2/bfd/elfxx-loongarch.h +@@ -0,0 +1,45 @@ ++/* LoongArch-specific backend routines. @@ -7076,9 +7188,7 @@ index 0000000..036833e ++ || ELF_ST_VISIBILITY ((H)->other) != STV_DEFAULT) \ ++ && (H)->def_regular \ ++ && (H)->type == STT_GNU_IFUNC)) -+diff --git gdb-10.2/bfd/libbfd.h gdb-10.2/bfd/libbfd.h -+index 74d7e41..a3b40ec 100644 -+--- gdb-10.2/bfd/libbfd.h ++--- gdb-10.2/bfd/libbfd.h.orig ++++ gdb-10.2/bfd/libbfd.h +@@ -3396,6 +3396,86 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4", @@ -7167,9 +7277,7 @@ index 0000000..036833e + "@@overflow: BFD_RELOC_UNUSED@@", + }; + #endif -+diff --git gdb-10.2/bfd/po/BLD-POTFILES.in gdb-10.2/bfd/po/BLD-POTFILES.in -+index 5fc39cf..8385565 100644 -+--- gdb-10.2/bfd/po/BLD-POTFILES.in ++--- gdb-10.2/bfd/po/BLD-POTFILES.in.orig ++++ gdb-10.2/bfd/po/BLD-POTFILES.in +@@ -2,10 +2,12 @@ bfd_stdint.h + bfdver.h @@ -7184,9 +7292,7 @@ index 0000000..036833e + elf64-riscv.c + elf64-target.h + peigen.c -+diff --git gdb-10.2/bfd/po/SRC-POTFILES.in gdb-10.2/bfd/po/SRC-POTFILES.in -+index 83530b2..96edf89 100644 -+--- gdb-10.2/bfd/po/SRC-POTFILES.in ++--- gdb-10.2/bfd/po/SRC-POTFILES.in.orig ++++ gdb-10.2/bfd/po/SRC-POTFILES.in +@@ -72,6 +72,7 @@ cpu-iq2000.c + cpu-k1om.c @@ -7196,191 +7302,7 @@ index 0000000..036833e + cpu-m10200.c + cpu-m10300.c + cpu-m32c.c -+diff --git gdb-10.2/bfd/reloc.c gdb-10.2/bfd/reloc.c -+index dc923fe..9d70bb1 100644 -+--- gdb-10.2/bfd/reloc.c -++++ gdb-10.2/bfd/reloc.c -+@@ -8142,6 +8142,177 @@ ENUM -+ ENUMDOC -+ S12Z relocations. -+ -++ENUM -++ BFD_RELOC_LARCH_TLS_DTPMOD32 -++ENUMX -++ BFD_RELOC_LARCH_TLS_DTPREL32 -++ENUMX -++ BFD_RELOC_LARCH_TLS_DTPMOD64 -++ENUMX -++ BFD_RELOC_LARCH_TLS_DTPREL64 -++ENUMX -++ BFD_RELOC_LARCH_TLS_TPREL32 -++ENUMX -++ BFD_RELOC_LARCH_TLS_TPREL64 -++ENUMX -++ BFD_RELOC_LARCH_MARK_LA -++ENUMX -++ BFD_RELOC_LARCH_MARK_PCREL -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_PCREL -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_DUP -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_GPREL -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_TLS_GD -++ENUMX -++ BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL -++ENUMX -++ BFD_RELOC_LARCH_SOP_ASSERT -++ENUMX -++ BFD_RELOC_LARCH_SOP_NOT -++ENUMX -++ BFD_RELOC_LARCH_SOP_SUB -++ENUMX -++ BFD_RELOC_LARCH_SOP_SL -++ENUMX -++ BFD_RELOC_LARCH_SOP_SR -++ENUMX -++ BFD_RELOC_LARCH_SOP_ADD -++ENUMX -++ BFD_RELOC_LARCH_SOP_AND -++ENUMX -++ BFD_RELOC_LARCH_SOP_IF_ELSE -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_10_5 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_U_10_12 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_10_12 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_10_16 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_5_20 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2 -++ENUMX -++ BFD_RELOC_LARCH_SOP_POP_32_U -++ENUMX -++ BFD_RELOC_LARCH_ADD8 -++ENUMX -++ BFD_RELOC_LARCH_ADD16 -++ENUMX -++ BFD_RELOC_LARCH_ADD24 -++ENUMX -++ BFD_RELOC_LARCH_ADD32 -++ENUMX -++ BFD_RELOC_LARCH_ADD64 -++ENUMX -++ BFD_RELOC_LARCH_SUB8 -++ENUMX -++ BFD_RELOC_LARCH_SUB16 -++ENUMX -++ BFD_RELOC_LARCH_SUB24 -++ENUMX -++ BFD_RELOC_LARCH_SUB32 -++ENUMX -++ BFD_RELOC_LARCH_SUB64 -++ -++ENUMX -++ BFD_RELOC_LARCH_B16 -++ENUMX -++ BFD_RELOC_LARCH_B21 -++ENUMX -++ BFD_RELOC_LARCH_B26 -++ -++ENUMX -++ BFD_RELOC_LARCH_ABS_HI20 -++ENUMX -++ BFD_RELOC_LARCH_ABS_LO12 -++ENUMX -++ BFD_RELOC_LARCH_ABS64_LO20 -++ENUMX -++ BFD_RELOC_LARCH_ABS64_HI12 -++ -++ENUMX -++ BFD_RELOC_LARCH_PCALA_HI20 -++ENUMX -++ BFD_RELOC_LARCH_PCALA_LO12 -++ENUMX -++ BFD_RELOC_LARCH_PCALA64_LO20 -++ENUMX -++ BFD_RELOC_LARCH_PCALA64_HI12 -++ -++ENUMX -++ BFD_RELOC_LARCH_GOT_PC_HI20 -++ENUMX -++ BFD_RELOC_LARCH_GOT_PC_LO12 -++ENUMX -++ BFD_RELOC_LARCH_GOT64_PC_LO20 -++ENUMX -++ BFD_RELOC_LARCH_GOT64_PC_HI12 -++ENUMX -++ BFD_RELOC_LARCH_GOT_HI20 -++ENUMX -++ BFD_RELOC_LARCH_GOT_LO12 -++ENUMX -++ BFD_RELOC_LARCH_GOT64_LO20 -++ENUMX -++ BFD_RELOC_LARCH_GOT64_HI12 -++ -++ENUMX -++ BFD_RELOC_LARCH_TLS_LE_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_LE_LO12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_LE64_LO20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_LE64_HI12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE_PC_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE_PC_LO12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE64_PC_LO20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE64_PC_HI12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE_LO12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE64_LO20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_IE64_HI12 -++ENUMX -++ BFD_RELOC_LARCH_TLS_LD_PC_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_LD_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_GD_PC_HI20 -++ENUMX -++ BFD_RELOC_LARCH_TLS_GD_HI20 -++ -++ENUMX -++ BFD_RELOC_LARCH_32_PCREL -++ -++ENUMX -++ BFD_RELOC_LARCH_RELAX -++ -++ENUMDOC -++ LARCH relocations. -++ -+ ENDSENUM -+ BFD_RELOC_UNUSED -+ CODE_FRAGMENT -+diff --git gdb-10.2/bfd/targets.c gdb-10.2/bfd/targets.c -+index 35492b9..5f2147f 100644 -+--- gdb-10.2/bfd/targets.c ++--- gdb-10.2/bfd/targets.c.orig ++++ gdb-10.2/bfd/targets.c +@@ -759,6 +759,8 @@ extern const bfd_target l1om_elf64_vec; + extern const bfd_target l1om_elf64_fbsd_vec; @@ -7392,9 +7314,9 @@ index 0000000..036833e + extern const bfd_target m32r_elf32_vec; + extern const bfd_target m32r_elf32_le_vec; +@@ -1346,6 +1348,12 @@ static const bfd_target * const _bfd_target_vector[] = -+ &z80_elf32_vec, -+ -+ &z8k_coff_vec, ++ &z80_elf32_vec, ++ ++ &z8k_coff_vec, ++ ++#ifdef BFD64 ++ &loongarch_elf32_vec, @@ -7402,237 +7324,76 @@ index 0000000..036833e ++#endif ++ + #endif /* not SELECT_VECS */ -+ ++ + /* Always support S-records, for convenience. */ -+diff --git gdb-10.2/config.guess gdb-10.2/config.guess -+index 45001cf..1155f0a 100755 -+--- gdb-10.2/config.guess ++--- gdb-10.2/config.guess.orig ++++ gdb-10.2/config.guess +@@ -985,6 +985,9 @@ EOF + k1om:Linux:*:*) -+ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -+ exit ;; ++ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" ++ exit ;; ++ loongarch32:Linux:*:* | loongarch64:Linux:*:* | loongarchx32:Linux:*:*) ++ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" ++ exit ;; + m32r*:Linux:*:*) -+ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" -+ exit ;; -+diff --git gdb-10.2/config.sub gdb-10.2/config.sub -+index f02d43a..df57c18 100755 -+--- gdb-10.2/config.sub ++ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC" ++ exit ;; ++--- gdb-10.2/config.sub.orig ++++ gdb-10.2/config.sub +@@ -1183,6 +1183,7 @@ case $cpu-$vendor in -+ | k1om \ -+ | le32 | le64 \ -+ | lm32 \ ++ | k1om \ ++ | le32 | le64 \ ++ | lm32 \ ++ | loongarch32 | loongarch64 | loongarchx32 \ -+ | m32c | m32r | m32rle \ -+ | m5200 | m68000 | m680[012346]0 | m68360 | m683?2 | m68k \ -+ | m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x \ -+diff --git gdb-10.2/gdb/Makefile.in gdb-10.2/gdb/Makefile.in -+index ec371fc..67af7d0 100644 -+--- gdb-10.2/gdb/Makefile.in ++ | m32c | m32r | m32rle \ ++ | m5200 | m68000 | m680[012346]0 | m68360 | m683?2 | m68k \ ++ | m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x \ ++--- gdb-10.2/gdb/Makefile.in.orig ++++ gdb-10.2/gdb/Makefile.in -+@@ -712,6 +712,8 @@ ALL_TARGET_OBS = \ -+ arch/i386.o \ -+ arch/ppc-linux-common.o \ -+ arch/riscv.o \ ++@@ -712,6 +712,7 @@ ALL_TARGET_OBS = \ ++ arch/i386.o \ ++ arch/ppc-linux-common.o \ ++ arch/riscv.o \ ++ arch/loongarch.o \ -++ arch/loongarch-linux-nat.o \ -+ arm-bsd-tdep.o \ -+ arm-fbsd-tdep.o \ -+ arm-linux-tdep.o \ -+@@ -760,6 +762,9 @@ ALL_TARGET_OBS = \ -+ linux-record.o \ -+ linux-tdep.o \ -+ lm32-tdep.o \ ++ arm-bsd-tdep.o \ ++ arm-fbsd-tdep.o \ ++ arm-linux-tdep.o \ ++@@ -760,6 +761,8 @@ ALL_TARGET_OBS = \ ++ linux-record.o \ ++ linux-tdep.o \ ++ lm32-tdep.o \ ++ loongarch-tdep.o \ ++ loongarch-linux-tdep.o \ -++ loongarch-linux-nat.o \ -+ m32c-tdep.o \ -+ m32r-linux-tdep.o \ -+ m32r-tdep.o \ -+@@ -1324,6 +1329,8 @@ HFILES_NO_SRCDIR = \ -+ linux-record.h \ -+ linux-tdep.h \ -+ location.h \ ++ m32c-tdep.o \ ++ m32r-linux-tdep.o \ ++ m32r-tdep.o \ ++@@ -1325,6 +1328,8 @@ HFILES_NO_SRCDIR = \ ++ linux-record.h \ ++ linux-tdep.h \ ++ location.h \ ++ loongarch-tdep.h \ ++ loongarch-linux-tdep.h \ -+ m2-lang.h \ -+ m32r-tdep.h \ -+ m68k-tdep.h \ -+@@ -1456,6 +1463,8 @@ HFILES_NO_SRCDIR = \ -+ arch/arc.h \ -+ arch/arm.h \ -+ arch/i386.h \ ++ m2-lang.h \ ++ m32r-tdep.h \ ++ m68k-tdep.h \ ++@@ -1457,6 +1462,7 @@ HFILES_NO_SRCDIR = \ ++ arch/arc.h \ ++ arch/arm.h \ ++ arch/i386.h \ ++ arch/loongarch.h \ -++ arch/loongarch-linux-nat.h \ -+ arch/ppc-linux-common.h \ -+ arch/ppc-linux-tdesc.h \ -+ arch/riscv.h \ -+@@ -1500,6 +1509,7 @@ HFILES_NO_SRCDIR = \ -+ nat/linux-personality.h \ -+ nat/linux-ptrace.h \ -+ nat/linux-waitpid.h \ -++ nat/loongarch-linux-watch.h \ -+ nat/mips-linux-watch.h \ -+ nat/ppc-linux.h \ -+ nat/x86-cpuid.h \ -+@@ -2205,6 +2215,9 @@ ALLDEPFILES = \ -+ linux-record.c \ -+ linux-tdep.c \ -+ lm32-tdep.c \ ++ arch/ppc-linux-common.h \ ++ arch/ppc-linux-tdesc.h \ ++ arch/riscv.h \ ++@@ -2207,6 +2214,8 @@ ALLDEPFILES = \ ++ linux-record.c \ ++ linux-tdep.c \ ++ lm32-tdep.c \ ++ loongarch-tdep.c \ ++ loongarch-linux-tdep.c \ -++ loongarch-linux-nat.c \ -+ m32r-linux-nat.c \ -+ m32r-linux-tdep.c \ -+ m32r-tdep.c \ -+diff --git gdb-10.2/gdb/arch/loongarch-linux-nat.c gdb-10.2/gdb/arch/loongarch-linux-nat.c -+new file mode 100644 -+index 0000000..baf59f8 -+--- /dev/null -++++ gdb-10.2/gdb/arch/loongarch-linux-nat.c -+@@ -0,0 +1,93 @@ -++/* Copyright (C) 2021 Free Software Foundation, Inc. -++ -++ This file is part of GDB. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++/* For external ptrace. */ -++#ifdef GDBSERVER -++#include "server.h" -++#include "nat/gdb_ptrace.h" -++#else -++#include "defs.h" -++#include "nat/gdb_ptrace.h" -++#endif -++ -++#include "arch/loongarch.h" -++#include "arch/loongarch-linux-nat.h" -++#include "loongarch-linux-tdep.h" -++#include "elf/common.h" -++#include -++ -++static uint32_t -++loongarch_cpucfg_may_ptrace (uint64_t rj, int tid) -++{ -++ char t_buf[rj * 4 + 4]; -++ struct iovec iovec = { .iov_base = &t_buf, .iov_len = sizeof (t_buf) }; -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_CPUCFG, &iovec) < 0) -++ ((uint32_t *) t_buf)[rj] = loongarch_cpucfg (rj); -++ return ((uint32_t *) t_buf)[rj]; -++} -++ -++struct target_desc * -++loongarch_linux_read_description_runtime (int tid) -++{ -++ int rlen, flen, lbt, lsx, lasx; -++ -++ uint32_t cpucfg1 = loongarch_cpucfg_may_ptrace (1, tid); -++ rlen = cpucfg1 & 0x2 /* LA64 */ ? 64 : 32; -++ -++ uint32_t cpucfg2 = loongarch_cpucfg_may_ptrace (2, tid); -++ flen = 0; -++ if (cpucfg2 & 0x4 /* FP_DP */) -++ flen = 64; -++ else if (cpucfg2 & 0x2 /* FP_SP */) -++ flen = 32; -++ if (flen) -++ { -++ loongarch_elf_fpregset_t regset; -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) < 0) -++ flen = 0; -++ } -++ -++ lbt = 0; -++ if (cpucfg2 & 0x1c0000 /* LBT_X86 || LBT_ARM || LBT_MIPS */) -++ { -++ loongarch_elf_lbtregset_t regset; -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LBT, &iovec) == 0) -++ lbt = 1; -++ } -++ -++ lsx = 0; -++ if (cpucfg2 & 0x40 /* LSX */) -++ { -++ loongarch_elf_lsxregset_t regset; -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LSX, &iovec) == 0) -++ lsx = 1; -++ } -++ -++ lasx = 0; -++ if (cpucfg2 & 0x80 /* LASX */) -++ { -++ loongarch_elf_lasxregset_t regset; -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LASX, &iovec) == 0) -++ lasx = 1; -++ } -++ -++ return loongarch_create_target_description (rlen, flen, lbt, lsx, lasx); -++} -+diff --git gdb-10.2/gdb/arch/loongarch-linux-nat.h gdb-10.2/gdb/arch/loongarch-linux-nat.h -+new file mode 100644 -+index 0000000..a9cd453 -+--- /dev/null -++++ gdb-10.2/gdb/arch/loongarch-linux-nat.h -+@@ -0,0 +1,35 @@ -++/* -++ Copyright (C) 2021 Free Software Foundation, Inc. -++ -++ This file is part of GDB. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++#ifndef LOONGARCH_LINUX_NAT_H -++#define LOONGARCH_LINUX_NAT_H -++#include -++ -++static inline uint32_t -++loongarch_cpucfg (uint64_t rj) -++{ -++ uint32_t ret; -++ asm ("cpucfg %0,%1" : "=r"(ret) : "r"(rj)); -++ return ret; -++} -++ -++struct target_desc; -++ -++extern struct target_desc *loongarch_linux_read_description_runtime (int tid); -++ -++#endif -+diff --git gdb-10.2/gdb/arch/loongarch.c gdb-10.2/gdb/arch/loongarch.c -+new file mode 100644 -+index 0000000..cc6b767 -+--- /dev/null ++ m32r-linux-nat.c \ ++ m32r-linux-tdep.c \ ++ m32r-tdep.c \ ++--- gdb-10.2/gdb/arch/loongarch.c.orig ++++ gdb-10.2/gdb/arch/loongarch.c +@@ -0,0 +1,75 @@ ++/* Copyright (C) 2021 Free Software Foundation, Inc. @@ -7710,10 +7471,7 @@ index 0000000..036833e ++{ ++ return loongarch_create_target_description (rlen, flen, 0, 0, 0); ++} -+diff --git gdb-10.2/gdb/arch/loongarch.h gdb-10.2/gdb/arch/loongarch.h -+new file mode 100644 -+index 0000000..997afab -+--- /dev/null ++--- gdb-10.2/gdb/arch/loongarch.h.orig ++++ gdb-10.2/gdb/arch/loongarch.h +@@ -0,0 +1,35 @@ ++/* @@ -7751,9 +7509,7 @@ index 0000000..036833e ++ int lsx, int lasx); ++ ++#endif -+diff --git gdb-10.2/gdb/configure.host gdb-10.2/gdb/configure.host -+index ce52823..046bc85 100644 -+--- gdb-10.2/gdb/configure.host ++--- gdb-10.2/gdb/configure.host.orig ++++ gdb-10.2/gdb/configure.host +@@ -63,6 +63,7 @@ alpha*) gdb_host_cpu=alpha ;; + arm*) gdb_host_cpu=arm ;; @@ -7764,58 +7520,39 @@ index 0000000..036833e + mips*) gdb_host_cpu=mips ;; + powerpc* | rs6000) gdb_host_cpu=powerpc ;; +@@ -120,6 +121,8 @@ i[34567]86-*-cygwin*) gdb_host=cygwin ;; -+ ++ + ia64-*-linux*) gdb_host=linux ;; -+ ++ ++loongarch*-linux*) gdb_host=linux ;; ++ + m68*-*-linux*) gdb_host=linux ;; + m68*-*-netbsdelf* | m68*-*-knetbsd*-gnu) -+ gdb_host=nbsdelf ;; -+diff --git gdb-10.2/gdb/configure.nat gdb-10.2/gdb/configure.nat -+index bb70e30..fad1631 100644 -+--- gdb-10.2/gdb/configure.nat -++++ gdb-10.2/gdb/configure.nat -+@@ -253,6 +253,10 @@ case ${gdb_host} in -+ # Host: Intel IA-64 running GNU/Linux -+ NATDEPFILES="${NATDEPFILES} ia64-linux-nat.o" -+ ;; -++ loongarch) -++ # Host: LoongArch, running GNU/Linux. -++ NATDEPFILES="${NATDEPFILES} loongarch-linux-nat.o arch/loongarch-linux-nat.o linux-nat-trad.o nat/loongarch-linux-watch.o" -++ ;; -+ m32r) -+ # Host: M32R based machine running GNU/Linux -+ NATDEPFILES="${NATDEPFILES} m32r-linux-nat.o" -+diff --git gdb-10.2/gdb/configure.tgt gdb-10.2/gdb/configure.tgt -+index a3e11c4..4454838 100644 -+--- gdb-10.2/gdb/configure.tgt ++ gdb_host=nbsdelf ;; ++--- gdb-10.2/gdb/configure.tgt.orig ++++ gdb-10.2/gdb/configure.tgt +@@ -95,6 +95,9 @@ xtensa*) -+ cpu_obs="xtensa-tdep.o xtensa-config.o solib-svr4.o" -+ ;; -+ ++ cpu_obs="xtensa-tdep.o xtensa-config.o solib-svr4.o" ++ ;; ++ ++loongarch*) ++ cpu_obs="arch/loongarch.o";; ++ + esac -+ ++ + # 2. Get the objects per os in $TARG. +@@ -346,6 +349,11 @@ lm32-*-*) -+ gdb_sim=../sim/lm32/libsim.a -+ ;; -+ ++ gdb_sim=../sim/lm32/libsim.a ++ ;; ++ ++loongarch*-linux*) ++ gdb_target_obs="loongarch-tdep.o loongarch-linux-tdep.o glibc-tdep.o linux-tdep.o solib-svr4.o symfile-mem.o" ++ build_gdbserver=yes ++ ;; ++ + m32c-*-*) -+ # Target: Renesas M32C family -+ gdb_target_obs="m32c-tdep.o" -+diff --git gdb-10.2/gdb/doc/gdb.texinfo gdb-10.2/gdb/doc/gdb.texinfo -+index 097aacd..94a8537 100644 -+--- gdb-10.2/gdb/doc/gdb.texinfo ++ # Target: Renesas M32C family ++ gdb_target_obs="m32c-tdep.o" ++--- gdb-10.2/gdb/doc/gdb.texinfo.orig ++++ gdb-10.2/gdb/doc/gdb.texinfo +@@ -45227,6 +45227,7 @@ registers using the capitalization used in the description. + * ARC Features:: @@ -7828,7 +7565,7 @@ index 0000000..036833e +@@ -45444,6 +45445,15 @@ The @samp{org.gnu.gdb.i386.pkeys} feature is optional. It should + describe a single register, @samp{pkru}. It is a 32-bit register + valid for i386 and amd64. -+ ++ ++@node LoongArch Features ++@subsection LoongArch Features ++@cindex target descriptions, LoongArch Features @@ -7841,9 +7578,7 @@ index 0000000..036833e + @node MicroBlaze Features + @subsection MicroBlaze Features + @cindex target descriptions, MicroBlaze features -+diff --git gdb-10.2/gdb/features/Makefile gdb-10.2/gdb/features/Makefile -+index 67c3ae1..a6f8ea0 100644 -+--- gdb-10.2/gdb/features/Makefile ++--- gdb-10.2/gdb/features/Makefile.orig ++++ gdb-10.2/gdb/features/Makefile +@@ -74,6 +74,7 @@ arm-expedite = r11,sp,pc + i386-expedite = ebp,esp,eip @@ -7860,11 +7595,11 @@ index 0000000..036833e ++loongarch-feature = 1 + riscv-feature = 1 + tic6x-feature = 1 -+ ++ +@@ -228,6 +230,14 @@ FEATURE_XMLFILES = aarch64-core.xml \ -+ i386/64bit-pkeys.xml \ -+ i386/64bit-sse.xml \ -+ i386/x32-core.xml \ ++ i386/64bit-pkeys.xml \ ++ i386/64bit-sse.xml \ ++ i386/x32-core.xml \ ++ loongarch/base32.xml \ ++ loongarch/base64.xml \ ++ loongarch/fpu32.xml \ @@ -7873,13 +7608,10 @@ index 0000000..036833e ++ loongarch/lbt64.xml \ ++ loongarch/lsx.xml \ ++ loongarch/lasx.xml \ -+ riscv/32bit-cpu.xml \ -+ riscv/32bit-fpu.xml \ -+ riscv/64bit-cpu.xml \ -+diff --git gdb-10.2/gdb/features/loongarch/base32.c gdb-10.2/gdb/features/loongarch/base32.c -+new file mode 100644 -+index 0000000..3fb35ef -+--- /dev/null ++ riscv/32bit-cpu.xml \ ++ riscv/32bit-fpu.xml \ ++ riscv/64bit-cpu.xml \ ++--- gdb-10.2/gdb/features/loongarch/base32.c.orig ++++ gdb-10.2/gdb/features/loongarch/base32.c +@@ -0,0 +1,48 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -7930,10 +7662,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "badv", regnum++, 1, "general", 32, "code_ptr"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/base32.xml gdb-10.2/gdb/features/loongarch/base32.xml -+new file mode 100644 -+index 0000000..4c44dbe -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/base32.xml.orig ++++ gdb-10.2/gdb/features/loongarch/base32.xml +@@ -0,0 +1,46 @@ ++ @@ -7982,10 +7711,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/base64.c gdb-10.2/gdb/features/loongarch/base64.c -+new file mode 100644 -+index 0000000..d84d425 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/base64.c.orig ++++ gdb-10.2/gdb/features/loongarch/base64.c +@@ -0,0 +1,48 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8036,10 +7762,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "badv", regnum++, 1, "general", 64, "code_ptr"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/base64.xml gdb-10.2/gdb/features/loongarch/base64.xml -+new file mode 100644 -+index 0000000..05d766e -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/base64.xml.orig ++++ gdb-10.2/gdb/features/loongarch/base64.xml +@@ -0,0 +1,46 @@ ++ @@ -8088,10 +7811,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/fpu32.c gdb-10.2/gdb/features/loongarch/fpu32.c -+new file mode 100644 -+index 0000000..bf8964a -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/fpu32.c.orig ++++ gdb-10.2/gdb/features/loongarch/fpu32.c +@@ -0,0 +1,54 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8148,10 +7868,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/fpu32.xml gdb-10.2/gdb/features/loongarch/fpu32.xml -+new file mode 100644 -+index 0000000..8421730 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/fpu32.xml.orig ++++ gdb-10.2/gdb/features/loongarch/fpu32.xml +@@ -0,0 +1,53 @@ ++ @@ -8207,10 +7924,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/fpu64.c gdb-10.2/gdb/features/loongarch/fpu64.c -+new file mode 100644 -+index 0000000..f9e24c3 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/fpu64.c.orig ++++ gdb-10.2/gdb/features/loongarch/fpu64.c +@@ -0,0 +1,62 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8275,10 +7989,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/fpu64.xml gdb-10.2/gdb/features/loongarch/fpu64.xml -+new file mode 100644 -+index 0000000..420be8b -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/fpu64.xml.orig ++++ gdb-10.2/gdb/features/loongarch/fpu64.xml +@@ -0,0 +1,58 @@ ++ @@ -8339,10 +8050,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/lasx.c gdb-10.2/gdb/features/loongarch/lasx.c -+new file mode 100644 -+index 0000000..96e3ea9 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lasx.c.orig ++++ gdb-10.2/gdb/features/loongarch/lasx.c +@@ -0,0 +1,80 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8425,10 +8133,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "xr31", regnum++, 1, "lasx", 256, "lasxv"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/lasx.xml gdb-10.2/gdb/features/loongarch/lasx.xml -+new file mode 100644 -+index 0000000..6f73df0 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lasx.xml.orig ++++ gdb-10.2/gdb/features/loongarch/lasx.xml +@@ -0,0 +1,59 @@ ++ @@ -8490,10 +8195,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/lbt32.c gdb-10.2/gdb/features/loongarch/lbt32.c -+new file mode 100644 -+index 0000000..d245c75 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lbt32.c.orig ++++ gdb-10.2/gdb/features/loongarch/lbt32.c +@@ -0,0 +1,19 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8515,10 +8217,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "x86_top", regnum++, 1, "lbt", 8, "uint8"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/lbt32.xml gdb-10.2/gdb/features/loongarch/lbt32.xml -+new file mode 100644 -+index 0000000..1c0133e -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lbt32.xml.orig ++++ gdb-10.2/gdb/features/loongarch/lbt32.xml +@@ -0,0 +1,17 @@ ++ @@ -8538,10 +8237,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/lbt64.c gdb-10.2/gdb/features/loongarch/lbt64.c -+new file mode 100644 -+index 0000000..ecef330 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lbt64.c.orig ++++ gdb-10.2/gdb/features/loongarch/lbt64.c +@@ -0,0 +1,19 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8563,10 +8259,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "x86_top", regnum++, 1, "lbt", 8, "uint8"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/lbt64.xml gdb-10.2/gdb/features/loongarch/lbt64.xml -+new file mode 100644 -+index 0000000..1df26f5 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lbt64.xml.orig ++++ gdb-10.2/gdb/features/loongarch/lbt64.xml +@@ -0,0 +1,17 @@ ++ @@ -8586,10 +8279,7 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/features/loongarch/lsx.c gdb-10.2/gdb/features/loongarch/lsx.c -+new file mode 100644 -+index 0000000..dd253f3 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lsx.c.orig ++++ gdb-10.2/gdb/features/loongarch/lsx.c +@@ -0,0 +1,80 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: @@ -8672,10 +8362,7 @@ index 0000000..036833e ++ tdesc_create_reg (feature, "vr31", regnum++, 1, "lsx", 128, "lsxv"); ++ return regnum; ++} -+diff --git gdb-10.2/gdb/features/loongarch/lsx.xml gdb-10.2/gdb/features/loongarch/lsx.xml -+new file mode 100644 -+index 0000000..a0a6ba4 -+--- /dev/null ++--- gdb-10.2/gdb/features/loongarch/lsx.xml.orig ++++ gdb-10.2/gdb/features/loongarch/lsx.xml +@@ -0,0 +1,59 @@ ++ @@ -8737,12 +8424,9 @@ index 0000000..036833e ++ ++ ++ -+diff --git gdb-10.2/gdb/loongarch-linux-nat.c gdb-10.2/gdb/loongarch-linux-nat.c -+new file mode 100644 -+index 0000000..9f463f6 -+--- /dev/null -++++ gdb-10.2/gdb/loongarch-linux-nat.c -+@@ -0,0 +1,878 @@ ++--- gdb-10.2/gdb/loongarch-linux-tdep.c.orig +++++ gdb-10.2/gdb/loongarch-linux-tdep.c ++@@ -0,0 +1,709 @@ ++/* Target-dependent code for GNU/Linux LoongArch. ++ ++ Copyright (C) 2021 Free Software Foundation, Inc. @@ -8764,958 +8448,74 @@ index 0000000..036833e ++ along with this program. If not, see . */ ++ ++#include "defs.h" -++#include "command.h" -++#include "gdbcmd.h" ++#include "inferior.h" -++#include "loongarch-tdep.h" +++#include "gdbcore.h" ++#include "target.h" +++#include "solib-svr4.h" +++#include "osabi.h" +++#include "loongarch-tdep.h" +++#include "frame.h" ++#include "regcache.h" -++#include "linux-nat-trad.h" -++#include "loongarch-linux-tdep.h" +++#include "trad-frame.h" +++#include "tramp-frame.h" +++#include "gdbtypes.h" +++#include "objfiles.h" +++#include "solib.h" +++#include "solist.h" +++#include "symtab.h" ++#include "target-descriptions.h" +++#include "loongarch-linux-tdep.h" +++#include "glibc-tdep.h" +++#include "linux-tdep.h" +++#include "xml-syscall.h" +++#include "gdbsupport/gdb_signals.h" ++ -++#include "gdb_proc_service.h" -++#include "gregset.h" -++ -++#include "nat/gdb_ptrace.h" -++#include -++#include "inf-ptrace.h" -++#include "arch/loongarch-linux-nat.h" -++#include "elf/common.h" -++ -++#include "nat/loongarch-linux-watch.h" -++ -++class loongarch_linux_nat_target final : public linux_nat_trad_target +++static void +++loongarch_supply_elf_gregset (const struct regset *r, +++ struct regcache *regcache, int regno, +++ const void *gprs, size_t len) ++{ -++public: -++ void fetch_registers (struct regcache *, int) override; -++ void store_registers (struct regcache *, int) override; -++ -++ void close () override; -++ -++ int can_use_hw_breakpoint (enum bptype, int, int) override; -++ -++ int insert_hw_breakpoint (struct gdbarch *, -++ struct bp_target_info *) override; +++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; +++ gdb_assert (0 <= regs->r && sizeof (loongarch_elf_gregset_t) <= len); ++ -++ int remove_hw_breakpoint (struct gdbarch *, -++ struct bp_target_info *) override; +++ int regsize = register_size (regcache->arch (), regs->r); +++ const gdb_byte *buf = NULL; ++ -++ int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, -++ struct expression *) override; +++ if (regno == -1) +++ { +++ /* Set $r0 = 0. */ +++ regcache->raw_supply_zeroed (regs->r); ++ -++ int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, -++ struct expression *) override; +++ for (int i = 1; i < 32; i++) +++ { +++ buf = (const gdb_byte*)gprs + regsize * i; +++ regcache->raw_supply (regs->r + i, (const void *)buf); +++ } ++ -++ bool stopped_by_watchpoint () override; +++ /* Size base (orig_a0) = regsize * regs->orig_a0. */ +++ buf = (const gdb_byte*)gprs + regsize * regs->orig_a0; +++ regcache->raw_supply (regs->orig_a0, (const void *)buf); ++ -++ bool stopped_data_address (CORE_ADDR *) override; +++ /* Size base (pc) = regsize * regs->pc. */ +++ buf = (const gdb_byte*)gprs + regsize * regs->pc; +++ regcache->raw_supply (regs->pc, (const void *)buf); ++ -++ int region_ok_for_hw_watchpoint (CORE_ADDR, int) override; -++ -++ const struct target_desc *read_description () override; -++ -++ enum target_xfer_status xfer_partial (enum target_object object, -++ const char *annex, gdb_byte *readbuf, -++ const gdb_byte *writebuf, -++ ULONGEST offset, ULONGEST len, -++ ULONGEST *xfered_len) override; -++ -++protected: -++ CORE_ADDR register_u_offset (struct gdbarch *gdbarch, int regno, -++ int store_p) override; -++ -++ void low_new_thread (struct lwp_info *lp) override; -++}; -++ -++const struct target_desc * -++loongarch_linux_nat_target::read_description () -++{ -++ return loongarch_linux_read_description_runtime (inferior_ptid.pid ()); -++} -++ -++/* Fill GDB's register array with the general-purpose, orig_a0, pc and badv -++ register values from the current thread. */ -++ -++static void -++fetch_gregs_from_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_gregset_t regset; -++ -++ if ((regno == -1) || (regs->r <= regno && regno < regs->r + 32) || -++ (regs->orig_a0 == regno) || (regs->pc == regno) || -++ (regs->badv == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get NT_PRSTATUS registers")); -++ else -++ loongarch_elf_gregset.supply_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ } -++} -++ -++/* Store to the current thread the valid general-purpose, orig_a0, pc and badv -++ register values in the GDB's register array. */ -++ -++static void -++store_gregs_to_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_gregset_t regset; -++ -++ if ((regno == -1) || (regs->r <= regno && regno < regs->r + 32) || -++ (regs->orig_a0 == regno) || (regs->pc == regno) || -++ (regs->badv == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get NT_PRSTATUS registers")); -++ else -++ { -++ loongarch_elf_gregset.collect_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ if (ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't set NT_PRSTATUS registers")); -++ } -++ } -++} -++ -++/* Fill GDB's register array with the fp, fcc and fcsr -++ register values from the current thread. */ -++ -++static void -++fetch_fpregs_from_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_fpregset_t regset; -++ -++ if ((regno == -1) || (regs->f <= regno && regno < regs->f + 32) || -++ (regs->fcc <= regno && regno < regs->fcc + 8) || (regs->fcsr == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get NT_FPREGSET registers")); -++ else -++ loongarch_elf_fpregset.supply_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ } -++} -++ -++/* Store to the current thread the valid fp, fcc and fcsr -++ register values in the GDB's register array. */ -++ -++static void -++store_fpregs_to_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_fpregset_t regset; -++ -++ if ((regno == -1) || (regs->f <= regno && regno < regs->f + 32) || -++ (regs->fcc <= regno && regno < regs->fcc + 8) || (regs->fcsr == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get NT_FPREGSET registers")); -++ else -++ { -++ loongarch_elf_fpregset.collect_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ if (ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't set NT_FPREGSET registers")); -++ } -++ } -++} -++ -++/* Fill GDB's register array with the Binary Translation -++ register values from the current thread. */ -++ -++static void -++fetch_lbtregs_from_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lbtregset_t regset; -++ -++ if ((regno == -1) || (regs->scr <= regno && regno < regs->scr + 4) || -++ (regs->EFLAG == regno) || (regs->x86_top == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LBT, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LBT registers")); -++ else -++ loongarch_elf_lbtregset.supply_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ } -++} -++ -++/* Store to the current thread the valid Binary Translation -++ register values in the GDB's register array. */ -++ -++static void -++store_lbtregs_to_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lbtregset_t regset; -++ -++ if ((regno == -1) || (regs->scr <= regno && regno < regs->scr + 4) || -++ (regs->EFLAG == regno) || (regs->x86_top == regno)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LBT, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LBT registers")); -++ else -++ { -++ loongarch_elf_lbtregset.collect_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ if (ptrace (PTRACE_SETREGSET, tid, NT_LARCH_LBT, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't set LBT registers")); -++ } -++ } -++} -++ -++/* Fill GDB's register array with the SIMD eXtension -++ register values from the current thread. */ -++ -++static void -++fetch_lsxregs_from_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lsxregset_t regset; -++ -++ if ((regno == -1) || (regs->vr <= regno && regno < regs->vr + 32)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LSX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LSX registers")); -++ else -++ loongarch_elf_lsxregset.supply_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ } -++} -++ -++/* Store to the current thread the valid SIMD eXtension -++ register values in the GDB's register array. */ -++ -++static void -++store_lsxregs_to_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lsxregset_t regset; -++ -++ if ((regno == -1) || (regs->vr <= regno && regno < regs->vr + 32)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LSX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LSX registers")); -++ else -++ { -++ loongarch_elf_lsxregset.collect_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ if (ptrace (PTRACE_SETREGSET, tid, NT_LARCH_LSX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't set LSX registers")); -++ } -++ } -++} -++ -++/* Fill GDB's register array with the Advanced SIMD eXtension -++ register values from the current thread. */ -++ -++static void -++fetch_lasxregs_from_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lasxregset_t regset; -++ -++ if ((regno == -1) || (regs->xr <= regno && regno < regs->xr + 32)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LASX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LASX registers")); -++ else -++ loongarch_elf_lasxregset.supply_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ } -++} -++ -++/* Store to the current thread the valid Advanced SIMD eXtension -++ register values in the GDB's register array. */ -++ -++static void -++store_lasxregs_to_thread (struct regcache *regcache, int regno, pid_t tid) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ loongarch_elf_lasxregset_t regset; -++ -++ if ((regno == -1) || (regs->xr <= regno && regno < regs->xr + 32)) -++ { -++ struct iovec iovec = { .iov_base = ®set, .iov_len = sizeof (regset) }; -++ -++ if (ptrace (PTRACE_GETREGSET, tid, NT_LARCH_LSX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't get LSX registers")); -++ else -++ { -++ loongarch_elf_lsxregset.collect_regset (NULL, regcache, regno, ®set, -++ sizeof (regset)); -++ if (ptrace (PTRACE_SETREGSET, tid, NT_LARCH_LSX, (long) &iovec) < 0) -++ perror_with_name (_("Couldn't set LSX registers")); -++ } -++ } -++} -++ -++/* Implement the "fetch_registers" target_ops method. */ -++ -++void -++loongarch_linux_nat_target::fetch_registers (struct regcache *regcache, -++ int regno) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ pid_t tid = get_ptrace_pid (regcache->ptid ()); -++ -++ fetch_gregs_from_thread(regcache, regno, tid); -++ -++ if (regs->f > 0) -++ fetch_fpregs_from_thread(regcache, regno, tid); -++ -++ if (regs->scr > 0) -++ fetch_lbtregs_from_thread(regcache, regno, tid); -++ -++ if (regs->vr > 0) -++ fetch_lsxregs_from_thread(regcache, regno, tid); -++ -++ if (regs->xr > 0) -++ fetch_lasxregs_from_thread(regcache, regno, tid); -++} -++ -++/* Implement the "store_registers" target_ops method. */ -++ -++void -++loongarch_linux_nat_target::store_registers (struct regcache *regcache, -++ int regno) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ pid_t tid = get_ptrace_pid (regcache->ptid ()); -++ -++ store_gregs_to_thread(regcache, regno, tid); -++ -++ if (regs->f > 0) -++ store_fpregs_to_thread(regcache, regno, tid); -++ -++ if (regs->scr > 0) -++ store_lbtregs_to_thread(regcache, regno, tid); -++ -++ if (regs->vr > 0) -++ store_lsxregs_to_thread(regcache, regno, tid); -++ -++ if (regs->xr > 0) -++ store_lasxregs_to_thread(regcache, regno, tid); -++} -++ -++/* Return the address in the core dump or inferior of register REGNO. */ -++ -++CORE_ADDR -++loongarch_linux_nat_target::register_u_offset (struct gdbarch *gdbarch, -++ int regno, int store_p) -++{ -++ auto regs = &gdbarch_tdep (gdbarch)->regs; -++ /* according to */ -++ if (0 <= regs->r && regs->r <= regno && regno < regs->r + GPR_NUM) -++ return GPR_BASE + regno - regs->r; -++ else if (regs->pc == regno) -++ return PC; -++ return -1; -++} -++ -++/* Implement the to_xfer_partial target_ops method. */ -++ -++enum target_xfer_status -++loongarch_linux_nat_target::xfer_partial (enum target_object object, -++ const char *annex, gdb_byte *readbuf, -++ const gdb_byte *writebuf, -++ ULONGEST offset, ULONGEST len, -++ ULONGEST *xfered_len) -++{ -++ pid_t pid = inferior_ptid.pid (); -++ -++ if (object != TARGET_OBJECT_LARCH) -++ return linux_nat_trad_target::xfer_partial ( -++ object, annex, readbuf, writebuf, offset, len, xfered_len); -++ -++ if (strcmp (annex, "cpucfg") == 0) -++ { -++ if (writebuf) -++ return TARGET_XFER_E_IO; -++ if (offset % 4 != 0 || offset % 4 != 0) -++ return TARGET_XFER_E_IO; -++ char t_buf[offset + len]; -++ struct iovec iovec = { .iov_base = &t_buf, .iov_len = sizeof (t_buf) }; -++ if (ptrace (PTRACE_GETREGSET, pid, NT_LARCH_CPUCFG, &iovec) < 0) -++ { -++ size_t i; -++ for (i = offset / 4; i < (offset + len) / 4 + 1; i++) -++ ((uint32_t *) t_buf)[i] = loongarch_cpucfg (i); -++ } -++ memcpy (readbuf, t_buf + offset, len); -++ *xfered_len = len; -++ return TARGET_XFER_OK; -++ } -++ -++ return TARGET_XFER_E_IO; -++} -++ -++static loongarch_linux_nat_target the_loongarch_linux_nat_target; -++ -++/* Wrapper functions. These are only used by libthread_db. */ -++ -++void -++supply_gregset (struct regcache *regcache, -++ const gdb_gregset_t /* elf_gregset_t */ *gregset) -++{ -++ loongarch_elf_gregset.supply_regset (NULL, regcache, -1, gregset, -++ sizeof (gdb_gregset_t)); -++} -++ -++void -++fill_gregset (const struct regcache *regcache, -++ gdb_gregset_t /* elf_gregset_t */ *gregset, int regno) -++{ -++ loongarch_elf_gregset.collect_regset (NULL, regcache, regno, gregset, -++ sizeof (gdb_gregset_t)); -++} -++ -++void -++supply_fpregset (struct regcache *regcache, -++ const gdb_fpregset_t /* elf_fpregset_t */ *fpregset) -++{ -++ loongarch_elf_fpregset.supply_regset (NULL, regcache, -1, fpregset, -++ sizeof (gdb_fpregset_t)); -++} -++ -++void -++fill_fpregset (const struct regcache *regcache, -++ gdb_fpregset_t /* elf_fpregset_t */ *fpregset, int regno) -++{ -++ loongarch_elf_fpregset.collect_regset (NULL, regcache, regno, fpregset, -++ sizeof (gdb_fpregset_t)); -++} -++ -++/* -1 if the kernel and/or CPU do not support watch registers. -++ 1 if watch_readback is valid and we can read style, num_valid -++ and the masks. -++ 0 if we need to read the watch_readback. */ -++ -++static int watch_readback_valid; -++ -++/* Cached watch register read values. */ -++ -++static struct pt_watch_regs watch_readback = -++{ -++ .max_valid = MAX_DEBUG_REGISTER, -++}; -++ -++static struct loongarch_watchpoint *current_watches; -++ -++/* The current set of watch register values for writing the -++ registers. */ -++ -++static struct pt_watch_regs watch_mirror = -++{ -++ .max_valid = MAX_DEBUG_REGISTER, -++}; -++ -++static void -++loongarch_show_dr (const char *func, CORE_ADDR addr, int len, -++ enum target_hw_bp_type type) -++{ -++ int i; -++ -++ puts_unfiltered (func); -++ if (addr || len) -++ printf_unfiltered ( -++ " (addr=%s, len=%d, type=%s)", paddress (target_gdbarch (), addr), len, -++ type == hw_write -++ ? "data-write" -++ : (type == hw_read -++ ? "data-read" -++ : (type == hw_access ? "data-read/write" -++ : (type == hw_execute ? "instruction-execute" -++ : "??unknown??")))); -++ puts_unfiltered (":\n"); -++ -++ for (i = 0; i < MAX_DEBUG_REGISTER; i++) -++ printf_unfiltered ( -++ "\tDR%d: addr=%s, mask=%s\n", i, -++ paddress (target_gdbarch (), -++ loongarch_linux_watch_get_addr (&watch_mirror, i)), -++ paddress (target_gdbarch (), -++ loongarch_linux_watch_get_mask (&watch_mirror, i))); -++} -++ -++/* Target to_can_use_hw_breakpoint implementation. Return 1 if we can -++ handle the specified watch type. */ -++ -++int -++loongarch_linux_nat_target::can_use_hw_breakpoint (enum bptype type, int cnt, -++ int ot) -++{ -++ int i; -++ uint32_t wanted_mask, irw_mask; -++ long lwp = inferior_ptid.lwp (); -++ -++ if (!loongarch_linux_read_watch_registers (lwp, &watch_readback, -++ &watch_readback_valid, 0)) -++ return 0; -++ -++ switch (type) -++ { -++ case bp_hardware_watchpoint: -++ wanted_mask = W_MASK; -++ break; -++ case bp_read_watchpoint: -++ wanted_mask = R_MASK; -++ break; -++ case bp_access_watchpoint: -++ wanted_mask = R_MASK | W_MASK; -++ break; -++ case bp_hardware_breakpoint: -++ wanted_mask = I_MASK; -++ break; -++ default: -++ return 0; -++ } -++ -++ for (i = 0; i < loongarch_linux_watch_get_num_valid (&watch_readback) && cnt; -++ i++) -++ { -++ irw_mask = loongarch_linux_watch_get_irwmask (&watch_readback, i); -++ if ((irw_mask & wanted_mask) == wanted_mask) -++ cnt--; -++ } -++ return (cnt == 0) ? 1 : 0; -++} -++ -++/* Target to_stopped_by_watchpoint implementation. Return 1 if -++ stopped by watchpoint. The watchhi R and W bits indicate the watch -++ register triggered. */ -++ -++bool -++loongarch_linux_nat_target::stopped_by_watchpoint () -++{ -++ int n; -++ int num_valid; -++ -++ if (!loongarch_linux_read_watch_registers ( -++ inferior_ptid.lwp (), &watch_readback, &watch_readback_valid, 1)) -++ return false; -++ -++ num_valid = loongarch_linux_watch_get_num_valid (&watch_readback); -++ -++ for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++) -++ if (loongarch_linux_watch_get_irwstat (&watch_readback, n) -++ & (R_MASK | W_MASK)) -++ return true; -++ -++ return false; -++} -++ -++/* Target to_stopped_data_address implementation. Set the address -++ where the watch triggered (if known). Return 1 if the address was -++ known. */ -++ -++bool -++loongarch_linux_nat_target::stopped_data_address (CORE_ADDR *paddr) -++{ -++ int num_valid, n; -++ if (!loongarch_linux_read_watch_registers ( -++ inferior_ptid.lwp (), &watch_readback, &watch_readback_valid, 1)) -++ return false; -++ -++ num_valid = loongarch_linux_watch_get_num_valid (&watch_readback); -++ -++ for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++) -++ if (loongarch_linux_watch_get_irwstat (&watch_readback, n) -++ & (R_MASK | W_MASK)) -++ { -++ CORE_ADDR t_addr, t_mask; -++ int t_irw; -++ struct loongarch_watchpoint *watch; -++ -++ t_addr = loongarch_linux_watch_get_addr (&watch_readback, n); -++ t_irw = loongarch_linux_watch_get_irw (&watch_readback, n) & IRW_MASK; -++ t_mask = loongarch_linux_watch_get_mask (&watch_readback, n); -++ -++ for (watch = current_watches; watch != NULL; watch = watch->next) -++ { -++ CORE_ADDR addr = watch->addr; -++ CORE_ADDR last_byte = addr + watch->len - 1; -++ -++ if ((t_irw & loongarch_linux_watch_type_to_irw (watch->type)) == 0) -++ { -++ /* Different type. */ -++ continue; -++ } -++ /* Check for overlap of even a single byte. */ -++ if (last_byte >= t_addr && addr <= t_addr + t_mask) -++ { -++ *paddr = addr; -++ return true; -++ } -++ } -++ } -++ return false; -++} -++ -++/* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if -++ the specified region can be covered by the watch registers. */ -++ -++int -++loongarch_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, -++ int len) -++{ -++ struct pt_watch_regs dummy_regs; -++ int i; -++ -++ if (!loongarch_linux_read_watch_registers ( -++ inferior_ptid.lwp (), &watch_readback, &watch_readback_valid, 0)) -++ return 0; -++ -++ dummy_regs = watch_readback; -++ /* Clear them out. */ -++ for (i = 0; i < loongarch_linux_watch_get_num_valid (&dummy_regs); i++) -++ { -++ loongarch_linux_watch_set_addr (&dummy_regs, i, 0); -++ loongarch_linux_watch_set_mask (&dummy_regs, i, 0); -++ loongarch_linux_watch_set_irw (&dummy_regs, i, 0); -++ } -++ return loongarch_linux_watch_try_one_watch (&dummy_regs, addr, len, 0); -++} -++ -++/* Write the mirrored watch register values for each thread. */ -++ -++static int -++write_watchpoint_regs (void) -++{ -++ struct lwp_info *lp; -++ int tid; -++ -++ ALL_LWPS (lp) -++ { -++ tid = lp->ptid.lwp (); -++ if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1) -++ perror_with_name (_ ("Couldn't write debug register")); -++ } -++ return 0; -++} -++ -++/* linux_nat_target::low_new_thread implementation. */ -++ -++void -++loongarch_linux_nat_target::low_new_thread (struct lwp_info *lp) -++{ -++ long tid = lp->ptid.lwp (); -++ -++ if (!loongarch_linux_read_watch_registers (tid, &watch_readback, -++ &watch_readback_valid, 0)) -++ return; -++ -++ if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1) -++ perror_with_name (_ ("Couldn't write debug register")); -++} -++ -++/* Target to_insert_watchpoint implementation. Try to insert a new -++ watch. Return zero on success. */ -++ -++int -++loongarch_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len, -++ enum target_hw_bp_type type, -++ struct expression *cond) -++{ -++ struct pt_watch_regs regs = -++ { -++ .max_valid = MAX_DEBUG_REGISTER, -++ }; -++ struct loongarch_watchpoint *new_watch; -++ struct loongarch_watchpoint **pw; -++ -++ int retval; -++ -++ if (!loongarch_linux_read_watch_registers ( -++ inferior_ptid.lwp (), &watch_readback, &watch_readback_valid, 0)) -++ return -1; -++ -++ if (len <= 0) -++ return -1; -++ -++ regs = watch_readback; -++ /* Add the current watches. */ -++ loongarch_linux_watch_populate_regs (current_watches, ®s); -++ -++ /* Now try to add the new watch. */ -++ if (!loongarch_linux_watch_try_one_watch ( -++ ®s, addr, len, loongarch_linux_watch_type_to_irw (type))) -++ return -1; -++ -++ /* It fit. Stick it on the end of the list. */ -++ new_watch = XNEW (struct loongarch_watchpoint); -++ new_watch->addr = addr; -++ new_watch->len = len; -++ new_watch->type = type; -++ new_watch->next = NULL; -++ -++ pw = ¤t_watches; -++ while (*pw != NULL) -++ pw = &(*pw)->next; -++ *pw = new_watch; -++ -++ watch_mirror = regs; -++ retval = write_watchpoint_regs (); -++ -++ if (show_debug_regs) -++ loongarch_show_dr ("insert_watchpoint", addr, len, type); -++ -++ return retval; -++} -++ -++/* Target to_remove_watchpoint implementation. Try to remove a watch. -++ Return zero on success. */ -++ -++int -++loongarch_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len, -++ enum target_hw_bp_type type, -++ struct expression *cond) -++{ -++ int retval; -++ int deleted_one; -++ -++ struct loongarch_watchpoint **pw; -++ struct loongarch_watchpoint *w; -++ -++ /* Search for a known watch that matches. Then unlink and free -++ it. */ -++ deleted_one = 0; -++ pw = ¤t_watches; -++ while ((w = *pw)) -++ { -++ if (w->addr == addr && w->len == len && w->type == type) -++ { -++ *pw = w->next; -++ xfree (w); -++ deleted_one = 1; -++ break; -++ } -++ pw = &(w->next); -++ } -++ -++ if (!deleted_one) -++ return -1; /* We don't know about it, fail doing nothing. */ -++ -++ /* At this point watch_readback is known to be valid because we -++ could not have added the watch without reading it. */ -++ gdb_assert (watch_readback_valid == 1); -++ -++ watch_mirror = watch_readback; -++ loongarch_linux_watch_populate_regs (current_watches, &watch_mirror); -++ -++ retval = write_watchpoint_regs (); -++ -++ if (show_debug_regs) -++ loongarch_show_dr ("remove_watchpoint", addr, len, type); -++ -++ return retval; -++} -++ -++/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. -++ Return 0 on success, -1 on failure. */ -++ -++int -++loongarch_linux_nat_target::insert_hw_breakpoint ( -++ struct gdbarch *gdbarch, struct bp_target_info *bp_tgt) -++{ -++ int ret; -++ CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; -++ int len = 4; -++ const enum target_hw_bp_type type = hw_execute; -++ -++ gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); -++ -++ if (show_debug_regs) -++ fprintf_unfiltered ( -++ gdb_stdlog, "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", -++ (unsigned long) addr, len); -++ -++ ret = insert_watchpoint (addr, len, type, NULL); -++ return ret; -++} -++ -++/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. -++ Return 0 on success, -1 on failure. */ -++ -++int -++loongarch_linux_nat_target::remove_hw_breakpoint ( -++ struct gdbarch *gdbarch, struct bp_target_info *bp_tgt) -++{ -++ int ret; -++ CORE_ADDR addr = bp_tgt->placed_address; -++ int len = 4; -++ const enum target_hw_bp_type type = hw_execute; -++ -++ gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); -++ -++ if (show_debug_regs) -++ fprintf_unfiltered ( -++ gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", -++ (unsigned long) addr, len); -++ -++ ret = remove_watchpoint (addr, len, type, NULL); -++ -++ return ret; -++} -++ -++/* Target to_close implementation. Free any watches and call the -++ super implementation. */ -++ -++void -++loongarch_linux_nat_target::close () -++{ -++ struct loongarch_watchpoint *w; -++ struct loongarch_watchpoint *nw; -++ -++ /* Clean out the current_watches list. */ -++ w = current_watches; -++ while (w) -++ { -++ nw = w->next; -++ xfree (w); -++ w = nw; -++ } -++ current_watches = NULL; -++ -++ linux_nat_trad_target::close (); -++} -++ -++void _initialize_loongarch_linux_nat (); -++void -++_initialize_loongarch_linux_nat () -++{ -++ add_setshow_boolean_cmd ( -++ "show-debug-regs", class_maintenance, &show_debug_regs, _ ("\ -++Set whether to show variables that mirror the LoongArch debug registers."), -++ _ ("\ -++Show whether to show variables that mirror the LoongArch debug registers."), -++ _ ("\ -++Use \"on\" to enable, \"off\" to disable.\n\ -++If enabled, the debug registers values are shown when GDB inserts\n\ -++or removes a hardware breakpoint or watchpoint, and when the inferior\n\ -++triggers a breakpoint or watchpoint."), -++ NULL, NULL, &maintenance_set_cmdlist, &maintenance_show_cmdlist); -++ -++ linux_target = &the_loongarch_linux_nat_target; -++ add_inf_child_target (&the_loongarch_linux_nat_target); -++} -+diff --git gdb-10.2/gdb/loongarch-linux-tdep.c gdb-10.2/gdb/loongarch-linux-tdep.c -+new file mode 100644 -+index 0000000..5daabe3 -+--- /dev/null -++++ gdb-10.2/gdb/loongarch-linux-tdep.c -+@@ -0,0 +1,709 @@ -++/* Target-dependent code for GNU/Linux LoongArch. -++ -++ Copyright (C) 2021 Free Software Foundation, Inc. -++ Contributed by Loongson Ltd. -++ -++ This file is part of GDB. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++#include "defs.h" -++#include "inferior.h" -++#include "gdbcore.h" -++#include "target.h" -++#include "solib-svr4.h" -++#include "osabi.h" -++#include "loongarch-tdep.h" -++#include "frame.h" -++#include "regcache.h" -++#include "trad-frame.h" -++#include "tramp-frame.h" -++#include "gdbtypes.h" -++#include "objfiles.h" -++#include "solib.h" -++#include "solist.h" -++#include "symtab.h" -++#include "target-descriptions.h" -++#include "loongarch-linux-tdep.h" -++#include "glibc-tdep.h" -++#include "linux-tdep.h" -++#include "xml-syscall.h" -++#include "gdbsupport/gdb_signals.h" -++ -++static void -++loongarch_supply_elf_gregset (const struct regset *r, -++ struct regcache *regcache, int regno, -++ const void *gprs, size_t len) -++{ -++ auto regs = &gdbarch_tdep (regcache->arch ())->regs; -++ gdb_assert (0 <= regs->r && sizeof (loongarch_elf_gregset_t) <= len); -++ -++ int regsize = register_size (regcache->arch (), regs->r); -++ const gdb_byte *buf = NULL; -++ -++ if (regno == -1) -++ { -++ /* Set $r0 = 0. */ -++ regcache->raw_supply_zeroed (regs->r); -++ -++ for (int i = 1; i < 32; i++) -++ { -++ buf = (const gdb_byte*)gprs + regsize * i; -++ regcache->raw_supply (regs->r + i, (const void *)buf); -++ } -++ -++ /* Size base (orig_a0) = regsize * regs->orig_a0. */ -++ buf = (const gdb_byte*)gprs + regsize * regs->orig_a0; -++ regcache->raw_supply (regs->orig_a0, (const void *)buf); -++ -++ /* Size base (pc) = regsize * regs->pc. */ -++ buf = (const gdb_byte*)gprs + regsize * regs->pc; -++ regcache->raw_supply (regs->pc, (const void *)buf); -++ -++ /* Size base (badv) = regsize * regs->badv. */ -++ buf = (const gdb_byte*)gprs + regsize * regs->badv; -++ regcache->raw_supply (regs->badv, (const void *)buf); -++ } -++ else if (regs->r == regno) -++ regcache->raw_supply_zeroed (regno); -++ else if ((regs->r < regno && regno < regs->r + 32) -++ || (regs->orig_a0 == regno) -++ || (regs->pc == regno) -++ || (regs->badv == regno)) -++ { -++ /* Offset offset (regno) = regsize * (regno - regs->r). */ -++ buf = (const gdb_byte*)gprs + regsize * (regno - regs->r); -++ regcache->raw_supply (regno, (const void *)buf); -++ } -++} +++ /* Size base (badv) = regsize * regs->badv. */ +++ buf = (const gdb_byte*)gprs + regsize * regs->badv; +++ regcache->raw_supply (regs->badv, (const void *)buf); +++ } +++ else if (regs->r == regno) +++ regcache->raw_supply_zeroed (regno); +++ else if ((regs->r < regno && regno < regs->r + 32) +++ || (regs->orig_a0 == regno) +++ || (regs->pc == regno) +++ || (regs->badv == regno)) +++ { +++ /* Offset offset (regno) = regsize * (regno - regs->r). */ +++ buf = (const gdb_byte*)gprs + regsize * (regno - regs->r); +++ regcache->raw_supply (regno, (const void *)buf); +++ } +++} ++ ++static void ++loongarch_fill_elf_gregset (const struct regset *r, @@ -10336,10 +9136,7 @@ index 0000000..036833e ++ gdbarch_register_osabi (bfd_arch_loongarch, bfd_mach_loongarch64, ++ GDB_OSABI_LINUX, loongarch_linux_init_abi); ++} -+diff --git gdb-10.2/gdb/loongarch-linux-tdep.h gdb-10.2/gdb/loongarch-linux-tdep.h -+new file mode 100644 -+index 0000000..bb70043 -+--- /dev/null ++--- gdb-10.2/gdb/loongarch-linux-tdep.h.orig ++++ gdb-10.2/gdb/loongarch-linux-tdep.h +@@ -0,0 +1,48 @@ ++/* GNU/Linux on LoongArch target support, prototypes. @@ -10390,10 +9187,7 @@ index 0000000..036833e ++extern const struct regset loongarch_elf_lasxregset; ++ ++#endif -+diff --git gdb-10.2/gdb/loongarch-tdep.c gdb-10.2/gdb/loongarch-tdep.c -+new file mode 100644 -+index 0000000..422c80b -+--- /dev/null ++--- gdb-10.2/gdb/loongarch-tdep.c.orig ++++ gdb-10.2/gdb/loongarch-tdep.c +@@ -0,0 +1,1926 @@ ++/* Target-dependent code for GNU/Linux LoongArch. @@ -12322,10 +11116,7 @@ index 0000000..036833e ++When non-zero, loongarch specific debugging is enabled."), ++ NULL, NULL, &setdebuglist, &showdebuglist); ++} -+diff --git gdb-10.2/gdb/loongarch-tdep.h gdb-10.2/gdb/loongarch-tdep.h -+new file mode 100644 -+index 0000000..12bc78e -+--- /dev/null ++--- gdb-10.2/gdb/loongarch-tdep.h.orig ++++ gdb-10.2/gdb/loongarch-tdep.h +@@ -0,0 +1,61 @@ ++/* Target-dependent code for GNU/Linux LoongArch. @@ -12348,524 +11139,48 @@ index 0000000..036833e ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ -++#ifndef LOONGARCH_TDEP_H -++#define LOONGARCH_TDEP_H -++ -++#include "arch/loongarch.h" -++ -++/* Register numbers of important registers. Note that most of -++ these values are "real" register numbers, and correspond to the -++ general registers of the machine. */ -++#define LOONGARCH_A0_REGNUM 4 /* Loc of first arg */ -++ -++struct gdbarch_tdep -++{ -++ int ef_abi; /* EF_LOONGARCH_ABI */ -++ -++ struct -++ { -++ int r; -++ int ra; -++ int sp; -++ int orig_a0; -++ int pc; -++ int badv; -++ -++ int f; -++ int fcc; -++ int fcsr; -++ int vr; -++ int xr; -++ -++ int scr; -++ int EFLAG; -++ int x86_top; -++ -++ } regs; -++ -++ /* Return the expected next PC if FRAME is stopped at a syscall -++ instruction. */ -++ CORE_ADDR (*syscall_next_pc) (struct frame_info *frame); -++}; -++ -++#endif /* LOONGARCH_TDEP_H */ -+diff --git gdb-10.2/gdb/nat/loongarch-linux-watch.c gdb-10.2/gdb/nat/loongarch-linux-watch.c -+new file mode 100644 -+index 0000000..f7c0dbf -+--- /dev/null -++++ gdb-10.2/gdb/nat/loongarch-linux-watch.c -+@@ -0,0 +1,330 @@ -++/* Copyright (C) 2021 Free Software Foundation, Inc. -++ Contributed by Loongson Ltd. -++ -++ This file is part of GDB. -++ -++ Based on MIPS target. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++#include "gdbsupport/common-defs.h" -++#include "nat/gdb_ptrace.h" -++#include "loongarch-linux-watch.h" -++ -++/* Assuming usable watch registers REGS, return the irwmask of -++ register N. */ -++ -++uint8_t -++loongarch_linux_watch_get_irwmask (struct pt_watch_regs *regs, int n) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ return regs->la32[n].irwmask & IRW_MASK; -++ case pt_watch_style_la64: -++ return regs->la64[n].irwmask & IRW_MASK; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, return the irwstat of -++ register N. */ -++ -++uint8_t -++loongarch_linux_watch_get_irwstat (struct pt_watch_regs *regs, int n) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ return regs->la32[n].irwstat & IRW_MASK; -++ case pt_watch_style_la64: -++ return regs->la64[n].irwstat & IRW_MASK; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, return the num_valid. */ -++ -++uint32_t -++loongarch_linux_watch_get_num_valid (struct pt_watch_regs *regs) -++{ -++ return regs->num_valid; -++} -++ -++/* Assuming usable watch registers REGS, return the addr of -++ register N. */ -++ -++CORE_ADDR -++loongarch_linux_watch_get_addr (struct pt_watch_regs *regs, int n) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ return regs->la32[n].addr; -++ case pt_watch_style_la64: -++ return regs->la64[n].addr; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, set addr of register N to -++ VALUE. */ -++ -++void -++loongarch_linux_watch_set_addr (struct pt_watch_regs *regs, int n, -++ CORE_ADDR value) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ /* The cast will never throw away bits as 64 bit addresses can -++ never be used on a 32 bit kernel. */ -++ regs->la32[n].addr = (uint32_t) value; -++ break; -++ case pt_watch_style_la64: -++ regs->la64[n].addr = value; -++ break; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, return the mask of -++ register N. */ -++ -++CORE_ADDR -++loongarch_linux_watch_get_mask (struct pt_watch_regs *regs, int n) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ return regs->la32[n].mask; -++ case pt_watch_style_la64: -++ return regs->la64[n].mask; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, set mask of register N to -++ VALUE. */ -++ -++void -++loongarch_linux_watch_set_mask (struct pt_watch_regs *regs, int n, -++ CORE_ADDR value) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ regs->la32[n].mask = value; -++ break; -++ case pt_watch_style_la64: -++ regs->la64[n].mask = value; -++ break; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, return the irw of -++ register N. */ -++ -++uint8_t -++loongarch_linux_watch_get_irw (struct pt_watch_regs *regs, int n) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ return regs->la32[n].irw; -++ case pt_watch_style_la64: -++ return regs->la64[n].irw; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Assuming usable watch registers REGS, set irw of register N to -++ VALUE. */ -++ -++void -++loongarch_linux_watch_set_irw (struct pt_watch_regs *regs, int n, -++ uint8_t value) -++{ -++ switch (regs->style) -++ { -++ case pt_watch_style_la32: -++ regs->la32[n].irw = value; -++ break; -++ case pt_watch_style_la64: -++ regs->la64[n].irw = value; -++ break; -++ default: -++ internal_error (__FILE__, __LINE__, -++ _ ("Unrecognized watch register style")); -++ } -++} -++ -++/* Read the watch registers of process LWPID and store it in -++ WATCH_READBACK. Save true to *WATCH_READBACK_VALID if watch -++ registers are valid. Return 1 if watch registers are usable. -++ Cached information is used unless FORCE is true. */ -++ -++int -++loongarch_linux_read_watch_registers (long lwpid, -++ struct pt_watch_regs *watch_readback, -++ int *watch_readback_valid, int force) -++{ -++ if (force || *watch_readback_valid == 0) -++ { -++ if (ptrace (PTRACE_GET_WATCH_REGS, lwpid, watch_readback, NULL) == -1) -++ { -++ *watch_readback_valid = -1; -++ return 0; -++ } -++ if (watch_readback->num_valid == 0) -++ { -++ *watch_readback_valid = -1; -++ return 0; -++ } -++ /* Watch registers appear to be usable. */ -++ *watch_readback_valid = 1; -++ } -++ return (*watch_readback_valid == 1) ? 1 : 0; -++} -++ -++/* Convert GDB's TYPE to an IRW mask. */ -++ -++uint32_t -++loongarch_linux_watch_type_to_irw (enum target_hw_bp_type type) -++{ -++ switch (type) -++ { -++ case hw_write: -++ return W_MASK; -++ case hw_read: -++ return R_MASK; -++ case hw_access: -++ return (W_MASK | R_MASK); -++ case hw_execute: -++ return I_MASK; -++ default: -++ return 0; -++ } -++} -++ -++/* Set any low order bits in MASK that are not set. */ -++ -++static CORE_ADDR -++fill_mask (CORE_ADDR mask) -++{ -++ CORE_ADDR f = 1; -++ -++ while (f && f < mask) -++ { -++ mask |= f; -++ f <<= 1; -++ } -++ return mask; -++} -++ -++/* Try to add a single watch to the specified registers REGS. The -++ address of added watch is ADDR, the length is LEN, and the mask -++ is IRW. Return 1 on success, 0 on failure. */ -++ -++int -++loongarch_linux_watch_try_one_watch (struct pt_watch_regs *regs, -++ CORE_ADDR addr, int len, uint32_t irw) -++{ -++ CORE_ADDR base_addr, last_byte; -++ CORE_ADDR mask_bits, t_addr, t_mask; -++ uint8_t t_irw; -++ int i; -++ -++ if (len <= 0) -++ return 0; -++ -++ last_byte = addr + len - 1; -++ mask_bits = fill_mask (addr ^ last_byte); -++ base_addr = addr & ~mask_bits; -++ -++ /* Check to see if it is covered by current registers. */ -++ for (i = 0; i < loongarch_linux_watch_get_num_valid (regs); i++) -++ { -++ t_addr = loongarch_linux_watch_get_addr (regs, i); -++ t_irw = loongarch_linux_watch_get_irw (regs, i); -++ if (t_addr != 0 && irw == ((uint32_t) t_irw & irw)) -++ { -++ t_mask = loongarch_linux_watch_get_mask (regs, i); -++ if (addr >= t_addr && last_byte <= (t_addr + t_mask)) -++ return 1; -++ } -++ } -++ /* Try to find an empty register. */ -++ for (i = 0; i < loongarch_linux_watch_get_num_valid (regs); i++) -++ { -++ t_addr = loongarch_linux_watch_get_addr (regs, i); -++ if (t_addr == 0 -++ && irw == (loongarch_linux_watch_get_irwmask (regs, i) & irw)) -++ { -++ /* It fits, we'll take it. */ -++ loongarch_linux_watch_set_addr (regs, i, base_addr); -++ loongarch_linux_watch_set_mask (regs, i, mask_bits); -++ loongarch_linux_watch_set_irw (regs, i, irw); -++ return 1; -++ } -++ } -++ /* It didn't fit anywhere, we failed. */ -++ return 0; -++} -++ -++/* Fill in the watch registers REGS with the currently cached -++ watches CURRENT_WATCHES. */ -++ -++void -++loongarch_linux_watch_populate_regs ( -++ struct loongarch_watchpoint *current_watches, struct pt_watch_regs *regs) -++{ -++ struct loongarch_watchpoint *w; -++ int i; -++ -++ /* Clear them out. */ -++ for (i = 0; i < loongarch_linux_watch_get_num_valid (regs); i++) -++ { -++ loongarch_linux_watch_set_addr (regs, i, 0); -++ loongarch_linux_watch_set_mask (regs, i, 0); -++ loongarch_linux_watch_set_irw (regs, i, 0); -++ } -++ -++ w = current_watches; -++ while (w) -++ { -++ uint32_t irw = loongarch_linux_watch_type_to_irw (w->type); -++ -++ i = loongarch_linux_watch_try_one_watch (regs, w->addr, w->len, irw); -++ /* They must all fit, because we previously calculated that they -++ would. */ -++ gdb_assert (i); -++ w = w->next; -++ } -++} -+diff --git gdb-10.2/gdb/nat/loongarch-linux-watch.h gdb-10.2/gdb/nat/loongarch-linux-watch.h -+new file mode 100644 -+index 0000000..ab80b44 -+--- /dev/null -++++ gdb-10.2/gdb/nat/loongarch-linux-watch.h -+@@ -0,0 +1,132 @@ -++/* Copyright (C) 2021 Free Software Foundation, Inc. -++ Contributed by Loongson Ltd. -++ -++ This file is part of GDB. -++ -++ Based on MIPS target. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++#ifndef LOONGARCH_LINUX_WATCH_H -++#define LOONGARCH_LINUX_WATCH_H 1 -++ -++#include -++#include "gdbsupport/break-common.h" -++ -++#define MAX_DEBUG_REGISTER 16 +++#ifndef LOONGARCH_TDEP_H +++#define LOONGARCH_TDEP_H ++ -++/* If macro PTRACE_GET_WATCH_REGS is not defined, kernel header doesn't -++ have hardware watchpoint-related structures. Define them below. */ +++#include "arch/loongarch.h" ++ -++#ifndef PTRACE_GET_WATCH_REGS -++#define PTRACE_GET_WATCH_REGS 0xd0 -++#define PTRACE_SET_WATCH_REGS 0xd1 +++/* Register numbers of important registers. Note that most of +++ these values are "real" register numbers, and correspond to the +++ general registers of the machine. */ +++#define LOONGARCH_A0_REGNUM 4 /* Loc of first arg */ ++ -++enum pt_watch_style +++struct gdbarch_tdep ++{ -++ pt_watch_style_la32, -++ pt_watch_style_la64 -++}; -++ -++/* A value of zero in a watchlo indicates that it is available. */ +++ int ef_abi; /* EF_LOONGARCH_ABI */ ++ -++struct la32_watch_regs -++{ -++ uint32_t addr; -++ /* Lower 16 bits of watchhi. */ -++ uint32_t mask; -++ /* Valid mask and I R W bits. -++ * bit 0 -- 1 if W bit is usable. -++ * bit 1 -- 1 if R bit is usable. -++ * bit 2 -- 1 if I bit is usable. -++ * bits 3 - 11 -- Valid watchhi mask bits. -++ */ -++ uint8_t irw; -++ uint8_t irwstat; -++ uint8_t irwmask; -++ /* There is confusion across gcc versions about structure alignment, -++ so we force 8 byte alignment for these structures so they match -++ the kernel even if it was build with a different gcc version. */ -++} __attribute__ ((aligned (8))); -++ -++struct la64_watch_regs -++{ -++ uint64_t addr; -++ uint64_t mask; -++ uint8_t irw; -++ uint8_t irwstat; -++ uint8_t irwmask; -++} __attribute__ ((aligned (8))); -++ -++struct pt_watch_regs -++{ -++ uint16_t max_valid; -++ uint16_t num_valid; -++ enum pt_watch_style style; -++ union +++ struct ++ { -++ struct la32_watch_regs la32[MAX_DEBUG_REGISTER]; -++ struct la64_watch_regs la64[MAX_DEBUG_REGISTER]; -++ }; -++}; -++ -++#endif /* !PTRACE_GET_WATCH_REGS */ -++ -++#define W_BIT 0 -++#define R_BIT 1 -++#define I_BIT 2 +++ int r; +++ int ra; +++ int sp; +++ int orig_a0; +++ int pc; +++ int badv; ++ -++#define W_MASK (1 << W_BIT) -++#define R_MASK (1 << R_BIT) -++#define I_MASK (1 << I_BIT) +++ int f; +++ int fcc; +++ int fcsr; +++ int vr; +++ int xr; ++ -++#define IRW_MASK (I_MASK | R_MASK | W_MASK) +++ int scr; +++ int EFLAG; +++ int x86_top; ++ -++/* We keep list of all watchpoints we should install and calculate the -++ watch register values each time the list changes. This allows for -++ easy sharing of watch registers for more than one watchpoint. */ +++ } regs; ++ -++struct loongarch_watchpoint -++{ -++ CORE_ADDR addr; -++ int len; -++ enum target_hw_bp_type type; -++ struct loongarch_watchpoint *next; +++ /* Return the expected next PC if FRAME is stopped at a syscall +++ instruction. */ +++ CORE_ADDR (*syscall_next_pc) (struct frame_info *frame); ++}; ++ -++uint32_t loongarch_linux_watch_get_num_valid (struct pt_watch_regs *regs); -++uint8_t loongarch_linux_watch_get_irwmask (struct pt_watch_regs *regs, int n); -++uint8_t loongarch_linux_watch_get_irwstat (struct pt_watch_regs *regs, int n); -++CORE_ADDR loongarch_linux_watch_get_addr (struct pt_watch_regs *regs, int n); -++void loongarch_linux_watch_set_addr (struct pt_watch_regs *regs, int n, -++ CORE_ADDR value); -++CORE_ADDR loongarch_linux_watch_get_mask (struct pt_watch_regs *regs, int n); -++void loongarch_linux_watch_set_mask (struct pt_watch_regs *regs, int n, -++ CORE_ADDR value); -++uint8_t loongarch_linux_watch_get_irw (struct pt_watch_regs *regs, int n); -++void loongarch_linux_watch_set_irw (struct pt_watch_regs *regs, int n, -++ uint8_t value); -++int loongarch_linux_watch_try_one_watch (struct pt_watch_regs *regs, -++ CORE_ADDR addr, int len, -++ uint32_t irw); -++void loongarch_linux_watch_populate_regs ( -++ struct loongarch_watchpoint *current_watches, struct pt_watch_regs *regs); -++uint32_t loongarch_linux_watch_type_to_irw (enum target_hw_bp_type type); -++ -++int loongarch_linux_read_watch_registers (long lwpid, -++ struct pt_watch_regs *watch_readback, -++ int *watch_readback_valid, -++ int force); -++ -++#endif /* #define LOONGARCH_LINUX_WATCH_H */ -+diff --git gdb-10.2/gdb/remote.c gdb-10.2/gdb/remote.c -+index 4896c2a..67a9acd 100644 -+--- gdb-10.2/gdb/remote.c +++#endif /* LOONGARCH_TDEP_H */ ++--- gdb-10.2/gdb/remote.c.orig ++++ gdb-10.2/gdb/remote.c +@@ -1983,6 +1983,8 @@ enum { + PACKET_qXfer_statictrace_read, @@ -12888,9 +11203,9 @@ index 0000000..036833e + PACKET_QPassSignals }, + { "QCatchSyscalls", PACKET_DISABLE, remote_supported_packet, +@@ -11013,6 +11019,18 @@ remote_target::xfer_partial (enum target_object object, -+ return TARGET_XFER_E_IO; ++ return TARGET_XFER_E_IO; + } -+ ++ ++ if (object == TARGET_OBJECT_LARCH) ++ { ++ if (readbuf) @@ -12908,8 +11223,8 @@ index 0000000..036833e + { +@@ -14626,6 +14644,13 @@ Show the maximum size of the address (in bits) in a memory packet."), NULL, + add_packet_config_cmd (&remote_protocol_packets[PACKET_qXfer_uib], -+ "qXfer:uib:read", "unwind-info-block", 0); -+ ++ "qXfer:uib:read", "unwind-info-block", 0); ++ ++ add_packet_config_cmd (&remote_protocol_packets[PACKET_qXfer_loongarch_read], ++ "qXfer:loongarch:read", "read-loongarch-object", 0); ++ @@ -12918,14 +11233,12 @@ index 0000000..036833e ++ "qXfer:loongarch:write", "write-loongarch-object", 0); ++ + add_packet_config_cmd (&remote_protocol_packets[PACKET_qGetTLSAddr], -+ "qGetTLSAddr", "get-thread-local-storage-address", -+ 0); -+diff --git gdb-10.2/gdb/target.h gdb-10.2/gdb/target.h -+index 9603912..40a3cce 100644 -+--- gdb-10.2/gdb/target.h ++ "qGetTLSAddr", "get-thread-local-storage-address", ++ 0); ++--- gdb-10.2/gdb/target.h.orig ++++ gdb-10.2/gdb/target.h +@@ -135,6 +135,9 @@ enum inferior_event_type -+ ++ + enum target_object + { ++ /* LARCH target specific transfer. See "loongarch-nat.c" "corelow.c" @@ -12934,411 +11247,7 @@ index 0000000..036833e + /* AVR target specific transfer. See "avr-tdep.c" and "remote.c". */ + TARGET_OBJECT_AVR, + /* Transfer up-to LEN bytes of memory starting at OFFSET. */ -+diff --git gdb-10.2/gdb/testsuite/gdb.base/dump.exp gdb-10.2/gdb/testsuite/gdb.base/dump.exp -+index 2b79237..64d5b39 100644 -+--- gdb-10.2/gdb/testsuite/gdb.base/dump.exp -++++ gdb-10.2/gdb/testsuite/gdb.base/dump.exp -+@@ -143,11 +143,13 @@ make_dump_file "dump srec val [set intarr1.srec] intarray" \ -+ make_dump_file "dump srec val [set intstr1.srec] intstruct" \ -+ "dump struct as value, srec" -+ -++if { ![istarget loongarch*-*-*] } { -+ make_dump_file "dump ihex val [set intarr1.ihex] intarray" \ -+ "dump array as value, intel hex" -+ -+ make_dump_file "dump ihex val [set intstr1.ihex] intstruct" \ -+ "dump struct as value, intel hex" -++} -+ -+ make_dump_file "dump tekhex val [set intarr1.tekhex] intarray" \ -+ "dump array as value, tekhex" -+@@ -244,11 +246,13 @@ make_dump_file "dump srec mem [set intarr2.srec] $array_start $array_end" \ -+ make_dump_file "dump srec mem [set intstr2.srec] $struct_start $struct_end" \ -+ "dump struct as memory, srec" -+ -++if { ![istarget loongarch*-*-*] } { -+ make_dump_file "dump ihex mem [set intarr2.ihex] $array_start $array_end" \ -+ "dump array as memory, ihex" -+ -+ make_dump_file "dump ihex mem [set intstr2.ihex] $struct_start $struct_end" \ -+ "dump struct as memory, ihex" -++} -+ -+ make_dump_file "dump tekhex mem [set intarr2.tekhex] $array_start $array_end" \ -+ "dump array as memory, tekhex" -+diff --git gdb-10.2/gdb/testsuite/gdb.base/float.exp gdb-10.2/gdb/testsuite/gdb.base/float.exp -+index dc5e2fa..d179a8f 100644 -+--- gdb-10.2/gdb/testsuite/gdb.base/float.exp -++++ gdb-10.2/gdb/testsuite/gdb.base/float.exp -+@@ -120,6 +120,8 @@ if { [is_aarch64_target] } then { -+ pass "info float (without FPU)" -+ } -+ } -++} elseif [istarget "loongarch*-*-*"] then { -++ gdb_test "info float" "f.*fcc0.*fcsr.*" "info float" -+ } else { -+ gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)" -+ } -+diff --git gdb-10.2/gdb/testsuite/gdb.trace/entry-values.exp gdb-10.2/gdb/testsuite/gdb.trace/entry-values.exp -+index 3695a1e..f19f5b9 100644 -+--- gdb-10.2/gdb/testsuite/gdb.trace/entry-values.exp -++++ gdb-10.2/gdb/testsuite/gdb.trace/entry-values.exp -+@@ -62,6 +62,8 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } { -+ # returns. The only exception is JALRC, in which case execution -+ # resumes from `insn1' instead. -+ set call_insn {jalrc|[jb]al[sxr]*[ \t][^\r\n]+\r\n} -++} elseif { [istarget "loongarch*-*-*"] } { -++ set call_insn "bl" -+ } else { -+ set call_insn "call" -+ } -+diff --git gdb-10.2/gdb/testsuite/gdb.xml/tdesc-regs.exp gdb-10.2/gdb/testsuite/gdb.xml/tdesc-regs.exp -+index 1ee6ae1..4d69fb3 100644 -+--- gdb-10.2/gdb/testsuite/gdb.xml/tdesc-regs.exp -++++ gdb-10.2/gdb/testsuite/gdb.xml/tdesc-regs.exp -+@@ -82,6 +82,11 @@ switch -glob -- [istarget] { -+ set regdir "i386/" -+ set core-regs {64bit-core.xml 64bit-sse.xml} -+ } -++ "loongarch64-*-*" { -++ set architecture "loongarch64" -++ set regdir "loongarch/" -++ set core-regs {base64.xml fpu64.xml lbt64.xml lsx.xml lasx.xml} -++ } -+ } -+ -+ # If no core registers were specified, assume this target does not -+diff --git gdb-10.2/gdbserver/Makefile.in gdb-10.2/gdbserver/Makefile.in -+index 2bd3a57..3bd8970 100644 -+--- gdb-10.2/gdbserver/Makefile.in -++++ gdb-10.2/gdbserver/Makefile.in -+@@ -182,6 +182,7 @@ SFILES = \ -+ $(srcdir)/linux-arc-low.cc \ -+ $(srcdir)/linux-arm-low.cc \ -+ $(srcdir)/linux-ia64-low.cc \ -++ $(srcdir)/linux-loongarch-low.cc \ -+ $(srcdir)/linux-low.cc \ -+ $(srcdir)/linux-m68k-low.cc \ -+ $(srcdir)/linux-mips-low.cc \ -+@@ -214,6 +215,7 @@ SFILES = \ -+ $(srcdir)/../gdb/arch/arm.c \ -+ $(srcdir)/../gdb/arch/arm-get-next-pcs.c \ -+ $(srcdir)/../gdb/arch/arm-linux.c \ -++ $(srcdir)/../gdb/arch/loongarch.c \ -+ $(srcdir)/../gdb/arch/ppc-linux-common.c \ -+ $(srcdir)/../gdb/arch/riscv.c \ -+ $(srcdir)/../gdb/nat/aarch64-sve-linux-ptrace.c \ -+diff --git gdb-10.2/gdbserver/configure.srv gdb-10.2/gdbserver/configure.srv -+index 0cb5072..c4ca3a1 100644 -+--- gdb-10.2/gdbserver/configure.srv -++++ gdb-10.2/gdbserver/configure.srv -+@@ -116,6 +116,13 @@ case "${gdbserver_host}" in -+ srv_tgtobj="$srv_linux_obj linux-ia64-low.o" -+ srv_linux_usrregs=yes -+ ;; -++ loongarch*-*-linux*) srv_tgtobj="arch/loongarch.o arch/loongarch-linux-nat.o" -++ srv_tgtobj="${srv_tgtobj} linux-loongarch-low.o" -++ srv_tgtobj="${srv_tgtobj} ${srv_linux_obj}" -++ srv_linux_regsets=yes -++ srv_linux_usrregs=yes -++ srv_linux_thread_db=yes -++ ;; -+ m68*-*-linux*) if test "$gdb_cv_m68k_is_coldfire" = yes; then -+ srv_regobj=reg-cf.o -+ else -+diff --git gdb-10.2/gdbserver/linux-loongarch-low.cc gdb-10.2/gdbserver/linux-loongarch-low.cc -+new file mode 100644 -+index 0000000..cd8ad6e -+--- /dev/null -++++ gdb-10.2/gdbserver/linux-loongarch-low.cc -+@@ -0,0 +1,284 @@ -++/* GNU/Linux/LoongArch specific low level interface, for the remote server -++ for GDB. -++ Copyright (C) 2022 Free Software Foundation, Inc. -++ -++ This file is part of GDB. -++ -++ This program is free software; you can redistribute it and/or modify -++ it under the terms of the GNU General Public License as published by -++ the Free Software Foundation; either version 3 of the License, or -++ (at your option) any later version. -++ -++ This program is distributed in the hope that it will be useful, -++ but WITHOUT ANY WARRANTY; without even the implied warranty of -++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -++ GNU General Public License for more details. -++ -++ You should have received a copy of the GNU General Public License -++ along with this program. If not, see . */ -++ -++#include "server.h" -++#include "linux-low.h" -++#include "tdesc.h" -++#include "elf/common.h" -++#include "arch/loongarch-linux-nat.h" -++ -++/* Linux target op definitions for the LoongArch architecture. */ -++ -++class loongarch_target : public linux_process_target -++{ -++public: -++ -++ const regs_info *get_regs_info () override; -++ -++ int breakpoint_kind_from_pc (CORE_ADDR *pcptr) override; -++ -++ const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; -++ -++protected: -++ -++ void low_arch_setup () override; -++ -++ bool low_cannot_fetch_register (int regno) override; -++ -++ bool low_cannot_store_register (int regno) override; -++ -++ bool low_fetch_register (regcache *regcache, int regno) override; -++ -++ bool low_supports_breakpoints () override; -++ -++ CORE_ADDR low_get_pc (regcache *regcache) override; -++ -++ void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; -++ -++ bool low_breakpoint_at (CORE_ADDR pc) override; -++}; -++ -++/* The singleton target ops object. */ -++ -++static loongarch_target the_loongarch_target; -++ -++bool -++loongarch_target::low_cannot_fetch_register (int regno) -++{ -++ gdb_assert_not_reached ("linux target op low_cannot_fetch_register " -++ "is not implemented by the target"); -++} -++ -++bool -++loongarch_target::low_cannot_store_register (int regno) -++{ -++ gdb_assert_not_reached ("linux target op low_cannot_store_register " -++ "is not implemented by the target"); -++} -++ -++/* Implementation of linux target ops method "low_arch_setup". */ -++ -++void -++loongarch_target::low_arch_setup () -++{ -++ static const char *expedite_regs[] = { "r3", "pc", NULL }; -++ int pid = lwpid_of (current_thread); -++ struct target_desc *tdesc = loongarch_linux_read_description_runtime (pid); -++ -++ if (!tdesc->expedite_regs) -++ init_target_desc (tdesc, expedite_regs); -++ current_process ()->tdesc = tdesc; -++} -++ -++/* Collect GPRs from REGCACHE into BUF. */ -++ -++static void -++loongarch_fill_gregset (struct regcache *regcache, void *buf) -++{ -++ const struct target_desc *tdesc = regcache->tdesc; -++ elf_gregset_t *regset = (elf_gregset_t *) buf; -++ int regno = find_regno (tdesc, "r0"); -++ int i; -++ -++ for (i = 1; i < 32; i++) -++ collect_register (regcache, regno + i, *regset + i); -++ collect_register_by_name (regcache, "orig_a0", *regset + 32); -++ collect_register_by_name (regcache, "pc", *regset + 33); -++ collect_register_by_name (regcache, "badv", *regset + 34); -++} -++ -++/* Supply GPRs from BUF into REGCACHE. */ -++ -++static void -++loongarch_store_gregset (struct regcache *regcache, const void *buf) -++{ -++ const struct target_desc *tdesc = regcache->tdesc; -++ const elf_gregset_t *regset = (const elf_gregset_t *) buf; -++ int regno = find_regno (tdesc, "r0"); -++ int i; -++ -++ supply_register_zeroed (regcache, regno); -++ for (i = 1; i < 32; i++) -++ supply_register (regcache, regno + i, *regset + i); -++ supply_register_by_name (regcache, "orig_a0", *regset + 32); -++ supply_register_by_name (regcache, "pc", *regset + 33); -++ supply_register_by_name (regcache, "badv", *regset + 34); -++} -++ -++/* Collect FPRs from REGCACHE into BUF. */ -++ -++static void -++loongarch_fill_fpregset (struct regcache *regcache, void *buf) -++{ -++ const struct target_desc *tdesc = regcache->tdesc; -++ int f = find_regno (tdesc, "f0"); -++ int fcc = find_regno (tdesc, "fcc0"); -++ int flen = register_size (regcache->tdesc, f); -++ gdb_byte *regbuf = (gdb_byte *) buf; -++ int i; -++ -++ for (i = 0; i < ELF_NFPREG - 2; i++, regbuf += flen) -++ collect_register (regcache, f + i, regbuf); -++ for (i = 0; i < 8; i++) -++ collect_register (regcache, fcc + i, regbuf++); -++ collect_register_by_name (regcache, "fcsr", regbuf); -++} -++ -++/* Supply FPRs from BUF into REGCACHE. */ -++ -++static void -++loongarch_store_fpregset (struct regcache *regcache, const void *buf) -++{ -++ const struct target_desc *tdesc = regcache->tdesc; -++ int f = find_regno (tdesc, "f0"); -++ int fcc = find_regno (tdesc, "fcc0"); -++ int flen = register_size (regcache->tdesc, f); -++ const gdb_byte *regbuf = (const gdb_byte *) buf; -++ int i; -++ -++ for (i = 0; i < ELF_NFPREG - 2; i++, regbuf += flen) -++ supply_register (regcache, f + i, regbuf); -++ for (i = 0; i < 8; i++) -++ supply_register (regcache, fcc + i, regbuf++); -++ supply_register_by_name (regcache, "fcsr", regbuf); -++} -++ -++/* LoongArch/Linux regsets. */ -++static struct regset_info loongarch_regsets[] = { -++ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS, sizeof (elf_gregset_t), -++ GENERAL_REGS, loongarch_fill_gregset, loongarch_store_gregset }, -++ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET, sizeof (elf_fpregset_t), -++ FP_REGS, loongarch_fill_fpregset, loongarch_store_fpregset }, -++ NULL_REGSET -++}; -++ -++/* LoongArch/Linux regset information. */ -++static struct regsets_info loongarch_regsets_info = -++ { -++ loongarch_regsets, /* regsets */ -++ 0, /* num_regsets */ -++ NULL, /* disabled_regsets */ -++ }; -++ -++/* Definition of linux_target_ops data member "regs_info". */ -++static struct regs_info loongarch_regs = -++ { -++ NULL, /* regset_bitmap */ -++ NULL, /* usrregs */ -++ &loongarch_regsets_info, -++ }; -++ -++/* Implementation of linux target ops method "get_regs_info". */ -++ -++const regs_info * -++loongarch_target::get_regs_info () -++{ -++ return &loongarch_regs; -++} -++ -++/* Implementation of linux target ops method "low_fetch_register". */ -++ -++bool -++loongarch_target::low_fetch_register (regcache *regcache, int regno) -++{ -++ const struct target_desc *tdesc = regcache->tdesc; -++ -++ if (regno != find_regno (tdesc, "r0")) -++ return false; -++ supply_register_zeroed (regcache, regno); -++ return true; -++} -++ -++bool -++loongarch_target::low_supports_breakpoints () -++{ -++ return true; -++} -++ -++/* Implementation of linux target ops method "low_get_pc". */ -++ -++CORE_ADDR -++loongarch_target::low_get_pc (regcache *regcache) -++{ -++ if (register_size (regcache->tdesc, 0) == 8) -++ return linux_get_pc_64bit (regcache); -++ else -++ return linux_get_pc_32bit (regcache); -++} -++ -++/* Implementation of linux target ops method "low_set_pc". */ -++ -++void -++loongarch_target::low_set_pc (regcache *regcache, CORE_ADDR newpc) -++{ -++ if (register_size (regcache->tdesc, 0) == 8) -++ linux_set_pc_64bit (regcache, newpc); -++ else -++ linux_set_pc_32bit (regcache, newpc); -++} -++ -++#define loongarch_breakpoint_len 4 -++ -++/* LoongArch BRK software debug mode instruction. -++ This instruction needs to match gdb/loongarch-tdep.c -++ (loongarch_default_breakpoint). */ -++static const gdb_byte loongarch_breakpoint[] = {0x05, 0x00, 0x2a, 0x00}; -++ -++/* Implementation of target ops method "breakpoint_kind_from_pc". */ -++ -++int -++loongarch_target::breakpoint_kind_from_pc (CORE_ADDR *pcptr) -++{ -++ return loongarch_breakpoint_len; -++} -++ -++/* Implementation of target ops method "sw_breakpoint_from_kind". */ -++ -++const gdb_byte * -++loongarch_target::sw_breakpoint_from_kind (int kind, int *size) -++{ -++ *size = loongarch_breakpoint_len; -++ return (const gdb_byte *) &loongarch_breakpoint; -++} -++ -++/* Implementation of linux target ops method "low_breakpoint_at". */ -++ -++bool -++loongarch_target::low_breakpoint_at (CORE_ADDR pc) -++{ -++ gdb_byte insn[loongarch_breakpoint_len]; -++ -++ read_memory (pc, (unsigned char *) &insn, loongarch_breakpoint_len); -++ if (memcmp (insn, loongarch_breakpoint, loongarch_breakpoint_len) == 0) -++ return true; -++ -++ return false; -++} -++ -++/* The linux target ops object. */ -++ -++linux_process_target *the_linux_target = &the_loongarch_target; -++ -++/* Initialize the LoongArch/Linux target. */ -++ -++void -++initialize_low_arch () -++{ -++ initialize_regsets_info (&loongarch_regsets_info); -++} -+diff --git gdb-10.2/include/dis-asm.h gdb-10.2/include/dis-asm.h -+index 0532cef..ce43595 100644 -+--- gdb-10.2/include/dis-asm.h ++--- gdb-10.2/include/dis-asm.h.orig ++++ gdb-10.2/include/dis-asm.h +@@ -303,6 +303,7 @@ extern void print_arm_disassembler_options (FILE *); + extern void print_arc_disassembler_options (FILE *); @@ -13348,22 +11257,20 @@ index 0000000..036833e + extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *); + extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *); + extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *); -+diff --git gdb-10.2/include/elf/common.h gdb-10.2/include/elf/common.h -+index 571e21a..9296080 100644 -+--- gdb-10.2/include/elf/common.h ++--- gdb-10.2/include/elf/common.h.orig ++++ gdb-10.2/include/elf/common.h +@@ -342,6 +342,7 @@ + #define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */ + #define EM_NFP 250 /* Netronome Flow Processor. */ + #define EM_CSKY 252 /* C-SKY processor family. */ ++#define EM_LOONGARCH 258 /* LoongArch */ -+ ++ + /* If it is necessary to assign new unofficial EM_* values, please pick large + random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision +@@ -662,6 +663,19 @@ -+ /* note name must be "LINUX". */ ++ /* note name must be "LINUX". */ + #define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */ -+ /* note name must be "LINUX". */ ++ /* note name must be "LINUX". */ ++#define NT_LARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ ++ /* note name must be "LINUX". */ ++#define NT_LARCH_CSR 0xa01 /* LoongArch Control State Registers */ @@ -13379,11 +11286,8 @@ index 0000000..036833e ++ + #define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */ + #define NT_FILE 0x46494c45 /* Description of mapped files. */ -+ -+diff --git gdb-10.2/include/elf/loongarch.h gdb-10.2/include/elf/loongarch.h -+new file mode 100644 -+index 0000000..74757b8 -+--- /dev/null ++ ++--- gdb-10.2/include/elf/loongarch.h.orig ++++ gdb-10.2/include/elf/loongarch.h +@@ -0,0 +1,267 @@ ++/* Copyright (C) 2021-2022 Free Software Foundation, Inc. @@ -13653,10 +11557,7 @@ index 0000000..036833e ++ (!((EF_LOONGARCH_ABI(abi) & EF_LOONGARCH_ABI_FLOAT_MASK) ^ EF_LOONGARCH_ABI_DOUBLE_FLOAT_MASK)) ++ ++#endif /* _ELF_LOONGARCH_H */ -+diff --git gdb-10.2/include/opcode/loongarch.h gdb-10.2/include/opcode/loongarch.h -+new file mode 100644 -+index 0000000..c392234 -+--- /dev/null ++--- gdb-10.2/include/opcode/loongarch.h.orig ++++ gdb-10.2/include/opcode/loongarch.h +@@ -0,0 +1,239 @@ ++/* LoongArch assembler/disassembler support. @@ -13898,34 +11799,30 @@ index 0000000..036833e ++#endif ++ ++#endif /* _LOONGARCH_H_ */ -+diff --git gdb-10.2/opcodes/Makefile.am gdb-10.2/opcodes/Makefile.am -+index 7318bf0..c9139e5 100644 -+--- gdb-10.2/opcodes/Makefile.am ++--- gdb-10.2/opcodes/Makefile.am.orig ++++ gdb-10.2/opcodes/Makefile.am +@@ -162,6 +162,9 @@ TARGET_LIBOPCODES_CFILES = \ -+ lm32-ibld.c \ -+ lm32-opc.c \ -+ lm32-opinst.c \ ++ lm32-ibld.c \ ++ lm32-opc.c \ ++ lm32-opinst.c \ ++ loongarch-opc.c \ ++ loongarch-dis.c \ ++ loongarch-coder.c \ -+ m10200-dis.c \ -+ m10200-opc.c \ -+ m10300-dis.c \ -+diff --git gdb-10.2/opcodes/Makefile.in gdb-10.2/opcodes/Makefile.in -+index ddb9346..19a90fb 100644 -+--- gdb-10.2/opcodes/Makefile.in ++ m10200-dis.c \ ++ m10200-opc.c \ ++ m10300-dis.c \ ++--- gdb-10.2/opcodes/Makefile.in.orig ++++ gdb-10.2/opcodes/Makefile.in +@@ -552,6 +552,9 @@ TARGET_LIBOPCODES_CFILES = \ -+ lm32-ibld.c \ -+ lm32-opc.c \ -+ lm32-opinst.c \ ++ lm32-ibld.c \ ++ lm32-opc.c \ ++ lm32-opinst.c \ ++ loongarch-opc.c \ ++ loongarch-dis.c \ ++ loongarch-coder.c \ -+ m10200-dis.c \ -+ m10200-opc.c \ -+ m10300-dis.c \ ++ m10200-dis.c \ ++ m10200-opc.c \ ++ m10300-dis.c \ +@@ -966,6 +969,9 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-ibld.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opc.Plo@am__quote@ @@ -13936,33 +11833,27 @@ index 0000000..036833e + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-dis.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-opc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10300-dis.Plo@am__quote@ -+diff --git gdb-10.2/opcodes/configure gdb-10.2/opcodes/configure -+index e448c9e..68380ae 100755 -+--- gdb-10.2/opcodes/configure ++--- gdb-10.2/opcodes/configure.orig ++++ gdb-10.2/opcodes/configure +@@ -12949,6 +12949,7 @@ if test x${all_targets} = xfalse ; then -+ bfd_z80_arch) ta="$ta z80-dis.lo" ;; -+ bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; -+ bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; ++ bfd_z80_arch) ta="$ta z80-dis.lo" ;; ++ bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; ++ bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; ++ bfd_loongarch_arch) ta="$ta loongarch-dis.lo loongarch-opc.lo loongarch-coder.lo" ;; -+ -+ "") ;; -+ *) as_fn_error $? "*** unknown target architecture $arch" "$LINENO" 5 ;; -+diff --git gdb-10.2/opcodes/configure.ac gdb-10.2/opcodes/configure.ac -+index 00be9c8..434cc2f 100644 -+--- gdb-10.2/opcodes/configure.ac ++ ++ "") ;; ++ *) as_fn_error $? "*** unknown target architecture $arch" "$LINENO" 5 ;; ++--- gdb-10.2/opcodes/configure.ac.orig ++++ gdb-10.2/opcodes/configure.ac +@@ -340,6 +340,7 @@ if test x${all_targets} = xfalse ; then -+ bfd_z80_arch) ta="$ta z80-dis.lo" ;; -+ bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; -+ bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; ++ bfd_z80_arch) ta="$ta z80-dis.lo" ;; ++ bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; ++ bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; ++ bfd_loongarch_arch) ta="$ta loongarch-dis.lo loongarch-opc.lo loongarch-coder.lo" ;; -+ -+ "") ;; -+ *) AC_MSG_ERROR(*** unknown target architecture $arch) ;; -+diff --git gdb-10.2/opcodes/disassemble.c gdb-10.2/opcodes/disassemble.c -+index 290dcdd..eec560e 100644 -+--- gdb-10.2/opcodes/disassemble.c ++ ++ "") ;; ++ *) AC_MSG_ERROR(*** unknown target architecture $arch) ;; ++--- gdb-10.2/opcodes/disassemble.c.orig ++++ gdb-10.2/opcodes/disassemble.c +@@ -49,6 +49,7 @@ + #define ARCH_ip2k @@ -13991,25 +11882,20 @@ index 0000000..036833e ++#ifdef ARCH_loongarch ++ print_loongarch_disassembler_options (stream); ++#endif -+ ++ + return; + } -+diff --git gdb-10.2/opcodes/disassemble.h gdb-10.2/opcodes/disassemble.h -+index 89db886..cc529c9 100644 -+--- gdb-10.2/opcodes/disassemble.h ++--- gdb-10.2/opcodes/disassemble.h.orig ++++ gdb-10.2/opcodes/disassemble.h +@@ -100,6 +100,7 @@ extern int print_insn_xtensa (bfd_vma, disassemble_info *); + extern int print_insn_z80 (bfd_vma, disassemble_info *); + extern int print_insn_z8001 (bfd_vma, disassemble_info *); + extern int print_insn_z8002 (bfd_vma, disassemble_info *); ++extern int print_insn_loongarch (bfd_vma, disassemble_info *); -+ ++ + extern disassembler_ftype csky_get_disassembler (bfd *); + extern disassembler_ftype rl78_get_disassembler (bfd *); -+diff --git gdb-10.2/opcodes/loongarch-coder.c gdb-10.2/opcodes/loongarch-coder.c -+new file mode 100644 -+index 0000000..f5e10b9 -+--- /dev/null ++--- gdb-10.2/opcodes/loongarch-coder.c.orig ++++ gdb-10.2/opcodes/loongarch-coder.c +@@ -0,0 +1,481 @@ ++/* LoongArch opcode support. @@ -14493,10 +12379,7 @@ index 0000000..036833e ++ *dest++ = *src++; ++ } ++} -+diff --git gdb-10.2/opcodes/loongarch-dis.c gdb-10.2/opcodes/loongarch-dis.c -+new file mode 100644 -+index 0000000..9dcf989 -+--- /dev/null ++--- gdb-10.2/opcodes/loongarch-dis.c.orig ++++ gdb-10.2/opcodes/loongarch-dis.c +@@ -0,0 +1,342 @@ ++/* LoongArch opcode support. @@ -14841,10 +12724,7 @@ index 0000000..036833e ++ my_disinfo.target = pc; ++ disassemble_one (insn, &my_disinfo); ++} -+diff --git gdb-10.2/opcodes/loongarch-opc.c gdb-10.2/opcodes/loongarch-opc.c -+new file mode 100644 -+index 0000000..be0de61 -+--- /dev/null ++--- gdb-10.2/opcodes/loongarch-opc.c.orig ++++ gdb-10.2/opcodes/loongarch-opc.c +@@ -0,0 +1,870 @@ ++/* LoongArch opcode support. @@ -15717,9 +13597,7 @@ index 0000000..036833e ++ { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, ++ { 0 }, ++}; -+diff --git gdb-10.2/opcodes/po/POTFILES.in gdb-10.2/opcodes/po/POTFILES.in -+index 7572204..84625ac 100644 -+--- gdb-10.2/opcodes/po/POTFILES.in ++--- gdb-10.2/opcodes/po/POTFILES.in.orig ++++ gdb-10.2/opcodes/po/POTFILES.in +@@ -108,6 +108,9 @@ lm32-ibld.c + lm32-opc.c @@ -15731,10 +13609,41 @@ index 0000000..036833e + m10200-dis.c + m10200-opc.c + m10300-dis.c -+-- -+2.39.2 ++--- gdb-10.2/gdb/loongarch-linux-tdep.c.orig +++++ gdb-10.2/gdb/loongarch-linux-tdep.c ++@@ -707,3 +707,30 @@ _initialize_loongarch_linux_tdep () ++ gdbarch_register_osabi (bfd_arch_loongarch, bfd_mach_loongarch64, ++ GDB_OSABI_LINUX, loongarch_linux_init_abi); ++ } +++ +++/* Wrapper functions. These are only used by libthread_db. */ +++#include +++extern void supply_gregset (struct regcache *regcache,const prgregset_t *gregset); +++extern void fill_gregset (const struct regcache *regcache, prgregset_t *gregset, int regno); +++extern void supply_fpregset (struct regcache *regcache, const prfpregset_t *fpregset); +++extern void fill_fpregset (const struct regcache *regcache, prfpregset_t *fpregset, int regno); +++ +++void supply_gregset (struct regcache *regcache, const prgregset_t *gregset) +++{ +++ loongarch_elf_gregset.supply_regset (NULL, regcache, -1, gregset, sizeof (prgregset_t)); +++} +++ +++void fill_gregset (const struct regcache *regcache, prgregset_t *gregset, int regno) +++{ +++ loongarch_elf_gregset.collect_regset (NULL, regcache, regno, gregset, sizeof (prgregset_t)); +++} +++ +++void supply_fpregset (struct regcache *regcache, const prfpregset_t *fpregset) +++{ +++ loongarch_elf_fpregset.supply_regset (NULL, regcache, -1, fpregset, sizeof (prfpregset_t)); +++} +++ +++void fill_fpregset (const struct regcache *regcache, prfpregset_t *fpregset, int regno) +++{ +++ loongarch_elf_fpregset.collect_regset (NULL, regcache, regno, fpregset, sizeof (prfpregset_t)); +++} diff --git a/help.c b/help.c -index 99214c1..3662dad 100644 +index cc7ab20..6dcb1ec 100644 --- a/help.c +++ b/help.c @@ -336,10 +336,11 @@ char *program_usage_info[] = { @@ -15753,55 +13662,68 @@ index 99214c1..3662dad 100644 "", " --minimal", " Bring up a session that is restricted to the log, dis, rd, sym,", +@@ -9560,8 +9561,8 @@ char *README[] = { + " These are the current prerequisites: ", + "", + " o At this point, x86, ia64, x86_64, ppc64, ppc, arm, arm64, alpha, mips,", +-" mips64, riscv64, s390 and s390x-based kernels are supported. Other", +-" architectures may be addressed in the future.", ++" mips64, loongarch64, riscv64, s390 and s390x-based kernels are supported.", ++" Other architectures may be addressed in the future.", + "", + " o One size fits all -- the utility can be run on any Linux kernel version", + " version dating back to 2.2.5-15. A primary design goal is to always", +@@ -9622,6 +9623,8 @@ README_ENTER_DIRECTORY, + " ppc64le dumpfiles may be built by typing \"make target=PPC64\".", + " o On an x86_64 host, an x86_64 binary that can be used to analyze", + " riscv64 dumpfiles may be built by typing \"make target=RISCV64\".", ++" o On an x86_64 host, an x86_64 binary that can be used to analyze", ++" loongarch64 dumpfiles may be built by typing \"make target=LOONGARCH64\".", + "", + " Traditionally when vmcores are compressed via the makedumpfile(8) facility", + " the libz compression library is used, and by default the crash utility", diff --git a/lkcd_vmdump_v1.h b/lkcd_vmdump_v1.h -index 4933427..841f150 100644 +index 98ee094..3ffb219 100644 --- a/lkcd_vmdump_v1.h +++ b/lkcd_vmdump_v1.h -@@ -118,10 +118,12 @@ typedef struct _dump_header_s { - #ifndef S390 - #ifndef S390X - #ifndef ARM64 -+#ifndef LOONGARCH64 +@@ -114,7 +114,7 @@ typedef struct _dump_header_s { + struct new_utsname dh_utsname; + + /* the dump registers */ +-#if !defined(IA64) && !defined(S390) && !defined(S390X) && !defined(ARM64) && !defined(RISCV64) ++#if !defined(IA64) && !defined(S390) && !defined(S390X) && !defined(ARM64) && !defined(RISCV64) && !defined(LOONGARCH64) struct pt_regs dh_regs; - #endif - #endif - #endif -+#endif #endif - /* the address of the current task */ diff --git a/lkcd_vmdump_v2_v3.h b/lkcd_vmdump_v2_v3.h -index 984c2c2..ab395ea 100644 +index ef3067f..f215446 100644 --- a/lkcd_vmdump_v2_v3.h +++ b/lkcd_vmdump_v2_v3.h -@@ -37,7 +37,7 @@ +@@ -37,7 +37,8 @@ #if defined(ARM) || defined(X86) || defined(PPC) || defined(S390) || \ defined(S390X) || defined(ARM64) || defined(MIPS) || \ -- defined(MIPS64) || defined(SPARC64) -+ defined(MIPS64) || defined(SPARC64) || defined(LOONGARCH64) +- defined(MIPS64) || defined(SPARC64) || defined(RISCV64) ++ defined(MIPS64) || defined(SPARC64) || defined(RISCV64) || \ ++ defined(LOONGARCH64) /* * Kernel header file for Linux crash dumps. -@@ -87,10 +87,12 @@ typedef struct _dump_header_asm_s { - #ifndef S390 - #ifndef S390X - #ifndef ARM64 -+#ifndef LOONGARCH64 +@@ -84,7 +85,7 @@ typedef struct _dump_header_asm_s { + uint32_t dha_eip; + + /* the dump registers */ +-#if !defined(S390) && !defined(S390X) && !defined(ARM64) && !defined(RISCV64) ++#if !defined(S390) && !defined(S390X) && !defined(ARM64) && !defined(RISCV64) && !defined(LOONGARCH64) struct pt_regs dha_regs; #endif - #endif - #endif -+#endif - - } dump_header_asm_t; diff --git a/loongarch64.c b/loongarch64.c new file mode 100644 -index 0000000..09df05a +index 0000000..6437c4a --- /dev/null +++ b/loongarch64.c -@@ -0,0 +1,1347 @@ +@@ -0,0 +1,1368 @@ +/* loongarch64.c - core analysis suite + * + * Copyright (C) 2021 Loongson Technology Co., Ltd. @@ -15822,6 +13744,28 @@ index 0000000..09df05a +#include +#include "defs.h" + ++/* from arch/loongarch/include/asm/ptrace.h */ ++struct loongarch64_pt_regs { ++ /* Saved main processor registers. */ ++ unsigned long regs[32]; ++ ++ /* Saved special registers. */ ++ unsigned long csr_crmd; ++ unsigned long csr_prmd; ++ unsigned long csr_euen; ++ unsigned long csr_ecfg; ++ unsigned long csr_estat; ++ unsigned long csr_epc; ++ unsigned long csr_badvaddr; ++ unsigned long orig_a0; ++}; ++ ++struct loongarch64_unwind_frame { ++ unsigned long sp; ++ unsigned long pc; ++ unsigned long ra; ++}; ++ +static int loongarch64_pgd_vtop(ulong *pgd, ulong vaddr, + physaddr_t *paddr, int verbose); +static int loongarch64_uvtop(struct task_context *tc, ulong vaddr, @@ -15867,14 +13811,11 @@ index 0000000..09df05a + +#define TASK_SIZE64 (1UL << 40) + -+#define PMD_ORDER 0 -+#define PTE_ORDER 0 -+ -+#define PMD_SHIFT (PAGESHIFT() + (PAGESHIFT() + PTE_ORDER - 3)) ++#define PMD_SHIFT (PAGESHIFT() + (PAGESHIFT() - 3)) +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE - 1)) + -+#define PGDIR_SHIFT (PMD_SHIFT + (PAGESHIFT() + PMD_ORDER - 3)) ++#define PGDIR_SHIFT (PMD_SHIFT + (PAGESHIFT() - 3)) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE - 1)) + @@ -16297,7 +14238,7 @@ index 0000000..09df05a + if (symbol && loongarch64_is_exception_entry(symbol)) { + + GET_STACK_DATA(current.sp, pt_regs, sizeof(pt_regs)); -+ ++ regs = (struct loongarch64_pt_regs *) (pt_regs + OFFSET(pt_regs_regs)); + previous.ra = regs->regs[LOONGARCH64_EF_RA]; + previous.sp = regs->regs[LOONGARCH64_EF_SP]; + current.ra = regs->csr_epc; @@ -16339,7 +14280,7 @@ index 0000000..09df05a + struct loongarch64_unwind_frame *current, + struct loongarch64_unwind_frame *previous) +{ -+ ulong i, reg; ++ ulong i; + ulong rapos = 0; + ulong spadjust = 0; + uint32_t *funcbuf, *ip; @@ -16459,6 +14400,8 @@ index 0000000..09df05a + int i; + char buf[BUFSIZE]; + ++ regs = (struct loongarch64_pt_regs *) (pt_regs + OFFSET(pt_regs_regs)); ++ + for (i = 0; i < 32; i += 4) { + fprintf(fp, " $%2d : %016lx %016lx %016lx %016lx\n", + i, regs->regs[i], regs->regs[i+1], @@ -16595,7 +14538,7 @@ index 0000000..09df05a + * We got registers for panic task from crash_notes. Just return them. + */ + regs = &ms->crash_task_regs[bt->tc->processor]; -+ epc = regs->regs[LOONGARCH64_EF_CSR_EPC]; ++ epc = regs->csr_epc; + sp = regs->regs[LOONGARCH64_EF_SP]; + + if (!epc && !sp) { @@ -17076,7 +15019,7 @@ index 0000000..09df05a + } + + regs = &ms->crash_task_regs[cpu]; -+ if (!regs->regs[LOONGARCH64_EF_SP] && !regs->regs[LOONGARCH64_EF_CSR_EPC]) { ++ if (!regs->regs[LOONGARCH64_EF_SP] && !regs->csr_epc) { + error(INFO, "registers not collected for cpu %d\n", cpu); + return; + } @@ -17129,13 +15072,13 @@ index 0000000..09df05a + regs->regs[LOONGARCH64_EF_R0 + 29], + regs->regs[LOONGARCH64_EF_R0 + 30], + regs->regs[LOONGARCH64_EF_R0 + 31], -+ regs->regs[LOONGARCH64_EF_CSR_EPC], -+ regs->regs[LOONGARCH64_EF_CSR_BADVADDR], -+ regs->regs[LOONGARCH64_EF_CSR_CRMD], -+ regs->regs[LOONGARCH64_EF_CSR_PRMD], -+ regs->regs[LOONGARCH64_EF_CSR_ECFG], -+ regs->regs[LOONGARCH64_EF_CSR_ESTAT], -+ regs->regs[LOONGARCH64_EF_CSR_EUEN]); ++ regs->csr_epc, ++ regs->csr_badvaddr, ++ regs->csr_crmd, ++ regs->csr_prmd, ++ regs->csr_ecfg, ++ regs->csr_estat, ++ regs->csr_euen); +} + +#else /* !LOONGARCH64 */ @@ -17150,32 +15093,40 @@ index 0000000..09df05a + +#endif /* !LOONGARCH64 */ diff --git a/main.c b/main.c -index b278c22..a70fd5e 100644 +index 4fd4ca5..0b6b927 100644 --- a/main.c +++ b/main.c @@ -228,7 +228,8 @@ main(int argc, char **argv) } else if (STREQ(long_options[option_index].name, "kaslr")) { if (!machine_type("X86_64") && !machine_type("ARM64") && !machine_type("X86") && -- !machine_type("S390X")) -+ !machine_type("S390X") && -+ !machine_type("LOONGARCH64")) +- !machine_type("S390X") && !machine_type("RISCV64")) ++ !machine_type("S390X") && !machine_type("RISCV64") && +++ !machine_type("LOONGARCH64")) error(INFO, "--kaslr not valid " "with this machine type.\n"); else if (STREQ(optarg, "auto")) diff --git a/netdump.c b/netdump.c -index ff273b4..f8ce939 100644 +index 3907863..9bb4104 100644 --- a/netdump.c +++ b/netdump.c -@@ -42,6 +42,7 @@ static void get_netdump_regs_ppc64(struct bt_info *, ulong *, ulong *); - static void get_netdump_regs_arm(struct bt_info *, ulong *, ulong *); +@@ -43,6 +43,7 @@ static void get_netdump_regs_arm(struct bt_info *, ulong *, ulong *); static void get_netdump_regs_arm64(struct bt_info *, ulong *, ulong *); static void get_netdump_regs_mips(struct bt_info *, ulong *, ulong *); + static void get_netdump_regs_riscv(struct bt_info *, ulong *, ulong *); +static void get_netdump_regs_loongarch64(struct bt_info *, ulong *, ulong *); static void check_dumpfile_size(char *); static int proc_kcore_init_32(FILE *, int); static int proc_kcore_init_64(FILE *, int); -@@ -300,6 +301,12 @@ is_netdump(char *file, ulong source_query) +@@ -63,6 +64,7 @@ static char *vmcoreinfo_read_string(const char *); + #define READ_PAGESIZE_FROM_VMCOREINFO() \ + (machine_type("IA64") || machine_type("PPC64") || machine_type("PPC") || machine_type("ARM64")) + ++ + /* + * kdump installs NT_PRSTATUS elf notes only to the cpus + * that were online during dumping. Hence we call into +@@ -310,6 +312,12 @@ is_netdump(char *file, ulong source_query) goto bailout; break; @@ -17188,7 +15139,7 @@ index ff273b4..f8ce939 100644 default: if (machine_type_mismatch(file, "(unknown)", NULL, source_query)) -@@ -1482,6 +1489,9 @@ dump_Elf32_Ehdr(Elf32_Ehdr *elf) +@@ -1493,6 +1501,9 @@ dump_Elf32_Ehdr(Elf32_Ehdr *elf) case EM_MIPS: netdump_print("(EM_MIPS)\n"); break; @@ -17198,7 +15149,7 @@ index ff273b4..f8ce939 100644 default: netdump_print("(unsupported)\n"); break; -@@ -1644,6 +1654,9 @@ dump_Elf64_Ehdr(Elf64_Ehdr *elf) +@@ -1655,6 +1666,9 @@ dump_Elf64_Ehdr(Elf64_Ehdr *elf) case EM_AARCH64: netdump_print("(EM_AARCH64)\n"); break; @@ -17208,37 +15159,35 @@ index ff273b4..f8ce939 100644 default: netdump_print("(unsupported)\n"); break; -@@ -2669,6 +2682,10 @@ get_netdump_regs(struct bt_info *bt, ulong *eip, ulong *esp) - return get_netdump_regs_mips(bt, eip, esp); +@@ -2683,6 +2697,9 @@ get_netdump_regs(struct bt_info *bt, ulong *eip, ulong *esp) + case EM_RISCV: + get_netdump_regs_riscv(bt, eip, esp); break; - + case EM_LOONGARCH: + return get_netdump_regs_loongarch64(bt, eip, esp); + break; -+ + default: error(FATAL, - "support for ELF machine type %d not available\n", -@@ -2925,6 +2942,8 @@ display_regs_from_elf_notes(int cpu, FILE *ofp) - mips_display_regs_from_elf_notes(cpu, ofp); - } else if (machine_type("MIPS64")) { +@@ -2942,6 +2959,8 @@ display_regs_from_elf_notes(int cpu, FILE *ofp) mips64_display_regs_from_elf_notes(cpu, ofp); + } else if (machine_type("RISCV64")) { + riscv64_display_regs_from_elf_notes(cpu, ofp); + } else if (machine_type("LOONGARCH64")) { + loongarch64_display_regs_from_elf_notes(cpu, ofp); } } -@@ -2935,7 +2954,8 @@ dump_registers_for_elf_dumpfiles(void) - +@@ -2953,7 +2972,7 @@ dump_registers_for_elf_dumpfiles(void) if (!(machine_type("X86") || machine_type("X86_64") || machine_type("ARM64") || machine_type("PPC64") || -- machine_type("MIPS") || machine_type("MIPS64"))) -+ machine_type("MIPS") || machine_type("MIPS64") || -+ machine_type("LOONGARCH64"))) + machine_type("MIPS") || machine_type("MIPS64") || +- machine_type("RISCV64"))) ++ machine_type("RISCV64") || machine_type("LOONGARCH64"))) error(FATAL, "-r option not supported for this dumpfile\n"); if (NETDUMP_DUMPFILE()) { -@@ -3870,6 +3890,12 @@ get_netdump_regs_mips(struct bt_info *bt, ulong *eip, ulong *esp) +@@ -3894,6 +3913,12 @@ get_netdump_regs_riscv(struct bt_info *bt, ulong *eip, ulong *esp) machdep->get_stack_frame(bt, eip, esp); } @@ -17252,42 +15201,44 @@ index ff273b4..f8ce939 100644 is_partial_netdump(void) { diff --git a/ramdump.c b/ramdump.c -index a206fcb..c32d9fd 100644 +index d2bd7ff..b67ebeb 100644 --- a/ramdump.c +++ b/ramdump.c -@@ -188,6 +188,8 @@ char *ramdump_to_elf(void) - e_machine = EM_MIPS; - else if (machine_type("X86_64")) +@@ -190,6 +190,8 @@ char *ramdump_to_elf(void) e_machine = EM_X86_64; + else if (machine_type("RISCV64")) + e_machine = EM_RISCV; + else if (machine_type("LOONGARCH64")) + e_machine = EM_LOONGARCH; else error(FATAL, "ramdump: unsupported machine type: %s\n", MACHINE_TYPE); diff --git a/symbols.c b/symbols.c -index 42c4eb4..57b4427 100644 +index 8e8b4c3..36dda6c 100644 --- a/symbols.c +++ b/symbols.c -@@ -593,7 +593,8 @@ kaslr_init(void) +@@ -629,7 +629,8 @@ kaslr_init(void) char *string; if ((!machine_type("X86_64") && !machine_type("ARM64") && !machine_type("X86") && -- !machine_type("S390X")) || (kt->flags & RELOC_SET)) -+ !machine_type("S390X") && !machine_type("LOONGARCH64")) || -+ (kt->flags & RELOC_SET)) +- !machine_type("S390X") && !machine_type("RISCV64")) || (kt->flags & RELOC_SET)) ++ !machine_type("S390X") && !machine_type("RISCV64") && !machine_type("LOONGARCH64")) || ++ (kt->flags & RELOC_SET)) return; if (!kt->vmcoreinfo._stext_SYMBOL && -@@ -759,7 +760,7 @@ store_symbols(bfd *abfd, int dynamic, void *minisyms, long symcount, +@@ -794,8 +795,8 @@ store_symbols(bfd *abfd, int dynamic, void *minisyms, long symcount, + fromend, size, store); } else if (!(kt->flags & RELOC_SET)) kt->flags |= RELOC_FORCE; - } else if (machine_type("X86_64") || machine_type("ARM64") || -- machine_type("S390X")) { -+ machine_type("S390X") || machine_type("LOONGARCH64")) { +- } else if (machine_type("X86_64") || machine_type("ARM64") || +- machine_type("S390X") || machine_type("RISCV64")) { ++ } else if (machine_type("X86_64") || machine_type("ARM64") || machine_type("S390X") || ++ machine_type("RISCV64") || machine_type("LOONGARCH64")) { if ((kt->flags2 & RELOC_AUTO) && !(kt->flags & RELOC_SET)) derive_kaslr_offset(abfd, dynamic, from, fromend, size, store); -@@ -831,7 +832,8 @@ store_sysmap_symbols(void) +@@ -867,7 +868,8 @@ store_sysmap_symbols(void) strerror(errno)); if (!machine_type("X86") && !machine_type("X86_64") && @@ -17297,7 +15248,7 @@ index 42c4eb4..57b4427 100644 kt->flags &= ~RELOC_SET; first = 0; -@@ -2490,9 +2492,11 @@ store_module_kallsyms_v2(struct load_module *lm, int start, int curr, +@@ -2976,9 +2978,11 @@ store_module_kallsyms_v2(struct load_module *lm, int start, int curr, /* * On ARM/ARM64 we have linker mapping symbols like '$a' * or '$x' for ARM64, and '$d'. @@ -17310,7 +15261,7 @@ index 42c4eb4..57b4427 100644 !machdep->verify_symbol(nameptr, ec->st_value, ec->st_info)) continue; -@@ -3694,6 +3698,11 @@ is_kernel(char *file) +@@ -4229,6 +4233,11 @@ is_kernel(char *file) goto bailout; break; @@ -17322,7 +15273,7 @@ index 42c4eb4..57b4427 100644 default: if (machine_type_mismatch(file, "(unknown)", NULL, 0)) goto bailout; -@@ -3743,6 +3752,11 @@ is_kernel(char *file) +@@ -4283,6 +4292,11 @@ is_kernel(char *file) goto bailout; break; @@ -17334,8 +15285,8 @@ index 42c4eb4..57b4427 100644 default: if (machine_type_mismatch(file, "(unknown)", NULL, 0)) goto bailout; -@@ -4002,6 +4016,11 @@ is_shared_object(char *file) - if (machine_type("MIPS64")) +@@ -4547,6 +4561,11 @@ is_shared_object(char *file) + if (machine_type("RISCV64")) return TRUE; break; + @@ -17346,17 +15297,17 @@ index 42c4eb4..57b4427 100644 } if (CRASHDEBUG(1)) -@@ -8818,6 +8837,10 @@ dump_offset_table(char *spec, ulong makestruct) +@@ -9795,6 +9814,10 @@ dump_offset_table(char *spec, ulong makestruct) OFFSET(task_struct_thread_esp)); fprintf(fp, " task_struct_thread_ksp: %ld\n", OFFSET(task_struct_thread_ksp)); -+ fprintf(fp, " task_struct_thread_reg01: %ld\n", -+ OFFSET(task_struct_thread_reg01)); -+ fprintf(fp, " task_struct_thread_reg03: %ld\n", -+ OFFSET(task_struct_thread_reg03)); ++ fprintf(fp, " task_struct_thread_reg01: %ld\n", ++ OFFSET(task_struct_thread_reg01)); ++ fprintf(fp, " task_struct_thread_reg03: %ld\n", ++ OFFSET(task_struct_thread_reg03)); fprintf(fp, " task_struct_thread_reg29: %ld\n", OFFSET(task_struct_thread_reg29)); fprintf(fp, " task_struct_thread_reg31: %ld\n", -- -2.40.1 +2.39.2 diff --git a/crash-8.0.2.tar.gz b/crash-8.0.2.tar.gz deleted file mode 100644 index 9ab6e6d92241f8754d598a5dcc12fbb2add37526..0000000000000000000000000000000000000000 Binary files a/crash-8.0.2.tar.gz and /dev/null differ diff --git a/crash-8.0.4.tar.gz b/crash-8.0.4.tar.gz new file mode 100644 index 0000000000000000000000000000000000000000..289364d27bd7d4419e412a16019cd64904f9f76f Binary files /dev/null and b/crash-8.0.4.tar.gz differ diff --git a/crash-8.0.2_build.patch b/crash-8.0.4_build.patch similarity index 58% rename from crash-8.0.2_build.patch rename to crash-8.0.4_build.patch index 3524673698ad4826d6d21962b5303799aee8c011..3db6f47b1889874525f6d48f3c8af1fc11936219 100644 --- a/crash-8.0.2_build.patch +++ b/crash-8.0.4_build.patch @@ -1,6 +1,5 @@ - ---- crash-8.0.2/Makefile.orig -+++ crash-8.0.2/Makefile +--- crash-8.0.4/Makefile.orig ++++ crash-8.0.4/Makefile @@ -204,7 +204,7 @@ GDB_FLAGS= # TARGET_CFLAGS will be configured automatically by configure TARGET_CFLAGS= @@ -19,3 +18,16 @@ @echo "../../${PROGRAM} ../../${PROGRAM}lib.a" > ${GDB}/gdb/mergeobj @rm -f ${PROGRAM} @if [ ! -f ${GDB}/config.status ]; then \ +--- crash-8.0.4/configure.c.orig ++++ crash-8.0.4/configure.c +@@ -810,7 +810,8 @@ build_configure(struct supported_gdb_version *sp) + fprintf(fp2, "%s\n", sp->GDB); + sprintf(target_data.gdb_version, "%s", &sp->GDB[4]); + } else if (strncmp(buf, "LDFLAGS=", strlen("LDFLAGS=")) == 0) { +- fprintf(fp2, "LDFLAGS=%s\n", ldflags ? ldflags : ""); ++ if (ldflags) ++ fprintf(fp2, "LDFLAGS=%s\n", ldflags ? ldflags : ""); + } else + fprintf(fp2, "%s", buf); + + diff --git a/crash.spec b/crash.spec index bc30d8974ca820d82f9f24d857cc79c34fc6a7ef..6fa41033e840c759567bac7127d9c04b38fe6ad8 100644 --- a/crash.spec +++ b/crash.spec @@ -1,14 +1,14 @@ -%define anolis_release 2 +%define anolis_release 3 Summary: Kernel analysis utility for live systems, netdump, diskdump, kdump, LKCD or mcore dumpfiles Name: crash -Version: 8.0.2 +Version: 8.0.4 Release: %{anolis_release}%{?dist} License: GPLv3 -Source0: https://github.com/crash-utility/crash/archive/crash-%{version}.tar.gz +Source0: https://github.com/crash-utility/crash/archive/%{version}/crash-%{version}.tar.gz Source1: http://ftp.gnu.org/gnu/gdb/gdb-10.2.tar.gz Patch0: lzo_snappy_zstd.patch -Patch1: crash-8.0.2_build.patch +Patch1: crash-8.0.4_build.patch Patch2: 0001-crash-add-loongarch-support.patch URL: https://crash-utility.github.io ExclusiveOS: Linux @@ -77,6 +77,15 @@ cp -p defs.h %{buildroot}%{_includedir}/crash %{_includedir}/* %changelog +* Mon Mar 11 2024 mgb01105731 - 8.0.4-3 +- fix the source error + +* Fri Mar 8 2024 Ming Wang - 8.0.4-2 +- Add LoongArch64 support. + +* Mon Feb 26 2024 mgb01105731 - 8.0.4-1 +- update to 8.0.4 + * Tue Aug 8 2023 Ming Wang - 8.0.2-2 - Add LoongArch64 support. diff --git a/lzo_snappy_zstd.patch b/lzo_snappy_zstd.patch index cfeb674fbe47030c3040e31fec6e92aa2cd9fdb0..67e4ad3762e6b35b74c8837ed860aaf9aa9a0975 100644 --- a/lzo_snappy_zstd.patch +++ b/lzo_snappy_zstd.patch @@ -1,5 +1,5 @@ ---- crash-8.0.2/Makefile.orig -+++ crash-8.0.2/Makefile +--- crash-8.0.4/Makefile.orig ++++ crash-8.0.4/Makefile @@ -256,7 +256,7 @@ all: make_configure gdb_merge: force @if [ ! -f ${GDB}/README ]; then \ @@ -9,8 +9,8 @@ @echo "../../${PROGRAM} ../../${PROGRAM}lib.a" > ${GDB}/gdb/mergeobj @rm -f ${PROGRAM} @if [ ! -f ${GDB}/config.status ]; then \ ---- crash-8.0.2/diskdump.c.orig -+++ crash-8.0.2/diskdump.c +--- crash-8.0.4/diskdump.c.orig ++++ crash-8.0.4/diskdump.c @@ -23,6 +23,9 @@ * GNU General Public License for more details. */