From 47b5428c36a5a690a31746bdb53a09215679b3b2 Mon Sep 17 00:00:00 2001 From: wangkaiqiang Date: Wed, 8 May 2024 11:19:18 +0800 Subject: [PATCH] suport ID display for gen5 PCIe device --- ...ode-Make-dmi_slot_bus_width-reusable.patch | 96 ++++++++++++++ ...ssing-bits-from-SMBIOS-3.4.0-specifi.patch | 117 ++++++++++++++++++ dmidecode.spec | 9 +- 3 files changed, 221 insertions(+), 1 deletion(-) create mode 100644 0011-dmidecode-Make-dmi_slot_bus_width-reusable.patch create mode 100644 0012-dmidecode-Add-missing-bits-from-SMBIOS-3.4.0-specifi.patch diff --git a/0011-dmidecode-Make-dmi_slot_bus_width-reusable.patch b/0011-dmidecode-Make-dmi_slot_bus_width-reusable.patch new file mode 100644 index 0000000..5ba168c --- /dev/null +++ b/0011-dmidecode-Make-dmi_slot_bus_width-reusable.patch @@ -0,0 +1,96 @@ +From f1874a58d981593f4a754fc63b4ca1410a590078 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Wed, 15 Jun 2022 13:35:25 +0200 +Subject: [PATCH 1/2] dmidecode: Make dmi_slot_bus_width() reusable + +Let dmi_slot_bus_width() return its value without a trailing space, +so that this function can be reused in a different context. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 52 ++++++++++++++++++++++++++++++++++------------------ + 1 file changed, 34 insertions(+), 18 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index 73e455f..cd29caa 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -2074,31 +2074,49 @@ static const char *dmi_slot_type(u8 code) + return out_of_spec; + } + +-static const char *dmi_slot_bus_width(u8 code) ++/* If hide_unknown is set, return NULL instead of "Other" or "Unknown" */ ++static const char *dmi_slot_bus_width(u8 code, int hide_unknown) + { + /* 7.10.2 */ + static const char *width[] = { +- "", /* 0x01, "Other" */ +- "", /* "Unknown" */ +- "8-bit ", +- "16-bit ", +- "32-bit ", +- "64-bit ", +- "128-bit ", +- "x1 ", +- "x2 ", +- "x4 ", +- "x8 ", +- "x12 ", +- "x16 ", +- "x32 " /* 0x0E */ ++ "Other", /* 0x01 */ ++ "Unknown", ++ "8-bit", ++ "16-bit", ++ "32-bit", ++ "64-bit", ++ "128-bit", ++ "x1", ++ "x2", ++ "x4", ++ "x8", ++ "x12", ++ "x16", ++ "x32" /* 0x0E */ + }; + + if (code >= 0x01 && code <= 0x0E) ++ { ++ if (code <= 0x02 && hide_unknown) ++ return NULL; + return width[code - 0x01]; ++ } + return out_of_spec; + } + ++static void dmi_slot_type_with_width(u8 type, u8 width) ++{ ++ const char *type_str, *width_str; ++ ++ type_str = dmi_slot_type(type); ++ width_str = dmi_slot_bus_width(width, 1); ++ ++ if (width_str) ++ pr_attr("Type", "%s %s", width_str, type_str); ++ else ++ pr_attr("Type", "%s", type_str); ++} ++ + static const char *dmi_slot_current_usage(u8 code) + { + /* 7.10.3 */ +@@ -4405,9 +4423,7 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + if (h->length < 0x0C) break; + pr_attr("Designation", "%s", + dmi_string(h, data[0x04])); +- pr_attr("Type", "%s%s", +- dmi_slot_bus_width(data[0x06]), +- dmi_slot_type(data[0x05])); ++ dmi_slot_type_with_width(data[0x05], data[0x06]); + pr_attr("Current Usage", "%s", + dmi_slot_current_usage(data[0x07])); + pr_attr("Length", "%s", +-- +2.31.1 + diff --git a/0012-dmidecode-Add-missing-bits-from-SMBIOS-3.4.0-specifi.patch b/0012-dmidecode-Add-missing-bits-from-SMBIOS-3.4.0-specifi.patch new file mode 100644 index 0000000..c5b9db9 --- /dev/null +++ b/0012-dmidecode-Add-missing-bits-from-SMBIOS-3.4.0-specifi.patch @@ -0,0 +1,117 @@ +From 7172ba42d24430fefb538b970c76a135feb2dd78 Mon Sep 17 00:00:00 2001 +From: Jean Delvare +Date: Wed, 15 Jun 2022 13:35:25 +0200 +Subject: [PATCH 2/2] dmidecode: Add missing bits from SMBIOS 3.4.0 + specification + +When adding support for SMBIOS 3.4.0, we missed new enumerated +values for the slot type field, and 3 new fields at the end of +System Slots (type 9) structures. + +Signed-off-by: Jean Delvare +--- + dmidecode.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 72 insertions(+), 2 deletions(-) + +diff --git a/dmidecode.c b/dmidecode.c +index cd29caa..42da9fb 100644 +--- a/dmidecode.c ++++ b/dmidecode.c +@@ -2197,6 +2197,13 @@ static void dmi_slot_id(u8 code1, u8 code2, u8 type) + case 0xBB: /* PCI Express 4 */ + case 0xBC: /* PCI Express 4 */ + case 0xBD: /* PCI Express 4 */ ++ case 0xBE: /* PCI Express 5 */ ++ case 0xBF: /* PCI Express 5 */ ++ case 0xC0: /* PCI Express 5 */ ++ case 0xC1: /* PCI Express 5 */ ++ case 0xC2: /* PCI Express 5 */ ++ case 0xC3: /* PCI Express 5 */ ++ case 0xC4: /* PCI Express 6+ */ + pr_attr("ID", "%u", code1); + break; + case 0x07: /* PCMCIA */ +@@ -2269,6 +2276,65 @@ static void dmi_slot_peers(u8 n, const u8 *data) + } + } + ++static void dmi_slot_information(u8 type, u8 code) ++{ ++ switch (type) ++ { ++ case 0x1F: /* PCI Express 2 */ ++ case 0x20: /* PCI Express 3 */ ++ case 0x21: /* PCI Express Mini */ ++ case 0x22: /* PCI Express Mini */ ++ case 0x23: /* PCI Express Mini */ ++ case 0xA5: /* PCI Express */ ++ case 0xA6: /* PCI Express */ ++ case 0xA7: /* PCI Express */ ++ case 0xA8: /* PCI Express */ ++ case 0xA9: /* PCI Express */ ++ case 0xAA: /* PCI Express */ ++ case 0xAB: /* PCI Express 2 */ ++ case 0xAC: /* PCI Express 2 */ ++ case 0xAD: /* PCI Express 2 */ ++ case 0xAE: /* PCI Express 2 */ ++ case 0xAF: /* PCI Express 2 */ ++ case 0xB0: /* PCI Express 2 */ ++ case 0xB1: /* PCI Express 3 */ ++ case 0xB2: /* PCI Express 3 */ ++ case 0xB3: /* PCI Express 3 */ ++ case 0xB4: /* PCI Express 3 */ ++ case 0xB5: /* PCI Express 3 */ ++ case 0xB6: /* PCI Express 3 */ ++ case 0xB8: /* PCI Express 4 */ ++ case 0xB9: /* PCI Express 4 */ ++ case 0xBA: /* PCI Express 4 */ ++ case 0xBB: /* PCI Express 4 */ ++ case 0xBC: /* PCI Express 4 */ ++ case 0xBD: /* PCI Express 4 */ ++ case 0xBE: /* PCI Express 5 */ ++ case 0xBF: /* PCI Express 5 */ ++ case 0xC0: /* PCI Express 5 */ ++ case 0xC1: /* PCI Express 5 */ ++ case 0xC2: /* PCI Express 5 */ ++ case 0xC3: /* PCI Express 5 */ ++ case 0xC4: /* PCI Express 6+ */ ++ if (code) ++ pr_attr("PCI Express Generation", "%u", code); ++ break; ++ } ++} ++ ++static void dmi_slot_physical_width(u8 code) ++{ ++ if (code) ++ pr_attr("Slot Physical Width", "%s", ++ dmi_slot_bus_width(code, 0)); ++} ++ ++static void dmi_slot_pitch(u16 code) ++{ ++ if (code) ++ pr_attr("Pitch", "%u.%02u mm", code / 100, code % 100); ++} ++ + /* + * 7.11 On Board Devices Information (Type 10) + */ +@@ -4438,8 +4504,12 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) + if (h->length < 0x13) break; + pr_attr("Data Bus Width", "%u", data[0x11]); + pr_attr("Peer Devices", "%u", data[0x12]); +- if (h->length - 0x13 >= data[0x12] * 5) +- dmi_slot_peers(data[0x12], data + 0x13); ++ if (h->length < 0x13 + data[0x12] * 5) break; ++ dmi_slot_peers(data[0x12], data + 0x13); ++ if (h->length < 0x17 + data[0x12] * 5) break; ++ dmi_slot_information(data[0x05], data[0x13 + data[0x12] * 5]); ++ dmi_slot_physical_width(data[0x14 + data[0x12] * 5]); ++ dmi_slot_pitch(WORD(data + 0x15 + data[0x12] * 5)); + break; + + case 10: /* 7.11 On Board Devices Information */ +-- +2.31.1 + diff --git a/dmidecode.spec b/dmidecode.spec index 3ae70ec..4108f2e 100644 --- a/dmidecode.spec +++ b/dmidecode.spec @@ -1,4 +1,4 @@ -%define anolis_release .0.3 +%define anolis_release .0.5 Summary: Tool to analyse BIOS DMI data Name: dmidecode Version: 3.3 @@ -18,6 +18,8 @@ Patch6: 0007-dmidecode-Fix-crash-with-u-option.patch Patch7: 0008-dmidecode-Split-table-fetching-from-decoding.patch Patch8: 0009-dmidecode-Write-the-whole-dump-file-at-once.patch Patch9: 0010-dmidecode-Do-not-let-dump-bin-overwrite-an-existing-.patch +Patch10: 0011-dmidecode-Make-dmi_slot_bus_width-reusable.patch +Patch11: 0012-dmidecode-Add-missing-bits-from-SMBIOS-3.4.0-specifi.patch BuildRequires: gcc make @@ -68,6 +70,11 @@ make %{?_smp_mflags} DESTDIR=%{buildroot} prefix=%{_prefix} install-bin install- %doc AUTHORS NEWS README %changelog +* Wed May 08 2024 Kaiqiang Wang - 1:3.3-5.0.5 +- https://bugzilla.openanolis.cn/show_bug.cgi?id=8962 +- dmidecode: Make dmi_slot_bus_width() reusable +- dmidecode: Add missing bits from SMBIOS 3.4.0 specification + * Tue Mar 19 2024 wxiat - 1:3.3-5.0.4 - cherry-pick `add sw arch in files`. -- Gitee